From 7f7e501706b03b3942a647efe77e3dccfea54f04 Mon Sep 17 00:00:00 2001 From: "xmc-action-bot[bot]" <121654204+xmc-action-bot[bot]@users.noreply.github.com> Date: Fri, 1 Mar 2024 05:23:09 +0000 Subject: [PATCH] feat: updating from newer svd2rust (#60) Co-authored-by: lucasbrendel <1765755+lucasbrendel@users.noreply.github.com> --- src/can.rs | 78 +- src/can/clc.rs | 55 +- src/can/fdr.rs | 49 +- src/can/id.rs | 48 +- src/can/list.rs | 58 +- src/can/mcr.rs | 105 +- src/can/mitr.rs | 27 +- src/can/msid.rs | 16 +- src/can/msimask.rs | 37 +- src/can/mspnd.rs | 37 +- src/can/panctr.rs | 121 +- src/can_mo.rs | 10 +- src/can_mo/mo.rs | 66 +- src/can_mo/mo/moamr.rs | 79 +- src/can_mo/mo/moar.rs | 131 +- src/can_mo/mo/moctr.rs | 165 +- src/can_mo/mo/modatah.rs | 73 +- src/can_mo/mo/modatal.rs | 73 +- src/can_mo/mo/mofcr.rs | 549 ++-- src/can_mo/mo/mofgpr.rs | 73 +- src/can_mo/mo/moipr.rs | 169 +- src/can_mo/mo/mostat.rs | 388 +-- src/can_node0.rs | 51 +- src/can_node0/nbtr.rs | 115 +- src/can_node0/ncr.rs | 271 +- src/can_node0/necnt.rs | 121 +- src/can_node0/nfcr.rs | 193 +- src/can_node0/nipr.rs | 265 +- src/can_node0/npcr.rs | 79 +- src/can_node0/nsr.rs | 277 +- src/ccu40.rs | 58 +- src/ccu40/gcsc.rs | 117 +- src/ccu40/gcss.rs | 117 +- src/ccu40/gcst.rs | 394 +-- src/ccu40/gctrl.rs | 433 ++- src/ccu40/gidlc.rs | 51 +- src/ccu40/gidls.rs | 57 +- src/ccu40/gstat.rs | 160 +- src/ccu40/midr.rs | 28 +- src/ccu40_cc40.rs | 198 +- src/ccu40_cc40/c0v.rs | 52 +- src/ccu40_cc40/c1v.rs | 52 +- src/ccu40_cc40/c2v.rs | 52 +- src/ccu40_cc40/c3v.rs | 52 +- src/ccu40_cc40/cmc.rs | 595 ++-- src/ccu40_cc40/cr.rs | 16 +- src/ccu40_cc40/crs.rs | 37 +- src/ccu40_cc40/dit.rs | 22 +- src/ccu40_cc40/dits.rs | 37 +- src/ccu40_cc40/ecrd0.rs | 170 +- src/ccu40_cc40/ecrd1.rs | 170 +- src/ccu40_cc40/fpc.rs | 43 +- src/ccu40_cc40/fpcs.rs | 37 +- src/ccu40_cc40/ins.rs | 979 ++++--- src/ccu40_cc40/inte.rs | 319 +-- src/ccu40_cc40/ints.rs | 226 +- src/ccu40_cc40/pr.rs | 16 +- src/ccu40_cc40/prs.rs | 37 +- src/ccu40_cc40/psc.rs | 37 +- src/ccu40_cc40/psl.rs | 67 +- src/ccu40_cc40/srs.rs | 325 +-- src/ccu40_cc40/swr.rs | 69 +- src/ccu40_cc40/sws.rs | 69 +- src/ccu40_cc40/tc.rs | 827 +++--- src/ccu40_cc40/tcclr.rs | 39 +- src/ccu40_cc40/tcset.rs | 27 +- src/ccu40_cc40/tcst.rs | 70 +- src/ccu40_cc40/timer.rs | 37 +- src/ccu80.rs | 65 +- src/ccu80/gcsc.rs | 141 +- src/ccu80/gcss.rs | 141 +- src/ccu80/gcst.rs | 418 +-- src/ccu80/gctrl.rs | 433 ++- src/ccu80/gidlc.rs | 57 +- src/ccu80/gidls.rs | 63 +- src/ccu80/gpchk.rs | 313 +- src/ccu80/gstat.rs | 190 +- src/ccu80/midr.rs | 28 +- src/ccu80_cc80.rs | 247 +- src/ccu80_cc80/c0v.rs | 52 +- src/ccu80_cc80/c1v.rs | 52 +- src/ccu80_cc80/c2v.rs | 52 +- src/ccu80_cc80/c3v.rs | 52 +- src/ccu80_cc80/chc.rs | 235 +- src/ccu80_cc80/cmc.rs | 595 ++-- src/ccu80_cc80/cr1.rs | 16 +- src/ccu80_cc80/cr1s.rs | 37 +- src/ccu80_cc80/cr2.rs | 16 +- src/ccu80_cc80/cr2s.rs | 37 +- src/ccu80_cc80/dc1r.rs | 49 +- src/ccu80_cc80/dc2r.rs | 49 +- src/ccu80_cc80/dit.rs | 22 +- src/ccu80_cc80/dits.rs | 37 +- src/ccu80_cc80/dtc.rs | 337 ++- src/ccu80_cc80/ecrd0.rs | 170 +- src/ccu80_cc80/ecrd1.rs | 170 +- src/ccu80_cc80/fpc.rs | 43 +- src/ccu80_cc80/fpcs.rs | 37 +- src/ccu80_cc80/ins.rs | 979 ++++--- src/ccu80_cc80/inte.rs | 403 ++- src/ccu80_cc80/ints.rs | 286 +- src/ccu80_cc80/pr.rs | 16 +- src/ccu80_cc80/prs.rs | 37 +- src/ccu80_cc80/psc.rs | 37 +- src/ccu80_cc80/psl.rs | 193 +- src/ccu80_cc80/srs.rs | 385 ++- src/ccu80_cc80/stc.rs | 119 +- src/ccu80_cc80/swr.rs | 81 +- src/ccu80_cc80/sws.rs | 81 +- src/ccu80_cc80/tc.rs | 1067 ++++--- src/ccu80_cc80/tcclr.rs | 51 +- src/ccu80_cc80/tcset.rs | 27 +- src/ccu80_cc80/tcst.rs | 130 +- src/ccu80_cc80/timer.rs | 37 +- src/dac.rs | 86 +- src/dac/dac01data.rs | 49 +- src/dac/dac0cfg0.rs | 393 ++- src/dac/dac0cfg1.rs | 355 ++- src/dac/dac0data.rs | 37 +- src/dac/dac0path.rs | 61 +- src/dac/dac0patl.rs | 97 +- src/dac/dac1cfg0.rs | 393 ++- src/dac/dac1cfg1.rs | 313 +- src/dac/dac1data.rs | 37 +- src/dac/dac1path.rs | 61 +- src/dac/dac1patl.rs | 97 +- src/dac/id.rs | 28 +- src/dlr.rs | 37 +- src/dlr/lnen.rs | 529 ++-- src/dlr/ovrclr.rs | 93 +- src/dlr/ovrstat.rs | 82 +- src/dlr/srsel0.rs | 121 +- src/dlr/srsel1.rs | 73 +- src/dsd.rs | 58 +- src/dsd/cgcfg.rs | 361 ++- src/dsd/clc.rs | 139 +- src/dsd/evflag.rs | 361 ++- src/dsd/evflagclr.rs | 197 +- src/dsd/globcfg.rs | 69 +- src/dsd/globrc.rs | 193 +- src/dsd/id.rs | 28 +- src/dsd/ocs.rs | 129 +- src/dsd_ch0.rs | 86 +- src/dsd_ch0/boundsel.rs | 49 +- src/dsd_ch0/cgsync.rs | 61 +- src/dsd_ch0/dicfg.rs | 435 ++- src/dsd_ch0/fcfga.rs | 249 +- src/dsd_ch0/fcfgc.rs | 201 +- src/dsd_ch0/iwctr.rs | 145 +- src/dsd_ch0/modcfg.rs | 107 +- src/dsd_ch0/offm.rs | 37 +- src/dsd_ch0/rectcfg.rs | 217 +- src/dsd_ch0/resa.rs | 16 +- src/dsd_ch0/resm.rs | 16 +- src/dsd_ch0/tstmp.rs | 28 +- src/ebu.rs | 198 +- src/ebu/addrsel0.rs | 151 +- src/ebu/addrsel1.rs | 151 +- src/ebu/addrsel2.rs | 151 +- src/ebu/addrsel3.rs | 151 +- src/ebu/busrap0.rs | 525 ++-- src/ebu/busrap1.rs | 525 ++-- src/ebu/busrap2.rs | 525 ++-- src/ebu/busrap3.rs | 525 ++-- src/ebu/busrcon0.rs | 563 ++-- src/ebu/busrcon1.rs | 563 ++-- src/ebu/busrcon2.rs | 563 ++-- src/ebu/busrcon3.rs | 563 ++-- src/ebu/buswap0.rs | 573 ++-- src/ebu/buswap1.rs | 573 ++-- src/ebu/buswap2.rs | 573 ++-- src/ebu/buswap3.rs | 573 ++-- src/ebu/buswcon0.rs | 425 ++- src/ebu/buswcon1.rs | 425 ++- src/ebu/buswcon2.rs | 425 ++- src/ebu/buswcon3.rs | 425 ++- src/ebu/clc.rs | 345 ++- src/ebu/id.rs | 28 +- src/ebu/modcon.rs | 359 ++- src/ebu/sdrmcon.rs | 465 ++- src/ebu/sdrmod.rs | 237 +- src/ebu/sdrmref.rs | 145 +- src/ebu/sdrstat.rs | 100 +- src/ebu/usercon.rs | 123 +- src/ecat0.rs | 675 +++-- src/ecat0/al_control.rs | 120 +- src/ecat0/al_event_mask.rs | 991 ++++--- src/ecat0/al_event_req.rs | 823 +++--- src/ecat0/al_status.rs | 177 +- src/ecat0/al_status_code.rs | 37 +- src/ecat0/build.rs | 16 +- src/ecat0/dc_act.rs | 151 +- src/ecat0/dc_act_stat.rs | 100 +- src/ecat0/dc_cyc_cont.rs | 100 +- src/ecat0/dc_cyc_start_time.rs | 37 +- src/ecat0/dc_ecat_cng_ev_time.rs | 16 +- src/ecat0/dc_latch0_cont.rs | 109 +- src/ecat0/dc_latch0_stat.rs | 76 +- src/ecat0/dc_latch0_time_neg.rs | 16 +- src/ecat0/dc_latch0_time_pos.rs | 16 +- src/ecat0/dc_latch1_cont.rs | 109 +- src/ecat0/dc_latch1_stat.rs | 76 +- src/ecat0/dc_latch1_time_neg.rs | 16 +- src/ecat0/dc_latch1_time_pos.rs | 16 +- src/ecat0/dc_next_sync1_pulse.rs | 16 +- src/ecat0/dc_pdi_cng_ev_time.rs | 16 +- src/ecat0/dc_pdi_start_ev_time.rs | 16 +- src/ecat0/dc_pulse_len.rs | 36 +- src/ecat0/dc_rcv_time_port0.rs | 16 +- src/ecat0/dc_rcv_time_port1.rs | 16 +- src/ecat0/dc_speed_count_diff.rs | 16 +- src/ecat0/dc_speed_count_fil_depth.rs | 37 +- src/ecat0/dc_speed_count_start.rs | 37 +- src/ecat0/dc_sync0_cyc_time.rs | 61 +- src/ecat0/dc_sync0_stat.rs | 16 +- src/ecat0/dc_sync1_cyc_time.rs | 37 +- src/ecat0/dc_sync1_stat.rs | 16 +- src/ecat0/dc_sys_time_delay.rs | 37 +- src/ecat0/dc_sys_time_diff.rs | 46 +- src/ecat0/dc_sys_time_fil_depth.rs | 37 +- src/ecat0/dc_sys_time_offset.rs | 37 +- src/ecat0/eep_adr.rs | 69 +- src/ecat0/eep_conf.rs | 70 +- src/ecat0/eep_cont_stat.rs | 367 ++- src/ecat0/eep_data.rs | 37 +- src/ecat0/eep_state.rs | 67 +- src/ecat0/err_led.rs | 127 +- src/ecat0/esc_config.rs | 250 +- src/ecat0/esc_dl_control.rs | 404 +-- src/ecat0/esc_dl_status.rs | 460 +-- src/ecat0/esc_wr_enable.rs | 16 +- src/ecat0/esc_wr_protect.rs | 40 +- src/ecat0/event_mask.rs | 340 +-- src/ecat0/event_req.rs | 340 +-- src/ecat0/feature.rs | 340 +-- src/ecat0/fmmu_num.rs | 16 +- src/ecat0/fwd_rx_err_count0.rs | 16 +- src/ecat0/fwd_rx_err_count1.rs | 16 +- src/ecat0/id.rs | 28 +- src/ecat0/lost_link_count0.rs | 16 +- src/ecat0/lost_link_count1.rs | 16 +- src/ecat0/mii_cont_stat.rs | 233 +- src/ecat0/mii_ecat_acs_state.rs | 40 +- src/ecat0/mii_pdi_acs_state.rs | 97 +- src/ecat0/mii_phy_adr.rs | 81 +- src/ecat0/mii_phy_data.rs | 37 +- src/ecat0/mii_phy_reg_adr.rs | 37 +- src/ecat0/pdi_config.rs | 86 +- src/ecat0/pdi_control.rs | 42 +- src/ecat0/pdi_err_count.rs | 16 +- src/ecat0/pdi_ext_config.rs | 86 +- src/ecat0/physical_rw_offset.rs | 16 +- src/ecat0/port_desc.rs | 186 +- src/ecat0/proc_err_count.rs | 16 +- src/ecat0/ram_size.rs | 16 +- src/ecat0/readmode_dc_sys_time.rs | 16 +- src/ecat0/readmode_esc_reset_ecat.rs | 48 +- src/ecat0/readmode_esc_reset_pdi.rs | 48 +- src/ecat0/receive_time_pu.rs | 16 +- src/ecat0/revision.rs | 16 +- src/ecat0/run_led.rs | 135 +- src/ecat0/rx_err_count0.rs | 22 +- src/ecat0/rx_err_count1.rs | 22 +- src/ecat0/station_adr.rs | 16 +- src/ecat0/station_alias.rs | 37 +- src/ecat0/status.rs | 40 +- src/ecat0/sync_latch_config.rs | 218 +- src/ecat0/sync_manager.rs | 16 +- src/ecat0/type_.rs | 16 +- src/ecat0/wd_count_pdata.rs | 16 +- src/ecat0/wd_count_pdi.rs | 16 +- src/ecat0/wd_divide.rs | 37 +- src/ecat0/wd_stat_pdata.rs | 40 +- src/ecat0/wd_time_pdata.rs | 37 +- src/ecat0/wd_time_pdi.rs | 37 +- src/ecat0/wr_reg_enable.rs | 16 +- src/ecat0/wr_reg_protect.rs | 40 +- src/ecat0/writemode_dc_sys_time.rs | 27 +- src/ecat0/writemode_esc_reset_ecat.rs | 16 +- src/ecat0/writemode_esc_reset_pdi.rs | 16 +- src/ecat0_con.rs | 23 +- src/ecat0_con/con_.rs | 271 +- src/ecat0_con/conp0.rs | 625 ++-- src/ecat0_con/conp1.rs | 625 ++-- src/ecat0_fmmu0.rs | 58 +- src/ecat0_fmmu0/fmmu_act.rs | 40 +- src/ecat0_fmmu0/fmmu_l_start_adr.rs | 16 +- src/ecat0_fmmu0/fmmu_l_start_bit.rs | 16 +- src/ecat0_fmmu0/fmmu_l_stop_bit.rs | 16 +- src/ecat0_fmmu0/fmmu_len.rs | 16 +- src/ecat0_fmmu0/fmmu_p_start_adr.rs | 16 +- src/ecat0_fmmu0/fmmu_p_start_bit.rs | 16 +- src/ecat0_fmmu0/fmmu_type.rs | 70 +- src/ecat0_sm0.rs | 44 +- src/ecat0_sm0/sm_act.rs | 106 +- src/ecat0_sm0/sm_control.rs | 164 +- src/ecat0_sm0/sm_len.rs | 16 +- src/ecat0_sm0/sm_p_start_adr.rs | 16 +- src/ecat0_sm0/sm_pdi_ctr.rs | 79 +- src/ecat0_sm0/sm_status.rs | 204 +- src/eru0.rs | 27 +- src/eru0/exicon.rs | 439 ++- src/eru0/exisel.rs | 505 ++-- src/eru0/exocon.rs | 385 ++- src/eth0.rs | 954 ++++--- src/eth0/ahb_status.rs | 16 +- src/eth0/bus_mode.rs | 187 +- .../current_host_receive_buffer_address.rs | 16 +- src/eth0/current_host_receive_descriptor.rs | 16 +- .../current_host_transmit_buffer_address.rs | 16 +- src/eth0/current_host_transmit_descriptor.rs | 16 +- src/eth0/debug.rs | 82 +- src/eth0/flow_control.rs | 109 +- src/eth0/gmii_address.rs | 85 +- src/eth0/gmii_data.rs | 37 +- src/eth0/hash_table_high.rs | 37 +- src/eth0/hash_table_low.rs | 37 +- src/eth0/hw_feature.rs | 193 +- src/eth0/interrupt_enable.rs | 205 +- src/eth0/interrupt_mask.rs | 49 +- src/eth0/interrupt_status.rs | 46 +- src/eth0/mac_address0_high.rs | 43 +- src/eth0/mac_address0_low.rs | 37 +- src/eth0/mac_address1_high.rs | 73 +- src/eth0/mac_address1_low.rs | 37 +- src/eth0/mac_address2_high.rs | 73 +- src/eth0/mac_address2_low.rs | 37 +- src/eth0/mac_address3_high.rs | 73 +- src/eth0/mac_address3_low.rs | 37 +- src/eth0/mac_configuration.rs | 271 +- src/eth0/mac_frame_filter.rs | 181 +- ...issed_frame_and_buffer_overflow_counter.rs | 34 +- src/eth0/mmc_control.rs | 109 +- src/eth0/mmc_ipc_receive_interrupt.rs | 178 +- src/eth0/mmc_ipc_receive_interrupt_mask.rs | 361 ++- src/eth0/mmc_receive_interrupt.rs | 166 +- src/eth0/mmc_receive_interrupt_mask.rs | 337 ++- src/eth0/mmc_transmit_interrupt.rs | 166 +- src/eth0/mmc_transmit_interrupt_mask.rs | 337 ++- src/eth0/operation_mode.rs | 169 +- src/eth0/pmt_control_status.rs | 97 +- src/eth0/receive_descriptor_list_address.rs | 37 +- src/eth0/receive_interrupt_watchdog_timer.rs | 37 +- src/eth0/receive_poll_demand.rs | 37 +- src/eth0/remote_wake_up_frame_filter.rs | 37 +- .../rx_1024tomaxoctets_frames_good_bad.rs | 16 +- src/eth0/rx_128to255octets_frames_good_bad.rs | 16 +- src/eth0/rx_256to511octets_frames_good_bad.rs | 16 +- .../rx_512to1023octets_frames_good_bad.rs | 16 +- src/eth0/rx_64octets_frames_good_bad.rs | 16 +- src/eth0/rx_65to127octets_frames_good_bad.rs | 16 +- src/eth0/rx_alignment_error_frames.rs | 16 +- src/eth0/rx_broadcast_frames_good.rs | 16 +- src/eth0/rx_control_frames_good.rs | 16 +- src/eth0/rx_crc_error_frames.rs | 16 +- src/eth0/rx_fifo_overflow_frames.rs | 16 +- src/eth0/rx_frames_count_good_bad.rs | 16 +- src/eth0/rx_jabber_error_frames.rs | 16 +- src/eth0/rx_length_error_frames.rs | 16 +- src/eth0/rx_multicast_frames_good.rs | 16 +- src/eth0/rx_octet_count_good.rs | 16 +- src/eth0/rx_octet_count_good_bad.rs | 16 +- src/eth0/rx_out_of_range_type_frames.rs | 16 +- src/eth0/rx_oversize_frames_good.rs | 16 +- src/eth0/rx_pause_frames.rs | 16 +- src/eth0/rx_receive_error_frames.rs | 16 +- src/eth0/rx_runt_error_frames.rs | 16 +- src/eth0/rx_undersize_frames_good.rs | 16 +- src/eth0/rx_unicast_frames_good.rs | 16 +- src/eth0/rx_vlan_frames_good_bad.rs | 16 +- src/eth0/rx_watchdog_error_frames.rs | 16 +- src/eth0/rxicmp_error_frames.rs | 16 +- src/eth0/rxicmp_error_octets.rs | 16 +- src/eth0/rxicmp_good_frames.rs | 16 +- src/eth0/rxicmp_good_octets.rs | 16 +- src/eth0/rxipv4_fragmented_frames.rs | 16 +- src/eth0/rxipv4_fragmented_octets.rs | 16 +- src/eth0/rxipv4_good_frames.rs | 16 +- src/eth0/rxipv4_good_octets.rs | 16 +- src/eth0/rxipv4_header_error_frames.rs | 16 +- src/eth0/rxipv4_header_error_octets.rs | 16 +- src/eth0/rxipv4_no_payload_frames.rs | 16 +- src/eth0/rxipv4_no_payload_octets.rs | 16 +- .../rxipv4_udp_checksum_disable_octets.rs | 16 +- .../rxipv4_udp_checksum_disabled_frames.rs | 16 +- src/eth0/rxipv6_good_frames.rs | 16 +- src/eth0/rxipv6_good_octets.rs | 16 +- src/eth0/rxipv6_header_error_frames.rs | 16 +- src/eth0/rxipv6_header_error_octets.rs | 16 +- src/eth0/rxipv6_no_payload_frames.rs | 16 +- src/eth0/rxipv6_no_payload_octets.rs | 16 +- src/eth0/rxtcp_error_frames.rs | 16 +- src/eth0/rxtcp_error_octets.rs | 16 +- src/eth0/rxtcp_good_frames.rs | 16 +- src/eth0/rxtcp_good_octets.rs | 16 +- src/eth0/rxudp_error_frames.rs | 16 +- src/eth0/rxudp_error_octets.rs | 16 +- src/eth0/rxudp_good_frames.rs | 16 +- src/eth0/rxudp_good_octets.rs | 16 +- src/eth0/status.rs | 241 +- src/eth0/sub_second_increment.rs | 37 +- src/eth0/system_time_higher_word_seconds.rs | 37 +- src/eth0/system_time_nanoseconds.rs | 16 +- src/eth0/system_time_nanoseconds_update.rs | 49 +- src/eth0/system_time_seconds.rs | 16 +- src/eth0/system_time_seconds_update.rs | 37 +- src/eth0/target_time_nanoseconds.rs | 43 +- src/eth0/target_time_seconds.rs | 37 +- src/eth0/timestamp_addend.rs | 37 +- src/eth0/timestamp_control.rs | 217 +- src/eth0/timestamp_status.rs | 64 +- src/eth0/transmit_descriptor_list_address.rs | 37 +- src/eth0/transmit_poll_demand.rs | 37 +- .../tx_1024tomaxoctets_frames_good_bad.rs | 16 +- src/eth0/tx_128to255octets_frames_good_bad.rs | 16 +- src/eth0/tx_256to511octets_frames_good_bad.rs | 16 +- .../tx_512to1023octets_frames_good_bad.rs | 16 +- src/eth0/tx_64octets_frames_good_bad.rs | 16 +- src/eth0/tx_65to127octets_frames_good_bad.rs | 16 +- src/eth0/tx_broadcast_frames_good.rs | 16 +- src/eth0/tx_broadcast_frames_good_bad.rs | 16 +- src/eth0/tx_carrier_error_frames.rs | 16 +- src/eth0/tx_deferred_frames.rs | 16 +- src/eth0/tx_excessive_collision_frames.rs | 16 +- src/eth0/tx_excessive_deferral_error.rs | 16 +- src/eth0/tx_frame_count_good.rs | 16 +- src/eth0/tx_frame_count_good_bad.rs | 16 +- src/eth0/tx_late_collision_frames.rs | 16 +- src/eth0/tx_multicast_frames_good.rs | 16 +- src/eth0/tx_multicast_frames_good_bad.rs | 16 +- src/eth0/tx_multiple_collision_good_frames.rs | 16 +- src/eth0/tx_octet_count_good.rs | 16 +- src/eth0/tx_octet_count_good_bad.rs | 16 +- src/eth0/tx_osize_frames_good.rs | 16 +- src/eth0/tx_pause_frames.rs | 16 +- src/eth0/tx_single_collision_good_frames.rs | 16 +- src/eth0/tx_underflow_error_frames.rs | 16 +- src/eth0/tx_unicast_frames_good_bad.rs | 16 +- src/eth0/tx_vlan_frames_good.rs | 16 +- src/eth0/version.rs | 22 +- src/eth0/vlan_tag.rs | 79 +- src/eth0_con.rs | 9 +- src/eth0_con/eth0_con.rs | 727 +++-- src/fce.rs | 16 +- src/fce/clc.rs | 43 +- src/fce/id.rs | 28 +- src/fce_ke0.rs | 58 +- src/fce_ke0/cfg.rs | 403 ++- src/fce_ke0/check.rs | 37 +- src/fce_ke0/crc.rs | 37 +- src/fce_ke0/ctr.rs | 61 +- src/fce_ke0/ir.rs | 37 +- src/fce_ke0/length.rs | 37 +- src/fce_ke0/res.rs | 16 +- src/fce_ke0/sts.rs | 73 +- src/flash0.rs | 51 +- src/flash0/fcon.rs | 627 ++-- src/flash0/fsr.rs | 586 ++-- src/flash0/id.rs | 28 +- src/flash0/marp.rs | 119 +- src/flash0/procon0.rs | 430 +-- src/flash0/procon1.rs | 430 +-- src/flash0/procon2.rs | 400 +-- src/generic.rs | 29 +- src/gpdma0.rs | 226 +- src/gpdma0/chenreg.rs | 75 +- src/gpdma0/clearblock.rs | 197 +- src/gpdma0/cleardsttran.rs | 197 +- src/gpdma0/clearerr.rs | 197 +- src/gpdma0/clearsrctran.rs | 197 +- src/gpdma0/cleartfr.rs | 197 +- src/gpdma0/dmacfgreg.rs | 67 +- src/gpdma0/id.rs | 16 +- src/gpdma0/lstdstreg.rs | 537 ++-- src/gpdma0/lstsrcreg.rs | 537 ++-- src/gpdma0/maskblock.rs | 537 ++-- src/gpdma0/maskdsttran.rs | 537 ++-- src/gpdma0/maskerr.rs | 537 ++-- src/gpdma0/masksrctran.rs | 537 ++-- src/gpdma0/masktfr.rs | 537 ++-- src/gpdma0/rawblock.rs | 121 +- src/gpdma0/rawdsttran.rs | 121 +- src/gpdma0/rawerr.rs | 121 +- src/gpdma0/rawsrctran.rs | 121 +- src/gpdma0/rawtfr.rs | 121 +- src/gpdma0/reqdstreg.rs | 297 +- src/gpdma0/reqsrcreg.rs | 297 +- src/gpdma0/sglreqdstreg.rs | 297 +- src/gpdma0/sglreqsrcreg.rs | 297 +- src/gpdma0/statusblock.rs | 58 +- src/gpdma0/statusdsttran.rs | 58 +- src/gpdma0/statuserr.rs | 58 +- src/gpdma0/statusint.rs | 40 +- src/gpdma0/statussrctran.rs | 58 +- src/gpdma0/statustfr.rs | 58 +- src/gpdma0/type_.rs | 16 +- src/gpdma0/version.rs | 16 +- src/gpdma0_ch0.rs | 93 +- src/gpdma0_ch0/cfgh.rs | 169 +- src/gpdma0_ch0/cfgl.rs | 441 ++- src/gpdma0_ch0/ctlh.rs | 49 +- src/gpdma0_ch0/ctll.rs | 309 +- src/gpdma0_ch0/dar.rs | 37 +- src/gpdma0_ch0/dsr.rs | 49 +- src/gpdma0_ch0/dstat.rs | 37 +- src/gpdma0_ch0/dstatar.rs | 37 +- src/gpdma0_ch0/llp.rs | 37 +- src/gpdma0_ch0/sar.rs | 37 +- src/gpdma0_ch0/sgr.rs | 49 +- src/gpdma0_ch0/sstat.rs | 37 +- src/gpdma0_ch0/sstatar.rs | 37 +- src/gpdma0_ch2.rs | 44 +- src/gpdma0_ch2/cfgh.rs | 145 +- src/gpdma0_ch2/cfgl.rs | 417 ++- src/gpdma0_ch2/ctlh.rs | 49 +- src/gpdma0_ch2/ctll.rs | 201 +- src/gpdma0_ch2/dar.rs | 37 +- src/gpdma0_ch2/sar.rs | 37 +- src/gpdma1.rs | 226 +- src/gpdma1/chenreg.rs | 75 +- src/gpdma1/clearblock.rs | 109 +- src/gpdma1/cleardsttran.rs | 109 +- src/gpdma1/clearerr.rs | 109 +- src/gpdma1/clearsrctran.rs | 109 +- src/gpdma1/cleartfr.rs | 109 +- src/gpdma1/dmacfgreg.rs | 67 +- src/gpdma1/id.rs | 16 +- src/gpdma1/lstdstreg.rs | 281 +- src/gpdma1/lstsrcreg.rs | 281 +- src/gpdma1/maskblock.rs | 281 +- src/gpdma1/maskdsttran.rs | 281 +- src/gpdma1/maskerr.rs | 281 +- src/gpdma1/masksrctran.rs | 281 +- src/gpdma1/masktfr.rs | 281 +- src/gpdma1/rawblock.rs | 73 +- src/gpdma1/rawdsttran.rs | 73 +- src/gpdma1/rawerr.rs | 73 +- src/gpdma1/rawsrctran.rs | 73 +- src/gpdma1/rawtfr.rs | 73 +- src/gpdma1/reqdstreg.rs | 161 +- src/gpdma1/reqsrcreg.rs | 161 +- src/gpdma1/sglreqdstreg.rs | 161 +- src/gpdma1/sglreqsrcreg.rs | 161 +- src/gpdma1/statusblock.rs | 34 +- src/gpdma1/statusdsttran.rs | 34 +- src/gpdma1/statuserr.rs | 34 +- src/gpdma1/statusint.rs | 40 +- src/gpdma1/statussrctran.rs | 34 +- src/gpdma1/statustfr.rs | 34 +- src/gpdma1/type_.rs | 16 +- src/gpdma1/version.rs | 16 +- src/gpdma1_ch0.rs | 44 +- src/gpdma1_ch0/cfgh.rs | 145 +- src/gpdma1_ch0/cfgl.rs | 417 ++- src/gpdma1_ch0/ctlh.rs | 49 +- src/gpdma1_ch0/ctll.rs | 201 +- src/gpdma1_ch0/dar.rs | 37 +- src/gpdma1_ch0/sar.rs | 37 +- src/ledts0.rs | 79 +- src/ledts0/evfr.rs | 139 +- src/ledts0/fnctl.rs | 575 ++-- src/ledts0/globctl.rs | 407 ++- src/ledts0/id.rs | 28 +- src/ledts0/ldcmp0.rs | 73 +- src/ledts0/ldcmp1.rs | 73 +- src/ledts0/line0.rs | 73 +- src/ledts0/line1.rs | 73 +- src/ledts0/tscmp0.rs | 73 +- src/ledts0/tscmp1.rs | 73 +- src/ledts0/tsval.rs | 43 +- src/lib.rs | 2532 ++++++++--------- src/pba0.rs | 16 +- src/pba0/sts.rs | 67 +- src/pba0/waddr.rs | 16 +- src/pmu0.rs | 9 +- src/pmu0/id.rs | 28 +- src/port0.rs | 86 +- src/port0/hwsel.rs | 857 +++--- src/port0/in_.rs | 490 ++-- src/port0/iocr0.rs | 713 +++-- src/port0/iocr12.rs | 713 +++-- src/port0/iocr4.rs | 713 +++-- src/port0/iocr8.rs | 713 +++-- src/port0/omr.rs | 213 +- src/port0/out.rs | 697 +++-- src/port0/pdisc.rs | 490 ++-- src/port0/pdr0.rs | 617 ++-- src/port0/pdr1.rs | 713 +++-- src/port0/pps.rs | 697 +++-- src/port1.rs | 86 +- src/port1/hwsel.rs | 857 +++--- src/port1/in_.rs | 490 ++-- src/port1/iocr0.rs | 713 +++-- src/port1/iocr12.rs | 713 +++-- src/port1/iocr4.rs | 713 +++-- src/port1/iocr8.rs | 713 +++-- src/port1/omr.rs | 213 +- src/port1/out.rs | 697 +++-- src/port1/pdisc.rs | 490 ++-- src/port1/pdr0.rs | 665 +++-- src/port1/pdr1.rs | 617 ++-- src/port1/pps.rs | 697 +++-- src/port14.rs | 72 +- src/port14/hwsel.rs | 857 +++--- src/port14/in_.rs | 490 ++-- src/port14/iocr0.rs | 713 +++-- src/port14/iocr12.rs | 713 +++-- src/port14/iocr4.rs | 713 +++-- src/port14/iocr8.rs | 713 +++-- src/port14/omr.rs | 213 +- src/port14/out.rs | 697 +++-- src/port14/pdisc.rs | 613 ++-- src/port14/pps.rs | 697 +++-- src/port15.rs | 72 +- src/port15/hwsel.rs | 857 +++--- src/port15/in_.rs | 490 ++-- src/port15/iocr0.rs | 713 +++-- src/port15/iocr12.rs | 713 +++-- src/port15/iocr4.rs | 713 +++-- src/port15/iocr8.rs | 713 +++-- src/port15/omr.rs | 213 +- src/port15/out.rs | 697 +++-- src/port15/pdisc.rs | 529 ++-- src/port15/pps.rs | 697 +++-- src/port2.rs | 86 +- src/port2/hwsel.rs | 857 +++--- src/port2/in_.rs | 490 ++-- src/port2/iocr0.rs | 713 +++-- src/port2/iocr12.rs | 713 +++-- src/port2/iocr4.rs | 713 +++-- src/port2/iocr8.rs | 713 +++-- src/port2/omr.rs | 213 +- src/port2/out.rs | 697 +++-- src/port2/pdisc.rs | 490 ++-- src/port2/pdr0.rs | 617 ++-- src/port2/pdr1.rs | 569 ++-- src/port2/pps.rs | 697 +++-- src/port3.rs | 86 +- src/port3/hwsel.rs | 857 +++--- src/port3/in_.rs | 490 ++-- src/port3/iocr0.rs | 713 +++-- src/port3/iocr12.rs | 713 +++-- src/port3/iocr4.rs | 713 +++-- src/port3/iocr8.rs | 713 +++-- src/port3/omr.rs | 213 +- src/port3/out.rs | 697 +++-- src/port3/pdisc.rs | 490 ++-- src/port3/pdr0.rs | 641 ++--- src/port3/pdr1.rs | 713 +++-- src/port3/pps.rs | 697 +++-- src/port4.rs | 65 +- src/port4/hwsel.rs | 857 +++--- src/port4/in_.rs | 490 ++-- src/port4/iocr0.rs | 713 +++-- src/port4/iocr4.rs | 713 +++-- src/port4/omr.rs | 213 +- src/port4/out.rs | 697 +++-- src/port4/pdisc.rs | 490 ++-- src/port4/pdr0.rs | 713 +++-- src/port4/pps.rs | 697 +++-- src/port5.rs | 79 +- src/port5/hwsel.rs | 857 +++--- src/port5/in_.rs | 490 ++-- src/port5/iocr0.rs | 713 +++-- src/port5/iocr4.rs | 713 +++-- src/port5/iocr8.rs | 713 +++-- src/port5/omr.rs | 213 +- src/port5/out.rs | 697 +++-- src/port5/pdisc.rs | 490 ++-- src/port5/pdr0.rs | 665 +++-- src/port5/pdr1.rs | 617 ++-- src/port5/pps.rs | 697 +++-- src/port6.rs | 65 +- src/port6/hwsel.rs | 857 +++--- src/port6/in_.rs | 490 ++-- src/port6/iocr0.rs | 713 +++-- src/port6/iocr4.rs | 713 +++-- src/port6/omr.rs | 213 +- src/port6/out.rs | 697 +++-- src/port6/pdisc.rs | 490 ++-- src/port6/pdr0.rs | 593 ++-- src/port6/pps.rs | 697 +++-- src/port7.rs | 79 +- src/port7/hwsel.rs | 857 +++--- src/port7/in_.rs | 490 ++-- src/port7/iocr0.rs | 713 +++-- src/port7/iocr4.rs | 713 +++-- src/port7/iocr8.rs | 713 +++-- src/port7/omr.rs | 213 +- src/port7/out.rs | 697 +++-- src/port7/pdisc.rs | 490 ++-- src/port7/pdr0.rs | 665 +++-- src/port7/pdr1.rs | 617 ++-- src/port7/pps.rs | 697 +++-- src/port8.rs | 79 +- src/port8/hwsel.rs | 857 +++--- src/port8/in_.rs | 490 ++-- src/port8/iocr0.rs | 713 +++-- src/port8/iocr4.rs | 713 +++-- src/port8/iocr8.rs | 713 +++-- src/port8/omr.rs | 213 +- src/port8/out.rs | 697 +++-- src/port8/pdisc.rs | 490 ++-- src/port8/pdr0.rs | 665 +++-- src/port8/pdr1.rs | 617 ++-- src/port8/pps.rs | 697 +++-- src/port9.rs | 79 +- src/port9/hwsel.rs | 857 +++--- src/port9/in_.rs | 490 ++-- src/port9/iocr0.rs | 713 +++-- src/port9/iocr4.rs | 713 +++-- src/port9/iocr8.rs | 713 +++-- src/port9/omr.rs | 213 +- src/port9/out.rs | 697 +++-- src/port9/pdisc.rs | 490 ++-- src/port9/pdr0.rs | 665 +++-- src/port9/pdr1.rs | 617 ++-- src/port9/pps.rs | 697 +++-- src/posif0.rs | 135 +- src/posif0/halp.rs | 22 +- src/posif0/halps.rs | 49 +- src/posif0/mcm.rs | 16 +- src/posif0/mcmc.rs | 33 +- src/posif0/mcmf.rs | 40 +- src/posif0/mcms.rs | 39 +- src/posif0/mcsm.rs | 37 +- src/posif0/midr.rs | 28 +- src/posif0/pconf.rs | 875 +++--- src/posif0/pdbg.rs | 52 +- src/posif0/pflg.rs | 280 +- src/posif0/pflge.rs | 781 +++-- src/posif0/prun.rs | 40 +- src/posif0/prunc.rs | 33 +- src/posif0/pruns.rs | 27 +- src/posif0/psus.rs | 145 +- src/posif0/qdc.rs | 233 +- src/posif0/rpflg.rs | 75 +- src/posif0/spflg.rs | 75 +- src/ppb.rs | 590 ++-- src/ppb/actlr.rs | 85 +- src/ppb/afsr.rs | 37 +- src/ppb/aircr.rs | 113 +- src/ppb/bfar.rs | 37 +- src/ppb/ccr.rs | 277 +- src/ppb/cfsr.rs | 823 +++--- src/ppb/cpacr.rs | 129 +- src/ppb/cpuid.rs | 120 +- src/ppb/fpcar.rs | 37 +- src/ppb/fpccr.rs | 403 ++- src/ppb/fpdscr.rs | 73 +- src/ppb/hfsr.rs | 121 +- src/ppb/icsr.rs | 247 +- src/ppb/mmfar.rs | 37 +- src/ppb/mpu_ctrl.rs | 151 +- src/ppb/mpu_rasr.rs | 195 +- src/ppb/mpu_rasr_a1.rs | 195 +- src/ppb/mpu_rasr_a2.rs | 195 +- src/ppb/mpu_rasr_a3.rs | 195 +- src/ppb/mpu_rbar.rs | 91 +- src/ppb/mpu_rbar_a1.rs | 91 +- src/ppb/mpu_rbar_a2.rs | 91 +- src/ppb/mpu_rbar_a3.rs | 91 +- src/ppb/mpu_rnr.rs | 37 +- src/ppb/mpu_type.rs | 28 +- src/ppb/nvic_iabr0.rs | 69 +- src/ppb/nvic_iabr1.rs | 69 +- src/ppb/nvic_iabr2.rs | 69 +- src/ppb/nvic_iabr3.rs | 69 +- src/ppb/nvic_icer0.rs | 69 +- src/ppb/nvic_icer1.rs | 69 +- src/ppb/nvic_icer2.rs | 69 +- src/ppb/nvic_icer3.rs | 69 +- src/ppb/nvic_icpr0.rs | 69 +- src/ppb/nvic_icpr1.rs | 69 +- src/ppb/nvic_icpr2.rs | 69 +- src/ppb/nvic_icpr3.rs | 69 +- src/ppb/nvic_ipr0.rs | 73 +- src/ppb/nvic_ipr1.rs | 73 +- src/ppb/nvic_ipr10.rs | 73 +- src/ppb/nvic_ipr11.rs | 73 +- src/ppb/nvic_ipr12.rs | 73 +- src/ppb/nvic_ipr13.rs | 73 +- src/ppb/nvic_ipr14.rs | 73 +- src/ppb/nvic_ipr15.rs | 73 +- src/ppb/nvic_ipr16.rs | 73 +- src/ppb/nvic_ipr17.rs | 73 +- src/ppb/nvic_ipr18.rs | 73 +- src/ppb/nvic_ipr19.rs | 73 +- src/ppb/nvic_ipr2.rs | 73 +- src/ppb/nvic_ipr20.rs | 73 +- src/ppb/nvic_ipr21.rs | 73 +- src/ppb/nvic_ipr22.rs | 73 +- src/ppb/nvic_ipr23.rs | 73 +- src/ppb/nvic_ipr24.rs | 73 +- src/ppb/nvic_ipr25.rs | 73 +- src/ppb/nvic_ipr26.rs | 73 +- src/ppb/nvic_ipr27.rs | 73 +- src/ppb/nvic_ipr3.rs | 73 +- src/ppb/nvic_ipr4.rs | 73 +- src/ppb/nvic_ipr5.rs | 73 +- src/ppb/nvic_ipr6.rs | 73 +- src/ppb/nvic_ipr7.rs | 73 +- src/ppb/nvic_ipr8.rs | 73 +- src/ppb/nvic_ipr9.rs | 73 +- src/ppb/nvic_iser0.rs | 69 +- src/ppb/nvic_iser1.rs | 69 +- src/ppb/nvic_iser2.rs | 69 +- src/ppb/nvic_iser3.rs | 69 +- src/ppb/nvic_ispr0.rs | 69 +- src/ppb/nvic_ispr1.rs | 69 +- src/ppb/nvic_ispr2.rs | 69 +- src/ppb/nvic_ispr3.rs | 69 +- src/ppb/scr.rs | 151 +- src/ppb/shcsr.rs | 193 +- src/ppb/shpr1.rs | 61 +- src/ppb/shpr2.rs | 37 +- src/ppb/shpr3.rs | 49 +- src/ppb/stir.rs | 27 +- src/ppb/syst_calib.rs | 121 +- src/ppb/syst_csr.rs | 163 +- src/ppb/syst_cvr.rs | 37 +- src/ppb/syst_rvr.rs | 37 +- src/ppb/vtor.rs | 37 +- src/pref.rs | 9 +- src/pref/pcon.rs | 131 +- src/rtc.rs | 72 +- src/rtc/atim0.rs | 73 +- src/rtc/atim1.rs | 49 +- src/rtc/clrsr.rs | 63 +- src/rtc/ctr.rs | 133 +- src/rtc/id.rs | 28 +- src/rtc/msksr.rs | 109 +- src/rtc/rawstat.rs | 52 +- src/rtc/stssr.rs | 52 +- src/rtc/tim0.rs | 73 +- src/rtc/tim1.rs | 61 +- src/scu_clk.rs | 191 +- src/scu_clk/ccuclkcr.rs | 67 +- src/scu_clk/cgatclr0.rs | 263 +- src/scu_clk/cgatclr1.rs | 197 +- src/scu_clk/cgatclr2.rs | 175 +- src/scu_clk/cgatclr3.rs | 43 +- src/scu_clk/cgatset0.rs | 263 +- src/scu_clk/cgatset1.rs | 197 +- src/scu_clk/cgatset2.rs | 175 +- src/scu_clk/cgatset3.rs | 43 +- src/scu_clk/cgatstat0.rs | 340 +-- src/scu_clk/cgatstat1.rs | 250 +- src/scu_clk/cgatstat2.rs | 220 +- src/scu_clk/cgatstat3.rs | 40 +- src/scu_clk/clkclr.rs | 153 +- src/scu_clk/clkset.rs | 153 +- src/scu_clk/clkstat.rs | 190 +- src/scu_clk/cpuclkcr.rs | 67 +- src/scu_clk/dsleepcr.rs | 447 ++- src/scu_clk/ebuclkcr.rs | 37 +- src/scu_clk/ecatclkcr.rs | 79 +- src/scu_clk/extclkcr.rs | 89 +- src/scu_clk/mlinkclkcr.rs | 281 +- src/scu_clk/pbclkcr.rs | 67 +- src/scu_clk/sleepcr.rs | 319 +-- src/scu_clk/sysclkcr.rs | 79 +- src/scu_clk/usbclkcr.rs | 79 +- src/scu_clk/wdtclkcr.rs | 89 +- src/scu_general.rs | 107 +- src/scu_general/ccucon.rs | 277 +- src/scu_general/dtscon.rs | 137 +- src/scu_general/dtsstat.rs | 76 +- src/scu_general/g0orcen.rs | 109 +- src/scu_general/g1orcen.rs | 109 +- src/scu_general/gpr0.rs | 37 +- src/scu_general/gpr1.rs | 37 +- src/scu_general/id.rs | 28 +- src/scu_general/idchip.rs | 16 +- src/scu_general/idmanuf.rs | 22 +- src/scu_general/mirrsts.rs | 400 +-- src/scu_general/rmacr.rs | 79 +- src/scu_general/rmdata.rs | 37 +- src/scu_general/sdmmcdel.rs | 79 +- src/scu_general/stcon.rs | 161 +- src/scu_hibernate.rs | 51 +- src/scu_hibernate/hdclr.rs | 109 +- src/scu_hibernate/hdcr.rs | 703 +++-- src/scu_hibernate/hdset.rs | 109 +- src/scu_hibernate/hdstat.rs | 160 +- src/scu_hibernate/oscsictrl.rs | 67 +- src/scu_hibernate/osculctrl.rs | 127 +- src/scu_hibernate/osculstat.rs | 16 +- src/scu_interrupt.rs | 44 +- src/scu_interrupt/nmireqen.rs | 319 +-- src/scu_interrupt/srclr.rs | 351 ++- src/scu_interrupt/srmsk.rs | 655 +++-- src/scu_interrupt/srraw.rs | 388 +-- src/scu_interrupt/srset.rs | 351 ++- src/scu_interrupt/srstat.rs | 388 +-- src/scu_osc.rs | 23 +- src/scu_osc/clkcalconst.rs | 37 +- src/scu_osc/oschpctrl.rs | 241 +- src/scu_osc/oschpstat.rs | 16 +- src/scu_parity.rs | 51 +- src/scu_parity/mchkcon.rs | 613 ++-- src/scu_parity/peen.rs | 613 ++-- src/scu_parity/peflag.rs | 613 ++-- src/scu_parity/persten.rs | 67 +- src/scu_parity/pete.rs | 613 ++-- src/scu_parity/pmtpr.rs | 43 +- src/scu_parity/pmtsr.rs | 613 ++-- src/scu_pll.rs | 51 +- src/scu_pll/clkmxstat.rs | 42 +- src/scu_pll/pllcon0.rs | 409 ++- src/scu_pll/pllcon1.rs | 73 +- src/scu_pll/pllcon2.rs | 109 +- src/scu_pll/pllstat.rs | 280 +- src/scu_pll/usbpllcon.rs | 307 +- src/scu_pll/usbpllstat.rs | 160 +- src/scu_power.rs | 44 +- src/scu_power/evrstat.rs | 40 +- src/scu_power/evrvadcstat.rs | 22 +- src/scu_power/pwrclr.rs | 109 +- src/scu_power/pwrmon.rs | 61 +- src/scu_power/pwrset.rs | 109 +- src/scu_power/pwrstat.rs | 130 +- src/scu_reset.rs | 107 +- src/scu_reset/prclr0.rs | 263 +- src/scu_reset/prclr1.rs | 197 +- src/scu_reset/prclr2.rs | 175 +- src/scu_reset/prclr3.rs | 43 +- src/scu_reset/prset0.rs | 263 +- src/scu_reset/prset1.rs | 197 +- src/scu_reset/prset2.rs | 175 +- src/scu_reset/prset3.rs | 43 +- src/scu_reset/prstat0.rs | 340 +-- src/scu_reset/prstat1.rs | 250 +- src/scu_reset/prstat2.rs | 220 +- src/scu_reset/prstat3.rs | 40 +- src/scu_reset/rstclr.rs | 131 +- src/scu_reset/rstset.rs | 109 +- src/scu_reset/rststat.rs | 192 +- src/scu_trap.rs | 37 +- src/scu_trap/trapclr.rs | 219 +- src/scu_trap/trapdis.rs | 403 ++- src/scu_trap/trapraw.rs | 280 +- src/scu_trap/trapset.rs | 219 +- src/scu_trap/trapstat.rs | 280 +- src/sdmmc.rs | 226 +- src/sdmmc/acmd_err_status.rs | 190 +- src/sdmmc/argument1.rs | 37 +- src/sdmmc/block_count.rs | 37 +- src/sdmmc/block_gap_ctrl.rs | 163 +- src/sdmmc/block_size.rs | 49 +- src/sdmmc/capabilities.rs | 378 +-- src/sdmmc/capabilities_hi.rs | 256 +- src/sdmmc/clock_ctrl.rs | 239 +- src/sdmmc/command.rs | 283 +- src/sdmmc/data_buffer.rs | 37 +- src/sdmmc/debug_sel.rs | 43 +- src/sdmmc/en_int_signal_err.rs | 487 ++-- src/sdmmc/en_int_signal_norm.rs | 367 ++- src/sdmmc/en_int_status_err.rs | 487 ++-- src/sdmmc/en_int_status_norm.rs | 367 ++- src/sdmmc/force_event_acmd_err_status.rs | 153 +- src/sdmmc/force_event_err_status.rs | 263 +- src/sdmmc/host_ctrl.rs | 277 +- src/sdmmc/int_status_err.rs | 445 ++- src/sdmmc/int_status_norm.rs | 379 ++- src/sdmmc/max_current_cap.rs | 16 +- src/sdmmc/power_ctrl.rs | 115 +- src/sdmmc/present_state.rs | 334 +-- src/sdmmc/response0.rs | 22 +- src/sdmmc/response2.rs | 22 +- src/sdmmc/response4.rs | 22 +- src/sdmmc/response6.rs | 22 +- src/sdmmc/slot_int_status.rs | 36 +- src/sdmmc/sw_reset.rs | 121 +- src/sdmmc/timeout_ctrl.rs | 77 +- src/sdmmc/transfer_mode.rs | 237 +- src/sdmmc/wakeup_ctrl.rs | 151 +- src/sdmmc_con.rs | 9 +- src/sdmmc_con/sdmmc_con.rs | 193 +- src/usb0.rs | 297 +- src/usb0/daint.rs | 22 +- src/usb0/daintmsk.rs | 49 +- src/usb0/dcfg.rs | 239 +- src/usb0/dctl.rs | 319 +-- src/usb0/diepempmsk.rs | 37 +- src/usb0/diepmsk.rs | 133 +- src/usb0/dieptxf1.rs | 49 +- src/usb0/dieptxf2.rs | 49 +- src/usb0/dieptxf3.rs | 49 +- src/usb0/dieptxf4.rs | 49 +- src/usb0/dieptxf5.rs | 49 +- src/usb0/dieptxf6.rs | 49 +- src/usb0/doepmsk.rs | 157 +- src/usb0/dsts.rs | 54 +- src/usb0/dvbusdis.rs | 37 +- src/usb0/dvbuspulse.rs | 37 +- src/usb0/gahbcfg.rs | 303 +- src/usb0/gdfifocfg.rs | 49 +- src/usb0/gintmsk_devicemode.rs | 265 +- src/usb0/gintmsk_hostmode.rs | 169 +- src/usb0/gintsts_devicemode.rs | 247 +- src/usb0/gintsts_hostmode.rs | 169 +- src/usb0/gnptxfsiz_devicemode.rs | 49 +- src/usb0/gnptxfsiz_hostmode.rs | 49 +- src/usb0/gnptxsts.rs | 124 +- src/usb0/gotgctl.rs | 667 +++-- src/usb0/gotgint.rs | 97 +- src/usb0/grstctl.rs | 153 +- src/usb0/grxfsiz.rs | 37 +- src/usb0/grxstsp_devicemode.rs | 122 +- src/usb0/grxstsp_hostmode.rs | 110 +- src/usb0/grxstsr_devicemode.rs | 122 +- src/usb0/grxstsr_hostmode.rs | 110 +- src/usb0/guid.rs | 61 +- src/usb0/gusbcfg.rs | 329 ++- src/usb0/haint.rs | 16 +- src/usb0/haintmsk.rs | 37 +- src/usb0/hcfg.rs | 187 +- src/usb0/hfir.rs | 79 +- src/usb0/hflbaddr.rs | 37 +- src/usb0/hfnum.rs | 43 +- src/usb0/hprt.rs | 363 ++- src/usb0/hptxfsiz.rs | 49 +- src/usb0/hptxsts.rs | 121 +- src/usb0/pcgcctl.rs | 49 +- src/usb0_ch0.rs | 50 +- src/usb0_ch0/hcchar.rs | 311 +- src/usb0_ch0/hcdma_buffermode.rs | 37 +- src/usb0_ch0/hcdma_scatgather.rs | 81 +- src/usb0_ch0/hcdmab.rs | 16 +- src/usb0_ch0/hcint.rs | 193 +- src/usb0_ch0/hcintmsk.rs | 181 +- src/usb0_ch0/hctsiz_buffermode.rs | 109 +- src/usb0_ch0/hctsiz_scatgather.rs | 109 +- src/usb0_ep0.rs | 79 +- src/usb0_ep0/diepctl0.rs | 187 +- src/usb0_ep0/diepdma0.rs | 37 +- src/usb0_ep0/diepdmab0.rs | 16 +- src/usb0_ep0/diepint0.rs | 115 +- src/usb0_ep0/dieptsiz0.rs | 49 +- src/usb0_ep0/doepctl0.rs | 165 +- src/usb0_ep0/doepdma0.rs | 37 +- src/usb0_ep0/doepdmab0.rs | 16 +- src/usb0_ep0/doepint0.rs | 169 +- src/usb0_ep0/doeptsiz0.rs | 101 +- src/usb0_ep0/dtxfsts0.rs | 48 +- src/usb0_ep1.rs | 88 +- src/usb0_ep1/diepctl_intbulk.rs | 253 +- src/usb0_ep1/diepctl_isocont.rs | 253 +- src/usb0_ep1/diepdma.rs | 37 +- src/usb0_ep1/diepdmab.rs | 16 +- src/usb0_ep1/diepint.rs | 115 +- src/usb0_ep1/dieptsiz.rs | 49 +- src/usb0_ep1/doepctl_intbulk.rs | 253 +- src/usb0_ep1/doepctl_isocont.rs | 253 +- src/usb0_ep1/doepdma.rs | 37 +- src/usb0_ep1/doepdmab.rs | 16 +- src/usb0_ep1/doepint.rs | 169 +- src/usb0_ep1/doeptsiz_control.rs | 61 +- src/usb0_ep1/doeptsiz_iso.rs | 93 +- src/usb0_ep1/dtxfsts.rs | 48 +- src/usic0.rs | 9 +- src/usic0/id.rs | 28 +- src/usic0_ch0.rs | 294 +- src/usic0_ch0/brg.rs | 401 ++- src/usic0_ch0/byp.rs | 37 +- src/usic0_ch0/bypcr.rs | 277 +- src/usic0_ch0/ccfg.rs | 190 +- src/usic0_ch0/ccr.rs | 499 ++-- src/usic0_ch0/cmtr.rs | 37 +- src/usic0_ch0/dx0cr.rs | 417 ++- src/usic0_ch0/dx1cr.rs | 459 ++- src/usic0_ch0/dx2cr.rs | 417 ++- src/usic0_ch0/dx3cr.rs | 417 ++- src/usic0_ch0/dx4cr.rs | 417 ++- src/usic0_ch0/dx5cr.rs | 417 ++- src/usic0_ch0/fdr.rs | 103 +- src/usic0_ch0/fmr.rs | 247 +- src/usic0_ch0/in_.rs | 27 +- src/usic0_ch0/inpr.rs | 149 +- src/usic0_ch0/kscfg.rs | 205 +- src/usic0_ch0/outdr.rs | 22 +- src/usic0_ch0/outr.rs | 22 +- src/usic0_ch0/pcr.rs | 409 ++- src/usic0_ch0/pcr_ascmode.rs | 559 ++-- src/usic0_ch0/pcr_iicmode.rs | 553 ++-- src/usic0_ch0/pcr_iismode.rs | 373 ++- src/usic0_ch0/pcr_sscmode.rs | 573 ++-- src/usic0_ch0/pscr.rs | 395 ++- src/usic0_ch0/psr.rs | 439 ++- src/usic0_ch0/psr_ascmode.rs | 727 +++-- src/usic0_ch0/psr_iicmode.rs | 739 +++-- src/usic0_ch0/psr_iismode.rs | 571 ++-- src/usic0_ch0/psr_sscmode.rs | 529 ++-- src/usic0_ch0/rbctr.rs | 633 ++--- src/usic0_ch0/rbuf.rs | 16 +- src/usic0_ch0/rbuf0.rs | 16 +- src/usic0_ch0/rbuf01sr.rs | 360 +-- src/usic0_ch0/rbuf1.rs | 16 +- src/usic0_ch0/rbufd.rs | 16 +- src/usic0_ch0/rbufsr.rs | 52 +- src/usic0_ch0/sctr.rs | 379 ++- src/usic0_ch0/tbctr.rs | 489 ++-- src/usic0_ch0/tbuf.rs | 37 +- src/usic0_ch0/tcsr.rs | 655 +++-- src/usic0_ch0/trbptr.rs | 34 +- src/usic0_ch0/trbscr.rs | 197 +- src/usic0_ch0/trbsr.rs | 487 ++-- src/vadc.rs | 127 +- src/vadc/brsctrl.rs | 217 +- src/vadc/brsmr.rs | 369 ++- src/vadc/brspnd.rs | 361 ++- src/vadc/brssel.rs | 361 ++- src/vadc/clc.rs | 139 +- src/vadc/emuxsel.rs | 49 +- src/vadc/globbound.rs | 49 +- src/vadc/globcfg.rs | 399 ++- src/vadc/globeflag.rs | 153 +- src/vadc/globevnp.rs | 145 +- src/vadc/globiclass.rs | 169 +- src/vadc/globrcr.rs | 145 +- src/vadc/globres.rs | 133 +- src/vadc/globresd.rs | 133 +- src/vadc/globtf.rs | 225 +- src/vadc/id.rs | 28 +- src/vadc/ocs.rs | 213 +- src/vadc_g0.rs | 274 +- src/vadc_g0/alias.rs | 49 +- src/vadc_g0/arbcfg.rs | 261 +- src/vadc_g0/arbpr.rs | 409 ++- src/vadc_g0/asctrl.rs | 281 +- src/vadc_g0/asmr.rs | 369 ++- src/vadc_g0/aspnd.rs | 361 ++- src/vadc_g0/assel.rs | 361 ++- src/vadc_g0/bfl.rs | 481 ++-- src/vadc_g0/bflc.rs | 265 +- src/vadc_g0/bflnp.rs | 297 +- src/vadc_g0/bfls.rs | 197 +- src/vadc_g0/bound.rs | 49 +- src/vadc_g0/cefclr.rs | 197 +- src/vadc_g0/ceflag.rs | 361 ++- src/vadc_g0/cevnp0.rs | 505 ++-- src/vadc_g0/chass.rs | 361 ++- src/vadc_g0/chctr.rs | 563 ++-- src/vadc_g0/emuxctr.rs | 251 +- src/vadc_g0/iclass.rs | 169 +- src/vadc_g0/q0r0.rs | 136 +- src/vadc_g0/qbur0.rs | 64 +- src/vadc_g0/qctrl0.rs | 281 +- src/vadc_g0/qinr0.rs | 93 +- src/vadc_g0/qmr0.rs | 257 +- src/vadc_g0/qsr0.rs | 144 +- src/vadc_g0/rcr.rs | 217 +- src/vadc_g0/refclr.rs | 373 ++- src/vadc_g0/reflag.rs | 697 +++-- src/vadc_g0/res.rs | 153 +- src/vadc_g0/resd.rs | 132 +- src/vadc_g0/revnp0.rs | 505 ++-- src/vadc_g0/revnp1.rs | 505 ++-- src/vadc_g0/sefclr.rs | 65 +- src/vadc_g0/seflag.rs | 109 +- src/vadc_g0/sevnp.rs | 145 +- src/vadc_g0/sract.rs | 197 +- src/vadc_g0/synctr.rs | 211 +- src/vadc_g0/vfr.rs | 697 +++-- src/wdt.rs | 58 +- src/wdt/ctr.rs | 73 +- src/wdt/id.rs | 28 +- src/wdt/srv.rs | 27 +- src/wdt/tim.rs | 16 +- src/wdt/wdtclr.rs | 27 +- src/wdt/wdtsts.rs | 16 +- src/wdt/wlb.rs | 37 +- src/wdt/wub.rs | 37 +- 1174 files changed, 116749 insertions(+), 122432 deletions(-) diff --git a/src/can.rs b/src/can.rs index 9cc85d89..fd89f5bc 100644 --- a/src/can.rs +++ b/src/can.rs @@ -1,138 +1,148 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clc: CLC, + clc: Clc, _reserved1: [u8; 0x04], - id: ID, - fdr: FDR, + id: Id, + fdr: Fdr, _reserved3: [u8; 0xf0], - list: [LIST; 16], - mspnd: [MSPND; 8], + list: [List; 16], + mspnd: [Mspnd; 8], _reserved5: [u8; 0x20], - msid: [MSID; 8], + msid: [Msid; 8], _reserved6: [u8; 0x20], - msimask: MSIMASK, - panctr: PANCTR, - mcr: MCR, - mitr: MITR, + msimask: Msimask, + panctr: Panctr, + mcr: Mcr, + mitr: Mitr, } impl RegisterBlock { #[doc = "0x00 - CAN Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &CLC { + pub const fn clc(&self) -> &Clc { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x0c - CAN Fractional Divider Register"] #[inline(always)] - pub const fn fdr(&self) -> &FDR { + pub const fn fdr(&self) -> &Fdr { &self.fdr } #[doc = "0x100..0x140 - List Register"] #[inline(always)] - pub const fn list(&self, n: usize) -> &LIST { + pub const fn list(&self, n: usize) -> &List { &self.list[n] } #[doc = "Iterator for array of:"] #[doc = "0x100..0x140 - List Register"] #[inline(always)] - pub fn list_iter(&self) -> impl Iterator { + pub fn list_iter(&self) -> impl Iterator { self.list.iter() } #[doc = "0x140..0x160 - Message Pending Register"] #[inline(always)] - pub const fn mspnd(&self, n: usize) -> &MSPND { + pub const fn mspnd(&self, n: usize) -> &Mspnd { &self.mspnd[n] } #[doc = "Iterator for array of:"] #[doc = "0x140..0x160 - Message Pending Register"] #[inline(always)] - pub fn mspnd_iter(&self) -> impl Iterator { + pub fn mspnd_iter(&self) -> impl Iterator { self.mspnd.iter() } #[doc = "0x180..0x1a0 - Message Index Register"] #[inline(always)] - pub const fn msid(&self, n: usize) -> &MSID { + pub const fn msid(&self, n: usize) -> &Msid { &self.msid[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x1a0 - Message Index Register"] #[inline(always)] - pub fn msid_iter(&self) -> impl Iterator { + pub fn msid_iter(&self) -> impl Iterator { self.msid.iter() } #[doc = "0x1c0 - Message Index Mask Register"] #[inline(always)] - pub const fn msimask(&self) -> &MSIMASK { + pub const fn msimask(&self) -> &Msimask { &self.msimask } #[doc = "0x1c4 - Panel Control Register"] #[inline(always)] - pub const fn panctr(&self) -> &PANCTR { + pub const fn panctr(&self) -> &Panctr { &self.panctr } #[doc = "0x1c8 - Module Control Register"] #[inline(always)] - pub const fn mcr(&self) -> &MCR { + pub const fn mcr(&self) -> &Mcr { &self.mcr } #[doc = "0x1cc - Module Interrupt Trigger Register"] #[inline(always)] - pub const fn mitr(&self) -> &MITR { + pub const fn mitr(&self) -> &Mitr { &self.mitr } } #[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -pub type CLC = crate::Reg; +#[doc(alias = "CLC")] +pub type Clc = crate::Reg; #[doc = "CAN Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] -pub type FDR = crate::Reg; +#[doc(alias = "FDR")] +pub type Fdr = crate::Reg; #[doc = "CAN Fractional Divider Register"] pub mod fdr; #[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@list`] module"] -pub type LIST = crate::Reg; +#[doc(alias = "LIST")] +pub type List = crate::Reg; #[doc = "List Register"] pub mod list; #[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspnd`] module"] -pub type MSPND = crate::Reg; +#[doc(alias = "MSPND")] +pub type Mspnd = crate::Reg; #[doc = "Message Pending Register"] pub mod mspnd; #[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msid`] module"] -pub type MSID = crate::Reg; +#[doc(alias = "MSID")] +pub type Msid = crate::Reg; #[doc = "Message Index Register"] pub mod msid; #[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msimask`] module"] -pub type MSIMASK = crate::Reg; +#[doc(alias = "MSIMASK")] +pub type Msimask = crate::Reg; #[doc = "Message Index Mask Register"] pub mod msimask; #[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@panctr`] module"] -pub type PANCTR = crate::Reg; +#[doc(alias = "PANCTR")] +pub type Panctr = crate::Reg; #[doc = "Panel Control Register"] pub mod panctr; #[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcr`] module"] -pub type MCR = crate::Reg; +#[doc(alias = "MCR")] +pub type Mcr = crate::Reg; #[doc = "Module Control Register"] pub mod mcr; #[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mitr`] module"] -pub type MITR = crate::Reg; +#[doc(alias = "MITR")] +pub type Mitr = crate::Reg; #[doc = "Module Interrupt Trigger Register"] pub mod mitr; diff --git a/src/can/clc.rs b/src/can/clc.rs index aae3cb9b..d03254e5 100644 --- a/src/can/clc.rs +++ b/src/can/clc.rs @@ -1,71 +1,62 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DISR_R = crate::BitReader; +pub type DisrR = crate::BitReader; #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DISS_R = crate::BitReader; +pub type DissR = crate::BitReader; #[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] -pub type EDIS_R = crate::BitReader; +pub type EdisR = crate::BitReader; #[doc = "Field `EDIS` writer - Sleep Mode Enable Control"] -pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EdisW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DISR_R { - DISR_R::new((self.bits & 1) != 0) + pub fn disr(&self) -> DisrR { + DisrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DISS_R { - DISS_R::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DissR { + DissR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - pub fn edis(&self) -> EDIS_R { - EDIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn edis(&self) -> EdisR { + EdisR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DISR_W { - DISR_W::new(self, 0) + pub fn disr(&mut self) -> DisrW { + DisrW::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] #[must_use] - pub fn edis(&mut self) -> EDIS_W { - EDIS_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn edis(&mut self) -> EdisW { + EdisW::new(self, 3) } } #[doc = "CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLC_SPEC; -impl crate::RegisterSpec for CLC_SPEC { +pub struct ClcSpec; +impl crate::RegisterSpec for ClcSpec { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for CLC_SPEC {} +impl crate::Readable for ClcSpec {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for CLC_SPEC { +impl crate::Writable for ClcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for CLC_SPEC { +impl crate::Resettable for ClcSpec { const RESET_VALUE: u32 = 0x03; } diff --git a/src/can/fdr.rs b/src/can/fdr.rs index 15fe5fed..be51fc02 100644 --- a/src/can/fdr.rs +++ b/src/can/fdr.rs @@ -1,64 +1,55 @@ #[doc = "Register `FDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FDR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STEP` reader - Step Value"] -pub type STEP_R = crate::FieldReader; +pub type StepR = crate::FieldReader; #[doc = "Field `STEP` writer - Step Value"] -pub type STEP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type StepW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `DM` reader - Divider Mode"] -pub type DM_R = crate::FieldReader; +pub type DmR = crate::FieldReader; #[doc = "Field `DM` writer - Divider Mode"] -pub type DM_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type DmW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - pub fn step(&self) -> STEP_R { - STEP_R::new((self.bits & 0x03ff) as u16) + pub fn step(&self) -> StepR { + StepR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - pub fn dm(&self) -> DM_R { - DM_R::new(((self.bits >> 14) & 3) as u8) + pub fn dm(&self) -> DmR { + DmR::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] #[must_use] - pub fn step(&mut self) -> STEP_W { - STEP_W::new(self, 0) + pub fn step(&mut self) -> StepW { + StepW::new(self, 0) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] #[must_use] - pub fn dm(&mut self) -> DM_W { - DM_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dm(&mut self) -> DmW { + DmW::new(self, 14) } } #[doc = "CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FDR_SPEC; -impl crate::RegisterSpec for FDR_SPEC { +pub struct FdrSpec; +impl crate::RegisterSpec for FdrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fdr::R`](R) reader structure"] -impl crate::Readable for FDR_SPEC {} +impl crate::Readable for FdrSpec {} #[doc = "`write(|w| ..)` method takes [`fdr::W`](W) writer structure"] -impl crate::Writable for FDR_SPEC { +impl crate::Writable for FdrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FDR to value 0"] -impl crate::Resettable for FDR_SPEC { +impl crate::Resettable for FdrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/id.rs b/src/can/id.rs index 83b83cd4..67f98c35 100644 --- a/src/can/id.rs +++ b/src/can/id.rs @@ -1,67 +1,67 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; -#[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Module Type\n\nValue on reset: 192"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MOD_TYPE_A { +pub enum ModType { #[doc = "192: Define the module as a 32-bit module."] - VALUE1 = 192, + Value1 = 192, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MOD_TYPE_A) -> Self { + fn from(variant: ModType) -> Self { variant as _ } } -impl crate::FieldSpec for MOD_TYPE_A { +impl crate::FieldSpec for ModType { type Ux = u8; } -impl MOD_TYPE_R { +#[doc = "Field `MOD_TYPE` reader - Module Type"] +pub type ModTypeR = crate::FieldReader; +impl ModTypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 192 => Some(MOD_TYPE_A::VALUE1), + 192 => Some(ModType::Value1), _ => None, } } #[doc = "Define the module as a 32-bit module."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MOD_TYPE_A::VALUE1 + *self == ModType::Value1 } } #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00b5_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00b5_c000; } diff --git a/src/can/list.rs b/src/can/list.rs index ed3c6750..7fc305c6 100644 --- a/src/can/list.rs +++ b/src/can/list.rs @@ -1,78 +1,78 @@ #[doc = "Register `LIST[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `BEGIN` reader - List Begin"] -pub type BEGIN_R = crate::FieldReader; +pub type BeginR = crate::FieldReader; #[doc = "Field `END` reader - List End"] -pub type END_R = crate::FieldReader; +pub type EndR = crate::FieldReader; #[doc = "Field `SIZE` reader - List Size"] -pub type SIZE_R = crate::FieldReader; -#[doc = "Field `EMPTY` reader - List Empty Indication"] -pub type EMPTY_R = crate::BitReader; +pub type SizeR = crate::FieldReader; #[doc = "List Empty Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMPTY_A { +pub enum Empty { #[doc = "0: At least one message object is allocated to list i."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No message object is allocated to the list i. List i is empty."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMPTY_A) -> Self { + fn from(variant: Empty) -> Self { variant as u8 != 0 } } -impl EMPTY_R { +#[doc = "Field `EMPTY` reader - List Empty Indication"] +pub type EmptyR = crate::BitReader; +impl EmptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMPTY_A { + pub const fn variant(&self) -> Empty { match self.bits { - false => EMPTY_A::VALUE1, - true => EMPTY_A::VALUE2, + false => Empty::Value1, + true => Empty::Value2, } } #[doc = "At least one message object is allocated to list i."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMPTY_A::VALUE1 + *self == Empty::Value1 } #[doc = "No message object is allocated to the list i. List i is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMPTY_A::VALUE2 + *self == Empty::Value2 } } impl R { #[doc = "Bits 0:7 - List Begin"] #[inline(always)] - pub fn begin(&self) -> BEGIN_R { - BEGIN_R::new((self.bits & 0xff) as u8) + pub fn begin(&self) -> BeginR { + BeginR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - List End"] #[inline(always)] - pub fn end(&self) -> END_R { - END_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn end(&self) -> EndR { + EndR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - List Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - List Empty Indication"] #[inline(always)] - pub fn empty(&self) -> EMPTY_R { - EMPTY_R::new(((self.bits >> 24) & 1) != 0) + pub fn empty(&self) -> EmptyR { + EmptyR::new(((self.bits >> 24) & 1) != 0) } } #[doc = "List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LIST_SPEC; -impl crate::RegisterSpec for LIST_SPEC { +pub struct ListSpec; +impl crate::RegisterSpec for ListSpec { type Ux = u32; } #[doc = "`read()` method returns [`list::R`](R) reader structure"] -impl crate::Readable for LIST_SPEC {} +impl crate::Readable for ListSpec {} #[doc = "`reset()` method sets LIST[%s] to value 0"] -impl crate::Resettable for LIST_SPEC { +impl crate::Resettable for ListSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mcr.rs b/src/can/mcr.rs index 62a45bd8..9c5b56e8 100644 --- a/src/can/mcr.rs +++ b/src/can/mcr.rs @@ -1,75 +1,75 @@ #[doc = "Register `MCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCR` writer"] -pub type W = crate::W; -#[doc = "Field `CLKSEL` reader - Baud Rate Logic Clock Select"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Baud Rate Logic Clock Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: No clock supplied"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPERIPH"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fOHP"] - VALUE3 = 2, + Value3 = 2, #[doc = "4: hard wired to 0"] - VALUE4 = 4, + Value4 = 4, #[doc = "8: hard wired to 0"] - VALUE5 = 8, + Value5 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl crate::FieldSpec for CLKSEL_A { +impl crate::FieldSpec for Clksel { type Ux = u8; } -impl CLKSEL_R { +#[doc = "Field `CLKSEL` reader - Baud Rate Logic Clock Select"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::VALUE1), - 1 => Some(CLKSEL_A::VALUE2), - 2 => Some(CLKSEL_A::VALUE3), - 4 => Some(CLKSEL_A::VALUE4), - 8 => Some(CLKSEL_A::VALUE5), + 0 => Some(Clksel::Value1), + 1 => Some(Clksel::Value2), + 2 => Some(Clksel::Value3), + 4 => Some(Clksel::Value4), + 8 => Some(Clksel::Value5), _ => None, } } #[doc = "No clock supplied"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKSEL_A::VALUE1 + *self == Clksel::Value1 } #[doc = "fPERIPH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKSEL_A::VALUE2 + *self == Clksel::Value2 } #[doc = "fOHP"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLKSEL_A::VALUE3 + *self == Clksel::Value3 } #[doc = "hard wired to 0"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLKSEL_A::VALUE4 + *self == Clksel::Value4 } #[doc = "hard wired to 0"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == CLKSEL_A::VALUE5 + *self == Clksel::Value5 } } #[doc = "Field `CLKSEL` writer - Baud Rate Logic Clock Select"] -pub type CLKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CLKSEL_A>; -impl<'a, REG> CLKSEL_W<'a, REG> +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 4, Clksel>; +impl<'a, REG> ClkselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,82 +77,73 @@ where #[doc = "No clock supplied"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE1) + self.variant(Clksel::Value1) } #[doc = "fPERIPH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE2) + self.variant(Clksel::Value2) } #[doc = "fOHP"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE3) + self.variant(Clksel::Value3) } #[doc = "hard wired to 0"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE4) + self.variant(Clksel::Value4) } #[doc = "hard wired to 0"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE5) + self.variant(Clksel::Value5) } } #[doc = "Field `MPSEL` reader - Message Pending Selector"] -pub type MPSEL_R = crate::FieldReader; +pub type MpselR = crate::FieldReader; #[doc = "Field `MPSEL` writer - Message Pending Selector"] -pub type MPSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type MpselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Baud Rate Logic Clock Select"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 0x0f) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 12:15 - Message Pending Selector"] #[inline(always)] - pub fn mpsel(&self) -> MPSEL_R { - MPSEL_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mpsel(&self) -> MpselR { + MpselR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Baud Rate Logic Clock Select"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W { - CLKSEL_W::new(self, 0) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } #[doc = "Bits 12:15 - Message Pending Selector"] #[inline(always)] #[must_use] - pub fn mpsel(&mut self) -> MPSEL_W { - MPSEL_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mpsel(&mut self) -> MpselW { + MpselW::new(self, 12) } } #[doc = "Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCR_SPEC; -impl crate::RegisterSpec for MCR_SPEC { +pub struct McrSpec; +impl crate::RegisterSpec for McrSpec { type Ux = u32; } #[doc = "`read()` method returns [`mcr::R`](R) reader structure"] -impl crate::Readable for MCR_SPEC {} +impl crate::Readable for McrSpec {} #[doc = "`write(|w| ..)` method takes [`mcr::W`](W) writer structure"] -impl crate::Writable for MCR_SPEC { +impl crate::Writable for McrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCR to value 0"] -impl crate::Resettable for MCR_SPEC { +impl crate::Resettable for McrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mitr.rs b/src/can/mitr.rs index f83fa763..905a3116 100644 --- a/src/can/mitr.rs +++ b/src/can/mitr.rs @@ -1,36 +1,27 @@ #[doc = "Register `MITR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IT` writer - Interrupt Trigger"] -pub type IT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type ItW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Interrupt Trigger"] #[inline(always)] #[must_use] - pub fn it(&mut self) -> IT_W { - IT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn it(&mut self) -> ItW { + ItW::new(self, 0) } } #[doc = "Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MITR_SPEC; -impl crate::RegisterSpec for MITR_SPEC { +pub struct MitrSpec; +impl crate::RegisterSpec for MitrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mitr::W`](W) writer structure"] -impl crate::Writable for MITR_SPEC { +impl crate::Writable for MitrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MITR to value 0"] -impl crate::Resettable for MITR_SPEC { +impl crate::Resettable for MitrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/msid.rs b/src/can/msid.rs index bae28d51..e8d5786a 100644 --- a/src/can/msid.rs +++ b/src/can/msid.rs @@ -1,23 +1,23 @@ #[doc = "Register `MSID[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `INDEX` reader - Message Pending Index"] -pub type INDEX_R = crate::FieldReader; +pub type IndexR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Message Pending Index"] #[inline(always)] - pub fn index(&self) -> INDEX_R { - INDEX_R::new((self.bits & 0x3f) as u8) + pub fn index(&self) -> IndexR { + IndexR::new((self.bits & 0x3f) as u8) } } #[doc = "Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MSID_SPEC; -impl crate::RegisterSpec for MSID_SPEC { +pub struct MsidSpec; +impl crate::RegisterSpec for MsidSpec { type Ux = u32; } #[doc = "`read()` method returns [`msid::R`](R) reader structure"] -impl crate::Readable for MSID_SPEC {} +impl crate::Readable for MsidSpec {} #[doc = "`reset()` method sets MSID[%s] to value 0x20"] -impl crate::Resettable for MSID_SPEC { +impl crate::Resettable for MsidSpec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/can/msimask.rs b/src/can/msimask.rs index 5725b3fd..ffbe739a 100644 --- a/src/can/msimask.rs +++ b/src/can/msimask.rs @@ -1,49 +1,40 @@ #[doc = "Register `MSIMASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSIMASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IM` reader - Message Index Mask"] -pub type IM_R = crate::FieldReader; +pub type ImR = crate::FieldReader; #[doc = "Field `IM` writer - Message Index Mask"] -pub type IM_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type ImW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Message Index Mask"] #[inline(always)] - pub fn im(&self) -> IM_R { - IM_R::new(self.bits) + pub fn im(&self) -> ImR { + ImR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Message Index Mask"] #[inline(always)] #[must_use] - pub fn im(&mut self) -> IM_W { - IM_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn im(&mut self) -> ImW { + ImW::new(self, 0) } } #[doc = "Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MSIMASK_SPEC; -impl crate::RegisterSpec for MSIMASK_SPEC { +pub struct MsimaskSpec; +impl crate::RegisterSpec for MsimaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`msimask::R`](R) reader structure"] -impl crate::Readable for MSIMASK_SPEC {} +impl crate::Readable for MsimaskSpec {} #[doc = "`write(|w| ..)` method takes [`msimask::W`](W) writer structure"] -impl crate::Writable for MSIMASK_SPEC { +impl crate::Writable for MsimaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSIMASK to value 0"] -impl crate::Resettable for MSIMASK_SPEC { +impl crate::Resettable for MsimaskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mspnd.rs b/src/can/mspnd.rs index d777c6cf..f04dc7fb 100644 --- a/src/can/mspnd.rs +++ b/src/can/mspnd.rs @@ -1,50 +1,41 @@ #[doc = "Register `MSPND[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSPND[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PND` reader - Message Pending"] -pub type PND_R = crate::FieldReader; +pub type PndR = crate::FieldReader; #[doc = "Field `PND` writer - Message Pending"] -pub type PND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type PndW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Message Pending"] #[inline(always)] - pub fn pnd(&self) -> PND_R { - PND_R::new(self.bits) + pub fn pnd(&self) -> PndR { + PndR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Message Pending"] #[inline(always)] #[must_use] - pub fn pnd(&mut self) -> PND_W { - PND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pnd(&mut self) -> PndW { + PndW::new(self, 0) } } #[doc = "Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MSPND_SPEC; -impl crate::RegisterSpec for MSPND_SPEC { +pub struct MspndSpec; +impl crate::RegisterSpec for MspndSpec { type Ux = u32; } #[doc = "`read()` method returns [`mspnd::R`](R) reader structure"] -impl crate::Readable for MSPND_SPEC {} +impl crate::Readable for MspndSpec {} #[doc = "`write(|w| ..)` method takes [`mspnd::W`](W) writer structure"] -impl crate::Writable for MSPND_SPEC { +impl crate::Writable for MspndSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSPND[%s] to value 0"] -impl crate::Resettable for MSPND_SPEC { +impl crate::Resettable for MspndSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can/panctr.rs b/src/can/panctr.rs index 78f7787f..c7f35747 100644 --- a/src/can/panctr.rs +++ b/src/can/panctr.rs @@ -1,161 +1,152 @@ #[doc = "Register `PANCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PANCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PANCMD` reader - Panel Command"] -pub type PANCMD_R = crate::FieldReader; +pub type PancmdR = crate::FieldReader; #[doc = "Field `PANCMD` writer - Panel Command"] -pub type PANCMD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `BUSY` reader - Panel Busy Flag"] -pub type BUSY_R = crate::BitReader; +pub type PancmdW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Panel Busy Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: Panel has finished command and is ready to accept a new command."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Panel operation is in progress."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Panel Busy Flag"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "Panel has finished command and is ready to accept a new command."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "Panel operation is in progress."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } -#[doc = "Field `RBUSY` reader - Result Busy Flag"] -pub type RBUSY_R = crate::BitReader; #[doc = "Result Busy Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RBUSY_A { +pub enum Rbusy { #[doc = "0: No update of PANAR1 and PANAR2 is scheduled by the list controller."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A list command is running (BUSY = 1) that will write results to PANAR1 and PANAR2, but the results are not yet available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RBUSY_A) -> Self { + fn from(variant: Rbusy) -> Self { variant as u8 != 0 } } -impl RBUSY_R { +#[doc = "Field `RBUSY` reader - Result Busy Flag"] +pub type RbusyR = crate::BitReader; +impl RbusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RBUSY_A { + pub const fn variant(&self) -> Rbusy { match self.bits { - false => RBUSY_A::VALUE1, - true => RBUSY_A::VALUE2, + false => Rbusy::Value1, + true => Rbusy::Value2, } } #[doc = "No update of PANAR1 and PANAR2 is scheduled by the list controller."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RBUSY_A::VALUE1 + *self == Rbusy::Value1 } #[doc = "A list command is running (BUSY = 1) that will write results to PANAR1 and PANAR2, but the results are not yet available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RBUSY_A::VALUE2 + *self == Rbusy::Value2 } } #[doc = "Field `PANAR1` reader - Panel Argument 1"] -pub type PANAR1_R = crate::FieldReader; +pub type Panar1R = crate::FieldReader; #[doc = "Field `PANAR1` writer - Panel Argument 1"] -pub type PANAR1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Panar1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PANAR2` reader - Panel Argument 2"] -pub type PANAR2_R = crate::FieldReader; +pub type Panar2R = crate::FieldReader; #[doc = "Field `PANAR2` writer - Panel Argument 2"] -pub type PANAR2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Panar2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Panel Command"] #[inline(always)] - pub fn pancmd(&self) -> PANCMD_R { - PANCMD_R::new((self.bits & 0xff) as u8) + pub fn pancmd(&self) -> PancmdR { + PancmdR::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - Panel Busy Flag"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 8) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Result Busy Flag"] #[inline(always)] - pub fn rbusy(&self) -> RBUSY_R { - RBUSY_R::new(((self.bits >> 9) & 1) != 0) + pub fn rbusy(&self) -> RbusyR { + RbusyR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 16:23 - Panel Argument 1"] #[inline(always)] - pub fn panar1(&self) -> PANAR1_R { - PANAR1_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn panar1(&self) -> Panar1R { + Panar1R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Panel Argument 2"] #[inline(always)] - pub fn panar2(&self) -> PANAR2_R { - PANAR2_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn panar2(&self) -> Panar2R { + Panar2R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Panel Command"] #[inline(always)] #[must_use] - pub fn pancmd(&mut self) -> PANCMD_W { - PANCMD_W::new(self, 0) + pub fn pancmd(&mut self) -> PancmdW { + PancmdW::new(self, 0) } #[doc = "Bits 16:23 - Panel Argument 1"] #[inline(always)] #[must_use] - pub fn panar1(&mut self) -> PANAR1_W { - PANAR1_W::new(self, 16) + pub fn panar1(&mut self) -> Panar1W { + Panar1W::new(self, 16) } #[doc = "Bits 24:31 - Panel Argument 2"] #[inline(always)] #[must_use] - pub fn panar2(&mut self) -> PANAR2_W { - PANAR2_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn panar2(&mut self) -> Panar2W { + Panar2W::new(self, 24) } } #[doc = "Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PANCTR_SPEC; -impl crate::RegisterSpec for PANCTR_SPEC { +pub struct PanctrSpec; +impl crate::RegisterSpec for PanctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`panctr::R`](R) reader structure"] -impl crate::Readable for PANCTR_SPEC {} +impl crate::Readable for PanctrSpec {} #[doc = "`write(|w| ..)` method takes [`panctr::W`](W) writer structure"] -impl crate::Writable for PANCTR_SPEC { +impl crate::Writable for PanctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PANCTR to value 0x0301"] -impl crate::Resettable for PANCTR_SPEC { +impl crate::Resettable for PanctrSpec { const RESET_VALUE: u32 = 0x0301; } diff --git a/src/can_mo.rs b/src/can_mo.rs index 0affd632..ef743d01 100644 --- a/src/can_mo.rs +++ b/src/can_mo.rs @@ -1,23 +1,23 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - mo: [MO; 256], + mo: [Mo; 256], } impl RegisterBlock { #[doc = "0x00..0x2000 - Message Object Registers"] #[inline(always)] - pub const fn mo(&self, n: usize) -> &MO { + pub const fn mo(&self, n: usize) -> &Mo { &self.mo[n] } #[doc = "Iterator for array of:"] #[doc = "0x00..0x2000 - Message Object Registers"] #[inline(always)] - pub fn mo_iter(&self) -> impl Iterator { + pub fn mo_iter(&self) -> impl Iterator { self.mo.iter() } } #[doc = "Message Object Registers"] -pub use self::mo::MO; +pub use self::mo::Mo; #[doc = r"Cluster"] #[doc = "Message Object Registers"] pub mod mo; diff --git a/src/can_mo/mo.rs b/src/can_mo/mo.rs index 95d39075..45c65090 100644 --- a/src/can_mo/mo.rs +++ b/src/can_mo/mo.rs @@ -1,104 +1,114 @@ -#[doc = r"Register block"] #[repr(C)] -pub struct MO { - mofcr: MOFCR, - mofgpr: MOFGPR, - moipr: MOIPR, - moamr: MOAMR, - modatal: MODATAL, - modatah: MODATAH, - moar: MOAR, +#[doc = "Message Object Registers"] +#[doc(alias = "MO")] +pub struct Mo { + mofcr: Mofcr, + mofgpr: Mofgpr, + moipr: Moipr, + moamr: Moamr, + modatal: Modatal, + modatah: Modatah, + moar: Moar, _reserved_7_moctr: [u8; 0x04], } -impl MO { +impl Mo { #[doc = "0x00 - Message Object Function Control Register"] #[inline(always)] - pub const fn mofcr(&self) -> &MOFCR { + pub const fn mofcr(&self) -> &Mofcr { &self.mofcr } #[doc = "0x04 - Message Object FIFO/Gateway Pointer Register"] #[inline(always)] - pub const fn mofgpr(&self) -> &MOFGPR { + pub const fn mofgpr(&self) -> &Mofgpr { &self.mofgpr } #[doc = "0x08 - Message Object Interrupt Pointer Register"] #[inline(always)] - pub const fn moipr(&self) -> &MOIPR { + pub const fn moipr(&self) -> &Moipr { &self.moipr } #[doc = "0x0c - Message Object Acceptance Mask Register"] #[inline(always)] - pub const fn moamr(&self) -> &MOAMR { + pub const fn moamr(&self) -> &Moamr { &self.moamr } #[doc = "0x10 - Message Object Data Register Low"] #[inline(always)] - pub const fn modatal(&self) -> &MODATAL { + pub const fn modatal(&self) -> &Modatal { &self.modatal } #[doc = "0x14 - Message Object Data Register High"] #[inline(always)] - pub const fn modatah(&self) -> &MODATAH { + pub const fn modatah(&self) -> &Modatah { &self.modatah } #[doc = "0x18 - Message Object Arbitration Register"] #[inline(always)] - pub const fn moar(&self) -> &MOAR { + pub const fn moar(&self) -> &Moar { &self.moar } #[doc = "0x1c - Message Object Status Register"] #[inline(always)] - pub const fn mostat(&self) -> &MOSTAT { + pub const fn mostat(&self) -> &Mostat { unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - Message Object Control Register"] #[inline(always)] - pub const fn moctr(&self) -> &MOCTR { + pub const fn moctr(&self) -> &Moctr { unsafe { &*(self as *const Self).cast::().add(28).cast() } } } #[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`] module"] -pub type MOFCR = crate::Reg; +#[doc(alias = "MOFCR")] +pub type Mofcr = crate::Reg; #[doc = "Message Object Function Control Register"] pub mod mofcr; #[doc = "MOFGPR (rw) register accessor: Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofgpr`] module"] -pub type MOFGPR = crate::Reg; +#[doc(alias = "MOFGPR")] +pub type Mofgpr = crate::Reg; #[doc = "Message Object FIFO/Gateway Pointer Register"] pub mod mofgpr; #[doc = "MOIPR (rw) register accessor: Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moipr`] module"] -pub type MOIPR = crate::Reg; +#[doc(alias = "MOIPR")] +pub type Moipr = crate::Reg; #[doc = "Message Object Interrupt Pointer Register"] pub mod moipr; #[doc = "MOAMR (rw) register accessor: Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moamr`] module"] -pub type MOAMR = crate::Reg; +#[doc(alias = "MOAMR")] +pub type Moamr = crate::Reg; #[doc = "Message Object Acceptance Mask Register"] pub mod moamr; #[doc = "MODATAL (rw) register accessor: Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatal`] module"] -pub type MODATAL = crate::Reg; +#[doc(alias = "MODATAL")] +pub type Modatal = crate::Reg; #[doc = "Message Object Data Register Low"] pub mod modatal; #[doc = "MODATAH (rw) register accessor: Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatah`] module"] -pub type MODATAH = crate::Reg; +#[doc(alias = "MODATAH")] +pub type Modatah = crate::Reg; #[doc = "Message Object Data Register High"] pub mod modatah; #[doc = "MOAR (rw) register accessor: Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moar`] module"] -pub type MOAR = crate::Reg; +#[doc(alias = "MOAR")] +pub type Moar = crate::Reg; #[doc = "Message Object Arbitration Register"] pub mod moar; #[doc = "MOCTR (w) register accessor: Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moctr`] module"] -pub type MOCTR = crate::Reg; +#[doc(alias = "MOCTR")] +pub type Moctr = crate::Reg; #[doc = "Message Object Control Register"] pub mod moctr; #[doc = "MOSTAT (r) register accessor: Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mostat`] module"] -pub type MOSTAT = crate::Reg; +#[doc(alias = "MOSTAT")] +pub type Mostat = crate::Reg; #[doc = "Message Object Status Register"] pub mod mostat; diff --git a/src/can_mo/mo/moamr.rs b/src/can_mo/mo/moamr.rs index e560f526..24d00913 100644 --- a/src/can_mo/mo/moamr.rs +++ b/src/can_mo/mo/moamr.rs @@ -1,113 +1,104 @@ #[doc = "Register `MOAMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOAMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AM` reader - Acceptance Mask for Message Identifier"] -pub type AM_R = crate::FieldReader; +pub type AmR = crate::FieldReader; #[doc = "Field `AM` writer - Acceptance Mask for Message Identifier"] -pub type AM_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; -#[doc = "Field `MIDE` reader - Acceptance Mask Bit for Message IDE Bit"] -pub type MIDE_R = crate::BitReader; +pub type AmW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; #[doc = "Acceptance Mask Bit for Message IDE Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIDE_A { +pub enum Mide { #[doc = "0: Message object n accepts the reception of both, standard and extended frames."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n receives frames only with matching IDE bit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIDE_A) -> Self { + fn from(variant: Mide) -> Self { variant as u8 != 0 } } -impl MIDE_R { +#[doc = "Field `MIDE` reader - Acceptance Mask Bit for Message IDE Bit"] +pub type MideR = crate::BitReader; +impl MideR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIDE_A { + pub const fn variant(&self) -> Mide { match self.bits { - false => MIDE_A::VALUE1, - true => MIDE_A::VALUE2, + false => Mide::Value1, + true => Mide::Value2, } } #[doc = "Message object n accepts the reception of both, standard and extended frames."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIDE_A::VALUE1 + *self == Mide::Value1 } #[doc = "Message object n receives frames only with matching IDE bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIDE_A::VALUE2 + *self == Mide::Value2 } } #[doc = "Field `MIDE` writer - Acceptance Mask Bit for Message IDE Bit"] -pub type MIDE_W<'a, REG> = crate::BitWriter<'a, REG, MIDE_A>; -impl<'a, REG> MIDE_W<'a, REG> +pub type MideW<'a, REG> = crate::BitWriter<'a, REG, Mide>; +impl<'a, REG> MideW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message object n accepts the reception of both, standard and extended frames."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MIDE_A::VALUE1) + self.variant(Mide::Value1) } #[doc = "Message object n receives frames only with matching IDE bit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MIDE_A::VALUE2) + self.variant(Mide::Value2) } } impl R { #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"] #[inline(always)] - pub fn am(&self) -> AM_R { - AM_R::new(self.bits & 0x1fff_ffff) + pub fn am(&self) -> AmR { + AmR::new(self.bits & 0x1fff_ffff) } #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"] #[inline(always)] - pub fn mide(&self) -> MIDE_R { - MIDE_R::new(((self.bits >> 29) & 1) != 0) + pub fn mide(&self) -> MideR { + MideR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"] #[inline(always)] #[must_use] - pub fn am(&mut self) -> AM_W { - AM_W::new(self, 0) + pub fn am(&mut self) -> AmW { + AmW::new(self, 0) } #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"] #[inline(always)] #[must_use] - pub fn mide(&mut self) -> MIDE_W { - MIDE_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mide(&mut self) -> MideW { + MideW::new(self, 29) } } #[doc = "Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOAMR_SPEC; -impl crate::RegisterSpec for MOAMR_SPEC { +pub struct MoamrSpec; +impl crate::RegisterSpec for MoamrSpec { type Ux = u32; } #[doc = "`read()` method returns [`moamr::R`](R) reader structure"] -impl crate::Readable for MOAMR_SPEC {} +impl crate::Readable for MoamrSpec {} #[doc = "`write(|w| ..)` method takes [`moamr::W`](W) writer structure"] -impl crate::Writable for MOAMR_SPEC { +impl crate::Writable for MoamrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOAMR to value 0x3fff_ffff"] -impl crate::Resettable for MOAMR_SPEC { +impl crate::Resettable for MoamrSpec { const RESET_VALUE: u32 = 0x3fff_ffff; } diff --git a/src/can_mo/mo/moar.rs b/src/can_mo/mo/moar.rs index 7f7bbad3..12358f3b 100644 --- a/src/can_mo/mo/moar.rs +++ b/src/can_mo/mo/moar.rs @@ -1,116 +1,116 @@ #[doc = "Register `MOAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ID` reader - CAN Identifier of Message Object n"] -pub type ID_R = crate::FieldReader; +pub type IdR = crate::FieldReader; #[doc = "Field `ID` writer - CAN Identifier of Message Object n"] -pub type ID_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; -#[doc = "Field `IDE` reader - Identifier Extension Bit of Message Object n"] -pub type IDE_R = crate::BitReader; +pub type IdW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; #[doc = "Identifier Extension Bit of Message Object n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IDE_A { +pub enum Ide { #[doc = "0: Message object n handles standard frames with 11-bit identifier."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n handles extended frames with 29-bit identifier."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IDE_A) -> Self { + fn from(variant: Ide) -> Self { variant as u8 != 0 } } -impl IDE_R { +#[doc = "Field `IDE` reader - Identifier Extension Bit of Message Object n"] +pub type IdeR = crate::BitReader; +impl IdeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IDE_A { + pub const fn variant(&self) -> Ide { match self.bits { - false => IDE_A::VALUE1, - true => IDE_A::VALUE2, + false => Ide::Value1, + true => Ide::Value2, } } #[doc = "Message object n handles standard frames with 11-bit identifier."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IDE_A::VALUE1 + *self == Ide::Value1 } #[doc = "Message object n handles extended frames with 29-bit identifier."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IDE_A::VALUE2 + *self == Ide::Value2 } } #[doc = "Field `IDE` writer - Identifier Extension Bit of Message Object n"] -pub type IDE_W<'a, REG> = crate::BitWriter<'a, REG, IDE_A>; -impl<'a, REG> IDE_W<'a, REG> +pub type IdeW<'a, REG> = crate::BitWriter<'a, REG, Ide>; +impl<'a, REG> IdeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message object n handles standard frames with 11-bit identifier."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IDE_A::VALUE1) + self.variant(Ide::Value1) } #[doc = "Message object n handles extended frames with 29-bit identifier."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IDE_A::VALUE2) + self.variant(Ide::Value2) } } -#[doc = "Field `PRI` reader - Priority Class"] -pub type PRI_R = crate::FieldReader; #[doc = "Priority Class\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRI_A { +pub enum Pri { #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Transmit acceptance filtering is based on the list order (as PRI = 01B)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRI_A) -> Self { + fn from(variant: Pri) -> Self { variant as _ } } -impl crate::FieldSpec for PRI_A { +impl crate::FieldSpec for Pri { type Ux = u8; } -impl PRI_R { +#[doc = "Field `PRI` reader - Priority Class"] +pub type PriR = crate::FieldReader; +impl PriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PRI_A::VALUE2), - 2 => Some(PRI_A::VALUE3), - 3 => Some(PRI_A::VALUE4), + 1 => Some(Pri::Value2), + 2 => Some(Pri::Value3), + 3 => Some(Pri::Value4), _ => None, } } #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRI_A::VALUE2 + *self == Pri::Value2 } #[doc = "Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PRI_A::VALUE3 + *self == Pri::Value3 } #[doc = "Transmit acceptance filtering is based on the list order (as PRI = 01B)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PRI_A::VALUE4 + *self == Pri::Value4 } } #[doc = "Field `PRI` writer - Priority Class"] -pub type PRI_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRI_A>; -impl<'a, REG> PRI_W<'a, REG> +pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pri>; +impl<'a, REG> PriW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -118,79 +118,70 @@ where #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRI_A::VALUE2) + self.variant(Pri::Value2) } #[doc = "Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PRI_A::VALUE3) + self.variant(Pri::Value3) } #[doc = "Transmit acceptance filtering is based on the list order (as PRI = 01B)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PRI_A::VALUE4) + self.variant(Pri::Value4) } } impl R { #[doc = "Bits 0:28 - CAN Identifier of Message Object n"] #[inline(always)] - pub fn id(&self) -> ID_R { - ID_R::new(self.bits & 0x1fff_ffff) + pub fn id(&self) -> IdR { + IdR::new(self.bits & 0x1fff_ffff) } #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"] #[inline(always)] - pub fn ide(&self) -> IDE_R { - IDE_R::new(((self.bits >> 29) & 1) != 0) + pub fn ide(&self) -> IdeR { + IdeR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bits 30:31 - Priority Class"] #[inline(always)] - pub fn pri(&self) -> PRI_R { - PRI_R::new(((self.bits >> 30) & 3) as u8) + pub fn pri(&self) -> PriR { + PriR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:28 - CAN Identifier of Message Object n"] #[inline(always)] #[must_use] - pub fn id(&mut self) -> ID_W { - ID_W::new(self, 0) + pub fn id(&mut self) -> IdW { + IdW::new(self, 0) } #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"] #[inline(always)] #[must_use] - pub fn ide(&mut self) -> IDE_W { - IDE_W::new(self, 29) + pub fn ide(&mut self) -> IdeW { + IdeW::new(self, 29) } #[doc = "Bits 30:31 - Priority Class"] #[inline(always)] #[must_use] - pub fn pri(&mut self) -> PRI_W { - PRI_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri(&mut self) -> PriW { + PriW::new(self, 30) } } #[doc = "Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOAR_SPEC; -impl crate::RegisterSpec for MOAR_SPEC { +pub struct MoarSpec; +impl crate::RegisterSpec for MoarSpec { type Ux = u32; } #[doc = "`read()` method returns [`moar::R`](R) reader structure"] -impl crate::Readable for MOAR_SPEC {} +impl crate::Readable for MoarSpec {} #[doc = "`write(|w| ..)` method takes [`moar::W`](W) writer structure"] -impl crate::Writable for MOAR_SPEC { +impl crate::Writable for MoarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOAR to value 0"] -impl crate::Resettable for MOAR_SPEC { +impl crate::Resettable for MoarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/moctr.rs b/src/can_mo/mo/moctr.rs index f10f2f34..0f1fed16 100644 --- a/src/can_mo/mo/moctr.rs +++ b/src/can_mo/mo/moctr.rs @@ -1,220 +1,211 @@ #[doc = "Register `MOCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESRXPND` writer - Reset/Set Receive Pending"] -pub type RESRXPND_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResrxpndW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXPND` writer - Reset/Set Transmit Pending"] -pub type RESTXPND_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RestxpndW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRXUPD` writer - Reset/Set Receive Updating"] -pub type RESRXUPD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResrxupdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESNEWDAT` writer - Reset/Set New Data"] -pub type RESNEWDAT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResnewdatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESMSGLST` writer - Reset/Set Message Lost"] -pub type RESMSGLST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResmsglstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESMSGVAL` writer - Reset/Set Message Valid"] -pub type RESMSGVAL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResmsgvalW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRTSEL` writer - Reset/Set Receive/Transmit Selected"] -pub type RESRTSEL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResrtselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRXEN` writer - Reset/Set Receive Enable"] -pub type RESRXEN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResrxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXRQ` writer - Reset/Set Transmit Request"] -pub type RESTXRQ_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RestxrqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXEN0` writer - Reset/Set Transmit Enable 0"] -pub type RESTXEN0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Restxen0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXEN1` writer - Reset/Set Transmit Enable 1"] -pub type RESTXEN1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Restxen1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESDIR` writer - Reset/Set Message Direction"] -pub type RESDIR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResdirW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXPND` writer - Reset/Set Receive Pending"] -pub type SETRXPND_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetrxpndW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXPND` writer - Reset/Set Transmit Pending"] -pub type SETTXPND_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SettxpndW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXUPD` writer - Reset/Set Receive Updating"] -pub type SETRXUPD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetrxupdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETNEWDAT` writer - Reset/Set New Data"] -pub type SETNEWDAT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetnewdatW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETMSGLST` writer - Reset/Set Message Lost"] -pub type SETMSGLST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetmsglstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETMSGVAL` writer - Reset/Set Message Valid"] -pub type SETMSGVAL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetmsgvalW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRTSEL` writer - Reset/Set Receive/Transmit Selected"] -pub type SETRTSEL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetrtselW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXEN` writer - Reset/Set Receive Enable"] -pub type SETRXEN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetrxenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXRQ` writer - Reset/Set Transmit Request"] -pub type SETTXRQ_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SettxrqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXEN0` writer - Reset/Set Transmit Enable 0"] -pub type SETTXEN0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Settxen0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXEN1` writer - Reset/Set Transmit Enable 1"] -pub type SETTXEN1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Settxen1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETDIR` writer - Reset/Set Message Direction"] -pub type SETDIR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetdirW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Reset/Set Receive Pending"] #[inline(always)] #[must_use] - pub fn resrxpnd(&mut self) -> RESRXPND_W { - RESRXPND_W::new(self, 0) + pub fn resrxpnd(&mut self) -> ResrxpndW { + ResrxpndW::new(self, 0) } #[doc = "Bit 1 - Reset/Set Transmit Pending"] #[inline(always)] #[must_use] - pub fn restxpnd(&mut self) -> RESTXPND_W { - RESTXPND_W::new(self, 1) + pub fn restxpnd(&mut self) -> RestxpndW { + RestxpndW::new(self, 1) } #[doc = "Bit 2 - Reset/Set Receive Updating"] #[inline(always)] #[must_use] - pub fn resrxupd(&mut self) -> RESRXUPD_W { - RESRXUPD_W::new(self, 2) + pub fn resrxupd(&mut self) -> ResrxupdW { + ResrxupdW::new(self, 2) } #[doc = "Bit 3 - Reset/Set New Data"] #[inline(always)] #[must_use] - pub fn resnewdat(&mut self) -> RESNEWDAT_W { - RESNEWDAT_W::new(self, 3) + pub fn resnewdat(&mut self) -> ResnewdatW { + ResnewdatW::new(self, 3) } #[doc = "Bit 4 - Reset/Set Message Lost"] #[inline(always)] #[must_use] - pub fn resmsglst(&mut self) -> RESMSGLST_W { - RESMSGLST_W::new(self, 4) + pub fn resmsglst(&mut self) -> ResmsglstW { + ResmsglstW::new(self, 4) } #[doc = "Bit 5 - Reset/Set Message Valid"] #[inline(always)] #[must_use] - pub fn resmsgval(&mut self) -> RESMSGVAL_W { - RESMSGVAL_W::new(self, 5) + pub fn resmsgval(&mut self) -> ResmsgvalW { + ResmsgvalW::new(self, 5) } #[doc = "Bit 6 - Reset/Set Receive/Transmit Selected"] #[inline(always)] #[must_use] - pub fn resrtsel(&mut self) -> RESRTSEL_W { - RESRTSEL_W::new(self, 6) + pub fn resrtsel(&mut self) -> ResrtselW { + ResrtselW::new(self, 6) } #[doc = "Bit 7 - Reset/Set Receive Enable"] #[inline(always)] #[must_use] - pub fn resrxen(&mut self) -> RESRXEN_W { - RESRXEN_W::new(self, 7) + pub fn resrxen(&mut self) -> ResrxenW { + ResrxenW::new(self, 7) } #[doc = "Bit 8 - Reset/Set Transmit Request"] #[inline(always)] #[must_use] - pub fn restxrq(&mut self) -> RESTXRQ_W { - RESTXRQ_W::new(self, 8) + pub fn restxrq(&mut self) -> RestxrqW { + RestxrqW::new(self, 8) } #[doc = "Bit 9 - Reset/Set Transmit Enable 0"] #[inline(always)] #[must_use] - pub fn restxen0(&mut self) -> RESTXEN0_W { - RESTXEN0_W::new(self, 9) + pub fn restxen0(&mut self) -> Restxen0W { + Restxen0W::new(self, 9) } #[doc = "Bit 10 - Reset/Set Transmit Enable 1"] #[inline(always)] #[must_use] - pub fn restxen1(&mut self) -> RESTXEN1_W { - RESTXEN1_W::new(self, 10) + pub fn restxen1(&mut self) -> Restxen1W { + Restxen1W::new(self, 10) } #[doc = "Bit 11 - Reset/Set Message Direction"] #[inline(always)] #[must_use] - pub fn resdir(&mut self) -> RESDIR_W { - RESDIR_W::new(self, 11) + pub fn resdir(&mut self) -> ResdirW { + ResdirW::new(self, 11) } #[doc = "Bit 16 - Reset/Set Receive Pending"] #[inline(always)] #[must_use] - pub fn setrxpnd(&mut self) -> SETRXPND_W { - SETRXPND_W::new(self, 16) + pub fn setrxpnd(&mut self) -> SetrxpndW { + SetrxpndW::new(self, 16) } #[doc = "Bit 17 - Reset/Set Transmit Pending"] #[inline(always)] #[must_use] - pub fn settxpnd(&mut self) -> SETTXPND_W { - SETTXPND_W::new(self, 17) + pub fn settxpnd(&mut self) -> SettxpndW { + SettxpndW::new(self, 17) } #[doc = "Bit 18 - Reset/Set Receive Updating"] #[inline(always)] #[must_use] - pub fn setrxupd(&mut self) -> SETRXUPD_W { - SETRXUPD_W::new(self, 18) + pub fn setrxupd(&mut self) -> SetrxupdW { + SetrxupdW::new(self, 18) } #[doc = "Bit 19 - Reset/Set New Data"] #[inline(always)] #[must_use] - pub fn setnewdat(&mut self) -> SETNEWDAT_W { - SETNEWDAT_W::new(self, 19) + pub fn setnewdat(&mut self) -> SetnewdatW { + SetnewdatW::new(self, 19) } #[doc = "Bit 20 - Reset/Set Message Lost"] #[inline(always)] #[must_use] - pub fn setmsglst(&mut self) -> SETMSGLST_W { - SETMSGLST_W::new(self, 20) + pub fn setmsglst(&mut self) -> SetmsglstW { + SetmsglstW::new(self, 20) } #[doc = "Bit 21 - Reset/Set Message Valid"] #[inline(always)] #[must_use] - pub fn setmsgval(&mut self) -> SETMSGVAL_W { - SETMSGVAL_W::new(self, 21) + pub fn setmsgval(&mut self) -> SetmsgvalW { + SetmsgvalW::new(self, 21) } #[doc = "Bit 22 - Reset/Set Receive/Transmit Selected"] #[inline(always)] #[must_use] - pub fn setrtsel(&mut self) -> SETRTSEL_W { - SETRTSEL_W::new(self, 22) + pub fn setrtsel(&mut self) -> SetrtselW { + SetrtselW::new(self, 22) } #[doc = "Bit 23 - Reset/Set Receive Enable"] #[inline(always)] #[must_use] - pub fn setrxen(&mut self) -> SETRXEN_W { - SETRXEN_W::new(self, 23) + pub fn setrxen(&mut self) -> SetrxenW { + SetrxenW::new(self, 23) } #[doc = "Bit 24 - Reset/Set Transmit Request"] #[inline(always)] #[must_use] - pub fn settxrq(&mut self) -> SETTXRQ_W { - SETTXRQ_W::new(self, 24) + pub fn settxrq(&mut self) -> SettxrqW { + SettxrqW::new(self, 24) } #[doc = "Bit 25 - Reset/Set Transmit Enable 0"] #[inline(always)] #[must_use] - pub fn settxen0(&mut self) -> SETTXEN0_W { - SETTXEN0_W::new(self, 25) + pub fn settxen0(&mut self) -> Settxen0W { + Settxen0W::new(self, 25) } #[doc = "Bit 26 - Reset/Set Transmit Enable 1"] #[inline(always)] #[must_use] - pub fn settxen1(&mut self) -> SETTXEN1_W { - SETTXEN1_W::new(self, 26) + pub fn settxen1(&mut self) -> Settxen1W { + Settxen1W::new(self, 26) } #[doc = "Bit 27 - Reset/Set Message Direction"] #[inline(always)] #[must_use] - pub fn setdir(&mut self) -> SETDIR_W { - SETDIR_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setdir(&mut self) -> SetdirW { + SetdirW::new(self, 27) } } #[doc = "Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOCTR_SPEC; -impl crate::RegisterSpec for MOCTR_SPEC { +pub struct MoctrSpec; +impl crate::RegisterSpec for MoctrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`moctr::W`](W) writer structure"] -impl crate::Writable for MOCTR_SPEC { +impl crate::Writable for MoctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOCTR to value 0"] -impl crate::Resettable for MOCTR_SPEC { +impl crate::Resettable for MoctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/modatah.rs b/src/can_mo/mo/modatah.rs index f105bc92..9da136cc 100644 --- a/src/can_mo/mo/modatah.rs +++ b/src/can_mo/mo/modatah.rs @@ -1,94 +1,85 @@ #[doc = "Register `MODATAH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODATAH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DB4` reader - Data Byte 4 of Message Object n"] -pub type DB4_R = crate::FieldReader; +pub type Db4R = crate::FieldReader; #[doc = "Field `DB4` writer - Data Byte 4 of Message Object n"] -pub type DB4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB5` reader - Data Byte 5 of Message Object n"] -pub type DB5_R = crate::FieldReader; +pub type Db5R = crate::FieldReader; #[doc = "Field `DB5` writer - Data Byte 5 of Message Object n"] -pub type DB5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB6` reader - Data Byte 6 of Message Object n"] -pub type DB6_R = crate::FieldReader; +pub type Db6R = crate::FieldReader; #[doc = "Field `DB6` writer - Data Byte 6 of Message Object n"] -pub type DB6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB7` reader - Data Byte 7 of Message Object n"] -pub type DB7_R = crate::FieldReader; +pub type Db7R = crate::FieldReader; #[doc = "Field `DB7` writer - Data Byte 7 of Message Object n"] -pub type DB7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"] #[inline(always)] - pub fn db4(&self) -> DB4_R { - DB4_R::new((self.bits & 0xff) as u8) + pub fn db4(&self) -> Db4R { + Db4R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"] #[inline(always)] - pub fn db5(&self) -> DB5_R { - DB5_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn db5(&self) -> Db5R { + Db5R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"] #[inline(always)] - pub fn db6(&self) -> DB6_R { - DB6_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn db6(&self) -> Db6R { + Db6R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"] #[inline(always)] - pub fn db7(&self) -> DB7_R { - DB7_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn db7(&self) -> Db7R { + Db7R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"] #[inline(always)] #[must_use] - pub fn db4(&mut self) -> DB4_W { - DB4_W::new(self, 0) + pub fn db4(&mut self) -> Db4W { + Db4W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"] #[inline(always)] #[must_use] - pub fn db5(&mut self) -> DB5_W { - DB5_W::new(self, 8) + pub fn db5(&mut self) -> Db5W { + Db5W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"] #[inline(always)] #[must_use] - pub fn db6(&mut self) -> DB6_W { - DB6_W::new(self, 16) + pub fn db6(&mut self) -> Db6W { + Db6W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"] #[inline(always)] #[must_use] - pub fn db7(&mut self) -> DB7_W { - DB7_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn db7(&mut self) -> Db7W { + Db7W::new(self, 24) } } #[doc = "Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MODATAH_SPEC; -impl crate::RegisterSpec for MODATAH_SPEC { +pub struct ModatahSpec; +impl crate::RegisterSpec for ModatahSpec { type Ux = u32; } #[doc = "`read()` method returns [`modatah::R`](R) reader structure"] -impl crate::Readable for MODATAH_SPEC {} +impl crate::Readable for ModatahSpec {} #[doc = "`write(|w| ..)` method takes [`modatah::W`](W) writer structure"] -impl crate::Writable for MODATAH_SPEC { +impl crate::Writable for ModatahSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODATAH to value 0"] -impl crate::Resettable for MODATAH_SPEC { +impl crate::Resettable for ModatahSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/modatal.rs b/src/can_mo/mo/modatal.rs index cad68271..30bf2a60 100644 --- a/src/can_mo/mo/modatal.rs +++ b/src/can_mo/mo/modatal.rs @@ -1,94 +1,85 @@ #[doc = "Register `MODATAL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODATAL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DB0` reader - Data Byte 0 of Message Object n"] -pub type DB0_R = crate::FieldReader; +pub type Db0R = crate::FieldReader; #[doc = "Field `DB0` writer - Data Byte 0 of Message Object n"] -pub type DB0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB1` reader - Data Byte 1 of Message Object n"] -pub type DB1_R = crate::FieldReader; +pub type Db1R = crate::FieldReader; #[doc = "Field `DB1` writer - Data Byte 1 of Message Object n"] -pub type DB1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB2` reader - Data Byte 2 of Message Object n"] -pub type DB2_R = crate::FieldReader; +pub type Db2R = crate::FieldReader; #[doc = "Field `DB2` writer - Data Byte 2 of Message Object n"] -pub type DB2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB3` reader - Data Byte 3 of Message Object n"] -pub type DB3_R = crate::FieldReader; +pub type Db3R = crate::FieldReader; #[doc = "Field `DB3` writer - Data Byte 3 of Message Object n"] -pub type DB3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Db3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"] #[inline(always)] - pub fn db0(&self) -> DB0_R { - DB0_R::new((self.bits & 0xff) as u8) + pub fn db0(&self) -> Db0R { + Db0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"] #[inline(always)] - pub fn db1(&self) -> DB1_R { - DB1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn db1(&self) -> Db1R { + Db1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"] #[inline(always)] - pub fn db2(&self) -> DB2_R { - DB2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn db2(&self) -> Db2R { + Db2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"] #[inline(always)] - pub fn db3(&self) -> DB3_R { - DB3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn db3(&self) -> Db3R { + Db3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"] #[inline(always)] #[must_use] - pub fn db0(&mut self) -> DB0_W { - DB0_W::new(self, 0) + pub fn db0(&mut self) -> Db0W { + Db0W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"] #[inline(always)] #[must_use] - pub fn db1(&mut self) -> DB1_W { - DB1_W::new(self, 8) + pub fn db1(&mut self) -> Db1W { + Db1W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"] #[inline(always)] #[must_use] - pub fn db2(&mut self) -> DB2_W { - DB2_W::new(self, 16) + pub fn db2(&mut self) -> Db2W { + Db2W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"] #[inline(always)] #[must_use] - pub fn db3(&mut self) -> DB3_W { - DB3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn db3(&mut self) -> Db3W { + Db3W::new(self, 24) } } #[doc = "Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MODATAL_SPEC; -impl crate::RegisterSpec for MODATAL_SPEC { +pub struct ModatalSpec; +impl crate::RegisterSpec for ModatalSpec { type Ux = u32; } #[doc = "`read()` method returns [`modatal::R`](R) reader structure"] -impl crate::Readable for MODATAL_SPEC {} +impl crate::Readable for ModatalSpec {} #[doc = "`write(|w| ..)` method takes [`modatal::W`](W) writer structure"] -impl crate::Writable for MODATAL_SPEC { +impl crate::Writable for ModatalSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODATAL to value 0"] -impl crate::Resettable for MODATAL_SPEC { +impl crate::Resettable for ModatalSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/mofcr.rs b/src/can_mo/mo/mofcr.rs index d370afca..5b4a432e 100644 --- a/src/can_mo/mo/mofcr.rs +++ b/src/can_mo/mo/mofcr.rs @@ -1,75 +1,75 @@ #[doc = "Register `MOFCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOFCR` writer"] -pub type W = crate::W; -#[doc = "Field `MMC` reader - Message Mode Control"] -pub type MMC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Message Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MMC_A { +pub enum Mmc { #[doc = "0: Standard Message Object"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Receive FIFO Base Object"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Transmit FIFO Base Object"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Transmit FIFO Slave Object"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Gateway Source Object"] - VALUE5 = 4, + Value5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MMC_A) -> Self { + fn from(variant: Mmc) -> Self { variant as _ } } -impl crate::FieldSpec for MMC_A { +impl crate::FieldSpec for Mmc { type Ux = u8; } -impl MMC_R { +#[doc = "Field `MMC` reader - Message Mode Control"] +pub type MmcR = crate::FieldReader; +impl MmcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MMC_A::VALUE1), - 1 => Some(MMC_A::VALUE2), - 2 => Some(MMC_A::VALUE3), - 3 => Some(MMC_A::VALUE4), - 4 => Some(MMC_A::VALUE5), + 0 => Some(Mmc::Value1), + 1 => Some(Mmc::Value2), + 2 => Some(Mmc::Value3), + 3 => Some(Mmc::Value4), + 4 => Some(Mmc::Value5), _ => None, } } #[doc = "Standard Message Object"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMC_A::VALUE1 + *self == Mmc::Value1 } #[doc = "Receive FIFO Base Object"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMC_A::VALUE2 + *self == Mmc::Value2 } #[doc = "Transmit FIFO Base Object"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MMC_A::VALUE3 + *self == Mmc::Value3 } #[doc = "Transmit FIFO Slave Object"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MMC_A::VALUE4 + *self == Mmc::Value4 } #[doc = "Gateway Source Object"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == MMC_A::VALUE5 + *self == Mmc::Value5 } } #[doc = "Field `MMC` writer - Message Mode Control"] -pub type MMC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MMC_A>; -impl<'a, REG> MMC_W<'a, REG> +pub type MmcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Mmc>; +impl<'a, REG> MmcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,752 +77,743 @@ where #[doc = "Standard Message Object"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMC_A::VALUE1) + self.variant(Mmc::Value1) } #[doc = "Receive FIFO Base Object"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMC_A::VALUE2) + self.variant(Mmc::Value2) } #[doc = "Transmit FIFO Base Object"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MMC_A::VALUE3) + self.variant(Mmc::Value3) } #[doc = "Transmit FIFO Slave Object"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MMC_A::VALUE4) + self.variant(Mmc::Value4) } #[doc = "Gateway Source Object"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(MMC_A::VALUE5) + self.variant(Mmc::Value5) } } -#[doc = "Field `RXTOE` reader - Receive Time-Out Enable"] -pub type RXTOE_R = crate::BitReader; #[doc = "Receive Time-Out Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXTOE_A { +pub enum Rxtoe { #[doc = "0: Message does not take part in receive time-out check"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message takes part in receive time-out check"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXTOE_A) -> Self { + fn from(variant: Rxtoe) -> Self { variant as u8 != 0 } } -impl RXTOE_R { +#[doc = "Field `RXTOE` reader - Receive Time-Out Enable"] +pub type RxtoeR = crate::BitReader; +impl RxtoeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXTOE_A { + pub const fn variant(&self) -> Rxtoe { match self.bits { - false => RXTOE_A::VALUE1, - true => RXTOE_A::VALUE2, + false => Rxtoe::Value1, + true => Rxtoe::Value2, } } #[doc = "Message does not take part in receive time-out check"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXTOE_A::VALUE1 + *self == Rxtoe::Value1 } #[doc = "Message takes part in receive time-out check"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXTOE_A::VALUE2 + *self == Rxtoe::Value2 } } #[doc = "Field `RXTOE` writer - Receive Time-Out Enable"] -pub type RXTOE_W<'a, REG> = crate::BitWriter<'a, REG, RXTOE_A>; -impl<'a, REG> RXTOE_W<'a, REG> +pub type RxtoeW<'a, REG> = crate::BitWriter<'a, REG, Rxtoe>; +impl<'a, REG> RxtoeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message does not take part in receive time-out check"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXTOE_A::VALUE1) + self.variant(Rxtoe::Value1) } #[doc = "Message takes part in receive time-out check"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXTOE_A::VALUE2) + self.variant(Rxtoe::Value2) } } -#[doc = "Field `GDFS` reader - Gateway Data Frame Send"] -pub type GDFS_R = crate::BitReader; #[doc = "Gateway Data Frame Send\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GDFS_A { +pub enum Gdfs { #[doc = "0: TXRQ is unchanged in the destination object."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GDFS_A) -> Self { + fn from(variant: Gdfs) -> Self { variant as u8 != 0 } } -impl GDFS_R { +#[doc = "Field `GDFS` reader - Gateway Data Frame Send"] +pub type GdfsR = crate::BitReader; +impl GdfsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GDFS_A { + pub const fn variant(&self) -> Gdfs { match self.bits { - false => GDFS_A::VALUE1, - true => GDFS_A::VALUE2, + false => Gdfs::Value1, + true => Gdfs::Value2, } } #[doc = "TXRQ is unchanged in the destination object."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GDFS_A::VALUE1 + *self == Gdfs::Value1 } #[doc = "TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GDFS_A::VALUE2 + *self == Gdfs::Value2 } } #[doc = "Field `GDFS` writer - Gateway Data Frame Send"] -pub type GDFS_W<'a, REG> = crate::BitWriter<'a, REG, GDFS_A>; -impl<'a, REG> GDFS_W<'a, REG> +pub type GdfsW<'a, REG> = crate::BitWriter<'a, REG, Gdfs>; +impl<'a, REG> GdfsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TXRQ is unchanged in the destination object."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GDFS_A::VALUE1) + self.variant(Gdfs::Value1) } #[doc = "TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GDFS_A::VALUE2) + self.variant(Gdfs::Value2) } } -#[doc = "Field `IDC` reader - Identifier Copy"] -pub type IDC_R = crate::BitReader; #[doc = "Identifier Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IDC_A { +pub enum Idc { #[doc = "0: The identifier of the gateway source object is not copied."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IDC_A) -> Self { + fn from(variant: Idc) -> Self { variant as u8 != 0 } } -impl IDC_R { +#[doc = "Field `IDC` reader - Identifier Copy"] +pub type IdcR = crate::BitReader; +impl IdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IDC_A { + pub const fn variant(&self) -> Idc { match self.bits { - false => IDC_A::VALUE1, - true => IDC_A::VALUE2, + false => Idc::Value1, + true => Idc::Value2, } } #[doc = "The identifier of the gateway source object is not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IDC_A::VALUE1 + *self == Idc::Value1 } #[doc = "The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IDC_A::VALUE2 + *self == Idc::Value2 } } #[doc = "Field `IDC` writer - Identifier Copy"] -pub type IDC_W<'a, REG> = crate::BitWriter<'a, REG, IDC_A>; -impl<'a, REG> IDC_W<'a, REG> +pub type IdcW<'a, REG> = crate::BitWriter<'a, REG, Idc>; +impl<'a, REG> IdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The identifier of the gateway source object is not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IDC_A::VALUE1) + self.variant(Idc::Value1) } #[doc = "The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IDC_A::VALUE2) + self.variant(Idc::Value2) } } -#[doc = "Field `DLCC` reader - Data Length Code Copy"] -pub type DLCC_R = crate::BitReader; #[doc = "Data Length Code Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLCC_A { +pub enum Dlcc { #[doc = "0: Data length code is not copied."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLCC_A) -> Self { + fn from(variant: Dlcc) -> Self { variant as u8 != 0 } } -impl DLCC_R { +#[doc = "Field `DLCC` reader - Data Length Code Copy"] +pub type DlccR = crate::BitReader; +impl DlccR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLCC_A { + pub const fn variant(&self) -> Dlcc { match self.bits { - false => DLCC_A::VALUE1, - true => DLCC_A::VALUE2, + false => Dlcc::Value1, + true => Dlcc::Value2, } } #[doc = "Data length code is not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLCC_A::VALUE1 + *self == Dlcc::Value1 } #[doc = "Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLCC_A::VALUE2 + *self == Dlcc::Value2 } } #[doc = "Field `DLCC` writer - Data Length Code Copy"] -pub type DLCC_W<'a, REG> = crate::BitWriter<'a, REG, DLCC_A>; -impl<'a, REG> DLCC_W<'a, REG> +pub type DlccW<'a, REG> = crate::BitWriter<'a, REG, Dlcc>; +impl<'a, REG> DlccW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data length code is not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLCC_A::VALUE1) + self.variant(Dlcc::Value1) } #[doc = "Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLCC_A::VALUE2) + self.variant(Dlcc::Value2) } } -#[doc = "Field `DATC` reader - Data Copy"] -pub type DATC_R = crate::BitReader; #[doc = "Data Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATC_A { +pub enum Datc { #[doc = "0: Data fields are not copied."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATC_A) -> Self { + fn from(variant: Datc) -> Self { variant as u8 != 0 } } -impl DATC_R { +#[doc = "Field `DATC` reader - Data Copy"] +pub type DatcR = crate::BitReader; +impl DatcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATC_A { + pub const fn variant(&self) -> Datc { match self.bits { - false => DATC_A::VALUE1, - true => DATC_A::VALUE2, + false => Datc::Value1, + true => Datc::Value2, } } #[doc = "Data fields are not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATC_A::VALUE1 + *self == Datc::Value1 } #[doc = "Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATC_A::VALUE2 + *self == Datc::Value2 } } #[doc = "Field `DATC` writer - Data Copy"] -pub type DATC_W<'a, REG> = crate::BitWriter<'a, REG, DATC_A>; -impl<'a, REG> DATC_W<'a, REG> +pub type DatcW<'a, REG> = crate::BitWriter<'a, REG, Datc>; +impl<'a, REG> DatcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data fields are not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATC_A::VALUE1) + self.variant(Datc::Value1) } #[doc = "Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATC_A::VALUE2) + self.variant(Datc::Value2) } } -#[doc = "Field `RXIE` reader - Receive Interrupt Enable"] -pub type RXIE_R = crate::BitReader; #[doc = "Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXIE_A { +pub enum Rxie { #[doc = "0: Message receive interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message receive interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXIE_A) -> Self { + fn from(variant: Rxie) -> Self { variant as u8 != 0 } } -impl RXIE_R { +#[doc = "Field `RXIE` reader - Receive Interrupt Enable"] +pub type RxieR = crate::BitReader; +impl RxieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXIE_A { + pub const fn variant(&self) -> Rxie { match self.bits { - false => RXIE_A::VALUE1, - true => RXIE_A::VALUE2, + false => Rxie::Value1, + true => Rxie::Value2, } } #[doc = "Message receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXIE_A::VALUE1 + *self == Rxie::Value1 } #[doc = "Message receive interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXIE_A::VALUE2 + *self == Rxie::Value2 } } #[doc = "Field `RXIE` writer - Receive Interrupt Enable"] -pub type RXIE_W<'a, REG> = crate::BitWriter<'a, REG, RXIE_A>; -impl<'a, REG> RXIE_W<'a, REG> +pub type RxieW<'a, REG> = crate::BitWriter<'a, REG, Rxie>; +impl<'a, REG> RxieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXIE_A::VALUE1) + self.variant(Rxie::Value1) } #[doc = "Message receive interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXIE_A::VALUE2) + self.variant(Rxie::Value2) } } -#[doc = "Field `TXIE` reader - Transmit Interrupt Enable"] -pub type TXIE_R = crate::BitReader; #[doc = "Transmit Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXIE_A { +pub enum Txie { #[doc = "0: Message transmit interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message transmit interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXIE_A) -> Self { + fn from(variant: Txie) -> Self { variant as u8 != 0 } } -impl TXIE_R { +#[doc = "Field `TXIE` reader - Transmit Interrupt Enable"] +pub type TxieR = crate::BitReader; +impl TxieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXIE_A { + pub const fn variant(&self) -> Txie { match self.bits { - false => TXIE_A::VALUE1, - true => TXIE_A::VALUE2, + false => Txie::Value1, + true => Txie::Value2, } } #[doc = "Message transmit interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXIE_A::VALUE1 + *self == Txie::Value1 } #[doc = "Message transmit interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXIE_A::VALUE2 + *self == Txie::Value2 } } #[doc = "Field `TXIE` writer - Transmit Interrupt Enable"] -pub type TXIE_W<'a, REG> = crate::BitWriter<'a, REG, TXIE_A>; -impl<'a, REG> TXIE_W<'a, REG> +pub type TxieW<'a, REG> = crate::BitWriter<'a, REG, Txie>; +impl<'a, REG> TxieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message transmit interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TXIE_A::VALUE1) + self.variant(Txie::Value1) } #[doc = "Message transmit interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TXIE_A::VALUE2) + self.variant(Txie::Value2) } } -#[doc = "Field `OVIE` reader - Overflow Interrupt Enable"] -pub type OVIE_R = crate::BitReader; #[doc = "Overflow Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OVIE_A { +pub enum Ovie { #[doc = "0: FIFO full interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FIFO full interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OVIE_A) -> Self { + fn from(variant: Ovie) -> Self { variant as u8 != 0 } } -impl OVIE_R { +#[doc = "Field `OVIE` reader - Overflow Interrupt Enable"] +pub type OvieR = crate::BitReader; +impl OvieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OVIE_A { + pub const fn variant(&self) -> Ovie { match self.bits { - false => OVIE_A::VALUE1, - true => OVIE_A::VALUE2, + false => Ovie::Value1, + true => Ovie::Value2, } } #[doc = "FIFO full interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OVIE_A::VALUE1 + *self == Ovie::Value1 } #[doc = "FIFO full interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OVIE_A::VALUE2 + *self == Ovie::Value2 } } #[doc = "Field `OVIE` writer - Overflow Interrupt Enable"] -pub type OVIE_W<'a, REG> = crate::BitWriter<'a, REG, OVIE_A>; -impl<'a, REG> OVIE_W<'a, REG> +pub type OvieW<'a, REG> = crate::BitWriter<'a, REG, Ovie>; +impl<'a, REG> OvieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "FIFO full interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OVIE_A::VALUE1) + self.variant(Ovie::Value1) } #[doc = "FIFO full interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OVIE_A::VALUE2) + self.variant(Ovie::Value2) } } -#[doc = "Field `FRREN` reader - Foreign Remote Request Enable"] -pub type FRREN_R = crate::BitReader; #[doc = "Foreign Remote Request Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FRREN_A { +pub enum Frren { #[doc = "0: TXRQ of message object n is set on reception of a matching Remote Frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FRREN_A) -> Self { + fn from(variant: Frren) -> Self { variant as u8 != 0 } } -impl FRREN_R { +#[doc = "Field `FRREN` reader - Foreign Remote Request Enable"] +pub type FrrenR = crate::BitReader; +impl FrrenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FRREN_A { + pub const fn variant(&self) -> Frren { match self.bits { - false => FRREN_A::VALUE1, - true => FRREN_A::VALUE2, + false => Frren::Value1, + true => Frren::Value2, } } #[doc = "TXRQ of message object n is set on reception of a matching Remote Frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FRREN_A::VALUE1 + *self == Frren::Value1 } #[doc = "TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FRREN_A::VALUE2 + *self == Frren::Value2 } } #[doc = "Field `FRREN` writer - Foreign Remote Request Enable"] -pub type FRREN_W<'a, REG> = crate::BitWriter<'a, REG, FRREN_A>; -impl<'a, REG> FRREN_W<'a, REG> +pub type FrrenW<'a, REG> = crate::BitWriter<'a, REG, Frren>; +impl<'a, REG> FrrenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TXRQ of message object n is set on reception of a matching Remote Frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FRREN_A::VALUE1) + self.variant(Frren::Value1) } #[doc = "TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FRREN_A::VALUE2) + self.variant(Frren::Value2) } } -#[doc = "Field `RMM` reader - Transmit Object Remote Monitoring"] -pub type RMM_R = crate::BitReader; #[doc = "Transmit Object Remote Monitoring\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMM_A { +pub enum Rmm { #[doc = "0: Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMM_A) -> Self { + fn from(variant: Rmm) -> Self { variant as u8 != 0 } } -impl RMM_R { +#[doc = "Field `RMM` reader - Transmit Object Remote Monitoring"] +pub type RmmR = crate::BitReader; +impl RmmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RMM_A { + pub const fn variant(&self) -> Rmm { match self.bits { - false => RMM_A::VALUE1, - true => RMM_A::VALUE2, + false => Rmm::Value1, + true => Rmm::Value2, } } #[doc = "Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RMM_A::VALUE1 + *self == Rmm::Value1 } #[doc = "Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RMM_A::VALUE2 + *self == Rmm::Value2 } } #[doc = "Field `RMM` writer - Transmit Object Remote Monitoring"] -pub type RMM_W<'a, REG> = crate::BitWriter<'a, REG, RMM_A>; -impl<'a, REG> RMM_W<'a, REG> +pub type RmmW<'a, REG> = crate::BitWriter<'a, REG, Rmm>; +impl<'a, REG> RmmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RMM_A::VALUE1) + self.variant(Rmm::Value1) } #[doc = "Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RMM_A::VALUE2) + self.variant(Rmm::Value2) } } #[doc = "Field `SDT` reader - Single Data Transfer"] -pub type SDT_R = crate::BitReader; +pub type SdtR = crate::BitReader; #[doc = "Field `SDT` writer - Single Data Transfer"] -pub type SDT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SdtW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STT` reader - Single Transmit Trial"] -pub type STT_R = crate::BitReader; +pub type SttR = crate::BitReader; #[doc = "Field `STT` writer - Single Transmit Trial"] -pub type STT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SttW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLC` reader - Data Length Code"] -pub type DLC_R = crate::FieldReader; +pub type DlcR = crate::FieldReader; #[doc = "Field `DLC` writer - Data Length Code"] -pub type DLC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Message Mode Control"] #[inline(always)] - pub fn mmc(&self) -> MMC_R { - MMC_R::new((self.bits & 0x0f) as u8) + pub fn mmc(&self) -> MmcR { + MmcR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Receive Time-Out Enable"] #[inline(always)] - pub fn rxtoe(&self) -> RXTOE_R { - RXTOE_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxtoe(&self) -> RxtoeR { + RxtoeR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Gateway Data Frame Send"] #[inline(always)] - pub fn gdfs(&self) -> GDFS_R { - GDFS_R::new(((self.bits >> 8) & 1) != 0) + pub fn gdfs(&self) -> GdfsR { + GdfsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Identifier Copy"] #[inline(always)] - pub fn idc(&self) -> IDC_R { - IDC_R::new(((self.bits >> 9) & 1) != 0) + pub fn idc(&self) -> IdcR { + IdcR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Data Length Code Copy"] #[inline(always)] - pub fn dlcc(&self) -> DLCC_R { - DLCC_R::new(((self.bits >> 10) & 1) != 0) + pub fn dlcc(&self) -> DlccR { + DlccR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Copy"] #[inline(always)] - pub fn datc(&self) -> DATC_R { - DATC_R::new(((self.bits >> 11) & 1) != 0) + pub fn datc(&self) -> DatcR { + DatcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Receive Interrupt Enable"] #[inline(always)] - pub fn rxie(&self) -> RXIE_R { - RXIE_R::new(((self.bits >> 16) & 1) != 0) + pub fn rxie(&self) -> RxieR { + RxieR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Transmit Interrupt Enable"] #[inline(always)] - pub fn txie(&self) -> TXIE_R { - TXIE_R::new(((self.bits >> 17) & 1) != 0) + pub fn txie(&self) -> TxieR { + TxieR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ovie(&self) -> OVIE_R { - OVIE_R::new(((self.bits >> 18) & 1) != 0) + pub fn ovie(&self) -> OvieR { + OvieR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Foreign Remote Request Enable"] #[inline(always)] - pub fn frren(&self) -> FRREN_R { - FRREN_R::new(((self.bits >> 20) & 1) != 0) + pub fn frren(&self) -> FrrenR { + FrrenR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Transmit Object Remote Monitoring"] #[inline(always)] - pub fn rmm(&self) -> RMM_R { - RMM_R::new(((self.bits >> 21) & 1) != 0) + pub fn rmm(&self) -> RmmR { + RmmR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Single Data Transfer"] #[inline(always)] - pub fn sdt(&self) -> SDT_R { - SDT_R::new(((self.bits >> 22) & 1) != 0) + pub fn sdt(&self) -> SdtR { + SdtR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Single Transmit Trial"] #[inline(always)] - pub fn stt(&self) -> STT_R { - STT_R::new(((self.bits >> 23) & 1) != 0) + pub fn stt(&self) -> SttR { + SttR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:27 - Data Length Code"] #[inline(always)] - pub fn dlc(&self) -> DLC_R { - DLC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn dlc(&self) -> DlcR { + DlcR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Message Mode Control"] #[inline(always)] #[must_use] - pub fn mmc(&mut self) -> MMC_W { - MMC_W::new(self, 0) + pub fn mmc(&mut self) -> MmcW { + MmcW::new(self, 0) } #[doc = "Bit 4 - Receive Time-Out Enable"] #[inline(always)] #[must_use] - pub fn rxtoe(&mut self) -> RXTOE_W { - RXTOE_W::new(self, 4) + pub fn rxtoe(&mut self) -> RxtoeW { + RxtoeW::new(self, 4) } #[doc = "Bit 8 - Gateway Data Frame Send"] #[inline(always)] #[must_use] - pub fn gdfs(&mut self) -> GDFS_W { - GDFS_W::new(self, 8) + pub fn gdfs(&mut self) -> GdfsW { + GdfsW::new(self, 8) } #[doc = "Bit 9 - Identifier Copy"] #[inline(always)] #[must_use] - pub fn idc(&mut self) -> IDC_W { - IDC_W::new(self, 9) + pub fn idc(&mut self) -> IdcW { + IdcW::new(self, 9) } #[doc = "Bit 10 - Data Length Code Copy"] #[inline(always)] #[must_use] - pub fn dlcc(&mut self) -> DLCC_W { - DLCC_W::new(self, 10) + pub fn dlcc(&mut self) -> DlccW { + DlccW::new(self, 10) } #[doc = "Bit 11 - Data Copy"] #[inline(always)] #[must_use] - pub fn datc(&mut self) -> DATC_W { - DATC_W::new(self, 11) + pub fn datc(&mut self) -> DatcW { + DatcW::new(self, 11) } #[doc = "Bit 16 - Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxie(&mut self) -> RXIE_W { - RXIE_W::new(self, 16) + pub fn rxie(&mut self) -> RxieW { + RxieW::new(self, 16) } #[doc = "Bit 17 - Transmit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txie(&mut self) -> TXIE_W { - TXIE_W::new(self, 17) + pub fn txie(&mut self) -> TxieW { + TxieW::new(self, 17) } #[doc = "Bit 18 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ovie(&mut self) -> OVIE_W { - OVIE_W::new(self, 18) + pub fn ovie(&mut self) -> OvieW { + OvieW::new(self, 18) } #[doc = "Bit 20 - Foreign Remote Request Enable"] #[inline(always)] #[must_use] - pub fn frren(&mut self) -> FRREN_W { - FRREN_W::new(self, 20) + pub fn frren(&mut self) -> FrrenW { + FrrenW::new(self, 20) } #[doc = "Bit 21 - Transmit Object Remote Monitoring"] #[inline(always)] #[must_use] - pub fn rmm(&mut self) -> RMM_W { - RMM_W::new(self, 21) + pub fn rmm(&mut self) -> RmmW { + RmmW::new(self, 21) } #[doc = "Bit 22 - Single Data Transfer"] #[inline(always)] #[must_use] - pub fn sdt(&mut self) -> SDT_W { - SDT_W::new(self, 22) + pub fn sdt(&mut self) -> SdtW { + SdtW::new(self, 22) } #[doc = "Bit 23 - Single Transmit Trial"] #[inline(always)] #[must_use] - pub fn stt(&mut self) -> STT_W { - STT_W::new(self, 23) + pub fn stt(&mut self) -> SttW { + SttW::new(self, 23) } #[doc = "Bits 24:27 - Data Length Code"] #[inline(always)] #[must_use] - pub fn dlc(&mut self) -> DLC_W { - DLC_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dlc(&mut self) -> DlcW { + DlcW::new(self, 24) } } #[doc = "Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOFCR_SPEC; -impl crate::RegisterSpec for MOFCR_SPEC { +pub struct MofcrSpec; +impl crate::RegisterSpec for MofcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`mofcr::R`](R) reader structure"] -impl crate::Readable for MOFCR_SPEC {} +impl crate::Readable for MofcrSpec {} #[doc = "`write(|w| ..)` method takes [`mofcr::W`](W) writer structure"] -impl crate::Writable for MOFCR_SPEC { +impl crate::Writable for MofcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOFCR to value 0"] -impl crate::Resettable for MOFCR_SPEC { +impl crate::Resettable for MofcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/mofgpr.rs b/src/can_mo/mo/mofgpr.rs index cc7eeec3..0639b371 100644 --- a/src/can_mo/mo/mofgpr.rs +++ b/src/can_mo/mo/mofgpr.rs @@ -1,94 +1,85 @@ #[doc = "Register `MOFGPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOFGPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOT` reader - Bottom Pointer"] -pub type BOT_R = crate::FieldReader; +pub type BotR = crate::FieldReader; #[doc = "Field `BOT` writer - Bottom Pointer"] -pub type BOT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type BotW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TOP` reader - Top Pointer"] -pub type TOP_R = crate::FieldReader; +pub type TopR = crate::FieldReader; #[doc = "Field `TOP` writer - Top Pointer"] -pub type TOP_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CUR` reader - Current Object Pointer"] -pub type CUR_R = crate::FieldReader; +pub type CurR = crate::FieldReader; #[doc = "Field `CUR` writer - Current Object Pointer"] -pub type CUR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CurW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SEL` reader - Object Select Pointer"] -pub type SEL_R = crate::FieldReader; +pub type SelR = crate::FieldReader; #[doc = "Field `SEL` writer - Object Select Pointer"] -pub type SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SelW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Bottom Pointer"] #[inline(always)] - pub fn bot(&self) -> BOT_R { - BOT_R::new((self.bits & 0xff) as u8) + pub fn bot(&self) -> BotR { + BotR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Top Pointer"] #[inline(always)] - pub fn top(&self) -> TOP_R { - TOP_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn top(&self) -> TopR { + TopR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Current Object Pointer"] #[inline(always)] - pub fn cur(&self) -> CUR_R { - CUR_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cur(&self) -> CurR { + CurR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Object Select Pointer"] #[inline(always)] - pub fn sel(&self) -> SEL_R { - SEL_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sel(&self) -> SelR { + SelR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Bottom Pointer"] #[inline(always)] #[must_use] - pub fn bot(&mut self) -> BOT_W { - BOT_W::new(self, 0) + pub fn bot(&mut self) -> BotW { + BotW::new(self, 0) } #[doc = "Bits 8:15 - Top Pointer"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TOP_W { - TOP_W::new(self, 8) + pub fn top(&mut self) -> TopW { + TopW::new(self, 8) } #[doc = "Bits 16:23 - Current Object Pointer"] #[inline(always)] #[must_use] - pub fn cur(&mut self) -> CUR_W { - CUR_W::new(self, 16) + pub fn cur(&mut self) -> CurW { + CurW::new(self, 16) } #[doc = "Bits 24:31 - Object Select Pointer"] #[inline(always)] #[must_use] - pub fn sel(&mut self) -> SEL_W { - SEL_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sel(&mut self) -> SelW { + SelW::new(self, 24) } } #[doc = "Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOFGPR_SPEC; -impl crate::RegisterSpec for MOFGPR_SPEC { +pub struct MofgprSpec; +impl crate::RegisterSpec for MofgprSpec { type Ux = u32; } #[doc = "`read()` method returns [`mofgpr::R`](R) reader structure"] -impl crate::Readable for MOFGPR_SPEC {} +impl crate::Readable for MofgprSpec {} #[doc = "`write(|w| ..)` method takes [`mofgpr::W`](W) writer structure"] -impl crate::Writable for MOFGPR_SPEC { +impl crate::Writable for MofgprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOFGPR to value 0"] -impl crate::Resettable for MOFGPR_SPEC { +impl crate::Resettable for MofgprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/moipr.rs b/src/can_mo/mo/moipr.rs index c16e7756..940a6c1b 100644 --- a/src/can_mo/mo/moipr.rs +++ b/src/can_mo/mo/moipr.rs @@ -1,67 +1,67 @@ #[doc = "Register `MOIPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOIPR` writer"] -pub type W = crate::W; -#[doc = "Field `RXINP` reader - Receive Interrupt Node Pointer"] -pub type RXINP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Receive Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXINP_A { +pub enum Rxinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXINP_A) -> Self { + fn from(variant: Rxinp) -> Self { variant as _ } } -impl crate::FieldSpec for RXINP_A { +impl crate::FieldSpec for Rxinp { type Ux = u8; } -impl RXINP_R { +#[doc = "Field `RXINP` reader - Receive Interrupt Node Pointer"] +pub type RxinpR = crate::FieldReader; +impl RxinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RXINP_A::VALUE1), - 1 => Some(RXINP_A::VALUE2), - 14 => Some(RXINP_A::VALUE3), - 15 => Some(RXINP_A::VALUE4), + 0 => Some(Rxinp::Value1), + 1 => Some(Rxinp::Value2), + 14 => Some(Rxinp::Value3), + 15 => Some(Rxinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXINP_A::VALUE1 + *self == Rxinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXINP_A::VALUE2 + *self == Rxinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXINP_A::VALUE3 + *self == Rxinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXINP_A::VALUE4 + *self == Rxinp::Value4 } } #[doc = "Field `RXINP` writer - Receive Interrupt Node Pointer"] -pub type RXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RXINP_A>; -impl<'a, REG> RXINP_W<'a, REG> +pub type RxinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rxinp>; +impl<'a, REG> RxinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXINP_A::VALUE1) + self.variant(Rxinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXINP_A::VALUE2) + self.variant(Rxinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXINP_A::VALUE3) + self.variant(Rxinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXINP_A::VALUE4) + self.variant(Rxinp::Value4) } } -#[doc = "Field `TXINP` reader - Transmit Interrupt Node Pointer"] -pub type TXINP_R = crate::FieldReader; #[doc = "Transmit Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TXINP_A { +pub enum Txinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TXINP_A) -> Self { + fn from(variant: Txinp) -> Self { variant as _ } } -impl crate::FieldSpec for TXINP_A { +impl crate::FieldSpec for Txinp { type Ux = u8; } -impl TXINP_R { +#[doc = "Field `TXINP` reader - Transmit Interrupt Node Pointer"] +pub type TxinpR = crate::FieldReader; +impl TxinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TXINP_A::VALUE1), - 1 => Some(TXINP_A::VALUE2), - 14 => Some(TXINP_A::VALUE3), - 15 => Some(TXINP_A::VALUE4), + 0 => Some(Txinp::Value1), + 1 => Some(Txinp::Value2), + 14 => Some(Txinp::Value3), + 15 => Some(Txinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXINP_A::VALUE1 + *self == Txinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXINP_A::VALUE2 + *self == Txinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TXINP_A::VALUE3 + *self == Txinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TXINP_A::VALUE4 + *self == Txinp::Value4 } } #[doc = "Field `TXINP` writer - Transmit Interrupt Node Pointer"] -pub type TXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, TXINP_A>; -impl<'a, REG> TXINP_W<'a, REG> +pub type TxinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Txinp>; +impl<'a, REG> TxinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,103 +154,94 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TXINP_A::VALUE1) + self.variant(Txinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TXINP_A::VALUE2) + self.variant(Txinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TXINP_A::VALUE3) + self.variant(Txinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TXINP_A::VALUE4) + self.variant(Txinp::Value4) } } #[doc = "Field `MPN` reader - Message Pending Number"] -pub type MPN_R = crate::FieldReader; +pub type MpnR = crate::FieldReader; #[doc = "Field `MPN` writer - Message Pending Number"] -pub type MPN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type MpnW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CFCVAL` reader - CAN Frame Counter Value"] -pub type CFCVAL_R = crate::FieldReader; +pub type CfcvalR = crate::FieldReader; #[doc = "Field `CFCVAL` writer - CAN Frame Counter Value"] -pub type CFCVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CfcvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:3 - Receive Interrupt Node Pointer"] #[inline(always)] - pub fn rxinp(&self) -> RXINP_R { - RXINP_R::new((self.bits & 0x0f) as u8) + pub fn rxinp(&self) -> RxinpR { + RxinpR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Transmit Interrupt Node Pointer"] #[inline(always)] - pub fn txinp(&self) -> TXINP_R { - TXINP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn txinp(&self) -> TxinpR { + TxinpR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:15 - Message Pending Number"] #[inline(always)] - pub fn mpn(&self) -> MPN_R { - MPN_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mpn(&self) -> MpnR { + MpnR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - CAN Frame Counter Value"] #[inline(always)] - pub fn cfcval(&self) -> CFCVAL_R { - CFCVAL_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn cfcval(&self) -> CfcvalR { + CfcvalR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:3 - Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn rxinp(&mut self) -> RXINP_W { - RXINP_W::new(self, 0) + pub fn rxinp(&mut self) -> RxinpW { + RxinpW::new(self, 0) } #[doc = "Bits 4:7 - Transmit Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn txinp(&mut self) -> TXINP_W { - TXINP_W::new(self, 4) + pub fn txinp(&mut self) -> TxinpW { + TxinpW::new(self, 4) } #[doc = "Bits 8:15 - Message Pending Number"] #[inline(always)] #[must_use] - pub fn mpn(&mut self) -> MPN_W { - MPN_W::new(self, 8) + pub fn mpn(&mut self) -> MpnW { + MpnW::new(self, 8) } #[doc = "Bits 16:31 - CAN Frame Counter Value"] #[inline(always)] #[must_use] - pub fn cfcval(&mut self) -> CFCVAL_W { - CFCVAL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cfcval(&mut self) -> CfcvalW { + CfcvalW::new(self, 16) } } #[doc = "Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOIPR_SPEC; -impl crate::RegisterSpec for MOIPR_SPEC { +pub struct MoiprSpec; +impl crate::RegisterSpec for MoiprSpec { type Ux = u32; } #[doc = "`read()` method returns [`moipr::R`](R) reader structure"] -impl crate::Readable for MOIPR_SPEC {} +impl crate::Readable for MoiprSpec {} #[doc = "`write(|w| ..)` method takes [`moipr::W`](W) writer structure"] -impl crate::Writable for MOIPR_SPEC { +impl crate::Writable for MoiprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOIPR to value 0"] -impl crate::Resettable for MOIPR_SPEC { +impl crate::Resettable for MoiprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo/mo/mostat.rs b/src/can_mo/mo/mostat.rs index fbc968b0..da7e3fa9 100644 --- a/src/can_mo/mo/mostat.rs +++ b/src/can_mo/mo/mostat.rs @@ -1,528 +1,528 @@ #[doc = "Register `MOSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `RXPND` reader - Receive Pending"] -pub type RXPND_R = crate::BitReader; +pub type R = crate::R; #[doc = "Receive Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXPND_A { +pub enum Rxpnd { #[doc = "0: No CAN message has been received."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A CAN message has been received by the message object n, either directly or via gateway copy action."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXPND_A) -> Self { + fn from(variant: Rxpnd) -> Self { variant as u8 != 0 } } -impl RXPND_R { +#[doc = "Field `RXPND` reader - Receive Pending"] +pub type RxpndR = crate::BitReader; +impl RxpndR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXPND_A { + pub const fn variant(&self) -> Rxpnd { match self.bits { - false => RXPND_A::VALUE1, - true => RXPND_A::VALUE2, + false => Rxpnd::Value1, + true => Rxpnd::Value2, } } #[doc = "No CAN message has been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXPND_A::VALUE1 + *self == Rxpnd::Value1 } #[doc = "A CAN message has been received by the message object n, either directly or via gateway copy action."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXPND_A::VALUE2 + *self == Rxpnd::Value2 } } -#[doc = "Field `TXPND` reader - Transmit Pending"] -pub type TXPND_R = crate::BitReader; #[doc = "Transmit Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXPND_A { +pub enum Txpnd { #[doc = "0: No CAN message has been transmitted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A CAN message from message object n has been transmitted successfully over the CAN bus."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXPND_A) -> Self { + fn from(variant: Txpnd) -> Self { variant as u8 != 0 } } -impl TXPND_R { +#[doc = "Field `TXPND` reader - Transmit Pending"] +pub type TxpndR = crate::BitReader; +impl TxpndR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXPND_A { + pub const fn variant(&self) -> Txpnd { match self.bits { - false => TXPND_A::VALUE1, - true => TXPND_A::VALUE2, + false => Txpnd::Value1, + true => Txpnd::Value2, } } #[doc = "No CAN message has been transmitted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXPND_A::VALUE1 + *self == Txpnd::Value1 } #[doc = "A CAN message from message object n has been transmitted successfully over the CAN bus."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXPND_A::VALUE2 + *self == Txpnd::Value2 } } -#[doc = "Field `RXUPD` reader - Receive Updating"] -pub type RXUPD_R = crate::BitReader; #[doc = "Receive Updating\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXUPD_A { +pub enum Rxupd { #[doc = "0: No receive update ongoing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message identifier, DLC, and data of the message object are currently updated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXUPD_A) -> Self { + fn from(variant: Rxupd) -> Self { variant as u8 != 0 } } -impl RXUPD_R { +#[doc = "Field `RXUPD` reader - Receive Updating"] +pub type RxupdR = crate::BitReader; +impl RxupdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXUPD_A { + pub const fn variant(&self) -> Rxupd { match self.bits { - false => RXUPD_A::VALUE1, - true => RXUPD_A::VALUE2, + false => Rxupd::Value1, + true => Rxupd::Value2, } } #[doc = "No receive update ongoing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXUPD_A::VALUE1 + *self == Rxupd::Value1 } #[doc = "Message identifier, DLC, and data of the message object are currently updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXUPD_A::VALUE2 + *self == Rxupd::Value2 } } -#[doc = "Field `NEWDAT` reader - New Data"] -pub type NEWDAT_R = crate::BitReader; #[doc = "New Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NEWDAT_A { +pub enum Newdat { #[doc = "0: No update of the message object n since last flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n has been updated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NEWDAT_A) -> Self { + fn from(variant: Newdat) -> Self { variant as u8 != 0 } } -impl NEWDAT_R { +#[doc = "Field `NEWDAT` reader - New Data"] +pub type NewdatR = crate::BitReader; +impl NewdatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NEWDAT_A { + pub const fn variant(&self) -> Newdat { match self.bits { - false => NEWDAT_A::VALUE1, - true => NEWDAT_A::VALUE2, + false => Newdat::Value1, + true => Newdat::Value2, } } #[doc = "No update of the message object n since last flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NEWDAT_A::VALUE1 + *self == Newdat::Value1 } #[doc = "Message object n has been updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NEWDAT_A::VALUE2 + *self == Newdat::Value2 } } -#[doc = "Field `MSGLST` reader - Message Lost"] -pub type MSGLST_R = crate::BitReader; #[doc = "Message Lost\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSGLST_A { +pub enum Msglst { #[doc = "0: No CAN message is lost."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A CAN message is lost because NEWDAT has become set again when it has already been set."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSGLST_A) -> Self { + fn from(variant: Msglst) -> Self { variant as u8 != 0 } } -impl MSGLST_R { +#[doc = "Field `MSGLST` reader - Message Lost"] +pub type MsglstR = crate::BitReader; +impl MsglstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSGLST_A { + pub const fn variant(&self) -> Msglst { match self.bits { - false => MSGLST_A::VALUE1, - true => MSGLST_A::VALUE2, + false => Msglst::Value1, + true => Msglst::Value2, } } #[doc = "No CAN message is lost."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSGLST_A::VALUE1 + *self == Msglst::Value1 } #[doc = "A CAN message is lost because NEWDAT has become set again when it has already been set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSGLST_A::VALUE2 + *self == Msglst::Value2 } } -#[doc = "Field `MSGVAL` reader - Message Valid"] -pub type MSGVAL_R = crate::BitReader; #[doc = "Message Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSGVAL_A { +pub enum Msgval { #[doc = "0: Message object n is not valid."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n is valid."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSGVAL_A) -> Self { + fn from(variant: Msgval) -> Self { variant as u8 != 0 } } -impl MSGVAL_R { +#[doc = "Field `MSGVAL` reader - Message Valid"] +pub type MsgvalR = crate::BitReader; +impl MsgvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSGVAL_A { + pub const fn variant(&self) -> Msgval { match self.bits { - false => MSGVAL_A::VALUE1, - true => MSGVAL_A::VALUE2, + false => Msgval::Value1, + true => Msgval::Value2, } } #[doc = "Message object n is not valid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSGVAL_A::VALUE1 + *self == Msgval::Value1 } #[doc = "Message object n is valid."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSGVAL_A::VALUE2 + *self == Msgval::Value2 } } -#[doc = "Field `RTSEL` reader - Receive/Transmit Selected"] -pub type RTSEL_R = crate::BitReader; #[doc = "Receive/Transmit Selected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTSEL_A { +pub enum Rtsel { #[doc = "0: Message object n is not selected for receive or transmit operation."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n is selected for receive or transmit operation."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTSEL_A) -> Self { + fn from(variant: Rtsel) -> Self { variant as u8 != 0 } } -impl RTSEL_R { +#[doc = "Field `RTSEL` reader - Receive/Transmit Selected"] +pub type RtselR = crate::BitReader; +impl RtselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTSEL_A { + pub const fn variant(&self) -> Rtsel { match self.bits { - false => RTSEL_A::VALUE1, - true => RTSEL_A::VALUE2, + false => Rtsel::Value1, + true => Rtsel::Value2, } } #[doc = "Message object n is not selected for receive or transmit operation."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTSEL_A::VALUE1 + *self == Rtsel::Value1 } #[doc = "Message object n is selected for receive or transmit operation."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTSEL_A::VALUE2 + *self == Rtsel::Value2 } } -#[doc = "Field `RXEN` reader - Receive Enable"] -pub type RXEN_R = crate::BitReader; #[doc = "Receive Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXEN_A { +pub enum Rxen { #[doc = "0: Message object n is not enabled for frame reception."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n is enabled for frame reception."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXEN_A) -> Self { + fn from(variant: Rxen) -> Self { variant as u8 != 0 } } -impl RXEN_R { +#[doc = "Field `RXEN` reader - Receive Enable"] +pub type RxenR = crate::BitReader; +impl RxenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXEN_A { + pub const fn variant(&self) -> Rxen { match self.bits { - false => RXEN_A::VALUE1, - true => RXEN_A::VALUE2, + false => Rxen::Value1, + true => Rxen::Value2, } } #[doc = "Message object n is not enabled for frame reception."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXEN_A::VALUE1 + *self == Rxen::Value1 } #[doc = "Message object n is enabled for frame reception."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXEN_A::VALUE2 + *self == Rxen::Value2 } } -#[doc = "Field `TXRQ` reader - Transmit Request"] -pub type TXRQ_R = crate::BitReader; #[doc = "Transmit Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXRQ_A { +pub enum Txrq { #[doc = "0: No transmission of message object n is requested."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transmission of message object n on the CAN bus is requested."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXRQ_A) -> Self { + fn from(variant: Txrq) -> Self { variant as u8 != 0 } } -impl TXRQ_R { +#[doc = "Field `TXRQ` reader - Transmit Request"] +pub type TxrqR = crate::BitReader; +impl TxrqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXRQ_A { + pub const fn variant(&self) -> Txrq { match self.bits { - false => TXRQ_A::VALUE1, - true => TXRQ_A::VALUE2, + false => Txrq::Value1, + true => Txrq::Value2, } } #[doc = "No transmission of message object n is requested."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXRQ_A::VALUE1 + *self == Txrq::Value1 } #[doc = "Transmission of message object n on the CAN bus is requested."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXRQ_A::VALUE2 + *self == Txrq::Value2 } } -#[doc = "Field `TXEN0` reader - Transmit Enable 0"] -pub type TXEN0_R = crate::BitReader; #[doc = "Transmit Enable 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXEN0_A { +pub enum Txen0 { #[doc = "0: Message object n is not enabled for frame transmission."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n is enabled for frame transmission."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXEN0_A) -> Self { + fn from(variant: Txen0) -> Self { variant as u8 != 0 } } -impl TXEN0_R { +#[doc = "Field `TXEN0` reader - Transmit Enable 0"] +pub type Txen0R = crate::BitReader; +impl Txen0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXEN0_A { + pub const fn variant(&self) -> Txen0 { match self.bits { - false => TXEN0_A::VALUE1, - true => TXEN0_A::VALUE2, + false => Txen0::Value1, + true => Txen0::Value2, } } #[doc = "Message object n is not enabled for frame transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXEN0_A::VALUE1 + *self == Txen0::Value1 } #[doc = "Message object n is enabled for frame transmission."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXEN0_A::VALUE2 + *self == Txen0::Value2 } } -#[doc = "Field `TXEN1` reader - Transmit Enable 1"] -pub type TXEN1_R = crate::BitReader; #[doc = "Transmit Enable 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXEN1_A { +pub enum Txen1 { #[doc = "0: Message object n is not enabled for frame transmission."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Message object n is enabled for frame transmission."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXEN1_A) -> Self { + fn from(variant: Txen1) -> Self { variant as u8 != 0 } } -impl TXEN1_R { +#[doc = "Field `TXEN1` reader - Transmit Enable 1"] +pub type Txen1R = crate::BitReader; +impl Txen1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXEN1_A { + pub const fn variant(&self) -> Txen1 { match self.bits { - false => TXEN1_A::VALUE1, - true => TXEN1_A::VALUE2, + false => Txen1::Value1, + true => Txen1::Value2, } } #[doc = "Message object n is not enabled for frame transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXEN1_A::VALUE1 + *self == Txen1::Value1 } #[doc = "Message object n is enabled for frame transmission."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXEN1_A::VALUE2 + *self == Txen1::Value2 } } -#[doc = "Field `DIR` reader - Message Direction"] -pub type DIR_R = crate::BitReader; #[doc = "Message Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as u8 != 0 } } -impl DIR_R { +#[doc = "Field `DIR` reader - Message Direction"] +pub type DirR = crate::BitReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIR_A { + pub const fn variant(&self) -> Dir { match self.bits { - false => DIR_A::VALUE1, - true => DIR_A::VALUE2, + false => Dir::Value1, + true => Dir::Value2, } } #[doc = "Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIR_A::VALUE1 + *self == Dir::Value1 } #[doc = "Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIR_A::VALUE2 + *self == Dir::Value2 } } #[doc = "Field `LIST` reader - List Allocation"] -pub type LIST_R = crate::FieldReader; +pub type ListR = crate::FieldReader; #[doc = "Field `PPREV` reader - Pointer to Previous Message Object"] -pub type PPREV_R = crate::FieldReader; +pub type PprevR = crate::FieldReader; #[doc = "Field `PNEXT` reader - Pointer to Next Message Object"] -pub type PNEXT_R = crate::FieldReader; +pub type PnextR = crate::FieldReader; impl R { #[doc = "Bit 0 - Receive Pending"] #[inline(always)] - pub fn rxpnd(&self) -> RXPND_R { - RXPND_R::new((self.bits & 1) != 0) + pub fn rxpnd(&self) -> RxpndR { + RxpndR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Pending"] #[inline(always)] - pub fn txpnd(&self) -> TXPND_R { - TXPND_R::new(((self.bits >> 1) & 1) != 0) + pub fn txpnd(&self) -> TxpndR { + TxpndR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Receive Updating"] #[inline(always)] - pub fn rxupd(&self) -> RXUPD_R { - RXUPD_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxupd(&self) -> RxupdR { + RxupdR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - New Data"] #[inline(always)] - pub fn newdat(&self) -> NEWDAT_R { - NEWDAT_R::new(((self.bits >> 3) & 1) != 0) + pub fn newdat(&self) -> NewdatR { + NewdatR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Message Lost"] #[inline(always)] - pub fn msglst(&self) -> MSGLST_R { - MSGLST_R::new(((self.bits >> 4) & 1) != 0) + pub fn msglst(&self) -> MsglstR { + MsglstR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Message Valid"] #[inline(always)] - pub fn msgval(&self) -> MSGVAL_R { - MSGVAL_R::new(((self.bits >> 5) & 1) != 0) + pub fn msgval(&self) -> MsgvalR { + MsgvalR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Receive/Transmit Selected"] #[inline(always)] - pub fn rtsel(&self) -> RTSEL_R { - RTSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn rtsel(&self) -> RtselR { + RtselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Enable"] #[inline(always)] - pub fn rxen(&self) -> RXEN_R { - RXEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxen(&self) -> RxenR { + RxenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Transmit Request"] #[inline(always)] - pub fn txrq(&self) -> TXRQ_R { - TXRQ_R::new(((self.bits >> 8) & 1) != 0) + pub fn txrq(&self) -> TxrqR { + TxrqR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transmit Enable 0"] #[inline(always)] - pub fn txen0(&self) -> TXEN0_R { - TXEN0_R::new(((self.bits >> 9) & 1) != 0) + pub fn txen0(&self) -> Txen0R { + Txen0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Transmit Enable 1"] #[inline(always)] - pub fn txen1(&self) -> TXEN1_R { - TXEN1_R::new(((self.bits >> 10) & 1) != 0) + pub fn txen1(&self) -> Txen1R { + Txen1R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Message Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new(((self.bits >> 11) & 1) != 0) + pub fn dir(&self) -> DirR { + DirR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:15 - List Allocation"] #[inline(always)] - pub fn list(&self) -> LIST_R { - LIST_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn list(&self) -> ListR { + ListR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:23 - Pointer to Previous Message Object"] #[inline(always)] - pub fn pprev(&self) -> PPREV_R { - PPREV_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pprev(&self) -> PprevR { + PprevR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Pointer to Next Message Object"] #[inline(always)] - pub fn pnext(&self) -> PNEXT_R { - PNEXT_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pnext(&self) -> PnextR { + PnextR::new(((self.bits >> 24) & 0xff) as u8) } } #[doc = "Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MOSTAT_SPEC; -impl crate::RegisterSpec for MOSTAT_SPEC { +pub struct MostatSpec; +impl crate::RegisterSpec for MostatSpec { type Ux = u32; } #[doc = "`read()` method returns [`mostat::R`](R) reader structure"] -impl crate::Readable for MOSTAT_SPEC {} +impl crate::Readable for MostatSpec {} #[doc = "`reset()` method sets MOSTAT to value 0"] -impl crate::Resettable for MOSTAT_SPEC { +impl crate::Resettable for MostatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0.rs b/src/can_node0.rs index 02145aef..0fe27b4b 100644 --- a/src/can_node0.rs +++ b/src/can_node0.rs @@ -1,83 +1,90 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - ncr: NCR, - nsr: NSR, - nipr: NIPR, - npcr: NPCR, - nbtr: NBTR, - necnt: NECNT, - nfcr: NFCR, + ncr: Ncr, + nsr: Nsr, + nipr: Nipr, + npcr: Npcr, + nbtr: Nbtr, + necnt: Necnt, + nfcr: Nfcr, } impl RegisterBlock { #[doc = "0x00 - Node Control Register"] #[inline(always)] - pub const fn ncr(&self) -> &NCR { + pub const fn ncr(&self) -> &Ncr { &self.ncr } #[doc = "0x04 - Node Status Register"] #[inline(always)] - pub const fn nsr(&self) -> &NSR { + pub const fn nsr(&self) -> &Nsr { &self.nsr } #[doc = "0x08 - Node Interrupt Pointer Register"] #[inline(always)] - pub const fn nipr(&self) -> &NIPR { + pub const fn nipr(&self) -> &Nipr { &self.nipr } #[doc = "0x0c - Node Port Control Register"] #[inline(always)] - pub const fn npcr(&self) -> &NPCR { + pub const fn npcr(&self) -> &Npcr { &self.npcr } #[doc = "0x10 - Node Bit Timing Register"] #[inline(always)] - pub const fn nbtr(&self) -> &NBTR { + pub const fn nbtr(&self) -> &Nbtr { &self.nbtr } #[doc = "0x14 - Node Error Counter Register"] #[inline(always)] - pub const fn necnt(&self) -> &NECNT { + pub const fn necnt(&self) -> &Necnt { &self.necnt } #[doc = "0x18 - Node Frame Counter Register"] #[inline(always)] - pub const fn nfcr(&self) -> &NFCR { + pub const fn nfcr(&self) -> &Nfcr { &self.nfcr } } #[doc = "NCR (rw) register accessor: Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ncr`] module"] -pub type NCR = crate::Reg; +#[doc(alias = "NCR")] +pub type Ncr = crate::Reg; #[doc = "Node Control Register"] pub mod ncr; #[doc = "NSR (rw) register accessor: Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsr`] module"] -pub type NSR = crate::Reg; +#[doc(alias = "NSR")] +pub type Nsr = crate::Reg; #[doc = "Node Status Register"] pub mod nsr; #[doc = "NIPR (rw) register accessor: Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nipr`] module"] -pub type NIPR = crate::Reg; +#[doc(alias = "NIPR")] +pub type Nipr = crate::Reg; #[doc = "Node Interrupt Pointer Register"] pub mod nipr; #[doc = "NPCR (rw) register accessor: Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npcr`] module"] -pub type NPCR = crate::Reg; +#[doc(alias = "NPCR")] +pub type Npcr = crate::Reg; #[doc = "Node Port Control Register"] pub mod npcr; #[doc = "NBTR (rw) register accessor: Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nbtr`] module"] -pub type NBTR = crate::Reg; +#[doc(alias = "NBTR")] +pub type Nbtr = crate::Reg; #[doc = "Node Bit Timing Register"] pub mod nbtr; #[doc = "NECNT (rw) register accessor: Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necnt`] module"] -pub type NECNT = crate::Reg; +#[doc(alias = "NECNT")] +pub type Necnt = crate::Reg; #[doc = "Node Error Counter Register"] pub mod necnt; #[doc = "NFCR (rw) register accessor: Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nfcr`] module"] -pub type NFCR = crate::Reg; +#[doc(alias = "NFCR")] +pub type Nfcr = crate::Reg; #[doc = "Node Frame Counter Register"] pub mod nfcr; diff --git a/src/can_node0/nbtr.rs b/src/can_node0/nbtr.rs index 227f6f3c..9479c366 100644 --- a/src/can_node0/nbtr.rs +++ b/src/can_node0/nbtr.rs @@ -1,158 +1,149 @@ #[doc = "Register `NBTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NBTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BRP` reader - Baud Rate Prescaler"] -pub type BRP_R = crate::FieldReader; +pub type BrpR = crate::FieldReader; #[doc = "Field `BRP` writer - Baud Rate Prescaler"] -pub type BRP_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type BrpW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `SJW` reader - (Re) Synchronization Jump Width"] -pub type SJW_R = crate::FieldReader; +pub type SjwR = crate::FieldReader; #[doc = "Field `SJW` writer - (Re) Synchronization Jump Width"] -pub type SJW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SjwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `TSEG1` reader - Time Segment Before Sample Point"] -pub type TSEG1_R = crate::FieldReader; +pub type Tseg1R = crate::FieldReader; #[doc = "Field `TSEG1` writer - Time Segment Before Sample Point"] -pub type TSEG1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Tseg1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TSEG2` reader - Time Segment After Sample Point"] -pub type TSEG2_R = crate::FieldReader; +pub type Tseg2R = crate::FieldReader; #[doc = "Field `TSEG2` writer - Time Segment After Sample Point"] -pub type TSEG2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `DIV8` reader - Divide Prescaler Clock by 8"] -pub type DIV8_R = crate::BitReader; +pub type Tseg2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Divide Prescaler Clock by 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIV8_A { +pub enum Div8 { #[doc = "0: A time quantum lasts (BRP+1) clock cycles."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A time quantum lasts 8 (BRP+1) clock cycles."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIV8_A) -> Self { + fn from(variant: Div8) -> Self { variant as u8 != 0 } } -impl DIV8_R { +#[doc = "Field `DIV8` reader - Divide Prescaler Clock by 8"] +pub type Div8R = crate::BitReader; +impl Div8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIV8_A { + pub const fn variant(&self) -> Div8 { match self.bits { - false => DIV8_A::VALUE1, - true => DIV8_A::VALUE2, + false => Div8::Value1, + true => Div8::Value2, } } #[doc = "A time quantum lasts (BRP+1) clock cycles."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIV8_A::VALUE1 + *self == Div8::Value1 } #[doc = "A time quantum lasts 8 (BRP+1) clock cycles."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIV8_A::VALUE2 + *self == Div8::Value2 } } #[doc = "Field `DIV8` writer - Divide Prescaler Clock by 8"] -pub type DIV8_W<'a, REG> = crate::BitWriter<'a, REG, DIV8_A>; -impl<'a, REG> DIV8_W<'a, REG> +pub type Div8W<'a, REG> = crate::BitWriter<'a, REG, Div8>; +impl<'a, REG> Div8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A time quantum lasts (BRP+1) clock cycles."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIV8_A::VALUE1) + self.variant(Div8::Value1) } #[doc = "A time quantum lasts 8 (BRP+1) clock cycles."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIV8_A::VALUE2) + self.variant(Div8::Value2) } } impl R { #[doc = "Bits 0:5 - Baud Rate Prescaler"] #[inline(always)] - pub fn brp(&self) -> BRP_R { - BRP_R::new((self.bits & 0x3f) as u8) + pub fn brp(&self) -> BrpR { + BrpR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"] #[inline(always)] - pub fn sjw(&self) -> SJW_R { - SJW_R::new(((self.bits >> 6) & 3) as u8) + pub fn sjw(&self) -> SjwR { + SjwR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:11 - Time Segment Before Sample Point"] #[inline(always)] - pub fn tseg1(&self) -> TSEG1_R { - TSEG1_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn tseg1(&self) -> Tseg1R { + Tseg1R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:14 - Time Segment After Sample Point"] #[inline(always)] - pub fn tseg2(&self) -> TSEG2_R { - TSEG2_R::new(((self.bits >> 12) & 7) as u8) + pub fn tseg2(&self) -> Tseg2R { + Tseg2R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 15 - Divide Prescaler Clock by 8"] #[inline(always)] - pub fn div8(&self) -> DIV8_R { - DIV8_R::new(((self.bits >> 15) & 1) != 0) + pub fn div8(&self) -> Div8R { + Div8R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Baud Rate Prescaler"] #[inline(always)] #[must_use] - pub fn brp(&mut self) -> BRP_W { - BRP_W::new(self, 0) + pub fn brp(&mut self) -> BrpW { + BrpW::new(self, 0) } #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"] #[inline(always)] #[must_use] - pub fn sjw(&mut self) -> SJW_W { - SJW_W::new(self, 6) + pub fn sjw(&mut self) -> SjwW { + SjwW::new(self, 6) } #[doc = "Bits 8:11 - Time Segment Before Sample Point"] #[inline(always)] #[must_use] - pub fn tseg1(&mut self) -> TSEG1_W { - TSEG1_W::new(self, 8) + pub fn tseg1(&mut self) -> Tseg1W { + Tseg1W::new(self, 8) } #[doc = "Bits 12:14 - Time Segment After Sample Point"] #[inline(always)] #[must_use] - pub fn tseg2(&mut self) -> TSEG2_W { - TSEG2_W::new(self, 12) + pub fn tseg2(&mut self) -> Tseg2W { + Tseg2W::new(self, 12) } #[doc = "Bit 15 - Divide Prescaler Clock by 8"] #[inline(always)] #[must_use] - pub fn div8(&mut self) -> DIV8_W { - DIV8_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn div8(&mut self) -> Div8W { + Div8W::new(self, 15) } } #[doc = "Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NBTR_SPEC; -impl crate::RegisterSpec for NBTR_SPEC { +pub struct NbtrSpec; +impl crate::RegisterSpec for NbtrSpec { type Ux = u32; } #[doc = "`read()` method returns [`nbtr::R`](R) reader structure"] -impl crate::Readable for NBTR_SPEC {} +impl crate::Readable for NbtrSpec {} #[doc = "`write(|w| ..)` method takes [`nbtr::W`](W) writer structure"] -impl crate::Writable for NBTR_SPEC { +impl crate::Writable for NbtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NBTR to value 0"] -impl crate::Resettable for NBTR_SPEC { +impl crate::Resettable for NbtrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/ncr.rs b/src/can_node0/ncr.rs index d7fd65d4..dbefd2dd 100644 --- a/src/can_node0/ncr.rs +++ b/src/can_node0/ncr.rs @@ -1,399 +1,390 @@ #[doc = "Register `NCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NCR` writer"] -pub type W = crate::W; -#[doc = "Field `INIT` reader - Node Initialization"] -pub type INIT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Node Initialization\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INIT_A { +pub enum Init { #[doc = "0: Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INIT_A) -> Self { + fn from(variant: Init) -> Self { variant as u8 != 0 } } -impl INIT_R { +#[doc = "Field `INIT` reader - Node Initialization"] +pub type InitR = crate::BitReader; +impl InitR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INIT_A { + pub const fn variant(&self) -> Init { match self.bits { - false => INIT_A::VALUE1, - true => INIT_A::VALUE2, + false => Init::Value1, + true => Init::Value2, } } #[doc = "Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INIT_A::VALUE1 + *self == Init::Value1 } #[doc = "Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INIT_A::VALUE2 + *self == Init::Value2 } } #[doc = "Field `INIT` writer - Node Initialization"] -pub type INIT_W<'a, REG> = crate::BitWriter<'a, REG, INIT_A>; -impl<'a, REG> INIT_W<'a, REG> +pub type InitW<'a, REG> = crate::BitWriter<'a, REG, Init>; +impl<'a, REG> InitW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INIT_A::VALUE1) + self.variant(Init::Value1) } #[doc = "Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INIT_A::VALUE2) + self.variant(Init::Value2) } } -#[doc = "Field `TRIE` reader - Transfer Interrupt Enable"] -pub type TRIE_R = crate::BitReader; #[doc = "Transfer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRIE_A { +pub enum Trie { #[doc = "0: Transfer interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transfer interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRIE_A) -> Self { + fn from(variant: Trie) -> Self { variant as u8 != 0 } } -impl TRIE_R { +#[doc = "Field `TRIE` reader - Transfer Interrupt Enable"] +pub type TrieR = crate::BitReader; +impl TrieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRIE_A { + pub const fn variant(&self) -> Trie { match self.bits { - false => TRIE_A::VALUE1, - true => TRIE_A::VALUE2, + false => Trie::Value1, + true => Trie::Value2, } } #[doc = "Transfer interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRIE_A::VALUE1 + *self == Trie::Value1 } #[doc = "Transfer interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRIE_A::VALUE2 + *self == Trie::Value2 } } #[doc = "Field `TRIE` writer - Transfer Interrupt Enable"] -pub type TRIE_W<'a, REG> = crate::BitWriter<'a, REG, TRIE_A>; -impl<'a, REG> TRIE_W<'a, REG> +pub type TrieW<'a, REG> = crate::BitWriter<'a, REG, Trie>; +impl<'a, REG> TrieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Transfer interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRIE_A::VALUE1) + self.variant(Trie::Value1) } #[doc = "Transfer interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRIE_A::VALUE2) + self.variant(Trie::Value2) } } -#[doc = "Field `LECIE` reader - LEC Indicated Error Interrupt Enable"] -pub type LECIE_R = crate::BitReader; #[doc = "LEC Indicated Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LECIE_A { +pub enum Lecie { #[doc = "0: Last error code interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last error code interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LECIE_A) -> Self { + fn from(variant: Lecie) -> Self { variant as u8 != 0 } } -impl LECIE_R { +#[doc = "Field `LECIE` reader - LEC Indicated Error Interrupt Enable"] +pub type LecieR = crate::BitReader; +impl LecieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LECIE_A { + pub const fn variant(&self) -> Lecie { match self.bits { - false => LECIE_A::VALUE1, - true => LECIE_A::VALUE2, + false => Lecie::Value1, + true => Lecie::Value2, } } #[doc = "Last error code interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LECIE_A::VALUE1 + *self == Lecie::Value1 } #[doc = "Last error code interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LECIE_A::VALUE2 + *self == Lecie::Value2 } } #[doc = "Field `LECIE` writer - LEC Indicated Error Interrupt Enable"] -pub type LECIE_W<'a, REG> = crate::BitWriter<'a, REG, LECIE_A>; -impl<'a, REG> LECIE_W<'a, REG> +pub type LecieW<'a, REG> = crate::BitWriter<'a, REG, Lecie>; +impl<'a, REG> LecieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Last error code interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LECIE_A::VALUE1) + self.variant(Lecie::Value1) } #[doc = "Last error code interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LECIE_A::VALUE2) + self.variant(Lecie::Value2) } } -#[doc = "Field `ALIE` reader - Alert Interrupt Enable"] -pub type ALIE_R = crate::BitReader; #[doc = "Alert Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALIE_A { +pub enum Alie { #[doc = "0: Alert interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Alert interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALIE_A) -> Self { + fn from(variant: Alie) -> Self { variant as u8 != 0 } } -impl ALIE_R { +#[doc = "Field `ALIE` reader - Alert Interrupt Enable"] +pub type AlieR = crate::BitReader; +impl AlieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALIE_A { + pub const fn variant(&self) -> Alie { match self.bits { - false => ALIE_A::VALUE1, - true => ALIE_A::VALUE2, + false => Alie::Value1, + true => Alie::Value2, } } #[doc = "Alert interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALIE_A::VALUE1 + *self == Alie::Value1 } #[doc = "Alert interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALIE_A::VALUE2 + *self == Alie::Value2 } } #[doc = "Field `ALIE` writer - Alert Interrupt Enable"] -pub type ALIE_W<'a, REG> = crate::BitWriter<'a, REG, ALIE_A>; -impl<'a, REG> ALIE_W<'a, REG> +pub type AlieW<'a, REG> = crate::BitWriter<'a, REG, Alie>; +impl<'a, REG> AlieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Alert interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALIE_A::VALUE1) + self.variant(Alie::Value1) } #[doc = "Alert interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALIE_A::VALUE2) + self.variant(Alie::Value2) } } #[doc = "Field `CANDIS` reader - CAN Disable"] -pub type CANDIS_R = crate::BitReader; +pub type CandisR = crate::BitReader; #[doc = "Field `CANDIS` writer - CAN Disable"] -pub type CANDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CandisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDIS` reader - Transmit Disable"] -pub type TXDIS_R = crate::BitReader; +pub type TxdisR = crate::BitReader; #[doc = "Field `TXDIS` writer - Transmit Disable"] -pub type TXDIS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `CCE` reader - Configuration Change Enable"] -pub type CCE_R = crate::BitReader; +pub type TxdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Configuration Change Enable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCE_A { +pub enum Cce { #[doc = "0: The Bit Timing Register, the Port Control Register, Error Counter Register may only be read. All attempts to modify them are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The Bit Timing Register, the Port Control Register, Error Counter Register may be read and written."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCE_A) -> Self { + fn from(variant: Cce) -> Self { variant as u8 != 0 } } -impl CCE_R { +#[doc = "Field `CCE` reader - Configuration Change Enable"] +pub type CceR = crate::BitReader; +impl CceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCE_A { + pub const fn variant(&self) -> Cce { match self.bits { - false => CCE_A::VALUE1, - true => CCE_A::VALUE2, + false => Cce::Value1, + true => Cce::Value2, } } #[doc = "The Bit Timing Register, the Port Control Register, Error Counter Register may only be read. All attempts to modify them are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCE_A::VALUE1 + *self == Cce::Value1 } #[doc = "The Bit Timing Register, the Port Control Register, Error Counter Register may be read and written."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCE_A::VALUE2 + *self == Cce::Value2 } } #[doc = "Field `CCE` writer - Configuration Change Enable"] -pub type CCE_W<'a, REG> = crate::BitWriter<'a, REG, CCE_A>; -impl<'a, REG> CCE_W<'a, REG> +pub type CceW<'a, REG> = crate::BitWriter<'a, REG, Cce>; +impl<'a, REG> CceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The Bit Timing Register, the Port Control Register, Error Counter Register may only be read. All attempts to modify them are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCE_A::VALUE1) + self.variant(Cce::Value1) } #[doc = "The Bit Timing Register, the Port Control Register, Error Counter Register may be read and written."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCE_A::VALUE2) + self.variant(Cce::Value2) } } #[doc = "Field `CALM` reader - CAN Analyzer Mode"] -pub type CALM_R = crate::BitReader; +pub type CalmR = crate::BitReader; #[doc = "Field `CALM` writer - CAN Analyzer Mode"] -pub type CALM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CalmW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Node Initialization"] #[inline(always)] - pub fn init(&self) -> INIT_R { - INIT_R::new((self.bits & 1) != 0) + pub fn init(&self) -> InitR { + InitR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transfer Interrupt Enable"] #[inline(always)] - pub fn trie(&self) -> TRIE_R { - TRIE_R::new(((self.bits >> 1) & 1) != 0) + pub fn trie(&self) -> TrieR { + TrieR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"] #[inline(always)] - pub fn lecie(&self) -> LECIE_R { - LECIE_R::new(((self.bits >> 2) & 1) != 0) + pub fn lecie(&self) -> LecieR { + LecieR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Alert Interrupt Enable"] #[inline(always)] - pub fn alie(&self) -> ALIE_R { - ALIE_R::new(((self.bits >> 3) & 1) != 0) + pub fn alie(&self) -> AlieR { + AlieR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CAN Disable"] #[inline(always)] - pub fn candis(&self) -> CANDIS_R { - CANDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn candis(&self) -> CandisR { + CandisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Transmit Disable"] #[inline(always)] - pub fn txdis(&self) -> TXDIS_R { - TXDIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn txdis(&self) -> TxdisR { + TxdisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Configuration Change Enable"] #[inline(always)] - pub fn cce(&self) -> CCE_R { - CCE_R::new(((self.bits >> 6) & 1) != 0) + pub fn cce(&self) -> CceR { + CceR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - CAN Analyzer Mode"] #[inline(always)] - pub fn calm(&self) -> CALM_R { - CALM_R::new(((self.bits >> 7) & 1) != 0) + pub fn calm(&self) -> CalmR { + CalmR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Node Initialization"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> INIT_W { - INIT_W::new(self, 0) + pub fn init(&mut self) -> InitW { + InitW::new(self, 0) } #[doc = "Bit 1 - Transfer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn trie(&mut self) -> TRIE_W { - TRIE_W::new(self, 1) + pub fn trie(&mut self) -> TrieW { + TrieW::new(self, 1) } #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn lecie(&mut self) -> LECIE_W { - LECIE_W::new(self, 2) + pub fn lecie(&mut self) -> LecieW { + LecieW::new(self, 2) } #[doc = "Bit 3 - Alert Interrupt Enable"] #[inline(always)] #[must_use] - pub fn alie(&mut self) -> ALIE_W { - ALIE_W::new(self, 3) + pub fn alie(&mut self) -> AlieW { + AlieW::new(self, 3) } #[doc = "Bit 4 - CAN Disable"] #[inline(always)] #[must_use] - pub fn candis(&mut self) -> CANDIS_W { - CANDIS_W::new(self, 4) + pub fn candis(&mut self) -> CandisW { + CandisW::new(self, 4) } #[doc = "Bit 5 - Transmit Disable"] #[inline(always)] #[must_use] - pub fn txdis(&mut self) -> TXDIS_W { - TXDIS_W::new(self, 5) + pub fn txdis(&mut self) -> TxdisW { + TxdisW::new(self, 5) } #[doc = "Bit 6 - Configuration Change Enable"] #[inline(always)] #[must_use] - pub fn cce(&mut self) -> CCE_W { - CCE_W::new(self, 6) + pub fn cce(&mut self) -> CceW { + CceW::new(self, 6) } #[doc = "Bit 7 - CAN Analyzer Mode"] #[inline(always)] #[must_use] - pub fn calm(&mut self) -> CALM_W { - CALM_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn calm(&mut self) -> CalmW { + CalmW::new(self, 7) } } #[doc = "Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NCR_SPEC; -impl crate::RegisterSpec for NCR_SPEC { +pub struct NcrSpec; +impl crate::RegisterSpec for NcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ncr::R`](R) reader structure"] -impl crate::Readable for NCR_SPEC {} +impl crate::Readable for NcrSpec {} #[doc = "`write(|w| ..)` method takes [`ncr::W`](W) writer structure"] -impl crate::Writable for NCR_SPEC { +impl crate::Writable for NcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NCR to value 0x41"] -impl crate::Resettable for NCR_SPEC { +impl crate::Resettable for NcrSpec { const RESET_VALUE: u32 = 0x41; } diff --git a/src/can_node0/necnt.rs b/src/can_node0/necnt.rs index 82fe9089..5b8e1a1e 100644 --- a/src/can_node0/necnt.rs +++ b/src/can_node0/necnt.rs @@ -1,161 +1,152 @@ #[doc = "Register `NECNT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NECNT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REC` reader - Receive Error Counter"] -pub type REC_R = crate::FieldReader; +pub type RecR = crate::FieldReader; #[doc = "Field `REC` writer - Receive Error Counter"] -pub type REC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type RecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TEC` reader - Transmit Error Counter"] -pub type TEC_R = crate::FieldReader; +pub type TecR = crate::FieldReader; #[doc = "Field `TEC` writer - Transmit Error Counter"] -pub type TEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type TecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `EWRNLVL` reader - Error Warning Level"] -pub type EWRNLVL_R = crate::FieldReader; +pub type EwrnlvlR = crate::FieldReader; #[doc = "Field `EWRNLVL` writer - Error Warning Level"] -pub type EWRNLVL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `LETD` reader - Last Error Transfer Direction"] -pub type LETD_R = crate::BitReader; +pub type EwrnlvlW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Last Error Transfer Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LETD_A { +pub enum Letd { #[doc = "0: The last error occurred while the CAN node x was receiver (REC has been incremented)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The last error occurred while the CAN node x was transmitter (TEC has been incremented)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LETD_A) -> Self { + fn from(variant: Letd) -> Self { variant as u8 != 0 } } -impl LETD_R { +#[doc = "Field `LETD` reader - Last Error Transfer Direction"] +pub type LetdR = crate::BitReader; +impl LetdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LETD_A { + pub const fn variant(&self) -> Letd { match self.bits { - false => LETD_A::VALUE1, - true => LETD_A::VALUE2, + false => Letd::Value1, + true => Letd::Value2, } } #[doc = "The last error occurred while the CAN node x was receiver (REC has been incremented)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LETD_A::VALUE1 + *self == Letd::Value1 } #[doc = "The last error occurred while the CAN node x was transmitter (TEC has been incremented)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LETD_A::VALUE2 + *self == Letd::Value2 } } -#[doc = "Field `LEINC` reader - Last Error Increment"] -pub type LEINC_R = crate::BitReader; #[doc = "Last Error Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEINC_A { +pub enum Leinc { #[doc = "0: The last error led to an error counter increment of 1."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The last error led to an error counter increment of 8."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEINC_A) -> Self { + fn from(variant: Leinc) -> Self { variant as u8 != 0 } } -impl LEINC_R { +#[doc = "Field `LEINC` reader - Last Error Increment"] +pub type LeincR = crate::BitReader; +impl LeincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LEINC_A { + pub const fn variant(&self) -> Leinc { match self.bits { - false => LEINC_A::VALUE1, - true => LEINC_A::VALUE2, + false => Leinc::Value1, + true => Leinc::Value2, } } #[doc = "The last error led to an error counter increment of 1."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LEINC_A::VALUE1 + *self == Leinc::Value1 } #[doc = "The last error led to an error counter increment of 8."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LEINC_A::VALUE2 + *self == Leinc::Value2 } } impl R { #[doc = "Bits 0:7 - Receive Error Counter"] #[inline(always)] - pub fn rec(&self) -> REC_R { - REC_R::new((self.bits & 0xff) as u8) + pub fn rec(&self) -> RecR { + RecR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Transmit Error Counter"] #[inline(always)] - pub fn tec(&self) -> TEC_R { - TEC_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn tec(&self) -> TecR { + TecR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Error Warning Level"] #[inline(always)] - pub fn ewrnlvl(&self) -> EWRNLVL_R { - EWRNLVL_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn ewrnlvl(&self) -> EwrnlvlR { + EwrnlvlR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - Last Error Transfer Direction"] #[inline(always)] - pub fn letd(&self) -> LETD_R { - LETD_R::new(((self.bits >> 24) & 1) != 0) + pub fn letd(&self) -> LetdR { + LetdR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Last Error Increment"] #[inline(always)] - pub fn leinc(&self) -> LEINC_R { - LEINC_R::new(((self.bits >> 25) & 1) != 0) + pub fn leinc(&self) -> LeincR { + LeincR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Receive Error Counter"] #[inline(always)] #[must_use] - pub fn rec(&mut self) -> REC_W { - REC_W::new(self, 0) + pub fn rec(&mut self) -> RecW { + RecW::new(self, 0) } #[doc = "Bits 8:15 - Transmit Error Counter"] #[inline(always)] #[must_use] - pub fn tec(&mut self) -> TEC_W { - TEC_W::new(self, 8) + pub fn tec(&mut self) -> TecW { + TecW::new(self, 8) } #[doc = "Bits 16:23 - Error Warning Level"] #[inline(always)] #[must_use] - pub fn ewrnlvl(&mut self) -> EWRNLVL_W { - EWRNLVL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ewrnlvl(&mut self) -> EwrnlvlW { + EwrnlvlW::new(self, 16) } } #[doc = "Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NECNT_SPEC; -impl crate::RegisterSpec for NECNT_SPEC { +pub struct NecntSpec; +impl crate::RegisterSpec for NecntSpec { type Ux = u32; } #[doc = "`read()` method returns [`necnt::R`](R) reader structure"] -impl crate::Readable for NECNT_SPEC {} +impl crate::Readable for NecntSpec {} #[doc = "`write(|w| ..)` method takes [`necnt::W`](W) writer structure"] -impl crate::Writable for NECNT_SPEC { +impl crate::Writable for NecntSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NECNT to value 0x0060_0000"] -impl crate::Resettable for NECNT_SPEC { +impl crate::Resettable for NecntSpec { const RESET_VALUE: u32 = 0x0060_0000; } diff --git a/src/can_node0/nfcr.rs b/src/can_node0/nfcr.rs index 7c092a01..f6705d63 100644 --- a/src/can_node0/nfcr.rs +++ b/src/can_node0/nfcr.rs @@ -1,75 +1,75 @@ #[doc = "Register `NFCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NFCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CFC` reader - CAN Frame Counter"] -pub type CFC_R = crate::FieldReader; +pub type CfcR = crate::FieldReader; #[doc = "Field `CFC` writer - CAN Frame Counter"] -pub type CFC_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CfcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `CFSEL` reader - CAN Frame Count Selection"] -pub type CFSEL_R = crate::FieldReader; +pub type CfselR = crate::FieldReader; #[doc = "Field `CFSEL` writer - CAN Frame Count Selection"] -pub type CFSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `CFMOD` reader - CAN Frame Counter Mode"] -pub type CFMOD_R = crate::FieldReader; +pub type CfselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "CAN Frame Counter Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CFMOD_A { +pub enum Cfmod { #[doc = "0: Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Time Stamp Mode: The frame counter is used to count bit times."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bit Timing Mode: The frame counter is used for analysis of the bit timing."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Error Count Mode: The frame counter is used for counting when an error frame is received or an error is detected by the node."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CFMOD_A) -> Self { + fn from(variant: Cfmod) -> Self { variant as _ } } -impl crate::FieldSpec for CFMOD_A { +impl crate::FieldSpec for Cfmod { type Ux = u8; } -impl CFMOD_R { +#[doc = "Field `CFMOD` reader - CAN Frame Counter Mode"] +pub type CfmodR = crate::FieldReader; +impl CfmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFMOD_A { + pub const fn variant(&self) -> Cfmod { match self.bits { - 0 => CFMOD_A::VALUE1, - 1 => CFMOD_A::VALUE2, - 2 => CFMOD_A::VALUE3, - 3 => CFMOD_A::VALUE4, + 0 => Cfmod::Value1, + 1 => Cfmod::Value2, + 2 => Cfmod::Value3, + 3 => Cfmod::Value4, _ => unreachable!(), } } #[doc = "Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFMOD_A::VALUE1 + *self == Cfmod::Value1 } #[doc = "Time Stamp Mode: The frame counter is used to count bit times."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFMOD_A::VALUE2 + *self == Cfmod::Value2 } #[doc = "Bit Timing Mode: The frame counter is used for analysis of the bit timing."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CFMOD_A::VALUE3 + *self == Cfmod::Value3 } #[doc = "Error Count Mode: The frame counter is used for counting when an error frame is received or an error is detected by the node."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CFMOD_A::VALUE4 + *self == Cfmod::Value4 } } #[doc = "Field `CFMOD` writer - CAN Frame Counter Mode"] -pub type CFMOD_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CFMOD_A>; -impl<'a, REG> CFMOD_W<'a, REG> +pub type CfmodW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cfmod>; +impl<'a, REG> CfmodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,212 +77,203 @@ where #[doc = "Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFMOD_A::VALUE1) + self.variant(Cfmod::Value1) } #[doc = "Time Stamp Mode: The frame counter is used to count bit times."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFMOD_A::VALUE2) + self.variant(Cfmod::Value2) } #[doc = "Bit Timing Mode: The frame counter is used for analysis of the bit timing."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CFMOD_A::VALUE3) + self.variant(Cfmod::Value3) } #[doc = "Error Count Mode: The frame counter is used for counting when an error frame is received or an error is detected by the node."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CFMOD_A::VALUE4) + self.variant(Cfmod::Value4) } } -#[doc = "Field `CFCIE` reader - CAN Frame Count Interrupt Enable"] -pub type CFCIE_R = crate::BitReader; #[doc = "CAN Frame Count Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFCIE_A { +pub enum Cfcie { #[doc = "0: CAN frame counter overflow interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CAN frame counter overflow interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFCIE_A) -> Self { + fn from(variant: Cfcie) -> Self { variant as u8 != 0 } } -impl CFCIE_R { +#[doc = "Field `CFCIE` reader - CAN Frame Count Interrupt Enable"] +pub type CfcieR = crate::BitReader; +impl CfcieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFCIE_A { + pub const fn variant(&self) -> Cfcie { match self.bits { - false => CFCIE_A::VALUE1, - true => CFCIE_A::VALUE2, + false => Cfcie::Value1, + true => Cfcie::Value2, } } #[doc = "CAN frame counter overflow interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFCIE_A::VALUE1 + *self == Cfcie::Value1 } #[doc = "CAN frame counter overflow interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFCIE_A::VALUE2 + *self == Cfcie::Value2 } } #[doc = "Field `CFCIE` writer - CAN Frame Count Interrupt Enable"] -pub type CFCIE_W<'a, REG> = crate::BitWriter<'a, REG, CFCIE_A>; -impl<'a, REG> CFCIE_W<'a, REG> +pub type CfcieW<'a, REG> = crate::BitWriter<'a, REG, Cfcie>; +impl<'a, REG> CfcieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CAN frame counter overflow interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFCIE_A::VALUE1) + self.variant(Cfcie::Value1) } #[doc = "CAN frame counter overflow interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFCIE_A::VALUE2) + self.variant(Cfcie::Value2) } } -#[doc = "Field `CFCOV` reader - CAN Frame Counter Overflow Flag"] -pub type CFCOV_R = crate::BitReader; #[doc = "CAN Frame Counter Overflow Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFCOV_A { +pub enum Cfcov { #[doc = "0: No overflow has occurred since last flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An overflow has occurred since last flag reset."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFCOV_A) -> Self { + fn from(variant: Cfcov) -> Self { variant as u8 != 0 } } -impl CFCOV_R { +#[doc = "Field `CFCOV` reader - CAN Frame Counter Overflow Flag"] +pub type CfcovR = crate::BitReader; +impl CfcovR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFCOV_A { + pub const fn variant(&self) -> Cfcov { match self.bits { - false => CFCOV_A::VALUE1, - true => CFCOV_A::VALUE2, + false => Cfcov::Value1, + true => Cfcov::Value2, } } #[doc = "No overflow has occurred since last flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFCOV_A::VALUE1 + *self == Cfcov::Value1 } #[doc = "An overflow has occurred since last flag reset."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFCOV_A::VALUE2 + *self == Cfcov::Value2 } } #[doc = "Field `CFCOV` writer - CAN Frame Counter Overflow Flag"] -pub type CFCOV_W<'a, REG> = crate::BitWriter<'a, REG, CFCOV_A>; -impl<'a, REG> CFCOV_W<'a, REG> +pub type CfcovW<'a, REG> = crate::BitWriter<'a, REG, Cfcov>; +impl<'a, REG> CfcovW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No overflow has occurred since last flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFCOV_A::VALUE1) + self.variant(Cfcov::Value1) } #[doc = "An overflow has occurred since last flag reset."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFCOV_A::VALUE2) + self.variant(Cfcov::Value2) } } impl R { #[doc = "Bits 0:15 - CAN Frame Counter"] #[inline(always)] - pub fn cfc(&self) -> CFC_R { - CFC_R::new((self.bits & 0xffff) as u16) + pub fn cfc(&self) -> CfcR { + CfcR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:18 - CAN Frame Count Selection"] #[inline(always)] - pub fn cfsel(&self) -> CFSEL_R { - CFSEL_R::new(((self.bits >> 16) & 7) as u8) + pub fn cfsel(&self) -> CfselR { + CfselR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:20 - CAN Frame Counter Mode"] #[inline(always)] - pub fn cfmod(&self) -> CFMOD_R { - CFMOD_R::new(((self.bits >> 19) & 3) as u8) + pub fn cfmod(&self) -> CfmodR { + CfmodR::new(((self.bits >> 19) & 3) as u8) } #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"] #[inline(always)] - pub fn cfcie(&self) -> CFCIE_R { - CFCIE_R::new(((self.bits >> 22) & 1) != 0) + pub fn cfcie(&self) -> CfcieR { + CfcieR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"] #[inline(always)] - pub fn cfcov(&self) -> CFCOV_R { - CFCOV_R::new(((self.bits >> 23) & 1) != 0) + pub fn cfcov(&self) -> CfcovR { + CfcovR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - CAN Frame Counter"] #[inline(always)] #[must_use] - pub fn cfc(&mut self) -> CFC_W { - CFC_W::new(self, 0) + pub fn cfc(&mut self) -> CfcW { + CfcW::new(self, 0) } #[doc = "Bits 16:18 - CAN Frame Count Selection"] #[inline(always)] #[must_use] - pub fn cfsel(&mut self) -> CFSEL_W { - CFSEL_W::new(self, 16) + pub fn cfsel(&mut self) -> CfselW { + CfselW::new(self, 16) } #[doc = "Bits 19:20 - CAN Frame Counter Mode"] #[inline(always)] #[must_use] - pub fn cfmod(&mut self) -> CFMOD_W { - CFMOD_W::new(self, 19) + pub fn cfmod(&mut self) -> CfmodW { + CfmodW::new(self, 19) } #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cfcie(&mut self) -> CFCIE_W { - CFCIE_W::new(self, 22) + pub fn cfcie(&mut self) -> CfcieW { + CfcieW::new(self, 22) } #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"] #[inline(always)] #[must_use] - pub fn cfcov(&mut self) -> CFCOV_W { - CFCOV_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cfcov(&mut self) -> CfcovW { + CfcovW::new(self, 23) } } #[doc = "Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NFCR_SPEC; -impl crate::RegisterSpec for NFCR_SPEC { +pub struct NfcrSpec; +impl crate::RegisterSpec for NfcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`nfcr::R`](R) reader structure"] -impl crate::Readable for NFCR_SPEC {} +impl crate::Readable for NfcrSpec {} #[doc = "`write(|w| ..)` method takes [`nfcr::W`](W) writer structure"] -impl crate::Writable for NFCR_SPEC { +impl crate::Writable for NfcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NFCR to value 0"] -impl crate::Resettable for NFCR_SPEC { +impl crate::Resettable for NfcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/nipr.rs b/src/can_node0/nipr.rs index 78ac9fc8..29d9b4a3 100644 --- a/src/can_node0/nipr.rs +++ b/src/can_node0/nipr.rs @@ -1,67 +1,67 @@ #[doc = "Register `NIPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NIPR` writer"] -pub type W = crate::W; -#[doc = "Field `ALINP` reader - Alert Interrupt Node Pointer"] -pub type ALINP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Alert Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ALINP_A { +pub enum Alinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ALINP_A) -> Self { + fn from(variant: Alinp) -> Self { variant as _ } } -impl crate::FieldSpec for ALINP_A { +impl crate::FieldSpec for Alinp { type Ux = u8; } -impl ALINP_R { +#[doc = "Field `ALINP` reader - Alert Interrupt Node Pointer"] +pub type AlinpR = crate::FieldReader; +impl AlinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ALINP_A::VALUE1), - 1 => Some(ALINP_A::VALUE2), - 14 => Some(ALINP_A::VALUE3), - 15 => Some(ALINP_A::VALUE4), + 0 => Some(Alinp::Value1), + 1 => Some(Alinp::Value2), + 14 => Some(Alinp::Value3), + 15 => Some(Alinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALINP_A::VALUE1 + *self == Alinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALINP_A::VALUE2 + *self == Alinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ALINP_A::VALUE3 + *self == Alinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ALINP_A::VALUE4 + *self == Alinp::Value4 } } #[doc = "Field `ALINP` writer - Alert Interrupt Node Pointer"] -pub type ALINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ALINP_A>; -impl<'a, REG> ALINP_W<'a, REG> +pub type AlinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Alinp>; +impl<'a, REG> AlinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALINP_A::VALUE1) + self.variant(Alinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALINP_A::VALUE2) + self.variant(Alinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ALINP_A::VALUE3) + self.variant(Alinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ALINP_A::VALUE4) + self.variant(Alinp::Value4) } } -#[doc = "Field `LECINP` reader - Last Error Code Interrupt Node Pointer"] -pub type LECINP_R = crate::FieldReader; #[doc = "Last Error Code Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LECINP_A { +pub enum Lecinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LECINP_A) -> Self { + fn from(variant: Lecinp) -> Self { variant as _ } } -impl crate::FieldSpec for LECINP_A { +impl crate::FieldSpec for Lecinp { type Ux = u8; } -impl LECINP_R { +#[doc = "Field `LECINP` reader - Last Error Code Interrupt Node Pointer"] +pub type LecinpR = crate::FieldReader; +impl LecinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LECINP_A::VALUE1), - 1 => Some(LECINP_A::VALUE2), - 14 => Some(LECINP_A::VALUE3), - 15 => Some(LECINP_A::VALUE4), + 0 => Some(Lecinp::Value1), + 1 => Some(Lecinp::Value2), + 14 => Some(Lecinp::Value3), + 15 => Some(Lecinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LECINP_A::VALUE1 + *self == Lecinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LECINP_A::VALUE2 + *self == Lecinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LECINP_A::VALUE3 + *self == Lecinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LECINP_A::VALUE4 + *self == Lecinp::Value4 } } #[doc = "Field `LECINP` writer - Last Error Code Interrupt Node Pointer"] -pub type LECINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, LECINP_A>; -impl<'a, REG> LECINP_W<'a, REG> +pub type LecinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Lecinp>; +impl<'a, REG> LecinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LECINP_A::VALUE1) + self.variant(Lecinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LECINP_A::VALUE2) + self.variant(Lecinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LECINP_A::VALUE3) + self.variant(Lecinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LECINP_A::VALUE4) + self.variant(Lecinp::Value4) } } -#[doc = "Field `TRINP` reader - Transfer OK Interrupt Node Pointer"] -pub type TRINP_R = crate::FieldReader; #[doc = "Transfer OK Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRINP_A { +pub enum Trinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRINP_A) -> Self { + fn from(variant: Trinp) -> Self { variant as _ } } -impl crate::FieldSpec for TRINP_A { +impl crate::FieldSpec for Trinp { type Ux = u8; } -impl TRINP_R { +#[doc = "Field `TRINP` reader - Transfer OK Interrupt Node Pointer"] +pub type TrinpR = crate::FieldReader; +impl TrinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRINP_A::VALUE1), - 1 => Some(TRINP_A::VALUE2), - 14 => Some(TRINP_A::VALUE3), - 15 => Some(TRINP_A::VALUE4), + 0 => Some(Trinp::Value1), + 1 => Some(Trinp::Value2), + 14 => Some(Trinp::Value3), + 15 => Some(Trinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRINP_A::VALUE1 + *self == Trinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRINP_A::VALUE2 + *self == Trinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TRINP_A::VALUE3 + *self == Trinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TRINP_A::VALUE4 + *self == Trinp::Value4 } } #[doc = "Field `TRINP` writer - Transfer OK Interrupt Node Pointer"] -pub type TRINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, TRINP_A>; -impl<'a, REG> TRINP_W<'a, REG> +pub type TrinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Trinp>; +impl<'a, REG> TrinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRINP_A::VALUE1) + self.variant(Trinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRINP_A::VALUE2) + self.variant(Trinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TRINP_A::VALUE3) + self.variant(Trinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TRINP_A::VALUE4) + self.variant(Trinp::Value4) } } -#[doc = "Field `CFCINP` reader - Frame Counter Interrupt Node Pointer"] -pub type CFCINP_R = crate::FieldReader; #[doc = "Frame Counter Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CFCINP_A { +pub enum Cfcinp { #[doc = "0: Interrupt output line INT_O0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: Interrupt output line INT_O14 is selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: Interrupt output line INT_O15 is selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CFCINP_A) -> Self { + fn from(variant: Cfcinp) -> Self { variant as _ } } -impl crate::FieldSpec for CFCINP_A { +impl crate::FieldSpec for Cfcinp { type Ux = u8; } -impl CFCINP_R { +#[doc = "Field `CFCINP` reader - Frame Counter Interrupt Node Pointer"] +pub type CfcinpR = crate::FieldReader; +impl CfcinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CFCINP_A::VALUE1), - 1 => Some(CFCINP_A::VALUE2), - 14 => Some(CFCINP_A::VALUE3), - 15 => Some(CFCINP_A::VALUE4), + 0 => Some(Cfcinp::Value1), + 1 => Some(Cfcinp::Value2), + 14 => Some(Cfcinp::Value3), + 15 => Some(Cfcinp::Value4), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFCINP_A::VALUE1 + *self == Cfcinp::Value1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFCINP_A::VALUE2 + *self == Cfcinp::Value2 } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CFCINP_A::VALUE3 + *self == Cfcinp::Value3 } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CFCINP_A::VALUE4 + *self == Cfcinp::Value4 } } #[doc = "Field `CFCINP` writer - Frame Counter Interrupt Node Pointer"] -pub type CFCINP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CFCINP_A>; -impl<'a, REG> CFCINP_W<'a, REG> +pub type CfcinpW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cfcinp>; +impl<'a, REG> CfcinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,95 +324,86 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFCINP_A::VALUE1) + self.variant(Cfcinp::Value1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFCINP_A::VALUE2) + self.variant(Cfcinp::Value2) } #[doc = "Interrupt output line INT_O14 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CFCINP_A::VALUE3) + self.variant(Cfcinp::Value3) } #[doc = "Interrupt output line INT_O15 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CFCINP_A::VALUE4) + self.variant(Cfcinp::Value4) } } impl R { #[doc = "Bits 0:3 - Alert Interrupt Node Pointer"] #[inline(always)] - pub fn alinp(&self) -> ALINP_R { - ALINP_R::new((self.bits & 0x0f) as u8) + pub fn alinp(&self) -> AlinpR { + AlinpR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Last Error Code Interrupt Node Pointer"] #[inline(always)] - pub fn lecinp(&self) -> LECINP_R { - LECINP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn lecinp(&self) -> LecinpR { + LecinpR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Transfer OK Interrupt Node Pointer"] #[inline(always)] - pub fn trinp(&self) -> TRINP_R { - TRINP_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn trinp(&self) -> TrinpR { + TrinpR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Frame Counter Interrupt Node Pointer"] #[inline(always)] - pub fn cfcinp(&self) -> CFCINP_R { - CFCINP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn cfcinp(&self) -> CfcinpR { + CfcinpR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Alert Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn alinp(&mut self) -> ALINP_W { - ALINP_W::new(self, 0) + pub fn alinp(&mut self) -> AlinpW { + AlinpW::new(self, 0) } #[doc = "Bits 4:7 - Last Error Code Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn lecinp(&mut self) -> LECINP_W { - LECINP_W::new(self, 4) + pub fn lecinp(&mut self) -> LecinpW { + LecinpW::new(self, 4) } #[doc = "Bits 8:11 - Transfer OK Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn trinp(&mut self) -> TRINP_W { - TRINP_W::new(self, 8) + pub fn trinp(&mut self) -> TrinpW { + TrinpW::new(self, 8) } #[doc = "Bits 12:15 - Frame Counter Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn cfcinp(&mut self) -> CFCINP_W { - CFCINP_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cfcinp(&mut self) -> CfcinpW { + CfcinpW::new(self, 12) } } #[doc = "Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NIPR_SPEC; -impl crate::RegisterSpec for NIPR_SPEC { +pub struct NiprSpec; +impl crate::RegisterSpec for NiprSpec { type Ux = u32; } #[doc = "`read()` method returns [`nipr::R`](R) reader structure"] -impl crate::Readable for NIPR_SPEC {} +impl crate::Readable for NiprSpec {} #[doc = "`write(|w| ..)` method takes [`nipr::W`](W) writer structure"] -impl crate::Writable for NIPR_SPEC { +impl crate::Writable for NiprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NIPR to value 0"] -impl crate::Resettable for NIPR_SPEC { +impl crate::Resettable for NiprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/npcr.rs b/src/can_node0/npcr.rs index f010c856..d83809a6 100644 --- a/src/can_node0/npcr.rs +++ b/src/can_node0/npcr.rs @@ -1,113 +1,104 @@ #[doc = "Register `NPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RXSEL` reader - Receive Select"] -pub type RXSEL_R = crate::FieldReader; +pub type RxselR = crate::FieldReader; #[doc = "Field `RXSEL` writer - Receive Select"] -pub type RXSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `LBM` reader - Loop-Back Mode"] -pub type LBM_R = crate::BitReader; +pub type RxselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Loop-Back Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LBM_A { +pub enum Lbm { #[doc = "0: Loop-Back Mode is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LBM_A) -> Self { + fn from(variant: Lbm) -> Self { variant as u8 != 0 } } -impl LBM_R { +#[doc = "Field `LBM` reader - Loop-Back Mode"] +pub type LbmR = crate::BitReader; +impl LbmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LBM_A { + pub const fn variant(&self) -> Lbm { match self.bits { - false => LBM_A::VALUE1, - true => LBM_A::VALUE2, + false => Lbm::Value1, + true => Lbm::Value2, } } #[doc = "Loop-Back Mode is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LBM_A::VALUE1 + *self == Lbm::Value1 } #[doc = "Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LBM_A::VALUE2 + *self == Lbm::Value2 } } #[doc = "Field `LBM` writer - Loop-Back Mode"] -pub type LBM_W<'a, REG> = crate::BitWriter<'a, REG, LBM_A>; -impl<'a, REG> LBM_W<'a, REG> +pub type LbmW<'a, REG> = crate::BitWriter<'a, REG, Lbm>; +impl<'a, REG> LbmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Loop-Back Mode is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LBM_A::VALUE1) + self.variant(Lbm::Value1) } #[doc = "Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LBM_A::VALUE2) + self.variant(Lbm::Value2) } } impl R { #[doc = "Bits 0:2 - Receive Select"] #[inline(always)] - pub fn rxsel(&self) -> RXSEL_R { - RXSEL_R::new((self.bits & 7) as u8) + pub fn rxsel(&self) -> RxselR { + RxselR::new((self.bits & 7) as u8) } #[doc = "Bit 8 - Loop-Back Mode"] #[inline(always)] - pub fn lbm(&self) -> LBM_R { - LBM_R::new(((self.bits >> 8) & 1) != 0) + pub fn lbm(&self) -> LbmR { + LbmR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Receive Select"] #[inline(always)] #[must_use] - pub fn rxsel(&mut self) -> RXSEL_W { - RXSEL_W::new(self, 0) + pub fn rxsel(&mut self) -> RxselW { + RxselW::new(self, 0) } #[doc = "Bit 8 - Loop-Back Mode"] #[inline(always)] #[must_use] - pub fn lbm(&mut self) -> LBM_W { - LBM_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn lbm(&mut self) -> LbmW { + LbmW::new(self, 8) } } #[doc = "Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NPCR_SPEC; -impl crate::RegisterSpec for NPCR_SPEC { +pub struct NpcrSpec; +impl crate::RegisterSpec for NpcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`npcr::R`](R) reader structure"] -impl crate::Readable for NPCR_SPEC {} +impl crate::Readable for NpcrSpec {} #[doc = "`write(|w| ..)` method takes [`npcr::W`](W) writer structure"] -impl crate::Writable for NPCR_SPEC { +impl crate::Writable for NpcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NPCR to value 0"] -impl crate::Resettable for NPCR_SPEC { +impl crate::Resettable for NpcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/nsr.rs b/src/can_node0/nsr.rs index f0434971..deaf1945 100644 --- a/src/can_node0/nsr.rs +++ b/src/can_node0/nsr.rs @@ -1,402 +1,393 @@ #[doc = "Register `NSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LEC` reader - Last Error Code"] -pub type LEC_R = crate::FieldReader; +pub type LecR = crate::FieldReader; #[doc = "Field `LEC` writer - Last Error Code"] -pub type LEC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `TXOK` reader - Message Transmitted Successfully"] -pub type TXOK_R = crate::BitReader; +pub type LecW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Message Transmitted Successfully\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXOK_A { +pub enum Txok { #[doc = "0: No successful transmission since last (most recent) flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A message has been transmitted successfully (error-free and acknowledged by at least another node)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXOK_A) -> Self { + fn from(variant: Txok) -> Self { variant as u8 != 0 } } -impl TXOK_R { +#[doc = "Field `TXOK` reader - Message Transmitted Successfully"] +pub type TxokR = crate::BitReader; +impl TxokR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXOK_A { + pub const fn variant(&self) -> Txok { match self.bits { - false => TXOK_A::VALUE1, - true => TXOK_A::VALUE2, + false => Txok::Value1, + true => Txok::Value2, } } #[doc = "No successful transmission since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXOK_A::VALUE1 + *self == Txok::Value1 } #[doc = "A message has been transmitted successfully (error-free and acknowledged by at least another node)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXOK_A::VALUE2 + *self == Txok::Value2 } } #[doc = "Field `TXOK` writer - Message Transmitted Successfully"] -pub type TXOK_W<'a, REG> = crate::BitWriter<'a, REG, TXOK_A>; -impl<'a, REG> TXOK_W<'a, REG> +pub type TxokW<'a, REG> = crate::BitWriter<'a, REG, Txok>; +impl<'a, REG> TxokW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No successful transmission since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TXOK_A::VALUE1) + self.variant(Txok::Value1) } #[doc = "A message has been transmitted successfully (error-free and acknowledged by at least another node)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TXOK_A::VALUE2) + self.variant(Txok::Value2) } } -#[doc = "Field `RXOK` reader - Message Received Successfully"] -pub type RXOK_R = crate::BitReader; #[doc = "Message Received Successfully\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXOK_A { +pub enum Rxok { #[doc = "0: No successful reception since last (most recent) flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A message has been received successfully."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXOK_A) -> Self { + fn from(variant: Rxok) -> Self { variant as u8 != 0 } } -impl RXOK_R { +#[doc = "Field `RXOK` reader - Message Received Successfully"] +pub type RxokR = crate::BitReader; +impl RxokR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXOK_A { + pub const fn variant(&self) -> Rxok { match self.bits { - false => RXOK_A::VALUE1, - true => RXOK_A::VALUE2, + false => Rxok::Value1, + true => Rxok::Value2, } } #[doc = "No successful reception since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXOK_A::VALUE1 + *self == Rxok::Value1 } #[doc = "A message has been received successfully."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXOK_A::VALUE2 + *self == Rxok::Value2 } } #[doc = "Field `RXOK` writer - Message Received Successfully"] -pub type RXOK_W<'a, REG> = crate::BitWriter<'a, REG, RXOK_A>; -impl<'a, REG> RXOK_W<'a, REG> +pub type RxokW<'a, REG> = crate::BitWriter<'a, REG, Rxok>; +impl<'a, REG> RxokW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No successful reception since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXOK_A::VALUE1) + self.variant(Rxok::Value1) } #[doc = "A message has been received successfully."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXOK_A::VALUE2) + self.variant(Rxok::Value2) } } #[doc = "Field `ALERT` reader - Alert Warning"] -pub type ALERT_R = crate::BitReader; +pub type AlertR = crate::BitReader; #[doc = "Field `ALERT` writer - Alert Warning"] -pub type ALERT_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `EWRN` reader - Error Warning Status"] -pub type EWRN_R = crate::BitReader; +pub type AlertW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Error Warning Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EWRN_A { +pub enum Ewrn { #[doc = "0: No warning limit exceeded."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One of the error counters REC or TEC reached the warning limit EWRNLVL."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EWRN_A) -> Self { + fn from(variant: Ewrn) -> Self { variant as u8 != 0 } } -impl EWRN_R { +#[doc = "Field `EWRN` reader - Error Warning Status"] +pub type EwrnR = crate::BitReader; +impl EwrnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EWRN_A { + pub const fn variant(&self) -> Ewrn { match self.bits { - false => EWRN_A::VALUE1, - true => EWRN_A::VALUE2, + false => Ewrn::Value1, + true => Ewrn::Value2, } } #[doc = "No warning limit exceeded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EWRN_A::VALUE1 + *self == Ewrn::Value1 } #[doc = "One of the error counters REC or TEC reached the warning limit EWRNLVL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EWRN_A::VALUE2 + *self == Ewrn::Value2 } } -#[doc = "Field `BOFF` reader - Bus-off Status"] -pub type BOFF_R = crate::BitReader; #[doc = "Bus-off Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BOFF_A { +pub enum Boff { #[doc = "0: CAN controller is not in the bus-off state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CAN controller is in the bus-off state."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BOFF_A) -> Self { + fn from(variant: Boff) -> Self { variant as u8 != 0 } } -impl BOFF_R { +#[doc = "Field `BOFF` reader - Bus-off Status"] +pub type BoffR = crate::BitReader; +impl BoffR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BOFF_A { + pub const fn variant(&self) -> Boff { match self.bits { - false => BOFF_A::VALUE1, - true => BOFF_A::VALUE2, + false => Boff::Value1, + true => Boff::Value2, } } #[doc = "CAN controller is not in the bus-off state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BOFF_A::VALUE1 + *self == Boff::Value1 } #[doc = "CAN controller is in the bus-off state."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BOFF_A::VALUE2 + *self == Boff::Value2 } } -#[doc = "Field `LLE` reader - List Length Error"] -pub type LLE_R = crate::BitReader; #[doc = "List Length Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LLE_A { +pub enum Lle { #[doc = "0: No List Length Error since last (most recent) flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LLE_A) -> Self { + fn from(variant: Lle) -> Self { variant as u8 != 0 } } -impl LLE_R { +#[doc = "Field `LLE` reader - List Length Error"] +pub type LleR = crate::BitReader; +impl LleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LLE_A { + pub const fn variant(&self) -> Lle { match self.bits { - false => LLE_A::VALUE1, - true => LLE_A::VALUE2, + false => Lle::Value1, + true => Lle::Value2, } } #[doc = "No List Length Error since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LLE_A::VALUE1 + *self == Lle::Value1 } #[doc = "A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LLE_A::VALUE2 + *self == Lle::Value2 } } #[doc = "Field `LLE` writer - List Length Error"] -pub type LLE_W<'a, REG> = crate::BitWriter<'a, REG, LLE_A>; -impl<'a, REG> LLE_W<'a, REG> +pub type LleW<'a, REG> = crate::BitWriter<'a, REG, Lle>; +impl<'a, REG> LleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No List Length Error since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LLE_A::VALUE1) + self.variant(Lle::Value1) } #[doc = "A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LLE_A::VALUE2) + self.variant(Lle::Value2) } } -#[doc = "Field `LOE` reader - List Object Error"] -pub type LOE_R = crate::BitReader; #[doc = "List Object Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOE_A { +pub enum Loe { #[doc = "0: No List Object Error since last (most recent) flag reset."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Status Register has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOE_A) -> Self { + fn from(variant: Loe) -> Self { variant as u8 != 0 } } -impl LOE_R { +#[doc = "Field `LOE` reader - List Object Error"] +pub type LoeR = crate::BitReader; +impl LoeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOE_A { + pub const fn variant(&self) -> Loe { match self.bits { - false => LOE_A::VALUE1, - true => LOE_A::VALUE2, + false => Loe::Value1, + true => Loe::Value2, } } #[doc = "No List Object Error since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOE_A::VALUE1 + *self == Loe::Value1 } #[doc = "A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Status Register has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOE_A::VALUE2 + *self == Loe::Value2 } } #[doc = "Field `LOE` writer - List Object Error"] -pub type LOE_W<'a, REG> = crate::BitWriter<'a, REG, LOE_A>; -impl<'a, REG> LOE_W<'a, REG> +pub type LoeW<'a, REG> = crate::BitWriter<'a, REG, Loe>; +impl<'a, REG> LoeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No List Object Error since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOE_A::VALUE1) + self.variant(Loe::Value1) } #[doc = "A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Status Register has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOE_A::VALUE2) + self.variant(Loe::Value2) } } impl R { #[doc = "Bits 0:2 - Last Error Code"] #[inline(always)] - pub fn lec(&self) -> LEC_R { - LEC_R::new((self.bits & 7) as u8) + pub fn lec(&self) -> LecR { + LecR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Message Transmitted Successfully"] #[inline(always)] - pub fn txok(&self) -> TXOK_R { - TXOK_R::new(((self.bits >> 3) & 1) != 0) + pub fn txok(&self) -> TxokR { + TxokR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Message Received Successfully"] #[inline(always)] - pub fn rxok(&self) -> RXOK_R { - RXOK_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxok(&self) -> RxokR { + RxokR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Alert Warning"] #[inline(always)] - pub fn alert(&self) -> ALERT_R { - ALERT_R::new(((self.bits >> 5) & 1) != 0) + pub fn alert(&self) -> AlertR { + AlertR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Error Warning Status"] #[inline(always)] - pub fn ewrn(&self) -> EWRN_R { - EWRN_R::new(((self.bits >> 6) & 1) != 0) + pub fn ewrn(&self) -> EwrnR { + EwrnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Bus-off Status"] #[inline(always)] - pub fn boff(&self) -> BOFF_R { - BOFF_R::new(((self.bits >> 7) & 1) != 0) + pub fn boff(&self) -> BoffR { + BoffR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - List Length Error"] #[inline(always)] - pub fn lle(&self) -> LLE_R { - LLE_R::new(((self.bits >> 8) & 1) != 0) + pub fn lle(&self) -> LleR { + LleR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - List Object Error"] #[inline(always)] - pub fn loe(&self) -> LOE_R { - LOE_R::new(((self.bits >> 9) & 1) != 0) + pub fn loe(&self) -> LoeR { + LoeR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Last Error Code"] #[inline(always)] #[must_use] - pub fn lec(&mut self) -> LEC_W { - LEC_W::new(self, 0) + pub fn lec(&mut self) -> LecW { + LecW::new(self, 0) } #[doc = "Bit 3 - Message Transmitted Successfully"] #[inline(always)] #[must_use] - pub fn txok(&mut self) -> TXOK_W { - TXOK_W::new(self, 3) + pub fn txok(&mut self) -> TxokW { + TxokW::new(self, 3) } #[doc = "Bit 4 - Message Received Successfully"] #[inline(always)] #[must_use] - pub fn rxok(&mut self) -> RXOK_W { - RXOK_W::new(self, 4) + pub fn rxok(&mut self) -> RxokW { + RxokW::new(self, 4) } #[doc = "Bit 5 - Alert Warning"] #[inline(always)] #[must_use] - pub fn alert(&mut self) -> ALERT_W { - ALERT_W::new(self, 5) + pub fn alert(&mut self) -> AlertW { + AlertW::new(self, 5) } #[doc = "Bit 8 - List Length Error"] #[inline(always)] #[must_use] - pub fn lle(&mut self) -> LLE_W { - LLE_W::new(self, 8) + pub fn lle(&mut self) -> LleW { + LleW::new(self, 8) } #[doc = "Bit 9 - List Object Error"] #[inline(always)] #[must_use] - pub fn loe(&mut self) -> LOE_W { - LOE_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn loe(&mut self) -> LoeW { + LoeW::new(self, 9) } } #[doc = "Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NSR_SPEC; -impl crate::RegisterSpec for NSR_SPEC { +pub struct NsrSpec; +impl crate::RegisterSpec for NsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`nsr::R`](R) reader structure"] -impl crate::Readable for NSR_SPEC {} +impl crate::Readable for NsrSpec {} #[doc = "`write(|w| ..)` method takes [`nsr::W`](W) writer structure"] -impl crate::Writable for NSR_SPEC { +impl crate::Writable for NsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSR to value 0"] -impl crate::Resettable for NSR_SPEC { +impl crate::Resettable for NsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40.rs b/src/ccu40.rs index 25d48f9c..6502f271 100644 --- a/src/ccu40.rs +++ b/src/ccu40.rs @@ -1,95 +1,103 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - gctrl: GCTRL, - gstat: GSTAT, - gidls: GIDLS, - gidlc: GIDLC, - gcss: GCSS, - gcsc: GCSC, - gcst: GCST, + gctrl: Gctrl, + gstat: Gstat, + gidls: Gidls, + gidlc: Gidlc, + gcss: Gcss, + gcsc: Gcsc, + gcst: Gcst, _reserved7: [u8; 0x64], - midr: MIDR, + midr: Midr, } impl RegisterBlock { #[doc = "0x00 - Global Control Register"] #[inline(always)] - pub const fn gctrl(&self) -> &GCTRL { + pub const fn gctrl(&self) -> &Gctrl { &self.gctrl } #[doc = "0x04 - Global Status Register"] #[inline(always)] - pub const fn gstat(&self) -> &GSTAT { + pub const fn gstat(&self) -> &Gstat { &self.gstat } #[doc = "0x08 - Global Idle Set"] #[inline(always)] - pub const fn gidls(&self) -> &GIDLS { + pub const fn gidls(&self) -> &Gidls { &self.gidls } #[doc = "0x0c - Global Idle Clear"] #[inline(always)] - pub const fn gidlc(&self) -> &GIDLC { + pub const fn gidlc(&self) -> &Gidlc { &self.gidlc } #[doc = "0x10 - Global Channel Set"] #[inline(always)] - pub const fn gcss(&self) -> &GCSS { + pub const fn gcss(&self) -> &Gcss { &self.gcss } #[doc = "0x14 - Global Channel Clear"] #[inline(always)] - pub const fn gcsc(&self) -> &GCSC { + pub const fn gcsc(&self) -> &Gcsc { &self.gcsc } #[doc = "0x18 - Global Channel Status"] #[inline(always)] - pub const fn gcst(&self) -> &GCST { + pub const fn gcst(&self) -> &Gcst { &self.gcst } #[doc = "0x80 - Module Identification"] #[inline(always)] - pub const fn midr(&self) -> &MIDR { + pub const fn midr(&self) -> &Midr { &self.midr } } #[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] -pub type GCTRL = crate::Reg; +#[doc(alias = "GCTRL")] +pub type Gctrl = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; #[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] -pub type GSTAT = crate::Reg; +#[doc(alias = "GSTAT")] +pub type Gstat = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; #[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] -pub type GIDLS = crate::Reg; +#[doc(alias = "GIDLS")] +pub type Gidls = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; #[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] -pub type GIDLC = crate::Reg; +#[doc(alias = "GIDLC")] +pub type Gidlc = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; #[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] -pub type GCSS = crate::Reg; +#[doc(alias = "GCSS")] +pub type Gcss = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; #[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] -pub type GCSC = crate::Reg; +#[doc(alias = "GCSC")] +pub type Gcsc = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; #[doc = "GCST (r) register accessor: Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] -pub type GCST = crate::Reg; +#[doc(alias = "GCST")] +pub type Gcst = crate::Reg; #[doc = "Global Channel Status"] pub mod gcst; #[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -pub type MIDR = crate::Reg; +#[doc(alias = "MIDR")] +pub type Midr = crate::Reg; #[doc = "Module Identification"] pub mod midr; diff --git a/src/ccu40/gcsc.rs b/src/ccu40/gcsc.rs index 9d18242e..d979cc44 100644 --- a/src/ccu40/gcsc.rs +++ b/src/ccu40/gcsc.rs @@ -1,156 +1,147 @@ #[doc = "Register `GCSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SC` writer - Slice 0 shadow transfer clear"] -pub type S0SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSC` writer - Slice 0 Dither shadow transfer clear"] -pub type S0DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSC` writer - Slice 0 Prescaler shadow transfer clear"] -pub type S0PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SC` writer - Slice 1 shadow transfer clear"] -pub type S1SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSC` writer - Slice 1 Dither shadow transfer clear"] -pub type S1DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSC` writer - Slice 1 Prescaler shadow transfer clear"] -pub type S1PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SC` writer - Slice 2 shadow transfer clear"] -pub type S2SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSC` writer - Slice 2 Dither shadow transfer clear"] -pub type S2DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSC` writer - Slice 2 Prescaler shadow transfer clear"] -pub type S2PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SC` writer - Slice 3 shadow transfer clear"] -pub type S3SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSC` writer - Slice 3 Dither shadow transfer clear"] -pub type S3DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSC` writer - Slice 3 Prescaler shadow transfer clear"] -pub type S3PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0STC` writer - Slice 0 status bit clear"] -pub type S0STC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0stcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STC` writer - Slice 1 status bit clear"] -pub type S1STC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1stcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STC` writer - Slice 2 status bit clear"] -pub type S2STC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2stcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3STC` writer - Slice 3 status bit clear"] -pub type S3STC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3stcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0sc(&mut self) -> S0SC_W { - S0SC_W::new(self, 0) + pub fn s0sc(&mut self) -> S0scW { + S0scW::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0dsc(&mut self) -> S0DSC_W { - S0DSC_W::new(self, 1) + pub fn s0dsc(&mut self) -> S0dscW { + S0dscW::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0psc(&mut self) -> S0PSC_W { - S0PSC_W::new(self, 2) + pub fn s0psc(&mut self) -> S0pscW { + S0pscW::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1sc(&mut self) -> S1SC_W { - S1SC_W::new(self, 4) + pub fn s1sc(&mut self) -> S1scW { + S1scW::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1dsc(&mut self) -> S1DSC_W { - S1DSC_W::new(self, 5) + pub fn s1dsc(&mut self) -> S1dscW { + S1dscW::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1psc(&mut self) -> S1PSC_W { - S1PSC_W::new(self, 6) + pub fn s1psc(&mut self) -> S1pscW { + S1pscW::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2sc(&mut self) -> S2SC_W { - S2SC_W::new(self, 8) + pub fn s2sc(&mut self) -> S2scW { + S2scW::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2dsc(&mut self) -> S2DSC_W { - S2DSC_W::new(self, 9) + pub fn s2dsc(&mut self) -> S2dscW { + S2dscW::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2psc(&mut self) -> S2PSC_W { - S2PSC_W::new(self, 10) + pub fn s2psc(&mut self) -> S2pscW { + S2pscW::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3sc(&mut self) -> S3SC_W { - S3SC_W::new(self, 12) + pub fn s3sc(&mut self) -> S3scW { + S3scW::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3dsc(&mut self) -> S3DSC_W { - S3DSC_W::new(self, 13) + pub fn s3dsc(&mut self) -> S3dscW { + S3dscW::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3psc(&mut self) -> S3PSC_W { - S3PSC_W::new(self, 14) + pub fn s3psc(&mut self) -> S3pscW { + S3pscW::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit clear"] #[inline(always)] #[must_use] - pub fn s0stc(&mut self) -> S0STC_W { - S0STC_W::new(self, 16) + pub fn s0stc(&mut self) -> S0stcW { + S0stcW::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit clear"] #[inline(always)] #[must_use] - pub fn s1stc(&mut self) -> S1STC_W { - S1STC_W::new(self, 17) + pub fn s1stc(&mut self) -> S1stcW { + S1stcW::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit clear"] #[inline(always)] #[must_use] - pub fn s2stc(&mut self) -> S2STC_W { - S2STC_W::new(self, 18) + pub fn s2stc(&mut self) -> S2stcW { + S2stcW::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit clear"] #[inline(always)] #[must_use] - pub fn s3stc(&mut self) -> S3STC_W { - S3STC_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn s3stc(&mut self) -> S3stcW { + S3stcW::new(self, 19) } } #[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCSC_SPEC; -impl crate::RegisterSpec for GCSC_SPEC { +pub struct GcscSpec; +impl crate::RegisterSpec for GcscSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcsc::W`](W) writer structure"] -impl crate::Writable for GCSC_SPEC { +impl crate::Writable for GcscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSC to value 0"] -impl crate::Resettable for GCSC_SPEC { +impl crate::Resettable for GcscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gcss.rs b/src/ccu40/gcss.rs index 148cf994..43246d43 100644 --- a/src/ccu40/gcss.rs +++ b/src/ccu40/gcss.rs @@ -1,156 +1,147 @@ #[doc = "Register `GCSS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SE` writer - Slice 0 shadow transfer set enable"] -pub type S0SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSE` writer - Slice 0 Dither shadow transfer set enable"] -pub type S0DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSE` writer - Slice 0 Prescaler shadow transfer set enable"] -pub type S0PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SE` writer - Slice 1 shadow transfer set enable"] -pub type S1SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSE` writer - Slice 1 Dither shadow transfer set enable"] -pub type S1DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSE` writer - Slice 1 Prescaler shadow transfer set enable"] -pub type S1PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SE` writer - Slice 2 shadow transfer set enable"] -pub type S2SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSE` writer - Slice 2 Dither shadow transfer set enable"] -pub type S2DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSE` writer - Slice 2 Prescaler shadow transfer set enable"] -pub type S2PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SE` writer - Slice 3 shadow transfer set enable"] -pub type S3SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSE` writer - Slice 3 Dither shadow transfer set enable"] -pub type S3DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSE` writer - Slice 3 Prescaler shadow transfer set enable"] -pub type S3PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0STS` writer - Slice 0 status bit set"] -pub type S0STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0stsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STS` writer - Slice 1 status bit set"] -pub type S1STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1stsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STS` writer - Slice 2 status bit set"] -pub type S2STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2stsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3STS` writer - Slice 3 status bit set"] -pub type S3STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3stsW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0se(&mut self) -> S0SE_W { - S0SE_W::new(self, 0) + pub fn s0se(&mut self) -> S0seW { + S0seW::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0dse(&mut self) -> S0DSE_W { - S0DSE_W::new(self, 1) + pub fn s0dse(&mut self) -> S0dseW { + S0dseW::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0pse(&mut self) -> S0PSE_W { - S0PSE_W::new(self, 2) + pub fn s0pse(&mut self) -> S0pseW { + S0pseW::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1se(&mut self) -> S1SE_W { - S1SE_W::new(self, 4) + pub fn s1se(&mut self) -> S1seW { + S1seW::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1dse(&mut self) -> S1DSE_W { - S1DSE_W::new(self, 5) + pub fn s1dse(&mut self) -> S1dseW { + S1dseW::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1pse(&mut self) -> S1PSE_W { - S1PSE_W::new(self, 6) + pub fn s1pse(&mut self) -> S1pseW { + S1pseW::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2se(&mut self) -> S2SE_W { - S2SE_W::new(self, 8) + pub fn s2se(&mut self) -> S2seW { + S2seW::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2dse(&mut self) -> S2DSE_W { - S2DSE_W::new(self, 9) + pub fn s2dse(&mut self) -> S2dseW { + S2dseW::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2pse(&mut self) -> S2PSE_W { - S2PSE_W::new(self, 10) + pub fn s2pse(&mut self) -> S2pseW { + S2pseW::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3se(&mut self) -> S3SE_W { - S3SE_W::new(self, 12) + pub fn s3se(&mut self) -> S3seW { + S3seW::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3dse(&mut self) -> S3DSE_W { - S3DSE_W::new(self, 13) + pub fn s3dse(&mut self) -> S3dseW { + S3dseW::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3pse(&mut self) -> S3PSE_W { - S3PSE_W::new(self, 14) + pub fn s3pse(&mut self) -> S3pseW { + S3pseW::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit set"] #[inline(always)] #[must_use] - pub fn s0sts(&mut self) -> S0STS_W { - S0STS_W::new(self, 16) + pub fn s0sts(&mut self) -> S0stsW { + S0stsW::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit set"] #[inline(always)] #[must_use] - pub fn s1sts(&mut self) -> S1STS_W { - S1STS_W::new(self, 17) + pub fn s1sts(&mut self) -> S1stsW { + S1stsW::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit set"] #[inline(always)] #[must_use] - pub fn s2sts(&mut self) -> S2STS_W { - S2STS_W::new(self, 18) + pub fn s2sts(&mut self) -> S2stsW { + S2stsW::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit set"] #[inline(always)] #[must_use] - pub fn s3sts(&mut self) -> S3STS_W { - S3STS_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn s3sts(&mut self) -> S3stsW { + S3stsW::new(self, 19) } } #[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCSS_SPEC; -impl crate::RegisterSpec for GCSS_SPEC { +pub struct GcssSpec; +impl crate::RegisterSpec for GcssSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcss::W`](W) writer structure"] -impl crate::Writable for GCSS_SPEC { +impl crate::Writable for GcssSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSS to value 0"] -impl crate::Resettable for GCSS_SPEC { +impl crate::Resettable for GcssSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gcst.rs b/src/ccu40/gcst.rs index d1e68502..14e0d150 100644 --- a/src/ccu40/gcst.rs +++ b/src/ccu40/gcst.rs @@ -1,535 +1,535 @@ #[doc = "Register `GCST` reader"] -pub type R = crate::R; -#[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] -pub type S0SS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Slice 0 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0SS_A { +pub enum S0ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0SS_A) -> Self { + fn from(variant: S0ss) -> Self { variant as u8 != 0 } } -impl S0SS_R { +#[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] +pub type S0ssR = crate::BitReader; +impl S0ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0SS_A { + pub const fn variant(&self) -> S0ss { match self.bits { - false => S0SS_A::VALUE1, - true => S0SS_A::VALUE2, + false => S0ss::Value1, + true => S0ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0SS_A::VALUE1 + *self == S0ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0SS_A::VALUE2 + *self == S0ss::Value2 } } -#[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] -pub type S0DSS_R = crate::BitReader; #[doc = "Slice 0 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0DSS_A { +pub enum S0dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0DSS_A) -> Self { + fn from(variant: S0dss) -> Self { variant as u8 != 0 } } -impl S0DSS_R { +#[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] +pub type S0dssR = crate::BitReader; +impl S0dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0DSS_A { + pub const fn variant(&self) -> S0dss { match self.bits { - false => S0DSS_A::VALUE1, - true => S0DSS_A::VALUE2, + false => S0dss::Value1, + true => S0dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0DSS_A::VALUE1 + *self == S0dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0DSS_A::VALUE2 + *self == S0dss::Value2 } } -#[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] -pub type S0PSS_R = crate::BitReader; #[doc = "Slice 0 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0PSS_A { +pub enum S0pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0PSS_A) -> Self { + fn from(variant: S0pss) -> Self { variant as u8 != 0 } } -impl S0PSS_R { +#[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] +pub type S0pssR = crate::BitReader; +impl S0pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0PSS_A { + pub const fn variant(&self) -> S0pss { match self.bits { - false => S0PSS_A::VALUE1, - true => S0PSS_A::VALUE2, + false => S0pss::Value1, + true => S0pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0PSS_A::VALUE1 + *self == S0pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0PSS_A::VALUE2 + *self == S0pss::Value2 } } -#[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] -pub type S1SS_R = crate::BitReader; #[doc = "Slice 1 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1SS_A { +pub enum S1ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1SS_A) -> Self { + fn from(variant: S1ss) -> Self { variant as u8 != 0 } } -impl S1SS_R { +#[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] +pub type S1ssR = crate::BitReader; +impl S1ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1SS_A { + pub const fn variant(&self) -> S1ss { match self.bits { - false => S1SS_A::VALUE1, - true => S1SS_A::VALUE2, + false => S1ss::Value1, + true => S1ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1SS_A::VALUE1 + *self == S1ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1SS_A::VALUE2 + *self == S1ss::Value2 } } -#[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] -pub type S1DSS_R = crate::BitReader; #[doc = "Slice 1 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1DSS_A { +pub enum S1dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1DSS_A) -> Self { + fn from(variant: S1dss) -> Self { variant as u8 != 0 } } -impl S1DSS_R { +#[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] +pub type S1dssR = crate::BitReader; +impl S1dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1DSS_A { + pub const fn variant(&self) -> S1dss { match self.bits { - false => S1DSS_A::VALUE1, - true => S1DSS_A::VALUE2, + false => S1dss::Value1, + true => S1dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1DSS_A::VALUE1 + *self == S1dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1DSS_A::VALUE2 + *self == S1dss::Value2 } } -#[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] -pub type S1PSS_R = crate::BitReader; #[doc = "Slice 1 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1PSS_A { +pub enum S1pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1PSS_A) -> Self { + fn from(variant: S1pss) -> Self { variant as u8 != 0 } } -impl S1PSS_R { +#[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] +pub type S1pssR = crate::BitReader; +impl S1pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1PSS_A { + pub const fn variant(&self) -> S1pss { match self.bits { - false => S1PSS_A::VALUE1, - true => S1PSS_A::VALUE2, + false => S1pss::Value1, + true => S1pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1PSS_A::VALUE1 + *self == S1pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1PSS_A::VALUE2 + *self == S1pss::Value2 } } -#[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] -pub type S2SS_R = crate::BitReader; #[doc = "Slice 2 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2SS_A { +pub enum S2ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2SS_A) -> Self { + fn from(variant: S2ss) -> Self { variant as u8 != 0 } } -impl S2SS_R { +#[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] +pub type S2ssR = crate::BitReader; +impl S2ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2SS_A { + pub const fn variant(&self) -> S2ss { match self.bits { - false => S2SS_A::VALUE1, - true => S2SS_A::VALUE2, + false => S2ss::Value1, + true => S2ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2SS_A::VALUE1 + *self == S2ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2SS_A::VALUE2 + *self == S2ss::Value2 } } -#[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] -pub type S2DSS_R = crate::BitReader; #[doc = "Slice 2 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2DSS_A { +pub enum S2dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2DSS_A) -> Self { + fn from(variant: S2dss) -> Self { variant as u8 != 0 } } -impl S2DSS_R { +#[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] +pub type S2dssR = crate::BitReader; +impl S2dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2DSS_A { + pub const fn variant(&self) -> S2dss { match self.bits { - false => S2DSS_A::VALUE1, - true => S2DSS_A::VALUE2, + false => S2dss::Value1, + true => S2dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2DSS_A::VALUE1 + *self == S2dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2DSS_A::VALUE2 + *self == S2dss::Value2 } } -#[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] -pub type S2PSS_R = crate::BitReader; #[doc = "Slice 2 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2PSS_A { +pub enum S2pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2PSS_A) -> Self { + fn from(variant: S2pss) -> Self { variant as u8 != 0 } } -impl S2PSS_R { +#[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] +pub type S2pssR = crate::BitReader; +impl S2pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2PSS_A { + pub const fn variant(&self) -> S2pss { match self.bits { - false => S2PSS_A::VALUE1, - true => S2PSS_A::VALUE2, + false => S2pss::Value1, + true => S2pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2PSS_A::VALUE1 + *self == S2pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2PSS_A::VALUE2 + *self == S2pss::Value2 } } -#[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] -pub type S3SS_R = crate::BitReader; #[doc = "Slice 3 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3SS_A { +pub enum S3ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3SS_A) -> Self { + fn from(variant: S3ss) -> Self { variant as u8 != 0 } } -impl S3SS_R { +#[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] +pub type S3ssR = crate::BitReader; +impl S3ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3SS_A { + pub const fn variant(&self) -> S3ss { match self.bits { - false => S3SS_A::VALUE1, - true => S3SS_A::VALUE2, + false => S3ss::Value1, + true => S3ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3SS_A::VALUE1 + *self == S3ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3SS_A::VALUE2 + *self == S3ss::Value2 } } -#[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] -pub type S3DSS_R = crate::BitReader; #[doc = "Slice 3 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3DSS_A { +pub enum S3dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3DSS_A) -> Self { + fn from(variant: S3dss) -> Self { variant as u8 != 0 } } -impl S3DSS_R { +#[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] +pub type S3dssR = crate::BitReader; +impl S3dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3DSS_A { + pub const fn variant(&self) -> S3dss { match self.bits { - false => S3DSS_A::VALUE1, - true => S3DSS_A::VALUE2, + false => S3dss::Value1, + true => S3dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3DSS_A::VALUE1 + *self == S3dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3DSS_A::VALUE2 + *self == S3dss::Value2 } } -#[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] -pub type S3PSS_R = crate::BitReader; #[doc = "Slice 3 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3PSS_A { +pub enum S3pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3PSS_A) -> Self { + fn from(variant: S3pss) -> Self { variant as u8 != 0 } } -impl S3PSS_R { +#[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] +pub type S3pssR = crate::BitReader; +impl S3pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3PSS_A { + pub const fn variant(&self) -> S3pss { match self.bits { - false => S3PSS_A::VALUE1, - true => S3PSS_A::VALUE2, + false => S3pss::Value1, + true => S3pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3PSS_A::VALUE1 + *self == S3pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3PSS_A::VALUE2 + *self == S3pss::Value2 } } #[doc = "Field `CC40ST` reader - Slice 0 status bit"] -pub type CC40ST_R = crate::BitReader; +pub type Cc40stR = crate::BitReader; #[doc = "Field `CC41ST` reader - Slice 1 status bit"] -pub type CC41ST_R = crate::BitReader; +pub type Cc41stR = crate::BitReader; #[doc = "Field `CC42ST` reader - Slice 2 status bit"] -pub type CC42ST_R = crate::BitReader; +pub type Cc42stR = crate::BitReader; #[doc = "Field `CC43ST` reader - Slice 3 status bit"] -pub type CC43ST_R = crate::BitReader; +pub type Cc43stR = crate::BitReader; impl R { #[doc = "Bit 0 - Slice 0 shadow transfer status"] #[inline(always)] - pub fn s0ss(&self) -> S0SS_R { - S0SS_R::new((self.bits & 1) != 0) + pub fn s0ss(&self) -> S0ssR { + S0ssR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer status"] #[inline(always)] - pub fn s0dss(&self) -> S0DSS_R { - S0DSS_R::new(((self.bits >> 1) & 1) != 0) + pub fn s0dss(&self) -> S0dssR { + S0dssR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer status"] #[inline(always)] - pub fn s0pss(&self) -> S0PSS_R { - S0PSS_R::new(((self.bits >> 2) & 1) != 0) + pub fn s0pss(&self) -> S0pssR { + S0pssR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Slice 1 shadow transfer status"] #[inline(always)] - pub fn s1ss(&self) -> S1SS_R { - S1SS_R::new(((self.bits >> 4) & 1) != 0) + pub fn s1ss(&self) -> S1ssR { + S1ssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer status"] #[inline(always)] - pub fn s1dss(&self) -> S1DSS_R { - S1DSS_R::new(((self.bits >> 5) & 1) != 0) + pub fn s1dss(&self) -> S1dssR { + S1dssR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer status"] #[inline(always)] - pub fn s1pss(&self) -> S1PSS_R { - S1PSS_R::new(((self.bits >> 6) & 1) != 0) + pub fn s1pss(&self) -> S1pssR { + S1pssR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Slice 2 shadow transfer status"] #[inline(always)] - pub fn s2ss(&self) -> S2SS_R { - S2SS_R::new(((self.bits >> 8) & 1) != 0) + pub fn s2ss(&self) -> S2ssR { + S2ssR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer status"] #[inline(always)] - pub fn s2dss(&self) -> S2DSS_R { - S2DSS_R::new(((self.bits >> 9) & 1) != 0) + pub fn s2dss(&self) -> S2dssR { + S2dssR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer status"] #[inline(always)] - pub fn s2pss(&self) -> S2PSS_R { - S2PSS_R::new(((self.bits >> 10) & 1) != 0) + pub fn s2pss(&self) -> S2pssR { + S2pssR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Slice 3 shadow transfer status"] #[inline(always)] - pub fn s3ss(&self) -> S3SS_R { - S3SS_R::new(((self.bits >> 12) & 1) != 0) + pub fn s3ss(&self) -> S3ssR { + S3ssR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer status"] #[inline(always)] - pub fn s3dss(&self) -> S3DSS_R { - S3DSS_R::new(((self.bits >> 13) & 1) != 0) + pub fn s3dss(&self) -> S3dssR { + S3dssR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer status"] #[inline(always)] - pub fn s3pss(&self) -> S3PSS_R { - S3PSS_R::new(((self.bits >> 14) & 1) != 0) + pub fn s3pss(&self) -> S3pssR { + S3pssR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Slice 0 status bit"] #[inline(always)] - pub fn cc40st(&self) -> CC40ST_R { - CC40ST_R::new(((self.bits >> 16) & 1) != 0) + pub fn cc40st(&self) -> Cc40stR { + Cc40stR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Slice 1 status bit"] #[inline(always)] - pub fn cc41st(&self) -> CC41ST_R { - CC41ST_R::new(((self.bits >> 17) & 1) != 0) + pub fn cc41st(&self) -> Cc41stR { + Cc41stR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Slice 2 status bit"] #[inline(always)] - pub fn cc42st(&self) -> CC42ST_R { - CC42ST_R::new(((self.bits >> 18) & 1) != 0) + pub fn cc42st(&self) -> Cc42stR { + Cc42stR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Slice 3 status bit"] #[inline(always)] - pub fn cc43st(&self) -> CC43ST_R { - CC43ST_R::new(((self.bits >> 19) & 1) != 0) + pub fn cc43st(&self) -> Cc43stR { + Cc43stR::new(((self.bits >> 19) & 1) != 0) } } #[doc = "Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCST_SPEC; -impl crate::RegisterSpec for GCST_SPEC { +pub struct GcstSpec; +impl crate::RegisterSpec for GcstSpec { type Ux = u32; } #[doc = "`read()` method returns [`gcst::R`](R) reader structure"] -impl crate::Readable for GCST_SPEC {} +impl crate::Readable for GcstSpec {} #[doc = "`reset()` method sets GCST to value 0"] -impl crate::Resettable for GCST_SPEC { +impl crate::Resettable for GcstSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gctrl.rs b/src/ccu40/gctrl.rs index 567d5352..2618526e 100644 --- a/src/ccu40/gctrl.rs +++ b/src/ccu40/gctrl.rs @@ -1,75 +1,75 @@ #[doc = "Register `GCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] -pub type PRBC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Prescaler Clear Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRBC_A { +pub enum Prbc { #[doc = "0: SW only"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] - VALUE5 = 4, + Value5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRBC_A) -> Self { + fn from(variant: Prbc) -> Self { variant as _ } } -impl crate::FieldSpec for PRBC_A { +impl crate::FieldSpec for Prbc { type Ux = u8; } -impl PRBC_R { +#[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] +pub type PrbcR = crate::FieldReader; +impl PrbcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRBC_A::VALUE1), - 1 => Some(PRBC_A::VALUE2), - 2 => Some(PRBC_A::VALUE3), - 3 => Some(PRBC_A::VALUE4), - 4 => Some(PRBC_A::VALUE5), + 0 => Some(Prbc::Value1), + 1 => Some(Prbc::Value2), + 2 => Some(Prbc::Value3), + 3 => Some(Prbc::Value4), + 4 => Some(Prbc::Value5), _ => None, } } #[doc = "SW only"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRBC_A::VALUE1 + *self == Prbc::Value1 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRBC_A::VALUE2 + *self == Prbc::Value2 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PRBC_A::VALUE3 + *self == Prbc::Value3 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PRBC_A::VALUE4 + *self == Prbc::Value4 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PRBC_A::VALUE5 + *self == Prbc::Value5 } } #[doc = "Field `PRBC` writer - Prescaler Clear Configuration"] -pub type PRBC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PRBC_A>; -impl<'a, REG> PRBC_W<'a, REG> +pub type PrbcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prbc>; +impl<'a, REG> PrbcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,89 +77,89 @@ where #[doc = "SW only"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE1) + self.variant(Prbc::Value1) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE2) + self.variant(Prbc::Value2) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE3) + self.variant(Prbc::Value3) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE4) + self.variant(Prbc::Value4) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE5) + self.variant(Prbc::Value5) } } -#[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] -pub type PCIS_R = crate::FieldReader; #[doc = "Prescaler Input Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PCIS_A { +pub enum Pcis { #[doc = "0: Module clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU4x.ECLKA"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU4x.ECLKB"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU4x.ECLKC"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PCIS_A) -> Self { + fn from(variant: Pcis) -> Self { variant as _ } } -impl crate::FieldSpec for PCIS_A { +impl crate::FieldSpec for Pcis { type Ux = u8; } -impl PCIS_R { +#[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] +pub type PcisR = crate::FieldReader; +impl PcisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCIS_A { + pub const fn variant(&self) -> Pcis { match self.bits { - 0 => PCIS_A::VALUE1, - 1 => PCIS_A::VALUE2, - 2 => PCIS_A::VALUE3, - 3 => PCIS_A::VALUE4, + 0 => Pcis::Value1, + 1 => Pcis::Value2, + 2 => Pcis::Value3, + 3 => Pcis::Value4, _ => unreachable!(), } } #[doc = "Module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCIS_A::VALUE1 + *self == Pcis::Value1 } #[doc = "CCU4x.ECLKA"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCIS_A::VALUE2 + *self == Pcis::Value2 } #[doc = "CCU4x.ECLKB"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PCIS_A::VALUE3 + *self == Pcis::Value3 } #[doc = "CCU4x.ECLKC"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PCIS_A::VALUE4 + *self == Pcis::Value4 } } #[doc = "Field `PCIS` writer - Prescaler Input Clock Selection"] -pub type PCIS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PCIS_A>; -impl<'a, REG> PCIS_W<'a, REG> +pub type PcisW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pcis>; +impl<'a, REG> PcisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -167,84 +167,84 @@ where #[doc = "Module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE1) + self.variant(Pcis::Value1) } #[doc = "CCU4x.ECLKA"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE2) + self.variant(Pcis::Value2) } #[doc = "CCU4x.ECLKB"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE3) + self.variant(Pcis::Value3) } #[doc = "CCU4x.ECLKC"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE4) + self.variant(Pcis::Value4) } } -#[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] -pub type SUSCFG_R = crate::FieldReader; #[doc = "Suspend Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUSCFG_A { +pub enum Suscfg { #[doc = "0: Suspend request ignored. The module never enters in suspend"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Stops all the running slices immediately. Safe stop is not applied."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUSCFG_A) -> Self { + fn from(variant: Suscfg) -> Self { variant as _ } } -impl crate::FieldSpec for SUSCFG_A { +impl crate::FieldSpec for Suscfg { type Ux = u8; } -impl SUSCFG_R { +#[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] +pub type SuscfgR = crate::FieldReader; +impl SuscfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SUSCFG_A { + pub const fn variant(&self) -> Suscfg { match self.bits { - 0 => SUSCFG_A::VALUE1, - 1 => SUSCFG_A::VALUE2, - 2 => SUSCFG_A::VALUE3, - 3 => SUSCFG_A::VALUE4, + 0 => Suscfg::Value1, + 1 => Suscfg::Value2, + 2 => Suscfg::Value3, + 3 => Suscfg::Value4, _ => unreachable!(), } } #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSCFG_A::VALUE1 + *self == Suscfg::Value1 } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUSCFG_A::VALUE2 + *self == Suscfg::Value2 } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUSCFG_A::VALUE3 + *self == Suscfg::Value3 } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SUSCFG_A::VALUE4 + *self == Suscfg::Value4 } } #[doc = "Field `SUSCFG` writer - Suspend Mode Configuration"] -pub type SUSCFG_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, SUSCFG_A>; -impl<'a, REG> SUSCFG_W<'a, REG> +pub type SuscfgW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Suscfg>; +impl<'a, REG> SuscfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -252,288 +252,288 @@ where #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE1) + self.variant(Suscfg::Value1) } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE2) + self.variant(Suscfg::Value2) } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE3) + self.variant(Suscfg::Value3) } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE4) + self.variant(Suscfg::Value4) } } -#[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] -pub type MSE0_R = crate::BitReader; #[doc = "Slice 0 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE0_A { +pub enum Mse0 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE0_A) -> Self { + fn from(variant: Mse0) -> Self { variant as u8 != 0 } } -impl MSE0_R { +#[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] +pub type Mse0R = crate::BitReader; +impl Mse0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE0_A { + pub const fn variant(&self) -> Mse0 { match self.bits { - false => MSE0_A::VALUE1, - true => MSE0_A::VALUE2, + false => Mse0::Value1, + true => Mse0::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE0_A::VALUE1 + *self == Mse0::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE0_A::VALUE2 + *self == Mse0::Value2 } } #[doc = "Field `MSE0` writer - Slice 0 Multi Channel shadow transfer enable"] -pub type MSE0_W<'a, REG> = crate::BitWriter<'a, REG, MSE0_A>; -impl<'a, REG> MSE0_W<'a, REG> +pub type Mse0W<'a, REG> = crate::BitWriter<'a, REG, Mse0>; +impl<'a, REG> Mse0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE0_A::VALUE1) + self.variant(Mse0::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE0_A::VALUE2) + self.variant(Mse0::Value2) } } -#[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] -pub type MSE1_R = crate::BitReader; #[doc = "Slice 1 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE1_A { +pub enum Mse1 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE1_A) -> Self { + fn from(variant: Mse1) -> Self { variant as u8 != 0 } } -impl MSE1_R { +#[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] +pub type Mse1R = crate::BitReader; +impl Mse1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE1_A { + pub const fn variant(&self) -> Mse1 { match self.bits { - false => MSE1_A::VALUE1, - true => MSE1_A::VALUE2, + false => Mse1::Value1, + true => Mse1::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE1_A::VALUE1 + *self == Mse1::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE1_A::VALUE2 + *self == Mse1::Value2 } } #[doc = "Field `MSE1` writer - Slice 1 Multi Channel shadow transfer enable"] -pub type MSE1_W<'a, REG> = crate::BitWriter<'a, REG, MSE1_A>; -impl<'a, REG> MSE1_W<'a, REG> +pub type Mse1W<'a, REG> = crate::BitWriter<'a, REG, Mse1>; +impl<'a, REG> Mse1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE1_A::VALUE1) + self.variant(Mse1::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE1_A::VALUE2) + self.variant(Mse1::Value2) } } -#[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] -pub type MSE2_R = crate::BitReader; #[doc = "Slice 2 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE2_A { +pub enum Mse2 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE2_A) -> Self { + fn from(variant: Mse2) -> Self { variant as u8 != 0 } } -impl MSE2_R { +#[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] +pub type Mse2R = crate::BitReader; +impl Mse2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE2_A { + pub const fn variant(&self) -> Mse2 { match self.bits { - false => MSE2_A::VALUE1, - true => MSE2_A::VALUE2, + false => Mse2::Value1, + true => Mse2::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE2_A::VALUE1 + *self == Mse2::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE2_A::VALUE2 + *self == Mse2::Value2 } } #[doc = "Field `MSE2` writer - Slice 2 Multi Channel shadow transfer enable"] -pub type MSE2_W<'a, REG> = crate::BitWriter<'a, REG, MSE2_A>; -impl<'a, REG> MSE2_W<'a, REG> +pub type Mse2W<'a, REG> = crate::BitWriter<'a, REG, Mse2>; +impl<'a, REG> Mse2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE2_A::VALUE1) + self.variant(Mse2::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE2_A::VALUE2) + self.variant(Mse2::Value2) } } -#[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] -pub type MSE3_R = crate::BitReader; #[doc = "Slice 3 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE3_A { +pub enum Mse3 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE3_A) -> Self { + fn from(variant: Mse3) -> Self { variant as u8 != 0 } } -impl MSE3_R { +#[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] +pub type Mse3R = crate::BitReader; +impl Mse3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE3_A { + pub const fn variant(&self) -> Mse3 { match self.bits { - false => MSE3_A::VALUE1, - true => MSE3_A::VALUE2, + false => Mse3::Value1, + true => Mse3::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE3_A::VALUE1 + *self == Mse3::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE3_A::VALUE2 + *self == Mse3::Value2 } } #[doc = "Field `MSE3` writer - Slice 3 Multi Channel shadow transfer enable"] -pub type MSE3_W<'a, REG> = crate::BitWriter<'a, REG, MSE3_A>; -impl<'a, REG> MSE3_W<'a, REG> +pub type Mse3W<'a, REG> = crate::BitWriter<'a, REG, Mse3>; +impl<'a, REG> Mse3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE3_A::VALUE1) + self.variant(Mse3::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE3_A::VALUE2) + self.variant(Mse3::Value2) } } -#[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] -pub type MSDE_R = crate::FieldReader; #[doc = "Multi Channel shadow transfer request configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MSDE_A { +pub enum Msde { #[doc = "0: Only the shadow transfer for period and compare values is requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer for the compare, period and prescaler compare values is requested"] - VALUE2 = 1, + Value2 = 1, #[doc = "3: Shadow transfer for the compare, period, prescaler and dither compare values is requested"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MSDE_A) -> Self { + fn from(variant: Msde) -> Self { variant as _ } } -impl crate::FieldSpec for MSDE_A { +impl crate::FieldSpec for Msde { type Ux = u8; } -impl MSDE_R { +#[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] +pub type MsdeR = crate::FieldReader; +impl MsdeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MSDE_A::VALUE1), - 1 => Some(MSDE_A::VALUE2), - 3 => Some(MSDE_A::VALUE4), + 0 => Some(Msde::Value1), + 1 => Some(Msde::Value2), + 3 => Some(Msde::Value4), _ => None, } } #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSDE_A::VALUE1 + *self == Msde::Value1 } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSDE_A::VALUE2 + *self == Msde::Value2 } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MSDE_A::VALUE4 + *self == Msde::Value4 } } #[doc = "Field `MSDE` writer - Multi Channel shadow transfer request configuration"] -pub type MSDE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSDE_A>; -impl<'a, REG> MSDE_W<'a, REG> +pub type MsdeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msde>; +impl<'a, REG> MsdeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -541,134 +541,125 @@ where #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE1) + self.variant(Msde::Value1) } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE2) + self.variant(Msde::Value2) } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE4) + self.variant(Msde::Value4) } } impl R { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - pub fn prbc(&self) -> PRBC_R { - PRBC_R::new((self.bits & 7) as u8) + pub fn prbc(&self) -> PrbcR { + PrbcR::new((self.bits & 7) as u8) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - pub fn pcis(&self) -> PCIS_R { - PCIS_R::new(((self.bits >> 4) & 3) as u8) + pub fn pcis(&self) -> PcisR { + PcisR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SUSCFG_R { - SUSCFG_R::new(((self.bits >> 8) & 3) as u8) + pub fn suscfg(&self) -> SuscfgR { + SuscfgR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse0(&self) -> MSE0_R { - MSE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn mse0(&self) -> Mse0R { + Mse0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse1(&self) -> MSE1_R { - MSE1_R::new(((self.bits >> 11) & 1) != 0) + pub fn mse1(&self) -> Mse1R { + Mse1R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse2(&self) -> MSE2_R { - MSE2_R::new(((self.bits >> 12) & 1) != 0) + pub fn mse2(&self) -> Mse2R { + Mse2R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse3(&self) -> MSE3_R { - MSE3_R::new(((self.bits >> 13) & 1) != 0) + pub fn mse3(&self) -> Mse3R { + Mse3R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - pub fn msde(&self) -> MSDE_R { - MSDE_R::new(((self.bits >> 14) & 3) as u8) + pub fn msde(&self) -> MsdeR { + MsdeR::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] #[must_use] - pub fn prbc(&mut self) -> PRBC_W { - PRBC_W::new(self, 0) + pub fn prbc(&mut self) -> PrbcW { + PrbcW::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] #[must_use] - pub fn pcis(&mut self) -> PCIS_W { - PCIS_W::new(self, 4) + pub fn pcis(&mut self) -> PcisW { + PcisW::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SUSCFG_W { - SUSCFG_W::new(self, 8) + pub fn suscfg(&mut self) -> SuscfgW { + SuscfgW::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse0(&mut self) -> MSE0_W { - MSE0_W::new(self, 10) + pub fn mse0(&mut self) -> Mse0W { + Mse0W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse1(&mut self) -> MSE1_W { - MSE1_W::new(self, 11) + pub fn mse1(&mut self) -> Mse1W { + Mse1W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse2(&mut self) -> MSE2_W { - MSE2_W::new(self, 12) + pub fn mse2(&mut self) -> Mse2W { + Mse2W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse3(&mut self) -> MSE3_W { - MSE3_W::new(self, 13) + pub fn mse3(&mut self) -> Mse3W { + Mse3W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] #[must_use] - pub fn msde(&mut self) -> MSDE_W { - MSDE_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn msde(&mut self) -> MsdeW { + MsdeW::new(self, 14) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCTRL_SPEC; -impl crate::RegisterSpec for GCTRL_SPEC { +pub struct GctrlSpec; +impl crate::RegisterSpec for GctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`gctrl::R`](R) reader structure"] -impl crate::Readable for GCTRL_SPEC {} +impl crate::Readable for GctrlSpec {} #[doc = "`write(|w| ..)` method takes [`gctrl::W`](W) writer structure"] -impl crate::Writable for GCTRL_SPEC { +impl crate::Writable for GctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCTRL to value 0"] -impl crate::Resettable for GCTRL_SPEC { +impl crate::Resettable for GctrlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gidlc.rs b/src/ccu40/gidlc.rs index 008c338a..96192cd3 100644 --- a/src/ccu40/gidlc.rs +++ b/src/ccu40/gidlc.rs @@ -1,68 +1,59 @@ #[doc = "Register `GIDLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CS0I` writer - CC40 IDLE mode clear"] -pub type CS0I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs0iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS1I` writer - CC41 IDLE mode clear"] -pub type CS1I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs1iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS2I` writer - CC42 IDLE mode clear"] -pub type CS2I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs2iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS3I` writer - CC43 IDLE mode clear"] -pub type CS3I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs3iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPRB` writer - Prescaler Run Bit Set"] -pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SprbW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs0i(&mut self) -> CS0I_W { - CS0I_W::new(self, 0) + pub fn cs0i(&mut self) -> Cs0iW { + Cs0iW::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs1i(&mut self) -> CS1I_W { - CS1I_W::new(self, 1) + pub fn cs1i(&mut self) -> Cs1iW { + Cs1iW::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs2i(&mut self) -> CS2I_W { - CS2I_W::new(self, 2) + pub fn cs2i(&mut self) -> Cs2iW { + Cs2iW::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs3i(&mut self) -> CS3I_W { - CS3I_W::new(self, 3) + pub fn cs3i(&mut self) -> Cs3iW { + Cs3iW::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] #[must_use] - pub fn sprb(&mut self) -> SPRB_W { - SPRB_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sprb(&mut self) -> SprbW { + SprbW::new(self, 8) } } #[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GIDLC_SPEC; -impl crate::RegisterSpec for GIDLC_SPEC { +pub struct GidlcSpec; +impl crate::RegisterSpec for GidlcSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidlc::W`](W) writer structure"] -impl crate::Writable for GIDLC_SPEC { +impl crate::Writable for GidlcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLC to value 0"] -impl crate::Resettable for GIDLC_SPEC { +impl crate::Resettable for GidlcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gidls.rs b/src/ccu40/gidls.rs index f2a08af3..54ec83e0 100644 --- a/src/ccu40/gidls.rs +++ b/src/ccu40/gidls.rs @@ -1,76 +1,67 @@ #[doc = "Register `GIDLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SS0I` writer - CC40 IDLE mode set"] -pub type SS0I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss0iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS1I` writer - CC41 IDLE mode set"] -pub type SS1I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss1iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS2I` writer - CC42 IDLE mode set"] -pub type SS2I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss2iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS3I` writer - CC43 IDLE mode set"] -pub type SS3I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss3iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPRB` writer - Prescaler Run Bit Clear"] -pub type CPRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CprbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSIC` writer - Prescaler clear"] -pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PsicW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss0i(&mut self) -> SS0I_W { - SS0I_W::new(self, 0) + pub fn ss0i(&mut self) -> Ss0iW { + Ss0iW::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss1i(&mut self) -> SS1I_W { - SS1I_W::new(self, 1) + pub fn ss1i(&mut self) -> Ss1iW { + Ss1iW::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss2i(&mut self) -> SS2I_W { - SS2I_W::new(self, 2) + pub fn ss2i(&mut self) -> Ss2iW { + Ss2iW::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss3i(&mut self) -> SS3I_W { - SS3I_W::new(self, 3) + pub fn ss3i(&mut self) -> Ss3iW { + Ss3iW::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Clear"] #[inline(always)] #[must_use] - pub fn cprb(&mut self) -> CPRB_W { - CPRB_W::new(self, 8) + pub fn cprb(&mut self) -> CprbW { + CprbW::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] #[must_use] - pub fn psic(&mut self) -> PSIC_W { - PSIC_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn psic(&mut self) -> PsicW { + PsicW::new(self, 9) } } #[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GIDLS_SPEC; -impl crate::RegisterSpec for GIDLS_SPEC { +pub struct GidlsSpec; +impl crate::RegisterSpec for GidlsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidls::W`](W) writer structure"] -impl crate::Writable for GIDLS_SPEC { +impl crate::Writable for GidlsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLS to value 0"] -impl crate::Resettable for GIDLS_SPEC { +impl crate::Resettable for GidlsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gstat.rs b/src/ccu40/gstat.rs index ada707a7..fbf2c485 100644 --- a/src/ccu40/gstat.rs +++ b/src/ccu40/gstat.rs @@ -1,220 +1,220 @@ #[doc = "Register `GSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `S0I` reader - CC40 IDLE status"] -pub type S0I_R = crate::BitReader; +pub type R = crate::R; #[doc = "CC40 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0I_A { +pub enum S0i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0I_A) -> Self { + fn from(variant: S0i) -> Self { variant as u8 != 0 } } -impl S0I_R { +#[doc = "Field `S0I` reader - CC40 IDLE status"] +pub type S0iR = crate::BitReader; +impl S0iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0I_A { + pub const fn variant(&self) -> S0i { match self.bits { - false => S0I_A::VALUE1, - true => S0I_A::VALUE2, + false => S0i::Value1, + true => S0i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0I_A::VALUE1 + *self == S0i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0I_A::VALUE2 + *self == S0i::Value2 } } -#[doc = "Field `S1I` reader - CC41 IDLE status"] -pub type S1I_R = crate::BitReader; #[doc = "CC41 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1I_A { +pub enum S1i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1I_A) -> Self { + fn from(variant: S1i) -> Self { variant as u8 != 0 } } -impl S1I_R { +#[doc = "Field `S1I` reader - CC41 IDLE status"] +pub type S1iR = crate::BitReader; +impl S1iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1I_A { + pub const fn variant(&self) -> S1i { match self.bits { - false => S1I_A::VALUE1, - true => S1I_A::VALUE2, + false => S1i::Value1, + true => S1i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1I_A::VALUE1 + *self == S1i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1I_A::VALUE2 + *self == S1i::Value2 } } -#[doc = "Field `S2I` reader - CC42 IDLE status"] -pub type S2I_R = crate::BitReader; #[doc = "CC42 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2I_A { +pub enum S2i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2I_A) -> Self { + fn from(variant: S2i) -> Self { variant as u8 != 0 } } -impl S2I_R { +#[doc = "Field `S2I` reader - CC42 IDLE status"] +pub type S2iR = crate::BitReader; +impl S2iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2I_A { + pub const fn variant(&self) -> S2i { match self.bits { - false => S2I_A::VALUE1, - true => S2I_A::VALUE2, + false => S2i::Value1, + true => S2i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2I_A::VALUE1 + *self == S2i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2I_A::VALUE2 + *self == S2i::Value2 } } -#[doc = "Field `S3I` reader - CC43 IDLE status"] -pub type S3I_R = crate::BitReader; #[doc = "CC43 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3I_A { +pub enum S3i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3I_A) -> Self { + fn from(variant: S3i) -> Self { variant as u8 != 0 } } -impl S3I_R { +#[doc = "Field `S3I` reader - CC43 IDLE status"] +pub type S3iR = crate::BitReader; +impl S3iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3I_A { + pub const fn variant(&self) -> S3i { match self.bits { - false => S3I_A::VALUE1, - true => S3I_A::VALUE2, + false => S3i::Value1, + true => S3i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3I_A::VALUE1 + *self == S3i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3I_A::VALUE2 + *self == S3i::Value2 } } -#[doc = "Field `PRB` reader - Prescaler Run Bit"] -pub type PRB_R = crate::BitReader; #[doc = "Prescaler Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRB_A { +pub enum Prb { #[doc = "0: Prescaler is stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRB_A) -> Self { + fn from(variant: Prb) -> Self { variant as u8 != 0 } } -impl PRB_R { +#[doc = "Field `PRB` reader - Prescaler Run Bit"] +pub type PrbR = crate::BitReader; +impl PrbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRB_A { + pub const fn variant(&self) -> Prb { match self.bits { - false => PRB_A::VALUE1, - true => PRB_A::VALUE2, + false => Prb::Value1, + true => Prb::Value2, } } #[doc = "Prescaler is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRB_A::VALUE1 + *self == Prb::Value1 } #[doc = "Prescaler is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRB_A::VALUE2 + *self == Prb::Value2 } } impl R { #[doc = "Bit 0 - CC40 IDLE status"] #[inline(always)] - pub fn s0i(&self) -> S0I_R { - S0I_R::new((self.bits & 1) != 0) + pub fn s0i(&self) -> S0iR { + S0iR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC41 IDLE status"] #[inline(always)] - pub fn s1i(&self) -> S1I_R { - S1I_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1i(&self) -> S1iR { + S1iR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC42 IDLE status"] #[inline(always)] - pub fn s2i(&self) -> S2I_R { - S2I_R::new(((self.bits >> 2) & 1) != 0) + pub fn s2i(&self) -> S2iR { + S2iR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CC43 IDLE status"] #[inline(always)] - pub fn s3i(&self) -> S3I_R { - S3I_R::new(((self.bits >> 3) & 1) != 0) + pub fn s3i(&self) -> S3iR { + S3iR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Prescaler Run Bit"] #[inline(always)] - pub fn prb(&self) -> PRB_R { - PRB_R::new(((self.bits >> 8) & 1) != 0) + pub fn prb(&self) -> PrbR { + PrbR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GSTAT_SPEC; -impl crate::RegisterSpec for GSTAT_SPEC { +pub struct GstatSpec; +impl crate::RegisterSpec for GstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`gstat::R`](R) reader structure"] -impl crate::Readable for GSTAT_SPEC {} +impl crate::Readable for GstatSpec {} #[doc = "`reset()` method sets GSTAT to value 0x0f"] -impl crate::Resettable for GSTAT_SPEC { +impl crate::Resettable for GstatSpec { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/ccu40/midr.rs b/src/ccu40/midr.rs index a00c3cf8..956cd55f 100644 --- a/src/ccu40/midr.rs +++ b/src/ccu40/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type MODR_R = crate::FieldReader; +pub type ModrR = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type MODT_R = crate::FieldReader; +pub type ModtR = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type MODN_R = crate::FieldReader; +pub type ModnR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> MODR_R { - MODR_R::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> ModrR { + ModrR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> MODT_R { - MODT_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> ModtR { + ModtR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> MODN_R { - MODN_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> ModnR { + ModnR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MIDR_SPEC; -impl crate::RegisterSpec for MIDR_SPEC { +pub struct MidrSpec; +impl crate::RegisterSpec for MidrSpec { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MIDR_SPEC {} +impl crate::Readable for MidrSpec {} #[doc = "`reset()` method sets MIDR to value 0x00a6_c000"] -impl crate::Resettable for MIDR_SPEC { +impl crate::Resettable for MidrSpec { const RESET_VALUE: u32 = 0x00a6_c000; } diff --git a/src/ccu40_cc40.rs b/src/ccu40_cc40.rs index 36048b2e..5d88c852 100644 --- a/src/ccu40_cc40.rs +++ b/src/ccu40_cc40.rs @@ -1,317 +1,345 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - ins: INS, - cmc: CMC, - tcst: TCST, - tcset: TCSET, - tcclr: TCCLR, - tc: TC, - psl: PSL, - dit: DIT, - dits: DITS, - psc: PSC, - fpc: FPC, - fpcs: FPCS, - pr: PR, - prs: PRS, - cr: CR, - crs: CRS, + ins: Ins, + cmc: Cmc, + tcst: Tcst, + tcset: Tcset, + tcclr: Tcclr, + tc: Tc, + psl: Psl, + dit: Dit, + dits: Dits, + psc: Psc, + fpc: Fpc, + fpcs: Fpcs, + pr: Pr, + prs: Prs, + cr: Cr, + crs: Crs, _reserved16: [u8; 0x30], - timer: TIMER, - c0v: C0V, - c1v: C1V, - c2v: C2V, - c3v: C3V, + timer: Timer, + c0v: C0v, + c1v: C1v, + c2v: C2v, + c3v: C3v, _reserved21: [u8; 0x1c], - ints: INTS, - inte: INTE, - srs: SRS, - sws: SWS, - swr: SWR, + ints: Ints, + inte: Inte, + srs: Srs, + sws: Sws, + swr: Swr, _reserved26: [u8; 0x04], - ecrd0: ECRD0, - ecrd1: ECRD1, + ecrd0: Ecrd0, + ecrd1: Ecrd1, } impl RegisterBlock { #[doc = "0x00 - Input Selector Configuration"] #[inline(always)] - pub const fn ins(&self) -> &INS { + pub const fn ins(&self) -> &Ins { &self.ins } #[doc = "0x04 - Connection Matrix Control"] #[inline(always)] - pub const fn cmc(&self) -> &CMC { + pub const fn cmc(&self) -> &Cmc { &self.cmc } #[doc = "0x08 - Slice Timer Status"] #[inline(always)] - pub const fn tcst(&self) -> &TCST { + pub const fn tcst(&self) -> &Tcst { &self.tcst } #[doc = "0x0c - Slice Timer Run Set"] #[inline(always)] - pub const fn tcset(&self) -> &TCSET { + pub const fn tcset(&self) -> &Tcset { &self.tcset } #[doc = "0x10 - Slice Timer Clear"] #[inline(always)] - pub const fn tcclr(&self) -> &TCCLR { + pub const fn tcclr(&self) -> &Tcclr { &self.tcclr } #[doc = "0x14 - Slice Timer Control"] #[inline(always)] - pub const fn tc(&self) -> &TC { + pub const fn tc(&self) -> &Tc { &self.tc } #[doc = "0x18 - Passive Level Config"] #[inline(always)] - pub const fn psl(&self) -> &PSL { + pub const fn psl(&self) -> &Psl { &self.psl } #[doc = "0x1c - Dither Config"] #[inline(always)] - pub const fn dit(&self) -> &DIT { + pub const fn dit(&self) -> &Dit { &self.dit } #[doc = "0x20 - Dither Shadow Register"] #[inline(always)] - pub const fn dits(&self) -> &DITS { + pub const fn dits(&self) -> &Dits { &self.dits } #[doc = "0x24 - Prescaler Control"] #[inline(always)] - pub const fn psc(&self) -> &PSC { + pub const fn psc(&self) -> &Psc { &self.psc } #[doc = "0x28 - Floating Prescaler Control"] #[inline(always)] - pub const fn fpc(&self) -> &FPC { + pub const fn fpc(&self) -> &Fpc { &self.fpc } #[doc = "0x2c - Floating Prescaler Shadow"] #[inline(always)] - pub const fn fpcs(&self) -> &FPCS { + pub const fn fpcs(&self) -> &Fpcs { &self.fpcs } #[doc = "0x30 - Timer Period Value"] #[inline(always)] - pub const fn pr(&self) -> &PR { + pub const fn pr(&self) -> &Pr { &self.pr } #[doc = "0x34 - Timer Shadow Period Value"] #[inline(always)] - pub const fn prs(&self) -> &PRS { + pub const fn prs(&self) -> &Prs { &self.prs } #[doc = "0x38 - Timer Compare Value"] #[inline(always)] - pub const fn cr(&self) -> &CR { + pub const fn cr(&self) -> &Cr { &self.cr } #[doc = "0x3c - Timer Shadow Compare Value"] #[inline(always)] - pub const fn crs(&self) -> &CRS { + pub const fn crs(&self) -> &Crs { &self.crs } #[doc = "0x70 - Timer Value"] #[inline(always)] - pub const fn timer(&self) -> &TIMER { + pub const fn timer(&self) -> &Timer { &self.timer } #[doc = "0x74 - Capture Register 0"] #[inline(always)] - pub const fn c0v(&self) -> &C0V { + pub const fn c0v(&self) -> &C0v { &self.c0v } #[doc = "0x78 - Capture Register 1"] #[inline(always)] - pub const fn c1v(&self) -> &C1V { + pub const fn c1v(&self) -> &C1v { &self.c1v } #[doc = "0x7c - Capture Register 2"] #[inline(always)] - pub const fn c2v(&self) -> &C2V { + pub const fn c2v(&self) -> &C2v { &self.c2v } #[doc = "0x80 - Capture Register 3"] #[inline(always)] - pub const fn c3v(&self) -> &C3V { + pub const fn c3v(&self) -> &C3v { &self.c3v } #[doc = "0xa0 - Interrupt Status"] #[inline(always)] - pub const fn ints(&self) -> &INTS { + pub const fn ints(&self) -> &Ints { &self.ints } #[doc = "0xa4 - Interrupt Enable Control"] #[inline(always)] - pub const fn inte(&self) -> &INTE { + pub const fn inte(&self) -> &Inte { &self.inte } #[doc = "0xa8 - Service Request Selector"] #[inline(always)] - pub const fn srs(&self) -> &SRS { + pub const fn srs(&self) -> &Srs { &self.srs } #[doc = "0xac - Interrupt Status Set"] #[inline(always)] - pub const fn sws(&self) -> &SWS { + pub const fn sws(&self) -> &Sws { &self.sws } #[doc = "0xb0 - Interrupt Status Clear"] #[inline(always)] - pub const fn swr(&self) -> &SWR { + pub const fn swr(&self) -> &Swr { &self.swr } #[doc = "0xb8 - Extended Read Back 0"] #[inline(always)] - pub const fn ecrd0(&self) -> &ECRD0 { + pub const fn ecrd0(&self) -> &Ecrd0 { &self.ecrd0 } #[doc = "0xbc - Extended Read Back 1"] #[inline(always)] - pub const fn ecrd1(&self) -> &ECRD1 { + pub const fn ecrd1(&self) -> &Ecrd1 { &self.ecrd1 } } #[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] -pub type INS = crate::Reg; +#[doc(alias = "INS")] +pub type Ins = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; #[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] -pub type CMC = crate::Reg; +#[doc(alias = "CMC")] +pub type Cmc = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; #[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] -pub type TCST = crate::Reg; +#[doc(alias = "TCST")] +pub type Tcst = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; #[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] -pub type TCSET = crate::Reg; +#[doc(alias = "TCSET")] +pub type Tcset = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; #[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] -pub type TCCLR = crate::Reg; +#[doc(alias = "TCCLR")] +pub type Tcclr = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; #[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] -pub type TC = crate::Reg; +#[doc(alias = "TC")] +pub type Tc = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; #[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] -pub type PSL = crate::Reg; +#[doc(alias = "PSL")] +pub type Psl = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; #[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] -pub type DIT = crate::Reg; +#[doc(alias = "DIT")] +pub type Dit = crate::Reg; #[doc = "Dither Config"] pub mod dit; #[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] -pub type DITS = crate::Reg; +#[doc(alias = "DITS")] +pub type Dits = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; #[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] -pub type PSC = crate::Reg; +#[doc(alias = "PSC")] +pub type Psc = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; #[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] -pub type FPC = crate::Reg; +#[doc(alias = "FPC")] +pub type Fpc = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; #[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] -pub type FPCS = crate::Reg; +#[doc(alias = "FPCS")] +pub type Fpcs = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; #[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] -pub type PR = crate::Reg; +#[doc(alias = "PR")] +pub type Pr = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; #[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] -pub type PRS = crate::Reg; +#[doc(alias = "PRS")] +pub type Prs = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; #[doc = "CR (r) register accessor: Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] module"] -pub type CR = crate::Reg; +#[doc(alias = "CR")] +pub type Cr = crate::Reg; #[doc = "Timer Compare Value"] pub mod cr; #[doc = "CRS (rw) register accessor: Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crs`] module"] -pub type CRS = crate::Reg; +#[doc(alias = "CRS")] +pub type Crs = crate::Reg; #[doc = "Timer Shadow Compare Value"] pub mod crs; #[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] -pub type TIMER = crate::Reg; +#[doc(alias = "TIMER")] +pub type Timer = crate::Reg; #[doc = "Timer Value"] pub mod timer; #[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] module"] -pub type C0V = crate::Reg; +#[doc(alias = "C0V")] +pub type C0v = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; #[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] module"] -pub type C1V = crate::Reg; +#[doc(alias = "C1V")] +pub type C1v = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; #[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] module"] -pub type C2V = crate::Reg; +#[doc(alias = "C2V")] +pub type C2v = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; #[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] module"] -pub type C3V = crate::Reg; +#[doc(alias = "C3V")] +pub type C3v = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; #[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] -pub type INTS = crate::Reg; +#[doc(alias = "INTS")] +pub type Ints = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; #[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] -pub type INTE = crate::Reg; +#[doc(alias = "INTE")] +pub type Inte = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; #[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] -pub type SRS = crate::Reg; +#[doc(alias = "SRS")] +pub type Srs = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; #[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] -pub type SWS = crate::Reg; +#[doc(alias = "SWS")] +pub type Sws = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; #[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] -pub type SWR = crate::Reg; +#[doc(alias = "SWR")] +pub type Swr = crate::Reg; #[doc = "Interrupt Status Clear"] pub mod swr; #[doc = "ECRD0 (r) register accessor: Extended Read Back 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd0`] module"] -pub type ECRD0 = crate::Reg; +#[doc(alias = "ECRD0")] +pub type Ecrd0 = crate::Reg; #[doc = "Extended Read Back 0"] pub mod ecrd0; #[doc = "ECRD1 (r) register accessor: Extended Read Back 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd1::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd1`] module"] -pub type ECRD1 = crate::Reg; +#[doc(alias = "ECRD1")] +pub type Ecrd1 = crate::Reg; #[doc = "Extended Read Back 1"] pub mod ecrd1; diff --git a/src/ccu40_cc40/c0v.rs b/src/ccu40_cc40/c0v.rs index 3c74379a..8921e719 100644 --- a/src/ccu40_cc40/c0v.rs +++ b/src/ccu40_cc40/c0v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C0V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C0V_SPEC; -impl crate::RegisterSpec for C0V_SPEC { +pub struct C0vSpec; +impl crate::RegisterSpec for C0vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c0v::R`](R) reader structure"] -impl crate::Readable for C0V_SPEC {} +impl crate::Readable for C0vSpec {} #[doc = "`reset()` method sets C0V to value 0"] -impl crate::Resettable for C0V_SPEC { +impl crate::Resettable for C0vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c1v.rs b/src/ccu40_cc40/c1v.rs index f0a726d2..d7b854ed 100644 --- a/src/ccu40_cc40/c1v.rs +++ b/src/ccu40_cc40/c1v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C1V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C1V_SPEC; -impl crate::RegisterSpec for C1V_SPEC { +pub struct C1vSpec; +impl crate::RegisterSpec for C1vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c1v::R`](R) reader structure"] -impl crate::Readable for C1V_SPEC {} +impl crate::Readable for C1vSpec {} #[doc = "`reset()` method sets C1V to value 0"] -impl crate::Resettable for C1V_SPEC { +impl crate::Resettable for C1vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c2v.rs b/src/ccu40_cc40/c2v.rs index 5f3c0663..5b12e99b 100644 --- a/src/ccu40_cc40/c2v.rs +++ b/src/ccu40_cc40/c2v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C2V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C2V_SPEC; -impl crate::RegisterSpec for C2V_SPEC { +pub struct C2vSpec; +impl crate::RegisterSpec for C2vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c2v::R`](R) reader structure"] -impl crate::Readable for C2V_SPEC {} +impl crate::Readable for C2vSpec {} #[doc = "`reset()` method sets C2V to value 0"] -impl crate::Resettable for C2V_SPEC { +impl crate::Resettable for C2vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c3v.rs b/src/ccu40_cc40/c3v.rs index f9f08e73..32fc268f 100644 --- a/src/ccu40_cc40/c3v.rs +++ b/src/ccu40_cc40/c3v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C3V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C3V_SPEC; -impl crate::RegisterSpec for C3V_SPEC { +pub struct C3vSpec; +impl crate::RegisterSpec for C3vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c3v::R`](R) reader structure"] -impl crate::Readable for C3V_SPEC {} +impl crate::Readable for C3vSpec {} #[doc = "`reset()` method sets C3V to value 0"] -impl crate::Resettable for C3V_SPEC { +impl crate::Resettable for C3vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/cmc.rs b/src/ccu40_cc40/cmc.rs index 89c4f682..81e3c125 100644 --- a/src/ccu40_cc40/cmc.rs +++ b/src/ccu40_cc40/cmc.rs @@ -1,67 +1,67 @@ #[doc = "Register `CMC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMC` writer"] -pub type W = crate::W; -#[doc = "Field `STRTS` reader - External Start Functionality Selector"] -pub type STRTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Start Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRTS_A { +pub enum Strts { #[doc = "0: External Start Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Start Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Start Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Start Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRTS_A) -> Self { + fn from(variant: Strts) -> Self { variant as _ } } -impl crate::FieldSpec for STRTS_A { +impl crate::FieldSpec for Strts { type Ux = u8; } -impl STRTS_R { +#[doc = "Field `STRTS` reader - External Start Functionality Selector"] +pub type StrtsR = crate::FieldReader; +impl StrtsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STRTS_A { + pub const fn variant(&self) -> Strts { match self.bits { - 0 => STRTS_A::VALUE1, - 1 => STRTS_A::VALUE2, - 2 => STRTS_A::VALUE3, - 3 => STRTS_A::VALUE4, + 0 => Strts::Value1, + 1 => Strts::Value2, + 2 => Strts::Value3, + 3 => Strts::Value4, _ => unreachable!(), } } #[doc = "External Start Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STRTS_A::VALUE1 + *self == Strts::Value1 } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STRTS_A::VALUE2 + *self == Strts::Value2 } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STRTS_A::VALUE3 + *self == Strts::Value3 } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STRTS_A::VALUE4 + *self == Strts::Value4 } } #[doc = "Field `STRTS` writer - External Start Functionality Selector"] -pub type STRTS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, STRTS_A>; -impl<'a, REG> STRTS_W<'a, REG> +pub type StrtsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Strts>; +impl<'a, REG> StrtsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "External Start Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE1) + self.variant(Strts::Value1) } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE2) + self.variant(Strts::Value2) } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE3) + self.variant(Strts::Value3) } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE4) + self.variant(Strts::Value4) } } -#[doc = "Field `ENDS` reader - External Stop Functionality Selector"] -pub type ENDS_R = crate::FieldReader; #[doc = "External Stop Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENDS_A { +pub enum Ends { #[doc = "0: External Stop Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Stop Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Stop Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Stop Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENDS_A) -> Self { + fn from(variant: Ends) -> Self { variant as _ } } -impl crate::FieldSpec for ENDS_A { +impl crate::FieldSpec for Ends { type Ux = u8; } -impl ENDS_R { +#[doc = "Field `ENDS` reader - External Stop Functionality Selector"] +pub type EndsR = crate::FieldReader; +impl EndsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENDS_A { + pub const fn variant(&self) -> Ends { match self.bits { - 0 => ENDS_A::VALUE1, - 1 => ENDS_A::VALUE2, - 2 => ENDS_A::VALUE3, - 3 => ENDS_A::VALUE4, + 0 => Ends::Value1, + 1 => Ends::Value2, + 2 => Ends::Value3, + 3 => Ends::Value4, _ => unreachable!(), } } #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDS_A::VALUE1 + *self == Ends::Value1 } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDS_A::VALUE2 + *self == Ends::Value2 } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENDS_A::VALUE3 + *self == Ends::Value3 } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENDS_A::VALUE4 + *self == Ends::Value4 } } #[doc = "Field `ENDS` writer - External Stop Functionality Selector"] -pub type ENDS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ENDS_A>; -impl<'a, REG> ENDS_W<'a, REG> +pub type EndsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ends>; +impl<'a, REG> EndsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE1) + self.variant(Ends::Value1) } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE2) + self.variant(Ends::Value2) } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE3) + self.variant(Ends::Value3) } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE4) + self.variant(Ends::Value4) } } -#[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] -pub type CAP0S_R = crate::FieldReader; #[doc = "External Capture 0 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP0S_A { +pub enum Cap0s { #[doc = "0: External Capture 0 Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Capture 0 Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Capture 0 Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Capture 0 Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP0S_A) -> Self { + fn from(variant: Cap0s) -> Self { variant as _ } } -impl crate::FieldSpec for CAP0S_A { +impl crate::FieldSpec for Cap0s { type Ux = u8; } -impl CAP0S_R { +#[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] +pub type Cap0sR = crate::FieldReader; +impl Cap0sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAP0S_A { + pub const fn variant(&self) -> Cap0s { match self.bits { - 0 => CAP0S_A::VALUE1, - 1 => CAP0S_A::VALUE2, - 2 => CAP0S_A::VALUE3, - 3 => CAP0S_A::VALUE4, + 0 => Cap0s::Value1, + 1 => Cap0s::Value2, + 2 => Cap0s::Value3, + 3 => Cap0s::Value4, _ => unreachable!(), } } #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAP0S_A::VALUE1 + *self == Cap0s::Value1 } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAP0S_A::VALUE2 + *self == Cap0s::Value2 } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAP0S_A::VALUE3 + *self == Cap0s::Value3 } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAP0S_A::VALUE4 + *self == Cap0s::Value4 } } #[doc = "Field `CAP0S` writer - External Capture 0 Functionality Selector"] -pub type CAP0S_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAP0S_A>; -impl<'a, REG> CAP0S_W<'a, REG> +pub type Cap0sW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cap0s>; +impl<'a, REG> Cap0sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE1) + self.variant(Cap0s::Value1) } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE2) + self.variant(Cap0s::Value2) } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE3) + self.variant(Cap0s::Value3) } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE4) + self.variant(Cap0s::Value4) } } -#[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] -pub type CAP1S_R = crate::FieldReader; #[doc = "External Capture 1 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP1S_A { +pub enum Cap1s { #[doc = "0: External Capture 1 Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Capture 1 Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Capture 1 Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Capture 1 Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP1S_A) -> Self { + fn from(variant: Cap1s) -> Self { variant as _ } } -impl crate::FieldSpec for CAP1S_A { +impl crate::FieldSpec for Cap1s { type Ux = u8; } -impl CAP1S_R { +#[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] +pub type Cap1sR = crate::FieldReader; +impl Cap1sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAP1S_A { + pub const fn variant(&self) -> Cap1s { match self.bits { - 0 => CAP1S_A::VALUE1, - 1 => CAP1S_A::VALUE2, - 2 => CAP1S_A::VALUE3, - 3 => CAP1S_A::VALUE4, + 0 => Cap1s::Value1, + 1 => Cap1s::Value2, + 2 => Cap1s::Value3, + 3 => Cap1s::Value4, _ => unreachable!(), } } #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAP1S_A::VALUE1 + *self == Cap1s::Value1 } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAP1S_A::VALUE2 + *self == Cap1s::Value2 } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAP1S_A::VALUE3 + *self == Cap1s::Value3 } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAP1S_A::VALUE4 + *self == Cap1s::Value4 } } #[doc = "Field `CAP1S` writer - External Capture 1 Functionality Selector"] -pub type CAP1S_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAP1S_A>; -impl<'a, REG> CAP1S_W<'a, REG> +pub type Cap1sW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cap1s>; +impl<'a, REG> Cap1sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE1) + self.variant(Cap1s::Value1) } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE2) + self.variant(Cap1s::Value2) } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE3) + self.variant(Cap1s::Value3) } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE4) + self.variant(Cap1s::Value4) } } -#[doc = "Field `GATES` reader - External Gate Functionality Selector"] -pub type GATES_R = crate::FieldReader; #[doc = "External Gate Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum GATES_A { +pub enum Gates { #[doc = "0: External Gating Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Gating Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Gating Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Gating Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: GATES_A) -> Self { + fn from(variant: Gates) -> Self { variant as _ } } -impl crate::FieldSpec for GATES_A { +impl crate::FieldSpec for Gates { type Ux = u8; } -impl GATES_R { +#[doc = "Field `GATES` reader - External Gate Functionality Selector"] +pub type GatesR = crate::FieldReader; +impl GatesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GATES_A { + pub const fn variant(&self) -> Gates { match self.bits { - 0 => GATES_A::VALUE1, - 1 => GATES_A::VALUE2, - 2 => GATES_A::VALUE3, - 3 => GATES_A::VALUE4, + 0 => Gates::Value1, + 1 => Gates::Value2, + 2 => Gates::Value3, + 3 => Gates::Value4, _ => unreachable!(), } } #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GATES_A::VALUE1 + *self == Gates::Value1 } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GATES_A::VALUE2 + *self == Gates::Value2 } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == GATES_A::VALUE3 + *self == Gates::Value3 } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == GATES_A::VALUE4 + *self == Gates::Value4 } } #[doc = "Field `GATES` writer - External Gate Functionality Selector"] -pub type GATES_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, GATES_A>; -impl<'a, REG> GATES_W<'a, REG> +pub type GatesW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Gates>; +impl<'a, REG> GatesW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE1) + self.variant(Gates::Value1) } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE2) + self.variant(Gates::Value2) } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE3) + self.variant(Gates::Value3) } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE4) + self.variant(Gates::Value4) } } -#[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] -pub type UDS_R = crate::FieldReader; #[doc = "External Up/Down Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UDS_A { +pub enum Uds { #[doc = "0: External Up/Down Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Up/Down Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Up/Down Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Up/Down Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UDS_A) -> Self { + fn from(variant: Uds) -> Self { variant as _ } } -impl crate::FieldSpec for UDS_A { +impl crate::FieldSpec for Uds { type Ux = u8; } -impl UDS_R { +#[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] +pub type UdsR = crate::FieldReader; +impl UdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UDS_A { + pub const fn variant(&self) -> Uds { match self.bits { - 0 => UDS_A::VALUE1, - 1 => UDS_A::VALUE2, - 2 => UDS_A::VALUE3, - 3 => UDS_A::VALUE4, + 0 => Uds::Value1, + 1 => Uds::Value2, + 2 => Uds::Value3, + 3 => Uds::Value4, _ => unreachable!(), } } #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UDS_A::VALUE1 + *self == Uds::Value1 } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UDS_A::VALUE2 + *self == Uds::Value2 } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == UDS_A::VALUE3 + *self == Uds::Value3 } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == UDS_A::VALUE4 + *self == Uds::Value4 } } #[doc = "Field `UDS` writer - External Up/Down Functionality Selector"] -pub type UDS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, UDS_A>; -impl<'a, REG> UDS_W<'a, REG> +pub type UdsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Uds>; +impl<'a, REG> UdsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,88 +494,88 @@ where #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE1) + self.variant(Uds::Value1) } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE2) + self.variant(Uds::Value2) } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE3) + self.variant(Uds::Value3) } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE4) + self.variant(Uds::Value4) } } #[doc = "Field `LDS` reader - External Timer Load Functionality Selector"] -pub type LDS_R = crate::FieldReader; +pub type LdsR = crate::FieldReader; #[doc = "Field `LDS` writer - External Timer Load Functionality Selector"] -pub type LDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `CNTS` reader - External Count Selector"] -pub type CNTS_R = crate::FieldReader; +pub type LdsW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "External Count Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTS_A { +pub enum Cnts { #[doc = "0: External Count Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Count Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Count Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Count Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTS_A) -> Self { + fn from(variant: Cnts) -> Self { variant as _ } } -impl crate::FieldSpec for CNTS_A { +impl crate::FieldSpec for Cnts { type Ux = u8; } -impl CNTS_R { +#[doc = "Field `CNTS` reader - External Count Selector"] +pub type CntsR = crate::FieldReader; +impl CntsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CNTS_A { + pub const fn variant(&self) -> Cnts { match self.bits { - 0 => CNTS_A::VALUE1, - 1 => CNTS_A::VALUE2, - 2 => CNTS_A::VALUE3, - 3 => CNTS_A::VALUE4, + 0 => Cnts::Value1, + 1 => Cnts::Value2, + 2 => Cnts::Value3, + 3 => Cnts::Value4, _ => unreachable!(), } } #[doc = "External Count Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CNTS_A::VALUE1 + *self == Cnts::Value1 } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CNTS_A::VALUE2 + *self == Cnts::Value2 } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CNTS_A::VALUE3 + *self == Cnts::Value3 } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CNTS_A::VALUE4 + *self == Cnts::Value4 } } #[doc = "Field `CNTS` writer - External Count Selector"] -pub type CNTS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CNTS_A>; -impl<'a, REG> CNTS_W<'a, REG> +pub type CntsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cnts>; +impl<'a, REG> CntsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -583,346 +583,337 @@ where #[doc = "External Count Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE1) + self.variant(Cnts::Value1) } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE2) + self.variant(Cnts::Value2) } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE3) + self.variant(Cnts::Value3) } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE4) + self.variant(Cnts::Value4) } } -#[doc = "Field `OFS` reader - Override Function Selector"] -pub type OFS_R = crate::BitReader; #[doc = "Override Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OFS_A { +pub enum Ofs { #[doc = "0: Override functionality disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OFS_A) -> Self { + fn from(variant: Ofs) -> Self { variant as u8 != 0 } } -impl OFS_R { +#[doc = "Field `OFS` reader - Override Function Selector"] +pub type OfsR = crate::BitReader; +impl OfsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OFS_A { + pub const fn variant(&self) -> Ofs { match self.bits { - false => OFS_A::VALUE1, - true => OFS_A::VALUE2, + false => Ofs::Value1, + true => Ofs::Value2, } } #[doc = "Override functionality disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OFS_A::VALUE1 + *self == Ofs::Value1 } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OFS_A::VALUE2 + *self == Ofs::Value2 } } #[doc = "Field `OFS` writer - Override Function Selector"] -pub type OFS_W<'a, REG> = crate::BitWriter<'a, REG, OFS_A>; -impl<'a, REG> OFS_W<'a, REG> +pub type OfsW<'a, REG> = crate::BitWriter<'a, REG, Ofs>; +impl<'a, REG> OfsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override functionality disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OFS_A::VALUE1) + self.variant(Ofs::Value1) } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OFS_A::VALUE2) + self.variant(Ofs::Value2) } } -#[doc = "Field `TS` reader - Trap Function Selector"] -pub type TS_R = crate::BitReader; #[doc = "Trap Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TS_A { +pub enum Ts { #[doc = "0: Trap function disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TRAP function connected to Event 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TS_A) -> Self { + fn from(variant: Ts) -> Self { variant as u8 != 0 } } -impl TS_R { +#[doc = "Field `TS` reader - Trap Function Selector"] +pub type TsR = crate::BitReader; +impl TsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TS_A { + pub const fn variant(&self) -> Ts { match self.bits { - false => TS_A::VALUE1, - true => TS_A::VALUE2, + false => Ts::Value1, + true => Ts::Value2, } } #[doc = "Trap function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TS_A::VALUE1 + *self == Ts::Value1 } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TS_A::VALUE2 + *self == Ts::Value2 } } #[doc = "Field `TS` writer - Trap Function Selector"] -pub type TS_W<'a, REG> = crate::BitWriter<'a, REG, TS_A>; -impl<'a, REG> TS_W<'a, REG> +pub type TsW<'a, REG> = crate::BitWriter<'a, REG, Ts>; +impl<'a, REG> TsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TS_A::VALUE1) + self.variant(Ts::Value1) } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TS_A::VALUE2) + self.variant(Ts::Value2) } } #[doc = "Field `MOS` reader - External Modulation Functionality Selector"] -pub type MOS_R = crate::FieldReader; +pub type MosR = crate::FieldReader; #[doc = "Field `MOS` writer - External Modulation Functionality Selector"] -pub type MOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `TCE` reader - Timer Concatenation Enable"] -pub type TCE_R = crate::BitReader; +pub type MosW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Timer Concatenation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TCE_A { +pub enum Tce { #[doc = "0: Timer concatenation is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer concatenation is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TCE_A) -> Self { + fn from(variant: Tce) -> Self { variant as u8 != 0 } } -impl TCE_R { +#[doc = "Field `TCE` reader - Timer Concatenation Enable"] +pub type TceR = crate::BitReader; +impl TceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TCE_A { + pub const fn variant(&self) -> Tce { match self.bits { - false => TCE_A::VALUE1, - true => TCE_A::VALUE2, + false => Tce::Value1, + true => Tce::Value2, } } #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TCE_A::VALUE1 + *self == Tce::Value1 } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TCE_A::VALUE2 + *self == Tce::Value2 } } #[doc = "Field `TCE` writer - Timer Concatenation Enable"] -pub type TCE_W<'a, REG> = crate::BitWriter<'a, REG, TCE_A>; -impl<'a, REG> TCE_W<'a, REG> +pub type TceW<'a, REG> = crate::BitWriter<'a, REG, Tce>; +impl<'a, REG> TceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TCE_A::VALUE1) + self.variant(Tce::Value1) } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TCE_A::VALUE2) + self.variant(Tce::Value2) } } impl R { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - pub fn strts(&self) -> STRTS_R { - STRTS_R::new((self.bits & 3) as u8) + pub fn strts(&self) -> StrtsR { + StrtsR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - pub fn ends(&self) -> ENDS_R { - ENDS_R::new(((self.bits >> 2) & 3) as u8) + pub fn ends(&self) -> EndsR { + EndsR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - pub fn cap0s(&self) -> CAP0S_R { - CAP0S_R::new(((self.bits >> 4) & 3) as u8) + pub fn cap0s(&self) -> Cap0sR { + Cap0sR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - pub fn cap1s(&self) -> CAP1S_R { - CAP1S_R::new(((self.bits >> 6) & 3) as u8) + pub fn cap1s(&self) -> Cap1sR { + Cap1sR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - pub fn gates(&self) -> GATES_R { - GATES_R::new(((self.bits >> 8) & 3) as u8) + pub fn gates(&self) -> GatesR { + GatesR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - pub fn uds(&self) -> UDS_R { - UDS_R::new(((self.bits >> 10) & 3) as u8) + pub fn uds(&self) -> UdsR { + UdsR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - pub fn lds(&self) -> LDS_R { - LDS_R::new(((self.bits >> 12) & 3) as u8) + pub fn lds(&self) -> LdsR { + LdsR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - pub fn cnts(&self) -> CNTS_R { - CNTS_R::new(((self.bits >> 14) & 3) as u8) + pub fn cnts(&self) -> CntsR { + CntsR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - pub fn ofs(&self) -> OFS_R { - OFS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ofs(&self) -> OfsR { + OfsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - pub fn ts(&self) -> TS_R { - TS_R::new(((self.bits >> 17) & 1) != 0) + pub fn ts(&self) -> TsR { + TsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - pub fn mos(&self) -> MOS_R { - MOS_R::new(((self.bits >> 18) & 3) as u8) + pub fn mos(&self) -> MosR { + MosR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - pub fn tce(&self) -> TCE_R { - TCE_R::new(((self.bits >> 20) & 1) != 0) + pub fn tce(&self) -> TceR { + TceR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] #[must_use] - pub fn strts(&mut self) -> STRTS_W { - STRTS_W::new(self, 0) + pub fn strts(&mut self) -> StrtsW { + StrtsW::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] #[must_use] - pub fn ends(&mut self) -> ENDS_W { - ENDS_W::new(self, 2) + pub fn ends(&mut self) -> EndsW { + EndsW::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap0s(&mut self) -> CAP0S_W { - CAP0S_W::new(self, 4) + pub fn cap0s(&mut self) -> Cap0sW { + Cap0sW::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap1s(&mut self) -> CAP1S_W { - CAP1S_W::new(self, 6) + pub fn cap1s(&mut self) -> Cap1sW { + Cap1sW::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] #[must_use] - pub fn gates(&mut self) -> GATES_W { - GATES_W::new(self, 8) + pub fn gates(&mut self) -> GatesW { + GatesW::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] #[must_use] - pub fn uds(&mut self) -> UDS_W { - UDS_W::new(self, 10) + pub fn uds(&mut self) -> UdsW { + UdsW::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] #[must_use] - pub fn lds(&mut self) -> LDS_W { - LDS_W::new(self, 12) + pub fn lds(&mut self) -> LdsW { + LdsW::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] #[must_use] - pub fn cnts(&mut self) -> CNTS_W { - CNTS_W::new(self, 14) + pub fn cnts(&mut self) -> CntsW { + CntsW::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] #[must_use] - pub fn ofs(&mut self) -> OFS_W { - OFS_W::new(self, 16) + pub fn ofs(&mut self) -> OfsW { + OfsW::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] #[must_use] - pub fn ts(&mut self) -> TS_W { - TS_W::new(self, 17) + pub fn ts(&mut self) -> TsW { + TsW::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] #[must_use] - pub fn mos(&mut self) -> MOS_W { - MOS_W::new(self, 18) + pub fn mos(&mut self) -> MosW { + MosW::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] #[must_use] - pub fn tce(&mut self) -> TCE_W { - TCE_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tce(&mut self) -> TceW { + TceW::new(self, 20) } } #[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CMC_SPEC; -impl crate::RegisterSpec for CMC_SPEC { +pub struct CmcSpec; +impl crate::RegisterSpec for CmcSpec { type Ux = u32; } #[doc = "`read()` method returns [`cmc::R`](R) reader structure"] -impl crate::Readable for CMC_SPEC {} +impl crate::Readable for CmcSpec {} #[doc = "`write(|w| ..)` method takes [`cmc::W`](W) writer structure"] -impl crate::Writable for CMC_SPEC { +impl crate::Writable for CmcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMC to value 0"] -impl crate::Resettable for CMC_SPEC { +impl crate::Resettable for CmcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/cr.rs b/src/ccu40_cc40/cr.rs index 6a3a7ff7..ccb3d1e9 100644 --- a/src/ccu40_cc40/cr.rs +++ b/src/ccu40_cc40/cr.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR` reader - Compare Register"] -pub type CR_R = crate::FieldReader; +pub type CrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] - pub fn cr(&self) -> CR_R { - CR_R::new((self.bits & 0xffff) as u16) + pub fn cr(&self) -> CrR { + CrR::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CR_SPEC; -impl crate::RegisterSpec for CR_SPEC { +pub struct CrSpec; +impl crate::RegisterSpec for CrSpec { type Ux = u32; } #[doc = "`read()` method returns [`cr::R`](R) reader structure"] -impl crate::Readable for CR_SPEC {} +impl crate::Readable for CrSpec {} #[doc = "`reset()` method sets CR to value 0"] -impl crate::Resettable for CR_SPEC { +impl crate::Resettable for CrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/crs.rs b/src/ccu40_cc40/crs.rs index d11b0396..77ddf815 100644 --- a/src/ccu40_cc40/crs.rs +++ b/src/ccu40_cc40/crs.rs @@ -1,49 +1,40 @@ #[doc = "Register `CRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRS` reader - Compare Register"] -pub type CRS_R = crate::FieldReader; +pub type CrsR = crate::FieldReader; #[doc = "Field `CRS` writer - Compare Register"] -pub type CRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new((self.bits & 0xffff) as u16) + pub fn crs(&self) -> CrsR { + CrsR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] #[must_use] - pub fn crs(&mut self) -> CRS_W { - CRS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn crs(&mut self) -> CrsW { + CrsW::new(self, 0) } } #[doc = "Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CRS_SPEC; -impl crate::RegisterSpec for CRS_SPEC { +pub struct CrsSpec; +impl crate::RegisterSpec for CrsSpec { type Ux = u32; } #[doc = "`read()` method returns [`crs::R`](R) reader structure"] -impl crate::Readable for CRS_SPEC {} +impl crate::Readable for CrsSpec {} #[doc = "`write(|w| ..)` method takes [`crs::W`](W) writer structure"] -impl crate::Writable for CRS_SPEC { +impl crate::Writable for CrsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CRS to value 0"] -impl crate::Resettable for CRS_SPEC { +impl crate::Resettable for CrsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/dit.rs b/src/ccu40_cc40/dit.rs index 02e005ab..62dab291 100644 --- a/src/ccu40_cc40/dit.rs +++ b/src/ccu40_cc40/dit.rs @@ -1,29 +1,29 @@ #[doc = "Register `DIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DCV` reader - Dither compare Value"] -pub type DCV_R = crate::FieldReader; +pub type DcvR = crate::FieldReader; #[doc = "Field `DCNT` reader - Dither counter actual value"] -pub type DCNT_R = crate::FieldReader; +pub type DcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Dither compare Value"] #[inline(always)] - pub fn dcv(&self) -> DCV_R { - DCV_R::new((self.bits & 0x0f) as u8) + pub fn dcv(&self) -> DcvR { + DcvR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Dither counter actual value"] #[inline(always)] - pub fn dcnt(&self) -> DCNT_R { - DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn dcnt(&self) -> DcntR { + DcntR::new(((self.bits >> 8) & 0x0f) as u8) } } #[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIT_SPEC; -impl crate::RegisterSpec for DIT_SPEC { +pub struct DitSpec; +impl crate::RegisterSpec for DitSpec { type Ux = u32; } #[doc = "`read()` method returns [`dit::R`](R) reader structure"] -impl crate::Readable for DIT_SPEC {} +impl crate::Readable for DitSpec {} #[doc = "`reset()` method sets DIT to value 0"] -impl crate::Resettable for DIT_SPEC { +impl crate::Resettable for DitSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/dits.rs b/src/ccu40_cc40/dits.rs index 4039d3e7..e8d9215c 100644 --- a/src/ccu40_cc40/dits.rs +++ b/src/ccu40_cc40/dits.rs @@ -1,49 +1,40 @@ #[doc = "Register `DITS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DITS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DCVS` reader - Dither Shadow Compare Value"] -pub type DCVS_R = crate::FieldReader; +pub type DcvsR = crate::FieldReader; #[doc = "Field `DCVS` writer - Dither Shadow Compare Value"] -pub type DCVS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DcvsW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - pub fn dcvs(&self) -> DCVS_R { - DCVS_R::new((self.bits & 0x0f) as u8) + pub fn dcvs(&self) -> DcvsR { + DcvsR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn dcvs(&mut self) -> DCVS_W { - DCVS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dcvs(&mut self) -> DcvsW { + DcvsW::new(self, 0) } } #[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DITS_SPEC; -impl crate::RegisterSpec for DITS_SPEC { +pub struct DitsSpec; +impl crate::RegisterSpec for DitsSpec { type Ux = u32; } #[doc = "`read()` method returns [`dits::R`](R) reader structure"] -impl crate::Readable for DITS_SPEC {} +impl crate::Readable for DitsSpec {} #[doc = "`write(|w| ..)` method takes [`dits::W`](W) writer structure"] -impl crate::Writable for DITS_SPEC { +impl crate::Writable for DitsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DITS to value 0"] -impl crate::Resettable for DITS_SPEC { +impl crate::Resettable for DitsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ecrd0.rs b/src/ccu40_cc40/ecrd0.rs index 059e84b9..c4d61cb4 100644 --- a/src/ccu40_cc40/ecrd0.rs +++ b/src/ccu40_cc40/ecrd0.rs @@ -1,235 +1,235 @@ #[doc = "Register `ECRD0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CAPV_R = crate::FieldReader; +pub type CapvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `SPTR` reader - Slice pointer"] -pub type SPTR_R = crate::FieldReader; +pub type FpcvR = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SPTR_A { +pub enum Sptr { #[doc = "0: CC40"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC41"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC42"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC43"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SPTR_A) -> Self { + fn from(variant: Sptr) -> Self { variant as _ } } -impl crate::FieldSpec for SPTR_A { +impl crate::FieldSpec for Sptr { type Ux = u8; } -impl SPTR_R { +#[doc = "Field `SPTR` reader - Slice pointer"] +pub type SptrR = crate::FieldReader; +impl SptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SPTR_A { + pub const fn variant(&self) -> Sptr { match self.bits { - 0 => SPTR_A::VALUE1, - 1 => SPTR_A::VALUE2, - 2 => SPTR_A::VALUE3, - 3 => SPTR_A::VALUE4, + 0 => Sptr::Value1, + 1 => Sptr::Value2, + 2 => Sptr::Value3, + 3 => Sptr::Value4, _ => unreachable!(), } } #[doc = "CC40"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SPTR_A::VALUE1 + *self == Sptr::Value1 } #[doc = "CC41"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SPTR_A::VALUE2 + *self == Sptr::Value2 } #[doc = "CC42"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SPTR_A::VALUE3 + *self == Sptr::Value3 } #[doc = "CC43"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SPTR_A::VALUE4 + *self == Sptr::Value4 } } -#[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VPTR_R = crate::FieldReader; #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VPTR_A { +pub enum Vptr { #[doc = "0: Capture register 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture register 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Capture register 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Capture register 3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VPTR_A) -> Self { + fn from(variant: Vptr) -> Self { variant as _ } } -impl crate::FieldSpec for VPTR_A { +impl crate::FieldSpec for Vptr { type Ux = u8; } -impl VPTR_R { +#[doc = "Field `VPTR` reader - Capture register pointer"] +pub type VptrR = crate::FieldReader; +impl VptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VPTR_A { + pub const fn variant(&self) -> Vptr { match self.bits { - 0 => VPTR_A::VALUE1, - 1 => VPTR_A::VALUE2, - 2 => VPTR_A::VALUE3, - 3 => VPTR_A::VALUE4, + 0 => Vptr::Value1, + 1 => Vptr::Value2, + 2 => Vptr::Value3, + 3 => Vptr::Value4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VPTR_A::VALUE1 + *self == Vptr::Value1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VPTR_A::VALUE2 + *self == Vptr::Value2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == VPTR_A::VALUE3 + *self == Vptr::Value3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == VPTR_A::VALUE4 + *self == Vptr::Value4 } } -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value has been captured into this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } -#[doc = "Field `LCV` reader - Lost Capture Value"] -pub type LCV_R = crate::BitReader; #[doc = "Lost Capture Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCV_A { +pub enum Lcv { #[doc = "0: No capture was lost"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A capture was lost"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCV_A) -> Self { + fn from(variant: Lcv) -> Self { variant as u8 != 0 } } -impl LCV_R { +#[doc = "Field `LCV` reader - Lost Capture Value"] +pub type LcvR = crate::BitReader; +impl LcvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LCV_A { + pub const fn variant(&self) -> Lcv { match self.bits { - false => LCV_A::VALUE1, - true => LCV_A::VALUE2, + false => Lcv::Value1, + true => Lcv::Value2, } } #[doc = "No capture was lost"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LCV_A::VALUE1 + *self == Lcv::Value1 } #[doc = "A capture was lost"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LCV_A::VALUE2 + *self == Lcv::Value2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CAPV_R { - CAPV_R::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CapvR { + CapvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SPTR_R { - SPTR_R::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SptrR { + SptrR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VPTR_R { - VPTR_R::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VptrR { + VptrR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Lost Capture Value"] #[inline(always)] - pub fn lcv(&self) -> LCV_R { - LCV_R::new(((self.bits >> 25) & 1) != 0) + pub fn lcv(&self) -> LcvR { + LcvR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "Extended Read Back 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ECRD0_SPEC; -impl crate::RegisterSpec for ECRD0_SPEC { +pub struct Ecrd0Spec; +impl crate::RegisterSpec for Ecrd0Spec { type Ux = u32; } #[doc = "`read()` method returns [`ecrd0::R`](R) reader structure"] -impl crate::Readable for ECRD0_SPEC {} +impl crate::Readable for Ecrd0Spec {} #[doc = "`reset()` method sets ECRD0 to value 0"] -impl crate::Resettable for ECRD0_SPEC { +impl crate::Resettable for Ecrd0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ecrd1.rs b/src/ccu40_cc40/ecrd1.rs index cd78b4b6..c5e4e05b 100644 --- a/src/ccu40_cc40/ecrd1.rs +++ b/src/ccu40_cc40/ecrd1.rs @@ -1,235 +1,235 @@ #[doc = "Register `ECRD1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CAPV_R = crate::FieldReader; +pub type CapvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `SPTR` reader - Slice pointer"] -pub type SPTR_R = crate::FieldReader; +pub type FpcvR = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SPTR_A { +pub enum Sptr { #[doc = "0: CC40"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC41"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC42"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC43"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SPTR_A) -> Self { + fn from(variant: Sptr) -> Self { variant as _ } } -impl crate::FieldSpec for SPTR_A { +impl crate::FieldSpec for Sptr { type Ux = u8; } -impl SPTR_R { +#[doc = "Field `SPTR` reader - Slice pointer"] +pub type SptrR = crate::FieldReader; +impl SptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SPTR_A { + pub const fn variant(&self) -> Sptr { match self.bits { - 0 => SPTR_A::VALUE1, - 1 => SPTR_A::VALUE2, - 2 => SPTR_A::VALUE3, - 3 => SPTR_A::VALUE4, + 0 => Sptr::Value1, + 1 => Sptr::Value2, + 2 => Sptr::Value3, + 3 => Sptr::Value4, _ => unreachable!(), } } #[doc = "CC40"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SPTR_A::VALUE1 + *self == Sptr::Value1 } #[doc = "CC41"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SPTR_A::VALUE2 + *self == Sptr::Value2 } #[doc = "CC42"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SPTR_A::VALUE3 + *self == Sptr::Value3 } #[doc = "CC43"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SPTR_A::VALUE4 + *self == Sptr::Value4 } } -#[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VPTR_R = crate::FieldReader; #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VPTR_A { +pub enum Vptr { #[doc = "0: Capture register 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture register 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Capture register 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Capture register 3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VPTR_A) -> Self { + fn from(variant: Vptr) -> Self { variant as _ } } -impl crate::FieldSpec for VPTR_A { +impl crate::FieldSpec for Vptr { type Ux = u8; } -impl VPTR_R { +#[doc = "Field `VPTR` reader - Capture register pointer"] +pub type VptrR = crate::FieldReader; +impl VptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VPTR_A { + pub const fn variant(&self) -> Vptr { match self.bits { - 0 => VPTR_A::VALUE1, - 1 => VPTR_A::VALUE2, - 2 => VPTR_A::VALUE3, - 3 => VPTR_A::VALUE4, + 0 => Vptr::Value1, + 1 => Vptr::Value2, + 2 => Vptr::Value3, + 3 => Vptr::Value4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VPTR_A::VALUE1 + *self == Vptr::Value1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VPTR_A::VALUE2 + *self == Vptr::Value2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == VPTR_A::VALUE3 + *self == Vptr::Value3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == VPTR_A::VALUE4 + *self == Vptr::Value4 } } -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value has been captured into this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } -#[doc = "Field `LCV` reader - Lost Capture Value"] -pub type LCV_R = crate::BitReader; #[doc = "Lost Capture Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCV_A { +pub enum Lcv { #[doc = "0: No capture was lost"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A capture was lost"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCV_A) -> Self { + fn from(variant: Lcv) -> Self { variant as u8 != 0 } } -impl LCV_R { +#[doc = "Field `LCV` reader - Lost Capture Value"] +pub type LcvR = crate::BitReader; +impl LcvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LCV_A { + pub const fn variant(&self) -> Lcv { match self.bits { - false => LCV_A::VALUE1, - true => LCV_A::VALUE2, + false => Lcv::Value1, + true => Lcv::Value2, } } #[doc = "No capture was lost"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LCV_A::VALUE1 + *self == Lcv::Value1 } #[doc = "A capture was lost"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LCV_A::VALUE2 + *self == Lcv::Value2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CAPV_R { - CAPV_R::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CapvR { + CapvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SPTR_R { - SPTR_R::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SptrR { + SptrR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VPTR_R { - VPTR_R::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VptrR { + VptrR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Lost Capture Value"] #[inline(always)] - pub fn lcv(&self) -> LCV_R { - LCV_R::new(((self.bits >> 25) & 1) != 0) + pub fn lcv(&self) -> LcvR { + LcvR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "Extended Read Back 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd1::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ECRD1_SPEC; -impl crate::RegisterSpec for ECRD1_SPEC { +pub struct Ecrd1Spec; +impl crate::RegisterSpec for Ecrd1Spec { type Ux = u32; } #[doc = "`read()` method returns [`ecrd1::R`](R) reader structure"] -impl crate::Readable for ECRD1_SPEC {} +impl crate::Readable for Ecrd1Spec {} #[doc = "`reset()` method sets ECRD1 to value 0"] -impl crate::Resettable for ECRD1_SPEC { +impl crate::Resettable for Ecrd1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/fpc.rs b/src/ccu40_cc40/fpc.rs index 28d48e97..441df5b3 100644 --- a/src/ccu40_cc40/fpc.rs +++ b/src/ccu40_cc40/fpc.rs @@ -1,56 +1,47 @@ #[doc = "Register `FPC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Compare Value"] -pub type PCMP_R = crate::FieldReader; +pub type PcmpR = crate::FieldReader; #[doc = "Field `PVAL` reader - Actual Prescaler Value"] -pub type PVAL_R = crate::FieldReader; +pub type PvalR = crate::FieldReader; #[doc = "Field `PVAL` writer - Actual Prescaler Value"] -pub type PVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PCMP_R { - PCMP_R::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PcmpR { + PcmpR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - pub fn pval(&self) -> PVAL_R { - PVAL_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pval(&self) -> PvalR { + PvalR::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] #[must_use] - pub fn pval(&mut self) -> PVAL_W { - PVAL_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pval(&mut self) -> PvalW { + PvalW::new(self, 8) } } #[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPC_SPEC; -impl crate::RegisterSpec for FPC_SPEC { +pub struct FpcSpec; +impl crate::RegisterSpec for FpcSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpc::R`](R) reader structure"] -impl crate::Readable for FPC_SPEC {} +impl crate::Readable for FpcSpec {} #[doc = "`write(|w| ..)` method takes [`fpc::W`](W) writer structure"] -impl crate::Writable for FPC_SPEC { +impl crate::Writable for FpcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPC to value 0"] -impl crate::Resettable for FPC_SPEC { +impl crate::Resettable for FpcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/fpcs.rs b/src/ccu40_cc40/fpcs.rs index 127bce15..821adc52 100644 --- a/src/ccu40_cc40/fpcs.rs +++ b/src/ccu40_cc40/fpcs.rs @@ -1,49 +1,40 @@ #[doc = "Register `FPCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Shadow Compare Value"] -pub type PCMP_R = crate::FieldReader; +pub type PcmpR = crate::FieldReader; #[doc = "Field `PCMP` writer - Floating Prescaler Shadow Compare Value"] -pub type PCMP_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PcmpW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PCMP_R { - PCMP_R::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PcmpR { + PcmpR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn pcmp(&mut self) -> PCMP_W { - PCMP_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pcmp(&mut self) -> PcmpW { + PcmpW::new(self, 0) } } #[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPCS_SPEC; -impl crate::RegisterSpec for FPCS_SPEC { +pub struct FpcsSpec; +impl crate::RegisterSpec for FpcsSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpcs::R`](R) reader structure"] -impl crate::Readable for FPCS_SPEC {} +impl crate::Readable for FpcsSpec {} #[doc = "`write(|w| ..)` method takes [`fpcs::W`](W) writer structure"] -impl crate::Writable for FPCS_SPEC { +impl crate::Writable for FpcsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCS to value 0"] -impl crate::Resettable for FPCS_SPEC { +impl crate::Resettable for FpcsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ins.rs b/src/ccu40_cc40/ins.rs index e9b0f382..3990ed2e 100644 --- a/src/ccu40_cc40/ins.rs +++ b/src/ccu40_cc40/ins.rs @@ -1,163 +1,163 @@ #[doc = "Register `INS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INS` writer"] -pub type W = crate::W; -#[doc = "Field `EV0IS` reader - Event 0 signal selection"] -pub type EV0IS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Event 0 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV0IS_A { +pub enum Ev0is { #[doc = "0: CCU4x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU4x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU4x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU4x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU4x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU4x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU4x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU4x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU4x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU4x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU4x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU4x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU4x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU4x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU4x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU4x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV0IS_A) -> Self { + fn from(variant: Ev0is) -> Self { variant as _ } } -impl crate::FieldSpec for EV0IS_A { +impl crate::FieldSpec for Ev0is { type Ux = u8; } -impl EV0IS_R { +#[doc = "Field `EV0IS` reader - Event 0 signal selection"] +pub type Ev0isR = crate::FieldReader; +impl Ev0isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0IS_A { + pub const fn variant(&self) -> Ev0is { match self.bits { - 0 => EV0IS_A::VALUE1, - 1 => EV0IS_A::VALUE2, - 2 => EV0IS_A::VALUE3, - 3 => EV0IS_A::VALUE4, - 4 => EV0IS_A::VALUE5, - 5 => EV0IS_A::VALUE6, - 6 => EV0IS_A::VALUE7, - 7 => EV0IS_A::VALUE8, - 8 => EV0IS_A::VALUE9, - 9 => EV0IS_A::VALUE10, - 10 => EV0IS_A::VALUE11, - 11 => EV0IS_A::VALUE12, - 12 => EV0IS_A::VALUE13, - 13 => EV0IS_A::VALUE14, - 14 => EV0IS_A::VALUE15, - 15 => EV0IS_A::VALUE16, + 0 => Ev0is::Value1, + 1 => Ev0is::Value2, + 2 => Ev0is::Value3, + 3 => Ev0is::Value4, + 4 => Ev0is::Value5, + 5 => Ev0is::Value6, + 6 => Ev0is::Value7, + 7 => Ev0is::Value8, + 8 => Ev0is::Value9, + 9 => Ev0is::Value10, + 10 => Ev0is::Value11, + 11 => Ev0is::Value12, + 12 => Ev0is::Value13, + 13 => Ev0is::Value14, + 14 => Ev0is::Value15, + 15 => Ev0is::Value16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0IS_A::VALUE1 + *self == Ev0is::Value1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0IS_A::VALUE2 + *self == Ev0is::Value2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV0IS_A::VALUE3 + *self == Ev0is::Value3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV0IS_A::VALUE4 + *self == Ev0is::Value4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV0IS_A::VALUE5 + *self == Ev0is::Value5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV0IS_A::VALUE6 + *self == Ev0is::Value6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV0IS_A::VALUE7 + *self == Ev0is::Value7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV0IS_A::VALUE8 + *self == Ev0is::Value8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV0IS_A::VALUE9 + *self == Ev0is::Value9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV0IS_A::VALUE10 + *self == Ev0is::Value10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV0IS_A::VALUE11 + *self == Ev0is::Value11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV0IS_A::VALUE12 + *self == Ev0is::Value12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV0IS_A::VALUE13 + *self == Ev0is::Value13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV0IS_A::VALUE14 + *self == Ev0is::Value14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV0IS_A::VALUE15 + *self == Ev0is::Value15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV0IS_A::VALUE16 + *self == Ev0is::Value16 } } #[doc = "Field `EV0IS` writer - Event 0 signal selection"] -pub type EV0IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV0IS_A>; -impl<'a, REG> EV0IS_W<'a, REG> +pub type Ev0isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev0is>; +impl<'a, REG> Ev0isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -165,240 +165,240 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE1) + self.variant(Ev0is::Value1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE2) + self.variant(Ev0is::Value2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE3) + self.variant(Ev0is::Value3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE4) + self.variant(Ev0is::Value4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE5) + self.variant(Ev0is::Value5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE6) + self.variant(Ev0is::Value6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE7) + self.variant(Ev0is::Value7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE8) + self.variant(Ev0is::Value8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE9) + self.variant(Ev0is::Value9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE10) + self.variant(Ev0is::Value10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE11) + self.variant(Ev0is::Value11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE12) + self.variant(Ev0is::Value12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE13) + self.variant(Ev0is::Value13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE14) + self.variant(Ev0is::Value14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE15) + self.variant(Ev0is::Value15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE16) + self.variant(Ev0is::Value16) } } -#[doc = "Field `EV1IS` reader - Event 1 signal selection"] -pub type EV1IS_R = crate::FieldReader; #[doc = "Event 1 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV1IS_A { +pub enum Ev1is { #[doc = "0: CCU4x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU4x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU4x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU4x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU4x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU4x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU4x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU4x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU4x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU4x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU4x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU4x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU4x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU4x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU4x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU4x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV1IS_A) -> Self { + fn from(variant: Ev1is) -> Self { variant as _ } } -impl crate::FieldSpec for EV1IS_A { +impl crate::FieldSpec for Ev1is { type Ux = u8; } -impl EV1IS_R { +#[doc = "Field `EV1IS` reader - Event 1 signal selection"] +pub type Ev1isR = crate::FieldReader; +impl Ev1isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1IS_A { + pub const fn variant(&self) -> Ev1is { match self.bits { - 0 => EV1IS_A::VALUE1, - 1 => EV1IS_A::VALUE2, - 2 => EV1IS_A::VALUE3, - 3 => EV1IS_A::VALUE4, - 4 => EV1IS_A::VALUE5, - 5 => EV1IS_A::VALUE6, - 6 => EV1IS_A::VALUE7, - 7 => EV1IS_A::VALUE8, - 8 => EV1IS_A::VALUE9, - 9 => EV1IS_A::VALUE10, - 10 => EV1IS_A::VALUE11, - 11 => EV1IS_A::VALUE12, - 12 => EV1IS_A::VALUE13, - 13 => EV1IS_A::VALUE14, - 14 => EV1IS_A::VALUE15, - 15 => EV1IS_A::VALUE16, + 0 => Ev1is::Value1, + 1 => Ev1is::Value2, + 2 => Ev1is::Value3, + 3 => Ev1is::Value4, + 4 => Ev1is::Value5, + 5 => Ev1is::Value6, + 6 => Ev1is::Value7, + 7 => Ev1is::Value8, + 8 => Ev1is::Value9, + 9 => Ev1is::Value10, + 10 => Ev1is::Value11, + 11 => Ev1is::Value12, + 12 => Ev1is::Value13, + 13 => Ev1is::Value14, + 14 => Ev1is::Value15, + 15 => Ev1is::Value16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1IS_A::VALUE1 + *self == Ev1is::Value1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1IS_A::VALUE2 + *self == Ev1is::Value2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV1IS_A::VALUE3 + *self == Ev1is::Value3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV1IS_A::VALUE4 + *self == Ev1is::Value4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV1IS_A::VALUE5 + *self == Ev1is::Value5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV1IS_A::VALUE6 + *self == Ev1is::Value6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV1IS_A::VALUE7 + *self == Ev1is::Value7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV1IS_A::VALUE8 + *self == Ev1is::Value8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV1IS_A::VALUE9 + *self == Ev1is::Value9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV1IS_A::VALUE10 + *self == Ev1is::Value10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV1IS_A::VALUE11 + *self == Ev1is::Value11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV1IS_A::VALUE12 + *self == Ev1is::Value12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV1IS_A::VALUE13 + *self == Ev1is::Value13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV1IS_A::VALUE14 + *self == Ev1is::Value14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV1IS_A::VALUE15 + *self == Ev1is::Value15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV1IS_A::VALUE16 + *self == Ev1is::Value16 } } #[doc = "Field `EV1IS` writer - Event 1 signal selection"] -pub type EV1IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV1IS_A>; -impl<'a, REG> EV1IS_W<'a, REG> +pub type Ev1isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev1is>; +impl<'a, REG> Ev1isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -406,240 +406,240 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE1) + self.variant(Ev1is::Value1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE2) + self.variant(Ev1is::Value2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE3) + self.variant(Ev1is::Value3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE4) + self.variant(Ev1is::Value4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE5) + self.variant(Ev1is::Value5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE6) + self.variant(Ev1is::Value6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE7) + self.variant(Ev1is::Value7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE8) + self.variant(Ev1is::Value8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE9) + self.variant(Ev1is::Value9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE10) + self.variant(Ev1is::Value10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE11) + self.variant(Ev1is::Value11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE12) + self.variant(Ev1is::Value12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE13) + self.variant(Ev1is::Value13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE14) + self.variant(Ev1is::Value14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE15) + self.variant(Ev1is::Value15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE16) + self.variant(Ev1is::Value16) } } -#[doc = "Field `EV2IS` reader - Event 2 signal selection"] -pub type EV2IS_R = crate::FieldReader; #[doc = "Event 2 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV2IS_A { +pub enum Ev2is { #[doc = "0: CCU4x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU4x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU4x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU4x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU4x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU4x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU4x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU4x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU4x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU4x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU4x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU4x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU4x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU4x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU4x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU4x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV2IS_A) -> Self { + fn from(variant: Ev2is) -> Self { variant as _ } } -impl crate::FieldSpec for EV2IS_A { +impl crate::FieldSpec for Ev2is { type Ux = u8; } -impl EV2IS_R { +#[doc = "Field `EV2IS` reader - Event 2 signal selection"] +pub type Ev2isR = crate::FieldReader; +impl Ev2isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2IS_A { + pub const fn variant(&self) -> Ev2is { match self.bits { - 0 => EV2IS_A::VALUE1, - 1 => EV2IS_A::VALUE2, - 2 => EV2IS_A::VALUE3, - 3 => EV2IS_A::VALUE4, - 4 => EV2IS_A::VALUE5, - 5 => EV2IS_A::VALUE6, - 6 => EV2IS_A::VALUE7, - 7 => EV2IS_A::VALUE8, - 8 => EV2IS_A::VALUE9, - 9 => EV2IS_A::VALUE10, - 10 => EV2IS_A::VALUE11, - 11 => EV2IS_A::VALUE12, - 12 => EV2IS_A::VALUE13, - 13 => EV2IS_A::VALUE14, - 14 => EV2IS_A::VALUE15, - 15 => EV2IS_A::VALUE16, + 0 => Ev2is::Value1, + 1 => Ev2is::Value2, + 2 => Ev2is::Value3, + 3 => Ev2is::Value4, + 4 => Ev2is::Value5, + 5 => Ev2is::Value6, + 6 => Ev2is::Value7, + 7 => Ev2is::Value8, + 8 => Ev2is::Value9, + 9 => Ev2is::Value10, + 10 => Ev2is::Value11, + 11 => Ev2is::Value12, + 12 => Ev2is::Value13, + 13 => Ev2is::Value14, + 14 => Ev2is::Value15, + 15 => Ev2is::Value16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2IS_A::VALUE1 + *self == Ev2is::Value1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2IS_A::VALUE2 + *self == Ev2is::Value2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV2IS_A::VALUE3 + *self == Ev2is::Value3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV2IS_A::VALUE4 + *self == Ev2is::Value4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV2IS_A::VALUE5 + *self == Ev2is::Value5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV2IS_A::VALUE6 + *self == Ev2is::Value6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV2IS_A::VALUE7 + *self == Ev2is::Value7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV2IS_A::VALUE8 + *self == Ev2is::Value8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV2IS_A::VALUE9 + *self == Ev2is::Value9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV2IS_A::VALUE10 + *self == Ev2is::Value10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV2IS_A::VALUE11 + *self == Ev2is::Value11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV2IS_A::VALUE12 + *self == Ev2is::Value12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV2IS_A::VALUE13 + *self == Ev2is::Value13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV2IS_A::VALUE14 + *self == Ev2is::Value14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV2IS_A::VALUE15 + *self == Ev2is::Value15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV2IS_A::VALUE16 + *self == Ev2is::Value16 } } #[doc = "Field `EV2IS` writer - Event 2 signal selection"] -pub type EV2IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV2IS_A>; -impl<'a, REG> EV2IS_W<'a, REG> +pub type Ev2isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev2is>; +impl<'a, REG> Ev2isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -647,144 +647,144 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE1) + self.variant(Ev2is::Value1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE2) + self.variant(Ev2is::Value2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE3) + self.variant(Ev2is::Value3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE4) + self.variant(Ev2is::Value4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE5) + self.variant(Ev2is::Value5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE6) + self.variant(Ev2is::Value6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE7) + self.variant(Ev2is::Value7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE8) + self.variant(Ev2is::Value8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE9) + self.variant(Ev2is::Value9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE10) + self.variant(Ev2is::Value10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE11) + self.variant(Ev2is::Value11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE12) + self.variant(Ev2is::Value12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE13) + self.variant(Ev2is::Value13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE14) + self.variant(Ev2is::Value14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE15) + self.variant(Ev2is::Value15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE16) + self.variant(Ev2is::Value16) } } -#[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] -pub type EV0EM_R = crate::FieldReader; #[doc = "Event 0 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV0EM_A { +pub enum Ev0em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV0EM_A) -> Self { + fn from(variant: Ev0em) -> Self { variant as _ } } -impl crate::FieldSpec for EV0EM_A { +impl crate::FieldSpec for Ev0em { type Ux = u8; } -impl EV0EM_R { +#[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] +pub type Ev0emR = crate::FieldReader; +impl Ev0emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0EM_A { + pub const fn variant(&self) -> Ev0em { match self.bits { - 0 => EV0EM_A::VALUE1, - 1 => EV0EM_A::VALUE2, - 2 => EV0EM_A::VALUE3, - 3 => EV0EM_A::VALUE4, + 0 => Ev0em::Value1, + 1 => Ev0em::Value2, + 2 => Ev0em::Value3, + 3 => Ev0em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0EM_A::VALUE1 + *self == Ev0em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0EM_A::VALUE2 + *self == Ev0em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV0EM_A::VALUE3 + *self == Ev0em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV0EM_A::VALUE4 + *self == Ev0em::Value4 } } #[doc = "Field `EV0EM` writer - Event 0 Edge Selection"] -pub type EV0EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV0EM_A>; -impl<'a, REG> EV0EM_W<'a, REG> +pub type Ev0emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev0em>; +impl<'a, REG> Ev0emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,84 +792,84 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE1) + self.variant(Ev0em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE2) + self.variant(Ev0em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE3) + self.variant(Ev0em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE4) + self.variant(Ev0em::Value4) } } -#[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] -pub type EV1EM_R = crate::FieldReader; #[doc = "Event 1 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV1EM_A { +pub enum Ev1em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV1EM_A) -> Self { + fn from(variant: Ev1em) -> Self { variant as _ } } -impl crate::FieldSpec for EV1EM_A { +impl crate::FieldSpec for Ev1em { type Ux = u8; } -impl EV1EM_R { +#[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] +pub type Ev1emR = crate::FieldReader; +impl Ev1emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1EM_A { + pub const fn variant(&self) -> Ev1em { match self.bits { - 0 => EV1EM_A::VALUE1, - 1 => EV1EM_A::VALUE2, - 2 => EV1EM_A::VALUE3, - 3 => EV1EM_A::VALUE4, + 0 => Ev1em::Value1, + 1 => Ev1em::Value2, + 2 => Ev1em::Value3, + 3 => Ev1em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1EM_A::VALUE1 + *self == Ev1em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1EM_A::VALUE2 + *self == Ev1em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV1EM_A::VALUE3 + *self == Ev1em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV1EM_A::VALUE4 + *self == Ev1em::Value4 } } #[doc = "Field `EV1EM` writer - Event 1 Edge Selection"] -pub type EV1EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV1EM_A>; -impl<'a, REG> EV1EM_W<'a, REG> +pub type Ev1emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev1em>; +impl<'a, REG> Ev1emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -877,84 +877,84 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE1) + self.variant(Ev1em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE2) + self.variant(Ev1em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE3) + self.variant(Ev1em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE4) + self.variant(Ev1em::Value4) } } -#[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] -pub type EV2EM_R = crate::FieldReader; #[doc = "Event 2 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV2EM_A { +pub enum Ev2em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV2EM_A) -> Self { + fn from(variant: Ev2em) -> Self { variant as _ } } -impl crate::FieldSpec for EV2EM_A { +impl crate::FieldSpec for Ev2em { type Ux = u8; } -impl EV2EM_R { +#[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] +pub type Ev2emR = crate::FieldReader; +impl Ev2emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2EM_A { + pub const fn variant(&self) -> Ev2em { match self.bits { - 0 => EV2EM_A::VALUE1, - 1 => EV2EM_A::VALUE2, - 2 => EV2EM_A::VALUE3, - 3 => EV2EM_A::VALUE4, + 0 => Ev2em::Value1, + 1 => Ev2em::Value2, + 2 => Ev2em::Value3, + 3 => Ev2em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2EM_A::VALUE1 + *self == Ev2em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2EM_A::VALUE2 + *self == Ev2em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV2EM_A::VALUE3 + *self == Ev2em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV2EM_A::VALUE4 + *self == Ev2em::Value4 } } #[doc = "Field `EV2EM` writer - Event 2 Edge Selection"] -pub type EV2EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV2EM_A>; -impl<'a, REG> EV2EM_W<'a, REG> +pub type Ev2emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev2em>; +impl<'a, REG> Ev2emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -962,243 +962,243 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE1) + self.variant(Ev2em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE2) + self.variant(Ev2em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE3) + self.variant(Ev2em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE4) + self.variant(Ev2em::Value4) } } -#[doc = "Field `EV0LM` reader - Event 0 Level Selection"] -pub type EV0LM_R = crate::BitReader; #[doc = "Event 0 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV0LM_A { +pub enum Ev0lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV0LM_A) -> Self { + fn from(variant: Ev0lm) -> Self { variant as u8 != 0 } } -impl EV0LM_R { +#[doc = "Field `EV0LM` reader - Event 0 Level Selection"] +pub type Ev0lmR = crate::BitReader; +impl Ev0lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0LM_A { + pub const fn variant(&self) -> Ev0lm { match self.bits { - false => EV0LM_A::VALUE1, - true => EV0LM_A::VALUE2, + false => Ev0lm::Value1, + true => Ev0lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0LM_A::VALUE1 + *self == Ev0lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0LM_A::VALUE2 + *self == Ev0lm::Value2 } } #[doc = "Field `EV0LM` writer - Event 0 Level Selection"] -pub type EV0LM_W<'a, REG> = crate::BitWriter<'a, REG, EV0LM_A>; -impl<'a, REG> EV0LM_W<'a, REG> +pub type Ev0lmW<'a, REG> = crate::BitWriter<'a, REG, Ev0lm>; +impl<'a, REG> Ev0lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0LM_A::VALUE1) + self.variant(Ev0lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0LM_A::VALUE2) + self.variant(Ev0lm::Value2) } } -#[doc = "Field `EV1LM` reader - Event 1 Level Selection"] -pub type EV1LM_R = crate::BitReader; #[doc = "Event 1 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV1LM_A { +pub enum Ev1lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV1LM_A) -> Self { + fn from(variant: Ev1lm) -> Self { variant as u8 != 0 } } -impl EV1LM_R { +#[doc = "Field `EV1LM` reader - Event 1 Level Selection"] +pub type Ev1lmR = crate::BitReader; +impl Ev1lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1LM_A { + pub const fn variant(&self) -> Ev1lm { match self.bits { - false => EV1LM_A::VALUE1, - true => EV1LM_A::VALUE2, + false => Ev1lm::Value1, + true => Ev1lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1LM_A::VALUE1 + *self == Ev1lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1LM_A::VALUE2 + *self == Ev1lm::Value2 } } #[doc = "Field `EV1LM` writer - Event 1 Level Selection"] -pub type EV1LM_W<'a, REG> = crate::BitWriter<'a, REG, EV1LM_A>; -impl<'a, REG> EV1LM_W<'a, REG> +pub type Ev1lmW<'a, REG> = crate::BitWriter<'a, REG, Ev1lm>; +impl<'a, REG> Ev1lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1LM_A::VALUE1) + self.variant(Ev1lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1LM_A::VALUE2) + self.variant(Ev1lm::Value2) } } -#[doc = "Field `EV2LM` reader - Event 2 Level Selection"] -pub type EV2LM_R = crate::BitReader; #[doc = "Event 2 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV2LM_A { +pub enum Ev2lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV2LM_A) -> Self { + fn from(variant: Ev2lm) -> Self { variant as u8 != 0 } } -impl EV2LM_R { +#[doc = "Field `EV2LM` reader - Event 2 Level Selection"] +pub type Ev2lmR = crate::BitReader; +impl Ev2lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2LM_A { + pub const fn variant(&self) -> Ev2lm { match self.bits { - false => EV2LM_A::VALUE1, - true => EV2LM_A::VALUE2, + false => Ev2lm::Value1, + true => Ev2lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2LM_A::VALUE1 + *self == Ev2lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2LM_A::VALUE2 + *self == Ev2lm::Value2 } } #[doc = "Field `EV2LM` writer - Event 2 Level Selection"] -pub type EV2LM_W<'a, REG> = crate::BitWriter<'a, REG, EV2LM_A>; -impl<'a, REG> EV2LM_W<'a, REG> +pub type Ev2lmW<'a, REG> = crate::BitWriter<'a, REG, Ev2lm>; +impl<'a, REG> Ev2lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2LM_A::VALUE1) + self.variant(Ev2lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2LM_A::VALUE2) + self.variant(Ev2lm::Value2) } } -#[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] -pub type LPF0M_R = crate::FieldReader; #[doc = "Event 0 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF0M_A { +pub enum Lpf0m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF0M_A) -> Self { + fn from(variant: Lpf0m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF0M_A { +impl crate::FieldSpec for Lpf0m { type Ux = u8; } -impl LPF0M_R { +#[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] +pub type Lpf0mR = crate::FieldReader; +impl Lpf0mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF0M_A { + pub const fn variant(&self) -> Lpf0m { match self.bits { - 0 => LPF0M_A::VALUE1, - 1 => LPF0M_A::VALUE2, - 2 => LPF0M_A::VALUE3, - 3 => LPF0M_A::VALUE4, + 0 => Lpf0m::Value1, + 1 => Lpf0m::Value2, + 2 => Lpf0m::Value3, + 3 => Lpf0m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF0M_A::VALUE1 + *self == Lpf0m::Value1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF0M_A::VALUE2 + *self == Lpf0m::Value2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF0M_A::VALUE3 + *self == Lpf0m::Value3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF0M_A::VALUE4 + *self == Lpf0m::Value4 } } #[doc = "Field `LPF0M` writer - Event 0 Low Pass Filter Configuration"] -pub type LPF0M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF0M_A>; -impl<'a, REG> LPF0M_W<'a, REG> +pub type Lpf0mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf0m>; +impl<'a, REG> Lpf0mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1206,84 +1206,84 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE1) + self.variant(Lpf0m::Value1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE2) + self.variant(Lpf0m::Value2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE3) + self.variant(Lpf0m::Value3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE4) + self.variant(Lpf0m::Value4) } } -#[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] -pub type LPF1M_R = crate::FieldReader; #[doc = "Event 1 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF1M_A { +pub enum Lpf1m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF1M_A) -> Self { + fn from(variant: Lpf1m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF1M_A { +impl crate::FieldSpec for Lpf1m { type Ux = u8; } -impl LPF1M_R { +#[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] +pub type Lpf1mR = crate::FieldReader; +impl Lpf1mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF1M_A { + pub const fn variant(&self) -> Lpf1m { match self.bits { - 0 => LPF1M_A::VALUE1, - 1 => LPF1M_A::VALUE2, - 2 => LPF1M_A::VALUE3, - 3 => LPF1M_A::VALUE4, + 0 => Lpf1m::Value1, + 1 => Lpf1m::Value2, + 2 => Lpf1m::Value3, + 3 => Lpf1m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF1M_A::VALUE1 + *self == Lpf1m::Value1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF1M_A::VALUE2 + *self == Lpf1m::Value2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF1M_A::VALUE3 + *self == Lpf1m::Value3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF1M_A::VALUE4 + *self == Lpf1m::Value4 } } #[doc = "Field `LPF1M` writer - Event 1 Low Pass Filter Configuration"] -pub type LPF1M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF1M_A>; -impl<'a, REG> LPF1M_W<'a, REG> +pub type Lpf1mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf1m>; +impl<'a, REG> Lpf1mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1291,84 +1291,84 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE1) + self.variant(Lpf1m::Value1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE2) + self.variant(Lpf1m::Value2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE3) + self.variant(Lpf1m::Value3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE4) + self.variant(Lpf1m::Value4) } } -#[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] -pub type LPF2M_R = crate::FieldReader; #[doc = "Event 2 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF2M_A { +pub enum Lpf2m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF2M_A) -> Self { + fn from(variant: Lpf2m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF2M_A { +impl crate::FieldSpec for Lpf2m { type Ux = u8; } -impl LPF2M_R { +#[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] +pub type Lpf2mR = crate::FieldReader; +impl Lpf2mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF2M_A { + pub const fn variant(&self) -> Lpf2m { match self.bits { - 0 => LPF2M_A::VALUE1, - 1 => LPF2M_A::VALUE2, - 2 => LPF2M_A::VALUE3, - 3 => LPF2M_A::VALUE4, + 0 => Lpf2m::Value1, + 1 => Lpf2m::Value2, + 2 => Lpf2m::Value3, + 3 => Lpf2m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF2M_A::VALUE1 + *self == Lpf2m::Value1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF2M_A::VALUE2 + *self == Lpf2m::Value2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF2M_A::VALUE3 + *self == Lpf2m::Value3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF2M_A::VALUE4 + *self == Lpf2m::Value4 } } #[doc = "Field `LPF2M` writer - Event 2 Low Pass Filter Configuration"] -pub type LPF2M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF2M_A>; -impl<'a, REG> LPF2M_W<'a, REG> +pub type Lpf2mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf2m>; +impl<'a, REG> Lpf2mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1376,183 +1376,174 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE1) + self.variant(Lpf2m::Value1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE2) + self.variant(Lpf2m::Value2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE3) + self.variant(Lpf2m::Value3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE4) + self.variant(Lpf2m::Value4) } } impl R { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - pub fn ev0is(&self) -> EV0IS_R { - EV0IS_R::new((self.bits & 0x0f) as u8) + pub fn ev0is(&self) -> Ev0isR { + Ev0isR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - pub fn ev1is(&self) -> EV1IS_R { - EV1IS_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn ev1is(&self) -> Ev1isR { + Ev1isR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - pub fn ev2is(&self) -> EV2IS_R { - EV2IS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn ev2is(&self) -> Ev2isR { + Ev2isR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - pub fn ev0em(&self) -> EV0EM_R { - EV0EM_R::new(((self.bits >> 16) & 3) as u8) + pub fn ev0em(&self) -> Ev0emR { + Ev0emR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - pub fn ev1em(&self) -> EV1EM_R { - EV1EM_R::new(((self.bits >> 18) & 3) as u8) + pub fn ev1em(&self) -> Ev1emR { + Ev1emR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - pub fn ev2em(&self) -> EV2EM_R { - EV2EM_R::new(((self.bits >> 20) & 3) as u8) + pub fn ev2em(&self) -> Ev2emR { + Ev2emR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - pub fn ev0lm(&self) -> EV0LM_R { - EV0LM_R::new(((self.bits >> 22) & 1) != 0) + pub fn ev0lm(&self) -> Ev0lmR { + Ev0lmR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - pub fn ev1lm(&self) -> EV1LM_R { - EV1LM_R::new(((self.bits >> 23) & 1) != 0) + pub fn ev1lm(&self) -> Ev1lmR { + Ev1lmR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - pub fn ev2lm(&self) -> EV2LM_R { - EV2LM_R::new(((self.bits >> 24) & 1) != 0) + pub fn ev2lm(&self) -> Ev2lmR { + Ev2lmR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf0m(&self) -> LPF0M_R { - LPF0M_R::new(((self.bits >> 25) & 3) as u8) + pub fn lpf0m(&self) -> Lpf0mR { + Lpf0mR::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf1m(&self) -> LPF1M_R { - LPF1M_R::new(((self.bits >> 27) & 3) as u8) + pub fn lpf1m(&self) -> Lpf1mR { + Lpf1mR::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf2m(&self) -> LPF2M_R { - LPF2M_R::new(((self.bits >> 29) & 3) as u8) + pub fn lpf2m(&self) -> Lpf2mR { + Lpf2mR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] #[must_use] - pub fn ev0is(&mut self) -> EV0IS_W { - EV0IS_W::new(self, 0) + pub fn ev0is(&mut self) -> Ev0isW { + Ev0isW::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] #[must_use] - pub fn ev1is(&mut self) -> EV1IS_W { - EV1IS_W::new(self, 4) + pub fn ev1is(&mut self) -> Ev1isW { + Ev1isW::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] #[must_use] - pub fn ev2is(&mut self) -> EV2IS_W { - EV2IS_W::new(self, 8) + pub fn ev2is(&mut self) -> Ev2isW { + Ev2isW::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev0em(&mut self) -> EV0EM_W { - EV0EM_W::new(self, 16) + pub fn ev0em(&mut self) -> Ev0emW { + Ev0emW::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev1em(&mut self) -> EV1EM_W { - EV1EM_W::new(self, 18) + pub fn ev1em(&mut self) -> Ev1emW { + Ev1emW::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev2em(&mut self) -> EV2EM_W { - EV2EM_W::new(self, 20) + pub fn ev2em(&mut self) -> Ev2emW { + Ev2emW::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] #[must_use] - pub fn ev0lm(&mut self) -> EV0LM_W { - EV0LM_W::new(self, 22) + pub fn ev0lm(&mut self) -> Ev0lmW { + Ev0lmW::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] #[must_use] - pub fn ev1lm(&mut self) -> EV1LM_W { - EV1LM_W::new(self, 23) + pub fn ev1lm(&mut self) -> Ev1lmW { + Ev1lmW::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] #[must_use] - pub fn ev2lm(&mut self) -> EV2LM_W { - EV2LM_W::new(self, 24) + pub fn ev2lm(&mut self) -> Ev2lmW { + Ev2lmW::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf0m(&mut self) -> LPF0M_W { - LPF0M_W::new(self, 25) + pub fn lpf0m(&mut self) -> Lpf0mW { + Lpf0mW::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf1m(&mut self) -> LPF1M_W { - LPF1M_W::new(self, 27) + pub fn lpf1m(&mut self) -> Lpf1mW { + Lpf1mW::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf2m(&mut self) -> LPF2M_W { - LPF2M_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn lpf2m(&mut self) -> Lpf2mW { + Lpf2mW::new(self, 29) } } #[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INS_SPEC; -impl crate::RegisterSpec for INS_SPEC { +pub struct InsSpec; +impl crate::RegisterSpec for InsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ins::R`](R) reader structure"] -impl crate::Readable for INS_SPEC {} +impl crate::Readable for InsSpec {} #[doc = "`write(|w| ..)` method takes [`ins::W`](W) writer structure"] -impl crate::Writable for INS_SPEC { +impl crate::Writable for InsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INS to value 0"] -impl crate::Resettable for INS_SPEC { +impl crate::Resettable for InsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/inte.rs b/src/ccu40_cc40/inte.rs index 20cdcafb..cf7c05ec 100644 --- a/src/ccu40_cc40/inte.rs +++ b/src/ccu40_cc40/inte.rs @@ -1,482 +1,473 @@ #[doc = "Register `INTE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTE` writer"] -pub type W = crate::W; -#[doc = "Field `PME` reader - Period match while counting up enable"] -pub type PME_R = crate::BitReader; +pub type W = crate::W; #[doc = "Period match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PME_A { +pub enum Pme { #[doc = "0: Period Match interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Period Match interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PME_A) -> Self { + fn from(variant: Pme) -> Self { variant as u8 != 0 } } -impl PME_R { +#[doc = "Field `PME` reader - Period match while counting up enable"] +pub type PmeR = crate::BitReader; +impl PmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PME_A { + pub const fn variant(&self) -> Pme { match self.bits { - false => PME_A::VALUE1, - true => PME_A::VALUE2, + false => Pme::Value1, + true => Pme::Value2, } } #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PME_A::VALUE1 + *self == Pme::Value1 } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PME_A::VALUE2 + *self == Pme::Value2 } } #[doc = "Field `PME` writer - Period match while counting up enable"] -pub type PME_W<'a, REG> = crate::BitWriter<'a, REG, PME_A>; -impl<'a, REG> PME_W<'a, REG> +pub type PmeW<'a, REG> = crate::BitWriter<'a, REG, Pme>; +impl<'a, REG> PmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PME_A::VALUE1) + self.variant(Pme::Value1) } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PME_A::VALUE2) + self.variant(Pme::Value2) } } -#[doc = "Field `OME` reader - One match while counting down enable"] -pub type OME_R = crate::BitReader; #[doc = "One match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OME_A { +pub enum Ome { #[doc = "0: One Match interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One Match interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OME_A) -> Self { + fn from(variant: Ome) -> Self { variant as u8 != 0 } } -impl OME_R { +#[doc = "Field `OME` reader - One match while counting down enable"] +pub type OmeR = crate::BitReader; +impl OmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OME_A { + pub const fn variant(&self) -> Ome { match self.bits { - false => OME_A::VALUE1, - true => OME_A::VALUE2, + false => Ome::Value1, + true => Ome::Value2, } } #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OME_A::VALUE1 + *self == Ome::Value1 } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OME_A::VALUE2 + *self == Ome::Value2 } } #[doc = "Field `OME` writer - One match while counting down enable"] -pub type OME_W<'a, REG> = crate::BitWriter<'a, REG, OME_A>; -impl<'a, REG> OME_W<'a, REG> +pub type OmeW<'a, REG> = crate::BitWriter<'a, REG, Ome>; +impl<'a, REG> OmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OME_A::VALUE1) + self.variant(Ome::Value1) } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OME_A::VALUE2) + self.variant(Ome::Value2) } } -#[doc = "Field `CMUE` reader - Compare match while counting up enable"] -pub type CMUE_R = crate::BitReader; #[doc = "Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMUE_A { +pub enum Cmue { #[doc = "0: Compare Match while counting up interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMUE_A) -> Self { + fn from(variant: Cmue) -> Self { variant as u8 != 0 } } -impl CMUE_R { +#[doc = "Field `CMUE` reader - Compare match while counting up enable"] +pub type CmueR = crate::BitReader; +impl CmueR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMUE_A { + pub const fn variant(&self) -> Cmue { match self.bits { - false => CMUE_A::VALUE1, - true => CMUE_A::VALUE2, + false => Cmue::Value1, + true => Cmue::Value2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMUE_A::VALUE1 + *self == Cmue::Value1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMUE_A::VALUE2 + *self == Cmue::Value2 } } #[doc = "Field `CMUE` writer - Compare match while counting up enable"] -pub type CMUE_W<'a, REG> = crate::BitWriter<'a, REG, CMUE_A>; -impl<'a, REG> CMUE_W<'a, REG> +pub type CmueW<'a, REG> = crate::BitWriter<'a, REG, Cmue>; +impl<'a, REG> CmueW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMUE_A::VALUE1) + self.variant(Cmue::Value1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMUE_A::VALUE2) + self.variant(Cmue::Value2) } } -#[doc = "Field `CMDE` reader - Compare match while counting down enable"] -pub type CMDE_R = crate::BitReader; #[doc = "Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMDE_A { +pub enum Cmde { #[doc = "0: Compare Match while counting down interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMDE_A) -> Self { + fn from(variant: Cmde) -> Self { variant as u8 != 0 } } -impl CMDE_R { +#[doc = "Field `CMDE` reader - Compare match while counting down enable"] +pub type CmdeR = crate::BitReader; +impl CmdeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMDE_A { + pub const fn variant(&self) -> Cmde { match self.bits { - false => CMDE_A::VALUE1, - true => CMDE_A::VALUE2, + false => Cmde::Value1, + true => Cmde::Value2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDE_A::VALUE1 + *self == Cmde::Value1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDE_A::VALUE2 + *self == Cmde::Value2 } } #[doc = "Field `CMDE` writer - Compare match while counting down enable"] -pub type CMDE_W<'a, REG> = crate::BitWriter<'a, REG, CMDE_A>; -impl<'a, REG> CMDE_W<'a, REG> +pub type CmdeW<'a, REG> = crate::BitWriter<'a, REG, Cmde>; +impl<'a, REG> CmdeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDE_A::VALUE1) + self.variant(Cmde::Value1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDE_A::VALUE2) + self.variant(Cmde::Value2) } } -#[doc = "Field `E0AE` reader - Event 0 interrupt enable"] -pub type E0AE_R = crate::BitReader; #[doc = "Event 0 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0AE_A { +pub enum E0ae { #[doc = "0: Event 0 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 0 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0AE_A) -> Self { + fn from(variant: E0ae) -> Self { variant as u8 != 0 } } -impl E0AE_R { +#[doc = "Field `E0AE` reader - Event 0 interrupt enable"] +pub type E0aeR = crate::BitReader; +impl E0aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0AE_A { + pub const fn variant(&self) -> E0ae { match self.bits { - false => E0AE_A::VALUE1, - true => E0AE_A::VALUE2, + false => E0ae::Value1, + true => E0ae::Value2, } } #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0AE_A::VALUE1 + *self == E0ae::Value1 } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0AE_A::VALUE2 + *self == E0ae::Value2 } } #[doc = "Field `E0AE` writer - Event 0 interrupt enable"] -pub type E0AE_W<'a, REG> = crate::BitWriter<'a, REG, E0AE_A>; -impl<'a, REG> E0AE_W<'a, REG> +pub type E0aeW<'a, REG> = crate::BitWriter<'a, REG, E0ae>; +impl<'a, REG> E0aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0AE_A::VALUE1) + self.variant(E0ae::Value1) } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0AE_A::VALUE2) + self.variant(E0ae::Value2) } } -#[doc = "Field `E1AE` reader - Event 1 interrupt enable"] -pub type E1AE_R = crate::BitReader; #[doc = "Event 1 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1AE_A { +pub enum E1ae { #[doc = "0: Event 1 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 1 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1AE_A) -> Self { + fn from(variant: E1ae) -> Self { variant as u8 != 0 } } -impl E1AE_R { +#[doc = "Field `E1AE` reader - Event 1 interrupt enable"] +pub type E1aeR = crate::BitReader; +impl E1aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1AE_A { + pub const fn variant(&self) -> E1ae { match self.bits { - false => E1AE_A::VALUE1, - true => E1AE_A::VALUE2, + false => E1ae::Value1, + true => E1ae::Value2, } } #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1AE_A::VALUE1 + *self == E1ae::Value1 } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1AE_A::VALUE2 + *self == E1ae::Value2 } } #[doc = "Field `E1AE` writer - Event 1 interrupt enable"] -pub type E1AE_W<'a, REG> = crate::BitWriter<'a, REG, E1AE_A>; -impl<'a, REG> E1AE_W<'a, REG> +pub type E1aeW<'a, REG> = crate::BitWriter<'a, REG, E1ae>; +impl<'a, REG> E1aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1AE_A::VALUE1) + self.variant(E1ae::Value1) } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1AE_A::VALUE2) + self.variant(E1ae::Value2) } } -#[doc = "Field `E2AE` reader - Event 2 interrupt enable"] -pub type E2AE_R = crate::BitReader; #[doc = "Event 2 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2AE_A { +pub enum E2ae { #[doc = "0: Event 2 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 2 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2AE_A) -> Self { + fn from(variant: E2ae) -> Self { variant as u8 != 0 } } -impl E2AE_R { +#[doc = "Field `E2AE` reader - Event 2 interrupt enable"] +pub type E2aeR = crate::BitReader; +impl E2aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2AE_A { + pub const fn variant(&self) -> E2ae { match self.bits { - false => E2AE_A::VALUE1, - true => E2AE_A::VALUE2, + false => E2ae::Value1, + true => E2ae::Value2, } } #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2AE_A::VALUE1 + *self == E2ae::Value1 } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2AE_A::VALUE2 + *self == E2ae::Value2 } } #[doc = "Field `E2AE` writer - Event 2 interrupt enable"] -pub type E2AE_W<'a, REG> = crate::BitWriter<'a, REG, E2AE_A>; -impl<'a, REG> E2AE_W<'a, REG> +pub type E2aeW<'a, REG> = crate::BitWriter<'a, REG, E2ae>; +impl<'a, REG> E2aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2AE_A::VALUE1) + self.variant(E2ae::Value1) } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2AE_A::VALUE2) + self.variant(E2ae::Value2) } } impl R { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - pub fn pme(&self) -> PME_R { - PME_R::new((self.bits & 1) != 0) + pub fn pme(&self) -> PmeR { + PmeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - pub fn ome(&self) -> OME_R { - OME_R::new(((self.bits >> 1) & 1) != 0) + pub fn ome(&self) -> OmeR { + OmeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare match while counting up enable"] #[inline(always)] - pub fn cmue(&self) -> CMUE_R { - CMUE_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmue(&self) -> CmueR { + CmueR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Compare match while counting down enable"] #[inline(always)] - pub fn cmde(&self) -> CMDE_R { - CMDE_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmde(&self) -> CmdeR { + CmdeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - pub fn e0ae(&self) -> E0AE_R { - E0AE_R::new(((self.bits >> 8) & 1) != 0) + pub fn e0ae(&self) -> E0aeR { + E0aeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - pub fn e1ae(&self) -> E1AE_R { - E1AE_R::new(((self.bits >> 9) & 1) != 0) + pub fn e1ae(&self) -> E1aeR { + E1aeR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - pub fn e2ae(&self) -> E2AE_R { - E2AE_R::new(((self.bits >> 10) & 1) != 0) + pub fn e2ae(&self) -> E2aeR { + E2aeR::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] #[must_use] - pub fn pme(&mut self) -> PME_W { - PME_W::new(self, 0) + pub fn pme(&mut self) -> PmeW { + PmeW::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] #[must_use] - pub fn ome(&mut self) -> OME_W { - OME_W::new(self, 1) + pub fn ome(&mut self) -> OmeW { + OmeW::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmue(&mut self) -> CMUE_W { - CMUE_W::new(self, 2) + pub fn cmue(&mut self) -> CmueW { + CmueW::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmde(&mut self) -> CMDE_W { - CMDE_W::new(self, 3) + pub fn cmde(&mut self) -> CmdeW { + CmdeW::new(self, 3) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] #[must_use] - pub fn e0ae(&mut self) -> E0AE_W { - E0AE_W::new(self, 8) + pub fn e0ae(&mut self) -> E0aeW { + E0aeW::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] #[must_use] - pub fn e1ae(&mut self) -> E1AE_W { - E1AE_W::new(self, 9) + pub fn e1ae(&mut self) -> E1aeW { + E1aeW::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] #[must_use] - pub fn e2ae(&mut self) -> E2AE_W { - E2AE_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn e2ae(&mut self) -> E2aeW { + E2aeW::new(self, 10) } } #[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTE_SPEC; -impl crate::RegisterSpec for INTE_SPEC { +pub struct InteSpec; +impl crate::RegisterSpec for InteSpec { type Ux = u32; } #[doc = "`read()` method returns [`inte::R`](R) reader structure"] -impl crate::Readable for INTE_SPEC {} +impl crate::Readable for InteSpec {} #[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"] -impl crate::Writable for INTE_SPEC { +impl crate::Writable for InteSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTE to value 0"] -impl crate::Resettable for INTE_SPEC { +impl crate::Resettable for InteSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ints.rs b/src/ccu40_cc40/ints.rs index 1e1cdb88..3bf2fafc 100644 --- a/src/ccu40_cc40/ints.rs +++ b/src/ccu40_cc40/ints.rs @@ -1,309 +1,309 @@ #[doc = "Register `INTS` reader"] -pub type R = crate::R; -#[doc = "Field `PMUS` reader - Period Match while Counting Up"] -pub type PMUS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Period Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PMUS_A { +pub enum Pmus { #[doc = "0: Period match while counting up not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Period match while counting up detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PMUS_A) -> Self { + fn from(variant: Pmus) -> Self { variant as u8 != 0 } } -impl PMUS_R { +#[doc = "Field `PMUS` reader - Period Match while Counting Up"] +pub type PmusR = crate::BitReader; +impl PmusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PMUS_A { + pub const fn variant(&self) -> Pmus { match self.bits { - false => PMUS_A::VALUE1, - true => PMUS_A::VALUE2, + false => Pmus::Value1, + true => Pmus::Value2, } } #[doc = "Period match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PMUS_A::VALUE1 + *self == Pmus::Value1 } #[doc = "Period match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PMUS_A::VALUE2 + *self == Pmus::Value2 } } -#[doc = "Field `OMDS` reader - One Match while Counting Down"] -pub type OMDS_R = crate::BitReader; #[doc = "One Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OMDS_A { +pub enum Omds { #[doc = "0: One match while counting down not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One match while counting down detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OMDS_A) -> Self { + fn from(variant: Omds) -> Self { variant as u8 != 0 } } -impl OMDS_R { +#[doc = "Field `OMDS` reader - One Match while Counting Down"] +pub type OmdsR = crate::BitReader; +impl OmdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OMDS_A { + pub const fn variant(&self) -> Omds { match self.bits { - false => OMDS_A::VALUE1, - true => OMDS_A::VALUE2, + false => Omds::Value1, + true => Omds::Value2, } } #[doc = "One match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OMDS_A::VALUE1 + *self == Omds::Value1 } #[doc = "One match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OMDS_A::VALUE2 + *self == Omds::Value2 } } -#[doc = "Field `CMUS` reader - Compare Match while Counting Up"] -pub type CMUS_R = crate::BitReader; #[doc = "Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMUS_A { +pub enum Cmus { #[doc = "0: Compare match while counting up not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting up detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMUS_A) -> Self { + fn from(variant: Cmus) -> Self { variant as u8 != 0 } } -impl CMUS_R { +#[doc = "Field `CMUS` reader - Compare Match while Counting Up"] +pub type CmusR = crate::BitReader; +impl CmusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMUS_A { + pub const fn variant(&self) -> Cmus { match self.bits { - false => CMUS_A::VALUE1, - true => CMUS_A::VALUE2, + false => Cmus::Value1, + true => Cmus::Value2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMUS_A::VALUE1 + *self == Cmus::Value1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMUS_A::VALUE2 + *self == Cmus::Value2 } } -#[doc = "Field `CMDS` reader - Compare Match while Counting Down"] -pub type CMDS_R = crate::BitReader; #[doc = "Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMDS_A { +pub enum Cmds { #[doc = "0: Compare match while counting down not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting down detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMDS_A) -> Self { + fn from(variant: Cmds) -> Self { variant as u8 != 0 } } -impl CMDS_R { +#[doc = "Field `CMDS` reader - Compare Match while Counting Down"] +pub type CmdsR = crate::BitReader; +impl CmdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMDS_A { + pub const fn variant(&self) -> Cmds { match self.bits { - false => CMDS_A::VALUE1, - true => CMDS_A::VALUE2, + false => Cmds::Value1, + true => Cmds::Value2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDS_A::VALUE1 + *self == Cmds::Value1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDS_A::VALUE2 + *self == Cmds::Value2 } } -#[doc = "Field `E0AS` reader - Event 0 Detection Status"] -pub type E0AS_R = crate::BitReader; #[doc = "Event 0 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0AS_A { +pub enum E0as { #[doc = "0: Event 0 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 0 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0AS_A) -> Self { + fn from(variant: E0as) -> Self { variant as u8 != 0 } } -impl E0AS_R { +#[doc = "Field `E0AS` reader - Event 0 Detection Status"] +pub type E0asR = crate::BitReader; +impl E0asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0AS_A { + pub const fn variant(&self) -> E0as { match self.bits { - false => E0AS_A::VALUE1, - true => E0AS_A::VALUE2, + false => E0as::Value1, + true => E0as::Value2, } } #[doc = "Event 0 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0AS_A::VALUE1 + *self == E0as::Value1 } #[doc = "Event 0 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0AS_A::VALUE2 + *self == E0as::Value2 } } -#[doc = "Field `E1AS` reader - Event 1 Detection Status"] -pub type E1AS_R = crate::BitReader; #[doc = "Event 1 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1AS_A { +pub enum E1as { #[doc = "0: Event 1 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 1 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1AS_A) -> Self { + fn from(variant: E1as) -> Self { variant as u8 != 0 } } -impl E1AS_R { +#[doc = "Field `E1AS` reader - Event 1 Detection Status"] +pub type E1asR = crate::BitReader; +impl E1asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1AS_A { + pub const fn variant(&self) -> E1as { match self.bits { - false => E1AS_A::VALUE1, - true => E1AS_A::VALUE2, + false => E1as::Value1, + true => E1as::Value2, } } #[doc = "Event 1 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1AS_A::VALUE1 + *self == E1as::Value1 } #[doc = "Event 1 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1AS_A::VALUE2 + *self == E1as::Value2 } } -#[doc = "Field `E2AS` reader - Event 2 Detection Status"] -pub type E2AS_R = crate::BitReader; #[doc = "Event 2 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2AS_A { +pub enum E2as { #[doc = "0: Event 2 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 2 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2AS_A) -> Self { + fn from(variant: E2as) -> Self { variant as u8 != 0 } } -impl E2AS_R { +#[doc = "Field `E2AS` reader - Event 2 Detection Status"] +pub type E2asR = crate::BitReader; +impl E2asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2AS_A { + pub const fn variant(&self) -> E2as { match self.bits { - false => E2AS_A::VALUE1, - true => E2AS_A::VALUE2, + false => E2as::Value1, + true => E2as::Value2, } } #[doc = "Event 2 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2AS_A::VALUE1 + *self == E2as::Value1 } #[doc = "Event 2 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2AS_A::VALUE2 + *self == E2as::Value2 } } #[doc = "Field `TRPF` reader - Trap Flag Status"] -pub type TRPF_R = crate::BitReader; +pub type TrpfR = crate::BitReader; impl R { #[doc = "Bit 0 - Period Match while Counting Up"] #[inline(always)] - pub fn pmus(&self) -> PMUS_R { - PMUS_R::new((self.bits & 1) != 0) + pub fn pmus(&self) -> PmusR { + PmusR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One Match while Counting Down"] #[inline(always)] - pub fn omds(&self) -> OMDS_R { - OMDS_R::new(((self.bits >> 1) & 1) != 0) + pub fn omds(&self) -> OmdsR { + OmdsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare Match while Counting Up"] #[inline(always)] - pub fn cmus(&self) -> CMUS_R { - CMUS_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmus(&self) -> CmusR { + CmusR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Compare Match while Counting Down"] #[inline(always)] - pub fn cmds(&self) -> CMDS_R { - CMDS_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmds(&self) -> CmdsR { + CmdsR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Event 0 Detection Status"] #[inline(always)] - pub fn e0as(&self) -> E0AS_R { - E0AS_R::new(((self.bits >> 8) & 1) != 0) + pub fn e0as(&self) -> E0asR { + E0asR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 Detection Status"] #[inline(always)] - pub fn e1as(&self) -> E1AS_R { - E1AS_R::new(((self.bits >> 9) & 1) != 0) + pub fn e1as(&self) -> E1asR { + E1asR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 Detection Status"] #[inline(always)] - pub fn e2as(&self) -> E2AS_R { - E2AS_R::new(((self.bits >> 10) & 1) != 0) + pub fn e2as(&self) -> E2asR { + E2asR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Trap Flag Status"] #[inline(always)] - pub fn trpf(&self) -> TRPF_R { - TRPF_R::new(((self.bits >> 11) & 1) != 0) + pub fn trpf(&self) -> TrpfR { + TrpfR::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTS_SPEC; -impl crate::RegisterSpec for INTS_SPEC { +pub struct IntsSpec; +impl crate::RegisterSpec for IntsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ints::R`](R) reader structure"] -impl crate::Readable for INTS_SPEC {} +impl crate::Readable for IntsSpec {} #[doc = "`reset()` method sets INTS to value 0"] -impl crate::Resettable for INTS_SPEC { +impl crate::Resettable for IntsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/pr.rs b/src/ccu40_cc40/pr.rs index 33893da5..48f8c561 100644 --- a/src/ccu40_cc40/pr.rs +++ b/src/ccu40_cc40/pr.rs @@ -1,22 +1,22 @@ #[doc = "Register `PR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PR` reader - Period Register"] -pub type PR_R = crate::FieldReader; +pub type PrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new((self.bits & 0xffff) as u16) + pub fn pr(&self) -> PrR { + PrR::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PR_SPEC; -impl crate::RegisterSpec for PR_SPEC { +pub struct PrSpec; +impl crate::RegisterSpec for PrSpec { type Ux = u32; } #[doc = "`read()` method returns [`pr::R`](R) reader structure"] -impl crate::Readable for PR_SPEC {} +impl crate::Readable for PrSpec {} #[doc = "`reset()` method sets PR to value 0"] -impl crate::Resettable for PR_SPEC { +impl crate::Resettable for PrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/prs.rs b/src/ccu40_cc40/prs.rs index 42b94e8d..d281b0ba 100644 --- a/src/ccu40_cc40/prs.rs +++ b/src/ccu40_cc40/prs.rs @@ -1,49 +1,40 @@ #[doc = "Register `PRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRS` reader - Period Register"] -pub type PRS_R = crate::FieldReader; +pub type PrsR = crate::FieldReader; #[doc = "Field `PRS` writer - Period Register"] -pub type PRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new((self.bits & 0xffff) as u16) + pub fn prs(&self) -> PrsR { + PrsR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W { - PRS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 0) } } #[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRS_SPEC; -impl crate::RegisterSpec for PRS_SPEC { +pub struct PrsSpec; +impl crate::RegisterSpec for PrsSpec { type Ux = u32; } #[doc = "`read()` method returns [`prs::R`](R) reader structure"] -impl crate::Readable for PRS_SPEC {} +impl crate::Readable for PrsSpec {} #[doc = "`write(|w| ..)` method takes [`prs::W`](W) writer structure"] -impl crate::Writable for PRS_SPEC { +impl crate::Writable for PrsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS to value 0"] -impl crate::Resettable for PRS_SPEC { +impl crate::Resettable for PrsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/psc.rs b/src/ccu40_cc40/psc.rs index bf44f412..f5e97989 100644 --- a/src/ccu40_cc40/psc.rs +++ b/src/ccu40_cc40/psc.rs @@ -1,49 +1,40 @@ #[doc = "Register `PSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PSIV` reader - Prescaler Initial Value"] -pub type PSIV_R = crate::FieldReader; +pub type PsivR = crate::FieldReader; #[doc = "Field `PSIV` writer - Prescaler Initial Value"] -pub type PSIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PsivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - pub fn psiv(&self) -> PSIV_R { - PSIV_R::new((self.bits & 0x0f) as u8) + pub fn psiv(&self) -> PsivR { + PsivR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] #[must_use] - pub fn psiv(&mut self) -> PSIV_W { - PSIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn psiv(&mut self) -> PsivW { + PsivW::new(self, 0) } } #[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSC_SPEC; -impl crate::RegisterSpec for PSC_SPEC { +pub struct PscSpec; +impl crate::RegisterSpec for PscSpec { type Ux = u32; } #[doc = "`read()` method returns [`psc::R`](R) reader structure"] -impl crate::Readable for PSC_SPEC {} +impl crate::Readable for PscSpec {} #[doc = "`write(|w| ..)` method takes [`psc::W`](W) writer structure"] -impl crate::Writable for PSC_SPEC { +impl crate::Writable for PscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSC to value 0"] -impl crate::Resettable for PSC_SPEC { +impl crate::Resettable for PscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/psl.rs b/src/ccu40_cc40/psl.rs index 5ceb04fd..9407d22f 100644 --- a/src/ccu40_cc40/psl.rs +++ b/src/ccu40_cc40/psl.rs @@ -1,98 +1,89 @@ #[doc = "Register `PSL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSL` writer"] -pub type W = crate::W; -#[doc = "Field `PSL` reader - Output Passive Level"] -pub type PSL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Output Passive Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSL_A { +pub enum Psl { #[doc = "0: Passive Level is LOW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Passive Level is HIGH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSL_A) -> Self { + fn from(variant: Psl) -> Self { variant as u8 != 0 } } -impl PSL_R { +#[doc = "Field `PSL` reader - Output Passive Level"] +pub type PslR = crate::BitReader; +impl PslR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSL_A { + pub const fn variant(&self) -> Psl { match self.bits { - false => PSL_A::VALUE1, - true => PSL_A::VALUE2, + false => Psl::Value1, + true => Psl::Value2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSL_A::VALUE1 + *self == Psl::Value1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSL_A::VALUE2 + *self == Psl::Value2 } } #[doc = "Field `PSL` writer - Output Passive Level"] -pub type PSL_W<'a, REG> = crate::BitWriter<'a, REG, PSL_A>; -impl<'a, REG> PSL_W<'a, REG> +pub type PslW<'a, REG> = crate::BitWriter<'a, REG, Psl>; +impl<'a, REG> PslW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PSL_A::VALUE1) + self.variant(Psl::Value1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PSL_A::VALUE2) + self.variant(Psl::Value2) } } impl R { #[doc = "Bit 0 - Output Passive Level"] #[inline(always)] - pub fn psl(&self) -> PSL_R { - PSL_R::new((self.bits & 1) != 0) + pub fn psl(&self) -> PslR { + PslR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Passive Level"] #[inline(always)] #[must_use] - pub fn psl(&mut self) -> PSL_W { - PSL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn psl(&mut self) -> PslW { + PslW::new(self, 0) } } #[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSL_SPEC; -impl crate::RegisterSpec for PSL_SPEC { +pub struct PslSpec; +impl crate::RegisterSpec for PslSpec { type Ux = u32; } #[doc = "`read()` method returns [`psl::R`](R) reader structure"] -impl crate::Readable for PSL_SPEC {} +impl crate::Readable for PslSpec {} #[doc = "`write(|w| ..)` method takes [`psl::W`](W) writer structure"] -impl crate::Writable for PSL_SPEC { +impl crate::Writable for PslSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSL to value 0"] -impl crate::Resettable for PSL_SPEC { +impl crate::Resettable for PslSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/srs.rs b/src/ccu40_cc40/srs.rs index d4c0ff90..c1aef6f8 100644 --- a/src/ccu40_cc40/srs.rs +++ b/src/ccu40_cc40/srs.rs @@ -1,67 +1,67 @@ #[doc = "Register `SRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRS` writer"] -pub type W = crate::W; -#[doc = "Field `POSR` reader - Period/One match Service request selector"] -pub type POSR_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Period/One match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSR_A { +pub enum Posr { #[doc = "0: Forward to CC4ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC4ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC4ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC4ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSR_A) -> Self { + fn from(variant: Posr) -> Self { variant as _ } } -impl crate::FieldSpec for POSR_A { +impl crate::FieldSpec for Posr { type Ux = u8; } -impl POSR_R { +#[doc = "Field `POSR` reader - Period/One match Service request selector"] +pub type PosrR = crate::FieldReader; +impl PosrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSR_A { + pub const fn variant(&self) -> Posr { match self.bits { - 0 => POSR_A::VALUE1, - 1 => POSR_A::VALUE2, - 2 => POSR_A::VALUE3, - 3 => POSR_A::VALUE4, + 0 => Posr::Value1, + 1 => Posr::Value2, + 2 => Posr::Value3, + 3 => Posr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSR_A::VALUE1 + *self == Posr::Value1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSR_A::VALUE2 + *self == Posr::Value2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == POSR_A::VALUE3 + *self == Posr::Value3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == POSR_A::VALUE4 + *self == Posr::Value4 } } #[doc = "Field `POSR` writer - Period/One match Service request selector"] -pub type POSR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, POSR_A>; -impl<'a, REG> POSR_W<'a, REG> +pub type PosrW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Posr>; +impl<'a, REG> PosrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE1) + self.variant(Posr::Value1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE2) + self.variant(Posr::Value2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE3) + self.variant(Posr::Value3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE4) + self.variant(Posr::Value4) } } -#[doc = "Field `CMSR` reader - Compare match Service request selector"] -pub type CMSR_R = crate::FieldReader; #[doc = "Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMSR_A { +pub enum Cmsr { #[doc = "0: Forward to CC4ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC4ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC4ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC4ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMSR_A) -> Self { + fn from(variant: Cmsr) -> Self { variant as _ } } -impl crate::FieldSpec for CMSR_A { +impl crate::FieldSpec for Cmsr { type Ux = u8; } -impl CMSR_R { +#[doc = "Field `CMSR` reader - Compare match Service request selector"] +pub type CmsrR = crate::FieldReader; +impl CmsrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMSR_A { + pub const fn variant(&self) -> Cmsr { match self.bits { - 0 => CMSR_A::VALUE1, - 1 => CMSR_A::VALUE2, - 2 => CMSR_A::VALUE3, - 3 => CMSR_A::VALUE4, + 0 => Cmsr::Value1, + 1 => Cmsr::Value2, + 2 => Cmsr::Value3, + 3 => Cmsr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMSR_A::VALUE1 + *self == Cmsr::Value1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMSR_A::VALUE2 + *self == Cmsr::Value2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMSR_A::VALUE3 + *self == Cmsr::Value3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMSR_A::VALUE4 + *self == Cmsr::Value4 } } #[doc = "Field `CMSR` writer - Compare match Service request selector"] -pub type CMSR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CMSR_A>; -impl<'a, REG> CMSR_W<'a, REG> +pub type CmsrW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cmsr>; +impl<'a, REG> CmsrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMSR_A::VALUE1) + self.variant(Cmsr::Value1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMSR_A::VALUE2) + self.variant(Cmsr::Value2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMSR_A::VALUE3) + self.variant(Cmsr::Value3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMSR_A::VALUE4) + self.variant(Cmsr::Value4) } } -#[doc = "Field `E0SR` reader - Event 0 Service request selector"] -pub type E0SR_R = crate::FieldReader; #[doc = "Event 0 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E0SR_A { +pub enum E0sr { #[doc = "0: Forward to CC4ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC4ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC4ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC4ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E0SR_A) -> Self { + fn from(variant: E0sr) -> Self { variant as _ } } -impl crate::FieldSpec for E0SR_A { +impl crate::FieldSpec for E0sr { type Ux = u8; } -impl E0SR_R { +#[doc = "Field `E0SR` reader - Event 0 Service request selector"] +pub type E0srR = crate::FieldReader; +impl E0srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0SR_A { + pub const fn variant(&self) -> E0sr { match self.bits { - 0 => E0SR_A::VALUE1, - 1 => E0SR_A::VALUE2, - 2 => E0SR_A::VALUE3, - 3 => E0SR_A::VALUE4, + 0 => E0sr::Value1, + 1 => E0sr::Value2, + 2 => E0sr::Value3, + 3 => E0sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0SR_A::VALUE1 + *self == E0sr::Value1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0SR_A::VALUE2 + *self == E0sr::Value2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E0SR_A::VALUE3 + *self == E0sr::Value3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E0SR_A::VALUE4 + *self == E0sr::Value4 } } #[doc = "Field `E0SR` writer - Event 0 Service request selector"] -pub type E0SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E0SR_A>; -impl<'a, REG> E0SR_W<'a, REG> +pub type E0srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E0sr>; +impl<'a, REG> E0srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE1) + self.variant(E0sr::Value1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE2) + self.variant(E0sr::Value2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE3) + self.variant(E0sr::Value3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE4) + self.variant(E0sr::Value4) } } -#[doc = "Field `E1SR` reader - Event 1 Service request selector"] -pub type E1SR_R = crate::FieldReader; #[doc = "Event 1 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E1SR_A { +pub enum E1sr { #[doc = "0: Forward to CC4ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC4ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC4ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC4ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E1SR_A) -> Self { + fn from(variant: E1sr) -> Self { variant as _ } } -impl crate::FieldSpec for E1SR_A { +impl crate::FieldSpec for E1sr { type Ux = u8; } -impl E1SR_R { +#[doc = "Field `E1SR` reader - Event 1 Service request selector"] +pub type E1srR = crate::FieldReader; +impl E1srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1SR_A { + pub const fn variant(&self) -> E1sr { match self.bits { - 0 => E1SR_A::VALUE1, - 1 => E1SR_A::VALUE2, - 2 => E1SR_A::VALUE3, - 3 => E1SR_A::VALUE4, + 0 => E1sr::Value1, + 1 => E1sr::Value2, + 2 => E1sr::Value3, + 3 => E1sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1SR_A::VALUE1 + *self == E1sr::Value1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1SR_A::VALUE2 + *self == E1sr::Value2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E1SR_A::VALUE3 + *self == E1sr::Value3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E1SR_A::VALUE4 + *self == E1sr::Value4 } } #[doc = "Field `E1SR` writer - Event 1 Service request selector"] -pub type E1SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E1SR_A>; -impl<'a, REG> E1SR_W<'a, REG> +pub type E1srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E1sr>; +impl<'a, REG> E1srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE1) + self.variant(E1sr::Value1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE2) + self.variant(E1sr::Value2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE3) + self.variant(E1sr::Value3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE4) + self.variant(E1sr::Value4) } } -#[doc = "Field `E2SR` reader - Event 2 Service request selector"] -pub type E2SR_R = crate::FieldReader; #[doc = "Event 2 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E2SR_A { +pub enum E2sr { #[doc = "0: Forward to CC4ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC4ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC4ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC4ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E2SR_A) -> Self { + fn from(variant: E2sr) -> Self { variant as _ } } -impl crate::FieldSpec for E2SR_A { +impl crate::FieldSpec for E2sr { type Ux = u8; } -impl E2SR_R { +#[doc = "Field `E2SR` reader - Event 2 Service request selector"] +pub type E2srR = crate::FieldReader; +impl E2srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2SR_A { + pub const fn variant(&self) -> E2sr { match self.bits { - 0 => E2SR_A::VALUE1, - 1 => E2SR_A::VALUE2, - 2 => E2SR_A::VALUE3, - 3 => E2SR_A::VALUE4, + 0 => E2sr::Value1, + 1 => E2sr::Value2, + 2 => E2sr::Value3, + 3 => E2sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2SR_A::VALUE1 + *self == E2sr::Value1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2SR_A::VALUE2 + *self == E2sr::Value2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E2SR_A::VALUE3 + *self == E2sr::Value3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E2SR_A::VALUE4 + *self == E2sr::Value4 } } #[doc = "Field `E2SR` writer - Event 2 Service request selector"] -pub type E2SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E2SR_A>; -impl<'a, REG> E2SR_W<'a, REG> +pub type E2srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E2sr>; +impl<'a, REG> E2srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,106 +409,97 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE1) + self.variant(E2sr::Value1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE2) + self.variant(E2sr::Value2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE3) + self.variant(E2sr::Value3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE4) + self.variant(E2sr::Value4) } } impl R { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - pub fn posr(&self) -> POSR_R { - POSR_R::new((self.bits & 3) as u8) + pub fn posr(&self) -> PosrR { + PosrR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Compare match Service request selector"] #[inline(always)] - pub fn cmsr(&self) -> CMSR_R { - CMSR_R::new(((self.bits >> 2) & 3) as u8) + pub fn cmsr(&self) -> CmsrR { + CmsrR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - pub fn e0sr(&self) -> E0SR_R { - E0SR_R::new(((self.bits >> 8) & 3) as u8) + pub fn e0sr(&self) -> E0srR { + E0srR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - pub fn e1sr(&self) -> E1SR_R { - E1SR_R::new(((self.bits >> 10) & 3) as u8) + pub fn e1sr(&self) -> E1srR { + E1srR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - pub fn e2sr(&self) -> E2SR_R { - E2SR_R::new(((self.bits >> 12) & 3) as u8) + pub fn e2sr(&self) -> E2srR { + E2srR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] #[must_use] - pub fn posr(&mut self) -> POSR_W { - POSR_W::new(self, 0) + pub fn posr(&mut self) -> PosrW { + PosrW::new(self, 0) } #[doc = "Bits 2:3 - Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cmsr(&mut self) -> CMSR_W { - CMSR_W::new(self, 2) + pub fn cmsr(&mut self) -> CmsrW { + CmsrW::new(self, 2) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] #[must_use] - pub fn e0sr(&mut self) -> E0SR_W { - E0SR_W::new(self, 8) + pub fn e0sr(&mut self) -> E0srW { + E0srW::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] #[must_use] - pub fn e1sr(&mut self) -> E1SR_W { - E1SR_W::new(self, 10) + pub fn e1sr(&mut self) -> E1srW { + E1srW::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] #[must_use] - pub fn e2sr(&mut self) -> E2SR_W { - E2SR_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn e2sr(&mut self) -> E2srW { + E2srW::new(self, 12) } } #[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRS_SPEC; -impl crate::RegisterSpec for SRS_SPEC { +pub struct SrsSpec; +impl crate::RegisterSpec for SrsSpec { type Ux = u32; } #[doc = "`read()` method returns [`srs::R`](R) reader structure"] -impl crate::Readable for SRS_SPEC {} +impl crate::Readable for SrsSpec {} #[doc = "`write(|w| ..)` method takes [`srs::W`](W) writer structure"] -impl crate::Writable for SRS_SPEC { +impl crate::Writable for SrsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRS to value 0"] -impl crate::Resettable for SRS_SPEC { +impl crate::Resettable for SrsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/swr.rs b/src/ccu40_cc40/swr.rs index b2f1c50d..580f7441 100644 --- a/src/ccu40_cc40/swr.rs +++ b/src/ccu40_cc40/swr.rs @@ -1,92 +1,83 @@ #[doc = "Register `SWR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPM` writer - Period match while counting up clear"] -pub type RPM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ROM` writer - One match while counting down clear"] -pub type ROM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RomW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCMU` writer - Compare match while counting up clear"] -pub type RCMU_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RcmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCMD` writer - Compare match while counting down clear"] -pub type RCMD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RcmdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE0A` writer - Event 0 detection clear"] -pub type RE0A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re0aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE1A` writer - Event 1 detection clear"] -pub type RE1A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re1aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE2A` writer - Event 2 detection clear"] -pub type RE2A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re2aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTRPF` writer - Trap Flag status clear"] -pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RtrpfW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] #[must_use] - pub fn rpm(&mut self) -> RPM_W { - RPM_W::new(self, 0) + pub fn rpm(&mut self) -> RpmW { + RpmW::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] #[must_use] - pub fn rom(&mut self) -> ROM_W { - ROM_W::new(self, 1) + pub fn rom(&mut self) -> RomW { + RomW::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcmu(&mut self) -> RCMU_W { - RCMU_W::new(self, 2) + pub fn rcmu(&mut self) -> RcmuW { + RcmuW::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcmd(&mut self) -> RCMD_W { - RCMD_W::new(self, 3) + pub fn rcmd(&mut self) -> RcmdW { + RcmdW::new(self, 3) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] #[must_use] - pub fn re0a(&mut self) -> RE0A_W { - RE0A_W::new(self, 8) + pub fn re0a(&mut self) -> Re0aW { + Re0aW::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] #[must_use] - pub fn re1a(&mut self) -> RE1A_W { - RE1A_W::new(self, 9) + pub fn re1a(&mut self) -> Re1aW { + Re1aW::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] #[must_use] - pub fn re2a(&mut self) -> RE2A_W { - RE2A_W::new(self, 10) + pub fn re2a(&mut self) -> Re2aW { + Re2aW::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] #[must_use] - pub fn rtrpf(&mut self) -> RTRPF_W { - RTRPF_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rtrpf(&mut self) -> RtrpfW { + RtrpfW::new(self, 11) } } #[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SWR_SPEC; -impl crate::RegisterSpec for SWR_SPEC { +pub struct SwrSpec; +impl crate::RegisterSpec for SwrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`swr::W`](W) writer structure"] -impl crate::Writable for SWR_SPEC { +impl crate::Writable for SwrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWR to value 0"] -impl crate::Resettable for SWR_SPEC { +impl crate::Resettable for SwrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/sws.rs b/src/ccu40_cc40/sws.rs index 6c3201b9..9d3889d6 100644 --- a/src/ccu40_cc40/sws.rs +++ b/src/ccu40_cc40/sws.rs @@ -1,92 +1,83 @@ #[doc = "Register `SWS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SPM` writer - Period match while counting up set"] -pub type SPM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SpmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOM` writer - One match while counting down set"] -pub type SOM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SomW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCMU` writer - Compare match while counting up set"] -pub type SCMU_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ScmuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCMD` writer - Compare match while counting down set"] -pub type SCMD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ScmdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE0A` writer - Event 0 detection set"] -pub type SE0A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se0aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE1A` writer - Event 1 detection set"] -pub type SE1A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se1aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE2A` writer - Event 2 detection set"] -pub type SE2A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se2aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRPF` writer - Trap Flag status set"] -pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StrpfW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] #[must_use] - pub fn spm(&mut self) -> SPM_W { - SPM_W::new(self, 0) + pub fn spm(&mut self) -> SpmW { + SpmW::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] #[must_use] - pub fn som(&mut self) -> SOM_W { - SOM_W::new(self, 1) + pub fn som(&mut self) -> SomW { + SomW::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scmu(&mut self) -> SCMU_W { - SCMU_W::new(self, 2) + pub fn scmu(&mut self) -> ScmuW { + ScmuW::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scmd(&mut self) -> SCMD_W { - SCMD_W::new(self, 3) + pub fn scmd(&mut self) -> ScmdW { + ScmdW::new(self, 3) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] #[must_use] - pub fn se0a(&mut self) -> SE0A_W { - SE0A_W::new(self, 8) + pub fn se0a(&mut self) -> Se0aW { + Se0aW::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] #[must_use] - pub fn se1a(&mut self) -> SE1A_W { - SE1A_W::new(self, 9) + pub fn se1a(&mut self) -> Se1aW { + Se1aW::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] #[must_use] - pub fn se2a(&mut self) -> SE2A_W { - SE2A_W::new(self, 10) + pub fn se2a(&mut self) -> Se2aW { + Se2aW::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] #[must_use] - pub fn strpf(&mut self) -> STRPF_W { - STRPF_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn strpf(&mut self) -> StrpfW { + StrpfW::new(self, 11) } } #[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SWS_SPEC; -impl crate::RegisterSpec for SWS_SPEC { +pub struct SwsSpec; +impl crate::RegisterSpec for SwsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sws::W`](W) writer structure"] -impl crate::Writable for SWS_SPEC { +impl crate::Writable for SwsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWS to value 0"] -impl crate::Resettable for SWS_SPEC { +impl crate::Resettable for SwsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tc.rs b/src/ccu40_cc40/tc.rs index 4408f51b..c5366548 100644 --- a/src/ccu40_cc40/tc.rs +++ b/src/ccu40_cc40/tc.rs @@ -1,266 +1,266 @@ #[doc = "Register `TC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TC` writer"] -pub type W = crate::W; -#[doc = "Field `TCM` reader - Timer Counting Mode"] -pub type TCM_R = crate::BitReader; +pub type W = crate::W; #[doc = "Timer Counting Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TCM_A { +pub enum Tcm { #[doc = "0: Edge aligned mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Center aligned mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TCM_A) -> Self { + fn from(variant: Tcm) -> Self { variant as u8 != 0 } } -impl TCM_R { +#[doc = "Field `TCM` reader - Timer Counting Mode"] +pub type TcmR = crate::BitReader; +impl TcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TCM_A { + pub const fn variant(&self) -> Tcm { match self.bits { - false => TCM_A::VALUE1, - true => TCM_A::VALUE2, + false => Tcm::Value1, + true => Tcm::Value2, } } #[doc = "Edge aligned mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TCM_A::VALUE1 + *self == Tcm::Value1 } #[doc = "Center aligned mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TCM_A::VALUE2 + *self == Tcm::Value2 } } #[doc = "Field `TCM` writer - Timer Counting Mode"] -pub type TCM_W<'a, REG> = crate::BitWriter<'a, REG, TCM_A>; -impl<'a, REG> TCM_W<'a, REG> +pub type TcmW<'a, REG> = crate::BitWriter<'a, REG, Tcm>; +impl<'a, REG> TcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Edge aligned mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TCM_A::VALUE1) + self.variant(Tcm::Value1) } #[doc = "Center aligned mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TCM_A::VALUE2) + self.variant(Tcm::Value2) } } -#[doc = "Field `TSSM` reader - Timer Single Shot Mode"] -pub type TSSM_R = crate::BitReader; #[doc = "Timer Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSSM_A { +pub enum Tssm { #[doc = "0: Single shot mode is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single shot mode is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSSM_A) -> Self { + fn from(variant: Tssm) -> Self { variant as u8 != 0 } } -impl TSSM_R { +#[doc = "Field `TSSM` reader - Timer Single Shot Mode"] +pub type TssmR = crate::BitReader; +impl TssmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSSM_A { + pub const fn variant(&self) -> Tssm { match self.bits { - false => TSSM_A::VALUE1, - true => TSSM_A::VALUE2, + false => Tssm::Value1, + true => Tssm::Value2, } } #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSSM_A::VALUE1 + *self == Tssm::Value1 } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSSM_A::VALUE2 + *self == Tssm::Value2 } } #[doc = "Field `TSSM` writer - Timer Single Shot Mode"] -pub type TSSM_W<'a, REG> = crate::BitWriter<'a, REG, TSSM_A>; -impl<'a, REG> TSSM_W<'a, REG> +pub type TssmW<'a, REG> = crate::BitWriter<'a, REG, Tssm>; +impl<'a, REG> TssmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSSM_A::VALUE1) + self.variant(Tssm::Value1) } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSSM_A::VALUE2) + self.variant(Tssm::Value2) } } #[doc = "Field `CLST` reader - Shadow Transfer on Clear"] -pub type CLST_R = crate::BitReader; +pub type ClstR = crate::BitReader; #[doc = "Field `CLST` writer - Shadow Transfer on Clear"] -pub type CLST_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `CMOD` reader - Capture Compare Mode"] -pub type CMOD_R = crate::BitReader; +pub type ClstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Capture Compare Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMOD_A { +pub enum Cmod { #[doc = "0: Compare Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMOD_A) -> Self { + fn from(variant: Cmod) -> Self { variant as u8 != 0 } } -impl CMOD_R { +#[doc = "Field `CMOD` reader - Capture Compare Mode"] +pub type CmodR = crate::BitReader; +impl CmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMOD_A { + pub const fn variant(&self) -> Cmod { match self.bits { - false => CMOD_A::VALUE1, - true => CMOD_A::VALUE2, + false => Cmod::Value1, + true => Cmod::Value2, } } #[doc = "Compare Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMOD_A::VALUE1 + *self == Cmod::Value1 } #[doc = "Capture Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMOD_A::VALUE2 + *self == Cmod::Value2 } } -#[doc = "Field `ECM` reader - Extended Capture Mode"] -pub type ECM_R = crate::BitReader; #[doc = "Extended Capture Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECM_A { +pub enum Ecm { #[doc = "0: Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECM_A) -> Self { + fn from(variant: Ecm) -> Self { variant as u8 != 0 } } -impl ECM_R { +#[doc = "Field `ECM` reader - Extended Capture Mode"] +pub type EcmR = crate::BitReader; +impl EcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECM_A { + pub const fn variant(&self) -> Ecm { match self.bits { - false => ECM_A::VALUE1, - true => ECM_A::VALUE2, + false => Ecm::Value1, + true => Ecm::Value2, } } #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECM_A::VALUE1 + *self == Ecm::Value1 } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECM_A::VALUE2 + *self == Ecm::Value2 } } #[doc = "Field `ECM` writer - Extended Capture Mode"] -pub type ECM_W<'a, REG> = crate::BitWriter<'a, REG, ECM_A>; -impl<'a, REG> ECM_W<'a, REG> +pub type EcmW<'a, REG> = crate::BitWriter<'a, REG, Ecm>; +impl<'a, REG> EcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECM_A::VALUE1) + self.variant(Ecm::Value1) } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECM_A::VALUE2) + self.variant(Ecm::Value2) } } -#[doc = "Field `CAPC` reader - Clear on Capture Control"] -pub type CAPC_R = crate::FieldReader; #[doc = "Clear on Capture Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAPC_A { +pub enum Capc { #[doc = "0: Timer is never cleared on a capture event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Timer is always cleared in a capture event."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAPC_A) -> Self { + fn from(variant: Capc) -> Self { variant as _ } } -impl crate::FieldSpec for CAPC_A { +impl crate::FieldSpec for Capc { type Ux = u8; } -impl CAPC_R { +#[doc = "Field `CAPC` reader - Clear on Capture Control"] +pub type CapcR = crate::FieldReader; +impl CapcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAPC_A { + pub const fn variant(&self) -> Capc { match self.bits { - 0 => CAPC_A::VALUE1, - 1 => CAPC_A::VALUE2, - 2 => CAPC_A::VALUE3, - 3 => CAPC_A::VALUE4, + 0 => Capc::Value1, + 1 => Capc::Value2, + 2 => Capc::Value3, + 3 => Capc::Value4, _ => unreachable!(), } } #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAPC_A::VALUE1 + *self == Capc::Value1 } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAPC_A::VALUE2 + *self == Capc::Value2 } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAPC_A::VALUE3 + *self == Capc::Value3 } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAPC_A::VALUE4 + *self == Capc::Value4 } } #[doc = "Field `CAPC` writer - Clear on Capture Control"] -pub type CAPC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAPC_A>; -impl<'a, REG> CAPC_W<'a, REG> +pub type CapcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Capc>; +impl<'a, REG> CapcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -268,76 +268,76 @@ where #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE1) + self.variant(Capc::Value1) } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE2) + self.variant(Capc::Value2) } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE3) + self.variant(Capc::Value3) } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE4) + self.variant(Capc::Value4) } } -#[doc = "Field `ENDM` reader - Extended Stop Function Control"] -pub type ENDM_R = crate::FieldReader; #[doc = "Extended Stop Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENDM_A { +pub enum Endm { #[doc = "0: Clears the timer run bit only (default stop)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clears the timer only (flush)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clears the timer and run bit (flush/stop)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENDM_A) -> Self { + fn from(variant: Endm) -> Self { variant as _ } } -impl crate::FieldSpec for ENDM_A { +impl crate::FieldSpec for Endm { type Ux = u8; } -impl ENDM_R { +#[doc = "Field `ENDM` reader - Extended Stop Function Control"] +pub type EndmR = crate::FieldReader; +impl EndmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ENDM_A::VALUE1), - 1 => Some(ENDM_A::VALUE2), - 2 => Some(ENDM_A::VALUE3), + 0 => Some(Endm::Value1), + 1 => Some(Endm::Value2), + 2 => Some(Endm::Value3), _ => None, } } #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDM_A::VALUE1 + *self == Endm::Value1 } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDM_A::VALUE2 + *self == Endm::Value2 } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENDM_A::VALUE3 + *self == Endm::Value3 } } #[doc = "Field `ENDM` writer - Extended Stop Function Control"] -pub type ENDM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDM_A>; -impl<'a, REG> ENDM_W<'a, REG> +pub type EndmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Endm>; +impl<'a, REG> EndmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -345,238 +345,238 @@ where #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE1) + self.variant(Endm::Value1) } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE2) + self.variant(Endm::Value2) } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE3) + self.variant(Endm::Value3) } } -#[doc = "Field `STRM` reader - Extended Start Function Control"] -pub type STRM_R = crate::BitReader; #[doc = "Extended Start Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STRM_A { +pub enum Strm { #[doc = "0: Sets run bit only (default start)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clears the timer and sets run bit (flush/start)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STRM_A) -> Self { + fn from(variant: Strm) -> Self { variant as u8 != 0 } } -impl STRM_R { +#[doc = "Field `STRM` reader - Extended Start Function Control"] +pub type StrmR = crate::BitReader; +impl StrmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STRM_A { + pub const fn variant(&self) -> Strm { match self.bits { - false => STRM_A::VALUE1, - true => STRM_A::VALUE2, + false => Strm::Value1, + true => Strm::Value2, } } #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STRM_A::VALUE1 + *self == Strm::Value1 } #[doc = "Clears the timer and sets run bit (flush/start)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STRM_A::VALUE2 + *self == Strm::Value2 } } #[doc = "Field `STRM` writer - Extended Start Function Control"] -pub type STRM_W<'a, REG> = crate::BitWriter<'a, REG, STRM_A>; -impl<'a, REG> STRM_W<'a, REG> +pub type StrmW<'a, REG> = crate::BitWriter<'a, REG, Strm>; +impl<'a, REG> StrmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STRM_A::VALUE1) + self.variant(Strm::Value1) } #[doc = "Clears the timer and sets run bit (flush/start)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STRM_A::VALUE2) + self.variant(Strm::Value2) } } -#[doc = "Field `SCE` reader - Equal Capture Event enable"] -pub type SCE_R = crate::BitReader; #[doc = "Equal Capture Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCE_A { +pub enum Sce { #[doc = "0: Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCE_A) -> Self { + fn from(variant: Sce) -> Self { variant as u8 != 0 } } -impl SCE_R { +#[doc = "Field `SCE` reader - Equal Capture Event enable"] +pub type SceR = crate::BitReader; +impl SceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCE_A { + pub const fn variant(&self) -> Sce { match self.bits { - false => SCE_A::VALUE1, - true => SCE_A::VALUE2, + false => Sce::Value1, + true => Sce::Value2, } } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCE_A::VALUE1 + *self == Sce::Value1 } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCE_A::VALUE2 + *self == Sce::Value2 } } #[doc = "Field `SCE` writer - Equal Capture Event enable"] -pub type SCE_W<'a, REG> = crate::BitWriter<'a, REG, SCE_A>; -impl<'a, REG> SCE_W<'a, REG> +pub type SceW<'a, REG> = crate::BitWriter<'a, REG, Sce>; +impl<'a, REG> SceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCE_A::VALUE1) + self.variant(Sce::Value1) } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCE_A::VALUE2) + self.variant(Sce::Value2) } } -#[doc = "Field `CCS` reader - Continuous Capture Enable"] -pub type CCS_R = crate::BitReader; #[doc = "Continuous Capture Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCS_A { +pub enum Ccs { #[doc = "0: The capture into a specific capture register is done with the rules linked with the full flags, described at ."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCS_A) -> Self { + fn from(variant: Ccs) -> Self { variant as u8 != 0 } } -impl CCS_R { +#[doc = "Field `CCS` reader - Continuous Capture Enable"] +pub type CcsR = crate::BitReader; +impl CcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCS_A { + pub const fn variant(&self) -> Ccs { match self.bits { - false => CCS_A::VALUE1, - true => CCS_A::VALUE2, + false => Ccs::Value1, + true => Ccs::Value2, } } #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCS_A::VALUE1 + *self == Ccs::Value1 } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCS_A::VALUE2 + *self == Ccs::Value2 } } #[doc = "Field `CCS` writer - Continuous Capture Enable"] -pub type CCS_W<'a, REG> = crate::BitWriter<'a, REG, CCS_A>; -impl<'a, REG> CCS_W<'a, REG> +pub type CcsW<'a, REG> = crate::BitWriter<'a, REG, Ccs>; +impl<'a, REG> CcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCS_A::VALUE1) + self.variant(Ccs::Value1) } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCS_A::VALUE2) + self.variant(Ccs::Value2) } } -#[doc = "Field `DITHE` reader - Dither Enable"] -pub type DITHE_R = crate::FieldReader; #[doc = "Dither Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DITHE_A { +pub enum Dithe { #[doc = "0: Dither is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither is applied to the Period"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Dither is applied to the Compare"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Dither is applied to the Period and Compare"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DITHE_A) -> Self { + fn from(variant: Dithe) -> Self { variant as _ } } -impl crate::FieldSpec for DITHE_A { +impl crate::FieldSpec for Dithe { type Ux = u8; } -impl DITHE_R { +#[doc = "Field `DITHE` reader - Dither Enable"] +pub type DitheR = crate::FieldReader; +impl DitheR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DITHE_A { + pub const fn variant(&self) -> Dithe { match self.bits { - 0 => DITHE_A::VALUE1, - 1 => DITHE_A::VALUE2, - 2 => DITHE_A::VALUE3, - 3 => DITHE_A::VALUE4, + 0 => Dithe::Value1, + 1 => Dithe::Value2, + 2 => Dithe::Value3, + 3 => Dithe::Value4, _ => unreachable!(), } } #[doc = "Dither is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DITHE_A::VALUE1 + *self == Dithe::Value1 } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DITHE_A::VALUE2 + *self == Dithe::Value2 } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DITHE_A::VALUE3 + *self == Dithe::Value3 } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DITHE_A::VALUE4 + *self == Dithe::Value4 } } #[doc = "Field `DITHE` writer - Dither Enable"] -pub type DITHE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DITHE_A>; -impl<'a, REG> DITHE_W<'a, REG> +pub type DitheW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Dithe>; +impl<'a, REG> DitheW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -584,678 +584,669 @@ where #[doc = "Dither is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE1) + self.variant(Dithe::Value1) } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE2) + self.variant(Dithe::Value2) } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE3) + self.variant(Dithe::Value3) } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE4) + self.variant(Dithe::Value4) } } -#[doc = "Field `DIM` reader - Dither input selector"] -pub type DIM_R = crate::BitReader; #[doc = "Dither input selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIM_A { +pub enum Dim { #[doc = "0: Slice is using its own dither unit"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Slice is connected to the dither unit of slice 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIM_A) -> Self { + fn from(variant: Dim) -> Self { variant as u8 != 0 } } -impl DIM_R { +#[doc = "Field `DIM` reader - Dither input selector"] +pub type DimR = crate::BitReader; +impl DimR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIM_A { + pub const fn variant(&self) -> Dim { match self.bits { - false => DIM_A::VALUE1, - true => DIM_A::VALUE2, + false => Dim::Value1, + true => Dim::Value2, } } #[doc = "Slice is using its own dither unit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIM_A::VALUE1 + *self == Dim::Value1 } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIM_A::VALUE2 + *self == Dim::Value2 } } #[doc = "Field `DIM` writer - Dither input selector"] -pub type DIM_W<'a, REG> = crate::BitWriter<'a, REG, DIM_A>; -impl<'a, REG> DIM_W<'a, REG> +pub type DimW<'a, REG> = crate::BitWriter<'a, REG, Dim>; +impl<'a, REG> DimW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Slice is using its own dither unit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIM_A::VALUE1) + self.variant(Dim::Value1) } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIM_A::VALUE2) + self.variant(Dim::Value2) } } -#[doc = "Field `FPE` reader - Floating Prescaler enable"] -pub type FPE_R = crate::BitReader; #[doc = "Floating Prescaler enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FPE_A { +pub enum Fpe { #[doc = "0: Floating prescaler mode is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Floating prescaler mode is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FPE_A) -> Self { + fn from(variant: Fpe) -> Self { variant as u8 != 0 } } -impl FPE_R { +#[doc = "Field `FPE` reader - Floating Prescaler enable"] +pub type FpeR = crate::BitReader; +impl FpeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FPE_A { + pub const fn variant(&self) -> Fpe { match self.bits { - false => FPE_A::VALUE1, - true => FPE_A::VALUE2, + false => Fpe::Value1, + true => Fpe::Value2, } } #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FPE_A::VALUE1 + *self == Fpe::Value1 } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FPE_A::VALUE2 + *self == Fpe::Value2 } } #[doc = "Field `FPE` writer - Floating Prescaler enable"] -pub type FPE_W<'a, REG> = crate::BitWriter<'a, REG, FPE_A>; -impl<'a, REG> FPE_W<'a, REG> +pub type FpeW<'a, REG> = crate::BitWriter<'a, REG, Fpe>; +impl<'a, REG> FpeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FPE_A::VALUE1) + self.variant(Fpe::Value1) } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FPE_A::VALUE2) + self.variant(Fpe::Value2) } } -#[doc = "Field `TRAPE` reader - TRAP enable"] -pub type TRAPE_R = crate::BitReader; #[doc = "TRAP enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRAPE_A { +pub enum Trape { #[doc = "0: TRAP functionality has no effect on the output"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TRAP functionality affects the output"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRAPE_A) -> Self { + fn from(variant: Trape) -> Self { variant as u8 != 0 } } -impl TRAPE_R { +#[doc = "Field `TRAPE` reader - TRAP enable"] +pub type TrapeR = crate::BitReader; +impl TrapeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRAPE_A { + pub const fn variant(&self) -> Trape { match self.bits { - false => TRAPE_A::VALUE1, - true => TRAPE_A::VALUE2, + false => Trape::Value1, + true => Trape::Value2, } } #[doc = "TRAP functionality has no effect on the output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRAPE_A::VALUE1 + *self == Trape::Value1 } #[doc = "TRAP functionality affects the output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRAPE_A::VALUE2 + *self == Trape::Value2 } } #[doc = "Field `TRAPE` writer - TRAP enable"] -pub type TRAPE_W<'a, REG> = crate::BitWriter<'a, REG, TRAPE_A>; -impl<'a, REG> TRAPE_W<'a, REG> +pub type TrapeW<'a, REG> = crate::BitWriter<'a, REG, Trape>; +impl<'a, REG> TrapeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP functionality has no effect on the output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRAPE_A::VALUE1) + self.variant(Trape::Value1) } #[doc = "TRAP functionality affects the output"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRAPE_A::VALUE2) + self.variant(Trape::Value2) } } -#[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] -pub type TRPSE_R = crate::BitReader; #[doc = "TRAP Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRPSE_A { +pub enum Trpse { #[doc = "0: Exiting from TRAP state isn't synchronized with the PWM signal"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Exiting from TRAP state is synchronized with the PWM signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRPSE_A) -> Self { + fn from(variant: Trpse) -> Self { variant as u8 != 0 } } -impl TRPSE_R { +#[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] +pub type TrpseR = crate::BitReader; +impl TrpseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRPSE_A { + pub const fn variant(&self) -> Trpse { match self.bits { - false => TRPSE_A::VALUE1, - true => TRPSE_A::VALUE2, + false => Trpse::Value1, + true => Trpse::Value2, } } #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRPSE_A::VALUE1 + *self == Trpse::Value1 } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRPSE_A::VALUE2 + *self == Trpse::Value2 } } #[doc = "Field `TRPSE` writer - TRAP Synchronization Enable"] -pub type TRPSE_W<'a, REG> = crate::BitWriter<'a, REG, TRPSE_A>; -impl<'a, REG> TRPSE_W<'a, REG> +pub type TrpseW<'a, REG> = crate::BitWriter<'a, REG, Trpse>; +impl<'a, REG> TrpseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRPSE_A::VALUE1) + self.variant(Trpse::Value1) } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRPSE_A::VALUE2) + self.variant(Trpse::Value2) } } -#[doc = "Field `TRPSW` reader - TRAP State Clear Control"] -pub type TRPSW_R = crate::BitReader; #[doc = "TRAP State Clear Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRPSW_A { +pub enum Trpsw { #[doc = "0: The slice exits the TRAP state automatically when the TRAP condition is not present"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The TRAP state can only be exited by a SW request."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRPSW_A) -> Self { + fn from(variant: Trpsw) -> Self { variant as u8 != 0 } } -impl TRPSW_R { +#[doc = "Field `TRPSW` reader - TRAP State Clear Control"] +pub type TrpswR = crate::BitReader; +impl TrpswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRPSW_A { + pub const fn variant(&self) -> Trpsw { match self.bits { - false => TRPSW_A::VALUE1, - true => TRPSW_A::VALUE2, + false => Trpsw::Value1, + true => Trpsw::Value2, } } #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRPSW_A::VALUE1 + *self == Trpsw::Value1 } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRPSW_A::VALUE2 + *self == Trpsw::Value2 } } #[doc = "Field `TRPSW` writer - TRAP State Clear Control"] -pub type TRPSW_W<'a, REG> = crate::BitWriter<'a, REG, TRPSW_A>; -impl<'a, REG> TRPSW_W<'a, REG> +pub type TrpswW<'a, REG> = crate::BitWriter<'a, REG, Trpsw>; +impl<'a, REG> TrpswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRPSW_A::VALUE1) + self.variant(Trpsw::Value1) } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRPSW_A::VALUE2) + self.variant(Trpsw::Value2) } } -#[doc = "Field `EMS` reader - External Modulation Synchronization"] -pub type EMS_R = crate::BitReader; #[doc = "External Modulation Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMS_A { +pub enum Ems { #[doc = "0: External Modulation functionality is not synchronized with the PWM signal"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Modulation functionality is synchronized with the PWM signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMS_A) -> Self { + fn from(variant: Ems) -> Self { variant as u8 != 0 } } -impl EMS_R { +#[doc = "Field `EMS` reader - External Modulation Synchronization"] +pub type EmsR = crate::BitReader; +impl EmsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMS_A { + pub const fn variant(&self) -> Ems { match self.bits { - false => EMS_A::VALUE1, - true => EMS_A::VALUE2, + false => Ems::Value1, + true => Ems::Value2, } } #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMS_A::VALUE1 + *self == Ems::Value1 } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMS_A::VALUE2 + *self == Ems::Value2 } } #[doc = "Field `EMS` writer - External Modulation Synchronization"] -pub type EMS_W<'a, REG> = crate::BitWriter<'a, REG, EMS_A>; -impl<'a, REG> EMS_W<'a, REG> +pub type EmsW<'a, REG> = crate::BitWriter<'a, REG, Ems>; +impl<'a, REG> EmsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMS_A::VALUE1) + self.variant(Ems::Value1) } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMS_A::VALUE2) + self.variant(Ems::Value2) } } -#[doc = "Field `EMT` reader - External Modulation Type"] -pub type EMT_R = crate::BitReader; #[doc = "External Modulation Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMT_A { +pub enum Emt { #[doc = "0: External Modulation functionality is clearing the CC4yST bit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Modulation functionality is gating the outputs."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMT_A) -> Self { + fn from(variant: Emt) -> Self { variant as u8 != 0 } } -impl EMT_R { +#[doc = "Field `EMT` reader - External Modulation Type"] +pub type EmtR = crate::BitReader; +impl EmtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMT_A { + pub const fn variant(&self) -> Emt { match self.bits { - false => EMT_A::VALUE1, - true => EMT_A::VALUE2, + false => Emt::Value1, + true => Emt::Value2, } } #[doc = "External Modulation functionality is clearing the CC4yST bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMT_A::VALUE1 + *self == Emt::Value1 } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMT_A::VALUE2 + *self == Emt::Value2 } } #[doc = "Field `EMT` writer - External Modulation Type"] -pub type EMT_W<'a, REG> = crate::BitWriter<'a, REG, EMT_A>; -impl<'a, REG> EMT_W<'a, REG> +pub type EmtW<'a, REG> = crate::BitWriter<'a, REG, Emt>; +impl<'a, REG> EmtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is clearing the CC4yST bit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMT_A::VALUE1) + self.variant(Emt::Value1) } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMT_A::VALUE2) + self.variant(Emt::Value2) } } -#[doc = "Field `MCME` reader - Multi Channel Mode Enable"] -pub type MCME_R = crate::BitReader; #[doc = "Multi Channel Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCME_A { +pub enum Mcme { #[doc = "0: Multi Channel Mode is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multi Channel Mode is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCME_A) -> Self { + fn from(variant: Mcme) -> Self { variant as u8 != 0 } } -impl MCME_R { +#[doc = "Field `MCME` reader - Multi Channel Mode Enable"] +pub type McmeR = crate::BitReader; +impl McmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCME_A { + pub const fn variant(&self) -> Mcme { match self.bits { - false => MCME_A::VALUE1, - true => MCME_A::VALUE2, + false => Mcme::Value1, + true => Mcme::Value2, } } #[doc = "Multi Channel Mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCME_A::VALUE1 + *self == Mcme::Value1 } #[doc = "Multi Channel Mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCME_A::VALUE2 + *self == Mcme::Value2 } } #[doc = "Field `MCME` writer - Multi Channel Mode Enable"] -pub type MCME_W<'a, REG> = crate::BitWriter<'a, REG, MCME_A>; -impl<'a, REG> MCME_W<'a, REG> +pub type McmeW<'a, REG> = crate::BitWriter<'a, REG, Mcme>; +impl<'a, REG> McmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCME_A::VALUE1) + self.variant(Mcme::Value1) } #[doc = "Multi Channel Mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCME_A::VALUE2) + self.variant(Mcme::Value2) } } impl R { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - pub fn tcm(&self) -> TCM_R { - TCM_R::new((self.bits & 1) != 0) + pub fn tcm(&self) -> TcmR { + TcmR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - pub fn tssm(&self) -> TSSM_R { - TSSM_R::new(((self.bits >> 1) & 1) != 0) + pub fn tssm(&self) -> TssmR { + TssmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - pub fn clst(&self) -> CLST_R { - CLST_R::new(((self.bits >> 2) & 1) != 0) + pub fn clst(&self) -> ClstR { + ClstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture Compare Mode"] #[inline(always)] - pub fn cmod(&self) -> CMOD_R { - CMOD_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmod(&self) -> CmodR { + CmodR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - pub fn ecm(&self) -> ECM_R { - ECM_R::new(((self.bits >> 4) & 1) != 0) + pub fn ecm(&self) -> EcmR { + EcmR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - pub fn capc(&self) -> CAPC_R { - CAPC_R::new(((self.bits >> 5) & 3) as u8) + pub fn capc(&self) -> CapcR { + CapcR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - pub fn endm(&self) -> ENDM_R { - ENDM_R::new(((self.bits >> 8) & 3) as u8) + pub fn endm(&self) -> EndmR { + EndmR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - pub fn strm(&self) -> STRM_R { - STRM_R::new(((self.bits >> 10) & 1) != 0) + pub fn strm(&self) -> StrmR { + StrmR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - pub fn sce(&self) -> SCE_R { - SCE_R::new(((self.bits >> 11) & 1) != 0) + pub fn sce(&self) -> SceR { + SceR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - pub fn ccs(&self) -> CCS_R { - CCS_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccs(&self) -> CcsR { + CcsR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - pub fn dithe(&self) -> DITHE_R { - DITHE_R::new(((self.bits >> 13) & 3) as u8) + pub fn dithe(&self) -> DitheR { + DitheR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - pub fn dim(&self) -> DIM_R { - DIM_R::new(((self.bits >> 15) & 1) != 0) + pub fn dim(&self) -> DimR { + DimR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - pub fn fpe(&self) -> FPE_R { - FPE_R::new(((self.bits >> 16) & 1) != 0) + pub fn fpe(&self) -> FpeR { + FpeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TRAP enable"] #[inline(always)] - pub fn trape(&self) -> TRAPE_R { - TRAPE_R::new(((self.bits >> 17) & 1) != 0) + pub fn trape(&self) -> TrapeR { + TrapeR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - pub fn trpse(&self) -> TRPSE_R { - TRPSE_R::new(((self.bits >> 21) & 1) != 0) + pub fn trpse(&self) -> TrpseR { + TrpseR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - pub fn trpsw(&self) -> TRPSW_R { - TRPSW_R::new(((self.bits >> 22) & 1) != 0) + pub fn trpsw(&self) -> TrpswR { + TrpswR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - pub fn ems(&self) -> EMS_R { - EMS_R::new(((self.bits >> 23) & 1) != 0) + pub fn ems(&self) -> EmsR { + EmsR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - pub fn emt(&self) -> EMT_R { - EMT_R::new(((self.bits >> 24) & 1) != 0) + pub fn emt(&self) -> EmtR { + EmtR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Multi Channel Mode Enable"] #[inline(always)] - pub fn mcme(&self) -> MCME_R { - MCME_R::new(((self.bits >> 25) & 1) != 0) + pub fn mcme(&self) -> McmeR { + McmeR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] #[must_use] - pub fn tcm(&mut self) -> TCM_W { - TCM_W::new(self, 0) + pub fn tcm(&mut self) -> TcmW { + TcmW::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tssm(&mut self) -> TSSM_W { - TSSM_W::new(self, 1) + pub fn tssm(&mut self) -> TssmW { + TssmW::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] #[must_use] - pub fn clst(&mut self) -> CLST_W { - CLST_W::new(self, 2) + pub fn clst(&mut self) -> ClstW { + ClstW::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] #[must_use] - pub fn ecm(&mut self) -> ECM_W { - ECM_W::new(self, 4) + pub fn ecm(&mut self) -> EcmW { + EcmW::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] #[must_use] - pub fn capc(&mut self) -> CAPC_W { - CAPC_W::new(self, 5) + pub fn capc(&mut self) -> CapcW { + CapcW::new(self, 5) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] #[must_use] - pub fn endm(&mut self) -> ENDM_W { - ENDM_W::new(self, 8) + pub fn endm(&mut self) -> EndmW { + EndmW::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] #[must_use] - pub fn strm(&mut self) -> STRM_W { - STRM_W::new(self, 10) + pub fn strm(&mut self) -> StrmW { + StrmW::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] #[must_use] - pub fn sce(&mut self) -> SCE_W { - SCE_W::new(self, 11) + pub fn sce(&mut self) -> SceW { + SceW::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] #[must_use] - pub fn ccs(&mut self) -> CCS_W { - CCS_W::new(self, 12) + pub fn ccs(&mut self) -> CcsW { + CcsW::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] #[must_use] - pub fn dithe(&mut self) -> DITHE_W { - DITHE_W::new(self, 13) + pub fn dithe(&mut self) -> DitheW { + DitheW::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] #[must_use] - pub fn dim(&mut self) -> DIM_W { - DIM_W::new(self, 15) + pub fn dim(&mut self) -> DimW { + DimW::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] #[must_use] - pub fn fpe(&mut self) -> FPE_W { - FPE_W::new(self, 16) + pub fn fpe(&mut self) -> FpeW { + FpeW::new(self, 16) } #[doc = "Bit 17 - TRAP enable"] #[inline(always)] #[must_use] - pub fn trape(&mut self) -> TRAPE_W { - TRAPE_W::new(self, 17) + pub fn trape(&mut self) -> TrapeW { + TrapeW::new(self, 17) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] #[must_use] - pub fn trpse(&mut self) -> TRPSE_W { - TRPSE_W::new(self, 21) + pub fn trpse(&mut self) -> TrpseW { + TrpseW::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] #[must_use] - pub fn trpsw(&mut self) -> TRPSW_W { - TRPSW_W::new(self, 22) + pub fn trpsw(&mut self) -> TrpswW { + TrpswW::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] #[must_use] - pub fn ems(&mut self) -> EMS_W { - EMS_W::new(self, 23) + pub fn ems(&mut self) -> EmsW { + EmsW::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] #[must_use] - pub fn emt(&mut self) -> EMT_W { - EMT_W::new(self, 24) + pub fn emt(&mut self) -> EmtW { + EmtW::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable"] #[inline(always)] #[must_use] - pub fn mcme(&mut self) -> MCME_W { - MCME_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mcme(&mut self) -> McmeW { + McmeW::new(self, 25) } } #[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TC_SPEC; -impl crate::RegisterSpec for TC_SPEC { +pub struct TcSpec; +impl crate::RegisterSpec for TcSpec { type Ux = u32; } #[doc = "`read()` method returns [`tc::R`](R) reader structure"] -impl crate::Readable for TC_SPEC {} +impl crate::Readable for TcSpec {} #[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] -impl crate::Writable for TC_SPEC { +impl crate::Writable for TcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0"] -impl crate::Resettable for TC_SPEC { +impl crate::Resettable for TcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcclr.rs b/src/ccu40_cc40/tcclr.rs index e1223cf8..f8d4bacb 100644 --- a/src/ccu40_cc40/tcclr.rs +++ b/src/ccu40_cc40/tcclr.rs @@ -1,52 +1,43 @@ #[doc = "Register `TCCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBC` writer - Timer Run Bit Clear"] -pub type TRBC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TrbcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCC` writer - Timer Clear"] -pub type TCC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TccW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITC` writer - Dither Counter Clear"] -pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DitcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] #[must_use] - pub fn trbc(&mut self) -> TRBC_W { - TRBC_W::new(self, 0) + pub fn trbc(&mut self) -> TrbcW { + TrbcW::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] #[must_use] - pub fn tcc(&mut self) -> TCC_W { - TCC_W::new(self, 1) + pub fn tcc(&mut self) -> TccW { + TccW::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] #[must_use] - pub fn ditc(&mut self) -> DITC_W { - DITC_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ditc(&mut self) -> DitcW { + DitcW::new(self, 2) } } #[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCCLR_SPEC; -impl crate::RegisterSpec for TCCLR_SPEC { +pub struct TcclrSpec; +impl crate::RegisterSpec for TcclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcclr::W`](W) writer structure"] -impl crate::Writable for TCCLR_SPEC { +impl crate::Writable for TcclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCCLR to value 0"] -impl crate::Resettable for TCCLR_SPEC { +impl crate::Resettable for TcclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcset.rs b/src/ccu40_cc40/tcset.rs index 3fd6bb58..3338f548 100644 --- a/src/ccu40_cc40/tcset.rs +++ b/src/ccu40_cc40/tcset.rs @@ -1,36 +1,27 @@ #[doc = "Register `TCSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBS` writer - Timer Run Bit set"] -pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TrbsW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] #[must_use] - pub fn trbs(&mut self) -> TRBS_W { - TRBS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn trbs(&mut self) -> TrbsW { + TrbsW::new(self, 0) } } #[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCSET_SPEC; -impl crate::RegisterSpec for TCSET_SPEC { +pub struct TcsetSpec; +impl crate::RegisterSpec for TcsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcset::W`](W) writer structure"] -impl crate::Writable for TCSET_SPEC { +impl crate::Writable for TcsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSET to value 0"] -impl crate::Resettable for TCSET_SPEC { +impl crate::Resettable for TcsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcst.rs b/src/ccu40_cc40/tcst.rs index 88060df7..f2d92648 100644 --- a/src/ccu40_cc40/tcst.rs +++ b/src/ccu40_cc40/tcst.rs @@ -1,97 +1,97 @@ #[doc = "Register `TCST` reader"] -pub type R = crate::R; -#[doc = "Field `TRB` reader - Timer Run Bit"] -pub type TRB_R = crate::BitReader; +pub type R = crate::R; #[doc = "Timer Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRB_A { +pub enum Trb { #[doc = "0: Timer is stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRB_A) -> Self { + fn from(variant: Trb) -> Self { variant as u8 != 0 } } -impl TRB_R { +#[doc = "Field `TRB` reader - Timer Run Bit"] +pub type TrbR = crate::BitReader; +impl TrbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRB_A { + pub const fn variant(&self) -> Trb { match self.bits { - false => TRB_A::VALUE1, - true => TRB_A::VALUE2, + false => Trb::Value1, + true => Trb::Value2, } } #[doc = "Timer is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRB_A::VALUE1 + *self == Trb::Value1 } #[doc = "Timer is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRB_A::VALUE2 + *self == Trb::Value2 } } -#[doc = "Field `CDIR` reader - Timer Counting Direction"] -pub type CDIR_R = crate::BitReader; #[doc = "Timer Counting Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDIR_A { +pub enum Cdir { #[doc = "0: Timer is counting up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is counting down"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDIR_A) -> Self { + fn from(variant: Cdir) -> Self { variant as u8 != 0 } } -impl CDIR_R { +#[doc = "Field `CDIR` reader - Timer Counting Direction"] +pub type CdirR = crate::BitReader; +impl CdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDIR_A { + pub const fn variant(&self) -> Cdir { match self.bits { - false => CDIR_A::VALUE1, - true => CDIR_A::VALUE2, + false => Cdir::Value1, + true => Cdir::Value2, } } #[doc = "Timer is counting up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDIR_A::VALUE1 + *self == Cdir::Value1 } #[doc = "Timer is counting down"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDIR_A::VALUE2 + *self == Cdir::Value2 } } impl R { #[doc = "Bit 0 - Timer Run Bit"] #[inline(always)] - pub fn trb(&self) -> TRB_R { - TRB_R::new((self.bits & 1) != 0) + pub fn trb(&self) -> TrbR { + TrbR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Counting Direction"] #[inline(always)] - pub fn cdir(&self) -> CDIR_R { - CDIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn cdir(&self) -> CdirR { + CdirR::new(((self.bits >> 1) & 1) != 0) } } #[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCST_SPEC; -impl crate::RegisterSpec for TCST_SPEC { +pub struct TcstSpec; +impl crate::RegisterSpec for TcstSpec { type Ux = u32; } #[doc = "`read()` method returns [`tcst::R`](R) reader structure"] -impl crate::Readable for TCST_SPEC {} +impl crate::Readable for TcstSpec {} #[doc = "`reset()` method sets TCST to value 0"] -impl crate::Resettable for TCST_SPEC { +impl crate::Resettable for TcstSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/timer.rs b/src/ccu40_cc40/timer.rs index 5aaa3b81..68062f18 100644 --- a/src/ccu40_cc40/timer.rs +++ b/src/ccu40_cc40/timer.rs @@ -1,49 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TVAL` reader - Timer Value"] -pub type TVAL_R = crate::FieldReader; +pub type TvalR = crate::FieldReader; #[doc = "Field `TVAL` writer - Timer Value"] -pub type TVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - pub fn tval(&self) -> TVAL_R { - TVAL_R::new((self.bits & 0xffff) as u16) + pub fn tval(&self) -> TvalR { + TvalR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] #[must_use] - pub fn tval(&mut self) -> TVAL_W { - TVAL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tval(&mut self) -> TvalW { + TvalW::new(self, 0) } } #[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMER_SPEC; -impl crate::RegisterSpec for TIMER_SPEC { +pub struct TimerSpec; +impl crate::RegisterSpec for TimerSpec { type Ux = u32; } #[doc = "`read()` method returns [`timer::R`](R) reader structure"] -impl crate::Readable for TIMER_SPEC {} +impl crate::Readable for TimerSpec {} #[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] -impl crate::Writable for TIMER_SPEC { +impl crate::Writable for TimerSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TIMER_SPEC { +impl crate::Resettable for TimerSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80.rs b/src/ccu80.rs index aa676ce9..8c8b27b9 100644 --- a/src/ccu80.rs +++ b/src/ccu80.rs @@ -1,106 +1,115 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - gctrl: GCTRL, - gstat: GSTAT, - gidls: GIDLS, - gidlc: GIDLC, - gcss: GCSS, - gcsc: GCSC, - gcst: GCST, - gpchk: GPCHK, + gctrl: Gctrl, + gstat: Gstat, + gidls: Gidls, + gidlc: Gidlc, + gcss: Gcss, + gcsc: Gcsc, + gcst: Gcst, + gpchk: Gpchk, _reserved8: [u8; 0x60], - midr: MIDR, + midr: Midr, } impl RegisterBlock { #[doc = "0x00 - Global Control Register"] #[inline(always)] - pub const fn gctrl(&self) -> &GCTRL { + pub const fn gctrl(&self) -> &Gctrl { &self.gctrl } #[doc = "0x04 - Global Status Register"] #[inline(always)] - pub const fn gstat(&self) -> &GSTAT { + pub const fn gstat(&self) -> &Gstat { &self.gstat } #[doc = "0x08 - Global Idle Set"] #[inline(always)] - pub const fn gidls(&self) -> &GIDLS { + pub const fn gidls(&self) -> &Gidls { &self.gidls } #[doc = "0x0c - Global Idle Clear"] #[inline(always)] - pub const fn gidlc(&self) -> &GIDLC { + pub const fn gidlc(&self) -> &Gidlc { &self.gidlc } #[doc = "0x10 - Global Channel Set"] #[inline(always)] - pub const fn gcss(&self) -> &GCSS { + pub const fn gcss(&self) -> &Gcss { &self.gcss } #[doc = "0x14 - Global Channel Clear"] #[inline(always)] - pub const fn gcsc(&self) -> &GCSC { + pub const fn gcsc(&self) -> &Gcsc { &self.gcsc } #[doc = "0x18 - Global Channel status"] #[inline(always)] - pub const fn gcst(&self) -> &GCST { + pub const fn gcst(&self) -> &Gcst { &self.gcst } #[doc = "0x1c - Parity Checker Configuration"] #[inline(always)] - pub const fn gpchk(&self) -> &GPCHK { + pub const fn gpchk(&self) -> &Gpchk { &self.gpchk } #[doc = "0x80 - Module Identification"] #[inline(always)] - pub const fn midr(&self) -> &MIDR { + pub const fn midr(&self) -> &Midr { &self.midr } } #[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] -pub type GCTRL = crate::Reg; +#[doc(alias = "GCTRL")] +pub type Gctrl = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; #[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] -pub type GSTAT = crate::Reg; +#[doc(alias = "GSTAT")] +pub type Gstat = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; #[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] -pub type GIDLS = crate::Reg; +#[doc(alias = "GIDLS")] +pub type Gidls = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; #[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] -pub type GIDLC = crate::Reg; +#[doc(alias = "GIDLC")] +pub type Gidlc = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; #[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] -pub type GCSS = crate::Reg; +#[doc(alias = "GCSS")] +pub type Gcss = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; #[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] -pub type GCSC = crate::Reg; +#[doc(alias = "GCSC")] +pub type Gcsc = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; #[doc = "GCST (r) register accessor: Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] -pub type GCST = crate::Reg; +#[doc(alias = "GCST")] +pub type Gcst = crate::Reg; #[doc = "Global Channel status"] pub mod gcst; #[doc = "GPCHK (rw) register accessor: Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpchk`] module"] -pub type GPCHK = crate::Reg; +#[doc(alias = "GPCHK")] +pub type Gpchk = crate::Reg; #[doc = "Parity Checker Configuration"] pub mod gpchk; #[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -pub type MIDR = crate::Reg; +#[doc(alias = "MIDR")] +pub type Midr = crate::Reg; #[doc = "Module Identification"] pub mod midr; diff --git a/src/ccu80/gcsc.rs b/src/ccu80/gcsc.rs index 012209a0..48af6641 100644 --- a/src/ccu80/gcsc.rs +++ b/src/ccu80/gcsc.rs @@ -1,188 +1,179 @@ #[doc = "Register `GCSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SC` writer - Slice 0 shadow transfer request clear"] -pub type S0SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSC` writer - Slice 0 Dither shadow transfer clear"] -pub type S0DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSC` writer - Slice 0 Prescaler shadow transfer clear"] -pub type S0PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SC` writer - Slice 1 shadow transfer clear"] -pub type S1SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSC` writer - Slice 1 Dither shadow transfer clear"] -pub type S1DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSC` writer - Slice 1 Prescaler shadow transfer clear"] -pub type S1PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SC` writer - Slice 2 shadow transfer clear"] -pub type S2SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSC` writer - Slice 2 Dither shadow transfer clear"] -pub type S2DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSC` writer - Slice 2 Prescaler shadow transfer clear"] -pub type S2PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SC` writer - Slice 3 shadow transfer clear"] -pub type S3SC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3scW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSC` writer - Slice 3 Dither shadow transfer clear"] -pub type S3DSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3dscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSC` writer - Slice 3 Prescaler shadow transfer clear"] -pub type S3PSC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3pscW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST1C` writer - Slice 0 status bit 1 clear"] -pub type S0ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0st1cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST1C` writer - Slice 1 status bit 1 clear"] -pub type S1ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1st1cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST1C` writer - Slice 2 status bit 1 clear"] -pub type S2ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2st1cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST1C` writer - Slice 3 status bit 1 clear"] -pub type S3ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3st1cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST2C` writer - Slice 0 status bit 2 clear"] -pub type S0ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0st2cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST2C` writer - Slice 1 status bit 2 clear"] -pub type S1ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1st2cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST2C` writer - Slice 2 status bit 2 clear"] -pub type S2ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2st2cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST2C` writer - Slice 3 status bit 2 clear"] -pub type S3ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3st2cW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer request clear"] #[inline(always)] #[must_use] - pub fn s0sc(&mut self) -> S0SC_W { - S0SC_W::new(self, 0) + pub fn s0sc(&mut self) -> S0scW { + S0scW::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0dsc(&mut self) -> S0DSC_W { - S0DSC_W::new(self, 1) + pub fn s0dsc(&mut self) -> S0dscW { + S0dscW::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0psc(&mut self) -> S0PSC_W { - S0PSC_W::new(self, 2) + pub fn s0psc(&mut self) -> S0pscW { + S0pscW::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1sc(&mut self) -> S1SC_W { - S1SC_W::new(self, 4) + pub fn s1sc(&mut self) -> S1scW { + S1scW::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1dsc(&mut self) -> S1DSC_W { - S1DSC_W::new(self, 5) + pub fn s1dsc(&mut self) -> S1dscW { + S1dscW::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1psc(&mut self) -> S1PSC_W { - S1PSC_W::new(self, 6) + pub fn s1psc(&mut self) -> S1pscW { + S1pscW::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2sc(&mut self) -> S2SC_W { - S2SC_W::new(self, 8) + pub fn s2sc(&mut self) -> S2scW { + S2scW::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2dsc(&mut self) -> S2DSC_W { - S2DSC_W::new(self, 9) + pub fn s2dsc(&mut self) -> S2dscW { + S2dscW::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2psc(&mut self) -> S2PSC_W { - S2PSC_W::new(self, 10) + pub fn s2psc(&mut self) -> S2pscW { + S2pscW::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3sc(&mut self) -> S3SC_W { - S3SC_W::new(self, 12) + pub fn s3sc(&mut self) -> S3scW { + S3scW::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3dsc(&mut self) -> S3DSC_W { - S3DSC_W::new(self, 13) + pub fn s3dsc(&mut self) -> S3dscW { + S3dscW::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3psc(&mut self) -> S3PSC_W { - S3PSC_W::new(self, 14) + pub fn s3psc(&mut self) -> S3pscW { + S3pscW::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s0st1c(&mut self) -> S0ST1C_W { - S0ST1C_W::new(self, 16) + pub fn s0st1c(&mut self) -> S0st1cW { + S0st1cW::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s1st1c(&mut self) -> S1ST1C_W { - S1ST1C_W::new(self, 17) + pub fn s1st1c(&mut self) -> S1st1cW { + S1st1cW::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s2st1c(&mut self) -> S2ST1C_W { - S2ST1C_W::new(self, 18) + pub fn s2st1c(&mut self) -> S2st1cW { + S2st1cW::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s3st1c(&mut self) -> S3ST1C_W { - S3ST1C_W::new(self, 19) + pub fn s3st1c(&mut self) -> S3st1cW { + S3st1cW::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s0st2c(&mut self) -> S0ST2C_W { - S0ST2C_W::new(self, 20) + pub fn s0st2c(&mut self) -> S0st2cW { + S0st2cW::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s1st2c(&mut self) -> S1ST2C_W { - S1ST2C_W::new(self, 21) + pub fn s1st2c(&mut self) -> S1st2cW { + S1st2cW::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s2st2c(&mut self) -> S2ST2C_W { - S2ST2C_W::new(self, 22) + pub fn s2st2c(&mut self) -> S2st2cW { + S2st2cW::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s3st2c(&mut self) -> S3ST2C_W { - S3ST2C_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn s3st2c(&mut self) -> S3st2cW { + S3st2cW::new(self, 23) } } #[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCSC_SPEC; -impl crate::RegisterSpec for GCSC_SPEC { +pub struct GcscSpec; +impl crate::RegisterSpec for GcscSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcsc::W`](W) writer structure"] -impl crate::Writable for GCSC_SPEC { +impl crate::Writable for GcscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSC to value 0"] -impl crate::Resettable for GCSC_SPEC { +impl crate::Resettable for GcscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gcss.rs b/src/ccu80/gcss.rs index f3a7dc14..e70c7336 100644 --- a/src/ccu80/gcss.rs +++ b/src/ccu80/gcss.rs @@ -1,188 +1,179 @@ #[doc = "Register `GCSS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SE` writer - Slice 0 shadow transfer set enable"] -pub type S0SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSE` writer - Slice 0 Dither shadow transfer set enable"] -pub type S0DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSE` writer - Slice 0 Prescaler shadow transfer set enable"] -pub type S0PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SE` writer - Slice 1 shadow transfer set enable"] -pub type S1SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSE` writer - Slice 1 Dither shadow transfer set enable"] -pub type S1DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSE` writer - Slice 1 Prescaler shadow transfer set enable"] -pub type S1PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SE` writer - Slice 2 shadow transfer set enable"] -pub type S2SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSE` writer - Slice 2 Dither shadow transfer set enable"] -pub type S2DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSE` writer - Slice 2 Prescaler shadow transfer set enable"] -pub type S2PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SE` writer - Slice 3 shadow transfer set enable"] -pub type S3SE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3seW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSE` writer - Slice 3 Dither shadow transfer set enable"] -pub type S3DSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3dseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSE` writer - Slice 3 Prescaler shadow transfer set enable"] -pub type S3PSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3pseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST1S` writer - Slice 0 status bit 1 set"] -pub type S0ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0st1sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST1S` writer - Slice 1 status bit 1 set"] -pub type S1ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1st1sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST1S` writer - Slice 2 status bit 1 set"] -pub type S2ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2st1sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST1S` writer - Slice 3 status bit 1 set"] -pub type S3ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3st1sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST2S` writer - Slice 0 status bit 2 set"] -pub type S0ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0st2sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST2S` writer - Slice 1 status bit 2 set"] -pub type S1ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1st2sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST2S` writer - Slice 2 status bit 2 set"] -pub type S2ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2st2sW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST2S` writer - Slice 3 status bit 2 set"] -pub type S3ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3st2sW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0se(&mut self) -> S0SE_W { - S0SE_W::new(self, 0) + pub fn s0se(&mut self) -> S0seW { + S0seW::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0dse(&mut self) -> S0DSE_W { - S0DSE_W::new(self, 1) + pub fn s0dse(&mut self) -> S0dseW { + S0dseW::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0pse(&mut self) -> S0PSE_W { - S0PSE_W::new(self, 2) + pub fn s0pse(&mut self) -> S0pseW { + S0pseW::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1se(&mut self) -> S1SE_W { - S1SE_W::new(self, 4) + pub fn s1se(&mut self) -> S1seW { + S1seW::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1dse(&mut self) -> S1DSE_W { - S1DSE_W::new(self, 5) + pub fn s1dse(&mut self) -> S1dseW { + S1dseW::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1pse(&mut self) -> S1PSE_W { - S1PSE_W::new(self, 6) + pub fn s1pse(&mut self) -> S1pseW { + S1pseW::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2se(&mut self) -> S2SE_W { - S2SE_W::new(self, 8) + pub fn s2se(&mut self) -> S2seW { + S2seW::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2dse(&mut self) -> S2DSE_W { - S2DSE_W::new(self, 9) + pub fn s2dse(&mut self) -> S2dseW { + S2dseW::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2pse(&mut self) -> S2PSE_W { - S2PSE_W::new(self, 10) + pub fn s2pse(&mut self) -> S2pseW { + S2pseW::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3se(&mut self) -> S3SE_W { - S3SE_W::new(self, 12) + pub fn s3se(&mut self) -> S3seW { + S3seW::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3dse(&mut self) -> S3DSE_W { - S3DSE_W::new(self, 13) + pub fn s3dse(&mut self) -> S3dseW { + S3dseW::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3pse(&mut self) -> S3PSE_W { - S3PSE_W::new(self, 14) + pub fn s3pse(&mut self) -> S3pseW { + S3pseW::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s0st1s(&mut self) -> S0ST1S_W { - S0ST1S_W::new(self, 16) + pub fn s0st1s(&mut self) -> S0st1sW { + S0st1sW::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s1st1s(&mut self) -> S1ST1S_W { - S1ST1S_W::new(self, 17) + pub fn s1st1s(&mut self) -> S1st1sW { + S1st1sW::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s2st1s(&mut self) -> S2ST1S_W { - S2ST1S_W::new(self, 18) + pub fn s2st1s(&mut self) -> S2st1sW { + S2st1sW::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s3st1s(&mut self) -> S3ST1S_W { - S3ST1S_W::new(self, 19) + pub fn s3st1s(&mut self) -> S3st1sW { + S3st1sW::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s0st2s(&mut self) -> S0ST2S_W { - S0ST2S_W::new(self, 20) + pub fn s0st2s(&mut self) -> S0st2sW { + S0st2sW::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s1st2s(&mut self) -> S1ST2S_W { - S1ST2S_W::new(self, 21) + pub fn s1st2s(&mut self) -> S1st2sW { + S1st2sW::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s2st2s(&mut self) -> S2ST2S_W { - S2ST2S_W::new(self, 22) + pub fn s2st2s(&mut self) -> S2st2sW { + S2st2sW::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s3st2s(&mut self) -> S3ST2S_W { - S3ST2S_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn s3st2s(&mut self) -> S3st2sW { + S3st2sW::new(self, 23) } } #[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCSS_SPEC; -impl crate::RegisterSpec for GCSS_SPEC { +pub struct GcssSpec; +impl crate::RegisterSpec for GcssSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcss::W`](W) writer structure"] -impl crate::Writable for GCSS_SPEC { +impl crate::Writable for GcssSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSS to value 0"] -impl crate::Resettable for GCSS_SPEC { +impl crate::Resettable for GcssSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gcst.rs b/src/ccu80/gcst.rs index 15e89172..539f42ef 100644 --- a/src/ccu80/gcst.rs +++ b/src/ccu80/gcst.rs @@ -1,563 +1,563 @@ #[doc = "Register `GCST` reader"] -pub type R = crate::R; -#[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] -pub type S0SS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Slice 0 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0SS_A { +pub enum S0ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0SS_A) -> Self { + fn from(variant: S0ss) -> Self { variant as u8 != 0 } } -impl S0SS_R { +#[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] +pub type S0ssR = crate::BitReader; +impl S0ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0SS_A { + pub const fn variant(&self) -> S0ss { match self.bits { - false => S0SS_A::VALUE1, - true => S0SS_A::VALUE2, + false => S0ss::Value1, + true => S0ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0SS_A::VALUE1 + *self == S0ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0SS_A::VALUE2 + *self == S0ss::Value2 } } -#[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] -pub type S0DSS_R = crate::BitReader; #[doc = "Slice 0 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0DSS_A { +pub enum S0dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0DSS_A) -> Self { + fn from(variant: S0dss) -> Self { variant as u8 != 0 } } -impl S0DSS_R { +#[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] +pub type S0dssR = crate::BitReader; +impl S0dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0DSS_A { + pub const fn variant(&self) -> S0dss { match self.bits { - false => S0DSS_A::VALUE1, - true => S0DSS_A::VALUE2, + false => S0dss::Value1, + true => S0dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0DSS_A::VALUE1 + *self == S0dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0DSS_A::VALUE2 + *self == S0dss::Value2 } } -#[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] -pub type S0PSS_R = crate::BitReader; #[doc = "Slice 0 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0PSS_A { +pub enum S0pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0PSS_A) -> Self { + fn from(variant: S0pss) -> Self { variant as u8 != 0 } } -impl S0PSS_R { +#[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] +pub type S0pssR = crate::BitReader; +impl S0pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0PSS_A { + pub const fn variant(&self) -> S0pss { match self.bits { - false => S0PSS_A::VALUE1, - true => S0PSS_A::VALUE2, + false => S0pss::Value1, + true => S0pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0PSS_A::VALUE1 + *self == S0pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0PSS_A::VALUE2 + *self == S0pss::Value2 } } -#[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] -pub type S1SS_R = crate::BitReader; #[doc = "Slice 1 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1SS_A { +pub enum S1ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1SS_A) -> Self { + fn from(variant: S1ss) -> Self { variant as u8 != 0 } } -impl S1SS_R { +#[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] +pub type S1ssR = crate::BitReader; +impl S1ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1SS_A { + pub const fn variant(&self) -> S1ss { match self.bits { - false => S1SS_A::VALUE1, - true => S1SS_A::VALUE2, + false => S1ss::Value1, + true => S1ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1SS_A::VALUE1 + *self == S1ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1SS_A::VALUE2 + *self == S1ss::Value2 } } -#[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] -pub type S1DSS_R = crate::BitReader; #[doc = "Slice 1 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1DSS_A { +pub enum S1dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1DSS_A) -> Self { + fn from(variant: S1dss) -> Self { variant as u8 != 0 } } -impl S1DSS_R { +#[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] +pub type S1dssR = crate::BitReader; +impl S1dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1DSS_A { + pub const fn variant(&self) -> S1dss { match self.bits { - false => S1DSS_A::VALUE1, - true => S1DSS_A::VALUE2, + false => S1dss::Value1, + true => S1dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1DSS_A::VALUE1 + *self == S1dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1DSS_A::VALUE2 + *self == S1dss::Value2 } } -#[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] -pub type S1PSS_R = crate::BitReader; #[doc = "Slice 1 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1PSS_A { +pub enum S1pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1PSS_A) -> Self { + fn from(variant: S1pss) -> Self { variant as u8 != 0 } } -impl S1PSS_R { +#[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] +pub type S1pssR = crate::BitReader; +impl S1pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1PSS_A { + pub const fn variant(&self) -> S1pss { match self.bits { - false => S1PSS_A::VALUE1, - true => S1PSS_A::VALUE2, + false => S1pss::Value1, + true => S1pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1PSS_A::VALUE1 + *self == S1pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1PSS_A::VALUE2 + *self == S1pss::Value2 } } -#[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] -pub type S2SS_R = crate::BitReader; #[doc = "Slice 2 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2SS_A { +pub enum S2ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2SS_A) -> Self { + fn from(variant: S2ss) -> Self { variant as u8 != 0 } } -impl S2SS_R { +#[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] +pub type S2ssR = crate::BitReader; +impl S2ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2SS_A { + pub const fn variant(&self) -> S2ss { match self.bits { - false => S2SS_A::VALUE1, - true => S2SS_A::VALUE2, + false => S2ss::Value1, + true => S2ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2SS_A::VALUE1 + *self == S2ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2SS_A::VALUE2 + *self == S2ss::Value2 } } -#[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] -pub type S2DSS_R = crate::BitReader; #[doc = "Slice 2 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2DSS_A { +pub enum S2dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2DSS_A) -> Self { + fn from(variant: S2dss) -> Self { variant as u8 != 0 } } -impl S2DSS_R { +#[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] +pub type S2dssR = crate::BitReader; +impl S2dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2DSS_A { + pub const fn variant(&self) -> S2dss { match self.bits { - false => S2DSS_A::VALUE1, - true => S2DSS_A::VALUE2, + false => S2dss::Value1, + true => S2dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2DSS_A::VALUE1 + *self == S2dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2DSS_A::VALUE2 + *self == S2dss::Value2 } } -#[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] -pub type S2PSS_R = crate::BitReader; #[doc = "Slice 2 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2PSS_A { +pub enum S2pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2PSS_A) -> Self { + fn from(variant: S2pss) -> Self { variant as u8 != 0 } } -impl S2PSS_R { +#[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] +pub type S2pssR = crate::BitReader; +impl S2pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2PSS_A { + pub const fn variant(&self) -> S2pss { match self.bits { - false => S2PSS_A::VALUE1, - true => S2PSS_A::VALUE2, + false => S2pss::Value1, + true => S2pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2PSS_A::VALUE1 + *self == S2pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2PSS_A::VALUE2 + *self == S2pss::Value2 } } -#[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] -pub type S3SS_R = crate::BitReader; #[doc = "Slice 3 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3SS_A { +pub enum S3ss { #[doc = "0: Shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3SS_A) -> Self { + fn from(variant: S3ss) -> Self { variant as u8 != 0 } } -impl S3SS_R { +#[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] +pub type S3ssR = crate::BitReader; +impl S3ssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3SS_A { + pub const fn variant(&self) -> S3ss { match self.bits { - false => S3SS_A::VALUE1, - true => S3SS_A::VALUE2, + false => S3ss::Value1, + true => S3ss::Value2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3SS_A::VALUE1 + *self == S3ss::Value1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3SS_A::VALUE2 + *self == S3ss::Value2 } } -#[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] -pub type S3DSS_R = crate::BitReader; #[doc = "Slice 3 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3DSS_A { +pub enum S3dss { #[doc = "0: Dither shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3DSS_A) -> Self { + fn from(variant: S3dss) -> Self { variant as u8 != 0 } } -impl S3DSS_R { +#[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] +pub type S3dssR = crate::BitReader; +impl S3dssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3DSS_A { + pub const fn variant(&self) -> S3dss { match self.bits { - false => S3DSS_A::VALUE1, - true => S3DSS_A::VALUE2, + false => S3dss::Value1, + true => S3dss::Value2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3DSS_A::VALUE1 + *self == S3dss::Value1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3DSS_A::VALUE2 + *self == S3dss::Value2 } } -#[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] -pub type S3PSS_R = crate::BitReader; #[doc = "Slice 3 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3PSS_A { +pub enum S3pss { #[doc = "0: Prescaler shadow transfer has not been requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3PSS_A) -> Self { + fn from(variant: S3pss) -> Self { variant as u8 != 0 } } -impl S3PSS_R { +#[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] +pub type S3pssR = crate::BitReader; +impl S3pssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3PSS_A { + pub const fn variant(&self) -> S3pss { match self.bits { - false => S3PSS_A::VALUE1, - true => S3PSS_A::VALUE2, + false => S3pss::Value1, + true => S3pss::Value2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3PSS_A::VALUE1 + *self == S3pss::Value1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3PSS_A::VALUE2 + *self == S3pss::Value2 } } #[doc = "Field `CC80ST1` reader - Slice 0 compare channel 1 status bit"] -pub type CC80ST1_R = crate::BitReader; +pub type Cc80st1R = crate::BitReader; #[doc = "Field `CC81ST1` reader - Slice 1 compare channel 1 status bit"] -pub type CC81ST1_R = crate::BitReader; +pub type Cc81st1R = crate::BitReader; #[doc = "Field `CC82ST1` reader - Slice 2 compare channel 1 status bit"] -pub type CC82ST1_R = crate::BitReader; +pub type Cc82st1R = crate::BitReader; #[doc = "Field `CC83ST1` reader - Slice 3 compare channel 1 status bit"] -pub type CC83ST1_R = crate::BitReader; +pub type Cc83st1R = crate::BitReader; #[doc = "Field `CC80ST2` reader - Slice 0 compare channel 2 status bit"] -pub type CC80ST2_R = crate::BitReader; +pub type Cc80st2R = crate::BitReader; #[doc = "Field `CC81ST2` reader - Slice 1 compare channel 2 status bit"] -pub type CC81ST2_R = crate::BitReader; +pub type Cc81st2R = crate::BitReader; #[doc = "Field `CC82ST2` reader - Slice 2 compare channel 2 status bit"] -pub type CC82ST2_R = crate::BitReader; +pub type Cc82st2R = crate::BitReader; #[doc = "Field `CC83ST2` reader - Slice 3 compare channel 2 status bit"] -pub type CC83ST2_R = crate::BitReader; +pub type Cc83st2R = crate::BitReader; impl R { #[doc = "Bit 0 - Slice 0 shadow transfer status"] #[inline(always)] - pub fn s0ss(&self) -> S0SS_R { - S0SS_R::new((self.bits & 1) != 0) + pub fn s0ss(&self) -> S0ssR { + S0ssR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer status"] #[inline(always)] - pub fn s0dss(&self) -> S0DSS_R { - S0DSS_R::new(((self.bits >> 1) & 1) != 0) + pub fn s0dss(&self) -> S0dssR { + S0dssR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer status"] #[inline(always)] - pub fn s0pss(&self) -> S0PSS_R { - S0PSS_R::new(((self.bits >> 2) & 1) != 0) + pub fn s0pss(&self) -> S0pssR { + S0pssR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Slice 1 shadow transfer status"] #[inline(always)] - pub fn s1ss(&self) -> S1SS_R { - S1SS_R::new(((self.bits >> 4) & 1) != 0) + pub fn s1ss(&self) -> S1ssR { + S1ssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer status"] #[inline(always)] - pub fn s1dss(&self) -> S1DSS_R { - S1DSS_R::new(((self.bits >> 5) & 1) != 0) + pub fn s1dss(&self) -> S1dssR { + S1dssR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer status"] #[inline(always)] - pub fn s1pss(&self) -> S1PSS_R { - S1PSS_R::new(((self.bits >> 6) & 1) != 0) + pub fn s1pss(&self) -> S1pssR { + S1pssR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Slice 2 shadow transfer status"] #[inline(always)] - pub fn s2ss(&self) -> S2SS_R { - S2SS_R::new(((self.bits >> 8) & 1) != 0) + pub fn s2ss(&self) -> S2ssR { + S2ssR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer status"] #[inline(always)] - pub fn s2dss(&self) -> S2DSS_R { - S2DSS_R::new(((self.bits >> 9) & 1) != 0) + pub fn s2dss(&self) -> S2dssR { + S2dssR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer status"] #[inline(always)] - pub fn s2pss(&self) -> S2PSS_R { - S2PSS_R::new(((self.bits >> 10) & 1) != 0) + pub fn s2pss(&self) -> S2pssR { + S2pssR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Slice 3 shadow transfer status"] #[inline(always)] - pub fn s3ss(&self) -> S3SS_R { - S3SS_R::new(((self.bits >> 12) & 1) != 0) + pub fn s3ss(&self) -> S3ssR { + S3ssR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer status"] #[inline(always)] - pub fn s3dss(&self) -> S3DSS_R { - S3DSS_R::new(((self.bits >> 13) & 1) != 0) + pub fn s3dss(&self) -> S3dssR { + S3dssR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer status"] #[inline(always)] - pub fn s3pss(&self) -> S3PSS_R { - S3PSS_R::new(((self.bits >> 14) & 1) != 0) + pub fn s3pss(&self) -> S3pssR { + S3pssR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Slice 0 compare channel 1 status bit"] #[inline(always)] - pub fn cc80st1(&self) -> CC80ST1_R { - CC80ST1_R::new(((self.bits >> 16) & 1) != 0) + pub fn cc80st1(&self) -> Cc80st1R { + Cc80st1R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Slice 1 compare channel 1 status bit"] #[inline(always)] - pub fn cc81st1(&self) -> CC81ST1_R { - CC81ST1_R::new(((self.bits >> 17) & 1) != 0) + pub fn cc81st1(&self) -> Cc81st1R { + Cc81st1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Slice 2 compare channel 1 status bit"] #[inline(always)] - pub fn cc82st1(&self) -> CC82ST1_R { - CC82ST1_R::new(((self.bits >> 18) & 1) != 0) + pub fn cc82st1(&self) -> Cc82st1R { + Cc82st1R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Slice 3 compare channel 1 status bit"] #[inline(always)] - pub fn cc83st1(&self) -> CC83ST1_R { - CC83ST1_R::new(((self.bits >> 19) & 1) != 0) + pub fn cc83st1(&self) -> Cc83st1R { + Cc83st1R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Slice 0 compare channel 2 status bit"] #[inline(always)] - pub fn cc80st2(&self) -> CC80ST2_R { - CC80ST2_R::new(((self.bits >> 20) & 1) != 0) + pub fn cc80st2(&self) -> Cc80st2R { + Cc80st2R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Slice 1 compare channel 2 status bit"] #[inline(always)] - pub fn cc81st2(&self) -> CC81ST2_R { - CC81ST2_R::new(((self.bits >> 21) & 1) != 0) + pub fn cc81st2(&self) -> Cc81st2R { + Cc81st2R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Slice 2 compare channel 2 status bit"] #[inline(always)] - pub fn cc82st2(&self) -> CC82ST2_R { - CC82ST2_R::new(((self.bits >> 22) & 1) != 0) + pub fn cc82st2(&self) -> Cc82st2R { + Cc82st2R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Slice 3 compare channel 2 status bit"] #[inline(always)] - pub fn cc83st2(&self) -> CC83ST2_R { - CC83ST2_R::new(((self.bits >> 23) & 1) != 0) + pub fn cc83st2(&self) -> Cc83st2R { + Cc83st2R::new(((self.bits >> 23) & 1) != 0) } } #[doc = "Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCST_SPEC; -impl crate::RegisterSpec for GCST_SPEC { +pub struct GcstSpec; +impl crate::RegisterSpec for GcstSpec { type Ux = u32; } #[doc = "`read()` method returns [`gcst::R`](R) reader structure"] -impl crate::Readable for GCST_SPEC {} +impl crate::Readable for GcstSpec {} #[doc = "`reset()` method sets GCST to value 0"] -impl crate::Resettable for GCST_SPEC { +impl crate::Resettable for GcstSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gctrl.rs b/src/ccu80/gctrl.rs index ba2566f1..6863a919 100644 --- a/src/ccu80/gctrl.rs +++ b/src/ccu80/gctrl.rs @@ -1,75 +1,75 @@ #[doc = "Register `GCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] -pub type PRBC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Prescaler Clear Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRBC_A { +pub enum Prbc { #[doc = "0: SW only"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] - VALUE5 = 4, + Value5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRBC_A) -> Self { + fn from(variant: Prbc) -> Self { variant as _ } } -impl crate::FieldSpec for PRBC_A { +impl crate::FieldSpec for Prbc { type Ux = u8; } -impl PRBC_R { +#[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] +pub type PrbcR = crate::FieldReader; +impl PrbcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRBC_A::VALUE1), - 1 => Some(PRBC_A::VALUE2), - 2 => Some(PRBC_A::VALUE3), - 3 => Some(PRBC_A::VALUE4), - 4 => Some(PRBC_A::VALUE5), + 0 => Some(Prbc::Value1), + 1 => Some(Prbc::Value2), + 2 => Some(Prbc::Value3), + 3 => Some(Prbc::Value4), + 4 => Some(Prbc::Value5), _ => None, } } #[doc = "SW only"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRBC_A::VALUE1 + *self == Prbc::Value1 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRBC_A::VALUE2 + *self == Prbc::Value2 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PRBC_A::VALUE3 + *self == Prbc::Value3 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PRBC_A::VALUE4 + *self == Prbc::Value4 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PRBC_A::VALUE5 + *self == Prbc::Value5 } } #[doc = "Field `PRBC` writer - Prescaler Clear Configuration"] -pub type PRBC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PRBC_A>; -impl<'a, REG> PRBC_W<'a, REG> +pub type PrbcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prbc>; +impl<'a, REG> PrbcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,89 +77,89 @@ where #[doc = "SW only"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE1) + self.variant(Prbc::Value1) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE2) + self.variant(Prbc::Value2) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE3) + self.variant(Prbc::Value3) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE4) + self.variant(Prbc::Value4) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PRBC_A::VALUE5) + self.variant(Prbc::Value5) } } -#[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] -pub type PCIS_R = crate::FieldReader; #[doc = "Prescaler Input Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PCIS_A { +pub enum Pcis { #[doc = "0: Module clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU8x.ECLKA"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU8x.ECLKB"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU8x.ECLKC"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PCIS_A) -> Self { + fn from(variant: Pcis) -> Self { variant as _ } } -impl crate::FieldSpec for PCIS_A { +impl crate::FieldSpec for Pcis { type Ux = u8; } -impl PCIS_R { +#[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] +pub type PcisR = crate::FieldReader; +impl PcisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCIS_A { + pub const fn variant(&self) -> Pcis { match self.bits { - 0 => PCIS_A::VALUE1, - 1 => PCIS_A::VALUE2, - 2 => PCIS_A::VALUE3, - 3 => PCIS_A::VALUE4, + 0 => Pcis::Value1, + 1 => Pcis::Value2, + 2 => Pcis::Value3, + 3 => Pcis::Value4, _ => unreachable!(), } } #[doc = "Module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCIS_A::VALUE1 + *self == Pcis::Value1 } #[doc = "CCU8x.ECLKA"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCIS_A::VALUE2 + *self == Pcis::Value2 } #[doc = "CCU8x.ECLKB"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PCIS_A::VALUE3 + *self == Pcis::Value3 } #[doc = "CCU8x.ECLKC"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PCIS_A::VALUE4 + *self == Pcis::Value4 } } #[doc = "Field `PCIS` writer - Prescaler Input Clock Selection"] -pub type PCIS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PCIS_A>; -impl<'a, REG> PCIS_W<'a, REG> +pub type PcisW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pcis>; +impl<'a, REG> PcisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -167,84 +167,84 @@ where #[doc = "Module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE1) + self.variant(Pcis::Value1) } #[doc = "CCU8x.ECLKA"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE2) + self.variant(Pcis::Value2) } #[doc = "CCU8x.ECLKB"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE3) + self.variant(Pcis::Value3) } #[doc = "CCU8x.ECLKC"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PCIS_A::VALUE4) + self.variant(Pcis::Value4) } } -#[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] -pub type SUSCFG_R = crate::FieldReader; #[doc = "Suspend Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUSCFG_A { +pub enum Suscfg { #[doc = "0: Suspend request ignored. The module never enters in suspend"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Stops all the running slices immediately. Safe stop is not applied."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUSCFG_A) -> Self { + fn from(variant: Suscfg) -> Self { variant as _ } } -impl crate::FieldSpec for SUSCFG_A { +impl crate::FieldSpec for Suscfg { type Ux = u8; } -impl SUSCFG_R { +#[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] +pub type SuscfgR = crate::FieldReader; +impl SuscfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SUSCFG_A { + pub const fn variant(&self) -> Suscfg { match self.bits { - 0 => SUSCFG_A::VALUE1, - 1 => SUSCFG_A::VALUE2, - 2 => SUSCFG_A::VALUE3, - 3 => SUSCFG_A::VALUE4, + 0 => Suscfg::Value1, + 1 => Suscfg::Value2, + 2 => Suscfg::Value3, + 3 => Suscfg::Value4, _ => unreachable!(), } } #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSCFG_A::VALUE1 + *self == Suscfg::Value1 } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUSCFG_A::VALUE2 + *self == Suscfg::Value2 } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUSCFG_A::VALUE3 + *self == Suscfg::Value3 } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SUSCFG_A::VALUE4 + *self == Suscfg::Value4 } } #[doc = "Field `SUSCFG` writer - Suspend Mode Configuration"] -pub type SUSCFG_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, SUSCFG_A>; -impl<'a, REG> SUSCFG_W<'a, REG> +pub type SuscfgW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Suscfg>; +impl<'a, REG> SuscfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -252,288 +252,288 @@ where #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE1) + self.variant(Suscfg::Value1) } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE2) + self.variant(Suscfg::Value2) } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE3) + self.variant(Suscfg::Value3) } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE4) + self.variant(Suscfg::Value4) } } -#[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] -pub type MSE0_R = crate::BitReader; #[doc = "Slice 0 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE0_A { +pub enum Mse0 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE0_A) -> Self { + fn from(variant: Mse0) -> Self { variant as u8 != 0 } } -impl MSE0_R { +#[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] +pub type Mse0R = crate::BitReader; +impl Mse0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE0_A { + pub const fn variant(&self) -> Mse0 { match self.bits { - false => MSE0_A::VALUE1, - true => MSE0_A::VALUE2, + false => Mse0::Value1, + true => Mse0::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE0_A::VALUE1 + *self == Mse0::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE0_A::VALUE2 + *self == Mse0::Value2 } } #[doc = "Field `MSE0` writer - Slice 0 Multi Channel shadow transfer enable"] -pub type MSE0_W<'a, REG> = crate::BitWriter<'a, REG, MSE0_A>; -impl<'a, REG> MSE0_W<'a, REG> +pub type Mse0W<'a, REG> = crate::BitWriter<'a, REG, Mse0>; +impl<'a, REG> Mse0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE0_A::VALUE1) + self.variant(Mse0::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE0_A::VALUE2) + self.variant(Mse0::Value2) } } -#[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] -pub type MSE1_R = crate::BitReader; #[doc = "Slice 1 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE1_A { +pub enum Mse1 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE1_A) -> Self { + fn from(variant: Mse1) -> Self { variant as u8 != 0 } } -impl MSE1_R { +#[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] +pub type Mse1R = crate::BitReader; +impl Mse1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE1_A { + pub const fn variant(&self) -> Mse1 { match self.bits { - false => MSE1_A::VALUE1, - true => MSE1_A::VALUE2, + false => Mse1::Value1, + true => Mse1::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE1_A::VALUE1 + *self == Mse1::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE1_A::VALUE2 + *self == Mse1::Value2 } } #[doc = "Field `MSE1` writer - Slice 1 Multi Channel shadow transfer enable"] -pub type MSE1_W<'a, REG> = crate::BitWriter<'a, REG, MSE1_A>; -impl<'a, REG> MSE1_W<'a, REG> +pub type Mse1W<'a, REG> = crate::BitWriter<'a, REG, Mse1>; +impl<'a, REG> Mse1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE1_A::VALUE1) + self.variant(Mse1::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE1_A::VALUE2) + self.variant(Mse1::Value2) } } -#[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] -pub type MSE2_R = crate::BitReader; #[doc = "Slice 2 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE2_A { +pub enum Mse2 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8xMCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE2_A) -> Self { + fn from(variant: Mse2) -> Self { variant as u8 != 0 } } -impl MSE2_R { +#[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] +pub type Mse2R = crate::BitReader; +impl Mse2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE2_A { + pub const fn variant(&self) -> Mse2 { match self.bits { - false => MSE2_A::VALUE1, - true => MSE2_A::VALUE2, + false => Mse2::Value1, + true => Mse2::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE2_A::VALUE1 + *self == Mse2::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8xMCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE2_A::VALUE2 + *self == Mse2::Value2 } } #[doc = "Field `MSE2` writer - Slice 2 Multi Channel shadow transfer enable"] -pub type MSE2_W<'a, REG> = crate::BitWriter<'a, REG, MSE2_A>; -impl<'a, REG> MSE2_W<'a, REG> +pub type Mse2W<'a, REG> = crate::BitWriter<'a, REG, Mse2>; +impl<'a, REG> Mse2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE2_A::VALUE1) + self.variant(Mse2::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8xMCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE2_A::VALUE2) + self.variant(Mse2::Value2) } } -#[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] -pub type MSE3_R = crate::BitReader; #[doc = "Slice 3 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSE3_A { +pub enum Mse3 { #[doc = "0: Shadow transfer can only be requested by SW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSE3_A) -> Self { + fn from(variant: Mse3) -> Self { variant as u8 != 0 } } -impl MSE3_R { +#[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] +pub type Mse3R = crate::BitReader; +impl Mse3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSE3_A { + pub const fn variant(&self) -> Mse3 { match self.bits { - false => MSE3_A::VALUE1, - true => MSE3_A::VALUE2, + false => Mse3::Value1, + true => Mse3::Value2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSE3_A::VALUE1 + *self == Mse3::Value1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSE3_A::VALUE2 + *self == Mse3::Value2 } } #[doc = "Field `MSE3` writer - Slice 3 Multi Channel shadow transfer enable"] -pub type MSE3_W<'a, REG> = crate::BitWriter<'a, REG, MSE3_A>; -impl<'a, REG> MSE3_W<'a, REG> +pub type Mse3W<'a, REG> = crate::BitWriter<'a, REG, Mse3>; +impl<'a, REG> Mse3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSE3_A::VALUE1) + self.variant(Mse3::Value1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSE3_A::VALUE2) + self.variant(Mse3::Value2) } } -#[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] -pub type MSDE_R = crate::FieldReader; #[doc = "Multi Channel shadow transfer request configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MSDE_A { +pub enum Msde { #[doc = "0: Only the shadow transfer for period and compare values is requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer for the compare, period and prescaler compare values is requested"] - VALUE2 = 1, + Value2 = 1, #[doc = "3: Shadow transfer for the compare, period, prescaler and dither compare values is requested"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MSDE_A) -> Self { + fn from(variant: Msde) -> Self { variant as _ } } -impl crate::FieldSpec for MSDE_A { +impl crate::FieldSpec for Msde { type Ux = u8; } -impl MSDE_R { +#[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] +pub type MsdeR = crate::FieldReader; +impl MsdeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MSDE_A::VALUE1), - 1 => Some(MSDE_A::VALUE2), - 3 => Some(MSDE_A::VALUE4), + 0 => Some(Msde::Value1), + 1 => Some(Msde::Value2), + 3 => Some(Msde::Value4), _ => None, } } #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSDE_A::VALUE1 + *self == Msde::Value1 } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSDE_A::VALUE2 + *self == Msde::Value2 } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MSDE_A::VALUE4 + *self == Msde::Value4 } } #[doc = "Field `MSDE` writer - Multi Channel shadow transfer request configuration"] -pub type MSDE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSDE_A>; -impl<'a, REG> MSDE_W<'a, REG> +pub type MsdeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msde>; +impl<'a, REG> MsdeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -541,134 +541,125 @@ where #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE1) + self.variant(Msde::Value1) } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE2) + self.variant(Msde::Value2) } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MSDE_A::VALUE4) + self.variant(Msde::Value4) } } impl R { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - pub fn prbc(&self) -> PRBC_R { - PRBC_R::new((self.bits & 7) as u8) + pub fn prbc(&self) -> PrbcR { + PrbcR::new((self.bits & 7) as u8) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - pub fn pcis(&self) -> PCIS_R { - PCIS_R::new(((self.bits >> 4) & 3) as u8) + pub fn pcis(&self) -> PcisR { + PcisR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SUSCFG_R { - SUSCFG_R::new(((self.bits >> 8) & 3) as u8) + pub fn suscfg(&self) -> SuscfgR { + SuscfgR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse0(&self) -> MSE0_R { - MSE0_R::new(((self.bits >> 10) & 1) != 0) + pub fn mse0(&self) -> Mse0R { + Mse0R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse1(&self) -> MSE1_R { - MSE1_R::new(((self.bits >> 11) & 1) != 0) + pub fn mse1(&self) -> Mse1R { + Mse1R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse2(&self) -> MSE2_R { - MSE2_R::new(((self.bits >> 12) & 1) != 0) + pub fn mse2(&self) -> Mse2R { + Mse2R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse3(&self) -> MSE3_R { - MSE3_R::new(((self.bits >> 13) & 1) != 0) + pub fn mse3(&self) -> Mse3R { + Mse3R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - pub fn msde(&self) -> MSDE_R { - MSDE_R::new(((self.bits >> 14) & 3) as u8) + pub fn msde(&self) -> MsdeR { + MsdeR::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] #[must_use] - pub fn prbc(&mut self) -> PRBC_W { - PRBC_W::new(self, 0) + pub fn prbc(&mut self) -> PrbcW { + PrbcW::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] #[must_use] - pub fn pcis(&mut self) -> PCIS_W { - PCIS_W::new(self, 4) + pub fn pcis(&mut self) -> PcisW { + PcisW::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SUSCFG_W { - SUSCFG_W::new(self, 8) + pub fn suscfg(&mut self) -> SuscfgW { + SuscfgW::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse0(&mut self) -> MSE0_W { - MSE0_W::new(self, 10) + pub fn mse0(&mut self) -> Mse0W { + Mse0W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse1(&mut self) -> MSE1_W { - MSE1_W::new(self, 11) + pub fn mse1(&mut self) -> Mse1W { + Mse1W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse2(&mut self) -> MSE2_W { - MSE2_W::new(self, 12) + pub fn mse2(&mut self) -> Mse2W { + Mse2W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse3(&mut self) -> MSE3_W { - MSE3_W::new(self, 13) + pub fn mse3(&mut self) -> Mse3W { + Mse3W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] #[must_use] - pub fn msde(&mut self) -> MSDE_W { - MSDE_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn msde(&mut self) -> MsdeW { + MsdeW::new(self, 14) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GCTRL_SPEC; -impl crate::RegisterSpec for GCTRL_SPEC { +pub struct GctrlSpec; +impl crate::RegisterSpec for GctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`gctrl::R`](R) reader structure"] -impl crate::Readable for GCTRL_SPEC {} +impl crate::Readable for GctrlSpec {} #[doc = "`write(|w| ..)` method takes [`gctrl::W`](W) writer structure"] -impl crate::Writable for GCTRL_SPEC { +impl crate::Writable for GctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCTRL to value 0"] -impl crate::Resettable for GCTRL_SPEC { +impl crate::Resettable for GctrlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gidlc.rs b/src/ccu80/gidlc.rs index a5d49fa1..33274fc8 100644 --- a/src/ccu80/gidlc.rs +++ b/src/ccu80/gidlc.rs @@ -1,76 +1,67 @@ #[doc = "Register `GIDLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CS0I` writer - CC80 IDLE mode clear"] -pub type CS0I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs0iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS1I` writer - CC81 IDLE mode clear"] -pub type CS1I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs1iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS2I` writer - CC82 IDLE mode clear"] -pub type CS2I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs2iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS3I` writer - CC83 IDLE mode clear"] -pub type CS3I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Cs3iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPRB` writer - Prescaler Run Bit Set"] -pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SprbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPCH` writer - Parity Checker run bit set"] -pub type SPCH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SpchW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs0i(&mut self) -> CS0I_W { - CS0I_W::new(self, 0) + pub fn cs0i(&mut self) -> Cs0iW { + Cs0iW::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs1i(&mut self) -> CS1I_W { - CS1I_W::new(self, 1) + pub fn cs1i(&mut self) -> Cs1iW { + Cs1iW::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs2i(&mut self) -> CS2I_W { - CS2I_W::new(self, 2) + pub fn cs2i(&mut self) -> Cs2iW { + Cs2iW::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs3i(&mut self) -> CS3I_W { - CS3I_W::new(self, 3) + pub fn cs3i(&mut self) -> Cs3iW { + Cs3iW::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] #[must_use] - pub fn sprb(&mut self) -> SPRB_W { - SPRB_W::new(self, 8) + pub fn sprb(&mut self) -> SprbW { + SprbW::new(self, 8) } #[doc = "Bit 10 - Parity Checker run bit set"] #[inline(always)] #[must_use] - pub fn spch(&mut self) -> SPCH_W { - SPCH_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn spch(&mut self) -> SpchW { + SpchW::new(self, 10) } } #[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GIDLC_SPEC; -impl crate::RegisterSpec for GIDLC_SPEC { +pub struct GidlcSpec; +impl crate::RegisterSpec for GidlcSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidlc::W`](W) writer structure"] -impl crate::Writable for GIDLC_SPEC { +impl crate::Writable for GidlcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLC to value 0"] -impl crate::Resettable for GIDLC_SPEC { +impl crate::Resettable for GidlcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gidls.rs b/src/ccu80/gidls.rs index 1e91ec4a..a887f299 100644 --- a/src/ccu80/gidls.rs +++ b/src/ccu80/gidls.rs @@ -1,84 +1,75 @@ #[doc = "Register `GIDLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SS0I` writer - CC80 IDLE mode set"] -pub type SS0I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss0iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS1I` writer - CC81 IDLE mode set"] -pub type SS1I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss1iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS2I` writer - CC82 IDLE mode set"] -pub type SS2I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss2iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS3I` writer - CC83 IDLE mode set"] -pub type SS3I_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ss3iW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPRB` writer - Prescaler# Run Bit Clear"] -pub type CPRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CprbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSIC` writer - Prescaler clear"] -pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PsicW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPCH` writer - Parity Checker Run bit clear"] -pub type CPCH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CpchW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss0i(&mut self) -> SS0I_W { - SS0I_W::new(self, 0) + pub fn ss0i(&mut self) -> Ss0iW { + Ss0iW::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss1i(&mut self) -> SS1I_W { - SS1I_W::new(self, 1) + pub fn ss1i(&mut self) -> Ss1iW { + Ss1iW::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss2i(&mut self) -> SS2I_W { - SS2I_W::new(self, 2) + pub fn ss2i(&mut self) -> Ss2iW { + Ss2iW::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss3i(&mut self) -> SS3I_W { - SS3I_W::new(self, 3) + pub fn ss3i(&mut self) -> Ss3iW { + Ss3iW::new(self, 3) } #[doc = "Bit 8 - Prescaler# Run Bit Clear"] #[inline(always)] #[must_use] - pub fn cprb(&mut self) -> CPRB_W { - CPRB_W::new(self, 8) + pub fn cprb(&mut self) -> CprbW { + CprbW::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] #[must_use] - pub fn psic(&mut self) -> PSIC_W { - PSIC_W::new(self, 9) + pub fn psic(&mut self) -> PsicW { + PsicW::new(self, 9) } #[doc = "Bit 10 - Parity Checker Run bit clear"] #[inline(always)] #[must_use] - pub fn cpch(&mut self) -> CPCH_W { - CPCH_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cpch(&mut self) -> CpchW { + CpchW::new(self, 10) } } #[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GIDLS_SPEC; -impl crate::RegisterSpec for GIDLS_SPEC { +pub struct GidlsSpec; +impl crate::RegisterSpec for GidlsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidls::W`](W) writer structure"] -impl crate::Writable for GIDLS_SPEC { +impl crate::Writable for GidlsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLS to value 0"] -impl crate::Resettable for GIDLS_SPEC { +impl crate::Resettable for GidlsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gpchk.rs b/src/ccu80/gpchk.rs index a3fe8d82..3451ea03 100644 --- a/src/ccu80/gpchk.rs +++ b/src/ccu80/gpchk.rs @@ -1,71 +1,71 @@ #[doc = "Register `GPCHK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPCHK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PASE` reader - Parity Checker Automatic start/stop"] -pub type PASE_R = crate::BitReader; +pub type PaseR = crate::BitReader; #[doc = "Field `PASE` writer - Parity Checker Automatic start/stop"] -pub type PASE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `PACS` reader - Parity Checker Automatic start/stop selector"] -pub type PACS_R = crate::FieldReader; +pub type PaseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Parity Checker Automatic start/stop selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PACS_A { +pub enum Pacs { #[doc = "0: CC80"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC81"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC82"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC83"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PACS_A) -> Self { + fn from(variant: Pacs) -> Self { variant as _ } } -impl crate::FieldSpec for PACS_A { +impl crate::FieldSpec for Pacs { type Ux = u8; } -impl PACS_R { +#[doc = "Field `PACS` reader - Parity Checker Automatic start/stop selector"] +pub type PacsR = crate::FieldReader; +impl PacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PACS_A { + pub const fn variant(&self) -> Pacs { match self.bits { - 0 => PACS_A::VALUE1, - 1 => PACS_A::VALUE2, - 2 => PACS_A::VALUE3, - 3 => PACS_A::VALUE4, + 0 => Pacs::Value1, + 1 => Pacs::Value2, + 2 => Pacs::Value3, + 3 => Pacs::Value4, _ => unreachable!(), } } #[doc = "CC80"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PACS_A::VALUE1 + *self == Pacs::Value1 } #[doc = "CC81"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PACS_A::VALUE2 + *self == Pacs::Value2 } #[doc = "CC82"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PACS_A::VALUE3 + *self == Pacs::Value3 } #[doc = "CC83"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PACS_A::VALUE4 + *self == Pacs::Value4 } } #[doc = "Field `PACS` writer - Parity Checker Automatic start/stop selector"] -pub type PACS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PACS_A>; -impl<'a, REG> PACS_W<'a, REG> +pub type PacsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pacs>; +impl<'a, REG> PacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,84 +73,84 @@ where #[doc = "CC80"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PACS_A::VALUE1) + self.variant(Pacs::Value1) } #[doc = "CC81"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PACS_A::VALUE2) + self.variant(Pacs::Value2) } #[doc = "CC82"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PACS_A::VALUE3) + self.variant(Pacs::Value3) } #[doc = "CC83"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PACS_A::VALUE4) + self.variant(Pacs::Value4) } } -#[doc = "Field `PISEL` reader - Driver Input signal selector"] -pub type PISEL_R = crate::FieldReader; #[doc = "Driver Input signal selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PISEL_A { +pub enum Pisel { #[doc = "0: CC8x.GP01 - driver output is connected to event 1 of slice 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC8x.GP11 - drive output is connected to event 1 of slice 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC8x.GP21 - driver output is connected to event 1 of slice 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC8x.GP31 - driver output is connected to event 1 of slice 3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PISEL_A) -> Self { + fn from(variant: Pisel) -> Self { variant as _ } } -impl crate::FieldSpec for PISEL_A { +impl crate::FieldSpec for Pisel { type Ux = u8; } -impl PISEL_R { +#[doc = "Field `PISEL` reader - Driver Input signal selector"] +pub type PiselR = crate::FieldReader; +impl PiselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PISEL_A { + pub const fn variant(&self) -> Pisel { match self.bits { - 0 => PISEL_A::VALUE1, - 1 => PISEL_A::VALUE2, - 2 => PISEL_A::VALUE3, - 3 => PISEL_A::VALUE4, + 0 => Pisel::Value1, + 1 => Pisel::Value2, + 2 => Pisel::Value3, + 3 => Pisel::Value4, _ => unreachable!(), } } #[doc = "CC8x.GP01 - driver output is connected to event 1 of slice 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PISEL_A::VALUE1 + *self == Pisel::Value1 } #[doc = "CC8x.GP11 - drive output is connected to event 1 of slice 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PISEL_A::VALUE2 + *self == Pisel::Value2 } #[doc = "CC8x.GP21 - driver output is connected to event 1 of slice 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PISEL_A::VALUE3 + *self == Pisel::Value3 } #[doc = "CC8x.GP31 - driver output is connected to event 1 of slice 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PISEL_A::VALUE4 + *self == Pisel::Value4 } } #[doc = "Field `PISEL` writer - Driver Input signal selector"] -pub type PISEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PISEL_A>; -impl<'a, REG> PISEL_W<'a, REG> +pub type PiselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pisel>; +impl<'a, REG> PiselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -158,84 +158,84 @@ where #[doc = "CC8x.GP01 - driver output is connected to event 1 of slice 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PISEL_A::VALUE1) + self.variant(Pisel::Value1) } #[doc = "CC8x.GP11 - drive output is connected to event 1 of slice 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PISEL_A::VALUE2) + self.variant(Pisel::Value2) } #[doc = "CC8x.GP21 - driver output is connected to event 1 of slice 2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PISEL_A::VALUE3) + self.variant(Pisel::Value3) } #[doc = "CC8x.GP31 - driver output is connected to event 1 of slice 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PISEL_A::VALUE4) + self.variant(Pisel::Value4) } } -#[doc = "Field `PCDS` reader - Parity Checker Delay Input Selector"] -pub type PCDS_R = crate::FieldReader; #[doc = "Parity Checker Delay Input Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PCDS_A { +pub enum Pcds { #[doc = "0: CCU8x.IGBTA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU8x.IGBTB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU8x.IGBTC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU8x.IGBTD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PCDS_A) -> Self { + fn from(variant: Pcds) -> Self { variant as _ } } -impl crate::FieldSpec for PCDS_A { +impl crate::FieldSpec for Pcds { type Ux = u8; } -impl PCDS_R { +#[doc = "Field `PCDS` reader - Parity Checker Delay Input Selector"] +pub type PcdsR = crate::FieldReader; +impl PcdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCDS_A { + pub const fn variant(&self) -> Pcds { match self.bits { - 0 => PCDS_A::VALUE1, - 1 => PCDS_A::VALUE2, - 2 => PCDS_A::VALUE3, - 3 => PCDS_A::VALUE4, + 0 => Pcds::Value1, + 1 => Pcds::Value2, + 2 => Pcds::Value3, + 3 => Pcds::Value4, _ => unreachable!(), } } #[doc = "CCU8x.IGBTA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCDS_A::VALUE1 + *self == Pcds::Value1 } #[doc = "CCU8x.IGBTB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCDS_A::VALUE2 + *self == Pcds::Value2 } #[doc = "CCU8x.IGBTC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PCDS_A::VALUE3 + *self == Pcds::Value3 } #[doc = "CCU8x.IGBTD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PCDS_A::VALUE4 + *self == Pcds::Value4 } } #[doc = "Field `PCDS` writer - Parity Checker Delay Input Selector"] -pub type PCDS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PCDS_A>; -impl<'a, REG> PCDS_W<'a, REG> +pub type PcdsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pcds>; +impl<'a, REG> PcdsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -243,226 +243,217 @@ where #[doc = "CCU8x.IGBTA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCDS_A::VALUE1) + self.variant(Pcds::Value1) } #[doc = "CCU8x.IGBTB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCDS_A::VALUE2) + self.variant(Pcds::Value2) } #[doc = "CCU8x.IGBTC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PCDS_A::VALUE3) + self.variant(Pcds::Value3) } #[doc = "CCU8x.IGBTD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PCDS_A::VALUE4) + self.variant(Pcds::Value4) } } -#[doc = "Field `PCTS` reader - Parity Checker type selector"] -pub type PCTS_R = crate::BitReader; #[doc = "Parity Checker type selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCTS_A { +pub enum Pcts { #[doc = "0: Even parity enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Odd parity enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCTS_A) -> Self { + fn from(variant: Pcts) -> Self { variant as u8 != 0 } } -impl PCTS_R { +#[doc = "Field `PCTS` reader - Parity Checker type selector"] +pub type PctsR = crate::BitReader; +impl PctsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCTS_A { + pub const fn variant(&self) -> Pcts { match self.bits { - false => PCTS_A::VALUE1, - true => PCTS_A::VALUE2, + false => Pcts::Value1, + true => Pcts::Value2, } } #[doc = "Even parity enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCTS_A::VALUE1 + *self == Pcts::Value1 } #[doc = "Odd parity enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCTS_A::VALUE2 + *self == Pcts::Value2 } } #[doc = "Field `PCTS` writer - Parity Checker type selector"] -pub type PCTS_W<'a, REG> = crate::BitWriter<'a, REG, PCTS_A>; -impl<'a, REG> PCTS_W<'a, REG> +pub type PctsW<'a, REG> = crate::BitWriter<'a, REG, Pcts>; +impl<'a, REG> PctsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Even parity enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCTS_A::VALUE1) + self.variant(Pcts::Value1) } #[doc = "Odd parity enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCTS_A::VALUE2) + self.variant(Pcts::Value2) } } #[doc = "Field `PCST` reader - Parity Checker XOR status"] -pub type PCST_R = crate::BitReader; +pub type PcstR = crate::BitReader; #[doc = "Field `PCSEL0` reader - Parity Checker Slice 0 output selection"] -pub type PCSEL0_R = crate::FieldReader; +pub type Pcsel0R = crate::FieldReader; #[doc = "Field `PCSEL0` writer - Parity Checker Slice 0 output selection"] -pub type PCSEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Pcsel0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL1` reader - Parity Checker Slice 1 output selection"] -pub type PCSEL1_R = crate::FieldReader; +pub type Pcsel1R = crate::FieldReader; #[doc = "Field `PCSEL1` writer - Parity Checker Slice 1 output selection"] -pub type PCSEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Pcsel1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL2` reader - Parity Checker Slice 2 output selection"] -pub type PCSEL2_R = crate::FieldReader; +pub type Pcsel2R = crate::FieldReader; #[doc = "Field `PCSEL2` writer - Parity Checker Slice 2 output selection"] -pub type PCSEL2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Pcsel2W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL3` reader - Parity Checker Slice 3 output selection"] -pub type PCSEL3_R = crate::FieldReader; +pub type Pcsel3R = crate::FieldReader; #[doc = "Field `PCSEL3` writer - Parity Checker Slice 3 output selection"] -pub type PCSEL3_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Pcsel3W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Parity Checker Automatic start/stop"] #[inline(always)] - pub fn pase(&self) -> PASE_R { - PASE_R::new((self.bits & 1) != 0) + pub fn pase(&self) -> PaseR { + PaseR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"] #[inline(always)] - pub fn pacs(&self) -> PACS_R { - PACS_R::new(((self.bits >> 1) & 3) as u8) + pub fn pacs(&self) -> PacsR { + PacsR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bits 3:4 - Driver Input signal selector"] #[inline(always)] - pub fn pisel(&self) -> PISEL_R { - PISEL_R::new(((self.bits >> 3) & 3) as u8) + pub fn pisel(&self) -> PiselR { + PiselR::new(((self.bits >> 3) & 3) as u8) } #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"] #[inline(always)] - pub fn pcds(&self) -> PCDS_R { - PCDS_R::new(((self.bits >> 5) & 3) as u8) + pub fn pcds(&self) -> PcdsR { + PcdsR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Parity Checker type selector"] #[inline(always)] - pub fn pcts(&self) -> PCTS_R { - PCTS_R::new(((self.bits >> 7) & 1) != 0) + pub fn pcts(&self) -> PctsR { + PctsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 15 - Parity Checker XOR status"] #[inline(always)] - pub fn pcst(&self) -> PCST_R { - PCST_R::new(((self.bits >> 15) & 1) != 0) + pub fn pcst(&self) -> PcstR { + PcstR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"] #[inline(always)] - pub fn pcsel0(&self) -> PCSEL0_R { - PCSEL0_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pcsel0(&self) -> Pcsel0R { + Pcsel0R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"] #[inline(always)] - pub fn pcsel1(&self) -> PCSEL1_R { - PCSEL1_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn pcsel1(&self) -> Pcsel1R { + Pcsel1R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"] #[inline(always)] - pub fn pcsel2(&self) -> PCSEL2_R { - PCSEL2_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pcsel2(&self) -> Pcsel2R { + Pcsel2R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"] #[inline(always)] - pub fn pcsel3(&self) -> PCSEL3_R { - PCSEL3_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn pcsel3(&self) -> Pcsel3R { + Pcsel3R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Parity Checker Automatic start/stop"] #[inline(always)] #[must_use] - pub fn pase(&mut self) -> PASE_W { - PASE_W::new(self, 0) + pub fn pase(&mut self) -> PaseW { + PaseW::new(self, 0) } #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"] #[inline(always)] #[must_use] - pub fn pacs(&mut self) -> PACS_W { - PACS_W::new(self, 1) + pub fn pacs(&mut self) -> PacsW { + PacsW::new(self, 1) } #[doc = "Bits 3:4 - Driver Input signal selector"] #[inline(always)] #[must_use] - pub fn pisel(&mut self) -> PISEL_W { - PISEL_W::new(self, 3) + pub fn pisel(&mut self) -> PiselW { + PiselW::new(self, 3) } #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"] #[inline(always)] #[must_use] - pub fn pcds(&mut self) -> PCDS_W { - PCDS_W::new(self, 5) + pub fn pcds(&mut self) -> PcdsW { + PcdsW::new(self, 5) } #[doc = "Bit 7 - Parity Checker type selector"] #[inline(always)] #[must_use] - pub fn pcts(&mut self) -> PCTS_W { - PCTS_W::new(self, 7) + pub fn pcts(&mut self) -> PctsW { + PctsW::new(self, 7) } #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"] #[inline(always)] #[must_use] - pub fn pcsel0(&mut self) -> PCSEL0_W { - PCSEL0_W::new(self, 16) + pub fn pcsel0(&mut self) -> Pcsel0W { + Pcsel0W::new(self, 16) } #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"] #[inline(always)] #[must_use] - pub fn pcsel1(&mut self) -> PCSEL1_W { - PCSEL1_W::new(self, 20) + pub fn pcsel1(&mut self) -> Pcsel1W { + Pcsel1W::new(self, 20) } #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"] #[inline(always)] #[must_use] - pub fn pcsel2(&mut self) -> PCSEL2_W { - PCSEL2_W::new(self, 24) + pub fn pcsel2(&mut self) -> Pcsel2W { + Pcsel2W::new(self, 24) } #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"] #[inline(always)] #[must_use] - pub fn pcsel3(&mut self) -> PCSEL3_W { - PCSEL3_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pcsel3(&mut self) -> Pcsel3W { + Pcsel3W::new(self, 28) } } #[doc = "Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPCHK_SPEC; -impl crate::RegisterSpec for GPCHK_SPEC { +pub struct GpchkSpec; +impl crate::RegisterSpec for GpchkSpec { type Ux = u32; } #[doc = "`read()` method returns [`gpchk::R`](R) reader structure"] -impl crate::Readable for GPCHK_SPEC {} +impl crate::Readable for GpchkSpec {} #[doc = "`write(|w| ..)` method takes [`gpchk::W`](W) writer structure"] -impl crate::Writable for GPCHK_SPEC { +impl crate::Writable for GpchkSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPCHK to value 0"] -impl crate::Resettable for GPCHK_SPEC { +impl crate::Resettable for GpchkSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gstat.rs b/src/ccu80/gstat.rs index 74963899..0e4ca833 100644 --- a/src/ccu80/gstat.rs +++ b/src/ccu80/gstat.rs @@ -1,261 +1,261 @@ #[doc = "Register `GSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `S0I` reader - CC80 IDLE status"] -pub type S0I_R = crate::BitReader; +pub type R = crate::R; #[doc = "CC80 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0I_A { +pub enum S0i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0I_A) -> Self { + fn from(variant: S0i) -> Self { variant as u8 != 0 } } -impl S0I_R { +#[doc = "Field `S0I` reader - CC80 IDLE status"] +pub type S0iR = crate::BitReader; +impl S0iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0I_A { + pub const fn variant(&self) -> S0i { match self.bits { - false => S0I_A::VALUE1, - true => S0I_A::VALUE2, + false => S0i::Value1, + true => S0i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0I_A::VALUE1 + *self == S0i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0I_A::VALUE2 + *self == S0i::Value2 } } -#[doc = "Field `S1I` reader - CC81 IDLE status"] -pub type S1I_R = crate::BitReader; #[doc = "CC81 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1I_A { +pub enum S1i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1I_A) -> Self { + fn from(variant: S1i) -> Self { variant as u8 != 0 } } -impl S1I_R { +#[doc = "Field `S1I` reader - CC81 IDLE status"] +pub type S1iR = crate::BitReader; +impl S1iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1I_A { + pub const fn variant(&self) -> S1i { match self.bits { - false => S1I_A::VALUE1, - true => S1I_A::VALUE2, + false => S1i::Value1, + true => S1i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1I_A::VALUE1 + *self == S1i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1I_A::VALUE2 + *self == S1i::Value2 } } -#[doc = "Field `S2I` reader - CC82 IDLE status"] -pub type S2I_R = crate::BitReader; #[doc = "CC82 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2I_A { +pub enum S2i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2I_A) -> Self { + fn from(variant: S2i) -> Self { variant as u8 != 0 } } -impl S2I_R { +#[doc = "Field `S2I` reader - CC82 IDLE status"] +pub type S2iR = crate::BitReader; +impl S2iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2I_A { + pub const fn variant(&self) -> S2i { match self.bits { - false => S2I_A::VALUE1, - true => S2I_A::VALUE2, + false => S2i::Value1, + true => S2i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2I_A::VALUE1 + *self == S2i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2I_A::VALUE2 + *self == S2i::Value2 } } -#[doc = "Field `S3I` reader - CC83 IDLE status"] -pub type S3I_R = crate::BitReader; #[doc = "CC83 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3I_A { +pub enum S3i { #[doc = "0: Running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Idle"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3I_A) -> Self { + fn from(variant: S3i) -> Self { variant as u8 != 0 } } -impl S3I_R { +#[doc = "Field `S3I` reader - CC83 IDLE status"] +pub type S3iR = crate::BitReader; +impl S3iR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3I_A { + pub const fn variant(&self) -> S3i { match self.bits { - false => S3I_A::VALUE1, - true => S3I_A::VALUE2, + false => S3i::Value1, + true => S3i::Value2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3I_A::VALUE1 + *self == S3i::Value1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3I_A::VALUE2 + *self == S3i::Value2 } } -#[doc = "Field `PRB` reader - Prescaler Run Bit"] -pub type PRB_R = crate::BitReader; #[doc = "Prescaler Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRB_A { +pub enum Prb { #[doc = "0: Prescaler is stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRB_A) -> Self { + fn from(variant: Prb) -> Self { variant as u8 != 0 } } -impl PRB_R { +#[doc = "Field `PRB` reader - Prescaler Run Bit"] +pub type PrbR = crate::BitReader; +impl PrbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRB_A { + pub const fn variant(&self) -> Prb { match self.bits { - false => PRB_A::VALUE1, - true => PRB_A::VALUE2, + false => Prb::Value1, + true => Prb::Value2, } } #[doc = "Prescaler is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRB_A::VALUE1 + *self == Prb::Value1 } #[doc = "Prescaler is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRB_A::VALUE2 + *self == Prb::Value2 } } -#[doc = "Field `PCRB` reader - Parity Checker Run Bit"] -pub type PCRB_R = crate::BitReader; #[doc = "Parity Checker Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCRB_A { +pub enum Pcrb { #[doc = "0: Parity Checker is stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity Checker is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCRB_A) -> Self { + fn from(variant: Pcrb) -> Self { variant as u8 != 0 } } -impl PCRB_R { +#[doc = "Field `PCRB` reader - Parity Checker Run Bit"] +pub type PcrbR = crate::BitReader; +impl PcrbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCRB_A { + pub const fn variant(&self) -> Pcrb { match self.bits { - false => PCRB_A::VALUE1, - true => PCRB_A::VALUE2, + false => Pcrb::Value1, + true => Pcrb::Value2, } } #[doc = "Parity Checker is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCRB_A::VALUE1 + *self == Pcrb::Value1 } #[doc = "Parity Checker is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCRB_A::VALUE2 + *self == Pcrb::Value2 } } impl R { #[doc = "Bit 0 - CC80 IDLE status"] #[inline(always)] - pub fn s0i(&self) -> S0I_R { - S0I_R::new((self.bits & 1) != 0) + pub fn s0i(&self) -> S0iR { + S0iR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC81 IDLE status"] #[inline(always)] - pub fn s1i(&self) -> S1I_R { - S1I_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1i(&self) -> S1iR { + S1iR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC82 IDLE status"] #[inline(always)] - pub fn s2i(&self) -> S2I_R { - S2I_R::new(((self.bits >> 2) & 1) != 0) + pub fn s2i(&self) -> S2iR { + S2iR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CC83 IDLE status"] #[inline(always)] - pub fn s3i(&self) -> S3I_R { - S3I_R::new(((self.bits >> 3) & 1) != 0) + pub fn s3i(&self) -> S3iR { + S3iR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Prescaler Run Bit"] #[inline(always)] - pub fn prb(&self) -> PRB_R { - PRB_R::new(((self.bits >> 8) & 1) != 0) + pub fn prb(&self) -> PrbR { + PrbR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Parity Checker Run Bit"] #[inline(always)] - pub fn pcrb(&self) -> PCRB_R { - PCRB_R::new(((self.bits >> 10) & 1) != 0) + pub fn pcrb(&self) -> PcrbR { + PcrbR::new(((self.bits >> 10) & 1) != 0) } } #[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GSTAT_SPEC; -impl crate::RegisterSpec for GSTAT_SPEC { +pub struct GstatSpec; +impl crate::RegisterSpec for GstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`gstat::R`](R) reader structure"] -impl crate::Readable for GSTAT_SPEC {} +impl crate::Readable for GstatSpec {} #[doc = "`reset()` method sets GSTAT to value 0x0f"] -impl crate::Resettable for GSTAT_SPEC { +impl crate::Resettable for GstatSpec { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/ccu80/midr.rs b/src/ccu80/midr.rs index 10cbacbb..f106a2c2 100644 --- a/src/ccu80/midr.rs +++ b/src/ccu80/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type MODR_R = crate::FieldReader; +pub type ModrR = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type MODT_R = crate::FieldReader; +pub type ModtR = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type MODN_R = crate::FieldReader; +pub type ModnR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> MODR_R { - MODR_R::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> ModrR { + ModrR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> MODT_R { - MODT_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> ModtR { + ModtR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> MODN_R { - MODN_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> ModnR { + ModnR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MIDR_SPEC; -impl crate::RegisterSpec for MIDR_SPEC { +pub struct MidrSpec; +impl crate::RegisterSpec for MidrSpec { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MIDR_SPEC {} +impl crate::Readable for MidrSpec {} #[doc = "`reset()` method sets MIDR to value 0x00a7_c000"] -impl crate::Resettable for MIDR_SPEC { +impl crate::Resettable for MidrSpec { const RESET_VALUE: u32 = 0x00a7_c000; } diff --git a/src/ccu80_cc80.rs b/src/ccu80_cc80.rs index 2ff1005e..46fb8be3 100644 --- a/src/ccu80_cc80.rs +++ b/src/ccu80_cc80.rs @@ -1,393 +1,428 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - ins: INS, - cmc: CMC, - tcst: TCST, - tcset: TCSET, - tcclr: TCCLR, - tc: TC, - psl: PSL, - dit: DIT, - dits: DITS, - psc: PSC, - fpc: FPC, - fpcs: FPCS, - pr: PR, - prs: PRS, - cr1: CR1, - cr1s: CR1S, - cr2: CR2, - cr2s: CR2S, - chc: CHC, - dtc: DTC, - dc1r: DC1R, - dc2r: DC2R, + ins: Ins, + cmc: Cmc, + tcst: Tcst, + tcset: Tcset, + tcclr: Tcclr, + tc: Tc, + psl: Psl, + dit: Dit, + dits: Dits, + psc: Psc, + fpc: Fpc, + fpcs: Fpcs, + pr: Pr, + prs: Prs, + cr1: Cr1, + cr1s: Cr1s, + cr2: Cr2, + cr2s: Cr2s, + chc: Chc, + dtc: Dtc, + dc1r: Dc1r, + dc2r: Dc2r, _reserved22: [u8; 0x18], - timer: TIMER, - c0v: C0V, - c1v: C1V, - c2v: C2V, - c3v: C3V, + timer: Timer, + c0v: C0v, + c1v: C1v, + c2v: C2v, + c3v: C3v, _reserved27: [u8; 0x1c], - ints: INTS, - inte: INTE, - srs: SRS, - sws: SWS, - swr: SWR, - stc: STC, - ecrd0: ECRD0, - ecrd1: ECRD1, + ints: Ints, + inte: Inte, + srs: Srs, + sws: Sws, + swr: Swr, + stc: Stc, + ecrd0: Ecrd0, + ecrd1: Ecrd1, } impl RegisterBlock { #[doc = "0x00 - Input Selector Configuration"] #[inline(always)] - pub const fn ins(&self) -> &INS { + pub const fn ins(&self) -> &Ins { &self.ins } #[doc = "0x04 - Connection Matrix Control"] #[inline(always)] - pub const fn cmc(&self) -> &CMC { + pub const fn cmc(&self) -> &Cmc { &self.cmc } #[doc = "0x08 - Slice Timer Status"] #[inline(always)] - pub const fn tcst(&self) -> &TCST { + pub const fn tcst(&self) -> &Tcst { &self.tcst } #[doc = "0x0c - Slice Timer Run Set"] #[inline(always)] - pub const fn tcset(&self) -> &TCSET { + pub const fn tcset(&self) -> &Tcset { &self.tcset } #[doc = "0x10 - Slice Timer Clear"] #[inline(always)] - pub const fn tcclr(&self) -> &TCCLR { + pub const fn tcclr(&self) -> &Tcclr { &self.tcclr } #[doc = "0x14 - Slice Timer Control"] #[inline(always)] - pub const fn tc(&self) -> &TC { + pub const fn tc(&self) -> &Tc { &self.tc } #[doc = "0x18 - Passive Level Config"] #[inline(always)] - pub const fn psl(&self) -> &PSL { + pub const fn psl(&self) -> &Psl { &self.psl } #[doc = "0x1c - Dither Config"] #[inline(always)] - pub const fn dit(&self) -> &DIT { + pub const fn dit(&self) -> &Dit { &self.dit } #[doc = "0x20 - Dither Shadow Register"] #[inline(always)] - pub const fn dits(&self) -> &DITS { + pub const fn dits(&self) -> &Dits { &self.dits } #[doc = "0x24 - Prescaler Control"] #[inline(always)] - pub const fn psc(&self) -> &PSC { + pub const fn psc(&self) -> &Psc { &self.psc } #[doc = "0x28 - Floating Prescaler Control"] #[inline(always)] - pub const fn fpc(&self) -> &FPC { + pub const fn fpc(&self) -> &Fpc { &self.fpc } #[doc = "0x2c - Floating Prescaler Shadow"] #[inline(always)] - pub const fn fpcs(&self) -> &FPCS { + pub const fn fpcs(&self) -> &Fpcs { &self.fpcs } #[doc = "0x30 - Timer Period Value"] #[inline(always)] - pub const fn pr(&self) -> &PR { + pub const fn pr(&self) -> &Pr { &self.pr } #[doc = "0x34 - Timer Shadow Period Value"] #[inline(always)] - pub const fn prs(&self) -> &PRS { + pub const fn prs(&self) -> &Prs { &self.prs } #[doc = "0x38 - Channel 1 Compare Value"] #[inline(always)] - pub const fn cr1(&self) -> &CR1 { + pub const fn cr1(&self) -> &Cr1 { &self.cr1 } #[doc = "0x3c - Channel 1 Compare Shadow Value"] #[inline(always)] - pub const fn cr1s(&self) -> &CR1S { + pub const fn cr1s(&self) -> &Cr1s { &self.cr1s } #[doc = "0x40 - Channel 2 Compare Value"] #[inline(always)] - pub const fn cr2(&self) -> &CR2 { + pub const fn cr2(&self) -> &Cr2 { &self.cr2 } #[doc = "0x44 - Channel 2 Compare Shadow Value"] #[inline(always)] - pub const fn cr2s(&self) -> &CR2S { + pub const fn cr2s(&self) -> &Cr2s { &self.cr2s } #[doc = "0x48 - Channel Control"] #[inline(always)] - pub const fn chc(&self) -> &CHC { + pub const fn chc(&self) -> &Chc { &self.chc } #[doc = "0x4c - Dead Time Control"] #[inline(always)] - pub const fn dtc(&self) -> &DTC { + pub const fn dtc(&self) -> &Dtc { &self.dtc } #[doc = "0x50 - Channel 1 Dead Time Values"] #[inline(always)] - pub const fn dc1r(&self) -> &DC1R { + pub const fn dc1r(&self) -> &Dc1r { &self.dc1r } #[doc = "0x54 - Channel 2 Dead Time Values"] #[inline(always)] - pub const fn dc2r(&self) -> &DC2R { + pub const fn dc2r(&self) -> &Dc2r { &self.dc2r } #[doc = "0x70 - Timer Value"] #[inline(always)] - pub const fn timer(&self) -> &TIMER { + pub const fn timer(&self) -> &Timer { &self.timer } #[doc = "0x74 - Capture Register 0"] #[inline(always)] - pub const fn c0v(&self) -> &C0V { + pub const fn c0v(&self) -> &C0v { &self.c0v } #[doc = "0x78 - Capture Register 1"] #[inline(always)] - pub const fn c1v(&self) -> &C1V { + pub const fn c1v(&self) -> &C1v { &self.c1v } #[doc = "0x7c - Capture Register 2"] #[inline(always)] - pub const fn c2v(&self) -> &C2V { + pub const fn c2v(&self) -> &C2v { &self.c2v } #[doc = "0x80 - Capture Register 3"] #[inline(always)] - pub const fn c3v(&self) -> &C3V { + pub const fn c3v(&self) -> &C3v { &self.c3v } #[doc = "0xa0 - Interrupt Status"] #[inline(always)] - pub const fn ints(&self) -> &INTS { + pub const fn ints(&self) -> &Ints { &self.ints } #[doc = "0xa4 - Interrupt Enable Control"] #[inline(always)] - pub const fn inte(&self) -> &INTE { + pub const fn inte(&self) -> &Inte { &self.inte } #[doc = "0xa8 - Service Request Selector"] #[inline(always)] - pub const fn srs(&self) -> &SRS { + pub const fn srs(&self) -> &Srs { &self.srs } #[doc = "0xac - Interrupt Status Set"] #[inline(always)] - pub const fn sws(&self) -> &SWS { + pub const fn sws(&self) -> &Sws { &self.sws } #[doc = "0xb0 - Interrupt Status Clear"] #[inline(always)] - pub const fn swr(&self) -> &SWR { + pub const fn swr(&self) -> &Swr { &self.swr } #[doc = "0xb4 - Shadow transfer control"] #[inline(always)] - pub const fn stc(&self) -> &STC { + pub const fn stc(&self) -> &Stc { &self.stc } #[doc = "0xb8 - Extended Read Back 0"] #[inline(always)] - pub const fn ecrd0(&self) -> &ECRD0 { + pub const fn ecrd0(&self) -> &Ecrd0 { &self.ecrd0 } #[doc = "0xbc - Extended Read Back 1"] #[inline(always)] - pub const fn ecrd1(&self) -> &ECRD1 { + pub const fn ecrd1(&self) -> &Ecrd1 { &self.ecrd1 } } #[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] -pub type INS = crate::Reg; +#[doc(alias = "INS")] +pub type Ins = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; #[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] -pub type CMC = crate::Reg; +#[doc(alias = "CMC")] +pub type Cmc = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; #[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] -pub type TCST = crate::Reg; +#[doc(alias = "TCST")] +pub type Tcst = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; #[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] -pub type TCSET = crate::Reg; +#[doc(alias = "TCSET")] +pub type Tcset = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; #[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] -pub type TCCLR = crate::Reg; +#[doc(alias = "TCCLR")] +pub type Tcclr = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; #[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] -pub type TC = crate::Reg; +#[doc(alias = "TC")] +pub type Tc = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; #[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] -pub type PSL = crate::Reg; +#[doc(alias = "PSL")] +pub type Psl = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; #[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] -pub type DIT = crate::Reg; +#[doc(alias = "DIT")] +pub type Dit = crate::Reg; #[doc = "Dither Config"] pub mod dit; #[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] -pub type DITS = crate::Reg; +#[doc(alias = "DITS")] +pub type Dits = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; #[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] -pub type PSC = crate::Reg; +#[doc(alias = "PSC")] +pub type Psc = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; #[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] -pub type FPC = crate::Reg; +#[doc(alias = "FPC")] +pub type Fpc = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; #[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] -pub type FPCS = crate::Reg; +#[doc(alias = "FPCS")] +pub type Fpcs = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; #[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] -pub type PR = crate::Reg; +#[doc(alias = "PR")] +pub type Pr = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; #[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] -pub type PRS = crate::Reg; +#[doc(alias = "PRS")] +pub type Prs = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; #[doc = "CR1 (r) register accessor: Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] module"] -pub type CR1 = crate::Reg; +#[doc(alias = "CR1")] +pub type Cr1 = crate::Reg; #[doc = "Channel 1 Compare Value"] pub mod cr1; #[doc = "CR1S (rw) register accessor: Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1s`] module"] -pub type CR1S = crate::Reg; +#[doc(alias = "CR1S")] +pub type Cr1s = crate::Reg; #[doc = "Channel 1 Compare Shadow Value"] pub mod cr1s; #[doc = "CR2 (r) register accessor: Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] module"] -pub type CR2 = crate::Reg; +#[doc(alias = "CR2")] +pub type Cr2 = crate::Reg; #[doc = "Channel 2 Compare Value"] pub mod cr2; #[doc = "CR2S (rw) register accessor: Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2s`] module"] -pub type CR2S = crate::Reg; +#[doc(alias = "CR2S")] +pub type Cr2s = crate::Reg; #[doc = "Channel 2 Compare Shadow Value"] pub mod cr2s; #[doc = "CHC (rw) register accessor: Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chc`] module"] -pub type CHC = crate::Reg; +#[doc(alias = "CHC")] +pub type Chc = crate::Reg; #[doc = "Channel Control"] pub mod chc; #[doc = "DTC (rw) register accessor: Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtc`] module"] -pub type DTC = crate::Reg; +#[doc(alias = "DTC")] +pub type Dtc = crate::Reg; #[doc = "Dead Time Control"] pub mod dtc; #[doc = "DC1R (rw) register accessor: Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc1r`] module"] -pub type DC1R = crate::Reg; +#[doc(alias = "DC1R")] +pub type Dc1r = crate::Reg; #[doc = "Channel 1 Dead Time Values"] pub mod dc1r; #[doc = "DC2R (rw) register accessor: Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc2r`] module"] -pub type DC2R = crate::Reg; +#[doc(alias = "DC2R")] +pub type Dc2r = crate::Reg; #[doc = "Channel 2 Dead Time Values"] pub mod dc2r; #[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] -pub type TIMER = crate::Reg; +#[doc(alias = "TIMER")] +pub type Timer = crate::Reg; #[doc = "Timer Value"] pub mod timer; #[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] module"] -pub type C0V = crate::Reg; +#[doc(alias = "C0V")] +pub type C0v = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; #[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] module"] -pub type C1V = crate::Reg; +#[doc(alias = "C1V")] +pub type C1v = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; #[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] module"] -pub type C2V = crate::Reg; +#[doc(alias = "C2V")] +pub type C2v = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; #[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] module"] -pub type C3V = crate::Reg; +#[doc(alias = "C3V")] +pub type C3v = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; #[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] -pub type INTS = crate::Reg; +#[doc(alias = "INTS")] +pub type Ints = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; #[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] -pub type INTE = crate::Reg; +#[doc(alias = "INTE")] +pub type Inte = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; #[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] -pub type SRS = crate::Reg; +#[doc(alias = "SRS")] +pub type Srs = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; #[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] -pub type SWS = crate::Reg; +#[doc(alias = "SWS")] +pub type Sws = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; #[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] -pub type SWR = crate::Reg; +#[doc(alias = "SWR")] +pub type Swr = crate::Reg; #[doc = "Interrupt Status Clear"] pub mod swr; #[doc = "STC (rw) register accessor: Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stc`] module"] -pub type STC = crate::Reg; +#[doc(alias = "STC")] +pub type Stc = crate::Reg; #[doc = "Shadow transfer control"] pub mod stc; #[doc = "ECRD0 (r) register accessor: Extended Read Back 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd0`] module"] -pub type ECRD0 = crate::Reg; +#[doc(alias = "ECRD0")] +pub type Ecrd0 = crate::Reg; #[doc = "Extended Read Back 0"] pub mod ecrd0; #[doc = "ECRD1 (r) register accessor: Extended Read Back 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd1::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd1`] module"] -pub type ECRD1 = crate::Reg; +#[doc(alias = "ECRD1")] +pub type Ecrd1 = crate::Reg; #[doc = "Extended Read Back 1"] pub mod ecrd1; diff --git a/src/ccu80_cc80/c0v.rs b/src/ccu80_cc80/c0v.rs index 3c74379a..8921e719 100644 --- a/src/ccu80_cc80/c0v.rs +++ b/src/ccu80_cc80/c0v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C0V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C0V_SPEC; -impl crate::RegisterSpec for C0V_SPEC { +pub struct C0vSpec; +impl crate::RegisterSpec for C0vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c0v::R`](R) reader structure"] -impl crate::Readable for C0V_SPEC {} +impl crate::Readable for C0vSpec {} #[doc = "`reset()` method sets C0V to value 0"] -impl crate::Resettable for C0V_SPEC { +impl crate::Resettable for C0vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c1v.rs b/src/ccu80_cc80/c1v.rs index f0a726d2..d7b854ed 100644 --- a/src/ccu80_cc80/c1v.rs +++ b/src/ccu80_cc80/c1v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C1V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C1V_SPEC; -impl crate::RegisterSpec for C1V_SPEC { +pub struct C1vSpec; +impl crate::RegisterSpec for C1vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c1v::R`](R) reader structure"] -impl crate::Readable for C1V_SPEC {} +impl crate::Readable for C1vSpec {} #[doc = "`reset()` method sets C1V to value 0"] -impl crate::Resettable for C1V_SPEC { +impl crate::Resettable for C1vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c2v.rs b/src/ccu80_cc80/c2v.rs index 5f3c0663..5b12e99b 100644 --- a/src/ccu80_cc80/c2v.rs +++ b/src/ccu80_cc80/c2v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C2V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C2V_SPEC; -impl crate::RegisterSpec for C2V_SPEC { +pub struct C2vSpec; +impl crate::RegisterSpec for C2vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c2v::R`](R) reader structure"] -impl crate::Readable for C2V_SPEC {} +impl crate::Readable for C2vSpec {} #[doc = "`reset()` method sets C2V to value 0"] -impl crate::Resettable for C2V_SPEC { +impl crate::Resettable for C2vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c3v.rs b/src/ccu80_cc80/c3v.rs index f9f08e73..32fc268f 100644 --- a/src/ccu80_cc80/c3v.rs +++ b/src/ccu80_cc80/c3v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C3V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CAPTV_R = crate::FieldReader; +pub type CaptvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; +pub type FpcvR = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into the specific capture register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value was captured into the specific register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CAPTV_R { - CAPTV_R::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CaptvR { + CaptvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C3V_SPEC; -impl crate::RegisterSpec for C3V_SPEC { +pub struct C3vSpec; +impl crate::RegisterSpec for C3vSpec { type Ux = u32; } #[doc = "`read()` method returns [`c3v::R`](R) reader structure"] -impl crate::Readable for C3V_SPEC {} +impl crate::Readable for C3vSpec {} #[doc = "`reset()` method sets C3V to value 0"] -impl crate::Resettable for C3V_SPEC { +impl crate::Resettable for C3vSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/chc.rs b/src/ccu80_cc80/chc.rs index bf596cde..76a7da36 100644 --- a/src/ccu80_cc80/chc.rs +++ b/src/ccu80_cc80/chc.rs @@ -1,354 +1,345 @@ #[doc = "Register `CHC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHC` writer"] -pub type W = crate::W; -#[doc = "Field `ASE` reader - Asymmetric PWM mode Enable"] -pub type ASE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Asymmetric PWM mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASE_A { +pub enum Ase { #[doc = "0: Asymmetric PWM is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Asymmetric PWM is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASE_A) -> Self { + fn from(variant: Ase) -> Self { variant as u8 != 0 } } -impl ASE_R { +#[doc = "Field `ASE` reader - Asymmetric PWM mode Enable"] +pub type AseR = crate::BitReader; +impl AseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASE_A { + pub const fn variant(&self) -> Ase { match self.bits { - false => ASE_A::VALUE1, - true => ASE_A::VALUE2, + false => Ase::Value1, + true => Ase::Value2, } } #[doc = "Asymmetric PWM is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASE_A::VALUE1 + *self == Ase::Value1 } #[doc = "Asymmetric PWM is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASE_A::VALUE2 + *self == Ase::Value2 } } #[doc = "Field `ASE` writer - Asymmetric PWM mode Enable"] -pub type ASE_W<'a, REG> = crate::BitWriter<'a, REG, ASE_A>; -impl<'a, REG> ASE_W<'a, REG> +pub type AseW<'a, REG> = crate::BitWriter<'a, REG, Ase>; +impl<'a, REG> AseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Asymmetric PWM is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASE_A::VALUE1) + self.variant(Ase::Value1) } #[doc = "Asymmetric PWM is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASE_A::VALUE2) + self.variant(Ase::Value2) } } -#[doc = "Field `OCS1` reader - Output selector for CCU8x.OUTy0"] -pub type OCS1_R = crate::BitReader; #[doc = "Output selector for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OCS1_A { +pub enum Ocs1 { #[doc = "0: CC8yST1 signal path is connected to the CCU8x.OUTy0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OCS1_A) -> Self { + fn from(variant: Ocs1) -> Self { variant as u8 != 0 } } -impl OCS1_R { +#[doc = "Field `OCS1` reader - Output selector for CCU8x.OUTy0"] +pub type Ocs1R = crate::BitReader; +impl Ocs1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OCS1_A { + pub const fn variant(&self) -> Ocs1 { match self.bits { - false => OCS1_A::VALUE1, - true => OCS1_A::VALUE2, + false => Ocs1::Value1, + true => Ocs1::Value2, } } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OCS1_A::VALUE1 + *self == Ocs1::Value1 } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OCS1_A::VALUE2 + *self == Ocs1::Value2 } } #[doc = "Field `OCS1` writer - Output selector for CCU8x.OUTy0"] -pub type OCS1_W<'a, REG> = crate::BitWriter<'a, REG, OCS1_A>; -impl<'a, REG> OCS1_W<'a, REG> +pub type Ocs1W<'a, REG> = crate::BitWriter<'a, REG, Ocs1>; +impl<'a, REG> Ocs1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OCS1_A::VALUE1) + self.variant(Ocs1::Value1) } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OCS1_A::VALUE2) + self.variant(Ocs1::Value2) } } -#[doc = "Field `OCS2` reader - Output selector for CCU8x.OUTy1"] -pub type OCS2_R = crate::BitReader; #[doc = "Output selector for CCU8x.OUTy1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OCS2_A { +pub enum Ocs2 { #[doc = "0: Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC8yST1 signal path is connected to the CCU8x.OUTy1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OCS2_A) -> Self { + fn from(variant: Ocs2) -> Self { variant as u8 != 0 } } -impl OCS2_R { +#[doc = "Field `OCS2` reader - Output selector for CCU8x.OUTy1"] +pub type Ocs2R = crate::BitReader; +impl Ocs2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OCS2_A { + pub const fn variant(&self) -> Ocs2 { match self.bits { - false => OCS2_A::VALUE1, - true => OCS2_A::VALUE2, + false => Ocs2::Value1, + true => Ocs2::Value2, } } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OCS2_A::VALUE1 + *self == Ocs2::Value1 } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OCS2_A::VALUE2 + *self == Ocs2::Value2 } } #[doc = "Field `OCS2` writer - Output selector for CCU8x.OUTy1"] -pub type OCS2_W<'a, REG> = crate::BitWriter<'a, REG, OCS2_A>; -impl<'a, REG> OCS2_W<'a, REG> +pub type Ocs2W<'a, REG> = crate::BitWriter<'a, REG, Ocs2>; +impl<'a, REG> Ocs2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OCS2_A::VALUE1) + self.variant(Ocs2::Value1) } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OCS2_A::VALUE2) + self.variant(Ocs2::Value2) } } -#[doc = "Field `OCS3` reader - Output selector for CCU8x.OUTy2"] -pub type OCS3_R = crate::BitReader; #[doc = "Output selector for CCU8x.OUTy2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OCS3_A { +pub enum Ocs3 { #[doc = "0: CC8yST2 signal path is connected to the CCU8x.OUTy2"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OCS3_A) -> Self { + fn from(variant: Ocs3) -> Self { variant as u8 != 0 } } -impl OCS3_R { +#[doc = "Field `OCS3` reader - Output selector for CCU8x.OUTy2"] +pub type Ocs3R = crate::BitReader; +impl Ocs3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OCS3_A { + pub const fn variant(&self) -> Ocs3 { match self.bits { - false => OCS3_A::VALUE1, - true => OCS3_A::VALUE2, + false => Ocs3::Value1, + true => Ocs3::Value2, } } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OCS3_A::VALUE1 + *self == Ocs3::Value1 } #[doc = "Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OCS3_A::VALUE2 + *self == Ocs3::Value2 } } #[doc = "Field `OCS3` writer - Output selector for CCU8x.OUTy2"] -pub type OCS3_W<'a, REG> = crate::BitWriter<'a, REG, OCS3_A>; -impl<'a, REG> OCS3_W<'a, REG> +pub type Ocs3W<'a, REG> = crate::BitWriter<'a, REG, Ocs3>; +impl<'a, REG> Ocs3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OCS3_A::VALUE1) + self.variant(Ocs3::Value1) } #[doc = "Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OCS3_A::VALUE2) + self.variant(Ocs3::Value2) } } -#[doc = "Field `OCS4` reader - Output selector for CCU8x.OUTy3"] -pub type OCS4_R = crate::BitReader; #[doc = "Output selector for CCU8x.OUTy3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OCS4_A { +pub enum Ocs4 { #[doc = "0: Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC8yST2 signal path is connected to the CCU8x.OUTy3"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OCS4_A) -> Self { + fn from(variant: Ocs4) -> Self { variant as u8 != 0 } } -impl OCS4_R { +#[doc = "Field `OCS4` reader - Output selector for CCU8x.OUTy3"] +pub type Ocs4R = crate::BitReader; +impl Ocs4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OCS4_A { + pub const fn variant(&self) -> Ocs4 { match self.bits { - false => OCS4_A::VALUE1, - true => OCS4_A::VALUE2, + false => Ocs4::Value1, + true => Ocs4::Value2, } } #[doc = "Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OCS4_A::VALUE1 + *self == Ocs4::Value1 } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OCS4_A::VALUE2 + *self == Ocs4::Value2 } } #[doc = "Field `OCS4` writer - Output selector for CCU8x.OUTy3"] -pub type OCS4_W<'a, REG> = crate::BitWriter<'a, REG, OCS4_A>; -impl<'a, REG> OCS4_W<'a, REG> +pub type Ocs4W<'a, REG> = crate::BitWriter<'a, REG, Ocs4>; +impl<'a, REG> Ocs4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OCS4_A::VALUE1) + self.variant(Ocs4::Value1) } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OCS4_A::VALUE2) + self.variant(Ocs4::Value2) } } impl R { #[doc = "Bit 0 - Asymmetric PWM mode Enable"] #[inline(always)] - pub fn ase(&self) -> ASE_R { - ASE_R::new((self.bits & 1) != 0) + pub fn ase(&self) -> AseR { + AseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"] #[inline(always)] - pub fn ocs1(&self) -> OCS1_R { - OCS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ocs1(&self) -> Ocs1R { + Ocs1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"] #[inline(always)] - pub fn ocs2(&self) -> OCS2_R { - OCS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ocs2(&self) -> Ocs2R { + Ocs2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"] #[inline(always)] - pub fn ocs3(&self) -> OCS3_R { - OCS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ocs3(&self) -> Ocs3R { + Ocs3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"] #[inline(always)] - pub fn ocs4(&self) -> OCS4_R { - OCS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ocs4(&self) -> Ocs4R { + Ocs4R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Asymmetric PWM mode Enable"] #[inline(always)] #[must_use] - pub fn ase(&mut self) -> ASE_W { - ASE_W::new(self, 0) + pub fn ase(&mut self) -> AseW { + AseW::new(self, 0) } #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn ocs1(&mut self) -> OCS1_W { - OCS1_W::new(self, 1) + pub fn ocs1(&mut self) -> Ocs1W { + Ocs1W::new(self, 1) } #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn ocs2(&mut self) -> OCS2_W { - OCS2_W::new(self, 2) + pub fn ocs2(&mut self) -> Ocs2W { + Ocs2W::new(self, 2) } #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn ocs3(&mut self) -> OCS3_W { - OCS3_W::new(self, 3) + pub fn ocs3(&mut self) -> Ocs3W { + Ocs3W::new(self, 3) } #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn ocs4(&mut self) -> OCS4_W { - OCS4_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ocs4(&mut self) -> Ocs4W { + Ocs4W::new(self, 4) } } #[doc = "Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHC_SPEC; -impl crate::RegisterSpec for CHC_SPEC { +pub struct ChcSpec; +impl crate::RegisterSpec for ChcSpec { type Ux = u32; } #[doc = "`read()` method returns [`chc::R`](R) reader structure"] -impl crate::Readable for CHC_SPEC {} +impl crate::Readable for ChcSpec {} #[doc = "`write(|w| ..)` method takes [`chc::W`](W) writer structure"] -impl crate::Writable for CHC_SPEC { +impl crate::Writable for ChcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHC to value 0"] -impl crate::Resettable for CHC_SPEC { +impl crate::Resettable for ChcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cmc.rs b/src/ccu80_cc80/cmc.rs index 89c4f682..81e3c125 100644 --- a/src/ccu80_cc80/cmc.rs +++ b/src/ccu80_cc80/cmc.rs @@ -1,67 +1,67 @@ #[doc = "Register `CMC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMC` writer"] -pub type W = crate::W; -#[doc = "Field `STRTS` reader - External Start Functionality Selector"] -pub type STRTS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Start Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STRTS_A { +pub enum Strts { #[doc = "0: External Start Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Start Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Start Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Start Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STRTS_A) -> Self { + fn from(variant: Strts) -> Self { variant as _ } } -impl crate::FieldSpec for STRTS_A { +impl crate::FieldSpec for Strts { type Ux = u8; } -impl STRTS_R { +#[doc = "Field `STRTS` reader - External Start Functionality Selector"] +pub type StrtsR = crate::FieldReader; +impl StrtsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STRTS_A { + pub const fn variant(&self) -> Strts { match self.bits { - 0 => STRTS_A::VALUE1, - 1 => STRTS_A::VALUE2, - 2 => STRTS_A::VALUE3, - 3 => STRTS_A::VALUE4, + 0 => Strts::Value1, + 1 => Strts::Value2, + 2 => Strts::Value3, + 3 => Strts::Value4, _ => unreachable!(), } } #[doc = "External Start Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STRTS_A::VALUE1 + *self == Strts::Value1 } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STRTS_A::VALUE2 + *self == Strts::Value2 } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STRTS_A::VALUE3 + *self == Strts::Value3 } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STRTS_A::VALUE4 + *self == Strts::Value4 } } #[doc = "Field `STRTS` writer - External Start Functionality Selector"] -pub type STRTS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, STRTS_A>; -impl<'a, REG> STRTS_W<'a, REG> +pub type StrtsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Strts>; +impl<'a, REG> StrtsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "External Start Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE1) + self.variant(Strts::Value1) } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE2) + self.variant(Strts::Value2) } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE3) + self.variant(Strts::Value3) } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STRTS_A::VALUE4) + self.variant(Strts::Value4) } } -#[doc = "Field `ENDS` reader - External Stop Functionality Selector"] -pub type ENDS_R = crate::FieldReader; #[doc = "External Stop Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENDS_A { +pub enum Ends { #[doc = "0: External Stop Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Stop Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Stop Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Stop Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENDS_A) -> Self { + fn from(variant: Ends) -> Self { variant as _ } } -impl crate::FieldSpec for ENDS_A { +impl crate::FieldSpec for Ends { type Ux = u8; } -impl ENDS_R { +#[doc = "Field `ENDS` reader - External Stop Functionality Selector"] +pub type EndsR = crate::FieldReader; +impl EndsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENDS_A { + pub const fn variant(&self) -> Ends { match self.bits { - 0 => ENDS_A::VALUE1, - 1 => ENDS_A::VALUE2, - 2 => ENDS_A::VALUE3, - 3 => ENDS_A::VALUE4, + 0 => Ends::Value1, + 1 => Ends::Value2, + 2 => Ends::Value3, + 3 => Ends::Value4, _ => unreachable!(), } } #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDS_A::VALUE1 + *self == Ends::Value1 } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDS_A::VALUE2 + *self == Ends::Value2 } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENDS_A::VALUE3 + *self == Ends::Value3 } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENDS_A::VALUE4 + *self == Ends::Value4 } } #[doc = "Field `ENDS` writer - External Stop Functionality Selector"] -pub type ENDS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ENDS_A>; -impl<'a, REG> ENDS_W<'a, REG> +pub type EndsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ends>; +impl<'a, REG> EndsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE1) + self.variant(Ends::Value1) } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE2) + self.variant(Ends::Value2) } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE3) + self.variant(Ends::Value3) } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ENDS_A::VALUE4) + self.variant(Ends::Value4) } } -#[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] -pub type CAP0S_R = crate::FieldReader; #[doc = "External Capture 0 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP0S_A { +pub enum Cap0s { #[doc = "0: External Capture 0 Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Capture 0 Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Capture 0 Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Capture 0 Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP0S_A) -> Self { + fn from(variant: Cap0s) -> Self { variant as _ } } -impl crate::FieldSpec for CAP0S_A { +impl crate::FieldSpec for Cap0s { type Ux = u8; } -impl CAP0S_R { +#[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] +pub type Cap0sR = crate::FieldReader; +impl Cap0sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAP0S_A { + pub const fn variant(&self) -> Cap0s { match self.bits { - 0 => CAP0S_A::VALUE1, - 1 => CAP0S_A::VALUE2, - 2 => CAP0S_A::VALUE3, - 3 => CAP0S_A::VALUE4, + 0 => Cap0s::Value1, + 1 => Cap0s::Value2, + 2 => Cap0s::Value3, + 3 => Cap0s::Value4, _ => unreachable!(), } } #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAP0S_A::VALUE1 + *self == Cap0s::Value1 } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAP0S_A::VALUE2 + *self == Cap0s::Value2 } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAP0S_A::VALUE3 + *self == Cap0s::Value3 } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAP0S_A::VALUE4 + *self == Cap0s::Value4 } } #[doc = "Field `CAP0S` writer - External Capture 0 Functionality Selector"] -pub type CAP0S_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAP0S_A>; -impl<'a, REG> CAP0S_W<'a, REG> +pub type Cap0sW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cap0s>; +impl<'a, REG> Cap0sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE1) + self.variant(Cap0s::Value1) } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE2) + self.variant(Cap0s::Value2) } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE3) + self.variant(Cap0s::Value3) } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAP0S_A::VALUE4) + self.variant(Cap0s::Value4) } } -#[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] -pub type CAP1S_R = crate::FieldReader; #[doc = "External Capture 1 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAP1S_A { +pub enum Cap1s { #[doc = "0: External Capture 1 Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Capture 1 Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Capture 1 Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Capture 1 Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAP1S_A) -> Self { + fn from(variant: Cap1s) -> Self { variant as _ } } -impl crate::FieldSpec for CAP1S_A { +impl crate::FieldSpec for Cap1s { type Ux = u8; } -impl CAP1S_R { +#[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] +pub type Cap1sR = crate::FieldReader; +impl Cap1sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAP1S_A { + pub const fn variant(&self) -> Cap1s { match self.bits { - 0 => CAP1S_A::VALUE1, - 1 => CAP1S_A::VALUE2, - 2 => CAP1S_A::VALUE3, - 3 => CAP1S_A::VALUE4, + 0 => Cap1s::Value1, + 1 => Cap1s::Value2, + 2 => Cap1s::Value3, + 3 => Cap1s::Value4, _ => unreachable!(), } } #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAP1S_A::VALUE1 + *self == Cap1s::Value1 } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAP1S_A::VALUE2 + *self == Cap1s::Value2 } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAP1S_A::VALUE3 + *self == Cap1s::Value3 } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAP1S_A::VALUE4 + *self == Cap1s::Value4 } } #[doc = "Field `CAP1S` writer - External Capture 1 Functionality Selector"] -pub type CAP1S_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAP1S_A>; -impl<'a, REG> CAP1S_W<'a, REG> +pub type Cap1sW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cap1s>; +impl<'a, REG> Cap1sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE1) + self.variant(Cap1s::Value1) } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE2) + self.variant(Cap1s::Value2) } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE3) + self.variant(Cap1s::Value3) } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAP1S_A::VALUE4) + self.variant(Cap1s::Value4) } } -#[doc = "Field `GATES` reader - External Gate Functionality Selector"] -pub type GATES_R = crate::FieldReader; #[doc = "External Gate Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum GATES_A { +pub enum Gates { #[doc = "0: External Gating Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Gating Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Gating Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Gating Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: GATES_A) -> Self { + fn from(variant: Gates) -> Self { variant as _ } } -impl crate::FieldSpec for GATES_A { +impl crate::FieldSpec for Gates { type Ux = u8; } -impl GATES_R { +#[doc = "Field `GATES` reader - External Gate Functionality Selector"] +pub type GatesR = crate::FieldReader; +impl GatesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GATES_A { + pub const fn variant(&self) -> Gates { match self.bits { - 0 => GATES_A::VALUE1, - 1 => GATES_A::VALUE2, - 2 => GATES_A::VALUE3, - 3 => GATES_A::VALUE4, + 0 => Gates::Value1, + 1 => Gates::Value2, + 2 => Gates::Value3, + 3 => Gates::Value4, _ => unreachable!(), } } #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GATES_A::VALUE1 + *self == Gates::Value1 } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GATES_A::VALUE2 + *self == Gates::Value2 } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == GATES_A::VALUE3 + *self == Gates::Value3 } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == GATES_A::VALUE4 + *self == Gates::Value4 } } #[doc = "Field `GATES` writer - External Gate Functionality Selector"] -pub type GATES_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, GATES_A>; -impl<'a, REG> GATES_W<'a, REG> +pub type GatesW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Gates>; +impl<'a, REG> GatesW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE1) + self.variant(Gates::Value1) } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE2) + self.variant(Gates::Value2) } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE3) + self.variant(Gates::Value3) } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(GATES_A::VALUE4) + self.variant(Gates::Value4) } } -#[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] -pub type UDS_R = crate::FieldReader; #[doc = "External Up/Down Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum UDS_A { +pub enum Uds { #[doc = "0: External Up/Down Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Up/Down Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Up/Down Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Up/Down Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: UDS_A) -> Self { + fn from(variant: Uds) -> Self { variant as _ } } -impl crate::FieldSpec for UDS_A { +impl crate::FieldSpec for Uds { type Ux = u8; } -impl UDS_R { +#[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] +pub type UdsR = crate::FieldReader; +impl UdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UDS_A { + pub const fn variant(&self) -> Uds { match self.bits { - 0 => UDS_A::VALUE1, - 1 => UDS_A::VALUE2, - 2 => UDS_A::VALUE3, - 3 => UDS_A::VALUE4, + 0 => Uds::Value1, + 1 => Uds::Value2, + 2 => Uds::Value3, + 3 => Uds::Value4, _ => unreachable!(), } } #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UDS_A::VALUE1 + *self == Uds::Value1 } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UDS_A::VALUE2 + *self == Uds::Value2 } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == UDS_A::VALUE3 + *self == Uds::Value3 } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == UDS_A::VALUE4 + *self == Uds::Value4 } } #[doc = "Field `UDS` writer - External Up/Down Functionality Selector"] -pub type UDS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, UDS_A>; -impl<'a, REG> UDS_W<'a, REG> +pub type UdsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Uds>; +impl<'a, REG> UdsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,88 +494,88 @@ where #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE1) + self.variant(Uds::Value1) } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE2) + self.variant(Uds::Value2) } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE3) + self.variant(Uds::Value3) } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(UDS_A::VALUE4) + self.variant(Uds::Value4) } } #[doc = "Field `LDS` reader - External Timer Load Functionality Selector"] -pub type LDS_R = crate::FieldReader; +pub type LdsR = crate::FieldReader; #[doc = "Field `LDS` writer - External Timer Load Functionality Selector"] -pub type LDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `CNTS` reader - External Count Selector"] -pub type CNTS_R = crate::FieldReader; +pub type LdsW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "External Count Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CNTS_A { +pub enum Cnts { #[doc = "0: External Count Function deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Count Function triggered by Event 0"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Count Function triggered by Event 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Count Function triggered by Event 2"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CNTS_A) -> Self { + fn from(variant: Cnts) -> Self { variant as _ } } -impl crate::FieldSpec for CNTS_A { +impl crate::FieldSpec for Cnts { type Ux = u8; } -impl CNTS_R { +#[doc = "Field `CNTS` reader - External Count Selector"] +pub type CntsR = crate::FieldReader; +impl CntsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CNTS_A { + pub const fn variant(&self) -> Cnts { match self.bits { - 0 => CNTS_A::VALUE1, - 1 => CNTS_A::VALUE2, - 2 => CNTS_A::VALUE3, - 3 => CNTS_A::VALUE4, + 0 => Cnts::Value1, + 1 => Cnts::Value2, + 2 => Cnts::Value3, + 3 => Cnts::Value4, _ => unreachable!(), } } #[doc = "External Count Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CNTS_A::VALUE1 + *self == Cnts::Value1 } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CNTS_A::VALUE2 + *self == Cnts::Value2 } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CNTS_A::VALUE3 + *self == Cnts::Value3 } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CNTS_A::VALUE4 + *self == Cnts::Value4 } } #[doc = "Field `CNTS` writer - External Count Selector"] -pub type CNTS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CNTS_A>; -impl<'a, REG> CNTS_W<'a, REG> +pub type CntsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cnts>; +impl<'a, REG> CntsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -583,346 +583,337 @@ where #[doc = "External Count Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE1) + self.variant(Cnts::Value1) } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE2) + self.variant(Cnts::Value2) } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE3) + self.variant(Cnts::Value3) } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CNTS_A::VALUE4) + self.variant(Cnts::Value4) } } -#[doc = "Field `OFS` reader - Override Function Selector"] -pub type OFS_R = crate::BitReader; #[doc = "Override Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OFS_A { +pub enum Ofs { #[doc = "0: Override functionality disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OFS_A) -> Self { + fn from(variant: Ofs) -> Self { variant as u8 != 0 } } -impl OFS_R { +#[doc = "Field `OFS` reader - Override Function Selector"] +pub type OfsR = crate::BitReader; +impl OfsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OFS_A { + pub const fn variant(&self) -> Ofs { match self.bits { - false => OFS_A::VALUE1, - true => OFS_A::VALUE2, + false => Ofs::Value1, + true => Ofs::Value2, } } #[doc = "Override functionality disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OFS_A::VALUE1 + *self == Ofs::Value1 } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OFS_A::VALUE2 + *self == Ofs::Value2 } } #[doc = "Field `OFS` writer - Override Function Selector"] -pub type OFS_W<'a, REG> = crate::BitWriter<'a, REG, OFS_A>; -impl<'a, REG> OFS_W<'a, REG> +pub type OfsW<'a, REG> = crate::BitWriter<'a, REG, Ofs>; +impl<'a, REG> OfsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override functionality disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OFS_A::VALUE1) + self.variant(Ofs::Value1) } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OFS_A::VALUE2) + self.variant(Ofs::Value2) } } -#[doc = "Field `TS` reader - Trap Function Selector"] -pub type TS_R = crate::BitReader; #[doc = "Trap Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TS_A { +pub enum Ts { #[doc = "0: Trap function disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TRAP function connected to Event 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TS_A) -> Self { + fn from(variant: Ts) -> Self { variant as u8 != 0 } } -impl TS_R { +#[doc = "Field `TS` reader - Trap Function Selector"] +pub type TsR = crate::BitReader; +impl TsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TS_A { + pub const fn variant(&self) -> Ts { match self.bits { - false => TS_A::VALUE1, - true => TS_A::VALUE2, + false => Ts::Value1, + true => Ts::Value2, } } #[doc = "Trap function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TS_A::VALUE1 + *self == Ts::Value1 } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TS_A::VALUE2 + *self == Ts::Value2 } } #[doc = "Field `TS` writer - Trap Function Selector"] -pub type TS_W<'a, REG> = crate::BitWriter<'a, REG, TS_A>; -impl<'a, REG> TS_W<'a, REG> +pub type TsW<'a, REG> = crate::BitWriter<'a, REG, Ts>; +impl<'a, REG> TsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TS_A::VALUE1) + self.variant(Ts::Value1) } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TS_A::VALUE2) + self.variant(Ts::Value2) } } #[doc = "Field `MOS` reader - External Modulation Functionality Selector"] -pub type MOS_R = crate::FieldReader; +pub type MosR = crate::FieldReader; #[doc = "Field `MOS` writer - External Modulation Functionality Selector"] -pub type MOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `TCE` reader - Timer Concatenation Enable"] -pub type TCE_R = crate::BitReader; +pub type MosW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Timer Concatenation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TCE_A { +pub enum Tce { #[doc = "0: Timer concatenation is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer concatenation is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TCE_A) -> Self { + fn from(variant: Tce) -> Self { variant as u8 != 0 } } -impl TCE_R { +#[doc = "Field `TCE` reader - Timer Concatenation Enable"] +pub type TceR = crate::BitReader; +impl TceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TCE_A { + pub const fn variant(&self) -> Tce { match self.bits { - false => TCE_A::VALUE1, - true => TCE_A::VALUE2, + false => Tce::Value1, + true => Tce::Value2, } } #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TCE_A::VALUE1 + *self == Tce::Value1 } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TCE_A::VALUE2 + *self == Tce::Value2 } } #[doc = "Field `TCE` writer - Timer Concatenation Enable"] -pub type TCE_W<'a, REG> = crate::BitWriter<'a, REG, TCE_A>; -impl<'a, REG> TCE_W<'a, REG> +pub type TceW<'a, REG> = crate::BitWriter<'a, REG, Tce>; +impl<'a, REG> TceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TCE_A::VALUE1) + self.variant(Tce::Value1) } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TCE_A::VALUE2) + self.variant(Tce::Value2) } } impl R { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - pub fn strts(&self) -> STRTS_R { - STRTS_R::new((self.bits & 3) as u8) + pub fn strts(&self) -> StrtsR { + StrtsR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - pub fn ends(&self) -> ENDS_R { - ENDS_R::new(((self.bits >> 2) & 3) as u8) + pub fn ends(&self) -> EndsR { + EndsR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - pub fn cap0s(&self) -> CAP0S_R { - CAP0S_R::new(((self.bits >> 4) & 3) as u8) + pub fn cap0s(&self) -> Cap0sR { + Cap0sR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - pub fn cap1s(&self) -> CAP1S_R { - CAP1S_R::new(((self.bits >> 6) & 3) as u8) + pub fn cap1s(&self) -> Cap1sR { + Cap1sR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - pub fn gates(&self) -> GATES_R { - GATES_R::new(((self.bits >> 8) & 3) as u8) + pub fn gates(&self) -> GatesR { + GatesR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - pub fn uds(&self) -> UDS_R { - UDS_R::new(((self.bits >> 10) & 3) as u8) + pub fn uds(&self) -> UdsR { + UdsR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - pub fn lds(&self) -> LDS_R { - LDS_R::new(((self.bits >> 12) & 3) as u8) + pub fn lds(&self) -> LdsR { + LdsR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - pub fn cnts(&self) -> CNTS_R { - CNTS_R::new(((self.bits >> 14) & 3) as u8) + pub fn cnts(&self) -> CntsR { + CntsR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - pub fn ofs(&self) -> OFS_R { - OFS_R::new(((self.bits >> 16) & 1) != 0) + pub fn ofs(&self) -> OfsR { + OfsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - pub fn ts(&self) -> TS_R { - TS_R::new(((self.bits >> 17) & 1) != 0) + pub fn ts(&self) -> TsR { + TsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - pub fn mos(&self) -> MOS_R { - MOS_R::new(((self.bits >> 18) & 3) as u8) + pub fn mos(&self) -> MosR { + MosR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - pub fn tce(&self) -> TCE_R { - TCE_R::new(((self.bits >> 20) & 1) != 0) + pub fn tce(&self) -> TceR { + TceR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] #[must_use] - pub fn strts(&mut self) -> STRTS_W { - STRTS_W::new(self, 0) + pub fn strts(&mut self) -> StrtsW { + StrtsW::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] #[must_use] - pub fn ends(&mut self) -> ENDS_W { - ENDS_W::new(self, 2) + pub fn ends(&mut self) -> EndsW { + EndsW::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap0s(&mut self) -> CAP0S_W { - CAP0S_W::new(self, 4) + pub fn cap0s(&mut self) -> Cap0sW { + Cap0sW::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap1s(&mut self) -> CAP1S_W { - CAP1S_W::new(self, 6) + pub fn cap1s(&mut self) -> Cap1sW { + Cap1sW::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] #[must_use] - pub fn gates(&mut self) -> GATES_W { - GATES_W::new(self, 8) + pub fn gates(&mut self) -> GatesW { + GatesW::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] #[must_use] - pub fn uds(&mut self) -> UDS_W { - UDS_W::new(self, 10) + pub fn uds(&mut self) -> UdsW { + UdsW::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] #[must_use] - pub fn lds(&mut self) -> LDS_W { - LDS_W::new(self, 12) + pub fn lds(&mut self) -> LdsW { + LdsW::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] #[must_use] - pub fn cnts(&mut self) -> CNTS_W { - CNTS_W::new(self, 14) + pub fn cnts(&mut self) -> CntsW { + CntsW::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] #[must_use] - pub fn ofs(&mut self) -> OFS_W { - OFS_W::new(self, 16) + pub fn ofs(&mut self) -> OfsW { + OfsW::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] #[must_use] - pub fn ts(&mut self) -> TS_W { - TS_W::new(self, 17) + pub fn ts(&mut self) -> TsW { + TsW::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] #[must_use] - pub fn mos(&mut self) -> MOS_W { - MOS_W::new(self, 18) + pub fn mos(&mut self) -> MosW { + MosW::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] #[must_use] - pub fn tce(&mut self) -> TCE_W { - TCE_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tce(&mut self) -> TceW { + TceW::new(self, 20) } } #[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CMC_SPEC; -impl crate::RegisterSpec for CMC_SPEC { +pub struct CmcSpec; +impl crate::RegisterSpec for CmcSpec { type Ux = u32; } #[doc = "`read()` method returns [`cmc::R`](R) reader structure"] -impl crate::Readable for CMC_SPEC {} +impl crate::Readable for CmcSpec {} #[doc = "`write(|w| ..)` method takes [`cmc::W`](W) writer structure"] -impl crate::Writable for CMC_SPEC { +impl crate::Writable for CmcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMC to value 0"] -impl crate::Resettable for CMC_SPEC { +impl crate::Resettable for CmcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr1.rs b/src/ccu80_cc80/cr1.rs index 9b6f129a..dd379e3c 100644 --- a/src/ccu80_cc80/cr1.rs +++ b/src/ccu80_cc80/cr1.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR1` reader - Compare Register for Channel 1"] -pub type CR1_R = crate::FieldReader; +pub type Cr1R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register for Channel 1"] #[inline(always)] - pub fn cr1(&self) -> CR1_R { - CR1_R::new((self.bits & 0xffff) as u16) + pub fn cr1(&self) -> Cr1R { + Cr1R::new((self.bits & 0xffff) as u16) } } #[doc = "Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CR1_SPEC; -impl crate::RegisterSpec for CR1_SPEC { +pub struct Cr1Spec; +impl crate::RegisterSpec for Cr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`cr1::R`](R) reader structure"] -impl crate::Readable for CR1_SPEC {} +impl crate::Readable for Cr1Spec {} #[doc = "`reset()` method sets CR1 to value 0"] -impl crate::Resettable for CR1_SPEC { +impl crate::Resettable for Cr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr1s.rs b/src/ccu80_cc80/cr1s.rs index 962bd95a..8bb0b7cc 100644 --- a/src/ccu80_cc80/cr1s.rs +++ b/src/ccu80_cc80/cr1s.rs @@ -1,49 +1,40 @@ #[doc = "Register `CR1S` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CR1S` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CR1S` reader - Shadow Compare Register for Channel 1"] -pub type CR1S_R = crate::FieldReader; +pub type Cr1sR = crate::FieldReader; #[doc = "Field `CR1S` writer - Shadow Compare Register for Channel 1"] -pub type CR1S_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type Cr1sW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"] #[inline(always)] - pub fn cr1s(&self) -> CR1S_R { - CR1S_R::new((self.bits & 0xffff) as u16) + pub fn cr1s(&self) -> Cr1sR { + Cr1sR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"] #[inline(always)] #[must_use] - pub fn cr1s(&mut self) -> CR1S_W { - CR1S_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cr1s(&mut self) -> Cr1sW { + Cr1sW::new(self, 0) } } #[doc = "Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CR1S_SPEC; -impl crate::RegisterSpec for CR1S_SPEC { +pub struct Cr1sSpec; +impl crate::RegisterSpec for Cr1sSpec { type Ux = u32; } #[doc = "`read()` method returns [`cr1s::R`](R) reader structure"] -impl crate::Readable for CR1S_SPEC {} +impl crate::Readable for Cr1sSpec {} #[doc = "`write(|w| ..)` method takes [`cr1s::W`](W) writer structure"] -impl crate::Writable for CR1S_SPEC { +impl crate::Writable for Cr1sSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CR1S to value 0"] -impl crate::Resettable for CR1S_SPEC { +impl crate::Resettable for Cr1sSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr2.rs b/src/ccu80_cc80/cr2.rs index 033fed80..702c23b6 100644 --- a/src/ccu80_cc80/cr2.rs +++ b/src/ccu80_cc80/cr2.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR2` reader - Compare Register for Channel 2"] -pub type CR2_R = crate::FieldReader; +pub type Cr2R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register for Channel 2"] #[inline(always)] - pub fn cr2(&self) -> CR2_R { - CR2_R::new((self.bits & 0xffff) as u16) + pub fn cr2(&self) -> Cr2R { + Cr2R::new((self.bits & 0xffff) as u16) } } #[doc = "Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CR2_SPEC; -impl crate::RegisterSpec for CR2_SPEC { +pub struct Cr2Spec; +impl crate::RegisterSpec for Cr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`cr2::R`](R) reader structure"] -impl crate::Readable for CR2_SPEC {} +impl crate::Readable for Cr2Spec {} #[doc = "`reset()` method sets CR2 to value 0"] -impl crate::Resettable for CR2_SPEC { +impl crate::Resettable for Cr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr2s.rs b/src/ccu80_cc80/cr2s.rs index ba50f01f..548e5364 100644 --- a/src/ccu80_cc80/cr2s.rs +++ b/src/ccu80_cc80/cr2s.rs @@ -1,49 +1,40 @@ #[doc = "Register `CR2S` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CR2S` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CR2S` reader - Shadow Compare Register for Channel 2"] -pub type CR2S_R = crate::FieldReader; +pub type Cr2sR = crate::FieldReader; #[doc = "Field `CR2S` writer - Shadow Compare Register for Channel 2"] -pub type CR2S_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type Cr2sW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"] #[inline(always)] - pub fn cr2s(&self) -> CR2S_R { - CR2S_R::new((self.bits & 0xffff) as u16) + pub fn cr2s(&self) -> Cr2sR { + Cr2sR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"] #[inline(always)] #[must_use] - pub fn cr2s(&mut self) -> CR2S_W { - CR2S_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cr2s(&mut self) -> Cr2sW { + Cr2sW::new(self, 0) } } #[doc = "Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CR2S_SPEC; -impl crate::RegisterSpec for CR2S_SPEC { +pub struct Cr2sSpec; +impl crate::RegisterSpec for Cr2sSpec { type Ux = u32; } #[doc = "`read()` method returns [`cr2s::R`](R) reader structure"] -impl crate::Readable for CR2S_SPEC {} +impl crate::Readable for Cr2sSpec {} #[doc = "`write(|w| ..)` method takes [`cr2s::W`](W) writer structure"] -impl crate::Writable for CR2S_SPEC { +impl crate::Writable for Cr2sSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CR2S to value 0"] -impl crate::Resettable for CR2S_SPEC { +impl crate::Resettable for Cr2sSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dc1r.rs b/src/ccu80_cc80/dc1r.rs index bec35d96..2225d3a0 100644 --- a/src/ccu80_cc80/dc1r.rs +++ b/src/ccu80_cc80/dc1r.rs @@ -1,64 +1,55 @@ #[doc = "Register `DC1R` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC1R` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DT1R` reader - Rise Value for Dead Time of Channel 1"] -pub type DT1R_R = crate::FieldReader; +pub type Dt1rR = crate::FieldReader; #[doc = "Field `DT1R` writer - Rise Value for Dead Time of Channel 1"] -pub type DT1R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Dt1rW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DT1F` reader - Fall Value for Dead Time of Channel 1"] -pub type DT1F_R = crate::FieldReader; +pub type Dt1fR = crate::FieldReader; #[doc = "Field `DT1F` writer - Fall Value for Dead Time of Channel 1"] -pub type DT1F_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Dt1fW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"] #[inline(always)] - pub fn dt1r(&self) -> DT1R_R { - DT1R_R::new((self.bits & 0xff) as u8) + pub fn dt1r(&self) -> Dt1rR { + Dt1rR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"] #[inline(always)] - pub fn dt1f(&self) -> DT1F_R { - DT1F_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn dt1f(&self) -> Dt1fR { + Dt1fR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"] #[inline(always)] #[must_use] - pub fn dt1r(&mut self) -> DT1R_W { - DT1R_W::new(self, 0) + pub fn dt1r(&mut self) -> Dt1rW { + Dt1rW::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"] #[inline(always)] #[must_use] - pub fn dt1f(&mut self) -> DT1F_W { - DT1F_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dt1f(&mut self) -> Dt1fW { + Dt1fW::new(self, 8) } } #[doc = "Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC1R_SPEC; -impl crate::RegisterSpec for DC1R_SPEC { +pub struct Dc1rSpec; +impl crate::RegisterSpec for Dc1rSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc1r::R`](R) reader structure"] -impl crate::Readable for DC1R_SPEC {} +impl crate::Readable for Dc1rSpec {} #[doc = "`write(|w| ..)` method takes [`dc1r::W`](W) writer structure"] -impl crate::Writable for DC1R_SPEC { +impl crate::Writable for Dc1rSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC1R to value 0"] -impl crate::Resettable for DC1R_SPEC { +impl crate::Resettable for Dc1rSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dc2r.rs b/src/ccu80_cc80/dc2r.rs index 55349999..162c8fa6 100644 --- a/src/ccu80_cc80/dc2r.rs +++ b/src/ccu80_cc80/dc2r.rs @@ -1,64 +1,55 @@ #[doc = "Register `DC2R` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC2R` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DT2R` reader - Rise Value for Dead Time of Channel 2"] -pub type DT2R_R = crate::FieldReader; +pub type Dt2rR = crate::FieldReader; #[doc = "Field `DT2R` writer - Rise Value for Dead Time of Channel 2"] -pub type DT2R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Dt2rW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DT2F` reader - Fall Value for Dead Time of Channel 2"] -pub type DT2F_R = crate::FieldReader; +pub type Dt2fR = crate::FieldReader; #[doc = "Field `DT2F` writer - Fall Value for Dead Time of Channel 2"] -pub type DT2F_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Dt2fW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"] #[inline(always)] - pub fn dt2r(&self) -> DT2R_R { - DT2R_R::new((self.bits & 0xff) as u8) + pub fn dt2r(&self) -> Dt2rR { + Dt2rR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"] #[inline(always)] - pub fn dt2f(&self) -> DT2F_R { - DT2F_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn dt2f(&self) -> Dt2fR { + Dt2fR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"] #[inline(always)] #[must_use] - pub fn dt2r(&mut self) -> DT2R_W { - DT2R_W::new(self, 0) + pub fn dt2r(&mut self) -> Dt2rW { + Dt2rW::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"] #[inline(always)] #[must_use] - pub fn dt2f(&mut self) -> DT2F_W { - DT2F_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dt2f(&mut self) -> Dt2fW { + Dt2fW::new(self, 8) } } #[doc = "Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC2R_SPEC; -impl crate::RegisterSpec for DC2R_SPEC { +pub struct Dc2rSpec; +impl crate::RegisterSpec for Dc2rSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc2r::R`](R) reader structure"] -impl crate::Readable for DC2R_SPEC {} +impl crate::Readable for Dc2rSpec {} #[doc = "`write(|w| ..)` method takes [`dc2r::W`](W) writer structure"] -impl crate::Writable for DC2R_SPEC { +impl crate::Writable for Dc2rSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC2R to value 0"] -impl crate::Resettable for DC2R_SPEC { +impl crate::Resettable for Dc2rSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dit.rs b/src/ccu80_cc80/dit.rs index 02e005ab..62dab291 100644 --- a/src/ccu80_cc80/dit.rs +++ b/src/ccu80_cc80/dit.rs @@ -1,29 +1,29 @@ #[doc = "Register `DIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DCV` reader - Dither compare Value"] -pub type DCV_R = crate::FieldReader; +pub type DcvR = crate::FieldReader; #[doc = "Field `DCNT` reader - Dither counter actual value"] -pub type DCNT_R = crate::FieldReader; +pub type DcntR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Dither compare Value"] #[inline(always)] - pub fn dcv(&self) -> DCV_R { - DCV_R::new((self.bits & 0x0f) as u8) + pub fn dcv(&self) -> DcvR { + DcvR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Dither counter actual value"] #[inline(always)] - pub fn dcnt(&self) -> DCNT_R { - DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn dcnt(&self) -> DcntR { + DcntR::new(((self.bits >> 8) & 0x0f) as u8) } } #[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIT_SPEC; -impl crate::RegisterSpec for DIT_SPEC { +pub struct DitSpec; +impl crate::RegisterSpec for DitSpec { type Ux = u32; } #[doc = "`read()` method returns [`dit::R`](R) reader structure"] -impl crate::Readable for DIT_SPEC {} +impl crate::Readable for DitSpec {} #[doc = "`reset()` method sets DIT to value 0"] -impl crate::Resettable for DIT_SPEC { +impl crate::Resettable for DitSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dits.rs b/src/ccu80_cc80/dits.rs index 4039d3e7..e8d9215c 100644 --- a/src/ccu80_cc80/dits.rs +++ b/src/ccu80_cc80/dits.rs @@ -1,49 +1,40 @@ #[doc = "Register `DITS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DITS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DCVS` reader - Dither Shadow Compare Value"] -pub type DCVS_R = crate::FieldReader; +pub type DcvsR = crate::FieldReader; #[doc = "Field `DCVS` writer - Dither Shadow Compare Value"] -pub type DCVS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DcvsW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - pub fn dcvs(&self) -> DCVS_R { - DCVS_R::new((self.bits & 0x0f) as u8) + pub fn dcvs(&self) -> DcvsR { + DcvsR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn dcvs(&mut self) -> DCVS_W { - DCVS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dcvs(&mut self) -> DcvsW { + DcvsW::new(self, 0) } } #[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DITS_SPEC; -impl crate::RegisterSpec for DITS_SPEC { +pub struct DitsSpec; +impl crate::RegisterSpec for DitsSpec { type Ux = u32; } #[doc = "`read()` method returns [`dits::R`](R) reader structure"] -impl crate::Readable for DITS_SPEC {} +impl crate::Readable for DitsSpec {} #[doc = "`write(|w| ..)` method takes [`dits::W`](W) writer structure"] -impl crate::Writable for DITS_SPEC { +impl crate::Writable for DitsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DITS to value 0"] -impl crate::Resettable for DITS_SPEC { +impl crate::Resettable for DitsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dtc.rs b/src/ccu80_cc80/dtc.rs index 2695a344..3e22a6b8 100644 --- a/src/ccu80_cc80/dtc.rs +++ b/src/ccu80_cc80/dtc.rs @@ -1,385 +1,385 @@ #[doc = "Register `DTC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DTC` writer"] -pub type W = crate::W; -#[doc = "Field `DTE1` reader - Dead Time Enable for Channel 1"] -pub type DTE1_R = crate::BitReader; +pub type W = crate::W; #[doc = "Dead Time Enable for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTE1_A { +pub enum Dte1 { #[doc = "0: Dead Time for channel 1 is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for channel 1 is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTE1_A) -> Self { + fn from(variant: Dte1) -> Self { variant as u8 != 0 } } -impl DTE1_R { +#[doc = "Field `DTE1` reader - Dead Time Enable for Channel 1"] +pub type Dte1R = crate::BitReader; +impl Dte1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTE1_A { + pub const fn variant(&self) -> Dte1 { match self.bits { - false => DTE1_A::VALUE1, - true => DTE1_A::VALUE2, + false => Dte1::Value1, + true => Dte1::Value2, } } #[doc = "Dead Time for channel 1 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTE1_A::VALUE1 + *self == Dte1::Value1 } #[doc = "Dead Time for channel 1 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTE1_A::VALUE2 + *self == Dte1::Value2 } } #[doc = "Field `DTE1` writer - Dead Time Enable for Channel 1"] -pub type DTE1_W<'a, REG> = crate::BitWriter<'a, REG, DTE1_A>; -impl<'a, REG> DTE1_W<'a, REG> +pub type Dte1W<'a, REG> = crate::BitWriter<'a, REG, Dte1>; +impl<'a, REG> Dte1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for channel 1 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DTE1_A::VALUE1) + self.variant(Dte1::Value1) } #[doc = "Dead Time for channel 1 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DTE1_A::VALUE2) + self.variant(Dte1::Value2) } } -#[doc = "Field `DTE2` reader - Dead Time Enable for Channel 2"] -pub type DTE2_R = crate::BitReader; #[doc = "Dead Time Enable for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTE2_A { +pub enum Dte2 { #[doc = "0: Dead Time for channel 2 is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for channel 2 is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTE2_A) -> Self { + fn from(variant: Dte2) -> Self { variant as u8 != 0 } } -impl DTE2_R { +#[doc = "Field `DTE2` reader - Dead Time Enable for Channel 2"] +pub type Dte2R = crate::BitReader; +impl Dte2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTE2_A { + pub const fn variant(&self) -> Dte2 { match self.bits { - false => DTE2_A::VALUE1, - true => DTE2_A::VALUE2, + false => Dte2::Value1, + true => Dte2::Value2, } } #[doc = "Dead Time for channel 2 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTE2_A::VALUE1 + *self == Dte2::Value1 } #[doc = "Dead Time for channel 2 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTE2_A::VALUE2 + *self == Dte2::Value2 } } #[doc = "Field `DTE2` writer - Dead Time Enable for Channel 2"] -pub type DTE2_W<'a, REG> = crate::BitWriter<'a, REG, DTE2_A>; -impl<'a, REG> DTE2_W<'a, REG> +pub type Dte2W<'a, REG> = crate::BitWriter<'a, REG, Dte2>; +impl<'a, REG> Dte2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for channel 2 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DTE2_A::VALUE1) + self.variant(Dte2::Value1) } #[doc = "Dead Time for channel 2 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DTE2_A::VALUE2) + self.variant(Dte2::Value2) } } -#[doc = "Field `DCEN1` reader - Dead Time Enable for CC8yST1"] -pub type DCEN1_R = crate::BitReader; #[doc = "Dead Time Enable for CC8yST1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCEN1_A { +pub enum Dcen1 { #[doc = "0: Dead Time for CC8yST1 path is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for CC8yST1 path is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCEN1_A) -> Self { + fn from(variant: Dcen1) -> Self { variant as u8 != 0 } } -impl DCEN1_R { +#[doc = "Field `DCEN1` reader - Dead Time Enable for CC8yST1"] +pub type Dcen1R = crate::BitReader; +impl Dcen1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCEN1_A { + pub const fn variant(&self) -> Dcen1 { match self.bits { - false => DCEN1_A::VALUE1, - true => DCEN1_A::VALUE2, + false => Dcen1::Value1, + true => Dcen1::Value2, } } #[doc = "Dead Time for CC8yST1 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCEN1_A::VALUE1 + *self == Dcen1::Value1 } #[doc = "Dead Time for CC8yST1 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCEN1_A::VALUE2 + *self == Dcen1::Value2 } } #[doc = "Field `DCEN1` writer - Dead Time Enable for CC8yST1"] -pub type DCEN1_W<'a, REG> = crate::BitWriter<'a, REG, DCEN1_A>; -impl<'a, REG> DCEN1_W<'a, REG> +pub type Dcen1W<'a, REG> = crate::BitWriter<'a, REG, Dcen1>; +impl<'a, REG> Dcen1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for CC8yST1 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCEN1_A::VALUE1) + self.variant(Dcen1::Value1) } #[doc = "Dead Time for CC8yST1 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCEN1_A::VALUE2) + self.variant(Dcen1::Value2) } } -#[doc = "Field `DCEN2` reader - Dead Time Enable for inverted CC8yST1"] -pub type DCEN2_R = crate::BitReader; #[doc = "Dead Time Enable for inverted CC8yST1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCEN2_A { +pub enum Dcen2 { #[doc = "0: Dead Time for inverted CC8yST1 path is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for inverted CC8yST1 path is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCEN2_A) -> Self { + fn from(variant: Dcen2) -> Self { variant as u8 != 0 } } -impl DCEN2_R { +#[doc = "Field `DCEN2` reader - Dead Time Enable for inverted CC8yST1"] +pub type Dcen2R = crate::BitReader; +impl Dcen2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCEN2_A { + pub const fn variant(&self) -> Dcen2 { match self.bits { - false => DCEN2_A::VALUE1, - true => DCEN2_A::VALUE2, + false => Dcen2::Value1, + true => Dcen2::Value2, } } #[doc = "Dead Time for inverted CC8yST1 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCEN2_A::VALUE1 + *self == Dcen2::Value1 } #[doc = "Dead Time for inverted CC8yST1 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCEN2_A::VALUE2 + *self == Dcen2::Value2 } } #[doc = "Field `DCEN2` writer - Dead Time Enable for inverted CC8yST1"] -pub type DCEN2_W<'a, REG> = crate::BitWriter<'a, REG, DCEN2_A>; -impl<'a, REG> DCEN2_W<'a, REG> +pub type Dcen2W<'a, REG> = crate::BitWriter<'a, REG, Dcen2>; +impl<'a, REG> Dcen2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for inverted CC8yST1 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCEN2_A::VALUE1) + self.variant(Dcen2::Value1) } #[doc = "Dead Time for inverted CC8yST1 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCEN2_A::VALUE2) + self.variant(Dcen2::Value2) } } -#[doc = "Field `DCEN3` reader - Dead Time Enable for CC8yST2"] -pub type DCEN3_R = crate::BitReader; #[doc = "Dead Time Enable for CC8yST2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCEN3_A { +pub enum Dcen3 { #[doc = "0: Dead Time for CC8yST2 path is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for CC8yST2 path is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCEN3_A) -> Self { + fn from(variant: Dcen3) -> Self { variant as u8 != 0 } } -impl DCEN3_R { +#[doc = "Field `DCEN3` reader - Dead Time Enable for CC8yST2"] +pub type Dcen3R = crate::BitReader; +impl Dcen3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCEN3_A { + pub const fn variant(&self) -> Dcen3 { match self.bits { - false => DCEN3_A::VALUE1, - true => DCEN3_A::VALUE2, + false => Dcen3::Value1, + true => Dcen3::Value2, } } #[doc = "Dead Time for CC8yST2 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCEN3_A::VALUE1 + *self == Dcen3::Value1 } #[doc = "Dead Time for CC8yST2 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCEN3_A::VALUE2 + *self == Dcen3::Value2 } } #[doc = "Field `DCEN3` writer - Dead Time Enable for CC8yST2"] -pub type DCEN3_W<'a, REG> = crate::BitWriter<'a, REG, DCEN3_A>; -impl<'a, REG> DCEN3_W<'a, REG> +pub type Dcen3W<'a, REG> = crate::BitWriter<'a, REG, Dcen3>; +impl<'a, REG> Dcen3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for CC8yST2 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCEN3_A::VALUE1) + self.variant(Dcen3::Value1) } #[doc = "Dead Time for CC8yST2 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCEN3_A::VALUE2) + self.variant(Dcen3::Value2) } } -#[doc = "Field `DCEN4` reader - Dead Time Enable for inverted CC8yST2"] -pub type DCEN4_R = crate::BitReader; #[doc = "Dead Time Enable for inverted CC8yST2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCEN4_A { +pub enum Dcen4 { #[doc = "0: Dead Time for inverted CC8yST2 path is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time for inverted CC8yST2 path is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCEN4_A) -> Self { + fn from(variant: Dcen4) -> Self { variant as u8 != 0 } } -impl DCEN4_R { +#[doc = "Field `DCEN4` reader - Dead Time Enable for inverted CC8yST2"] +pub type Dcen4R = crate::BitReader; +impl Dcen4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCEN4_A { + pub const fn variant(&self) -> Dcen4 { match self.bits { - false => DCEN4_A::VALUE1, - true => DCEN4_A::VALUE2, + false => Dcen4::Value1, + true => Dcen4::Value2, } } #[doc = "Dead Time for inverted CC8yST2 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCEN4_A::VALUE1 + *self == Dcen4::Value1 } #[doc = "Dead Time for inverted CC8yST2 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCEN4_A::VALUE2 + *self == Dcen4::Value2 } } #[doc = "Field `DCEN4` writer - Dead Time Enable for inverted CC8yST2"] -pub type DCEN4_W<'a, REG> = crate::BitWriter<'a, REG, DCEN4_A>; -impl<'a, REG> DCEN4_W<'a, REG> +pub type Dcen4W<'a, REG> = crate::BitWriter<'a, REG, Dcen4>; +impl<'a, REG> Dcen4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for inverted CC8yST2 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCEN4_A::VALUE1) + self.variant(Dcen4::Value1) } #[doc = "Dead Time for inverted CC8yST2 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCEN4_A::VALUE2) + self.variant(Dcen4::Value2) } } -#[doc = "Field `DTCC` reader - Dead Time clock control"] -pub type DTCC_R = crate::FieldReader; #[doc = "Dead Time clock control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DTCC_A { +pub enum Dtcc { #[doc = "0: ftclk"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ftclk/2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: ftclk/4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: ftclk/8"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DTCC_A) -> Self { + fn from(variant: Dtcc) -> Self { variant as _ } } -impl crate::FieldSpec for DTCC_A { +impl crate::FieldSpec for Dtcc { type Ux = u8; } -impl DTCC_R { +#[doc = "Field `DTCC` reader - Dead Time clock control"] +pub type DtccR = crate::FieldReader; +impl DtccR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTCC_A { + pub const fn variant(&self) -> Dtcc { match self.bits { - 0 => DTCC_A::VALUE1, - 1 => DTCC_A::VALUE2, - 2 => DTCC_A::VALUE3, - 3 => DTCC_A::VALUE4, + 0 => Dtcc::Value1, + 1 => Dtcc::Value2, + 2 => Dtcc::Value3, + 3 => Dtcc::Value4, _ => unreachable!(), } } #[doc = "ftclk"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTCC_A::VALUE1 + *self == Dtcc::Value1 } #[doc = "ftclk/2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTCC_A::VALUE2 + *self == Dtcc::Value2 } #[doc = "ftclk/4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DTCC_A::VALUE3 + *self == Dtcc::Value3 } #[doc = "ftclk/8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DTCC_A::VALUE4 + *self == Dtcc::Value4 } } #[doc = "Field `DTCC` writer - Dead Time clock control"] -pub type DTCC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DTCC_A>; -impl<'a, REG> DTCC_W<'a, REG> +pub type DtccW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Dtcc>; +impl<'a, REG> DtccW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -387,128 +387,119 @@ where #[doc = "ftclk"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DTCC_A::VALUE1) + self.variant(Dtcc::Value1) } #[doc = "ftclk/2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DTCC_A::VALUE2) + self.variant(Dtcc::Value2) } #[doc = "ftclk/4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DTCC_A::VALUE3) + self.variant(Dtcc::Value3) } #[doc = "ftclk/8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DTCC_A::VALUE4) + self.variant(Dtcc::Value4) } } impl R { #[doc = "Bit 0 - Dead Time Enable for Channel 1"] #[inline(always)] - pub fn dte1(&self) -> DTE1_R { - DTE1_R::new((self.bits & 1) != 0) + pub fn dte1(&self) -> Dte1R { + Dte1R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Dead Time Enable for Channel 2"] #[inline(always)] - pub fn dte2(&self) -> DTE2_R { - DTE2_R::new(((self.bits >> 1) & 1) != 0) + pub fn dte2(&self) -> Dte2R { + Dte2R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Dead Time Enable for CC8yST1"] #[inline(always)] - pub fn dcen1(&self) -> DCEN1_R { - DCEN1_R::new(((self.bits >> 2) & 1) != 0) + pub fn dcen1(&self) -> Dcen1R { + Dcen1R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"] #[inline(always)] - pub fn dcen2(&self) -> DCEN2_R { - DCEN2_R::new(((self.bits >> 3) & 1) != 0) + pub fn dcen2(&self) -> Dcen2R { + Dcen2R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Dead Time Enable for CC8yST2"] #[inline(always)] - pub fn dcen3(&self) -> DCEN3_R { - DCEN3_R::new(((self.bits >> 4) & 1) != 0) + pub fn dcen3(&self) -> Dcen3R { + Dcen3R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"] #[inline(always)] - pub fn dcen4(&self) -> DCEN4_R { - DCEN4_R::new(((self.bits >> 5) & 1) != 0) + pub fn dcen4(&self) -> Dcen4R { + Dcen4R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Dead Time clock control"] #[inline(always)] - pub fn dtcc(&self) -> DTCC_R { - DTCC_R::new(((self.bits >> 6) & 3) as u8) + pub fn dtcc(&self) -> DtccR { + DtccR::new(((self.bits >> 6) & 3) as u8) } } impl W { #[doc = "Bit 0 - Dead Time Enable for Channel 1"] #[inline(always)] #[must_use] - pub fn dte1(&mut self) -> DTE1_W { - DTE1_W::new(self, 0) + pub fn dte1(&mut self) -> Dte1W { + Dte1W::new(self, 0) } #[doc = "Bit 1 - Dead Time Enable for Channel 2"] #[inline(always)] #[must_use] - pub fn dte2(&mut self) -> DTE2_W { - DTE2_W::new(self, 1) + pub fn dte2(&mut self) -> Dte2W { + Dte2W::new(self, 1) } #[doc = "Bit 2 - Dead Time Enable for CC8yST1"] #[inline(always)] #[must_use] - pub fn dcen1(&mut self) -> DCEN1_W { - DCEN1_W::new(self, 2) + pub fn dcen1(&mut self) -> Dcen1W { + Dcen1W::new(self, 2) } #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"] #[inline(always)] #[must_use] - pub fn dcen2(&mut self) -> DCEN2_W { - DCEN2_W::new(self, 3) + pub fn dcen2(&mut self) -> Dcen2W { + Dcen2W::new(self, 3) } #[doc = "Bit 4 - Dead Time Enable for CC8yST2"] #[inline(always)] #[must_use] - pub fn dcen3(&mut self) -> DCEN3_W { - DCEN3_W::new(self, 4) + pub fn dcen3(&mut self) -> Dcen3W { + Dcen3W::new(self, 4) } #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"] #[inline(always)] #[must_use] - pub fn dcen4(&mut self) -> DCEN4_W { - DCEN4_W::new(self, 5) + pub fn dcen4(&mut self) -> Dcen4W { + Dcen4W::new(self, 5) } #[doc = "Bits 6:7 - Dead Time clock control"] #[inline(always)] #[must_use] - pub fn dtcc(&mut self) -> DTCC_W { - DTCC_W::new(self, 6) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dtcc(&mut self) -> DtccW { + DtccW::new(self, 6) } } #[doc = "Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DTC_SPEC; -impl crate::RegisterSpec for DTC_SPEC { +pub struct DtcSpec; +impl crate::RegisterSpec for DtcSpec { type Ux = u32; } #[doc = "`read()` method returns [`dtc::R`](R) reader structure"] -impl crate::Readable for DTC_SPEC {} +impl crate::Readable for DtcSpec {} #[doc = "`write(|w| ..)` method takes [`dtc::W`](W) writer structure"] -impl crate::Writable for DTC_SPEC { +impl crate::Writable for DtcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTC to value 0"] -impl crate::Resettable for DTC_SPEC { +impl crate::Resettable for DtcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ecrd0.rs b/src/ccu80_cc80/ecrd0.rs index 0883ed7d..55b91e1d 100644 --- a/src/ccu80_cc80/ecrd0.rs +++ b/src/ccu80_cc80/ecrd0.rs @@ -1,235 +1,235 @@ #[doc = "Register `ECRD0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CAPV_R = crate::FieldReader; +pub type CapvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `SPTR` reader - Slice pointer"] -pub type SPTR_R = crate::FieldReader; +pub type FpcvR = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SPTR_A { +pub enum Sptr { #[doc = "0: CC80"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC81"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC82"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC83"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SPTR_A) -> Self { + fn from(variant: Sptr) -> Self { variant as _ } } -impl crate::FieldSpec for SPTR_A { +impl crate::FieldSpec for Sptr { type Ux = u8; } -impl SPTR_R { +#[doc = "Field `SPTR` reader - Slice pointer"] +pub type SptrR = crate::FieldReader; +impl SptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SPTR_A { + pub const fn variant(&self) -> Sptr { match self.bits { - 0 => SPTR_A::VALUE1, - 1 => SPTR_A::VALUE2, - 2 => SPTR_A::VALUE3, - 3 => SPTR_A::VALUE4, + 0 => Sptr::Value1, + 1 => Sptr::Value2, + 2 => Sptr::Value3, + 3 => Sptr::Value4, _ => unreachable!(), } } #[doc = "CC80"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SPTR_A::VALUE1 + *self == Sptr::Value1 } #[doc = "CC81"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SPTR_A::VALUE2 + *self == Sptr::Value2 } #[doc = "CC82"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SPTR_A::VALUE3 + *self == Sptr::Value3 } #[doc = "CC83"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SPTR_A::VALUE4 + *self == Sptr::Value4 } } -#[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VPTR_R = crate::FieldReader; #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VPTR_A { +pub enum Vptr { #[doc = "0: Capture register 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture register 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Capture register 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Capture register 3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VPTR_A) -> Self { + fn from(variant: Vptr) -> Self { variant as _ } } -impl crate::FieldSpec for VPTR_A { +impl crate::FieldSpec for Vptr { type Ux = u8; } -impl VPTR_R { +#[doc = "Field `VPTR` reader - Capture register pointer"] +pub type VptrR = crate::FieldReader; +impl VptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VPTR_A { + pub const fn variant(&self) -> Vptr { match self.bits { - 0 => VPTR_A::VALUE1, - 1 => VPTR_A::VALUE2, - 2 => VPTR_A::VALUE3, - 3 => VPTR_A::VALUE4, + 0 => Vptr::Value1, + 1 => Vptr::Value2, + 2 => Vptr::Value3, + 3 => Vptr::Value4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VPTR_A::VALUE1 + *self == Vptr::Value1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VPTR_A::VALUE2 + *self == Vptr::Value2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == VPTR_A::VALUE3 + *self == Vptr::Value3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == VPTR_A::VALUE4 + *self == Vptr::Value4 } } -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value has been captured into this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } -#[doc = "Field `LCV` reader - Lost Capture Value"] -pub type LCV_R = crate::BitReader; #[doc = "Lost Capture Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCV_A { +pub enum Lcv { #[doc = "0: No capture was lost"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A capture was lost"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCV_A) -> Self { + fn from(variant: Lcv) -> Self { variant as u8 != 0 } } -impl LCV_R { +#[doc = "Field `LCV` reader - Lost Capture Value"] +pub type LcvR = crate::BitReader; +impl LcvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LCV_A { + pub const fn variant(&self) -> Lcv { match self.bits { - false => LCV_A::VALUE1, - true => LCV_A::VALUE2, + false => Lcv::Value1, + true => Lcv::Value2, } } #[doc = "No capture was lost"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LCV_A::VALUE1 + *self == Lcv::Value1 } #[doc = "A capture was lost"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LCV_A::VALUE2 + *self == Lcv::Value2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CAPV_R { - CAPV_R::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CapvR { + CapvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SPTR_R { - SPTR_R::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SptrR { + SptrR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VPTR_R { - VPTR_R::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VptrR { + VptrR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Lost Capture Value"] #[inline(always)] - pub fn lcv(&self) -> LCV_R { - LCV_R::new(((self.bits >> 25) & 1) != 0) + pub fn lcv(&self) -> LcvR { + LcvR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "Extended Read Back 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ECRD0_SPEC; -impl crate::RegisterSpec for ECRD0_SPEC { +pub struct Ecrd0Spec; +impl crate::RegisterSpec for Ecrd0Spec { type Ux = u32; } #[doc = "`read()` method returns [`ecrd0::R`](R) reader structure"] -impl crate::Readable for ECRD0_SPEC {} +impl crate::Readable for Ecrd0Spec {} #[doc = "`reset()` method sets ECRD0 to value 0"] -impl crate::Resettable for ECRD0_SPEC { +impl crate::Resettable for Ecrd0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ecrd1.rs b/src/ccu80_cc80/ecrd1.rs index 97b6fd0a..2b9db502 100644 --- a/src/ccu80_cc80/ecrd1.rs +++ b/src/ccu80_cc80/ecrd1.rs @@ -1,235 +1,235 @@ #[doc = "Register `ECRD1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CAPV_R = crate::FieldReader; +pub type CapvR = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FPCV_R = crate::FieldReader; -#[doc = "Field `SPTR` reader - Slice pointer"] -pub type SPTR_R = crate::FieldReader; +pub type FpcvR = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SPTR_A { +pub enum Sptr { #[doc = "0: CC80"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC81"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC82"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC83"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SPTR_A) -> Self { + fn from(variant: Sptr) -> Self { variant as _ } } -impl crate::FieldSpec for SPTR_A { +impl crate::FieldSpec for Sptr { type Ux = u8; } -impl SPTR_R { +#[doc = "Field `SPTR` reader - Slice pointer"] +pub type SptrR = crate::FieldReader; +impl SptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SPTR_A { + pub const fn variant(&self) -> Sptr { match self.bits { - 0 => SPTR_A::VALUE1, - 1 => SPTR_A::VALUE2, - 2 => SPTR_A::VALUE3, - 3 => SPTR_A::VALUE4, + 0 => Sptr::Value1, + 1 => Sptr::Value2, + 2 => Sptr::Value3, + 3 => Sptr::Value4, _ => unreachable!(), } } #[doc = "CC80"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SPTR_A::VALUE1 + *self == Sptr::Value1 } #[doc = "CC81"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SPTR_A::VALUE2 + *self == Sptr::Value2 } #[doc = "CC82"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SPTR_A::VALUE3 + *self == Sptr::Value3 } #[doc = "CC83"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SPTR_A::VALUE4 + *self == Sptr::Value4 } } -#[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VPTR_R = crate::FieldReader; #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VPTR_A { +pub enum Vptr { #[doc = "0: Capture register 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture register 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Capture register 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Capture register 3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VPTR_A) -> Self { + fn from(variant: Vptr) -> Self { variant as _ } } -impl crate::FieldSpec for VPTR_A { +impl crate::FieldSpec for Vptr { type Ux = u8; } -impl VPTR_R { +#[doc = "Field `VPTR` reader - Capture register pointer"] +pub type VptrR = crate::FieldReader; +impl VptrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VPTR_A { + pub const fn variant(&self) -> Vptr { match self.bits { - 0 => VPTR_A::VALUE1, - 1 => VPTR_A::VALUE2, - 2 => VPTR_A::VALUE3, - 3 => VPTR_A::VALUE4, + 0 => Vptr::Value1, + 1 => Vptr::Value2, + 2 => Vptr::Value3, + 3 => Vptr::Value4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VPTR_A::VALUE1 + *self == Vptr::Value1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VPTR_A::VALUE2 + *self == Vptr::Value2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == VPTR_A::VALUE3 + *self == Vptr::Value3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == VPTR_A::VALUE4 + *self == Vptr::Value4 } } -#[doc = "Field `FFL` reader - Full Flag"] -pub type FFL_R = crate::BitReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFL_A { +pub enum Ffl { #[doc = "0: No new value was captured into this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new value has been captured into this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFL_A) -> Self { + fn from(variant: Ffl) -> Self { variant as u8 != 0 } } -impl FFL_R { +#[doc = "Field `FFL` reader - Full Flag"] +pub type FflR = crate::BitReader; +impl FflR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFL_A { + pub const fn variant(&self) -> Ffl { match self.bits { - false => FFL_A::VALUE1, - true => FFL_A::VALUE2, + false => Ffl::Value1, + true => Ffl::Value2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFL_A::VALUE1 + *self == Ffl::Value1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFL_A::VALUE2 + *self == Ffl::Value2 } } -#[doc = "Field `LCV` reader - Lost Capture Value"] -pub type LCV_R = crate::BitReader; #[doc = "Lost Capture Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCV_A { +pub enum Lcv { #[doc = "0: No capture was lost"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A capture was lost"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCV_A) -> Self { + fn from(variant: Lcv) -> Self { variant as u8 != 0 } } -impl LCV_R { +#[doc = "Field `LCV` reader - Lost Capture Value"] +pub type LcvR = crate::BitReader; +impl LcvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LCV_A { + pub const fn variant(&self) -> Lcv { match self.bits { - false => LCV_A::VALUE1, - true => LCV_A::VALUE2, + false => Lcv::Value1, + true => Lcv::Value2, } } #[doc = "No capture was lost"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LCV_A::VALUE1 + *self == Lcv::Value1 } #[doc = "A capture was lost"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LCV_A::VALUE2 + *self == Lcv::Value2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CAPV_R { - CAPV_R::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CapvR { + CapvR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FPCV_R { - FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FpcvR { + FpcvR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SPTR_R { - SPTR_R::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SptrR { + SptrR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VPTR_R { - VPTR_R::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VptrR { + VptrR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FFL_R { - FFL_R::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FflR { + FflR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Lost Capture Value"] #[inline(always)] - pub fn lcv(&self) -> LCV_R { - LCV_R::new(((self.bits >> 25) & 1) != 0) + pub fn lcv(&self) -> LcvR { + LcvR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "Extended Read Back 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd1::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ECRD1_SPEC; -impl crate::RegisterSpec for ECRD1_SPEC { +pub struct Ecrd1Spec; +impl crate::RegisterSpec for Ecrd1Spec { type Ux = u32; } #[doc = "`read()` method returns [`ecrd1::R`](R) reader structure"] -impl crate::Readable for ECRD1_SPEC {} +impl crate::Readable for Ecrd1Spec {} #[doc = "`reset()` method sets ECRD1 to value 0"] -impl crate::Resettable for ECRD1_SPEC { +impl crate::Resettable for Ecrd1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/fpc.rs b/src/ccu80_cc80/fpc.rs index 28d48e97..441df5b3 100644 --- a/src/ccu80_cc80/fpc.rs +++ b/src/ccu80_cc80/fpc.rs @@ -1,56 +1,47 @@ #[doc = "Register `FPC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Compare Value"] -pub type PCMP_R = crate::FieldReader; +pub type PcmpR = crate::FieldReader; #[doc = "Field `PVAL` reader - Actual Prescaler Value"] -pub type PVAL_R = crate::FieldReader; +pub type PvalR = crate::FieldReader; #[doc = "Field `PVAL` writer - Actual Prescaler Value"] -pub type PVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PCMP_R { - PCMP_R::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PcmpR { + PcmpR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - pub fn pval(&self) -> PVAL_R { - PVAL_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pval(&self) -> PvalR { + PvalR::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] #[must_use] - pub fn pval(&mut self) -> PVAL_W { - PVAL_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pval(&mut self) -> PvalW { + PvalW::new(self, 8) } } #[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPC_SPEC; -impl crate::RegisterSpec for FPC_SPEC { +pub struct FpcSpec; +impl crate::RegisterSpec for FpcSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpc::R`](R) reader structure"] -impl crate::Readable for FPC_SPEC {} +impl crate::Readable for FpcSpec {} #[doc = "`write(|w| ..)` method takes [`fpc::W`](W) writer structure"] -impl crate::Writable for FPC_SPEC { +impl crate::Writable for FpcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPC to value 0"] -impl crate::Resettable for FPC_SPEC { +impl crate::Resettable for FpcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/fpcs.rs b/src/ccu80_cc80/fpcs.rs index 127bce15..821adc52 100644 --- a/src/ccu80_cc80/fpcs.rs +++ b/src/ccu80_cc80/fpcs.rs @@ -1,49 +1,40 @@ #[doc = "Register `FPCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Shadow Compare Value"] -pub type PCMP_R = crate::FieldReader; +pub type PcmpR = crate::FieldReader; #[doc = "Field `PCMP` writer - Floating Prescaler Shadow Compare Value"] -pub type PCMP_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PcmpW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PCMP_R { - PCMP_R::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PcmpR { + PcmpR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn pcmp(&mut self) -> PCMP_W { - PCMP_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pcmp(&mut self) -> PcmpW { + PcmpW::new(self, 0) } } #[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPCS_SPEC; -impl crate::RegisterSpec for FPCS_SPEC { +pub struct FpcsSpec; +impl crate::RegisterSpec for FpcsSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpcs::R`](R) reader structure"] -impl crate::Readable for FPCS_SPEC {} +impl crate::Readable for FpcsSpec {} #[doc = "`write(|w| ..)` method takes [`fpcs::W`](W) writer structure"] -impl crate::Writable for FPCS_SPEC { +impl crate::Writable for FpcsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCS to value 0"] -impl crate::Resettable for FPCS_SPEC { +impl crate::Resettable for FpcsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ins.rs b/src/ccu80_cc80/ins.rs index ca0f6379..fc17a7c1 100644 --- a/src/ccu80_cc80/ins.rs +++ b/src/ccu80_cc80/ins.rs @@ -1,163 +1,163 @@ #[doc = "Register `INS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INS` writer"] -pub type W = crate::W; -#[doc = "Field `EV0IS` reader - Event 0 signal selection"] -pub type EV0IS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Event 0 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV0IS_A { +pub enum Ev0is { #[doc = "0: CCU8x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU8x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU8x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU8x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU8x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU8x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU8x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU8x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU8x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU8x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU8x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU8x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU8x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU8x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU8x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU8x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV0IS_A) -> Self { + fn from(variant: Ev0is) -> Self { variant as _ } } -impl crate::FieldSpec for EV0IS_A { +impl crate::FieldSpec for Ev0is { type Ux = u8; } -impl EV0IS_R { +#[doc = "Field `EV0IS` reader - Event 0 signal selection"] +pub type Ev0isR = crate::FieldReader; +impl Ev0isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0IS_A { + pub const fn variant(&self) -> Ev0is { match self.bits { - 0 => EV0IS_A::VALUE1, - 1 => EV0IS_A::VALUE2, - 2 => EV0IS_A::VALUE3, - 3 => EV0IS_A::VALUE4, - 4 => EV0IS_A::VALUE5, - 5 => EV0IS_A::VALUE6, - 6 => EV0IS_A::VALUE7, - 7 => EV0IS_A::VALUE8, - 8 => EV0IS_A::VALUE9, - 9 => EV0IS_A::VALUE10, - 10 => EV0IS_A::VALUE11, - 11 => EV0IS_A::VALUE12, - 12 => EV0IS_A::VALUE13, - 13 => EV0IS_A::VALUE14, - 14 => EV0IS_A::VALUE15, - 15 => EV0IS_A::VALUE16, + 0 => Ev0is::Value1, + 1 => Ev0is::Value2, + 2 => Ev0is::Value3, + 3 => Ev0is::Value4, + 4 => Ev0is::Value5, + 5 => Ev0is::Value6, + 6 => Ev0is::Value7, + 7 => Ev0is::Value8, + 8 => Ev0is::Value9, + 9 => Ev0is::Value10, + 10 => Ev0is::Value11, + 11 => Ev0is::Value12, + 12 => Ev0is::Value13, + 13 => Ev0is::Value14, + 14 => Ev0is::Value15, + 15 => Ev0is::Value16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0IS_A::VALUE1 + *self == Ev0is::Value1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0IS_A::VALUE2 + *self == Ev0is::Value2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV0IS_A::VALUE3 + *self == Ev0is::Value3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV0IS_A::VALUE4 + *self == Ev0is::Value4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV0IS_A::VALUE5 + *self == Ev0is::Value5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV0IS_A::VALUE6 + *self == Ev0is::Value6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV0IS_A::VALUE7 + *self == Ev0is::Value7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV0IS_A::VALUE8 + *self == Ev0is::Value8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV0IS_A::VALUE9 + *self == Ev0is::Value9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV0IS_A::VALUE10 + *self == Ev0is::Value10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV0IS_A::VALUE11 + *self == Ev0is::Value11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV0IS_A::VALUE12 + *self == Ev0is::Value12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV0IS_A::VALUE13 + *self == Ev0is::Value13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV0IS_A::VALUE14 + *self == Ev0is::Value14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV0IS_A::VALUE15 + *self == Ev0is::Value15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV0IS_A::VALUE16 + *self == Ev0is::Value16 } } #[doc = "Field `EV0IS` writer - Event 0 signal selection"] -pub type EV0IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV0IS_A>; -impl<'a, REG> EV0IS_W<'a, REG> +pub type Ev0isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev0is>; +impl<'a, REG> Ev0isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -165,240 +165,240 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE1) + self.variant(Ev0is::Value1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE2) + self.variant(Ev0is::Value2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE3) + self.variant(Ev0is::Value3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE4) + self.variant(Ev0is::Value4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE5) + self.variant(Ev0is::Value5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE6) + self.variant(Ev0is::Value6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE7) + self.variant(Ev0is::Value7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE8) + self.variant(Ev0is::Value8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE9) + self.variant(Ev0is::Value9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE10) + self.variant(Ev0is::Value10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE11) + self.variant(Ev0is::Value11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE12) + self.variant(Ev0is::Value12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE13) + self.variant(Ev0is::Value13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE14) + self.variant(Ev0is::Value14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE15) + self.variant(Ev0is::Value15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV0IS_A::VALUE16) + self.variant(Ev0is::Value16) } } -#[doc = "Field `EV1IS` reader - Event 1 signal selection"] -pub type EV1IS_R = crate::FieldReader; #[doc = "Event 1 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV1IS_A { +pub enum Ev1is { #[doc = "0: CCU8x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU8x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU8x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU8x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU8x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU8x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU8x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU8x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU8x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU8x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU8x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU8x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU8x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU8x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU8x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU8x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV1IS_A) -> Self { + fn from(variant: Ev1is) -> Self { variant as _ } } -impl crate::FieldSpec for EV1IS_A { +impl crate::FieldSpec for Ev1is { type Ux = u8; } -impl EV1IS_R { +#[doc = "Field `EV1IS` reader - Event 1 signal selection"] +pub type Ev1isR = crate::FieldReader; +impl Ev1isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1IS_A { + pub const fn variant(&self) -> Ev1is { match self.bits { - 0 => EV1IS_A::VALUE1, - 1 => EV1IS_A::VALUE2, - 2 => EV1IS_A::VALUE3, - 3 => EV1IS_A::VALUE4, - 4 => EV1IS_A::VALUE5, - 5 => EV1IS_A::VALUE6, - 6 => EV1IS_A::VALUE7, - 7 => EV1IS_A::VALUE8, - 8 => EV1IS_A::VALUE9, - 9 => EV1IS_A::VALUE10, - 10 => EV1IS_A::VALUE11, - 11 => EV1IS_A::VALUE12, - 12 => EV1IS_A::VALUE13, - 13 => EV1IS_A::VALUE14, - 14 => EV1IS_A::VALUE15, - 15 => EV1IS_A::VALUE16, + 0 => Ev1is::Value1, + 1 => Ev1is::Value2, + 2 => Ev1is::Value3, + 3 => Ev1is::Value4, + 4 => Ev1is::Value5, + 5 => Ev1is::Value6, + 6 => Ev1is::Value7, + 7 => Ev1is::Value8, + 8 => Ev1is::Value9, + 9 => Ev1is::Value10, + 10 => Ev1is::Value11, + 11 => Ev1is::Value12, + 12 => Ev1is::Value13, + 13 => Ev1is::Value14, + 14 => Ev1is::Value15, + 15 => Ev1is::Value16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1IS_A::VALUE1 + *self == Ev1is::Value1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1IS_A::VALUE2 + *self == Ev1is::Value2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV1IS_A::VALUE3 + *self == Ev1is::Value3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV1IS_A::VALUE4 + *self == Ev1is::Value4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV1IS_A::VALUE5 + *self == Ev1is::Value5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV1IS_A::VALUE6 + *self == Ev1is::Value6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV1IS_A::VALUE7 + *self == Ev1is::Value7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV1IS_A::VALUE8 + *self == Ev1is::Value8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV1IS_A::VALUE9 + *self == Ev1is::Value9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV1IS_A::VALUE10 + *self == Ev1is::Value10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV1IS_A::VALUE11 + *self == Ev1is::Value11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV1IS_A::VALUE12 + *self == Ev1is::Value12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV1IS_A::VALUE13 + *self == Ev1is::Value13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV1IS_A::VALUE14 + *self == Ev1is::Value14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV1IS_A::VALUE15 + *self == Ev1is::Value15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV1IS_A::VALUE16 + *self == Ev1is::Value16 } } #[doc = "Field `EV1IS` writer - Event 1 signal selection"] -pub type EV1IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV1IS_A>; -impl<'a, REG> EV1IS_W<'a, REG> +pub type Ev1isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev1is>; +impl<'a, REG> Ev1isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -406,240 +406,240 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE1) + self.variant(Ev1is::Value1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE2) + self.variant(Ev1is::Value2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE3) + self.variant(Ev1is::Value3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE4) + self.variant(Ev1is::Value4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE5) + self.variant(Ev1is::Value5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE6) + self.variant(Ev1is::Value6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE7) + self.variant(Ev1is::Value7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE8) + self.variant(Ev1is::Value8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE9) + self.variant(Ev1is::Value9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE10) + self.variant(Ev1is::Value10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE11) + self.variant(Ev1is::Value11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE12) + self.variant(Ev1is::Value12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE13) + self.variant(Ev1is::Value13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE14) + self.variant(Ev1is::Value14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE15) + self.variant(Ev1is::Value15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV1IS_A::VALUE16) + self.variant(Ev1is::Value16) } } -#[doc = "Field `EV2IS` reader - Event 2 signal selection"] -pub type EV2IS_R = crate::FieldReader; #[doc = "Event 2 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV2IS_A { +pub enum Ev2is { #[doc = "0: CCU8x.INyA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CCU8x.INyB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CCU8x.INyC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CCU8x.INyD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: CCU8x.INyE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: CCU8x.INyF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: CCU8x.INyG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: CCU8x.INyH"] - VALUE8 = 7, + Value8 = 7, #[doc = "8: CCU8x.INyI"] - VALUE9 = 8, + Value9 = 8, #[doc = "9: CCU8x.INyJ"] - VALUE10 = 9, + Value10 = 9, #[doc = "10: CCU8x.INyK"] - VALUE11 = 10, + Value11 = 10, #[doc = "11: CCU8x.INyL"] - VALUE12 = 11, + Value12 = 11, #[doc = "12: CCU8x.INyM"] - VALUE13 = 12, + Value13 = 12, #[doc = "13: CCU8x.INyN"] - VALUE14 = 13, + Value14 = 13, #[doc = "14: CCU8x.INyO"] - VALUE15 = 14, + Value15 = 14, #[doc = "15: CCU8x.INyP"] - VALUE16 = 15, + Value16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV2IS_A) -> Self { + fn from(variant: Ev2is) -> Self { variant as _ } } -impl crate::FieldSpec for EV2IS_A { +impl crate::FieldSpec for Ev2is { type Ux = u8; } -impl EV2IS_R { +#[doc = "Field `EV2IS` reader - Event 2 signal selection"] +pub type Ev2isR = crate::FieldReader; +impl Ev2isR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2IS_A { + pub const fn variant(&self) -> Ev2is { match self.bits { - 0 => EV2IS_A::VALUE1, - 1 => EV2IS_A::VALUE2, - 2 => EV2IS_A::VALUE3, - 3 => EV2IS_A::VALUE4, - 4 => EV2IS_A::VALUE5, - 5 => EV2IS_A::VALUE6, - 6 => EV2IS_A::VALUE7, - 7 => EV2IS_A::VALUE8, - 8 => EV2IS_A::VALUE9, - 9 => EV2IS_A::VALUE10, - 10 => EV2IS_A::VALUE11, - 11 => EV2IS_A::VALUE12, - 12 => EV2IS_A::VALUE13, - 13 => EV2IS_A::VALUE14, - 14 => EV2IS_A::VALUE15, - 15 => EV2IS_A::VALUE16, + 0 => Ev2is::Value1, + 1 => Ev2is::Value2, + 2 => Ev2is::Value3, + 3 => Ev2is::Value4, + 4 => Ev2is::Value5, + 5 => Ev2is::Value6, + 6 => Ev2is::Value7, + 7 => Ev2is::Value8, + 8 => Ev2is::Value9, + 9 => Ev2is::Value10, + 10 => Ev2is::Value11, + 11 => Ev2is::Value12, + 12 => Ev2is::Value13, + 13 => Ev2is::Value14, + 14 => Ev2is::Value15, + 15 => Ev2is::Value16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2IS_A::VALUE1 + *self == Ev2is::Value1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2IS_A::VALUE2 + *self == Ev2is::Value2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV2IS_A::VALUE3 + *self == Ev2is::Value3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV2IS_A::VALUE4 + *self == Ev2is::Value4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == EV2IS_A::VALUE5 + *self == Ev2is::Value5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == EV2IS_A::VALUE6 + *self == Ev2is::Value6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == EV2IS_A::VALUE7 + *self == Ev2is::Value7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == EV2IS_A::VALUE8 + *self == Ev2is::Value8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == EV2IS_A::VALUE9 + *self == Ev2is::Value9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == EV2IS_A::VALUE10 + *self == Ev2is::Value10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == EV2IS_A::VALUE11 + *self == Ev2is::Value11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == EV2IS_A::VALUE12 + *self == Ev2is::Value12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == EV2IS_A::VALUE13 + *self == Ev2is::Value13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == EV2IS_A::VALUE14 + *self == Ev2is::Value14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == EV2IS_A::VALUE15 + *self == Ev2is::Value15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == EV2IS_A::VALUE16 + *self == Ev2is::Value16 } } #[doc = "Field `EV2IS` writer - Event 2 signal selection"] -pub type EV2IS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, EV2IS_A>; -impl<'a, REG> EV2IS_W<'a, REG> +pub type Ev2isW<'a, REG> = crate::FieldWriterSafe<'a, REG, 4, Ev2is>; +impl<'a, REG> Ev2isW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -647,144 +647,144 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE1) + self.variant(Ev2is::Value1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE2) + self.variant(Ev2is::Value2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE3) + self.variant(Ev2is::Value3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE4) + self.variant(Ev2is::Value4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE5) + self.variant(Ev2is::Value5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE6) + self.variant(Ev2is::Value6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE7) + self.variant(Ev2is::Value7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE8) + self.variant(Ev2is::Value8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE9) + self.variant(Ev2is::Value9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE10) + self.variant(Ev2is::Value10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE11) + self.variant(Ev2is::Value11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE12) + self.variant(Ev2is::Value12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE13) + self.variant(Ev2is::Value13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE14) + self.variant(Ev2is::Value14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE15) + self.variant(Ev2is::Value15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(EV2IS_A::VALUE16) + self.variant(Ev2is::Value16) } } -#[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] -pub type EV0EM_R = crate::FieldReader; #[doc = "Event 0 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV0EM_A { +pub enum Ev0em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV0EM_A) -> Self { + fn from(variant: Ev0em) -> Self { variant as _ } } -impl crate::FieldSpec for EV0EM_A { +impl crate::FieldSpec for Ev0em { type Ux = u8; } -impl EV0EM_R { +#[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] +pub type Ev0emR = crate::FieldReader; +impl Ev0emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0EM_A { + pub const fn variant(&self) -> Ev0em { match self.bits { - 0 => EV0EM_A::VALUE1, - 1 => EV0EM_A::VALUE2, - 2 => EV0EM_A::VALUE3, - 3 => EV0EM_A::VALUE4, + 0 => Ev0em::Value1, + 1 => Ev0em::Value2, + 2 => Ev0em::Value3, + 3 => Ev0em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0EM_A::VALUE1 + *self == Ev0em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0EM_A::VALUE2 + *self == Ev0em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV0EM_A::VALUE3 + *self == Ev0em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV0EM_A::VALUE4 + *self == Ev0em::Value4 } } #[doc = "Field `EV0EM` writer - Event 0 Edge Selection"] -pub type EV0EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV0EM_A>; -impl<'a, REG> EV0EM_W<'a, REG> +pub type Ev0emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev0em>; +impl<'a, REG> Ev0emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,84 +792,84 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE1) + self.variant(Ev0em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE2) + self.variant(Ev0em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE3) + self.variant(Ev0em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV0EM_A::VALUE4) + self.variant(Ev0em::Value4) } } -#[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] -pub type EV1EM_R = crate::FieldReader; #[doc = "Event 1 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV1EM_A { +pub enum Ev1em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV1EM_A) -> Self { + fn from(variant: Ev1em) -> Self { variant as _ } } -impl crate::FieldSpec for EV1EM_A { +impl crate::FieldSpec for Ev1em { type Ux = u8; } -impl EV1EM_R { +#[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] +pub type Ev1emR = crate::FieldReader; +impl Ev1emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1EM_A { + pub const fn variant(&self) -> Ev1em { match self.bits { - 0 => EV1EM_A::VALUE1, - 1 => EV1EM_A::VALUE2, - 2 => EV1EM_A::VALUE3, - 3 => EV1EM_A::VALUE4, + 0 => Ev1em::Value1, + 1 => Ev1em::Value2, + 2 => Ev1em::Value3, + 3 => Ev1em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1EM_A::VALUE1 + *self == Ev1em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1EM_A::VALUE2 + *self == Ev1em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV1EM_A::VALUE3 + *self == Ev1em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV1EM_A::VALUE4 + *self == Ev1em::Value4 } } #[doc = "Field `EV1EM` writer - Event 1 Edge Selection"] -pub type EV1EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV1EM_A>; -impl<'a, REG> EV1EM_W<'a, REG> +pub type Ev1emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev1em>; +impl<'a, REG> Ev1emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -877,84 +877,84 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE1) + self.variant(Ev1em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE2) + self.variant(Ev1em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE3) + self.variant(Ev1em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV1EM_A::VALUE4) + self.variant(Ev1em::Value4) } } -#[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] -pub type EV2EM_R = crate::FieldReader; #[doc = "Event 2 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EV2EM_A { +pub enum Ev2em { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal active on rising edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Signal active on falling edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal active on both edges"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EV2EM_A) -> Self { + fn from(variant: Ev2em) -> Self { variant as _ } } -impl crate::FieldSpec for EV2EM_A { +impl crate::FieldSpec for Ev2em { type Ux = u8; } -impl EV2EM_R { +#[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] +pub type Ev2emR = crate::FieldReader; +impl Ev2emR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2EM_A { + pub const fn variant(&self) -> Ev2em { match self.bits { - 0 => EV2EM_A::VALUE1, - 1 => EV2EM_A::VALUE2, - 2 => EV2EM_A::VALUE3, - 3 => EV2EM_A::VALUE4, + 0 => Ev2em::Value1, + 1 => Ev2em::Value2, + 2 => Ev2em::Value3, + 3 => Ev2em::Value4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2EM_A::VALUE1 + *self == Ev2em::Value1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2EM_A::VALUE2 + *self == Ev2em::Value2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EV2EM_A::VALUE3 + *self == Ev2em::Value3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EV2EM_A::VALUE4 + *self == Ev2em::Value4 } } #[doc = "Field `EV2EM` writer - Event 2 Edge Selection"] -pub type EV2EM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EV2EM_A>; -impl<'a, REG> EV2EM_W<'a, REG> +pub type Ev2emW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ev2em>; +impl<'a, REG> Ev2emW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -962,243 +962,243 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE1) + self.variant(Ev2em::Value1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE2) + self.variant(Ev2em::Value2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE3) + self.variant(Ev2em::Value3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EV2EM_A::VALUE4) + self.variant(Ev2em::Value4) } } -#[doc = "Field `EV0LM` reader - Event 0 Level Selection"] -pub type EV0LM_R = crate::BitReader; #[doc = "Event 0 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV0LM_A { +pub enum Ev0lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV0LM_A) -> Self { + fn from(variant: Ev0lm) -> Self { variant as u8 != 0 } } -impl EV0LM_R { +#[doc = "Field `EV0LM` reader - Event 0 Level Selection"] +pub type Ev0lmR = crate::BitReader; +impl Ev0lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV0LM_A { + pub const fn variant(&self) -> Ev0lm { match self.bits { - false => EV0LM_A::VALUE1, - true => EV0LM_A::VALUE2, + false => Ev0lm::Value1, + true => Ev0lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV0LM_A::VALUE1 + *self == Ev0lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV0LM_A::VALUE2 + *self == Ev0lm::Value2 } } #[doc = "Field `EV0LM` writer - Event 0 Level Selection"] -pub type EV0LM_W<'a, REG> = crate::BitWriter<'a, REG, EV0LM_A>; -impl<'a, REG> EV0LM_W<'a, REG> +pub type Ev0lmW<'a, REG> = crate::BitWriter<'a, REG, Ev0lm>; +impl<'a, REG> Ev0lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV0LM_A::VALUE1) + self.variant(Ev0lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV0LM_A::VALUE2) + self.variant(Ev0lm::Value2) } } -#[doc = "Field `EV1LM` reader - Event 1 Level Selection"] -pub type EV1LM_R = crate::BitReader; #[doc = "Event 1 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV1LM_A { +pub enum Ev1lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV1LM_A) -> Self { + fn from(variant: Ev1lm) -> Self { variant as u8 != 0 } } -impl EV1LM_R { +#[doc = "Field `EV1LM` reader - Event 1 Level Selection"] +pub type Ev1lmR = crate::BitReader; +impl Ev1lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV1LM_A { + pub const fn variant(&self) -> Ev1lm { match self.bits { - false => EV1LM_A::VALUE1, - true => EV1LM_A::VALUE2, + false => Ev1lm::Value1, + true => Ev1lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV1LM_A::VALUE1 + *self == Ev1lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV1LM_A::VALUE2 + *self == Ev1lm::Value2 } } #[doc = "Field `EV1LM` writer - Event 1 Level Selection"] -pub type EV1LM_W<'a, REG> = crate::BitWriter<'a, REG, EV1LM_A>; -impl<'a, REG> EV1LM_W<'a, REG> +pub type Ev1lmW<'a, REG> = crate::BitWriter<'a, REG, Ev1lm>; +impl<'a, REG> Ev1lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV1LM_A::VALUE1) + self.variant(Ev1lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV1LM_A::VALUE2) + self.variant(Ev1lm::Value2) } } -#[doc = "Field `EV2LM` reader - Event 2 Level Selection"] -pub type EV2LM_R = crate::BitReader; #[doc = "Event 2 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV2LM_A { +pub enum Ev2lm { #[doc = "0: Active on HIGH level"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active on LOW level"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV2LM_A) -> Self { + fn from(variant: Ev2lm) -> Self { variant as u8 != 0 } } -impl EV2LM_R { +#[doc = "Field `EV2LM` reader - Event 2 Level Selection"] +pub type Ev2lmR = crate::BitReader; +impl Ev2lmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV2LM_A { + pub const fn variant(&self) -> Ev2lm { match self.bits { - false => EV2LM_A::VALUE1, - true => EV2LM_A::VALUE2, + false => Ev2lm::Value1, + true => Ev2lm::Value2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV2LM_A::VALUE1 + *self == Ev2lm::Value1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV2LM_A::VALUE2 + *self == Ev2lm::Value2 } } #[doc = "Field `EV2LM` writer - Event 2 Level Selection"] -pub type EV2LM_W<'a, REG> = crate::BitWriter<'a, REG, EV2LM_A>; -impl<'a, REG> EV2LM_W<'a, REG> +pub type Ev2lmW<'a, REG> = crate::BitWriter<'a, REG, Ev2lm>; +impl<'a, REG> Ev2lmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EV2LM_A::VALUE1) + self.variant(Ev2lm::Value1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EV2LM_A::VALUE2) + self.variant(Ev2lm::Value2) } } -#[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] -pub type LPF0M_R = crate::FieldReader; #[doc = "Event 0 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF0M_A { +pub enum Lpf0m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF0M_A) -> Self { + fn from(variant: Lpf0m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF0M_A { +impl crate::FieldSpec for Lpf0m { type Ux = u8; } -impl LPF0M_R { +#[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] +pub type Lpf0mR = crate::FieldReader; +impl Lpf0mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF0M_A { + pub const fn variant(&self) -> Lpf0m { match self.bits { - 0 => LPF0M_A::VALUE1, - 1 => LPF0M_A::VALUE2, - 2 => LPF0M_A::VALUE3, - 3 => LPF0M_A::VALUE4, + 0 => Lpf0m::Value1, + 1 => Lpf0m::Value2, + 2 => Lpf0m::Value3, + 3 => Lpf0m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF0M_A::VALUE1 + *self == Lpf0m::Value1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF0M_A::VALUE2 + *self == Lpf0m::Value2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF0M_A::VALUE3 + *self == Lpf0m::Value3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF0M_A::VALUE4 + *self == Lpf0m::Value4 } } #[doc = "Field `LPF0M` writer - Event 0 Low Pass Filter Configuration"] -pub type LPF0M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF0M_A>; -impl<'a, REG> LPF0M_W<'a, REG> +pub type Lpf0mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf0m>; +impl<'a, REG> Lpf0mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1206,84 +1206,84 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE1) + self.variant(Lpf0m::Value1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE2) + self.variant(Lpf0m::Value2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE3) + self.variant(Lpf0m::Value3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF0M_A::VALUE4) + self.variant(Lpf0m::Value4) } } -#[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] -pub type LPF1M_R = crate::FieldReader; #[doc = "Event 1 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF1M_A { +pub enum Lpf1m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF1M_A) -> Self { + fn from(variant: Lpf1m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF1M_A { +impl crate::FieldSpec for Lpf1m { type Ux = u8; } -impl LPF1M_R { +#[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] +pub type Lpf1mR = crate::FieldReader; +impl Lpf1mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF1M_A { + pub const fn variant(&self) -> Lpf1m { match self.bits { - 0 => LPF1M_A::VALUE1, - 1 => LPF1M_A::VALUE2, - 2 => LPF1M_A::VALUE3, - 3 => LPF1M_A::VALUE4, + 0 => Lpf1m::Value1, + 1 => Lpf1m::Value2, + 2 => Lpf1m::Value3, + 3 => Lpf1m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF1M_A::VALUE1 + *self == Lpf1m::Value1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF1M_A::VALUE2 + *self == Lpf1m::Value2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF1M_A::VALUE3 + *self == Lpf1m::Value3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF1M_A::VALUE4 + *self == Lpf1m::Value4 } } #[doc = "Field `LPF1M` writer - Event 1 Low Pass Filter Configuration"] -pub type LPF1M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF1M_A>; -impl<'a, REG> LPF1M_W<'a, REG> +pub type Lpf1mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf1m>; +impl<'a, REG> Lpf1mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1291,84 +1291,84 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE1) + self.variant(Lpf1m::Value1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE2) + self.variant(Lpf1m::Value2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE3) + self.variant(Lpf1m::Value3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF1M_A::VALUE4) + self.variant(Lpf1m::Value4) } } -#[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] -pub type LPF2M_R = crate::FieldReader; #[doc = "Event 2 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPF2M_A { +pub enum Lpf2m { #[doc = "0: LPF is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPF2M_A) -> Self { + fn from(variant: Lpf2m) -> Self { variant as _ } } -impl crate::FieldSpec for LPF2M_A { +impl crate::FieldSpec for Lpf2m { type Ux = u8; } -impl LPF2M_R { +#[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] +pub type Lpf2mR = crate::FieldReader; +impl Lpf2mR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPF2M_A { + pub const fn variant(&self) -> Lpf2m { match self.bits { - 0 => LPF2M_A::VALUE1, - 1 => LPF2M_A::VALUE2, - 2 => LPF2M_A::VALUE3, - 3 => LPF2M_A::VALUE4, + 0 => Lpf2m::Value1, + 1 => Lpf2m::Value2, + 2 => Lpf2m::Value3, + 3 => Lpf2m::Value4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPF2M_A::VALUE1 + *self == Lpf2m::Value1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPF2M_A::VALUE2 + *self == Lpf2m::Value2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPF2M_A::VALUE3 + *self == Lpf2m::Value3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPF2M_A::VALUE4 + *self == Lpf2m::Value4 } } #[doc = "Field `LPF2M` writer - Event 2 Low Pass Filter Configuration"] -pub type LPF2M_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LPF2M_A>; -impl<'a, REG> LPF2M_W<'a, REG> +pub type Lpf2mW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Lpf2m>; +impl<'a, REG> Lpf2mW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1376,183 +1376,174 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE1) + self.variant(Lpf2m::Value1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE2) + self.variant(Lpf2m::Value2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE3) + self.variant(Lpf2m::Value3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPF2M_A::VALUE4) + self.variant(Lpf2m::Value4) } } impl R { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - pub fn ev0is(&self) -> EV0IS_R { - EV0IS_R::new((self.bits & 0x0f) as u8) + pub fn ev0is(&self) -> Ev0isR { + Ev0isR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - pub fn ev1is(&self) -> EV1IS_R { - EV1IS_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn ev1is(&self) -> Ev1isR { + Ev1isR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - pub fn ev2is(&self) -> EV2IS_R { - EV2IS_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn ev2is(&self) -> Ev2isR { + Ev2isR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - pub fn ev0em(&self) -> EV0EM_R { - EV0EM_R::new(((self.bits >> 16) & 3) as u8) + pub fn ev0em(&self) -> Ev0emR { + Ev0emR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - pub fn ev1em(&self) -> EV1EM_R { - EV1EM_R::new(((self.bits >> 18) & 3) as u8) + pub fn ev1em(&self) -> Ev1emR { + Ev1emR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - pub fn ev2em(&self) -> EV2EM_R { - EV2EM_R::new(((self.bits >> 20) & 3) as u8) + pub fn ev2em(&self) -> Ev2emR { + Ev2emR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - pub fn ev0lm(&self) -> EV0LM_R { - EV0LM_R::new(((self.bits >> 22) & 1) != 0) + pub fn ev0lm(&self) -> Ev0lmR { + Ev0lmR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - pub fn ev1lm(&self) -> EV1LM_R { - EV1LM_R::new(((self.bits >> 23) & 1) != 0) + pub fn ev1lm(&self) -> Ev1lmR { + Ev1lmR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - pub fn ev2lm(&self) -> EV2LM_R { - EV2LM_R::new(((self.bits >> 24) & 1) != 0) + pub fn ev2lm(&self) -> Ev2lmR { + Ev2lmR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf0m(&self) -> LPF0M_R { - LPF0M_R::new(((self.bits >> 25) & 3) as u8) + pub fn lpf0m(&self) -> Lpf0mR { + Lpf0mR::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf1m(&self) -> LPF1M_R { - LPF1M_R::new(((self.bits >> 27) & 3) as u8) + pub fn lpf1m(&self) -> Lpf1mR { + Lpf1mR::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf2m(&self) -> LPF2M_R { - LPF2M_R::new(((self.bits >> 29) & 3) as u8) + pub fn lpf2m(&self) -> Lpf2mR { + Lpf2mR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] #[must_use] - pub fn ev0is(&mut self) -> EV0IS_W { - EV0IS_W::new(self, 0) + pub fn ev0is(&mut self) -> Ev0isW { + Ev0isW::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] #[must_use] - pub fn ev1is(&mut self) -> EV1IS_W { - EV1IS_W::new(self, 4) + pub fn ev1is(&mut self) -> Ev1isW { + Ev1isW::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] #[must_use] - pub fn ev2is(&mut self) -> EV2IS_W { - EV2IS_W::new(self, 8) + pub fn ev2is(&mut self) -> Ev2isW { + Ev2isW::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev0em(&mut self) -> EV0EM_W { - EV0EM_W::new(self, 16) + pub fn ev0em(&mut self) -> Ev0emW { + Ev0emW::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev1em(&mut self) -> EV1EM_W { - EV1EM_W::new(self, 18) + pub fn ev1em(&mut self) -> Ev1emW { + Ev1emW::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev2em(&mut self) -> EV2EM_W { - EV2EM_W::new(self, 20) + pub fn ev2em(&mut self) -> Ev2emW { + Ev2emW::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] #[must_use] - pub fn ev0lm(&mut self) -> EV0LM_W { - EV0LM_W::new(self, 22) + pub fn ev0lm(&mut self) -> Ev0lmW { + Ev0lmW::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] #[must_use] - pub fn ev1lm(&mut self) -> EV1LM_W { - EV1LM_W::new(self, 23) + pub fn ev1lm(&mut self) -> Ev1lmW { + Ev1lmW::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] #[must_use] - pub fn ev2lm(&mut self) -> EV2LM_W { - EV2LM_W::new(self, 24) + pub fn ev2lm(&mut self) -> Ev2lmW { + Ev2lmW::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf0m(&mut self) -> LPF0M_W { - LPF0M_W::new(self, 25) + pub fn lpf0m(&mut self) -> Lpf0mW { + Lpf0mW::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf1m(&mut self) -> LPF1M_W { - LPF1M_W::new(self, 27) + pub fn lpf1m(&mut self) -> Lpf1mW { + Lpf1mW::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf2m(&mut self) -> LPF2M_W { - LPF2M_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn lpf2m(&mut self) -> Lpf2mW { + Lpf2mW::new(self, 29) } } #[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INS_SPEC; -impl crate::RegisterSpec for INS_SPEC { +pub struct InsSpec; +impl crate::RegisterSpec for InsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ins::R`](R) reader structure"] -impl crate::Readable for INS_SPEC {} +impl crate::Readable for InsSpec {} #[doc = "`write(|w| ..)` method takes [`ins::W`](W) writer structure"] -impl crate::Writable for INS_SPEC { +impl crate::Writable for InsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INS to value 0"] -impl crate::Resettable for INS_SPEC { +impl crate::Resettable for InsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/inte.rs b/src/ccu80_cc80/inte.rs index 969cb96d..14b19a63 100644 --- a/src/ccu80_cc80/inte.rs +++ b/src/ccu80_cc80/inte.rs @@ -1,610 +1,601 @@ #[doc = "Register `INTE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTE` writer"] -pub type W = crate::W; -#[doc = "Field `PME` reader - Period match while counting up enable"] -pub type PME_R = crate::BitReader; +pub type W = crate::W; #[doc = "Period match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PME_A { +pub enum Pme { #[doc = "0: Period Match interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Period Match interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PME_A) -> Self { + fn from(variant: Pme) -> Self { variant as u8 != 0 } } -impl PME_R { +#[doc = "Field `PME` reader - Period match while counting up enable"] +pub type PmeR = crate::BitReader; +impl PmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PME_A { + pub const fn variant(&self) -> Pme { match self.bits { - false => PME_A::VALUE1, - true => PME_A::VALUE2, + false => Pme::Value1, + true => Pme::Value2, } } #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PME_A::VALUE1 + *self == Pme::Value1 } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PME_A::VALUE2 + *self == Pme::Value2 } } #[doc = "Field `PME` writer - Period match while counting up enable"] -pub type PME_W<'a, REG> = crate::BitWriter<'a, REG, PME_A>; -impl<'a, REG> PME_W<'a, REG> +pub type PmeW<'a, REG> = crate::BitWriter<'a, REG, Pme>; +impl<'a, REG> PmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PME_A::VALUE1) + self.variant(Pme::Value1) } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PME_A::VALUE2) + self.variant(Pme::Value2) } } -#[doc = "Field `OME` reader - One match while counting down enable"] -pub type OME_R = crate::BitReader; #[doc = "One match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OME_A { +pub enum Ome { #[doc = "0: One Match interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One Match interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OME_A) -> Self { + fn from(variant: Ome) -> Self { variant as u8 != 0 } } -impl OME_R { +#[doc = "Field `OME` reader - One match while counting down enable"] +pub type OmeR = crate::BitReader; +impl OmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OME_A { + pub const fn variant(&self) -> Ome { match self.bits { - false => OME_A::VALUE1, - true => OME_A::VALUE2, + false => Ome::Value1, + true => Ome::Value2, } } #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OME_A::VALUE1 + *self == Ome::Value1 } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OME_A::VALUE2 + *self == Ome::Value2 } } #[doc = "Field `OME` writer - One match while counting down enable"] -pub type OME_W<'a, REG> = crate::BitWriter<'a, REG, OME_A>; -impl<'a, REG> OME_W<'a, REG> +pub type OmeW<'a, REG> = crate::BitWriter<'a, REG, Ome>; +impl<'a, REG> OmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OME_A::VALUE1) + self.variant(Ome::Value1) } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OME_A::VALUE2) + self.variant(Ome::Value2) } } -#[doc = "Field `CMU1E` reader - Channel 1 Compare match while counting up enable"] -pub type CMU1E_R = crate::BitReader; #[doc = "Channel 1 Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMU1E_A { +pub enum Cmu1e { #[doc = "0: Compare Match while counting up interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMU1E_A) -> Self { + fn from(variant: Cmu1e) -> Self { variant as u8 != 0 } } -impl CMU1E_R { +#[doc = "Field `CMU1E` reader - Channel 1 Compare match while counting up enable"] +pub type Cmu1eR = crate::BitReader; +impl Cmu1eR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMU1E_A { + pub const fn variant(&self) -> Cmu1e { match self.bits { - false => CMU1E_A::VALUE1, - true => CMU1E_A::VALUE2, + false => Cmu1e::Value1, + true => Cmu1e::Value2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMU1E_A::VALUE1 + *self == Cmu1e::Value1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMU1E_A::VALUE2 + *self == Cmu1e::Value2 } } #[doc = "Field `CMU1E` writer - Channel 1 Compare match while counting up enable"] -pub type CMU1E_W<'a, REG> = crate::BitWriter<'a, REG, CMU1E_A>; -impl<'a, REG> CMU1E_W<'a, REG> +pub type Cmu1eW<'a, REG> = crate::BitWriter<'a, REG, Cmu1e>; +impl<'a, REG> Cmu1eW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMU1E_A::VALUE1) + self.variant(Cmu1e::Value1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMU1E_A::VALUE2) + self.variant(Cmu1e::Value2) } } -#[doc = "Field `CMD1E` reader - Channel 1 Compare match while counting down enable"] -pub type CMD1E_R = crate::BitReader; #[doc = "Channel 1 Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD1E_A { +pub enum Cmd1e { #[doc = "0: Compare Match while counting down interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD1E_A) -> Self { + fn from(variant: Cmd1e) -> Self { variant as u8 != 0 } } -impl CMD1E_R { +#[doc = "Field `CMD1E` reader - Channel 1 Compare match while counting down enable"] +pub type Cmd1eR = crate::BitReader; +impl Cmd1eR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD1E_A { + pub const fn variant(&self) -> Cmd1e { match self.bits { - false => CMD1E_A::VALUE1, - true => CMD1E_A::VALUE2, + false => Cmd1e::Value1, + true => Cmd1e::Value2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD1E_A::VALUE1 + *self == Cmd1e::Value1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD1E_A::VALUE2 + *self == Cmd1e::Value2 } } #[doc = "Field `CMD1E` writer - Channel 1 Compare match while counting down enable"] -pub type CMD1E_W<'a, REG> = crate::BitWriter<'a, REG, CMD1E_A>; -impl<'a, REG> CMD1E_W<'a, REG> +pub type Cmd1eW<'a, REG> = crate::BitWriter<'a, REG, Cmd1e>; +impl<'a, REG> Cmd1eW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD1E_A::VALUE1) + self.variant(Cmd1e::Value1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD1E_A::VALUE2) + self.variant(Cmd1e::Value2) } } -#[doc = "Field `CMU2E` reader - Channel 2 Compare match while counting up enable"] -pub type CMU2E_R = crate::BitReader; #[doc = "Channel 2 Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMU2E_A { +pub enum Cmu2e { #[doc = "0: Compare Match while counting up interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMU2E_A) -> Self { + fn from(variant: Cmu2e) -> Self { variant as u8 != 0 } } -impl CMU2E_R { +#[doc = "Field `CMU2E` reader - Channel 2 Compare match while counting up enable"] +pub type Cmu2eR = crate::BitReader; +impl Cmu2eR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMU2E_A { + pub const fn variant(&self) -> Cmu2e { match self.bits { - false => CMU2E_A::VALUE1, - true => CMU2E_A::VALUE2, + false => Cmu2e::Value1, + true => Cmu2e::Value2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMU2E_A::VALUE1 + *self == Cmu2e::Value1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMU2E_A::VALUE2 + *self == Cmu2e::Value2 } } #[doc = "Field `CMU2E` writer - Channel 2 Compare match while counting up enable"] -pub type CMU2E_W<'a, REG> = crate::BitWriter<'a, REG, CMU2E_A>; -impl<'a, REG> CMU2E_W<'a, REG> +pub type Cmu2eW<'a, REG> = crate::BitWriter<'a, REG, Cmu2e>; +impl<'a, REG> Cmu2eW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMU2E_A::VALUE1) + self.variant(Cmu2e::Value1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMU2E_A::VALUE2) + self.variant(Cmu2e::Value2) } } -#[doc = "Field `CMD2E` reader - Channel 2 Compare match while counting down enable"] -pub type CMD2E_R = crate::BitReader; #[doc = "Channel 2 Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD2E_A { +pub enum Cmd2e { #[doc = "0: Compare Match while counting down interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD2E_A) -> Self { + fn from(variant: Cmd2e) -> Self { variant as u8 != 0 } } -impl CMD2E_R { +#[doc = "Field `CMD2E` reader - Channel 2 Compare match while counting down enable"] +pub type Cmd2eR = crate::BitReader; +impl Cmd2eR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD2E_A { + pub const fn variant(&self) -> Cmd2e { match self.bits { - false => CMD2E_A::VALUE1, - true => CMD2E_A::VALUE2, + false => Cmd2e::Value1, + true => Cmd2e::Value2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD2E_A::VALUE1 + *self == Cmd2e::Value1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD2E_A::VALUE2 + *self == Cmd2e::Value2 } } #[doc = "Field `CMD2E` writer - Channel 2 Compare match while counting down enable"] -pub type CMD2E_W<'a, REG> = crate::BitWriter<'a, REG, CMD2E_A>; -impl<'a, REG> CMD2E_W<'a, REG> +pub type Cmd2eW<'a, REG> = crate::BitWriter<'a, REG, Cmd2e>; +impl<'a, REG> Cmd2eW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD2E_A::VALUE1) + self.variant(Cmd2e::Value1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD2E_A::VALUE2) + self.variant(Cmd2e::Value2) } } -#[doc = "Field `E0AE` reader - Event 0 interrupt enable"] -pub type E0AE_R = crate::BitReader; #[doc = "Event 0 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0AE_A { +pub enum E0ae { #[doc = "0: Event 0 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 0 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0AE_A) -> Self { + fn from(variant: E0ae) -> Self { variant as u8 != 0 } } -impl E0AE_R { +#[doc = "Field `E0AE` reader - Event 0 interrupt enable"] +pub type E0aeR = crate::BitReader; +impl E0aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0AE_A { + pub const fn variant(&self) -> E0ae { match self.bits { - false => E0AE_A::VALUE1, - true => E0AE_A::VALUE2, + false => E0ae::Value1, + true => E0ae::Value2, } } #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0AE_A::VALUE1 + *self == E0ae::Value1 } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0AE_A::VALUE2 + *self == E0ae::Value2 } } #[doc = "Field `E0AE` writer - Event 0 interrupt enable"] -pub type E0AE_W<'a, REG> = crate::BitWriter<'a, REG, E0AE_A>; -impl<'a, REG> E0AE_W<'a, REG> +pub type E0aeW<'a, REG> = crate::BitWriter<'a, REG, E0ae>; +impl<'a, REG> E0aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0AE_A::VALUE1) + self.variant(E0ae::Value1) } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0AE_A::VALUE2) + self.variant(E0ae::Value2) } } -#[doc = "Field `E1AE` reader - Event 1 interrupt enable"] -pub type E1AE_R = crate::BitReader; #[doc = "Event 1 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1AE_A { +pub enum E1ae { #[doc = "0: Event 1 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 1 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1AE_A) -> Self { + fn from(variant: E1ae) -> Self { variant as u8 != 0 } } -impl E1AE_R { +#[doc = "Field `E1AE` reader - Event 1 interrupt enable"] +pub type E1aeR = crate::BitReader; +impl E1aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1AE_A { + pub const fn variant(&self) -> E1ae { match self.bits { - false => E1AE_A::VALUE1, - true => E1AE_A::VALUE2, + false => E1ae::Value1, + true => E1ae::Value2, } } #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1AE_A::VALUE1 + *self == E1ae::Value1 } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1AE_A::VALUE2 + *self == E1ae::Value2 } } #[doc = "Field `E1AE` writer - Event 1 interrupt enable"] -pub type E1AE_W<'a, REG> = crate::BitWriter<'a, REG, E1AE_A>; -impl<'a, REG> E1AE_W<'a, REG> +pub type E1aeW<'a, REG> = crate::BitWriter<'a, REG, E1ae>; +impl<'a, REG> E1aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1AE_A::VALUE1) + self.variant(E1ae::Value1) } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1AE_A::VALUE2) + self.variant(E1ae::Value2) } } -#[doc = "Field `E2AE` reader - Event 2 interrupt enable"] -pub type E2AE_R = crate::BitReader; #[doc = "Event 2 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2AE_A { +pub enum E2ae { #[doc = "0: Event 2 detection interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 2 detection interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2AE_A) -> Self { + fn from(variant: E2ae) -> Self { variant as u8 != 0 } } -impl E2AE_R { +#[doc = "Field `E2AE` reader - Event 2 interrupt enable"] +pub type E2aeR = crate::BitReader; +impl E2aeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2AE_A { + pub const fn variant(&self) -> E2ae { match self.bits { - false => E2AE_A::VALUE1, - true => E2AE_A::VALUE2, + false => E2ae::Value1, + true => E2ae::Value2, } } #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2AE_A::VALUE1 + *self == E2ae::Value1 } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2AE_A::VALUE2 + *self == E2ae::Value2 } } #[doc = "Field `E2AE` writer - Event 2 interrupt enable"] -pub type E2AE_W<'a, REG> = crate::BitWriter<'a, REG, E2AE_A>; -impl<'a, REG> E2AE_W<'a, REG> +pub type E2aeW<'a, REG> = crate::BitWriter<'a, REG, E2ae>; +impl<'a, REG> E2aeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2AE_A::VALUE1) + self.variant(E2ae::Value1) } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2AE_A::VALUE2) + self.variant(E2ae::Value2) } } impl R { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - pub fn pme(&self) -> PME_R { - PME_R::new((self.bits & 1) != 0) + pub fn pme(&self) -> PmeR { + PmeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - pub fn ome(&self) -> OME_R { - OME_R::new(((self.bits >> 1) & 1) != 0) + pub fn ome(&self) -> OmeR { + OmeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"] #[inline(always)] - pub fn cmu1e(&self) -> CMU1E_R { - CMU1E_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu1e(&self) -> Cmu1eR { + Cmu1eR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"] #[inline(always)] - pub fn cmd1e(&self) -> CMD1E_R { - CMD1E_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd1e(&self) -> Cmd1eR { + Cmd1eR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"] #[inline(always)] - pub fn cmu2e(&self) -> CMU2E_R { - CMU2E_R::new(((self.bits >> 4) & 1) != 0) + pub fn cmu2e(&self) -> Cmu2eR { + Cmu2eR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"] #[inline(always)] - pub fn cmd2e(&self) -> CMD2E_R { - CMD2E_R::new(((self.bits >> 5) & 1) != 0) + pub fn cmd2e(&self) -> Cmd2eR { + Cmd2eR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - pub fn e0ae(&self) -> E0AE_R { - E0AE_R::new(((self.bits >> 8) & 1) != 0) + pub fn e0ae(&self) -> E0aeR { + E0aeR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - pub fn e1ae(&self) -> E1AE_R { - E1AE_R::new(((self.bits >> 9) & 1) != 0) + pub fn e1ae(&self) -> E1aeR { + E1aeR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - pub fn e2ae(&self) -> E2AE_R { - E2AE_R::new(((self.bits >> 10) & 1) != 0) + pub fn e2ae(&self) -> E2aeR { + E2aeR::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] #[must_use] - pub fn pme(&mut self) -> PME_W { - PME_W::new(self, 0) + pub fn pme(&mut self) -> PmeW { + PmeW::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] #[must_use] - pub fn ome(&mut self) -> OME_W { - OME_W::new(self, 1) + pub fn ome(&mut self) -> OmeW { + OmeW::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmu1e(&mut self) -> CMU1E_W { - CMU1E_W::new(self, 2) + pub fn cmu1e(&mut self) -> Cmu1eW { + Cmu1eW::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmd1e(&mut self) -> CMD1E_W { - CMD1E_W::new(self, 3) + pub fn cmd1e(&mut self) -> Cmd1eW { + Cmd1eW::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmu2e(&mut self) -> CMU2E_W { - CMU2E_W::new(self, 4) + pub fn cmu2e(&mut self) -> Cmu2eW { + Cmu2eW::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmd2e(&mut self) -> CMD2E_W { - CMD2E_W::new(self, 5) + pub fn cmd2e(&mut self) -> Cmd2eW { + Cmd2eW::new(self, 5) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] #[must_use] - pub fn e0ae(&mut self) -> E0AE_W { - E0AE_W::new(self, 8) + pub fn e0ae(&mut self) -> E0aeW { + E0aeW::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] #[must_use] - pub fn e1ae(&mut self) -> E1AE_W { - E1AE_W::new(self, 9) + pub fn e1ae(&mut self) -> E1aeW { + E1aeW::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] #[must_use] - pub fn e2ae(&mut self) -> E2AE_W { - E2AE_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn e2ae(&mut self) -> E2aeW { + E2aeW::new(self, 10) } } #[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTE_SPEC; -impl crate::RegisterSpec for INTE_SPEC { +pub struct InteSpec; +impl crate::RegisterSpec for InteSpec { type Ux = u32; } #[doc = "`read()` method returns [`inte::R`](R) reader structure"] -impl crate::Readable for INTE_SPEC {} +impl crate::Readable for InteSpec {} #[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"] -impl crate::Writable for INTE_SPEC { +impl crate::Writable for InteSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTE to value 0"] -impl crate::Resettable for INTE_SPEC { +impl crate::Resettable for InteSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ints.rs b/src/ccu80_cc80/ints.rs index e0a08bed..5ed8b264 100644 --- a/src/ccu80_cc80/ints.rs +++ b/src/ccu80_cc80/ints.rs @@ -1,391 +1,391 @@ #[doc = "Register `INTS` reader"] -pub type R = crate::R; -#[doc = "Field `PMUS` reader - Period Match while Counting Up"] -pub type PMUS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Period Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PMUS_A { +pub enum Pmus { #[doc = "0: Period match while counting up not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Period match while counting up detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PMUS_A) -> Self { + fn from(variant: Pmus) -> Self { variant as u8 != 0 } } -impl PMUS_R { +#[doc = "Field `PMUS` reader - Period Match while Counting Up"] +pub type PmusR = crate::BitReader; +impl PmusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PMUS_A { + pub const fn variant(&self) -> Pmus { match self.bits { - false => PMUS_A::VALUE1, - true => PMUS_A::VALUE2, + false => Pmus::Value1, + true => Pmus::Value2, } } #[doc = "Period match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PMUS_A::VALUE1 + *self == Pmus::Value1 } #[doc = "Period match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PMUS_A::VALUE2 + *self == Pmus::Value2 } } -#[doc = "Field `OMDS` reader - One Match while Counting Down"] -pub type OMDS_R = crate::BitReader; #[doc = "One Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OMDS_A { +pub enum Omds { #[doc = "0: One match while counting down not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One match while counting down detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OMDS_A) -> Self { + fn from(variant: Omds) -> Self { variant as u8 != 0 } } -impl OMDS_R { +#[doc = "Field `OMDS` reader - One Match while Counting Down"] +pub type OmdsR = crate::BitReader; +impl OmdsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OMDS_A { + pub const fn variant(&self) -> Omds { match self.bits { - false => OMDS_A::VALUE1, - true => OMDS_A::VALUE2, + false => Omds::Value1, + true => Omds::Value2, } } #[doc = "One match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OMDS_A::VALUE1 + *self == Omds::Value1 } #[doc = "One match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OMDS_A::VALUE2 + *self == Omds::Value2 } } -#[doc = "Field `CMU1S` reader - Channel 1 Compare Match while Counting Up"] -pub type CMU1S_R = crate::BitReader; #[doc = "Channel 1 Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMU1S_A { +pub enum Cmu1s { #[doc = "0: Compare match while counting up not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting up detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMU1S_A) -> Self { + fn from(variant: Cmu1s) -> Self { variant as u8 != 0 } } -impl CMU1S_R { +#[doc = "Field `CMU1S` reader - Channel 1 Compare Match while Counting Up"] +pub type Cmu1sR = crate::BitReader; +impl Cmu1sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMU1S_A { + pub const fn variant(&self) -> Cmu1s { match self.bits { - false => CMU1S_A::VALUE1, - true => CMU1S_A::VALUE2, + false => Cmu1s::Value1, + true => Cmu1s::Value2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMU1S_A::VALUE1 + *self == Cmu1s::Value1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMU1S_A::VALUE2 + *self == Cmu1s::Value2 } } -#[doc = "Field `CMD1S` reader - Channel 1 Compare Match while Counting Down"] -pub type CMD1S_R = crate::BitReader; #[doc = "Channel 1 Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD1S_A { +pub enum Cmd1s { #[doc = "0: Compare match while counting down not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting down detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD1S_A) -> Self { + fn from(variant: Cmd1s) -> Self { variant as u8 != 0 } } -impl CMD1S_R { +#[doc = "Field `CMD1S` reader - Channel 1 Compare Match while Counting Down"] +pub type Cmd1sR = crate::BitReader; +impl Cmd1sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD1S_A { + pub const fn variant(&self) -> Cmd1s { match self.bits { - false => CMD1S_A::VALUE1, - true => CMD1S_A::VALUE2, + false => Cmd1s::Value1, + true => Cmd1s::Value2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD1S_A::VALUE1 + *self == Cmd1s::Value1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD1S_A::VALUE2 + *self == Cmd1s::Value2 } } -#[doc = "Field `CMU2S` reader - Channel 2 Compare Match while Counting Up"] -pub type CMU2S_R = crate::BitReader; #[doc = "Channel 2 Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMU2S_A { +pub enum Cmu2s { #[doc = "0: Compare match while counting up not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting up detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMU2S_A) -> Self { + fn from(variant: Cmu2s) -> Self { variant as u8 != 0 } } -impl CMU2S_R { +#[doc = "Field `CMU2S` reader - Channel 2 Compare Match while Counting Up"] +pub type Cmu2sR = crate::BitReader; +impl Cmu2sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMU2S_A { + pub const fn variant(&self) -> Cmu2s { match self.bits { - false => CMU2S_A::VALUE1, - true => CMU2S_A::VALUE2, + false => Cmu2s::Value1, + true => Cmu2s::Value2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMU2S_A::VALUE1 + *self == Cmu2s::Value1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMU2S_A::VALUE2 + *self == Cmu2s::Value2 } } -#[doc = "Field `CMD2S` reader - Channel 2 Compare Match while Counting Down"] -pub type CMD2S_R = crate::BitReader; #[doc = "Channel 2 Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD2S_A { +pub enum Cmd2s { #[doc = "0: Compare match while counting down not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Compare match while counting down detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD2S_A) -> Self { + fn from(variant: Cmd2s) -> Self { variant as u8 != 0 } } -impl CMD2S_R { +#[doc = "Field `CMD2S` reader - Channel 2 Compare Match while Counting Down"] +pub type Cmd2sR = crate::BitReader; +impl Cmd2sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD2S_A { + pub const fn variant(&self) -> Cmd2s { match self.bits { - false => CMD2S_A::VALUE1, - true => CMD2S_A::VALUE2, + false => Cmd2s::Value1, + true => Cmd2s::Value2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD2S_A::VALUE1 + *self == Cmd2s::Value1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD2S_A::VALUE2 + *self == Cmd2s::Value2 } } -#[doc = "Field `E0AS` reader - Event 0 Detection Status"] -pub type E0AS_R = crate::BitReader; #[doc = "Event 0 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0AS_A { +pub enum E0as { #[doc = "0: Event 0 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 0 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0AS_A) -> Self { + fn from(variant: E0as) -> Self { variant as u8 != 0 } } -impl E0AS_R { +#[doc = "Field `E0AS` reader - Event 0 Detection Status"] +pub type E0asR = crate::BitReader; +impl E0asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0AS_A { + pub const fn variant(&self) -> E0as { match self.bits { - false => E0AS_A::VALUE1, - true => E0AS_A::VALUE2, + false => E0as::Value1, + true => E0as::Value2, } } #[doc = "Event 0 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0AS_A::VALUE1 + *self == E0as::Value1 } #[doc = "Event 0 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0AS_A::VALUE2 + *self == E0as::Value2 } } -#[doc = "Field `E1AS` reader - Event 1 Detection Status"] -pub type E1AS_R = crate::BitReader; #[doc = "Event 1 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1AS_A { +pub enum E1as { #[doc = "0: Event 1 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 1 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1AS_A) -> Self { + fn from(variant: E1as) -> Self { variant as u8 != 0 } } -impl E1AS_R { +#[doc = "Field `E1AS` reader - Event 1 Detection Status"] +pub type E1asR = crate::BitReader; +impl E1asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1AS_A { + pub const fn variant(&self) -> E1as { match self.bits { - false => E1AS_A::VALUE1, - true => E1AS_A::VALUE2, + false => E1as::Value1, + true => E1as::Value2, } } #[doc = "Event 1 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1AS_A::VALUE1 + *self == E1as::Value1 } #[doc = "Event 1 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1AS_A::VALUE2 + *self == E1as::Value2 } } -#[doc = "Field `E2AS` reader - Event 2 Detection Status"] -pub type E2AS_R = crate::BitReader; #[doc = "Event 2 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2AS_A { +pub enum E2as { #[doc = "0: Event 2 not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Event 2 detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2AS_A) -> Self { + fn from(variant: E2as) -> Self { variant as u8 != 0 } } -impl E2AS_R { +#[doc = "Field `E2AS` reader - Event 2 Detection Status"] +pub type E2asR = crate::BitReader; +impl E2asR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2AS_A { + pub const fn variant(&self) -> E2as { match self.bits { - false => E2AS_A::VALUE1, - true => E2AS_A::VALUE2, + false => E2as::Value1, + true => E2as::Value2, } } #[doc = "Event 2 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2AS_A::VALUE1 + *self == E2as::Value1 } #[doc = "Event 2 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2AS_A::VALUE2 + *self == E2as::Value2 } } #[doc = "Field `TRPF` reader - Trap Flag Status"] -pub type TRPF_R = crate::BitReader; +pub type TrpfR = crate::BitReader; impl R { #[doc = "Bit 0 - Period Match while Counting Up"] #[inline(always)] - pub fn pmus(&self) -> PMUS_R { - PMUS_R::new((self.bits & 1) != 0) + pub fn pmus(&self) -> PmusR { + PmusR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One Match while Counting Down"] #[inline(always)] - pub fn omds(&self) -> OMDS_R { - OMDS_R::new(((self.bits >> 1) & 1) != 0) + pub fn omds(&self) -> OmdsR { + OmdsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 1 Compare Match while Counting Up"] #[inline(always)] - pub fn cmu1s(&self) -> CMU1S_R { - CMU1S_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmu1s(&self) -> Cmu1sR { + Cmu1sR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 1 Compare Match while Counting Down"] #[inline(always)] - pub fn cmd1s(&self) -> CMD1S_R { - CMD1S_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd1s(&self) -> Cmd1sR { + Cmd1sR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 2 Compare Match while Counting Up"] #[inline(always)] - pub fn cmu2s(&self) -> CMU2S_R { - CMU2S_R::new(((self.bits >> 4) & 1) != 0) + pub fn cmu2s(&self) -> Cmu2sR { + Cmu2sR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 2 Compare Match while Counting Down"] #[inline(always)] - pub fn cmd2s(&self) -> CMD2S_R { - CMD2S_R::new(((self.bits >> 5) & 1) != 0) + pub fn cmd2s(&self) -> Cmd2sR { + Cmd2sR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Event 0 Detection Status"] #[inline(always)] - pub fn e0as(&self) -> E0AS_R { - E0AS_R::new(((self.bits >> 8) & 1) != 0) + pub fn e0as(&self) -> E0asR { + E0asR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 Detection Status"] #[inline(always)] - pub fn e1as(&self) -> E1AS_R { - E1AS_R::new(((self.bits >> 9) & 1) != 0) + pub fn e1as(&self) -> E1asR { + E1asR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 Detection Status"] #[inline(always)] - pub fn e2as(&self) -> E2AS_R { - E2AS_R::new(((self.bits >> 10) & 1) != 0) + pub fn e2as(&self) -> E2asR { + E2asR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Trap Flag Status"] #[inline(always)] - pub fn trpf(&self) -> TRPF_R { - TRPF_R::new(((self.bits >> 11) & 1) != 0) + pub fn trpf(&self) -> TrpfR { + TrpfR::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTS_SPEC; -impl crate::RegisterSpec for INTS_SPEC { +pub struct IntsSpec; +impl crate::RegisterSpec for IntsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ints::R`](R) reader structure"] -impl crate::Readable for INTS_SPEC {} +impl crate::Readable for IntsSpec {} #[doc = "`reset()` method sets INTS to value 0"] -impl crate::Resettable for INTS_SPEC { +impl crate::Resettable for IntsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/pr.rs b/src/ccu80_cc80/pr.rs index 33893da5..48f8c561 100644 --- a/src/ccu80_cc80/pr.rs +++ b/src/ccu80_cc80/pr.rs @@ -1,22 +1,22 @@ #[doc = "Register `PR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PR` reader - Period Register"] -pub type PR_R = crate::FieldReader; +pub type PrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new((self.bits & 0xffff) as u16) + pub fn pr(&self) -> PrR { + PrR::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PR_SPEC; -impl crate::RegisterSpec for PR_SPEC { +pub struct PrSpec; +impl crate::RegisterSpec for PrSpec { type Ux = u32; } #[doc = "`read()` method returns [`pr::R`](R) reader structure"] -impl crate::Readable for PR_SPEC {} +impl crate::Readable for PrSpec {} #[doc = "`reset()` method sets PR to value 0"] -impl crate::Resettable for PR_SPEC { +impl crate::Resettable for PrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/prs.rs b/src/ccu80_cc80/prs.rs index 42b94e8d..d281b0ba 100644 --- a/src/ccu80_cc80/prs.rs +++ b/src/ccu80_cc80/prs.rs @@ -1,49 +1,40 @@ #[doc = "Register `PRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRS` reader - Period Register"] -pub type PRS_R = crate::FieldReader; +pub type PrsR = crate::FieldReader; #[doc = "Field `PRS` writer - Period Register"] -pub type PRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn prs(&self) -> PRS_R { - PRS_R::new((self.bits & 0xffff) as u16) + pub fn prs(&self) -> PrsR { + PrsR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PRS_W { - PRS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn prs(&mut self) -> PrsW { + PrsW::new(self, 0) } } #[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRS_SPEC; -impl crate::RegisterSpec for PRS_SPEC { +pub struct PrsSpec; +impl crate::RegisterSpec for PrsSpec { type Ux = u32; } #[doc = "`read()` method returns [`prs::R`](R) reader structure"] -impl crate::Readable for PRS_SPEC {} +impl crate::Readable for PrsSpec {} #[doc = "`write(|w| ..)` method takes [`prs::W`](W) writer structure"] -impl crate::Writable for PRS_SPEC { +impl crate::Writable for PrsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS to value 0"] -impl crate::Resettable for PRS_SPEC { +impl crate::Resettable for PrsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/psc.rs b/src/ccu80_cc80/psc.rs index bf44f412..f5e97989 100644 --- a/src/ccu80_cc80/psc.rs +++ b/src/ccu80_cc80/psc.rs @@ -1,49 +1,40 @@ #[doc = "Register `PSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PSIV` reader - Prescaler Initial Value"] -pub type PSIV_R = crate::FieldReader; +pub type PsivR = crate::FieldReader; #[doc = "Field `PSIV` writer - Prescaler Initial Value"] -pub type PSIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PsivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - pub fn psiv(&self) -> PSIV_R { - PSIV_R::new((self.bits & 0x0f) as u8) + pub fn psiv(&self) -> PsivR { + PsivR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] #[must_use] - pub fn psiv(&mut self) -> PSIV_W { - PSIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn psiv(&mut self) -> PsivW { + PsivW::new(self, 0) } } #[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSC_SPEC; -impl crate::RegisterSpec for PSC_SPEC { +pub struct PscSpec; +impl crate::RegisterSpec for PscSpec { type Ux = u32; } #[doc = "`read()` method returns [`psc::R`](R) reader structure"] -impl crate::Readable for PSC_SPEC {} +impl crate::Readable for PscSpec {} #[doc = "`write(|w| ..)` method takes [`psc::W`](W) writer structure"] -impl crate::Writable for PSC_SPEC { +impl crate::Writable for PscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSC to value 0"] -impl crate::Resettable for PSC_SPEC { +impl crate::Resettable for PscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/psl.rs b/src/ccu80_cc80/psl.rs index 6543fc9e..080e6c3a 100644 --- a/src/ccu80_cc80/psl.rs +++ b/src/ccu80_cc80/psl.rs @@ -1,290 +1,281 @@ #[doc = "Register `PSL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSL` writer"] -pub type W = crate::W; -#[doc = "Field `PSL11` reader - Output Passive Level for CCU8x.OUTy0"] -pub type PSL11_R = crate::BitReader; +pub type W = crate::W; #[doc = "Output Passive Level for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSL11_A { +pub enum Psl11 { #[doc = "0: Passive Level is LOW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Passive Level is HIGH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSL11_A) -> Self { + fn from(variant: Psl11) -> Self { variant as u8 != 0 } } -impl PSL11_R { +#[doc = "Field `PSL11` reader - Output Passive Level for CCU8x.OUTy0"] +pub type Psl11R = crate::BitReader; +impl Psl11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSL11_A { + pub const fn variant(&self) -> Psl11 { match self.bits { - false => PSL11_A::VALUE1, - true => PSL11_A::VALUE2, + false => Psl11::Value1, + true => Psl11::Value2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSL11_A::VALUE1 + *self == Psl11::Value1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSL11_A::VALUE2 + *self == Psl11::Value2 } } #[doc = "Field `PSL11` writer - Output Passive Level for CCU8x.OUTy0"] -pub type PSL11_W<'a, REG> = crate::BitWriter<'a, REG, PSL11_A>; -impl<'a, REG> PSL11_W<'a, REG> +pub type Psl11W<'a, REG> = crate::BitWriter<'a, REG, Psl11>; +impl<'a, REG> Psl11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PSL11_A::VALUE1) + self.variant(Psl11::Value1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PSL11_A::VALUE2) + self.variant(Psl11::Value2) } } -#[doc = "Field `PSL12` reader - Output Passive Level for CCU8x.OUTy1"] -pub type PSL12_R = crate::BitReader; #[doc = "Output Passive Level for CCU8x.OUTy1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSL12_A { +pub enum Psl12 { #[doc = "0: Passive Level is LOW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Passive Level is HIGH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSL12_A) -> Self { + fn from(variant: Psl12) -> Self { variant as u8 != 0 } } -impl PSL12_R { +#[doc = "Field `PSL12` reader - Output Passive Level for CCU8x.OUTy1"] +pub type Psl12R = crate::BitReader; +impl Psl12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSL12_A { + pub const fn variant(&self) -> Psl12 { match self.bits { - false => PSL12_A::VALUE1, - true => PSL12_A::VALUE2, + false => Psl12::Value1, + true => Psl12::Value2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSL12_A::VALUE1 + *self == Psl12::Value1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSL12_A::VALUE2 + *self == Psl12::Value2 } } #[doc = "Field `PSL12` writer - Output Passive Level for CCU8x.OUTy1"] -pub type PSL12_W<'a, REG> = crate::BitWriter<'a, REG, PSL12_A>; -impl<'a, REG> PSL12_W<'a, REG> +pub type Psl12W<'a, REG> = crate::BitWriter<'a, REG, Psl12>; +impl<'a, REG> Psl12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PSL12_A::VALUE1) + self.variant(Psl12::Value1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PSL12_A::VALUE2) + self.variant(Psl12::Value2) } } -#[doc = "Field `PSL21` reader - Output Passive Level for CCU8x.OUTy2"] -pub type PSL21_R = crate::BitReader; #[doc = "Output Passive Level for CCU8x.OUTy2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSL21_A { +pub enum Psl21 { #[doc = "0: Passive Level is LOW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Passive Level is HIGH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSL21_A) -> Self { + fn from(variant: Psl21) -> Self { variant as u8 != 0 } } -impl PSL21_R { +#[doc = "Field `PSL21` reader - Output Passive Level for CCU8x.OUTy2"] +pub type Psl21R = crate::BitReader; +impl Psl21R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSL21_A { + pub const fn variant(&self) -> Psl21 { match self.bits { - false => PSL21_A::VALUE1, - true => PSL21_A::VALUE2, + false => Psl21::Value1, + true => Psl21::Value2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSL21_A::VALUE1 + *self == Psl21::Value1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSL21_A::VALUE2 + *self == Psl21::Value2 } } #[doc = "Field `PSL21` writer - Output Passive Level for CCU8x.OUTy2"] -pub type PSL21_W<'a, REG> = crate::BitWriter<'a, REG, PSL21_A>; -impl<'a, REG> PSL21_W<'a, REG> +pub type Psl21W<'a, REG> = crate::BitWriter<'a, REG, Psl21>; +impl<'a, REG> Psl21W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PSL21_A::VALUE1) + self.variant(Psl21::Value1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PSL21_A::VALUE2) + self.variant(Psl21::Value2) } } -#[doc = "Field `PSL22` reader - Output Passive Level for CCU8x.OUTy3"] -pub type PSL22_R = crate::BitReader; #[doc = "Output Passive Level for CCU8x.OUTy3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSL22_A { +pub enum Psl22 { #[doc = "0: Passive Level is LOW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Passive Level is HIGH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSL22_A) -> Self { + fn from(variant: Psl22) -> Self { variant as u8 != 0 } } -impl PSL22_R { +#[doc = "Field `PSL22` reader - Output Passive Level for CCU8x.OUTy3"] +pub type Psl22R = crate::BitReader; +impl Psl22R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSL22_A { + pub const fn variant(&self) -> Psl22 { match self.bits { - false => PSL22_A::VALUE1, - true => PSL22_A::VALUE2, + false => Psl22::Value1, + true => Psl22::Value2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSL22_A::VALUE1 + *self == Psl22::Value1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSL22_A::VALUE2 + *self == Psl22::Value2 } } #[doc = "Field `PSL22` writer - Output Passive Level for CCU8x.OUTy3"] -pub type PSL22_W<'a, REG> = crate::BitWriter<'a, REG, PSL22_A>; -impl<'a, REG> PSL22_W<'a, REG> +pub type Psl22W<'a, REG> = crate::BitWriter<'a, REG, Psl22>; +impl<'a, REG> Psl22W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PSL22_A::VALUE1) + self.variant(Psl22::Value1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PSL22_A::VALUE2) + self.variant(Psl22::Value2) } } impl R { #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"] #[inline(always)] - pub fn psl11(&self) -> PSL11_R { - PSL11_R::new((self.bits & 1) != 0) + pub fn psl11(&self) -> Psl11R { + Psl11R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"] #[inline(always)] - pub fn psl12(&self) -> PSL12_R { - PSL12_R::new(((self.bits >> 1) & 1) != 0) + pub fn psl12(&self) -> Psl12R { + Psl12R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"] #[inline(always)] - pub fn psl21(&self) -> PSL21_R { - PSL21_R::new(((self.bits >> 2) & 1) != 0) + pub fn psl21(&self) -> Psl21R { + Psl21R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"] #[inline(always)] - pub fn psl22(&self) -> PSL22_R { - PSL22_R::new(((self.bits >> 3) & 1) != 0) + pub fn psl22(&self) -> Psl22R { + Psl22R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn psl11(&mut self) -> PSL11_W { - PSL11_W::new(self, 0) + pub fn psl11(&mut self) -> Psl11W { + Psl11W::new(self, 0) } #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn psl12(&mut self) -> PSL12_W { - PSL12_W::new(self, 1) + pub fn psl12(&mut self) -> Psl12W { + Psl12W::new(self, 1) } #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn psl21(&mut self) -> PSL21_W { - PSL21_W::new(self, 2) + pub fn psl21(&mut self) -> Psl21W { + Psl21W::new(self, 2) } #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn psl22(&mut self) -> PSL22_W { - PSL22_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn psl22(&mut self) -> Psl22W { + Psl22W::new(self, 3) } } #[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSL_SPEC; -impl crate::RegisterSpec for PSL_SPEC { +pub struct PslSpec; +impl crate::RegisterSpec for PslSpec { type Ux = u32; } #[doc = "`read()` method returns [`psl::R`](R) reader structure"] -impl crate::Readable for PSL_SPEC {} +impl crate::Readable for PslSpec {} #[doc = "`write(|w| ..)` method takes [`psl::W`](W) writer structure"] -impl crate::Writable for PSL_SPEC { +impl crate::Writable for PslSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSL to value 0"] -impl crate::Resettable for PSL_SPEC { +impl crate::Resettable for PslSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/srs.rs b/src/ccu80_cc80/srs.rs index 1d685048..2bc2fc29 100644 --- a/src/ccu80_cc80/srs.rs +++ b/src/ccu80_cc80/srs.rs @@ -1,67 +1,67 @@ #[doc = "Register `SRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRS` writer"] -pub type W = crate::W; -#[doc = "Field `POSR` reader - Period/One match Service request selector"] -pub type POSR_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Period/One match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum POSR_A { +pub enum Posr { #[doc = "0: Forward to CC8ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC8ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: POSR_A) -> Self { + fn from(variant: Posr) -> Self { variant as _ } } -impl crate::FieldSpec for POSR_A { +impl crate::FieldSpec for Posr { type Ux = u8; } -impl POSR_R { +#[doc = "Field `POSR` reader - Period/One match Service request selector"] +pub type PosrR = crate::FieldReader; +impl PosrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSR_A { + pub const fn variant(&self) -> Posr { match self.bits { - 0 => POSR_A::VALUE1, - 1 => POSR_A::VALUE2, - 2 => POSR_A::VALUE3, - 3 => POSR_A::VALUE4, + 0 => Posr::Value1, + 1 => Posr::Value2, + 2 => Posr::Value3, + 3 => Posr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSR_A::VALUE1 + *self == Posr::Value1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSR_A::VALUE2 + *self == Posr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == POSR_A::VALUE3 + *self == Posr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == POSR_A::VALUE4 + *self == Posr::Value4 } } #[doc = "Field `POSR` writer - Period/One match Service request selector"] -pub type POSR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, POSR_A>; -impl<'a, REG> POSR_W<'a, REG> +pub type PosrW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Posr>; +impl<'a, REG> PosrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE1) + self.variant(Posr::Value1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE2) + self.variant(Posr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE3) + self.variant(Posr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(POSR_A::VALUE4) + self.variant(Posr::Value4) } } -#[doc = "Field `CM1SR` reader - Channel 1 Compare match Service request selector"] -pub type CM1SR_R = crate::FieldReader; #[doc = "Channel 1 Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM1SR_A { +pub enum Cm1sr { #[doc = "0: Forward to CC8ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC8ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM1SR_A) -> Self { + fn from(variant: Cm1sr) -> Self { variant as _ } } -impl crate::FieldSpec for CM1SR_A { +impl crate::FieldSpec for Cm1sr { type Ux = u8; } -impl CM1SR_R { +#[doc = "Field `CM1SR` reader - Channel 1 Compare match Service request selector"] +pub type Cm1srR = crate::FieldReader; +impl Cm1srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM1SR_A { + pub const fn variant(&self) -> Cm1sr { match self.bits { - 0 => CM1SR_A::VALUE1, - 1 => CM1SR_A::VALUE2, - 2 => CM1SR_A::VALUE3, - 3 => CM1SR_A::VALUE4, + 0 => Cm1sr::Value1, + 1 => Cm1sr::Value2, + 2 => Cm1sr::Value3, + 3 => Cm1sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM1SR_A::VALUE1 + *self == Cm1sr::Value1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM1SR_A::VALUE2 + *self == Cm1sr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM1SR_A::VALUE3 + *self == Cm1sr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM1SR_A::VALUE4 + *self == Cm1sr::Value4 } } #[doc = "Field `CM1SR` writer - Channel 1 Compare match Service request selector"] -pub type CM1SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM1SR_A>; -impl<'a, REG> CM1SR_W<'a, REG> +pub type Cm1srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm1sr>; +impl<'a, REG> Cm1srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM1SR_A::VALUE1) + self.variant(Cm1sr::Value1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM1SR_A::VALUE2) + self.variant(Cm1sr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM1SR_A::VALUE3) + self.variant(Cm1sr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM1SR_A::VALUE4) + self.variant(Cm1sr::Value4) } } -#[doc = "Field `CM2SR` reader - Channel 2 Compare match Service request selector"] -pub type CM2SR_R = crate::FieldReader; #[doc = "Channel 2 Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM2SR_A { +pub enum Cm2sr { #[doc = "0: Forward to CC8ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC8ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM2SR_A) -> Self { + fn from(variant: Cm2sr) -> Self { variant as _ } } -impl crate::FieldSpec for CM2SR_A { +impl crate::FieldSpec for Cm2sr { type Ux = u8; } -impl CM2SR_R { +#[doc = "Field `CM2SR` reader - Channel 2 Compare match Service request selector"] +pub type Cm2srR = crate::FieldReader; +impl Cm2srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM2SR_A { + pub const fn variant(&self) -> Cm2sr { match self.bits { - 0 => CM2SR_A::VALUE1, - 1 => CM2SR_A::VALUE2, - 2 => CM2SR_A::VALUE3, - 3 => CM2SR_A::VALUE4, + 0 => Cm2sr::Value1, + 1 => Cm2sr::Value2, + 2 => Cm2sr::Value3, + 3 => Cm2sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM2SR_A::VALUE1 + *self == Cm2sr::Value1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM2SR_A::VALUE2 + *self == Cm2sr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM2SR_A::VALUE3 + *self == Cm2sr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM2SR_A::VALUE4 + *self == Cm2sr::Value4 } } #[doc = "Field `CM2SR` writer - Channel 2 Compare match Service request selector"] -pub type CM2SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM2SR_A>; -impl<'a, REG> CM2SR_W<'a, REG> +pub type Cm2srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm2sr>; +impl<'a, REG> Cm2srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM2SR_A::VALUE1) + self.variant(Cm2sr::Value1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM2SR_A::VALUE2) + self.variant(Cm2sr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM2SR_A::VALUE3) + self.variant(Cm2sr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM2SR_A::VALUE4) + self.variant(Cm2sr::Value4) } } -#[doc = "Field `E0SR` reader - Event 0 Service request selector"] -pub type E0SR_R = crate::FieldReader; #[doc = "Event 0 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E0SR_A { +pub enum E0sr { #[doc = "0: Forward to CCvySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC8ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E0SR_A) -> Self { + fn from(variant: E0sr) -> Self { variant as _ } } -impl crate::FieldSpec for E0SR_A { +impl crate::FieldSpec for E0sr { type Ux = u8; } -impl E0SR_R { +#[doc = "Field `E0SR` reader - Event 0 Service request selector"] +pub type E0srR = crate::FieldReader; +impl E0srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0SR_A { + pub const fn variant(&self) -> E0sr { match self.bits { - 0 => E0SR_A::VALUE1, - 1 => E0SR_A::VALUE2, - 2 => E0SR_A::VALUE3, - 3 => E0SR_A::VALUE4, + 0 => E0sr::Value1, + 1 => E0sr::Value2, + 2 => E0sr::Value3, + 3 => E0sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CCvySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0SR_A::VALUE1 + *self == E0sr::Value1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0SR_A::VALUE2 + *self == E0sr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E0SR_A::VALUE3 + *self == E0sr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E0SR_A::VALUE4 + *self == E0sr::Value4 } } #[doc = "Field `E0SR` writer - Event 0 Service request selector"] -pub type E0SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E0SR_A>; -impl<'a, REG> E0SR_W<'a, REG> +pub type E0srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E0sr>; +impl<'a, REG> E0srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Forward to CCvySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE1) + self.variant(E0sr::Value1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE2) + self.variant(E0sr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE3) + self.variant(E0sr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E0SR_A::VALUE4) + self.variant(E0sr::Value4) } } -#[doc = "Field `E1SR` reader - Event 1 Service request selector"] -pub type E1SR_R = crate::FieldReader; #[doc = "Event 1 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E1SR_A { +pub enum E1sr { #[doc = "0: Forward to CC8ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CC8ySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E1SR_A) -> Self { + fn from(variant: E1sr) -> Self { variant as _ } } -impl crate::FieldSpec for E1SR_A { +impl crate::FieldSpec for E1sr { type Ux = u8; } -impl E1SR_R { +#[doc = "Field `E1SR` reader - Event 1 Service request selector"] +pub type E1srR = crate::FieldReader; +impl E1srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1SR_A { + pub const fn variant(&self) -> E1sr { match self.bits { - 0 => E1SR_A::VALUE1, - 1 => E1SR_A::VALUE2, - 2 => E1SR_A::VALUE3, - 3 => E1SR_A::VALUE4, + 0 => E1sr::Value1, + 1 => E1sr::Value2, + 2 => E1sr::Value3, + 3 => E1sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1SR_A::VALUE1 + *self == E1sr::Value1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1SR_A::VALUE2 + *self == E1sr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E1SR_A::VALUE3 + *self == E1sr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E1SR_A::VALUE4 + *self == E1sr::Value4 } } #[doc = "Field `E1SR` writer - Event 1 Service request selector"] -pub type E1SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E1SR_A>; -impl<'a, REG> E1SR_W<'a, REG> +pub type E1srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E1sr>; +impl<'a, REG> E1srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE1) + self.variant(E1sr::Value1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE2) + self.variant(E1sr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE3) + self.variant(E1sr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E1SR_A::VALUE4) + self.variant(E1sr::Value4) } } -#[doc = "Field `E2SR` reader - Event 2 Service request selector"] -pub type E2SR_R = crate::FieldReader; #[doc = "Event 2 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E2SR_A { +pub enum E2sr { #[doc = "0: Forward to CC8ySR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Forward to CCvySR1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Forward to CC8ySR2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Forward to CC8ySR3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E2SR_A) -> Self { + fn from(variant: E2sr) -> Self { variant as _ } } -impl crate::FieldSpec for E2SR_A { +impl crate::FieldSpec for E2sr { type Ux = u8; } -impl E2SR_R { +#[doc = "Field `E2SR` reader - Event 2 Service request selector"] +pub type E2srR = crate::FieldReader; +impl E2srR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2SR_A { + pub const fn variant(&self) -> E2sr { match self.bits { - 0 => E2SR_A::VALUE1, - 1 => E2SR_A::VALUE2, - 2 => E2SR_A::VALUE3, - 3 => E2SR_A::VALUE4, + 0 => E2sr::Value1, + 1 => E2sr::Value2, + 2 => E2sr::Value3, + 3 => E2sr::Value4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2SR_A::VALUE1 + *self == E2sr::Value1 } #[doc = "Forward to CCvySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2SR_A::VALUE2 + *self == E2sr::Value2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E2SR_A::VALUE3 + *self == E2sr::Value3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E2SR_A::VALUE4 + *self == E2sr::Value4 } } #[doc = "Field `E2SR` writer - Event 2 Service request selector"] -pub type E2SR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E2SR_A>; -impl<'a, REG> E2SR_W<'a, REG> +pub type E2srW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, E2sr>; +impl<'a, REG> E2srW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,117 +494,108 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE1) + self.variant(E2sr::Value1) } #[doc = "Forward to CCvySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE2) + self.variant(E2sr::Value2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE3) + self.variant(E2sr::Value3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E2SR_A::VALUE4) + self.variant(E2sr::Value4) } } impl R { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - pub fn posr(&self) -> POSR_R { - POSR_R::new((self.bits & 3) as u8) + pub fn posr(&self) -> PosrR { + PosrR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"] #[inline(always)] - pub fn cm1sr(&self) -> CM1SR_R { - CM1SR_R::new(((self.bits >> 2) & 3) as u8) + pub fn cm1sr(&self) -> Cm1srR { + Cm1srR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"] #[inline(always)] - pub fn cm2sr(&self) -> CM2SR_R { - CM2SR_R::new(((self.bits >> 4) & 3) as u8) + pub fn cm2sr(&self) -> Cm2srR { + Cm2srR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - pub fn e0sr(&self) -> E0SR_R { - E0SR_R::new(((self.bits >> 8) & 3) as u8) + pub fn e0sr(&self) -> E0srR { + E0srR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - pub fn e1sr(&self) -> E1SR_R { - E1SR_R::new(((self.bits >> 10) & 3) as u8) + pub fn e1sr(&self) -> E1srR { + E1srR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - pub fn e2sr(&self) -> E2SR_R { - E2SR_R::new(((self.bits >> 12) & 3) as u8) + pub fn e2sr(&self) -> E2srR { + E2srR::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] #[must_use] - pub fn posr(&mut self) -> POSR_W { - POSR_W::new(self, 0) + pub fn posr(&mut self) -> PosrW { + PosrW::new(self, 0) } #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cm1sr(&mut self) -> CM1SR_W { - CM1SR_W::new(self, 2) + pub fn cm1sr(&mut self) -> Cm1srW { + Cm1srW::new(self, 2) } #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cm2sr(&mut self) -> CM2SR_W { - CM2SR_W::new(self, 4) + pub fn cm2sr(&mut self) -> Cm2srW { + Cm2srW::new(self, 4) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] #[must_use] - pub fn e0sr(&mut self) -> E0SR_W { - E0SR_W::new(self, 8) + pub fn e0sr(&mut self) -> E0srW { + E0srW::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] #[must_use] - pub fn e1sr(&mut self) -> E1SR_W { - E1SR_W::new(self, 10) + pub fn e1sr(&mut self) -> E1srW { + E1srW::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] #[must_use] - pub fn e2sr(&mut self) -> E2SR_W { - E2SR_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn e2sr(&mut self) -> E2srW { + E2srW::new(self, 12) } } #[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRS_SPEC; -impl crate::RegisterSpec for SRS_SPEC { +pub struct SrsSpec; +impl crate::RegisterSpec for SrsSpec { type Ux = u32; } #[doc = "`read()` method returns [`srs::R`](R) reader structure"] -impl crate::Readable for SRS_SPEC {} +impl crate::Readable for SrsSpec {} #[doc = "`write(|w| ..)` method takes [`srs::W`](W) writer structure"] -impl crate::Writable for SRS_SPEC { +impl crate::Writable for SrsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRS to value 0"] -impl crate::Resettable for SRS_SPEC { +impl crate::Resettable for SrsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/stc.rs b/src/ccu80_cc80/stc.rs index bbbd2557..30aa7cd1 100644 --- a/src/ccu80_cc80/stc.rs +++ b/src/ccu80_cc80/stc.rs @@ -1,112 +1,112 @@ #[doc = "Register `STC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STC` writer"] -pub type W = crate::W; -#[doc = "Field `CSE` reader - Cascaded shadow transfer enable"] -pub type CSE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Cascaded shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSE_A { +pub enum Cse { #[doc = "0: Cascaded shadow transfer disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Cascaded shadow transfer enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSE_A) -> Self { + fn from(variant: Cse) -> Self { variant as u8 != 0 } } -impl CSE_R { +#[doc = "Field `CSE` reader - Cascaded shadow transfer enable"] +pub type CseR = crate::BitReader; +impl CseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CSE_A { + pub const fn variant(&self) -> Cse { match self.bits { - false => CSE_A::VALUE1, - true => CSE_A::VALUE2, + false => Cse::Value1, + true => Cse::Value2, } } #[doc = "Cascaded shadow transfer disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CSE_A::VALUE1 + *self == Cse::Value1 } #[doc = "Cascaded shadow transfer enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CSE_A::VALUE2 + *self == Cse::Value2 } } #[doc = "Field `CSE` writer - Cascaded shadow transfer enable"] -pub type CSE_W<'a, REG> = crate::BitWriter<'a, REG, CSE_A>; -impl<'a, REG> CSE_W<'a, REG> +pub type CseW<'a, REG> = crate::BitWriter<'a, REG, Cse>; +impl<'a, REG> CseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Cascaded shadow transfer disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSE_A::VALUE1) + self.variant(Cse::Value1) } #[doc = "Cascaded shadow transfer enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSE_A::VALUE2) + self.variant(Cse::Value2) } } -#[doc = "Field `STM` reader - Shadow transfer mode"] -pub type STM_R = crate::FieldReader; #[doc = "Shadow transfer mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STM_A { +pub enum Stm { #[doc = "0: Shadow transfer is done in Period Match and One match."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer is done only in Period Match."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Shadow transfer is done only in One Match."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STM_A) -> Self { + fn from(variant: Stm) -> Self { variant as _ } } -impl crate::FieldSpec for STM_A { +impl crate::FieldSpec for Stm { type Ux = u8; } -impl STM_R { +#[doc = "Field `STM` reader - Shadow transfer mode"] +pub type StmR = crate::FieldReader; +impl StmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STM_A::VALUE1), - 1 => Some(STM_A::VALUE2), - 2 => Some(STM_A::VALUE3), + 0 => Some(Stm::Value1), + 1 => Some(Stm::Value2), + 2 => Some(Stm::Value3), _ => None, } } #[doc = "Shadow transfer is done in Period Match and One match."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STM_A::VALUE1 + *self == Stm::Value1 } #[doc = "Shadow transfer is done only in Period Match."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STM_A::VALUE2 + *self == Stm::Value2 } #[doc = "Shadow transfer is done only in One Match."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STM_A::VALUE3 + *self == Stm::Value3 } } #[doc = "Field `STM` writer - Shadow transfer mode"] -pub type STM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STM_A>; -impl<'a, REG> STM_W<'a, REG> +pub type StmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stm>; +impl<'a, REG> StmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -114,68 +114,59 @@ where #[doc = "Shadow transfer is done in Period Match and One match."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STM_A::VALUE1) + self.variant(Stm::Value1) } #[doc = "Shadow transfer is done only in Period Match."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STM_A::VALUE2) + self.variant(Stm::Value2) } #[doc = "Shadow transfer is done only in One Match."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STM_A::VALUE3) + self.variant(Stm::Value3) } } impl R { #[doc = "Bit 0 - Cascaded shadow transfer enable"] #[inline(always)] - pub fn cse(&self) -> CSE_R { - CSE_R::new((self.bits & 1) != 0) + pub fn cse(&self) -> CseR { + CseR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Shadow transfer mode"] #[inline(always)] - pub fn stm(&self) -> STM_R { - STM_R::new(((self.bits >> 1) & 3) as u8) + pub fn stm(&self) -> StmR { + StmR::new(((self.bits >> 1) & 3) as u8) } } impl W { #[doc = "Bit 0 - Cascaded shadow transfer enable"] #[inline(always)] #[must_use] - pub fn cse(&mut self) -> CSE_W { - CSE_W::new(self, 0) + pub fn cse(&mut self) -> CseW { + CseW::new(self, 0) } #[doc = "Bits 1:2 - Shadow transfer mode"] #[inline(always)] #[must_use] - pub fn stm(&mut self) -> STM_W { - STM_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn stm(&mut self) -> StmW { + StmW::new(self, 1) } } #[doc = "Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STC_SPEC; -impl crate::RegisterSpec for STC_SPEC { +pub struct StcSpec; +impl crate::RegisterSpec for StcSpec { type Ux = u32; } #[doc = "`read()` method returns [`stc::R`](R) reader structure"] -impl crate::Readable for STC_SPEC {} +impl crate::Readable for StcSpec {} #[doc = "`write(|w| ..)` method takes [`stc::W`](W) writer structure"] -impl crate::Writable for STC_SPEC { +impl crate::Writable for StcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STC to value 0"] -impl crate::Resettable for STC_SPEC { +impl crate::Resettable for StcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/swr.rs b/src/ccu80_cc80/swr.rs index 3ef115ef..2fd7193f 100644 --- a/src/ccu80_cc80/swr.rs +++ b/src/ccu80_cc80/swr.rs @@ -1,108 +1,99 @@ #[doc = "Register `SWR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPM` writer - Period match while counting up clear"] -pub type RPM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ROM` writer - One match while counting down clear"] -pub type ROM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RomW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM1U` writer - Channel 1 Compare match while counting up clear"] -pub type RCM1U_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rcm1uW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM1D` writer - Channel 1 Compare match while counting down clear"] -pub type RCM1D_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rcm1dW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM2U` writer - Channel 2 Compare match while counting up clear"] -pub type RCM2U_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rcm2uW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM2D` writer - Channel 2 Compare match while counting down clear"] -pub type RCM2D_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rcm2dW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE0A` writer - Event 0 detection clear"] -pub type RE0A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re0aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE1A` writer - Event 1 detection clear"] -pub type RE1A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re1aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE2A` writer - Event 2 detection clear"] -pub type RE2A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Re2aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTRPF` writer - Trap Flag status clear"] -pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RtrpfW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] #[must_use] - pub fn rpm(&mut self) -> RPM_W { - RPM_W::new(self, 0) + pub fn rpm(&mut self) -> RpmW { + RpmW::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] #[must_use] - pub fn rom(&mut self) -> ROM_W { - ROM_W::new(self, 1) + pub fn rom(&mut self) -> RomW { + RomW::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcm1u(&mut self) -> RCM1U_W { - RCM1U_W::new(self, 2) + pub fn rcm1u(&mut self) -> Rcm1uW { + Rcm1uW::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcm1d(&mut self) -> RCM1D_W { - RCM1D_W::new(self, 3) + pub fn rcm1d(&mut self) -> Rcm1dW { + Rcm1dW::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcm2u(&mut self) -> RCM2U_W { - RCM2U_W::new(self, 4) + pub fn rcm2u(&mut self) -> Rcm2uW { + Rcm2uW::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcm2d(&mut self) -> RCM2D_W { - RCM2D_W::new(self, 5) + pub fn rcm2d(&mut self) -> Rcm2dW { + Rcm2dW::new(self, 5) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] #[must_use] - pub fn re0a(&mut self) -> RE0A_W { - RE0A_W::new(self, 8) + pub fn re0a(&mut self) -> Re0aW { + Re0aW::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] #[must_use] - pub fn re1a(&mut self) -> RE1A_W { - RE1A_W::new(self, 9) + pub fn re1a(&mut self) -> Re1aW { + Re1aW::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] #[must_use] - pub fn re2a(&mut self) -> RE2A_W { - RE2A_W::new(self, 10) + pub fn re2a(&mut self) -> Re2aW { + Re2aW::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] #[must_use] - pub fn rtrpf(&mut self) -> RTRPF_W { - RTRPF_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rtrpf(&mut self) -> RtrpfW { + RtrpfW::new(self, 11) } } #[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SWR_SPEC; -impl crate::RegisterSpec for SWR_SPEC { +pub struct SwrSpec; +impl crate::RegisterSpec for SwrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`swr::W`](W) writer structure"] -impl crate::Writable for SWR_SPEC { +impl crate::Writable for SwrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWR to value 0"] -impl crate::Resettable for SWR_SPEC { +impl crate::Resettable for SwrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/sws.rs b/src/ccu80_cc80/sws.rs index 1bfa6e8d..f84dfd9f 100644 --- a/src/ccu80_cc80/sws.rs +++ b/src/ccu80_cc80/sws.rs @@ -1,108 +1,99 @@ #[doc = "Register `SWS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SPM` writer - Period match while counting up set"] -pub type SPM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SpmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOM` writer - One match while counting down set"] -pub type SOM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SomW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM1U` writer - Channel 1 Compare match while counting up set"] -pub type SCM1U_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Scm1uW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM1D` writer - Channel 1 Compare match while counting down set"] -pub type SCM1D_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Scm1dW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM2U` writer - Compare match while counting up set"] -pub type SCM2U_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Scm2uW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM2D` writer - Compare match while counting down set"] -pub type SCM2D_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Scm2dW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE0A` writer - Event 0 detection set"] -pub type SE0A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se0aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE1A` writer - Event 1 detection set"] -pub type SE1A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se1aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE2A` writer - Event 2 detection set"] -pub type SE2A_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Se2aW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRPF` writer - Trap Flag status set"] -pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StrpfW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] #[must_use] - pub fn spm(&mut self) -> SPM_W { - SPM_W::new(self, 0) + pub fn spm(&mut self) -> SpmW { + SpmW::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] #[must_use] - pub fn som(&mut self) -> SOM_W { - SOM_W::new(self, 1) + pub fn som(&mut self) -> SomW { + SomW::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scm1u(&mut self) -> SCM1U_W { - SCM1U_W::new(self, 2) + pub fn scm1u(&mut self) -> Scm1uW { + Scm1uW::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scm1d(&mut self) -> SCM1D_W { - SCM1D_W::new(self, 3) + pub fn scm1d(&mut self) -> Scm1dW { + Scm1dW::new(self, 3) } #[doc = "Bit 4 - Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scm2u(&mut self) -> SCM2U_W { - SCM2U_W::new(self, 4) + pub fn scm2u(&mut self) -> Scm2uW { + Scm2uW::new(self, 4) } #[doc = "Bit 5 - Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scm2d(&mut self) -> SCM2D_W { - SCM2D_W::new(self, 5) + pub fn scm2d(&mut self) -> Scm2dW { + Scm2dW::new(self, 5) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] #[must_use] - pub fn se0a(&mut self) -> SE0A_W { - SE0A_W::new(self, 8) + pub fn se0a(&mut self) -> Se0aW { + Se0aW::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] #[must_use] - pub fn se1a(&mut self) -> SE1A_W { - SE1A_W::new(self, 9) + pub fn se1a(&mut self) -> Se1aW { + Se1aW::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] #[must_use] - pub fn se2a(&mut self) -> SE2A_W { - SE2A_W::new(self, 10) + pub fn se2a(&mut self) -> Se2aW { + Se2aW::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] #[must_use] - pub fn strpf(&mut self) -> STRPF_W { - STRPF_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn strpf(&mut self) -> StrpfW { + StrpfW::new(self, 11) } } #[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SWS_SPEC; -impl crate::RegisterSpec for SWS_SPEC { +pub struct SwsSpec; +impl crate::RegisterSpec for SwsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sws::W`](W) writer structure"] -impl crate::Writable for SWS_SPEC { +impl crate::Writable for SwsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWS to value 0"] -impl crate::Resettable for SWS_SPEC { +impl crate::Resettable for SwsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tc.rs b/src/ccu80_cc80/tc.rs index 6dcad718..01feb00a 100644 --- a/src/ccu80_cc80/tc.rs +++ b/src/ccu80_cc80/tc.rs @@ -1,266 +1,266 @@ #[doc = "Register `TC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TC` writer"] -pub type W = crate::W; -#[doc = "Field `TCM` reader - Timer Counting Mode"] -pub type TCM_R = crate::BitReader; +pub type W = crate::W; #[doc = "Timer Counting Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TCM_A { +pub enum Tcm { #[doc = "0: Edge aligned mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Center aligned mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TCM_A) -> Self { + fn from(variant: Tcm) -> Self { variant as u8 != 0 } } -impl TCM_R { +#[doc = "Field `TCM` reader - Timer Counting Mode"] +pub type TcmR = crate::BitReader; +impl TcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TCM_A { + pub const fn variant(&self) -> Tcm { match self.bits { - false => TCM_A::VALUE1, - true => TCM_A::VALUE2, + false => Tcm::Value1, + true => Tcm::Value2, } } #[doc = "Edge aligned mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TCM_A::VALUE1 + *self == Tcm::Value1 } #[doc = "Center aligned mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TCM_A::VALUE2 + *self == Tcm::Value2 } } #[doc = "Field `TCM` writer - Timer Counting Mode"] -pub type TCM_W<'a, REG> = crate::BitWriter<'a, REG, TCM_A>; -impl<'a, REG> TCM_W<'a, REG> +pub type TcmW<'a, REG> = crate::BitWriter<'a, REG, Tcm>; +impl<'a, REG> TcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Edge aligned mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TCM_A::VALUE1) + self.variant(Tcm::Value1) } #[doc = "Center aligned mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TCM_A::VALUE2) + self.variant(Tcm::Value2) } } -#[doc = "Field `TSSM` reader - Timer Single Shot Mode"] -pub type TSSM_R = crate::BitReader; #[doc = "Timer Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSSM_A { +pub enum Tssm { #[doc = "0: Single shot mode is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single shot mode is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSSM_A) -> Self { + fn from(variant: Tssm) -> Self { variant as u8 != 0 } } -impl TSSM_R { +#[doc = "Field `TSSM` reader - Timer Single Shot Mode"] +pub type TssmR = crate::BitReader; +impl TssmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSSM_A { + pub const fn variant(&self) -> Tssm { match self.bits { - false => TSSM_A::VALUE1, - true => TSSM_A::VALUE2, + false => Tssm::Value1, + true => Tssm::Value2, } } #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSSM_A::VALUE1 + *self == Tssm::Value1 } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSSM_A::VALUE2 + *self == Tssm::Value2 } } #[doc = "Field `TSSM` writer - Timer Single Shot Mode"] -pub type TSSM_W<'a, REG> = crate::BitWriter<'a, REG, TSSM_A>; -impl<'a, REG> TSSM_W<'a, REG> +pub type TssmW<'a, REG> = crate::BitWriter<'a, REG, Tssm>; +impl<'a, REG> TssmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSSM_A::VALUE1) + self.variant(Tssm::Value1) } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSSM_A::VALUE2) + self.variant(Tssm::Value2) } } #[doc = "Field `CLST` reader - Shadow Transfer on Clear"] -pub type CLST_R = crate::BitReader; +pub type ClstR = crate::BitReader; #[doc = "Field `CLST` writer - Shadow Transfer on Clear"] -pub type CLST_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `CMOD` reader - Capture Compare Mode"] -pub type CMOD_R = crate::BitReader; +pub type ClstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Capture Compare Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMOD_A { +pub enum Cmod { #[doc = "0: Compare Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMOD_A) -> Self { + fn from(variant: Cmod) -> Self { variant as u8 != 0 } } -impl CMOD_R { +#[doc = "Field `CMOD` reader - Capture Compare Mode"] +pub type CmodR = crate::BitReader; +impl CmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMOD_A { + pub const fn variant(&self) -> Cmod { match self.bits { - false => CMOD_A::VALUE1, - true => CMOD_A::VALUE2, + false => Cmod::Value1, + true => Cmod::Value2, } } #[doc = "Compare Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMOD_A::VALUE1 + *self == Cmod::Value1 } #[doc = "Capture Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMOD_A::VALUE2 + *self == Cmod::Value2 } } -#[doc = "Field `ECM` reader - Extended Capture Mode"] -pub type ECM_R = crate::BitReader; #[doc = "Extended Capture Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECM_A { +pub enum Ecm { #[doc = "0: Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the VPTR is cleared"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECM_A) -> Self { + fn from(variant: Ecm) -> Self { variant as u8 != 0 } } -impl ECM_R { +#[doc = "Field `ECM` reader - Extended Capture Mode"] +pub type EcmR = crate::BitReader; +impl EcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECM_A { + pub const fn variant(&self) -> Ecm { match self.bits { - false => ECM_A::VALUE1, - true => ECM_A::VALUE2, + false => Ecm::Value1, + true => Ecm::Value2, } } #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECM_A::VALUE1 + *self == Ecm::Value1 } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the VPTR is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECM_A::VALUE2 + *self == Ecm::Value2 } } #[doc = "Field `ECM` writer - Extended Capture Mode"] -pub type ECM_W<'a, REG> = crate::BitWriter<'a, REG, ECM_A>; -impl<'a, REG> ECM_W<'a, REG> +pub type EcmW<'a, REG> = crate::BitWriter<'a, REG, Ecm>; +impl<'a, REG> EcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECM_A::VALUE1) + self.variant(Ecm::Value1) } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the VPTR is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECM_A::VALUE2) + self.variant(Ecm::Value2) } } -#[doc = "Field `CAPC` reader - Clear on Capture Control"] -pub type CAPC_R = crate::FieldReader; #[doc = "Clear on Capture Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CAPC_A { +pub enum Capc { #[doc = "0: Timer is never cleared on a capture event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Timer is always cleared in a capture event."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CAPC_A) -> Self { + fn from(variant: Capc) -> Self { variant as _ } } -impl crate::FieldSpec for CAPC_A { +impl crate::FieldSpec for Capc { type Ux = u8; } -impl CAPC_R { +#[doc = "Field `CAPC` reader - Clear on Capture Control"] +pub type CapcR = crate::FieldReader; +impl CapcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAPC_A { + pub const fn variant(&self) -> Capc { match self.bits { - 0 => CAPC_A::VALUE1, - 1 => CAPC_A::VALUE2, - 2 => CAPC_A::VALUE3, - 3 => CAPC_A::VALUE4, + 0 => Capc::Value1, + 1 => Capc::Value2, + 2 => Capc::Value3, + 3 => Capc::Value4, _ => unreachable!(), } } #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAPC_A::VALUE1 + *self == Capc::Value1 } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAPC_A::VALUE2 + *self == Capc::Value2 } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CAPC_A::VALUE3 + *self == Capc::Value3 } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CAPC_A::VALUE4 + *self == Capc::Value4 } } #[doc = "Field `CAPC` writer - Clear on Capture Control"] -pub type CAPC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CAPC_A>; -impl<'a, REG> CAPC_W<'a, REG> +pub type CapcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Capc>; +impl<'a, REG> CapcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -268,129 +268,129 @@ where #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE1) + self.variant(Capc::Value1) } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE2) + self.variant(Capc::Value2) } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE3) + self.variant(Capc::Value3) } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CAPC_A::VALUE4) + self.variant(Capc::Value4) } } -#[doc = "Field `TLS` reader - Timer Load selector"] -pub type TLS_R = crate::BitReader; #[doc = "Timer Load selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TLS_A { +pub enum Tls { #[doc = "0: Timer is loaded with the value of CR1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is loaded with the value of CR2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TLS_A) -> Self { + fn from(variant: Tls) -> Self { variant as u8 != 0 } } -impl TLS_R { +#[doc = "Field `TLS` reader - Timer Load selector"] +pub type TlsR = crate::BitReader; +impl TlsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TLS_A { + pub const fn variant(&self) -> Tls { match self.bits { - false => TLS_A::VALUE1, - true => TLS_A::VALUE2, + false => Tls::Value1, + true => Tls::Value2, } } #[doc = "Timer is loaded with the value of CR1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TLS_A::VALUE1 + *self == Tls::Value1 } #[doc = "Timer is loaded with the value of CR2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TLS_A::VALUE2 + *self == Tls::Value2 } } #[doc = "Field `TLS` writer - Timer Load selector"] -pub type TLS_W<'a, REG> = crate::BitWriter<'a, REG, TLS_A>; -impl<'a, REG> TLS_W<'a, REG> +pub type TlsW<'a, REG> = crate::BitWriter<'a, REG, Tls>; +impl<'a, REG> TlsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer is loaded with the value of CR1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TLS_A::VALUE1) + self.variant(Tls::Value1) } #[doc = "Timer is loaded with the value of CR2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TLS_A::VALUE2) + self.variant(Tls::Value2) } } -#[doc = "Field `ENDM` reader - Extended Stop Function Control"] -pub type ENDM_R = crate::FieldReader; #[doc = "Extended Stop Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENDM_A { +pub enum Endm { #[doc = "0: Clears the timer run bit only (default stop)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clears the timer only (flush)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clears the timer and run bit (flush/stop)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENDM_A) -> Self { + fn from(variant: Endm) -> Self { variant as _ } } -impl crate::FieldSpec for ENDM_A { +impl crate::FieldSpec for Endm { type Ux = u8; } -impl ENDM_R { +#[doc = "Field `ENDM` reader - Extended Stop Function Control"] +pub type EndmR = crate::FieldReader; +impl EndmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ENDM_A::VALUE1), - 1 => Some(ENDM_A::VALUE2), - 2 => Some(ENDM_A::VALUE3), + 0 => Some(Endm::Value1), + 1 => Some(Endm::Value2), + 2 => Some(Endm::Value3), _ => None, } } #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDM_A::VALUE1 + *self == Endm::Value1 } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDM_A::VALUE2 + *self == Endm::Value2 } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENDM_A::VALUE3 + *self == Endm::Value3 } } #[doc = "Field `ENDM` writer - Extended Stop Function Control"] -pub type ENDM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDM_A>; -impl<'a, REG> ENDM_W<'a, REG> +pub type EndmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Endm>; +impl<'a, REG> EndmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -398,238 +398,238 @@ where #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE1) + self.variant(Endm::Value1) } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE2) + self.variant(Endm::Value2) } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENDM_A::VALUE3) + self.variant(Endm::Value3) } } -#[doc = "Field `STRM` reader - Extended Start Function Control"] -pub type STRM_R = crate::BitReader; #[doc = "Extended Start Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STRM_A { +pub enum Strm { #[doc = "0: Sets run bit only (default start)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clears the timer and sets run bit, if not set (flush/start)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STRM_A) -> Self { + fn from(variant: Strm) -> Self { variant as u8 != 0 } } -impl STRM_R { +#[doc = "Field `STRM` reader - Extended Start Function Control"] +pub type StrmR = crate::BitReader; +impl StrmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STRM_A { + pub const fn variant(&self) -> Strm { match self.bits { - false => STRM_A::VALUE1, - true => STRM_A::VALUE2, + false => Strm::Value1, + true => Strm::Value2, } } #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STRM_A::VALUE1 + *self == Strm::Value1 } #[doc = "Clears the timer and sets run bit, if not set (flush/start)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STRM_A::VALUE2 + *self == Strm::Value2 } } #[doc = "Field `STRM` writer - Extended Start Function Control"] -pub type STRM_W<'a, REG> = crate::BitWriter<'a, REG, STRM_A>; -impl<'a, REG> STRM_W<'a, REG> +pub type StrmW<'a, REG> = crate::BitWriter<'a, REG, Strm>; +impl<'a, REG> StrmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STRM_A::VALUE1) + self.variant(Strm::Value1) } #[doc = "Clears the timer and sets run bit, if not set (flush/start)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STRM_A::VALUE2) + self.variant(Strm::Value2) } } -#[doc = "Field `SCE` reader - Equal Capture Event enable"] -pub type SCE_R = crate::BitReader; #[doc = "Equal Capture Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCE_A { +pub enum Sce { #[doc = "0: Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCE_A) -> Self { + fn from(variant: Sce) -> Self { variant as u8 != 0 } } -impl SCE_R { +#[doc = "Field `SCE` reader - Equal Capture Event enable"] +pub type SceR = crate::BitReader; +impl SceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCE_A { + pub const fn variant(&self) -> Sce { match self.bits { - false => SCE_A::VALUE1, - true => SCE_A::VALUE2, + false => Sce::Value1, + true => Sce::Value2, } } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCE_A::VALUE1 + *self == Sce::Value1 } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCE_A::VALUE2 + *self == Sce::Value2 } } #[doc = "Field `SCE` writer - Equal Capture Event enable"] -pub type SCE_W<'a, REG> = crate::BitWriter<'a, REG, SCE_A>; -impl<'a, REG> SCE_W<'a, REG> +pub type SceW<'a, REG> = crate::BitWriter<'a, REG, Sce>; +impl<'a, REG> SceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCE_A::VALUE1) + self.variant(Sce::Value1) } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCE_A::VALUE2) + self.variant(Sce::Value2) } } -#[doc = "Field `CCS` reader - Continuous Capture Enable"] -pub type CCS_R = crate::BitReader; #[doc = "Continuous Capture Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCS_A { +pub enum Ccs { #[doc = "0: The capture into a specific capture register is done with the rules linked with the full flags, described at ."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCS_A) -> Self { + fn from(variant: Ccs) -> Self { variant as u8 != 0 } } -impl CCS_R { +#[doc = "Field `CCS` reader - Continuous Capture Enable"] +pub type CcsR = crate::BitReader; +impl CcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCS_A { + pub const fn variant(&self) -> Ccs { match self.bits { - false => CCS_A::VALUE1, - true => CCS_A::VALUE2, + false => Ccs::Value1, + true => Ccs::Value2, } } #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCS_A::VALUE1 + *self == Ccs::Value1 } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCS_A::VALUE2 + *self == Ccs::Value2 } } #[doc = "Field `CCS` writer - Continuous Capture Enable"] -pub type CCS_W<'a, REG> = crate::BitWriter<'a, REG, CCS_A>; -impl<'a, REG> CCS_W<'a, REG> +pub type CcsW<'a, REG> = crate::BitWriter<'a, REG, Ccs>; +impl<'a, REG> CcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCS_A::VALUE1) + self.variant(Ccs::Value1) } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCS_A::VALUE2) + self.variant(Ccs::Value2) } } -#[doc = "Field `DITHE` reader - Dither Enable"] -pub type DITHE_R = crate::FieldReader; #[doc = "Dither Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DITHE_A { +pub enum Dithe { #[doc = "0: Dither is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dither is applied to the Period"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Dither is applied to the Compare"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Dither is applied to the Period and Compare"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DITHE_A) -> Self { + fn from(variant: Dithe) -> Self { variant as _ } } -impl crate::FieldSpec for DITHE_A { +impl crate::FieldSpec for Dithe { type Ux = u8; } -impl DITHE_R { +#[doc = "Field `DITHE` reader - Dither Enable"] +pub type DitheR = crate::FieldReader; +impl DitheR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DITHE_A { + pub const fn variant(&self) -> Dithe { match self.bits { - 0 => DITHE_A::VALUE1, - 1 => DITHE_A::VALUE2, - 2 => DITHE_A::VALUE3, - 3 => DITHE_A::VALUE4, + 0 => Dithe::Value1, + 1 => Dithe::Value2, + 2 => Dithe::Value3, + 3 => Dithe::Value4, _ => unreachable!(), } } #[doc = "Dither is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DITHE_A::VALUE1 + *self == Dithe::Value1 } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DITHE_A::VALUE2 + *self == Dithe::Value2 } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DITHE_A::VALUE3 + *self == Dithe::Value3 } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DITHE_A::VALUE4 + *self == Dithe::Value4 } } #[doc = "Field `DITHE` writer - Dither Enable"] -pub type DITHE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DITHE_A>; -impl<'a, REG> DITHE_W<'a, REG> +pub type DitheW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Dithe>; +impl<'a, REG> DitheW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,573 +637,573 @@ where #[doc = "Dither is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE1) + self.variant(Dithe::Value1) } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE2) + self.variant(Dithe::Value2) } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE3) + self.variant(Dithe::Value3) } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DITHE_A::VALUE4) + self.variant(Dithe::Value4) } } -#[doc = "Field `DIM` reader - Dither input selector"] -pub type DIM_R = crate::BitReader; #[doc = "Dither input selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIM_A { +pub enum Dim { #[doc = "0: Slice is using it own dither unit"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Slice is connected to the dither unit of slice 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIM_A) -> Self { + fn from(variant: Dim) -> Self { variant as u8 != 0 } } -impl DIM_R { +#[doc = "Field `DIM` reader - Dither input selector"] +pub type DimR = crate::BitReader; +impl DimR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIM_A { + pub const fn variant(&self) -> Dim { match self.bits { - false => DIM_A::VALUE1, - true => DIM_A::VALUE2, + false => Dim::Value1, + true => Dim::Value2, } } #[doc = "Slice is using it own dither unit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIM_A::VALUE1 + *self == Dim::Value1 } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIM_A::VALUE2 + *self == Dim::Value2 } } #[doc = "Field `DIM` writer - Dither input selector"] -pub type DIM_W<'a, REG> = crate::BitWriter<'a, REG, DIM_A>; -impl<'a, REG> DIM_W<'a, REG> +pub type DimW<'a, REG> = crate::BitWriter<'a, REG, Dim>; +impl<'a, REG> DimW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Slice is using it own dither unit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIM_A::VALUE1) + self.variant(Dim::Value1) } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIM_A::VALUE2) + self.variant(Dim::Value2) } } -#[doc = "Field `FPE` reader - Floating Prescaler enable"] -pub type FPE_R = crate::BitReader; #[doc = "Floating Prescaler enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FPE_A { +pub enum Fpe { #[doc = "0: Floating prescaler mode is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Floating prescaler mode is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FPE_A) -> Self { + fn from(variant: Fpe) -> Self { variant as u8 != 0 } } -impl FPE_R { +#[doc = "Field `FPE` reader - Floating Prescaler enable"] +pub type FpeR = crate::BitReader; +impl FpeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FPE_A { + pub const fn variant(&self) -> Fpe { match self.bits { - false => FPE_A::VALUE1, - true => FPE_A::VALUE2, + false => Fpe::Value1, + true => Fpe::Value2, } } #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FPE_A::VALUE1 + *self == Fpe::Value1 } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FPE_A::VALUE2 + *self == Fpe::Value2 } } #[doc = "Field `FPE` writer - Floating Prescaler enable"] -pub type FPE_W<'a, REG> = crate::BitWriter<'a, REG, FPE_A>; -impl<'a, REG> FPE_W<'a, REG> +pub type FpeW<'a, REG> = crate::BitWriter<'a, REG, Fpe>; +impl<'a, REG> FpeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FPE_A::VALUE1) + self.variant(Fpe::Value1) } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FPE_A::VALUE2) + self.variant(Fpe::Value2) } } -#[doc = "Field `TRAPE0` reader - TRAP enable for CCU8x.OUTy0"] -pub type TRAPE0_R = crate::BitReader; #[doc = "TRAP enable for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRAPE0_A { +pub enum Trape0 { #[doc = "0: TRAP functionality has no effect on the CCU8x.OUTy0 output"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TRAP functionality affects the CCU8x.OUTy0 output"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRAPE0_A) -> Self { + fn from(variant: Trape0) -> Self { variant as u8 != 0 } } -impl TRAPE0_R { +#[doc = "Field `TRAPE0` reader - TRAP enable for CCU8x.OUTy0"] +pub type Trape0R = crate::BitReader; +impl Trape0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRAPE0_A { + pub const fn variant(&self) -> Trape0 { match self.bits { - false => TRAPE0_A::VALUE1, - true => TRAPE0_A::VALUE2, + false => Trape0::Value1, + true => Trape0::Value2, } } #[doc = "TRAP functionality has no effect on the CCU8x.OUTy0 output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRAPE0_A::VALUE1 + *self == Trape0::Value1 } #[doc = "TRAP functionality affects the CCU8x.OUTy0 output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRAPE0_A::VALUE2 + *self == Trape0::Value2 } } #[doc = "Field `TRAPE0` writer - TRAP enable for CCU8x.OUTy0"] -pub type TRAPE0_W<'a, REG> = crate::BitWriter<'a, REG, TRAPE0_A>; -impl<'a, REG> TRAPE0_W<'a, REG> +pub type Trape0W<'a, REG> = crate::BitWriter<'a, REG, Trape0>; +impl<'a, REG> Trape0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP functionality has no effect on the CCU8x.OUTy0 output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRAPE0_A::VALUE1) + self.variant(Trape0::Value1) } #[doc = "TRAP functionality affects the CCU8x.OUTy0 output"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRAPE0_A::VALUE2) + self.variant(Trape0::Value2) } } #[doc = "Field `TRAPE1` reader - TRAP enable for CCU8x.OUTy1"] -pub type TRAPE1_R = crate::BitReader; +pub type Trape1R = crate::BitReader; #[doc = "Field `TRAPE1` writer - TRAP enable for CCU8x.OUTy1"] -pub type TRAPE1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Trape1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRAPE2` reader - TRAP enable for CCU8x.OUTy2"] -pub type TRAPE2_R = crate::BitReader; +pub type Trape2R = crate::BitReader; #[doc = "Field `TRAPE2` writer - TRAP enable for CCU8x.OUTy2"] -pub type TRAPE2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Trape2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRAPE3` reader - TRAP enable for CCU8x.OUTy3"] -pub type TRAPE3_R = crate::BitReader; +pub type Trape3R = crate::BitReader; #[doc = "Field `TRAPE3` writer - TRAP enable for CCU8x.OUTy3"] -pub type TRAPE3_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] -pub type TRPSE_R = crate::BitReader; +pub type Trape3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TRAP Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRPSE_A { +pub enum Trpse { #[doc = "0: Exiting from TRAP state isn't synchronized with the PWM signal"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Exiting from TRAP state is synchronized with the PWM signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRPSE_A) -> Self { + fn from(variant: Trpse) -> Self { variant as u8 != 0 } } -impl TRPSE_R { +#[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] +pub type TrpseR = crate::BitReader; +impl TrpseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRPSE_A { + pub const fn variant(&self) -> Trpse { match self.bits { - false => TRPSE_A::VALUE1, - true => TRPSE_A::VALUE2, + false => Trpse::Value1, + true => Trpse::Value2, } } #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRPSE_A::VALUE1 + *self == Trpse::Value1 } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRPSE_A::VALUE2 + *self == Trpse::Value2 } } #[doc = "Field `TRPSE` writer - TRAP Synchronization Enable"] -pub type TRPSE_W<'a, REG> = crate::BitWriter<'a, REG, TRPSE_A>; -impl<'a, REG> TRPSE_W<'a, REG> +pub type TrpseW<'a, REG> = crate::BitWriter<'a, REG, Trpse>; +impl<'a, REG> TrpseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRPSE_A::VALUE1) + self.variant(Trpse::Value1) } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRPSE_A::VALUE2) + self.variant(Trpse::Value2) } } -#[doc = "Field `TRPSW` reader - TRAP State Clear Control"] -pub type TRPSW_R = crate::BitReader; #[doc = "TRAP State Clear Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRPSW_A { +pub enum Trpsw { #[doc = "0: The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The TRAP state can only be exited by a SW request."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRPSW_A) -> Self { + fn from(variant: Trpsw) -> Self { variant as u8 != 0 } } -impl TRPSW_R { +#[doc = "Field `TRPSW` reader - TRAP State Clear Control"] +pub type TrpswR = crate::BitReader; +impl TrpswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRPSW_A { + pub const fn variant(&self) -> Trpsw { match self.bits { - false => TRPSW_A::VALUE1, - true => TRPSW_A::VALUE2, + false => Trpsw::Value1, + true => Trpsw::Value2, } } #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRPSW_A::VALUE1 + *self == Trpsw::Value1 } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRPSW_A::VALUE2 + *self == Trpsw::Value2 } } #[doc = "Field `TRPSW` writer - TRAP State Clear Control"] -pub type TRPSW_W<'a, REG> = crate::BitWriter<'a, REG, TRPSW_A>; -impl<'a, REG> TRPSW_W<'a, REG> +pub type TrpswW<'a, REG> = crate::BitWriter<'a, REG, Trpsw>; +impl<'a, REG> TrpswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRPSW_A::VALUE1) + self.variant(Trpsw::Value1) } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRPSW_A::VALUE2) + self.variant(Trpsw::Value2) } } -#[doc = "Field `EMS` reader - External Modulation Synchronization"] -pub type EMS_R = crate::BitReader; #[doc = "External Modulation Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMS_A { +pub enum Ems { #[doc = "0: External Modulation functionality is not synchronized with the PWM signal"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Modulation functionality is synchronized with the PWM signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMS_A) -> Self { + fn from(variant: Ems) -> Self { variant as u8 != 0 } } -impl EMS_R { +#[doc = "Field `EMS` reader - External Modulation Synchronization"] +pub type EmsR = crate::BitReader; +impl EmsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMS_A { + pub const fn variant(&self) -> Ems { match self.bits { - false => EMS_A::VALUE1, - true => EMS_A::VALUE2, + false => Ems::Value1, + true => Ems::Value2, } } #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMS_A::VALUE1 + *self == Ems::Value1 } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMS_A::VALUE2 + *self == Ems::Value2 } } #[doc = "Field `EMS` writer - External Modulation Synchronization"] -pub type EMS_W<'a, REG> = crate::BitWriter<'a, REG, EMS_A>; -impl<'a, REG> EMS_W<'a, REG> +pub type EmsW<'a, REG> = crate::BitWriter<'a, REG, Ems>; +impl<'a, REG> EmsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMS_A::VALUE1) + self.variant(Ems::Value1) } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMS_A::VALUE2) + self.variant(Ems::Value2) } } -#[doc = "Field `EMT` reader - External Modulation Type"] -pub type EMT_R = crate::BitReader; #[doc = "External Modulation Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMT_A { +pub enum Emt { #[doc = "0: External Modulation functionality is clearing the CC8ySTx bits."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Modulation functionality is gating the outputs."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMT_A) -> Self { + fn from(variant: Emt) -> Self { variant as u8 != 0 } } -impl EMT_R { +#[doc = "Field `EMT` reader - External Modulation Type"] +pub type EmtR = crate::BitReader; +impl EmtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMT_A { + pub const fn variant(&self) -> Emt { match self.bits { - false => EMT_A::VALUE1, - true => EMT_A::VALUE2, + false => Emt::Value1, + true => Emt::Value2, } } #[doc = "External Modulation functionality is clearing the CC8ySTx bits."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMT_A::VALUE1 + *self == Emt::Value1 } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMT_A::VALUE2 + *self == Emt::Value2 } } #[doc = "Field `EMT` writer - External Modulation Type"] -pub type EMT_W<'a, REG> = crate::BitWriter<'a, REG, EMT_A>; -impl<'a, REG> EMT_W<'a, REG> +pub type EmtW<'a, REG> = crate::BitWriter<'a, REG, Emt>; +impl<'a, REG> EmtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is clearing the CC8ySTx bits."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMT_A::VALUE1) + self.variant(Emt::Value1) } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMT_A::VALUE2) + self.variant(Emt::Value2) } } -#[doc = "Field `MCME1` reader - Multi Channel Mode Enable for Channel 1"] -pub type MCME1_R = crate::BitReader; #[doc = "Multi Channel Mode Enable for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCME1_A { +pub enum Mcme1 { #[doc = "0: Multi Channel Mode in Channel 1 is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multi Channel Mode in Channel 1 is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCME1_A) -> Self { + fn from(variant: Mcme1) -> Self { variant as u8 != 0 } } -impl MCME1_R { +#[doc = "Field `MCME1` reader - Multi Channel Mode Enable for Channel 1"] +pub type Mcme1R = crate::BitReader; +impl Mcme1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCME1_A { + pub const fn variant(&self) -> Mcme1 { match self.bits { - false => MCME1_A::VALUE1, - true => MCME1_A::VALUE2, + false => Mcme1::Value1, + true => Mcme1::Value2, } } #[doc = "Multi Channel Mode in Channel 1 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCME1_A::VALUE1 + *self == Mcme1::Value1 } #[doc = "Multi Channel Mode in Channel 1 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCME1_A::VALUE2 + *self == Mcme1::Value2 } } #[doc = "Field `MCME1` writer - Multi Channel Mode Enable for Channel 1"] -pub type MCME1_W<'a, REG> = crate::BitWriter<'a, REG, MCME1_A>; -impl<'a, REG> MCME1_W<'a, REG> +pub type Mcme1W<'a, REG> = crate::BitWriter<'a, REG, Mcme1>; +impl<'a, REG> Mcme1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode in Channel 1 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCME1_A::VALUE1) + self.variant(Mcme1::Value1) } #[doc = "Multi Channel Mode in Channel 1 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCME1_A::VALUE2) + self.variant(Mcme1::Value2) } } -#[doc = "Field `MCME2` reader - Multi Channel Mode Enable for Channel 2"] -pub type MCME2_R = crate::BitReader; #[doc = "Multi Channel Mode Enable for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCME2_A { +pub enum Mcme2 { #[doc = "0: Multi Channel Mode in Channel 2 is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multi Channel Mode in Channel 2 is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCME2_A) -> Self { + fn from(variant: Mcme2) -> Self { variant as u8 != 0 } } -impl MCME2_R { +#[doc = "Field `MCME2` reader - Multi Channel Mode Enable for Channel 2"] +pub type Mcme2R = crate::BitReader; +impl Mcme2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCME2_A { + pub const fn variant(&self) -> Mcme2 { match self.bits { - false => MCME2_A::VALUE1, - true => MCME2_A::VALUE2, + false => Mcme2::Value1, + true => Mcme2::Value2, } } #[doc = "Multi Channel Mode in Channel 2 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCME2_A::VALUE1 + *self == Mcme2::Value1 } #[doc = "Multi Channel Mode in Channel 2 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCME2_A::VALUE2 + *self == Mcme2::Value2 } } #[doc = "Field `MCME2` writer - Multi Channel Mode Enable for Channel 2"] -pub type MCME2_W<'a, REG> = crate::BitWriter<'a, REG, MCME2_A>; -impl<'a, REG> MCME2_W<'a, REG> +pub type Mcme2W<'a, REG> = crate::BitWriter<'a, REG, Mcme2>; +impl<'a, REG> Mcme2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode in Channel 2 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCME2_A::VALUE1) + self.variant(Mcme2::Value1) } #[doc = "Multi Channel Mode in Channel 2 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCME2_A::VALUE2) + self.variant(Mcme2::Value2) } } -#[doc = "Field `EME` reader - External Modulation Channel enable"] -pub type EME_R = crate::FieldReader; #[doc = "External Modulation Channel enable\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EME_A { +pub enum Eme { #[doc = "0: External Modulation functionality doesn't affect any channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External Modulation only applied on channel 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Modulation only applied on channel 2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External Modulation applied on both channels"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EME_A) -> Self { + fn from(variant: Eme) -> Self { variant as _ } } -impl crate::FieldSpec for EME_A { +impl crate::FieldSpec for Eme { type Ux = u8; } -impl EME_R { +#[doc = "Field `EME` reader - External Modulation Channel enable"] +pub type EmeR = crate::FieldReader; +impl EmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EME_A { + pub const fn variant(&self) -> Eme { match self.bits { - 0 => EME_A::VALUE1, - 1 => EME_A::VALUE2, - 2 => EME_A::VALUE3, - 3 => EME_A::VALUE4, + 0 => Eme::Value1, + 1 => Eme::Value2, + 2 => Eme::Value3, + 3 => Eme::Value4, _ => unreachable!(), } } #[doc = "External Modulation functionality doesn't affect any channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EME_A::VALUE1 + *self == Eme::Value1 } #[doc = "External Modulation only applied on channel 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EME_A::VALUE2 + *self == Eme::Value2 } #[doc = "External Modulation only applied on channel 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EME_A::VALUE3 + *self == Eme::Value3 } #[doc = "External Modulation applied on both channels"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EME_A::VALUE4 + *self == Eme::Value4 } } #[doc = "Field `EME` writer - External Modulation Channel enable"] -pub type EME_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EME_A>; -impl<'a, REG> EME_W<'a, REG> +pub type EmeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eme>; +impl<'a, REG> EmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1211,84 +1211,84 @@ where #[doc = "External Modulation functionality doesn't affect any channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EME_A::VALUE1) + self.variant(Eme::Value1) } #[doc = "External Modulation only applied on channel 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EME_A::VALUE2) + self.variant(Eme::Value2) } #[doc = "External Modulation only applied on channel 2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EME_A::VALUE3) + self.variant(Eme::Value3) } #[doc = "External Modulation applied on both channels"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EME_A::VALUE4) + self.variant(Eme::Value4) } } -#[doc = "Field `STOS` reader - Status bit output selector"] -pub type STOS_R = crate::FieldReader; #[doc = "Status bit output selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STOS_A { +pub enum Stos { #[doc = "0: CC8yST1 forward to CCU8x.STy"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CC8yST2 forward to CCU8x.STy"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CC8yST1 AND CC8yST2 forward to CCU8x.STy"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CC8yST1 OR CC8yST2 forward to CCU8x.STy"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STOS_A) -> Self { + fn from(variant: Stos) -> Self { variant as _ } } -impl crate::FieldSpec for STOS_A { +impl crate::FieldSpec for Stos { type Ux = u8; } -impl STOS_R { +#[doc = "Field `STOS` reader - Status bit output selector"] +pub type StosR = crate::FieldReader; +impl StosR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STOS_A { + pub const fn variant(&self) -> Stos { match self.bits { - 0 => STOS_A::VALUE1, - 1 => STOS_A::VALUE2, - 2 => STOS_A::VALUE3, - 3 => STOS_A::VALUE4, + 0 => Stos::Value1, + 1 => Stos::Value2, + 2 => Stos::Value3, + 3 => Stos::Value4, _ => unreachable!(), } } #[doc = "CC8yST1 forward to CCU8x.STy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STOS_A::VALUE1 + *self == Stos::Value1 } #[doc = "CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STOS_A::VALUE2 + *self == Stos::Value2 } #[doc = "CC8yST1 AND CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STOS_A::VALUE3 + *self == Stos::Value3 } #[doc = "CC8yST1 OR CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STOS_A::VALUE4 + *self == Stos::Value4 } } #[doc = "Field `STOS` writer - Status bit output selector"] -pub type STOS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, STOS_A>; -impl<'a, REG> STOS_W<'a, REG> +pub type StosW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Stos>; +impl<'a, REG> StosW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1296,331 +1296,322 @@ where #[doc = "CC8yST1 forward to CCU8x.STy"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STOS_A::VALUE1) + self.variant(Stos::Value1) } #[doc = "CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STOS_A::VALUE2) + self.variant(Stos::Value2) } #[doc = "CC8yST1 AND CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STOS_A::VALUE3) + self.variant(Stos::Value3) } #[doc = "CC8yST1 OR CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STOS_A::VALUE4) + self.variant(Stos::Value4) } } impl R { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - pub fn tcm(&self) -> TCM_R { - TCM_R::new((self.bits & 1) != 0) + pub fn tcm(&self) -> TcmR { + TcmR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - pub fn tssm(&self) -> TSSM_R { - TSSM_R::new(((self.bits >> 1) & 1) != 0) + pub fn tssm(&self) -> TssmR { + TssmR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - pub fn clst(&self) -> CLST_R { - CLST_R::new(((self.bits >> 2) & 1) != 0) + pub fn clst(&self) -> ClstR { + ClstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture Compare Mode"] #[inline(always)] - pub fn cmod(&self) -> CMOD_R { - CMOD_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmod(&self) -> CmodR { + CmodR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - pub fn ecm(&self) -> ECM_R { - ECM_R::new(((self.bits >> 4) & 1) != 0) + pub fn ecm(&self) -> EcmR { + EcmR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - pub fn capc(&self) -> CAPC_R { - CAPC_R::new(((self.bits >> 5) & 3) as u8) + pub fn capc(&self) -> CapcR { + CapcR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Timer Load selector"] #[inline(always)] - pub fn tls(&self) -> TLS_R { - TLS_R::new(((self.bits >> 7) & 1) != 0) + pub fn tls(&self) -> TlsR { + TlsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - pub fn endm(&self) -> ENDM_R { - ENDM_R::new(((self.bits >> 8) & 3) as u8) + pub fn endm(&self) -> EndmR { + EndmR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - pub fn strm(&self) -> STRM_R { - STRM_R::new(((self.bits >> 10) & 1) != 0) + pub fn strm(&self) -> StrmR { + StrmR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - pub fn sce(&self) -> SCE_R { - SCE_R::new(((self.bits >> 11) & 1) != 0) + pub fn sce(&self) -> SceR { + SceR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - pub fn ccs(&self) -> CCS_R { - CCS_R::new(((self.bits >> 12) & 1) != 0) + pub fn ccs(&self) -> CcsR { + CcsR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - pub fn dithe(&self) -> DITHE_R { - DITHE_R::new(((self.bits >> 13) & 3) as u8) + pub fn dithe(&self) -> DitheR { + DitheR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - pub fn dim(&self) -> DIM_R { - DIM_R::new(((self.bits >> 15) & 1) != 0) + pub fn dim(&self) -> DimR { + DimR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - pub fn fpe(&self) -> FPE_R { - FPE_R::new(((self.bits >> 16) & 1) != 0) + pub fn fpe(&self) -> FpeR { + FpeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"] #[inline(always)] - pub fn trape0(&self) -> TRAPE0_R { - TRAPE0_R::new(((self.bits >> 17) & 1) != 0) + pub fn trape0(&self) -> Trape0R { + Trape0R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"] #[inline(always)] - pub fn trape1(&self) -> TRAPE1_R { - TRAPE1_R::new(((self.bits >> 18) & 1) != 0) + pub fn trape1(&self) -> Trape1R { + Trape1R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"] #[inline(always)] - pub fn trape2(&self) -> TRAPE2_R { - TRAPE2_R::new(((self.bits >> 19) & 1) != 0) + pub fn trape2(&self) -> Trape2R { + Trape2R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"] #[inline(always)] - pub fn trape3(&self) -> TRAPE3_R { - TRAPE3_R::new(((self.bits >> 20) & 1) != 0) + pub fn trape3(&self) -> Trape3R { + Trape3R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - pub fn trpse(&self) -> TRPSE_R { - TRPSE_R::new(((self.bits >> 21) & 1) != 0) + pub fn trpse(&self) -> TrpseR { + TrpseR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - pub fn trpsw(&self) -> TRPSW_R { - TRPSW_R::new(((self.bits >> 22) & 1) != 0) + pub fn trpsw(&self) -> TrpswR { + TrpswR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - pub fn ems(&self) -> EMS_R { - EMS_R::new(((self.bits >> 23) & 1) != 0) + pub fn ems(&self) -> EmsR { + EmsR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - pub fn emt(&self) -> EMT_R { - EMT_R::new(((self.bits >> 24) & 1) != 0) + pub fn emt(&self) -> EmtR { + EmtR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"] #[inline(always)] - pub fn mcme1(&self) -> MCME1_R { - MCME1_R::new(((self.bits >> 25) & 1) != 0) + pub fn mcme1(&self) -> Mcme1R { + Mcme1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"] #[inline(always)] - pub fn mcme2(&self) -> MCME2_R { - MCME2_R::new(((self.bits >> 26) & 1) != 0) + pub fn mcme2(&self) -> Mcme2R { + Mcme2R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 27:28 - External Modulation Channel enable"] #[inline(always)] - pub fn eme(&self) -> EME_R { - EME_R::new(((self.bits >> 27) & 3) as u8) + pub fn eme(&self) -> EmeR { + EmeR::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Status bit output selector"] #[inline(always)] - pub fn stos(&self) -> STOS_R { - STOS_R::new(((self.bits >> 29) & 3) as u8) + pub fn stos(&self) -> StosR { + StosR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] #[must_use] - pub fn tcm(&mut self) -> TCM_W { - TCM_W::new(self, 0) + pub fn tcm(&mut self) -> TcmW { + TcmW::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tssm(&mut self) -> TSSM_W { - TSSM_W::new(self, 1) + pub fn tssm(&mut self) -> TssmW { + TssmW::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] #[must_use] - pub fn clst(&mut self) -> CLST_W { - CLST_W::new(self, 2) + pub fn clst(&mut self) -> ClstW { + ClstW::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] #[must_use] - pub fn ecm(&mut self) -> ECM_W { - ECM_W::new(self, 4) + pub fn ecm(&mut self) -> EcmW { + EcmW::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] #[must_use] - pub fn capc(&mut self) -> CAPC_W { - CAPC_W::new(self, 5) + pub fn capc(&mut self) -> CapcW { + CapcW::new(self, 5) } #[doc = "Bit 7 - Timer Load selector"] #[inline(always)] #[must_use] - pub fn tls(&mut self) -> TLS_W { - TLS_W::new(self, 7) + pub fn tls(&mut self) -> TlsW { + TlsW::new(self, 7) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] #[must_use] - pub fn endm(&mut self) -> ENDM_W { - ENDM_W::new(self, 8) + pub fn endm(&mut self) -> EndmW { + EndmW::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] #[must_use] - pub fn strm(&mut self) -> STRM_W { - STRM_W::new(self, 10) + pub fn strm(&mut self) -> StrmW { + StrmW::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] #[must_use] - pub fn sce(&mut self) -> SCE_W { - SCE_W::new(self, 11) + pub fn sce(&mut self) -> SceW { + SceW::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] #[must_use] - pub fn ccs(&mut self) -> CCS_W { - CCS_W::new(self, 12) + pub fn ccs(&mut self) -> CcsW { + CcsW::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] #[must_use] - pub fn dithe(&mut self) -> DITHE_W { - DITHE_W::new(self, 13) + pub fn dithe(&mut self) -> DitheW { + DitheW::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] #[must_use] - pub fn dim(&mut self) -> DIM_W { - DIM_W::new(self, 15) + pub fn dim(&mut self) -> DimW { + DimW::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] #[must_use] - pub fn fpe(&mut self) -> FPE_W { - FPE_W::new(self, 16) + pub fn fpe(&mut self) -> FpeW { + FpeW::new(self, 16) } #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn trape0(&mut self) -> TRAPE0_W { - TRAPE0_W::new(self, 17) + pub fn trape0(&mut self) -> Trape0W { + Trape0W::new(self, 17) } #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn trape1(&mut self) -> TRAPE1_W { - TRAPE1_W::new(self, 18) + pub fn trape1(&mut self) -> Trape1W { + Trape1W::new(self, 18) } #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn trape2(&mut self) -> TRAPE2_W { - TRAPE2_W::new(self, 19) + pub fn trape2(&mut self) -> Trape2W { + Trape2W::new(self, 19) } #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn trape3(&mut self) -> TRAPE3_W { - TRAPE3_W::new(self, 20) + pub fn trape3(&mut self) -> Trape3W { + Trape3W::new(self, 20) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] #[must_use] - pub fn trpse(&mut self) -> TRPSE_W { - TRPSE_W::new(self, 21) + pub fn trpse(&mut self) -> TrpseW { + TrpseW::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] #[must_use] - pub fn trpsw(&mut self) -> TRPSW_W { - TRPSW_W::new(self, 22) + pub fn trpsw(&mut self) -> TrpswW { + TrpswW::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] #[must_use] - pub fn ems(&mut self) -> EMS_W { - EMS_W::new(self, 23) + pub fn ems(&mut self) -> EmsW { + EmsW::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] #[must_use] - pub fn emt(&mut self) -> EMT_W { - EMT_W::new(self, 24) + pub fn emt(&mut self) -> EmtW { + EmtW::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"] #[inline(always)] #[must_use] - pub fn mcme1(&mut self) -> MCME1_W { - MCME1_W::new(self, 25) + pub fn mcme1(&mut self) -> Mcme1W { + Mcme1W::new(self, 25) } #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"] #[inline(always)] #[must_use] - pub fn mcme2(&mut self) -> MCME2_W { - MCME2_W::new(self, 26) + pub fn mcme2(&mut self) -> Mcme2W { + Mcme2W::new(self, 26) } #[doc = "Bits 27:28 - External Modulation Channel enable"] #[inline(always)] #[must_use] - pub fn eme(&mut self) -> EME_W { - EME_W::new(self, 27) + pub fn eme(&mut self) -> EmeW { + EmeW::new(self, 27) } #[doc = "Bits 29:30 - Status bit output selector"] #[inline(always)] #[must_use] - pub fn stos(&mut self) -> STOS_W { - STOS_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn stos(&mut self) -> StosW { + StosW::new(self, 29) } } #[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TC_SPEC; -impl crate::RegisterSpec for TC_SPEC { +pub struct TcSpec; +impl crate::RegisterSpec for TcSpec { type Ux = u32; } #[doc = "`read()` method returns [`tc::R`](R) reader structure"] -impl crate::Readable for TC_SPEC {} +impl crate::Readable for TcSpec {} #[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] -impl crate::Writable for TC_SPEC { +impl crate::Writable for TcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0x1800_0000"] -impl crate::Resettable for TC_SPEC { +impl crate::Resettable for TcSpec { const RESET_VALUE: u32 = 0x1800_0000; } diff --git a/src/ccu80_cc80/tcclr.rs b/src/ccu80_cc80/tcclr.rs index 237c6f8b..6e5af6aa 100644 --- a/src/ccu80_cc80/tcclr.rs +++ b/src/ccu80_cc80/tcclr.rs @@ -1,68 +1,59 @@ #[doc = "Register `TCCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBC` writer - Timer Run Bit Clear"] -pub type TRBC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TrbcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCC` writer - Timer Clear"] -pub type TCC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TccW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITC` writer - Dither Counter Clear"] -pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DitcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTC1C` writer - Dead Time Counter 1 Clear"] -pub type DTC1C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Dtc1cW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTC2C` writer - Dead Time Counter 2 Clear"] -pub type DTC2C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Dtc2cW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] #[must_use] - pub fn trbc(&mut self) -> TRBC_W { - TRBC_W::new(self, 0) + pub fn trbc(&mut self) -> TrbcW { + TrbcW::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] #[must_use] - pub fn tcc(&mut self) -> TCC_W { - TCC_W::new(self, 1) + pub fn tcc(&mut self) -> TccW { + TccW::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] #[must_use] - pub fn ditc(&mut self) -> DITC_W { - DITC_W::new(self, 2) + pub fn ditc(&mut self) -> DitcW { + DitcW::new(self, 2) } #[doc = "Bit 3 - Dead Time Counter 1 Clear"] #[inline(always)] #[must_use] - pub fn dtc1c(&mut self) -> DTC1C_W { - DTC1C_W::new(self, 3) + pub fn dtc1c(&mut self) -> Dtc1cW { + Dtc1cW::new(self, 3) } #[doc = "Bit 4 - Dead Time Counter 2 Clear"] #[inline(always)] #[must_use] - pub fn dtc2c(&mut self) -> DTC2C_W { - DTC2C_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dtc2c(&mut self) -> Dtc2cW { + Dtc2cW::new(self, 4) } } #[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCCLR_SPEC; -impl crate::RegisterSpec for TCCLR_SPEC { +pub struct TcclrSpec; +impl crate::RegisterSpec for TcclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcclr::W`](W) writer structure"] -impl crate::Writable for TCCLR_SPEC { +impl crate::Writable for TcclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCCLR to value 0"] -impl crate::Resettable for TCCLR_SPEC { +impl crate::Resettable for TcclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tcset.rs b/src/ccu80_cc80/tcset.rs index 3fd6bb58..3338f548 100644 --- a/src/ccu80_cc80/tcset.rs +++ b/src/ccu80_cc80/tcset.rs @@ -1,36 +1,27 @@ #[doc = "Register `TCSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBS` writer - Timer Run Bit set"] -pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TrbsW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] #[must_use] - pub fn trbs(&mut self) -> TRBS_W { - TRBS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn trbs(&mut self) -> TrbsW { + TrbsW::new(self, 0) } } #[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCSET_SPEC; -impl crate::RegisterSpec for TCSET_SPEC { +pub struct TcsetSpec; +impl crate::RegisterSpec for TcsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcset::W`](W) writer structure"] -impl crate::Writable for TCSET_SPEC { +impl crate::Writable for TcsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSET to value 0"] -impl crate::Resettable for TCSET_SPEC { +impl crate::Resettable for TcsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tcst.rs b/src/ccu80_cc80/tcst.rs index 50db0b3c..dcd2ca93 100644 --- a/src/ccu80_cc80/tcst.rs +++ b/src/ccu80_cc80/tcst.rs @@ -1,179 +1,179 @@ #[doc = "Register `TCST` reader"] -pub type R = crate::R; -#[doc = "Field `TRB` reader - Timer Run Bit"] -pub type TRB_R = crate::BitReader; +pub type R = crate::R; #[doc = "Timer Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRB_A { +pub enum Trb { #[doc = "0: Timer is stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRB_A) -> Self { + fn from(variant: Trb) -> Self { variant as u8 != 0 } } -impl TRB_R { +#[doc = "Field `TRB` reader - Timer Run Bit"] +pub type TrbR = crate::BitReader; +impl TrbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRB_A { + pub const fn variant(&self) -> Trb { match self.bits { - false => TRB_A::VALUE1, - true => TRB_A::VALUE2, + false => Trb::Value1, + true => Trb::Value2, } } #[doc = "Timer is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRB_A::VALUE1 + *self == Trb::Value1 } #[doc = "Timer is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRB_A::VALUE2 + *self == Trb::Value2 } } -#[doc = "Field `CDIR` reader - Timer Counting Direction"] -pub type CDIR_R = crate::BitReader; #[doc = "Timer Counting Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDIR_A { +pub enum Cdir { #[doc = "0: Timer is counting up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer is counting down"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDIR_A) -> Self { + fn from(variant: Cdir) -> Self { variant as u8 != 0 } } -impl CDIR_R { +#[doc = "Field `CDIR` reader - Timer Counting Direction"] +pub type CdirR = crate::BitReader; +impl CdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDIR_A { + pub const fn variant(&self) -> Cdir { match self.bits { - false => CDIR_A::VALUE1, - true => CDIR_A::VALUE2, + false => Cdir::Value1, + true => Cdir::Value2, } } #[doc = "Timer is counting up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDIR_A::VALUE1 + *self == Cdir::Value1 } #[doc = "Timer is counting down"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDIR_A::VALUE2 + *self == Cdir::Value2 } } -#[doc = "Field `DTR1` reader - Dead Time Counter 1 Run bit"] -pub type DTR1_R = crate::BitReader; #[doc = "Dead Time Counter 1 Run bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTR1_A { +pub enum Dtr1 { #[doc = "0: Dead Time counter is idle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time counter is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTR1_A) -> Self { + fn from(variant: Dtr1) -> Self { variant as u8 != 0 } } -impl DTR1_R { +#[doc = "Field `DTR1` reader - Dead Time Counter 1 Run bit"] +pub type Dtr1R = crate::BitReader; +impl Dtr1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTR1_A { + pub const fn variant(&self) -> Dtr1 { match self.bits { - false => DTR1_A::VALUE1, - true => DTR1_A::VALUE2, + false => Dtr1::Value1, + true => Dtr1::Value2, } } #[doc = "Dead Time counter is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTR1_A::VALUE1 + *self == Dtr1::Value1 } #[doc = "Dead Time counter is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTR1_A::VALUE2 + *self == Dtr1::Value2 } } -#[doc = "Field `DTR2` reader - Dead Time Counter 2 Run bit"] -pub type DTR2_R = crate::BitReader; #[doc = "Dead Time Counter 2 Run bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTR2_A { +pub enum Dtr2 { #[doc = "0: Dead Time counter is idle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dead Time counter is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTR2_A) -> Self { + fn from(variant: Dtr2) -> Self { variant as u8 != 0 } } -impl DTR2_R { +#[doc = "Field `DTR2` reader - Dead Time Counter 2 Run bit"] +pub type Dtr2R = crate::BitReader; +impl Dtr2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTR2_A { + pub const fn variant(&self) -> Dtr2 { match self.bits { - false => DTR2_A::VALUE1, - true => DTR2_A::VALUE2, + false => Dtr2::Value1, + true => Dtr2::Value2, } } #[doc = "Dead Time counter is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTR2_A::VALUE1 + *self == Dtr2::Value1 } #[doc = "Dead Time counter is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTR2_A::VALUE2 + *self == Dtr2::Value2 } } impl R { #[doc = "Bit 0 - Timer Run Bit"] #[inline(always)] - pub fn trb(&self) -> TRB_R { - TRB_R::new((self.bits & 1) != 0) + pub fn trb(&self) -> TrbR { + TrbR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Counting Direction"] #[inline(always)] - pub fn cdir(&self) -> CDIR_R { - CDIR_R::new(((self.bits >> 1) & 1) != 0) + pub fn cdir(&self) -> CdirR { + CdirR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Dead Time Counter 1 Run bit"] #[inline(always)] - pub fn dtr1(&self) -> DTR1_R { - DTR1_R::new(((self.bits >> 3) & 1) != 0) + pub fn dtr1(&self) -> Dtr1R { + Dtr1R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Dead Time Counter 2 Run bit"] #[inline(always)] - pub fn dtr2(&self) -> DTR2_R { - DTR2_R::new(((self.bits >> 4) & 1) != 0) + pub fn dtr2(&self) -> Dtr2R { + Dtr2R::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCST_SPEC; -impl crate::RegisterSpec for TCST_SPEC { +pub struct TcstSpec; +impl crate::RegisterSpec for TcstSpec { type Ux = u32; } #[doc = "`read()` method returns [`tcst::R`](R) reader structure"] -impl crate::Readable for TCST_SPEC {} +impl crate::Readable for TcstSpec {} #[doc = "`reset()` method sets TCST to value 0"] -impl crate::Resettable for TCST_SPEC { +impl crate::Resettable for TcstSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/timer.rs b/src/ccu80_cc80/timer.rs index 5aaa3b81..68062f18 100644 --- a/src/ccu80_cc80/timer.rs +++ b/src/ccu80_cc80/timer.rs @@ -1,49 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TVAL` reader - Timer Value"] -pub type TVAL_R = crate::FieldReader; +pub type TvalR = crate::FieldReader; #[doc = "Field `TVAL` writer - Timer Value"] -pub type TVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - pub fn tval(&self) -> TVAL_R { - TVAL_R::new((self.bits & 0xffff) as u16) + pub fn tval(&self) -> TvalR { + TvalR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] #[must_use] - pub fn tval(&mut self) -> TVAL_W { - TVAL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tval(&mut self) -> TvalW { + TvalW::new(self, 0) } } #[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMER_SPEC; -impl crate::RegisterSpec for TIMER_SPEC { +pub struct TimerSpec; +impl crate::RegisterSpec for TimerSpec { type Ux = u32; } #[doc = "`read()` method returns [`timer::R`](R) reader structure"] -impl crate::Readable for TIMER_SPEC {} +impl crate::Readable for TimerSpec {} #[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] -impl crate::Writable for TIMER_SPEC { +impl crate::Writable for TimerSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TIMER_SPEC { +impl crate::Resettable for TimerSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac.rs b/src/dac.rs index b4c0b705..cd8ea809 100644 --- a/src/dac.rs +++ b/src/dac.rs @@ -1,138 +1,150 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, - dac0cfg0: DAC0CFG0, - dac0cfg1: DAC0CFG1, - dac1cfg0: DAC1CFG0, - dac1cfg1: DAC1CFG1, - dac0data: DAC0DATA, - dac1data: DAC1DATA, - dac01data: DAC01DATA, - dac0patl: DAC0PATL, - dac0path: DAC0PATH, - dac1patl: DAC1PATL, - dac1path: DAC1PATH, + id: Id, + dac0cfg0: Dac0cfg0, + dac0cfg1: Dac0cfg1, + dac1cfg0: Dac1cfg0, + dac1cfg1: Dac1cfg1, + dac0data: Dac0data, + dac1data: Dac1data, + dac01data: Dac01data, + dac0patl: Dac0patl, + dac0path: Dac0path, + dac1patl: Dac1patl, + dac1path: Dac1path, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x04 - DAC0 Configuration Register 0"] #[inline(always)] - pub const fn dac0cfg0(&self) -> &DAC0CFG0 { + pub const fn dac0cfg0(&self) -> &Dac0cfg0 { &self.dac0cfg0 } #[doc = "0x08 - DAC0 Configuration Register 1"] #[inline(always)] - pub const fn dac0cfg1(&self) -> &DAC0CFG1 { + pub const fn dac0cfg1(&self) -> &Dac0cfg1 { &self.dac0cfg1 } #[doc = "0x0c - DAC1 Configuration Register 0"] #[inline(always)] - pub const fn dac1cfg0(&self) -> &DAC1CFG0 { + pub const fn dac1cfg0(&self) -> &Dac1cfg0 { &self.dac1cfg0 } #[doc = "0x10 - DAC1 Configuration Register 1"] #[inline(always)] - pub const fn dac1cfg1(&self) -> &DAC1CFG1 { + pub const fn dac1cfg1(&self) -> &Dac1cfg1 { &self.dac1cfg1 } #[doc = "0x14 - DAC0 Data Register"] #[inline(always)] - pub const fn dac0data(&self) -> &DAC0DATA { + pub const fn dac0data(&self) -> &Dac0data { &self.dac0data } #[doc = "0x18 - DAC1 Data Register"] #[inline(always)] - pub const fn dac1data(&self) -> &DAC1DATA { + pub const fn dac1data(&self) -> &Dac1data { &self.dac1data } #[doc = "0x1c - DAC01 Data Register"] #[inline(always)] - pub const fn dac01data(&self) -> &DAC01DATA { + pub const fn dac01data(&self) -> &Dac01data { &self.dac01data } #[doc = "0x20 - DAC0 Lower Pattern Register"] #[inline(always)] - pub const fn dac0patl(&self) -> &DAC0PATL { + pub const fn dac0patl(&self) -> &Dac0patl { &self.dac0patl } #[doc = "0x24 - DAC0 Higher Pattern Register"] #[inline(always)] - pub const fn dac0path(&self) -> &DAC0PATH { + pub const fn dac0path(&self) -> &Dac0path { &self.dac0path } #[doc = "0x28 - DAC1 Lower Pattern Register"] #[inline(always)] - pub const fn dac1patl(&self) -> &DAC1PATL { + pub const fn dac1patl(&self) -> &Dac1patl { &self.dac1patl } #[doc = "0x2c - DAC1 Higher Pattern Register"] #[inline(always)] - pub const fn dac1path(&self) -> &DAC1PATH { + pub const fn dac1path(&self) -> &Dac1path { &self.dac1path } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "DAC0CFG0 (rw) register accessor: DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg0`] module"] -pub type DAC0CFG0 = crate::Reg; +#[doc(alias = "DAC0CFG0")] +pub type Dac0cfg0 = crate::Reg; #[doc = "DAC0 Configuration Register 0"] pub mod dac0cfg0; #[doc = "DAC0CFG1 (rw) register accessor: DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg1`] module"] -pub type DAC0CFG1 = crate::Reg; +#[doc(alias = "DAC0CFG1")] +pub type Dac0cfg1 = crate::Reg; #[doc = "DAC0 Configuration Register 1"] pub mod dac0cfg1; #[doc = "DAC1CFG0 (rw) register accessor: DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg0`] module"] -pub type DAC1CFG0 = crate::Reg; +#[doc(alias = "DAC1CFG0")] +pub type Dac1cfg0 = crate::Reg; #[doc = "DAC1 Configuration Register 0"] pub mod dac1cfg0; #[doc = "DAC1CFG1 (rw) register accessor: DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg1`] module"] -pub type DAC1CFG1 = crate::Reg; +#[doc(alias = "DAC1CFG1")] +pub type Dac1cfg1 = crate::Reg; #[doc = "DAC1 Configuration Register 1"] pub mod dac1cfg1; #[doc = "DAC0DATA (rw) register accessor: DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0data`] module"] -pub type DAC0DATA = crate::Reg; +#[doc(alias = "DAC0DATA")] +pub type Dac0data = crate::Reg; #[doc = "DAC0 Data Register"] pub mod dac0data; #[doc = "DAC1DATA (rw) register accessor: DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1data`] module"] -pub type DAC1DATA = crate::Reg; +#[doc(alias = "DAC1DATA")] +pub type Dac1data = crate::Reg; #[doc = "DAC1 Data Register"] pub mod dac1data; #[doc = "DAC01DATA (rw) register accessor: DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac01data`] module"] -pub type DAC01DATA = crate::Reg; +#[doc(alias = "DAC01DATA")] +pub type Dac01data = crate::Reg; #[doc = "DAC01 Data Register"] pub mod dac01data; #[doc = "DAC0PATL (rw) register accessor: DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0patl`] module"] -pub type DAC0PATL = crate::Reg; +#[doc(alias = "DAC0PATL")] +pub type Dac0patl = crate::Reg; #[doc = "DAC0 Lower Pattern Register"] pub mod dac0patl; #[doc = "DAC0PATH (rw) register accessor: DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0path`] module"] -pub type DAC0PATH = crate::Reg; +#[doc(alias = "DAC0PATH")] +pub type Dac0path = crate::Reg; #[doc = "DAC0 Higher Pattern Register"] pub mod dac0path; #[doc = "DAC1PATL (rw) register accessor: DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1patl`] module"] -pub type DAC1PATL = crate::Reg; +#[doc(alias = "DAC1PATL")] +pub type Dac1patl = crate::Reg; #[doc = "DAC1 Lower Pattern Register"] pub mod dac1patl; #[doc = "DAC1PATH (rw) register accessor: DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1path`] module"] -pub type DAC1PATH = crate::Reg; +#[doc(alias = "DAC1PATH")] +pub type Dac1path = crate::Reg; #[doc = "DAC1 Higher Pattern Register"] pub mod dac1path; diff --git a/src/dac/dac01data.rs b/src/dac/dac01data.rs index ebcaa72c..57b86a76 100644 --- a/src/dac/dac01data.rs +++ b/src/dac/dac01data.rs @@ -1,64 +1,55 @@ #[doc = "Register `DAC01DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC01DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA0` reader - DAC0 Data Bits"] -pub type DATA0_R = crate::FieldReader; +pub type Data0R = crate::FieldReader; #[doc = "Field `DATA0` writer - DAC0 Data Bits"] -pub type DATA0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Data0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DATA1` reader - DAC1 Data Bits"] -pub type DATA1_R = crate::FieldReader; +pub type Data1R = crate::FieldReader; #[doc = "Field `DATA1` writer - DAC1 Data Bits"] -pub type DATA1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Data1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - pub fn data0(&self) -> DATA0_R { - DATA0_R::new((self.bits & 0x0fff) as u16) + pub fn data0(&self) -> Data0R { + Data0R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - DAC1 Data Bits"] #[inline(always)] - pub fn data1(&self) -> DATA1_R { - DATA1_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn data1(&self) -> Data1R { + Data1R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] #[must_use] - pub fn data0(&mut self) -> DATA0_W { - DATA0_W::new(self, 0) + pub fn data0(&mut self) -> Data0W { + Data0W::new(self, 0) } #[doc = "Bits 16:27 - DAC1 Data Bits"] #[inline(always)] #[must_use] - pub fn data1(&mut self) -> DATA1_W { - DATA1_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn data1(&mut self) -> Data1W { + Data1W::new(self, 16) } } #[doc = "DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC01DATA_SPEC; -impl crate::RegisterSpec for DAC01DATA_SPEC { +pub struct Dac01dataSpec; +impl crate::RegisterSpec for Dac01dataSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac01data::R`](R) reader structure"] -impl crate::Readable for DAC01DATA_SPEC {} +impl crate::Readable for Dac01dataSpec {} #[doc = "`write(|w| ..)` method takes [`dac01data::W`](W) writer structure"] -impl crate::Writable for DAC01DATA_SPEC { +impl crate::Writable for Dac01dataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC01DATA to value 0"] -impl crate::Resettable for DAC01DATA_SPEC { +impl crate::Resettable for Dac01dataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0cfg0.rs b/src/dac/dac0cfg0.rs index ed6af61a..1fe15c42 100644 --- a/src/dac/dac0cfg0.rs +++ b/src/dac/dac0cfg0.rs @@ -1,103 +1,103 @@ #[doc = "Register `DAC0CFG0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0CFG0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FREQ` reader - Integer Frequency Divider Value"] -pub type FREQ_R = crate::FieldReader; +pub type FreqR = crate::FieldReader; #[doc = "Field `FREQ` writer - Integer Frequency Divider Value"] -pub type FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `MODE` reader - Enables and Sets the Mode for DAC0"] -pub type MODE_R = crate::FieldReader; +pub type FreqW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Enables and Sets the Mode for DAC0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: disable/switch-off DAC"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single Value Mode"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data Mode"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Patgen Mode"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Noise Mode"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Ramp Mode"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: na"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: na"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl crate::FieldSpec for MODE_A { +impl crate::FieldSpec for Mode { type Ux = u8; } -impl MODE_R { +#[doc = "Field `MODE` reader - Enables and Sets the Mode for DAC0"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::VALUE1, - 1 => MODE_A::VALUE2, - 2 => MODE_A::VALUE3, - 3 => MODE_A::VALUE4, - 4 => MODE_A::VALUE5, - 5 => MODE_A::VALUE6, - 6 => MODE_A::VALUE7, - 7 => MODE_A::VALUE8, + 0 => Mode::Value1, + 1 => Mode::Value2, + 2 => Mode::Value3, + 3 => Mode::Value4, + 4 => Mode::Value5, + 5 => Mode::Value6, + 6 => Mode::Value7, + 7 => Mode::Value8, _ => unreachable!(), } } #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODE_A::VALUE1 + *self == Mode::Value1 } #[doc = "Single Value Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODE_A::VALUE2 + *self == Mode::Value2 } #[doc = "Data Mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MODE_A::VALUE3 + *self == Mode::Value3 } #[doc = "Patgen Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MODE_A::VALUE4 + *self == Mode::Value4 } #[doc = "Noise Mode"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == MODE_A::VALUE5 + *self == Mode::Value5 } #[doc = "Ramp Mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == MODE_A::VALUE6 + *self == Mode::Value6 } #[doc = "na"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == MODE_A::VALUE7 + *self == Mode::Value7 } #[doc = "na"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == MODE_A::VALUE8 + *self == Mode::Value8 } } #[doc = "Field `MODE` writer - Enables and Sets the Mode for DAC0"] -pub type MODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, MODE_A>; -impl<'a, REG> MODE_W<'a, REG> +pub type ModeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Mode>; +impl<'a, REG> ModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -105,479 +105,470 @@ where #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE1) + self.variant(Mode::Value1) } #[doc = "Single Value Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE2) + self.variant(Mode::Value2) } #[doc = "Data Mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE3) + self.variant(Mode::Value3) } #[doc = "Patgen Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE4) + self.variant(Mode::Value4) } #[doc = "Noise Mode"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE5) + self.variant(Mode::Value5) } #[doc = "Ramp Mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE6) + self.variant(Mode::Value6) } #[doc = "na"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE7) + self.variant(Mode::Value7) } #[doc = "na"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE8) + self.variant(Mode::Value8) } } -#[doc = "Field `SIGN` reader - Selects Between Signed and Unsigned DAC0 Mode"] -pub type SIGN_R = crate::BitReader; #[doc = "Selects Between Signed and Unsigned DAC0 Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIGN_A { +pub enum Sign { #[doc = "0: DAC expects unsigned input data"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC expects signed input data"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIGN_A) -> Self { + fn from(variant: Sign) -> Self { variant as u8 != 0 } } -impl SIGN_R { +#[doc = "Field `SIGN` reader - Selects Between Signed and Unsigned DAC0 Mode"] +pub type SignR = crate::BitReader; +impl SignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SIGN_A { + pub const fn variant(&self) -> Sign { match self.bits { - false => SIGN_A::VALUE1, - true => SIGN_A::VALUE2, + false => Sign::Value1, + true => Sign::Value2, } } #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIGN_A::VALUE1 + *self == Sign::Value1 } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIGN_A::VALUE2 + *self == Sign::Value2 } } #[doc = "Field `SIGN` writer - Selects Between Signed and Unsigned DAC0 Mode"] -pub type SIGN_W<'a, REG> = crate::BitWriter<'a, REG, SIGN_A>; -impl<'a, REG> SIGN_W<'a, REG> +pub type SignW<'a, REG> = crate::BitWriter<'a, REG, Sign>; +impl<'a, REG> SignW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIGN_A::VALUE1) + self.variant(Sign::Value1) } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIGN_A::VALUE2) + self.variant(Sign::Value2) } } #[doc = "Field `FIFOIND` reader - Current write position inside the data FIFO"] -pub type FIFOIND_R = crate::FieldReader; -#[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] -pub type FIFOEMP_R = crate::BitReader; +pub type FifoindR = crate::FieldReader; #[doc = "Indicate if the FIFO is empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFOEMP_A { +pub enum Fifoemp { #[doc = "0: FIFO not empty"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FIFO empty"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFOEMP_A) -> Self { + fn from(variant: Fifoemp) -> Self { variant as u8 != 0 } } -impl FIFOEMP_R { +#[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] +pub type FifoempR = crate::BitReader; +impl FifoempR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFOEMP_A { + pub const fn variant(&self) -> Fifoemp { match self.bits { - false => FIFOEMP_A::VALUE1, - true => FIFOEMP_A::VALUE2, + false => Fifoemp::Value1, + true => Fifoemp::Value2, } } #[doc = "FIFO not empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFOEMP_A::VALUE1 + *self == Fifoemp::Value1 } #[doc = "FIFO empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFOEMP_A::VALUE2 + *self == Fifoemp::Value2 } } -#[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] -pub type FIFOFUL_R = crate::BitReader; #[doc = "Indicate if the FIFO is full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFOFUL_A { +pub enum Fifoful { #[doc = "0: FIFO not full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FIFO full"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFOFUL_A) -> Self { + fn from(variant: Fifoful) -> Self { variant as u8 != 0 } } -impl FIFOFUL_R { +#[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] +pub type FifofulR = crate::BitReader; +impl FifofulR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFOFUL_A { + pub const fn variant(&self) -> Fifoful { match self.bits { - false => FIFOFUL_A::VALUE1, - true => FIFOFUL_A::VALUE2, + false => Fifoful::Value1, + true => Fifoful::Value2, } } #[doc = "FIFO not full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFOFUL_A::VALUE1 + *self == Fifoful::Value1 } #[doc = "FIFO full"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFOFUL_A::VALUE2 + *self == Fifoful::Value2 } } -#[doc = "Field `NEGATE` reader - Negates the DAC0 output"] -pub type NEGATE_R = crate::BitReader; #[doc = "Negates the DAC0 output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NEGATE_A { +pub enum Negate { #[doc = "0: DAC output not negated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC output negated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NEGATE_A) -> Self { + fn from(variant: Negate) -> Self { variant as u8 != 0 } } -impl NEGATE_R { +#[doc = "Field `NEGATE` reader - Negates the DAC0 output"] +pub type NegateR = crate::BitReader; +impl NegateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NEGATE_A { + pub const fn variant(&self) -> Negate { match self.bits { - false => NEGATE_A::VALUE1, - true => NEGATE_A::VALUE2, + false => Negate::Value1, + true => Negate::Value2, } } #[doc = "DAC output not negated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NEGATE_A::VALUE1 + *self == Negate::Value1 } #[doc = "DAC output negated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NEGATE_A::VALUE2 + *self == Negate::Value2 } } #[doc = "Field `NEGATE` writer - Negates the DAC0 output"] -pub type NEGATE_W<'a, REG> = crate::BitWriter<'a, REG, NEGATE_A>; -impl<'a, REG> NEGATE_W<'a, REG> +pub type NegateW<'a, REG> = crate::BitWriter<'a, REG, Negate>; +impl<'a, REG> NegateW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC output not negated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NEGATE_A::VALUE1) + self.variant(Negate::Value1) } #[doc = "DAC output negated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NEGATE_A::VALUE2) + self.variant(Negate::Value2) } } -#[doc = "Field `SIGNEN` reader - Enable Sign Output of DAC0 Pattern Generator"] -pub type SIGNEN_R = crate::BitReader; #[doc = "Enable Sign Output of DAC0 Pattern Generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIGNEN_A { +pub enum Signen { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIGNEN_A) -> Self { + fn from(variant: Signen) -> Self { variant as u8 != 0 } } -impl SIGNEN_R { +#[doc = "Field `SIGNEN` reader - Enable Sign Output of DAC0 Pattern Generator"] +pub type SignenR = crate::BitReader; +impl SignenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SIGNEN_A { + pub const fn variant(&self) -> Signen { match self.bits { - false => SIGNEN_A::VALUE1, - true => SIGNEN_A::VALUE2, + false => Signen::Value1, + true => Signen::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIGNEN_A::VALUE1 + *self == Signen::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIGNEN_A::VALUE2 + *self == Signen::Value2 } } #[doc = "Field `SIGNEN` writer - Enable Sign Output of DAC0 Pattern Generator"] -pub type SIGNEN_W<'a, REG> = crate::BitWriter<'a, REG, SIGNEN_A>; -impl<'a, REG> SIGNEN_W<'a, REG> +pub type SignenW<'a, REG> = crate::BitWriter<'a, REG, Signen>; +impl<'a, REG> SignenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIGNEN_A::VALUE1) + self.variant(Signen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIGNEN_A::VALUE2) + self.variant(Signen::Value2) } } -#[doc = "Field `SREN` reader - Enable DAC0 service request interrupt generation"] -pub type SREN_R = crate::BitReader; #[doc = "Enable DAC0 service request interrupt generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SREN_A { +pub enum Sren { #[doc = "0: disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SREN_A) -> Self { + fn from(variant: Sren) -> Self { variant as u8 != 0 } } -impl SREN_R { +#[doc = "Field `SREN` reader - Enable DAC0 service request interrupt generation"] +pub type SrenR = crate::BitReader; +impl SrenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SREN_A { + pub const fn variant(&self) -> Sren { match self.bits { - false => SREN_A::VALUE1, - true => SREN_A::VALUE2, + false => Sren::Value1, + true => Sren::Value2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SREN_A::VALUE1 + *self == Sren::Value1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SREN_A::VALUE2 + *self == Sren::Value2 } } #[doc = "Field `SREN` writer - Enable DAC0 service request interrupt generation"] -pub type SREN_W<'a, REG> = crate::BitWriter<'a, REG, SREN_A>; -impl<'a, REG> SREN_W<'a, REG> +pub type SrenW<'a, REG> = crate::BitWriter<'a, REG, Sren>; +impl<'a, REG> SrenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SREN_A::VALUE1) + self.variant(Sren::Value1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SREN_A::VALUE2) + self.variant(Sren::Value2) } } -#[doc = "Field `RUN` reader - RUN indicates the current DAC0 operation status"] -pub type RUN_R = crate::BitReader; #[doc = "RUN indicates the current DAC0 operation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RUN_A { +pub enum Run { #[doc = "0: DAC0 channel disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC0 channel in operation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RUN_A) -> Self { + fn from(variant: Run) -> Self { variant as u8 != 0 } } -impl RUN_R { +#[doc = "Field `RUN` reader - RUN indicates the current DAC0 operation status"] +pub type RunR = crate::BitReader; +impl RunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RUN_A { + pub const fn variant(&self) -> Run { match self.bits { - false => RUN_A::VALUE1, - true => RUN_A::VALUE2, + false => Run::Value1, + true => Run::Value2, } } #[doc = "DAC0 channel disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RUN_A::VALUE1 + *self == Run::Value1 } #[doc = "DAC0 channel in operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RUN_A::VALUE2 + *self == Run::Value2 } } impl R { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - pub fn freq(&self) -> FREQ_R { - FREQ_R::new(self.bits & 0x000f_ffff) + pub fn freq(&self) -> FreqR { + FreqR::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 20) & 7) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"] #[inline(always)] - pub fn sign(&self) -> SIGN_R { - SIGN_R::new(((self.bits >> 23) & 1) != 0) + pub fn sign(&self) -> SignR { + SignR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Current write position inside the data FIFO"] #[inline(always)] - pub fn fifoind(&self) -> FIFOIND_R { - FIFOIND_R::new(((self.bits >> 24) & 3) as u8) + pub fn fifoind(&self) -> FifoindR { + FifoindR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Indicate if the FIFO is empty"] #[inline(always)] - pub fn fifoemp(&self) -> FIFOEMP_R { - FIFOEMP_R::new(((self.bits >> 26) & 1) != 0) + pub fn fifoemp(&self) -> FifoempR { + FifoempR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Indicate if the FIFO is full"] #[inline(always)] - pub fn fifoful(&self) -> FIFOFUL_R { - FIFOFUL_R::new(((self.bits >> 27) & 1) != 0) + pub fn fifoful(&self) -> FifofulR { + FifofulR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Negates the DAC0 output"] #[inline(always)] - pub fn negate(&self) -> NEGATE_R { - NEGATE_R::new(((self.bits >> 28) & 1) != 0) + pub fn negate(&self) -> NegateR { + NegateR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"] #[inline(always)] - pub fn signen(&self) -> SIGNEN_R { - SIGNEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn signen(&self) -> SignenR { + SignenR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"] #[inline(always)] - pub fn sren(&self) -> SREN_R { - SREN_R::new(((self.bits >> 30) & 1) != 0) + pub fn sren(&self) -> SrenR { + SrenR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - RUN indicates the current DAC0 operation status"] #[inline(always)] - pub fn run(&self) -> RUN_R { - RUN_R::new(((self.bits >> 31) & 1) != 0) + pub fn run(&self) -> RunR { + RunR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] #[must_use] - pub fn freq(&mut self) -> FREQ_W { - FREQ_W::new(self, 0) + pub fn freq(&mut self) -> FreqW { + FreqW::new(self, 0) } #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W { - MODE_W::new(self, 20) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 20) } #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"] #[inline(always)] #[must_use] - pub fn sign(&mut self) -> SIGN_W { - SIGN_W::new(self, 23) + pub fn sign(&mut self) -> SignW { + SignW::new(self, 23) } #[doc = "Bit 28 - Negates the DAC0 output"] #[inline(always)] #[must_use] - pub fn negate(&mut self) -> NEGATE_W { - NEGATE_W::new(self, 28) + pub fn negate(&mut self) -> NegateW { + NegateW::new(self, 28) } #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"] #[inline(always)] #[must_use] - pub fn signen(&mut self) -> SIGNEN_W { - SIGNEN_W::new(self, 29) + pub fn signen(&mut self) -> SignenW { + SignenW::new(self, 29) } #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"] #[inline(always)] #[must_use] - pub fn sren(&mut self) -> SREN_W { - SREN_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sren(&mut self) -> SrenW { + SrenW::new(self, 30) } } #[doc = "DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC0CFG0_SPEC; -impl crate::RegisterSpec for DAC0CFG0_SPEC { +pub struct Dac0cfg0Spec; +impl crate::RegisterSpec for Dac0cfg0Spec { type Ux = u32; } #[doc = "`read()` method returns [`dac0cfg0::R`](R) reader structure"] -impl crate::Readable for DAC0CFG0_SPEC {} +impl crate::Readable for Dac0cfg0Spec {} #[doc = "`write(|w| ..)` method takes [`dac0cfg0::W`](W) writer structure"] -impl crate::Writable for DAC0CFG0_SPEC { +impl crate::Writable for Dac0cfg0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0CFG0 to value 0"] -impl crate::Resettable for DAC0CFG0_SPEC { +impl crate::Resettable for Dac0cfg0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0cfg1.rs b/src/dac/dac0cfg1.rs index 76ba0eb8..8c87bf68 100644 --- a/src/dac/dac0cfg1.rs +++ b/src/dac/dac0cfg1.rs @@ -1,99 +1,99 @@ #[doc = "Register `DAC0CFG1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0CFG1` writer"] -pub type W = crate::W; -#[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] -pub type SCALE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCALE_A { +pub enum Scale { #[doc = "0: no shift = multiplication/division by 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: shift by 1 = multiplication/division by 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: shift by 2 = multiplication/division by 4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: shift left by 3 = multiplication/division by 8"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: shift left by 4 = multiplication/division by 16"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: shift left by 5 = multiplication/division by 32"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: shift left by 6 = multiplication/division by 64"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: shift left by 7 = multiplication/division by 128"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCALE_A) -> Self { + fn from(variant: Scale) -> Self { variant as _ } } -impl crate::FieldSpec for SCALE_A { +impl crate::FieldSpec for Scale { type Ux = u8; } -impl SCALE_R { +#[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] +pub type ScaleR = crate::FieldReader; +impl ScaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCALE_A { + pub const fn variant(&self) -> Scale { match self.bits { - 0 => SCALE_A::VALUE1, - 1 => SCALE_A::VALUE2, - 2 => SCALE_A::VALUE3, - 3 => SCALE_A::VALUE4, - 4 => SCALE_A::VALUE5, - 5 => SCALE_A::VALUE6, - 6 => SCALE_A::VALUE7, - 7 => SCALE_A::VALUE8, + 0 => Scale::Value1, + 1 => Scale::Value2, + 2 => Scale::Value3, + 3 => Scale::Value4, + 4 => Scale::Value5, + 5 => Scale::Value6, + 6 => Scale::Value7, + 7 => Scale::Value8, _ => unreachable!(), } } #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCALE_A::VALUE1 + *self == Scale::Value1 } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCALE_A::VALUE2 + *self == Scale::Value2 } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SCALE_A::VALUE3 + *self == Scale::Value3 } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SCALE_A::VALUE4 + *self == Scale::Value4 } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SCALE_A::VALUE5 + *self == Scale::Value5 } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SCALE_A::VALUE6 + *self == Scale::Value6 } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SCALE_A::VALUE7 + *self == Scale::Value7 } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == SCALE_A::VALUE8 + *self == Scale::Value8 } } #[doc = "Field `SCALE` writer - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] -pub type SCALE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, SCALE_A>; -impl<'a, REG> SCALE_W<'a, REG> +pub type ScaleW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Scale>; +impl<'a, REG> ScaleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,214 +101,214 @@ where #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE1) + self.variant(Scale::Value1) } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE2) + self.variant(Scale::Value2) } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE3) + self.variant(Scale::Value3) } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE4) + self.variant(Scale::Value4) } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE5) + self.variant(Scale::Value5) } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE6) + self.variant(Scale::Value6) } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE7) + self.variant(Scale::Value7) } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE8) + self.variant(Scale::Value8) } } -#[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC0 input data values"] -pub type MULDIV_R = crate::BitReader; #[doc = "Switch between up- and downscale of the DAC0 input data values\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MULDIV_A { +pub enum Muldiv { #[doc = "0: downscale = division (shift SCALE positions to the right)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: upscale = multiplication (shift SCALE positions to the left)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MULDIV_A) -> Self { + fn from(variant: Muldiv) -> Self { variant as u8 != 0 } } -impl MULDIV_R { +#[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC0 input data values"] +pub type MuldivR = crate::BitReader; +impl MuldivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MULDIV_A { + pub const fn variant(&self) -> Muldiv { match self.bits { - false => MULDIV_A::VALUE1, - true => MULDIV_A::VALUE2, + false => Muldiv::Value1, + true => Muldiv::Value2, } } #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MULDIV_A::VALUE1 + *self == Muldiv::Value1 } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MULDIV_A::VALUE2 + *self == Muldiv::Value2 } } #[doc = "Field `MULDIV` writer - Switch between up- and downscale of the DAC0 input data values"] -pub type MULDIV_W<'a, REG> = crate::BitWriter<'a, REG, MULDIV_A>; -impl<'a, REG> MULDIV_W<'a, REG> +pub type MuldivW<'a, REG> = crate::BitWriter<'a, REG, Muldiv>; +impl<'a, REG> MuldivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MULDIV_A::VALUE1) + self.variant(Muldiv::Value1) } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MULDIV_A::VALUE2) + self.variant(Muldiv::Value2) } } #[doc = "Field `OFFS` reader - 8-bit offset value addition"] -pub type OFFS_R = crate::FieldReader; +pub type OffsR = crate::FieldReader; #[doc = "Field `OFFS` writer - 8-bit offset value addition"] -pub type OFFS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type OffsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRIGSEL` reader - Selects one of the eight external trigger sources for DAC0"] -pub type TRIGSEL_R = crate::FieldReader; +pub type TrigselR = crate::FieldReader; #[doc = "Field `TRIGSEL` writer - Selects one of the eight external trigger sources for DAC0"] -pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `DATMOD` reader - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] -pub type DATMOD_R = crate::BitReader; +pub type TrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATMOD_A { +pub enum Datmod { #[doc = "0: independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATMOD_A) -> Self { + fn from(variant: Datmod) -> Self { variant as u8 != 0 } } -impl DATMOD_R { +#[doc = "Field `DATMOD` reader - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] +pub type DatmodR = crate::BitReader; +impl DatmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATMOD_A { + pub const fn variant(&self) -> Datmod { match self.bits { - false => DATMOD_A::VALUE1, - true => DATMOD_A::VALUE2, + false => Datmod::Value1, + true => Datmod::Value2, } } #[doc = "independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATMOD_A::VALUE1 + *self == Datmod::Value1 } #[doc = "simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATMOD_A::VALUE2 + *self == Datmod::Value2 } } #[doc = "Field `DATMOD` writer - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] -pub type DATMOD_W<'a, REG> = crate::BitWriter<'a, REG, DATMOD_A>; -impl<'a, REG> DATMOD_W<'a, REG> +pub type DatmodW<'a, REG> = crate::BitWriter<'a, REG, Datmod>; +impl<'a, REG> DatmodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATMOD_A::VALUE1) + self.variant(Datmod::Value1) } #[doc = "simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATMOD_A::VALUE2) + self.variant(Datmod::Value2) } } #[doc = "Field `SWTRIG` reader - Software Trigger"] -pub type SWTRIG_R = crate::BitReader; +pub type SwtrigR = crate::BitReader; #[doc = "Field `SWTRIG` writer - Software Trigger"] -pub type SWTRIG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 0"] -pub type TRIGMOD_R = crate::FieldReader; +pub type SwtrigW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Select the trigger source for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMOD_A { +pub enum Trigmod { #[doc = "0: internal Trigger (integer divided clock - see FREQ parameter)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external Trigger (preselected trigger by TRIGSEL parameter)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: software Trigger (see SWTRIG parameter)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMOD_A) -> Self { + fn from(variant: Trigmod) -> Self { variant as _ } } -impl crate::FieldSpec for TRIGMOD_A { +impl crate::FieldSpec for Trigmod { type Ux = u8; } -impl TRIGMOD_R { +#[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 0"] +pub type TrigmodR = crate::FieldReader; +impl TrigmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMOD_A::VALUE1), - 1 => Some(TRIGMOD_A::VALUE2), - 2 => Some(TRIGMOD_A::VALUE3), + 0 => Some(Trigmod::Value1), + 1 => Some(Trigmod::Value2), + 2 => Some(Trigmod::Value3), _ => None, } } #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRIGMOD_A::VALUE1 + *self == Trigmod::Value1 } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRIGMOD_A::VALUE2 + *self == Trigmod::Value2 } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TRIGMOD_A::VALUE3 + *self == Trigmod::Value3 } } #[doc = "Field `TRIGMOD` writer - Select the trigger source for channel 0"] -pub type TRIGMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRIGMOD_A>; -impl<'a, REG> TRIGMOD_W<'a, REG> +pub type TrigmodW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trigmod>; +impl<'a, REG> TrigmodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -316,217 +316,208 @@ where #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE1) + self.variant(Trigmod::Value1) } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE2) + self.variant(Trigmod::Value2) } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE3) + self.variant(Trigmod::Value3) } } #[doc = "Field `ANACFG` reader - DAC0 analog configuration/calibration parameters"] -pub type ANACFG_R = crate::FieldReader; +pub type AnacfgR = crate::FieldReader; #[doc = "Field `ANACFG` writer - DAC0 analog configuration/calibration parameters"] -pub type ANACFG_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `ANAEN` reader - Enable analog DAC for channel 0"] -pub type ANAEN_R = crate::BitReader; +pub type AnacfgW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Enable analog DAC for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ANAEN_A { +pub enum Anaen { #[doc = "0: DAC0 is set to standby (analog output only)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable DAC0 (analog output only)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ANAEN_A) -> Self { + fn from(variant: Anaen) -> Self { variant as u8 != 0 } } -impl ANAEN_R { +#[doc = "Field `ANAEN` reader - Enable analog DAC for channel 0"] +pub type AnaenR = crate::BitReader; +impl AnaenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ANAEN_A { + pub const fn variant(&self) -> Anaen { match self.bits { - false => ANAEN_A::VALUE1, - true => ANAEN_A::VALUE2, + false => Anaen::Value1, + true => Anaen::Value2, } } #[doc = "DAC0 is set to standby (analog output only)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ANAEN_A::VALUE1 + *self == Anaen::Value1 } #[doc = "enable DAC0 (analog output only)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ANAEN_A::VALUE2 + *self == Anaen::Value2 } } #[doc = "Field `ANAEN` writer - Enable analog DAC for channel 0"] -pub type ANAEN_W<'a, REG> = crate::BitWriter<'a, REG, ANAEN_A>; -impl<'a, REG> ANAEN_W<'a, REG> +pub type AnaenW<'a, REG> = crate::BitWriter<'a, REG, Anaen>; +impl<'a, REG> AnaenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC0 is set to standby (analog output only)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ANAEN_A::VALUE1) + self.variant(Anaen::Value1) } #[doc = "enable DAC0 (analog output only)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ANAEN_A::VALUE2) + self.variant(Anaen::Value2) } } #[doc = "Field `REFCFGL` reader - Lower 4 band-gap configuration/calibration parameters"] -pub type REFCFGL_R = crate::FieldReader; +pub type RefcfglR = crate::FieldReader; #[doc = "Field `REFCFGL` writer - Lower 4 band-gap configuration/calibration parameters"] -pub type REFCFGL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RefcfglW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - pub fn scale(&self) -> SCALE_R { - SCALE_R::new((self.bits & 7) as u8) + pub fn scale(&self) -> ScaleR { + ScaleR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"] #[inline(always)] - pub fn muldiv(&self) -> MULDIV_R { - MULDIV_R::new(((self.bits >> 3) & 1) != 0) + pub fn muldiv(&self) -> MuldivR { + MuldivR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - pub fn offs(&self) -> OFFS_R { - OFFS_R::new(((self.bits >> 4) & 0xff) as u8) + pub fn offs(&self) -> OffsR { + OffsR::new(((self.bits >> 4) & 0xff) as u8) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"] #[inline(always)] - pub fn trigsel(&self) -> TRIGSEL_R { - TRIGSEL_R::new(((self.bits >> 12) & 7) as u8) + pub fn trigsel(&self) -> TrigselR { + TrigselR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] #[inline(always)] - pub fn datmod(&self) -> DATMOD_R { - DATMOD_R::new(((self.bits >> 15) & 1) != 0) + pub fn datmod(&self) -> DatmodR { + DatmodR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - pub fn swtrig(&self) -> SWTRIG_R { - SWTRIG_R::new(((self.bits >> 16) & 1) != 0) + pub fn swtrig(&self) -> SwtrigR { + SwtrigR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:18 - Select the trigger source for channel 0"] #[inline(always)] - pub fn trigmod(&self) -> TRIGMOD_R { - TRIGMOD_R::new(((self.bits >> 17) & 3) as u8) + pub fn trigmod(&self) -> TrigmodR { + TrigmodR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"] #[inline(always)] - pub fn anacfg(&self) -> ANACFG_R { - ANACFG_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn anacfg(&self) -> AnacfgR { + AnacfgR::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bit 24 - Enable analog DAC for channel 0"] #[inline(always)] - pub fn anaen(&self) -> ANAEN_R { - ANAEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn anaen(&self) -> AnaenR { + AnaenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"] #[inline(always)] - pub fn refcfgl(&self) -> REFCFGL_R { - REFCFGL_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn refcfgl(&self) -> RefcfglR { + RefcfglR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] #[must_use] - pub fn scale(&mut self) -> SCALE_W { - SCALE_W::new(self, 0) + pub fn scale(&mut self) -> ScaleW { + ScaleW::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"] #[inline(always)] #[must_use] - pub fn muldiv(&mut self) -> MULDIV_W { - MULDIV_W::new(self, 3) + pub fn muldiv(&mut self) -> MuldivW { + MuldivW::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] #[must_use] - pub fn offs(&mut self) -> OFFS_W { - OFFS_W::new(self, 4) + pub fn offs(&mut self) -> OffsW { + OffsW::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"] #[inline(always)] #[must_use] - pub fn trigsel(&mut self) -> TRIGSEL_W { - TRIGSEL_W::new(self, 12) + pub fn trigsel(&mut self) -> TrigselW { + TrigselW::new(self, 12) } #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] #[inline(always)] #[must_use] - pub fn datmod(&mut self) -> DATMOD_W { - DATMOD_W::new(self, 15) + pub fn datmod(&mut self) -> DatmodW { + DatmodW::new(self, 15) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] #[must_use] - pub fn swtrig(&mut self) -> SWTRIG_W { - SWTRIG_W::new(self, 16) + pub fn swtrig(&mut self) -> SwtrigW { + SwtrigW::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 0"] #[inline(always)] #[must_use] - pub fn trigmod(&mut self) -> TRIGMOD_W { - TRIGMOD_W::new(self, 17) + pub fn trigmod(&mut self) -> TrigmodW { + TrigmodW::new(self, 17) } #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn anacfg(&mut self) -> ANACFG_W { - ANACFG_W::new(self, 19) + pub fn anacfg(&mut self) -> AnacfgW { + AnacfgW::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 0"] #[inline(always)] #[must_use] - pub fn anaen(&mut self) -> ANAEN_W { - ANAEN_W::new(self, 24) + pub fn anaen(&mut self) -> AnaenW { + AnaenW::new(self, 24) } #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn refcfgl(&mut self) -> REFCFGL_W { - REFCFGL_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn refcfgl(&mut self) -> RefcfglW { + RefcfglW::new(self, 28) } } #[doc = "DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC0CFG1_SPEC; -impl crate::RegisterSpec for DAC0CFG1_SPEC { +pub struct Dac0cfg1Spec; +impl crate::RegisterSpec for Dac0cfg1Spec { type Ux = u32; } #[doc = "`read()` method returns [`dac0cfg1::R`](R) reader structure"] -impl crate::Readable for DAC0CFG1_SPEC {} +impl crate::Readable for Dac0cfg1Spec {} #[doc = "`write(|w| ..)` method takes [`dac0cfg1::W`](W) writer structure"] -impl crate::Writable for DAC0CFG1_SPEC { +impl crate::Writable for Dac0cfg1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0CFG1 to value 0"] -impl crate::Resettable for DAC0CFG1_SPEC { +impl crate::Resettable for Dac0cfg1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0data.rs b/src/dac/dac0data.rs index ecdf102c..ec33c426 100644 --- a/src/dac/dac0data.rs +++ b/src/dac/dac0data.rs @@ -1,49 +1,40 @@ #[doc = "Register `DAC0DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA0` reader - DAC0 Data Bits"] -pub type DATA0_R = crate::FieldReader; +pub type Data0R = crate::FieldReader; #[doc = "Field `DATA0` writer - DAC0 Data Bits"] -pub type DATA0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Data0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - pub fn data0(&self) -> DATA0_R { - DATA0_R::new((self.bits & 0x0fff) as u16) + pub fn data0(&self) -> Data0R { + Data0R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] #[must_use] - pub fn data0(&mut self) -> DATA0_W { - DATA0_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn data0(&mut self) -> Data0W { + Data0W::new(self, 0) } } #[doc = "DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC0DATA_SPEC; -impl crate::RegisterSpec for DAC0DATA_SPEC { +pub struct Dac0dataSpec; +impl crate::RegisterSpec for Dac0dataSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac0data::R`](R) reader structure"] -impl crate::Readable for DAC0DATA_SPEC {} +impl crate::Readable for Dac0dataSpec {} #[doc = "`write(|w| ..)` method takes [`dac0data::W`](W) writer structure"] -impl crate::Writable for DAC0DATA_SPEC { +impl crate::Writable for Dac0dataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0DATA to value 0"] -impl crate::Resettable for DAC0DATA_SPEC { +impl crate::Resettable for Dac0dataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0path.rs b/src/dac/dac0path.rs index 757b6794..9d3102be 100644 --- a/src/dac/dac0path.rs +++ b/src/dac/dac0path.rs @@ -1,79 +1,70 @@ #[doc = "Register `DAC0PATH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0PATH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT6` reader - Pattern Number 6 for PATGEN of DAC0"] -pub type PAT6_R = crate::FieldReader; +pub type Pat6R = crate::FieldReader; #[doc = "Field `PAT6` writer - Pattern Number 6 for PATGEN of DAC0"] -pub type PAT6_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat6W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT7` reader - Pattern Number 7 for PATGEN of DAC0"] -pub type PAT7_R = crate::FieldReader; +pub type Pat7R = crate::FieldReader; #[doc = "Field `PAT7` writer - Pattern Number 7 for PATGEN of DAC0"] -pub type PAT7_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat7W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT8` reader - Pattern Number 8 for PATGEN of DAC0"] -pub type PAT8_R = crate::FieldReader; +pub type Pat8R = crate::FieldReader; #[doc = "Field `PAT8` writer - Pattern Number 8 for PATGEN of DAC0"] -pub type PAT8_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat8W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"] #[inline(always)] - pub fn pat6(&self) -> PAT6_R { - PAT6_R::new((self.bits & 0x1f) as u8) + pub fn pat6(&self) -> Pat6R { + Pat6R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"] #[inline(always)] - pub fn pat7(&self) -> PAT7_R { - PAT7_R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat7(&self) -> Pat7R { + Pat7R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"] #[inline(always)] - pub fn pat8(&self) -> PAT8_R { - PAT8_R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat8(&self) -> Pat8R { + Pat8R::new(((self.bits >> 10) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat6(&mut self) -> PAT6_W { - PAT6_W::new(self, 0) + pub fn pat6(&mut self) -> Pat6W { + Pat6W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat7(&mut self) -> PAT7_W { - PAT7_W::new(self, 5) + pub fn pat7(&mut self) -> Pat7W { + Pat7W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat8(&mut self) -> PAT8_W { - PAT8_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pat8(&mut self) -> Pat8W { + Pat8W::new(self, 10) } } #[doc = "DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC0PATH_SPEC; -impl crate::RegisterSpec for DAC0PATH_SPEC { +pub struct Dac0pathSpec; +impl crate::RegisterSpec for Dac0pathSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac0path::R`](R) reader structure"] -impl crate::Readable for DAC0PATH_SPEC {} +impl crate::Readable for Dac0pathSpec {} #[doc = "`write(|w| ..)` method takes [`dac0path::W`](W) writer structure"] -impl crate::Writable for DAC0PATH_SPEC { +impl crate::Writable for Dac0pathSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0PATH to value 0x7fdd"] -impl crate::Resettable for DAC0PATH_SPEC { +impl crate::Resettable for Dac0pathSpec { const RESET_VALUE: u32 = 0x7fdd; } diff --git a/src/dac/dac0patl.rs b/src/dac/dac0patl.rs index 582c3478..c0f7dcf6 100644 --- a/src/dac/dac0patl.rs +++ b/src/dac/dac0patl.rs @@ -1,124 +1,115 @@ #[doc = "Register `DAC0PATL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0PATL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT0` reader - Pattern Number 0 for PATGEN of DAC0"] -pub type PAT0_R = crate::FieldReader; +pub type Pat0R = crate::FieldReader; #[doc = "Field `PAT0` writer - Pattern Number 0 for PATGEN of DAC0"] -pub type PAT0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT1` reader - Pattern Number 1 for PATGEN of DAC0"] -pub type PAT1_R = crate::FieldReader; +pub type Pat1R = crate::FieldReader; #[doc = "Field `PAT1` writer - Pattern Number 1 for PATGEN of DAC0"] -pub type PAT1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT2` reader - Pattern Number 2 for PATGEN of DAC0"] -pub type PAT2_R = crate::FieldReader; +pub type Pat2R = crate::FieldReader; #[doc = "Field `PAT2` writer - Pattern Number 2 for PATGEN of DAC0"] -pub type PAT2_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat2W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT3` reader - Pattern Number 3 for PATGEN of DAC0"] -pub type PAT3_R = crate::FieldReader; +pub type Pat3R = crate::FieldReader; #[doc = "Field `PAT3` writer - Pattern Number 3 for PATGEN of DAC0"] -pub type PAT3_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat3W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT4` reader - Pattern Number 4 for PATGEN of DAC0"] -pub type PAT4_R = crate::FieldReader; +pub type Pat4R = crate::FieldReader; #[doc = "Field `PAT4` writer - Pattern Number 4 for PATGEN of DAC0"] -pub type PAT4_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat4W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT5` reader - Pattern Number 5 for PATGEN of DAC0"] -pub type PAT5_R = crate::FieldReader; +pub type Pat5R = crate::FieldReader; #[doc = "Field `PAT5` writer - Pattern Number 5 for PATGEN of DAC0"] -pub type PAT5_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat5W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"] #[inline(always)] - pub fn pat0(&self) -> PAT0_R { - PAT0_R::new((self.bits & 0x1f) as u8) + pub fn pat0(&self) -> Pat0R { + Pat0R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"] #[inline(always)] - pub fn pat1(&self) -> PAT1_R { - PAT1_R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat1(&self) -> Pat1R { + Pat1R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"] #[inline(always)] - pub fn pat2(&self) -> PAT2_R { - PAT2_R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat2(&self) -> Pat2R { + Pat2R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"] #[inline(always)] - pub fn pat3(&self) -> PAT3_R { - PAT3_R::new(((self.bits >> 15) & 0x1f) as u8) + pub fn pat3(&self) -> Pat3R { + Pat3R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"] #[inline(always)] - pub fn pat4(&self) -> PAT4_R { - PAT4_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn pat4(&self) -> Pat4R { + Pat4R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"] #[inline(always)] - pub fn pat5(&self) -> PAT5_R { - PAT5_R::new(((self.bits >> 25) & 0x1f) as u8) + pub fn pat5(&self) -> Pat5R { + Pat5R::new(((self.bits >> 25) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat0(&mut self) -> PAT0_W { - PAT0_W::new(self, 0) + pub fn pat0(&mut self) -> Pat0W { + Pat0W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat1(&mut self) -> PAT1_W { - PAT1_W::new(self, 5) + pub fn pat1(&mut self) -> Pat1W { + Pat1W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat2(&mut self) -> PAT2_W { - PAT2_W::new(self, 10) + pub fn pat2(&mut self) -> Pat2W { + Pat2W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat3(&mut self) -> PAT3_W { - PAT3_W::new(self, 15) + pub fn pat3(&mut self) -> Pat3W { + Pat3W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat4(&mut self) -> PAT4_W { - PAT4_W::new(self, 20) + pub fn pat4(&mut self) -> Pat4W { + Pat4W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat5(&mut self) -> PAT5_W { - PAT5_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pat5(&mut self) -> Pat5W { + Pat5W::new(self, 25) } } #[doc = "DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC0PATL_SPEC; -impl crate::RegisterSpec for DAC0PATL_SPEC { +pub struct Dac0patlSpec; +impl crate::RegisterSpec for Dac0patlSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac0patl::R`](R) reader structure"] -impl crate::Readable for DAC0PATL_SPEC {} +impl crate::Readable for Dac0patlSpec {} #[doc = "`write(|w| ..)` method takes [`dac0patl::W`](W) writer structure"] -impl crate::Writable for DAC0PATL_SPEC { +impl crate::Writable for Dac0patlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0PATL to value 0x3568_b0c0"] -impl crate::Resettable for DAC0PATL_SPEC { +impl crate::Resettable for Dac0patlSpec { const RESET_VALUE: u32 = 0x3568_b0c0; } diff --git a/src/dac/dac1cfg0.rs b/src/dac/dac1cfg0.rs index 7adf1d1b..b670d017 100644 --- a/src/dac/dac1cfg0.rs +++ b/src/dac/dac1cfg0.rs @@ -1,103 +1,103 @@ #[doc = "Register `DAC1CFG0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1CFG0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FREQ` reader - Integer Frequency Divider Value"] -pub type FREQ_R = crate::FieldReader; +pub type FreqR = crate::FieldReader; #[doc = "Field `FREQ` writer - Integer Frequency Divider Value"] -pub type FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; -#[doc = "Field `MODE` reader - Enables and sets the Mode for DAC1"] -pub type MODE_R = crate::FieldReader; +pub type FreqW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Enables and sets the Mode for DAC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: disable/switch-off DAC"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single Value Mode"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data Mode"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Patgen Mode"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Noise Mode"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Ramp Mode"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: na"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: na"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl crate::FieldSpec for MODE_A { +impl crate::FieldSpec for Mode { type Ux = u8; } -impl MODE_R { +#[doc = "Field `MODE` reader - Enables and sets the Mode for DAC1"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::VALUE1, - 1 => MODE_A::VALUE2, - 2 => MODE_A::VALUE3, - 3 => MODE_A::VALUE4, - 4 => MODE_A::VALUE5, - 5 => MODE_A::VALUE6, - 6 => MODE_A::VALUE7, - 7 => MODE_A::VALUE8, + 0 => Mode::Value1, + 1 => Mode::Value2, + 2 => Mode::Value3, + 3 => Mode::Value4, + 4 => Mode::Value5, + 5 => Mode::Value6, + 6 => Mode::Value7, + 7 => Mode::Value8, _ => unreachable!(), } } #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODE_A::VALUE1 + *self == Mode::Value1 } #[doc = "Single Value Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODE_A::VALUE2 + *self == Mode::Value2 } #[doc = "Data Mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MODE_A::VALUE3 + *self == Mode::Value3 } #[doc = "Patgen Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MODE_A::VALUE4 + *self == Mode::Value4 } #[doc = "Noise Mode"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == MODE_A::VALUE5 + *self == Mode::Value5 } #[doc = "Ramp Mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == MODE_A::VALUE6 + *self == Mode::Value6 } #[doc = "na"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == MODE_A::VALUE7 + *self == Mode::Value7 } #[doc = "na"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == MODE_A::VALUE8 + *self == Mode::Value8 } } #[doc = "Field `MODE` writer - Enables and sets the Mode for DAC1"] -pub type MODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, MODE_A>; -impl<'a, REG> MODE_W<'a, REG> +pub type ModeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Mode>; +impl<'a, REG> ModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -105,479 +105,470 @@ where #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE1) + self.variant(Mode::Value1) } #[doc = "Single Value Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE2) + self.variant(Mode::Value2) } #[doc = "Data Mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE3) + self.variant(Mode::Value3) } #[doc = "Patgen Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE4) + self.variant(Mode::Value4) } #[doc = "Noise Mode"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE5) + self.variant(Mode::Value5) } #[doc = "Ramp Mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE6) + self.variant(Mode::Value6) } #[doc = "na"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE7) + self.variant(Mode::Value7) } #[doc = "na"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE8) + self.variant(Mode::Value8) } } -#[doc = "Field `SIGN` reader - Selects between signed and unsigned DAC1 mode"] -pub type SIGN_R = crate::BitReader; #[doc = "Selects between signed and unsigned DAC1 mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIGN_A { +pub enum Sign { #[doc = "0: DAC expects unsigned input data"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC expects signed input data"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIGN_A) -> Self { + fn from(variant: Sign) -> Self { variant as u8 != 0 } } -impl SIGN_R { +#[doc = "Field `SIGN` reader - Selects between signed and unsigned DAC1 mode"] +pub type SignR = crate::BitReader; +impl SignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SIGN_A { + pub const fn variant(&self) -> Sign { match self.bits { - false => SIGN_A::VALUE1, - true => SIGN_A::VALUE2, + false => Sign::Value1, + true => Sign::Value2, } } #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIGN_A::VALUE1 + *self == Sign::Value1 } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIGN_A::VALUE2 + *self == Sign::Value2 } } #[doc = "Field `SIGN` writer - Selects between signed and unsigned DAC1 mode"] -pub type SIGN_W<'a, REG> = crate::BitWriter<'a, REG, SIGN_A>; -impl<'a, REG> SIGN_W<'a, REG> +pub type SignW<'a, REG> = crate::BitWriter<'a, REG, Sign>; +impl<'a, REG> SignW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIGN_A::VALUE1) + self.variant(Sign::Value1) } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIGN_A::VALUE2) + self.variant(Sign::Value2) } } #[doc = "Field `FIFOIND` reader - Current write position inside the data FIFO"] -pub type FIFOIND_R = crate::FieldReader; -#[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] -pub type FIFOEMP_R = crate::BitReader; +pub type FifoindR = crate::FieldReader; #[doc = "Indicate if the FIFO is empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFOEMP_A { +pub enum Fifoemp { #[doc = "0: FIFO not empty"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FIFO empty"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFOEMP_A) -> Self { + fn from(variant: Fifoemp) -> Self { variant as u8 != 0 } } -impl FIFOEMP_R { +#[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] +pub type FifoempR = crate::BitReader; +impl FifoempR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFOEMP_A { + pub const fn variant(&self) -> Fifoemp { match self.bits { - false => FIFOEMP_A::VALUE1, - true => FIFOEMP_A::VALUE2, + false => Fifoemp::Value1, + true => Fifoemp::Value2, } } #[doc = "FIFO not empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFOEMP_A::VALUE1 + *self == Fifoemp::Value1 } #[doc = "FIFO empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFOEMP_A::VALUE2 + *self == Fifoemp::Value2 } } -#[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] -pub type FIFOFUL_R = crate::BitReader; #[doc = "Indicate if the FIFO is full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFOFUL_A { +pub enum Fifoful { #[doc = "0: FIFO not full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FIFO full"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFOFUL_A) -> Self { + fn from(variant: Fifoful) -> Self { variant as u8 != 0 } } -impl FIFOFUL_R { +#[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] +pub type FifofulR = crate::BitReader; +impl FifofulR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFOFUL_A { + pub const fn variant(&self) -> Fifoful { match self.bits { - false => FIFOFUL_A::VALUE1, - true => FIFOFUL_A::VALUE2, + false => Fifoful::Value1, + true => Fifoful::Value2, } } #[doc = "FIFO not full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFOFUL_A::VALUE1 + *self == Fifoful::Value1 } #[doc = "FIFO full"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFOFUL_A::VALUE2 + *self == Fifoful::Value2 } } -#[doc = "Field `NEGATE` reader - Negates the DAC1 output"] -pub type NEGATE_R = crate::BitReader; #[doc = "Negates the DAC1 output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NEGATE_A { +pub enum Negate { #[doc = "0: DAC output not negated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC output negated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NEGATE_A) -> Self { + fn from(variant: Negate) -> Self { variant as u8 != 0 } } -impl NEGATE_R { +#[doc = "Field `NEGATE` reader - Negates the DAC1 output"] +pub type NegateR = crate::BitReader; +impl NegateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NEGATE_A { + pub const fn variant(&self) -> Negate { match self.bits { - false => NEGATE_A::VALUE1, - true => NEGATE_A::VALUE2, + false => Negate::Value1, + true => Negate::Value2, } } #[doc = "DAC output not negated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NEGATE_A::VALUE1 + *self == Negate::Value1 } #[doc = "DAC output negated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NEGATE_A::VALUE2 + *self == Negate::Value2 } } #[doc = "Field `NEGATE` writer - Negates the DAC1 output"] -pub type NEGATE_W<'a, REG> = crate::BitWriter<'a, REG, NEGATE_A>; -impl<'a, REG> NEGATE_W<'a, REG> +pub type NegateW<'a, REG> = crate::BitWriter<'a, REG, Negate>; +impl<'a, REG> NegateW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC output not negated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NEGATE_A::VALUE1) + self.variant(Negate::Value1) } #[doc = "DAC output negated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NEGATE_A::VALUE2) + self.variant(Negate::Value2) } } -#[doc = "Field `SIGNEN` reader - Enable sign output of DAC1 pattern generator"] -pub type SIGNEN_R = crate::BitReader; #[doc = "Enable sign output of DAC1 pattern generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIGNEN_A { +pub enum Signen { #[doc = "0: disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIGNEN_A) -> Self { + fn from(variant: Signen) -> Self { variant as u8 != 0 } } -impl SIGNEN_R { +#[doc = "Field `SIGNEN` reader - Enable sign output of DAC1 pattern generator"] +pub type SignenR = crate::BitReader; +impl SignenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SIGNEN_A { + pub const fn variant(&self) -> Signen { match self.bits { - false => SIGNEN_A::VALUE1, - true => SIGNEN_A::VALUE2, + false => Signen::Value1, + true => Signen::Value2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIGNEN_A::VALUE1 + *self == Signen::Value1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIGNEN_A::VALUE2 + *self == Signen::Value2 } } #[doc = "Field `SIGNEN` writer - Enable sign output of DAC1 pattern generator"] -pub type SIGNEN_W<'a, REG> = crate::BitWriter<'a, REG, SIGNEN_A>; -impl<'a, REG> SIGNEN_W<'a, REG> +pub type SignenW<'a, REG> = crate::BitWriter<'a, REG, Signen>; +impl<'a, REG> SignenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIGNEN_A::VALUE1) + self.variant(Signen::Value1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIGNEN_A::VALUE2) + self.variant(Signen::Value2) } } -#[doc = "Field `SREN` reader - Enable DAC1 service request interrupt generation"] -pub type SREN_R = crate::BitReader; #[doc = "Enable DAC1 service request interrupt generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SREN_A { +pub enum Sren { #[doc = "0: disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SREN_A) -> Self { + fn from(variant: Sren) -> Self { variant as u8 != 0 } } -impl SREN_R { +#[doc = "Field `SREN` reader - Enable DAC1 service request interrupt generation"] +pub type SrenR = crate::BitReader; +impl SrenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SREN_A { + pub const fn variant(&self) -> Sren { match self.bits { - false => SREN_A::VALUE1, - true => SREN_A::VALUE2, + false => Sren::Value1, + true => Sren::Value2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SREN_A::VALUE1 + *self == Sren::Value1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SREN_A::VALUE2 + *self == Sren::Value2 } } #[doc = "Field `SREN` writer - Enable DAC1 service request interrupt generation"] -pub type SREN_W<'a, REG> = crate::BitWriter<'a, REG, SREN_A>; -impl<'a, REG> SREN_W<'a, REG> +pub type SrenW<'a, REG> = crate::BitWriter<'a, REG, Sren>; +impl<'a, REG> SrenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SREN_A::VALUE1) + self.variant(Sren::Value1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SREN_A::VALUE2) + self.variant(Sren::Value2) } } -#[doc = "Field `RUN` reader - RUN indicates the current DAC1 operation status"] -pub type RUN_R = crate::BitReader; #[doc = "RUN indicates the current DAC1 operation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RUN_A { +pub enum Run { #[doc = "0: DAC1 channel disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAC1 channel in operation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RUN_A) -> Self { + fn from(variant: Run) -> Self { variant as u8 != 0 } } -impl RUN_R { +#[doc = "Field `RUN` reader - RUN indicates the current DAC1 operation status"] +pub type RunR = crate::BitReader; +impl RunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RUN_A { + pub const fn variant(&self) -> Run { match self.bits { - false => RUN_A::VALUE1, - true => RUN_A::VALUE2, + false => Run::Value1, + true => Run::Value2, } } #[doc = "DAC1 channel disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RUN_A::VALUE1 + *self == Run::Value1 } #[doc = "DAC1 channel in operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RUN_A::VALUE2 + *self == Run::Value2 } } impl R { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - pub fn freq(&self) -> FREQ_R { - FREQ_R::new(self.bits & 0x000f_ffff) + pub fn freq(&self) -> FreqR { + FreqR::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 20) & 7) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"] #[inline(always)] - pub fn sign(&self) -> SIGN_R { - SIGN_R::new(((self.bits >> 23) & 1) != 0) + pub fn sign(&self) -> SignR { + SignR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Current write position inside the data FIFO"] #[inline(always)] - pub fn fifoind(&self) -> FIFOIND_R { - FIFOIND_R::new(((self.bits >> 24) & 3) as u8) + pub fn fifoind(&self) -> FifoindR { + FifoindR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Indicate if the FIFO is empty"] #[inline(always)] - pub fn fifoemp(&self) -> FIFOEMP_R { - FIFOEMP_R::new(((self.bits >> 26) & 1) != 0) + pub fn fifoemp(&self) -> FifoempR { + FifoempR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Indicate if the FIFO is full"] #[inline(always)] - pub fn fifoful(&self) -> FIFOFUL_R { - FIFOFUL_R::new(((self.bits >> 27) & 1) != 0) + pub fn fifoful(&self) -> FifofulR { + FifofulR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Negates the DAC1 output"] #[inline(always)] - pub fn negate(&self) -> NEGATE_R { - NEGATE_R::new(((self.bits >> 28) & 1) != 0) + pub fn negate(&self) -> NegateR { + NegateR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"] #[inline(always)] - pub fn signen(&self) -> SIGNEN_R { - SIGNEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn signen(&self) -> SignenR { + SignenR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"] #[inline(always)] - pub fn sren(&self) -> SREN_R { - SREN_R::new(((self.bits >> 30) & 1) != 0) + pub fn sren(&self) -> SrenR { + SrenR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - RUN indicates the current DAC1 operation status"] #[inline(always)] - pub fn run(&self) -> RUN_R { - RUN_R::new(((self.bits >> 31) & 1) != 0) + pub fn run(&self) -> RunR { + RunR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] #[must_use] - pub fn freq(&mut self) -> FREQ_W { - FREQ_W::new(self, 0) + pub fn freq(&mut self) -> FreqW { + FreqW::new(self, 0) } #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W { - MODE_W::new(self, 20) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 20) } #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"] #[inline(always)] #[must_use] - pub fn sign(&mut self) -> SIGN_W { - SIGN_W::new(self, 23) + pub fn sign(&mut self) -> SignW { + SignW::new(self, 23) } #[doc = "Bit 28 - Negates the DAC1 output"] #[inline(always)] #[must_use] - pub fn negate(&mut self) -> NEGATE_W { - NEGATE_W::new(self, 28) + pub fn negate(&mut self) -> NegateW { + NegateW::new(self, 28) } #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"] #[inline(always)] #[must_use] - pub fn signen(&mut self) -> SIGNEN_W { - SIGNEN_W::new(self, 29) + pub fn signen(&mut self) -> SignenW { + SignenW::new(self, 29) } #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"] #[inline(always)] #[must_use] - pub fn sren(&mut self) -> SREN_W { - SREN_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sren(&mut self) -> SrenW { + SrenW::new(self, 30) } } #[doc = "DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC1CFG0_SPEC; -impl crate::RegisterSpec for DAC1CFG0_SPEC { +pub struct Dac1cfg0Spec; +impl crate::RegisterSpec for Dac1cfg0Spec { type Ux = u32; } #[doc = "`read()` method returns [`dac1cfg0::R`](R) reader structure"] -impl crate::Readable for DAC1CFG0_SPEC {} +impl crate::Readable for Dac1cfg0Spec {} #[doc = "`write(|w| ..)` method takes [`dac1cfg0::W`](W) writer structure"] -impl crate::Writable for DAC1CFG0_SPEC { +impl crate::Writable for Dac1cfg0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1CFG0 to value 0"] -impl crate::Resettable for DAC1CFG0_SPEC { +impl crate::Resettable for Dac1cfg0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1cfg1.rs b/src/dac/dac1cfg1.rs index 2bba09b6..7285edb9 100644 --- a/src/dac/dac1cfg1.rs +++ b/src/dac/dac1cfg1.rs @@ -1,99 +1,99 @@ #[doc = "Register `DAC1CFG1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1CFG1` writer"] -pub type W = crate::W; -#[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] -pub type SCALE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCALE_A { +pub enum Scale { #[doc = "0: no shift = multiplication/division by 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: shift by 1 = multiplication/division by 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: shift by 2 = multiplication/division by 4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: shift left by 3 = multiplication/division by 8"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: shift left by 4 = multiplication/division by 16"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: shift left by 5 = multiplication/division by 32"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: shift left by 6 = multiplication/division by 64"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: shift left by 7 = multiplication/division by 128"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCALE_A) -> Self { + fn from(variant: Scale) -> Self { variant as _ } } -impl crate::FieldSpec for SCALE_A { +impl crate::FieldSpec for Scale { type Ux = u8; } -impl SCALE_R { +#[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] +pub type ScaleR = crate::FieldReader; +impl ScaleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCALE_A { + pub const fn variant(&self) -> Scale { match self.bits { - 0 => SCALE_A::VALUE1, - 1 => SCALE_A::VALUE2, - 2 => SCALE_A::VALUE3, - 3 => SCALE_A::VALUE4, - 4 => SCALE_A::VALUE5, - 5 => SCALE_A::VALUE6, - 6 => SCALE_A::VALUE7, - 7 => SCALE_A::VALUE8, + 0 => Scale::Value1, + 1 => Scale::Value2, + 2 => Scale::Value3, + 3 => Scale::Value4, + 4 => Scale::Value5, + 5 => Scale::Value6, + 6 => Scale::Value7, + 7 => Scale::Value8, _ => unreachable!(), } } #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCALE_A::VALUE1 + *self == Scale::Value1 } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCALE_A::VALUE2 + *self == Scale::Value2 } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SCALE_A::VALUE3 + *self == Scale::Value3 } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SCALE_A::VALUE4 + *self == Scale::Value4 } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SCALE_A::VALUE5 + *self == Scale::Value5 } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SCALE_A::VALUE6 + *self == Scale::Value6 } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SCALE_A::VALUE7 + *self == Scale::Value7 } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == SCALE_A::VALUE8 + *self == Scale::Value8 } } #[doc = "Field `SCALE` writer - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] -pub type SCALE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, SCALE_A>; -impl<'a, REG> SCALE_W<'a, REG> +pub type ScaleW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Scale>; +impl<'a, REG> ScaleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,161 +101,161 @@ where #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE1) + self.variant(Scale::Value1) } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE2) + self.variant(Scale::Value2) } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE3) + self.variant(Scale::Value3) } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE4) + self.variant(Scale::Value4) } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE5) + self.variant(Scale::Value5) } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE6) + self.variant(Scale::Value6) } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE7) + self.variant(Scale::Value7) } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(SCALE_A::VALUE8) + self.variant(Scale::Value8) } } -#[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC1 input data values"] -pub type MULDIV_R = crate::BitReader; #[doc = "Switch between up- and downscale of the DAC1 input data values\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MULDIV_A { +pub enum Muldiv { #[doc = "0: downscale = division (shift SCALE positions to the right)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: upscale = multiplication (shift SCALE positions to the left)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MULDIV_A) -> Self { + fn from(variant: Muldiv) -> Self { variant as u8 != 0 } } -impl MULDIV_R { +#[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC1 input data values"] +pub type MuldivR = crate::BitReader; +impl MuldivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MULDIV_A { + pub const fn variant(&self) -> Muldiv { match self.bits { - false => MULDIV_A::VALUE1, - true => MULDIV_A::VALUE2, + false => Muldiv::Value1, + true => Muldiv::Value2, } } #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MULDIV_A::VALUE1 + *self == Muldiv::Value1 } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MULDIV_A::VALUE2 + *self == Muldiv::Value2 } } #[doc = "Field `MULDIV` writer - Switch between up- and downscale of the DAC1 input data values"] -pub type MULDIV_W<'a, REG> = crate::BitWriter<'a, REG, MULDIV_A>; -impl<'a, REG> MULDIV_W<'a, REG> +pub type MuldivW<'a, REG> = crate::BitWriter<'a, REG, Muldiv>; +impl<'a, REG> MuldivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MULDIV_A::VALUE1) + self.variant(Muldiv::Value1) } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MULDIV_A::VALUE2) + self.variant(Muldiv::Value2) } } #[doc = "Field `OFFS` reader - 8-bit offset value addition"] -pub type OFFS_R = crate::FieldReader; +pub type OffsR = crate::FieldReader; #[doc = "Field `OFFS` writer - 8-bit offset value addition"] -pub type OFFS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type OffsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRIGSEL` reader - Selects one of the eight external trigger sources for DAC1"] -pub type TRIGSEL_R = crate::FieldReader; +pub type TrigselR = crate::FieldReader; #[doc = "Field `TRIGSEL` writer - Selects one of the eight external trigger sources for DAC1"] -pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SWTRIG` reader - Software Trigger"] -pub type SWTRIG_R = crate::BitReader; +pub type SwtrigR = crate::BitReader; #[doc = "Field `SWTRIG` writer - Software Trigger"] -pub type SWTRIG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 1"] -pub type TRIGMOD_R = crate::FieldReader; +pub type SwtrigW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Select the trigger source for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRIGMOD_A { +pub enum Trigmod { #[doc = "0: internal Trigger (integer divided clock - see FREQ parameter)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external Trigger (preselected trigger by TRIGSEL parameter)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: software Trigger (see SWTRIG parameter)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRIGMOD_A) -> Self { + fn from(variant: Trigmod) -> Self { variant as _ } } -impl crate::FieldSpec for TRIGMOD_A { +impl crate::FieldSpec for Trigmod { type Ux = u8; } -impl TRIGMOD_R { +#[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 1"] +pub type TrigmodR = crate::FieldReader; +impl TrigmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TRIGMOD_A::VALUE1), - 1 => Some(TRIGMOD_A::VALUE2), - 2 => Some(TRIGMOD_A::VALUE3), + 0 => Some(Trigmod::Value1), + 1 => Some(Trigmod::Value2), + 2 => Some(Trigmod::Value3), _ => None, } } #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRIGMOD_A::VALUE1 + *self == Trigmod::Value1 } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRIGMOD_A::VALUE2 + *self == Trigmod::Value2 } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TRIGMOD_A::VALUE3 + *self == Trigmod::Value3 } } #[doc = "Field `TRIGMOD` writer - Select the trigger source for channel 1"] -pub type TRIGMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRIGMOD_A>; -impl<'a, REG> TRIGMOD_W<'a, REG> +pub type TrigmodW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trigmod>; +impl<'a, REG> TrigmodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -263,206 +263,197 @@ where #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE1) + self.variant(Trigmod::Value1) } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE2) + self.variant(Trigmod::Value2) } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TRIGMOD_A::VALUE3) + self.variant(Trigmod::Value3) } } #[doc = "Field `ANACFG` reader - DAC1 analog configuration/calibration parameters"] -pub type ANACFG_R = crate::FieldReader; +pub type AnacfgR = crate::FieldReader; #[doc = "Field `ANACFG` writer - DAC1 analog configuration/calibration parameters"] -pub type ANACFG_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `ANAEN` reader - Enable analog DAC for channel 1"] -pub type ANAEN_R = crate::BitReader; +pub type AnacfgW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Enable analog DAC for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ANAEN_A { +pub enum Anaen { #[doc = "0: DAC1 is set to standby (analog output only)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable DAC1 (analog output only)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ANAEN_A) -> Self { + fn from(variant: Anaen) -> Self { variant as u8 != 0 } } -impl ANAEN_R { +#[doc = "Field `ANAEN` reader - Enable analog DAC for channel 1"] +pub type AnaenR = crate::BitReader; +impl AnaenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ANAEN_A { + pub const fn variant(&self) -> Anaen { match self.bits { - false => ANAEN_A::VALUE1, - true => ANAEN_A::VALUE2, + false => Anaen::Value1, + true => Anaen::Value2, } } #[doc = "DAC1 is set to standby (analog output only)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ANAEN_A::VALUE1 + *self == Anaen::Value1 } #[doc = "enable DAC1 (analog output only)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ANAEN_A::VALUE2 + *self == Anaen::Value2 } } #[doc = "Field `ANAEN` writer - Enable analog DAC for channel 1"] -pub type ANAEN_W<'a, REG> = crate::BitWriter<'a, REG, ANAEN_A>; -impl<'a, REG> ANAEN_W<'a, REG> +pub type AnaenW<'a, REG> = crate::BitWriter<'a, REG, Anaen>; +impl<'a, REG> AnaenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC1 is set to standby (analog output only)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ANAEN_A::VALUE1) + self.variant(Anaen::Value1) } #[doc = "enable DAC1 (analog output only)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ANAEN_A::VALUE2) + self.variant(Anaen::Value2) } } #[doc = "Field `REFCFGH` reader - Higher 4 band-gap configuration/calibration parameters"] -pub type REFCFGH_R = crate::FieldReader; +pub type RefcfghR = crate::FieldReader; #[doc = "Field `REFCFGH` writer - Higher 4 band-gap configuration/calibration parameters"] -pub type REFCFGH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RefcfghW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - pub fn scale(&self) -> SCALE_R { - SCALE_R::new((self.bits & 7) as u8) + pub fn scale(&self) -> ScaleR { + ScaleR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"] #[inline(always)] - pub fn muldiv(&self) -> MULDIV_R { - MULDIV_R::new(((self.bits >> 3) & 1) != 0) + pub fn muldiv(&self) -> MuldivR { + MuldivR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - pub fn offs(&self) -> OFFS_R { - OFFS_R::new(((self.bits >> 4) & 0xff) as u8) + pub fn offs(&self) -> OffsR { + OffsR::new(((self.bits >> 4) & 0xff) as u8) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"] #[inline(always)] - pub fn trigsel(&self) -> TRIGSEL_R { - TRIGSEL_R::new(((self.bits >> 12) & 7) as u8) + pub fn trigsel(&self) -> TrigselR { + TrigselR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - pub fn swtrig(&self) -> SWTRIG_R { - SWTRIG_R::new(((self.bits >> 16) & 1) != 0) + pub fn swtrig(&self) -> SwtrigR { + SwtrigR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:18 - Select the trigger source for channel 1"] #[inline(always)] - pub fn trigmod(&self) -> TRIGMOD_R { - TRIGMOD_R::new(((self.bits >> 17) & 3) as u8) + pub fn trigmod(&self) -> TrigmodR { + TrigmodR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"] #[inline(always)] - pub fn anacfg(&self) -> ANACFG_R { - ANACFG_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn anacfg(&self) -> AnacfgR { + AnacfgR::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bit 24 - Enable analog DAC for channel 1"] #[inline(always)] - pub fn anaen(&self) -> ANAEN_R { - ANAEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn anaen(&self) -> AnaenR { + AnaenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"] #[inline(always)] - pub fn refcfgh(&self) -> REFCFGH_R { - REFCFGH_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn refcfgh(&self) -> RefcfghR { + RefcfghR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] #[must_use] - pub fn scale(&mut self) -> SCALE_W { - SCALE_W::new(self, 0) + pub fn scale(&mut self) -> ScaleW { + ScaleW::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"] #[inline(always)] #[must_use] - pub fn muldiv(&mut self) -> MULDIV_W { - MULDIV_W::new(self, 3) + pub fn muldiv(&mut self) -> MuldivW { + MuldivW::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] #[must_use] - pub fn offs(&mut self) -> OFFS_W { - OFFS_W::new(self, 4) + pub fn offs(&mut self) -> OffsW { + OffsW::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"] #[inline(always)] #[must_use] - pub fn trigsel(&mut self) -> TRIGSEL_W { - TRIGSEL_W::new(self, 12) + pub fn trigsel(&mut self) -> TrigselW { + TrigselW::new(self, 12) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] #[must_use] - pub fn swtrig(&mut self) -> SWTRIG_W { - SWTRIG_W::new(self, 16) + pub fn swtrig(&mut self) -> SwtrigW { + SwtrigW::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 1"] #[inline(always)] #[must_use] - pub fn trigmod(&mut self) -> TRIGMOD_W { - TRIGMOD_W::new(self, 17) + pub fn trigmod(&mut self) -> TrigmodW { + TrigmodW::new(self, 17) } #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn anacfg(&mut self) -> ANACFG_W { - ANACFG_W::new(self, 19) + pub fn anacfg(&mut self) -> AnacfgW { + AnacfgW::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 1"] #[inline(always)] #[must_use] - pub fn anaen(&mut self) -> ANAEN_W { - ANAEN_W::new(self, 24) + pub fn anaen(&mut self) -> AnaenW { + AnaenW::new(self, 24) } #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn refcfgh(&mut self) -> REFCFGH_W { - REFCFGH_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn refcfgh(&mut self) -> RefcfghW { + RefcfghW::new(self, 28) } } #[doc = "DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC1CFG1_SPEC; -impl crate::RegisterSpec for DAC1CFG1_SPEC { +pub struct Dac1cfg1Spec; +impl crate::RegisterSpec for Dac1cfg1Spec { type Ux = u32; } #[doc = "`read()` method returns [`dac1cfg1::R`](R) reader structure"] -impl crate::Readable for DAC1CFG1_SPEC {} +impl crate::Readable for Dac1cfg1Spec {} #[doc = "`write(|w| ..)` method takes [`dac1cfg1::W`](W) writer structure"] -impl crate::Writable for DAC1CFG1_SPEC { +impl crate::Writable for Dac1cfg1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1CFG1 to value 0"] -impl crate::Resettable for DAC1CFG1_SPEC { +impl crate::Resettable for Dac1cfg1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1data.rs b/src/dac/dac1data.rs index c4aa2f1b..e8f0f305 100644 --- a/src/dac/dac1data.rs +++ b/src/dac/dac1data.rs @@ -1,49 +1,40 @@ #[doc = "Register `DAC1DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA1` reader - DAC1 Data Bits"] -pub type DATA1_R = crate::FieldReader; +pub type Data1R = crate::FieldReader; #[doc = "Field `DATA1` writer - DAC1 Data Bits"] -pub type DATA1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Data1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC1 Data Bits"] #[inline(always)] - pub fn data1(&self) -> DATA1_R { - DATA1_R::new((self.bits & 0x0fff) as u16) + pub fn data1(&self) -> Data1R { + Data1R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC1 Data Bits"] #[inline(always)] #[must_use] - pub fn data1(&mut self) -> DATA1_W { - DATA1_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn data1(&mut self) -> Data1W { + Data1W::new(self, 0) } } #[doc = "DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC1DATA_SPEC; -impl crate::RegisterSpec for DAC1DATA_SPEC { +pub struct Dac1dataSpec; +impl crate::RegisterSpec for Dac1dataSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac1data::R`](R) reader structure"] -impl crate::Readable for DAC1DATA_SPEC {} +impl crate::Readable for Dac1dataSpec {} #[doc = "`write(|w| ..)` method takes [`dac1data::W`](W) writer structure"] -impl crate::Writable for DAC1DATA_SPEC { +impl crate::Writable for Dac1dataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1DATA to value 0"] -impl crate::Resettable for DAC1DATA_SPEC { +impl crate::Resettable for Dac1dataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1path.rs b/src/dac/dac1path.rs index 6443e303..9342b7db 100644 --- a/src/dac/dac1path.rs +++ b/src/dac/dac1path.rs @@ -1,79 +1,70 @@ #[doc = "Register `DAC1PATH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1PATH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT6` reader - Pattern Number 6 for PATGEN of DAC1"] -pub type PAT6_R = crate::FieldReader; +pub type Pat6R = crate::FieldReader; #[doc = "Field `PAT6` writer - Pattern Number 6 for PATGEN of DAC1"] -pub type PAT6_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat6W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT7` reader - Pattern Number 7 for PATGEN of DAC1"] -pub type PAT7_R = crate::FieldReader; +pub type Pat7R = crate::FieldReader; #[doc = "Field `PAT7` writer - Pattern Number 7 for PATGEN of DAC1"] -pub type PAT7_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat7W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT8` reader - Pattern Number 8 for PATGEN of DAC1"] -pub type PAT8_R = crate::FieldReader; +pub type Pat8R = crate::FieldReader; #[doc = "Field `PAT8` writer - Pattern Number 8 for PATGEN of DAC1"] -pub type PAT8_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat8W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"] #[inline(always)] - pub fn pat6(&self) -> PAT6_R { - PAT6_R::new((self.bits & 0x1f) as u8) + pub fn pat6(&self) -> Pat6R { + Pat6R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"] #[inline(always)] - pub fn pat7(&self) -> PAT7_R { - PAT7_R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat7(&self) -> Pat7R { + Pat7R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"] #[inline(always)] - pub fn pat8(&self) -> PAT8_R { - PAT8_R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat8(&self) -> Pat8R { + Pat8R::new(((self.bits >> 10) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat6(&mut self) -> PAT6_W { - PAT6_W::new(self, 0) + pub fn pat6(&mut self) -> Pat6W { + Pat6W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat7(&mut self) -> PAT7_W { - PAT7_W::new(self, 5) + pub fn pat7(&mut self) -> Pat7W { + Pat7W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat8(&mut self) -> PAT8_W { - PAT8_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pat8(&mut self) -> Pat8W { + Pat8W::new(self, 10) } } #[doc = "DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC1PATH_SPEC; -impl crate::RegisterSpec for DAC1PATH_SPEC { +pub struct Dac1pathSpec; +impl crate::RegisterSpec for Dac1pathSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac1path::R`](R) reader structure"] -impl crate::Readable for DAC1PATH_SPEC {} +impl crate::Readable for Dac1pathSpec {} #[doc = "`write(|w| ..)` method takes [`dac1path::W`](W) writer structure"] -impl crate::Writable for DAC1PATH_SPEC { +impl crate::Writable for Dac1pathSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1PATH to value 0x7fdd"] -impl crate::Resettable for DAC1PATH_SPEC { +impl crate::Resettable for Dac1pathSpec { const RESET_VALUE: u32 = 0x7fdd; } diff --git a/src/dac/dac1patl.rs b/src/dac/dac1patl.rs index 2b5437a1..b75a28ca 100644 --- a/src/dac/dac1patl.rs +++ b/src/dac/dac1patl.rs @@ -1,124 +1,115 @@ #[doc = "Register `DAC1PATL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1PATL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT0` reader - Pattern Number 0 for PATGEN of DAC1"] -pub type PAT0_R = crate::FieldReader; +pub type Pat0R = crate::FieldReader; #[doc = "Field `PAT0` writer - Pattern Number 0 for PATGEN of DAC1"] -pub type PAT0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT1` reader - Pattern Number 1 for PATGEN of DAC1"] -pub type PAT1_R = crate::FieldReader; +pub type Pat1R = crate::FieldReader; #[doc = "Field `PAT1` writer - Pattern Number 1 for PATGEN of DAC1"] -pub type PAT1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT2` reader - Pattern Number 2 for PATGEN of DAC1"] -pub type PAT2_R = crate::FieldReader; +pub type Pat2R = crate::FieldReader; #[doc = "Field `PAT2` writer - Pattern Number 2 for PATGEN of DAC1"] -pub type PAT2_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat2W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT3` reader - Pattern Number 3 for PATGEN of DAC1"] -pub type PAT3_R = crate::FieldReader; +pub type Pat3R = crate::FieldReader; #[doc = "Field `PAT3` writer - Pattern Number 3 for PATGEN of DAC1"] -pub type PAT3_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat3W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT4` reader - Pattern Number 4 for PATGEN of DAC1"] -pub type PAT4_R = crate::FieldReader; +pub type Pat4R = crate::FieldReader; #[doc = "Field `PAT4` writer - Pattern Number 4 for PATGEN of DAC1"] -pub type PAT4_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat4W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT5` reader - Pattern Number 5 for PATGEN of DAC1"] -pub type PAT5_R = crate::FieldReader; +pub type Pat5R = crate::FieldReader; #[doc = "Field `PAT5` writer - Pattern Number 5 for PATGEN of DAC1"] -pub type PAT5_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Pat5W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"] #[inline(always)] - pub fn pat0(&self) -> PAT0_R { - PAT0_R::new((self.bits & 0x1f) as u8) + pub fn pat0(&self) -> Pat0R { + Pat0R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"] #[inline(always)] - pub fn pat1(&self) -> PAT1_R { - PAT1_R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat1(&self) -> Pat1R { + Pat1R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"] #[inline(always)] - pub fn pat2(&self) -> PAT2_R { - PAT2_R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat2(&self) -> Pat2R { + Pat2R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"] #[inline(always)] - pub fn pat3(&self) -> PAT3_R { - PAT3_R::new(((self.bits >> 15) & 0x1f) as u8) + pub fn pat3(&self) -> Pat3R { + Pat3R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"] #[inline(always)] - pub fn pat4(&self) -> PAT4_R { - PAT4_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn pat4(&self) -> Pat4R { + Pat4R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"] #[inline(always)] - pub fn pat5(&self) -> PAT5_R { - PAT5_R::new(((self.bits >> 25) & 0x1f) as u8) + pub fn pat5(&self) -> Pat5R { + Pat5R::new(((self.bits >> 25) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat0(&mut self) -> PAT0_W { - PAT0_W::new(self, 0) + pub fn pat0(&mut self) -> Pat0W { + Pat0W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat1(&mut self) -> PAT1_W { - PAT1_W::new(self, 5) + pub fn pat1(&mut self) -> Pat1W { + Pat1W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat2(&mut self) -> PAT2_W { - PAT2_W::new(self, 10) + pub fn pat2(&mut self) -> Pat2W { + Pat2W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat3(&mut self) -> PAT3_W { - PAT3_W::new(self, 15) + pub fn pat3(&mut self) -> Pat3W { + Pat3W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat4(&mut self) -> PAT4_W { - PAT4_W::new(self, 20) + pub fn pat4(&mut self) -> Pat4W { + Pat4W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat5(&mut self) -> PAT5_W { - PAT5_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pat5(&mut self) -> Pat5W { + Pat5W::new(self, 25) } } #[doc = "DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAC1PATL_SPEC; -impl crate::RegisterSpec for DAC1PATL_SPEC { +pub struct Dac1patlSpec; +impl crate::RegisterSpec for Dac1patlSpec { type Ux = u32; } #[doc = "`read()` method returns [`dac1patl::R`](R) reader structure"] -impl crate::Readable for DAC1PATL_SPEC {} +impl crate::Readable for Dac1patlSpec {} #[doc = "`write(|w| ..)` method takes [`dac1patl::W`](W) writer structure"] -impl crate::Writable for DAC1PATL_SPEC { +impl crate::Writable for Dac1patlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1PATL to value 0x3568_b0c0"] -impl crate::Resettable for DAC1PATL_SPEC { +impl crate::Resettable for Dac1patlSpec { const RESET_VALUE: u32 = 0x3568_b0c0; } diff --git a/src/dac/id.rs b/src/dac/id.rs index e7416a95..45285c85 100644 --- a/src/dac/id.rs +++ b/src/dac/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type MODR_R = crate::FieldReader; +pub type ModrR = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type MODT_R = crate::FieldReader; +pub type ModtR = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type MODN_R = crate::FieldReader; +pub type ModnR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> MODR_R { - MODR_R::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> ModrR { + ModrR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> MODT_R { - MODT_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> ModtR { + ModtR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> MODN_R { - MODN_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> ModnR { + ModnR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00a5_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00a5_c000; } diff --git a/src/dlr.rs b/src/dlr.rs index 7036f2e2..4820e917 100644 --- a/src/dlr.rs +++ b/src/dlr.rs @@ -1,61 +1,66 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - ovrstat: OVRSTAT, - ovrclr: OVRCLR, - srsel0: SRSEL0, - srsel1: SRSEL1, - lnen: LNEN, + ovrstat: Ovrstat, + ovrclr: Ovrclr, + srsel0: Srsel0, + srsel1: Srsel1, + lnen: Lnen, } impl RegisterBlock { #[doc = "0x00 - Overrun Status"] #[inline(always)] - pub const fn ovrstat(&self) -> &OVRSTAT { + pub const fn ovrstat(&self) -> &Ovrstat { &self.ovrstat } #[doc = "0x04 - Overrun Clear"] #[inline(always)] - pub const fn ovrclr(&self) -> &OVRCLR { + pub const fn ovrclr(&self) -> &Ovrclr { &self.ovrclr } #[doc = "0x08 - Service Request Selection 0"] #[inline(always)] - pub const fn srsel0(&self) -> &SRSEL0 { + pub const fn srsel0(&self) -> &Srsel0 { &self.srsel0 } #[doc = "0x0c - Service Request Selection 1"] #[inline(always)] - pub const fn srsel1(&self) -> &SRSEL1 { + pub const fn srsel1(&self) -> &Srsel1 { &self.srsel1 } #[doc = "0x10 - Line Enable"] #[inline(always)] - pub const fn lnen(&self) -> &LNEN { + pub const fn lnen(&self) -> &Lnen { &self.lnen } } #[doc = "OVRSTAT (r) register accessor: Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrstat`] module"] -pub type OVRSTAT = crate::Reg; +#[doc(alias = "OVRSTAT")] +pub type Ovrstat = crate::Reg; #[doc = "Overrun Status"] pub mod ovrstat; #[doc = "OVRCLR (w) register accessor: Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrclr`] module"] -pub type OVRCLR = crate::Reg; +#[doc(alias = "OVRCLR")] +pub type Ovrclr = crate::Reg; #[doc = "Overrun Clear"] pub mod ovrclr; #[doc = "SRSEL0 (rw) register accessor: Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srsel0`] module"] -pub type SRSEL0 = crate::Reg; +#[doc(alias = "SRSEL0")] +pub type Srsel0 = crate::Reg; #[doc = "Service Request Selection 0"] pub mod srsel0; #[doc = "SRSEL1 (rw) register accessor: Service Request Selection 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srsel1`] module"] -pub type SRSEL1 = crate::Reg; +#[doc(alias = "SRSEL1")] +pub type Srsel1 = crate::Reg; #[doc = "Service Request Selection 1"] pub mod srsel1; #[doc = "LNEN (rw) register accessor: Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lnen`] module"] -pub type LNEN = crate::Reg; +#[doc(alias = "LNEN")] +pub type Lnen = crate::Reg; #[doc = "Line Enable"] pub mod lnen; diff --git a/src/dlr/lnen.rs b/src/dlr/lnen.rs index 58b87640..36dbd004 100644 --- a/src/dlr/lnen.rs +++ b/src/dlr/lnen.rs @@ -1,802 +1,793 @@ #[doc = "Register `LNEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LNEN` writer"] -pub type W = crate::W; -#[doc = "Field `LN0` reader - Line 0 Enable"] -pub type LN0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Line 0 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN0_A { +pub enum Ln0 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN0_A) -> Self { + fn from(variant: Ln0) -> Self { variant as u8 != 0 } } -impl LN0_R { +#[doc = "Field `LN0` reader - Line 0 Enable"] +pub type Ln0R = crate::BitReader; +impl Ln0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN0_A { + pub const fn variant(&self) -> Ln0 { match self.bits { - false => LN0_A::VALUE1, - true => LN0_A::VALUE2, + false => Ln0::Value1, + true => Ln0::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN0_A::VALUE1 + *self == Ln0::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN0_A::VALUE2 + *self == Ln0::Value2 } } #[doc = "Field `LN0` writer - Line 0 Enable"] -pub type LN0_W<'a, REG> = crate::BitWriter<'a, REG, LN0_A>; -impl<'a, REG> LN0_W<'a, REG> +pub type Ln0W<'a, REG> = crate::BitWriter<'a, REG, Ln0>; +impl<'a, REG> Ln0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN0_A::VALUE1) + self.variant(Ln0::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN0_A::VALUE2) + self.variant(Ln0::Value2) } } -#[doc = "Field `LN1` reader - Line 1 Enable"] -pub type LN1_R = crate::BitReader; #[doc = "Line 1 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN1_A { +pub enum Ln1 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN1_A) -> Self { + fn from(variant: Ln1) -> Self { variant as u8 != 0 } } -impl LN1_R { +#[doc = "Field `LN1` reader - Line 1 Enable"] +pub type Ln1R = crate::BitReader; +impl Ln1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN1_A { + pub const fn variant(&self) -> Ln1 { match self.bits { - false => LN1_A::VALUE1, - true => LN1_A::VALUE2, + false => Ln1::Value1, + true => Ln1::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN1_A::VALUE1 + *self == Ln1::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN1_A::VALUE2 + *self == Ln1::Value2 } } #[doc = "Field `LN1` writer - Line 1 Enable"] -pub type LN1_W<'a, REG> = crate::BitWriter<'a, REG, LN1_A>; -impl<'a, REG> LN1_W<'a, REG> +pub type Ln1W<'a, REG> = crate::BitWriter<'a, REG, Ln1>; +impl<'a, REG> Ln1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN1_A::VALUE1) + self.variant(Ln1::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN1_A::VALUE2) + self.variant(Ln1::Value2) } } -#[doc = "Field `LN2` reader - Line 2 Enable"] -pub type LN2_R = crate::BitReader; #[doc = "Line 2 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN2_A { +pub enum Ln2 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN2_A) -> Self { + fn from(variant: Ln2) -> Self { variant as u8 != 0 } } -impl LN2_R { +#[doc = "Field `LN2` reader - Line 2 Enable"] +pub type Ln2R = crate::BitReader; +impl Ln2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN2_A { + pub const fn variant(&self) -> Ln2 { match self.bits { - false => LN2_A::VALUE1, - true => LN2_A::VALUE2, + false => Ln2::Value1, + true => Ln2::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN2_A::VALUE1 + *self == Ln2::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN2_A::VALUE2 + *self == Ln2::Value2 } } #[doc = "Field `LN2` writer - Line 2 Enable"] -pub type LN2_W<'a, REG> = crate::BitWriter<'a, REG, LN2_A>; -impl<'a, REG> LN2_W<'a, REG> +pub type Ln2W<'a, REG> = crate::BitWriter<'a, REG, Ln2>; +impl<'a, REG> Ln2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN2_A::VALUE1) + self.variant(Ln2::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN2_A::VALUE2) + self.variant(Ln2::Value2) } } -#[doc = "Field `LN3` reader - Line 3 Enable"] -pub type LN3_R = crate::BitReader; #[doc = "Line 3 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN3_A { +pub enum Ln3 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN3_A) -> Self { + fn from(variant: Ln3) -> Self { variant as u8 != 0 } } -impl LN3_R { +#[doc = "Field `LN3` reader - Line 3 Enable"] +pub type Ln3R = crate::BitReader; +impl Ln3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN3_A { + pub const fn variant(&self) -> Ln3 { match self.bits { - false => LN3_A::VALUE1, - true => LN3_A::VALUE2, + false => Ln3::Value1, + true => Ln3::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN3_A::VALUE1 + *self == Ln3::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN3_A::VALUE2 + *self == Ln3::Value2 } } #[doc = "Field `LN3` writer - Line 3 Enable"] -pub type LN3_W<'a, REG> = crate::BitWriter<'a, REG, LN3_A>; -impl<'a, REG> LN3_W<'a, REG> +pub type Ln3W<'a, REG> = crate::BitWriter<'a, REG, Ln3>; +impl<'a, REG> Ln3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN3_A::VALUE1) + self.variant(Ln3::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN3_A::VALUE2) + self.variant(Ln3::Value2) } } -#[doc = "Field `LN4` reader - Line 4 Enable"] -pub type LN4_R = crate::BitReader; #[doc = "Line 4 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN4_A { +pub enum Ln4 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN4_A) -> Self { + fn from(variant: Ln4) -> Self { variant as u8 != 0 } } -impl LN4_R { +#[doc = "Field `LN4` reader - Line 4 Enable"] +pub type Ln4R = crate::BitReader; +impl Ln4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN4_A { + pub const fn variant(&self) -> Ln4 { match self.bits { - false => LN4_A::VALUE1, - true => LN4_A::VALUE2, + false => Ln4::Value1, + true => Ln4::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN4_A::VALUE1 + *self == Ln4::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN4_A::VALUE2 + *self == Ln4::Value2 } } #[doc = "Field `LN4` writer - Line 4 Enable"] -pub type LN4_W<'a, REG> = crate::BitWriter<'a, REG, LN4_A>; -impl<'a, REG> LN4_W<'a, REG> +pub type Ln4W<'a, REG> = crate::BitWriter<'a, REG, Ln4>; +impl<'a, REG> Ln4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN4_A::VALUE1) + self.variant(Ln4::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN4_A::VALUE2) + self.variant(Ln4::Value2) } } -#[doc = "Field `LN5` reader - Line 5 Enable"] -pub type LN5_R = crate::BitReader; #[doc = "Line 5 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN5_A { +pub enum Ln5 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN5_A) -> Self { + fn from(variant: Ln5) -> Self { variant as u8 != 0 } } -impl LN5_R { +#[doc = "Field `LN5` reader - Line 5 Enable"] +pub type Ln5R = crate::BitReader; +impl Ln5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN5_A { + pub const fn variant(&self) -> Ln5 { match self.bits { - false => LN5_A::VALUE1, - true => LN5_A::VALUE2, + false => Ln5::Value1, + true => Ln5::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN5_A::VALUE1 + *self == Ln5::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN5_A::VALUE2 + *self == Ln5::Value2 } } #[doc = "Field `LN5` writer - Line 5 Enable"] -pub type LN5_W<'a, REG> = crate::BitWriter<'a, REG, LN5_A>; -impl<'a, REG> LN5_W<'a, REG> +pub type Ln5W<'a, REG> = crate::BitWriter<'a, REG, Ln5>; +impl<'a, REG> Ln5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN5_A::VALUE1) + self.variant(Ln5::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN5_A::VALUE2) + self.variant(Ln5::Value2) } } -#[doc = "Field `LN6` reader - Line 6 Enable"] -pub type LN6_R = crate::BitReader; #[doc = "Line 6 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN6_A { +pub enum Ln6 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN6_A) -> Self { + fn from(variant: Ln6) -> Self { variant as u8 != 0 } } -impl LN6_R { +#[doc = "Field `LN6` reader - Line 6 Enable"] +pub type Ln6R = crate::BitReader; +impl Ln6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN6_A { + pub const fn variant(&self) -> Ln6 { match self.bits { - false => LN6_A::VALUE1, - true => LN6_A::VALUE2, + false => Ln6::Value1, + true => Ln6::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN6_A::VALUE1 + *self == Ln6::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN6_A::VALUE2 + *self == Ln6::Value2 } } #[doc = "Field `LN6` writer - Line 6 Enable"] -pub type LN6_W<'a, REG> = crate::BitWriter<'a, REG, LN6_A>; -impl<'a, REG> LN6_W<'a, REG> +pub type Ln6W<'a, REG> = crate::BitWriter<'a, REG, Ln6>; +impl<'a, REG> Ln6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN6_A::VALUE1) + self.variant(Ln6::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN6_A::VALUE2) + self.variant(Ln6::Value2) } } -#[doc = "Field `LN7` reader - Line 7 Enable"] -pub type LN7_R = crate::BitReader; #[doc = "Line 7 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN7_A { +pub enum Ln7 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN7_A) -> Self { + fn from(variant: Ln7) -> Self { variant as u8 != 0 } } -impl LN7_R { +#[doc = "Field `LN7` reader - Line 7 Enable"] +pub type Ln7R = crate::BitReader; +impl Ln7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN7_A { + pub const fn variant(&self) -> Ln7 { match self.bits { - false => LN7_A::VALUE1, - true => LN7_A::VALUE2, + false => Ln7::Value1, + true => Ln7::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN7_A::VALUE1 + *self == Ln7::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN7_A::VALUE2 + *self == Ln7::Value2 } } #[doc = "Field `LN7` writer - Line 7 Enable"] -pub type LN7_W<'a, REG> = crate::BitWriter<'a, REG, LN7_A>; -impl<'a, REG> LN7_W<'a, REG> +pub type Ln7W<'a, REG> = crate::BitWriter<'a, REG, Ln7>; +impl<'a, REG> Ln7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN7_A::VALUE1) + self.variant(Ln7::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN7_A::VALUE2) + self.variant(Ln7::Value2) } } -#[doc = "Field `LN8` reader - Line 8 Enable"] -pub type LN8_R = crate::BitReader; #[doc = "Line 8 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN8_A { +pub enum Ln8 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN8_A) -> Self { + fn from(variant: Ln8) -> Self { variant as u8 != 0 } } -impl LN8_R { +#[doc = "Field `LN8` reader - Line 8 Enable"] +pub type Ln8R = crate::BitReader; +impl Ln8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN8_A { + pub const fn variant(&self) -> Ln8 { match self.bits { - false => LN8_A::VALUE1, - true => LN8_A::VALUE2, + false => Ln8::Value1, + true => Ln8::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN8_A::VALUE1 + *self == Ln8::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN8_A::VALUE2 + *self == Ln8::Value2 } } #[doc = "Field `LN8` writer - Line 8 Enable"] -pub type LN8_W<'a, REG> = crate::BitWriter<'a, REG, LN8_A>; -impl<'a, REG> LN8_W<'a, REG> +pub type Ln8W<'a, REG> = crate::BitWriter<'a, REG, Ln8>; +impl<'a, REG> Ln8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN8_A::VALUE1) + self.variant(Ln8::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN8_A::VALUE2) + self.variant(Ln8::Value2) } } -#[doc = "Field `LN9` reader - Line 9 Enable"] -pub type LN9_R = crate::BitReader; #[doc = "Line 9 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN9_A { +pub enum Ln9 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN9_A) -> Self { + fn from(variant: Ln9) -> Self { variant as u8 != 0 } } -impl LN9_R { +#[doc = "Field `LN9` reader - Line 9 Enable"] +pub type Ln9R = crate::BitReader; +impl Ln9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN9_A { + pub const fn variant(&self) -> Ln9 { match self.bits { - false => LN9_A::VALUE1, - true => LN9_A::VALUE2, + false => Ln9::Value1, + true => Ln9::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN9_A::VALUE1 + *self == Ln9::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN9_A::VALUE2 + *self == Ln9::Value2 } } #[doc = "Field `LN9` writer - Line 9 Enable"] -pub type LN9_W<'a, REG> = crate::BitWriter<'a, REG, LN9_A>; -impl<'a, REG> LN9_W<'a, REG> +pub type Ln9W<'a, REG> = crate::BitWriter<'a, REG, Ln9>; +impl<'a, REG> Ln9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN9_A::VALUE1) + self.variant(Ln9::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN9_A::VALUE2) + self.variant(Ln9::Value2) } } -#[doc = "Field `LN10` reader - Line 10 Enable"] -pub type LN10_R = crate::BitReader; #[doc = "Line 10 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN10_A { +pub enum Ln10 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN10_A) -> Self { + fn from(variant: Ln10) -> Self { variant as u8 != 0 } } -impl LN10_R { +#[doc = "Field `LN10` reader - Line 10 Enable"] +pub type Ln10R = crate::BitReader; +impl Ln10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN10_A { + pub const fn variant(&self) -> Ln10 { match self.bits { - false => LN10_A::VALUE1, - true => LN10_A::VALUE2, + false => Ln10::Value1, + true => Ln10::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN10_A::VALUE1 + *self == Ln10::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN10_A::VALUE2 + *self == Ln10::Value2 } } #[doc = "Field `LN10` writer - Line 10 Enable"] -pub type LN10_W<'a, REG> = crate::BitWriter<'a, REG, LN10_A>; -impl<'a, REG> LN10_W<'a, REG> +pub type Ln10W<'a, REG> = crate::BitWriter<'a, REG, Ln10>; +impl<'a, REG> Ln10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN10_A::VALUE1) + self.variant(Ln10::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN10_A::VALUE2) + self.variant(Ln10::Value2) } } -#[doc = "Field `LN11` reader - Line 11 Enable"] -pub type LN11_R = crate::BitReader; #[doc = "Line 11 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LN11_A { +pub enum Ln11 { #[doc = "0: Disables the line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables the line and resets a pending request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LN11_A) -> Self { + fn from(variant: Ln11) -> Self { variant as u8 != 0 } } -impl LN11_R { +#[doc = "Field `LN11` reader - Line 11 Enable"] +pub type Ln11R = crate::BitReader; +impl Ln11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LN11_A { + pub const fn variant(&self) -> Ln11 { match self.bits { - false => LN11_A::VALUE1, - true => LN11_A::VALUE2, + false => Ln11::Value1, + true => Ln11::Value2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LN11_A::VALUE1 + *self == Ln11::Value1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LN11_A::VALUE2 + *self == Ln11::Value2 } } #[doc = "Field `LN11` writer - Line 11 Enable"] -pub type LN11_W<'a, REG> = crate::BitWriter<'a, REG, LN11_A>; -impl<'a, REG> LN11_W<'a, REG> +pub type Ln11W<'a, REG> = crate::BitWriter<'a, REG, Ln11>; +impl<'a, REG> Ln11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LN11_A::VALUE1) + self.variant(Ln11::Value1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LN11_A::VALUE2) + self.variant(Ln11::Value2) } } impl R { #[doc = "Bit 0 - Line 0 Enable"] #[inline(always)] - pub fn ln0(&self) -> LN0_R { - LN0_R::new((self.bits & 1) != 0) + pub fn ln0(&self) -> Ln0R { + Ln0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Line 1 Enable"] #[inline(always)] - pub fn ln1(&self) -> LN1_R { - LN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ln1(&self) -> Ln1R { + Ln1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Line 2 Enable"] #[inline(always)] - pub fn ln2(&self) -> LN2_R { - LN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ln2(&self) -> Ln2R { + Ln2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Line 3 Enable"] #[inline(always)] - pub fn ln3(&self) -> LN3_R { - LN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ln3(&self) -> Ln3R { + Ln3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Line 4 Enable"] #[inline(always)] - pub fn ln4(&self) -> LN4_R { - LN4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ln4(&self) -> Ln4R { + Ln4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Line 5 Enable"] #[inline(always)] - pub fn ln5(&self) -> LN5_R { - LN5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ln5(&self) -> Ln5R { + Ln5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Line 6 Enable"] #[inline(always)] - pub fn ln6(&self) -> LN6_R { - LN6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ln6(&self) -> Ln6R { + Ln6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Line 7 Enable"] #[inline(always)] - pub fn ln7(&self) -> LN7_R { - LN7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ln7(&self) -> Ln7R { + Ln7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Line 8 Enable"] #[inline(always)] - pub fn ln8(&self) -> LN8_R { - LN8_R::new(((self.bits >> 8) & 1) != 0) + pub fn ln8(&self) -> Ln8R { + Ln8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Line 9 Enable"] #[inline(always)] - pub fn ln9(&self) -> LN9_R { - LN9_R::new(((self.bits >> 9) & 1) != 0) + pub fn ln9(&self) -> Ln9R { + Ln9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Line 10 Enable"] #[inline(always)] - pub fn ln10(&self) -> LN10_R { - LN10_R::new(((self.bits >> 10) & 1) != 0) + pub fn ln10(&self) -> Ln10R { + Ln10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Line 11 Enable"] #[inline(always)] - pub fn ln11(&self) -> LN11_R { - LN11_R::new(((self.bits >> 11) & 1) != 0) + pub fn ln11(&self) -> Ln11R { + Ln11R::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Line 0 Enable"] #[inline(always)] #[must_use] - pub fn ln0(&mut self) -> LN0_W { - LN0_W::new(self, 0) + pub fn ln0(&mut self) -> Ln0W { + Ln0W::new(self, 0) } #[doc = "Bit 1 - Line 1 Enable"] #[inline(always)] #[must_use] - pub fn ln1(&mut self) -> LN1_W { - LN1_W::new(self, 1) + pub fn ln1(&mut self) -> Ln1W { + Ln1W::new(self, 1) } #[doc = "Bit 2 - Line 2 Enable"] #[inline(always)] #[must_use] - pub fn ln2(&mut self) -> LN2_W { - LN2_W::new(self, 2) + pub fn ln2(&mut self) -> Ln2W { + Ln2W::new(self, 2) } #[doc = "Bit 3 - Line 3 Enable"] #[inline(always)] #[must_use] - pub fn ln3(&mut self) -> LN3_W { - LN3_W::new(self, 3) + pub fn ln3(&mut self) -> Ln3W { + Ln3W::new(self, 3) } #[doc = "Bit 4 - Line 4 Enable"] #[inline(always)] #[must_use] - pub fn ln4(&mut self) -> LN4_W { - LN4_W::new(self, 4) + pub fn ln4(&mut self) -> Ln4W { + Ln4W::new(self, 4) } #[doc = "Bit 5 - Line 5 Enable"] #[inline(always)] #[must_use] - pub fn ln5(&mut self) -> LN5_W { - LN5_W::new(self, 5) + pub fn ln5(&mut self) -> Ln5W { + Ln5W::new(self, 5) } #[doc = "Bit 6 - Line 6 Enable"] #[inline(always)] #[must_use] - pub fn ln6(&mut self) -> LN6_W { - LN6_W::new(self, 6) + pub fn ln6(&mut self) -> Ln6W { + Ln6W::new(self, 6) } #[doc = "Bit 7 - Line 7 Enable"] #[inline(always)] #[must_use] - pub fn ln7(&mut self) -> LN7_W { - LN7_W::new(self, 7) + pub fn ln7(&mut self) -> Ln7W { + Ln7W::new(self, 7) } #[doc = "Bit 8 - Line 8 Enable"] #[inline(always)] #[must_use] - pub fn ln8(&mut self) -> LN8_W { - LN8_W::new(self, 8) + pub fn ln8(&mut self) -> Ln8W { + Ln8W::new(self, 8) } #[doc = "Bit 9 - Line 9 Enable"] #[inline(always)] #[must_use] - pub fn ln9(&mut self) -> LN9_W { - LN9_W::new(self, 9) + pub fn ln9(&mut self) -> Ln9W { + Ln9W::new(self, 9) } #[doc = "Bit 10 - Line 10 Enable"] #[inline(always)] #[must_use] - pub fn ln10(&mut self) -> LN10_W { - LN10_W::new(self, 10) + pub fn ln10(&mut self) -> Ln10W { + Ln10W::new(self, 10) } #[doc = "Bit 11 - Line 11 Enable"] #[inline(always)] #[must_use] - pub fn ln11(&mut self) -> LN11_W { - LN11_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ln11(&mut self) -> Ln11W { + Ln11W::new(self, 11) } } #[doc = "Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LNEN_SPEC; -impl crate::RegisterSpec for LNEN_SPEC { +pub struct LnenSpec; +impl crate::RegisterSpec for LnenSpec { type Ux = u32; } #[doc = "`read()` method returns [`lnen::R`](R) reader structure"] -impl crate::Readable for LNEN_SPEC {} +impl crate::Readable for LnenSpec {} #[doc = "`write(|w| ..)` method takes [`lnen::W`](W) writer structure"] -impl crate::Writable for LNEN_SPEC { +impl crate::Writable for LnenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LNEN to value 0"] -impl crate::Resettable for LNEN_SPEC { +impl crate::Resettable for LnenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/ovrclr.rs b/src/dlr/ovrclr.rs index d66857e5..64d50c5b 100644 --- a/src/dlr/ovrclr.rs +++ b/src/dlr/ovrclr.rs @@ -1,124 +1,115 @@ #[doc = "Register `OVRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LN0` writer - Line 0 Overrun Status Clear"] -pub type LN0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN1` writer - Line 1 Overrun Status Clear"] -pub type LN1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN2` writer - Line 2 Overrun Status Clear"] -pub type LN2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN3` writer - Line 3 Overrun Status Clear"] -pub type LN3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN4` writer - Line 4 Overrun Status Clear"] -pub type LN4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN5` writer - Line 5 Overrun Status Clear"] -pub type LN5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN6` writer - Line 6 Overrun Status Clear"] -pub type LN6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN7` writer - Line 7 Overrun Status Clear"] -pub type LN7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN8` writer - Line 8 Overrun Status Clear"] -pub type LN8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN9` writer - Line 9 Overrun Status Clear"] -pub type LN9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN10` writer - Line 10 Overrun Status Clear"] -pub type LN10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN11` writer - Line 11 Overrun Status Clear"] -pub type LN11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ln11W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Line 0 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln0(&mut self) -> LN0_W { - LN0_W::new(self, 0) + pub fn ln0(&mut self) -> Ln0W { + Ln0W::new(self, 0) } #[doc = "Bit 1 - Line 1 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln1(&mut self) -> LN1_W { - LN1_W::new(self, 1) + pub fn ln1(&mut self) -> Ln1W { + Ln1W::new(self, 1) } #[doc = "Bit 2 - Line 2 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln2(&mut self) -> LN2_W { - LN2_W::new(self, 2) + pub fn ln2(&mut self) -> Ln2W { + Ln2W::new(self, 2) } #[doc = "Bit 3 - Line 3 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln3(&mut self) -> LN3_W { - LN3_W::new(self, 3) + pub fn ln3(&mut self) -> Ln3W { + Ln3W::new(self, 3) } #[doc = "Bit 4 - Line 4 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln4(&mut self) -> LN4_W { - LN4_W::new(self, 4) + pub fn ln4(&mut self) -> Ln4W { + Ln4W::new(self, 4) } #[doc = "Bit 5 - Line 5 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln5(&mut self) -> LN5_W { - LN5_W::new(self, 5) + pub fn ln5(&mut self) -> Ln5W { + Ln5W::new(self, 5) } #[doc = "Bit 6 - Line 6 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln6(&mut self) -> LN6_W { - LN6_W::new(self, 6) + pub fn ln6(&mut self) -> Ln6W { + Ln6W::new(self, 6) } #[doc = "Bit 7 - Line 7 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln7(&mut self) -> LN7_W { - LN7_W::new(self, 7) + pub fn ln7(&mut self) -> Ln7W { + Ln7W::new(self, 7) } #[doc = "Bit 8 - Line 8 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln8(&mut self) -> LN8_W { - LN8_W::new(self, 8) + pub fn ln8(&mut self) -> Ln8W { + Ln8W::new(self, 8) } #[doc = "Bit 9 - Line 9 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln9(&mut self) -> LN9_W { - LN9_W::new(self, 9) + pub fn ln9(&mut self) -> Ln9W { + Ln9W::new(self, 9) } #[doc = "Bit 10 - Line 10 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln10(&mut self) -> LN10_W { - LN10_W::new(self, 10) + pub fn ln10(&mut self) -> Ln10W { + Ln10W::new(self, 10) } #[doc = "Bit 11 - Line 11 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln11(&mut self) -> LN11_W { - LN11_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ln11(&mut self) -> Ln11W { + Ln11W::new(self, 11) } } #[doc = "Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OVRCLR_SPEC; -impl crate::RegisterSpec for OVRCLR_SPEC { +pub struct OvrclrSpec; +impl crate::RegisterSpec for OvrclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`ovrclr::W`](W) writer structure"] -impl crate::Writable for OVRCLR_SPEC { +impl crate::Writable for OvrclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OVRCLR to value 0"] -impl crate::Resettable for OVRCLR_SPEC { +impl crate::Resettable for OvrclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/ovrstat.rs b/src/dlr/ovrstat.rs index 79c1c71c..c90e88b8 100644 --- a/src/dlr/ovrstat.rs +++ b/src/dlr/ovrstat.rs @@ -1,99 +1,99 @@ #[doc = "Register `OVRSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LN0` reader - Line 0 Overrun Status"] -pub type LN0_R = crate::BitReader; +pub type Ln0R = crate::BitReader; #[doc = "Field `LN1` reader - Line 1 Overrun Status"] -pub type LN1_R = crate::BitReader; +pub type Ln1R = crate::BitReader; #[doc = "Field `LN2` reader - Line 2 Overrun Status"] -pub type LN2_R = crate::BitReader; +pub type Ln2R = crate::BitReader; #[doc = "Field `LN3` reader - Line 3 Overrun Status"] -pub type LN3_R = crate::BitReader; +pub type Ln3R = crate::BitReader; #[doc = "Field `LN4` reader - Line 4 Overrun Status"] -pub type LN4_R = crate::BitReader; +pub type Ln4R = crate::BitReader; #[doc = "Field `LN5` reader - Line 5 Overrun Status"] -pub type LN5_R = crate::BitReader; +pub type Ln5R = crate::BitReader; #[doc = "Field `LN6` reader - Line 6 Overrun Status"] -pub type LN6_R = crate::BitReader; +pub type Ln6R = crate::BitReader; #[doc = "Field `LN7` reader - Line 7 Overrun Status"] -pub type LN7_R = crate::BitReader; +pub type Ln7R = crate::BitReader; #[doc = "Field `LN8` reader - Line 8 Overrun Status"] -pub type LN8_R = crate::BitReader; +pub type Ln8R = crate::BitReader; #[doc = "Field `LN9` reader - Line 9 Overrun Status"] -pub type LN9_R = crate::BitReader; +pub type Ln9R = crate::BitReader; #[doc = "Field `LN10` reader - Line 10 Overrun Status"] -pub type LN10_R = crate::BitReader; +pub type Ln10R = crate::BitReader; #[doc = "Field `LN11` reader - Line 11 Overrun Status"] -pub type LN11_R = crate::BitReader; +pub type Ln11R = crate::BitReader; impl R { #[doc = "Bit 0 - Line 0 Overrun Status"] #[inline(always)] - pub fn ln0(&self) -> LN0_R { - LN0_R::new((self.bits & 1) != 0) + pub fn ln0(&self) -> Ln0R { + Ln0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Line 1 Overrun Status"] #[inline(always)] - pub fn ln1(&self) -> LN1_R { - LN1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ln1(&self) -> Ln1R { + Ln1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Line 2 Overrun Status"] #[inline(always)] - pub fn ln2(&self) -> LN2_R { - LN2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ln2(&self) -> Ln2R { + Ln2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Line 3 Overrun Status"] #[inline(always)] - pub fn ln3(&self) -> LN3_R { - LN3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ln3(&self) -> Ln3R { + Ln3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Line 4 Overrun Status"] #[inline(always)] - pub fn ln4(&self) -> LN4_R { - LN4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ln4(&self) -> Ln4R { + Ln4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Line 5 Overrun Status"] #[inline(always)] - pub fn ln5(&self) -> LN5_R { - LN5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ln5(&self) -> Ln5R { + Ln5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Line 6 Overrun Status"] #[inline(always)] - pub fn ln6(&self) -> LN6_R { - LN6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ln6(&self) -> Ln6R { + Ln6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Line 7 Overrun Status"] #[inline(always)] - pub fn ln7(&self) -> LN7_R { - LN7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ln7(&self) -> Ln7R { + Ln7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Line 8 Overrun Status"] #[inline(always)] - pub fn ln8(&self) -> LN8_R { - LN8_R::new(((self.bits >> 8) & 1) != 0) + pub fn ln8(&self) -> Ln8R { + Ln8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Line 9 Overrun Status"] #[inline(always)] - pub fn ln9(&self) -> LN9_R { - LN9_R::new(((self.bits >> 9) & 1) != 0) + pub fn ln9(&self) -> Ln9R { + Ln9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Line 10 Overrun Status"] #[inline(always)] - pub fn ln10(&self) -> LN10_R { - LN10_R::new(((self.bits >> 10) & 1) != 0) + pub fn ln10(&self) -> Ln10R { + Ln10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Line 11 Overrun Status"] #[inline(always)] - pub fn ln11(&self) -> LN11_R { - LN11_R::new(((self.bits >> 11) & 1) != 0) + pub fn ln11(&self) -> Ln11R { + Ln11R::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OVRSTAT_SPEC; -impl crate::RegisterSpec for OVRSTAT_SPEC { +pub struct OvrstatSpec; +impl crate::RegisterSpec for OvrstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`ovrstat::R`](R) reader structure"] -impl crate::Readable for OVRSTAT_SPEC {} +impl crate::Readable for OvrstatSpec {} #[doc = "`reset()` method sets OVRSTAT to value 0"] -impl crate::Resettable for OVRSTAT_SPEC { +impl crate::Resettable for OvrstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/srsel0.rs b/src/dlr/srsel0.rs index 90d13c47..666175ae 100644 --- a/src/dlr/srsel0.rs +++ b/src/dlr/srsel0.rs @@ -1,154 +1,145 @@ #[doc = "Register `SRSEL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRSEL0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RS0` reader - Request Source for Line 0"] -pub type RS0_R = crate::FieldReader; +pub type Rs0R = crate::FieldReader; #[doc = "Field `RS0` writer - Request Source for Line 0"] -pub type RS0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS1` reader - Request Source for Line 1"] -pub type RS1_R = crate::FieldReader; +pub type Rs1R = crate::FieldReader; #[doc = "Field `RS1` writer - Request Source for Line 1"] -pub type RS1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS2` reader - Request Source for Line 2"] -pub type RS2_R = crate::FieldReader; +pub type Rs2R = crate::FieldReader; #[doc = "Field `RS2` writer - Request Source for Line 2"] -pub type RS2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs2W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS3` reader - Request Source for Line 3"] -pub type RS3_R = crate::FieldReader; +pub type Rs3R = crate::FieldReader; #[doc = "Field `RS3` writer - Request Source for Line 3"] -pub type RS3_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs3W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS4` reader - Request Source for Line 4"] -pub type RS4_R = crate::FieldReader; +pub type Rs4R = crate::FieldReader; #[doc = "Field `RS4` writer - Request Source for Line 4"] -pub type RS4_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs4W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS5` reader - Request Source for Line 5"] -pub type RS5_R = crate::FieldReader; +pub type Rs5R = crate::FieldReader; #[doc = "Field `RS5` writer - Request Source for Line 5"] -pub type RS5_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs5W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS6` reader - Request Source for Line 6"] -pub type RS6_R = crate::FieldReader; +pub type Rs6R = crate::FieldReader; #[doc = "Field `RS6` writer - Request Source for Line 6"] -pub type RS6_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs6W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS7` reader - Request Source for Line 7"] -pub type RS7_R = crate::FieldReader; +pub type Rs7R = crate::FieldReader; #[doc = "Field `RS7` writer - Request Source for Line 7"] -pub type RS7_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs7W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Request Source for Line 0"] #[inline(always)] - pub fn rs0(&self) -> RS0_R { - RS0_R::new((self.bits & 0x0f) as u8) + pub fn rs0(&self) -> Rs0R { + Rs0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Request Source for Line 1"] #[inline(always)] - pub fn rs1(&self) -> RS1_R { - RS1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rs1(&self) -> Rs1R { + Rs1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Request Source for Line 2"] #[inline(always)] - pub fn rs2(&self) -> RS2_R { - RS2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rs2(&self) -> Rs2R { + Rs2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Request Source for Line 3"] #[inline(always)] - pub fn rs3(&self) -> RS3_R { - RS3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rs3(&self) -> Rs3R { + Rs3R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Request Source for Line 4"] #[inline(always)] - pub fn rs4(&self) -> RS4_R { - RS4_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rs4(&self) -> Rs4R { + Rs4R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Request Source for Line 5"] #[inline(always)] - pub fn rs5(&self) -> RS5_R { - RS5_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rs5(&self) -> Rs5R { + Rs5R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Request Source for Line 6"] #[inline(always)] - pub fn rs6(&self) -> RS6_R { - RS6_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rs6(&self) -> Rs6R { + Rs6R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Request Source for Line 7"] #[inline(always)] - pub fn rs7(&self) -> RS7_R { - RS7_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rs7(&self) -> Rs7R { + Rs7R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Request Source for Line 0"] #[inline(always)] #[must_use] - pub fn rs0(&mut self) -> RS0_W { - RS0_W::new(self, 0) + pub fn rs0(&mut self) -> Rs0W { + Rs0W::new(self, 0) } #[doc = "Bits 4:7 - Request Source for Line 1"] #[inline(always)] #[must_use] - pub fn rs1(&mut self) -> RS1_W { - RS1_W::new(self, 4) + pub fn rs1(&mut self) -> Rs1W { + Rs1W::new(self, 4) } #[doc = "Bits 8:11 - Request Source for Line 2"] #[inline(always)] #[must_use] - pub fn rs2(&mut self) -> RS2_W { - RS2_W::new(self, 8) + pub fn rs2(&mut self) -> Rs2W { + Rs2W::new(self, 8) } #[doc = "Bits 12:15 - Request Source for Line 3"] #[inline(always)] #[must_use] - pub fn rs3(&mut self) -> RS3_W { - RS3_W::new(self, 12) + pub fn rs3(&mut self) -> Rs3W { + Rs3W::new(self, 12) } #[doc = "Bits 16:19 - Request Source for Line 4"] #[inline(always)] #[must_use] - pub fn rs4(&mut self) -> RS4_W { - RS4_W::new(self, 16) + pub fn rs4(&mut self) -> Rs4W { + Rs4W::new(self, 16) } #[doc = "Bits 20:23 - Request Source for Line 5"] #[inline(always)] #[must_use] - pub fn rs5(&mut self) -> RS5_W { - RS5_W::new(self, 20) + pub fn rs5(&mut self) -> Rs5W { + Rs5W::new(self, 20) } #[doc = "Bits 24:27 - Request Source for Line 6"] #[inline(always)] #[must_use] - pub fn rs6(&mut self) -> RS6_W { - RS6_W::new(self, 24) + pub fn rs6(&mut self) -> Rs6W { + Rs6W::new(self, 24) } #[doc = "Bits 28:31 - Request Source for Line 7"] #[inline(always)] #[must_use] - pub fn rs7(&mut self) -> RS7_W { - RS7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rs7(&mut self) -> Rs7W { + Rs7W::new(self, 28) } } #[doc = "Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRSEL0_SPEC; -impl crate::RegisterSpec for SRSEL0_SPEC { +pub struct Srsel0Spec; +impl crate::RegisterSpec for Srsel0Spec { type Ux = u32; } #[doc = "`read()` method returns [`srsel0::R`](R) reader structure"] -impl crate::Readable for SRSEL0_SPEC {} +impl crate::Readable for Srsel0Spec {} #[doc = "`write(|w| ..)` method takes [`srsel0::W`](W) writer structure"] -impl crate::Writable for SRSEL0_SPEC { +impl crate::Writable for Srsel0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRSEL0 to value 0"] -impl crate::Resettable for SRSEL0_SPEC { +impl crate::Resettable for Srsel0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/srsel1.rs b/src/dlr/srsel1.rs index a6350cc5..a2ad076d 100644 --- a/src/dlr/srsel1.rs +++ b/src/dlr/srsel1.rs @@ -1,94 +1,85 @@ #[doc = "Register `SRSEL1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRSEL1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RS8` reader - Request Source for Line 8"] -pub type RS8_R = crate::FieldReader; +pub type Rs8R = crate::FieldReader; #[doc = "Field `RS8` writer - Request Source for Line 8"] -pub type RS8_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs8W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS9` reader - Request Source for Line 9"] -pub type RS9_R = crate::FieldReader; +pub type Rs9R = crate::FieldReader; #[doc = "Field `RS9` writer - Request Source for Line 9"] -pub type RS9_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs9W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS10` reader - Request Source for Line 10"] -pub type RS10_R = crate::FieldReader; +pub type Rs10R = crate::FieldReader; #[doc = "Field `RS10` writer - Request Source for Line 10"] -pub type RS10_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs10W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS11` reader - Request Source for Line 11"] -pub type RS11_R = crate::FieldReader; +pub type Rs11R = crate::FieldReader; #[doc = "Field `RS11` writer - Request Source for Line 11"] -pub type RS11_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Rs11W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Request Source for Line 8"] #[inline(always)] - pub fn rs8(&self) -> RS8_R { - RS8_R::new((self.bits & 0x0f) as u8) + pub fn rs8(&self) -> Rs8R { + Rs8R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Request Source for Line 9"] #[inline(always)] - pub fn rs9(&self) -> RS9_R { - RS9_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rs9(&self) -> Rs9R { + Rs9R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Request Source for Line 10"] #[inline(always)] - pub fn rs10(&self) -> RS10_R { - RS10_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rs10(&self) -> Rs10R { + Rs10R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Request Source for Line 11"] #[inline(always)] - pub fn rs11(&self) -> RS11_R { - RS11_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rs11(&self) -> Rs11R { + Rs11R::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Request Source for Line 8"] #[inline(always)] #[must_use] - pub fn rs8(&mut self) -> RS8_W { - RS8_W::new(self, 0) + pub fn rs8(&mut self) -> Rs8W { + Rs8W::new(self, 0) } #[doc = "Bits 4:7 - Request Source for Line 9"] #[inline(always)] #[must_use] - pub fn rs9(&mut self) -> RS9_W { - RS9_W::new(self, 4) + pub fn rs9(&mut self) -> Rs9W { + Rs9W::new(self, 4) } #[doc = "Bits 8:11 - Request Source for Line 10"] #[inline(always)] #[must_use] - pub fn rs10(&mut self) -> RS10_W { - RS10_W::new(self, 8) + pub fn rs10(&mut self) -> Rs10W { + Rs10W::new(self, 8) } #[doc = "Bits 12:15 - Request Source for Line 11"] #[inline(always)] #[must_use] - pub fn rs11(&mut self) -> RS11_W { - RS11_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rs11(&mut self) -> Rs11W { + Rs11W::new(self, 12) } } #[doc = "Service Request Selection 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRSEL1_SPEC; -impl crate::RegisterSpec for SRSEL1_SPEC { +pub struct Srsel1Spec; +impl crate::RegisterSpec for Srsel1Spec { type Ux = u32; } #[doc = "`read()` method returns [`srsel1::R`](R) reader structure"] -impl crate::Readable for SRSEL1_SPEC {} +impl crate::Readable for Srsel1Spec {} #[doc = "`write(|w| ..)` method takes [`srsel1::W`](W) writer structure"] -impl crate::Writable for SRSEL1_SPEC { +impl crate::Writable for Srsel1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRSEL1 to value 0"] -impl crate::Resettable for SRSEL1_SPEC { +impl crate::Resettable for Srsel1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd.rs b/src/dsd.rs index b3fff3bc..34ee509e 100644 --- a/src/dsd.rs +++ b/src/dsd.rs @@ -1,100 +1,108 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clc: CLC, + clc: Clc, _reserved1: [u8; 0x04], - id: ID, + id: Id, _reserved2: [u8; 0x1c], - ocs: OCS, + ocs: Ocs, _reserved3: [u8; 0x54], - globcfg: GLOBCFG, + globcfg: Globcfg, _reserved4: [u8; 0x04], - globrc: GLOBRC, + globrc: Globrc, _reserved5: [u8; 0x14], - cgcfg: CGCFG, + cgcfg: Cgcfg, _reserved6: [u8; 0x3c], - evflag: EVFLAG, - evflagclr: EVFLAGCLR, + evflag: Evflag, + evflagclr: Evflagclr, } impl RegisterBlock { #[doc = "0x00 - Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &CLC { + pub const fn clc(&self) -> &Clc { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x28 - OCDS Control and Status Register"] #[inline(always)] - pub const fn ocs(&self) -> &OCS { + pub const fn ocs(&self) -> &Ocs { &self.ocs } #[doc = "0x80 - Global Configuration Register"] #[inline(always)] - pub const fn globcfg(&self) -> &GLOBCFG { + pub const fn globcfg(&self) -> &Globcfg { &self.globcfg } #[doc = "0x88 - Global Run Control Register"] #[inline(always)] - pub const fn globrc(&self) -> &GLOBRC { + pub const fn globrc(&self) -> &Globrc { &self.globrc } #[doc = "0xa0 - Carrier Generator Configuration Register"] #[inline(always)] - pub const fn cgcfg(&self) -> &CGCFG { + pub const fn cgcfg(&self) -> &Cgcfg { &self.cgcfg } #[doc = "0xe0 - Event Flag Register"] #[inline(always)] - pub const fn evflag(&self) -> &EVFLAG { + pub const fn evflag(&self) -> &Evflag { &self.evflag } #[doc = "0xe4 - Event Flag Clear Register"] #[inline(always)] - pub const fn evflagclr(&self) -> &EVFLAGCLR { + pub const fn evflagclr(&self) -> &Evflagclr { &self.evflagclr } } #[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -pub type CLC = crate::Reg; +#[doc(alias = "CLC")] +pub type Clc = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] module"] -pub type OCS = crate::Reg; +#[doc(alias = "OCS")] +pub type Ocs = crate::Reg; #[doc = "OCDS Control and Status Register"] pub mod ocs; #[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] module"] -pub type GLOBCFG = crate::Reg; +#[doc(alias = "GLOBCFG")] +pub type Globcfg = crate::Reg; #[doc = "Global Configuration Register"] pub mod globcfg; #[doc = "GLOBRC (rw) register accessor: Global Run Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrc`] module"] -pub type GLOBRC = crate::Reg; +#[doc(alias = "GLOBRC")] +pub type Globrc = crate::Reg; #[doc = "Global Run Control Register"] pub mod globrc; #[doc = "CGCFG (rw) register accessor: Carrier Generator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgcfg`] module"] -pub type CGCFG = crate::Reg; +#[doc(alias = "CGCFG")] +pub type Cgcfg = crate::Reg; #[doc = "Carrier Generator Configuration Register"] pub mod cgcfg; #[doc = "EVFLAG (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflag`] module"] -pub type EVFLAG = crate::Reg; +#[doc(alias = "EVFLAG")] +pub type Evflag = crate::Reg; #[doc = "Event Flag Register"] pub mod evflag; #[doc = "EVFLAGCLR (w) register accessor: Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflagclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evflagclr`] module"] -pub type EVFLAGCLR = crate::Reg; +#[doc(alias = "EVFLAGCLR")] +pub type Evflagclr = crate::Reg; #[doc = "Event Flag Clear Register"] pub mod evflagclr; diff --git a/src/dsd/cgcfg.rs b/src/dsd/cgcfg.rs index 4f071790..16cdad6d 100644 --- a/src/dsd/cgcfg.rs +++ b/src/dsd/cgcfg.rs @@ -1,67 +1,67 @@ #[doc = "Register `CGCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CGCFG` writer"] -pub type W = crate::W; -#[doc = "Field `CGMOD` reader - Carrier Generator Operating Mode"] -pub type CGMOD_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Carrier Generator Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CGMOD_A { +pub enum Cgmod { #[doc = "0: Stopped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Square wave"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Triangle"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Sine wave"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CGMOD_A) -> Self { + fn from(variant: Cgmod) -> Self { variant as _ } } -impl crate::FieldSpec for CGMOD_A { +impl crate::FieldSpec for Cgmod { type Ux = u8; } -impl CGMOD_R { +#[doc = "Field `CGMOD` reader - Carrier Generator Operating Mode"] +pub type CgmodR = crate::FieldReader; +impl CgmodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CGMOD_A { + pub const fn variant(&self) -> Cgmod { match self.bits { - 0 => CGMOD_A::VALUE1, - 1 => CGMOD_A::VALUE2, - 2 => CGMOD_A::VALUE3, - 3 => CGMOD_A::VALUE4, + 0 => Cgmod::Value1, + 1 => Cgmod::Value2, + 2 => Cgmod::Value3, + 3 => Cgmod::Value4, _ => unreachable!(), } } #[doc = "Stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CGMOD_A::VALUE1 + *self == Cgmod::Value1 } #[doc = "Square wave"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CGMOD_A::VALUE2 + *self == Cgmod::Value2 } #[doc = "Triangle"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CGMOD_A::VALUE3 + *self == Cgmod::Value3 } #[doc = "Sine wave"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CGMOD_A::VALUE4 + *self == Cgmod::Value4 } } #[doc = "Field `CGMOD` writer - Carrier Generator Operating Mode"] -pub type CGMOD_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CGMOD_A>; -impl<'a, REG> CGMOD_W<'a, REG> +pub type CgmodW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cgmod>; +impl<'a, REG> CgmodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,190 +69,190 @@ where #[doc = "Stopped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CGMOD_A::VALUE1) + self.variant(Cgmod::Value1) } #[doc = "Square wave"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CGMOD_A::VALUE2) + self.variant(Cgmod::Value2) } #[doc = "Triangle"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CGMOD_A::VALUE3) + self.variant(Cgmod::Value3) } #[doc = "Sine wave"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CGMOD_A::VALUE4) + self.variant(Cgmod::Value4) } } -#[doc = "Field `BREV` reader - Bit-Reverse PWM Generation"] -pub type BREV_R = crate::BitReader; #[doc = "Bit-Reverse PWM Generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BREV_A { +pub enum Brev { #[doc = "0: Normal mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit-reverse mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BREV_A) -> Self { + fn from(variant: Brev) -> Self { variant as u8 != 0 } } -impl BREV_R { +#[doc = "Field `BREV` reader - Bit-Reverse PWM Generation"] +pub type BrevR = crate::BitReader; +impl BrevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BREV_A { + pub const fn variant(&self) -> Brev { match self.bits { - false => BREV_A::VALUE1, - true => BREV_A::VALUE2, + false => Brev::Value1, + true => Brev::Value2, } } #[doc = "Normal mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BREV_A::VALUE1 + *self == Brev::Value1 } #[doc = "Bit-reverse mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BREV_A::VALUE2 + *self == Brev::Value2 } } #[doc = "Field `BREV` writer - Bit-Reverse PWM Generation"] -pub type BREV_W<'a, REG> = crate::BitWriter<'a, REG, BREV_A>; -impl<'a, REG> BREV_W<'a, REG> +pub type BrevW<'a, REG> = crate::BitWriter<'a, REG, Brev>; +impl<'a, REG> BrevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BREV_A::VALUE1) + self.variant(Brev::Value1) } #[doc = "Bit-reverse mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BREV_A::VALUE2) + self.variant(Brev::Value2) } } -#[doc = "Field `SIGPOL` reader - Signal Polarity"] -pub type SIGPOL_R = crate::BitReader; #[doc = "Signal Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIGPOL_A { +pub enum Sigpol { #[doc = "0: Normal: carrier signal begins with +1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Inverted: carrier signal begins with -1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIGPOL_A) -> Self { + fn from(variant: Sigpol) -> Self { variant as u8 != 0 } } -impl SIGPOL_R { +#[doc = "Field `SIGPOL` reader - Signal Polarity"] +pub type SigpolR = crate::BitReader; +impl SigpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SIGPOL_A { + pub const fn variant(&self) -> Sigpol { match self.bits { - false => SIGPOL_A::VALUE1, - true => SIGPOL_A::VALUE2, + false => Sigpol::Value1, + true => Sigpol::Value2, } } #[doc = "Normal: carrier signal begins with +1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIGPOL_A::VALUE1 + *self == Sigpol::Value1 } #[doc = "Inverted: carrier signal begins with -1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIGPOL_A::VALUE2 + *self == Sigpol::Value2 } } #[doc = "Field `SIGPOL` writer - Signal Polarity"] -pub type SIGPOL_W<'a, REG> = crate::BitWriter<'a, REG, SIGPOL_A>; -impl<'a, REG> SIGPOL_W<'a, REG> +pub type SigpolW<'a, REG> = crate::BitWriter<'a, REG, Sigpol>; +impl<'a, REG> SigpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal: carrier signal begins with +1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIGPOL_A::VALUE1) + self.variant(Sigpol::Value1) } #[doc = "Inverted: carrier signal begins with -1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIGPOL_A::VALUE2) + self.variant(Sigpol::Value2) } } -#[doc = "Field `DIVCG` reader - Divider Factor for the PWM Pattern Signal Generator"] -pub type DIVCG_R = crate::FieldReader; #[doc = "Divider Factor for the PWM Pattern Signal Generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIVCG_A { +pub enum Divcg { #[doc = "0: fCG = fCLK / 2"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCG = fCLK / 4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fCG = fCLK / 6"] - VALUE3 = 2, + Value3 = 2, #[doc = "15: fCG = fCLK / 32"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIVCG_A) -> Self { + fn from(variant: Divcg) -> Self { variant as _ } } -impl crate::FieldSpec for DIVCG_A { +impl crate::FieldSpec for Divcg { type Ux = u8; } -impl DIVCG_R { +#[doc = "Field `DIVCG` reader - Divider Factor for the PWM Pattern Signal Generator"] +pub type DivcgR = crate::FieldReader; +impl DivcgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIVCG_A::VALUE1), - 1 => Some(DIVCG_A::VALUE2), - 2 => Some(DIVCG_A::VALUE3), - 15 => Some(DIVCG_A::VALUE4), + 0 => Some(Divcg::Value1), + 1 => Some(Divcg::Value2), + 2 => Some(Divcg::Value3), + 15 => Some(Divcg::Value4), _ => None, } } #[doc = "fCG = fCLK / 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIVCG_A::VALUE1 + *self == Divcg::Value1 } #[doc = "fCG = fCLK / 4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIVCG_A::VALUE2 + *self == Divcg::Value2 } #[doc = "fCG = fCLK / 6"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DIVCG_A::VALUE3 + *self == Divcg::Value3 } #[doc = "fCG = fCLK / 32"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DIVCG_A::VALUE4 + *self == Divcg::Value4 } } #[doc = "Field `DIVCG` writer - Divider Factor for the PWM Pattern Signal Generator"] -pub type DIVCG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DIVCG_A>; -impl<'a, REG> DIVCG_W<'a, REG> +pub type DivcgW<'a, REG> = crate::FieldWriter<'a, REG, 4, Divcg>; +impl<'a, REG> DivcgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,273 +260,264 @@ where #[doc = "fCG = fCLK / 2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVCG_A::VALUE1) + self.variant(Divcg::Value1) } #[doc = "fCG = fCLK / 4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVCG_A::VALUE2) + self.variant(Divcg::Value2) } #[doc = "fCG = fCLK / 6"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DIVCG_A::VALUE3) + self.variant(Divcg::Value3) } #[doc = "fCG = fCLK / 32"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DIVCG_A::VALUE4) + self.variant(Divcg::Value4) } } -#[doc = "Field `RUN` reader - Run Indicator"] -pub type RUN_R = crate::BitReader; #[doc = "Run Indicator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RUN_A { +pub enum Run { #[doc = "0: Stopped (cleared at the end of a period)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RUN_A) -> Self { + fn from(variant: Run) -> Self { variant as u8 != 0 } } -impl RUN_R { +#[doc = "Field `RUN` reader - Run Indicator"] +pub type RunR = crate::BitReader; +impl RunR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RUN_A { + pub const fn variant(&self) -> Run { match self.bits { - false => RUN_A::VALUE1, - true => RUN_A::VALUE2, + false => Run::Value1, + true => Run::Value2, } } #[doc = "Stopped (cleared at the end of a period)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RUN_A::VALUE1 + *self == Run::Value1 } #[doc = "Running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RUN_A::VALUE2 + *self == Run::Value2 } } #[doc = "Field `BITCOUNT` reader - Bit Counter"] -pub type BITCOUNT_R = crate::FieldReader; +pub type BitcountR = crate::FieldReader; #[doc = "Field `STEPCOUNT` reader - Step Counter"] -pub type STEPCOUNT_R = crate::FieldReader; -#[doc = "Field `STEPS` reader - Step Counter Sign"] -pub type STEPS_R = crate::BitReader; +pub type StepcountR = crate::FieldReader; #[doc = "Step Counter Sign\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STEPS_A { +pub enum Steps { #[doc = "0: Step counter value is positive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Step counter value is negative"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STEPS_A) -> Self { + fn from(variant: Steps) -> Self { variant as u8 != 0 } } -impl STEPS_R { +#[doc = "Field `STEPS` reader - Step Counter Sign"] +pub type StepsR = crate::BitReader; +impl StepsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STEPS_A { + pub const fn variant(&self) -> Steps { match self.bits { - false => STEPS_A::VALUE1, - true => STEPS_A::VALUE2, + false => Steps::Value1, + true => Steps::Value2, } } #[doc = "Step counter value is positive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STEPS_A::VALUE1 + *self == Steps::Value1 } #[doc = "Step counter value is negative"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STEPS_A::VALUE2 + *self == Steps::Value2 } } -#[doc = "Field `STEPD` reader - Step Counter Direction"] -pub type STEPD_R = crate::BitReader; #[doc = "Step Counter Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STEPD_A { +pub enum Stepd { #[doc = "0: Step counter is counting up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Step counter is counting down"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STEPD_A) -> Self { + fn from(variant: Stepd) -> Self { variant as u8 != 0 } } -impl STEPD_R { +#[doc = "Field `STEPD` reader - Step Counter Direction"] +pub type StepdR = crate::BitReader; +impl StepdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STEPD_A { + pub const fn variant(&self) -> Stepd { match self.bits { - false => STEPD_A::VALUE1, - true => STEPD_A::VALUE2, + false => Stepd::Value1, + true => Stepd::Value2, } } #[doc = "Step counter is counting up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STEPD_A::VALUE1 + *self == Stepd::Value1 } #[doc = "Step counter is counting down"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STEPD_A::VALUE2 + *self == Stepd::Value2 } } -#[doc = "Field `SGNCG` reader - Sign Signal from Carrier Generator"] -pub type SGNCG_R = crate::BitReader; #[doc = "Sign Signal from Carrier Generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SGNCG_A { +pub enum Sgncg { #[doc = "0: Positive values"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Negative values"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SGNCG_A) -> Self { + fn from(variant: Sgncg) -> Self { variant as u8 != 0 } } -impl SGNCG_R { +#[doc = "Field `SGNCG` reader - Sign Signal from Carrier Generator"] +pub type SgncgR = crate::BitReader; +impl SgncgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SGNCG_A { + pub const fn variant(&self) -> Sgncg { match self.bits { - false => SGNCG_A::VALUE1, - true => SGNCG_A::VALUE2, + false => Sgncg::Value1, + true => Sgncg::Value2, } } #[doc = "Positive values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SGNCG_A::VALUE1 + *self == Sgncg::Value1 } #[doc = "Negative values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SGNCG_A::VALUE2 + *self == Sgncg::Value2 } } impl R { #[doc = "Bits 0:1 - Carrier Generator Operating Mode"] #[inline(always)] - pub fn cgmod(&self) -> CGMOD_R { - CGMOD_R::new((self.bits & 3) as u8) + pub fn cgmod(&self) -> CgmodR { + CgmodR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Bit-Reverse PWM Generation"] #[inline(always)] - pub fn brev(&self) -> BREV_R { - BREV_R::new(((self.bits >> 2) & 1) != 0) + pub fn brev(&self) -> BrevR { + BrevR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Signal Polarity"] #[inline(always)] - pub fn sigpol(&self) -> SIGPOL_R { - SIGPOL_R::new(((self.bits >> 3) & 1) != 0) + pub fn sigpol(&self) -> SigpolR { + SigpolR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:7 - Divider Factor for the PWM Pattern Signal Generator"] #[inline(always)] - pub fn divcg(&self) -> DIVCG_R { - DIVCG_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn divcg(&self) -> DivcgR { + DivcgR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bit 15 - Run Indicator"] #[inline(always)] - pub fn run(&self) -> RUN_R { - RUN_R::new(((self.bits >> 15) & 1) != 0) + pub fn run(&self) -> RunR { + RunR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Bit Counter"] #[inline(always)] - pub fn bitcount(&self) -> BITCOUNT_R { - BITCOUNT_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn bitcount(&self) -> BitcountR { + BitcountR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:27 - Step Counter"] #[inline(always)] - pub fn stepcount(&self) -> STEPCOUNT_R { - STEPCOUNT_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn stepcount(&self) -> StepcountR { + StepcountR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 28 - Step Counter Sign"] #[inline(always)] - pub fn steps(&self) -> STEPS_R { - STEPS_R::new(((self.bits >> 28) & 1) != 0) + pub fn steps(&self) -> StepsR { + StepsR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Step Counter Direction"] #[inline(always)] - pub fn stepd(&self) -> STEPD_R { - STEPD_R::new(((self.bits >> 29) & 1) != 0) + pub fn stepd(&self) -> StepdR { + StepdR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Sign Signal from Carrier Generator"] #[inline(always)] - pub fn sgncg(&self) -> SGNCG_R { - SGNCG_R::new(((self.bits >> 30) & 1) != 0) + pub fn sgncg(&self) -> SgncgR { + SgncgR::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Carrier Generator Operating Mode"] #[inline(always)] #[must_use] - pub fn cgmod(&mut self) -> CGMOD_W { - CGMOD_W::new(self, 0) + pub fn cgmod(&mut self) -> CgmodW { + CgmodW::new(self, 0) } #[doc = "Bit 2 - Bit-Reverse PWM Generation"] #[inline(always)] #[must_use] - pub fn brev(&mut self) -> BREV_W { - BREV_W::new(self, 2) + pub fn brev(&mut self) -> BrevW { + BrevW::new(self, 2) } #[doc = "Bit 3 - Signal Polarity"] #[inline(always)] #[must_use] - pub fn sigpol(&mut self) -> SIGPOL_W { - SIGPOL_W::new(self, 3) + pub fn sigpol(&mut self) -> SigpolW { + SigpolW::new(self, 3) } #[doc = "Bits 4:7 - Divider Factor for the PWM Pattern Signal Generator"] #[inline(always)] #[must_use] - pub fn divcg(&mut self) -> DIVCG_W { - DIVCG_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn divcg(&mut self) -> DivcgW { + DivcgW::new(self, 4) } } #[doc = "Carrier Generator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGCFG_SPEC; -impl crate::RegisterSpec for CGCFG_SPEC { +pub struct CgcfgSpec; +impl crate::RegisterSpec for CgcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`cgcfg::R`](R) reader structure"] -impl crate::Readable for CGCFG_SPEC {} +impl crate::Readable for CgcfgSpec {} #[doc = "`write(|w| ..)` method takes [`cgcfg::W`](W) writer structure"] -impl crate::Writable for CGCFG_SPEC { +impl crate::Writable for CgcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGCFG to value 0x0710_0000"] -impl crate::Resettable for CGCFG_SPEC { +impl crate::Resettable for CgcfgSpec { const RESET_VALUE: u32 = 0x0710_0000; } diff --git a/src/dsd/clc.rs b/src/dsd/clc.rs index 3f95b451..d3285b7a 100644 --- a/src/dsd/clc.rs +++ b/src/dsd/clc.rs @@ -1,203 +1,194 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; -#[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DISR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Module Disable Request Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISR_A { +pub enum Disr { #[doc = "0: On request: enable the module clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Off request: stop the module clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISR_A) -> Self { + fn from(variant: Disr) -> Self { variant as u8 != 0 } } -impl DISR_R { +#[doc = "Field `DISR` reader - Module Disable Request Bit"] +pub type DisrR = crate::BitReader; +impl DisrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISR_A { + pub const fn variant(&self) -> Disr { match self.bits { - false => DISR_A::VALUE1, - true => DISR_A::VALUE2, + false => Disr::Value1, + true => Disr::Value2, } } #[doc = "On request: enable the module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISR_A::VALUE1 + *self == Disr::Value1 } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISR_A::VALUE2 + *self == Disr::Value2 } } #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG, DISR_A>; -impl<'a, REG> DISR_W<'a, REG> +pub type DisrW<'a, REG> = crate::BitWriter<'a, REG, Disr>; +impl<'a, REG> DisrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "On request: enable the module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE1) + self.variant(Disr::Value1) } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE2) + self.variant(Disr::Value2) } } -#[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DISS_R = crate::BitReader; #[doc = "Module Disable Status Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISS_A { +pub enum Diss { #[doc = "0: Module clock is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Off: module is not clocked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISS_A) -> Self { + fn from(variant: Diss) -> Self { variant as u8 != 0 } } -impl DISS_R { +#[doc = "Field `DISS` reader - Module Disable Status Bit"] +pub type DissR = crate::BitReader; +impl DissR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISS_A { + pub const fn variant(&self) -> Diss { match self.bits { - false => DISS_A::VALUE1, - true => DISS_A::VALUE2, + false => Diss::Value1, + true => Diss::Value2, } } #[doc = "Module clock is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISS_A::VALUE1 + *self == Diss::Value1 } #[doc = "Off: module is not clocked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISS_A::VALUE2 + *self == Diss::Value2 } } -#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] -pub type EDIS_R = crate::BitReader; #[doc = "Sleep Mode Enable Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDIS_A { +pub enum Edis { #[doc = "0: Sleep mode request is enabled and functional"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Module disregards the sleep mode control signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDIS_A) -> Self { + fn from(variant: Edis) -> Self { variant as u8 != 0 } } -impl EDIS_R { +#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] +pub type EdisR = crate::BitReader; +impl EdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EDIS_A { + pub const fn variant(&self) -> Edis { match self.bits { - false => EDIS_A::VALUE1, - true => EDIS_A::VALUE2, + false => Edis::Value1, + true => Edis::Value2, } } #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EDIS_A::VALUE1 + *self == Edis::Value1 } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EDIS_A::VALUE2 + *self == Edis::Value2 } } #[doc = "Field `EDIS` writer - Sleep Mode Enable Control"] -pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG, EDIS_A>; -impl<'a, REG> EDIS_W<'a, REG> +pub type EdisW<'a, REG> = crate::BitWriter<'a, REG, Edis>; +impl<'a, REG> EdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EDIS_A::VALUE1) + self.variant(Edis::Value1) } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EDIS_A::VALUE2) + self.variant(Edis::Value2) } } impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DISR_R { - DISR_R::new((self.bits & 1) != 0) + pub fn disr(&self) -> DisrR { + DisrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DISS_R { - DISS_R::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DissR { + DissR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - pub fn edis(&self) -> EDIS_R { - EDIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn edis(&self) -> EdisR { + EdisR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DISR_W { - DISR_W::new(self, 0) + pub fn disr(&mut self) -> DisrW { + DisrW::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] #[must_use] - pub fn edis(&mut self) -> EDIS_W { - EDIS_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn edis(&mut self) -> EdisW { + EdisW::new(self, 3) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLC_SPEC; -impl crate::RegisterSpec for CLC_SPEC { +pub struct ClcSpec; +impl crate::RegisterSpec for ClcSpec { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for CLC_SPEC {} +impl crate::Readable for ClcSpec {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for CLC_SPEC { +impl crate::Writable for ClcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for CLC_SPEC { +impl crate::Resettable for ClcSpec { const RESET_VALUE: u32 = 0x03; } diff --git a/src/dsd/evflag.rs b/src/dsd/evflag.rs index b7223893..9ffa98f8 100644 --- a/src/dsd/evflag.rs +++ b/src/dsd/evflag.rs @@ -1,546 +1,537 @@ #[doc = "Register `EVFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EVFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `RESEV0` reader - Result Event"] -pub type RESEV0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEV0_A { +pub enum Resev0 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new result has been stored in register RESMx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEV0_A) -> Self { + fn from(variant: Resev0) -> Self { variant as u8 != 0 } } -impl RESEV0_R { +#[doc = "Field `RESEV0` reader - Result Event"] +pub type Resev0R = crate::BitReader; +impl Resev0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESEV0_A { + pub const fn variant(&self) -> Resev0 { match self.bits { - false => RESEV0_A::VALUE1, - true => RESEV0_A::VALUE2, + false => Resev0::Value1, + true => Resev0::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESEV0_A::VALUE1 + *self == Resev0::Value1 } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESEV0_A::VALUE2 + *self == Resev0::Value2 } } #[doc = "Field `RESEV0` writer - Result Event"] -pub type RESEV0_W<'a, REG> = crate::BitWriter<'a, REG, RESEV0_A>; -impl<'a, REG> RESEV0_W<'a, REG> +pub type Resev0W<'a, REG> = crate::BitWriter<'a, REG, Resev0>; +impl<'a, REG> Resev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEV0_A::VALUE1) + self.variant(Resev0::Value1) } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEV0_A::VALUE2) + self.variant(Resev0::Value2) } } -#[doc = "Field `RESEV1` reader - Result Event"] -pub type RESEV1_R = crate::BitReader; #[doc = "Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEV1_A { +pub enum Resev1 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new result has been stored in register RESMx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEV1_A) -> Self { + fn from(variant: Resev1) -> Self { variant as u8 != 0 } } -impl RESEV1_R { +#[doc = "Field `RESEV1` reader - Result Event"] +pub type Resev1R = crate::BitReader; +impl Resev1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESEV1_A { + pub const fn variant(&self) -> Resev1 { match self.bits { - false => RESEV1_A::VALUE1, - true => RESEV1_A::VALUE2, + false => Resev1::Value1, + true => Resev1::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESEV1_A::VALUE1 + *self == Resev1::Value1 } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESEV1_A::VALUE2 + *self == Resev1::Value2 } } #[doc = "Field `RESEV1` writer - Result Event"] -pub type RESEV1_W<'a, REG> = crate::BitWriter<'a, REG, RESEV1_A>; -impl<'a, REG> RESEV1_W<'a, REG> +pub type Resev1W<'a, REG> = crate::BitWriter<'a, REG, Resev1>; +impl<'a, REG> Resev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEV1_A::VALUE1) + self.variant(Resev1::Value1) } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEV1_A::VALUE2) + self.variant(Resev1::Value2) } } -#[doc = "Field `RESEV2` reader - Result Event"] -pub type RESEV2_R = crate::BitReader; #[doc = "Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEV2_A { +pub enum Resev2 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new result has been stored in register RESMx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEV2_A) -> Self { + fn from(variant: Resev2) -> Self { variant as u8 != 0 } } -impl RESEV2_R { +#[doc = "Field `RESEV2` reader - Result Event"] +pub type Resev2R = crate::BitReader; +impl Resev2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESEV2_A { + pub const fn variant(&self) -> Resev2 { match self.bits { - false => RESEV2_A::VALUE1, - true => RESEV2_A::VALUE2, + false => Resev2::Value1, + true => Resev2::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESEV2_A::VALUE1 + *self == Resev2::Value1 } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESEV2_A::VALUE2 + *self == Resev2::Value2 } } #[doc = "Field `RESEV2` writer - Result Event"] -pub type RESEV2_W<'a, REG> = crate::BitWriter<'a, REG, RESEV2_A>; -impl<'a, REG> RESEV2_W<'a, REG> +pub type Resev2W<'a, REG> = crate::BitWriter<'a, REG, Resev2>; +impl<'a, REG> Resev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEV2_A::VALUE1) + self.variant(Resev2::Value1) } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEV2_A::VALUE2) + self.variant(Resev2::Value2) } } -#[doc = "Field `RESEV3` reader - Result Event"] -pub type RESEV3_R = crate::BitReader; #[doc = "Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEV3_A { +pub enum Resev3 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A new result has been stored in register RESMx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEV3_A) -> Self { + fn from(variant: Resev3) -> Self { variant as u8 != 0 } } -impl RESEV3_R { +#[doc = "Field `RESEV3` reader - Result Event"] +pub type Resev3R = crate::BitReader; +impl Resev3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESEV3_A { + pub const fn variant(&self) -> Resev3 { match self.bits { - false => RESEV3_A::VALUE1, - true => RESEV3_A::VALUE2, + false => Resev3::Value1, + true => Resev3::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESEV3_A::VALUE1 + *self == Resev3::Value1 } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESEV3_A::VALUE2 + *self == Resev3::Value2 } } #[doc = "Field `RESEV3` writer - Result Event"] -pub type RESEV3_W<'a, REG> = crate::BitWriter<'a, REG, RESEV3_A>; -impl<'a, REG> RESEV3_W<'a, REG> +pub type Resev3W<'a, REG> = crate::BitWriter<'a, REG, Resev3>; +impl<'a, REG> Resev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEV3_A::VALUE1) + self.variant(Resev3::Value1) } #[doc = "A new result has been stored in register RESMx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEV3_A::VALUE2) + self.variant(Resev3::Value2) } } -#[doc = "Field `ALEV0` reader - Alarm Event"] -pub type ALEV0_R = crate::BitReader; #[doc = "Alarm Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEV0_A { +pub enum Alev0 { #[doc = "0: No alarm event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alarm event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEV0_A) -> Self { + fn from(variant: Alev0) -> Self { variant as u8 != 0 } } -impl ALEV0_R { +#[doc = "Field `ALEV0` reader - Alarm Event"] +pub type Alev0R = crate::BitReader; +impl Alev0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALEV0_A { + pub const fn variant(&self) -> Alev0 { match self.bits { - false => ALEV0_A::VALUE1, - true => ALEV0_A::VALUE2, + false => Alev0::Value1, + true => Alev0::Value2, } } #[doc = "No alarm event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALEV0_A::VALUE1 + *self == Alev0::Value1 } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALEV0_A::VALUE2 + *self == Alev0::Value2 } } #[doc = "Field `ALEV0` writer - Alarm Event"] -pub type ALEV0_W<'a, REG> = crate::BitWriter<'a, REG, ALEV0_A>; -impl<'a, REG> ALEV0_W<'a, REG> +pub type Alev0W<'a, REG> = crate::BitWriter<'a, REG, Alev0>; +impl<'a, REG> Alev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No alarm event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEV0_A::VALUE1) + self.variant(Alev0::Value1) } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEV0_A::VALUE2) + self.variant(Alev0::Value2) } } -#[doc = "Field `ALEV1` reader - Alarm Event"] -pub type ALEV1_R = crate::BitReader; #[doc = "Alarm Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEV1_A { +pub enum Alev1 { #[doc = "0: No alarm event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alarm event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEV1_A) -> Self { + fn from(variant: Alev1) -> Self { variant as u8 != 0 } } -impl ALEV1_R { +#[doc = "Field `ALEV1` reader - Alarm Event"] +pub type Alev1R = crate::BitReader; +impl Alev1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALEV1_A { + pub const fn variant(&self) -> Alev1 { match self.bits { - false => ALEV1_A::VALUE1, - true => ALEV1_A::VALUE2, + false => Alev1::Value1, + true => Alev1::Value2, } } #[doc = "No alarm event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALEV1_A::VALUE1 + *self == Alev1::Value1 } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALEV1_A::VALUE2 + *self == Alev1::Value2 } } #[doc = "Field `ALEV1` writer - Alarm Event"] -pub type ALEV1_W<'a, REG> = crate::BitWriter<'a, REG, ALEV1_A>; -impl<'a, REG> ALEV1_W<'a, REG> +pub type Alev1W<'a, REG> = crate::BitWriter<'a, REG, Alev1>; +impl<'a, REG> Alev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No alarm event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEV1_A::VALUE1) + self.variant(Alev1::Value1) } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEV1_A::VALUE2) + self.variant(Alev1::Value2) } } -#[doc = "Field `ALEV2` reader - Alarm Event"] -pub type ALEV2_R = crate::BitReader; #[doc = "Alarm Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEV2_A { +pub enum Alev2 { #[doc = "0: No alarm event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alarm event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEV2_A) -> Self { + fn from(variant: Alev2) -> Self { variant as u8 != 0 } } -impl ALEV2_R { +#[doc = "Field `ALEV2` reader - Alarm Event"] +pub type Alev2R = crate::BitReader; +impl Alev2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALEV2_A { + pub const fn variant(&self) -> Alev2 { match self.bits { - false => ALEV2_A::VALUE1, - true => ALEV2_A::VALUE2, + false => Alev2::Value1, + true => Alev2::Value2, } } #[doc = "No alarm event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALEV2_A::VALUE1 + *self == Alev2::Value1 } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALEV2_A::VALUE2 + *self == Alev2::Value2 } } #[doc = "Field `ALEV2` writer - Alarm Event"] -pub type ALEV2_W<'a, REG> = crate::BitWriter<'a, REG, ALEV2_A>; -impl<'a, REG> ALEV2_W<'a, REG> +pub type Alev2W<'a, REG> = crate::BitWriter<'a, REG, Alev2>; +impl<'a, REG> Alev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No alarm event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEV2_A::VALUE1) + self.variant(Alev2::Value1) } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEV2_A::VALUE2) + self.variant(Alev2::Value2) } } -#[doc = "Field `ALEV3` reader - Alarm Event"] -pub type ALEV3_R = crate::BitReader; #[doc = "Alarm Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEV3_A { +pub enum Alev3 { #[doc = "0: No alarm event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alarm event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEV3_A) -> Self { + fn from(variant: Alev3) -> Self { variant as u8 != 0 } } -impl ALEV3_R { +#[doc = "Field `ALEV3` reader - Alarm Event"] +pub type Alev3R = crate::BitReader; +impl Alev3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALEV3_A { + pub const fn variant(&self) -> Alev3 { match self.bits { - false => ALEV3_A::VALUE1, - true => ALEV3_A::VALUE2, + false => Alev3::Value1, + true => Alev3::Value2, } } #[doc = "No alarm event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALEV3_A::VALUE1 + *self == Alev3::Value1 } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALEV3_A::VALUE2 + *self == Alev3::Value2 } } #[doc = "Field `ALEV3` writer - Alarm Event"] -pub type ALEV3_W<'a, REG> = crate::BitWriter<'a, REG, ALEV3_A>; -impl<'a, REG> ALEV3_W<'a, REG> +pub type Alev3W<'a, REG> = crate::BitWriter<'a, REG, Alev3>; +impl<'a, REG> Alev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No alarm event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEV3_A::VALUE1) + self.variant(Alev3::Value1) } #[doc = "An alarm event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEV3_A::VALUE2) + self.variant(Alev3::Value2) } } impl R { #[doc = "Bit 0 - Result Event"] #[inline(always)] - pub fn resev0(&self) -> RESEV0_R { - RESEV0_R::new((self.bits & 1) != 0) + pub fn resev0(&self) -> Resev0R { + Resev0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Result Event"] #[inline(always)] - pub fn resev1(&self) -> RESEV1_R { - RESEV1_R::new(((self.bits >> 1) & 1) != 0) + pub fn resev1(&self) -> Resev1R { + Resev1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Result Event"] #[inline(always)] - pub fn resev2(&self) -> RESEV2_R { - RESEV2_R::new(((self.bits >> 2) & 1) != 0) + pub fn resev2(&self) -> Resev2R { + Resev2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Result Event"] #[inline(always)] - pub fn resev3(&self) -> RESEV3_R { - RESEV3_R::new(((self.bits >> 3) & 1) != 0) + pub fn resev3(&self) -> Resev3R { + Resev3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 16 - Alarm Event"] #[inline(always)] - pub fn alev0(&self) -> ALEV0_R { - ALEV0_R::new(((self.bits >> 16) & 1) != 0) + pub fn alev0(&self) -> Alev0R { + Alev0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Alarm Event"] #[inline(always)] - pub fn alev1(&self) -> ALEV1_R { - ALEV1_R::new(((self.bits >> 17) & 1) != 0) + pub fn alev1(&self) -> Alev1R { + Alev1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Alarm Event"] #[inline(always)] - pub fn alev2(&self) -> ALEV2_R { - ALEV2_R::new(((self.bits >> 18) & 1) != 0) + pub fn alev2(&self) -> Alev2R { + Alev2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Alarm Event"] #[inline(always)] - pub fn alev3(&self) -> ALEV3_R { - ALEV3_R::new(((self.bits >> 19) & 1) != 0) + pub fn alev3(&self) -> Alev3R { + Alev3R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 0 - Result Event"] #[inline(always)] #[must_use] - pub fn resev0(&mut self) -> RESEV0_W { - RESEV0_W::new(self, 0) + pub fn resev0(&mut self) -> Resev0W { + Resev0W::new(self, 0) } #[doc = "Bit 1 - Result Event"] #[inline(always)] #[must_use] - pub fn resev1(&mut self) -> RESEV1_W { - RESEV1_W::new(self, 1) + pub fn resev1(&mut self) -> Resev1W { + Resev1W::new(self, 1) } #[doc = "Bit 2 - Result Event"] #[inline(always)] #[must_use] - pub fn resev2(&mut self) -> RESEV2_W { - RESEV2_W::new(self, 2) + pub fn resev2(&mut self) -> Resev2W { + Resev2W::new(self, 2) } #[doc = "Bit 3 - Result Event"] #[inline(always)] #[must_use] - pub fn resev3(&mut self) -> RESEV3_W { - RESEV3_W::new(self, 3) + pub fn resev3(&mut self) -> Resev3W { + Resev3W::new(self, 3) } #[doc = "Bit 16 - Alarm Event"] #[inline(always)] #[must_use] - pub fn alev0(&mut self) -> ALEV0_W { - ALEV0_W::new(self, 16) + pub fn alev0(&mut self) -> Alev0W { + Alev0W::new(self, 16) } #[doc = "Bit 17 - Alarm Event"] #[inline(always)] #[must_use] - pub fn alev1(&mut self) -> ALEV1_W { - ALEV1_W::new(self, 17) + pub fn alev1(&mut self) -> Alev1W { + Alev1W::new(self, 17) } #[doc = "Bit 18 - Alarm Event"] #[inline(always)] #[must_use] - pub fn alev2(&mut self) -> ALEV2_W { - ALEV2_W::new(self, 18) + pub fn alev2(&mut self) -> Alev2W { + Alev2W::new(self, 18) } #[doc = "Bit 19 - Alarm Event"] #[inline(always)] #[must_use] - pub fn alev3(&mut self) -> ALEV3_W { - ALEV3_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn alev3(&mut self) -> Alev3W { + Alev3W::new(self, 19) } } #[doc = "Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVFLAG_SPEC; -impl crate::RegisterSpec for EVFLAG_SPEC { +pub struct EvflagSpec; +impl crate::RegisterSpec for EvflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`evflag::R`](R) reader structure"] -impl crate::Readable for EVFLAG_SPEC {} +impl crate::Readable for EvflagSpec {} #[doc = "`write(|w| ..)` method takes [`evflag::W`](W) writer structure"] -impl crate::Writable for EVFLAG_SPEC { +impl crate::Writable for EvflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EVFLAG to value 0"] -impl crate::Resettable for EVFLAG_SPEC { +impl crate::Resettable for EvflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd/evflagclr.rs b/src/dsd/evflagclr.rs index 6336c5fa..a169dadf 100644 --- a/src/dsd/evflagclr.rs +++ b/src/dsd/evflagclr.rs @@ -1,324 +1,315 @@ #[doc = "Register `EVFLAGCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Result Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEC0_AW { +pub enum Resec0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit RESEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEC0_AW) -> Self { + fn from(variant: Resec0) -> Self { variant as u8 != 0 } } #[doc = "Field `RESEC0` writer - Result Event Clear"] -pub type RESEC0_W<'a, REG> = crate::BitWriter<'a, REG, RESEC0_AW>; -impl<'a, REG> RESEC0_W<'a, REG> +pub type Resec0W<'a, REG> = crate::BitWriter<'a, REG, Resec0>; +impl<'a, REG> Resec0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEC0_AW::VALUE1) + self.variant(Resec0::Value1) } #[doc = "Clear bit RESEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEC0_AW::VALUE2) + self.variant(Resec0::Value2) } } #[doc = "Result Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEC1_AW { +pub enum Resec1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit RESEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEC1_AW) -> Self { + fn from(variant: Resec1) -> Self { variant as u8 != 0 } } #[doc = "Field `RESEC1` writer - Result Event Clear"] -pub type RESEC1_W<'a, REG> = crate::BitWriter<'a, REG, RESEC1_AW>; -impl<'a, REG> RESEC1_W<'a, REG> +pub type Resec1W<'a, REG> = crate::BitWriter<'a, REG, Resec1>; +impl<'a, REG> Resec1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEC1_AW::VALUE1) + self.variant(Resec1::Value1) } #[doc = "Clear bit RESEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEC1_AW::VALUE2) + self.variant(Resec1::Value2) } } #[doc = "Result Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEC2_AW { +pub enum Resec2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit RESEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEC2_AW) -> Self { + fn from(variant: Resec2) -> Self { variant as u8 != 0 } } #[doc = "Field `RESEC2` writer - Result Event Clear"] -pub type RESEC2_W<'a, REG> = crate::BitWriter<'a, REG, RESEC2_AW>; -impl<'a, REG> RESEC2_W<'a, REG> +pub type Resec2W<'a, REG> = crate::BitWriter<'a, REG, Resec2>; +impl<'a, REG> Resec2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEC2_AW::VALUE1) + self.variant(Resec2::Value1) } #[doc = "Clear bit RESEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEC2_AW::VALUE2) + self.variant(Resec2::Value2) } } #[doc = "Result Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESEC3_AW { +pub enum Resec3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit RESEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESEC3_AW) -> Self { + fn from(variant: Resec3) -> Self { variant as u8 != 0 } } #[doc = "Field `RESEC3` writer - Result Event Clear"] -pub type RESEC3_W<'a, REG> = crate::BitWriter<'a, REG, RESEC3_AW>; -impl<'a, REG> RESEC3_W<'a, REG> +pub type Resec3W<'a, REG> = crate::BitWriter<'a, REG, Resec3>; +impl<'a, REG> Resec3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESEC3_AW::VALUE1) + self.variant(Resec3::Value1) } #[doc = "Clear bit RESEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESEC3_AW::VALUE2) + self.variant(Resec3::Value2) } } #[doc = "Alarm Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEC0_AW { +pub enum Alec0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit ALEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEC0_AW) -> Self { + fn from(variant: Alec0) -> Self { variant as u8 != 0 } } #[doc = "Field `ALEC0` writer - Alarm Event Clear"] -pub type ALEC0_W<'a, REG> = crate::BitWriter<'a, REG, ALEC0_AW>; -impl<'a, REG> ALEC0_W<'a, REG> +pub type Alec0W<'a, REG> = crate::BitWriter<'a, REG, Alec0>; +impl<'a, REG> Alec0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEC0_AW::VALUE1) + self.variant(Alec0::Value1) } #[doc = "Clear bit ALEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEC0_AW::VALUE2) + self.variant(Alec0::Value2) } } #[doc = "Alarm Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEC1_AW { +pub enum Alec1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit ALEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEC1_AW) -> Self { + fn from(variant: Alec1) -> Self { variant as u8 != 0 } } #[doc = "Field `ALEC1` writer - Alarm Event Clear"] -pub type ALEC1_W<'a, REG> = crate::BitWriter<'a, REG, ALEC1_AW>; -impl<'a, REG> ALEC1_W<'a, REG> +pub type Alec1W<'a, REG> = crate::BitWriter<'a, REG, Alec1>; +impl<'a, REG> Alec1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEC1_AW::VALUE1) + self.variant(Alec1::Value1) } #[doc = "Clear bit ALEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEC1_AW::VALUE2) + self.variant(Alec1::Value2) } } #[doc = "Alarm Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEC2_AW { +pub enum Alec2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit ALEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEC2_AW) -> Self { + fn from(variant: Alec2) -> Self { variant as u8 != 0 } } #[doc = "Field `ALEC2` writer - Alarm Event Clear"] -pub type ALEC2_W<'a, REG> = crate::BitWriter<'a, REG, ALEC2_AW>; -impl<'a, REG> ALEC2_W<'a, REG> +pub type Alec2W<'a, REG> = crate::BitWriter<'a, REG, Alec2>; +impl<'a, REG> Alec2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEC2_AW::VALUE1) + self.variant(Alec2::Value1) } #[doc = "Clear bit ALEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEC2_AW::VALUE2) + self.variant(Alec2::Value2) } } #[doc = "Alarm Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALEC3_AW { +pub enum Alec3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit ALEVx"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALEC3_AW) -> Self { + fn from(variant: Alec3) -> Self { variant as u8 != 0 } } #[doc = "Field `ALEC3` writer - Alarm Event Clear"] -pub type ALEC3_W<'a, REG> = crate::BitWriter<'a, REG, ALEC3_AW>; -impl<'a, REG> ALEC3_W<'a, REG> +pub type Alec3W<'a, REG> = crate::BitWriter<'a, REG, Alec3>; +impl<'a, REG> Alec3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALEC3_AW::VALUE1) + self.variant(Alec3::Value1) } #[doc = "Clear bit ALEVx"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALEC3_AW::VALUE2) + self.variant(Alec3::Value2) } } impl W { #[doc = "Bit 0 - Result Event Clear"] #[inline(always)] #[must_use] - pub fn resec0(&mut self) -> RESEC0_W { - RESEC0_W::new(self, 0) + pub fn resec0(&mut self) -> Resec0W { + Resec0W::new(self, 0) } #[doc = "Bit 1 - Result Event Clear"] #[inline(always)] #[must_use] - pub fn resec1(&mut self) -> RESEC1_W { - RESEC1_W::new(self, 1) + pub fn resec1(&mut self) -> Resec1W { + Resec1W::new(self, 1) } #[doc = "Bit 2 - Result Event Clear"] #[inline(always)] #[must_use] - pub fn resec2(&mut self) -> RESEC2_W { - RESEC2_W::new(self, 2) + pub fn resec2(&mut self) -> Resec2W { + Resec2W::new(self, 2) } #[doc = "Bit 3 - Result Event Clear"] #[inline(always)] #[must_use] - pub fn resec3(&mut self) -> RESEC3_W { - RESEC3_W::new(self, 3) + pub fn resec3(&mut self) -> Resec3W { + Resec3W::new(self, 3) } #[doc = "Bit 16 - Alarm Event Clear"] #[inline(always)] #[must_use] - pub fn alec0(&mut self) -> ALEC0_W { - ALEC0_W::new(self, 16) + pub fn alec0(&mut self) -> Alec0W { + Alec0W::new(self, 16) } #[doc = "Bit 17 - Alarm Event Clear"] #[inline(always)] #[must_use] - pub fn alec1(&mut self) -> ALEC1_W { - ALEC1_W::new(self, 17) + pub fn alec1(&mut self) -> Alec1W { + Alec1W::new(self, 17) } #[doc = "Bit 18 - Alarm Event Clear"] #[inline(always)] #[must_use] - pub fn alec2(&mut self) -> ALEC2_W { - ALEC2_W::new(self, 18) + pub fn alec2(&mut self) -> Alec2W { + Alec2W::new(self, 18) } #[doc = "Bit 19 - Alarm Event Clear"] #[inline(always)] #[must_use] - pub fn alec3(&mut self) -> ALEC3_W { - ALEC3_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn alec3(&mut self) -> Alec3W { + Alec3W::new(self, 19) } } #[doc = "Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evflagclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVFLAGCLR_SPEC; -impl crate::RegisterSpec for EVFLAGCLR_SPEC { +pub struct EvflagclrSpec; +impl crate::RegisterSpec for EvflagclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`evflagclr::W`](W) writer structure"] -impl crate::Writable for EVFLAGCLR_SPEC { +impl crate::Writable for EvflagclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EVFLAGCLR to value 0"] -impl crate::Resettable for EVFLAGCLR_SPEC { +impl crate::Resettable for EvflagclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd/globcfg.rs b/src/dsd/globcfg.rs index 0f7ec190..88129973 100644 --- a/src/dsd/globcfg.rs +++ b/src/dsd/globcfg.rs @@ -1,51 +1,51 @@ #[doc = "Register `GLOBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBCFG` writer"] -pub type W = crate::W; -#[doc = "Field `MCSEL` reader - Modulator Clock Select"] -pub type MCSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Modulator Clock Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MCSEL_A { +pub enum Mcsel { #[doc = "0: Internal clock off, no source selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fDSD"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MCSEL_A) -> Self { + fn from(variant: Mcsel) -> Self { variant as _ } } -impl crate::FieldSpec for MCSEL_A { +impl crate::FieldSpec for Mcsel { type Ux = u8; } -impl MCSEL_R { +#[doc = "Field `MCSEL` reader - Modulator Clock Select"] +pub type McselR = crate::FieldReader; +impl McselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MCSEL_A::VALUE1), - 1 => Some(MCSEL_A::VALUE2), + 0 => Some(Mcsel::Value1), + 1 => Some(Mcsel::Value2), _ => None, } } #[doc = "Internal clock off, no source selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCSEL_A::VALUE1 + *self == Mcsel::Value1 } #[doc = "fDSD"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCSEL_A::VALUE2 + *self == Mcsel::Value2 } } #[doc = "Field `MCSEL` writer - Modulator Clock Select"] -pub type MCSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MCSEL_A>; -impl<'a, REG> MCSEL_W<'a, REG> +pub type McselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mcsel>; +impl<'a, REG> McselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "Internal clock off, no source selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCSEL_A::VALUE1) + self.variant(Mcsel::Value1) } #[doc = "fDSD"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCSEL_A::VALUE2) + self.variant(Mcsel::Value2) } } impl R { #[doc = "Bits 0:2 - Modulator Clock Select"] #[inline(always)] - pub fn mcsel(&self) -> MCSEL_R { - MCSEL_R::new((self.bits & 7) as u8) + pub fn mcsel(&self) -> McselR { + McselR::new((self.bits & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Modulator Clock Select"] #[inline(always)] #[must_use] - pub fn mcsel(&mut self) -> MCSEL_W { - MCSEL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mcsel(&mut self) -> McselW { + McselW::new(self, 0) } } #[doc = "Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBCFG_SPEC; -impl crate::RegisterSpec for GLOBCFG_SPEC { +pub struct GlobcfgSpec; +impl crate::RegisterSpec for GlobcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`globcfg::R`](R) reader structure"] -impl crate::Readable for GLOBCFG_SPEC {} +impl crate::Readable for GlobcfgSpec {} #[doc = "`write(|w| ..)` method takes [`globcfg::W`](W) writer structure"] -impl crate::Writable for GLOBCFG_SPEC { +impl crate::Writable for GlobcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBCFG to value 0"] -impl crate::Resettable for GLOBCFG_SPEC { +impl crate::Resettable for GlobcfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd/globrc.rs b/src/dsd/globrc.rs index a564bfba..aa916438 100644 --- a/src/dsd/globrc.rs +++ b/src/dsd/globrc.rs @@ -1,290 +1,281 @@ #[doc = "Register `GLOBRC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRC` writer"] -pub type W = crate::W; -#[doc = "Field `CH0RUN` reader - Channel 0 Run Control"] -pub type CH0RUN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel 0 Run Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0RUN_A { +pub enum Ch0run { #[doc = "0: Stop channel x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Demodulator channel x is enabled and runs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0RUN_A) -> Self { + fn from(variant: Ch0run) -> Self { variant as u8 != 0 } } -impl CH0RUN_R { +#[doc = "Field `CH0RUN` reader - Channel 0 Run Control"] +pub type Ch0runR = crate::BitReader; +impl Ch0runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0RUN_A { + pub const fn variant(&self) -> Ch0run { match self.bits { - false => CH0RUN_A::VALUE1, - true => CH0RUN_A::VALUE2, + false => Ch0run::Value1, + true => Ch0run::Value2, } } #[doc = "Stop channel x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0RUN_A::VALUE1 + *self == Ch0run::Value1 } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0RUN_A::VALUE2 + *self == Ch0run::Value2 } } #[doc = "Field `CH0RUN` writer - Channel 0 Run Control"] -pub type CH0RUN_W<'a, REG> = crate::BitWriter<'a, REG, CH0RUN_A>; -impl<'a, REG> CH0RUN_W<'a, REG> +pub type Ch0runW<'a, REG> = crate::BitWriter<'a, REG, Ch0run>; +impl<'a, REG> Ch0runW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Stop channel x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0RUN_A::VALUE1) + self.variant(Ch0run::Value1) } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0RUN_A::VALUE2) + self.variant(Ch0run::Value2) } } -#[doc = "Field `CH1RUN` reader - Channel 1 Run Control"] -pub type CH1RUN_R = crate::BitReader; #[doc = "Channel 1 Run Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1RUN_A { +pub enum Ch1run { #[doc = "0: Stop channel x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Demodulator channel x is enabled and runs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1RUN_A) -> Self { + fn from(variant: Ch1run) -> Self { variant as u8 != 0 } } -impl CH1RUN_R { +#[doc = "Field `CH1RUN` reader - Channel 1 Run Control"] +pub type Ch1runR = crate::BitReader; +impl Ch1runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1RUN_A { + pub const fn variant(&self) -> Ch1run { match self.bits { - false => CH1RUN_A::VALUE1, - true => CH1RUN_A::VALUE2, + false => Ch1run::Value1, + true => Ch1run::Value2, } } #[doc = "Stop channel x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1RUN_A::VALUE1 + *self == Ch1run::Value1 } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1RUN_A::VALUE2 + *self == Ch1run::Value2 } } #[doc = "Field `CH1RUN` writer - Channel 1 Run Control"] -pub type CH1RUN_W<'a, REG> = crate::BitWriter<'a, REG, CH1RUN_A>; -impl<'a, REG> CH1RUN_W<'a, REG> +pub type Ch1runW<'a, REG> = crate::BitWriter<'a, REG, Ch1run>; +impl<'a, REG> Ch1runW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Stop channel x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1RUN_A::VALUE1) + self.variant(Ch1run::Value1) } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1RUN_A::VALUE2) + self.variant(Ch1run::Value2) } } -#[doc = "Field `CH2RUN` reader - Channel 2 Run Control"] -pub type CH2RUN_R = crate::BitReader; #[doc = "Channel 2 Run Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2RUN_A { +pub enum Ch2run { #[doc = "0: Stop channel x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Demodulator channel x is enabled and runs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2RUN_A) -> Self { + fn from(variant: Ch2run) -> Self { variant as u8 != 0 } } -impl CH2RUN_R { +#[doc = "Field `CH2RUN` reader - Channel 2 Run Control"] +pub type Ch2runR = crate::BitReader; +impl Ch2runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2RUN_A { + pub const fn variant(&self) -> Ch2run { match self.bits { - false => CH2RUN_A::VALUE1, - true => CH2RUN_A::VALUE2, + false => Ch2run::Value1, + true => Ch2run::Value2, } } #[doc = "Stop channel x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2RUN_A::VALUE1 + *self == Ch2run::Value1 } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2RUN_A::VALUE2 + *self == Ch2run::Value2 } } #[doc = "Field `CH2RUN` writer - Channel 2 Run Control"] -pub type CH2RUN_W<'a, REG> = crate::BitWriter<'a, REG, CH2RUN_A>; -impl<'a, REG> CH2RUN_W<'a, REG> +pub type Ch2runW<'a, REG> = crate::BitWriter<'a, REG, Ch2run>; +impl<'a, REG> Ch2runW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Stop channel x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2RUN_A::VALUE1) + self.variant(Ch2run::Value1) } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2RUN_A::VALUE2) + self.variant(Ch2run::Value2) } } -#[doc = "Field `CH3RUN` reader - Channel 3 Run Control"] -pub type CH3RUN_R = crate::BitReader; #[doc = "Channel 3 Run Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3RUN_A { +pub enum Ch3run { #[doc = "0: Stop channel x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Demodulator channel x is enabled and runs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3RUN_A) -> Self { + fn from(variant: Ch3run) -> Self { variant as u8 != 0 } } -impl CH3RUN_R { +#[doc = "Field `CH3RUN` reader - Channel 3 Run Control"] +pub type Ch3runR = crate::BitReader; +impl Ch3runR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3RUN_A { + pub const fn variant(&self) -> Ch3run { match self.bits { - false => CH3RUN_A::VALUE1, - true => CH3RUN_A::VALUE2, + false => Ch3run::Value1, + true => Ch3run::Value2, } } #[doc = "Stop channel x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3RUN_A::VALUE1 + *self == Ch3run::Value1 } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3RUN_A::VALUE2 + *self == Ch3run::Value2 } } #[doc = "Field `CH3RUN` writer - Channel 3 Run Control"] -pub type CH3RUN_W<'a, REG> = crate::BitWriter<'a, REG, CH3RUN_A>; -impl<'a, REG> CH3RUN_W<'a, REG> +pub type Ch3runW<'a, REG> = crate::BitWriter<'a, REG, Ch3run>; +impl<'a, REG> Ch3runW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Stop channel x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3RUN_A::VALUE1) + self.variant(Ch3run::Value1) } #[doc = "Demodulator channel x is enabled and runs"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3RUN_A::VALUE2) + self.variant(Ch3run::Value2) } } impl R { #[doc = "Bit 0 - Channel 0 Run Control"] #[inline(always)] - pub fn ch0run(&self) -> CH0RUN_R { - CH0RUN_R::new((self.bits & 1) != 0) + pub fn ch0run(&self) -> Ch0runR { + Ch0runR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel 1 Run Control"] #[inline(always)] - pub fn ch1run(&self) -> CH1RUN_R { - CH1RUN_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1run(&self) -> Ch1runR { + Ch1runR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 2 Run Control"] #[inline(always)] - pub fn ch2run(&self) -> CH2RUN_R { - CH2RUN_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2run(&self) -> Ch2runR { + Ch2runR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 3 Run Control"] #[inline(always)] - pub fn ch3run(&self) -> CH3RUN_R { - CH3RUN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3run(&self) -> Ch3runR { + Ch3runR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel 0 Run Control"] #[inline(always)] #[must_use] - pub fn ch0run(&mut self) -> CH0RUN_W { - CH0RUN_W::new(self, 0) + pub fn ch0run(&mut self) -> Ch0runW { + Ch0runW::new(self, 0) } #[doc = "Bit 1 - Channel 1 Run Control"] #[inline(always)] #[must_use] - pub fn ch1run(&mut self) -> CH1RUN_W { - CH1RUN_W::new(self, 1) + pub fn ch1run(&mut self) -> Ch1runW { + Ch1runW::new(self, 1) } #[doc = "Bit 2 - Channel 2 Run Control"] #[inline(always)] #[must_use] - pub fn ch2run(&mut self) -> CH2RUN_W { - CH2RUN_W::new(self, 2) + pub fn ch2run(&mut self) -> Ch2runW { + Ch2runW::new(self, 2) } #[doc = "Bit 3 - Channel 3 Run Control"] #[inline(always)] #[must_use] - pub fn ch3run(&mut self) -> CH3RUN_W { - CH3RUN_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3run(&mut self) -> Ch3runW { + Ch3runW::new(self, 3) } } #[doc = "Global Run Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBRC_SPEC; -impl crate::RegisterSpec for GLOBRC_SPEC { +pub struct GlobrcSpec; +impl crate::RegisterSpec for GlobrcSpec { type Ux = u32; } #[doc = "`read()` method returns [`globrc::R`](R) reader structure"] -impl crate::Readable for GLOBRC_SPEC {} +impl crate::Readable for GlobrcSpec {} #[doc = "`write(|w| ..)` method takes [`globrc::W`](W) writer structure"] -impl crate::Writable for GLOBRC_SPEC { +impl crate::Writable for GlobrcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRC to value 0"] -impl crate::Resettable for GLOBRC_SPEC { +impl crate::Resettable for GlobrcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd/id.rs b/src/dsd/id.rs index 5e2344b1..67f27dbf 100644 --- a/src/dsd/id.rs +++ b/src/dsd/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00a4_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00a4_c000; } diff --git a/src/dsd/ocs.rs b/src/dsd/ocs.rs index 377949cb..a2877163 100644 --- a/src/dsd/ocs.rs +++ b/src/dsd/ocs.rs @@ -1,75 +1,75 @@ #[doc = "Register `OCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OCS` writer"] -pub type W = crate::W; -#[doc = "Field `SUS` reader - OCDS Suspend Control"] -pub type SUS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "OCDS Suspend Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUS_A { +pub enum Sus { #[doc = "0: Will not suspend"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Hard suspend: Clock is switched off immediately."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Soft suspend channel 0"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Soft suspend channel 1"] - VALUE4 = 3, + Value4 = 3, #[doc = "5: Soft suspend channel 3"] - VALUE5 = 5, + Value5 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUS_A) -> Self { + fn from(variant: Sus) -> Self { variant as _ } } -impl crate::FieldSpec for SUS_A { +impl crate::FieldSpec for Sus { type Ux = u8; } -impl SUS_R { +#[doc = "Field `SUS` reader - OCDS Suspend Control"] +pub type SusR = crate::FieldReader; +impl SusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SUS_A::VALUE1), - 1 => Some(SUS_A::VALUE2), - 2 => Some(SUS_A::VALUE3), - 3 => Some(SUS_A::VALUE4), - 5 => Some(SUS_A::VALUE5), + 0 => Some(Sus::Value1), + 1 => Some(Sus::Value2), + 2 => Some(Sus::Value3), + 3 => Some(Sus::Value4), + 5 => Some(Sus::Value5), _ => None, } } #[doc = "Will not suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUS_A::VALUE1 + *self == Sus::Value1 } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUS_A::VALUE2 + *self == Sus::Value2 } #[doc = "Soft suspend channel 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUS_A::VALUE3 + *self == Sus::Value3 } #[doc = "Soft suspend channel 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SUS_A::VALUE4 + *self == Sus::Value4 } #[doc = "Soft suspend channel 3"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SUS_A::VALUE5 + *self == Sus::Value5 } } #[doc = "Field `SUS` writer - OCDS Suspend Control"] -pub type SUS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SUS_A>; -impl<'a, REG> SUS_W<'a, REG> +pub type SusW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sus>; +impl<'a, REG> SusW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,116 +77,107 @@ where #[doc = "Will not suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE1) + self.variant(Sus::Value1) } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE2) + self.variant(Sus::Value2) } #[doc = "Soft suspend channel 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE3) + self.variant(Sus::Value3) } #[doc = "Soft suspend channel 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE4) + self.variant(Sus::Value4) } #[doc = "Soft suspend channel 3"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE5) + self.variant(Sus::Value5) } } #[doc = "Field `SUS_P` writer - SUS Write Protection"] -pub type SUS_P_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SUSSTA` reader - Suspend State"] -pub type SUSSTA_R = crate::BitReader; +pub type SusPW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Suspend State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SUSSTA_A { +pub enum Sussta { #[doc = "0: Module is not (yet) suspended"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Module is suspended"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SUSSTA_A) -> Self { + fn from(variant: Sussta) -> Self { variant as u8 != 0 } } -impl SUSSTA_R { +#[doc = "Field `SUSSTA` reader - Suspend State"] +pub type SusstaR = crate::BitReader; +impl SusstaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SUSSTA_A { + pub const fn variant(&self) -> Sussta { match self.bits { - false => SUSSTA_A::VALUE1, - true => SUSSTA_A::VALUE2, + false => Sussta::Value1, + true => Sussta::Value2, } } #[doc = "Module is not (yet) suspended"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSSTA_A::VALUE1 + *self == Sussta::Value1 } #[doc = "Module is suspended"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUSSTA_A::VALUE2 + *self == Sussta::Value2 } } impl R { #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] - pub fn sus(&self) -> SUS_R { - SUS_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn sus(&self) -> SusR { + SusR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 29 - Suspend State"] #[inline(always)] - pub fn sussta(&self) -> SUSSTA_R { - SUSSTA_R::new(((self.bits >> 29) & 1) != 0) + pub fn sussta(&self) -> SusstaR { + SusstaR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] #[must_use] - pub fn sus(&mut self) -> SUS_W { - SUS_W::new(self, 24) + pub fn sus(&mut self) -> SusW { + SusW::new(self, 24) } #[doc = "Bit 28 - SUS Write Protection"] #[inline(always)] #[must_use] - pub fn sus_p(&mut self) -> SUS_P_W { - SUS_P_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sus_p(&mut self) -> SusPW { + SusPW::new(self, 28) } } #[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OCS_SPEC; -impl crate::RegisterSpec for OCS_SPEC { +pub struct OcsSpec; +impl crate::RegisterSpec for OcsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ocs::R`](R) reader structure"] -impl crate::Readable for OCS_SPEC {} +impl crate::Readable for OcsSpec {} #[doc = "`write(|w| ..)` method takes [`ocs::W`](W) writer structure"] -impl crate::Writable for OCS_SPEC { +impl crate::Writable for OcsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OCS to value 0"] -impl crate::Resettable for OCS_SPEC { +impl crate::Resettable for OcsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0.rs b/src/dsd_ch0.rs index 3fedc17c..8a7e337e 100644 --- a/src/dsd_ch0.rs +++ b/src/dsd_ch0.rs @@ -1,148 +1,160 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - modcfg: MODCFG, + modcfg: Modcfg, _reserved1: [u8; 0x04], - dicfg: DICFG, + dicfg: Dicfg, _reserved2: [u8; 0x08], - fcfgc: FCFGC, - fcfga: FCFGA, + fcfgc: Fcfgc, + fcfga: Fcfga, _reserved4: [u8; 0x04], - iwctr: IWCTR, + iwctr: Iwctr, _reserved5: [u8; 0x04], - boundsel: BOUNDSEL, + boundsel: Boundsel, _reserved6: [u8; 0x04], - resm: RESM, + resm: Resm, _reserved7: [u8; 0x04], - offm: OFFM, + offm: Offm, _reserved8: [u8; 0x04], - resa: RESA, + resa: Resa, _reserved9: [u8; 0x0c], - tstmp: TSTMP, + tstmp: Tstmp, _reserved10: [u8; 0x4c], - cgsync: CGSYNC, + cgsync: Cgsync, _reserved11: [u8; 0x04], - rectcfg: RECTCFG, + rectcfg: Rectcfg, } impl RegisterBlock { #[doc = "0x00 - Modulator Configuration Register"] #[inline(always)] - pub const fn modcfg(&self) -> &MODCFG { + pub const fn modcfg(&self) -> &Modcfg { &self.modcfg } #[doc = "0x08 - Demodulator Input Configuration Register"] #[inline(always)] - pub const fn dicfg(&self) -> &DICFG { + pub const fn dicfg(&self) -> &Dicfg { &self.dicfg } #[doc = "0x14 - Filter Configuration Register, Main CIC Filter"] #[inline(always)] - pub const fn fcfgc(&self) -> &FCFGC { + pub const fn fcfgc(&self) -> &Fcfgc { &self.fcfgc } #[doc = "0x18 - Filter Configuration Register, Auxiliary Filter"] #[inline(always)] - pub const fn fcfga(&self) -> &FCFGA { + pub const fn fcfga(&self) -> &Fcfga { &self.fcfga } #[doc = "0x20 - Integration Window Control Register"] #[inline(always)] - pub const fn iwctr(&self) -> &IWCTR { + pub const fn iwctr(&self) -> &Iwctr { &self.iwctr } #[doc = "0x28 - Boundary Select Register"] #[inline(always)] - pub const fn boundsel(&self) -> &BOUNDSEL { + pub const fn boundsel(&self) -> &Boundsel { &self.boundsel } #[doc = "0x30 - Result Register, Main Filter"] #[inline(always)] - pub const fn resm(&self) -> &RESM { + pub const fn resm(&self) -> &Resm { &self.resm } #[doc = "0x38 - Offset Register, Main Filter"] #[inline(always)] - pub const fn offm(&self) -> &OFFM { + pub const fn offm(&self) -> &Offm { &self.offm } #[doc = "0x40 - Result Register, Auxiliary Filter"] #[inline(always)] - pub const fn resa(&self) -> &RESA { + pub const fn resa(&self) -> &Resa { &self.resa } #[doc = "0x50 - Time-Stamp Register"] #[inline(always)] - pub const fn tstmp(&self) -> &TSTMP { + pub const fn tstmp(&self) -> &Tstmp { &self.tstmp } #[doc = "0xa0 - Carrier Generator Synchronization Register"] #[inline(always)] - pub const fn cgsync(&self) -> &CGSYNC { + pub const fn cgsync(&self) -> &Cgsync { &self.cgsync } #[doc = "0xa8 - Rectification Configuration Register"] #[inline(always)] - pub const fn rectcfg(&self) -> &RECTCFG { + pub const fn rectcfg(&self) -> &Rectcfg { &self.rectcfg } } #[doc = "MODCFG (rw) register accessor: Modulator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modcfg`] module"] -pub type MODCFG = crate::Reg; +#[doc(alias = "MODCFG")] +pub type Modcfg = crate::Reg; #[doc = "Modulator Configuration Register"] pub mod modcfg; #[doc = "DICFG (rw) register accessor: Demodulator Input Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dicfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dicfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dicfg`] module"] -pub type DICFG = crate::Reg; +#[doc(alias = "DICFG")] +pub type Dicfg = crate::Reg; #[doc = "Demodulator Input Configuration Register"] pub mod dicfg; #[doc = "FCFGC (rw) register accessor: Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfgc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfgc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfgc`] module"] -pub type FCFGC = crate::Reg; +#[doc(alias = "FCFGC")] +pub type Fcfgc = crate::Reg; #[doc = "Filter Configuration Register, Main CIC Filter"] pub mod fcfgc; #[doc = "FCFGA (rw) register accessor: Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfga::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfga::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcfga`] module"] -pub type FCFGA = crate::Reg; +#[doc(alias = "FCFGA")] +pub type Fcfga = crate::Reg; #[doc = "Filter Configuration Register, Auxiliary Filter"] pub mod fcfga; #[doc = "IWCTR (rw) register accessor: Integration Window Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iwctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iwctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iwctr`] module"] -pub type IWCTR = crate::Reg; +#[doc(alias = "IWCTR")] +pub type Iwctr = crate::Reg; #[doc = "Integration Window Control Register"] pub mod iwctr; #[doc = "BOUNDSEL (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`boundsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`boundsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@boundsel`] module"] -pub type BOUNDSEL = crate::Reg; +#[doc(alias = "BOUNDSEL")] +pub type Boundsel = crate::Reg; #[doc = "Boundary Select Register"] pub mod boundsel; #[doc = "RESM (r) register accessor: Result Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resm`] module"] -pub type RESM = crate::Reg; +#[doc(alias = "RESM")] +pub type Resm = crate::Reg; #[doc = "Result Register, Main Filter"] pub mod resm; #[doc = "OFFM (rw) register accessor: Offset Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`offm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`offm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@offm`] module"] -pub type OFFM = crate::Reg; +#[doc(alias = "OFFM")] +pub type Offm = crate::Reg; #[doc = "Offset Register, Main Filter"] pub mod offm; #[doc = "RESA (r) register accessor: Result Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resa::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resa`] module"] -pub type RESA = crate::Reg; +#[doc(alias = "RESA")] +pub type Resa = crate::Reg; #[doc = "Result Register, Auxiliary Filter"] pub mod resa; #[doc = "TSTMP (r) register accessor: Time-Stamp Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstmp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tstmp`] module"] -pub type TSTMP = crate::Reg; +#[doc(alias = "TSTMP")] +pub type Tstmp = crate::Reg; #[doc = "Time-Stamp Register"] pub mod tstmp; #[doc = "CGSYNC (rw) register accessor: Carrier Generator Synchronization Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgsync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgsync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgsync`] module"] -pub type CGSYNC = crate::Reg; +#[doc(alias = "CGSYNC")] +pub type Cgsync = crate::Reg; #[doc = "Carrier Generator Synchronization Register"] pub mod cgsync; #[doc = "RECTCFG (rw) register accessor: Rectification Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rectcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rectcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rectcfg`] module"] -pub type RECTCFG = crate::Reg; +#[doc(alias = "RECTCFG")] +pub type Rectcfg = crate::Reg; #[doc = "Rectification Configuration Register"] pub mod rectcfg; diff --git a/src/dsd_ch0/boundsel.rs b/src/dsd_ch0/boundsel.rs index aadaea36..1dab2f54 100644 --- a/src/dsd_ch0/boundsel.rs +++ b/src/dsd_ch0/boundsel.rs @@ -1,64 +1,55 @@ #[doc = "Register `BOUNDSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BOUNDSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOUNDARYL` reader - Lower Boundary Value for Limit Checking"] -pub type BOUNDARYL_R = crate::FieldReader; +pub type BoundarylR = crate::FieldReader; #[doc = "Field `BOUNDARYL` writer - Lower Boundary Value for Limit Checking"] -pub type BOUNDARYL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type BoundarylW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `BOUNDARYU` reader - Upper Boundary Value for Limit Checking"] -pub type BOUNDARYU_R = crate::FieldReader; +pub type BoundaryuR = crate::FieldReader; #[doc = "Field `BOUNDARYU` writer - Upper Boundary Value for Limit Checking"] -pub type BOUNDARYU_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type BoundaryuW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Lower Boundary Value for Limit Checking"] #[inline(always)] - pub fn boundaryl(&self) -> BOUNDARYL_R { - BOUNDARYL_R::new((self.bits & 0xffff) as u16) + pub fn boundaryl(&self) -> BoundarylR { + BoundarylR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Upper Boundary Value for Limit Checking"] #[inline(always)] - pub fn boundaryu(&self) -> BOUNDARYU_R { - BOUNDARYU_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn boundaryu(&self) -> BoundaryuR { + BoundaryuR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Lower Boundary Value for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundaryl(&mut self) -> BOUNDARYL_W { - BOUNDARYL_W::new(self, 0) + pub fn boundaryl(&mut self) -> BoundarylW { + BoundarylW::new(self, 0) } #[doc = "Bits 16:31 - Upper Boundary Value for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundaryu(&mut self) -> BOUNDARYU_W { - BOUNDARYU_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn boundaryu(&mut self) -> BoundaryuW { + BoundaryuW::new(self, 16) } } #[doc = "Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`boundsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`boundsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BOUNDSEL_SPEC; -impl crate::RegisterSpec for BOUNDSEL_SPEC { +pub struct BoundselSpec; +impl crate::RegisterSpec for BoundselSpec { type Ux = u32; } #[doc = "`read()` method returns [`boundsel::R`](R) reader structure"] -impl crate::Readable for BOUNDSEL_SPEC {} +impl crate::Readable for BoundselSpec {} #[doc = "`write(|w| ..)` method takes [`boundsel::W`](W) writer structure"] -impl crate::Writable for BOUNDSEL_SPEC { +impl crate::Writable for BoundselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BOUNDSEL to value 0"] -impl crate::Resettable for BOUNDSEL_SPEC { +impl crate::Resettable for BoundselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/cgsync.rs b/src/dsd_ch0/cgsync.rs index 263403a2..0e659142 100644 --- a/src/dsd_ch0/cgsync.rs +++ b/src/dsd_ch0/cgsync.rs @@ -1,78 +1,69 @@ #[doc = "Register `CGSYNC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CGSYNC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SDCOUNT` reader - Sign Delay Counter"] -pub type SDCOUNT_R = crate::FieldReader; +pub type SdcountR = crate::FieldReader; #[doc = "Field `SDCAP` reader - Sign Delay Capture Value"] -pub type SDCAP_R = crate::FieldReader; +pub type SdcapR = crate::FieldReader; #[doc = "Field `SDPOS` reader - Sign Delay Value for Positive Halfwave"] -pub type SDPOS_R = crate::FieldReader; +pub type SdposR = crate::FieldReader; #[doc = "Field `SDPOS` writer - Sign Delay Value for Positive Halfwave"] -pub type SDPOS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SdposW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SDNEG` reader - Sign Delay Value for Negative Halfwave"] -pub type SDNEG_R = crate::FieldReader; +pub type SdnegR = crate::FieldReader; #[doc = "Field `SDNEG` writer - Sign Delay Value for Negative Halfwave"] -pub type SDNEG_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SdnegW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Sign Delay Counter"] #[inline(always)] - pub fn sdcount(&self) -> SDCOUNT_R { - SDCOUNT_R::new((self.bits & 0xff) as u8) + pub fn sdcount(&self) -> SdcountR { + SdcountR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Sign Delay Capture Value"] #[inline(always)] - pub fn sdcap(&self) -> SDCAP_R { - SDCAP_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn sdcap(&self) -> SdcapR { + SdcapR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Sign Delay Value for Positive Halfwave"] #[inline(always)] - pub fn sdpos(&self) -> SDPOS_R { - SDPOS_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn sdpos(&self) -> SdposR { + SdposR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Sign Delay Value for Negative Halfwave"] #[inline(always)] - pub fn sdneg(&self) -> SDNEG_R { - SDNEG_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn sdneg(&self) -> SdnegR { + SdnegR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 16:23 - Sign Delay Value for Positive Halfwave"] #[inline(always)] #[must_use] - pub fn sdpos(&mut self) -> SDPOS_W { - SDPOS_W::new(self, 16) + pub fn sdpos(&mut self) -> SdposW { + SdposW::new(self, 16) } #[doc = "Bits 24:31 - Sign Delay Value for Negative Halfwave"] #[inline(always)] #[must_use] - pub fn sdneg(&mut self) -> SDNEG_W { - SDNEG_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sdneg(&mut self) -> SdnegW { + SdnegW::new(self, 24) } } #[doc = "Carrier Generator Synchronization Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgsync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgsync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGSYNC_SPEC; -impl crate::RegisterSpec for CGSYNC_SPEC { +pub struct CgsyncSpec; +impl crate::RegisterSpec for CgsyncSpec { type Ux = u32; } #[doc = "`read()` method returns [`cgsync::R`](R) reader structure"] -impl crate::Readable for CGSYNC_SPEC {} +impl crate::Readable for CgsyncSpec {} #[doc = "`write(|w| ..)` method takes [`cgsync::W`](W) writer structure"] -impl crate::Writable for CGSYNC_SPEC { +impl crate::Writable for CgsyncSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGSYNC to value 0"] -impl crate::Resettable for CGSYNC_SPEC { +impl crate::Resettable for CgsyncSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/dicfg.rs b/src/dsd_ch0/dicfg.rs index 895c4592..8e81e4cf 100644 --- a/src/dsd_ch0/dicfg.rs +++ b/src/dsd_ch0/dicfg.rs @@ -1,75 +1,75 @@ #[doc = "Register `DICFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DICFG` writer"] -pub type W = crate::W; -#[doc = "Field `DSRC` reader - Input Data Source Select"] -pub type DSRC_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Input Data Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSRC_A { +pub enum Dsrc { #[doc = "0: Disconnected"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: External, from input A, direct"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: External, from input A, inverted"] - VALUE3 = 3, + Value3 = 3, #[doc = "4: External, from input B, direct"] - VALUE4 = 4, + Value4 = 4, #[doc = "5: External, from input B, inverted"] - VALUE5 = 5, + Value5 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSRC_A) -> Self { + fn from(variant: Dsrc) -> Self { variant as _ } } -impl crate::FieldSpec for DSRC_A { +impl crate::FieldSpec for Dsrc { type Ux = u8; } -impl DSRC_R { +#[doc = "Field `DSRC` reader - Input Data Source Select"] +pub type DsrcR = crate::FieldReader; +impl DsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DSRC_A::VALUE1), - 2 => Some(DSRC_A::VALUE2), - 3 => Some(DSRC_A::VALUE3), - 4 => Some(DSRC_A::VALUE4), - 5 => Some(DSRC_A::VALUE5), + 0 => Some(Dsrc::Value1), + 2 => Some(Dsrc::Value2), + 3 => Some(Dsrc::Value3), + 4 => Some(Dsrc::Value4), + 5 => Some(Dsrc::Value5), _ => None, } } #[doc = "Disconnected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSRC_A::VALUE1 + *self == Dsrc::Value1 } #[doc = "External, from input A, direct"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSRC_A::VALUE2 + *self == Dsrc::Value2 } #[doc = "External, from input A, inverted"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSRC_A::VALUE3 + *self == Dsrc::Value3 } #[doc = "External, from input B, direct"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSRC_A::VALUE4 + *self == Dsrc::Value4 } #[doc = "External, from input B, inverted"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSRC_A::VALUE5 + *self == Dsrc::Value5 } } #[doc = "Field `DSRC` writer - Input Data Source Select"] -pub type DSRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DSRC_A>; -impl<'a, REG> DSRC_W<'a, REG> +pub type DsrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Dsrc>; +impl<'a, REG> DsrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,120 +77,120 @@ where #[doc = "Disconnected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSRC_A::VALUE1) + self.variant(Dsrc::Value1) } #[doc = "External, from input A, direct"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSRC_A::VALUE2) + self.variant(Dsrc::Value2) } #[doc = "External, from input A, inverted"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSRC_A::VALUE3) + self.variant(Dsrc::Value3) } #[doc = "External, from input B, direct"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSRC_A::VALUE4) + self.variant(Dsrc::Value4) } #[doc = "External, from input B, inverted"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSRC_A::VALUE5) + self.variant(Dsrc::Value5) } } #[doc = "Write Control for Data Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSWC_AW { +pub enum Dswc { #[doc = "0: No write access to data parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield DSRC can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSWC_AW) -> Self { + fn from(variant: Dswc) -> Self { variant as u8 != 0 } } #[doc = "Field `DSWC` writer - Write Control for Data Selection"] -pub type DSWC_W<'a, REG> = crate::BitWriter<'a, REG, DSWC_AW>; -impl<'a, REG> DSWC_W<'a, REG> +pub type DswcW<'a, REG> = crate::BitWriter<'a, REG, Dswc>; +impl<'a, REG> DswcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to data parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSWC_AW::VALUE1) + self.variant(Dswc::Value1) } #[doc = "Bitfield DSRC can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSWC_AW::VALUE2) + self.variant(Dswc::Value2) } } -#[doc = "Field `ITRMODE` reader - Integrator Trigger Mode"] -pub type ITRMODE_R = crate::FieldReader; #[doc = "Integrator Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ITRMODE_A { +pub enum Itrmode { #[doc = "0: No integration trigger, integrator bypassed, INTEN = 0 all the time"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger event upon a falling edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger event upon a rising edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: No trigger, integrator active all the time, INTEN = 1 all the time"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ITRMODE_A) -> Self { + fn from(variant: Itrmode) -> Self { variant as _ } } -impl crate::FieldSpec for ITRMODE_A { +impl crate::FieldSpec for Itrmode { type Ux = u8; } -impl ITRMODE_R { +#[doc = "Field `ITRMODE` reader - Integrator Trigger Mode"] +pub type ItrmodeR = crate::FieldReader; +impl ItrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ITRMODE_A { + pub const fn variant(&self) -> Itrmode { match self.bits { - 0 => ITRMODE_A::VALUE1, - 1 => ITRMODE_A::VALUE2, - 2 => ITRMODE_A::VALUE3, - 3 => ITRMODE_A::VALUE4, + 0 => Itrmode::Value1, + 1 => Itrmode::Value2, + 2 => Itrmode::Value3, + 3 => Itrmode::Value4, _ => unreachable!(), } } #[doc = "No integration trigger, integrator bypassed, INTEN = 0 all the time"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ITRMODE_A::VALUE1 + *self == Itrmode::Value1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ITRMODE_A::VALUE2 + *self == Itrmode::Value2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ITRMODE_A::VALUE3 + *self == Itrmode::Value3 } #[doc = "No trigger, integrator active all the time, INTEN = 1 all the time"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ITRMODE_A::VALUE4 + *self == Itrmode::Value4 } } #[doc = "Field `ITRMODE` writer - Integrator Trigger Mode"] -pub type ITRMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ITRMODE_A>; -impl<'a, REG> ITRMODE_W<'a, REG> +pub type ItrmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Itrmode>; +impl<'a, REG> ItrmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -198,84 +198,84 @@ where #[doc = "No integration trigger, integrator bypassed, INTEN = 0 all the time"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ITRMODE_A::VALUE1) + self.variant(Itrmode::Value1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ITRMODE_A::VALUE2) + self.variant(Itrmode::Value2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ITRMODE_A::VALUE3) + self.variant(Itrmode::Value3) } #[doc = "No trigger, integrator active all the time, INTEN = 1 all the time"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ITRMODE_A::VALUE4) + self.variant(Itrmode::Value4) } } -#[doc = "Field `TSTRMODE` reader - Timestamp Trigger Mode"] -pub type TSTRMODE_R = crate::FieldReader; #[doc = "Timestamp Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSTRMODE_A { +pub enum Tstrmode { #[doc = "0: No timestamp trigger"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger event upon a falling edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger event upon a rising edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Trigger event upon each edge"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSTRMODE_A) -> Self { + fn from(variant: Tstrmode) -> Self { variant as _ } } -impl crate::FieldSpec for TSTRMODE_A { +impl crate::FieldSpec for Tstrmode { type Ux = u8; } -impl TSTRMODE_R { +#[doc = "Field `TSTRMODE` reader - Timestamp Trigger Mode"] +pub type TstrmodeR = crate::FieldReader; +impl TstrmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSTRMODE_A { + pub const fn variant(&self) -> Tstrmode { match self.bits { - 0 => TSTRMODE_A::VALUE1, - 1 => TSTRMODE_A::VALUE2, - 2 => TSTRMODE_A::VALUE3, - 3 => TSTRMODE_A::VALUE4, + 0 => Tstrmode::Value1, + 1 => Tstrmode::Value2, + 2 => Tstrmode::Value3, + 3 => Tstrmode::Value4, _ => unreachable!(), } } #[doc = "No timestamp trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSTRMODE_A::VALUE1 + *self == Tstrmode::Value1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSTRMODE_A::VALUE2 + *self == Tstrmode::Value2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TSTRMODE_A::VALUE3 + *self == Tstrmode::Value3 } #[doc = "Trigger event upon each edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TSTRMODE_A::VALUE4 + *self == Tstrmode::Value4 } } #[doc = "Field `TSTRMODE` writer - Timestamp Trigger Mode"] -pub type TSTRMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TSTRMODE_A>; -impl<'a, REG> TSTRMODE_W<'a, REG> +pub type TstrmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Tstrmode>; +impl<'a, REG> TstrmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -283,127 +283,127 @@ where #[doc = "No timestamp trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSTRMODE_A::VALUE1) + self.variant(Tstrmode::Value1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSTRMODE_A::VALUE2) + self.variant(Tstrmode::Value2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TSTRMODE_A::VALUE3) + self.variant(Tstrmode::Value3) } #[doc = "Trigger event upon each edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TSTRMODE_A::VALUE4) + self.variant(Tstrmode::Value4) } } #[doc = "Field `TRSEL` reader - Trigger Select"] -pub type TRSEL_R = crate::FieldReader; +pub type TrselR = crate::FieldReader; #[doc = "Field `TRSEL` writer - Trigger Select"] -pub type TRSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TrselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Write Control for Trigger Parameters\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRWC_AW { +pub enum Trwc { #[doc = "0: No write access to trigger parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields TRSEL, TSTRMODE, ITRMODE can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRWC_AW) -> Self { + fn from(variant: Trwc) -> Self { variant as u8 != 0 } } #[doc = "Field `TRWC` writer - Write Control for Trigger Parameters"] -pub type TRWC_W<'a, REG> = crate::BitWriter<'a, REG, TRWC_AW>; -impl<'a, REG> TRWC_W<'a, REG> +pub type TrwcW<'a, REG> = crate::BitWriter<'a, REG, Trwc>; +impl<'a, REG> TrwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRWC_AW::VALUE1) + self.variant(Trwc::Value1) } #[doc = "Bitfields TRSEL, TSTRMODE, ITRMODE can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRWC_AW::VALUE2) + self.variant(Trwc::Value2) } } -#[doc = "Field `CSRC` reader - Sample Clock Source Select"] -pub type CSRC_R = crate::FieldReader; #[doc = "Sample Clock Source Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CSRC_A { +pub enum Csrc { #[doc = "1: External, from input A"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External, from input B"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External, from input C"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: External, from input D"] - VALUE5 = 4, + Value5 = 4, #[doc = "15: Internal clock"] - VALUE6 = 15, + Value6 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CSRC_A) -> Self { + fn from(variant: Csrc) -> Self { variant as _ } } -impl crate::FieldSpec for CSRC_A { +impl crate::FieldSpec for Csrc { type Ux = u8; } -impl CSRC_R { +#[doc = "Field `CSRC` reader - Sample Clock Source Select"] +pub type CsrcR = crate::FieldReader; +impl CsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(CSRC_A::VALUE2), - 2 => Some(CSRC_A::VALUE3), - 3 => Some(CSRC_A::VALUE4), - 4 => Some(CSRC_A::VALUE5), - 15 => Some(CSRC_A::VALUE6), + 1 => Some(Csrc::Value2), + 2 => Some(Csrc::Value3), + 3 => Some(Csrc::Value4), + 4 => Some(Csrc::Value5), + 15 => Some(Csrc::Value6), _ => None, } } #[doc = "External, from input A"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CSRC_A::VALUE2 + *self == Csrc::Value2 } #[doc = "External, from input B"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CSRC_A::VALUE3 + *self == Csrc::Value3 } #[doc = "External, from input C"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CSRC_A::VALUE4 + *self == Csrc::Value4 } #[doc = "External, from input D"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == CSRC_A::VALUE5 + *self == Csrc::Value5 } #[doc = "Internal clock"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == CSRC_A::VALUE6 + *self == Csrc::Value6 } } #[doc = "Field `CSRC` writer - Sample Clock Source Select"] -pub type CSRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CSRC_A>; -impl<'a, REG> CSRC_W<'a, REG> +pub type CsrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Csrc>; +impl<'a, REG> CsrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -411,105 +411,105 @@ where #[doc = "External, from input A"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSRC_A::VALUE2) + self.variant(Csrc::Value2) } #[doc = "External, from input B"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CSRC_A::VALUE3) + self.variant(Csrc::Value3) } #[doc = "External, from input C"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CSRC_A::VALUE4) + self.variant(Csrc::Value4) } #[doc = "External, from input D"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(CSRC_A::VALUE5) + self.variant(Csrc::Value5) } #[doc = "Internal clock"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(CSRC_A::VALUE6) + self.variant(Csrc::Value6) } } -#[doc = "Field `STROBE` reader - Data Strobe Generatoion Mode"] -pub type STROBE_R = crate::FieldReader; #[doc = "Data Strobe Generatoion Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STROBE_A { +pub enum Strobe { #[doc = "0: No data strobe"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Direct clock, a sample trigger is generated at each rising clock edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Direct clock, a sample trigger is generated at each falling clock edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Double data, a sample trigger is generated at each rising and falling clock edge"] - VALUE4 = 3, + Value4 = 3, #[doc = "5: Double clock, a sample trigger is generated at every 2nd rising clock edge"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Double clock, a sample trigger is generated at every 2nd falling clock edge"] - VALUE7 = 6, + Value7 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STROBE_A) -> Self { + fn from(variant: Strobe) -> Self { variant as _ } } -impl crate::FieldSpec for STROBE_A { +impl crate::FieldSpec for Strobe { type Ux = u8; } -impl STROBE_R { +#[doc = "Field `STROBE` reader - Data Strobe Generatoion Mode"] +pub type StrobeR = crate::FieldReader; +impl StrobeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STROBE_A::VALUE1), - 1 => Some(STROBE_A::VALUE2), - 2 => Some(STROBE_A::VALUE3), - 3 => Some(STROBE_A::VALUE4), - 5 => Some(STROBE_A::VALUE6), - 6 => Some(STROBE_A::VALUE7), + 0 => Some(Strobe::Value1), + 1 => Some(Strobe::Value2), + 2 => Some(Strobe::Value3), + 3 => Some(Strobe::Value4), + 5 => Some(Strobe::Value6), + 6 => Some(Strobe::Value7), _ => None, } } #[doc = "No data strobe"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STROBE_A::VALUE1 + *self == Strobe::Value1 } #[doc = "Direct clock, a sample trigger is generated at each rising clock edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STROBE_A::VALUE2 + *self == Strobe::Value2 } #[doc = "Direct clock, a sample trigger is generated at each falling clock edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STROBE_A::VALUE3 + *self == Strobe::Value3 } #[doc = "Double data, a sample trigger is generated at each rising and falling clock edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STROBE_A::VALUE4 + *self == Strobe::Value4 } #[doc = "Double clock, a sample trigger is generated at every 2nd rising clock edge"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == STROBE_A::VALUE6 + *self == Strobe::Value6 } #[doc = "Double clock, a sample trigger is generated at every 2nd falling clock edge"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == STROBE_A::VALUE7 + *self == Strobe::Value7 } } #[doc = "Field `STROBE` writer - Data Strobe Generatoion Mode"] -pub type STROBE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, STROBE_A>; -impl<'a, REG> STROBE_W<'a, REG> +pub type StrobeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Strobe>; +impl<'a, REG> StrobeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -517,176 +517,167 @@ where #[doc = "No data strobe"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE1) + self.variant(Strobe::Value1) } #[doc = "Direct clock, a sample trigger is generated at each rising clock edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE2) + self.variant(Strobe::Value2) } #[doc = "Direct clock, a sample trigger is generated at each falling clock edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE3) + self.variant(Strobe::Value3) } #[doc = "Double data, a sample trigger is generated at each rising and falling clock edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE4) + self.variant(Strobe::Value4) } #[doc = "Double clock, a sample trigger is generated at every 2nd rising clock edge"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE6) + self.variant(Strobe::Value6) } #[doc = "Double clock, a sample trigger is generated at every 2nd falling clock edge"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(STROBE_A::VALUE7) + self.variant(Strobe::Value7) } } #[doc = "Write Control for Strobe/Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCWC_AW { +pub enum Scwc { #[doc = "0: No write access to strobe/clock parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields STROBE, CSRC can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCWC_AW) -> Self { + fn from(variant: Scwc) -> Self { variant as u8 != 0 } } #[doc = "Field `SCWC` writer - Write Control for Strobe/Clock Selection"] -pub type SCWC_W<'a, REG> = crate::BitWriter<'a, REG, SCWC_AW>; -impl<'a, REG> SCWC_W<'a, REG> +pub type ScwcW<'a, REG> = crate::BitWriter<'a, REG, Scwc>; +impl<'a, REG> ScwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to strobe/clock parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCWC_AW::VALUE1) + self.variant(Scwc::Value1) } #[doc = "Bitfields STROBE, CSRC can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCWC_AW::VALUE2) + self.variant(Scwc::Value2) } } impl R { #[doc = "Bits 0:3 - Input Data Source Select"] #[inline(always)] - pub fn dsrc(&self) -> DSRC_R { - DSRC_R::new((self.bits & 0x0f) as u8) + pub fn dsrc(&self) -> DsrcR { + DsrcR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Integrator Trigger Mode"] #[inline(always)] - pub fn itrmode(&self) -> ITRMODE_R { - ITRMODE_R::new(((self.bits >> 8) & 3) as u8) + pub fn itrmode(&self) -> ItrmodeR { + ItrmodeR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Timestamp Trigger Mode"] #[inline(always)] - pub fn tstrmode(&self) -> TSTRMODE_R { - TSTRMODE_R::new(((self.bits >> 10) & 3) as u8) + pub fn tstrmode(&self) -> TstrmodeR { + TstrmodeR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:14 - Trigger Select"] #[inline(always)] - pub fn trsel(&self) -> TRSEL_R { - TRSEL_R::new(((self.bits >> 12) & 7) as u8) + pub fn trsel(&self) -> TrselR { + TrselR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:19 - Sample Clock Source Select"] #[inline(always)] - pub fn csrc(&self) -> CSRC_R { - CSRC_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn csrc(&self) -> CsrcR { + CsrcR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Data Strobe Generatoion Mode"] #[inline(always)] - pub fn strobe(&self) -> STROBE_R { - STROBE_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn strobe(&self) -> StrobeR { + StrobeR::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Input Data Source Select"] #[inline(always)] #[must_use] - pub fn dsrc(&mut self) -> DSRC_W { - DSRC_W::new(self, 0) + pub fn dsrc(&mut self) -> DsrcW { + DsrcW::new(self, 0) } #[doc = "Bit 7 - Write Control for Data Selection"] #[inline(always)] #[must_use] - pub fn dswc(&mut self) -> DSWC_W { - DSWC_W::new(self, 7) + pub fn dswc(&mut self) -> DswcW { + DswcW::new(self, 7) } #[doc = "Bits 8:9 - Integrator Trigger Mode"] #[inline(always)] #[must_use] - pub fn itrmode(&mut self) -> ITRMODE_W { - ITRMODE_W::new(self, 8) + pub fn itrmode(&mut self) -> ItrmodeW { + ItrmodeW::new(self, 8) } #[doc = "Bits 10:11 - Timestamp Trigger Mode"] #[inline(always)] #[must_use] - pub fn tstrmode(&mut self) -> TSTRMODE_W { - TSTRMODE_W::new(self, 10) + pub fn tstrmode(&mut self) -> TstrmodeW { + TstrmodeW::new(self, 10) } #[doc = "Bits 12:14 - Trigger Select"] #[inline(always)] #[must_use] - pub fn trsel(&mut self) -> TRSEL_W { - TRSEL_W::new(self, 12) + pub fn trsel(&mut self) -> TrselW { + TrselW::new(self, 12) } #[doc = "Bit 15 - Write Control for Trigger Parameters"] #[inline(always)] #[must_use] - pub fn trwc(&mut self) -> TRWC_W { - TRWC_W::new(self, 15) + pub fn trwc(&mut self) -> TrwcW { + TrwcW::new(self, 15) } #[doc = "Bits 16:19 - Sample Clock Source Select"] #[inline(always)] #[must_use] - pub fn csrc(&mut self) -> CSRC_W { - CSRC_W::new(self, 16) + pub fn csrc(&mut self) -> CsrcW { + CsrcW::new(self, 16) } #[doc = "Bits 20:23 - Data Strobe Generatoion Mode"] #[inline(always)] #[must_use] - pub fn strobe(&mut self) -> STROBE_W { - STROBE_W::new(self, 20) + pub fn strobe(&mut self) -> StrobeW { + StrobeW::new(self, 20) } #[doc = "Bit 31 - Write Control for Strobe/Clock Selection"] #[inline(always)] #[must_use] - pub fn scwc(&mut self) -> SCWC_W { - SCWC_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn scwc(&mut self) -> ScwcW { + ScwcW::new(self, 31) } } #[doc = "Demodulator Input Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dicfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dicfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DICFG_SPEC; -impl crate::RegisterSpec for DICFG_SPEC { +pub struct DicfgSpec; +impl crate::RegisterSpec for DicfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`dicfg::R`](R) reader structure"] -impl crate::Readable for DICFG_SPEC {} +impl crate::Readable for DicfgSpec {} #[doc = "`write(|w| ..)` method takes [`dicfg::W`](W) writer structure"] -impl crate::Writable for DICFG_SPEC { +impl crate::Writable for DicfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DICFG to value 0"] -impl crate::Resettable for DICFG_SPEC { +impl crate::Resettable for DicfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/fcfga.rs b/src/dsd_ch0/fcfga.rs index c7c78c71..740c595b 100644 --- a/src/dsd_ch0/fcfga.rs +++ b/src/dsd_ch0/fcfga.rs @@ -1,71 +1,71 @@ #[doc = "Register `FCFGA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FCFGA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CFADF` reader - CIC Filter (Auxiliary) Decimation Factor"] -pub type CFADF_R = crate::FieldReader; +pub type CfadfR = crate::FieldReader; #[doc = "Field `CFADF` writer - CIC Filter (Auxiliary) Decimation Factor"] -pub type CFADF_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `CFAC` reader - CIC Filter (Auxiliary) Configuration"] -pub type CFAC_R = crate::FieldReader; +pub type CfadfW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "CIC Filter (Auxiliary) Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CFAC_A { +pub enum Cfac { #[doc = "0: CIC1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CIC2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CIC3"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CICF"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CFAC_A) -> Self { + fn from(variant: Cfac) -> Self { variant as _ } } -impl crate::FieldSpec for CFAC_A { +impl crate::FieldSpec for Cfac { type Ux = u8; } -impl CFAC_R { +#[doc = "Field `CFAC` reader - CIC Filter (Auxiliary) Configuration"] +pub type CfacR = crate::FieldReader; +impl CfacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFAC_A { + pub const fn variant(&self) -> Cfac { match self.bits { - 0 => CFAC_A::VALUE1, - 1 => CFAC_A::VALUE2, - 2 => CFAC_A::VALUE3, - 3 => CFAC_A::VALUE4, + 0 => Cfac::Value1, + 1 => Cfac::Value2, + 2 => Cfac::Value3, + 3 => Cfac::Value4, _ => unreachable!(), } } #[doc = "CIC1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFAC_A::VALUE1 + *self == Cfac::Value1 } #[doc = "CIC2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFAC_A::VALUE2 + *self == Cfac::Value2 } #[doc = "CIC3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CFAC_A::VALUE3 + *self == Cfac::Value3 } #[doc = "CICF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CFAC_A::VALUE4 + *self == Cfac::Value4 } } #[doc = "Field `CFAC` writer - CIC Filter (Auxiliary) Configuration"] -pub type CFAC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CFAC_A>; -impl<'a, REG> CFAC_W<'a, REG> +pub type CfacW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cfac>; +impl<'a, REG> CfacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,76 +73,76 @@ where #[doc = "CIC1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFAC_A::VALUE1) + self.variant(Cfac::Value1) } #[doc = "CIC2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFAC_A::VALUE2) + self.variant(Cfac::Value2) } #[doc = "CIC3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CFAC_A::VALUE3) + self.variant(Cfac::Value3) } #[doc = "CICF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CFAC_A::VALUE4) + self.variant(Cfac::Value4) } } -#[doc = "Field `SRGA` reader - Service Request Generation Auxiliary Filter"] -pub type SRGA_R = crate::FieldReader; #[doc = "Service Request Generation Auxiliary Filter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRGA_A { +pub enum Srga { #[doc = "0: Never, service requests disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auxiliary filter: As selected by bitfields ESEL and EGT (if integrator enabled)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 3)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRGA_A) -> Self { + fn from(variant: Srga) -> Self { variant as _ } } -impl crate::FieldSpec for SRGA_A { +impl crate::FieldSpec for Srga { type Ux = u8; } -impl SRGA_R { +#[doc = "Field `SRGA` reader - Service Request Generation Auxiliary Filter"] +pub type SrgaR = crate::FieldReader; +impl SrgaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRGA_A::VALUE1), - 1 => Some(SRGA_A::VALUE2), - 2 => Some(SRGA_A::VALUE3), + 0 => Some(Srga::Value1), + 1 => Some(Srga::Value2), + 2 => Some(Srga::Value3), _ => None, } } #[doc = "Never, service requests disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRGA_A::VALUE1 + *self == Srga::Value1 } #[doc = "Auxiliary filter: As selected by bitfields ESEL and EGT (if integrator enabled)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRGA_A::VALUE2 + *self == Srga::Value2 } #[doc = "Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 3)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SRGA_A::VALUE3 + *self == Srga::Value3 } } #[doc = "Field `SRGA` writer - Service Request Generation Auxiliary Filter"] -pub type SRGA_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SRGA_A>; -impl<'a, REG> SRGA_W<'a, REG> +pub type SrgaW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srga>; +impl<'a, REG> SrgaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -150,71 +150,71 @@ where #[doc = "Never, service requests disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRGA_A::VALUE1) + self.variant(Srga::Value1) } #[doc = "Auxiliary filter: As selected by bitfields ESEL and EGT (if integrator enabled)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRGA_A::VALUE2) + self.variant(Srga::Value2) } #[doc = "Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 3)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SRGA_A::VALUE3) + self.variant(Srga::Value3) } } -#[doc = "Field `ESEL` reader - Event Select"] -pub type ESEL_R = crate::FieldReader; #[doc = "Event Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ESEL_A { +pub enum Esel { #[doc = "0: Always, for each new result value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: If result is inside the boundary band"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: If result is outside the boundary band"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ESEL_A) -> Self { + fn from(variant: Esel) -> Self { variant as _ } } -impl crate::FieldSpec for ESEL_A { +impl crate::FieldSpec for Esel { type Ux = u8; } -impl ESEL_R { +#[doc = "Field `ESEL` reader - Event Select"] +pub type EselR = crate::FieldReader; +impl EselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ESEL_A::VALUE1), - 1 => Some(ESEL_A::VALUE2), - 2 => Some(ESEL_A::VALUE3), + 0 => Some(Esel::Value1), + 1 => Some(Esel::Value2), + 2 => Some(Esel::Value3), _ => None, } } #[doc = "Always, for each new result value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ESEL_A::VALUE1 + *self == Esel::Value1 } #[doc = "If result is inside the boundary band"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ESEL_A::VALUE2 + *self == Esel::Value2 } #[doc = "If result is outside the boundary band"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ESEL_A::VALUE3 + *self == Esel::Value3 } } #[doc = "Field `ESEL` writer - Event Select"] -pub type ESEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ESEL_A>; -impl<'a, REG> ESEL_W<'a, REG> +pub type EselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Esel>; +impl<'a, REG> EselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -222,161 +222,152 @@ where #[doc = "Always, for each new result value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ESEL_A::VALUE1) + self.variant(Esel::Value1) } #[doc = "If result is inside the boundary band"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ESEL_A::VALUE2) + self.variant(Esel::Value2) } #[doc = "If result is outside the boundary band"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ESEL_A::VALUE3) + self.variant(Esel::Value3) } } -#[doc = "Field `EGT` reader - Event Gating"] -pub type EGT_R = crate::BitReader; #[doc = "Event Gating\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EGT_A { +pub enum Egt { #[doc = "0: Separate: generate events according to ESEL"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDISWhile the integrator is bypassed, event gating is disabled, i.e. service requests are generated according to bitfield ESEL. The event gating suppresses service requests, result values are still stored in register RESAx."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EGT_A) -> Self { + fn from(variant: Egt) -> Self { variant as u8 != 0 } } -impl EGT_R { +#[doc = "Field `EGT` reader - Event Gating"] +pub type EgtR = crate::BitReader; +impl EgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EGT_A { + pub const fn variant(&self) -> Egt { match self.bits { - false => EGT_A::VALUE1, - true => EGT_A::VALUE2, + false => Egt::Value1, + true => Egt::Value2, } } #[doc = "Separate: generate events according to ESEL"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EGT_A::VALUE1 + *self == Egt::Value1 } #[doc = "Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDISWhile the integrator is bypassed, event gating is disabled, i.e. service requests are generated according to bitfield ESEL. The event gating suppresses service requests, result values are still stored in register RESAx."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EGT_A::VALUE2 + *self == Egt::Value2 } } #[doc = "Field `EGT` writer - Event Gating"] -pub type EGT_W<'a, REG> = crate::BitWriter<'a, REG, EGT_A>; -impl<'a, REG> EGT_W<'a, REG> +pub type EgtW<'a, REG> = crate::BitWriter<'a, REG, Egt>; +impl<'a, REG> EgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Separate: generate events according to ESEL"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EGT_A::VALUE1) + self.variant(Egt::Value1) } #[doc = "Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDISWhile the integrator is bypassed, event gating is disabled, i.e. service requests are generated according to bitfield ESEL. The event gating suppresses service requests, result values are still stored in register RESAx."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EGT_A::VALUE2) + self.variant(Egt::Value2) } } #[doc = "Field `CFADCNT` reader - CIC Filter (Auxiliary) Decimation Counter"] -pub type CFADCNT_R = crate::FieldReader; +pub type CfadcntR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - CIC Filter (Auxiliary) Decimation Factor"] #[inline(always)] - pub fn cfadf(&self) -> CFADF_R { - CFADF_R::new((self.bits & 0xff) as u8) + pub fn cfadf(&self) -> CfadfR { + CfadfR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:9 - CIC Filter (Auxiliary) Configuration"] #[inline(always)] - pub fn cfac(&self) -> CFAC_R { - CFAC_R::new(((self.bits >> 8) & 3) as u8) + pub fn cfac(&self) -> CfacR { + CfacR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Service Request Generation Auxiliary Filter"] #[inline(always)] - pub fn srga(&self) -> SRGA_R { - SRGA_R::new(((self.bits >> 10) & 3) as u8) + pub fn srga(&self) -> SrgaR { + SrgaR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event Select"] #[inline(always)] - pub fn esel(&self) -> ESEL_R { - ESEL_R::new(((self.bits >> 12) & 3) as u8) + pub fn esel(&self) -> EselR { + EselR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 14 - Event Gating"] #[inline(always)] - pub fn egt(&self) -> EGT_R { - EGT_R::new(((self.bits >> 14) & 1) != 0) + pub fn egt(&self) -> EgtR { + EgtR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 24:31 - CIC Filter (Auxiliary) Decimation Counter"] #[inline(always)] - pub fn cfadcnt(&self) -> CFADCNT_R { - CFADCNT_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cfadcnt(&self) -> CfadcntR { + CfadcntR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - CIC Filter (Auxiliary) Decimation Factor"] #[inline(always)] #[must_use] - pub fn cfadf(&mut self) -> CFADF_W { - CFADF_W::new(self, 0) + pub fn cfadf(&mut self) -> CfadfW { + CfadfW::new(self, 0) } #[doc = "Bits 8:9 - CIC Filter (Auxiliary) Configuration"] #[inline(always)] #[must_use] - pub fn cfac(&mut self) -> CFAC_W { - CFAC_W::new(self, 8) + pub fn cfac(&mut self) -> CfacW { + CfacW::new(self, 8) } #[doc = "Bits 10:11 - Service Request Generation Auxiliary Filter"] #[inline(always)] #[must_use] - pub fn srga(&mut self) -> SRGA_W { - SRGA_W::new(self, 10) + pub fn srga(&mut self) -> SrgaW { + SrgaW::new(self, 10) } #[doc = "Bits 12:13 - Event Select"] #[inline(always)] #[must_use] - pub fn esel(&mut self) -> ESEL_W { - ESEL_W::new(self, 12) + pub fn esel(&mut self) -> EselW { + EselW::new(self, 12) } #[doc = "Bit 14 - Event Gating"] #[inline(always)] #[must_use] - pub fn egt(&mut self) -> EGT_W { - EGT_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn egt(&mut self) -> EgtW { + EgtW::new(self, 14) } } #[doc = "Filter Configuration Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfga::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfga::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FCFGA_SPEC; -impl crate::RegisterSpec for FCFGA_SPEC { +pub struct FcfgaSpec; +impl crate::RegisterSpec for FcfgaSpec { type Ux = u32; } #[doc = "`read()` method returns [`fcfga::R`](R) reader structure"] -impl crate::Readable for FCFGA_SPEC {} +impl crate::Readable for FcfgaSpec {} #[doc = "`write(|w| ..)` method takes [`fcfga::W`](W) writer structure"] -impl crate::Writable for FCFGA_SPEC { +impl crate::Writable for FcfgaSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FCFGA to value 0"] -impl crate::Resettable for FCFGA_SPEC { +impl crate::Resettable for FcfgaSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/fcfgc.rs b/src/dsd_ch0/fcfgc.rs index a1f119bd..456b7196 100644 --- a/src/dsd_ch0/fcfgc.rs +++ b/src/dsd_ch0/fcfgc.rs @@ -1,71 +1,71 @@ #[doc = "Register `FCFGC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FCFGC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CFMDF` reader - CIC Filter (Main Chain) Decimation Factor"] -pub type CFMDF_R = crate::FieldReader; +pub type CfmdfR = crate::FieldReader; #[doc = "Field `CFMDF` writer - CIC Filter (Main Chain) Decimation Factor"] -pub type CFMDF_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `CFMC` reader - CIC Filter (Main Chain) Configuration"] -pub type CFMC_R = crate::FieldReader; +pub type CfmdfW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "CIC Filter (Main Chain) Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CFMC_A { +pub enum Cfmc { #[doc = "0: CIC1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CIC2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: CIC3"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CICF"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CFMC_A) -> Self { + fn from(variant: Cfmc) -> Self { variant as _ } } -impl crate::FieldSpec for CFMC_A { +impl crate::FieldSpec for Cfmc { type Ux = u8; } -impl CFMC_R { +#[doc = "Field `CFMC` reader - CIC Filter (Main Chain) Configuration"] +pub type CfmcR = crate::FieldReader; +impl CfmcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFMC_A { + pub const fn variant(&self) -> Cfmc { match self.bits { - 0 => CFMC_A::VALUE1, - 1 => CFMC_A::VALUE2, - 2 => CFMC_A::VALUE3, - 3 => CFMC_A::VALUE4, + 0 => Cfmc::Value1, + 1 => Cfmc::Value2, + 2 => Cfmc::Value3, + 3 => Cfmc::Value4, _ => unreachable!(), } } #[doc = "CIC1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFMC_A::VALUE1 + *self == Cfmc::Value1 } #[doc = "CIC2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFMC_A::VALUE2 + *self == Cfmc::Value2 } #[doc = "CIC3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CFMC_A::VALUE3 + *self == Cfmc::Value3 } #[doc = "CICF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CFMC_A::VALUE4 + *self == Cfmc::Value4 } } #[doc = "Field `CFMC` writer - CIC Filter (Main Chain) Configuration"] -pub type CFMC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CFMC_A>; -impl<'a, REG> CFMC_W<'a, REG> +pub type CfmcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cfmc>; +impl<'a, REG> CfmcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,121 +73,121 @@ where #[doc = "CIC1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFMC_A::VALUE1) + self.variant(Cfmc::Value1) } #[doc = "CIC2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFMC_A::VALUE2) + self.variant(Cfmc::Value2) } #[doc = "CIC3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CFMC_A::VALUE3) + self.variant(Cfmc::Value3) } #[doc = "CICF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CFMC_A::VALUE4) + self.variant(Cfmc::Value4) } } -#[doc = "Field `CFEN` reader - CIC Filter Enable"] -pub type CFEN_R = crate::BitReader; #[doc = "CIC Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CFEN_A { +pub enum Cfen { #[doc = "0: CIC filter disabled and bypassed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable CIC filter"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CFEN_A) -> Self { + fn from(variant: Cfen) -> Self { variant as u8 != 0 } } -impl CFEN_R { +#[doc = "Field `CFEN` reader - CIC Filter Enable"] +pub type CfenR = crate::BitReader; +impl CfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CFEN_A { + pub const fn variant(&self) -> Cfen { match self.bits { - false => CFEN_A::VALUE1, - true => CFEN_A::VALUE2, + false => Cfen::Value1, + true => Cfen::Value2, } } #[doc = "CIC filter disabled and bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CFEN_A::VALUE1 + *self == Cfen::Value1 } #[doc = "Enable CIC filter"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CFEN_A::VALUE2 + *self == Cfen::Value2 } } #[doc = "Field `CFEN` writer - CIC Filter Enable"] -pub type CFEN_W<'a, REG> = crate::BitWriter<'a, REG, CFEN_A>; -impl<'a, REG> CFEN_W<'a, REG> +pub type CfenW<'a, REG> = crate::BitWriter<'a, REG, Cfen>; +impl<'a, REG> CfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CIC filter disabled and bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CFEN_A::VALUE1) + self.variant(Cfen::Value1) } #[doc = "Enable CIC filter"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CFEN_A::VALUE2) + self.variant(Cfen::Value2) } } -#[doc = "Field `SRGM` reader - Service Request Generation Main Chain"] -pub type SRGM_R = crate::FieldReader; #[doc = "Service Request Generation Main Chain\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRGM_A { +pub enum Srgm { #[doc = "0: Never, service requests disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Always, for each new result value"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRGM_A) -> Self { + fn from(variant: Srgm) -> Self { variant as _ } } -impl crate::FieldSpec for SRGM_A { +impl crate::FieldSpec for Srgm { type Ux = u8; } -impl SRGM_R { +#[doc = "Field `SRGM` reader - Service Request Generation Main Chain"] +pub type SrgmR = crate::FieldReader; +impl SrgmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRGM_A::VALUE1), - 3 => Some(SRGM_A::VALUE4), + 0 => Some(Srgm::Value1), + 3 => Some(Srgm::Value4), _ => None, } } #[doc = "Never, service requests disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRGM_A::VALUE1 + *self == Srgm::Value1 } #[doc = "Always, for each new result value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SRGM_A::VALUE4 + *self == Srgm::Value4 } } #[doc = "Field `SRGM` writer - Service Request Generation Main Chain"] -pub type SRGM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SRGM_A>; -impl<'a, REG> SRGM_W<'a, REG> +pub type SrgmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Srgm>; +impl<'a, REG> SrgmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -195,107 +195,98 @@ where #[doc = "Never, service requests disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRGM_A::VALUE1) + self.variant(Srgm::Value1) } #[doc = "Always, for each new result value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SRGM_A::VALUE4) + self.variant(Srgm::Value4) } } #[doc = "Field `CFMSV` reader - CIC Filter (Main Chain) Start Value"] -pub type CFMSV_R = crate::FieldReader; +pub type CfmsvR = crate::FieldReader; #[doc = "Field `CFMSV` writer - CIC Filter (Main Chain) Start Value"] -pub type CFMSV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CfmsvW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CFMDCNT` reader - CIC Filter (Main Chain) Decimation Counter"] -pub type CFMDCNT_R = crate::FieldReader; +pub type CfmdcntR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - CIC Filter (Main Chain) Decimation Factor"] #[inline(always)] - pub fn cfmdf(&self) -> CFMDF_R { - CFMDF_R::new((self.bits & 0xff) as u8) + pub fn cfmdf(&self) -> CfmdfR { + CfmdfR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:9 - CIC Filter (Main Chain) Configuration"] #[inline(always)] - pub fn cfmc(&self) -> CFMC_R { - CFMC_R::new(((self.bits >> 8) & 3) as u8) + pub fn cfmc(&self) -> CfmcR { + CfmcR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - CIC Filter Enable"] #[inline(always)] - pub fn cfen(&self) -> CFEN_R { - CFEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn cfen(&self) -> CfenR { + CfenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bits 14:15 - Service Request Generation Main Chain"] #[inline(always)] - pub fn srgm(&self) -> SRGM_R { - SRGM_R::new(((self.bits >> 14) & 3) as u8) + pub fn srgm(&self) -> SrgmR { + SrgmR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:23 - CIC Filter (Main Chain) Start Value"] #[inline(always)] - pub fn cfmsv(&self) -> CFMSV_R { - CFMSV_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cfmsv(&self) -> CfmsvR { + CfmsvR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - CIC Filter (Main Chain) Decimation Counter"] #[inline(always)] - pub fn cfmdcnt(&self) -> CFMDCNT_R { - CFMDCNT_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cfmdcnt(&self) -> CfmdcntR { + CfmdcntR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - CIC Filter (Main Chain) Decimation Factor"] #[inline(always)] #[must_use] - pub fn cfmdf(&mut self) -> CFMDF_W { - CFMDF_W::new(self, 0) + pub fn cfmdf(&mut self) -> CfmdfW { + CfmdfW::new(self, 0) } #[doc = "Bits 8:9 - CIC Filter (Main Chain) Configuration"] #[inline(always)] #[must_use] - pub fn cfmc(&mut self) -> CFMC_W { - CFMC_W::new(self, 8) + pub fn cfmc(&mut self) -> CfmcW { + CfmcW::new(self, 8) } #[doc = "Bit 10 - CIC Filter Enable"] #[inline(always)] #[must_use] - pub fn cfen(&mut self) -> CFEN_W { - CFEN_W::new(self, 10) + pub fn cfen(&mut self) -> CfenW { + CfenW::new(self, 10) } #[doc = "Bits 14:15 - Service Request Generation Main Chain"] #[inline(always)] #[must_use] - pub fn srgm(&mut self) -> SRGM_W { - SRGM_W::new(self, 14) + pub fn srgm(&mut self) -> SrgmW { + SrgmW::new(self, 14) } #[doc = "Bits 16:23 - CIC Filter (Main Chain) Start Value"] #[inline(always)] #[must_use] - pub fn cfmsv(&mut self) -> CFMSV_W { - CFMSV_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cfmsv(&mut self) -> CfmsvW { + CfmsvW::new(self, 16) } } #[doc = "Filter Configuration Register, Main CIC Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcfgc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcfgc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FCFGC_SPEC; -impl crate::RegisterSpec for FCFGC_SPEC { +pub struct FcfgcSpec; +impl crate::RegisterSpec for FcfgcSpec { type Ux = u32; } #[doc = "`read()` method returns [`fcfgc::R`](R) reader structure"] -impl crate::Readable for FCFGC_SPEC {} +impl crate::Readable for FcfgcSpec {} #[doc = "`write(|w| ..)` method takes [`fcfgc::W`](W) writer structure"] -impl crate::Writable for FCFGC_SPEC { +impl crate::Writable for FcfgcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FCFGC to value 0"] -impl crate::Resettable for FCFGC_SPEC { +impl crate::Resettable for FcfgcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/iwctr.rs b/src/dsd_ch0/iwctr.rs index fb7875b2..bd18292d 100644 --- a/src/dsd_ch0/iwctr.rs +++ b/src/dsd_ch0/iwctr.rs @@ -1,198 +1,189 @@ #[doc = "Register `IWCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IWCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `NVALCNT` reader - Number of Values Counted"] -pub type NVALCNT_R = crate::FieldReader; -#[doc = "Field `INTEN` reader - Integration Enable"] -pub type INTEN_R = crate::BitReader; +pub type NvalcntR = crate::FieldReader; #[doc = "Integration Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INTEN_A { +pub enum Inten { #[doc = "0: Integration stopped. INTEN is cleared at the end of the integration window, i.e. upon the inverse trigger event transition of the external trigger signal."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Integration enabled. INTEN is set upon the defined trigger event."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INTEN_A) -> Self { + fn from(variant: Inten) -> Self { variant as u8 != 0 } } -impl INTEN_R { +#[doc = "Field `INTEN` reader - Integration Enable"] +pub type IntenR = crate::BitReader; +impl IntenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INTEN_A { + pub const fn variant(&self) -> Inten { match self.bits { - false => INTEN_A::VALUE1, - true => INTEN_A::VALUE2, + false => Inten::Value1, + true => Inten::Value2, } } #[doc = "Integration stopped. INTEN is cleared at the end of the integration window, i.e. upon the inverse trigger event transition of the external trigger signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INTEN_A::VALUE1 + *self == Inten::Value1 } #[doc = "Integration enabled. INTEN is set upon the defined trigger event."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INTEN_A::VALUE2 + *self == Inten::Value2 } } #[doc = "Field `REPCNT` reader - Integration Cycle Counter"] -pub type REPCNT_R = crate::FieldReader; +pub type RepcntR = crate::FieldReader; #[doc = "Field `REPVAL` reader - Number of Integration Cycles"] -pub type REPVAL_R = crate::FieldReader; +pub type RepvalR = crate::FieldReader; #[doc = "Field `REPVAL` writer - Number of Integration Cycles"] -pub type REPVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RepvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `NVALDIS` reader - Number of Values Discarded"] -pub type NVALDIS_R = crate::FieldReader; +pub type NvaldisR = crate::FieldReader; #[doc = "Field `NVALDIS` writer - Number of Values Discarded"] -pub type NVALDIS_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `IWS` reader - Integration Window SIze"] -pub type IWS_R = crate::BitReader; +pub type NvaldisW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Integration Window SIze\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IWS_A { +pub enum Iws { #[doc = "0: Internal control: stop integrator after REPVAL+1 integration cycles"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External control: stop integrator when bit INTEN becomes 0"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IWS_A) -> Self { + fn from(variant: Iws) -> Self { variant as u8 != 0 } } -impl IWS_R { +#[doc = "Field `IWS` reader - Integration Window SIze"] +pub type IwsR = crate::BitReader; +impl IwsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IWS_A { + pub const fn variant(&self) -> Iws { match self.bits { - false => IWS_A::VALUE1, - true => IWS_A::VALUE2, + false => Iws::Value1, + true => Iws::Value2, } } #[doc = "Internal control: stop integrator after REPVAL+1 integration cycles"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IWS_A::VALUE1 + *self == Iws::Value1 } #[doc = "External control: stop integrator when bit INTEN becomes 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IWS_A::VALUE2 + *self == Iws::Value2 } } #[doc = "Field `IWS` writer - Integration Window SIze"] -pub type IWS_W<'a, REG> = crate::BitWriter<'a, REG, IWS_A>; -impl<'a, REG> IWS_W<'a, REG> +pub type IwsW<'a, REG> = crate::BitWriter<'a, REG, Iws>; +impl<'a, REG> IwsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Internal control: stop integrator after REPVAL+1 integration cycles"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IWS_A::VALUE1) + self.variant(Iws::Value1) } #[doc = "External control: stop integrator when bit INTEN becomes 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IWS_A::VALUE2) + self.variant(Iws::Value2) } } #[doc = "Field `NVALINT` reader - Number of Values Integrated"] -pub type NVALINT_R = crate::FieldReader; +pub type NvalintR = crate::FieldReader; #[doc = "Field `NVALINT` writer - Number of Values Integrated"] -pub type NVALINT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type NvalintW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - Number of Values Counted"] #[inline(always)] - pub fn nvalcnt(&self) -> NVALCNT_R { - NVALCNT_R::new((self.bits & 0x3f) as u8) + pub fn nvalcnt(&self) -> NvalcntR { + NvalcntR::new((self.bits & 0x3f) as u8) } #[doc = "Bit 7 - Integration Enable"] #[inline(always)] - pub fn inten(&self) -> INTEN_R { - INTEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn inten(&self) -> IntenR { + IntenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:11 - Integration Cycle Counter"] #[inline(always)] - pub fn repcnt(&self) -> REPCNT_R { - REPCNT_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn repcnt(&self) -> RepcntR { + RepcntR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Number of Integration Cycles"] #[inline(always)] - pub fn repval(&self) -> REPVAL_R { - REPVAL_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn repval(&self) -> RepvalR { + RepvalR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:21 - Number of Values Discarded"] #[inline(always)] - pub fn nvaldis(&self) -> NVALDIS_R { - NVALDIS_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn nvaldis(&self) -> NvaldisR { + NvaldisR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bit 23 - Integration Window SIze"] #[inline(always)] - pub fn iws(&self) -> IWS_R { - IWS_R::new(((self.bits >> 23) & 1) != 0) + pub fn iws(&self) -> IwsR { + IwsR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:29 - Number of Values Integrated"] #[inline(always)] - pub fn nvalint(&self) -> NVALINT_R { - NVALINT_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn nvalint(&self) -> NvalintR { + NvalintR::new(((self.bits >> 24) & 0x3f) as u8) } } impl W { #[doc = "Bits 12:15 - Number of Integration Cycles"] #[inline(always)] #[must_use] - pub fn repval(&mut self) -> REPVAL_W { - REPVAL_W::new(self, 12) + pub fn repval(&mut self) -> RepvalW { + RepvalW::new(self, 12) } #[doc = "Bits 16:21 - Number of Values Discarded"] #[inline(always)] #[must_use] - pub fn nvaldis(&mut self) -> NVALDIS_W { - NVALDIS_W::new(self, 16) + pub fn nvaldis(&mut self) -> NvaldisW { + NvaldisW::new(self, 16) } #[doc = "Bit 23 - Integration Window SIze"] #[inline(always)] #[must_use] - pub fn iws(&mut self) -> IWS_W { - IWS_W::new(self, 23) + pub fn iws(&mut self) -> IwsW { + IwsW::new(self, 23) } #[doc = "Bits 24:29 - Number of Values Integrated"] #[inline(always)] #[must_use] - pub fn nvalint(&mut self) -> NVALINT_W { - NVALINT_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nvalint(&mut self) -> NvalintW { + NvalintW::new(self, 24) } } #[doc = "Integration Window Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iwctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iwctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IWCTR_SPEC; -impl crate::RegisterSpec for IWCTR_SPEC { +pub struct IwctrSpec; +impl crate::RegisterSpec for IwctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`iwctr::R`](R) reader structure"] -impl crate::Readable for IWCTR_SPEC {} +impl crate::Readable for IwctrSpec {} #[doc = "`write(|w| ..)` method takes [`iwctr::W`](W) writer structure"] -impl crate::Writable for IWCTR_SPEC { +impl crate::Writable for IwctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IWCTR to value 0"] -impl crate::Resettable for IWCTR_SPEC { +impl crate::Resettable for IwctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/modcfg.rs b/src/dsd_ch0/modcfg.rs index bec27d01..a0009d0e 100644 --- a/src/dsd_ch0/modcfg.rs +++ b/src/dsd_ch0/modcfg.rs @@ -1,67 +1,67 @@ #[doc = "Register `MODCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODCFG` writer"] -pub type W = crate::W; -#[doc = "Field `DIVM` reader - Divider Factor for Modulator Clock"] -pub type DIVM_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Divider Factor for Modulator Clock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIVM_A { +pub enum Divm { #[doc = "0: fMOD = fCLK / 2"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fMOD = fCLK / 4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fMOD = fCLK / 6"] - VALUE3 = 2, + Value3 = 2, #[doc = "15: fMOD = fCLK / 32"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIVM_A) -> Self { + fn from(variant: Divm) -> Self { variant as _ } } -impl crate::FieldSpec for DIVM_A { +impl crate::FieldSpec for Divm { type Ux = u8; } -impl DIVM_R { +#[doc = "Field `DIVM` reader - Divider Factor for Modulator Clock"] +pub type DivmR = crate::FieldReader; +impl DivmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIVM_A::VALUE1), - 1 => Some(DIVM_A::VALUE2), - 2 => Some(DIVM_A::VALUE3), - 15 => Some(DIVM_A::VALUE4), + 0 => Some(Divm::Value1), + 1 => Some(Divm::Value2), + 2 => Some(Divm::Value3), + 15 => Some(Divm::Value4), _ => None, } } #[doc = "fMOD = fCLK / 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIVM_A::VALUE1 + *self == Divm::Value1 } #[doc = "fMOD = fCLK / 4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIVM_A::VALUE2 + *self == Divm::Value2 } #[doc = "fMOD = fCLK / 6"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DIVM_A::VALUE3 + *self == Divm::Value3 } #[doc = "fMOD = fCLK / 32"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DIVM_A::VALUE4 + *self == Divm::Value4 } } #[doc = "Field `DIVM` writer - Divider Factor for Modulator Clock"] -pub type DIVM_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DIVM_A>; -impl<'a, REG> DIVM_W<'a, REG> +pub type DivmW<'a, REG> = crate::FieldWriter<'a, REG, 4, Divm>; +impl<'a, REG> DivmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,99 +69,90 @@ where #[doc = "fMOD = fCLK / 2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVM_A::VALUE1) + self.variant(Divm::Value1) } #[doc = "fMOD = fCLK / 4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVM_A::VALUE2) + self.variant(Divm::Value2) } #[doc = "fMOD = fCLK / 6"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DIVM_A::VALUE3) + self.variant(Divm::Value3) } #[doc = "fMOD = fCLK / 32"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DIVM_A::VALUE4) + self.variant(Divm::Value4) } } #[doc = "Write Control for Divider Factor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DWC_AW { +pub enum Dwc { #[doc = "0: No write access to divider factor"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield DIVM can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DWC_AW) -> Self { + fn from(variant: Dwc) -> Self { variant as u8 != 0 } } #[doc = "Field `DWC` writer - Write Control for Divider Factor"] -pub type DWC_W<'a, REG> = crate::BitWriter<'a, REG, DWC_AW>; -impl<'a, REG> DWC_W<'a, REG> +pub type DwcW<'a, REG> = crate::BitWriter<'a, REG, Dwc>; +impl<'a, REG> DwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to divider factor"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DWC_AW::VALUE1) + self.variant(Dwc::Value1) } #[doc = "Bitfield DIVM can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DWC_AW::VALUE2) + self.variant(Dwc::Value2) } } impl R { #[doc = "Bits 16:19 - Divider Factor for Modulator Clock"] #[inline(always)] - pub fn divm(&self) -> DIVM_R { - DIVM_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn divm(&self) -> DivmR { + DivmR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 16:19 - Divider Factor for Modulator Clock"] #[inline(always)] #[must_use] - pub fn divm(&mut self) -> DIVM_W { - DIVM_W::new(self, 16) + pub fn divm(&mut self) -> DivmW { + DivmW::new(self, 16) } #[doc = "Bit 23 - Write Control for Divider Factor"] #[inline(always)] #[must_use] - pub fn dwc(&mut self) -> DWC_W { - DWC_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dwc(&mut self) -> DwcW { + DwcW::new(self, 23) } } #[doc = "Modulator Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MODCFG_SPEC; -impl crate::RegisterSpec for MODCFG_SPEC { +pub struct ModcfgSpec; +impl crate::RegisterSpec for ModcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`modcfg::R`](R) reader structure"] -impl crate::Readable for MODCFG_SPEC {} +impl crate::Readable for ModcfgSpec {} #[doc = "`write(|w| ..)` method takes [`modcfg::W`](W) writer structure"] -impl crate::Writable for MODCFG_SPEC { +impl crate::Writable for ModcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODCFG to value 0"] -impl crate::Resettable for MODCFG_SPEC { +impl crate::Resettable for ModcfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/offm.rs b/src/dsd_ch0/offm.rs index 7ed92b0b..be5a4246 100644 --- a/src/dsd_ch0/offm.rs +++ b/src/dsd_ch0/offm.rs @@ -1,49 +1,40 @@ #[doc = "Register `OFFM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OFFM` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `OFFSET` reader - Offset Value"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset Value"] -pub type OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Offset Value"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new((self.bits & 0xffff) as u16) + pub fn offset(&self) -> OffsetR { + OffsetR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Offset Value"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W { - OFFSET_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 0) } } #[doc = "Offset Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`offm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`offm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OFFM_SPEC; -impl crate::RegisterSpec for OFFM_SPEC { +pub struct OffmSpec; +impl crate::RegisterSpec for OffmSpec { type Ux = u32; } #[doc = "`read()` method returns [`offm::R`](R) reader structure"] -impl crate::Readable for OFFM_SPEC {} +impl crate::Readable for OffmSpec {} #[doc = "`write(|w| ..)` method takes [`offm::W`](W) writer structure"] -impl crate::Writable for OFFM_SPEC { +impl crate::Writable for OffmSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OFFM to value 0"] -impl crate::Resettable for OFFM_SPEC { +impl crate::Resettable for OffmSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/rectcfg.rs b/src/dsd_ch0/rectcfg.rs index 58af749e..ba328c6f 100644 --- a/src/dsd_ch0/rectcfg.rs +++ b/src/dsd_ch0/rectcfg.rs @@ -1,120 +1,120 @@ #[doc = "Register `RECTCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RECTCFG` writer"] -pub type W = crate::W; -#[doc = "Field `RFEN` reader - Rectification Enable"] -pub type RFEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Rectification Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RFEN_A { +pub enum Rfen { #[doc = "0: No rectification, data not altered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data are rectified according to SGND"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RFEN_A) -> Self { + fn from(variant: Rfen) -> Self { variant as u8 != 0 } } -impl RFEN_R { +#[doc = "Field `RFEN` reader - Rectification Enable"] +pub type RfenR = crate::BitReader; +impl RfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RFEN_A { + pub const fn variant(&self) -> Rfen { match self.bits { - false => RFEN_A::VALUE1, - true => RFEN_A::VALUE2, + false => Rfen::Value1, + true => Rfen::Value2, } } #[doc = "No rectification, data not altered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RFEN_A::VALUE1 + *self == Rfen::Value1 } #[doc = "Data are rectified according to SGND"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RFEN_A::VALUE2 + *self == Rfen::Value2 } } #[doc = "Field `RFEN` writer - Rectification Enable"] -pub type RFEN_W<'a, REG> = crate::BitWriter<'a, REG, RFEN_A>; -impl<'a, REG> RFEN_W<'a, REG> +pub type RfenW<'a, REG> = crate::BitWriter<'a, REG, Rfen>; +impl<'a, REG> RfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No rectification, data not altered"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RFEN_A::VALUE1) + self.variant(Rfen::Value1) } #[doc = "Data are rectified according to SGND"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RFEN_A::VALUE2) + self.variant(Rfen::Value2) } } -#[doc = "Field `SSRC` reader - Sign Source"] -pub type SSRC_R = crate::FieldReader; #[doc = "Sign Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SSRC_A { +pub enum Ssrc { #[doc = "0: On-chip carrier generator"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sign of result of next channel"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External sign signal A"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: External sign signal B"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SSRC_A) -> Self { + fn from(variant: Ssrc) -> Self { variant as _ } } -impl crate::FieldSpec for SSRC_A { +impl crate::FieldSpec for Ssrc { type Ux = u8; } -impl SSRC_R { +#[doc = "Field `SSRC` reader - Sign Source"] +pub type SsrcR = crate::FieldReader; +impl SsrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SSRC_A { + pub const fn variant(&self) -> Ssrc { match self.bits { - 0 => SSRC_A::VALUE1, - 1 => SSRC_A::VALUE2, - 2 => SSRC_A::VALUE3, - 3 => SSRC_A::VALUE4, + 0 => Ssrc::Value1, + 1 => Ssrc::Value2, + 2 => Ssrc::Value3, + 3 => Ssrc::Value4, _ => unreachable!(), } } #[doc = "On-chip carrier generator"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SSRC_A::VALUE1 + *self == Ssrc::Value1 } #[doc = "Sign of result of next channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SSRC_A::VALUE2 + *self == Ssrc::Value2 } #[doc = "External sign signal A"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SSRC_A::VALUE3 + *self == Ssrc::Value3 } #[doc = "External sign signal B"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SSRC_A::VALUE4 + *self == Ssrc::Value4 } } #[doc = "Field `SSRC` writer - Sign Source"] -pub type SSRC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, SSRC_A>; -impl<'a, REG> SSRC_W<'a, REG> +pub type SsrcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ssrc>; +impl<'a, REG> SsrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -122,196 +122,187 @@ where #[doc = "On-chip carrier generator"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SSRC_A::VALUE1) + self.variant(Ssrc::Value1) } #[doc = "Sign of result of next channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SSRC_A::VALUE2) + self.variant(Ssrc::Value2) } #[doc = "External sign signal A"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SSRC_A::VALUE3) + self.variant(Ssrc::Value3) } #[doc = "External sign signal B"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SSRC_A::VALUE4) + self.variant(Ssrc::Value4) } } -#[doc = "Field `SDVAL` reader - Valid Flag"] -pub type SDVAL_R = crate::BitReader; #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDVAL_A { +pub enum Sdval { #[doc = "0: No new result available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield SDCAP has been updated with a new captured value and has not yet been read"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDVAL_A) -> Self { + fn from(variant: Sdval) -> Self { variant as u8 != 0 } } -impl SDVAL_R { +#[doc = "Field `SDVAL` reader - Valid Flag"] +pub type SdvalR = crate::BitReader; +impl SdvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDVAL_A { + pub const fn variant(&self) -> Sdval { match self.bits { - false => SDVAL_A::VALUE1, - true => SDVAL_A::VALUE2, + false => Sdval::Value1, + true => Sdval::Value2, } } #[doc = "No new result available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDVAL_A::VALUE1 + *self == Sdval::Value1 } #[doc = "Bitfield SDCAP has been updated with a new captured value and has not yet been read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDVAL_A::VALUE2 + *self == Sdval::Value2 } } -#[doc = "Field `SGNCS` reader - Selected Carrier Sign Signal"] -pub type SGNCS_R = crate::BitReader; #[doc = "Selected Carrier Sign Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SGNCS_A { +pub enum Sgncs { #[doc = "0: Positive values"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Negative values"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SGNCS_A) -> Self { + fn from(variant: Sgncs) -> Self { variant as u8 != 0 } } -impl SGNCS_R { +#[doc = "Field `SGNCS` reader - Selected Carrier Sign Signal"] +pub type SgncsR = crate::BitReader; +impl SgncsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SGNCS_A { + pub const fn variant(&self) -> Sgncs { match self.bits { - false => SGNCS_A::VALUE1, - true => SGNCS_A::VALUE2, + false => Sgncs::Value1, + true => Sgncs::Value2, } } #[doc = "Positive values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SGNCS_A::VALUE1 + *self == Sgncs::Value1 } #[doc = "Negative values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SGNCS_A::VALUE2 + *self == Sgncs::Value2 } } -#[doc = "Field `SGND` reader - Sign Signal Delayed"] -pub type SGND_R = crate::BitReader; #[doc = "Sign Signal Delayed\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SGND_A { +pub enum Sgnd { #[doc = "0: Positive values"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Negative values"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SGND_A) -> Self { + fn from(variant: Sgnd) -> Self { variant as u8 != 0 } } -impl SGND_R { +#[doc = "Field `SGND` reader - Sign Signal Delayed"] +pub type SgndR = crate::BitReader; +impl SgndR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SGND_A { + pub const fn variant(&self) -> Sgnd { match self.bits { - false => SGND_A::VALUE1, - true => SGND_A::VALUE2, + false => Sgnd::Value1, + true => Sgnd::Value2, } } #[doc = "Positive values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SGND_A::VALUE1 + *self == Sgnd::Value1 } #[doc = "Negative values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SGND_A::VALUE2 + *self == Sgnd::Value2 } } impl R { #[doc = "Bit 0 - Rectification Enable"] #[inline(always)] - pub fn rfen(&self) -> RFEN_R { - RFEN_R::new((self.bits & 1) != 0) + pub fn rfen(&self) -> RfenR { + RfenR::new((self.bits & 1) != 0) } #[doc = "Bits 4:5 - Sign Source"] #[inline(always)] - pub fn ssrc(&self) -> SSRC_R { - SSRC_R::new(((self.bits >> 4) & 3) as u8) + pub fn ssrc(&self) -> SsrcR { + SsrcR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 15 - Valid Flag"] #[inline(always)] - pub fn sdval(&self) -> SDVAL_R { - SDVAL_R::new(((self.bits >> 15) & 1) != 0) + pub fn sdval(&self) -> SdvalR { + SdvalR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 30 - Selected Carrier Sign Signal"] #[inline(always)] - pub fn sgncs(&self) -> SGNCS_R { - SGNCS_R::new(((self.bits >> 30) & 1) != 0) + pub fn sgncs(&self) -> SgncsR { + SgncsR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sign Signal Delayed"] #[inline(always)] - pub fn sgnd(&self) -> SGND_R { - SGND_R::new(((self.bits >> 31) & 1) != 0) + pub fn sgnd(&self) -> SgndR { + SgndR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Rectification Enable"] #[inline(always)] #[must_use] - pub fn rfen(&mut self) -> RFEN_W { - RFEN_W::new(self, 0) + pub fn rfen(&mut self) -> RfenW { + RfenW::new(self, 0) } #[doc = "Bits 4:5 - Sign Source"] #[inline(always)] #[must_use] - pub fn ssrc(&mut self) -> SSRC_W { - SSRC_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ssrc(&mut self) -> SsrcW { + SsrcW::new(self, 4) } } #[doc = "Rectification Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rectcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rectcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RECTCFG_SPEC; -impl crate::RegisterSpec for RECTCFG_SPEC { +pub struct RectcfgSpec; +impl crate::RegisterSpec for RectcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`rectcfg::R`](R) reader structure"] -impl crate::Readable for RECTCFG_SPEC {} +impl crate::Readable for RectcfgSpec {} #[doc = "`write(|w| ..)` method takes [`rectcfg::W`](W) writer structure"] -impl crate::Writable for RECTCFG_SPEC { +impl crate::Writable for RectcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RECTCFG to value 0x8000_0000"] -impl crate::Resettable for RECTCFG_SPEC { +impl crate::Resettable for RectcfgSpec { const RESET_VALUE: u32 = 0x8000_0000; } diff --git a/src/dsd_ch0/resa.rs b/src/dsd_ch0/resa.rs index 2b6b0e26..3420abcc 100644 --- a/src/dsd_ch0/resa.rs +++ b/src/dsd_ch0/resa.rs @@ -1,22 +1,22 @@ #[doc = "Register `RESA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } } #[doc = "Result Register, Auxiliary Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resa::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESA_SPEC; -impl crate::RegisterSpec for RESA_SPEC { +pub struct ResaSpec; +impl crate::RegisterSpec for ResaSpec { type Ux = u32; } #[doc = "`read()` method returns [`resa::R`](R) reader structure"] -impl crate::Readable for RESA_SPEC {} +impl crate::Readable for ResaSpec {} #[doc = "`reset()` method sets RESA to value 0"] -impl crate::Resettable for RESA_SPEC { +impl crate::Resettable for ResaSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/resm.rs b/src/dsd_ch0/resm.rs index 2cec8ffe..2752a362 100644 --- a/src/dsd_ch0/resm.rs +++ b/src/dsd_ch0/resm.rs @@ -1,22 +1,22 @@ #[doc = "Register `RESM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } } #[doc = "Result Register, Main Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESM_SPEC; -impl crate::RegisterSpec for RESM_SPEC { +pub struct ResmSpec; +impl crate::RegisterSpec for ResmSpec { type Ux = u32; } #[doc = "`read()` method returns [`resm::R`](R) reader structure"] -impl crate::Readable for RESM_SPEC {} +impl crate::Readable for ResmSpec {} #[doc = "`reset()` method sets RESM to value 0"] -impl crate::Resettable for RESM_SPEC { +impl crate::Resettable for ResmSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/dsd_ch0/tstmp.rs b/src/dsd_ch0/tstmp.rs index f9c27107..6ede9828 100644 --- a/src/dsd_ch0/tstmp.rs +++ b/src/dsd_ch0/tstmp.rs @@ -1,36 +1,36 @@ #[doc = "Register `TSTMP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; #[doc = "Field `CFMDCNT` reader - CIC Filter (Main Chain) Decimation Counter"] -pub type CFMDCNT_R = crate::FieldReader; +pub type CfmdcntR = crate::FieldReader; #[doc = "Field `NVALCNT` reader - Number of Values Counted"] -pub type NVALCNT_R = crate::FieldReader; +pub type NvalcntR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - CIC Filter (Main Chain) Decimation Counter"] #[inline(always)] - pub fn cfmdcnt(&self) -> CFMDCNT_R { - CFMDCNT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cfmdcnt(&self) -> CfmdcntR { + CfmdcntR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:29 - Number of Values Counted"] #[inline(always)] - pub fn nvalcnt(&self) -> NVALCNT_R { - NVALCNT_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn nvalcnt(&self) -> NvalcntR { + NvalcntR::new(((self.bits >> 24) & 0x3f) as u8) } } #[doc = "Time-Stamp Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tstmp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TSTMP_SPEC; -impl crate::RegisterSpec for TSTMP_SPEC { +pub struct TstmpSpec; +impl crate::RegisterSpec for TstmpSpec { type Ux = u32; } #[doc = "`read()` method returns [`tstmp::R`](R) reader structure"] -impl crate::Readable for TSTMP_SPEC {} +impl crate::Readable for TstmpSpec {} #[doc = "`reset()` method sets TSTMP to value 0"] -impl crate::Resettable for TSTMP_SPEC { +impl crate::Resettable for TstmpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu.rs b/src/ebu.rs index 03ce73a6..5ad6a8e6 100644 --- a/src/ebu.rs +++ b/src/ebu.rs @@ -1,315 +1,343 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clc: CLC, - modcon: MODCON, - id: ID, - usercon: USERCON, + clc: Clc, + modcon: Modcon, + id: Id, + usercon: Usercon, _reserved4: [u8; 0x08], - addrsel0: ADDRSEL0, - addrsel1: ADDRSEL1, - addrsel2: ADDRSEL2, - addrsel3: ADDRSEL3, - busrcon0: BUSRCON0, - busrap0: BUSRAP0, - buswcon0: BUSWCON0, - buswap0: BUSWAP0, - busrcon1: BUSRCON1, - busrap1: BUSRAP1, - buswcon1: BUSWCON1, - buswap1: BUSWAP1, - busrcon2: BUSRCON2, - busrap2: BUSRAP2, - buswcon2: BUSWCON2, - buswap2: BUSWAP2, - busrcon3: BUSRCON3, - busrap3: BUSRAP3, - buswcon3: BUSWCON3, - buswap3: BUSWAP3, - sdrmcon: SDRMCON, - sdrmod: SDRMOD, - sdrmref: SDRMREF, - sdrstat: SDRSTAT, + addrsel0: Addrsel0, + addrsel1: Addrsel1, + addrsel2: Addrsel2, + addrsel3: Addrsel3, + busrcon0: Busrcon0, + busrap0: Busrap0, + buswcon0: Buswcon0, + buswap0: Buswap0, + busrcon1: Busrcon1, + busrap1: Busrap1, + buswcon1: Buswcon1, + buswap1: Buswap1, + busrcon2: Busrcon2, + busrap2: Busrap2, + buswcon2: Buswcon2, + buswap2: Buswap2, + busrcon3: Busrcon3, + busrap3: Busrap3, + buswcon3: Buswcon3, + buswap3: Buswap3, + sdrmcon: Sdrmcon, + sdrmod: Sdrmod, + sdrmref: Sdrmref, + sdrstat: Sdrstat, } impl RegisterBlock { #[doc = "0x00 - EBU Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &CLC { + pub const fn clc(&self) -> &Clc { &self.clc } #[doc = "0x04 - EBU Configuration Register"] #[inline(always)] - pub const fn modcon(&self) -> &MODCON { + pub const fn modcon(&self) -> &Modcon { &self.modcon } #[doc = "0x08 - EBU Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x0c - EBU Test/Control Configuration Register"] #[inline(always)] - pub const fn usercon(&self) -> &USERCON { + pub const fn usercon(&self) -> &Usercon { &self.usercon } #[doc = "0x18 - EBU Address Select Register 0"] #[inline(always)] - pub const fn addrsel0(&self) -> &ADDRSEL0 { + pub const fn addrsel0(&self) -> &Addrsel0 { &self.addrsel0 } #[doc = "0x1c - EBU Address Select Register 1"] #[inline(always)] - pub const fn addrsel1(&self) -> &ADDRSEL1 { + pub const fn addrsel1(&self) -> &Addrsel1 { &self.addrsel1 } #[doc = "0x20 - EBU Address Select Register 2"] #[inline(always)] - pub const fn addrsel2(&self) -> &ADDRSEL2 { + pub const fn addrsel2(&self) -> &Addrsel2 { &self.addrsel2 } #[doc = "0x24 - EBU Address Select Register 3"] #[inline(always)] - pub const fn addrsel3(&self) -> &ADDRSEL3 { + pub const fn addrsel3(&self) -> &Addrsel3 { &self.addrsel3 } #[doc = "0x28 - EBU Bus Configuration Register"] #[inline(always)] - pub const fn busrcon0(&self) -> &BUSRCON0 { + pub const fn busrcon0(&self) -> &Busrcon0 { &self.busrcon0 } #[doc = "0x2c - EBU Bus Read Access Parameter Register"] #[inline(always)] - pub const fn busrap0(&self) -> &BUSRAP0 { + pub const fn busrap0(&self) -> &Busrap0 { &self.busrap0 } #[doc = "0x30 - EBU Bus Write Configuration Register"] #[inline(always)] - pub const fn buswcon0(&self) -> &BUSWCON0 { + pub const fn buswcon0(&self) -> &Buswcon0 { &self.buswcon0 } #[doc = "0x34 - EBU Bus Write Access Parameter Register"] #[inline(always)] - pub const fn buswap0(&self) -> &BUSWAP0 { + pub const fn buswap0(&self) -> &Buswap0 { &self.buswap0 } #[doc = "0x38 - EBU Bus Configuration Register"] #[inline(always)] - pub const fn busrcon1(&self) -> &BUSRCON1 { + pub const fn busrcon1(&self) -> &Busrcon1 { &self.busrcon1 } #[doc = "0x3c - EBU Bus Read Access Parameter Register"] #[inline(always)] - pub const fn busrap1(&self) -> &BUSRAP1 { + pub const fn busrap1(&self) -> &Busrap1 { &self.busrap1 } #[doc = "0x40 - EBU Bus Write Configuration Register"] #[inline(always)] - pub const fn buswcon1(&self) -> &BUSWCON1 { + pub const fn buswcon1(&self) -> &Buswcon1 { &self.buswcon1 } #[doc = "0x44 - EBU Bus Write Access Parameter Register"] #[inline(always)] - pub const fn buswap1(&self) -> &BUSWAP1 { + pub const fn buswap1(&self) -> &Buswap1 { &self.buswap1 } #[doc = "0x48 - EBU Bus Configuration Register"] #[inline(always)] - pub const fn busrcon2(&self) -> &BUSRCON2 { + pub const fn busrcon2(&self) -> &Busrcon2 { &self.busrcon2 } #[doc = "0x4c - EBU Bus Read Access Parameter Register"] #[inline(always)] - pub const fn busrap2(&self) -> &BUSRAP2 { + pub const fn busrap2(&self) -> &Busrap2 { &self.busrap2 } #[doc = "0x50 - EBU Bus Write Configuration Register"] #[inline(always)] - pub const fn buswcon2(&self) -> &BUSWCON2 { + pub const fn buswcon2(&self) -> &Buswcon2 { &self.buswcon2 } #[doc = "0x54 - EBU Bus Write Access Parameter Register"] #[inline(always)] - pub const fn buswap2(&self) -> &BUSWAP2 { + pub const fn buswap2(&self) -> &Buswap2 { &self.buswap2 } #[doc = "0x58 - EBU Bus Configuration Register"] #[inline(always)] - pub const fn busrcon3(&self) -> &BUSRCON3 { + pub const fn busrcon3(&self) -> &Busrcon3 { &self.busrcon3 } #[doc = "0x5c - EBU Bus Read Access Parameter Register"] #[inline(always)] - pub const fn busrap3(&self) -> &BUSRAP3 { + pub const fn busrap3(&self) -> &Busrap3 { &self.busrap3 } #[doc = "0x60 - EBU Bus Write Configuration Register"] #[inline(always)] - pub const fn buswcon3(&self) -> &BUSWCON3 { + pub const fn buswcon3(&self) -> &Buswcon3 { &self.buswcon3 } #[doc = "0x64 - EBU Bus Write Access Parameter Register"] #[inline(always)] - pub const fn buswap3(&self) -> &BUSWAP3 { + pub const fn buswap3(&self) -> &Buswap3 { &self.buswap3 } #[doc = "0x68 - EBU SDRAM Control Register"] #[inline(always)] - pub const fn sdrmcon(&self) -> &SDRMCON { + pub const fn sdrmcon(&self) -> &Sdrmcon { &self.sdrmcon } #[doc = "0x6c - EBU SDRAM Mode Register"] #[inline(always)] - pub const fn sdrmod(&self) -> &SDRMOD { + pub const fn sdrmod(&self) -> &Sdrmod { &self.sdrmod } #[doc = "0x70 - EBU SDRAM Refresh Control Register"] #[inline(always)] - pub const fn sdrmref(&self) -> &SDRMREF { + pub const fn sdrmref(&self) -> &Sdrmref { &self.sdrmref } #[doc = "0x74 - EBU SDRAM Status Register"] #[inline(always)] - pub const fn sdrstat(&self) -> &SDRSTAT { + pub const fn sdrstat(&self) -> &Sdrstat { &self.sdrstat } } #[doc = "CLC (rw) register accessor: EBU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -pub type CLC = crate::Reg; +#[doc(alias = "CLC")] +pub type Clc = crate::Reg; #[doc = "EBU Clock Control Register"] pub mod clc; #[doc = "MODCON (rw) register accessor: EBU Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modcon`] module"] -pub type MODCON = crate::Reg; +#[doc(alias = "MODCON")] +pub type Modcon = crate::Reg; #[doc = "EBU Configuration Register"] pub mod modcon; #[doc = "ID (r) register accessor: EBU Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "EBU Module Identification Register"] pub mod id; #[doc = "USERCON (rw) register accessor: EBU Test/Control Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usercon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usercon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usercon`] module"] -pub type USERCON = crate::Reg; +#[doc(alias = "USERCON")] +pub type Usercon = crate::Reg; #[doc = "EBU Test/Control Configuration Register"] pub mod usercon; #[doc = "ADDRSEL0 (rw) register accessor: EBU Address Select Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrsel0`] module"] -pub type ADDRSEL0 = crate::Reg; +#[doc(alias = "ADDRSEL0")] +pub type Addrsel0 = crate::Reg; #[doc = "EBU Address Select Register 0"] pub mod addrsel0; #[doc = "ADDRSEL1 (rw) register accessor: EBU Address Select Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrsel1`] module"] -pub type ADDRSEL1 = crate::Reg; +#[doc(alias = "ADDRSEL1")] +pub type Addrsel1 = crate::Reg; #[doc = "EBU Address Select Register 1"] pub mod addrsel1; #[doc = "ADDRSEL2 (rw) register accessor: EBU Address Select Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrsel2`] module"] -pub type ADDRSEL2 = crate::Reg; +#[doc(alias = "ADDRSEL2")] +pub type Addrsel2 = crate::Reg; #[doc = "EBU Address Select Register 2"] pub mod addrsel2; #[doc = "ADDRSEL3 (rw) register accessor: EBU Address Select Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addrsel3`] module"] -pub type ADDRSEL3 = crate::Reg; +#[doc(alias = "ADDRSEL3")] +pub type Addrsel3 = crate::Reg; #[doc = "EBU Address Select Register 3"] pub mod addrsel3; #[doc = "BUSRCON0 (rw) register accessor: EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrcon0`] module"] -pub type BUSRCON0 = crate::Reg; +#[doc(alias = "BUSRCON0")] +pub type Busrcon0 = crate::Reg; #[doc = "EBU Bus Configuration Register"] pub mod busrcon0; #[doc = "BUSRAP0 (rw) register accessor: EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrap0`] module"] -pub type BUSRAP0 = crate::Reg; +#[doc(alias = "BUSRAP0")] +pub type Busrap0 = crate::Reg; #[doc = "EBU Bus Read Access Parameter Register"] pub mod busrap0; #[doc = "BUSWCON0 (rw) register accessor: EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswcon0`] module"] -pub type BUSWCON0 = crate::Reg; +#[doc(alias = "BUSWCON0")] +pub type Buswcon0 = crate::Reg; #[doc = "EBU Bus Write Configuration Register"] pub mod buswcon0; #[doc = "BUSWAP0 (rw) register accessor: EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswap0`] module"] -pub type BUSWAP0 = crate::Reg; +#[doc(alias = "BUSWAP0")] +pub type Buswap0 = crate::Reg; #[doc = "EBU Bus Write Access Parameter Register"] pub mod buswap0; #[doc = "BUSRCON1 (rw) register accessor: EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrcon1`] module"] -pub type BUSRCON1 = crate::Reg; +#[doc(alias = "BUSRCON1")] +pub type Busrcon1 = crate::Reg; #[doc = "EBU Bus Configuration Register"] pub mod busrcon1; #[doc = "BUSRAP1 (rw) register accessor: EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrap1`] module"] -pub type BUSRAP1 = crate::Reg; +#[doc(alias = "BUSRAP1")] +pub type Busrap1 = crate::Reg; #[doc = "EBU Bus Read Access Parameter Register"] pub mod busrap1; #[doc = "BUSWCON1 (rw) register accessor: EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswcon1`] module"] -pub type BUSWCON1 = crate::Reg; +#[doc(alias = "BUSWCON1")] +pub type Buswcon1 = crate::Reg; #[doc = "EBU Bus Write Configuration Register"] pub mod buswcon1; #[doc = "BUSWAP1 (rw) register accessor: EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswap1`] module"] -pub type BUSWAP1 = crate::Reg; +#[doc(alias = "BUSWAP1")] +pub type Buswap1 = crate::Reg; #[doc = "EBU Bus Write Access Parameter Register"] pub mod buswap1; #[doc = "BUSRCON2 (rw) register accessor: EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrcon2`] module"] -pub type BUSRCON2 = crate::Reg; +#[doc(alias = "BUSRCON2")] +pub type Busrcon2 = crate::Reg; #[doc = "EBU Bus Configuration Register"] pub mod busrcon2; #[doc = "BUSRAP2 (rw) register accessor: EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrap2`] module"] -pub type BUSRAP2 = crate::Reg; +#[doc(alias = "BUSRAP2")] +pub type Busrap2 = crate::Reg; #[doc = "EBU Bus Read Access Parameter Register"] pub mod busrap2; #[doc = "BUSWCON2 (rw) register accessor: EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswcon2`] module"] -pub type BUSWCON2 = crate::Reg; +#[doc(alias = "BUSWCON2")] +pub type Buswcon2 = crate::Reg; #[doc = "EBU Bus Write Configuration Register"] pub mod buswcon2; #[doc = "BUSWAP2 (rw) register accessor: EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswap2`] module"] -pub type BUSWAP2 = crate::Reg; +#[doc(alias = "BUSWAP2")] +pub type Buswap2 = crate::Reg; #[doc = "EBU Bus Write Access Parameter Register"] pub mod buswap2; #[doc = "BUSRCON3 (rw) register accessor: EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrcon3`] module"] -pub type BUSRCON3 = crate::Reg; +#[doc(alias = "BUSRCON3")] +pub type Busrcon3 = crate::Reg; #[doc = "EBU Bus Configuration Register"] pub mod busrcon3; #[doc = "BUSRAP3 (rw) register accessor: EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busrap3`] module"] -pub type BUSRAP3 = crate::Reg; +#[doc(alias = "BUSRAP3")] +pub type Busrap3 = crate::Reg; #[doc = "EBU Bus Read Access Parameter Register"] pub mod busrap3; #[doc = "BUSWCON3 (rw) register accessor: EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswcon3`] module"] -pub type BUSWCON3 = crate::Reg; +#[doc(alias = "BUSWCON3")] +pub type Buswcon3 = crate::Reg; #[doc = "EBU Bus Write Configuration Register"] pub mod buswcon3; #[doc = "BUSWAP3 (rw) register accessor: EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@buswap3`] module"] -pub type BUSWAP3 = crate::Reg; +#[doc(alias = "BUSWAP3")] +pub type Buswap3 = crate::Reg; #[doc = "EBU Bus Write Access Parameter Register"] pub mod buswap3; #[doc = "SDRMCON (rw) register accessor: EBU SDRAM Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdrmcon`] module"] -pub type SDRMCON = crate::Reg; +#[doc(alias = "SDRMCON")] +pub type Sdrmcon = crate::Reg; #[doc = "EBU SDRAM Control Register"] pub mod sdrmcon; #[doc = "SDRMOD (rw) register accessor: EBU SDRAM Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmod::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmod::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdrmod`] module"] -pub type SDRMOD = crate::Reg; +#[doc(alias = "SDRMOD")] +pub type Sdrmod = crate::Reg; #[doc = "EBU SDRAM Mode Register"] pub mod sdrmod; #[doc = "SDRMREF (rw) register accessor: EBU SDRAM Refresh Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmref::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmref::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdrmref`] module"] -pub type SDRMREF = crate::Reg; +#[doc(alias = "SDRMREF")] +pub type Sdrmref = crate::Reg; #[doc = "EBU SDRAM Refresh Control Register"] pub mod sdrmref; #[doc = "SDRSTAT (r) register accessor: EBU SDRAM Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdrstat`] module"] -pub type SDRSTAT = crate::Reg; +#[doc(alias = "SDRSTAT")] +pub type Sdrstat = crate::Reg; #[doc = "EBU SDRAM Status Register"] pub mod sdrstat; diff --git a/src/ebu/addrsel0.rs b/src/ebu/addrsel0.rs index 4ccc9c5b..b2ed4c24 100644 --- a/src/ebu/addrsel0.rs +++ b/src/ebu/addrsel0.rs @@ -1,226 +1,217 @@ #[doc = "Register `ADDRSEL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ADDRSEL0` writer"] -pub type W = crate::W; -#[doc = "Field `REGENAB` reader - Memory Region Enable"] -pub type REGENAB_R = crate::BitReader; +pub type W = crate::W; #[doc = "Memory Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGENAB_A { +pub enum Regenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGENAB_A) -> Self { + fn from(variant: Regenab) -> Self { variant as u8 != 0 } } -impl REGENAB_R { +#[doc = "Field `REGENAB` reader - Memory Region Enable"] +pub type RegenabR = crate::BitReader; +impl RegenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REGENAB_A { + pub const fn variant(&self) -> Regenab { match self.bits { - false => REGENAB_A::VALUE1, - true => REGENAB_A::VALUE2, + false => Regenab::Value1, + true => Regenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REGENAB_A::VALUE1 + *self == Regenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REGENAB_A::VALUE2 + *self == Regenab::Value2 } } #[doc = "Field `REGENAB` writer - Memory Region Enable"] -pub type REGENAB_W<'a, REG> = crate::BitWriter<'a, REG, REGENAB_A>; -impl<'a, REG> REGENAB_W<'a, REG> +pub type RegenabW<'a, REG> = crate::BitWriter<'a, REG, Regenab>; +impl<'a, REG> RegenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE1) + self.variant(Regenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE2) + self.variant(Regenab::Value2) } } -#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] -pub type ALTENAB_R = crate::BitReader; #[doc = "Alternate Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALTENAB_A { +pub enum Altenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALTENAB_A) -> Self { + fn from(variant: Altenab) -> Self { variant as u8 != 0 } } -impl ALTENAB_R { +#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] +pub type AltenabR = crate::BitReader; +impl AltenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALTENAB_A { + pub const fn variant(&self) -> Altenab { match self.bits { - false => ALTENAB_A::VALUE1, - true => ALTENAB_A::VALUE2, + false => Altenab::Value1, + true => Altenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALTENAB_A::VALUE1 + *self == Altenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALTENAB_A::VALUE2 + *self == Altenab::Value2 } } #[doc = "Field `ALTENAB` writer - Alternate Region Enable"] -pub type ALTENAB_W<'a, REG> = crate::BitWriter<'a, REG, ALTENAB_A>; -impl<'a, REG> ALTENAB_W<'a, REG> +pub type AltenabW<'a, REG> = crate::BitWriter<'a, REG, Altenab>; +impl<'a, REG> AltenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE1) + self.variant(Altenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE2) + self.variant(Altenab::Value2) } } -#[doc = "Field `WPROT` reader - Memory Region Write Protect"] -pub type WPROT_R = crate::BitReader; #[doc = "Memory Region Write Protect\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROT_A { +pub enum Wprot { #[doc = "0: Region is enabled for write accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Region is write protected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROT_A) -> Self { + fn from(variant: Wprot) -> Self { variant as u8 != 0 } } -impl WPROT_R { +#[doc = "Field `WPROT` reader - Memory Region Write Protect"] +pub type WprotR = crate::BitReader; +impl WprotR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROT_A { + pub const fn variant(&self) -> Wprot { match self.bits { - false => WPROT_A::VALUE1, - true => WPROT_A::VALUE2, + false => Wprot::Value1, + true => Wprot::Value2, } } #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROT_A::VALUE1 + *self == Wprot::Value1 } #[doc = "Region is write protected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROT_A::VALUE2 + *self == Wprot::Value2 } } #[doc = "Field `WPROT` writer - Memory Region Write Protect"] -pub type WPROT_W<'a, REG> = crate::BitWriter<'a, REG, WPROT_A>; -impl<'a, REG> WPROT_W<'a, REG> +pub type WprotW<'a, REG> = crate::BitWriter<'a, REG, Wprot>; +impl<'a, REG> WprotW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE1) + self.variant(Wprot::Value1) } #[doc = "Region is write protected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE2) + self.variant(Wprot::Value2) } } impl R { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - pub fn regenab(&self) -> REGENAB_R { - REGENAB_R::new((self.bits & 1) != 0) + pub fn regenab(&self) -> RegenabR { + RegenabR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - pub fn altenab(&self) -> ALTENAB_R { - ALTENAB_R::new(((self.bits >> 1) & 1) != 0) + pub fn altenab(&self) -> AltenabR { + AltenabR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - pub fn wprot(&self) -> WPROT_R { - WPROT_R::new(((self.bits >> 2) & 1) != 0) + pub fn wprot(&self) -> WprotR { + WprotR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] #[must_use] - pub fn regenab(&mut self) -> REGENAB_W { - REGENAB_W::new(self, 0) + pub fn regenab(&mut self) -> RegenabW { + RegenabW::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] #[must_use] - pub fn altenab(&mut self) -> ALTENAB_W { - ALTENAB_W::new(self, 1) + pub fn altenab(&mut self) -> AltenabW { + AltenabW::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] #[must_use] - pub fn wprot(&mut self) -> WPROT_W { - WPROT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wprot(&mut self) -> WprotW { + WprotW::new(self, 2) } } #[doc = "EBU Address Select Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ADDRSEL0_SPEC; -impl crate::RegisterSpec for ADDRSEL0_SPEC { +pub struct Addrsel0Spec; +impl crate::RegisterSpec for Addrsel0Spec { type Ux = u32; } #[doc = "`read()` method returns [`addrsel0::R`](R) reader structure"] -impl crate::Readable for ADDRSEL0_SPEC {} +impl crate::Readable for Addrsel0Spec {} #[doc = "`write(|w| ..)` method takes [`addrsel0::W`](W) writer structure"] -impl crate::Writable for ADDRSEL0_SPEC { +impl crate::Writable for Addrsel0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRSEL0 to value 0"] -impl crate::Resettable for ADDRSEL0_SPEC { +impl crate::Resettable for Addrsel0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu/addrsel1.rs b/src/ebu/addrsel1.rs index 1eb618d1..809114e9 100644 --- a/src/ebu/addrsel1.rs +++ b/src/ebu/addrsel1.rs @@ -1,226 +1,217 @@ #[doc = "Register `ADDRSEL1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ADDRSEL1` writer"] -pub type W = crate::W; -#[doc = "Field `REGENAB` reader - Memory Region Enable"] -pub type REGENAB_R = crate::BitReader; +pub type W = crate::W; #[doc = "Memory Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGENAB_A { +pub enum Regenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGENAB_A) -> Self { + fn from(variant: Regenab) -> Self { variant as u8 != 0 } } -impl REGENAB_R { +#[doc = "Field `REGENAB` reader - Memory Region Enable"] +pub type RegenabR = crate::BitReader; +impl RegenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REGENAB_A { + pub const fn variant(&self) -> Regenab { match self.bits { - false => REGENAB_A::VALUE1, - true => REGENAB_A::VALUE2, + false => Regenab::Value1, + true => Regenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REGENAB_A::VALUE1 + *self == Regenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REGENAB_A::VALUE2 + *self == Regenab::Value2 } } #[doc = "Field `REGENAB` writer - Memory Region Enable"] -pub type REGENAB_W<'a, REG> = crate::BitWriter<'a, REG, REGENAB_A>; -impl<'a, REG> REGENAB_W<'a, REG> +pub type RegenabW<'a, REG> = crate::BitWriter<'a, REG, Regenab>; +impl<'a, REG> RegenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE1) + self.variant(Regenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE2) + self.variant(Regenab::Value2) } } -#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] -pub type ALTENAB_R = crate::BitReader; #[doc = "Alternate Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALTENAB_A { +pub enum Altenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALTENAB_A) -> Self { + fn from(variant: Altenab) -> Self { variant as u8 != 0 } } -impl ALTENAB_R { +#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] +pub type AltenabR = crate::BitReader; +impl AltenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALTENAB_A { + pub const fn variant(&self) -> Altenab { match self.bits { - false => ALTENAB_A::VALUE1, - true => ALTENAB_A::VALUE2, + false => Altenab::Value1, + true => Altenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALTENAB_A::VALUE1 + *self == Altenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALTENAB_A::VALUE2 + *self == Altenab::Value2 } } #[doc = "Field `ALTENAB` writer - Alternate Region Enable"] -pub type ALTENAB_W<'a, REG> = crate::BitWriter<'a, REG, ALTENAB_A>; -impl<'a, REG> ALTENAB_W<'a, REG> +pub type AltenabW<'a, REG> = crate::BitWriter<'a, REG, Altenab>; +impl<'a, REG> AltenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE1) + self.variant(Altenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE2) + self.variant(Altenab::Value2) } } -#[doc = "Field `WPROT` reader - Memory Region Write Protect"] -pub type WPROT_R = crate::BitReader; #[doc = "Memory Region Write Protect\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROT_A { +pub enum Wprot { #[doc = "0: Region is enabled for write accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Region is write protected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROT_A) -> Self { + fn from(variant: Wprot) -> Self { variant as u8 != 0 } } -impl WPROT_R { +#[doc = "Field `WPROT` reader - Memory Region Write Protect"] +pub type WprotR = crate::BitReader; +impl WprotR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROT_A { + pub const fn variant(&self) -> Wprot { match self.bits { - false => WPROT_A::VALUE1, - true => WPROT_A::VALUE2, + false => Wprot::Value1, + true => Wprot::Value2, } } #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROT_A::VALUE1 + *self == Wprot::Value1 } #[doc = "Region is write protected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROT_A::VALUE2 + *self == Wprot::Value2 } } #[doc = "Field `WPROT` writer - Memory Region Write Protect"] -pub type WPROT_W<'a, REG> = crate::BitWriter<'a, REG, WPROT_A>; -impl<'a, REG> WPROT_W<'a, REG> +pub type WprotW<'a, REG> = crate::BitWriter<'a, REG, Wprot>; +impl<'a, REG> WprotW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE1) + self.variant(Wprot::Value1) } #[doc = "Region is write protected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE2) + self.variant(Wprot::Value2) } } impl R { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - pub fn regenab(&self) -> REGENAB_R { - REGENAB_R::new((self.bits & 1) != 0) + pub fn regenab(&self) -> RegenabR { + RegenabR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - pub fn altenab(&self) -> ALTENAB_R { - ALTENAB_R::new(((self.bits >> 1) & 1) != 0) + pub fn altenab(&self) -> AltenabR { + AltenabR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - pub fn wprot(&self) -> WPROT_R { - WPROT_R::new(((self.bits >> 2) & 1) != 0) + pub fn wprot(&self) -> WprotR { + WprotR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] #[must_use] - pub fn regenab(&mut self) -> REGENAB_W { - REGENAB_W::new(self, 0) + pub fn regenab(&mut self) -> RegenabW { + RegenabW::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] #[must_use] - pub fn altenab(&mut self) -> ALTENAB_W { - ALTENAB_W::new(self, 1) + pub fn altenab(&mut self) -> AltenabW { + AltenabW::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] #[must_use] - pub fn wprot(&mut self) -> WPROT_W { - WPROT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wprot(&mut self) -> WprotW { + WprotW::new(self, 2) } } #[doc = "EBU Address Select Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ADDRSEL1_SPEC; -impl crate::RegisterSpec for ADDRSEL1_SPEC { +pub struct Addrsel1Spec; +impl crate::RegisterSpec for Addrsel1Spec { type Ux = u32; } #[doc = "`read()` method returns [`addrsel1::R`](R) reader structure"] -impl crate::Readable for ADDRSEL1_SPEC {} +impl crate::Readable for Addrsel1Spec {} #[doc = "`write(|w| ..)` method takes [`addrsel1::W`](W) writer structure"] -impl crate::Writable for ADDRSEL1_SPEC { +impl crate::Writable for Addrsel1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRSEL1 to value 0"] -impl crate::Resettable for ADDRSEL1_SPEC { +impl crate::Resettable for Addrsel1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu/addrsel2.rs b/src/ebu/addrsel2.rs index 38f16cc9..ffd6cc37 100644 --- a/src/ebu/addrsel2.rs +++ b/src/ebu/addrsel2.rs @@ -1,226 +1,217 @@ #[doc = "Register `ADDRSEL2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ADDRSEL2` writer"] -pub type W = crate::W; -#[doc = "Field `REGENAB` reader - Memory Region Enable"] -pub type REGENAB_R = crate::BitReader; +pub type W = crate::W; #[doc = "Memory Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGENAB_A { +pub enum Regenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGENAB_A) -> Self { + fn from(variant: Regenab) -> Self { variant as u8 != 0 } } -impl REGENAB_R { +#[doc = "Field `REGENAB` reader - Memory Region Enable"] +pub type RegenabR = crate::BitReader; +impl RegenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REGENAB_A { + pub const fn variant(&self) -> Regenab { match self.bits { - false => REGENAB_A::VALUE1, - true => REGENAB_A::VALUE2, + false => Regenab::Value1, + true => Regenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REGENAB_A::VALUE1 + *self == Regenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REGENAB_A::VALUE2 + *self == Regenab::Value2 } } #[doc = "Field `REGENAB` writer - Memory Region Enable"] -pub type REGENAB_W<'a, REG> = crate::BitWriter<'a, REG, REGENAB_A>; -impl<'a, REG> REGENAB_W<'a, REG> +pub type RegenabW<'a, REG> = crate::BitWriter<'a, REG, Regenab>; +impl<'a, REG> RegenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE1) + self.variant(Regenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE2) + self.variant(Regenab::Value2) } } -#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] -pub type ALTENAB_R = crate::BitReader; #[doc = "Alternate Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALTENAB_A { +pub enum Altenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALTENAB_A) -> Self { + fn from(variant: Altenab) -> Self { variant as u8 != 0 } } -impl ALTENAB_R { +#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] +pub type AltenabR = crate::BitReader; +impl AltenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALTENAB_A { + pub const fn variant(&self) -> Altenab { match self.bits { - false => ALTENAB_A::VALUE1, - true => ALTENAB_A::VALUE2, + false => Altenab::Value1, + true => Altenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALTENAB_A::VALUE1 + *self == Altenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALTENAB_A::VALUE2 + *self == Altenab::Value2 } } #[doc = "Field `ALTENAB` writer - Alternate Region Enable"] -pub type ALTENAB_W<'a, REG> = crate::BitWriter<'a, REG, ALTENAB_A>; -impl<'a, REG> ALTENAB_W<'a, REG> +pub type AltenabW<'a, REG> = crate::BitWriter<'a, REG, Altenab>; +impl<'a, REG> AltenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE1) + self.variant(Altenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE2) + self.variant(Altenab::Value2) } } -#[doc = "Field `WPROT` reader - Memory Region Write Protect"] -pub type WPROT_R = crate::BitReader; #[doc = "Memory Region Write Protect\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROT_A { +pub enum Wprot { #[doc = "0: Region is enabled for write accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Region is write protected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROT_A) -> Self { + fn from(variant: Wprot) -> Self { variant as u8 != 0 } } -impl WPROT_R { +#[doc = "Field `WPROT` reader - Memory Region Write Protect"] +pub type WprotR = crate::BitReader; +impl WprotR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROT_A { + pub const fn variant(&self) -> Wprot { match self.bits { - false => WPROT_A::VALUE1, - true => WPROT_A::VALUE2, + false => Wprot::Value1, + true => Wprot::Value2, } } #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROT_A::VALUE1 + *self == Wprot::Value1 } #[doc = "Region is write protected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROT_A::VALUE2 + *self == Wprot::Value2 } } #[doc = "Field `WPROT` writer - Memory Region Write Protect"] -pub type WPROT_W<'a, REG> = crate::BitWriter<'a, REG, WPROT_A>; -impl<'a, REG> WPROT_W<'a, REG> +pub type WprotW<'a, REG> = crate::BitWriter<'a, REG, Wprot>; +impl<'a, REG> WprotW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE1) + self.variant(Wprot::Value1) } #[doc = "Region is write protected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE2) + self.variant(Wprot::Value2) } } impl R { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - pub fn regenab(&self) -> REGENAB_R { - REGENAB_R::new((self.bits & 1) != 0) + pub fn regenab(&self) -> RegenabR { + RegenabR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - pub fn altenab(&self) -> ALTENAB_R { - ALTENAB_R::new(((self.bits >> 1) & 1) != 0) + pub fn altenab(&self) -> AltenabR { + AltenabR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - pub fn wprot(&self) -> WPROT_R { - WPROT_R::new(((self.bits >> 2) & 1) != 0) + pub fn wprot(&self) -> WprotR { + WprotR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] #[must_use] - pub fn regenab(&mut self) -> REGENAB_W { - REGENAB_W::new(self, 0) + pub fn regenab(&mut self) -> RegenabW { + RegenabW::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] #[must_use] - pub fn altenab(&mut self) -> ALTENAB_W { - ALTENAB_W::new(self, 1) + pub fn altenab(&mut self) -> AltenabW { + AltenabW::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] #[must_use] - pub fn wprot(&mut self) -> WPROT_W { - WPROT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wprot(&mut self) -> WprotW { + WprotW::new(self, 2) } } #[doc = "EBU Address Select Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ADDRSEL2_SPEC; -impl crate::RegisterSpec for ADDRSEL2_SPEC { +pub struct Addrsel2Spec; +impl crate::RegisterSpec for Addrsel2Spec { type Ux = u32; } #[doc = "`read()` method returns [`addrsel2::R`](R) reader structure"] -impl crate::Readable for ADDRSEL2_SPEC {} +impl crate::Readable for Addrsel2Spec {} #[doc = "`write(|w| ..)` method takes [`addrsel2::W`](W) writer structure"] -impl crate::Writable for ADDRSEL2_SPEC { +impl crate::Writable for Addrsel2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRSEL2 to value 0"] -impl crate::Resettable for ADDRSEL2_SPEC { +impl crate::Resettable for Addrsel2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu/addrsel3.rs b/src/ebu/addrsel3.rs index 350b81a2..0ee50f84 100644 --- a/src/ebu/addrsel3.rs +++ b/src/ebu/addrsel3.rs @@ -1,226 +1,217 @@ #[doc = "Register `ADDRSEL3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ADDRSEL3` writer"] -pub type W = crate::W; -#[doc = "Field `REGENAB` reader - Memory Region Enable"] -pub type REGENAB_R = crate::BitReader; +pub type W = crate::W; #[doc = "Memory Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REGENAB_A { +pub enum Regenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REGENAB_A) -> Self { + fn from(variant: Regenab) -> Self { variant as u8 != 0 } } -impl REGENAB_R { +#[doc = "Field `REGENAB` reader - Memory Region Enable"] +pub type RegenabR = crate::BitReader; +impl RegenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REGENAB_A { + pub const fn variant(&self) -> Regenab { match self.bits { - false => REGENAB_A::VALUE1, - true => REGENAB_A::VALUE2, + false => Regenab::Value1, + true => Regenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REGENAB_A::VALUE1 + *self == Regenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REGENAB_A::VALUE2 + *self == Regenab::Value2 } } #[doc = "Field `REGENAB` writer - Memory Region Enable"] -pub type REGENAB_W<'a, REG> = crate::BitWriter<'a, REG, REGENAB_A>; -impl<'a, REG> REGENAB_W<'a, REG> +pub type RegenabW<'a, REG> = crate::BitWriter<'a, REG, Regenab>; +impl<'a, REG> RegenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE1) + self.variant(Regenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REGENAB_A::VALUE2) + self.variant(Regenab::Value2) } } -#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] -pub type ALTENAB_R = crate::BitReader; #[doc = "Alternate Region Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALTENAB_A { +pub enum Altenab { #[doc = "0: Memory region is disabled (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory region is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALTENAB_A) -> Self { + fn from(variant: Altenab) -> Self { variant as u8 != 0 } } -impl ALTENAB_R { +#[doc = "Field `ALTENAB` reader - Alternate Region Enable"] +pub type AltenabR = crate::BitReader; +impl AltenabR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALTENAB_A { + pub const fn variant(&self) -> Altenab { match self.bits { - false => ALTENAB_A::VALUE1, - true => ALTENAB_A::VALUE2, + false => Altenab::Value1, + true => Altenab::Value2, } } #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALTENAB_A::VALUE1 + *self == Altenab::Value1 } #[doc = "Memory region is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALTENAB_A::VALUE2 + *self == Altenab::Value2 } } #[doc = "Field `ALTENAB` writer - Alternate Region Enable"] -pub type ALTENAB_W<'a, REG> = crate::BitWriter<'a, REG, ALTENAB_A>; -impl<'a, REG> ALTENAB_W<'a, REG> +pub type AltenabW<'a, REG> = crate::BitWriter<'a, REG, Altenab>; +impl<'a, REG> AltenabW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory region is disabled (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE1) + self.variant(Altenab::Value1) } #[doc = "Memory region is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALTENAB_A::VALUE2) + self.variant(Altenab::Value2) } } -#[doc = "Field `WPROT` reader - Memory Region Write Protect"] -pub type WPROT_R = crate::BitReader; #[doc = "Memory Region Write Protect\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROT_A { +pub enum Wprot { #[doc = "0: Region is enabled for write accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Region is write protected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROT_A) -> Self { + fn from(variant: Wprot) -> Self { variant as u8 != 0 } } -impl WPROT_R { +#[doc = "Field `WPROT` reader - Memory Region Write Protect"] +pub type WprotR = crate::BitReader; +impl WprotR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROT_A { + pub const fn variant(&self) -> Wprot { match self.bits { - false => WPROT_A::VALUE1, - true => WPROT_A::VALUE2, + false => Wprot::Value1, + true => Wprot::Value2, } } #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROT_A::VALUE1 + *self == Wprot::Value1 } #[doc = "Region is write protected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROT_A::VALUE2 + *self == Wprot::Value2 } } #[doc = "Field `WPROT` writer - Memory Region Write Protect"] -pub type WPROT_W<'a, REG> = crate::BitWriter<'a, REG, WPROT_A>; -impl<'a, REG> WPROT_W<'a, REG> +pub type WprotW<'a, REG> = crate::BitWriter<'a, REG, Wprot>; +impl<'a, REG> WprotW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Region is enabled for write accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE1) + self.variant(Wprot::Value1) } #[doc = "Region is write protected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPROT_A::VALUE2) + self.variant(Wprot::Value2) } } impl R { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - pub fn regenab(&self) -> REGENAB_R { - REGENAB_R::new((self.bits & 1) != 0) + pub fn regenab(&self) -> RegenabR { + RegenabR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - pub fn altenab(&self) -> ALTENAB_R { - ALTENAB_R::new(((self.bits >> 1) & 1) != 0) + pub fn altenab(&self) -> AltenabR { + AltenabR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - pub fn wprot(&self) -> WPROT_R { - WPROT_R::new(((self.bits >> 2) & 1) != 0) + pub fn wprot(&self) -> WprotR { + WprotR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] #[must_use] - pub fn regenab(&mut self) -> REGENAB_W { - REGENAB_W::new(self, 0) + pub fn regenab(&mut self) -> RegenabW { + RegenabW::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] #[must_use] - pub fn altenab(&mut self) -> ALTENAB_W { - ALTENAB_W::new(self, 1) + pub fn altenab(&mut self) -> AltenabW { + AltenabW::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] #[must_use] - pub fn wprot(&mut self) -> WPROT_W { - WPROT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wprot(&mut self) -> WprotW { + WprotW::new(self, 2) } } #[doc = "EBU Address Select Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addrsel3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addrsel3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ADDRSEL3_SPEC; -impl crate::RegisterSpec for ADDRSEL3_SPEC { +pub struct Addrsel3Spec; +impl crate::RegisterSpec for Addrsel3Spec { type Ux = u32; } #[doc = "`read()` method returns [`addrsel3::R`](R) reader structure"] -impl crate::Readable for ADDRSEL3_SPEC {} +impl crate::Readable for Addrsel3Spec {} #[doc = "`write(|w| ..)` method takes [`addrsel3::W`](W) writer structure"] -impl crate::Writable for ADDRSEL3_SPEC { +impl crate::Writable for Addrsel3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ADDRSEL3 to value 0"] -impl crate::Resettable for ADDRSEL3_SPEC { +impl crate::Resettable for Addrsel3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu/busrap0.rs b/src/ebu/busrap0.rs index c433fa05..9a622635 100644 --- a/src/ebu/busrap0.rs +++ b/src/ebu/busrap0.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRAP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRAP0` writer"] -pub type W = crate::W; -#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] -pub type RDDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDDTACS_A { +pub enum Rddtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDDTACS_A) -> Self { + fn from(variant: Rddtacs) -> Self { variant as _ } } -impl crate::FieldSpec for RDDTACS_A { +impl crate::FieldSpec for Rddtacs { type Ux = u8; } -impl RDDTACS_R { +#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] +pub type RddtacsR = crate::FieldReader; +impl RddtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDDTACS_A::VALUE1), - 1 => Some(RDDTACS_A::VALUE2), - 14 => Some(RDDTACS_A::VALUE3), - 15 => Some(RDDTACS_A::VALUE4), + 0 => Some(Rddtacs::Value1), + 1 => Some(Rddtacs::Value2), + 14 => Some(Rddtacs::Value3), + 15 => Some(Rddtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDDTACS_A::VALUE1 + *self == Rddtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDDTACS_A::VALUE2 + *self == Rddtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDDTACS_A::VALUE3 + *self == Rddtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDDTACS_A::VALUE4 + *self == Rddtacs::Value4 } } #[doc = "Field `RDDTACS` writer - Recovery Cycles between Different Regions"] -pub type RDDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RDDTACS_A>; -impl<'a, REG> RDDTACS_W<'a, REG> +pub type RddtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rddtacs>; +impl<'a, REG> RddtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE1) + self.variant(Rddtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE2) + self.variant(Rddtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE3) + self.variant(Rddtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE4) + self.variant(Rddtacs::Value4) } } -#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Read Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDRECOVC_A { +pub enum Rdrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDRECOVC_A) -> Self { + fn from(variant: Rdrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for RDRECOVC_A { +impl crate::FieldSpec for Rdrecovc { type Ux = u8; } -impl RDRECOVC_R { +#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] +pub type RdrecovcR = crate::FieldReader; +impl RdrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDRECOVC_A::VALUE1), - 1 => Some(RDRECOVC_A::VALUE2), - 6 => Some(RDRECOVC_A::VALUE3), - 7 => Some(RDRECOVC_A::VALUE4), + 0 => Some(Rdrecovc::Value1), + 1 => Some(Rdrecovc::Value2), + 6 => Some(Rdrecovc::Value3), + 7 => Some(Rdrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDRECOVC_A::VALUE1 + *self == Rdrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDRECOVC_A::VALUE2 + *self == Rdrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDRECOVC_A::VALUE3 + *self == Rdrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDRECOVC_A::VALUE4 + *self == Rdrecovc::Value4 } } #[doc = "Field `RDRECOVC` writer - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RDRECOVC_A>; -impl<'a, REG> RDRECOVC_W<'a, REG> +pub type RdrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rdrecovc>; +impl<'a, REG> RdrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE1) + self.variant(Rdrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE2) + self.variant(Rdrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE3) + self.variant(Rdrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE4) + self.variant(Rdrecovc::Value4) } } -#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] -pub type WAITRDC_R = crate::FieldReader; #[doc = "Programmed Wait States for read accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITRDC_A { +pub enum Waitrdc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITRDC_A) -> Self { + fn from(variant: Waitrdc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITRDC_A { +impl crate::FieldSpec for Waitrdc { type Ux = u8; } -impl WAITRDC_R { +#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] +pub type WaitrdcR = crate::FieldReader; +impl WaitrdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITRDC_A::VALUE1), - 1 => Some(WAITRDC_A::VALUE2), - 2 => Some(WAITRDC_A::VALUE3), - 30 => Some(WAITRDC_A::VALUE4), - 31 => Some(WAITRDC_A::VALUE5), + 0 => Some(Waitrdc::Value1), + 1 => Some(Waitrdc::Value2), + 2 => Some(Waitrdc::Value3), + 30 => Some(Waitrdc::Value4), + 31 => Some(Waitrdc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITRDC_A::VALUE1 + *self == Waitrdc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITRDC_A::VALUE2 + *self == Waitrdc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITRDC_A::VALUE3 + *self == Waitrdc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITRDC_A::VALUE4 + *self == Waitrdc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITRDC_A::VALUE5 + *self == Waitrdc::Value5 } } #[doc = "Field `WAITRDC` writer - Programmed Wait States for read accesses"] -pub type WAITRDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITRDC_A>; -impl<'a, REG> WAITRDC_W<'a, REG> +pub type WaitrdcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitrdc>; +impl<'a, REG> WaitrdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,93 +247,93 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE1) + self.variant(Waitrdc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE2) + self.variant(Waitrdc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE3) + self.variant(Waitrdc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE4) + self.variant(Waitrdc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE5) + self.variant(Waitrdc::Value5) } } #[doc = "Field `DATAC` reader - Data Hold Cycles for Read Accesses"] -pub type DATAC_R = crate::FieldReader; +pub type DatacR = crate::FieldReader; #[doc = "Field `DATAC` writer - Data Hold Cycles for Read Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -341,84 +341,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -426,84 +426,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -511,84 +511,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -596,84 +596,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -681,150 +681,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn rddtacs(&self) -> RDDTACS_R { - RDDTACS_R::new((self.bits & 0x0f) as u8) + pub fn rddtacs(&self) -> RddtacsR { + RddtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - pub fn rdrecovc(&self) -> RDRECOVC_R { - RDRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn rdrecovc(&self) -> RdrecovcR { + RdrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - pub fn waitrdc(&self) -> WAITRDC_R { - WAITRDC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitrdc(&self) -> WaitrdcR { + WaitrdcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn rddtacs(&mut self) -> RDDTACS_W { - RDDTACS_W::new(self, 0) + pub fn rddtacs(&mut self) -> RddtacsW { + RddtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] #[must_use] - pub fn rdrecovc(&mut self) -> RDRECOVC_W { - RDRECOVC_W::new(self, 4) + pub fn rdrecovc(&mut self) -> RdrecovcW { + RdrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] #[must_use] - pub fn waitrdc(&mut self) -> WAITRDC_W { - WAITRDC_W::new(self, 7) + pub fn waitrdc(&mut self) -> WaitrdcW { + WaitrdcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRAP0_SPEC; -impl crate::RegisterSpec for BUSRAP0_SPEC { +pub struct Busrap0Spec; +impl crate::RegisterSpec for Busrap0Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrap0::R`](R) reader structure"] -impl crate::Readable for BUSRAP0_SPEC {} +impl crate::Readable for Busrap0Spec {} #[doc = "`write(|w| ..)` method takes [`busrap0::W`](W) writer structure"] -impl crate::Writable for BUSRAP0_SPEC { +impl crate::Writable for Busrap0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRAP0 to value 0xffff_ffff"] -impl crate::Resettable for BUSRAP0_SPEC { +impl crate::Resettable for Busrap0Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/busrap1.rs b/src/ebu/busrap1.rs index ef364a0f..68a727c5 100644 --- a/src/ebu/busrap1.rs +++ b/src/ebu/busrap1.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRAP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRAP1` writer"] -pub type W = crate::W; -#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] -pub type RDDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDDTACS_A { +pub enum Rddtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDDTACS_A) -> Self { + fn from(variant: Rddtacs) -> Self { variant as _ } } -impl crate::FieldSpec for RDDTACS_A { +impl crate::FieldSpec for Rddtacs { type Ux = u8; } -impl RDDTACS_R { +#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] +pub type RddtacsR = crate::FieldReader; +impl RddtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDDTACS_A::VALUE1), - 1 => Some(RDDTACS_A::VALUE2), - 14 => Some(RDDTACS_A::VALUE3), - 15 => Some(RDDTACS_A::VALUE4), + 0 => Some(Rddtacs::Value1), + 1 => Some(Rddtacs::Value2), + 14 => Some(Rddtacs::Value3), + 15 => Some(Rddtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDDTACS_A::VALUE1 + *self == Rddtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDDTACS_A::VALUE2 + *self == Rddtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDDTACS_A::VALUE3 + *self == Rddtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDDTACS_A::VALUE4 + *self == Rddtacs::Value4 } } #[doc = "Field `RDDTACS` writer - Recovery Cycles between Different Regions"] -pub type RDDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RDDTACS_A>; -impl<'a, REG> RDDTACS_W<'a, REG> +pub type RddtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rddtacs>; +impl<'a, REG> RddtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE1) + self.variant(Rddtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE2) + self.variant(Rddtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE3) + self.variant(Rddtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE4) + self.variant(Rddtacs::Value4) } } -#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Read Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDRECOVC_A { +pub enum Rdrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDRECOVC_A) -> Self { + fn from(variant: Rdrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for RDRECOVC_A { +impl crate::FieldSpec for Rdrecovc { type Ux = u8; } -impl RDRECOVC_R { +#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] +pub type RdrecovcR = crate::FieldReader; +impl RdrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDRECOVC_A::VALUE1), - 1 => Some(RDRECOVC_A::VALUE2), - 6 => Some(RDRECOVC_A::VALUE3), - 7 => Some(RDRECOVC_A::VALUE4), + 0 => Some(Rdrecovc::Value1), + 1 => Some(Rdrecovc::Value2), + 6 => Some(Rdrecovc::Value3), + 7 => Some(Rdrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDRECOVC_A::VALUE1 + *self == Rdrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDRECOVC_A::VALUE2 + *self == Rdrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDRECOVC_A::VALUE3 + *self == Rdrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDRECOVC_A::VALUE4 + *self == Rdrecovc::Value4 } } #[doc = "Field `RDRECOVC` writer - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RDRECOVC_A>; -impl<'a, REG> RDRECOVC_W<'a, REG> +pub type RdrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rdrecovc>; +impl<'a, REG> RdrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE1) + self.variant(Rdrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE2) + self.variant(Rdrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE3) + self.variant(Rdrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE4) + self.variant(Rdrecovc::Value4) } } -#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] -pub type WAITRDC_R = crate::FieldReader; #[doc = "Programmed Wait States for read accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITRDC_A { +pub enum Waitrdc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITRDC_A) -> Self { + fn from(variant: Waitrdc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITRDC_A { +impl crate::FieldSpec for Waitrdc { type Ux = u8; } -impl WAITRDC_R { +#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] +pub type WaitrdcR = crate::FieldReader; +impl WaitrdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITRDC_A::VALUE1), - 1 => Some(WAITRDC_A::VALUE2), - 2 => Some(WAITRDC_A::VALUE3), - 30 => Some(WAITRDC_A::VALUE4), - 31 => Some(WAITRDC_A::VALUE5), + 0 => Some(Waitrdc::Value1), + 1 => Some(Waitrdc::Value2), + 2 => Some(Waitrdc::Value3), + 30 => Some(Waitrdc::Value4), + 31 => Some(Waitrdc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITRDC_A::VALUE1 + *self == Waitrdc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITRDC_A::VALUE2 + *self == Waitrdc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITRDC_A::VALUE3 + *self == Waitrdc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITRDC_A::VALUE4 + *self == Waitrdc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITRDC_A::VALUE5 + *self == Waitrdc::Value5 } } #[doc = "Field `WAITRDC` writer - Programmed Wait States for read accesses"] -pub type WAITRDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITRDC_A>; -impl<'a, REG> WAITRDC_W<'a, REG> +pub type WaitrdcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitrdc>; +impl<'a, REG> WaitrdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,93 +247,93 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE1) + self.variant(Waitrdc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE2) + self.variant(Waitrdc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE3) + self.variant(Waitrdc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE4) + self.variant(Waitrdc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE5) + self.variant(Waitrdc::Value5) } } #[doc = "Field `DATAC` reader - Data Hold Cycles for Read Accesses"] -pub type DATAC_R = crate::FieldReader; +pub type DatacR = crate::FieldReader; #[doc = "Field `DATAC` writer - Data Hold Cycles for Read Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -341,84 +341,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -426,84 +426,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -511,84 +511,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -596,84 +596,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -681,150 +681,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn rddtacs(&self) -> RDDTACS_R { - RDDTACS_R::new((self.bits & 0x0f) as u8) + pub fn rddtacs(&self) -> RddtacsR { + RddtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - pub fn rdrecovc(&self) -> RDRECOVC_R { - RDRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn rdrecovc(&self) -> RdrecovcR { + RdrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - pub fn waitrdc(&self) -> WAITRDC_R { - WAITRDC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitrdc(&self) -> WaitrdcR { + WaitrdcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn rddtacs(&mut self) -> RDDTACS_W { - RDDTACS_W::new(self, 0) + pub fn rddtacs(&mut self) -> RddtacsW { + RddtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] #[must_use] - pub fn rdrecovc(&mut self) -> RDRECOVC_W { - RDRECOVC_W::new(self, 4) + pub fn rdrecovc(&mut self) -> RdrecovcW { + RdrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] #[must_use] - pub fn waitrdc(&mut self) -> WAITRDC_W { - WAITRDC_W::new(self, 7) + pub fn waitrdc(&mut self) -> WaitrdcW { + WaitrdcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRAP1_SPEC; -impl crate::RegisterSpec for BUSRAP1_SPEC { +pub struct Busrap1Spec; +impl crate::RegisterSpec for Busrap1Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrap1::R`](R) reader structure"] -impl crate::Readable for BUSRAP1_SPEC {} +impl crate::Readable for Busrap1Spec {} #[doc = "`write(|w| ..)` method takes [`busrap1::W`](W) writer structure"] -impl crate::Writable for BUSRAP1_SPEC { +impl crate::Writable for Busrap1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRAP1 to value 0xffff_ffff"] -impl crate::Resettable for BUSRAP1_SPEC { +impl crate::Resettable for Busrap1Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/busrap2.rs b/src/ebu/busrap2.rs index d1715dff..9136517b 100644 --- a/src/ebu/busrap2.rs +++ b/src/ebu/busrap2.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRAP2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRAP2` writer"] -pub type W = crate::W; -#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] -pub type RDDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDDTACS_A { +pub enum Rddtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDDTACS_A) -> Self { + fn from(variant: Rddtacs) -> Self { variant as _ } } -impl crate::FieldSpec for RDDTACS_A { +impl crate::FieldSpec for Rddtacs { type Ux = u8; } -impl RDDTACS_R { +#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] +pub type RddtacsR = crate::FieldReader; +impl RddtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDDTACS_A::VALUE1), - 1 => Some(RDDTACS_A::VALUE2), - 14 => Some(RDDTACS_A::VALUE3), - 15 => Some(RDDTACS_A::VALUE4), + 0 => Some(Rddtacs::Value1), + 1 => Some(Rddtacs::Value2), + 14 => Some(Rddtacs::Value3), + 15 => Some(Rddtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDDTACS_A::VALUE1 + *self == Rddtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDDTACS_A::VALUE2 + *self == Rddtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDDTACS_A::VALUE3 + *self == Rddtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDDTACS_A::VALUE4 + *self == Rddtacs::Value4 } } #[doc = "Field `RDDTACS` writer - Recovery Cycles between Different Regions"] -pub type RDDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RDDTACS_A>; -impl<'a, REG> RDDTACS_W<'a, REG> +pub type RddtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rddtacs>; +impl<'a, REG> RddtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE1) + self.variant(Rddtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE2) + self.variant(Rddtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE3) + self.variant(Rddtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE4) + self.variant(Rddtacs::Value4) } } -#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Read Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDRECOVC_A { +pub enum Rdrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDRECOVC_A) -> Self { + fn from(variant: Rdrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for RDRECOVC_A { +impl crate::FieldSpec for Rdrecovc { type Ux = u8; } -impl RDRECOVC_R { +#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] +pub type RdrecovcR = crate::FieldReader; +impl RdrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDRECOVC_A::VALUE1), - 1 => Some(RDRECOVC_A::VALUE2), - 6 => Some(RDRECOVC_A::VALUE3), - 7 => Some(RDRECOVC_A::VALUE4), + 0 => Some(Rdrecovc::Value1), + 1 => Some(Rdrecovc::Value2), + 6 => Some(Rdrecovc::Value3), + 7 => Some(Rdrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDRECOVC_A::VALUE1 + *self == Rdrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDRECOVC_A::VALUE2 + *self == Rdrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDRECOVC_A::VALUE3 + *self == Rdrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDRECOVC_A::VALUE4 + *self == Rdrecovc::Value4 } } #[doc = "Field `RDRECOVC` writer - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RDRECOVC_A>; -impl<'a, REG> RDRECOVC_W<'a, REG> +pub type RdrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rdrecovc>; +impl<'a, REG> RdrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE1) + self.variant(Rdrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE2) + self.variant(Rdrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE3) + self.variant(Rdrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE4) + self.variant(Rdrecovc::Value4) } } -#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] -pub type WAITRDC_R = crate::FieldReader; #[doc = "Programmed Wait States for read accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITRDC_A { +pub enum Waitrdc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITRDC_A) -> Self { + fn from(variant: Waitrdc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITRDC_A { +impl crate::FieldSpec for Waitrdc { type Ux = u8; } -impl WAITRDC_R { +#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] +pub type WaitrdcR = crate::FieldReader; +impl WaitrdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITRDC_A::VALUE1), - 1 => Some(WAITRDC_A::VALUE2), - 2 => Some(WAITRDC_A::VALUE3), - 30 => Some(WAITRDC_A::VALUE4), - 31 => Some(WAITRDC_A::VALUE5), + 0 => Some(Waitrdc::Value1), + 1 => Some(Waitrdc::Value2), + 2 => Some(Waitrdc::Value3), + 30 => Some(Waitrdc::Value4), + 31 => Some(Waitrdc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITRDC_A::VALUE1 + *self == Waitrdc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITRDC_A::VALUE2 + *self == Waitrdc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITRDC_A::VALUE3 + *self == Waitrdc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITRDC_A::VALUE4 + *self == Waitrdc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITRDC_A::VALUE5 + *self == Waitrdc::Value5 } } #[doc = "Field `WAITRDC` writer - Programmed Wait States for read accesses"] -pub type WAITRDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITRDC_A>; -impl<'a, REG> WAITRDC_W<'a, REG> +pub type WaitrdcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitrdc>; +impl<'a, REG> WaitrdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,93 +247,93 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE1) + self.variant(Waitrdc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE2) + self.variant(Waitrdc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE3) + self.variant(Waitrdc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE4) + self.variant(Waitrdc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE5) + self.variant(Waitrdc::Value5) } } #[doc = "Field `DATAC` reader - Data Hold Cycles for Read Accesses"] -pub type DATAC_R = crate::FieldReader; +pub type DatacR = crate::FieldReader; #[doc = "Field `DATAC` writer - Data Hold Cycles for Read Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -341,84 +341,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -426,84 +426,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -511,84 +511,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -596,84 +596,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -681,150 +681,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn rddtacs(&self) -> RDDTACS_R { - RDDTACS_R::new((self.bits & 0x0f) as u8) + pub fn rddtacs(&self) -> RddtacsR { + RddtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - pub fn rdrecovc(&self) -> RDRECOVC_R { - RDRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn rdrecovc(&self) -> RdrecovcR { + RdrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - pub fn waitrdc(&self) -> WAITRDC_R { - WAITRDC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitrdc(&self) -> WaitrdcR { + WaitrdcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn rddtacs(&mut self) -> RDDTACS_W { - RDDTACS_W::new(self, 0) + pub fn rddtacs(&mut self) -> RddtacsW { + RddtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] #[must_use] - pub fn rdrecovc(&mut self) -> RDRECOVC_W { - RDRECOVC_W::new(self, 4) + pub fn rdrecovc(&mut self) -> RdrecovcW { + RdrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] #[must_use] - pub fn waitrdc(&mut self) -> WAITRDC_W { - WAITRDC_W::new(self, 7) + pub fn waitrdc(&mut self) -> WaitrdcW { + WaitrdcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRAP2_SPEC; -impl crate::RegisterSpec for BUSRAP2_SPEC { +pub struct Busrap2Spec; +impl crate::RegisterSpec for Busrap2Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrap2::R`](R) reader structure"] -impl crate::Readable for BUSRAP2_SPEC {} +impl crate::Readable for Busrap2Spec {} #[doc = "`write(|w| ..)` method takes [`busrap2::W`](W) writer structure"] -impl crate::Writable for BUSRAP2_SPEC { +impl crate::Writable for Busrap2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRAP2 to value 0xffff_ffff"] -impl crate::Resettable for BUSRAP2_SPEC { +impl crate::Resettable for Busrap2Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/busrap3.rs b/src/ebu/busrap3.rs index 3a04b3b8..e828b7b6 100644 --- a/src/ebu/busrap3.rs +++ b/src/ebu/busrap3.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRAP3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRAP3` writer"] -pub type W = crate::W; -#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] -pub type RDDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDDTACS_A { +pub enum Rddtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDDTACS_A) -> Self { + fn from(variant: Rddtacs) -> Self { variant as _ } } -impl crate::FieldSpec for RDDTACS_A { +impl crate::FieldSpec for Rddtacs { type Ux = u8; } -impl RDDTACS_R { +#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"] +pub type RddtacsR = crate::FieldReader; +impl RddtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDDTACS_A::VALUE1), - 1 => Some(RDDTACS_A::VALUE2), - 14 => Some(RDDTACS_A::VALUE3), - 15 => Some(RDDTACS_A::VALUE4), + 0 => Some(Rddtacs::Value1), + 1 => Some(Rddtacs::Value2), + 14 => Some(Rddtacs::Value3), + 15 => Some(Rddtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDDTACS_A::VALUE1 + *self == Rddtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDDTACS_A::VALUE2 + *self == Rddtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDDTACS_A::VALUE3 + *self == Rddtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDDTACS_A::VALUE4 + *self == Rddtacs::Value4 } } #[doc = "Field `RDDTACS` writer - Recovery Cycles between Different Regions"] -pub type RDDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RDDTACS_A>; -impl<'a, REG> RDDTACS_W<'a, REG> +pub type RddtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rddtacs>; +impl<'a, REG> RddtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE1) + self.variant(Rddtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE2) + self.variant(Rddtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE3) + self.variant(Rddtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDDTACS_A::VALUE4) + self.variant(Rddtacs::Value4) } } -#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Read Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RDRECOVC_A { +pub enum Rdrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RDRECOVC_A) -> Self { + fn from(variant: Rdrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for RDRECOVC_A { +impl crate::FieldSpec for Rdrecovc { type Ux = u8; } -impl RDRECOVC_R { +#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"] +pub type RdrecovcR = crate::FieldReader; +impl RdrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RDRECOVC_A::VALUE1), - 1 => Some(RDRECOVC_A::VALUE2), - 6 => Some(RDRECOVC_A::VALUE3), - 7 => Some(RDRECOVC_A::VALUE4), + 0 => Some(Rdrecovc::Value1), + 1 => Some(Rdrecovc::Value2), + 6 => Some(Rdrecovc::Value3), + 7 => Some(Rdrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDRECOVC_A::VALUE1 + *self == Rdrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDRECOVC_A::VALUE2 + *self == Rdrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RDRECOVC_A::VALUE3 + *self == Rdrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RDRECOVC_A::VALUE4 + *self == Rdrecovc::Value4 } } #[doc = "Field `RDRECOVC` writer - Recovery Cycles after Read Accesses"] -pub type RDRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RDRECOVC_A>; -impl<'a, REG> RDRECOVC_W<'a, REG> +pub type RdrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rdrecovc>; +impl<'a, REG> RdrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE1) + self.variant(Rdrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE2) + self.variant(Rdrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE3) + self.variant(Rdrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RDRECOVC_A::VALUE4) + self.variant(Rdrecovc::Value4) } } -#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] -pub type WAITRDC_R = crate::FieldReader; #[doc = "Programmed Wait States for read accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITRDC_A { +pub enum Waitrdc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITRDC_A) -> Self { + fn from(variant: Waitrdc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITRDC_A { +impl crate::FieldSpec for Waitrdc { type Ux = u8; } -impl WAITRDC_R { +#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"] +pub type WaitrdcR = crate::FieldReader; +impl WaitrdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITRDC_A::VALUE1), - 1 => Some(WAITRDC_A::VALUE2), - 2 => Some(WAITRDC_A::VALUE3), - 30 => Some(WAITRDC_A::VALUE4), - 31 => Some(WAITRDC_A::VALUE5), + 0 => Some(Waitrdc::Value1), + 1 => Some(Waitrdc::Value2), + 2 => Some(Waitrdc::Value3), + 30 => Some(Waitrdc::Value4), + 31 => Some(Waitrdc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITRDC_A::VALUE1 + *self == Waitrdc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITRDC_A::VALUE2 + *self == Waitrdc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITRDC_A::VALUE3 + *self == Waitrdc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITRDC_A::VALUE4 + *self == Waitrdc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITRDC_A::VALUE5 + *self == Waitrdc::Value5 } } #[doc = "Field `WAITRDC` writer - Programmed Wait States for read accesses"] -pub type WAITRDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITRDC_A>; -impl<'a, REG> WAITRDC_W<'a, REG> +pub type WaitrdcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitrdc>; +impl<'a, REG> WaitrdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,93 +247,93 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE1) + self.variant(Waitrdc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE2) + self.variant(Waitrdc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE3) + self.variant(Waitrdc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE4) + self.variant(Waitrdc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITRDC_A::VALUE5) + self.variant(Waitrdc::Value5) } } #[doc = "Field `DATAC` reader - Data Hold Cycles for Read Accesses"] -pub type DATAC_R = crate::FieldReader; +pub type DatacR = crate::FieldReader; #[doc = "Field `DATAC` writer - Data Hold Cycles for Read Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -341,84 +341,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -426,84 +426,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -511,84 +511,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -596,84 +596,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -681,150 +681,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn rddtacs(&self) -> RDDTACS_R { - RDDTACS_R::new((self.bits & 0x0f) as u8) + pub fn rddtacs(&self) -> RddtacsR { + RddtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - pub fn rdrecovc(&self) -> RDRECOVC_R { - RDRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn rdrecovc(&self) -> RdrecovcR { + RdrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - pub fn waitrdc(&self) -> WAITRDC_R { - WAITRDC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitrdc(&self) -> WaitrdcR { + WaitrdcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn rddtacs(&mut self) -> RDDTACS_W { - RDDTACS_W::new(self, 0) + pub fn rddtacs(&mut self) -> RddtacsW { + RddtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] #[must_use] - pub fn rdrecovc(&mut self) -> RDRECOVC_W { - RDRECOVC_W::new(self, 4) + pub fn rdrecovc(&mut self) -> RdrecovcW { + RdrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] #[must_use] - pub fn waitrdc(&mut self) -> WAITRDC_W { - WAITRDC_W::new(self, 7) + pub fn waitrdc(&mut self) -> WaitrdcW { + WaitrdcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrap3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrap3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRAP3_SPEC; -impl crate::RegisterSpec for BUSRAP3_SPEC { +pub struct Busrap3Spec; +impl crate::RegisterSpec for Busrap3Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrap3::R`](R) reader structure"] -impl crate::Readable for BUSRAP3_SPEC {} +impl crate::Readable for Busrap3Spec {} #[doc = "`write(|w| ..)` method takes [`busrap3::W`](W) writer structure"] -impl crate::Writable for BUSRAP3_SPEC { +impl crate::Writable for Busrap3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRAP3 to value 0xffff_ffff"] -impl crate::Resettable for BUSRAP3_SPEC { +impl crate::Resettable for Busrap3Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/busrcon0.rs b/src/ebu/busrcon0.rs index 2b29a50e..0988c64f 100644 --- a/src/ebu/busrcon0.rs +++ b/src/ebu/busrcon0.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRCON0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRCON0` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,504 +69,504 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction is transferred in a single burst."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } -#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] -pub type BFSSS_R = crate::BitReader; #[doc = "Read Single Stage Synchronization:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFSSS_A { +pub enum Bfsss { #[doc = "0: Two stages of synchronization used. (maximum margin)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One stage of synchronization used. (minimum latency)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFSSS_A) -> Self { + fn from(variant: Bfsss) -> Self { variant as u8 != 0 } } -impl BFSSS_R { +#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] +pub type BfsssR = crate::BitReader; +impl BfsssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFSSS_A { + pub const fn variant(&self) -> Bfsss { match self.bits { - false => BFSSS_A::VALUE1, - true => BFSSS_A::VALUE2, + false => Bfsss::Value1, + true => Bfsss::Value2, } } #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFSSS_A::VALUE1 + *self == Bfsss::Value1 } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFSSS_A::VALUE2 + *self == Bfsss::Value2 } } #[doc = "Field `BFSSS` writer - Read Single Stage Synchronization:"] -pub type BFSSS_W<'a, REG> = crate::BitWriter<'a, REG, BFSSS_A>; -impl<'a, REG> BFSSS_W<'a, REG> +pub type BfsssW<'a, REG> = crate::BitWriter<'a, REG, Bfsss>; +impl<'a, REG> BfsssW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE1) + self.variant(Bfsss::Value1) } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE2) + self.variant(Bfsss::Value2) } } -#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_R = crate::BitReader; #[doc = "Burst FLASH Clock Feedback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FDBKEN_A { +pub enum Fdbken { #[doc = "0: BFCLK feedback not used."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FDBKEN_A) -> Self { + fn from(variant: Fdbken) -> Self { variant as u8 != 0 } } -impl FDBKEN_R { +#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] +pub type FdbkenR = crate::BitReader; +impl FdbkenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FDBKEN_A { + pub const fn variant(&self) -> Fdbken { match self.bits { - false => FDBKEN_A::VALUE1, - true => FDBKEN_A::VALUE2, + false => Fdbken::Value1, + true => Fdbken::Value2, } } #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FDBKEN_A::VALUE1 + *self == Fdbken::Value1 } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FDBKEN_A::VALUE2 + *self == Fdbken::Value2 } } #[doc = "Field `FDBKEN` writer - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_W<'a, REG> = crate::BitWriter<'a, REG, FDBKEN_A>; -impl<'a, REG> FDBKEN_W<'a, REG> +pub type FdbkenW<'a, REG> = crate::BitWriter<'a, REG, Fdbken>; +impl<'a, REG> FdbkenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE1) + self.variant(Fdbken::Value1) } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE2) + self.variant(Fdbken::Value2) } } -#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] -pub type BFCMSEL_R = crate::BitReader; #[doc = "Burst Flash Clock Mode Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFCMSEL_A { +pub enum Bfcmsel { #[doc = "0: Burst Flash Clock runs continuously with values selected by this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Burst Flash Clock is disabled between accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFCMSEL_A) -> Self { + fn from(variant: Bfcmsel) -> Self { variant as u8 != 0 } } -impl BFCMSEL_R { +#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] +pub type BfcmselR = crate::BitReader; +impl BfcmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFCMSEL_A { + pub const fn variant(&self) -> Bfcmsel { match self.bits { - false => BFCMSEL_A::VALUE1, - true => BFCMSEL_A::VALUE2, + false => Bfcmsel::Value1, + true => Bfcmsel::Value2, } } #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFCMSEL_A::VALUE1 + *self == Bfcmsel::Value1 } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFCMSEL_A::VALUE2 + *self == Bfcmsel::Value2 } } #[doc = "Field `BFCMSEL` writer - Burst Flash Clock Mode Select"] -pub type BFCMSEL_W<'a, REG> = crate::BitWriter<'a, REG, BFCMSEL_A>; -impl<'a, REG> BFCMSEL_W<'a, REG> +pub type BfcmselW<'a, REG> = crate::BitWriter<'a, REG, Bfcmsel>; +impl<'a, REG> BfcmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE1) + self.variant(Bfcmsel::Value1) } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE2) + self.variant(Bfcmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Field `NAA` writer - Enable flash non-array access workaround"] -pub type NAA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] -pub type DBA_R = crate::BitReader; #[doc = "Disable Burst Address Wrapping\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBA_A { +pub enum Dba { #[doc = "0: Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBA_A) -> Self { + fn from(variant: Dba) -> Self { variant as u8 != 0 } } -impl DBA_R { +#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] +pub type DbaR = crate::BitReader; +impl DbaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBA_A { + pub const fn variant(&self) -> Dba { match self.bits { - false => DBA_A::VALUE1, - true => DBA_A::VALUE2, + false => Dba::Value1, + true => Dba::Value2, } } #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBA_A::VALUE1 + *self == Dba::Value1 } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBA_A::VALUE2 + *self == Dba::Value2 } } #[doc = "Field `DBA` writer - Disable Burst Address Wrapping"] -pub type DBA_W<'a, REG> = crate::BitWriter<'a, REG, DBA_A>; -impl<'a, REG> DBA_W<'a, REG> +pub type DbaW<'a, REG> = crate::BitWriter<'a, REG, Dba>; +impl<'a, REG> DbaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE1) + self.variant(Dba::Value1) } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE2) + self.variant(Dba::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -574,276 +574,267 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `PORTW` writer - Device Addressing Mode"] -pub type PORTW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PortwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - pub fn bfsss(&self) -> BFSSS_R { - BFSSS_R::new(((self.bits >> 4) & 1) != 0) + pub fn bfsss(&self) -> BfsssR { + BfsssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - pub fn fdbken(&self) -> FDBKEN_R { - FDBKEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn fdbken(&self) -> FdbkenR { + FdbkenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - pub fn bfcmsel(&self) -> BFCMSEL_R { - BFCMSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn bfcmsel(&self) -> BfcmselR { + BfcmselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - pub fn dba(&self) -> DBA_R { - DBA_R::new(((self.bits >> 18) & 1) != 0) + pub fn dba(&self) -> DbaR { + DbaR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] #[must_use] - pub fn bfsss(&mut self) -> BFSSS_W { - BFSSS_W::new(self, 4) + pub fn bfsss(&mut self) -> BfsssW { + BfsssW::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] #[must_use] - pub fn fdbken(&mut self) -> FDBKEN_W { - FDBKEN_W::new(self, 5) + pub fn fdbken(&mut self) -> FdbkenW { + FdbkenW::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] #[must_use] - pub fn bfcmsel(&mut self) -> BFCMSEL_W { - BFCMSEL_W::new(self, 6) + pub fn bfcmsel(&mut self) -> BfcmselW { + BfcmselW::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] #[must_use] - pub fn naa(&mut self) -> NAA_W { - NAA_W::new(self, 7) + pub fn naa(&mut self) -> NaaW { + NaaW::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] #[must_use] - pub fn dba(&mut self) -> DBA_W { - DBA_W::new(self, 18) + pub fn dba(&mut self) -> DbaW { + DbaW::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] #[must_use] - pub fn portw(&mut self) -> PORTW_W { - PORTW_W::new(self, 22) + pub fn portw(&mut self) -> PortwW { + PortwW::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRCON0_SPEC; -impl crate::RegisterSpec for BUSRCON0_SPEC { +pub struct Busrcon0Spec; +impl crate::RegisterSpec for Busrcon0Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrcon0::R`](R) reader structure"] -impl crate::Readable for BUSRCON0_SPEC {} +impl crate::Readable for Busrcon0Spec {} #[doc = "`write(|w| ..)` method takes [`busrcon0::W`](W) writer structure"] -impl crate::Writable for BUSRCON0_SPEC { +impl crate::Writable for Busrcon0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRCON0 to value 0x00d3_0040"] -impl crate::Resettable for BUSRCON0_SPEC { +impl crate::Resettable for Busrcon0Spec { const RESET_VALUE: u32 = 0x00d3_0040; } diff --git a/src/ebu/busrcon1.rs b/src/ebu/busrcon1.rs index d883c3b8..875fcbc4 100644 --- a/src/ebu/busrcon1.rs +++ b/src/ebu/busrcon1.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRCON1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRCON1` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,504 +69,504 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction is transferred in a single burst."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } -#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] -pub type BFSSS_R = crate::BitReader; #[doc = "Read Single Stage Synchronization:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFSSS_A { +pub enum Bfsss { #[doc = "0: Two stages of synchronization used. (maximum margin)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One stage of synchronization used. (minimum latency)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFSSS_A) -> Self { + fn from(variant: Bfsss) -> Self { variant as u8 != 0 } } -impl BFSSS_R { +#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] +pub type BfsssR = crate::BitReader; +impl BfsssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFSSS_A { + pub const fn variant(&self) -> Bfsss { match self.bits { - false => BFSSS_A::VALUE1, - true => BFSSS_A::VALUE2, + false => Bfsss::Value1, + true => Bfsss::Value2, } } #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFSSS_A::VALUE1 + *self == Bfsss::Value1 } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFSSS_A::VALUE2 + *self == Bfsss::Value2 } } #[doc = "Field `BFSSS` writer - Read Single Stage Synchronization:"] -pub type BFSSS_W<'a, REG> = crate::BitWriter<'a, REG, BFSSS_A>; -impl<'a, REG> BFSSS_W<'a, REG> +pub type BfsssW<'a, REG> = crate::BitWriter<'a, REG, Bfsss>; +impl<'a, REG> BfsssW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE1) + self.variant(Bfsss::Value1) } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE2) + self.variant(Bfsss::Value2) } } -#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_R = crate::BitReader; #[doc = "Burst FLASH Clock Feedback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FDBKEN_A { +pub enum Fdbken { #[doc = "0: BFCLK feedback not used."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FDBKEN_A) -> Self { + fn from(variant: Fdbken) -> Self { variant as u8 != 0 } } -impl FDBKEN_R { +#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] +pub type FdbkenR = crate::BitReader; +impl FdbkenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FDBKEN_A { + pub const fn variant(&self) -> Fdbken { match self.bits { - false => FDBKEN_A::VALUE1, - true => FDBKEN_A::VALUE2, + false => Fdbken::Value1, + true => Fdbken::Value2, } } #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FDBKEN_A::VALUE1 + *self == Fdbken::Value1 } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FDBKEN_A::VALUE2 + *self == Fdbken::Value2 } } #[doc = "Field `FDBKEN` writer - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_W<'a, REG> = crate::BitWriter<'a, REG, FDBKEN_A>; -impl<'a, REG> FDBKEN_W<'a, REG> +pub type FdbkenW<'a, REG> = crate::BitWriter<'a, REG, Fdbken>; +impl<'a, REG> FdbkenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE1) + self.variant(Fdbken::Value1) } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE2) + self.variant(Fdbken::Value2) } } -#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] -pub type BFCMSEL_R = crate::BitReader; #[doc = "Burst Flash Clock Mode Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFCMSEL_A { +pub enum Bfcmsel { #[doc = "0: Burst Flash Clock runs continuously with values selected by this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Burst Flash Clock is disabled between accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFCMSEL_A) -> Self { + fn from(variant: Bfcmsel) -> Self { variant as u8 != 0 } } -impl BFCMSEL_R { +#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] +pub type BfcmselR = crate::BitReader; +impl BfcmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFCMSEL_A { + pub const fn variant(&self) -> Bfcmsel { match self.bits { - false => BFCMSEL_A::VALUE1, - true => BFCMSEL_A::VALUE2, + false => Bfcmsel::Value1, + true => Bfcmsel::Value2, } } #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFCMSEL_A::VALUE1 + *self == Bfcmsel::Value1 } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFCMSEL_A::VALUE2 + *self == Bfcmsel::Value2 } } #[doc = "Field `BFCMSEL` writer - Burst Flash Clock Mode Select"] -pub type BFCMSEL_W<'a, REG> = crate::BitWriter<'a, REG, BFCMSEL_A>; -impl<'a, REG> BFCMSEL_W<'a, REG> +pub type BfcmselW<'a, REG> = crate::BitWriter<'a, REG, Bfcmsel>; +impl<'a, REG> BfcmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE1) + self.variant(Bfcmsel::Value1) } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE2) + self.variant(Bfcmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Field `NAA` writer - Enable flash non-array access workaround"] -pub type NAA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] -pub type DBA_R = crate::BitReader; #[doc = "Disable Burst Address Wrapping\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBA_A { +pub enum Dba { #[doc = "0: Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBA_A) -> Self { + fn from(variant: Dba) -> Self { variant as u8 != 0 } } -impl DBA_R { +#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] +pub type DbaR = crate::BitReader; +impl DbaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBA_A { + pub const fn variant(&self) -> Dba { match self.bits { - false => DBA_A::VALUE1, - true => DBA_A::VALUE2, + false => Dba::Value1, + true => Dba::Value2, } } #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBA_A::VALUE1 + *self == Dba::Value1 } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBA_A::VALUE2 + *self == Dba::Value2 } } #[doc = "Field `DBA` writer - Disable Burst Address Wrapping"] -pub type DBA_W<'a, REG> = crate::BitWriter<'a, REG, DBA_A>; -impl<'a, REG> DBA_W<'a, REG> +pub type DbaW<'a, REG> = crate::BitWriter<'a, REG, Dba>; +impl<'a, REG> DbaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE1) + self.variant(Dba::Value1) } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE2) + self.variant(Dba::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -574,276 +574,267 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `PORTW` writer - Device Addressing Mode"] -pub type PORTW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PortwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - pub fn bfsss(&self) -> BFSSS_R { - BFSSS_R::new(((self.bits >> 4) & 1) != 0) + pub fn bfsss(&self) -> BfsssR { + BfsssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - pub fn fdbken(&self) -> FDBKEN_R { - FDBKEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn fdbken(&self) -> FdbkenR { + FdbkenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - pub fn bfcmsel(&self) -> BFCMSEL_R { - BFCMSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn bfcmsel(&self) -> BfcmselR { + BfcmselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - pub fn dba(&self) -> DBA_R { - DBA_R::new(((self.bits >> 18) & 1) != 0) + pub fn dba(&self) -> DbaR { + DbaR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] #[must_use] - pub fn bfsss(&mut self) -> BFSSS_W { - BFSSS_W::new(self, 4) + pub fn bfsss(&mut self) -> BfsssW { + BfsssW::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] #[must_use] - pub fn fdbken(&mut self) -> FDBKEN_W { - FDBKEN_W::new(self, 5) + pub fn fdbken(&mut self) -> FdbkenW { + FdbkenW::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] #[must_use] - pub fn bfcmsel(&mut self) -> BFCMSEL_W { - BFCMSEL_W::new(self, 6) + pub fn bfcmsel(&mut self) -> BfcmselW { + BfcmselW::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] #[must_use] - pub fn naa(&mut self) -> NAA_W { - NAA_W::new(self, 7) + pub fn naa(&mut self) -> NaaW { + NaaW::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] #[must_use] - pub fn dba(&mut self) -> DBA_W { - DBA_W::new(self, 18) + pub fn dba(&mut self) -> DbaW { + DbaW::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] #[must_use] - pub fn portw(&mut self) -> PORTW_W { - PORTW_W::new(self, 22) + pub fn portw(&mut self) -> PortwW { + PortwW::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRCON1_SPEC; -impl crate::RegisterSpec for BUSRCON1_SPEC { +pub struct Busrcon1Spec; +impl crate::RegisterSpec for Busrcon1Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrcon1::R`](R) reader structure"] -impl crate::Readable for BUSRCON1_SPEC {} +impl crate::Readable for Busrcon1Spec {} #[doc = "`write(|w| ..)` method takes [`busrcon1::W`](W) writer structure"] -impl crate::Writable for BUSRCON1_SPEC { +impl crate::Writable for Busrcon1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRCON1 to value 0x00d3_0040"] -impl crate::Resettable for BUSRCON1_SPEC { +impl crate::Resettable for Busrcon1Spec { const RESET_VALUE: u32 = 0x00d3_0040; } diff --git a/src/ebu/busrcon2.rs b/src/ebu/busrcon2.rs index ce8bc1b2..2ec09d91 100644 --- a/src/ebu/busrcon2.rs +++ b/src/ebu/busrcon2.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRCON2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRCON2` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,504 +69,504 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction is transferred in a single burst."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } -#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] -pub type BFSSS_R = crate::BitReader; #[doc = "Read Single Stage Synchronization:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFSSS_A { +pub enum Bfsss { #[doc = "0: Two stages of synchronization used. (maximum margin)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One stage of synchronization used. (minimum latency)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFSSS_A) -> Self { + fn from(variant: Bfsss) -> Self { variant as u8 != 0 } } -impl BFSSS_R { +#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] +pub type BfsssR = crate::BitReader; +impl BfsssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFSSS_A { + pub const fn variant(&self) -> Bfsss { match self.bits { - false => BFSSS_A::VALUE1, - true => BFSSS_A::VALUE2, + false => Bfsss::Value1, + true => Bfsss::Value2, } } #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFSSS_A::VALUE1 + *self == Bfsss::Value1 } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFSSS_A::VALUE2 + *self == Bfsss::Value2 } } #[doc = "Field `BFSSS` writer - Read Single Stage Synchronization:"] -pub type BFSSS_W<'a, REG> = crate::BitWriter<'a, REG, BFSSS_A>; -impl<'a, REG> BFSSS_W<'a, REG> +pub type BfsssW<'a, REG> = crate::BitWriter<'a, REG, Bfsss>; +impl<'a, REG> BfsssW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE1) + self.variant(Bfsss::Value1) } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE2) + self.variant(Bfsss::Value2) } } -#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_R = crate::BitReader; #[doc = "Burst FLASH Clock Feedback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FDBKEN_A { +pub enum Fdbken { #[doc = "0: BFCLK feedback not used."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FDBKEN_A) -> Self { + fn from(variant: Fdbken) -> Self { variant as u8 != 0 } } -impl FDBKEN_R { +#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] +pub type FdbkenR = crate::BitReader; +impl FdbkenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FDBKEN_A { + pub const fn variant(&self) -> Fdbken { match self.bits { - false => FDBKEN_A::VALUE1, - true => FDBKEN_A::VALUE2, + false => Fdbken::Value1, + true => Fdbken::Value2, } } #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FDBKEN_A::VALUE1 + *self == Fdbken::Value1 } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FDBKEN_A::VALUE2 + *self == Fdbken::Value2 } } #[doc = "Field `FDBKEN` writer - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_W<'a, REG> = crate::BitWriter<'a, REG, FDBKEN_A>; -impl<'a, REG> FDBKEN_W<'a, REG> +pub type FdbkenW<'a, REG> = crate::BitWriter<'a, REG, Fdbken>; +impl<'a, REG> FdbkenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE1) + self.variant(Fdbken::Value1) } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE2) + self.variant(Fdbken::Value2) } } -#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] -pub type BFCMSEL_R = crate::BitReader; #[doc = "Burst Flash Clock Mode Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFCMSEL_A { +pub enum Bfcmsel { #[doc = "0: Burst Flash Clock runs continuously with values selected by this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Burst Flash Clock is disabled between accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFCMSEL_A) -> Self { + fn from(variant: Bfcmsel) -> Self { variant as u8 != 0 } } -impl BFCMSEL_R { +#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] +pub type BfcmselR = crate::BitReader; +impl BfcmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFCMSEL_A { + pub const fn variant(&self) -> Bfcmsel { match self.bits { - false => BFCMSEL_A::VALUE1, - true => BFCMSEL_A::VALUE2, + false => Bfcmsel::Value1, + true => Bfcmsel::Value2, } } #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFCMSEL_A::VALUE1 + *self == Bfcmsel::Value1 } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFCMSEL_A::VALUE2 + *self == Bfcmsel::Value2 } } #[doc = "Field `BFCMSEL` writer - Burst Flash Clock Mode Select"] -pub type BFCMSEL_W<'a, REG> = crate::BitWriter<'a, REG, BFCMSEL_A>; -impl<'a, REG> BFCMSEL_W<'a, REG> +pub type BfcmselW<'a, REG> = crate::BitWriter<'a, REG, Bfcmsel>; +impl<'a, REG> BfcmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE1) + self.variant(Bfcmsel::Value1) } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE2) + self.variant(Bfcmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Field `NAA` writer - Enable flash non-array access workaround"] -pub type NAA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] -pub type DBA_R = crate::BitReader; #[doc = "Disable Burst Address Wrapping\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBA_A { +pub enum Dba { #[doc = "0: Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBA_A) -> Self { + fn from(variant: Dba) -> Self { variant as u8 != 0 } } -impl DBA_R { +#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] +pub type DbaR = crate::BitReader; +impl DbaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBA_A { + pub const fn variant(&self) -> Dba { match self.bits { - false => DBA_A::VALUE1, - true => DBA_A::VALUE2, + false => Dba::Value1, + true => Dba::Value2, } } #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBA_A::VALUE1 + *self == Dba::Value1 } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBA_A::VALUE2 + *self == Dba::Value2 } } #[doc = "Field `DBA` writer - Disable Burst Address Wrapping"] -pub type DBA_W<'a, REG> = crate::BitWriter<'a, REG, DBA_A>; -impl<'a, REG> DBA_W<'a, REG> +pub type DbaW<'a, REG> = crate::BitWriter<'a, REG, Dba>; +impl<'a, REG> DbaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE1) + self.variant(Dba::Value1) } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE2) + self.variant(Dba::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -574,276 +574,267 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `PORTW` writer - Device Addressing Mode"] -pub type PORTW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PortwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - pub fn bfsss(&self) -> BFSSS_R { - BFSSS_R::new(((self.bits >> 4) & 1) != 0) + pub fn bfsss(&self) -> BfsssR { + BfsssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - pub fn fdbken(&self) -> FDBKEN_R { - FDBKEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn fdbken(&self) -> FdbkenR { + FdbkenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - pub fn bfcmsel(&self) -> BFCMSEL_R { - BFCMSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn bfcmsel(&self) -> BfcmselR { + BfcmselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - pub fn dba(&self) -> DBA_R { - DBA_R::new(((self.bits >> 18) & 1) != 0) + pub fn dba(&self) -> DbaR { + DbaR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] #[must_use] - pub fn bfsss(&mut self) -> BFSSS_W { - BFSSS_W::new(self, 4) + pub fn bfsss(&mut self) -> BfsssW { + BfsssW::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] #[must_use] - pub fn fdbken(&mut self) -> FDBKEN_W { - FDBKEN_W::new(self, 5) + pub fn fdbken(&mut self) -> FdbkenW { + FdbkenW::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] #[must_use] - pub fn bfcmsel(&mut self) -> BFCMSEL_W { - BFCMSEL_W::new(self, 6) + pub fn bfcmsel(&mut self) -> BfcmselW { + BfcmselW::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] #[must_use] - pub fn naa(&mut self) -> NAA_W { - NAA_W::new(self, 7) + pub fn naa(&mut self) -> NaaW { + NaaW::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] #[must_use] - pub fn dba(&mut self) -> DBA_W { - DBA_W::new(self, 18) + pub fn dba(&mut self) -> DbaW { + DbaW::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] #[must_use] - pub fn portw(&mut self) -> PORTW_W { - PORTW_W::new(self, 22) + pub fn portw(&mut self) -> PortwW { + PortwW::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRCON2_SPEC; -impl crate::RegisterSpec for BUSRCON2_SPEC { +pub struct Busrcon2Spec; +impl crate::RegisterSpec for Busrcon2Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrcon2::R`](R) reader structure"] -impl crate::Readable for BUSRCON2_SPEC {} +impl crate::Readable for Busrcon2Spec {} #[doc = "`write(|w| ..)` method takes [`busrcon2::W`](W) writer structure"] -impl crate::Writable for BUSRCON2_SPEC { +impl crate::Writable for Busrcon2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRCON2 to value 0x00d3_0040"] -impl crate::Resettable for BUSRCON2_SPEC { +impl crate::Resettable for Busrcon2Spec { const RESET_VALUE: u32 = 0x00d3_0040; } diff --git a/src/ebu/busrcon3.rs b/src/ebu/busrcon3.rs index 49978f19..c27ef399 100644 --- a/src/ebu/busrcon3.rs +++ b/src/ebu/busrcon3.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSRCON3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSRCON3` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,504 +69,504 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction is transferred in a single burst."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction is transferred in a single burst."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } -#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] -pub type BFSSS_R = crate::BitReader; #[doc = "Read Single Stage Synchronization:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFSSS_A { +pub enum Bfsss { #[doc = "0: Two stages of synchronization used. (maximum margin)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One stage of synchronization used. (minimum latency)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFSSS_A) -> Self { + fn from(variant: Bfsss) -> Self { variant as u8 != 0 } } -impl BFSSS_R { +#[doc = "Field `BFSSS` reader - Read Single Stage Synchronization:"] +pub type BfsssR = crate::BitReader; +impl BfsssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFSSS_A { + pub const fn variant(&self) -> Bfsss { match self.bits { - false => BFSSS_A::VALUE1, - true => BFSSS_A::VALUE2, + false => Bfsss::Value1, + true => Bfsss::Value2, } } #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFSSS_A::VALUE1 + *self == Bfsss::Value1 } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFSSS_A::VALUE2 + *self == Bfsss::Value2 } } #[doc = "Field `BFSSS` writer - Read Single Stage Synchronization:"] -pub type BFSSS_W<'a, REG> = crate::BitWriter<'a, REG, BFSSS_A>; -impl<'a, REG> BFSSS_W<'a, REG> +pub type BfsssW<'a, REG> = crate::BitWriter<'a, REG, Bfsss>; +impl<'a, REG> BfsssW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Two stages of synchronization used. (maximum margin)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE1) + self.variant(Bfsss::Value1) } #[doc = "One stage of synchronization used. (minimum latency)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFSSS_A::VALUE2) + self.variant(Bfsss::Value2) } } -#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_R = crate::BitReader; #[doc = "Burst FLASH Clock Feedback Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FDBKEN_A { +pub enum Fdbken { #[doc = "0: BFCLK feedback not used."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FDBKEN_A) -> Self { + fn from(variant: Fdbken) -> Self { variant as u8 != 0 } } -impl FDBKEN_R { +#[doc = "Field `FDBKEN` reader - Burst FLASH Clock Feedback Enable"] +pub type FdbkenR = crate::BitReader; +impl FdbkenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FDBKEN_A { + pub const fn variant(&self) -> Fdbken { match self.bits { - false => FDBKEN_A::VALUE1, - true => FDBKEN_A::VALUE2, + false => Fdbken::Value1, + true => Fdbken::Value2, } } #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FDBKEN_A::VALUE1 + *self == Fdbken::Value1 } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FDBKEN_A::VALUE2 + *self == Fdbken::Value2 } } #[doc = "Field `FDBKEN` writer - Burst FLASH Clock Feedback Enable"] -pub type FDBKEN_W<'a, REG> = crate::BitWriter<'a, REG, FDBKEN_A>; -impl<'a, REG> FDBKEN_W<'a, REG> +pub type FdbkenW<'a, REG> = crate::BitWriter<'a, REG, Fdbken>; +impl<'a, REG> FdbkenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BFCLK feedback not used."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE1) + self.variant(Fdbken::Value1) } #[doc = "Incoming data and control signals (from the Burst FLASH device) are re-synchronized to the BFCLKI input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FDBKEN_A::VALUE2) + self.variant(Fdbken::Value2) } } -#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] -pub type BFCMSEL_R = crate::BitReader; #[doc = "Burst Flash Clock Mode Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFCMSEL_A { +pub enum Bfcmsel { #[doc = "0: Burst Flash Clock runs continuously with values selected by this register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Burst Flash Clock is disabled between accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFCMSEL_A) -> Self { + fn from(variant: Bfcmsel) -> Self { variant as u8 != 0 } } -impl BFCMSEL_R { +#[doc = "Field `BFCMSEL` reader - Burst Flash Clock Mode Select"] +pub type BfcmselR = crate::BitReader; +impl BfcmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFCMSEL_A { + pub const fn variant(&self) -> Bfcmsel { match self.bits { - false => BFCMSEL_A::VALUE1, - true => BFCMSEL_A::VALUE2, + false => Bfcmsel::Value1, + true => Bfcmsel::Value2, } } #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFCMSEL_A::VALUE1 + *self == Bfcmsel::Value1 } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFCMSEL_A::VALUE2 + *self == Bfcmsel::Value2 } } #[doc = "Field `BFCMSEL` writer - Burst Flash Clock Mode Select"] -pub type BFCMSEL_W<'a, REG> = crate::BitWriter<'a, REG, BFCMSEL_A>; -impl<'a, REG> BFCMSEL_W<'a, REG> +pub type BfcmselW<'a, REG> = crate::BitWriter<'a, REG, Bfcmsel>; +impl<'a, REG> BfcmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst Flash Clock runs continuously with values selected by this register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE1) + self.variant(Bfcmsel::Value1) } #[doc = "Burst Flash Clock is disabled between accesses"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFCMSEL_A::VALUE2) + self.variant(Bfcmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Field `NAA` writer - Enable flash non-array access workaround"] -pub type NAA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] -pub type DBA_R = crate::BitReader; #[doc = "Disable Burst Address Wrapping\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBA_A { +pub enum Dba { #[doc = "0: Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBA_A) -> Self { + fn from(variant: Dba) -> Self { variant as u8 != 0 } } -impl DBA_R { +#[doc = "Field `DBA` reader - Disable Burst Address Wrapping"] +pub type DbaR = crate::BitReader; +impl DbaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBA_A { + pub const fn variant(&self) -> Dba { match self.bits { - false => DBA_A::VALUE1, - true => DBA_A::VALUE2, + false => Dba::Value1, + true => Dba::Value2, } } #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBA_A::VALUE1 + *self == Dba::Value1 } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBA_A::VALUE2 + *self == Dba::Value2 } } #[doc = "Field `DBA` writer - Disable Burst Address Wrapping"] -pub type DBA_W<'a, REG> = crate::BitWriter<'a, REG, DBA_A>; -impl<'a, REG> DBA_W<'a, REG> +pub type DbaW<'a, REG> = crate::BitWriter<'a, REG, Dba>; +impl<'a, REG> DbaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Memory Controller automatically re-aligns any non-aligned synchronous burst access so that data can be fetched from the device in a single burst transaction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE1) + self.variant(Dba::Value1) } #[doc = "Memory Controller always starts any burst access to a synchronous burst device at the address specified by the AHB request. Any required address wrapping must be automatically provided by the Burst FLASH device."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DBA_A::VALUE2) + self.variant(Dba::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -574,276 +574,267 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `PORTW` writer - Device Addressing Mode"] -pub type PORTW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PortwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - pub fn bfsss(&self) -> BFSSS_R { - BFSSS_R::new(((self.bits >> 4) & 1) != 0) + pub fn bfsss(&self) -> BfsssR { + BfsssR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - pub fn fdbken(&self) -> FDBKEN_R { - FDBKEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn fdbken(&self) -> FdbkenR { + FdbkenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - pub fn bfcmsel(&self) -> BFCMSEL_R { - BFCMSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn bfcmsel(&self) -> BfcmselR { + BfcmselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - pub fn dba(&self) -> DBA_R { - DBA_R::new(((self.bits >> 18) & 1) != 0) + pub fn dba(&self) -> DbaR { + DbaR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] #[must_use] - pub fn bfsss(&mut self) -> BFSSS_W { - BFSSS_W::new(self, 4) + pub fn bfsss(&mut self) -> BfsssW { + BfsssW::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] #[must_use] - pub fn fdbken(&mut self) -> FDBKEN_W { - FDBKEN_W::new(self, 5) + pub fn fdbken(&mut self) -> FdbkenW { + FdbkenW::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] #[must_use] - pub fn bfcmsel(&mut self) -> BFCMSEL_W { - BFCMSEL_W::new(self, 6) + pub fn bfcmsel(&mut self) -> BfcmselW { + BfcmselW::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] #[must_use] - pub fn naa(&mut self) -> NAA_W { - NAA_W::new(self, 7) + pub fn naa(&mut self) -> NaaW { + NaaW::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] #[must_use] - pub fn dba(&mut self) -> DBA_W { - DBA_W::new(self, 18) + pub fn dba(&mut self) -> DbaW { + DbaW::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] #[must_use] - pub fn portw(&mut self) -> PORTW_W { - PORTW_W::new(self, 22) + pub fn portw(&mut self) -> PortwW { + PortwW::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busrcon3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`busrcon3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSRCON3_SPEC; -impl crate::RegisterSpec for BUSRCON3_SPEC { +pub struct Busrcon3Spec; +impl crate::RegisterSpec for Busrcon3Spec { type Ux = u32; } #[doc = "`read()` method returns [`busrcon3::R`](R) reader structure"] -impl crate::Readable for BUSRCON3_SPEC {} +impl crate::Readable for Busrcon3Spec {} #[doc = "`write(|w| ..)` method takes [`busrcon3::W`](W) writer structure"] -impl crate::Writable for BUSRCON3_SPEC { +impl crate::Writable for Busrcon3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSRCON3 to value 0x00d3_0040"] -impl crate::Resettable for BUSRCON3_SPEC { +impl crate::Resettable for Busrcon3Spec { const RESET_VALUE: u32 = 0x00d3_0040; } diff --git a/src/ebu/buswap0.rs b/src/ebu/buswap0.rs index 35b5c307..567db7dd 100644 --- a/src/ebu/buswap0.rs +++ b/src/ebu/buswap0.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWAP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWAP0` writer"] -pub type W = crate::W; -#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] -pub type WRDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRDTACS_A { +pub enum Wrdtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRDTACS_A) -> Self { + fn from(variant: Wrdtacs) -> Self { variant as _ } } -impl crate::FieldSpec for WRDTACS_A { +impl crate::FieldSpec for Wrdtacs { type Ux = u8; } -impl WRDTACS_R { +#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] +pub type WrdtacsR = crate::FieldReader; +impl WrdtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRDTACS_A::VALUE1), - 1 => Some(WRDTACS_A::VALUE2), - 14 => Some(WRDTACS_A::VALUE3), - 15 => Some(WRDTACS_A::VALUE4), + 0 => Some(Wrdtacs::Value1), + 1 => Some(Wrdtacs::Value2), + 14 => Some(Wrdtacs::Value3), + 15 => Some(Wrdtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRDTACS_A::VALUE1 + *self == Wrdtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRDTACS_A::VALUE2 + *self == Wrdtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRDTACS_A::VALUE3 + *self == Wrdtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRDTACS_A::VALUE4 + *self == Wrdtacs::Value4 } } #[doc = "Field `WRDTACS` writer - Recovery Cycles between Different Regions"] -pub type WRDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WRDTACS_A>; -impl<'a, REG> WRDTACS_W<'a, REG> +pub type WrdtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wrdtacs>; +impl<'a, REG> WrdtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE1) + self.variant(Wrdtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE2) + self.variant(Wrdtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE3) + self.variant(Wrdtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE4) + self.variant(Wrdtacs::Value4) } } -#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Write Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRRECOVC_A { +pub enum Wrrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRRECOVC_A) -> Self { + fn from(variant: Wrrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for WRRECOVC_A { +impl crate::FieldSpec for Wrrecovc { type Ux = u8; } -impl WRRECOVC_R { +#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] +pub type WrrecovcR = crate::FieldReader; +impl WrrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRRECOVC_A::VALUE1), - 1 => Some(WRRECOVC_A::VALUE2), - 6 => Some(WRRECOVC_A::VALUE3), - 7 => Some(WRRECOVC_A::VALUE4), + 0 => Some(Wrrecovc::Value1), + 1 => Some(Wrrecovc::Value2), + 6 => Some(Wrrecovc::Value3), + 7 => Some(Wrrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRRECOVC_A::VALUE1 + *self == Wrrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRRECOVC_A::VALUE2 + *self == Wrrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRRECOVC_A::VALUE3 + *self == Wrrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRRECOVC_A::VALUE4 + *self == Wrrecovc::Value4 } } #[doc = "Field `WRRECOVC` writer - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WRRECOVC_A>; -impl<'a, REG> WRRECOVC_W<'a, REG> +pub type WrrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Wrrecovc>; +impl<'a, REG> WrrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE1) + self.variant(Wrrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE2) + self.variant(Wrrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE3) + self.variant(Wrrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE4) + self.variant(Wrrecovc::Value4) } } -#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] -pub type WAITWRC_R = crate::FieldReader; #[doc = "Programmed Wait States for write accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITWRC_A { +pub enum Waitwrc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITWRC_A) -> Self { + fn from(variant: Waitwrc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITWRC_A { +impl crate::FieldSpec for Waitwrc { type Ux = u8; } -impl WAITWRC_R { +#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] +pub type WaitwrcR = crate::FieldReader; +impl WaitwrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITWRC_A::VALUE1), - 1 => Some(WAITWRC_A::VALUE2), - 2 => Some(WAITWRC_A::VALUE3), - 30 => Some(WAITWRC_A::VALUE4), - 31 => Some(WAITWRC_A::VALUE5), + 0 => Some(Waitwrc::Value1), + 1 => Some(Waitwrc::Value2), + 2 => Some(Waitwrc::Value3), + 30 => Some(Waitwrc::Value4), + 31 => Some(Waitwrc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITWRC_A::VALUE1 + *self == Waitwrc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITWRC_A::VALUE2 + *self == Waitwrc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITWRC_A::VALUE3 + *self == Waitwrc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITWRC_A::VALUE4 + *self == Waitwrc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITWRC_A::VALUE5 + *self == Waitwrc::Value5 } } #[doc = "Field `WAITWRC` writer - Programmed Wait States for write accesses"] -pub type WAITWRC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITWRC_A>; -impl<'a, REG> WAITWRC_W<'a, REG> +pub type WaitwrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitwrc>; +impl<'a, REG> WaitwrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,89 +247,89 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE1) + self.variant(Waitwrc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE2) + self.variant(Waitwrc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE3) + self.variant(Waitwrc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE4) + self.variant(Waitwrc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE5) + self.variant(Waitwrc::Value5) } } -#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] -pub type DATAC_R = crate::FieldReader; #[doc = "Data Hold Cycles for Write Accesses\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATAC_A { +pub enum Datac { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATAC_A) -> Self { + fn from(variant: Datac) -> Self { variant as _ } } -impl crate::FieldSpec for DATAC_A { +impl crate::FieldSpec for Datac { type Ux = u8; } -impl DATAC_R { +#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] +pub type DatacR = crate::FieldReader; +impl DatacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DATAC_A::VALUE1), - 1 => Some(DATAC_A::VALUE2), - 14 => Some(DATAC_A::VALUE3), - 15 => Some(DATAC_A::VALUE4), + 0 => Some(Datac::Value1), + 1 => Some(Datac::Value2), + 14 => Some(Datac::Value3), + 15 => Some(Datac::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATAC_A::VALUE1 + *self == Datac::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATAC_A::VALUE2 + *self == Datac::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DATAC_A::VALUE3 + *self == Datac::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DATAC_A::VALUE4 + *self == Datac::Value4 } } #[doc = "Field `DATAC` writer - Data Hold Cycles for Write Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DATAC_A>; -impl<'a, REG> DATAC_W<'a, REG> +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4, Datac>; +impl<'a, REG> DatacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -337,84 +337,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE1) + self.variant(Datac::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE2) + self.variant(Datac::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE3) + self.variant(Datac::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE4) + self.variant(Datac::Value4) } } -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -422,84 +422,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -507,84 +507,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -592,84 +592,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -677,84 +677,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -762,150 +762,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn wrdtacs(&self) -> WRDTACS_R { - WRDTACS_R::new((self.bits & 0x0f) as u8) + pub fn wrdtacs(&self) -> WrdtacsR { + WrdtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - pub fn wrrecovc(&self) -> WRRECOVC_R { - WRRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn wrrecovc(&self) -> WrrecovcR { + WrrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - pub fn waitwrc(&self) -> WAITWRC_R { - WAITWRC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitwrc(&self) -> WaitwrcR { + WaitwrcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn wrdtacs(&mut self) -> WRDTACS_W { - WRDTACS_W::new(self, 0) + pub fn wrdtacs(&mut self) -> WrdtacsW { + WrdtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] #[must_use] - pub fn wrrecovc(&mut self) -> WRRECOVC_W { - WRRECOVC_W::new(self, 4) + pub fn wrrecovc(&mut self) -> WrrecovcW { + WrrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] #[must_use] - pub fn waitwrc(&mut self) -> WAITWRC_W { - WAITWRC_W::new(self, 7) + pub fn waitwrc(&mut self) -> WaitwrcW { + WaitwrcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWAP0_SPEC; -impl crate::RegisterSpec for BUSWAP0_SPEC { +pub struct Buswap0Spec; +impl crate::RegisterSpec for Buswap0Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswap0::R`](R) reader structure"] -impl crate::Readable for BUSWAP0_SPEC {} +impl crate::Readable for Buswap0Spec {} #[doc = "`write(|w| ..)` method takes [`buswap0::W`](W) writer structure"] -impl crate::Writable for BUSWAP0_SPEC { +impl crate::Writable for Buswap0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWAP0 to value 0xffff_ffff"] -impl crate::Resettable for BUSWAP0_SPEC { +impl crate::Resettable for Buswap0Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/buswap1.rs b/src/ebu/buswap1.rs index 2e31a62d..264356df 100644 --- a/src/ebu/buswap1.rs +++ b/src/ebu/buswap1.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWAP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWAP1` writer"] -pub type W = crate::W; -#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] -pub type WRDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRDTACS_A { +pub enum Wrdtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRDTACS_A) -> Self { + fn from(variant: Wrdtacs) -> Self { variant as _ } } -impl crate::FieldSpec for WRDTACS_A { +impl crate::FieldSpec for Wrdtacs { type Ux = u8; } -impl WRDTACS_R { +#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] +pub type WrdtacsR = crate::FieldReader; +impl WrdtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRDTACS_A::VALUE1), - 1 => Some(WRDTACS_A::VALUE2), - 14 => Some(WRDTACS_A::VALUE3), - 15 => Some(WRDTACS_A::VALUE4), + 0 => Some(Wrdtacs::Value1), + 1 => Some(Wrdtacs::Value2), + 14 => Some(Wrdtacs::Value3), + 15 => Some(Wrdtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRDTACS_A::VALUE1 + *self == Wrdtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRDTACS_A::VALUE2 + *self == Wrdtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRDTACS_A::VALUE3 + *self == Wrdtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRDTACS_A::VALUE4 + *self == Wrdtacs::Value4 } } #[doc = "Field `WRDTACS` writer - Recovery Cycles between Different Regions"] -pub type WRDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WRDTACS_A>; -impl<'a, REG> WRDTACS_W<'a, REG> +pub type WrdtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wrdtacs>; +impl<'a, REG> WrdtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE1) + self.variant(Wrdtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE2) + self.variant(Wrdtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE3) + self.variant(Wrdtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE4) + self.variant(Wrdtacs::Value4) } } -#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Write Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRRECOVC_A { +pub enum Wrrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRRECOVC_A) -> Self { + fn from(variant: Wrrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for WRRECOVC_A { +impl crate::FieldSpec for Wrrecovc { type Ux = u8; } -impl WRRECOVC_R { +#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] +pub type WrrecovcR = crate::FieldReader; +impl WrrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRRECOVC_A::VALUE1), - 1 => Some(WRRECOVC_A::VALUE2), - 6 => Some(WRRECOVC_A::VALUE3), - 7 => Some(WRRECOVC_A::VALUE4), + 0 => Some(Wrrecovc::Value1), + 1 => Some(Wrrecovc::Value2), + 6 => Some(Wrrecovc::Value3), + 7 => Some(Wrrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRRECOVC_A::VALUE1 + *self == Wrrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRRECOVC_A::VALUE2 + *self == Wrrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRRECOVC_A::VALUE3 + *self == Wrrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRRECOVC_A::VALUE4 + *self == Wrrecovc::Value4 } } #[doc = "Field `WRRECOVC` writer - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WRRECOVC_A>; -impl<'a, REG> WRRECOVC_W<'a, REG> +pub type WrrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Wrrecovc>; +impl<'a, REG> WrrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE1) + self.variant(Wrrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE2) + self.variant(Wrrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE3) + self.variant(Wrrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE4) + self.variant(Wrrecovc::Value4) } } -#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] -pub type WAITWRC_R = crate::FieldReader; #[doc = "Programmed Wait States for write accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITWRC_A { +pub enum Waitwrc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITWRC_A) -> Self { + fn from(variant: Waitwrc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITWRC_A { +impl crate::FieldSpec for Waitwrc { type Ux = u8; } -impl WAITWRC_R { +#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] +pub type WaitwrcR = crate::FieldReader; +impl WaitwrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITWRC_A::VALUE1), - 1 => Some(WAITWRC_A::VALUE2), - 2 => Some(WAITWRC_A::VALUE3), - 30 => Some(WAITWRC_A::VALUE4), - 31 => Some(WAITWRC_A::VALUE5), + 0 => Some(Waitwrc::Value1), + 1 => Some(Waitwrc::Value2), + 2 => Some(Waitwrc::Value3), + 30 => Some(Waitwrc::Value4), + 31 => Some(Waitwrc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITWRC_A::VALUE1 + *self == Waitwrc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITWRC_A::VALUE2 + *self == Waitwrc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITWRC_A::VALUE3 + *self == Waitwrc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITWRC_A::VALUE4 + *self == Waitwrc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITWRC_A::VALUE5 + *self == Waitwrc::Value5 } } #[doc = "Field `WAITWRC` writer - Programmed Wait States for write accesses"] -pub type WAITWRC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITWRC_A>; -impl<'a, REG> WAITWRC_W<'a, REG> +pub type WaitwrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitwrc>; +impl<'a, REG> WaitwrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,89 +247,89 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE1) + self.variant(Waitwrc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE2) + self.variant(Waitwrc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE3) + self.variant(Waitwrc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE4) + self.variant(Waitwrc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE5) + self.variant(Waitwrc::Value5) } } -#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] -pub type DATAC_R = crate::FieldReader; #[doc = "Data Hold Cycles for Write Accesses\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATAC_A { +pub enum Datac { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATAC_A) -> Self { + fn from(variant: Datac) -> Self { variant as _ } } -impl crate::FieldSpec for DATAC_A { +impl crate::FieldSpec for Datac { type Ux = u8; } -impl DATAC_R { +#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] +pub type DatacR = crate::FieldReader; +impl DatacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DATAC_A::VALUE1), - 1 => Some(DATAC_A::VALUE2), - 14 => Some(DATAC_A::VALUE3), - 15 => Some(DATAC_A::VALUE4), + 0 => Some(Datac::Value1), + 1 => Some(Datac::Value2), + 14 => Some(Datac::Value3), + 15 => Some(Datac::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATAC_A::VALUE1 + *self == Datac::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATAC_A::VALUE2 + *self == Datac::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DATAC_A::VALUE3 + *self == Datac::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DATAC_A::VALUE4 + *self == Datac::Value4 } } #[doc = "Field `DATAC` writer - Data Hold Cycles for Write Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DATAC_A>; -impl<'a, REG> DATAC_W<'a, REG> +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4, Datac>; +impl<'a, REG> DatacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -337,84 +337,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE1) + self.variant(Datac::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE2) + self.variant(Datac::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE3) + self.variant(Datac::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE4) + self.variant(Datac::Value4) } } -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -422,84 +422,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -507,84 +507,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -592,84 +592,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -677,84 +677,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -762,150 +762,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn wrdtacs(&self) -> WRDTACS_R { - WRDTACS_R::new((self.bits & 0x0f) as u8) + pub fn wrdtacs(&self) -> WrdtacsR { + WrdtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - pub fn wrrecovc(&self) -> WRRECOVC_R { - WRRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn wrrecovc(&self) -> WrrecovcR { + WrrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - pub fn waitwrc(&self) -> WAITWRC_R { - WAITWRC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitwrc(&self) -> WaitwrcR { + WaitwrcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn wrdtacs(&mut self) -> WRDTACS_W { - WRDTACS_W::new(self, 0) + pub fn wrdtacs(&mut self) -> WrdtacsW { + WrdtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] #[must_use] - pub fn wrrecovc(&mut self) -> WRRECOVC_W { - WRRECOVC_W::new(self, 4) + pub fn wrrecovc(&mut self) -> WrrecovcW { + WrrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] #[must_use] - pub fn waitwrc(&mut self) -> WAITWRC_W { - WAITWRC_W::new(self, 7) + pub fn waitwrc(&mut self) -> WaitwrcW { + WaitwrcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWAP1_SPEC; -impl crate::RegisterSpec for BUSWAP1_SPEC { +pub struct Buswap1Spec; +impl crate::RegisterSpec for Buswap1Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswap1::R`](R) reader structure"] -impl crate::Readable for BUSWAP1_SPEC {} +impl crate::Readable for Buswap1Spec {} #[doc = "`write(|w| ..)` method takes [`buswap1::W`](W) writer structure"] -impl crate::Writable for BUSWAP1_SPEC { +impl crate::Writable for Buswap1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWAP1 to value 0xffff_ffff"] -impl crate::Resettable for BUSWAP1_SPEC { +impl crate::Resettable for Buswap1Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/buswap2.rs b/src/ebu/buswap2.rs index 283b5f80..2ea886c2 100644 --- a/src/ebu/buswap2.rs +++ b/src/ebu/buswap2.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWAP2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWAP2` writer"] -pub type W = crate::W; -#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] -pub type WRDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRDTACS_A { +pub enum Wrdtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRDTACS_A) -> Self { + fn from(variant: Wrdtacs) -> Self { variant as _ } } -impl crate::FieldSpec for WRDTACS_A { +impl crate::FieldSpec for Wrdtacs { type Ux = u8; } -impl WRDTACS_R { +#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] +pub type WrdtacsR = crate::FieldReader; +impl WrdtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRDTACS_A::VALUE1), - 1 => Some(WRDTACS_A::VALUE2), - 14 => Some(WRDTACS_A::VALUE3), - 15 => Some(WRDTACS_A::VALUE4), + 0 => Some(Wrdtacs::Value1), + 1 => Some(Wrdtacs::Value2), + 14 => Some(Wrdtacs::Value3), + 15 => Some(Wrdtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRDTACS_A::VALUE1 + *self == Wrdtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRDTACS_A::VALUE2 + *self == Wrdtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRDTACS_A::VALUE3 + *self == Wrdtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRDTACS_A::VALUE4 + *self == Wrdtacs::Value4 } } #[doc = "Field `WRDTACS` writer - Recovery Cycles between Different Regions"] -pub type WRDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WRDTACS_A>; -impl<'a, REG> WRDTACS_W<'a, REG> +pub type WrdtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wrdtacs>; +impl<'a, REG> WrdtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE1) + self.variant(Wrdtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE2) + self.variant(Wrdtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE3) + self.variant(Wrdtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE4) + self.variant(Wrdtacs::Value4) } } -#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Write Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRRECOVC_A { +pub enum Wrrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRRECOVC_A) -> Self { + fn from(variant: Wrrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for WRRECOVC_A { +impl crate::FieldSpec for Wrrecovc { type Ux = u8; } -impl WRRECOVC_R { +#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] +pub type WrrecovcR = crate::FieldReader; +impl WrrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRRECOVC_A::VALUE1), - 1 => Some(WRRECOVC_A::VALUE2), - 6 => Some(WRRECOVC_A::VALUE3), - 7 => Some(WRRECOVC_A::VALUE4), + 0 => Some(Wrrecovc::Value1), + 1 => Some(Wrrecovc::Value2), + 6 => Some(Wrrecovc::Value3), + 7 => Some(Wrrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRRECOVC_A::VALUE1 + *self == Wrrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRRECOVC_A::VALUE2 + *self == Wrrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRRECOVC_A::VALUE3 + *self == Wrrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRRECOVC_A::VALUE4 + *self == Wrrecovc::Value4 } } #[doc = "Field `WRRECOVC` writer - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WRRECOVC_A>; -impl<'a, REG> WRRECOVC_W<'a, REG> +pub type WrrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Wrrecovc>; +impl<'a, REG> WrrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE1) + self.variant(Wrrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE2) + self.variant(Wrrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE3) + self.variant(Wrrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE4) + self.variant(Wrrecovc::Value4) } } -#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] -pub type WAITWRC_R = crate::FieldReader; #[doc = "Programmed Wait States for write accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITWRC_A { +pub enum Waitwrc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITWRC_A) -> Self { + fn from(variant: Waitwrc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITWRC_A { +impl crate::FieldSpec for Waitwrc { type Ux = u8; } -impl WAITWRC_R { +#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] +pub type WaitwrcR = crate::FieldReader; +impl WaitwrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITWRC_A::VALUE1), - 1 => Some(WAITWRC_A::VALUE2), - 2 => Some(WAITWRC_A::VALUE3), - 30 => Some(WAITWRC_A::VALUE4), - 31 => Some(WAITWRC_A::VALUE5), + 0 => Some(Waitwrc::Value1), + 1 => Some(Waitwrc::Value2), + 2 => Some(Waitwrc::Value3), + 30 => Some(Waitwrc::Value4), + 31 => Some(Waitwrc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITWRC_A::VALUE1 + *self == Waitwrc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITWRC_A::VALUE2 + *self == Waitwrc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITWRC_A::VALUE3 + *self == Waitwrc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITWRC_A::VALUE4 + *self == Waitwrc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITWRC_A::VALUE5 + *self == Waitwrc::Value5 } } #[doc = "Field `WAITWRC` writer - Programmed Wait States for write accesses"] -pub type WAITWRC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITWRC_A>; -impl<'a, REG> WAITWRC_W<'a, REG> +pub type WaitwrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitwrc>; +impl<'a, REG> WaitwrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,89 +247,89 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE1) + self.variant(Waitwrc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE2) + self.variant(Waitwrc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE3) + self.variant(Waitwrc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE4) + self.variant(Waitwrc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE5) + self.variant(Waitwrc::Value5) } } -#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] -pub type DATAC_R = crate::FieldReader; #[doc = "Data Hold Cycles for Write Accesses\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATAC_A { +pub enum Datac { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATAC_A) -> Self { + fn from(variant: Datac) -> Self { variant as _ } } -impl crate::FieldSpec for DATAC_A { +impl crate::FieldSpec for Datac { type Ux = u8; } -impl DATAC_R { +#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] +pub type DatacR = crate::FieldReader; +impl DatacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DATAC_A::VALUE1), - 1 => Some(DATAC_A::VALUE2), - 14 => Some(DATAC_A::VALUE3), - 15 => Some(DATAC_A::VALUE4), + 0 => Some(Datac::Value1), + 1 => Some(Datac::Value2), + 14 => Some(Datac::Value3), + 15 => Some(Datac::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATAC_A::VALUE1 + *self == Datac::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATAC_A::VALUE2 + *self == Datac::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DATAC_A::VALUE3 + *self == Datac::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DATAC_A::VALUE4 + *self == Datac::Value4 } } #[doc = "Field `DATAC` writer - Data Hold Cycles for Write Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DATAC_A>; -impl<'a, REG> DATAC_W<'a, REG> +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4, Datac>; +impl<'a, REG> DatacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -337,84 +337,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE1) + self.variant(Datac::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE2) + self.variant(Datac::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE3) + self.variant(Datac::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE4) + self.variant(Datac::Value4) } } -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -422,84 +422,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -507,84 +507,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -592,84 +592,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -677,84 +677,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -762,150 +762,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn wrdtacs(&self) -> WRDTACS_R { - WRDTACS_R::new((self.bits & 0x0f) as u8) + pub fn wrdtacs(&self) -> WrdtacsR { + WrdtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - pub fn wrrecovc(&self) -> WRRECOVC_R { - WRRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn wrrecovc(&self) -> WrrecovcR { + WrrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - pub fn waitwrc(&self) -> WAITWRC_R { - WAITWRC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitwrc(&self) -> WaitwrcR { + WaitwrcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn wrdtacs(&mut self) -> WRDTACS_W { - WRDTACS_W::new(self, 0) + pub fn wrdtacs(&mut self) -> WrdtacsW { + WrdtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] #[must_use] - pub fn wrrecovc(&mut self) -> WRRECOVC_W { - WRRECOVC_W::new(self, 4) + pub fn wrrecovc(&mut self) -> WrrecovcW { + WrrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] #[must_use] - pub fn waitwrc(&mut self) -> WAITWRC_W { - WAITWRC_W::new(self, 7) + pub fn waitwrc(&mut self) -> WaitwrcW { + WaitwrcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWAP2_SPEC; -impl crate::RegisterSpec for BUSWAP2_SPEC { +pub struct Buswap2Spec; +impl crate::RegisterSpec for Buswap2Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswap2::R`](R) reader structure"] -impl crate::Readable for BUSWAP2_SPEC {} +impl crate::Readable for Buswap2Spec {} #[doc = "`write(|w| ..)` method takes [`buswap2::W`](W) writer structure"] -impl crate::Writable for BUSWAP2_SPEC { +impl crate::Writable for Buswap2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWAP2 to value 0xffff_ffff"] -impl crate::Resettable for BUSWAP2_SPEC { +impl crate::Resettable for Buswap2Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/buswap3.rs b/src/ebu/buswap3.rs index 6049e833..9dc54d74 100644 --- a/src/ebu/buswap3.rs +++ b/src/ebu/buswap3.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWAP3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWAP3` writer"] -pub type W = crate::W; -#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] -pub type WRDTACS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRDTACS_A { +pub enum Wrdtacs { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRDTACS_A) -> Self { + fn from(variant: Wrdtacs) -> Self { variant as _ } } -impl crate::FieldSpec for WRDTACS_A { +impl crate::FieldSpec for Wrdtacs { type Ux = u8; } -impl WRDTACS_R { +#[doc = "Field `WRDTACS` reader - Recovery Cycles between Different Regions"] +pub type WrdtacsR = crate::FieldReader; +impl WrdtacsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRDTACS_A::VALUE1), - 1 => Some(WRDTACS_A::VALUE2), - 14 => Some(WRDTACS_A::VALUE3), - 15 => Some(WRDTACS_A::VALUE4), + 0 => Some(Wrdtacs::Value1), + 1 => Some(Wrdtacs::Value2), + 14 => Some(Wrdtacs::Value3), + 15 => Some(Wrdtacs::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRDTACS_A::VALUE1 + *self == Wrdtacs::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRDTACS_A::VALUE2 + *self == Wrdtacs::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRDTACS_A::VALUE3 + *self == Wrdtacs::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRDTACS_A::VALUE4 + *self == Wrdtacs::Value4 } } #[doc = "Field `WRDTACS` writer - Recovery Cycles between Different Regions"] -pub type WRDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WRDTACS_A>; -impl<'a, REG> WRDTACS_W<'a, REG> +pub type WrdtacsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wrdtacs>; +impl<'a, REG> WrdtacsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE1) + self.variant(Wrdtacs::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE2) + self.variant(Wrdtacs::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE3) + self.variant(Wrdtacs::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRDTACS_A::VALUE4) + self.variant(Wrdtacs::Value4) } } -#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_R = crate::FieldReader; #[doc = "Recovery Cycles after Write Accesses\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WRRECOVC_A { +pub enum Wrrecovc { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "6: 6 clock cycles selected."] - VALUE3 = 6, + Value3 = 6, #[doc = "7: 7 clock cycles selected."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WRRECOVC_A) -> Self { + fn from(variant: Wrrecovc) -> Self { variant as _ } } -impl crate::FieldSpec for WRRECOVC_A { +impl crate::FieldSpec for Wrrecovc { type Ux = u8; } -impl WRRECOVC_R { +#[doc = "Field `WRRECOVC` reader - Recovery Cycles after Write Accesses"] +pub type WrrecovcR = crate::FieldReader; +impl WrrecovcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WRRECOVC_A::VALUE1), - 1 => Some(WRRECOVC_A::VALUE2), - 6 => Some(WRRECOVC_A::VALUE3), - 7 => Some(WRRECOVC_A::VALUE4), + 0 => Some(Wrrecovc::Value1), + 1 => Some(Wrrecovc::Value2), + 6 => Some(Wrrecovc::Value3), + 7 => Some(Wrrecovc::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRRECOVC_A::VALUE1 + *self == Wrrecovc::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRRECOVC_A::VALUE2 + *self == Wrrecovc::Value2 } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WRRECOVC_A::VALUE3 + *self == Wrrecovc::Value3 } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WRRECOVC_A::VALUE4 + *self == Wrrecovc::Value4 } } #[doc = "Field `WRRECOVC` writer - Recovery Cycles after Write Accesses"] -pub type WRRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, WRRECOVC_A>; -impl<'a, REG> WRRECOVC_W<'a, REG> +pub type WrrecovcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Wrrecovc>; +impl<'a, REG> WrrecovcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,92 +154,92 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE1) + self.variant(Wrrecovc::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE2) + self.variant(Wrrecovc::Value2) } #[doc = "6 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE3) + self.variant(Wrrecovc::Value3) } #[doc = "7 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WRRECOVC_A::VALUE4) + self.variant(Wrrecovc::Value4) } } -#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] -pub type WAITWRC_R = crate::FieldReader; #[doc = "Programmed Wait States for write accesses\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WAITWRC_A { +pub enum Waitwrc { #[doc = "0: 1 wait state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 wait states."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 wait state."] - VALUE3 = 2, + Value3 = 2, #[doc = "30: 30 wait states."] - VALUE4 = 30, + Value4 = 30, #[doc = "31: 31 wait states."] - VALUE5 = 31, + Value5 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WAITWRC_A) -> Self { + fn from(variant: Waitwrc) -> Self { variant as _ } } -impl crate::FieldSpec for WAITWRC_A { +impl crate::FieldSpec for Waitwrc { type Ux = u8; } -impl WAITWRC_R { +#[doc = "Field `WAITWRC` reader - Programmed Wait States for write accesses"] +pub type WaitwrcR = crate::FieldReader; +impl WaitwrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WAITWRC_A::VALUE1), - 1 => Some(WAITWRC_A::VALUE2), - 2 => Some(WAITWRC_A::VALUE3), - 30 => Some(WAITWRC_A::VALUE4), - 31 => Some(WAITWRC_A::VALUE5), + 0 => Some(Waitwrc::Value1), + 1 => Some(Waitwrc::Value2), + 2 => Some(Waitwrc::Value3), + 30 => Some(Waitwrc::Value4), + 31 => Some(Waitwrc::Value5), _ => None, } } #[doc = "1 wait state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITWRC_A::VALUE1 + *self == Waitwrc::Value1 } #[doc = "1 wait states."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITWRC_A::VALUE2 + *self == Waitwrc::Value2 } #[doc = "2 wait state."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WAITWRC_A::VALUE3 + *self == Waitwrc::Value3 } #[doc = "30 wait states."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WAITWRC_A::VALUE4 + *self == Waitwrc::Value4 } #[doc = "31 wait states."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WAITWRC_A::VALUE5 + *self == Waitwrc::Value5 } } #[doc = "Field `WAITWRC` writer - Programmed Wait States for write accesses"] -pub type WAITWRC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITWRC_A>; -impl<'a, REG> WAITWRC_W<'a, REG> +pub type WaitwrcW<'a, REG> = crate::FieldWriter<'a, REG, 5, Waitwrc>; +impl<'a, REG> WaitwrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,89 +247,89 @@ where #[doc = "1 wait state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE1) + self.variant(Waitwrc::Value1) } #[doc = "1 wait states."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE2) + self.variant(Waitwrc::Value2) } #[doc = "2 wait state."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE3) + self.variant(Waitwrc::Value3) } #[doc = "30 wait states."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE4) + self.variant(Waitwrc::Value4) } #[doc = "31 wait states."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WAITWRC_A::VALUE5) + self.variant(Waitwrc::Value5) } } -#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] -pub type DATAC_R = crate::FieldReader; #[doc = "Data Hold Cycles for Write Accesses\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DATAC_A { +pub enum Datac { #[doc = "0: No Recovery Phase clock cycles available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DATAC_A) -> Self { + fn from(variant: Datac) -> Self { variant as _ } } -impl crate::FieldSpec for DATAC_A { +impl crate::FieldSpec for Datac { type Ux = u8; } -impl DATAC_R { +#[doc = "Field `DATAC` reader - Data Hold Cycles for Write Accesses"] +pub type DatacR = crate::FieldReader; +impl DatacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DATAC_A::VALUE1), - 1 => Some(DATAC_A::VALUE2), - 14 => Some(DATAC_A::VALUE3), - 15 => Some(DATAC_A::VALUE4), + 0 => Some(Datac::Value1), + 1 => Some(Datac::Value2), + 14 => Some(Datac::Value3), + 15 => Some(Datac::Value4), _ => None, } } #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATAC_A::VALUE1 + *self == Datac::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATAC_A::VALUE2 + *self == Datac::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DATAC_A::VALUE3 + *self == Datac::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DATAC_A::VALUE4 + *self == Datac::Value4 } } #[doc = "Field `DATAC` writer - Data Hold Cycles for Write Accesses"] -pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DATAC_A>; -impl<'a, REG> DATAC_W<'a, REG> +pub type DatacW<'a, REG> = crate::FieldWriter<'a, REG, 4, Datac>; +impl<'a, REG> DatacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -337,84 +337,84 @@ where #[doc = "No Recovery Phase clock cycles available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE1) + self.variant(Datac::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE2) + self.variant(Datac::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE3) + self.variant(Datac::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DATAC_A::VALUE4) + self.variant(Datac::Value4) } } -#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_R = crate::FieldReader; #[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTCLOCK_A { +pub enum Extclock { #[doc = "0: Equal to INT_CLK frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1/2 of INT_CLK frequency."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 1/3 of INT_CLK frequency."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTCLOCK_A) -> Self { + fn from(variant: Extclock) -> Self { variant as _ } } -impl crate::FieldSpec for EXTCLOCK_A { +impl crate::FieldSpec for Extclock { type Ux = u8; } -impl EXTCLOCK_R { +#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"] +pub type ExtclockR = crate::FieldReader; +impl ExtclockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTCLOCK_A { + pub const fn variant(&self) -> Extclock { match self.bits { - 0 => EXTCLOCK_A::VALUE1, - 1 => EXTCLOCK_A::VALUE2, - 2 => EXTCLOCK_A::VALUE3, - 3 => EXTCLOCK_A::VALUE4, + 0 => Extclock::Value1, + 1 => Extclock::Value2, + 2 => Extclock::Value3, + 3 => Extclock::Value4, _ => unreachable!(), } } #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTCLOCK_A::VALUE1 + *self == Extclock::Value1 } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTCLOCK_A::VALUE2 + *self == Extclock::Value2 } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTCLOCK_A::VALUE3 + *self == Extclock::Value3 } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTCLOCK_A::VALUE4 + *self == Extclock::Value4 } } #[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"] -pub type EXTCLOCK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTCLOCK_A>; -impl<'a, REG> EXTCLOCK_W<'a, REG> +pub type ExtclockW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extclock>; +impl<'a, REG> ExtclockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -422,84 +422,84 @@ where #[doc = "Equal to INT_CLK frequency."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE1) + self.variant(Extclock::Value1) } #[doc = "1/2 of INT_CLK frequency."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE2) + self.variant(Extclock::Value2) } #[doc = "1/3 of INT_CLK frequency."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE3) + self.variant(Extclock::Value3) } #[doc = "1/4 of INT_CLK frequency (default after reset)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTCLOCK_A::VALUE4) + self.variant(Extclock::Value4) } } -#[doc = "Field `EXTDATA` reader - Extended data"] -pub type EXTDATA_R = crate::FieldReader; #[doc = "Extended data\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXTDATA_A { +pub enum Extdata { #[doc = "0: external memory outputs data every BFCLK cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: external memory outputs data every two BFCLK cycles"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: external memory outputs data every four BFCLK cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: external memory outputs data every eight BFCLK cycles"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXTDATA_A) -> Self { + fn from(variant: Extdata) -> Self { variant as _ } } -impl crate::FieldSpec for EXTDATA_A { +impl crate::FieldSpec for Extdata { type Ux = u8; } -impl EXTDATA_R { +#[doc = "Field `EXTDATA` reader - Extended data"] +pub type ExtdataR = crate::FieldReader; +impl ExtdataR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTDATA_A { + pub const fn variant(&self) -> Extdata { match self.bits { - 0 => EXTDATA_A::VALUE1, - 1 => EXTDATA_A::VALUE2, - 2 => EXTDATA_A::VALUE3, - 3 => EXTDATA_A::VALUE4, + 0 => Extdata::Value1, + 1 => Extdata::Value2, + 2 => Extdata::Value3, + 3 => Extdata::Value4, _ => unreachable!(), } } #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTDATA_A::VALUE1 + *self == Extdata::Value1 } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTDATA_A::VALUE2 + *self == Extdata::Value2 } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXTDATA_A::VALUE3 + *self == Extdata::Value3 } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXTDATA_A::VALUE4 + *self == Extdata::Value4 } } #[doc = "Field `EXTDATA` writer - Extended data"] -pub type EXTDATA_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXTDATA_A>; -impl<'a, REG> EXTDATA_W<'a, REG> +pub type ExtdataW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Extdata>; +impl<'a, REG> ExtdataW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -507,84 +507,84 @@ where #[doc = "external memory outputs data every BFCLK cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE1) + self.variant(Extdata::Value1) } #[doc = "external memory outputs data every two BFCLK cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE2) + self.variant(Extdata::Value2) } #[doc = "external memory outputs data every four BFCLK cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE3) + self.variant(Extdata::Value3) } #[doc = "external memory outputs data every eight BFCLK cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXTDATA_A::VALUE4) + self.variant(Extdata::Value4) } } -#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] -pub type CMDDELAY_R = crate::FieldReader; #[doc = "Command Delay Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMDDELAY_A { +pub enum Cmddelay { #[doc = "0: 0 clock cycle selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMDDELAY_A) -> Self { + fn from(variant: Cmddelay) -> Self { variant as _ } } -impl crate::FieldSpec for CMDDELAY_A { +impl crate::FieldSpec for Cmddelay { type Ux = u8; } -impl CMDDELAY_R { +#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"] +pub type CmddelayR = crate::FieldReader; +impl CmddelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMDDELAY_A::VALUE1), - 1 => Some(CMDDELAY_A::VALUE2), - 14 => Some(CMDDELAY_A::VALUE3), - 15 => Some(CMDDELAY_A::VALUE4), + 0 => Some(Cmddelay::Value1), + 1 => Some(Cmddelay::Value2), + 14 => Some(Cmddelay::Value3), + 15 => Some(Cmddelay::Value4), _ => None, } } #[doc = "0 clock cycle selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMDDELAY_A::VALUE1 + *self == Cmddelay::Value1 } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMDDELAY_A::VALUE2 + *self == Cmddelay::Value2 } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMDDELAY_A::VALUE3 + *self == Cmddelay::Value3 } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMDDELAY_A::VALUE4 + *self == Cmddelay::Value4 } } #[doc = "Field `CMDDELAY` writer - Command Delay Cycles"] -pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>; -impl<'a, REG> CMDDELAY_W<'a, REG> +pub type CmddelayW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cmddelay>; +impl<'a, REG> CmddelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -592,84 +592,84 @@ where #[doc = "0 clock cycle selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE1) + self.variant(Cmddelay::Value1) } #[doc = "1 clock cycle selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE2) + self.variant(Cmddelay::Value2) } #[doc = "14 clock cycles selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE3) + self.variant(Cmddelay::Value3) } #[doc = "15 clock cycles selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMDDELAY_A::VALUE4) + self.variant(Cmddelay::Value4) } } -#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] -pub type AHOLDC_R = crate::FieldReader; #[doc = "Address Hold Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AHOLDC_A { +pub enum Aholdc { #[doc = "0: 0 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AHOLDC_A) -> Self { + fn from(variant: Aholdc) -> Self { variant as _ } } -impl crate::FieldSpec for AHOLDC_A { +impl crate::FieldSpec for Aholdc { type Ux = u8; } -impl AHOLDC_R { +#[doc = "Field `AHOLDC` reader - Address Hold Cycles"] +pub type AholdcR = crate::FieldReader; +impl AholdcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(AHOLDC_A::VALUE1), - 1 => Some(AHOLDC_A::VALUE2), - 14 => Some(AHOLDC_A::VALUE3), - 15 => Some(AHOLDC_A::VALUE4), + 0 => Some(Aholdc::Value1), + 1 => Some(Aholdc::Value2), + 14 => Some(Aholdc::Value3), + 15 => Some(Aholdc::Value4), _ => None, } } #[doc = "0 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHOLDC_A::VALUE1 + *self == Aholdc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHOLDC_A::VALUE2 + *self == Aholdc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AHOLDC_A::VALUE3 + *self == Aholdc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AHOLDC_A::VALUE4 + *self == Aholdc::Value4 } } #[doc = "Field `AHOLDC` writer - Address Hold Cycles"] -pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>; -impl<'a, REG> AHOLDC_W<'a, REG> +pub type AholdcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Aholdc>; +impl<'a, REG> AholdcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -677,84 +677,84 @@ where #[doc = "0 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE1) + self.variant(Aholdc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE2) + self.variant(Aholdc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE3) + self.variant(Aholdc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AHOLDC_A::VALUE4) + self.variant(Aholdc::Value4) } } -#[doc = "Field `ADDRC` reader - Address Cycles"] -pub type ADDRC_R = crate::FieldReader; #[doc = "Address Cycles\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ADDRC_A { +pub enum Addrc { #[doc = "0: 1 clock cycle selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 clock cycle selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: 14 clock cycles selected"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: 15 clock cycles selected"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ADDRC_A) -> Self { + fn from(variant: Addrc) -> Self { variant as _ } } -impl crate::FieldSpec for ADDRC_A { +impl crate::FieldSpec for Addrc { type Ux = u8; } -impl ADDRC_R { +#[doc = "Field `ADDRC` reader - Address Cycles"] +pub type AddrcR = crate::FieldReader; +impl AddrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDRC_A::VALUE1), - 1 => Some(ADDRC_A::VALUE2), - 14 => Some(ADDRC_A::VALUE3), - 15 => Some(ADDRC_A::VALUE4), + 0 => Some(Addrc::Value1), + 1 => Some(Addrc::Value2), + 14 => Some(Addrc::Value3), + 15 => Some(Addrc::Value4), _ => None, } } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDRC_A::VALUE1 + *self == Addrc::Value1 } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDRC_A::VALUE2 + *self == Addrc::Value2 } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ADDRC_A::VALUE3 + *self == Addrc::Value3 } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ADDRC_A::VALUE4 + *self == Addrc::Value4 } } #[doc = "Field `ADDRC` writer - Address Cycles"] -pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>; -impl<'a, REG> ADDRC_W<'a, REG> +pub type AddrcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Addrc>; +impl<'a, REG> AddrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -762,150 +762,141 @@ where #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE1) + self.variant(Addrc::Value1) } #[doc = "1 clock cycle selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE2) + self.variant(Addrc::Value2) } #[doc = "14 clock cycles selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE3) + self.variant(Addrc::Value3) } #[doc = "15 clock cycles selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ADDRC_A::VALUE4) + self.variant(Addrc::Value4) } } impl R { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - pub fn wrdtacs(&self) -> WRDTACS_R { - WRDTACS_R::new((self.bits & 0x0f) as u8) + pub fn wrdtacs(&self) -> WrdtacsR { + WrdtacsR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - pub fn wrrecovc(&self) -> WRRECOVC_R { - WRRECOVC_R::new(((self.bits >> 4) & 7) as u8) + pub fn wrrecovc(&self) -> WrrecovcR { + WrrecovcR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - pub fn waitwrc(&self) -> WAITWRC_R { - WAITWRC_R::new(((self.bits >> 7) & 0x1f) as u8) + pub fn waitwrc(&self) -> WaitwrcR { + WaitwrcR::new(((self.bits >> 7) & 0x1f) as u8) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - pub fn datac(&self) -> DATAC_R { - DATAC_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn datac(&self) -> DatacR { + DatacR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - pub fn extclock(&self) -> EXTCLOCK_R { - EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8) + pub fn extclock(&self) -> ExtclockR { + ExtclockR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - pub fn extdata(&self) -> EXTDATA_R { - EXTDATA_R::new(((self.bits >> 18) & 3) as u8) + pub fn extdata(&self) -> ExtdataR { + ExtdataR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - pub fn cmddelay(&self) -> CMDDELAY_R { - CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cmddelay(&self) -> CmddelayR { + CmddelayR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - pub fn aholdc(&self) -> AHOLDC_R { - AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn aholdc(&self) -> AholdcR { + AholdcR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - pub fn addrc(&self) -> ADDRC_R { - ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn addrc(&self) -> AddrcR { + AddrcR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] #[must_use] - pub fn wrdtacs(&mut self) -> WRDTACS_W { - WRDTACS_W::new(self, 0) + pub fn wrdtacs(&mut self) -> WrdtacsW { + WrdtacsW::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] #[must_use] - pub fn wrrecovc(&mut self) -> WRRECOVC_W { - WRRECOVC_W::new(self, 4) + pub fn wrrecovc(&mut self) -> WrrecovcW { + WrrecovcW::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] #[must_use] - pub fn waitwrc(&mut self) -> WAITWRC_W { - WAITWRC_W::new(self, 7) + pub fn waitwrc(&mut self) -> WaitwrcW { + WaitwrcW::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] #[must_use] - pub fn datac(&mut self) -> DATAC_W { - DATAC_W::new(self, 12) + pub fn datac(&mut self) -> DatacW { + DatacW::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] #[must_use] - pub fn extclock(&mut self) -> EXTCLOCK_W { - EXTCLOCK_W::new(self, 16) + pub fn extclock(&mut self) -> ExtclockW { + ExtclockW::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] #[must_use] - pub fn extdata(&mut self) -> EXTDATA_W { - EXTDATA_W::new(self, 18) + pub fn extdata(&mut self) -> ExtdataW { + ExtdataW::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] #[must_use] - pub fn cmddelay(&mut self) -> CMDDELAY_W { - CMDDELAY_W::new(self, 20) + pub fn cmddelay(&mut self) -> CmddelayW { + CmddelayW::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] #[must_use] - pub fn aholdc(&mut self) -> AHOLDC_W { - AHOLDC_W::new(self, 24) + pub fn aholdc(&mut self) -> AholdcW { + AholdcW::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] #[must_use] - pub fn addrc(&mut self) -> ADDRC_W { - ADDRC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrc(&mut self) -> AddrcW { + AddrcW::new(self, 28) } } #[doc = "EBU Bus Write Access Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswap3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswap3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWAP3_SPEC; -impl crate::RegisterSpec for BUSWAP3_SPEC { +pub struct Buswap3Spec; +impl crate::RegisterSpec for Buswap3Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswap3::R`](R) reader structure"] -impl crate::Readable for BUSWAP3_SPEC {} +impl crate::Readable for Buswap3Spec {} #[doc = "`write(|w| ..)` method takes [`buswap3::W`](W) writer structure"] -impl crate::Writable for BUSWAP3_SPEC { +impl crate::Writable for Buswap3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWAP3 to value 0xffff_ffff"] -impl crate::Resettable for BUSWAP3_SPEC { +impl crate::Resettable for Buswap3Spec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/ebu/buswcon0.rs b/src/ebu/buswcon0.rs index 74405314..a0983e09 100644 --- a/src/ebu/buswcon0.rs +++ b/src/ebu/buswcon0.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWCON0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWCON0` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,290 +69,290 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction transferred in single burst"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -360,282 +360,273 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } -#[doc = "Field `LOCKCS` reader - Lock Chip Select"] -pub type LOCKCS_R = crate::BitReader; #[doc = "Lock Chip Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKCS_A { +pub enum Lockcs { #[doc = "0: Chip Select cannot be locked (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Chip Select will be automatically locked when written to from the processor data port."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKCS_A) -> Self { + fn from(variant: Lockcs) -> Self { variant as u8 != 0 } } -impl LOCKCS_R { +#[doc = "Field `LOCKCS` reader - Lock Chip Select"] +pub type LockcsR = crate::BitReader; +impl LockcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOCKCS_A { + pub const fn variant(&self) -> Lockcs { match self.bits { - false => LOCKCS_A::VALUE1, - true => LOCKCS_A::VALUE2, + false => Lockcs::Value1, + true => Lockcs::Value2, } } #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCKCS_A::VALUE1 + *self == Lockcs::Value1 } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCKCS_A::VALUE2 + *self == Lockcs::Value2 } } #[doc = "Field `LOCKCS` writer - Lock Chip Select"] -pub type LOCKCS_W<'a, REG> = crate::BitWriter<'a, REG, LOCKCS_A>; -impl<'a, REG> LOCKCS_W<'a, REG> +pub type LockcsW<'a, REG> = crate::BitWriter<'a, REG, Lockcs>; +impl<'a, REG> LockcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE1) + self.variant(Lockcs::Value1) } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE2) + self.variant(Lockcs::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - pub fn lockcs(&self) -> LOCKCS_R { - LOCKCS_R::new(((self.bits >> 27) & 1) != 0) + pub fn lockcs(&self) -> LockcsR { + LockcsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] #[must_use] - pub fn lockcs(&mut self) -> LOCKCS_W { - LOCKCS_W::new(self, 27) + pub fn lockcs(&mut self) -> LockcsW { + LockcsW::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWCON0_SPEC; -impl crate::RegisterSpec for BUSWCON0_SPEC { +pub struct Buswcon0Spec; +impl crate::RegisterSpec for Buswcon0Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswcon0::R`](R) reader structure"] -impl crate::Readable for BUSWCON0_SPEC {} +impl crate::Readable for Buswcon0Spec {} #[doc = "`write(|w| ..)` method takes [`buswcon0::W`](W) writer structure"] -impl crate::Writable for BUSWCON0_SPEC { +impl crate::Writable for Buswcon0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWCON0 to value 0x00d3_0000"] -impl crate::Resettable for BUSWCON0_SPEC { +impl crate::Resettable for Buswcon0Spec { const RESET_VALUE: u32 = 0x00d3_0000; } diff --git a/src/ebu/buswcon1.rs b/src/ebu/buswcon1.rs index ec91dbd0..19a2387f 100644 --- a/src/ebu/buswcon1.rs +++ b/src/ebu/buswcon1.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWCON1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWCON1` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,290 +69,290 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction transferred in single burst"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -360,282 +360,273 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } -#[doc = "Field `LOCKCS` reader - Lock Chip Select"] -pub type LOCKCS_R = crate::BitReader; #[doc = "Lock Chip Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKCS_A { +pub enum Lockcs { #[doc = "0: Chip Select cannot be locked (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Chip Select will be automatically locked when written to from the processor data port."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKCS_A) -> Self { + fn from(variant: Lockcs) -> Self { variant as u8 != 0 } } -impl LOCKCS_R { +#[doc = "Field `LOCKCS` reader - Lock Chip Select"] +pub type LockcsR = crate::BitReader; +impl LockcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOCKCS_A { + pub const fn variant(&self) -> Lockcs { match self.bits { - false => LOCKCS_A::VALUE1, - true => LOCKCS_A::VALUE2, + false => Lockcs::Value1, + true => Lockcs::Value2, } } #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCKCS_A::VALUE1 + *self == Lockcs::Value1 } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCKCS_A::VALUE2 + *self == Lockcs::Value2 } } #[doc = "Field `LOCKCS` writer - Lock Chip Select"] -pub type LOCKCS_W<'a, REG> = crate::BitWriter<'a, REG, LOCKCS_A>; -impl<'a, REG> LOCKCS_W<'a, REG> +pub type LockcsW<'a, REG> = crate::BitWriter<'a, REG, Lockcs>; +impl<'a, REG> LockcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE1) + self.variant(Lockcs::Value1) } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE2) + self.variant(Lockcs::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - pub fn lockcs(&self) -> LOCKCS_R { - LOCKCS_R::new(((self.bits >> 27) & 1) != 0) + pub fn lockcs(&self) -> LockcsR { + LockcsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] #[must_use] - pub fn lockcs(&mut self) -> LOCKCS_W { - LOCKCS_W::new(self, 27) + pub fn lockcs(&mut self) -> LockcsW { + LockcsW::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWCON1_SPEC; -impl crate::RegisterSpec for BUSWCON1_SPEC { +pub struct Buswcon1Spec; +impl crate::RegisterSpec for Buswcon1Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswcon1::R`](R) reader structure"] -impl crate::Readable for BUSWCON1_SPEC {} +impl crate::Readable for Buswcon1Spec {} #[doc = "`write(|w| ..)` method takes [`buswcon1::W`](W) writer structure"] -impl crate::Writable for BUSWCON1_SPEC { +impl crate::Writable for Buswcon1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWCON1 to value 0x00d3_0000"] -impl crate::Resettable for BUSWCON1_SPEC { +impl crate::Resettable for Buswcon1Spec { const RESET_VALUE: u32 = 0x00d3_0000; } diff --git a/src/ebu/buswcon2.rs b/src/ebu/buswcon2.rs index 78964c0c..096a5f60 100644 --- a/src/ebu/buswcon2.rs +++ b/src/ebu/buswcon2.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWCON2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWCON2` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,290 +69,290 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction transferred in single burst"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -360,282 +360,273 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } -#[doc = "Field `LOCKCS` reader - Lock Chip Select"] -pub type LOCKCS_R = crate::BitReader; #[doc = "Lock Chip Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKCS_A { +pub enum Lockcs { #[doc = "0: Chip Select cannot be locked (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Chip Select will be automatically locked when written to from the processor data port."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKCS_A) -> Self { + fn from(variant: Lockcs) -> Self { variant as u8 != 0 } } -impl LOCKCS_R { +#[doc = "Field `LOCKCS` reader - Lock Chip Select"] +pub type LockcsR = crate::BitReader; +impl LockcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOCKCS_A { + pub const fn variant(&self) -> Lockcs { match self.bits { - false => LOCKCS_A::VALUE1, - true => LOCKCS_A::VALUE2, + false => Lockcs::Value1, + true => Lockcs::Value2, } } #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCKCS_A::VALUE1 + *self == Lockcs::Value1 } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCKCS_A::VALUE2 + *self == Lockcs::Value2 } } #[doc = "Field `LOCKCS` writer - Lock Chip Select"] -pub type LOCKCS_W<'a, REG> = crate::BitWriter<'a, REG, LOCKCS_A>; -impl<'a, REG> LOCKCS_W<'a, REG> +pub type LockcsW<'a, REG> = crate::BitWriter<'a, REG, Lockcs>; +impl<'a, REG> LockcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE1) + self.variant(Lockcs::Value1) } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE2) + self.variant(Lockcs::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - pub fn lockcs(&self) -> LOCKCS_R { - LOCKCS_R::new(((self.bits >> 27) & 1) != 0) + pub fn lockcs(&self) -> LockcsR { + LockcsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] #[must_use] - pub fn lockcs(&mut self) -> LOCKCS_W { - LOCKCS_W::new(self, 27) + pub fn lockcs(&mut self) -> LockcsW { + LockcsW::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWCON2_SPEC; -impl crate::RegisterSpec for BUSWCON2_SPEC { +pub struct Buswcon2Spec; +impl crate::RegisterSpec for Buswcon2Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswcon2::R`](R) reader structure"] -impl crate::Readable for BUSWCON2_SPEC {} +impl crate::Readable for Buswcon2Spec {} #[doc = "`write(|w| ..)` method takes [`buswcon2::W`](W) writer structure"] -impl crate::Writable for BUSWCON2_SPEC { +impl crate::Writable for Buswcon2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWCON2 to value 0x00d3_0000"] -impl crate::Resettable for BUSWCON2_SPEC { +impl crate::Resettable for Buswcon2Spec { const RESET_VALUE: u32 = 0x00d3_0000; } diff --git a/src/ebu/buswcon3.rs b/src/ebu/buswcon3.rs index 9ea69522..5cfc7714 100644 --- a/src/ebu/buswcon3.rs +++ b/src/ebu/buswcon3.rs @@ -1,67 +1,67 @@ #[doc = "Register `BUSWCON3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUSWCON3` writer"] -pub type W = crate::W; -#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] -pub type FETBLEN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst Length for Synchronous Burst\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FETBLEN_A { +pub enum Fetblen { #[doc = "0: 1 data access (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 data accesses."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4 data accesses."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 data accesses."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FETBLEN_A) -> Self { + fn from(variant: Fetblen) -> Self { variant as _ } } -impl crate::FieldSpec for FETBLEN_A { +impl crate::FieldSpec for Fetblen { type Ux = u8; } -impl FETBLEN_R { +#[doc = "Field `FETBLEN` reader - Burst Length for Synchronous Burst"] +pub type FetblenR = crate::FieldReader; +impl FetblenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FETBLEN_A::VALUE1), - 1 => Some(FETBLEN_A::VALUE2), - 2 => Some(FETBLEN_A::VALUE3), - 3 => Some(FETBLEN_A::VALUE4), + 0 => Some(Fetblen::Value1), + 1 => Some(Fetblen::Value2), + 2 => Some(Fetblen::Value3), + 3 => Some(Fetblen::Value4), _ => None, } } #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FETBLEN_A::VALUE1 + *self == Fetblen::Value1 } #[doc = "2 data accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FETBLEN_A::VALUE2 + *self == Fetblen::Value2 } #[doc = "4 data accesses."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FETBLEN_A::VALUE3 + *self == Fetblen::Value3 } #[doc = "8 data accesses."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FETBLEN_A::VALUE4 + *self == Fetblen::Value4 } } #[doc = "Field `FETBLEN` writer - Burst Length for Synchronous Burst"] -pub type FETBLEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, FETBLEN_A>; -impl<'a, REG> FETBLEN_W<'a, REG> +pub type FetblenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Fetblen>; +impl<'a, REG> FetblenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,290 +69,290 @@ where #[doc = "1 data access (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE1) + self.variant(Fetblen::Value1) } #[doc = "2 data accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE2) + self.variant(Fetblen::Value2) } #[doc = "4 data accesses."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE3) + self.variant(Fetblen::Value3) } #[doc = "8 data accesses."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FETBLEN_A::VALUE4) + self.variant(Fetblen::Value4) } } -#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] -pub type FBBMSEL_R = crate::BitReader; #[doc = "Synchronous burst buffer mode select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FBBMSEL_A { +pub enum Fbbmsel { #[doc = "0: Burst buffer length defined by value in FETBLEN (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Continuous mode. All data required for transaction transferred in single burst"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FBBMSEL_A) -> Self { + fn from(variant: Fbbmsel) -> Self { variant as u8 != 0 } } -impl FBBMSEL_R { +#[doc = "Field `FBBMSEL` reader - Synchronous burst buffer mode select"] +pub type FbbmselR = crate::BitReader; +impl FbbmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FBBMSEL_A { + pub const fn variant(&self) -> Fbbmsel { match self.bits { - false => FBBMSEL_A::VALUE1, - true => FBBMSEL_A::VALUE2, + false => Fbbmsel::Value1, + true => Fbbmsel::Value2, } } #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FBBMSEL_A::VALUE1 + *self == Fbbmsel::Value1 } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FBBMSEL_A::VALUE2 + *self == Fbbmsel::Value2 } } #[doc = "Field `FBBMSEL` writer - Synchronous burst buffer mode select"] -pub type FBBMSEL_W<'a, REG> = crate::BitWriter<'a, REG, FBBMSEL_A>; -impl<'a, REG> FBBMSEL_W<'a, REG> +pub type FbbmselW<'a, REG> = crate::BitWriter<'a, REG, Fbbmsel>; +impl<'a, REG> FbbmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Burst buffer length defined by value in FETBLEN (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE1) + self.variant(Fbbmsel::Value1) } #[doc = "Continuous mode. All data required for transaction transferred in single burst"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FBBMSEL_A::VALUE2) + self.variant(Fbbmsel::Value2) } } #[doc = "Field `NAA` reader - Enable flash non-array access workaround"] -pub type NAA_R = crate::BitReader; -#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] -pub type ECSE_R = crate::BitReader; +pub type NaaR = crate::BitReader; #[doc = "Early Chip Select for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECSE_A { +pub enum Ecse { #[doc = "0: CS is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CS is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECSE_A) -> Self { + fn from(variant: Ecse) -> Self { variant as u8 != 0 } } -impl ECSE_R { +#[doc = "Field `ECSE` reader - Early Chip Select for Synchronous Burst"] +pub type EcseR = crate::BitReader; +impl EcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECSE_A { + pub const fn variant(&self) -> Ecse { match self.bits { - false => ECSE_A::VALUE1, - true => ECSE_A::VALUE2, + false => Ecse::Value1, + true => Ecse::Value2, } } #[doc = "CS is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECSE_A::VALUE1 + *self == Ecse::Value1 } #[doc = "CS is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECSE_A::VALUE2 + *self == Ecse::Value2 } } #[doc = "Field `ECSE` writer - Early Chip Select for Synchronous Burst"] -pub type ECSE_W<'a, REG> = crate::BitWriter<'a, REG, ECSE_A>; -impl<'a, REG> ECSE_W<'a, REG> +pub type EcseW<'a, REG> = crate::BitWriter<'a, REG, Ecse>; +impl<'a, REG> EcseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CS is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE1) + self.variant(Ecse::Value1) } #[doc = "CS is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECSE_A::VALUE2) + self.variant(Ecse::Value2) } } -#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_R = crate::BitReader; #[doc = "Early Burst Signal Enable for Synchronous Burst\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBSE_A { +pub enum Ebse { #[doc = "0: ADV is delayed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV is not delayed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBSE_A) -> Self { + fn from(variant: Ebse) -> Self { variant as u8 != 0 } } -impl EBSE_R { +#[doc = "Field `EBSE` reader - Early Burst Signal Enable for Synchronous Burst"] +pub type EbseR = crate::BitReader; +impl EbseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBSE_A { + pub const fn variant(&self) -> Ebse { match self.bits { - false => EBSE_A::VALUE1, - true => EBSE_A::VALUE2, + false => Ebse::Value1, + true => Ebse::Value2, } } #[doc = "ADV is delayed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBSE_A::VALUE1 + *self == Ebse::Value1 } #[doc = "ADV is not delayed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBSE_A::VALUE2 + *self == Ebse::Value2 } } #[doc = "Field `EBSE` writer - Early Burst Signal Enable for Synchronous Burst"] -pub type EBSE_W<'a, REG> = crate::BitWriter<'a, REG, EBSE_A>; -impl<'a, REG> EBSE_W<'a, REG> +pub type EbseW<'a, REG> = crate::BitWriter<'a, REG, Ebse>; +impl<'a, REG> EbseW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV is delayed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE1) + self.variant(Ebse::Value1) } #[doc = "ADV is not delayed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBSE_A::VALUE2) + self.variant(Ebse::Value2) } } -#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] -pub type WAITINV_R = crate::BitReader; #[doc = "Reversed polarity at WAIT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAITINV_A { +pub enum Waitinv { #[doc = "0: input at WAIT pin is active low (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: input at WAIT pin is active high."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAITINV_A) -> Self { + fn from(variant: Waitinv) -> Self { variant as u8 != 0 } } -impl WAITINV_R { +#[doc = "Field `WAITINV` reader - Reversed polarity at WAIT"] +pub type WaitinvR = crate::BitReader; +impl WaitinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAITINV_A { + pub const fn variant(&self) -> Waitinv { match self.bits { - false => WAITINV_A::VALUE1, - true => WAITINV_A::VALUE2, + false => Waitinv::Value1, + true => Waitinv::Value2, } } #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAITINV_A::VALUE1 + *self == Waitinv::Value1 } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAITINV_A::VALUE2 + *self == Waitinv::Value2 } } #[doc = "Field `WAITINV` writer - Reversed polarity at WAIT"] -pub type WAITINV_W<'a, REG> = crate::BitWriter<'a, REG, WAITINV_A>; -impl<'a, REG> WAITINV_W<'a, REG> +pub type WaitinvW<'a, REG> = crate::BitWriter<'a, REG, Waitinv>; +impl<'a, REG> WaitinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "input at WAIT pin is active low (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE1) + self.variant(Waitinv::Value1) } #[doc = "input at WAIT pin is active high."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAITINV_A::VALUE2) + self.variant(Waitinv::Value2) } } -#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] -pub type BCGEN_R = crate::FieldReader; #[doc = "Byte Control Signal Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BCGEN_A { +pub enum Bcgen { #[doc = "0: Byte control signals follow chip select timing."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Byte control signals follow write enable signal timing (RD/WR only)."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BCGEN_A) -> Self { + fn from(variant: Bcgen) -> Self { variant as _ } } -impl crate::FieldSpec for BCGEN_A { +impl crate::FieldSpec for Bcgen { type Ux = u8; } -impl BCGEN_R { +#[doc = "Field `BCGEN` reader - Byte Control Signal Control"] +pub type BcgenR = crate::FieldReader; +impl BcgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BCGEN_A::VALUE1), - 1 => Some(BCGEN_A::VALUE2), - 2 => Some(BCGEN_A::VALUE3), + 0 => Some(Bcgen::Value1), + 1 => Some(Bcgen::Value2), + 2 => Some(Bcgen::Value3), _ => None, } } #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BCGEN_A::VALUE1 + *self == Bcgen::Value1 } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BCGEN_A::VALUE2 + *self == Bcgen::Value2 } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BCGEN_A::VALUE3 + *self == Bcgen::Value3 } } #[doc = "Field `BCGEN` writer - Byte Control Signal Control"] -pub type BCGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BCGEN_A>; -impl<'a, REG> BCGEN_W<'a, REG> +pub type BcgenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bcgen>; +impl<'a, REG> BcgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -360,282 +360,273 @@ where #[doc = "Byte control signals follow chip select timing."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE1) + self.variant(Bcgen::Value1) } #[doc = "Byte control signals follow control signal timing (RD, RD/WR) (default after reset)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE2) + self.variant(Bcgen::Value2) } #[doc = "Byte control signals follow write enable signal timing (RD/WR only)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BCGEN_A::VALUE3) + self.variant(Bcgen::Value3) } } #[doc = "Field `PORTW` reader - Device Addressing Mode"] -pub type PORTW_R = crate::FieldReader; +pub type PortwR = crate::FieldReader; #[doc = "Field `WAIT` reader - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_R = crate::FieldReader; +pub type WaitR = crate::FieldReader; #[doc = "Field `WAIT` writer - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] -pub type WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AAP` reader - Asynchronous Address phase:"] -pub type AAP_R = crate::BitReader; +pub type WaitW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Asynchronous Address phase:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AAP_A { +pub enum Aap { #[doc = "0: Clock is enabled at beginning of access."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock is enabled at after address phase."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AAP_A) -> Self { + fn from(variant: Aap) -> Self { variant as u8 != 0 } } -impl AAP_R { +#[doc = "Field `AAP` reader - Asynchronous Address phase:"] +pub type AapR = crate::BitReader; +impl AapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AAP_A { + pub const fn variant(&self) -> Aap { match self.bits { - false => AAP_A::VALUE1, - true => AAP_A::VALUE2, + false => Aap::Value1, + true => Aap::Value2, } } #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AAP_A::VALUE1 + *self == Aap::Value1 } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AAP_A::VALUE2 + *self == Aap::Value2 } } #[doc = "Field `AAP` writer - Asynchronous Address phase:"] -pub type AAP_W<'a, REG> = crate::BitWriter<'a, REG, AAP_A>; -impl<'a, REG> AAP_W<'a, REG> +pub type AapW<'a, REG> = crate::BitWriter<'a, REG, Aap>; +impl<'a, REG> AapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Clock is enabled at beginning of access."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE1) + self.variant(Aap::Value1) } #[doc = "Clock is enabled at after address phase."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AAP_A::VALUE2) + self.variant(Aap::Value2) } } -#[doc = "Field `LOCKCS` reader - Lock Chip Select"] -pub type LOCKCS_R = crate::BitReader; #[doc = "Lock Chip Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOCKCS_A { +pub enum Lockcs { #[doc = "0: Chip Select cannot be locked (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Chip Select will be automatically locked when written to from the processor data port."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOCKCS_A) -> Self { + fn from(variant: Lockcs) -> Self { variant as u8 != 0 } } -impl LOCKCS_R { +#[doc = "Field `LOCKCS` reader - Lock Chip Select"] +pub type LockcsR = crate::BitReader; +impl LockcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOCKCS_A { + pub const fn variant(&self) -> Lockcs { match self.bits { - false => LOCKCS_A::VALUE1, - true => LOCKCS_A::VALUE2, + false => Lockcs::Value1, + true => Lockcs::Value2, } } #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCKCS_A::VALUE1 + *self == Lockcs::Value1 } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCKCS_A::VALUE2 + *self == Lockcs::Value2 } } #[doc = "Field `LOCKCS` writer - Lock Chip Select"] -pub type LOCKCS_W<'a, REG> = crate::BitWriter<'a, REG, LOCKCS_A>; -impl<'a, REG> LOCKCS_W<'a, REG> +pub type LockcsW<'a, REG> = crate::BitWriter<'a, REG, Lockcs>; +impl<'a, REG> LockcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Chip Select cannot be locked (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE1) + self.variant(Lockcs::Value1) } #[doc = "Chip Select will be automatically locked when written to from the processor data port."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCKCS_A::VALUE2) + self.variant(Lockcs::Value2) } } #[doc = "Field `AGEN` reader - Device Type for Region"] -pub type AGEN_R = crate::FieldReader; +pub type AgenR = crate::FieldReader; #[doc = "Field `AGEN` writer - Device Type for Region"] -pub type AGEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AgenW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - pub fn fetblen(&self) -> FETBLEN_R { - FETBLEN_R::new((self.bits & 7) as u8) + pub fn fetblen(&self) -> FetblenR { + FetblenR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - pub fn fbbmsel(&self) -> FBBMSEL_R { - FBBMSEL_R::new(((self.bits >> 3) & 1) != 0) + pub fn fbbmsel(&self) -> FbbmselR { + FbbmselR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - pub fn naa(&self) -> NAA_R { - NAA_R::new(((self.bits >> 7) & 1) != 0) + pub fn naa(&self) -> NaaR { + NaaR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - pub fn ecse(&self) -> ECSE_R { - ECSE_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecse(&self) -> EcseR { + EcseR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - pub fn ebse(&self) -> EBSE_R { - EBSE_R::new(((self.bits >> 17) & 1) != 0) + pub fn ebse(&self) -> EbseR { + EbseR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - pub fn waitinv(&self) -> WAITINV_R { - WAITINV_R::new(((self.bits >> 19) & 1) != 0) + pub fn waitinv(&self) -> WaitinvR { + WaitinvR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - pub fn bcgen(&self) -> BCGEN_R { - BCGEN_R::new(((self.bits >> 20) & 3) as u8) + pub fn bcgen(&self) -> BcgenR { + BcgenR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - pub fn portw(&self) -> PORTW_R { - PORTW_R::new(((self.bits >> 22) & 3) as u8) + pub fn portw(&self) -> PortwR { + PortwR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - pub fn wait(&self) -> WAIT_R { - WAIT_R::new(((self.bits >> 24) & 3) as u8) + pub fn wait(&self) -> WaitR { + WaitR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - pub fn aap(&self) -> AAP_R { - AAP_R::new(((self.bits >> 26) & 1) != 0) + pub fn aap(&self) -> AapR { + AapR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - pub fn lockcs(&self) -> LOCKCS_R { - LOCKCS_R::new(((self.bits >> 27) & 1) != 0) + pub fn lockcs(&self) -> LockcsR { + LockcsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - pub fn agen(&self) -> AGEN_R { - AGEN_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn agen(&self) -> AgenR { + AgenR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn fetblen(&mut self) -> FETBLEN_W { - FETBLEN_W::new(self, 0) + pub fn fetblen(&mut self) -> FetblenW { + FetblenW::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] #[must_use] - pub fn fbbmsel(&mut self) -> FBBMSEL_W { - FBBMSEL_W::new(self, 3) + pub fn fbbmsel(&mut self) -> FbbmselW { + FbbmselW::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ecse(&mut self) -> ECSE_W { - ECSE_W::new(self, 16) + pub fn ecse(&mut self) -> EcseW { + EcseW::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] #[must_use] - pub fn ebse(&mut self) -> EBSE_W { - EBSE_W::new(self, 17) + pub fn ebse(&mut self) -> EbseW { + EbseW::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] #[must_use] - pub fn waitinv(&mut self) -> WAITINV_W { - WAITINV_W::new(self, 19) + pub fn waitinv(&mut self) -> WaitinvW { + WaitinvW::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] #[must_use] - pub fn bcgen(&mut self) -> BCGEN_W { - BCGEN_W::new(self, 20) + pub fn bcgen(&mut self) -> BcgenW { + BcgenW::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] #[must_use] - pub fn wait(&mut self) -> WAIT_W { - WAIT_W::new(self, 24) + pub fn wait(&mut self) -> WaitW { + WaitW::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] #[must_use] - pub fn aap(&mut self) -> AAP_W { - AAP_W::new(self, 26) + pub fn aap(&mut self) -> AapW { + AapW::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] #[must_use] - pub fn lockcs(&mut self) -> LOCKCS_W { - LOCKCS_W::new(self, 27) + pub fn lockcs(&mut self) -> LockcsW { + LockcsW::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] #[must_use] - pub fn agen(&mut self) -> AGEN_W { - AGEN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn agen(&mut self) -> AgenW { + AgenW::new(self, 28) } } #[doc = "EBU Bus Write Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`buswcon3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`buswcon3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUSWCON3_SPEC; -impl crate::RegisterSpec for BUSWCON3_SPEC { +pub struct Buswcon3Spec; +impl crate::RegisterSpec for Buswcon3Spec { type Ux = u32; } #[doc = "`read()` method returns [`buswcon3::R`](R) reader structure"] -impl crate::Readable for BUSWCON3_SPEC {} +impl crate::Readable for Buswcon3Spec {} #[doc = "`write(|w| ..)` method takes [`buswcon3::W`](W) writer structure"] -impl crate::Writable for BUSWCON3_SPEC { +impl crate::Writable for Buswcon3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUSWCON3 to value 0x00d3_0000"] -impl crate::Resettable for BUSWCON3_SPEC { +impl crate::Resettable for Buswcon3Spec { const RESET_VALUE: u32 = 0x00d3_0000; } diff --git a/src/ebu/clc.rs b/src/ebu/clc.rs index 8e2a3872..d7096c32 100644 --- a/src/ebu/clc.rs +++ b/src/ebu/clc.rs @@ -1,262 +1,262 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; -#[doc = "Field `DISR` reader - EBU Disable Request Bit"] -pub type DISR_R = crate::BitReader; +pub type W = crate::W; #[doc = "EBU Disable Request Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISR_A { +pub enum Disr { #[doc = "0: EBU disable is not requested"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EBU disable is requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISR_A) -> Self { + fn from(variant: Disr) -> Self { variant as u8 != 0 } } -impl DISR_R { +#[doc = "Field `DISR` reader - EBU Disable Request Bit"] +pub type DisrR = crate::BitReader; +impl DisrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISR_A { + pub const fn variant(&self) -> Disr { match self.bits { - false => DISR_A::VALUE1, - true => DISR_A::VALUE2, + false => Disr::Value1, + true => Disr::Value2, } } #[doc = "EBU disable is not requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISR_A::VALUE1 + *self == Disr::Value1 } #[doc = "EBU disable is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISR_A::VALUE2 + *self == Disr::Value2 } } #[doc = "Field `DISR` writer - EBU Disable Request Bit"] -pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG, DISR_A>; -impl<'a, REG> DISR_W<'a, REG> +pub type DisrW<'a, REG> = crate::BitWriter<'a, REG, Disr>; +impl<'a, REG> DisrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "EBU disable is not requested"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE1) + self.variant(Disr::Value1) } #[doc = "EBU disable is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE2) + self.variant(Disr::Value2) } } -#[doc = "Field `DISS` reader - EBU Disable Status Bit"] -pub type DISS_R = crate::BitReader; #[doc = "EBU Disable Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISS_A { +pub enum Diss { #[doc = "0: EBU is enabled (default after reset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EBU is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISS_A) -> Self { + fn from(variant: Diss) -> Self { variant as u8 != 0 } } -impl DISS_R { +#[doc = "Field `DISS` reader - EBU Disable Status Bit"] +pub type DissR = crate::BitReader; +impl DissR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISS_A { + pub const fn variant(&self) -> Diss { match self.bits { - false => DISS_A::VALUE1, - true => DISS_A::VALUE2, + false => Diss::Value1, + true => Diss::Value2, } } #[doc = "EBU is enabled (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISS_A::VALUE1 + *self == Diss::Value1 } #[doc = "EBU is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISS_A::VALUE2 + *self == Diss::Value2 } } -#[doc = "Field `SYNC` reader - EBU Clocking Mode"] -pub type SYNC_R = crate::BitReader; #[doc = "EBU Clocking Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: request EBU to run asynchronously to AHB bus clock and use separate clock source"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: request EBU to run synchronously to ARM processor (default after reset)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - EBU Clocking Mode"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::VALUE1, - true => SYNC_A::VALUE2, + false => Sync::Value1, + true => Sync::Value2, } } #[doc = "request EBU to run asynchronously to AHB bus clock and use separate clock source"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_A::VALUE1 + *self == Sync::Value1 } #[doc = "request EBU to run synchronously to ARM processor (default after reset)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_A::VALUE2 + *self == Sync::Value2 } } #[doc = "Field `SYNC` writer - EBU Clocking Mode"] -pub type SYNC_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_A>; -impl<'a, REG> SYNC_W<'a, REG> +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "request EBU to run asynchronously to AHB bus clock and use separate clock source"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYNC_A::VALUE1) + self.variant(Sync::Value1) } #[doc = "request EBU to run synchronously to ARM processor (default after reset)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYNC_A::VALUE2) + self.variant(Sync::Value2) } } -#[doc = "Field `DIV2` reader - DIV2 Clocking Mode"] -pub type DIV2_R = crate::BitReader; #[doc = "DIV2 Clocking Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIV2_A { +pub enum Div2 { #[doc = "0: standard clocking mode. clock input selected by SYNC bitfield (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: request EBU to run off AHB bus clock divided by 2."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIV2_A) -> Self { + fn from(variant: Div2) -> Self { variant as u8 != 0 } } -impl DIV2_R { +#[doc = "Field `DIV2` reader - DIV2 Clocking Mode"] +pub type Div2R = crate::BitReader; +impl Div2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIV2_A { + pub const fn variant(&self) -> Div2 { match self.bits { - false => DIV2_A::VALUE1, - true => DIV2_A::VALUE2, + false => Div2::Value1, + true => Div2::Value2, } } #[doc = "standard clocking mode. clock input selected by SYNC bitfield (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIV2_A::VALUE1 + *self == Div2::Value1 } #[doc = "request EBU to run off AHB bus clock divided by 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIV2_A::VALUE2 + *self == Div2::Value2 } } #[doc = "Field `DIV2` writer - DIV2 Clocking Mode"] -pub type DIV2_W<'a, REG> = crate::BitWriter<'a, REG, DIV2_A>; -impl<'a, REG> DIV2_W<'a, REG> +pub type Div2W<'a, REG> = crate::BitWriter<'a, REG, Div2>; +impl<'a, REG> Div2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "standard clocking mode. clock input selected by SYNC bitfield (default after reset)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIV2_A::VALUE1) + self.variant(Div2::Value1) } #[doc = "request EBU to run off AHB bus clock divided by 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIV2_A::VALUE2) + self.variant(Div2::Value2) } } -#[doc = "Field `EBUDIV` reader - EBU Clock Divide Ratio"] -pub type EBUDIV_R = crate::FieldReader; #[doc = "EBU Clock Divide Ratio\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EBUDIV_A { +pub enum Ebudiv { #[doc = "0: request EBU to run off input clock (default after reset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: request EBU to run off input clock divided by 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: request EBU to run off input clock divided by 3"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: request EBU to run off input clock divided by 4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EBUDIV_A) -> Self { + fn from(variant: Ebudiv) -> Self { variant as _ } } -impl crate::FieldSpec for EBUDIV_A { +impl crate::FieldSpec for Ebudiv { type Ux = u8; } -impl EBUDIV_R { +#[doc = "Field `EBUDIV` reader - EBU Clock Divide Ratio"] +pub type EbudivR = crate::FieldReader; +impl EbudivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBUDIV_A { + pub const fn variant(&self) -> Ebudiv { match self.bits { - 0 => EBUDIV_A::VALUE1, - 1 => EBUDIV_A::VALUE2, - 2 => EBUDIV_A::VALUE3, - 3 => EBUDIV_A::VALUE4, + 0 => Ebudiv::Value1, + 1 => Ebudiv::Value2, + 2 => Ebudiv::Value3, + 3 => Ebudiv::Value4, _ => unreachable!(), } } #[doc = "request EBU to run off input clock (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBUDIV_A::VALUE1 + *self == Ebudiv::Value1 } #[doc = "request EBU to run off input clock divided by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBUDIV_A::VALUE2 + *self == Ebudiv::Value2 } #[doc = "request EBU to run off input clock divided by 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EBUDIV_A::VALUE3 + *self == Ebudiv::Value3 } #[doc = "request EBU to run off input clock divided by 4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EBUDIV_A::VALUE4 + *self == Ebudiv::Value4 } } #[doc = "Field `EBUDIV` writer - EBU Clock Divide Ratio"] -pub type EBUDIV_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EBUDIV_A>; -impl<'a, REG> EBUDIV_W<'a, REG> +pub type EbudivW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ebudiv>; +impl<'a, REG> EbudivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -264,244 +264,235 @@ where #[doc = "request EBU to run off input clock (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBUDIV_A::VALUE1) + self.variant(Ebudiv::Value1) } #[doc = "request EBU to run off input clock divided by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBUDIV_A::VALUE2) + self.variant(Ebudiv::Value2) } #[doc = "request EBU to run off input clock divided by 3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EBUDIV_A::VALUE3) + self.variant(Ebudiv::Value3) } #[doc = "request EBU to run off input clock divided by 4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EBUDIV_A::VALUE4) + self.variant(Ebudiv::Value4) } } -#[doc = "Field `SYNCACK` reader - EBU Clocking Mode Status"] -pub type SYNCACK_R = crate::BitReader; #[doc = "EBU Clocking Mode Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNCACK_A { +pub enum Syncack { #[doc = "0: the EBU is asynchronous to the AHB bus clock and is using a separate clock source"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EBU is synchronous to the AHB bus clock (default after reset)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNCACK_A) -> Self { + fn from(variant: Syncack) -> Self { variant as u8 != 0 } } -impl SYNCACK_R { +#[doc = "Field `SYNCACK` reader - EBU Clocking Mode Status"] +pub type SyncackR = crate::BitReader; +impl SyncackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNCACK_A { + pub const fn variant(&self) -> Syncack { match self.bits { - false => SYNCACK_A::VALUE1, - true => SYNCACK_A::VALUE2, + false => Syncack::Value1, + true => Syncack::Value2, } } #[doc = "the EBU is asynchronous to the AHB bus clock and is using a separate clock source"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNCACK_A::VALUE1 + *self == Syncack::Value1 } #[doc = "EBU is synchronous to the AHB bus clock (default after reset)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNCACK_A::VALUE2 + *self == Syncack::Value2 } } -#[doc = "Field `DIV2ACK` reader - DIV2 Clocking Mode Status"] -pub type DIV2ACK_R = crate::BitReader; #[doc = "DIV2 Clocking Mode Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIV2ACK_A { +pub enum Div2ack { #[doc = "0: EBU is using standard clocking mode. clock input selected by SYNC bitfield (default after reset)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EBU is running off AHB bus clock divided by 2."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIV2ACK_A) -> Self { + fn from(variant: Div2ack) -> Self { variant as u8 != 0 } } -impl DIV2ACK_R { +#[doc = "Field `DIV2ACK` reader - DIV2 Clocking Mode Status"] +pub type Div2ackR = crate::BitReader; +impl Div2ackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIV2ACK_A { + pub const fn variant(&self) -> Div2ack { match self.bits { - false => DIV2ACK_A::VALUE1, - true => DIV2ACK_A::VALUE2, + false => Div2ack::Value1, + true => Div2ack::Value2, } } #[doc = "EBU is using standard clocking mode. clock input selected by SYNC bitfield (default after reset)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIV2ACK_A::VALUE1 + *self == Div2ack::Value1 } #[doc = "EBU is running off AHB bus clock divided by 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIV2ACK_A::VALUE2 + *self == Div2ack::Value2 } } -#[doc = "Field `EBUDIVACK` reader - EBU Clock Divide Ratio Status"] -pub type EBUDIVACK_R = crate::FieldReader; #[doc = "EBU Clock Divide Ratio Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EBUDIVACK_A { +pub enum Ebudivack { #[doc = "0: EBU is running off input clock (default after reset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EBU is running off input clock divided by 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: EBU is running off input clock divided by 3"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: EBU is running off input clock divided by 4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EBUDIVACK_A) -> Self { + fn from(variant: Ebudivack) -> Self { variant as _ } } -impl crate::FieldSpec for EBUDIVACK_A { +impl crate::FieldSpec for Ebudivack { type Ux = u8; } -impl EBUDIVACK_R { +#[doc = "Field `EBUDIVACK` reader - EBU Clock Divide Ratio Status"] +pub type EbudivackR = crate::FieldReader; +impl EbudivackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBUDIVACK_A { + pub const fn variant(&self) -> Ebudivack { match self.bits { - 0 => EBUDIVACK_A::VALUE1, - 1 => EBUDIVACK_A::VALUE2, - 2 => EBUDIVACK_A::VALUE3, - 3 => EBUDIVACK_A::VALUE4, + 0 => Ebudivack::Value1, + 1 => Ebudivack::Value2, + 2 => Ebudivack::Value3, + 3 => Ebudivack::Value4, _ => unreachable!(), } } #[doc = "EBU is running off input clock (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBUDIVACK_A::VALUE1 + *self == Ebudivack::Value1 } #[doc = "EBU is running off input clock divided by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBUDIVACK_A::VALUE2 + *self == Ebudivack::Value2 } #[doc = "EBU is running off input clock divided by 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EBUDIVACK_A::VALUE3 + *self == Ebudivack::Value3 } #[doc = "EBU is running off input clock divided by 4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EBUDIVACK_A::VALUE4 + *self == Ebudivack::Value4 } } impl R { #[doc = "Bit 0 - EBU Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DISR_R { - DISR_R::new((self.bits & 1) != 0) + pub fn disr(&self) -> DisrR { + DisrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - EBU Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DISS_R { - DISS_R::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DissR { + DissR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 16 - EBU Clocking Mode"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 16) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - DIV2 Clocking Mode"] #[inline(always)] - pub fn div2(&self) -> DIV2_R { - DIV2_R::new(((self.bits >> 17) & 1) != 0) + pub fn div2(&self) -> Div2R { + Div2R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - EBU Clock Divide Ratio"] #[inline(always)] - pub fn ebudiv(&self) -> EBUDIV_R { - EBUDIV_R::new(((self.bits >> 18) & 3) as u8) + pub fn ebudiv(&self) -> EbudivR { + EbudivR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - EBU Clocking Mode Status"] #[inline(always)] - pub fn syncack(&self) -> SYNCACK_R { - SYNCACK_R::new(((self.bits >> 20) & 1) != 0) + pub fn syncack(&self) -> SyncackR { + SyncackR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - DIV2 Clocking Mode Status"] #[inline(always)] - pub fn div2ack(&self) -> DIV2ACK_R { - DIV2ACK_R::new(((self.bits >> 21) & 1) != 0) + pub fn div2ack(&self) -> Div2ackR { + Div2ackR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:23 - EBU Clock Divide Ratio Status"] #[inline(always)] - pub fn ebudivack(&self) -> EBUDIVACK_R { - EBUDIVACK_R::new(((self.bits >> 22) & 3) as u8) + pub fn ebudivack(&self) -> EbudivackR { + EbudivackR::new(((self.bits >> 22) & 3) as u8) } } impl W { #[doc = "Bit 0 - EBU Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DISR_W { - DISR_W::new(self, 0) + pub fn disr(&mut self) -> DisrW { + DisrW::new(self, 0) } #[doc = "Bit 16 - EBU Clocking Mode"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W { - SYNC_W::new(self, 16) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 16) } #[doc = "Bit 17 - DIV2 Clocking Mode"] #[inline(always)] #[must_use] - pub fn div2(&mut self) -> DIV2_W { - DIV2_W::new(self, 17) + pub fn div2(&mut self) -> Div2W { + Div2W::new(self, 17) } #[doc = "Bits 18:19 - EBU Clock Divide Ratio"] #[inline(always)] #[must_use] - pub fn ebudiv(&mut self) -> EBUDIV_W { - EBUDIV_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ebudiv(&mut self) -> EbudivW { + EbudivW::new(self, 18) } } #[doc = "EBU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLC_SPEC; -impl crate::RegisterSpec for CLC_SPEC { +pub struct ClcSpec; +impl crate::RegisterSpec for ClcSpec { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for CLC_SPEC {} +impl crate::Readable for ClcSpec {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for CLC_SPEC { +impl crate::Writable for ClcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x0011_0000"] -impl crate::Resettable for CLC_SPEC { +impl crate::Resettable for ClcSpec { const RESET_VALUE: u32 = 0x0011_0000; } diff --git a/src/ebu/id.rs b/src/ebu/id.rs index 48f4ab78..1fbe898c 100644 --- a/src/ebu/id.rs +++ b/src/ebu/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "EBU Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x0014_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x0014_c000; } diff --git a/src/ebu/modcon.rs b/src/ebu/modcon.rs index b41fd979..ed8e1563 100644 --- a/src/ebu/modcon.rs +++ b/src/ebu/modcon.rs @@ -1,230 +1,230 @@ #[doc = "Register `MODCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STS` reader - Memory Status Bit"] -pub type STS_R = crate::BitReader; +pub type StsR = crate::BitReader; #[doc = "Field `LCKABRT` reader - Lock Abort"] -pub type LCKABRT_R = crate::BitReader; -#[doc = "Field `SDTRI` reader - SDRAM Tristate"] -pub type SDTRI_R = crate::BitReader; +pub type LckabrtR = crate::BitReader; #[doc = "SDRAM Tristate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDTRI_A { +pub enum Sdtri { #[doc = "0: SDRAM control signals are driven by the EBU when the EBU does not own the external bus. SDRAM cannot be shared."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SDRAM control signals are tri-stated by the EBU when the EBU does not own the external bus. The SDRAM can be shared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDTRI_A) -> Self { + fn from(variant: Sdtri) -> Self { variant as u8 != 0 } } -impl SDTRI_R { +#[doc = "Field `SDTRI` reader - SDRAM Tristate"] +pub type SdtriR = crate::BitReader; +impl SdtriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDTRI_A { + pub const fn variant(&self) -> Sdtri { match self.bits { - false => SDTRI_A::VALUE1, - true => SDTRI_A::VALUE2, + false => Sdtri::Value1, + true => Sdtri::Value2, } } #[doc = "SDRAM control signals are driven by the EBU when the EBU does not own the external bus. SDRAM cannot be shared."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDTRI_A::VALUE1 + *self == Sdtri::Value1 } #[doc = "SDRAM control signals are tri-stated by the EBU when the EBU does not own the external bus. The SDRAM can be shared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDTRI_A::VALUE2 + *self == Sdtri::Value2 } } #[doc = "Field `SDTRI` writer - SDRAM Tristate"] -pub type SDTRI_W<'a, REG> = crate::BitWriter<'a, REG, SDTRI_A>; -impl<'a, REG> SDTRI_W<'a, REG> +pub type SdtriW<'a, REG> = crate::BitWriter<'a, REG, Sdtri>; +impl<'a, REG> SdtriW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SDRAM control signals are driven by the EBU when the EBU does not own the external bus. SDRAM cannot be shared."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SDTRI_A::VALUE1) + self.variant(Sdtri::Value1) } #[doc = "SDRAM control signals are tri-stated by the EBU when the EBU does not own the external bus. The SDRAM can be shared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SDTRI_A::VALUE2) + self.variant(Sdtri::Value2) } } -#[doc = "Field `EXTLOCK` reader - External Bus Lock Control"] -pub type EXTLOCK_R = crate::BitReader; #[doc = "External Bus Lock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXTLOCK_A { +pub enum Extlock { #[doc = "0: External bus is not locked after the EBU gains ownership"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External bus is locked after the EBU gains ownership"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXTLOCK_A) -> Self { + fn from(variant: Extlock) -> Self { variant as u8 != 0 } } -impl EXTLOCK_R { +#[doc = "Field `EXTLOCK` reader - External Bus Lock Control"] +pub type ExtlockR = crate::BitReader; +impl ExtlockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTLOCK_A { + pub const fn variant(&self) -> Extlock { match self.bits { - false => EXTLOCK_A::VALUE1, - true => EXTLOCK_A::VALUE2, + false => Extlock::Value1, + true => Extlock::Value2, } } #[doc = "External bus is not locked after the EBU gains ownership"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTLOCK_A::VALUE1 + *self == Extlock::Value1 } #[doc = "External bus is locked after the EBU gains ownership"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTLOCK_A::VALUE2 + *self == Extlock::Value2 } } #[doc = "Field `EXTLOCK` writer - External Bus Lock Control"] -pub type EXTLOCK_W<'a, REG> = crate::BitWriter<'a, REG, EXTLOCK_A>; -impl<'a, REG> EXTLOCK_W<'a, REG> +pub type ExtlockW<'a, REG> = crate::BitWriter<'a, REG, Extlock>; +impl<'a, REG> ExtlockW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External bus is not locked after the EBU gains ownership"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTLOCK_A::VALUE1) + self.variant(Extlock::Value1) } #[doc = "External bus is locked after the EBU gains ownership"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTLOCK_A::VALUE2) + self.variant(Extlock::Value2) } } -#[doc = "Field `ARBSYNC` reader - Arbitration Signal Synchronization Control"] -pub type ARBSYNC_R = crate::BitReader; #[doc = "Arbitration Signal Synchronization Control\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBSYNC_A { +pub enum Arbsync { #[doc = "0: Arbitration inputs are synchronous"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Arbitration inputs are asynchronous"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBSYNC_A) -> Self { + fn from(variant: Arbsync) -> Self { variant as u8 != 0 } } -impl ARBSYNC_R { +#[doc = "Field `ARBSYNC` reader - Arbitration Signal Synchronization Control"] +pub type ArbsyncR = crate::BitReader; +impl ArbsyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBSYNC_A { + pub const fn variant(&self) -> Arbsync { match self.bits { - false => ARBSYNC_A::VALUE1, - true => ARBSYNC_A::VALUE2, + false => Arbsync::Value1, + true => Arbsync::Value2, } } #[doc = "Arbitration inputs are synchronous"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBSYNC_A::VALUE1 + *self == Arbsync::Value1 } #[doc = "Arbitration inputs are asynchronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBSYNC_A::VALUE2 + *self == Arbsync::Value2 } } #[doc = "Field `ARBSYNC` writer - Arbitration Signal Synchronization Control"] -pub type ARBSYNC_W<'a, REG> = crate::BitWriter<'a, REG, ARBSYNC_A>; -impl<'a, REG> ARBSYNC_W<'a, REG> +pub type ArbsyncW<'a, REG> = crate::BitWriter<'a, REG, Arbsync>; +impl<'a, REG> ArbsyncW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Arbitration inputs are synchronous"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBSYNC_A::VALUE1) + self.variant(Arbsync::Value1) } #[doc = "Arbitration inputs are asynchronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBSYNC_A::VALUE2) + self.variant(Arbsync::Value2) } } -#[doc = "Field `ARBMODE` reader - Arbitration Mode Selection"] -pub type ARBMODE_R = crate::FieldReader; #[doc = "Arbitration Mode Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBMODE_A { +pub enum Arbmode { #[doc = "0: No Bus arbitration mode selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Arbiter Mode arbitration mode selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Participant arbitration mode selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Sole Master arbitration mode selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBMODE_A) -> Self { + fn from(variant: Arbmode) -> Self { variant as _ } } -impl crate::FieldSpec for ARBMODE_A { +impl crate::FieldSpec for Arbmode { type Ux = u8; } -impl ARBMODE_R { +#[doc = "Field `ARBMODE` reader - Arbitration Mode Selection"] +pub type ArbmodeR = crate::FieldReader; +impl ArbmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBMODE_A { + pub const fn variant(&self) -> Arbmode { match self.bits { - 0 => ARBMODE_A::VALUE1, - 1 => ARBMODE_A::VALUE2, - 2 => ARBMODE_A::VALUE3, - 3 => ARBMODE_A::VALUE4, + 0 => Arbmode::Value1, + 1 => Arbmode::Value2, + 2 => Arbmode::Value3, + 3 => Arbmode::Value4, _ => unreachable!(), } } #[doc = "No Bus arbitration mode selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBMODE_A::VALUE1 + *self == Arbmode::Value1 } #[doc = "Arbiter Mode arbitration mode selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBMODE_A::VALUE2 + *self == Arbmode::Value2 } #[doc = "Participant arbitration mode selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ARBMODE_A::VALUE3 + *self == Arbmode::Value3 } #[doc = "Sole Master arbitration mode selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ARBMODE_A::VALUE4 + *self == Arbmode::Value4 } } #[doc = "Field `ARBMODE` writer - Arbitration Mode Selection"] -pub type ARBMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ARBMODE_A>; -impl<'a, REG> ARBMODE_W<'a, REG> +pub type ArbmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Arbmode>; +impl<'a, REG> ArbmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -232,76 +232,76 @@ where #[doc = "No Bus arbitration mode selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBMODE_A::VALUE1) + self.variant(Arbmode::Value1) } #[doc = "Arbiter Mode arbitration mode selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBMODE_A::VALUE2) + self.variant(Arbmode::Value2) } #[doc = "Participant arbitration mode selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ARBMODE_A::VALUE3) + self.variant(Arbmode::Value3) } #[doc = "Sole Master arbitration mode selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ARBMODE_A::VALUE4) + self.variant(Arbmode::Value4) } } -#[doc = "Field `TIMEOUTC` reader - Bus Time-out Control"] -pub type TIMEOUTC_R = crate::FieldReader; #[doc = "Bus Time-out Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUTC_A { +pub enum Timeoutc { #[doc = "0: Time-out is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Time-out is generated after 1 8 clock cycles."] - VALUE2 = 1, + Value2 = 1, #[doc = "255: Time-out is generated after 255 8 clock cycles."] - VALUE3 = 255, + Value3 = 255, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUTC_A) -> Self { + fn from(variant: Timeoutc) -> Self { variant as _ } } -impl crate::FieldSpec for TIMEOUTC_A { +impl crate::FieldSpec for Timeoutc { type Ux = u8; } -impl TIMEOUTC_R { +#[doc = "Field `TIMEOUTC` reader - Bus Time-out Control"] +pub type TimeoutcR = crate::FieldReader; +impl TimeoutcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TIMEOUTC_A::VALUE1), - 1 => Some(TIMEOUTC_A::VALUE2), - 255 => Some(TIMEOUTC_A::VALUE3), + 0 => Some(Timeoutc::Value1), + 1 => Some(Timeoutc::Value2), + 255 => Some(Timeoutc::Value3), _ => None, } } #[doc = "Time-out is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIMEOUTC_A::VALUE1 + *self == Timeoutc::Value1 } #[doc = "Time-out is generated after 1 8 clock cycles."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TIMEOUTC_A::VALUE2 + *self == Timeoutc::Value2 } #[doc = "Time-out is generated after 255 8 clock cycles."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TIMEOUTC_A::VALUE3 + *self == Timeoutc::Value3 } } #[doc = "Field `TIMEOUTC` writer - Bus Time-out Control"] -pub type TIMEOUTC_W<'a, REG> = crate::FieldWriter<'a, REG, 8, TIMEOUTC_A>; -impl<'a, REG> TIMEOUTC_W<'a, REG> +pub type TimeoutcW<'a, REG> = crate::FieldWriter<'a, REG, 8, Timeoutc>; +impl<'a, REG> TimeoutcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -309,227 +309,218 @@ where #[doc = "Time-out is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TIMEOUTC_A::VALUE1) + self.variant(Timeoutc::Value1) } #[doc = "Time-out is generated after 1 8 clock cycles."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TIMEOUTC_A::VALUE2) + self.variant(Timeoutc::Value2) } #[doc = "Time-out is generated after 255 8 clock cycles."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TIMEOUTC_A::VALUE3) + self.variant(Timeoutc::Value3) } } #[doc = "Field `LOCKTIMEOUT` reader - Lock Timeout Counter Preload"] -pub type LOCKTIMEOUT_R = crate::FieldReader; +pub type LocktimeoutR = crate::FieldReader; #[doc = "Field `LOCKTIMEOUT` writer - Lock Timeout Counter Preload"] -pub type LOCKTIMEOUT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LocktimeoutW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `GLOBALCS` reader - Global Chip Select Enable"] -pub type GLOBALCS_R = crate::FieldReader; +pub type GlobalcsR = crate::FieldReader; #[doc = "Field `GLOBALCS` writer - Global Chip Select Enable"] -pub type GLOBALCS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GlobalcsW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `ACCSINH` reader - Access Inhibit request"] -pub type ACCSINH_R = crate::BitReader; +pub type AccsinhR = crate::BitReader; #[doc = "Field `ACCSINH` writer - Access Inhibit request"] -pub type ACCSINH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AccsinhW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACCSINHACK` reader - Access inhibit acknowledge"] -pub type ACCSINHACK_R = crate::BitReader; -#[doc = "Field `ALE` reader - ALE Mode"] -pub type ALE_R = crate::BitReader; +pub type AccsinhackR = crate::BitReader; #[doc = "ALE Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALE_A { +pub enum Ale { #[doc = "0: Output is ADV"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output is ALE"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALE_A) -> Self { + fn from(variant: Ale) -> Self { variant as u8 != 0 } } -impl ALE_R { +#[doc = "Field `ALE` reader - ALE Mode"] +pub type AleR = crate::BitReader; +impl AleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALE_A { + pub const fn variant(&self) -> Ale { match self.bits { - false => ALE_A::VALUE1, - true => ALE_A::VALUE2, + false => Ale::Value1, + true => Ale::Value2, } } #[doc = "Output is ADV"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALE_A::VALUE1 + *self == Ale::Value1 } #[doc = "Output is ALE"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALE_A::VALUE2 + *self == Ale::Value2 } } #[doc = "Field `ALE` writer - ALE Mode"] -pub type ALE_W<'a, REG> = crate::BitWriter<'a, REG, ALE_A>; -impl<'a, REG> ALE_W<'a, REG> +pub type AleW<'a, REG> = crate::BitWriter<'a, REG, Ale>; +impl<'a, REG> AleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Output is ADV"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALE_A::VALUE1) + self.variant(Ale::Value1) } #[doc = "Output is ALE"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALE_A::VALUE2) + self.variant(Ale::Value2) } } impl R { #[doc = "Bit 0 - Memory Status Bit"] #[inline(always)] - pub fn sts(&self) -> STS_R { - STS_R::new((self.bits & 1) != 0) + pub fn sts(&self) -> StsR { + StsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Lock Abort"] #[inline(always)] - pub fn lckabrt(&self) -> LCKABRT_R { - LCKABRT_R::new(((self.bits >> 1) & 1) != 0) + pub fn lckabrt(&self) -> LckabrtR { + LckabrtR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SDRAM Tristate"] #[inline(always)] - pub fn sdtri(&self) -> SDTRI_R { - SDTRI_R::new(((self.bits >> 2) & 1) != 0) + pub fn sdtri(&self) -> SdtriR { + SdtriR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - External Bus Lock Control"] #[inline(always)] - pub fn extlock(&self) -> EXTLOCK_R { - EXTLOCK_R::new(((self.bits >> 4) & 1) != 0) + pub fn extlock(&self) -> ExtlockR { + ExtlockR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Arbitration Signal Synchronization Control"] #[inline(always)] - pub fn arbsync(&self) -> ARBSYNC_R { - ARBSYNC_R::new(((self.bits >> 5) & 1) != 0) + pub fn arbsync(&self) -> ArbsyncR { + ArbsyncR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Arbitration Mode Selection"] #[inline(always)] - pub fn arbmode(&self) -> ARBMODE_R { - ARBMODE_R::new(((self.bits >> 6) & 3) as u8) + pub fn arbmode(&self) -> ArbmodeR { + ArbmodeR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:15 - Bus Time-out Control"] #[inline(always)] - pub fn timeoutc(&self) -> TIMEOUTC_R { - TIMEOUTC_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn timeoutc(&self) -> TimeoutcR { + TimeoutcR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Lock Timeout Counter Preload"] #[inline(always)] - pub fn locktimeout(&self) -> LOCKTIMEOUT_R { - LOCKTIMEOUT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn locktimeout(&self) -> LocktimeoutR { + LocktimeoutR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:27 - Global Chip Select Enable"] #[inline(always)] - pub fn globalcs(&self) -> GLOBALCS_R { - GLOBALCS_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn globalcs(&self) -> GlobalcsR { + GlobalcsR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 28 - Access Inhibit request"] #[inline(always)] - pub fn accsinh(&self) -> ACCSINH_R { - ACCSINH_R::new(((self.bits >> 28) & 1) != 0) + pub fn accsinh(&self) -> AccsinhR { + AccsinhR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Access inhibit acknowledge"] #[inline(always)] - pub fn accsinhack(&self) -> ACCSINHACK_R { - ACCSINHACK_R::new(((self.bits >> 29) & 1) != 0) + pub fn accsinhack(&self) -> AccsinhackR { + AccsinhackR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 31 - ALE Mode"] #[inline(always)] - pub fn ale(&self) -> ALE_R { - ALE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ale(&self) -> AleR { + AleR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 2 - SDRAM Tristate"] #[inline(always)] #[must_use] - pub fn sdtri(&mut self) -> SDTRI_W { - SDTRI_W::new(self, 2) + pub fn sdtri(&mut self) -> SdtriW { + SdtriW::new(self, 2) } #[doc = "Bit 4 - External Bus Lock Control"] #[inline(always)] #[must_use] - pub fn extlock(&mut self) -> EXTLOCK_W { - EXTLOCK_W::new(self, 4) + pub fn extlock(&mut self) -> ExtlockW { + ExtlockW::new(self, 4) } #[doc = "Bit 5 - Arbitration Signal Synchronization Control"] #[inline(always)] #[must_use] - pub fn arbsync(&mut self) -> ARBSYNC_W { - ARBSYNC_W::new(self, 5) + pub fn arbsync(&mut self) -> ArbsyncW { + ArbsyncW::new(self, 5) } #[doc = "Bits 6:7 - Arbitration Mode Selection"] #[inline(always)] #[must_use] - pub fn arbmode(&mut self) -> ARBMODE_W { - ARBMODE_W::new(self, 6) + pub fn arbmode(&mut self) -> ArbmodeW { + ArbmodeW::new(self, 6) } #[doc = "Bits 8:15 - Bus Time-out Control"] #[inline(always)] #[must_use] - pub fn timeoutc(&mut self) -> TIMEOUTC_W { - TIMEOUTC_W::new(self, 8) + pub fn timeoutc(&mut self) -> TimeoutcW { + TimeoutcW::new(self, 8) } #[doc = "Bits 16:23 - Lock Timeout Counter Preload"] #[inline(always)] #[must_use] - pub fn locktimeout(&mut self) -> LOCKTIMEOUT_W { - LOCKTIMEOUT_W::new(self, 16) + pub fn locktimeout(&mut self) -> LocktimeoutW { + LocktimeoutW::new(self, 16) } #[doc = "Bits 24:27 - Global Chip Select Enable"] #[inline(always)] #[must_use] - pub fn globalcs(&mut self) -> GLOBALCS_W { - GLOBALCS_W::new(self, 24) + pub fn globalcs(&mut self) -> GlobalcsW { + GlobalcsW::new(self, 24) } #[doc = "Bit 28 - Access Inhibit request"] #[inline(always)] #[must_use] - pub fn accsinh(&mut self) -> ACCSINH_W { - ACCSINH_W::new(self, 28) + pub fn accsinh(&mut self) -> AccsinhW { + AccsinhW::new(self, 28) } #[doc = "Bit 31 - ALE Mode"] #[inline(always)] #[must_use] - pub fn ale(&mut self) -> ALE_W { - ALE_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ale(&mut self) -> AleW { + AleW::new(self, 31) } } #[doc = "EBU Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MODCON_SPEC; -impl crate::RegisterSpec for MODCON_SPEC { +pub struct ModconSpec; +impl crate::RegisterSpec for ModconSpec { type Ux = u32; } #[doc = "`read()` method returns [`modcon::R`](R) reader structure"] -impl crate::Readable for MODCON_SPEC {} +impl crate::Readable for ModconSpec {} #[doc = "`write(|w| ..)` method takes [`modcon::W`](W) writer structure"] -impl crate::Writable for MODCON_SPEC { +impl crate::Writable for ModconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODCON to value 0x20"] -impl crate::Resettable for MODCON_SPEC { +impl crate::Resettable for ModconSpec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/ebu/sdrmcon.rs b/src/ebu/sdrmcon.rs index db76aa29..11a37054 100644 --- a/src/ebu/sdrmcon.rs +++ b/src/ebu/sdrmcon.rs @@ -1,83 +1,83 @@ #[doc = "Register `SDRMCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDRMCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRAS` reader - Row to precharge delay counter"] -pub type CRAS_R = crate::FieldReader; +pub type CrasR = crate::FieldReader; #[doc = "Field `CRAS` writer - Row to precharge delay counter"] -pub type CRAS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CrasW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CRFSH` reader - Initialization refresh commands counter"] -pub type CRFSH_R = crate::FieldReader; +pub type CrfshR = crate::FieldReader; #[doc = "Field `CRFSH` writer - Initialization refresh commands counter"] -pub type CRFSH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CrfshW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CRSC` reader - Mode register set-up time"] -pub type CRSC_R = crate::FieldReader; +pub type CrscR = crate::FieldReader; #[doc = "Field `CRSC` writer - Mode register set-up time"] -pub type CRSC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type CrscW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CRP` reader - Row precharge time counter"] -pub type CRP_R = crate::FieldReader; +pub type CrpR = crate::FieldReader; #[doc = "Field `CRP` writer - Row precharge time counter"] -pub type CRP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `AWIDTH` reader - Width of column address"] -pub type AWIDTH_R = crate::FieldReader; +pub type CrpW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Width of column address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum AWIDTH_A { +pub enum Awidth { #[doc = "0: do not use"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Address(8:0)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Address(9:0)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Address(10:0)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: AWIDTH_A) -> Self { + fn from(variant: Awidth) -> Self { variant as _ } } -impl crate::FieldSpec for AWIDTH_A { +impl crate::FieldSpec for Awidth { type Ux = u8; } -impl AWIDTH_R { +#[doc = "Field `AWIDTH` reader - Width of column address"] +pub type AwidthR = crate::FieldReader; +impl AwidthR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AWIDTH_A { + pub const fn variant(&self) -> Awidth { match self.bits { - 0 => AWIDTH_A::VALUE1, - 1 => AWIDTH_A::VALUE2, - 2 => AWIDTH_A::VALUE3, - 3 => AWIDTH_A::VALUE4, + 0 => Awidth::Value1, + 1 => Awidth::Value2, + 2 => Awidth::Value3, + 3 => Awidth::Value4, _ => unreachable!(), } } #[doc = "do not use"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AWIDTH_A::VALUE1 + *self == Awidth::Value1 } #[doc = "Address(8:0)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AWIDTH_A::VALUE2 + *self == Awidth::Value2 } #[doc = "Address(9:0)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == AWIDTH_A::VALUE3 + *self == Awidth::Value3 } #[doc = "Address(10:0)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == AWIDTH_A::VALUE4 + *self == Awidth::Value4 } } #[doc = "Field `AWIDTH` writer - Width of column address"] -pub type AWIDTH_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, AWIDTH_A>; -impl<'a, REG> AWIDTH_W<'a, REG> +pub type AwidthW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Awidth>; +impl<'a, REG> AwidthW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -85,100 +85,100 @@ where #[doc = "do not use"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AWIDTH_A::VALUE1) + self.variant(Awidth::Value1) } #[doc = "Address(8:0)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AWIDTH_A::VALUE2) + self.variant(Awidth::Value2) } #[doc = "Address(9:0)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(AWIDTH_A::VALUE3) + self.variant(Awidth::Value3) } #[doc = "Address(10:0)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(AWIDTH_A::VALUE4) + self.variant(Awidth::Value4) } } #[doc = "Field `CRCD` reader - Row to column delay counter"] -pub type CRCD_R = crate::FieldReader; +pub type CrcdR = crate::FieldReader; #[doc = "Field `CRCD` writer - Row to column delay counter"] -pub type CRCD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type CrcdW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `CRC` reader - Row cycle time counter"] -pub type CRC_R = crate::FieldReader; +pub type CrcR = crate::FieldReader; #[doc = "Field `CRC` writer - Row cycle time counter"] -pub type CRC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `ROWM` reader - Mask for row tag"] -pub type ROWM_R = crate::FieldReader; +pub type CrcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Mask for row tag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ROWM_A { +pub enum Rowm { #[doc = "1: Address bit 26 to 9"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Address bit 26 to 10"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Address bit 26 to 11"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Address bit 26 to 12"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Address bit 26 to 13"] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ROWM_A) -> Self { + fn from(variant: Rowm) -> Self { variant as _ } } -impl crate::FieldSpec for ROWM_A { +impl crate::FieldSpec for Rowm { type Ux = u8; } -impl ROWM_R { +#[doc = "Field `ROWM` reader - Mask for row tag"] +pub type RowmR = crate::FieldReader; +impl RowmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(ROWM_A::VALUE2), - 2 => Some(ROWM_A::VALUE3), - 3 => Some(ROWM_A::VALUE4), - 4 => Some(ROWM_A::VALUE5), - 5 => Some(ROWM_A::VALUE6), + 1 => Some(Rowm::Value2), + 2 => Some(Rowm::Value3), + 3 => Some(Rowm::Value4), + 4 => Some(Rowm::Value5), + 5 => Some(Rowm::Value6), _ => None, } } #[doc = "Address bit 26 to 9"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ROWM_A::VALUE2 + *self == Rowm::Value2 } #[doc = "Address bit 26 to 10"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ROWM_A::VALUE3 + *self == Rowm::Value3 } #[doc = "Address bit 26 to 11"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ROWM_A::VALUE4 + *self == Rowm::Value4 } #[doc = "Address bit 26 to 12"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == ROWM_A::VALUE5 + *self == Rowm::Value5 } #[doc = "Address bit 26 to 13"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == ROWM_A::VALUE6 + *self == Rowm::Value6 } } #[doc = "Field `ROWM` writer - Mask for row tag"] -pub type ROWM_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ROWM_A>; -impl<'a, REG> ROWM_W<'a, REG> +pub type RowmW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rowm>; +impl<'a, REG> RowmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -186,113 +186,113 @@ where #[doc = "Address bit 26 to 9"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ROWM_A::VALUE2) + self.variant(Rowm::Value2) } #[doc = "Address bit 26 to 10"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ROWM_A::VALUE3) + self.variant(Rowm::Value3) } #[doc = "Address bit 26 to 11"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ROWM_A::VALUE4) + self.variant(Rowm::Value4) } #[doc = "Address bit 26 to 12"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(ROWM_A::VALUE5) + self.variant(Rowm::Value5) } #[doc = "Address bit 26 to 13"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(ROWM_A::VALUE6) + self.variant(Rowm::Value6) } } -#[doc = "Field `BANKM` reader - Mask for bank tag"] -pub type BANKM_R = crate::FieldReader; #[doc = "Mask for bank tag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BANKM_A { +pub enum Bankm { #[doc = "1: Address bit 21 to 20"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Address bit 22 to 21"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Address bit 23 to 22"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Address bit 24 to 23"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Address bit 25 to 24"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Address bit 26 to 25"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Address bit 26"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BANKM_A) -> Self { + fn from(variant: Bankm) -> Self { variant as _ } } -impl crate::FieldSpec for BANKM_A { +impl crate::FieldSpec for Bankm { type Ux = u8; } -impl BANKM_R { +#[doc = "Field `BANKM` reader - Mask for bank tag"] +pub type BankmR = crate::FieldReader; +impl BankmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(BANKM_A::VALUE2), - 2 => Some(BANKM_A::VALUE3), - 3 => Some(BANKM_A::VALUE4), - 4 => Some(BANKM_A::VALUE5), - 5 => Some(BANKM_A::VALUE6), - 6 => Some(BANKM_A::VALUE7), - 7 => Some(BANKM_A::VALUE8), + 1 => Some(Bankm::Value2), + 2 => Some(Bankm::Value3), + 3 => Some(Bankm::Value4), + 4 => Some(Bankm::Value5), + 5 => Some(Bankm::Value6), + 6 => Some(Bankm::Value7), + 7 => Some(Bankm::Value8), _ => None, } } #[doc = "Address bit 21 to 20"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BANKM_A::VALUE2 + *self == Bankm::Value2 } #[doc = "Address bit 22 to 21"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BANKM_A::VALUE3 + *self == Bankm::Value3 } #[doc = "Address bit 23 to 22"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BANKM_A::VALUE4 + *self == Bankm::Value4 } #[doc = "Address bit 24 to 23"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BANKM_A::VALUE5 + *self == Bankm::Value5 } #[doc = "Address bit 25 to 24"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == BANKM_A::VALUE6 + *self == Bankm::Value6 } #[doc = "Address bit 26 to 25"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == BANKM_A::VALUE7 + *self == Bankm::Value7 } #[doc = "Address bit 26"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == BANKM_A::VALUE8 + *self == Bankm::Value8 } } #[doc = "Field `BANKM` writer - Mask for bank tag"] -pub type BANKM_W<'a, REG> = crate::FieldWriter<'a, REG, 3, BANKM_A>; -impl<'a, REG> BANKM_W<'a, REG> +pub type BankmW<'a, REG> = crate::FieldWriter<'a, REG, 3, Bankm>; +impl<'a, REG> BankmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -300,156 +300,156 @@ where #[doc = "Address bit 21 to 20"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE2) + self.variant(Bankm::Value2) } #[doc = "Address bit 22 to 21"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE3) + self.variant(Bankm::Value3) } #[doc = "Address bit 23 to 22"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE4) + self.variant(Bankm::Value4) } #[doc = "Address bit 24 to 23"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE5) + self.variant(Bankm::Value5) } #[doc = "Address bit 25 to 24"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE6) + self.variant(Bankm::Value6) } #[doc = "Address bit 26 to 25"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE7) + self.variant(Bankm::Value7) } #[doc = "Address bit 26"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(BANKM_A::VALUE8) + self.variant(Bankm::Value8) } } #[doc = "Field `CRCE` reader - Row cycle time counter extension"] -pub type CRCE_R = crate::FieldReader; +pub type CrceR = crate::FieldReader; #[doc = "Field `CRCE` writer - Row cycle time counter extension"] -pub type CRCE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `CLKDIS` reader - Disable SDRAM clock output"] -pub type CLKDIS_R = crate::BitReader; +pub type CrceW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Disable SDRAM clock output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKDIS_A { +pub enum Clkdis { #[doc = "0: clock enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clock disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKDIS_A) -> Self { + fn from(variant: Clkdis) -> Self { variant as u8 != 0 } } -impl CLKDIS_R { +#[doc = "Field `CLKDIS` reader - Disable SDRAM clock output"] +pub type ClkdisR = crate::BitReader; +impl ClkdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKDIS_A { + pub const fn variant(&self) -> Clkdis { match self.bits { - false => CLKDIS_A::VALUE1, - true => CLKDIS_A::VALUE2, + false => Clkdis::Value1, + true => Clkdis::Value2, } } #[doc = "clock enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKDIS_A::VALUE1 + *self == Clkdis::Value1 } #[doc = "clock disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKDIS_A::VALUE2 + *self == Clkdis::Value2 } } #[doc = "Field `CLKDIS` writer - Disable SDRAM clock output"] -pub type CLKDIS_W<'a, REG> = crate::BitWriter<'a, REG, CLKDIS_A>; -impl<'a, REG> CLKDIS_W<'a, REG> +pub type ClkdisW<'a, REG> = crate::BitWriter<'a, REG, Clkdis>; +impl<'a, REG> ClkdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "clock enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLKDIS_A::VALUE1) + self.variant(Clkdis::Value1) } #[doc = "clock disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLKDIS_A::VALUE2) + self.variant(Clkdis::Value2) } } -#[doc = "Field `PWR_MODE` reader - Power Save Mode used for gated clock mode"] -pub type PWR_MODE_R = crate::FieldReader; #[doc = "Power Save Mode used for gated clock mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PWR_MODE_A { +pub enum PwrMode { #[doc = "0: precharge before clock stop (default after reset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: auto-precharge before clock stop"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: active power down (stop clock without precharge)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: clock stop power down"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PWR_MODE_A) -> Self { + fn from(variant: PwrMode) -> Self { variant as _ } } -impl crate::FieldSpec for PWR_MODE_A { +impl crate::FieldSpec for PwrMode { type Ux = u8; } -impl PWR_MODE_R { +#[doc = "Field `PWR_MODE` reader - Power Save Mode used for gated clock mode"] +pub type PwrModeR = crate::FieldReader; +impl PwrModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PWR_MODE_A { + pub const fn variant(&self) -> PwrMode { match self.bits { - 0 => PWR_MODE_A::VALUE1, - 1 => PWR_MODE_A::VALUE2, - 2 => PWR_MODE_A::VALUE3, - 3 => PWR_MODE_A::VALUE4, + 0 => PwrMode::Value1, + 1 => PwrMode::Value2, + 2 => PwrMode::Value3, + 3 => PwrMode::Value4, _ => unreachable!(), } } #[doc = "precharge before clock stop (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PWR_MODE_A::VALUE1 + *self == PwrMode::Value1 } #[doc = "auto-precharge before clock stop"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PWR_MODE_A::VALUE2 + *self == PwrMode::Value2 } #[doc = "active power down (stop clock without precharge)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PWR_MODE_A::VALUE3 + *self == PwrMode::Value3 } #[doc = "clock stop power down"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PWR_MODE_A::VALUE4 + *self == PwrMode::Value4 } } #[doc = "Field `PWR_MODE` writer - Power Save Mode used for gated clock mode"] -pub type PWR_MODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PWR_MODE_A>; -impl<'a, REG> PWR_MODE_W<'a, REG> +pub type PwrModeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PwrMode>; +impl<'a, REG> PwrModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -457,247 +457,238 @@ where #[doc = "precharge before clock stop (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PWR_MODE_A::VALUE1) + self.variant(PwrMode::Value1) } #[doc = "auto-precharge before clock stop"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PWR_MODE_A::VALUE2) + self.variant(PwrMode::Value2) } #[doc = "active power down (stop clock without precharge)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PWR_MODE_A::VALUE3) + self.variant(PwrMode::Value3) } #[doc = "clock stop power down"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PWR_MODE_A::VALUE4) + self.variant(PwrMode::Value4) } } -#[doc = "Field `SDCMSEL` reader - SDRAM clock mode select"] -pub type SDCMSEL_R = crate::BitReader; #[doc = "SDRAM clock mode select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDCMSEL_A { +pub enum Sdcmsel { #[doc = "1: clock disabled between accesses"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: clock continuously runs"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDCMSEL_A) -> Self { + fn from(variant: Sdcmsel) -> Self { variant as u8 != 0 } } -impl SDCMSEL_R { +#[doc = "Field `SDCMSEL` reader - SDRAM clock mode select"] +pub type SdcmselR = crate::BitReader; +impl SdcmselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDCMSEL_A { + pub const fn variant(&self) -> Sdcmsel { match self.bits { - true => SDCMSEL_A::VALUE1, - false => SDCMSEL_A::VALUE2, + true => Sdcmsel::Value1, + false => Sdcmsel::Value2, } } #[doc = "clock disabled between accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDCMSEL_A::VALUE1 + *self == Sdcmsel::Value1 } #[doc = "clock continuously runs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDCMSEL_A::VALUE2 + *self == Sdcmsel::Value2 } } #[doc = "Field `SDCMSEL` writer - SDRAM clock mode select"] -pub type SDCMSEL_W<'a, REG> = crate::BitWriter<'a, REG, SDCMSEL_A>; -impl<'a, REG> SDCMSEL_W<'a, REG> +pub type SdcmselW<'a, REG> = crate::BitWriter<'a, REG, Sdcmsel>; +impl<'a, REG> SdcmselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "clock disabled between accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SDCMSEL_A::VALUE1) + self.variant(Sdcmsel::Value1) } #[doc = "clock continuously runs"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SDCMSEL_A::VALUE2) + self.variant(Sdcmsel::Value2) } } impl R { #[doc = "Bits 0:3 - Row to precharge delay counter"] #[inline(always)] - pub fn cras(&self) -> CRAS_R { - CRAS_R::new((self.bits & 0x0f) as u8) + pub fn cras(&self) -> CrasR { + CrasR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Initialization refresh commands counter"] #[inline(always)] - pub fn crfsh(&self) -> CRFSH_R { - CRFSH_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn crfsh(&self) -> CrfshR { + CrfshR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:9 - Mode register set-up time"] #[inline(always)] - pub fn crsc(&self) -> CRSC_R { - CRSC_R::new(((self.bits >> 8) & 3) as u8) + pub fn crsc(&self) -> CrscR { + CrscR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Row precharge time counter"] #[inline(always)] - pub fn crp(&self) -> CRP_R { - CRP_R::new(((self.bits >> 10) & 3) as u8) + pub fn crp(&self) -> CrpR { + CrpR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Width of column address"] #[inline(always)] - pub fn awidth(&self) -> AWIDTH_R { - AWIDTH_R::new(((self.bits >> 12) & 3) as u8) + pub fn awidth(&self) -> AwidthR { + AwidthR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Row to column delay counter"] #[inline(always)] - pub fn crcd(&self) -> CRCD_R { - CRCD_R::new(((self.bits >> 14) & 3) as u8) + pub fn crcd(&self) -> CrcdR { + CrcdR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:18 - Row cycle time counter"] #[inline(always)] - pub fn crc(&self) -> CRC_R { - CRC_R::new(((self.bits >> 16) & 7) as u8) + pub fn crc(&self) -> CrcR { + CrcR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Mask for row tag"] #[inline(always)] - pub fn rowm(&self) -> ROWM_R { - ROWM_R::new(((self.bits >> 19) & 7) as u8) + pub fn rowm(&self) -> RowmR { + RowmR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 22:24 - Mask for bank tag"] #[inline(always)] - pub fn bankm(&self) -> BANKM_R { - BANKM_R::new(((self.bits >> 22) & 7) as u8) + pub fn bankm(&self) -> BankmR { + BankmR::new(((self.bits >> 22) & 7) as u8) } #[doc = "Bits 25:27 - Row cycle time counter extension"] #[inline(always)] - pub fn crce(&self) -> CRCE_R { - CRCE_R::new(((self.bits >> 25) & 7) as u8) + pub fn crce(&self) -> CrceR { + CrceR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bit 28 - Disable SDRAM clock output"] #[inline(always)] - pub fn clkdis(&self) -> CLKDIS_R { - CLKDIS_R::new(((self.bits >> 28) & 1) != 0) + pub fn clkdis(&self) -> ClkdisR { + ClkdisR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bits 29:30 - Power Save Mode used for gated clock mode"] #[inline(always)] - pub fn pwr_mode(&self) -> PWR_MODE_R { - PWR_MODE_R::new(((self.bits >> 29) & 3) as u8) + pub fn pwr_mode(&self) -> PwrModeR { + PwrModeR::new(((self.bits >> 29) & 3) as u8) } #[doc = "Bit 31 - SDRAM clock mode select"] #[inline(always)] - pub fn sdcmsel(&self) -> SDCMSEL_R { - SDCMSEL_R::new(((self.bits >> 31) & 1) != 0) + pub fn sdcmsel(&self) -> SdcmselR { + SdcmselR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Row to precharge delay counter"] #[inline(always)] #[must_use] - pub fn cras(&mut self) -> CRAS_W { - CRAS_W::new(self, 0) + pub fn cras(&mut self) -> CrasW { + CrasW::new(self, 0) } #[doc = "Bits 4:7 - Initialization refresh commands counter"] #[inline(always)] #[must_use] - pub fn crfsh(&mut self) -> CRFSH_W { - CRFSH_W::new(self, 4) + pub fn crfsh(&mut self) -> CrfshW { + CrfshW::new(self, 4) } #[doc = "Bits 8:9 - Mode register set-up time"] #[inline(always)] #[must_use] - pub fn crsc(&mut self) -> CRSC_W { - CRSC_W::new(self, 8) + pub fn crsc(&mut self) -> CrscW { + CrscW::new(self, 8) } #[doc = "Bits 10:11 - Row precharge time counter"] #[inline(always)] #[must_use] - pub fn crp(&mut self) -> CRP_W { - CRP_W::new(self, 10) + pub fn crp(&mut self) -> CrpW { + CrpW::new(self, 10) } #[doc = "Bits 12:13 - Width of column address"] #[inline(always)] #[must_use] - pub fn awidth(&mut self) -> AWIDTH_W { - AWIDTH_W::new(self, 12) + pub fn awidth(&mut self) -> AwidthW { + AwidthW::new(self, 12) } #[doc = "Bits 14:15 - Row to column delay counter"] #[inline(always)] #[must_use] - pub fn crcd(&mut self) -> CRCD_W { - CRCD_W::new(self, 14) + pub fn crcd(&mut self) -> CrcdW { + CrcdW::new(self, 14) } #[doc = "Bits 16:18 - Row cycle time counter"] #[inline(always)] #[must_use] - pub fn crc(&mut self) -> CRC_W { - CRC_W::new(self, 16) + pub fn crc(&mut self) -> CrcW { + CrcW::new(self, 16) } #[doc = "Bits 19:21 - Mask for row tag"] #[inline(always)] #[must_use] - pub fn rowm(&mut self) -> ROWM_W { - ROWM_W::new(self, 19) + pub fn rowm(&mut self) -> RowmW { + RowmW::new(self, 19) } #[doc = "Bits 22:24 - Mask for bank tag"] #[inline(always)] #[must_use] - pub fn bankm(&mut self) -> BANKM_W { - BANKM_W::new(self, 22) + pub fn bankm(&mut self) -> BankmW { + BankmW::new(self, 22) } #[doc = "Bits 25:27 - Row cycle time counter extension"] #[inline(always)] #[must_use] - pub fn crce(&mut self) -> CRCE_W { - CRCE_W::new(self, 25) + pub fn crce(&mut self) -> CrceW { + CrceW::new(self, 25) } #[doc = "Bit 28 - Disable SDRAM clock output"] #[inline(always)] #[must_use] - pub fn clkdis(&mut self) -> CLKDIS_W { - CLKDIS_W::new(self, 28) + pub fn clkdis(&mut self) -> ClkdisW { + ClkdisW::new(self, 28) } #[doc = "Bits 29:30 - Power Save Mode used for gated clock mode"] #[inline(always)] #[must_use] - pub fn pwr_mode(&mut self) -> PWR_MODE_W { - PWR_MODE_W::new(self, 29) + pub fn pwr_mode(&mut self) -> PwrModeW { + PwrModeW::new(self, 29) } #[doc = "Bit 31 - SDRAM clock mode select"] #[inline(always)] #[must_use] - pub fn sdcmsel(&mut self) -> SDCMSEL_W { - SDCMSEL_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sdcmsel(&mut self) -> SdcmselW { + SdcmselW::new(self, 31) } } #[doc = "EBU SDRAM Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDRMCON_SPEC; -impl crate::RegisterSpec for SDRMCON_SPEC { +pub struct SdrmconSpec; +impl crate::RegisterSpec for SdrmconSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdrmcon::R`](R) reader structure"] -impl crate::Readable for SDRMCON_SPEC {} +impl crate::Readable for SdrmconSpec {} #[doc = "`write(|w| ..)` method takes [`sdrmcon::W`](W) writer structure"] -impl crate::Writable for SDRMCON_SPEC { +impl crate::Writable for SdrmconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDRMCON to value 0x8000_0000"] -impl crate::Resettable for SDRMCON_SPEC { +impl crate::Resettable for SdrmconSpec { const RESET_VALUE: u32 = 0x8000_0000; } diff --git a/src/ebu/sdrmod.rs b/src/ebu/sdrmod.rs index b0d52167..7e6213e0 100644 --- a/src/ebu/sdrmod.rs +++ b/src/ebu/sdrmod.rs @@ -1,75 +1,75 @@ #[doc = "Register `SDRMOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDRMOD` writer"] -pub type W = crate::W; -#[doc = "Field `BURSTL` reader - Burst length"] -pub type BURSTL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Burst length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BURSTL_A { +pub enum Burstl { #[doc = "0: 1 (default after reset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 4"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: 16"] - VALUE5 = 4, + Value5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BURSTL_A) -> Self { + fn from(variant: Burstl) -> Self { variant as _ } } -impl crate::FieldSpec for BURSTL_A { +impl crate::FieldSpec for Burstl { type Ux = u8; } -impl BURSTL_R { +#[doc = "Field `BURSTL` reader - Burst length"] +pub type BurstlR = crate::FieldReader; +impl BurstlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BURSTL_A::VALUE1), - 1 => Some(BURSTL_A::VALUE2), - 2 => Some(BURSTL_A::VALUE3), - 3 => Some(BURSTL_A::VALUE4), - 4 => Some(BURSTL_A::VALUE5), + 0 => Some(Burstl::Value1), + 1 => Some(Burstl::Value2), + 2 => Some(Burstl::Value3), + 3 => Some(Burstl::Value4), + 4 => Some(Burstl::Value5), _ => None, } } #[doc = "1 (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BURSTL_A::VALUE1 + *self == Burstl::Value1 } #[doc = "2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BURSTL_A::VALUE2 + *self == Burstl::Value2 } #[doc = "4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BURSTL_A::VALUE3 + *self == Burstl::Value3 } #[doc = "8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BURSTL_A::VALUE4 + *self == Burstl::Value4 } #[doc = "16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BURSTL_A::VALUE5 + *self == Burstl::Value5 } } #[doc = "Field `BURSTL` writer - Burst length"] -pub type BURSTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, BURSTL_A>; -impl<'a, REG> BURSTL_W<'a, REG> +pub type BurstlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Burstl>; +impl<'a, REG> BurstlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,114 +77,114 @@ where #[doc = "1 (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BURSTL_A::VALUE1) + self.variant(Burstl::Value1) } #[doc = "2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BURSTL_A::VALUE2) + self.variant(Burstl::Value2) } #[doc = "4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BURSTL_A::VALUE3) + self.variant(Burstl::Value3) } #[doc = "8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BURSTL_A::VALUE4) + self.variant(Burstl::Value4) } #[doc = "16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BURSTL_A::VALUE5) + self.variant(Burstl::Value5) } } -#[doc = "Field `BTYP` reader - Burst type"] -pub type BTYP_R = crate::BitReader; #[doc = "Burst type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BTYP_A { +pub enum Btyp { #[doc = "0: Only this value should be written (default after reset)"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BTYP_A) -> Self { + fn from(variant: Btyp) -> Self { variant as u8 != 0 } } -impl BTYP_R { +#[doc = "Field `BTYP` reader - Burst type"] +pub type BtypR = crate::BitReader; +impl BtypR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(BTYP_A::VALUE1), + false => Some(Btyp::Value1), _ => None, } } #[doc = "Only this value should be written (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BTYP_A::VALUE1 + *self == Btyp::Value1 } } #[doc = "Field `BTYP` writer - Burst type"] -pub type BTYP_W<'a, REG> = crate::BitWriter<'a, REG, BTYP_A>; -impl<'a, REG> BTYP_W<'a, REG> +pub type BtypW<'a, REG> = crate::BitWriter<'a, REG, Btyp>; +impl<'a, REG> BtypW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Only this value should be written (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BTYP_A::VALUE1) + self.variant(Btyp::Value1) } } -#[doc = "Field `CASLAT` reader - CAS latency"] -pub type CASLAT_R = crate::FieldReader; #[doc = "CAS latency\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CASLAT_A { +pub enum Caslat { #[doc = "2: Two clocks (default after reset)"] - VALUE1 = 2, + Value1 = 2, #[doc = "3: Three clocks"] - VALUE2 = 3, + Value2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CASLAT_A) -> Self { + fn from(variant: Caslat) -> Self { variant as _ } } -impl crate::FieldSpec for CASLAT_A { +impl crate::FieldSpec for Caslat { type Ux = u8; } -impl CASLAT_R { +#[doc = "Field `CASLAT` reader - CAS latency"] +pub type CaslatR = crate::FieldReader; +impl CaslatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 2 => Some(CASLAT_A::VALUE1), - 3 => Some(CASLAT_A::VALUE2), + 2 => Some(Caslat::Value1), + 3 => Some(Caslat::Value2), _ => None, } } #[doc = "Two clocks (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CASLAT_A::VALUE1 + *self == Caslat::Value1 } #[doc = "Three clocks"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CASLAT_A::VALUE2 + *self == Caslat::Value2 } } #[doc = "Field `CASLAT` writer - CAS latency"] -pub type CASLAT_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CASLAT_A>; -impl<'a, REG> CASLAT_W<'a, REG> +pub type CaslatW<'a, REG> = crate::FieldWriter<'a, REG, 3, Caslat>; +impl<'a, REG> CaslatW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -192,50 +192,50 @@ where #[doc = "Two clocks (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CASLAT_A::VALUE1) + self.variant(Caslat::Value1) } #[doc = "Three clocks"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CASLAT_A::VALUE2) + self.variant(Caslat::Value2) } } -#[doc = "Field `OPMODE` reader - Operation Mode"] -pub type OPMODE_R = crate::FieldReader; #[doc = "Operation Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OPMODE_A { +pub enum Opmode { #[doc = "0: Only this value must be written (default after reset)"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OPMODE_A) -> Self { + fn from(variant: Opmode) -> Self { variant as _ } } -impl crate::FieldSpec for OPMODE_A { +impl crate::FieldSpec for Opmode { type Ux = u8; } -impl OPMODE_R { +#[doc = "Field `OPMODE` reader - Operation Mode"] +pub type OpmodeR = crate::FieldReader; +impl OpmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OPMODE_A::VALUE1), + 0 => Some(Opmode::Value1), _ => None, } } #[doc = "Only this value must be written (default after reset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OPMODE_A::VALUE1 + *self == Opmode::Value1 } } #[doc = "Field `OPMODE` writer - Operation Mode"] -pub type OPMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 7, OPMODE_A>; -impl<'a, REG> OPMODE_W<'a, REG> +pub type OpmodeW<'a, REG> = crate::FieldWriter<'a, REG, 7, Opmode>; +impl<'a, REG> OpmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -243,118 +243,109 @@ where #[doc = "Only this value must be written (default after reset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OPMODE_A::VALUE1) + self.variant(Opmode::Value1) } } #[doc = "Field `COLDSTART` writer - SDRAM coldstart"] -pub type COLDSTART_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ColdstartW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `XOPM` reader - Extended Operation Mode"] -pub type XOPM_R = crate::FieldReader; +pub type XopmR = crate::FieldReader; #[doc = "Field `XOPM` writer - Extended Operation Mode"] -pub type XOPM_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type XopmW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `XBA` reader - Extended Operation Bank Select"] -pub type XBA_R = crate::FieldReader; +pub type XbaR = crate::FieldReader; #[doc = "Field `XBA` writer - Extended Operation Bank Select"] -pub type XBA_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XbaW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Burst length"] #[inline(always)] - pub fn burstl(&self) -> BURSTL_R { - BURSTL_R::new((self.bits & 7) as u8) + pub fn burstl(&self) -> BurstlR { + BurstlR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Burst type"] #[inline(always)] - pub fn btyp(&self) -> BTYP_R { - BTYP_R::new(((self.bits >> 3) & 1) != 0) + pub fn btyp(&self) -> BtypR { + BtypR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - CAS latency"] #[inline(always)] - pub fn caslat(&self) -> CASLAT_R { - CASLAT_R::new(((self.bits >> 4) & 7) as u8) + pub fn caslat(&self) -> CaslatR { + CaslatR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:13 - Operation Mode"] #[inline(always)] - pub fn opmode(&self) -> OPMODE_R { - OPMODE_R::new(((self.bits >> 7) & 0x7f) as u8) + pub fn opmode(&self) -> OpmodeR { + OpmodeR::new(((self.bits >> 7) & 0x7f) as u8) } #[doc = "Bits 16:27 - Extended Operation Mode"] #[inline(always)] - pub fn xopm(&self) -> XOPM_R { - XOPM_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn xopm(&self) -> XopmR { + XopmR::new(((self.bits >> 16) & 0x0fff) as u16) } #[doc = "Bits 28:31 - Extended Operation Bank Select"] #[inline(always)] - pub fn xba(&self) -> XBA_R { - XBA_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn xba(&self) -> XbaR { + XbaR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Burst length"] #[inline(always)] #[must_use] - pub fn burstl(&mut self) -> BURSTL_W { - BURSTL_W::new(self, 0) + pub fn burstl(&mut self) -> BurstlW { + BurstlW::new(self, 0) } #[doc = "Bit 3 - Burst type"] #[inline(always)] #[must_use] - pub fn btyp(&mut self) -> BTYP_W { - BTYP_W::new(self, 3) + pub fn btyp(&mut self) -> BtypW { + BtypW::new(self, 3) } #[doc = "Bits 4:6 - CAS latency"] #[inline(always)] #[must_use] - pub fn caslat(&mut self) -> CASLAT_W { - CASLAT_W::new(self, 4) + pub fn caslat(&mut self) -> CaslatW { + CaslatW::new(self, 4) } #[doc = "Bits 7:13 - Operation Mode"] #[inline(always)] #[must_use] - pub fn opmode(&mut self) -> OPMODE_W { - OPMODE_W::new(self, 7) + pub fn opmode(&mut self) -> OpmodeW { + OpmodeW::new(self, 7) } #[doc = "Bit 15 - SDRAM coldstart"] #[inline(always)] #[must_use] - pub fn coldstart(&mut self) -> COLDSTART_W { - COLDSTART_W::new(self, 15) + pub fn coldstart(&mut self) -> ColdstartW { + ColdstartW::new(self, 15) } #[doc = "Bits 16:27 - Extended Operation Mode"] #[inline(always)] #[must_use] - pub fn xopm(&mut self) -> XOPM_W { - XOPM_W::new(self, 16) + pub fn xopm(&mut self) -> XopmW { + XopmW::new(self, 16) } #[doc = "Bits 28:31 - Extended Operation Bank Select"] #[inline(always)] #[must_use] - pub fn xba(&mut self) -> XBA_W { - XBA_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xba(&mut self) -> XbaW { + XbaW::new(self, 28) } } #[doc = "EBU SDRAM Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmod::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmod::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDRMOD_SPEC; -impl crate::RegisterSpec for SDRMOD_SPEC { +pub struct SdrmodSpec; +impl crate::RegisterSpec for SdrmodSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdrmod::R`](R) reader structure"] -impl crate::Readable for SDRMOD_SPEC {} +impl crate::Readable for SdrmodSpec {} #[doc = "`write(|w| ..)` method takes [`sdrmod::W`](W) writer structure"] -impl crate::Writable for SDRMOD_SPEC { +impl crate::Writable for SdrmodSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDRMOD to value 0x20"] -impl crate::Resettable for SDRMOD_SPEC { +impl crate::Resettable for SdrmodSpec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/ebu/sdrmref.rs b/src/ebu/sdrmref.rs index 9faf8cbd..6e5eb6d0 100644 --- a/src/ebu/sdrmref.rs +++ b/src/ebu/sdrmref.rs @@ -1,183 +1,174 @@ #[doc = "Register `SDRMREF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDRMREF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REFRESHC` reader - Refresh counter period"] -pub type REFRESHC_R = crate::FieldReader; +pub type RefreshcR = crate::FieldReader; #[doc = "Field `REFRESHC` writer - Refresh counter period"] -pub type REFRESHC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type RefreshcW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `REFRESHR` reader - Number of refresh commands"] -pub type REFRESHR_R = crate::FieldReader; +pub type RefreshrR = crate::FieldReader; #[doc = "Field `REFRESHR` writer - Number of refresh commands"] -pub type REFRESHR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type RefreshrW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SELFREXST` reader - Self Refresh Exit Status."] -pub type SELFREXST_R = crate::BitReader; +pub type SelfrexstR = crate::BitReader; #[doc = "Field `SELFREX` reader - Self Refresh Exit (Power Up)."] -pub type SELFREX_R = crate::BitReader; +pub type SelfrexR = crate::BitReader; #[doc = "Field `SELFREX` writer - Self Refresh Exit (Power Up)."] -pub type SELFREX_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SelfrexW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SELFRENST` reader - Self Refresh Entry Status."] -pub type SELFRENST_R = crate::BitReader; +pub type SelfrenstR = crate::BitReader; #[doc = "Field `SELFREN` reader - Self Refresh Entry"] -pub type SELFREN_R = crate::BitReader; +pub type SelfrenR = crate::BitReader; #[doc = "Field `SELFREN` writer - Self Refresh Entry"] -pub type SELFREN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SelfrenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AUTOSELFR` reader - Automatic Self Refresh"] -pub type AUTOSELFR_R = crate::BitReader; +pub type AutoselfrR = crate::BitReader; #[doc = "Field `AUTOSELFR` writer - Automatic Self Refresh"] -pub type AUTOSELFR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AutoselfrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERFSHC` reader - Extended Refresh Counter Period"] -pub type ERFSHC_R = crate::FieldReader; +pub type ErfshcR = crate::FieldReader; #[doc = "Field `ERFSHC` writer - Extended Refresh Counter Period"] -pub type ERFSHC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type ErfshcW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SELFREX_DLY` reader - Self Refresh Exit Delay"] -pub type SELFREX_DLY_R = crate::FieldReader; +pub type SelfrexDlyR = crate::FieldReader; #[doc = "Field `SELFREX_DLY` writer - Self Refresh Exit Delay"] -pub type SELFREX_DLY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SelfrexDlyW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ARFSH` reader - Auto Refresh on Self refresh Exit"] -pub type ARFSH_R = crate::BitReader; +pub type ArfshR = crate::BitReader; #[doc = "Field `ARFSH` writer - Auto Refresh on Self refresh Exit"] -pub type ARFSH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ArfshW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RES_DLY` reader - Delay on Power Down Exit"] -pub type RES_DLY_R = crate::FieldReader; +pub type ResDlyR = crate::FieldReader; #[doc = "Field `RES_DLY` writer - Delay on Power Down Exit"] -pub type RES_DLY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type ResDlyW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:5 - Refresh counter period"] #[inline(always)] - pub fn refreshc(&self) -> REFRESHC_R { - REFRESHC_R::new((self.bits & 0x3f) as u8) + pub fn refreshc(&self) -> RefreshcR { + RefreshcR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:8 - Number of refresh commands"] #[inline(always)] - pub fn refreshr(&self) -> REFRESHR_R { - REFRESHR_R::new(((self.bits >> 6) & 7) as u8) + pub fn refreshr(&self) -> RefreshrR { + RefreshrR::new(((self.bits >> 6) & 7) as u8) } #[doc = "Bit 9 - Self Refresh Exit Status."] #[inline(always)] - pub fn selfrexst(&self) -> SELFREXST_R { - SELFREXST_R::new(((self.bits >> 9) & 1) != 0) + pub fn selfrexst(&self) -> SelfrexstR { + SelfrexstR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Self Refresh Exit (Power Up)."] #[inline(always)] - pub fn selfrex(&self) -> SELFREX_R { - SELFREX_R::new(((self.bits >> 10) & 1) != 0) + pub fn selfrex(&self) -> SelfrexR { + SelfrexR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Self Refresh Entry Status."] #[inline(always)] - pub fn selfrenst(&self) -> SELFRENST_R { - SELFRENST_R::new(((self.bits >> 11) & 1) != 0) + pub fn selfrenst(&self) -> SelfrenstR { + SelfrenstR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Self Refresh Entry"] #[inline(always)] - pub fn selfren(&self) -> SELFREN_R { - SELFREN_R::new(((self.bits >> 12) & 1) != 0) + pub fn selfren(&self) -> SelfrenR { + SelfrenR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Automatic Self Refresh"] #[inline(always)] - pub fn autoselfr(&self) -> AUTOSELFR_R { - AUTOSELFR_R::new(((self.bits >> 13) & 1) != 0) + pub fn autoselfr(&self) -> AutoselfrR { + AutoselfrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Extended Refresh Counter Period"] #[inline(always)] - pub fn erfshc(&self) -> ERFSHC_R { - ERFSHC_R::new(((self.bits >> 14) & 3) as u8) + pub fn erfshc(&self) -> ErfshcR { + ErfshcR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:23 - Self Refresh Exit Delay"] #[inline(always)] - pub fn selfrex_dly(&self) -> SELFREX_DLY_R { - SELFREX_DLY_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn selfrex_dly(&self) -> SelfrexDlyR { + SelfrexDlyR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - Auto Refresh on Self refresh Exit"] #[inline(always)] - pub fn arfsh(&self) -> ARFSH_R { - ARFSH_R::new(((self.bits >> 24) & 1) != 0) + pub fn arfsh(&self) -> ArfshR { + ArfshR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:27 - Delay on Power Down Exit"] #[inline(always)] - pub fn res_dly(&self) -> RES_DLY_R { - RES_DLY_R::new(((self.bits >> 25) & 7) as u8) + pub fn res_dly(&self) -> ResDlyR { + ResDlyR::new(((self.bits >> 25) & 7) as u8) } } impl W { #[doc = "Bits 0:5 - Refresh counter period"] #[inline(always)] #[must_use] - pub fn refreshc(&mut self) -> REFRESHC_W { - REFRESHC_W::new(self, 0) + pub fn refreshc(&mut self) -> RefreshcW { + RefreshcW::new(self, 0) } #[doc = "Bits 6:8 - Number of refresh commands"] #[inline(always)] #[must_use] - pub fn refreshr(&mut self) -> REFRESHR_W { - REFRESHR_W::new(self, 6) + pub fn refreshr(&mut self) -> RefreshrW { + RefreshrW::new(self, 6) } #[doc = "Bit 10 - Self Refresh Exit (Power Up)."] #[inline(always)] #[must_use] - pub fn selfrex(&mut self) -> SELFREX_W { - SELFREX_W::new(self, 10) + pub fn selfrex(&mut self) -> SelfrexW { + SelfrexW::new(self, 10) } #[doc = "Bit 12 - Self Refresh Entry"] #[inline(always)] #[must_use] - pub fn selfren(&mut self) -> SELFREN_W { - SELFREN_W::new(self, 12) + pub fn selfren(&mut self) -> SelfrenW { + SelfrenW::new(self, 12) } #[doc = "Bit 13 - Automatic Self Refresh"] #[inline(always)] #[must_use] - pub fn autoselfr(&mut self) -> AUTOSELFR_W { - AUTOSELFR_W::new(self, 13) + pub fn autoselfr(&mut self) -> AutoselfrW { + AutoselfrW::new(self, 13) } #[doc = "Bits 14:15 - Extended Refresh Counter Period"] #[inline(always)] #[must_use] - pub fn erfshc(&mut self) -> ERFSHC_W { - ERFSHC_W::new(self, 14) + pub fn erfshc(&mut self) -> ErfshcW { + ErfshcW::new(self, 14) } #[doc = "Bits 16:23 - Self Refresh Exit Delay"] #[inline(always)] #[must_use] - pub fn selfrex_dly(&mut self) -> SELFREX_DLY_W { - SELFREX_DLY_W::new(self, 16) + pub fn selfrex_dly(&mut self) -> SelfrexDlyW { + SelfrexDlyW::new(self, 16) } #[doc = "Bit 24 - Auto Refresh on Self refresh Exit"] #[inline(always)] #[must_use] - pub fn arfsh(&mut self) -> ARFSH_W { - ARFSH_W::new(self, 24) + pub fn arfsh(&mut self) -> ArfshW { + ArfshW::new(self, 24) } #[doc = "Bits 25:27 - Delay on Power Down Exit"] #[inline(always)] #[must_use] - pub fn res_dly(&mut self) -> RES_DLY_W { - RES_DLY_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn res_dly(&mut self) -> ResDlyW { + ResDlyW::new(self, 25) } } #[doc = "EBU SDRAM Refresh Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrmref::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdrmref::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDRMREF_SPEC; -impl crate::RegisterSpec for SDRMREF_SPEC { +pub struct SdrmrefSpec; +impl crate::RegisterSpec for SdrmrefSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdrmref::R`](R) reader structure"] -impl crate::Readable for SDRMREF_SPEC {} +impl crate::Readable for SdrmrefSpec {} #[doc = "`write(|w| ..)` method takes [`sdrmref::W`](W) writer structure"] -impl crate::Writable for SDRMREF_SPEC { +impl crate::Writable for SdrmrefSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDRMREF to value 0"] -impl crate::Resettable for SDRMREF_SPEC { +impl crate::Resettable for SdrmrefSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ebu/sdrstat.rs b/src/ebu/sdrstat.rs index 4ae97c3c..46103af4 100644 --- a/src/ebu/sdrstat.rs +++ b/src/ebu/sdrstat.rs @@ -1,138 +1,138 @@ #[doc = "Register `SDRSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `REFERR` reader - SDRAM Refresh Error"] -pub type REFERR_R = crate::BitReader; +pub type R = crate::R; #[doc = "SDRAM Refresh Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REFERR_A { +pub enum Referr { #[doc = "0: No refresh error."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Refresh error occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REFERR_A) -> Self { + fn from(variant: Referr) -> Self { variant as u8 != 0 } } -impl REFERR_R { +#[doc = "Field `REFERR` reader - SDRAM Refresh Error"] +pub type ReferrR = crate::BitReader; +impl ReferrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REFERR_A { + pub const fn variant(&self) -> Referr { match self.bits { - false => REFERR_A::VALUE1, - true => REFERR_A::VALUE2, + false => Referr::Value1, + true => Referr::Value2, } } #[doc = "No refresh error."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REFERR_A::VALUE1 + *self == Referr::Value1 } #[doc = "Refresh error occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REFERR_A::VALUE2 + *self == Referr::Value2 } } -#[doc = "Field `SDRMBUSY` reader - SDRAM Busy"] -pub type SDRMBUSY_R = crate::BitReader; #[doc = "SDRAM Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDRMBUSY_A { +pub enum Sdrmbusy { #[doc = "0: Power-up initialization sequence is not running"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power-up initialization sequence is running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDRMBUSY_A) -> Self { + fn from(variant: Sdrmbusy) -> Self { variant as u8 != 0 } } -impl SDRMBUSY_R { +#[doc = "Field `SDRMBUSY` reader - SDRAM Busy"] +pub type SdrmbusyR = crate::BitReader; +impl SdrmbusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDRMBUSY_A { + pub const fn variant(&self) -> Sdrmbusy { match self.bits { - false => SDRMBUSY_A::VALUE1, - true => SDRMBUSY_A::VALUE2, + false => Sdrmbusy::Value1, + true => Sdrmbusy::Value2, } } #[doc = "Power-up initialization sequence is not running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDRMBUSY_A::VALUE1 + *self == Sdrmbusy::Value1 } #[doc = "Power-up initialization sequence is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDRMBUSY_A::VALUE2 + *self == Sdrmbusy::Value2 } } -#[doc = "Field `SDERR` reader - SDRAM read error"] -pub type SDERR_R = crate::BitReader; #[doc = "SDRAM read error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDERR_A { +pub enum Sderr { #[doc = "0: Reads running successfully"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read error condition has been detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDERR_A) -> Self { + fn from(variant: Sderr) -> Self { variant as u8 != 0 } } -impl SDERR_R { +#[doc = "Field `SDERR` reader - SDRAM read error"] +pub type SderrR = crate::BitReader; +impl SderrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDERR_A { + pub const fn variant(&self) -> Sderr { match self.bits { - false => SDERR_A::VALUE1, - true => SDERR_A::VALUE2, + false => Sderr::Value1, + true => Sderr::Value2, } } #[doc = "Reads running successfully"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDERR_A::VALUE1 + *self == Sderr::Value1 } #[doc = "Read error condition has been detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDERR_A::VALUE2 + *self == Sderr::Value2 } } impl R { #[doc = "Bit 0 - SDRAM Refresh Error"] #[inline(always)] - pub fn referr(&self) -> REFERR_R { - REFERR_R::new((self.bits & 1) != 0) + pub fn referr(&self) -> ReferrR { + ReferrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDRAM Busy"] #[inline(always)] - pub fn sdrmbusy(&self) -> SDRMBUSY_R { - SDRMBUSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdrmbusy(&self) -> SdrmbusyR { + SdrmbusyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SDRAM read error"] #[inline(always)] - pub fn sderr(&self) -> SDERR_R { - SDERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn sderr(&self) -> SderrR { + SderrR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "EBU SDRAM Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDRSTAT_SPEC; -impl crate::RegisterSpec for SDRSTAT_SPEC { +pub struct SdrstatSpec; +impl crate::RegisterSpec for SdrstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdrstat::R`](R) reader structure"] -impl crate::Readable for SDRSTAT_SPEC {} +impl crate::Readable for SdrstatSpec {} #[doc = "`reset()` method sets SDRSTAT to value 0x0001_0000"] -impl crate::Resettable for SDRSTAT_SPEC { +impl crate::Resettable for SdrstatSpec { const RESET_VALUE: u32 = 0x0001_0000; } diff --git a/src/ebu/usercon.rs b/src/ebu/usercon.rs index 8ffacfed..bb33e312 100644 --- a/src/ebu/usercon.rs +++ b/src/ebu/usercon.rs @@ -1,55 +1,55 @@ #[doc = "Register `USERCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `USERCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DIP` reader - Disable Internal Pipelining"] -pub type DIP_R = crate::BitReader; +pub type DipR = crate::BitReader; #[doc = "Field `DIP` writer - Disable Internal Pipelining"] -pub type DIP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ADDIO` reader - Address Pins to GPIO Mode"] -pub type ADDIO_R = crate::FieldReader; +pub type DipW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Address Pins to GPIO Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum ADDIO_A { +pub enum Addio { #[doc = "0: Address Bit is required for addressing memory"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Address Bit is available for GPIO function"] - VALUE2 = 1, + Value2 = 1, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: ADDIO_A) -> Self { + fn from(variant: Addio) -> Self { variant as _ } } -impl crate::FieldSpec for ADDIO_A { +impl crate::FieldSpec for Addio { type Ux = u16; } -impl ADDIO_R { +#[doc = "Field `ADDIO` reader - Address Pins to GPIO Mode"] +pub type AddioR = crate::FieldReader; +impl AddioR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ADDIO_A::VALUE1), - 1 => Some(ADDIO_A::VALUE2), + 0 => Some(Addio::Value1), + 1 => Some(Addio::Value2), _ => None, } } #[doc = "Address Bit is required for addressing memory"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADDIO_A::VALUE1 + *self == Addio::Value1 } #[doc = "Address Bit is available for GPIO function"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADDIO_A::VALUE2 + *self == Addio::Value2 } } #[doc = "Field `ADDIO` writer - Address Pins to GPIO Mode"] -pub type ADDIO_W<'a, REG> = crate::FieldWriter<'a, REG, 9, ADDIO_A>; -impl<'a, REG> ADDIO_W<'a, REG> +pub type AddioW<'a, REG> = crate::FieldWriter<'a, REG, 9, Addio>; +impl<'a, REG> AddioW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -57,127 +57,118 @@ where #[doc = "Address Bit is required for addressing memory"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADDIO_A::VALUE1) + self.variant(Addio::Value1) } #[doc = "Address Bit is available for GPIO function"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADDIO_A::VALUE2) + self.variant(Addio::Value2) } } -#[doc = "Field `ADVIO` reader - ADV Pin to GPIO Mode"] -pub type ADVIO_R = crate::BitReader; #[doc = "ADV Pin to GPIO Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADVIO_A { +pub enum Advio { #[doc = "0: ADV pin is required for controlling memory"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ADV pin is available for GPIO function"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADVIO_A) -> Self { + fn from(variant: Advio) -> Self { variant as u8 != 0 } } -impl ADVIO_R { +#[doc = "Field `ADVIO` reader - ADV Pin to GPIO Mode"] +pub type AdvioR = crate::BitReader; +impl AdvioR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ADVIO_A { + pub const fn variant(&self) -> Advio { match self.bits { - false => ADVIO_A::VALUE1, - true => ADVIO_A::VALUE2, + false => Advio::Value1, + true => Advio::Value2, } } #[doc = "ADV pin is required for controlling memory"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADVIO_A::VALUE1 + *self == Advio::Value1 } #[doc = "ADV pin is available for GPIO function"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ADVIO_A::VALUE2 + *self == Advio::Value2 } } #[doc = "Field `ADVIO` writer - ADV Pin to GPIO Mode"] -pub type ADVIO_W<'a, REG> = crate::BitWriter<'a, REG, ADVIO_A>; -impl<'a, REG> ADVIO_W<'a, REG> +pub type AdvioW<'a, REG> = crate::BitWriter<'a, REG, Advio>; +impl<'a, REG> AdvioW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ADV pin is required for controlling memory"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ADVIO_A::VALUE1) + self.variant(Advio::Value1) } #[doc = "ADV pin is available for GPIO function"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ADVIO_A::VALUE2) + self.variant(Advio::Value2) } } impl R { #[doc = "Bit 0 - Disable Internal Pipelining"] #[inline(always)] - pub fn dip(&self) -> DIP_R { - DIP_R::new((self.bits & 1) != 0) + pub fn dip(&self) -> DipR { + DipR::new((self.bits & 1) != 0) } #[doc = "Bits 16:24 - Address Pins to GPIO Mode"] #[inline(always)] - pub fn addio(&self) -> ADDIO_R { - ADDIO_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn addio(&self) -> AddioR { + AddioR::new(((self.bits >> 16) & 0x01ff) as u16) } #[doc = "Bit 25 - ADV Pin to GPIO Mode"] #[inline(always)] - pub fn advio(&self) -> ADVIO_R { - ADVIO_R::new(((self.bits >> 25) & 1) != 0) + pub fn advio(&self) -> AdvioR { + AdvioR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - Disable Internal Pipelining"] #[inline(always)] #[must_use] - pub fn dip(&mut self) -> DIP_W { - DIP_W::new(self, 0) + pub fn dip(&mut self) -> DipW { + DipW::new(self, 0) } #[doc = "Bits 16:24 - Address Pins to GPIO Mode"] #[inline(always)] #[must_use] - pub fn addio(&mut self) -> ADDIO_W { - ADDIO_W::new(self, 16) + pub fn addio(&mut self) -> AddioW { + AddioW::new(self, 16) } #[doc = "Bit 25 - ADV Pin to GPIO Mode"] #[inline(always)] #[must_use] - pub fn advio(&mut self) -> ADVIO_W { - ADVIO_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn advio(&mut self) -> AdvioW { + AdvioW::new(self, 25) } } #[doc = "EBU Test/Control Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usercon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usercon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct USERCON_SPEC; -impl crate::RegisterSpec for USERCON_SPEC { +pub struct UserconSpec; +impl crate::RegisterSpec for UserconSpec { type Ux = u32; } #[doc = "`read()` method returns [`usercon::R`](R) reader structure"] -impl crate::Readable for USERCON_SPEC {} +impl crate::Readable for UserconSpec {} #[doc = "`write(|w| ..)` method takes [`usercon::W`](W) writer structure"] -impl crate::Writable for USERCON_SPEC { +impl crate::Writable for UserconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USERCON to value 0"] -impl crate::Resettable for USERCON_SPEC { +impl crate::Resettable for UserconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0.rs b/src/ecat0.rs index 8374b8ab..edc3182c 100644 --- a/src/ecat0.rs +++ b/src/ecat0.rs @@ -1,460 +1,460 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - type_: TYPE, - revision: REVISION, - build: BUILD, - fmmu_num: FMMU_NUM, - sync_manager: SYNC_MANAGER, - ram_size: RAM_SIZE, - port_desc: PORT_DESC, - feature: FEATURE, + type_: Type, + revision: Revision, + build: Build, + fmmu_num: FmmuNum, + sync_manager: SyncManager, + ram_size: RamSize, + port_desc: PortDesc, + feature: Feature, _reserved8: [u8; 0x06], - station_adr: STATION_ADR, - station_alias: STATION_ALIAS, + station_adr: StationAdr, + station_alias: StationAlias, _reserved10: [u8; 0x0c], - wr_reg_enable: WR_REG_ENABLE, - wr_reg_protect: WR_REG_PROTECT, + wr_reg_enable: WrRegEnable, + wr_reg_protect: WrRegProtect, _reserved12: [u8; 0x0e], - esc_wr_enable: ESC_WR_ENABLE, - esc_wr_protect: ESC_WR_PROTECT, + esc_wr_enable: EscWrEnable, + esc_wr_protect: EscWrProtect, _reserved14: [u8; 0x0e], _reserved_14_readmode_esc_reset_ecat: [u8; 0x01], _reserved_15_readmode_esc_reset_pdi: [u8; 0x01], _reserved16: [u8; 0xbe], - esc_dl_control: ESC_DL_CONTROL, + esc_dl_control: EscDlControl, _reserved17: [u8; 0x04], - physical_rw_offset: PHYSICAL_RW_OFFSET, + physical_rw_offset: PhysicalRwOffset, _reserved18: [u8; 0x06], - esc_dl_status: ESC_DL_STATUS, + esc_dl_status: EscDlStatus, _reserved19: [u8; 0x0e], - al_control: AL_CONTROL, + al_control: AlControl, _reserved20: [u8; 0x0e], - al_status: AL_STATUS, + al_status: AlStatus, _reserved21: [u8; 0x02], - al_status_code: AL_STATUS_CODE, + al_status_code: AlStatusCode, _reserved22: [u8; 0x02], - run_led: RUN_LED, - err_led: ERR_LED, + run_led: RunLed, + err_led: ErrLed, _reserved24: [u8; 0x06], - pdi_control: PDI_CONTROL, - esc_config: ESC_CONFIG, + pdi_control: PdiControl, + esc_config: EscConfig, _reserved26: [u8; 0x0e], - pdi_config: PDI_CONFIG, - sync_latch_config: SYNC_LATCH_CONFIG, - pdi_ext_config: PDI_EXT_CONFIG, + pdi_config: PdiConfig, + sync_latch_config: SyncLatchConfig, + pdi_ext_config: PdiExtConfig, _reserved29: [u8; 0xac], - event_mask: EVENT_MASK, + event_mask: EventMask, _reserved30: [u8; 0x02], - al_event_mask: AL_EVENT_MASK, + al_event_mask: AlEventMask, _reserved31: [u8; 0x08], - event_req: EVENT_REQ, + event_req: EventReq, _reserved32: [u8; 0x0e], - al_event_req: AL_EVENT_REQ, + al_event_req: AlEventReq, _reserved33: [u8; 0xdc], - rx_err_count0: RX_ERR_COUNT0, - rx_err_count1: RX_ERR_COUNT1, + rx_err_count0: RxErrCount0, + rx_err_count1: RxErrCount1, _reserved35: [u8; 0x04], - fwd_rx_err_count0: FWD_RX_ERR_COUNT0, - fwd_rx_err_count1: FWD_RX_ERR_COUNT1, + fwd_rx_err_count0: FwdRxErrCount0, + fwd_rx_err_count1: FwdRxErrCount1, _reserved37: [u8; 0x02], - proc_err_count: PROC_ERR_COUNT, - pdi_err_count: PDI_ERR_COUNT, + proc_err_count: ProcErrCount, + pdi_err_count: PdiErrCount, _reserved39: [u8; 0x02], - lost_link_count0: LOST_LINK_COUNT0, - lost_link_count1: LOST_LINK_COUNT1, + lost_link_count0: LostLinkCount0, + lost_link_count1: LostLinkCount1, _reserved41: [u8; 0xee], - wd_divide: WD_DIVIDE, + wd_divide: WdDivide, _reserved42: [u8; 0x0e], - wd_time_pdi: WD_TIME_PDI, + wd_time_pdi: WdTimePdi, _reserved43: [u8; 0x0e], - wd_time_pdata: WD_TIME_PDATA, + wd_time_pdata: WdTimePdata, _reserved44: [u8; 0x1e], - wd_stat_pdata: WD_STAT_PDATA, - wd_count_pdata: WD_COUNT_PDATA, - wd_count_pdi: WD_COUNT_PDI, + wd_stat_pdata: WdStatPdata, + wd_count_pdata: WdCountPdata, + wd_count_pdi: WdCountPdi, _reserved47: [u8; 0xbc], - eep_conf: EEP_CONF, - eep_state: EEP_STATE, - eep_cont_stat: EEP_CONT_STAT, - eep_adr: EEP_ADR, - eep_data: [EEP_DATA; 2], - mii_cont_stat: MII_CONT_STAT, - mii_phy_adr: MII_PHY_ADR, - mii_phy_reg_adr: MII_PHY_REG_ADR, - mii_phy_data: MII_PHY_DATA, - mii_ecat_acs_state: MII_ECAT_ACS_STATE, - mii_pdi_acs_state: MII_PDI_ACS_STATE, + eep_conf: EepConf, + eep_state: EepState, + eep_cont_stat: EepContStat, + eep_adr: EepAdr, + eep_data: [EepData; 2], + mii_cont_stat: MiiContStat, + mii_phy_adr: MiiPhyAdr, + mii_phy_reg_adr: MiiPhyRegAdr, + mii_phy_data: MiiPhyData, + mii_ecat_acs_state: MiiEcatAcsState, + mii_pdi_acs_state: MiiPdiAcsState, _reserved58: [u8; 0x03e8], - dc_rcv_time_port0: DC_RCV_TIME_PORT0, - dc_rcv_time_port1: DC_RCV_TIME_PORT1, + dc_rcv_time_port0: DcRcvTimePort0, + dc_rcv_time_port1: DcRcvTimePort1, _reserved60: [u8; 0x08], _reserved_60_readmode_dc_sys_time: [u8; 0x08], - receive_time_pu: [RECEIVE_TIME_PU; 2], - dc_sys_time_offset: [DC_SYS_TIME_OFFSET; 2], - dc_sys_time_delay: DC_SYS_TIME_DELAY, - dc_sys_time_diff: DC_SYS_TIME_DIFF, - dc_speed_count_start: DC_SPEED_COUNT_START, - dc_speed_count_diff: DC_SPEED_COUNT_DIFF, - dc_sys_time_fil_depth: DC_SYS_TIME_FIL_DEPTH, - dc_speed_count_fil_depth: DC_SPEED_COUNT_FIL_DEPTH, + receive_time_pu: [ReceiveTimePu; 2], + dc_sys_time_offset: [DcSysTimeOffset; 2], + dc_sys_time_delay: DcSysTimeDelay, + dc_sys_time_diff: DcSysTimeDiff, + dc_speed_count_start: DcSpeedCountStart, + dc_speed_count_diff: DcSpeedCountDiff, + dc_sys_time_fil_depth: DcSysTimeFilDepth, + dc_speed_count_fil_depth: DcSpeedCountFilDepth, _reserved69: [u8; 0x4a], - dc_cyc_cont: DC_CYC_CONT, - dc_act: DC_ACT, - dc_pulse_len: DC_PULSE_LEN, - dc_act_stat: DC_ACT_STAT, + dc_cyc_cont: DcCycCont, + dc_act: DcAct, + dc_pulse_len: DcPulseLen, + dc_act_stat: DcActStat, _reserved73: [u8; 0x09], - dc_sync0_stat: DC_SYNC0_STAT, - dc_sync1_stat: DC_SYNC1_STAT, - dc_cyc_start_time: [DC_CYC_START_TIME; 2], - dc_next_sync1_pulse: [DC_NEXT_SYNC1_PULSE; 2], - dc_sync0_cyc_time: DC_SYNC0_CYC_TIME, - dc_sync1_cyc_time: DC_SYNC1_CYC_TIME, - dc_latch0_cont: DC_LATCH0_CONT, - dc_latch1_cont: DC_LATCH1_CONT, + dc_sync0_stat: DcSync0Stat, + dc_sync1_stat: DcSync1Stat, + dc_cyc_start_time: [DcCycStartTime; 2], + dc_next_sync1_pulse: [DcNextSync1Pulse; 2], + dc_sync0_cyc_time: DcSync0CycTime, + dc_sync1_cyc_time: DcSync1CycTime, + dc_latch0_cont: DcLatch0Cont, + dc_latch1_cont: DcLatch1Cont, _reserved81: [u8; 0x04], - dc_latch0_stat: DC_LATCH0_STAT, - dc_latch1_stat: DC_LATCH1_STAT, - dc_latch0_time_pos: [DC_LATCH0_TIME_POS; 2], - dc_latch0_time_neg: [DC_LATCH0_TIME_NEG; 2], - dc_latch1_time_pos: [DC_LATCH1_TIME_POS; 2], - dc_latch1_time_neg: [DC_LATCH1_TIME_NEG; 2], + dc_latch0_stat: DcLatch0Stat, + dc_latch1_stat: DcLatch1Stat, + dc_latch0_time_pos: [DcLatch0TimePos; 2], + dc_latch0_time_neg: [DcLatch0TimeNeg; 2], + dc_latch1_time_pos: [DcLatch1TimePos; 2], + dc_latch1_time_neg: [DcLatch1TimeNeg; 2], _reserved87: [u8; 0x20], - dc_ecat_cng_ev_time: DC_ECAT_CNG_EV_TIME, + dc_ecat_cng_ev_time: DcEcatCngEvTime, _reserved88: [u8; 0x04], - dc_pdi_start_ev_time: DC_PDI_START_EV_TIME, - dc_pdi_cng_ev_time: DC_PDI_CNG_EV_TIME, + dc_pdi_start_ev_time: DcPdiStartEvTime, + dc_pdi_cng_ev_time: DcPdiCngEvTime, _reserved90: [u8; 0x0400], - id: ID, + id: Id, _reserved91: [u8; 0x04], - status: STATUS, + status: Status, } impl RegisterBlock { #[doc = "0x00 - Type of EtherCAT Controller"] #[inline(always)] - pub const fn type_(&self) -> &TYPE { + pub const fn type_(&self) -> &Type { &self.type_ } #[doc = "0x01 - Revision of EtherCAT Controller"] #[inline(always)] - pub const fn revision(&self) -> &REVISION { + pub const fn revision(&self) -> &Revision { &self.revision } #[doc = "0x02 - Build Version"] #[inline(always)] - pub const fn build(&self) -> &BUILD { + pub const fn build(&self) -> &Build { &self.build } #[doc = "0x04 - FMMUs Supported"] #[inline(always)] - pub const fn fmmu_num(&self) -> &FMMU_NUM { + pub const fn fmmu_num(&self) -> &FmmuNum { &self.fmmu_num } #[doc = "0x05 - SyncManagers Supported"] #[inline(always)] - pub const fn sync_manager(&self) -> &SYNC_MANAGER { + pub const fn sync_manager(&self) -> &SyncManager { &self.sync_manager } #[doc = "0x06 - RAM Size"] #[inline(always)] - pub const fn ram_size(&self) -> &RAM_SIZE { + pub const fn ram_size(&self) -> &RamSize { &self.ram_size } #[doc = "0x07 - Port Descriptor"] #[inline(always)] - pub const fn port_desc(&self) -> &PORT_DESC { + pub const fn port_desc(&self) -> &PortDesc { &self.port_desc } #[doc = "0x08 - ESC Features Supported"] #[inline(always)] - pub const fn feature(&self) -> &FEATURE { + pub const fn feature(&self) -> &Feature { &self.feature } #[doc = "0x10 - Configured Station Address"] #[inline(always)] - pub const fn station_adr(&self) -> &STATION_ADR { + pub const fn station_adr(&self) -> &StationAdr { &self.station_adr } #[doc = "0x12 - Configured Station Alias"] #[inline(always)] - pub const fn station_alias(&self) -> &STATION_ALIAS { + pub const fn station_alias(&self) -> &StationAlias { &self.station_alias } #[doc = "0x20 - Write Register Enable"] #[inline(always)] - pub const fn wr_reg_enable(&self) -> &WR_REG_ENABLE { + pub const fn wr_reg_enable(&self) -> &WrRegEnable { &self.wr_reg_enable } #[doc = "0x21 - Write Register Protection"] #[inline(always)] - pub const fn wr_reg_protect(&self) -> &WR_REG_PROTECT { + pub const fn wr_reg_protect(&self) -> &WrRegProtect { &self.wr_reg_protect } #[doc = "0x30 - ESC Write Enable"] #[inline(always)] - pub const fn esc_wr_enable(&self) -> &ESC_WR_ENABLE { + pub const fn esc_wr_enable(&self) -> &EscWrEnable { &self.esc_wr_enable } #[doc = "0x31 - ESC Write Protection"] #[inline(always)] - pub const fn esc_wr_protect(&self) -> &ESC_WR_PROTECT { + pub const fn esc_wr_protect(&self) -> &EscWrProtect { &self.esc_wr_protect } #[doc = "0x40 - ESC Reset ECAT \\[READ Mode\\]"] #[inline(always)] - pub const fn readmode_esc_reset_ecat(&self) -> &READMODE_ESC_RESET_ECAT { + pub const fn readmode_esc_reset_ecat(&self) -> &ReadmodeEscResetEcat { unsafe { &*(self as *const Self).cast::().add(64).cast() } } #[doc = "0x40 - ESC Reset ECAT \\[WRITE Mode\\]"] #[inline(always)] - pub const fn writemode_esc_reset_ecat(&self) -> &WRITEMODE_ESC_RESET_ECAT { + pub const fn writemode_esc_reset_ecat(&self) -> &WritemodeEscResetEcat { unsafe { &*(self as *const Self).cast::().add(64).cast() } } #[doc = "0x41 - ESC Reset PDI \\[READ Mode\\]"] #[inline(always)] - pub const fn readmode_esc_reset_pdi(&self) -> &READMODE_ESC_RESET_PDI { + pub const fn readmode_esc_reset_pdi(&self) -> &ReadmodeEscResetPdi { unsafe { &*(self as *const Self).cast::().add(65).cast() } } #[doc = "0x41 - ESC Reset PDI \\[WRITE Mode\\]"] #[inline(always)] - pub const fn writemode_esc_reset_pdi(&self) -> &WRITEMODE_ESC_RESET_PDI { + pub const fn writemode_esc_reset_pdi(&self) -> &WritemodeEscResetPdi { unsafe { &*(self as *const Self).cast::().add(65).cast() } } #[doc = "0x100 - ESC DL Control"] #[inline(always)] - pub const fn esc_dl_control(&self) -> &ESC_DL_CONTROL { + pub const fn esc_dl_control(&self) -> &EscDlControl { &self.esc_dl_control } #[doc = "0x108 - Physical Read/Write Offset"] #[inline(always)] - pub const fn physical_rw_offset(&self) -> &PHYSICAL_RW_OFFSET { + pub const fn physical_rw_offset(&self) -> &PhysicalRwOffset { &self.physical_rw_offset } #[doc = "0x110 - ESC DL Status"] #[inline(always)] - pub const fn esc_dl_status(&self) -> &ESC_DL_STATUS { + pub const fn esc_dl_status(&self) -> &EscDlStatus { &self.esc_dl_status } #[doc = "0x120 - AL Control"] #[inline(always)] - pub const fn al_control(&self) -> &AL_CONTROL { + pub const fn al_control(&self) -> &AlControl { &self.al_control } #[doc = "0x130 - AL Status"] #[inline(always)] - pub const fn al_status(&self) -> &AL_STATUS { + pub const fn al_status(&self) -> &AlStatus { &self.al_status } #[doc = "0x134 - AL Status Code"] #[inline(always)] - pub const fn al_status_code(&self) -> &AL_STATUS_CODE { + pub const fn al_status_code(&self) -> &AlStatusCode { &self.al_status_code } #[doc = "0x138 - RUN LED Override"] #[inline(always)] - pub const fn run_led(&self) -> &RUN_LED { + pub const fn run_led(&self) -> &RunLed { &self.run_led } #[doc = "0x139 - RUN ERR Override"] #[inline(always)] - pub const fn err_led(&self) -> &ERR_LED { + pub const fn err_led(&self) -> &ErrLed { &self.err_led } #[doc = "0x140 - PDI Control"] #[inline(always)] - pub const fn pdi_control(&self) -> &PDI_CONTROL { + pub const fn pdi_control(&self) -> &PdiControl { &self.pdi_control } #[doc = "0x141 - ESC Configuration"] #[inline(always)] - pub const fn esc_config(&self) -> &ESC_CONFIG { + pub const fn esc_config(&self) -> &EscConfig { &self.esc_config } #[doc = "0x150 - PDI Control"] #[inline(always)] - pub const fn pdi_config(&self) -> &PDI_CONFIG { + pub const fn pdi_config(&self) -> &PdiConfig { &self.pdi_config } #[doc = "0x151 - Sync/Latch\\[1:0\\] PDI Configuration"] #[inline(always)] - pub const fn sync_latch_config(&self) -> &SYNC_LATCH_CONFIG { + pub const fn sync_latch_config(&self) -> &SyncLatchConfig { &self.sync_latch_config } #[doc = "0x152 - PDI Synchronous Microcontroller extended Configuration"] #[inline(always)] - pub const fn pdi_ext_config(&self) -> &PDI_EXT_CONFIG { + pub const fn pdi_ext_config(&self) -> &PdiExtConfig { &self.pdi_ext_config } #[doc = "0x200 - ECAT Event Mask"] #[inline(always)] - pub const fn event_mask(&self) -> &EVENT_MASK { + pub const fn event_mask(&self) -> &EventMask { &self.event_mask } #[doc = "0x204 - PDI AL Event Mask"] #[inline(always)] - pub const fn al_event_mask(&self) -> &AL_EVENT_MASK { + pub const fn al_event_mask(&self) -> &AlEventMask { &self.al_event_mask } #[doc = "0x210 - ECAT Event Request"] #[inline(always)] - pub const fn event_req(&self) -> &EVENT_REQ { + pub const fn event_req(&self) -> &EventReq { &self.event_req } #[doc = "0x220 - AL Event Request"] #[inline(always)] - pub const fn al_event_req(&self) -> &AL_EVENT_REQ { + pub const fn al_event_req(&self) -> &AlEventReq { &self.al_event_req } #[doc = "0x300 - RX Error Counter Port 0"] #[inline(always)] - pub const fn rx_err_count0(&self) -> &RX_ERR_COUNT0 { + pub const fn rx_err_count0(&self) -> &RxErrCount0 { &self.rx_err_count0 } #[doc = "0x302 - RX Error Counter Port 1"] #[inline(always)] - pub const fn rx_err_count1(&self) -> &RX_ERR_COUNT1 { + pub const fn rx_err_count1(&self) -> &RxErrCount1 { &self.rx_err_count1 } #[doc = "0x308 - Forwarded RX Error Counter Port 0"] #[inline(always)] - pub const fn fwd_rx_err_count0(&self) -> &FWD_RX_ERR_COUNT0 { + pub const fn fwd_rx_err_count0(&self) -> &FwdRxErrCount0 { &self.fwd_rx_err_count0 } #[doc = "0x309 - Forwarded RX Error Counter Port 1"] #[inline(always)] - pub const fn fwd_rx_err_count1(&self) -> &FWD_RX_ERR_COUNT1 { + pub const fn fwd_rx_err_count1(&self) -> &FwdRxErrCount1 { &self.fwd_rx_err_count1 } #[doc = "0x30c - ECAT Processing Unit Error Counter"] #[inline(always)] - pub const fn proc_err_count(&self) -> &PROC_ERR_COUNT { + pub const fn proc_err_count(&self) -> &ProcErrCount { &self.proc_err_count } #[doc = "0x30d - PDI Error Counter"] #[inline(always)] - pub const fn pdi_err_count(&self) -> &PDI_ERR_COUNT { + pub const fn pdi_err_count(&self) -> &PdiErrCount { &self.pdi_err_count } #[doc = "0x310 - Lost Link Counter Port 0"] #[inline(always)] - pub const fn lost_link_count0(&self) -> &LOST_LINK_COUNT0 { + pub const fn lost_link_count0(&self) -> &LostLinkCount0 { &self.lost_link_count0 } #[doc = "0x311 - Lost Link Counter Port 1"] #[inline(always)] - pub const fn lost_link_count1(&self) -> &LOST_LINK_COUNT1 { + pub const fn lost_link_count1(&self) -> &LostLinkCount1 { &self.lost_link_count1 } #[doc = "0x400 - Watchdog Divider"] #[inline(always)] - pub const fn wd_divide(&self) -> &WD_DIVIDE { + pub const fn wd_divide(&self) -> &WdDivide { &self.wd_divide } #[doc = "0x410 - Watchdog Time PDI"] #[inline(always)] - pub const fn wd_time_pdi(&self) -> &WD_TIME_PDI { + pub const fn wd_time_pdi(&self) -> &WdTimePdi { &self.wd_time_pdi } #[doc = "0x420 - Watchdog Time Process Data"] #[inline(always)] - pub const fn wd_time_pdata(&self) -> &WD_TIME_PDATA { + pub const fn wd_time_pdata(&self) -> &WdTimePdata { &self.wd_time_pdata } #[doc = "0x440 - Watchdog Status Process Data"] #[inline(always)] - pub const fn wd_stat_pdata(&self) -> &WD_STAT_PDATA { + pub const fn wd_stat_pdata(&self) -> &WdStatPdata { &self.wd_stat_pdata } #[doc = "0x442 - Watchdog Counter Process Data"] #[inline(always)] - pub const fn wd_count_pdata(&self) -> &WD_COUNT_PDATA { + pub const fn wd_count_pdata(&self) -> &WdCountPdata { &self.wd_count_pdata } #[doc = "0x443 - Watchdog Counter PDI"] #[inline(always)] - pub const fn wd_count_pdi(&self) -> &WD_COUNT_PDI { + pub const fn wd_count_pdi(&self) -> &WdCountPdi { &self.wd_count_pdi } #[doc = "0x500 - EEPROM Configuration"] #[inline(always)] - pub const fn eep_conf(&self) -> &EEP_CONF { + pub const fn eep_conf(&self) -> &EepConf { &self.eep_conf } #[doc = "0x501 - EEPROM PDI Access State"] #[inline(always)] - pub const fn eep_state(&self) -> &EEP_STATE { + pub const fn eep_state(&self) -> &EepState { &self.eep_state } #[doc = "0x502 - EEPROM Control/Status"] #[inline(always)] - pub const fn eep_cont_stat(&self) -> &EEP_CONT_STAT { + pub const fn eep_cont_stat(&self) -> &EepContStat { &self.eep_cont_stat } #[doc = "0x504 - EEPROM Address"] #[inline(always)] - pub const fn eep_adr(&self) -> &EEP_ADR { + pub const fn eep_adr(&self) -> &EepAdr { &self.eep_adr } #[doc = "0x508..0x510 - EEPROM Read/Write data"] #[inline(always)] - pub const fn eep_data(&self, n: usize) -> &EEP_DATA { + pub const fn eep_data(&self, n: usize) -> &EepData { &self.eep_data[n] } #[doc = "Iterator for array of:"] #[doc = "0x508..0x510 - EEPROM Read/Write data"] #[inline(always)] - pub fn eep_data_iter(&self) -> impl Iterator { + pub fn eep_data_iter(&self) -> impl Iterator { self.eep_data.iter() } #[doc = "0x510 - MII Management Control/Status"] #[inline(always)] - pub const fn mii_cont_stat(&self) -> &MII_CONT_STAT { + pub const fn mii_cont_stat(&self) -> &MiiContStat { &self.mii_cont_stat } #[doc = "0x512 - PHY Address"] #[inline(always)] - pub const fn mii_phy_adr(&self) -> &MII_PHY_ADR { + pub const fn mii_phy_adr(&self) -> &MiiPhyAdr { &self.mii_phy_adr } #[doc = "0x513 - PHY Register Address"] #[inline(always)] - pub const fn mii_phy_reg_adr(&self) -> &MII_PHY_REG_ADR { + pub const fn mii_phy_reg_adr(&self) -> &MiiPhyRegAdr { &self.mii_phy_reg_adr } #[doc = "0x514 - PHY Data"] #[inline(always)] - pub const fn mii_phy_data(&self) -> &MII_PHY_DATA { + pub const fn mii_phy_data(&self) -> &MiiPhyData { &self.mii_phy_data } #[doc = "0x516 - MII ECAT ACS STATE"] #[inline(always)] - pub const fn mii_ecat_acs_state(&self) -> &MII_ECAT_ACS_STATE { + pub const fn mii_ecat_acs_state(&self) -> &MiiEcatAcsState { &self.mii_ecat_acs_state } #[doc = "0x517 - MII PDI ACS STATE"] #[inline(always)] - pub const fn mii_pdi_acs_state(&self) -> &MII_PDI_ACS_STATE { + pub const fn mii_pdi_acs_state(&self) -> &MiiPdiAcsState { &self.mii_pdi_acs_state } #[doc = "0x900 - Receive Time Port 0"] #[inline(always)] - pub const fn dc_rcv_time_port0(&self) -> &DC_RCV_TIME_PORT0 { + pub const fn dc_rcv_time_port0(&self) -> &DcRcvTimePort0 { &self.dc_rcv_time_port0 } #[doc = "0x904 - Receive Time Port 1"] #[inline(always)] - pub const fn dc_rcv_time_port1(&self) -> &DC_RCV_TIME_PORT1 { + pub const fn dc_rcv_time_port1(&self) -> &DcRcvTimePort1 { &self.dc_rcv_time_port1 } #[doc = "0x910 - System Time \\[WRITE Mode\\]"] #[inline(always)] - pub const fn writemode_dc_sys_time(&self) -> &WRITEMODE_DC_SYS_TIME { + pub const fn writemode_dc_sys_time(&self) -> &WritemodeDcSysTime { unsafe { &*(self as *const Self).cast::().add(2320).cast() } } #[doc = "0x910..0x918 - System Time read access"] #[inline(always)] - pub const fn readmode_dc_sys_time(&self, n: usize) -> &READMODE_DC_SYS_TIME { + pub const fn readmode_dc_sys_time(&self, n: usize) -> &ReadmodeDcSysTime { #[allow(clippy::no_effect)] [(); 2][n]; unsafe { &*(self as *const Self).cast::().add(2320).add(4 * n).cast() } @@ -462,687 +462,782 @@ PDI Configuration"] #[doc = "Iterator for array of:"] #[doc = "0x910..0x918 - System Time read access"] #[inline(always)] - pub fn readmode_dc_sys_time_iter(&self) -> impl Iterator { + pub fn readmode_dc_sys_time_iter(&self) -> impl Iterator { (0..2).map(move |n| unsafe { &*(self as *const Self).cast::().add(2320).add(4 * n).cast() }) } #[doc = "0x918..0x920 - Local time of the beginning of a frame"] #[inline(always)] - pub const fn receive_time_pu(&self, n: usize) -> &RECEIVE_TIME_PU { + pub const fn receive_time_pu(&self, n: usize) -> &ReceiveTimePu { &self.receive_time_pu[n] } #[doc = "Iterator for array of:"] #[doc = "0x918..0x920 - Local time of the beginning of a frame"] #[inline(always)] - pub fn receive_time_pu_iter(&self) -> impl Iterator { + pub fn receive_time_pu_iter(&self) -> impl Iterator { self.receive_time_pu.iter() } #[doc = "0x920..0x928 - Difference between local time and System Time"] #[inline(always)] - pub const fn dc_sys_time_offset(&self, n: usize) -> &DC_SYS_TIME_OFFSET { + pub const fn dc_sys_time_offset(&self, n: usize) -> &DcSysTimeOffset { &self.dc_sys_time_offset[n] } #[doc = "Iterator for array of:"] #[doc = "0x920..0x928 - Difference between local time and System Time"] #[inline(always)] - pub fn dc_sys_time_offset_iter(&self) -> impl Iterator { + pub fn dc_sys_time_offset_iter(&self) -> impl Iterator { self.dc_sys_time_offset.iter() } #[doc = "0x928 - System Time Delay"] #[inline(always)] - pub const fn dc_sys_time_delay(&self) -> &DC_SYS_TIME_DELAY { + pub const fn dc_sys_time_delay(&self) -> &DcSysTimeDelay { &self.dc_sys_time_delay } #[doc = "0x92c - System Time Difference"] #[inline(always)] - pub const fn dc_sys_time_diff(&self) -> &DC_SYS_TIME_DIFF { + pub const fn dc_sys_time_diff(&self) -> &DcSysTimeDiff { &self.dc_sys_time_diff } #[doc = "0x930 - Speed Counter Start"] #[inline(always)] - pub const fn dc_speed_count_start(&self) -> &DC_SPEED_COUNT_START { + pub const fn dc_speed_count_start(&self) -> &DcSpeedCountStart { &self.dc_speed_count_start } #[doc = "0x932 - Speed Counter Diff"] #[inline(always)] - pub const fn dc_speed_count_diff(&self) -> &DC_SPEED_COUNT_DIFF { + pub const fn dc_speed_count_diff(&self) -> &DcSpeedCountDiff { &self.dc_speed_count_diff } #[doc = "0x934 - System Time Difference Filter Depth"] #[inline(always)] - pub const fn dc_sys_time_fil_depth(&self) -> &DC_SYS_TIME_FIL_DEPTH { + pub const fn dc_sys_time_fil_depth(&self) -> &DcSysTimeFilDepth { &self.dc_sys_time_fil_depth } #[doc = "0x935 - Speed Counter Filter Depth"] #[inline(always)] - pub const fn dc_speed_count_fil_depth(&self) -> &DC_SPEED_COUNT_FIL_DEPTH { + pub const fn dc_speed_count_fil_depth(&self) -> &DcSpeedCountFilDepth { &self.dc_speed_count_fil_depth } #[doc = "0x980 - Cyclic Unit Control"] #[inline(always)] - pub const fn dc_cyc_cont(&self) -> &DC_CYC_CONT { + pub const fn dc_cyc_cont(&self) -> &DcCycCont { &self.dc_cyc_cont } #[doc = "0x981 - Activation register"] #[inline(always)] - pub const fn dc_act(&self) -> &DC_ACT { + pub const fn dc_act(&self) -> &DcAct { &self.dc_act } #[doc = "0x982 - Pulse Length of SyncSignals"] #[inline(always)] - pub const fn dc_pulse_len(&self) -> &DC_PULSE_LEN { + pub const fn dc_pulse_len(&self) -> &DcPulseLen { &self.dc_pulse_len } #[doc = "0x984 - Activation Status"] #[inline(always)] - pub const fn dc_act_stat(&self) -> &DC_ACT_STAT { + pub const fn dc_act_stat(&self) -> &DcActStat { &self.dc_act_stat } #[doc = "0x98e - SYNC0 Status"] #[inline(always)] - pub const fn dc_sync0_stat(&self) -> &DC_SYNC0_STAT { + pub const fn dc_sync0_stat(&self) -> &DcSync0Stat { &self.dc_sync0_stat } #[doc = "0x98f - SYNC1 Status"] #[inline(always)] - pub const fn dc_sync1_stat(&self) -> &DC_SYNC1_STAT { + pub const fn dc_sync1_stat(&self) -> &DcSync1Stat { &self.dc_sync1_stat } #[doc = "0x990..0x998 - Start Time Cyclic Operation"] #[inline(always)] - pub const fn dc_cyc_start_time(&self, n: usize) -> &DC_CYC_START_TIME { + pub const fn dc_cyc_start_time(&self, n: usize) -> &DcCycStartTime { &self.dc_cyc_start_time[n] } #[doc = "Iterator for array of:"] #[doc = "0x990..0x998 - Start Time Cyclic Operation"] #[inline(always)] - pub fn dc_cyc_start_time_iter(&self) -> impl Iterator { + pub fn dc_cyc_start_time_iter(&self) -> impl Iterator { self.dc_cyc_start_time.iter() } #[doc = "0x998..0x9a0 - System time of next SYNC1 pulse in ns"] #[inline(always)] - pub const fn dc_next_sync1_pulse(&self, n: usize) -> &DC_NEXT_SYNC1_PULSE { + pub const fn dc_next_sync1_pulse(&self, n: usize) -> &DcNextSync1Pulse { &self.dc_next_sync1_pulse[n] } #[doc = "Iterator for array of:"] #[doc = "0x998..0x9a0 - System time of next SYNC1 pulse in ns"] #[inline(always)] - pub fn dc_next_sync1_pulse_iter(&self) -> impl Iterator { + pub fn dc_next_sync1_pulse_iter(&self) -> impl Iterator { self.dc_next_sync1_pulse.iter() } #[doc = "0x9a0 - SYNC0 Cycle Time"] #[inline(always)] - pub const fn dc_sync0_cyc_time(&self) -> &DC_SYNC0_CYC_TIME { + pub const fn dc_sync0_cyc_time(&self) -> &DcSync0CycTime { &self.dc_sync0_cyc_time } #[doc = "0x9a4 - SYNC1 Cycle Time"] #[inline(always)] - pub const fn dc_sync1_cyc_time(&self) -> &DC_SYNC1_CYC_TIME { + pub const fn dc_sync1_cyc_time(&self) -> &DcSync1CycTime { &self.dc_sync1_cyc_time } #[doc = "0x9a8 - Latch0 Control"] #[inline(always)] - pub const fn dc_latch0_cont(&self) -> &DC_LATCH0_CONT { + pub const fn dc_latch0_cont(&self) -> &DcLatch0Cont { &self.dc_latch0_cont } #[doc = "0x9a9 - Latch1 Control"] #[inline(always)] - pub const fn dc_latch1_cont(&self) -> &DC_LATCH1_CONT { + pub const fn dc_latch1_cont(&self) -> &DcLatch1Cont { &self.dc_latch1_cont } #[doc = "0x9ae - Latch0 Status"] #[inline(always)] - pub const fn dc_latch0_stat(&self) -> &DC_LATCH0_STAT { + pub const fn dc_latch0_stat(&self) -> &DcLatch0Stat { &self.dc_latch0_stat } #[doc = "0x9af - Latch1 Status"] #[inline(always)] - pub const fn dc_latch1_stat(&self) -> &DC_LATCH1_STAT { + pub const fn dc_latch1_stat(&self) -> &DcLatch1Stat { &self.dc_latch1_stat } #[doc = "0x9b0..0x9b8 - Register captures System time at the positive edge of the Latch0 signal"] #[inline(always)] - pub const fn dc_latch0_time_pos(&self, n: usize) -> &DC_LATCH0_TIME_POS { + pub const fn dc_latch0_time_pos(&self, n: usize) -> &DcLatch0TimePos { &self.dc_latch0_time_pos[n] } #[doc = "Iterator for array of:"] #[doc = "0x9b0..0x9b8 - Register captures System time at the positive edge of the Latch0 signal"] #[inline(always)] - pub fn dc_latch0_time_pos_iter(&self) -> impl Iterator { + pub fn dc_latch0_time_pos_iter(&self) -> impl Iterator { self.dc_latch0_time_pos.iter() } #[doc = "0x9b8..0x9c0 - Register captures System time at the negative edge of the Latch0 signal"] #[inline(always)] - pub const fn dc_latch0_time_neg(&self, n: usize) -> &DC_LATCH0_TIME_NEG { + pub const fn dc_latch0_time_neg(&self, n: usize) -> &DcLatch0TimeNeg { &self.dc_latch0_time_neg[n] } #[doc = "Iterator for array of:"] #[doc = "0x9b8..0x9c0 - Register captures System time at the negative edge of the Latch0 signal"] #[inline(always)] - pub fn dc_latch0_time_neg_iter(&self) -> impl Iterator { + pub fn dc_latch0_time_neg_iter(&self) -> impl Iterator { self.dc_latch0_time_neg.iter() } #[doc = "0x9c0..0x9c8 - Register captures System time at the positive edge of the Latch1 signal"] #[inline(always)] - pub const fn dc_latch1_time_pos(&self, n: usize) -> &DC_LATCH1_TIME_POS { + pub const fn dc_latch1_time_pos(&self, n: usize) -> &DcLatch1TimePos { &self.dc_latch1_time_pos[n] } #[doc = "Iterator for array of:"] #[doc = "0x9c0..0x9c8 - Register captures System time at the positive edge of the Latch1 signal"] #[inline(always)] - pub fn dc_latch1_time_pos_iter(&self) -> impl Iterator { + pub fn dc_latch1_time_pos_iter(&self) -> impl Iterator { self.dc_latch1_time_pos.iter() } #[doc = "0x9c8..0x9d0 - Register captures System time at the negative edge of the Latch1 signal"] #[inline(always)] - pub const fn dc_latch1_time_neg(&self, n: usize) -> &DC_LATCH1_TIME_NEG { + pub const fn dc_latch1_time_neg(&self, n: usize) -> &DcLatch1TimeNeg { &self.dc_latch1_time_neg[n] } #[doc = "Iterator for array of:"] #[doc = "0x9c8..0x9d0 - Register captures System time at the negative edge of the Latch1 signal"] #[inline(always)] - pub fn dc_latch1_time_neg_iter(&self) -> impl Iterator { + pub fn dc_latch1_time_neg_iter(&self) -> impl Iterator { self.dc_latch1_time_neg.iter() } #[doc = "0x9f0 - EtherCAT Buffer Change Event Time"] #[inline(always)] - pub const fn dc_ecat_cng_ev_time(&self) -> &DC_ECAT_CNG_EV_TIME { + pub const fn dc_ecat_cng_ev_time(&self) -> &DcEcatCngEvTime { &self.dc_ecat_cng_ev_time } #[doc = "0x9f8 - PDI Buffer Start Event Time"] #[inline(always)] - pub const fn dc_pdi_start_ev_time(&self) -> &DC_PDI_START_EV_TIME { + pub const fn dc_pdi_start_ev_time(&self) -> &DcPdiStartEvTime { &self.dc_pdi_start_ev_time } #[doc = "0x9fc - PDI Buffer Change Event Time"] #[inline(always)] - pub const fn dc_pdi_cng_ev_time(&self) -> &DC_PDI_CNG_EV_TIME { + pub const fn dc_pdi_cng_ev_time(&self) -> &DcPdiCngEvTime { &self.dc_pdi_cng_ev_time } #[doc = "0xe00 - ECAT0 Module ID"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0xe08 - ECAT0 Status"] #[inline(always)] - pub const fn status(&self) -> &STATUS { + pub const fn status(&self) -> &Status { &self.status } } #[doc = "TYPE (r) register accessor: Type of EtherCAT Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] module"] -pub type TYPE = crate::Reg; +#[doc(alias = "TYPE")] +pub type Type = crate::Reg; #[doc = "Type of EtherCAT Controller"] pub mod type_; #[doc = "REVISION (r) register accessor: Revision of EtherCAT Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revision::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revision`] module"] -pub type REVISION = crate::Reg; +#[doc(alias = "REVISION")] +pub type Revision = crate::Reg; #[doc = "Revision of EtherCAT Controller"] pub mod revision; #[doc = "BUILD (r) register accessor: Build Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`build::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@build`] module"] -pub type BUILD = crate::Reg; +#[doc(alias = "BUILD")] +pub type Build = crate::Reg; #[doc = "Build Version"] pub mod build; #[doc = "FMMU_NUM (r) register accessor: FMMUs Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_num::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_num`] module"] -pub type FMMU_NUM = crate::Reg; +#[doc(alias = "FMMU_NUM")] +pub type FmmuNum = crate::Reg; #[doc = "FMMUs Supported"] pub mod fmmu_num; #[doc = "SYNC_MANAGER (r) register accessor: SyncManagers Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sync_manager::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_manager`] module"] -pub type SYNC_MANAGER = crate::Reg; +#[doc(alias = "SYNC_MANAGER")] +pub type SyncManager = crate::Reg; #[doc = "SyncManagers Supported"] pub mod sync_manager; #[doc = "RAM_SIZE (r) register accessor: RAM Size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_size::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ram_size`] module"] -pub type RAM_SIZE = crate::Reg; +#[doc(alias = "RAM_SIZE")] +pub type RamSize = crate::Reg; #[doc = "RAM Size"] pub mod ram_size; #[doc = "PORT_DESC (r) register accessor: Port Descriptor\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`port_desc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@port_desc`] module"] -pub type PORT_DESC = crate::Reg; +#[doc(alias = "PORT_DESC")] +pub type PortDesc = crate::Reg; #[doc = "Port Descriptor"] pub mod port_desc; #[doc = "FEATURE (r) register accessor: ESC Features Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`feature::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@feature`] module"] -pub type FEATURE = crate::Reg; +#[doc(alias = "FEATURE")] +pub type Feature = crate::Reg; #[doc = "ESC Features Supported"] pub mod feature; #[doc = "STATION_ADR (r) register accessor: Configured Station Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`station_adr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@station_adr`] module"] -pub type STATION_ADR = crate::Reg; +#[doc(alias = "STATION_ADR")] +pub type StationAdr = crate::Reg; #[doc = "Configured Station Address"] pub mod station_adr; #[doc = "STATION_ALIAS (rw) register accessor: Configured Station Alias\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`station_alias::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`station_alias::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@station_alias`] module"] -pub type STATION_ALIAS = crate::Reg; +#[doc(alias = "STATION_ALIAS")] +pub type StationAlias = crate::Reg; #[doc = "Configured Station Alias"] pub mod station_alias; #[doc = "WR_REG_ENABLE (r) register accessor: Write Register Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wr_reg_enable::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wr_reg_enable`] module"] -pub type WR_REG_ENABLE = crate::Reg; +#[doc(alias = "WR_REG_ENABLE")] +pub type WrRegEnable = crate::Reg; #[doc = "Write Register Enable"] pub mod wr_reg_enable; #[doc = "WR_REG_PROTECT (r) register accessor: Write Register Protection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wr_reg_protect::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wr_reg_protect`] module"] -pub type WR_REG_PROTECT = crate::Reg; +#[doc(alias = "WR_REG_PROTECT")] +pub type WrRegProtect = crate::Reg; #[doc = "Write Register Protection"] pub mod wr_reg_protect; #[doc = "ESC_WR_ENABLE (r) register accessor: ESC Write Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_wr_enable::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esc_wr_enable`] module"] -pub type ESC_WR_ENABLE = crate::Reg; +#[doc(alias = "ESC_WR_ENABLE")] +pub type EscWrEnable = crate::Reg; #[doc = "ESC Write Enable"] pub mod esc_wr_enable; #[doc = "ESC_WR_PROTECT (r) register accessor: ESC Write Protection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_wr_protect::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esc_wr_protect`] module"] -pub type ESC_WR_PROTECT = crate::Reg; +#[doc(alias = "ESC_WR_PROTECT")] +pub type EscWrProtect = crate::Reg; #[doc = "ESC Write Protection"] pub mod esc_wr_protect; #[doc = "WRITEMode_ESC_RESET_ECAT (r) register accessor: ESC Reset ECAT \\[WRITE Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`writemode_esc_reset_ecat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writemode_esc_reset_ecat`] module"] -pub type WRITEMODE_ESC_RESET_ECAT = crate::Reg; +#[doc(alias = "WRITEMode_ESC_RESET_ECAT")] +pub type WritemodeEscResetEcat = crate::Reg; #[doc = "ESC Reset ECAT \\[WRITE Mode\\]"] pub mod writemode_esc_reset_ecat; #[doc = "READMode_ESC_RESET_ECAT (r) register accessor: ESC Reset ECAT \\[READ Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_esc_reset_ecat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@readmode_esc_reset_ecat`] module"] -pub type READMODE_ESC_RESET_ECAT = crate::Reg; +#[doc(alias = "READMode_ESC_RESET_ECAT")] +pub type ReadmodeEscResetEcat = crate::Reg; #[doc = "ESC Reset ECAT \\[READ Mode\\]"] pub mod readmode_esc_reset_ecat; #[doc = "WRITEMode_ESC_RESET_PDI (r) register accessor: ESC Reset PDI \\[WRITE Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`writemode_esc_reset_pdi::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writemode_esc_reset_pdi`] module"] -pub type WRITEMODE_ESC_RESET_PDI = crate::Reg; +#[doc(alias = "WRITEMode_ESC_RESET_PDI")] +pub type WritemodeEscResetPdi = crate::Reg; #[doc = "ESC Reset PDI \\[WRITE Mode\\]"] pub mod writemode_esc_reset_pdi; #[doc = "READMode_ESC_RESET_PDI (r) register accessor: ESC Reset PDI \\[READ Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_esc_reset_pdi::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@readmode_esc_reset_pdi`] module"] -pub type READMODE_ESC_RESET_PDI = crate::Reg; +#[doc(alias = "READMode_ESC_RESET_PDI")] +pub type ReadmodeEscResetPdi = crate::Reg; #[doc = "ESC Reset PDI \\[READ Mode\\]"] pub mod readmode_esc_reset_pdi; #[doc = "ESC_DL_CONTROL (r) register accessor: ESC DL Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_dl_control::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esc_dl_control`] module"] -pub type ESC_DL_CONTROL = crate::Reg; +#[doc(alias = "ESC_DL_CONTROL")] +pub type EscDlControl = crate::Reg; #[doc = "ESC DL Control"] pub mod esc_dl_control; #[doc = "PHYSICAL_RW_OFFSET (r) register accessor: Physical Read/Write Offset\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`physical_rw_offset::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@physical_rw_offset`] module"] -pub type PHYSICAL_RW_OFFSET = crate::Reg; +#[doc(alias = "PHYSICAL_RW_OFFSET")] +pub type PhysicalRwOffset = crate::Reg; #[doc = "Physical Read/Write Offset"] pub mod physical_rw_offset; #[doc = "ESC_DL_STATUS (r) register accessor: ESC DL Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_dl_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esc_dl_status`] module"] -pub type ESC_DL_STATUS = crate::Reg; +#[doc(alias = "ESC_DL_STATUS")] +pub type EscDlStatus = crate::Reg; #[doc = "ESC DL Status"] pub mod esc_dl_status; #[doc = "AL_CONTROL (r) register accessor: AL Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_control::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@al_control`] module"] -pub type AL_CONTROL = crate::Reg; +#[doc(alias = "AL_CONTROL")] +pub type AlControl = crate::Reg; #[doc = "AL Control"] pub mod al_control; #[doc = "AL_STATUS (rw) register accessor: AL Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@al_status`] module"] -pub type AL_STATUS = crate::Reg; +#[doc(alias = "AL_STATUS")] +pub type AlStatus = crate::Reg; #[doc = "AL Status"] pub mod al_status; #[doc = "AL_STATUS_CODE (rw) register accessor: AL Status Code\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_status_code::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_status_code::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@al_status_code`] module"] -pub type AL_STATUS_CODE = crate::Reg; +#[doc(alias = "AL_STATUS_CODE")] +pub type AlStatusCode = crate::Reg; #[doc = "AL Status Code"] pub mod al_status_code; #[doc = "RUN_LED (rw) register accessor: RUN LED Override\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`run_led::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`run_led::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@run_led`] module"] -pub type RUN_LED = crate::Reg; +#[doc(alias = "RUN_LED")] +pub type RunLed = crate::Reg; #[doc = "RUN LED Override"] pub mod run_led; #[doc = "ERR_LED (rw) register accessor: RUN ERR Override\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_led::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_led::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@err_led`] module"] -pub type ERR_LED = crate::Reg; +#[doc(alias = "ERR_LED")] +pub type ErrLed = crate::Reg; #[doc = "RUN ERR Override"] pub mod err_led; #[doc = "PDI_CONTROL (r) register accessor: PDI Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_control::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdi_control`] module"] -pub type PDI_CONTROL = crate::Reg; +#[doc(alias = "PDI_CONTROL")] +pub type PdiControl = crate::Reg; #[doc = "PDI Control"] pub mod pdi_control; #[doc = "ESC_CONFIG (r) register accessor: ESC Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esc_config`] module"] -pub type ESC_CONFIG = crate::Reg; +#[doc(alias = "ESC_CONFIG")] +pub type EscConfig = crate::Reg; #[doc = "ESC Configuration"] pub mod esc_config; #[doc = "PDI_CONFIG (r) register accessor: PDI Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdi_config`] module"] -pub type PDI_CONFIG = crate::Reg; +#[doc(alias = "PDI_CONFIG")] +pub type PdiConfig = crate::Reg; #[doc = "PDI Control"] pub mod pdi_config; #[doc = "SYNC_LATCH_CONFIG (r) register accessor: Sync/Latch\\[1:0\\] PDI Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sync_latch_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sync_latch_config`] module"] -pub type SYNC_LATCH_CONFIG = crate::Reg; +#[doc(alias = "SYNC_LATCH_CONFIG")] +pub type SyncLatchConfig = crate::Reg; #[doc = "Sync/Latch\\[1:0\\] PDI Configuration"] pub mod sync_latch_config; #[doc = "PDI_EXT_CONFIG (r) register accessor: PDI Synchronous Microcontroller extended Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_ext_config::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdi_ext_config`] module"] -pub type PDI_EXT_CONFIG = crate::Reg; +#[doc(alias = "PDI_EXT_CONFIG")] +pub type PdiExtConfig = crate::Reg; #[doc = "PDI Synchronous Microcontroller extended Configuration"] pub mod pdi_ext_config; #[doc = "EVENT_MASK (r) register accessor: ECAT Event Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`event_mask::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@event_mask`] module"] -pub type EVENT_MASK = crate::Reg; +#[doc(alias = "EVENT_MASK")] +pub type EventMask = crate::Reg; #[doc = "ECAT Event Mask"] pub mod event_mask; #[doc = "AL_EVENT_MASK (rw) register accessor: PDI AL Event Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_event_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_event_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@al_event_mask`] module"] -pub type AL_EVENT_MASK = crate::Reg; +#[doc(alias = "AL_EVENT_MASK")] +pub type AlEventMask = crate::Reg; #[doc = "PDI AL Event Mask"] pub mod al_event_mask; #[doc = "EVENT_REQ (r) register accessor: ECAT Event Request\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`event_req::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@event_req`] module"] -pub type EVENT_REQ = crate::Reg; +#[doc(alias = "EVENT_REQ")] +pub type EventReq = crate::Reg; #[doc = "ECAT Event Request"] pub mod event_req; #[doc = "AL_EVENT_REQ (rw) register accessor: AL Event Request\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_event_req::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_event_req::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@al_event_req`] module"] -pub type AL_EVENT_REQ = crate::Reg; +#[doc(alias = "AL_EVENT_REQ")] +pub type AlEventReq = crate::Reg; #[doc = "AL Event Request"] pub mod al_event_req; #[doc = "RX_ERR_COUNT0 (r) register accessor: RX Error Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_err_count0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_err_count0`] module"] -pub type RX_ERR_COUNT0 = crate::Reg; +#[doc(alias = "RX_ERR_COUNT0")] +pub type RxErrCount0 = crate::Reg; #[doc = "RX Error Counter Port 0"] pub mod rx_err_count0; #[doc = "RX_ERR_COUNT1 (r) register accessor: RX Error Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_err_count1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_err_count1`] module"] -pub type RX_ERR_COUNT1 = crate::Reg; +#[doc(alias = "RX_ERR_COUNT1")] +pub type RxErrCount1 = crate::Reg; #[doc = "RX Error Counter Port 1"] pub mod rx_err_count1; #[doc = "FWD_RX_ERR_COUNT0 (r) register accessor: Forwarded RX Error Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fwd_rx_err_count0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fwd_rx_err_count0`] module"] -pub type FWD_RX_ERR_COUNT0 = crate::Reg; +#[doc(alias = "FWD_RX_ERR_COUNT0")] +pub type FwdRxErrCount0 = crate::Reg; #[doc = "Forwarded RX Error Counter Port 0"] pub mod fwd_rx_err_count0; #[doc = "FWD_RX_ERR_COUNT1 (r) register accessor: Forwarded RX Error Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fwd_rx_err_count1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fwd_rx_err_count1`] module"] -pub type FWD_RX_ERR_COUNT1 = crate::Reg; +#[doc(alias = "FWD_RX_ERR_COUNT1")] +pub type FwdRxErrCount1 = crate::Reg; #[doc = "Forwarded RX Error Counter Port 1"] pub mod fwd_rx_err_count1; #[doc = "PROC_ERR_COUNT (r) register accessor: ECAT Processing Unit Error Counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`proc_err_count::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@proc_err_count`] module"] -pub type PROC_ERR_COUNT = crate::Reg; +#[doc(alias = "PROC_ERR_COUNT")] +pub type ProcErrCount = crate::Reg; #[doc = "ECAT Processing Unit Error Counter"] pub mod proc_err_count; #[doc = "PDI_ERR_COUNT (r) register accessor: PDI Error Counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_err_count::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdi_err_count`] module"] -pub type PDI_ERR_COUNT = crate::Reg; +#[doc(alias = "PDI_ERR_COUNT")] +pub type PdiErrCount = crate::Reg; #[doc = "PDI Error Counter"] pub mod pdi_err_count; #[doc = "LOST_LINK_COUNT0 (r) register accessor: Lost Link Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lost_link_count0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lost_link_count0`] module"] -pub type LOST_LINK_COUNT0 = crate::Reg; +#[doc(alias = "LOST_LINK_COUNT0")] +pub type LostLinkCount0 = crate::Reg; #[doc = "Lost Link Counter Port 0"] pub mod lost_link_count0; #[doc = "LOST_LINK_COUNT1 (r) register accessor: Lost Link Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lost_link_count1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lost_link_count1`] module"] -pub type LOST_LINK_COUNT1 = crate::Reg; +#[doc(alias = "LOST_LINK_COUNT1")] +pub type LostLinkCount1 = crate::Reg; #[doc = "Lost Link Counter Port 1"] pub mod lost_link_count1; #[doc = "WD_DIVIDE (rw) register accessor: Watchdog Divider\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_divide::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_divide::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_divide`] module"] -pub type WD_DIVIDE = crate::Reg; +#[doc(alias = "WD_DIVIDE")] +pub type WdDivide = crate::Reg; #[doc = "Watchdog Divider"] pub mod wd_divide; #[doc = "WD_TIME_PDI (rw) register accessor: Watchdog Time PDI\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_time_pdi::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_time_pdi::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_time_pdi`] module"] -pub type WD_TIME_PDI = crate::Reg; +#[doc(alias = "WD_TIME_PDI")] +pub type WdTimePdi = crate::Reg; #[doc = "Watchdog Time PDI"] pub mod wd_time_pdi; #[doc = "WD_TIME_PDATA (rw) register accessor: Watchdog Time Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_time_pdata::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_time_pdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_time_pdata`] module"] -pub type WD_TIME_PDATA = crate::Reg; +#[doc(alias = "WD_TIME_PDATA")] +pub type WdTimePdata = crate::Reg; #[doc = "Watchdog Time Process Data"] pub mod wd_time_pdata; #[doc = "WD_STAT_PDATA (r) register accessor: Watchdog Status Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_stat_pdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_stat_pdata`] module"] -pub type WD_STAT_PDATA = crate::Reg; +#[doc(alias = "WD_STAT_PDATA")] +pub type WdStatPdata = crate::Reg; #[doc = "Watchdog Status Process Data"] pub mod wd_stat_pdata; #[doc = "WD_COUNT_PDATA (r) register accessor: Watchdog Counter Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_count_pdata::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_count_pdata`] module"] -pub type WD_COUNT_PDATA = crate::Reg; +#[doc(alias = "WD_COUNT_PDATA")] +pub type WdCountPdata = crate::Reg; #[doc = "Watchdog Counter Process Data"] pub mod wd_count_pdata; #[doc = "WD_COUNT_PDI (r) register accessor: Watchdog Counter PDI\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_count_pdi::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wd_count_pdi`] module"] -pub type WD_COUNT_PDI = crate::Reg; +#[doc(alias = "WD_COUNT_PDI")] +pub type WdCountPdi = crate::Reg; #[doc = "Watchdog Counter PDI"] pub mod wd_count_pdi; #[doc = "EEP_CONF (r) register accessor: EEPROM Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_conf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eep_conf`] module"] -pub type EEP_CONF = crate::Reg; +#[doc(alias = "EEP_CONF")] +pub type EepConf = crate::Reg; #[doc = "EEPROM Configuration"] pub mod eep_conf; #[doc = "EEP_STATE (rw) register accessor: EEPROM PDI Access State\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_state::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_state::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eep_state`] module"] -pub type EEP_STATE = crate::Reg; +#[doc(alias = "EEP_STATE")] +pub type EepState = crate::Reg; #[doc = "EEPROM PDI Access State"] pub mod eep_state; #[doc = "EEP_CONT_STAT (rw) register accessor: EEPROM Control/Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_cont_stat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_cont_stat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eep_cont_stat`] module"] -pub type EEP_CONT_STAT = crate::Reg; +#[doc(alias = "EEP_CONT_STAT")] +pub type EepContStat = crate::Reg; #[doc = "EEPROM Control/Status"] pub mod eep_cont_stat; #[doc = "EEP_ADR (rw) register accessor: EEPROM Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_adr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_adr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eep_adr`] module"] -pub type EEP_ADR = crate::Reg; +#[doc(alias = "EEP_ADR")] +pub type EepAdr = crate::Reg; #[doc = "EEPROM Address"] pub mod eep_adr; #[doc = "EEP_DATA (rw) register accessor: EEPROM Read/Write data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eep_data`] module"] -pub type EEP_DATA = crate::Reg; +#[doc(alias = "EEP_DATA")] +pub type EepData = crate::Reg; #[doc = "EEPROM Read/Write data"] pub mod eep_data; #[doc = "MII_CONT_STAT (rw) register accessor: MII Management Control/Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_cont_stat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_cont_stat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_cont_stat`] module"] -pub type MII_CONT_STAT = crate::Reg; +#[doc(alias = "MII_CONT_STAT")] +pub type MiiContStat = crate::Reg; #[doc = "MII Management Control/Status"] pub mod mii_cont_stat; #[doc = "MII_PHY_ADR (rw) register accessor: PHY Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_adr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_adr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_phy_adr`] module"] -pub type MII_PHY_ADR = crate::Reg; +#[doc(alias = "MII_PHY_ADR")] +pub type MiiPhyAdr = crate::Reg; #[doc = "PHY Address"] pub mod mii_phy_adr; #[doc = "MII_PHY_REG_ADR (rw) register accessor: PHY Register Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_reg_adr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_reg_adr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_phy_reg_adr`] module"] -pub type MII_PHY_REG_ADR = crate::Reg; +#[doc(alias = "MII_PHY_REG_ADR")] +pub type MiiPhyRegAdr = crate::Reg; #[doc = "PHY Register Address"] pub mod mii_phy_reg_adr; #[doc = "MII_PHY_DATA (rw) register accessor: PHY Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_phy_data`] module"] -pub type MII_PHY_DATA = crate::Reg; +#[doc(alias = "MII_PHY_DATA")] +pub type MiiPhyData = crate::Reg; #[doc = "PHY Data"] pub mod mii_phy_data; #[doc = "MII_ECAT_ACS_STATE (r) register accessor: MII ECAT ACS STATE\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_ecat_acs_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_ecat_acs_state`] module"] -pub type MII_ECAT_ACS_STATE = crate::Reg; +#[doc(alias = "MII_ECAT_ACS_STATE")] +pub type MiiEcatAcsState = crate::Reg; #[doc = "MII ECAT ACS STATE"] pub mod mii_ecat_acs_state; #[doc = "MII_PDI_ACS_STATE (rw) register accessor: MII PDI ACS STATE\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_pdi_acs_state::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_pdi_acs_state::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mii_pdi_acs_state`] module"] -pub type MII_PDI_ACS_STATE = crate::Reg; +#[doc(alias = "MII_PDI_ACS_STATE")] +pub type MiiPdiAcsState = crate::Reg; #[doc = "MII PDI ACS STATE"] pub mod mii_pdi_acs_state; #[doc = "DC_RCV_TIME_PORT0 (r) register accessor: Receive Time Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_rcv_time_port0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_rcv_time_port0`] module"] -pub type DC_RCV_TIME_PORT0 = crate::Reg; +#[doc(alias = "DC_RCV_TIME_PORT0")] +pub type DcRcvTimePort0 = crate::Reg; #[doc = "Receive Time Port 0"] pub mod dc_rcv_time_port0; #[doc = "DC_RCV_TIME_PORT1 (r) register accessor: Receive Time Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_rcv_time_port1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_rcv_time_port1`] module"] -pub type DC_RCV_TIME_PORT1 = crate::Reg; +#[doc(alias = "DC_RCV_TIME_PORT1")] +pub type DcRcvTimePort1 = crate::Reg; #[doc = "Receive Time Port 1"] pub mod dc_rcv_time_port1; #[doc = "RECEIVE_TIME_PU (r) register accessor: Local time of the beginning of a frame\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_time_pu::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_time_pu`] module"] -pub type RECEIVE_TIME_PU = crate::Reg; +#[doc(alias = "RECEIVE_TIME_PU")] +pub type ReceiveTimePu = crate::Reg; #[doc = "Local time of the beginning of a frame"] pub mod receive_time_pu; #[doc = "READMode_DC_SYS_TIME (r) register accessor: System Time read access\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_dc_sys_time::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@readmode_dc_sys_time`] module"] -pub type READMODE_DC_SYS_TIME = crate::Reg; +#[doc(alias = "READMode_DC_SYS_TIME")] +pub type ReadmodeDcSysTime = crate::Reg; #[doc = "System Time read access"] pub mod readmode_dc_sys_time; #[doc = "WRITEMode_DC_SYS_TIME (w) register accessor: System Time \\[WRITE Mode\\]\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`writemode_dc_sys_time::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@writemode_dc_sys_time`] module"] -pub type WRITEMODE_DC_SYS_TIME = crate::Reg; +#[doc(alias = "WRITEMode_DC_SYS_TIME")] +pub type WritemodeDcSysTime = crate::Reg; #[doc = "System Time \\[WRITE Mode\\]"] pub mod writemode_dc_sys_time; #[doc = "DC_SYS_TIME_OFFSET (rw) register accessor: Difference between local time and System Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_offset::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_offset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sys_time_offset`] module"] -pub type DC_SYS_TIME_OFFSET = crate::Reg; +#[doc(alias = "DC_SYS_TIME_OFFSET")] +pub type DcSysTimeOffset = crate::Reg; #[doc = "Difference between local time and System Time"] pub mod dc_sys_time_offset; #[doc = "DC_SYS_TIME_DELAY (rw) register accessor: System Time Delay\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_delay::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_delay::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sys_time_delay`] module"] -pub type DC_SYS_TIME_DELAY = crate::Reg; +#[doc(alias = "DC_SYS_TIME_DELAY")] +pub type DcSysTimeDelay = crate::Reg; #[doc = "System Time Delay"] pub mod dc_sys_time_delay; #[doc = "DC_SYS_TIME_DIFF (r) register accessor: System Time Difference\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_diff::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sys_time_diff`] module"] -pub type DC_SYS_TIME_DIFF = crate::Reg; +#[doc(alias = "DC_SYS_TIME_DIFF")] +pub type DcSysTimeDiff = crate::Reg; #[doc = "System Time Difference"] pub mod dc_sys_time_diff; #[doc = "DC_SPEED_COUNT_START (rw) register accessor: Speed Counter Start\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_start::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_speed_count_start::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_speed_count_start`] module"] -pub type DC_SPEED_COUNT_START = crate::Reg; +#[doc(alias = "DC_SPEED_COUNT_START")] +pub type DcSpeedCountStart = crate::Reg; #[doc = "Speed Counter Start"] pub mod dc_speed_count_start; #[doc = "DC_SPEED_COUNT_DIFF (r) register accessor: Speed Counter Diff\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_diff::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_speed_count_diff`] module"] -pub type DC_SPEED_COUNT_DIFF = crate::Reg; +#[doc(alias = "DC_SPEED_COUNT_DIFF")] +pub type DcSpeedCountDiff = crate::Reg; #[doc = "Speed Counter Diff"] pub mod dc_speed_count_diff; #[doc = "DC_SYS_TIME_FIL_DEPTH (rw) register accessor: System Time Difference Filter Depth\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_fil_depth::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_fil_depth::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sys_time_fil_depth`] module"] -pub type DC_SYS_TIME_FIL_DEPTH = crate::Reg; +#[doc(alias = "DC_SYS_TIME_FIL_DEPTH")] +pub type DcSysTimeFilDepth = crate::Reg; #[doc = "System Time Difference Filter Depth"] pub mod dc_sys_time_fil_depth; #[doc = "DC_SPEED_COUNT_FIL_DEPTH (rw) register accessor: Speed Counter Filter Depth\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_fil_depth::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_speed_count_fil_depth::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_speed_count_fil_depth`] module"] -pub type DC_SPEED_COUNT_FIL_DEPTH = crate::Reg; +#[doc(alias = "DC_SPEED_COUNT_FIL_DEPTH")] +pub type DcSpeedCountFilDepth = crate::Reg; #[doc = "Speed Counter Filter Depth"] pub mod dc_speed_count_fil_depth; #[doc = "DC_CYC_CONT (r) register accessor: Cyclic Unit Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_cyc_cont::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_cyc_cont`] module"] -pub type DC_CYC_CONT = crate::Reg; +#[doc(alias = "DC_CYC_CONT")] +pub type DcCycCont = crate::Reg; #[doc = "Cyclic Unit Control"] pub mod dc_cyc_cont; #[doc = "DC_ACT (rw) register accessor: Activation register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_act::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_act::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_act`] module"] -pub type DC_ACT = crate::Reg; +#[doc(alias = "DC_ACT")] +pub type DcAct = crate::Reg; #[doc = "Activation register"] pub mod dc_act; #[doc = "DC_PULSE_LEN (r) register accessor: Pulse Length of SyncSignals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pulse_len::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_pulse_len`] module"] -pub type DC_PULSE_LEN = crate::Reg; +#[doc(alias = "DC_PULSE_LEN")] +pub type DcPulseLen = crate::Reg; #[doc = "Pulse Length of SyncSignals"] pub mod dc_pulse_len; #[doc = "DC_ACT_STAT (r) register accessor: Activation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_act_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_act_stat`] module"] -pub type DC_ACT_STAT = crate::Reg; +#[doc(alias = "DC_ACT_STAT")] +pub type DcActStat = crate::Reg; #[doc = "Activation Status"] pub mod dc_act_stat; #[doc = "DC_SYNC0_STAT (r) register accessor: SYNC0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync0_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sync0_stat`] module"] -pub type DC_SYNC0_STAT = crate::Reg; +#[doc(alias = "DC_SYNC0_STAT")] +pub type DcSync0Stat = crate::Reg; #[doc = "SYNC0 Status"] pub mod dc_sync0_stat; #[doc = "DC_SYNC1_STAT (r) register accessor: SYNC1 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync1_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sync1_stat`] module"] -pub type DC_SYNC1_STAT = crate::Reg; +#[doc(alias = "DC_SYNC1_STAT")] +pub type DcSync1Stat = crate::Reg; #[doc = "SYNC1 Status"] pub mod dc_sync1_stat; #[doc = "DC_CYC_START_TIME (rw) register accessor: Start Time Cyclic Operation\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_cyc_start_time::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_cyc_start_time::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_cyc_start_time`] module"] -pub type DC_CYC_START_TIME = crate::Reg; +#[doc(alias = "DC_CYC_START_TIME")] +pub type DcCycStartTime = crate::Reg; #[doc = "Start Time Cyclic Operation"] pub mod dc_cyc_start_time; #[doc = "DC_NEXT_SYNC1_PULSE (r) register accessor: System time of next SYNC1 pulse in ns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_next_sync1_pulse::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_next_sync1_pulse`] module"] -pub type DC_NEXT_SYNC1_PULSE = crate::Reg; +#[doc(alias = "DC_NEXT_SYNC1_PULSE")] +pub type DcNextSync1Pulse = crate::Reg; #[doc = "System time of next SYNC1 pulse in ns"] pub mod dc_next_sync1_pulse; #[doc = "DC_SYNC0_CYC_TIME (rw) register accessor: SYNC0 Cycle Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync0_cyc_time::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sync0_cyc_time::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sync0_cyc_time`] module"] -pub type DC_SYNC0_CYC_TIME = crate::Reg; +#[doc(alias = "DC_SYNC0_CYC_TIME")] +pub type DcSync0CycTime = crate::Reg; #[doc = "SYNC0 Cycle Time"] pub mod dc_sync0_cyc_time; #[doc = "DC_SYNC1_CYC_TIME (rw) register accessor: SYNC1 Cycle Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync1_cyc_time::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sync1_cyc_time::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_sync1_cyc_time`] module"] -pub type DC_SYNC1_CYC_TIME = crate::Reg; +#[doc(alias = "DC_SYNC1_CYC_TIME")] +pub type DcSync1CycTime = crate::Reg; #[doc = "SYNC1 Cycle Time"] pub mod dc_sync1_cyc_time; #[doc = "DC_LATCH0_CONT (rw) register accessor: Latch0 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_cont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_latch0_cont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch0_cont`] module"] -pub type DC_LATCH0_CONT = crate::Reg; +#[doc(alias = "DC_LATCH0_CONT")] +pub type DcLatch0Cont = crate::Reg; #[doc = "Latch0 Control"] pub mod dc_latch0_cont; #[doc = "DC_LATCH1_CONT (rw) register accessor: Latch1 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_cont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_latch1_cont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch1_cont`] module"] -pub type DC_LATCH1_CONT = crate::Reg; +#[doc(alias = "DC_LATCH1_CONT")] +pub type DcLatch1Cont = crate::Reg; #[doc = "Latch1 Control"] pub mod dc_latch1_cont; #[doc = "DC_LATCH0_STAT (r) register accessor: Latch0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch0_stat`] module"] -pub type DC_LATCH0_STAT = crate::Reg; +#[doc(alias = "DC_LATCH0_STAT")] +pub type DcLatch0Stat = crate::Reg; #[doc = "Latch0 Status"] pub mod dc_latch0_stat; #[doc = "DC_LATCH1_STAT (r) register accessor: Latch1 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_stat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch1_stat`] module"] -pub type DC_LATCH1_STAT = crate::Reg; +#[doc(alias = "DC_LATCH1_STAT")] +pub type DcLatch1Stat = crate::Reg; #[doc = "Latch1 Status"] pub mod dc_latch1_stat; #[doc = "DC_LATCH0_TIME_POS (r) register accessor: Register captures System time at the positive edge of the Latch0 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_time_pos::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch0_time_pos`] module"] -pub type DC_LATCH0_TIME_POS = crate::Reg; +#[doc(alias = "DC_LATCH0_TIME_POS")] +pub type DcLatch0TimePos = crate::Reg; #[doc = "Register captures System time at the positive edge of the Latch0 signal"] pub mod dc_latch0_time_pos; #[doc = "DC_LATCH0_TIME_NEG (r) register accessor: Register captures System time at the negative edge of the Latch0 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_time_neg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch0_time_neg`] module"] -pub type DC_LATCH0_TIME_NEG = crate::Reg; +#[doc(alias = "DC_LATCH0_TIME_NEG")] +pub type DcLatch0TimeNeg = crate::Reg; #[doc = "Register captures System time at the negative edge of the Latch0 signal"] pub mod dc_latch0_time_neg; #[doc = "DC_LATCH1_TIME_POS (r) register accessor: Register captures System time at the positive edge of the Latch1 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_time_pos::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch1_time_pos`] module"] -pub type DC_LATCH1_TIME_POS = crate::Reg; +#[doc(alias = "DC_LATCH1_TIME_POS")] +pub type DcLatch1TimePos = crate::Reg; #[doc = "Register captures System time at the positive edge of the Latch1 signal"] pub mod dc_latch1_time_pos; #[doc = "DC_LATCH1_TIME_NEG (r) register accessor: Register captures System time at the negative edge of the Latch1 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_time_neg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_latch1_time_neg`] module"] -pub type DC_LATCH1_TIME_NEG = crate::Reg; +#[doc(alias = "DC_LATCH1_TIME_NEG")] +pub type DcLatch1TimeNeg = crate::Reg; #[doc = "Register captures System time at the negative edge of the Latch1 signal"] pub mod dc_latch1_time_neg; #[doc = "DC_ECAT_CNG_EV_TIME (r) register accessor: EtherCAT Buffer Change Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_ecat_cng_ev_time::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_ecat_cng_ev_time`] module"] -pub type DC_ECAT_CNG_EV_TIME = crate::Reg; +#[doc(alias = "DC_ECAT_CNG_EV_TIME")] +pub type DcEcatCngEvTime = crate::Reg; #[doc = "EtherCAT Buffer Change Event Time"] pub mod dc_ecat_cng_ev_time; #[doc = "DC_PDI_START_EV_TIME (r) register accessor: PDI Buffer Start Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pdi_start_ev_time::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_pdi_start_ev_time`] module"] -pub type DC_PDI_START_EV_TIME = crate::Reg; +#[doc(alias = "DC_PDI_START_EV_TIME")] +pub type DcPdiStartEvTime = crate::Reg; #[doc = "PDI Buffer Start Event Time"] pub mod dc_pdi_start_ev_time; #[doc = "DC_PDI_CNG_EV_TIME (r) register accessor: PDI Buffer Change Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pdi_cng_ev_time::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc_pdi_cng_ev_time`] module"] -pub type DC_PDI_CNG_EV_TIME = crate::Reg; +#[doc(alias = "DC_PDI_CNG_EV_TIME")] +pub type DcPdiCngEvTime = crate::Reg; #[doc = "PDI Buffer Change Event Time"] pub mod dc_pdi_cng_ev_time; #[doc = "ID (r) register accessor: ECAT0 Module ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "ECAT0 Module ID"] pub mod id; #[doc = "STATUS (r) register accessor: ECAT0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] -pub type STATUS = crate::Reg; +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "ECAT0 Status"] pub mod status; diff --git a/src/ecat0/al_control.rs b/src/ecat0/al_control.rs index a274fb10..f5a86823 100644 --- a/src/ecat0/al_control.rs +++ b/src/ecat0/al_control.rs @@ -1,167 +1,167 @@ #[doc = "Register `AL_CONTROL` reader"] -pub type R = crate::R; -#[doc = "Field `IST` reader - Initiate State Transition of the Device StateMachine"] -pub type IST_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Initiate State Transition of the Device StateMachine\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IST_A { +pub enum Ist { #[doc = "1: Request Init State"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: Request Pre-Operational State"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: Request Bootstrap State"] - VALUE3 = 3, + Value3 = 3, #[doc = "4: Request Safe-Operational State"] - VALUE4 = 4, + Value4 = 4, #[doc = "8: Request Operational State"] - VALUE5 = 8, + Value5 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IST_A) -> Self { + fn from(variant: Ist) -> Self { variant as _ } } -impl crate::FieldSpec for IST_A { +impl crate::FieldSpec for Ist { type Ux = u8; } -impl IST_R { +#[doc = "Field `IST` reader - Initiate State Transition of the Device StateMachine"] +pub type IstR = crate::FieldReader; +impl IstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(IST_A::VALUE1), - 2 => Some(IST_A::VALUE2), - 3 => Some(IST_A::VALUE3), - 4 => Some(IST_A::VALUE4), - 8 => Some(IST_A::VALUE5), + 1 => Some(Ist::Value1), + 2 => Some(Ist::Value2), + 3 => Some(Ist::Value3), + 4 => Some(Ist::Value4), + 8 => Some(Ist::Value5), _ => None, } } #[doc = "Request Init State"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IST_A::VALUE1 + *self == Ist::Value1 } #[doc = "Request Pre-Operational State"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IST_A::VALUE2 + *self == Ist::Value2 } #[doc = "Request Bootstrap State"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == IST_A::VALUE3 + *self == Ist::Value3 } #[doc = "Request Safe-Operational State"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == IST_A::VALUE4 + *self == Ist::Value4 } #[doc = "Request Operational State"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == IST_A::VALUE5 + *self == Ist::Value5 } } -#[doc = "Field `EIA` reader - Error Ind Ack"] -pub type EIA_R = crate::BitReader; #[doc = "Error Ind Ack\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EIA_A { +pub enum Eia { #[doc = "0: No Ack of Error Ind in AL status register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ack of Error Ind in AL status register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EIA_A) -> Self { + fn from(variant: Eia) -> Self { variant as u8 != 0 } } -impl EIA_R { +#[doc = "Field `EIA` reader - Error Ind Ack"] +pub type EiaR = crate::BitReader; +impl EiaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EIA_A { + pub const fn variant(&self) -> Eia { match self.bits { - false => EIA_A::VALUE1, - true => EIA_A::VALUE2, + false => Eia::Value1, + true => Eia::Value2, } } #[doc = "No Ack of Error Ind in AL status register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EIA_A::VALUE1 + *self == Eia::Value1 } #[doc = "Ack of Error Ind in AL status register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EIA_A::VALUE2 + *self == Eia::Value2 } } -#[doc = "Field `DID` reader - Device Identification"] -pub type DID_R = crate::BitReader; #[doc = "Device Identification\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DID_A { +pub enum Did { #[doc = "0: No request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Device Identification request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DID_A) -> Self { + fn from(variant: Did) -> Self { variant as u8 != 0 } } -impl DID_R { +#[doc = "Field `DID` reader - Device Identification"] +pub type DidR = crate::BitReader; +impl DidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DID_A { + pub const fn variant(&self) -> Did { match self.bits { - false => DID_A::VALUE1, - true => DID_A::VALUE2, + false => Did::Value1, + true => Did::Value2, } } #[doc = "No request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DID_A::VALUE1 + *self == Did::Value1 } #[doc = "Device Identification request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DID_A::VALUE2 + *self == Did::Value2 } } impl R { #[doc = "Bits 0:3 - Initiate State Transition of the Device StateMachine"] #[inline(always)] - pub fn ist(&self) -> IST_R { - IST_R::new((self.bits & 0x0f) as u8) + pub fn ist(&self) -> IstR { + IstR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Error Ind Ack"] #[inline(always)] - pub fn eia(&self) -> EIA_R { - EIA_R::new(((self.bits >> 4) & 1) != 0) + pub fn eia(&self) -> EiaR { + EiaR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Device Identification"] #[inline(always)] - pub fn did(&self) -> DID_R { - DID_R::new(((self.bits >> 5) & 1) != 0) + pub fn did(&self) -> DidR { + DidR::new(((self.bits >> 5) & 1) != 0) } } #[doc = "AL Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_control::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AL_CONTROL_SPEC; -impl crate::RegisterSpec for AL_CONTROL_SPEC { +pub struct AlControlSpec; +impl crate::RegisterSpec for AlControlSpec { type Ux = u16; } #[doc = "`read()` method returns [`al_control::R`](R) reader structure"] -impl crate::Readable for AL_CONTROL_SPEC {} +impl crate::Readable for AlControlSpec {} #[doc = "`reset()` method sets AL_CONTROL to value 0x01"] -impl crate::Resettable for AL_CONTROL_SPEC { +impl crate::Resettable for AlControlSpec { const RESET_VALUE: u16 = 0x01; } diff --git a/src/ecat0/al_event_mask.rs b/src/ecat0/al_event_mask.rs index 375381ce..6f0164e4 100644 --- a/src/ecat0/al_event_mask.rs +++ b/src/ecat0/al_event_mask.rs @@ -1,1506 +1,1497 @@ #[doc = "Register `AL_EVENT_MASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AL_EVENT_MASK` writer"] -pub type W = crate::W; -#[doc = "Field `AL_CE_MASK` reader - AL Control event"] -pub type AL_CE_MASK_R = crate::BitReader; +pub type W = crate::W; #[doc = "AL Control event\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AL_CE_MASK_A { +pub enum AlCeMask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AL_CE_MASK_A) -> Self { + fn from(variant: AlCeMask) -> Self { variant as u8 != 0 } } -impl AL_CE_MASK_R { +#[doc = "Field `AL_CE_MASK` reader - AL Control event"] +pub type AlCeMaskR = crate::BitReader; +impl AlCeMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AL_CE_MASK_A { + pub const fn variant(&self) -> AlCeMask { match self.bits { - false => AL_CE_MASK_A::VALUE1, - true => AL_CE_MASK_A::VALUE2, + false => AlCeMask::Value1, + true => AlCeMask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AL_CE_MASK_A::VALUE1 + *self == AlCeMask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AL_CE_MASK_A::VALUE2 + *self == AlCeMask::Value2 } } #[doc = "Field `AL_CE_MASK` writer - AL Control event"] -pub type AL_CE_MASK_W<'a, REG> = crate::BitWriter<'a, REG, AL_CE_MASK_A>; -impl<'a, REG> AL_CE_MASK_W<'a, REG> +pub type AlCeMaskW<'a, REG> = crate::BitWriter<'a, REG, AlCeMask>; +impl<'a, REG> AlCeMaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AL_CE_MASK_A::VALUE1) + self.variant(AlCeMask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AL_CE_MASK_A::VALUE2) + self.variant(AlCeMask::Value2) } } -#[doc = "Field `DC_LE_MASK` reader - DC Latch event"] -pub type DC_LE_MASK_R = crate::BitReader; #[doc = "DC Latch event\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DC_LE_MASK_A { +pub enum DcLeMask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DC_LE_MASK_A) -> Self { + fn from(variant: DcLeMask) -> Self { variant as u8 != 0 } } -impl DC_LE_MASK_R { +#[doc = "Field `DC_LE_MASK` reader - DC Latch event"] +pub type DcLeMaskR = crate::BitReader; +impl DcLeMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DC_LE_MASK_A { + pub const fn variant(&self) -> DcLeMask { match self.bits { - false => DC_LE_MASK_A::VALUE1, - true => DC_LE_MASK_A::VALUE2, + false => DcLeMask::Value1, + true => DcLeMask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DC_LE_MASK_A::VALUE1 + *self == DcLeMask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DC_LE_MASK_A::VALUE2 + *self == DcLeMask::Value2 } } #[doc = "Field `DC_LE_MASK` writer - DC Latch event"] -pub type DC_LE_MASK_W<'a, REG> = crate::BitWriter<'a, REG, DC_LE_MASK_A>; -impl<'a, REG> DC_LE_MASK_W<'a, REG> +pub type DcLeMaskW<'a, REG> = crate::BitWriter<'a, REG, DcLeMask>; +impl<'a, REG> DcLeMaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DC_LE_MASK_A::VALUE1) + self.variant(DcLeMask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DC_LE_MASK_A::VALUE2) + self.variant(DcLeMask::Value2) } } -#[doc = "Field `ST_S0_MASK` reader - State of DC SYNC0"] -pub type ST_S0_MASK_R = crate::BitReader; #[doc = "State of DC SYNC0\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ST_S0_MASK_A { +pub enum StS0Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ST_S0_MASK_A) -> Self { + fn from(variant: StS0Mask) -> Self { variant as u8 != 0 } } -impl ST_S0_MASK_R { +#[doc = "Field `ST_S0_MASK` reader - State of DC SYNC0"] +pub type StS0MaskR = crate::BitReader; +impl StS0MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ST_S0_MASK_A { + pub const fn variant(&self) -> StS0Mask { match self.bits { - false => ST_S0_MASK_A::VALUE1, - true => ST_S0_MASK_A::VALUE2, + false => StS0Mask::Value1, + true => StS0Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ST_S0_MASK_A::VALUE1 + *self == StS0Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ST_S0_MASK_A::VALUE2 + *self == StS0Mask::Value2 } } #[doc = "Field `ST_S0_MASK` writer - State of DC SYNC0"] -pub type ST_S0_MASK_W<'a, REG> = crate::BitWriter<'a, REG, ST_S0_MASK_A>; -impl<'a, REG> ST_S0_MASK_W<'a, REG> +pub type StS0MaskW<'a, REG> = crate::BitWriter<'a, REG, StS0Mask>; +impl<'a, REG> StS0MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ST_S0_MASK_A::VALUE1) + self.variant(StS0Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ST_S0_MASK_A::VALUE2) + self.variant(StS0Mask::Value2) } } -#[doc = "Field `ST_S1_MASK` reader - State of DC SYNC1"] -pub type ST_S1_MASK_R = crate::BitReader; #[doc = "State of DC SYNC1\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ST_S1_MASK_A { +pub enum StS1Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ST_S1_MASK_A) -> Self { + fn from(variant: StS1Mask) -> Self { variant as u8 != 0 } } -impl ST_S1_MASK_R { +#[doc = "Field `ST_S1_MASK` reader - State of DC SYNC1"] +pub type StS1MaskR = crate::BitReader; +impl StS1MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ST_S1_MASK_A { + pub const fn variant(&self) -> StS1Mask { match self.bits { - false => ST_S1_MASK_A::VALUE1, - true => ST_S1_MASK_A::VALUE2, + false => StS1Mask::Value1, + true => StS1Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ST_S1_MASK_A::VALUE1 + *self == StS1Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ST_S1_MASK_A::VALUE2 + *self == StS1Mask::Value2 } } #[doc = "Field `ST_S1_MASK` writer - State of DC SYNC1"] -pub type ST_S1_MASK_W<'a, REG> = crate::BitWriter<'a, REG, ST_S1_MASK_A>; -impl<'a, REG> ST_S1_MASK_W<'a, REG> +pub type StS1MaskW<'a, REG> = crate::BitWriter<'a, REG, StS1Mask>; +impl<'a, REG> StS1MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ST_S1_MASK_A::VALUE1) + self.variant(StS1Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ST_S1_MASK_A::VALUE2) + self.variant(StS1Mask::Value2) } } -#[doc = "Field `SM_A_MASK` reader - SyncManager activation register changed"] -pub type SM_A_MASK_R = crate::BitReader; #[doc = "SyncManager activation register changed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SM_A_MASK_A { +pub enum SmAMask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SM_A_MASK_A) -> Self { + fn from(variant: SmAMask) -> Self { variant as u8 != 0 } } -impl SM_A_MASK_R { +#[doc = "Field `SM_A_MASK` reader - SyncManager activation register changed"] +pub type SmAMaskR = crate::BitReader; +impl SmAMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SM_A_MASK_A { + pub const fn variant(&self) -> SmAMask { match self.bits { - false => SM_A_MASK_A::VALUE1, - true => SM_A_MASK_A::VALUE2, + false => SmAMask::Value1, + true => SmAMask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SM_A_MASK_A::VALUE1 + *self == SmAMask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SM_A_MASK_A::VALUE2 + *self == SmAMask::Value2 } } #[doc = "Field `SM_A_MASK` writer - SyncManager activation register changed"] -pub type SM_A_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SM_A_MASK_A>; -impl<'a, REG> SM_A_MASK_W<'a, REG> +pub type SmAMaskW<'a, REG> = crate::BitWriter<'a, REG, SmAMask>; +impl<'a, REG> SmAMaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SM_A_MASK_A::VALUE1) + self.variant(SmAMask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SM_A_MASK_A::VALUE2) + self.variant(SmAMask::Value2) } } -#[doc = "Field `EEP_E_MASK` reader - EEPROM Emulation"] -pub type EEP_E_MASK_R = crate::BitReader; #[doc = "EEPROM Emulation\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EEP_E_MASK_A { +pub enum EepEMask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EEP_E_MASK_A) -> Self { + fn from(variant: EepEMask) -> Self { variant as u8 != 0 } } -impl EEP_E_MASK_R { +#[doc = "Field `EEP_E_MASK` reader - EEPROM Emulation"] +pub type EepEMaskR = crate::BitReader; +impl EepEMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EEP_E_MASK_A { + pub const fn variant(&self) -> EepEMask { match self.bits { - false => EEP_E_MASK_A::VALUE1, - true => EEP_E_MASK_A::VALUE2, + false => EepEMask::Value1, + true => EepEMask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EEP_E_MASK_A::VALUE1 + *self == EepEMask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EEP_E_MASK_A::VALUE2 + *self == EepEMask::Value2 } } #[doc = "Field `EEP_E_MASK` writer - EEPROM Emulation"] -pub type EEP_E_MASK_W<'a, REG> = crate::BitWriter<'a, REG, EEP_E_MASK_A>; -impl<'a, REG> EEP_E_MASK_W<'a, REG> +pub type EepEMaskW<'a, REG> = crate::BitWriter<'a, REG, EepEMask>; +impl<'a, REG> EepEMaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EEP_E_MASK_A::VALUE1) + self.variant(EepEMask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EEP_E_MASK_A::VALUE2) + self.variant(EepEMask::Value2) } } -#[doc = "Field `WP_D_MASK` reader - Watchdog Process Data"] -pub type WP_D_MASK_R = crate::BitReader; #[doc = "Watchdog Process Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WP_D_MASK_A { +pub enum WpDMask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WP_D_MASK_A) -> Self { + fn from(variant: WpDMask) -> Self { variant as u8 != 0 } } -impl WP_D_MASK_R { +#[doc = "Field `WP_D_MASK` reader - Watchdog Process Data"] +pub type WpDMaskR = crate::BitReader; +impl WpDMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WP_D_MASK_A { + pub const fn variant(&self) -> WpDMask { match self.bits { - false => WP_D_MASK_A::VALUE1, - true => WP_D_MASK_A::VALUE2, + false => WpDMask::Value1, + true => WpDMask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WP_D_MASK_A::VALUE1 + *self == WpDMask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WP_D_MASK_A::VALUE2 + *self == WpDMask::Value2 } } #[doc = "Field `WP_D_MASK` writer - Watchdog Process Data"] -pub type WP_D_MASK_W<'a, REG> = crate::BitWriter<'a, REG, WP_D_MASK_A>; -impl<'a, REG> WP_D_MASK_W<'a, REG> +pub type WpDMaskW<'a, REG> = crate::BitWriter<'a, REG, WpDMask>; +impl<'a, REG> WpDMaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WP_D_MASK_A::VALUE1) + self.variant(WpDMask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WP_D_MASK_A::VALUE2) + self.variant(WpDMask::Value2) } } -#[doc = "Field `SMI_0_MASK` reader - SyncManager interrupt"] -pub type SMI_0_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_0_MASK_A { +pub enum Smi0Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_0_MASK_A) -> Self { + fn from(variant: Smi0Mask) -> Self { variant as u8 != 0 } } -impl SMI_0_MASK_R { +#[doc = "Field `SMI_0_MASK` reader - SyncManager interrupt"] +pub type Smi0MaskR = crate::BitReader; +impl Smi0MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_0_MASK_A { + pub const fn variant(&self) -> Smi0Mask { match self.bits { - false => SMI_0_MASK_A::VALUE1, - true => SMI_0_MASK_A::VALUE2, + false => Smi0Mask::Value1, + true => Smi0Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_0_MASK_A::VALUE1 + *self == Smi0Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_0_MASK_A::VALUE2 + *self == Smi0Mask::Value2 } } #[doc = "Field `SMI_0_MASK` writer - SyncManager interrupt"] -pub type SMI_0_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_0_MASK_A>; -impl<'a, REG> SMI_0_MASK_W<'a, REG> +pub type Smi0MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi0Mask>; +impl<'a, REG> Smi0MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_0_MASK_A::VALUE1) + self.variant(Smi0Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_0_MASK_A::VALUE2) + self.variant(Smi0Mask::Value2) } } -#[doc = "Field `SMI_1_MASK` reader - SyncManager interrupt"] -pub type SMI_1_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_1_MASK_A { +pub enum Smi1Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_1_MASK_A) -> Self { + fn from(variant: Smi1Mask) -> Self { variant as u8 != 0 } } -impl SMI_1_MASK_R { +#[doc = "Field `SMI_1_MASK` reader - SyncManager interrupt"] +pub type Smi1MaskR = crate::BitReader; +impl Smi1MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_1_MASK_A { + pub const fn variant(&self) -> Smi1Mask { match self.bits { - false => SMI_1_MASK_A::VALUE1, - true => SMI_1_MASK_A::VALUE2, + false => Smi1Mask::Value1, + true => Smi1Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_1_MASK_A::VALUE1 + *self == Smi1Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_1_MASK_A::VALUE2 + *self == Smi1Mask::Value2 } } #[doc = "Field `SMI_1_MASK` writer - SyncManager interrupt"] -pub type SMI_1_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_1_MASK_A>; -impl<'a, REG> SMI_1_MASK_W<'a, REG> +pub type Smi1MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi1Mask>; +impl<'a, REG> Smi1MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_1_MASK_A::VALUE1) + self.variant(Smi1Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_1_MASK_A::VALUE2) + self.variant(Smi1Mask::Value2) } } -#[doc = "Field `SMI_2_MASK` reader - SyncManager interrupt"] -pub type SMI_2_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_2_MASK_A { +pub enum Smi2Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_2_MASK_A) -> Self { + fn from(variant: Smi2Mask) -> Self { variant as u8 != 0 } } -impl SMI_2_MASK_R { +#[doc = "Field `SMI_2_MASK` reader - SyncManager interrupt"] +pub type Smi2MaskR = crate::BitReader; +impl Smi2MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_2_MASK_A { + pub const fn variant(&self) -> Smi2Mask { match self.bits { - false => SMI_2_MASK_A::VALUE1, - true => SMI_2_MASK_A::VALUE2, + false => Smi2Mask::Value1, + true => Smi2Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_2_MASK_A::VALUE1 + *self == Smi2Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_2_MASK_A::VALUE2 + *self == Smi2Mask::Value2 } } #[doc = "Field `SMI_2_MASK` writer - SyncManager interrupt"] -pub type SMI_2_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_2_MASK_A>; -impl<'a, REG> SMI_2_MASK_W<'a, REG> +pub type Smi2MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi2Mask>; +impl<'a, REG> Smi2MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_2_MASK_A::VALUE1) + self.variant(Smi2Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_2_MASK_A::VALUE2) + self.variant(Smi2Mask::Value2) } } -#[doc = "Field `SMI_3_MASK` reader - SyncManager interrupt"] -pub type SMI_3_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_3_MASK_A { +pub enum Smi3Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_3_MASK_A) -> Self { + fn from(variant: Smi3Mask) -> Self { variant as u8 != 0 } } -impl SMI_3_MASK_R { +#[doc = "Field `SMI_3_MASK` reader - SyncManager interrupt"] +pub type Smi3MaskR = crate::BitReader; +impl Smi3MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_3_MASK_A { + pub const fn variant(&self) -> Smi3Mask { match self.bits { - false => SMI_3_MASK_A::VALUE1, - true => SMI_3_MASK_A::VALUE2, + false => Smi3Mask::Value1, + true => Smi3Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_3_MASK_A::VALUE1 + *self == Smi3Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_3_MASK_A::VALUE2 + *self == Smi3Mask::Value2 } } #[doc = "Field `SMI_3_MASK` writer - SyncManager interrupt"] -pub type SMI_3_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_3_MASK_A>; -impl<'a, REG> SMI_3_MASK_W<'a, REG> +pub type Smi3MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi3Mask>; +impl<'a, REG> Smi3MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_3_MASK_A::VALUE1) + self.variant(Smi3Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_3_MASK_A::VALUE2) + self.variant(Smi3Mask::Value2) } } -#[doc = "Field `SMI_4_MASK` reader - SyncManager interrupt"] -pub type SMI_4_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_4_MASK_A { +pub enum Smi4Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_4_MASK_A) -> Self { + fn from(variant: Smi4Mask) -> Self { variant as u8 != 0 } } -impl SMI_4_MASK_R { +#[doc = "Field `SMI_4_MASK` reader - SyncManager interrupt"] +pub type Smi4MaskR = crate::BitReader; +impl Smi4MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_4_MASK_A { + pub const fn variant(&self) -> Smi4Mask { match self.bits { - false => SMI_4_MASK_A::VALUE1, - true => SMI_4_MASK_A::VALUE2, + false => Smi4Mask::Value1, + true => Smi4Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_4_MASK_A::VALUE1 + *self == Smi4Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_4_MASK_A::VALUE2 + *self == Smi4Mask::Value2 } } #[doc = "Field `SMI_4_MASK` writer - SyncManager interrupt"] -pub type SMI_4_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_4_MASK_A>; -impl<'a, REG> SMI_4_MASK_W<'a, REG> +pub type Smi4MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi4Mask>; +impl<'a, REG> Smi4MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_4_MASK_A::VALUE1) + self.variant(Smi4Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_4_MASK_A::VALUE2) + self.variant(Smi4Mask::Value2) } } -#[doc = "Field `SMI_5_MASK` reader - SyncManager interrupt"] -pub type SMI_5_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_5_MASK_A { +pub enum Smi5Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_5_MASK_A) -> Self { + fn from(variant: Smi5Mask) -> Self { variant as u8 != 0 } } -impl SMI_5_MASK_R { +#[doc = "Field `SMI_5_MASK` reader - SyncManager interrupt"] +pub type Smi5MaskR = crate::BitReader; +impl Smi5MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_5_MASK_A { + pub const fn variant(&self) -> Smi5Mask { match self.bits { - false => SMI_5_MASK_A::VALUE1, - true => SMI_5_MASK_A::VALUE2, + false => Smi5Mask::Value1, + true => Smi5Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_5_MASK_A::VALUE1 + *self == Smi5Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_5_MASK_A::VALUE2 + *self == Smi5Mask::Value2 } } #[doc = "Field `SMI_5_MASK` writer - SyncManager interrupt"] -pub type SMI_5_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_5_MASK_A>; -impl<'a, REG> SMI_5_MASK_W<'a, REG> +pub type Smi5MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi5Mask>; +impl<'a, REG> Smi5MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_5_MASK_A::VALUE1) + self.variant(Smi5Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_5_MASK_A::VALUE2) + self.variant(Smi5Mask::Value2) } } -#[doc = "Field `SMI_6_MASK` reader - SyncManager interrupt"] -pub type SMI_6_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_6_MASK_A { +pub enum Smi6Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_6_MASK_A) -> Self { + fn from(variant: Smi6Mask) -> Self { variant as u8 != 0 } } -impl SMI_6_MASK_R { +#[doc = "Field `SMI_6_MASK` reader - SyncManager interrupt"] +pub type Smi6MaskR = crate::BitReader; +impl Smi6MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_6_MASK_A { + pub const fn variant(&self) -> Smi6Mask { match self.bits { - false => SMI_6_MASK_A::VALUE1, - true => SMI_6_MASK_A::VALUE2, + false => Smi6Mask::Value1, + true => Smi6Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_6_MASK_A::VALUE1 + *self == Smi6Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_6_MASK_A::VALUE2 + *self == Smi6Mask::Value2 } } #[doc = "Field `SMI_6_MASK` writer - SyncManager interrupt"] -pub type SMI_6_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_6_MASK_A>; -impl<'a, REG> SMI_6_MASK_W<'a, REG> +pub type Smi6MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi6Mask>; +impl<'a, REG> Smi6MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_6_MASK_A::VALUE1) + self.variant(Smi6Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_6_MASK_A::VALUE2) + self.variant(Smi6Mask::Value2) } } -#[doc = "Field `SMI_7_MASK` reader - SyncManager interrupt"] -pub type SMI_7_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_7_MASK_A { +pub enum Smi7Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_7_MASK_A) -> Self { + fn from(variant: Smi7Mask) -> Self { variant as u8 != 0 } } -impl SMI_7_MASK_R { +#[doc = "Field `SMI_7_MASK` reader - SyncManager interrupt"] +pub type Smi7MaskR = crate::BitReader; +impl Smi7MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_7_MASK_A { + pub const fn variant(&self) -> Smi7Mask { match self.bits { - false => SMI_7_MASK_A::VALUE1, - true => SMI_7_MASK_A::VALUE2, + false => Smi7Mask::Value1, + true => Smi7Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_7_MASK_A::VALUE1 + *self == Smi7Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_7_MASK_A::VALUE2 + *self == Smi7Mask::Value2 } } #[doc = "Field `SMI_7_MASK` writer - SyncManager interrupt"] -pub type SMI_7_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_7_MASK_A>; -impl<'a, REG> SMI_7_MASK_W<'a, REG> +pub type Smi7MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi7Mask>; +impl<'a, REG> Smi7MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_7_MASK_A::VALUE1) + self.variant(Smi7Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_7_MASK_A::VALUE2) + self.variant(Smi7Mask::Value2) } } -#[doc = "Field `SMI_8_MASK` reader - SyncManager interrupt"] -pub type SMI_8_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_8_MASK_A { +pub enum Smi8Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_8_MASK_A) -> Self { + fn from(variant: Smi8Mask) -> Self { variant as u8 != 0 } } -impl SMI_8_MASK_R { +#[doc = "Field `SMI_8_MASK` reader - SyncManager interrupt"] +pub type Smi8MaskR = crate::BitReader; +impl Smi8MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_8_MASK_A { + pub const fn variant(&self) -> Smi8Mask { match self.bits { - false => SMI_8_MASK_A::VALUE1, - true => SMI_8_MASK_A::VALUE2, + false => Smi8Mask::Value1, + true => Smi8Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_8_MASK_A::VALUE1 + *self == Smi8Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_8_MASK_A::VALUE2 + *self == Smi8Mask::Value2 } } #[doc = "Field `SMI_8_MASK` writer - SyncManager interrupt"] -pub type SMI_8_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_8_MASK_A>; -impl<'a, REG> SMI_8_MASK_W<'a, REG> +pub type Smi8MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi8Mask>; +impl<'a, REG> Smi8MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_8_MASK_A::VALUE1) + self.variant(Smi8Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_8_MASK_A::VALUE2) + self.variant(Smi8Mask::Value2) } } -#[doc = "Field `SMI_9_MASK` reader - SyncManager interrupt"] -pub type SMI_9_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_9_MASK_A { +pub enum Smi9Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_9_MASK_A) -> Self { + fn from(variant: Smi9Mask) -> Self { variant as u8 != 0 } } -impl SMI_9_MASK_R { +#[doc = "Field `SMI_9_MASK` reader - SyncManager interrupt"] +pub type Smi9MaskR = crate::BitReader; +impl Smi9MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_9_MASK_A { + pub const fn variant(&self) -> Smi9Mask { match self.bits { - false => SMI_9_MASK_A::VALUE1, - true => SMI_9_MASK_A::VALUE2, + false => Smi9Mask::Value1, + true => Smi9Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_9_MASK_A::VALUE1 + *self == Smi9Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_9_MASK_A::VALUE2 + *self == Smi9Mask::Value2 } } #[doc = "Field `SMI_9_MASK` writer - SyncManager interrupt"] -pub type SMI_9_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_9_MASK_A>; -impl<'a, REG> SMI_9_MASK_W<'a, REG> +pub type Smi9MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi9Mask>; +impl<'a, REG> Smi9MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_9_MASK_A::VALUE1) + self.variant(Smi9Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_9_MASK_A::VALUE2) + self.variant(Smi9Mask::Value2) } } -#[doc = "Field `SMI_10_MASK` reader - SyncManager interrupt"] -pub type SMI_10_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_10_MASK_A { +pub enum Smi10Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_10_MASK_A) -> Self { + fn from(variant: Smi10Mask) -> Self { variant as u8 != 0 } } -impl SMI_10_MASK_R { +#[doc = "Field `SMI_10_MASK` reader - SyncManager interrupt"] +pub type Smi10MaskR = crate::BitReader; +impl Smi10MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_10_MASK_A { + pub const fn variant(&self) -> Smi10Mask { match self.bits { - false => SMI_10_MASK_A::VALUE1, - true => SMI_10_MASK_A::VALUE2, + false => Smi10Mask::Value1, + true => Smi10Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_10_MASK_A::VALUE1 + *self == Smi10Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_10_MASK_A::VALUE2 + *self == Smi10Mask::Value2 } } #[doc = "Field `SMI_10_MASK` writer - SyncManager interrupt"] -pub type SMI_10_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_10_MASK_A>; -impl<'a, REG> SMI_10_MASK_W<'a, REG> +pub type Smi10MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi10Mask>; +impl<'a, REG> Smi10MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_10_MASK_A::VALUE1) + self.variant(Smi10Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_10_MASK_A::VALUE2) + self.variant(Smi10Mask::Value2) } } -#[doc = "Field `SMI_11_MASK` reader - SyncManager interrupt"] -pub type SMI_11_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_11_MASK_A { +pub enum Smi11Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_11_MASK_A) -> Self { + fn from(variant: Smi11Mask) -> Self { variant as u8 != 0 } } -impl SMI_11_MASK_R { +#[doc = "Field `SMI_11_MASK` reader - SyncManager interrupt"] +pub type Smi11MaskR = crate::BitReader; +impl Smi11MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_11_MASK_A { + pub const fn variant(&self) -> Smi11Mask { match self.bits { - false => SMI_11_MASK_A::VALUE1, - true => SMI_11_MASK_A::VALUE2, + false => Smi11Mask::Value1, + true => Smi11Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_11_MASK_A::VALUE1 + *self == Smi11Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_11_MASK_A::VALUE2 + *self == Smi11Mask::Value2 } } #[doc = "Field `SMI_11_MASK` writer - SyncManager interrupt"] -pub type SMI_11_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_11_MASK_A>; -impl<'a, REG> SMI_11_MASK_W<'a, REG> +pub type Smi11MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi11Mask>; +impl<'a, REG> Smi11MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_11_MASK_A::VALUE1) + self.variant(Smi11Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_11_MASK_A::VALUE2) + self.variant(Smi11Mask::Value2) } } -#[doc = "Field `SMI_12_MASK` reader - SyncManager interrupt"] -pub type SMI_12_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_12_MASK_A { +pub enum Smi12Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_12_MASK_A) -> Self { + fn from(variant: Smi12Mask) -> Self { variant as u8 != 0 } } -impl SMI_12_MASK_R { +#[doc = "Field `SMI_12_MASK` reader - SyncManager interrupt"] +pub type Smi12MaskR = crate::BitReader; +impl Smi12MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_12_MASK_A { + pub const fn variant(&self) -> Smi12Mask { match self.bits { - false => SMI_12_MASK_A::VALUE1, - true => SMI_12_MASK_A::VALUE2, + false => Smi12Mask::Value1, + true => Smi12Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_12_MASK_A::VALUE1 + *self == Smi12Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_12_MASK_A::VALUE2 + *self == Smi12Mask::Value2 } } #[doc = "Field `SMI_12_MASK` writer - SyncManager interrupt"] -pub type SMI_12_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_12_MASK_A>; -impl<'a, REG> SMI_12_MASK_W<'a, REG> +pub type Smi12MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi12Mask>; +impl<'a, REG> Smi12MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_12_MASK_A::VALUE1) + self.variant(Smi12Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_12_MASK_A::VALUE2) + self.variant(Smi12Mask::Value2) } } -#[doc = "Field `SMI_13_MASK` reader - SyncManager interrupt"] -pub type SMI_13_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_13_MASK_A { +pub enum Smi13Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_13_MASK_A) -> Self { + fn from(variant: Smi13Mask) -> Self { variant as u8 != 0 } } -impl SMI_13_MASK_R { +#[doc = "Field `SMI_13_MASK` reader - SyncManager interrupt"] +pub type Smi13MaskR = crate::BitReader; +impl Smi13MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_13_MASK_A { + pub const fn variant(&self) -> Smi13Mask { match self.bits { - false => SMI_13_MASK_A::VALUE1, - true => SMI_13_MASK_A::VALUE2, + false => Smi13Mask::Value1, + true => Smi13Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_13_MASK_A::VALUE1 + *self == Smi13Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_13_MASK_A::VALUE2 + *self == Smi13Mask::Value2 } } #[doc = "Field `SMI_13_MASK` writer - SyncManager interrupt"] -pub type SMI_13_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_13_MASK_A>; -impl<'a, REG> SMI_13_MASK_W<'a, REG> +pub type Smi13MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi13Mask>; +impl<'a, REG> Smi13MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_13_MASK_A::VALUE1) + self.variant(Smi13Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_13_MASK_A::VALUE2) + self.variant(Smi13Mask::Value2) } } -#[doc = "Field `SMI_14_MASK` reader - SyncManager interrupt"] -pub type SMI_14_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_14_MASK_A { +pub enum Smi14Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_14_MASK_A) -> Self { + fn from(variant: Smi14Mask) -> Self { variant as u8 != 0 } } -impl SMI_14_MASK_R { +#[doc = "Field `SMI_14_MASK` reader - SyncManager interrupt"] +pub type Smi14MaskR = crate::BitReader; +impl Smi14MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_14_MASK_A { + pub const fn variant(&self) -> Smi14Mask { match self.bits { - false => SMI_14_MASK_A::VALUE1, - true => SMI_14_MASK_A::VALUE2, + false => Smi14Mask::Value1, + true => Smi14Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_14_MASK_A::VALUE1 + *self == Smi14Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_14_MASK_A::VALUE2 + *self == Smi14Mask::Value2 } } #[doc = "Field `SMI_14_MASK` writer - SyncManager interrupt"] -pub type SMI_14_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_14_MASK_A>; -impl<'a, REG> SMI_14_MASK_W<'a, REG> +pub type Smi14MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi14Mask>; +impl<'a, REG> Smi14MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_14_MASK_A::VALUE1) + self.variant(Smi14Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_14_MASK_A::VALUE2) + self.variant(Smi14Mask::Value2) } } -#[doc = "Field `SMI_15_MASK` reader - SyncManager interrupt"] -pub type SMI_15_MASK_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_15_MASK_A { +pub enum Smi15Mask { #[doc = "0: Corresponding AL Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding AL Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_15_MASK_A) -> Self { + fn from(variant: Smi15Mask) -> Self { variant as u8 != 0 } } -impl SMI_15_MASK_R { +#[doc = "Field `SMI_15_MASK` reader - SyncManager interrupt"] +pub type Smi15MaskR = crate::BitReader; +impl Smi15MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_15_MASK_A { + pub const fn variant(&self) -> Smi15Mask { match self.bits { - false => SMI_15_MASK_A::VALUE1, - true => SMI_15_MASK_A::VALUE2, + false => Smi15Mask::Value1, + true => Smi15Mask::Value2, } } #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_15_MASK_A::VALUE1 + *self == Smi15Mask::Value1 } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_15_MASK_A::VALUE2 + *self == Smi15Mask::Value2 } } #[doc = "Field `SMI_15_MASK` writer - SyncManager interrupt"] -pub type SMI_15_MASK_W<'a, REG> = crate::BitWriter<'a, REG, SMI_15_MASK_A>; -impl<'a, REG> SMI_15_MASK_W<'a, REG> +pub type Smi15MaskW<'a, REG> = crate::BitWriter<'a, REG, Smi15Mask>; +impl<'a, REG> Smi15MaskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Corresponding AL Event Request register bit is not mapped"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_15_MASK_A::VALUE1) + self.variant(Smi15Mask::Value1) } #[doc = "Corresponding AL Event Request register bit is mapped"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_15_MASK_A::VALUE2) + self.variant(Smi15Mask::Value2) } } impl R { #[doc = "Bit 0 - AL Control event"] #[inline(always)] - pub fn al_ce_mask(&self) -> AL_CE_MASK_R { - AL_CE_MASK_R::new((self.bits & 1) != 0) + pub fn al_ce_mask(&self) -> AlCeMaskR { + AlCeMaskR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DC Latch event"] #[inline(always)] - pub fn dc_le_mask(&self) -> DC_LE_MASK_R { - DC_LE_MASK_R::new(((self.bits >> 1) & 1) != 0) + pub fn dc_le_mask(&self) -> DcLeMaskR { + DcLeMaskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - State of DC SYNC0"] #[inline(always)] - pub fn st_s0_mask(&self) -> ST_S0_MASK_R { - ST_S0_MASK_R::new(((self.bits >> 2) & 1) != 0) + pub fn st_s0_mask(&self) -> StS0MaskR { + StS0MaskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - State of DC SYNC1"] #[inline(always)] - pub fn st_s1_mask(&self) -> ST_S1_MASK_R { - ST_S1_MASK_R::new(((self.bits >> 3) & 1) != 0) + pub fn st_s1_mask(&self) -> StS1MaskR { + StS1MaskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SyncManager activation register changed"] #[inline(always)] - pub fn sm_a_mask(&self) -> SM_A_MASK_R { - SM_A_MASK_R::new(((self.bits >> 4) & 1) != 0) + pub fn sm_a_mask(&self) -> SmAMaskR { + SmAMaskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - EEPROM Emulation"] #[inline(always)] - pub fn eep_e_mask(&self) -> EEP_E_MASK_R { - EEP_E_MASK_R::new(((self.bits >> 5) & 1) != 0) + pub fn eep_e_mask(&self) -> EepEMaskR { + EepEMaskR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Watchdog Process Data"] #[inline(always)] - pub fn wp_d_mask(&self) -> WP_D_MASK_R { - WP_D_MASK_R::new(((self.bits >> 6) & 1) != 0) + pub fn wp_d_mask(&self) -> WpDMaskR { + WpDMaskR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - SyncManager interrupt"] #[inline(always)] - pub fn smi_0_mask(&self) -> SMI_0_MASK_R { - SMI_0_MASK_R::new(((self.bits >> 8) & 1) != 0) + pub fn smi_0_mask(&self) -> Smi0MaskR { + Smi0MaskR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SyncManager interrupt"] #[inline(always)] - pub fn smi_1_mask(&self) -> SMI_1_MASK_R { - SMI_1_MASK_R::new(((self.bits >> 9) & 1) != 0) + pub fn smi_1_mask(&self) -> Smi1MaskR { + Smi1MaskR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SyncManager interrupt"] #[inline(always)] - pub fn smi_2_mask(&self) -> SMI_2_MASK_R { - SMI_2_MASK_R::new(((self.bits >> 10) & 1) != 0) + pub fn smi_2_mask(&self) -> Smi2MaskR { + Smi2MaskR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SyncManager interrupt"] #[inline(always)] - pub fn smi_3_mask(&self) -> SMI_3_MASK_R { - SMI_3_MASK_R::new(((self.bits >> 11) & 1) != 0) + pub fn smi_3_mask(&self) -> Smi3MaskR { + Smi3MaskR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - SyncManager interrupt"] #[inline(always)] - pub fn smi_4_mask(&self) -> SMI_4_MASK_R { - SMI_4_MASK_R::new(((self.bits >> 12) & 1) != 0) + pub fn smi_4_mask(&self) -> Smi4MaskR { + Smi4MaskR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - SyncManager interrupt"] #[inline(always)] - pub fn smi_5_mask(&self) -> SMI_5_MASK_R { - SMI_5_MASK_R::new(((self.bits >> 13) & 1) != 0) + pub fn smi_5_mask(&self) -> Smi5MaskR { + Smi5MaskR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - SyncManager interrupt"] #[inline(always)] - pub fn smi_6_mask(&self) -> SMI_6_MASK_R { - SMI_6_MASK_R::new(((self.bits >> 14) & 1) != 0) + pub fn smi_6_mask(&self) -> Smi6MaskR { + Smi6MaskR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SyncManager interrupt"] #[inline(always)] - pub fn smi_7_mask(&self) -> SMI_7_MASK_R { - SMI_7_MASK_R::new(((self.bits >> 15) & 1) != 0) + pub fn smi_7_mask(&self) -> Smi7MaskR { + Smi7MaskR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - SyncManager interrupt"] #[inline(always)] - pub fn smi_8_mask(&self) -> SMI_8_MASK_R { - SMI_8_MASK_R::new(((self.bits >> 16) & 1) != 0) + pub fn smi_8_mask(&self) -> Smi8MaskR { + Smi8MaskR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - SyncManager interrupt"] #[inline(always)] - pub fn smi_9_mask(&self) -> SMI_9_MASK_R { - SMI_9_MASK_R::new(((self.bits >> 17) & 1) != 0) + pub fn smi_9_mask(&self) -> Smi9MaskR { + Smi9MaskR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - SyncManager interrupt"] #[inline(always)] - pub fn smi_10_mask(&self) -> SMI_10_MASK_R { - SMI_10_MASK_R::new(((self.bits >> 18) & 1) != 0) + pub fn smi_10_mask(&self) -> Smi10MaskR { + Smi10MaskR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SyncManager interrupt"] #[inline(always)] - pub fn smi_11_mask(&self) -> SMI_11_MASK_R { - SMI_11_MASK_R::new(((self.bits >> 19) & 1) != 0) + pub fn smi_11_mask(&self) -> Smi11MaskR { + Smi11MaskR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SyncManager interrupt"] #[inline(always)] - pub fn smi_12_mask(&self) -> SMI_12_MASK_R { - SMI_12_MASK_R::new(((self.bits >> 20) & 1) != 0) + pub fn smi_12_mask(&self) -> Smi12MaskR { + Smi12MaskR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SyncManager interrupt"] #[inline(always)] - pub fn smi_13_mask(&self) -> SMI_13_MASK_R { - SMI_13_MASK_R::new(((self.bits >> 21) & 1) != 0) + pub fn smi_13_mask(&self) -> Smi13MaskR { + Smi13MaskR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - SyncManager interrupt"] #[inline(always)] - pub fn smi_14_mask(&self) -> SMI_14_MASK_R { - SMI_14_MASK_R::new(((self.bits >> 22) & 1) != 0) + pub fn smi_14_mask(&self) -> Smi14MaskR { + Smi14MaskR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SyncManager interrupt"] #[inline(always)] - pub fn smi_15_mask(&self) -> SMI_15_MASK_R { - SMI_15_MASK_R::new(((self.bits >> 23) & 1) != 0) + pub fn smi_15_mask(&self) -> Smi15MaskR { + Smi15MaskR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - AL Control event"] #[inline(always)] #[must_use] - pub fn al_ce_mask(&mut self) -> AL_CE_MASK_W { - AL_CE_MASK_W::new(self, 0) + pub fn al_ce_mask(&mut self) -> AlCeMaskW { + AlCeMaskW::new(self, 0) } #[doc = "Bit 1 - DC Latch event"] #[inline(always)] #[must_use] - pub fn dc_le_mask(&mut self) -> DC_LE_MASK_W { - DC_LE_MASK_W::new(self, 1) + pub fn dc_le_mask(&mut self) -> DcLeMaskW { + DcLeMaskW::new(self, 1) } #[doc = "Bit 2 - State of DC SYNC0"] #[inline(always)] #[must_use] - pub fn st_s0_mask(&mut self) -> ST_S0_MASK_W { - ST_S0_MASK_W::new(self, 2) + pub fn st_s0_mask(&mut self) -> StS0MaskW { + StS0MaskW::new(self, 2) } #[doc = "Bit 3 - State of DC SYNC1"] #[inline(always)] #[must_use] - pub fn st_s1_mask(&mut self) -> ST_S1_MASK_W { - ST_S1_MASK_W::new(self, 3) + pub fn st_s1_mask(&mut self) -> StS1MaskW { + StS1MaskW::new(self, 3) } #[doc = "Bit 4 - SyncManager activation register changed"] #[inline(always)] #[must_use] - pub fn sm_a_mask(&mut self) -> SM_A_MASK_W { - SM_A_MASK_W::new(self, 4) + pub fn sm_a_mask(&mut self) -> SmAMaskW { + SmAMaskW::new(self, 4) } #[doc = "Bit 5 - EEPROM Emulation"] #[inline(always)] #[must_use] - pub fn eep_e_mask(&mut self) -> EEP_E_MASK_W { - EEP_E_MASK_W::new(self, 5) + pub fn eep_e_mask(&mut self) -> EepEMaskW { + EepEMaskW::new(self, 5) } #[doc = "Bit 6 - Watchdog Process Data"] #[inline(always)] #[must_use] - pub fn wp_d_mask(&mut self) -> WP_D_MASK_W { - WP_D_MASK_W::new(self, 6) + pub fn wp_d_mask(&mut self) -> WpDMaskW { + WpDMaskW::new(self, 6) } #[doc = "Bit 8 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_0_mask(&mut self) -> SMI_0_MASK_W { - SMI_0_MASK_W::new(self, 8) + pub fn smi_0_mask(&mut self) -> Smi0MaskW { + Smi0MaskW::new(self, 8) } #[doc = "Bit 9 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_1_mask(&mut self) -> SMI_1_MASK_W { - SMI_1_MASK_W::new(self, 9) + pub fn smi_1_mask(&mut self) -> Smi1MaskW { + Smi1MaskW::new(self, 9) } #[doc = "Bit 10 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_2_mask(&mut self) -> SMI_2_MASK_W { - SMI_2_MASK_W::new(self, 10) + pub fn smi_2_mask(&mut self) -> Smi2MaskW { + Smi2MaskW::new(self, 10) } #[doc = "Bit 11 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_3_mask(&mut self) -> SMI_3_MASK_W { - SMI_3_MASK_W::new(self, 11) + pub fn smi_3_mask(&mut self) -> Smi3MaskW { + Smi3MaskW::new(self, 11) } #[doc = "Bit 12 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_4_mask(&mut self) -> SMI_4_MASK_W { - SMI_4_MASK_W::new(self, 12) + pub fn smi_4_mask(&mut self) -> Smi4MaskW { + Smi4MaskW::new(self, 12) } #[doc = "Bit 13 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_5_mask(&mut self) -> SMI_5_MASK_W { - SMI_5_MASK_W::new(self, 13) + pub fn smi_5_mask(&mut self) -> Smi5MaskW { + Smi5MaskW::new(self, 13) } #[doc = "Bit 14 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_6_mask(&mut self) -> SMI_6_MASK_W { - SMI_6_MASK_W::new(self, 14) + pub fn smi_6_mask(&mut self) -> Smi6MaskW { + Smi6MaskW::new(self, 14) } #[doc = "Bit 15 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_7_mask(&mut self) -> SMI_7_MASK_W { - SMI_7_MASK_W::new(self, 15) + pub fn smi_7_mask(&mut self) -> Smi7MaskW { + Smi7MaskW::new(self, 15) } #[doc = "Bit 16 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_8_mask(&mut self) -> SMI_8_MASK_W { - SMI_8_MASK_W::new(self, 16) + pub fn smi_8_mask(&mut self) -> Smi8MaskW { + Smi8MaskW::new(self, 16) } #[doc = "Bit 17 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_9_mask(&mut self) -> SMI_9_MASK_W { - SMI_9_MASK_W::new(self, 17) + pub fn smi_9_mask(&mut self) -> Smi9MaskW { + Smi9MaskW::new(self, 17) } #[doc = "Bit 18 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_10_mask(&mut self) -> SMI_10_MASK_W { - SMI_10_MASK_W::new(self, 18) + pub fn smi_10_mask(&mut self) -> Smi10MaskW { + Smi10MaskW::new(self, 18) } #[doc = "Bit 19 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_11_mask(&mut self) -> SMI_11_MASK_W { - SMI_11_MASK_W::new(self, 19) + pub fn smi_11_mask(&mut self) -> Smi11MaskW { + Smi11MaskW::new(self, 19) } #[doc = "Bit 20 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_12_mask(&mut self) -> SMI_12_MASK_W { - SMI_12_MASK_W::new(self, 20) + pub fn smi_12_mask(&mut self) -> Smi12MaskW { + Smi12MaskW::new(self, 20) } #[doc = "Bit 21 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_13_mask(&mut self) -> SMI_13_MASK_W { - SMI_13_MASK_W::new(self, 21) + pub fn smi_13_mask(&mut self) -> Smi13MaskW { + Smi13MaskW::new(self, 21) } #[doc = "Bit 22 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_14_mask(&mut self) -> SMI_14_MASK_W { - SMI_14_MASK_W::new(self, 22) + pub fn smi_14_mask(&mut self) -> Smi14MaskW { + Smi14MaskW::new(self, 22) } #[doc = "Bit 23 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_15_mask(&mut self) -> SMI_15_MASK_W { - SMI_15_MASK_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn smi_15_mask(&mut self) -> Smi15MaskW { + Smi15MaskW::new(self, 23) } } #[doc = "PDI AL Event Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_event_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_event_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AL_EVENT_MASK_SPEC; -impl crate::RegisterSpec for AL_EVENT_MASK_SPEC { +pub struct AlEventMaskSpec; +impl crate::RegisterSpec for AlEventMaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`al_event_mask::R`](R) reader structure"] -impl crate::Readable for AL_EVENT_MASK_SPEC {} +impl crate::Readable for AlEventMaskSpec {} #[doc = "`write(|w| ..)` method takes [`al_event_mask::W`](W) writer structure"] -impl crate::Writable for AL_EVENT_MASK_SPEC { +impl crate::Writable for AlEventMaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AL_EVENT_MASK to value 0x00ff_ff2f"] -impl crate::Resettable for AL_EVENT_MASK_SPEC { +impl crate::Resettable for AlEventMaskSpec { const RESET_VALUE: u32 = 0x00ff_ff2f; } diff --git a/src/ecat0/al_event_req.rs b/src/ecat0/al_event_req.rs index 8846444e..6668a858 100644 --- a/src/ecat0/al_event_req.rs +++ b/src/ecat0/al_event_req.rs @@ -1,1208 +1,1199 @@ #[doc = "Register `AL_EVENT_REQ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AL_EVENT_REQ` writer"] -pub type W = crate::W; -#[doc = "Field `AL_CE` reader - AL Control event"] -pub type AL_CE_R = crate::BitReader; +pub type W = crate::W; #[doc = "AL Control event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AL_CE_A { +pub enum AlCe { #[doc = "0: No AL Control Register change"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: AL Control Register has been written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AL_CE_A) -> Self { + fn from(variant: AlCe) -> Self { variant as u8 != 0 } } -impl AL_CE_R { +#[doc = "Field `AL_CE` reader - AL Control event"] +pub type AlCeR = crate::BitReader; +impl AlCeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AL_CE_A { + pub const fn variant(&self) -> AlCe { match self.bits { - false => AL_CE_A::VALUE1, - true => AL_CE_A::VALUE2, + false => AlCe::Value1, + true => AlCe::Value2, } } #[doc = "No AL Control Register change"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AL_CE_A::VALUE1 + *self == AlCe::Value1 } #[doc = "AL Control Register has been written"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AL_CE_A::VALUE2 + *self == AlCe::Value2 } } -#[doc = "Field `DC_LE` reader - DC Latch event"] -pub type DC_LE_R = crate::BitReader; #[doc = "DC Latch event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DC_LE_A { +pub enum DcLe { #[doc = "0: No change on DC Latch Inputs"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: At least one change on DC Latch Inputs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DC_LE_A) -> Self { + fn from(variant: DcLe) -> Self { variant as u8 != 0 } } -impl DC_LE_R { +#[doc = "Field `DC_LE` reader - DC Latch event"] +pub type DcLeR = crate::BitReader; +impl DcLeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DC_LE_A { + pub const fn variant(&self) -> DcLe { match self.bits { - false => DC_LE_A::VALUE1, - true => DC_LE_A::VALUE2, + false => DcLe::Value1, + true => DcLe::Value2, } } #[doc = "No change on DC Latch Inputs"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DC_LE_A::VALUE1 + *self == DcLe::Value1 } #[doc = "At least one change on DC Latch Inputs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DC_LE_A::VALUE2 + *self == DcLe::Value2 } } #[doc = "Field `ST_S0` reader - State of DC SYNC0"] -pub type ST_S0_R = crate::BitReader; +pub type StS0R = crate::BitReader; #[doc = "Field `ST_S1` reader - State of DC SYNC1"] -pub type ST_S1_R = crate::BitReader; -#[doc = "Field `SM_A` reader - SyncManager activation register changed"] -pub type SM_A_R = crate::BitReader; +pub type StS1R = crate::BitReader; #[doc = "SyncManager activation register changed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SM_A_A { +pub enum SmA { #[doc = "0: No change in any SyncManager"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: At least one change on DC Latch Inputs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SM_A_A) -> Self { + fn from(variant: SmA) -> Self { variant as u8 != 0 } } -impl SM_A_R { +#[doc = "Field `SM_A` reader - SyncManager activation register changed"] +pub type SmAR = crate::BitReader; +impl SmAR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SM_A_A { + pub const fn variant(&self) -> SmA { match self.bits { - false => SM_A_A::VALUE1, - true => SM_A_A::VALUE2, + false => SmA::Value1, + true => SmA::Value2, } } #[doc = "No change in any SyncManager"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SM_A_A::VALUE1 + *self == SmA::Value1 } #[doc = "At least one change on DC Latch Inputs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SM_A_A::VALUE2 + *self == SmA::Value2 } } -#[doc = "Field `EEP_E` reader - EEPROM Emulation"] -pub type EEP_E_R = crate::BitReader; #[doc = "EEPROM Emulation\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EEP_E_A { +pub enum EepE { #[doc = "0: No command pending"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EEPROM command pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EEP_E_A) -> Self { + fn from(variant: EepE) -> Self { variant as u8 != 0 } } -impl EEP_E_R { +#[doc = "Field `EEP_E` reader - EEPROM Emulation"] +pub type EepER = crate::BitReader; +impl EepER { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EEP_E_A { + pub const fn variant(&self) -> EepE { match self.bits { - false => EEP_E_A::VALUE1, - true => EEP_E_A::VALUE2, + false => EepE::Value1, + true => EepE::Value2, } } #[doc = "No command pending"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EEP_E_A::VALUE1 + *self == EepE::Value1 } #[doc = "EEPROM command pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EEP_E_A::VALUE2 + *self == EepE::Value2 } } -#[doc = "Field `WP_D` reader - Watchdog Process Data"] -pub type WP_D_R = crate::BitReader; #[doc = "Watchdog Process Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WP_D_A { +pub enum WpD { #[doc = "0: Has not expired"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Has expired"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WP_D_A) -> Self { + fn from(variant: WpD) -> Self { variant as u8 != 0 } } -impl WP_D_R { +#[doc = "Field `WP_D` reader - Watchdog Process Data"] +pub type WpDR = crate::BitReader; +impl WpDR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WP_D_A { + pub const fn variant(&self) -> WpD { match self.bits { - false => WP_D_A::VALUE1, - true => WP_D_A::VALUE2, + false => WpD::Value1, + true => WpD::Value2, } } #[doc = "Has not expired"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WP_D_A::VALUE1 + *self == WpD::Value1 } #[doc = "Has expired"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WP_D_A::VALUE2 + *self == WpD::Value2 } } -#[doc = "Field `SMI_0` reader - SyncManager interrupt"] -pub type SMI_0_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_0_A { +pub enum Smi0 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_0_A) -> Self { + fn from(variant: Smi0) -> Self { variant as u8 != 0 } } -impl SMI_0_R { +#[doc = "Field `SMI_0` reader - SyncManager interrupt"] +pub type Smi0R = crate::BitReader; +impl Smi0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_0_A { + pub const fn variant(&self) -> Smi0 { match self.bits { - false => SMI_0_A::VALUE1, - true => SMI_0_A::VALUE2, + false => Smi0::Value1, + true => Smi0::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_0_A::VALUE1 + *self == Smi0::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_0_A::VALUE2 + *self == Smi0::Value2 } } -#[doc = "Field `SMI_1` reader - SyncManager interrupt"] -pub type SMI_1_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_1_A { +pub enum Smi1 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_1_A) -> Self { + fn from(variant: Smi1) -> Self { variant as u8 != 0 } } -impl SMI_1_R { +#[doc = "Field `SMI_1` reader - SyncManager interrupt"] +pub type Smi1R = crate::BitReader; +impl Smi1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_1_A { + pub const fn variant(&self) -> Smi1 { match self.bits { - false => SMI_1_A::VALUE1, - true => SMI_1_A::VALUE2, + false => Smi1::Value1, + true => Smi1::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_1_A::VALUE1 + *self == Smi1::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_1_A::VALUE2 + *self == Smi1::Value2 } } -#[doc = "Field `SMI_2` reader - SyncManager interrupt"] -pub type SMI_2_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_2_A { +pub enum Smi2 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_2_A) -> Self { + fn from(variant: Smi2) -> Self { variant as u8 != 0 } } -impl SMI_2_R { +#[doc = "Field `SMI_2` reader - SyncManager interrupt"] +pub type Smi2R = crate::BitReader; +impl Smi2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_2_A { + pub const fn variant(&self) -> Smi2 { match self.bits { - false => SMI_2_A::VALUE1, - true => SMI_2_A::VALUE2, + false => Smi2::Value1, + true => Smi2::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_2_A::VALUE1 + *self == Smi2::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_2_A::VALUE2 + *self == Smi2::Value2 } } #[doc = "Field `SMI_2` writer - SyncManager interrupt"] -pub type SMI_2_W<'a, REG> = crate::BitWriter<'a, REG, SMI_2_A>; -impl<'a, REG> SMI_2_W<'a, REG> +pub type Smi2W<'a, REG> = crate::BitWriter<'a, REG, Smi2>; +impl<'a, REG> Smi2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_2_A::VALUE1) + self.variant(Smi2::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_2_A::VALUE2) + self.variant(Smi2::Value2) } } -#[doc = "Field `SMI_3` reader - SyncManager interrupt"] -pub type SMI_3_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_3_A { +pub enum Smi3 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_3_A) -> Self { + fn from(variant: Smi3) -> Self { variant as u8 != 0 } } -impl SMI_3_R { +#[doc = "Field `SMI_3` reader - SyncManager interrupt"] +pub type Smi3R = crate::BitReader; +impl Smi3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_3_A { + pub const fn variant(&self) -> Smi3 { match self.bits { - false => SMI_3_A::VALUE1, - true => SMI_3_A::VALUE2, + false => Smi3::Value1, + true => Smi3::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_3_A::VALUE1 + *self == Smi3::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_3_A::VALUE2 + *self == Smi3::Value2 } } #[doc = "Field `SMI_3` writer - SyncManager interrupt"] -pub type SMI_3_W<'a, REG> = crate::BitWriter<'a, REG, SMI_3_A>; -impl<'a, REG> SMI_3_W<'a, REG> +pub type Smi3W<'a, REG> = crate::BitWriter<'a, REG, Smi3>; +impl<'a, REG> Smi3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_3_A::VALUE1) + self.variant(Smi3::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_3_A::VALUE2) + self.variant(Smi3::Value2) } } -#[doc = "Field `SMI_4` reader - SyncManager interrupt"] -pub type SMI_4_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_4_A { +pub enum Smi4 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_4_A) -> Self { + fn from(variant: Smi4) -> Self { variant as u8 != 0 } } -impl SMI_4_R { +#[doc = "Field `SMI_4` reader - SyncManager interrupt"] +pub type Smi4R = crate::BitReader; +impl Smi4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_4_A { + pub const fn variant(&self) -> Smi4 { match self.bits { - false => SMI_4_A::VALUE1, - true => SMI_4_A::VALUE2, + false => Smi4::Value1, + true => Smi4::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_4_A::VALUE1 + *self == Smi4::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_4_A::VALUE2 + *self == Smi4::Value2 } } #[doc = "Field `SMI_4` writer - SyncManager interrupt"] -pub type SMI_4_W<'a, REG> = crate::BitWriter<'a, REG, SMI_4_A>; -impl<'a, REG> SMI_4_W<'a, REG> +pub type Smi4W<'a, REG> = crate::BitWriter<'a, REG, Smi4>; +impl<'a, REG> Smi4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_4_A::VALUE1) + self.variant(Smi4::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_4_A::VALUE2) + self.variant(Smi4::Value2) } } -#[doc = "Field `SMI_5` reader - SyncManager interrupt"] -pub type SMI_5_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_5_A { +pub enum Smi5 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_5_A) -> Self { + fn from(variant: Smi5) -> Self { variant as u8 != 0 } } -impl SMI_5_R { +#[doc = "Field `SMI_5` reader - SyncManager interrupt"] +pub type Smi5R = crate::BitReader; +impl Smi5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_5_A { + pub const fn variant(&self) -> Smi5 { match self.bits { - false => SMI_5_A::VALUE1, - true => SMI_5_A::VALUE2, + false => Smi5::Value1, + true => Smi5::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_5_A::VALUE1 + *self == Smi5::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_5_A::VALUE2 + *self == Smi5::Value2 } } #[doc = "Field `SMI_5` writer - SyncManager interrupt"] -pub type SMI_5_W<'a, REG> = crate::BitWriter<'a, REG, SMI_5_A>; -impl<'a, REG> SMI_5_W<'a, REG> +pub type Smi5W<'a, REG> = crate::BitWriter<'a, REG, Smi5>; +impl<'a, REG> Smi5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_5_A::VALUE1) + self.variant(Smi5::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_5_A::VALUE2) + self.variant(Smi5::Value2) } } -#[doc = "Field `SMI_6` reader - SyncManager interrupt"] -pub type SMI_6_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_6_A { +pub enum Smi6 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_6_A) -> Self { + fn from(variant: Smi6) -> Self { variant as u8 != 0 } } -impl SMI_6_R { +#[doc = "Field `SMI_6` reader - SyncManager interrupt"] +pub type Smi6R = crate::BitReader; +impl Smi6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_6_A { + pub const fn variant(&self) -> Smi6 { match self.bits { - false => SMI_6_A::VALUE1, - true => SMI_6_A::VALUE2, + false => Smi6::Value1, + true => Smi6::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_6_A::VALUE1 + *self == Smi6::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_6_A::VALUE2 + *self == Smi6::Value2 } } #[doc = "Field `SMI_6` writer - SyncManager interrupt"] -pub type SMI_6_W<'a, REG> = crate::BitWriter<'a, REG, SMI_6_A>; -impl<'a, REG> SMI_6_W<'a, REG> +pub type Smi6W<'a, REG> = crate::BitWriter<'a, REG, Smi6>; +impl<'a, REG> Smi6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_6_A::VALUE1) + self.variant(Smi6::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_6_A::VALUE2) + self.variant(Smi6::Value2) } } -#[doc = "Field `SMI_7` reader - SyncManager interrupt"] -pub type SMI_7_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_7_A { +pub enum Smi7 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_7_A) -> Self { + fn from(variant: Smi7) -> Self { variant as u8 != 0 } } -impl SMI_7_R { +#[doc = "Field `SMI_7` reader - SyncManager interrupt"] +pub type Smi7R = crate::BitReader; +impl Smi7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_7_A { + pub const fn variant(&self) -> Smi7 { match self.bits { - false => SMI_7_A::VALUE1, - true => SMI_7_A::VALUE2, + false => Smi7::Value1, + true => Smi7::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_7_A::VALUE1 + *self == Smi7::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_7_A::VALUE2 + *self == Smi7::Value2 } } #[doc = "Field `SMI_7` writer - SyncManager interrupt"] -pub type SMI_7_W<'a, REG> = crate::BitWriter<'a, REG, SMI_7_A>; -impl<'a, REG> SMI_7_W<'a, REG> +pub type Smi7W<'a, REG> = crate::BitWriter<'a, REG, Smi7>; +impl<'a, REG> Smi7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_7_A::VALUE1) + self.variant(Smi7::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_7_A::VALUE2) + self.variant(Smi7::Value2) } } -#[doc = "Field `SMI_8` reader - SyncManager interrupt"] -pub type SMI_8_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_8_A { +pub enum Smi8 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_8_A) -> Self { + fn from(variant: Smi8) -> Self { variant as u8 != 0 } } -impl SMI_8_R { +#[doc = "Field `SMI_8` reader - SyncManager interrupt"] +pub type Smi8R = crate::BitReader; +impl Smi8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_8_A { + pub const fn variant(&self) -> Smi8 { match self.bits { - false => SMI_8_A::VALUE1, - true => SMI_8_A::VALUE2, + false => Smi8::Value1, + true => Smi8::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_8_A::VALUE1 + *self == Smi8::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_8_A::VALUE2 + *self == Smi8::Value2 } } #[doc = "Field `SMI_8` writer - SyncManager interrupt"] -pub type SMI_8_W<'a, REG> = crate::BitWriter<'a, REG, SMI_8_A>; -impl<'a, REG> SMI_8_W<'a, REG> +pub type Smi8W<'a, REG> = crate::BitWriter<'a, REG, Smi8>; +impl<'a, REG> Smi8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_8_A::VALUE1) + self.variant(Smi8::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_8_A::VALUE2) + self.variant(Smi8::Value2) } } -#[doc = "Field `SMI_9` reader - SyncManager interrupt"] -pub type SMI_9_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_9_A { +pub enum Smi9 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_9_A) -> Self { + fn from(variant: Smi9) -> Self { variant as u8 != 0 } } -impl SMI_9_R { +#[doc = "Field `SMI_9` reader - SyncManager interrupt"] +pub type Smi9R = crate::BitReader; +impl Smi9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_9_A { + pub const fn variant(&self) -> Smi9 { match self.bits { - false => SMI_9_A::VALUE1, - true => SMI_9_A::VALUE2, + false => Smi9::Value1, + true => Smi9::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_9_A::VALUE1 + *self == Smi9::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_9_A::VALUE2 + *self == Smi9::Value2 } } #[doc = "Field `SMI_9` writer - SyncManager interrupt"] -pub type SMI_9_W<'a, REG> = crate::BitWriter<'a, REG, SMI_9_A>; -impl<'a, REG> SMI_9_W<'a, REG> +pub type Smi9W<'a, REG> = crate::BitWriter<'a, REG, Smi9>; +impl<'a, REG> Smi9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_9_A::VALUE1) + self.variant(Smi9::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_9_A::VALUE2) + self.variant(Smi9::Value2) } } -#[doc = "Field `SMI_10` reader - SyncManager interrupt"] -pub type SMI_10_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_10_A { +pub enum Smi10 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_10_A) -> Self { + fn from(variant: Smi10) -> Self { variant as u8 != 0 } } -impl SMI_10_R { +#[doc = "Field `SMI_10` reader - SyncManager interrupt"] +pub type Smi10R = crate::BitReader; +impl Smi10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_10_A { + pub const fn variant(&self) -> Smi10 { match self.bits { - false => SMI_10_A::VALUE1, - true => SMI_10_A::VALUE2, + false => Smi10::Value1, + true => Smi10::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_10_A::VALUE1 + *self == Smi10::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_10_A::VALUE2 + *self == Smi10::Value2 } } #[doc = "Field `SMI_10` writer - SyncManager interrupt"] -pub type SMI_10_W<'a, REG> = crate::BitWriter<'a, REG, SMI_10_A>; -impl<'a, REG> SMI_10_W<'a, REG> +pub type Smi10W<'a, REG> = crate::BitWriter<'a, REG, Smi10>; +impl<'a, REG> Smi10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_10_A::VALUE1) + self.variant(Smi10::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_10_A::VALUE2) + self.variant(Smi10::Value2) } } -#[doc = "Field `SMI_11` reader - SyncManager interrupt"] -pub type SMI_11_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_11_A { +pub enum Smi11 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_11_A) -> Self { + fn from(variant: Smi11) -> Self { variant as u8 != 0 } } -impl SMI_11_R { +#[doc = "Field `SMI_11` reader - SyncManager interrupt"] +pub type Smi11R = crate::BitReader; +impl Smi11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_11_A { + pub const fn variant(&self) -> Smi11 { match self.bits { - false => SMI_11_A::VALUE1, - true => SMI_11_A::VALUE2, + false => Smi11::Value1, + true => Smi11::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_11_A::VALUE1 + *self == Smi11::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_11_A::VALUE2 + *self == Smi11::Value2 } } #[doc = "Field `SMI_11` writer - SyncManager interrupt"] -pub type SMI_11_W<'a, REG> = crate::BitWriter<'a, REG, SMI_11_A>; -impl<'a, REG> SMI_11_W<'a, REG> +pub type Smi11W<'a, REG> = crate::BitWriter<'a, REG, Smi11>; +impl<'a, REG> Smi11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_11_A::VALUE1) + self.variant(Smi11::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_11_A::VALUE2) + self.variant(Smi11::Value2) } } -#[doc = "Field `SMI_12` reader - SyncManager interrupt"] -pub type SMI_12_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_12_A { +pub enum Smi12 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_12_A) -> Self { + fn from(variant: Smi12) -> Self { variant as u8 != 0 } } -impl SMI_12_R { +#[doc = "Field `SMI_12` reader - SyncManager interrupt"] +pub type Smi12R = crate::BitReader; +impl Smi12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_12_A { + pub const fn variant(&self) -> Smi12 { match self.bits { - false => SMI_12_A::VALUE1, - true => SMI_12_A::VALUE2, + false => Smi12::Value1, + true => Smi12::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_12_A::VALUE1 + *self == Smi12::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_12_A::VALUE2 + *self == Smi12::Value2 } } #[doc = "Field `SMI_12` writer - SyncManager interrupt"] -pub type SMI_12_W<'a, REG> = crate::BitWriter<'a, REG, SMI_12_A>; -impl<'a, REG> SMI_12_W<'a, REG> +pub type Smi12W<'a, REG> = crate::BitWriter<'a, REG, Smi12>; +impl<'a, REG> Smi12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_12_A::VALUE1) + self.variant(Smi12::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_12_A::VALUE2) + self.variant(Smi12::Value2) } } -#[doc = "Field `SMI_13` reader - SyncManager interrupt"] -pub type SMI_13_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_13_A { +pub enum Smi13 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_13_A) -> Self { + fn from(variant: Smi13) -> Self { variant as u8 != 0 } } -impl SMI_13_R { +#[doc = "Field `SMI_13` reader - SyncManager interrupt"] +pub type Smi13R = crate::BitReader; +impl Smi13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_13_A { + pub const fn variant(&self) -> Smi13 { match self.bits { - false => SMI_13_A::VALUE1, - true => SMI_13_A::VALUE2, + false => Smi13::Value1, + true => Smi13::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_13_A::VALUE1 + *self == Smi13::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_13_A::VALUE2 + *self == Smi13::Value2 } } #[doc = "Field `SMI_13` writer - SyncManager interrupt"] -pub type SMI_13_W<'a, REG> = crate::BitWriter<'a, REG, SMI_13_A>; -impl<'a, REG> SMI_13_W<'a, REG> +pub type Smi13W<'a, REG> = crate::BitWriter<'a, REG, Smi13>; +impl<'a, REG> Smi13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_13_A::VALUE1) + self.variant(Smi13::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_13_A::VALUE2) + self.variant(Smi13::Value2) } } -#[doc = "Field `SMI_14` reader - SyncManager interrupt"] -pub type SMI_14_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_14_A { +pub enum Smi14 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_14_A) -> Self { + fn from(variant: Smi14) -> Self { variant as u8 != 0 } } -impl SMI_14_R { +#[doc = "Field `SMI_14` reader - SyncManager interrupt"] +pub type Smi14R = crate::BitReader; +impl Smi14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_14_A { + pub const fn variant(&self) -> Smi14 { match self.bits { - false => SMI_14_A::VALUE1, - true => SMI_14_A::VALUE2, + false => Smi14::Value1, + true => Smi14::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_14_A::VALUE1 + *self == Smi14::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_14_A::VALUE2 + *self == Smi14::Value2 } } #[doc = "Field `SMI_14` writer - SyncManager interrupt"] -pub type SMI_14_W<'a, REG> = crate::BitWriter<'a, REG, SMI_14_A>; -impl<'a, REG> SMI_14_W<'a, REG> +pub type Smi14W<'a, REG> = crate::BitWriter<'a, REG, Smi14>; +impl<'a, REG> Smi14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMI_14_A::VALUE1) + self.variant(Smi14::Value1) } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMI_14_A::VALUE2) + self.variant(Smi14::Value2) } } -#[doc = "Field `SMI_15` reader - SyncManager interrupt"] -pub type SMI_15_R = crate::BitReader; #[doc = "SyncManager interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMI_15_A { +pub enum Smi15 { #[doc = "0: No SyncManager 0 interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SyncManager 0 interrupt pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMI_15_A) -> Self { + fn from(variant: Smi15) -> Self { variant as u8 != 0 } } -impl SMI_15_R { +#[doc = "Field `SMI_15` reader - SyncManager interrupt"] +pub type Smi15R = crate::BitReader; +impl Smi15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMI_15_A { + pub const fn variant(&self) -> Smi15 { match self.bits { - false => SMI_15_A::VALUE1, - true => SMI_15_A::VALUE2, + false => Smi15::Value1, + true => Smi15::Value2, } } #[doc = "No SyncManager 0 interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMI_15_A::VALUE1 + *self == Smi15::Value1 } #[doc = "SyncManager 0 interrupt pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMI_15_A::VALUE2 + *self == Smi15::Value2 } } impl R { #[doc = "Bit 0 - AL Control event"] #[inline(always)] - pub fn al_ce(&self) -> AL_CE_R { - AL_CE_R::new((self.bits & 1) != 0) + pub fn al_ce(&self) -> AlCeR { + AlCeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DC Latch event"] #[inline(always)] - pub fn dc_le(&self) -> DC_LE_R { - DC_LE_R::new(((self.bits >> 1) & 1) != 0) + pub fn dc_le(&self) -> DcLeR { + DcLeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - State of DC SYNC0"] #[inline(always)] - pub fn st_s0(&self) -> ST_S0_R { - ST_S0_R::new(((self.bits >> 2) & 1) != 0) + pub fn st_s0(&self) -> StS0R { + StS0R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - State of DC SYNC1"] #[inline(always)] - pub fn st_s1(&self) -> ST_S1_R { - ST_S1_R::new(((self.bits >> 3) & 1) != 0) + pub fn st_s1(&self) -> StS1R { + StS1R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - SyncManager activation register changed"] #[inline(always)] - pub fn sm_a(&self) -> SM_A_R { - SM_A_R::new(((self.bits >> 4) & 1) != 0) + pub fn sm_a(&self) -> SmAR { + SmAR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - EEPROM Emulation"] #[inline(always)] - pub fn eep_e(&self) -> EEP_E_R { - EEP_E_R::new(((self.bits >> 5) & 1) != 0) + pub fn eep_e(&self) -> EepER { + EepER::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Watchdog Process Data"] #[inline(always)] - pub fn wp_d(&self) -> WP_D_R { - WP_D_R::new(((self.bits >> 6) & 1) != 0) + pub fn wp_d(&self) -> WpDR { + WpDR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - SyncManager interrupt"] #[inline(always)] - pub fn smi_0(&self) -> SMI_0_R { - SMI_0_R::new(((self.bits >> 8) & 1) != 0) + pub fn smi_0(&self) -> Smi0R { + Smi0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - SyncManager interrupt"] #[inline(always)] - pub fn smi_1(&self) -> SMI_1_R { - SMI_1_R::new(((self.bits >> 9) & 1) != 0) + pub fn smi_1(&self) -> Smi1R { + Smi1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - SyncManager interrupt"] #[inline(always)] - pub fn smi_2(&self) -> SMI_2_R { - SMI_2_R::new(((self.bits >> 10) & 1) != 0) + pub fn smi_2(&self) -> Smi2R { + Smi2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SyncManager interrupt"] #[inline(always)] - pub fn smi_3(&self) -> SMI_3_R { - SMI_3_R::new(((self.bits >> 11) & 1) != 0) + pub fn smi_3(&self) -> Smi3R { + Smi3R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - SyncManager interrupt"] #[inline(always)] - pub fn smi_4(&self) -> SMI_4_R { - SMI_4_R::new(((self.bits >> 12) & 1) != 0) + pub fn smi_4(&self) -> Smi4R { + Smi4R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - SyncManager interrupt"] #[inline(always)] - pub fn smi_5(&self) -> SMI_5_R { - SMI_5_R::new(((self.bits >> 13) & 1) != 0) + pub fn smi_5(&self) -> Smi5R { + Smi5R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - SyncManager interrupt"] #[inline(always)] - pub fn smi_6(&self) -> SMI_6_R { - SMI_6_R::new(((self.bits >> 14) & 1) != 0) + pub fn smi_6(&self) -> Smi6R { + Smi6R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SyncManager interrupt"] #[inline(always)] - pub fn smi_7(&self) -> SMI_7_R { - SMI_7_R::new(((self.bits >> 15) & 1) != 0) + pub fn smi_7(&self) -> Smi7R { + Smi7R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - SyncManager interrupt"] #[inline(always)] - pub fn smi_8(&self) -> SMI_8_R { - SMI_8_R::new(((self.bits >> 16) & 1) != 0) + pub fn smi_8(&self) -> Smi8R { + Smi8R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - SyncManager interrupt"] #[inline(always)] - pub fn smi_9(&self) -> SMI_9_R { - SMI_9_R::new(((self.bits >> 17) & 1) != 0) + pub fn smi_9(&self) -> Smi9R { + Smi9R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - SyncManager interrupt"] #[inline(always)] - pub fn smi_10(&self) -> SMI_10_R { - SMI_10_R::new(((self.bits >> 18) & 1) != 0) + pub fn smi_10(&self) -> Smi10R { + Smi10R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - SyncManager interrupt"] #[inline(always)] - pub fn smi_11(&self) -> SMI_11_R { - SMI_11_R::new(((self.bits >> 19) & 1) != 0) + pub fn smi_11(&self) -> Smi11R { + Smi11R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - SyncManager interrupt"] #[inline(always)] - pub fn smi_12(&self) -> SMI_12_R { - SMI_12_R::new(((self.bits >> 20) & 1) != 0) + pub fn smi_12(&self) -> Smi12R { + Smi12R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - SyncManager interrupt"] #[inline(always)] - pub fn smi_13(&self) -> SMI_13_R { - SMI_13_R::new(((self.bits >> 21) & 1) != 0) + pub fn smi_13(&self) -> Smi13R { + Smi13R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - SyncManager interrupt"] #[inline(always)] - pub fn smi_14(&self) -> SMI_14_R { - SMI_14_R::new(((self.bits >> 22) & 1) != 0) + pub fn smi_14(&self) -> Smi14R { + Smi14R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - SyncManager interrupt"] #[inline(always)] - pub fn smi_15(&self) -> SMI_15_R { - SMI_15_R::new(((self.bits >> 23) & 1) != 0) + pub fn smi_15(&self) -> Smi15R { + Smi15R::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 10 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_2(&mut self) -> SMI_2_W { - SMI_2_W::new(self, 10) + pub fn smi_2(&mut self) -> Smi2W { + Smi2W::new(self, 10) } #[doc = "Bit 11 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_3(&mut self) -> SMI_3_W { - SMI_3_W::new(self, 11) + pub fn smi_3(&mut self) -> Smi3W { + Smi3W::new(self, 11) } #[doc = "Bit 12 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_4(&mut self) -> SMI_4_W { - SMI_4_W::new(self, 12) + pub fn smi_4(&mut self) -> Smi4W { + Smi4W::new(self, 12) } #[doc = "Bit 13 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_5(&mut self) -> SMI_5_W { - SMI_5_W::new(self, 13) + pub fn smi_5(&mut self) -> Smi5W { + Smi5W::new(self, 13) } #[doc = "Bit 14 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_6(&mut self) -> SMI_6_W { - SMI_6_W::new(self, 14) + pub fn smi_6(&mut self) -> Smi6W { + Smi6W::new(self, 14) } #[doc = "Bit 15 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_7(&mut self) -> SMI_7_W { - SMI_7_W::new(self, 15) + pub fn smi_7(&mut self) -> Smi7W { + Smi7W::new(self, 15) } #[doc = "Bit 16 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_8(&mut self) -> SMI_8_W { - SMI_8_W::new(self, 16) + pub fn smi_8(&mut self) -> Smi8W { + Smi8W::new(self, 16) } #[doc = "Bit 17 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_9(&mut self) -> SMI_9_W { - SMI_9_W::new(self, 17) + pub fn smi_9(&mut self) -> Smi9W { + Smi9W::new(self, 17) } #[doc = "Bit 18 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_10(&mut self) -> SMI_10_W { - SMI_10_W::new(self, 18) + pub fn smi_10(&mut self) -> Smi10W { + Smi10W::new(self, 18) } #[doc = "Bit 19 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_11(&mut self) -> SMI_11_W { - SMI_11_W::new(self, 19) + pub fn smi_11(&mut self) -> Smi11W { + Smi11W::new(self, 19) } #[doc = "Bit 20 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_12(&mut self) -> SMI_12_W { - SMI_12_W::new(self, 20) + pub fn smi_12(&mut self) -> Smi12W { + Smi12W::new(self, 20) } #[doc = "Bit 21 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_13(&mut self) -> SMI_13_W { - SMI_13_W::new(self, 21) + pub fn smi_13(&mut self) -> Smi13W { + Smi13W::new(self, 21) } #[doc = "Bit 22 - SyncManager interrupt"] #[inline(always)] #[must_use] - pub fn smi_14(&mut self) -> SMI_14_W { - SMI_14_W::new(self, 22) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn smi_14(&mut self) -> Smi14W { + Smi14W::new(self, 22) } } #[doc = "AL Event Request\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_event_req::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_event_req::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AL_EVENT_REQ_SPEC; -impl crate::RegisterSpec for AL_EVENT_REQ_SPEC { +pub struct AlEventReqSpec; +impl crate::RegisterSpec for AlEventReqSpec { type Ux = u32; } #[doc = "`read()` method returns [`al_event_req::R`](R) reader structure"] -impl crate::Readable for AL_EVENT_REQ_SPEC {} +impl crate::Readable for AlEventReqSpec {} #[doc = "`write(|w| ..)` method takes [`al_event_req::W`](W) writer structure"] -impl crate::Writable for AL_EVENT_REQ_SPEC { +impl crate::Writable for AlEventReqSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AL_EVENT_REQ to value 0x20"] -impl crate::Resettable for AL_EVENT_REQ_SPEC { +impl crate::Resettable for AlEventReqSpec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/ecat0/al_status.rs b/src/ecat0/al_status.rs index 5fb1a18d..107996ac 100644 --- a/src/ecat0/al_status.rs +++ b/src/ecat0/al_status.rs @@ -1,75 +1,75 @@ #[doc = "Register `AL_STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AL_STATUS` writer"] -pub type W = crate::W; -#[doc = "Field `STATE` reader - Actual State of the Device State Machine"] -pub type STATE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Actual State of the Device State Machine\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STATE_A { +pub enum State { #[doc = "1: Init State"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: Pre-Operational State"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: Bootstrap State"] - VALUE3 = 3, + Value3 = 3, #[doc = "4: Safe-Operational State"] - VALUE4 = 4, + Value4 = 4, #[doc = "8: Operational State"] - VALUE5 = 8, + Value5 = 8, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STATE_A) -> Self { + fn from(variant: State) -> Self { variant as _ } } -impl crate::FieldSpec for STATE_A { +impl crate::FieldSpec for State { type Ux = u8; } -impl STATE_R { +#[doc = "Field `STATE` reader - Actual State of the Device State Machine"] +pub type StateR = crate::FieldReader; +impl StateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(STATE_A::VALUE1), - 2 => Some(STATE_A::VALUE2), - 3 => Some(STATE_A::VALUE3), - 4 => Some(STATE_A::VALUE4), - 8 => Some(STATE_A::VALUE5), + 1 => Some(State::Value1), + 2 => Some(State::Value2), + 3 => Some(State::Value3), + 4 => Some(State::Value4), + 8 => Some(State::Value5), _ => None, } } #[doc = "Init State"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STATE_A::VALUE1 + *self == State::Value1 } #[doc = "Pre-Operational State"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STATE_A::VALUE2 + *self == State::Value2 } #[doc = "Bootstrap State"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STATE_A::VALUE3 + *self == State::Value3 } #[doc = "Safe-Operational State"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STATE_A::VALUE4 + *self == State::Value4 } #[doc = "Operational State"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == STATE_A::VALUE5 + *self == State::Value5 } } #[doc = "Field `STATE` writer - Actual State of the Device State Machine"] -pub type STATE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, STATE_A>; -impl<'a, REG> STATE_W<'a, REG> +pub type StateW<'a, REG> = crate::FieldWriter<'a, REG, 4, State>; +impl<'a, REG> StateW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,195 +77,186 @@ where #[doc = "Init State"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STATE_A::VALUE1) + self.variant(State::Value1) } #[doc = "Pre-Operational State"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STATE_A::VALUE2) + self.variant(State::Value2) } #[doc = "Bootstrap State"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STATE_A::VALUE3) + self.variant(State::Value3) } #[doc = "Safe-Operational State"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STATE_A::VALUE4) + self.variant(State::Value4) } #[doc = "Operational State"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(STATE_A::VALUE5) + self.variant(State::Value5) } } -#[doc = "Field `ERRI` reader - Error Ind"] -pub type ERRI_R = crate::BitReader; #[doc = "Error Ind\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRI_A { +pub enum Erri { #[doc = "0: Device is in State as requested or Flag cleared by command"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Device has not entered requested State or changed State as result of a local action"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRI_A) -> Self { + fn from(variant: Erri) -> Self { variant as u8 != 0 } } -impl ERRI_R { +#[doc = "Field `ERRI` reader - Error Ind"] +pub type ErriR = crate::BitReader; +impl ErriR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERRI_A { + pub const fn variant(&self) -> Erri { match self.bits { - false => ERRI_A::VALUE1, - true => ERRI_A::VALUE2, + false => Erri::Value1, + true => Erri::Value2, } } #[doc = "Device is in State as requested or Flag cleared by command"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERRI_A::VALUE1 + *self == Erri::Value1 } #[doc = "Device has not entered requested State or changed State as result of a local action"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERRI_A::VALUE2 + *self == Erri::Value2 } } #[doc = "Field `ERRI` writer - Error Ind"] -pub type ERRI_W<'a, REG> = crate::BitWriter<'a, REG, ERRI_A>; -impl<'a, REG> ERRI_W<'a, REG> +pub type ErriW<'a, REG> = crate::BitWriter<'a, REG, Erri>; +impl<'a, REG> ErriW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Device is in State as requested or Flag cleared by command"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERRI_A::VALUE1) + self.variant(Erri::Value1) } #[doc = "Device has not entered requested State or changed State as result of a local action"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERRI_A::VALUE2) + self.variant(Erri::Value2) } } -#[doc = "Field `DID` reader - Device Identification"] -pub type DID_R = crate::BitReader; #[doc = "Device Identification\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DID_A { +pub enum Did { #[doc = "0: Device Identification not valid"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Device Identification loaded"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DID_A) -> Self { + fn from(variant: Did) -> Self { variant as u8 != 0 } } -impl DID_R { +#[doc = "Field `DID` reader - Device Identification"] +pub type DidR = crate::BitReader; +impl DidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DID_A { + pub const fn variant(&self) -> Did { match self.bits { - false => DID_A::VALUE1, - true => DID_A::VALUE2, + false => Did::Value1, + true => Did::Value2, } } #[doc = "Device Identification not valid"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DID_A::VALUE1 + *self == Did::Value1 } #[doc = "Device Identification loaded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DID_A::VALUE2 + *self == Did::Value2 } } #[doc = "Field `DID` writer - Device Identification"] -pub type DID_W<'a, REG> = crate::BitWriter<'a, REG, DID_A>; -impl<'a, REG> DID_W<'a, REG> +pub type DidW<'a, REG> = crate::BitWriter<'a, REG, Did>; +impl<'a, REG> DidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Device Identification not valid"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DID_A::VALUE1) + self.variant(Did::Value1) } #[doc = "Device Identification loaded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DID_A::VALUE2) + self.variant(Did::Value2) } } impl R { #[doc = "Bits 0:3 - Actual State of the Device State Machine"] #[inline(always)] - pub fn state(&self) -> STATE_R { - STATE_R::new((self.bits & 0x0f) as u8) + pub fn state(&self) -> StateR { + StateR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Error Ind"] #[inline(always)] - pub fn erri(&self) -> ERRI_R { - ERRI_R::new(((self.bits >> 4) & 1) != 0) + pub fn erri(&self) -> ErriR { + ErriR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Device Identification"] #[inline(always)] - pub fn did(&self) -> DID_R { - DID_R::new(((self.bits >> 5) & 1) != 0) + pub fn did(&self) -> DidR { + DidR::new(((self.bits >> 5) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Actual State of the Device State Machine"] #[inline(always)] #[must_use] - pub fn state(&mut self) -> STATE_W { - STATE_W::new(self, 0) + pub fn state(&mut self) -> StateW { + StateW::new(self, 0) } #[doc = "Bit 4 - Error Ind"] #[inline(always)] #[must_use] - pub fn erri(&mut self) -> ERRI_W { - ERRI_W::new(self, 4) + pub fn erri(&mut self) -> ErriW { + ErriW::new(self, 4) } #[doc = "Bit 5 - Device Identification"] #[inline(always)] #[must_use] - pub fn did(&mut self) -> DID_W { - DID_W::new(self, 5) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn did(&mut self) -> DidW { + DidW::new(self, 5) } } #[doc = "AL Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AL_STATUS_SPEC; -impl crate::RegisterSpec for AL_STATUS_SPEC { +pub struct AlStatusSpec; +impl crate::RegisterSpec for AlStatusSpec { type Ux = u16; } #[doc = "`read()` method returns [`al_status::R`](R) reader structure"] -impl crate::Readable for AL_STATUS_SPEC {} +impl crate::Readable for AlStatusSpec {} #[doc = "`write(|w| ..)` method takes [`al_status::W`](W) writer structure"] -impl crate::Writable for AL_STATUS_SPEC { +impl crate::Writable for AlStatusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets AL_STATUS to value 0x01"] -impl crate::Resettable for AL_STATUS_SPEC { +impl crate::Resettable for AlStatusSpec { const RESET_VALUE: u16 = 0x01; } diff --git a/src/ecat0/al_status_code.rs b/src/ecat0/al_status_code.rs index 05f282df..10e6f721 100644 --- a/src/ecat0/al_status_code.rs +++ b/src/ecat0/al_status_code.rs @@ -1,49 +1,40 @@ #[doc = "Register `AL_STATUS_CODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AL_STATUS_CODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AL_S_CODE` reader - AL Status Code"] -pub type AL_S_CODE_R = crate::FieldReader; +pub type AlSCodeR = crate::FieldReader; #[doc = "Field `AL_S_CODE` writer - AL Status Code"] -pub type AL_S_CODE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AlSCodeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - AL Status Code"] #[inline(always)] - pub fn al_s_code(&self) -> AL_S_CODE_R { - AL_S_CODE_R::new(self.bits) + pub fn al_s_code(&self) -> AlSCodeR { + AlSCodeR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - AL Status Code"] #[inline(always)] #[must_use] - pub fn al_s_code(&mut self) -> AL_S_CODE_W { - AL_S_CODE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn al_s_code(&mut self) -> AlSCodeW { + AlSCodeW::new(self, 0) } } #[doc = "AL Status Code\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`al_status_code::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`al_status_code::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AL_STATUS_CODE_SPEC; -impl crate::RegisterSpec for AL_STATUS_CODE_SPEC { +pub struct AlStatusCodeSpec; +impl crate::RegisterSpec for AlStatusCodeSpec { type Ux = u16; } #[doc = "`read()` method returns [`al_status_code::R`](R) reader structure"] -impl crate::Readable for AL_STATUS_CODE_SPEC {} +impl crate::Readable for AlStatusCodeSpec {} #[doc = "`write(|w| ..)` method takes [`al_status_code::W`](W) writer structure"] -impl crate::Writable for AL_STATUS_CODE_SPEC { +impl crate::Writable for AlStatusCodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets AL_STATUS_CODE to value 0"] -impl crate::Resettable for AL_STATUS_CODE_SPEC { +impl crate::Resettable for AlStatusCodeSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/build.rs b/src/ecat0/build.rs index 4933246a..ef4a9667 100644 --- a/src/ecat0/build.rs +++ b/src/ecat0/build.rs @@ -1,22 +1,22 @@ #[doc = "Register `BUILD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `BUILD` reader - Actual build of EtherCAT controller"] -pub type BUILD_R = crate::FieldReader; +pub type BuildR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Actual build of EtherCAT controller"] #[inline(always)] - pub fn build(&self) -> BUILD_R { - BUILD_R::new(self.bits) + pub fn build(&self) -> BuildR { + BuildR::new(self.bits) } } #[doc = "Build Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`build::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUILD_SPEC; -impl crate::RegisterSpec for BUILD_SPEC { +pub struct BuildSpec; +impl crate::RegisterSpec for BuildSpec { type Ux = u16; } #[doc = "`read()` method returns [`build::R`](R) reader structure"] -impl crate::Readable for BUILD_SPEC {} +impl crate::Readable for BuildSpec {} #[doc = "`reset()` method sets BUILD to value 0x01"] -impl crate::Resettable for BUILD_SPEC { +impl crate::Resettable for BuildSpec { const RESET_VALUE: u16 = 0x01; } diff --git a/src/ecat0/dc_act.rs b/src/ecat0/dc_act.rs index ca6c0ae0..744c71a4 100644 --- a/src/ecat0/dc_act.rs +++ b/src/ecat0/dc_act.rs @@ -1,226 +1,217 @@ #[doc = "Register `DC_ACT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_ACT` writer"] -pub type W = crate::W; -#[doc = "Field `SYNC_OUT` reader - Sync Out Unit activation"] -pub type SYNC_OUT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Sync Out Unit activation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_OUT_A { +pub enum SyncOut { #[doc = "0: Deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_OUT_A) -> Self { + fn from(variant: SyncOut) -> Self { variant as u8 != 0 } } -impl SYNC_OUT_R { +#[doc = "Field `SYNC_OUT` reader - Sync Out Unit activation"] +pub type SyncOutR = crate::BitReader; +impl SyncOutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_OUT_A { + pub const fn variant(&self) -> SyncOut { match self.bits { - false => SYNC_OUT_A::VALUE1, - true => SYNC_OUT_A::VALUE2, + false => SyncOut::Value1, + true => SyncOut::Value2, } } #[doc = "Deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_OUT_A::VALUE1 + *self == SyncOut::Value1 } #[doc = "Activated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_OUT_A::VALUE2 + *self == SyncOut::Value2 } } #[doc = "Field `SYNC_OUT` writer - Sync Out Unit activation"] -pub type SYNC_OUT_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_OUT_A>; -impl<'a, REG> SYNC_OUT_W<'a, REG> +pub type SyncOutW<'a, REG> = crate::BitWriter<'a, REG, SyncOut>; +impl<'a, REG> SyncOutW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYNC_OUT_A::VALUE1) + self.variant(SyncOut::Value1) } #[doc = "Activated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYNC_OUT_A::VALUE2) + self.variant(SyncOut::Value2) } } -#[doc = "Field `SYNC_0` reader - SYNC0 generation"] -pub type SYNC_0_R = crate::BitReader; #[doc = "SYNC0 generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_0_A { +pub enum Sync0 { #[doc = "0: Deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SYNC0 pulse is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_0_A) -> Self { + fn from(variant: Sync0) -> Self { variant as u8 != 0 } } -impl SYNC_0_R { +#[doc = "Field `SYNC_0` reader - SYNC0 generation"] +pub type Sync0R = crate::BitReader; +impl Sync0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_0_A { + pub const fn variant(&self) -> Sync0 { match self.bits { - false => SYNC_0_A::VALUE1, - true => SYNC_0_A::VALUE2, + false => Sync0::Value1, + true => Sync0::Value2, } } #[doc = "Deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_0_A::VALUE1 + *self == Sync0::Value1 } #[doc = "SYNC0 pulse is generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_0_A::VALUE2 + *self == Sync0::Value2 } } #[doc = "Field `SYNC_0` writer - SYNC0 generation"] -pub type SYNC_0_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_0_A>; -impl<'a, REG> SYNC_0_W<'a, REG> +pub type Sync0W<'a, REG> = crate::BitWriter<'a, REG, Sync0>; +impl<'a, REG> Sync0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYNC_0_A::VALUE1) + self.variant(Sync0::Value1) } #[doc = "SYNC0 pulse is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYNC_0_A::VALUE2) + self.variant(Sync0::Value2) } } -#[doc = "Field `SYNC_1` reader - SYNC1 generation"] -pub type SYNC_1_R = crate::BitReader; #[doc = "SYNC1 generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_1_A { +pub enum Sync1 { #[doc = "0: Deactivated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SYNC1 pulse is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_1_A) -> Self { + fn from(variant: Sync1) -> Self { variant as u8 != 0 } } -impl SYNC_1_R { +#[doc = "Field `SYNC_1` reader - SYNC1 generation"] +pub type Sync1R = crate::BitReader; +impl Sync1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_1_A { + pub const fn variant(&self) -> Sync1 { match self.bits { - false => SYNC_1_A::VALUE1, - true => SYNC_1_A::VALUE2, + false => Sync1::Value1, + true => Sync1::Value2, } } #[doc = "Deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_1_A::VALUE1 + *self == Sync1::Value1 } #[doc = "SYNC1 pulse is generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_1_A::VALUE2 + *self == Sync1::Value2 } } #[doc = "Field `SYNC_1` writer - SYNC1 generation"] -pub type SYNC_1_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_1_A>; -impl<'a, REG> SYNC_1_W<'a, REG> +pub type Sync1W<'a, REG> = crate::BitWriter<'a, REG, Sync1>; +impl<'a, REG> Sync1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYNC_1_A::VALUE1) + self.variant(Sync1::Value1) } #[doc = "SYNC1 pulse is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYNC_1_A::VALUE2) + self.variant(Sync1::Value2) } } impl R { #[doc = "Bit 0 - Sync Out Unit activation"] #[inline(always)] - pub fn sync_out(&self) -> SYNC_OUT_R { - SYNC_OUT_R::new((self.bits & 1) != 0) + pub fn sync_out(&self) -> SyncOutR { + SyncOutR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNC0 generation"] #[inline(always)] - pub fn sync_0(&self) -> SYNC_0_R { - SYNC_0_R::new(((self.bits >> 1) & 1) != 0) + pub fn sync_0(&self) -> Sync0R { + Sync0R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SYNC1 generation"] #[inline(always)] - pub fn sync_1(&self) -> SYNC_1_R { - SYNC_1_R::new(((self.bits >> 2) & 1) != 0) + pub fn sync_1(&self) -> Sync1R { + Sync1R::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Sync Out Unit activation"] #[inline(always)] #[must_use] - pub fn sync_out(&mut self) -> SYNC_OUT_W { - SYNC_OUT_W::new(self, 0) + pub fn sync_out(&mut self) -> SyncOutW { + SyncOutW::new(self, 0) } #[doc = "Bit 1 - SYNC0 generation"] #[inline(always)] #[must_use] - pub fn sync_0(&mut self) -> SYNC_0_W { - SYNC_0_W::new(self, 1) + pub fn sync_0(&mut self) -> Sync0W { + Sync0W::new(self, 1) } #[doc = "Bit 2 - SYNC1 generation"] #[inline(always)] #[must_use] - pub fn sync_1(&mut self) -> SYNC_1_W { - SYNC_1_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn sync_1(&mut self) -> Sync1W { + Sync1W::new(self, 2) } } #[doc = "Activation register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_act::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_act::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_ACT_SPEC; -impl crate::RegisterSpec for DC_ACT_SPEC { +pub struct DcActSpec; +impl crate::RegisterSpec for DcActSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_act::R`](R) reader structure"] -impl crate::Readable for DC_ACT_SPEC {} +impl crate::Readable for DcActSpec {} #[doc = "`write(|w| ..)` method takes [`dc_act::W`](W) writer structure"] -impl crate::Writable for DC_ACT_SPEC { +impl crate::Writable for DcActSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DC_ACT to value 0"] -impl crate::Resettable for DC_ACT_SPEC { +impl crate::Resettable for DcActSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_act_stat.rs b/src/ecat0/dc_act_stat.rs index dddb4709..8f9dd22a 100644 --- a/src/ecat0/dc_act_stat.rs +++ b/src/ecat0/dc_act_stat.rs @@ -1,138 +1,138 @@ #[doc = "Register `DC_ACT_STAT` reader"] -pub type R = crate::R; -#[doc = "Field `S0_ACK_STATE` reader - SYNC0 activation state"] -pub type S0_ACK_STATE_R = crate::BitReader; +pub type R = crate::R; #[doc = "SYNC0 activation state\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0_ACK_STATE_A { +pub enum S0AckState { #[doc = "0: First SYNC0 pulse is not pending"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: First SYNC0 pulse is pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0_ACK_STATE_A) -> Self { + fn from(variant: S0AckState) -> Self { variant as u8 != 0 } } -impl S0_ACK_STATE_R { +#[doc = "Field `S0_ACK_STATE` reader - SYNC0 activation state"] +pub type S0AckStateR = crate::BitReader; +impl S0AckStateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0_ACK_STATE_A { + pub const fn variant(&self) -> S0AckState { match self.bits { - false => S0_ACK_STATE_A::VALUE1, - true => S0_ACK_STATE_A::VALUE2, + false => S0AckState::Value1, + true => S0AckState::Value2, } } #[doc = "First SYNC0 pulse is not pending"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0_ACK_STATE_A::VALUE1 + *self == S0AckState::Value1 } #[doc = "First SYNC0 pulse is pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0_ACK_STATE_A::VALUE2 + *self == S0AckState::Value2 } } -#[doc = "Field `S1_ACK_STATE` reader - SYNC1 activation state"] -pub type S1_ACK_STATE_R = crate::BitReader; #[doc = "SYNC1 activation state\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1_ACK_STATE_A { +pub enum S1AckState { #[doc = "0: First SYNC1 pulse is not pending"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: First SYNC1 pulse is pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1_ACK_STATE_A) -> Self { + fn from(variant: S1AckState) -> Self { variant as u8 != 0 } } -impl S1_ACK_STATE_R { +#[doc = "Field `S1_ACK_STATE` reader - SYNC1 activation state"] +pub type S1AckStateR = crate::BitReader; +impl S1AckStateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1_ACK_STATE_A { + pub const fn variant(&self) -> S1AckState { match self.bits { - false => S1_ACK_STATE_A::VALUE1, - true => S1_ACK_STATE_A::VALUE2, + false => S1AckState::Value1, + true => S1AckState::Value2, } } #[doc = "First SYNC1 pulse is not pending"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1_ACK_STATE_A::VALUE1 + *self == S1AckState::Value1 } #[doc = "First SYNC1 pulse is pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1_ACK_STATE_A::VALUE2 + *self == S1AckState::Value2 } } -#[doc = "Field `S_TIME` reader - Start Time Cyclic Operation"] -pub type S_TIME_R = crate::BitReader; #[doc = "Start Time Cyclic Operation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S_TIME_A { +pub enum STime { #[doc = "0: Start Time was within near future"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Start Time was out of near future (0x0981.6)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S_TIME_A) -> Self { + fn from(variant: STime) -> Self { variant as u8 != 0 } } -impl S_TIME_R { +#[doc = "Field `S_TIME` reader - Start Time Cyclic Operation"] +pub type STimeR = crate::BitReader; +impl STimeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S_TIME_A { + pub const fn variant(&self) -> STime { match self.bits { - false => S_TIME_A::VALUE1, - true => S_TIME_A::VALUE2, + false => STime::Value1, + true => STime::Value2, } } #[doc = "Start Time was within near future"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S_TIME_A::VALUE1 + *self == STime::Value1 } #[doc = "Start Time was out of near future (0x0981.6)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S_TIME_A::VALUE2 + *self == STime::Value2 } } impl R { #[doc = "Bit 0 - SYNC0 activation state"] #[inline(always)] - pub fn s0_ack_state(&self) -> S0_ACK_STATE_R { - S0_ACK_STATE_R::new((self.bits & 1) != 0) + pub fn s0_ack_state(&self) -> S0AckStateR { + S0AckStateR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SYNC1 activation state"] #[inline(always)] - pub fn s1_ack_state(&self) -> S1_ACK_STATE_R { - S1_ACK_STATE_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1_ack_state(&self) -> S1AckStateR { + S1AckStateR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Start Time Cyclic Operation"] #[inline(always)] - pub fn s_time(&self) -> S_TIME_R { - S_TIME_R::new(((self.bits >> 2) & 1) != 0) + pub fn s_time(&self) -> STimeR { + STimeR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "Activation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_act_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_ACT_STAT_SPEC; -impl crate::RegisterSpec for DC_ACT_STAT_SPEC { +pub struct DcActStatSpec; +impl crate::RegisterSpec for DcActStatSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_act_stat::R`](R) reader structure"] -impl crate::Readable for DC_ACT_STAT_SPEC {} +impl crate::Readable for DcActStatSpec {} #[doc = "`reset()` method sets DC_ACT_STAT to value 0"] -impl crate::Resettable for DC_ACT_STAT_SPEC { +impl crate::Resettable for DcActStatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_cyc_cont.rs b/src/ecat0/dc_cyc_cont.rs index 1db669c3..eec2e285 100644 --- a/src/ecat0/dc_cyc_cont.rs +++ b/src/ecat0/dc_cyc_cont.rs @@ -1,138 +1,138 @@ #[doc = "Register `DC_CYC_CONT` reader"] -pub type R = crate::R; -#[doc = "Field `SYNC` reader - SYNC out unit control"] -pub type SYNC_R = crate::BitReader; +pub type R = crate::R; #[doc = "SYNC out unit control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: ECAT controlled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI controlled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - SYNC out unit control"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::VALUE1, - true => SYNC_A::VALUE2, + false => Sync::Value1, + true => Sync::Value2, } } #[doc = "ECAT controlled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_A::VALUE1 + *self == Sync::Value1 } #[doc = "PDI controlled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_A::VALUE2 + *self == Sync::Value2 } } -#[doc = "Field `LATCH_U0` reader - Latch In unit 0"] -pub type LATCH_U0_R = crate::BitReader; #[doc = "Latch In unit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LATCH_U0_A { +pub enum LatchU0 { #[doc = "0: ECAT controlled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI controlled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LATCH_U0_A) -> Self { + fn from(variant: LatchU0) -> Self { variant as u8 != 0 } } -impl LATCH_U0_R { +#[doc = "Field `LATCH_U0` reader - Latch In unit 0"] +pub type LatchU0R = crate::BitReader; +impl LatchU0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LATCH_U0_A { + pub const fn variant(&self) -> LatchU0 { match self.bits { - false => LATCH_U0_A::VALUE1, - true => LATCH_U0_A::VALUE2, + false => LatchU0::Value1, + true => LatchU0::Value2, } } #[doc = "ECAT controlled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LATCH_U0_A::VALUE1 + *self == LatchU0::Value1 } #[doc = "PDI controlled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LATCH_U0_A::VALUE2 + *self == LatchU0::Value2 } } -#[doc = "Field `LATCH_U1` reader - Latch In unit 1"] -pub type LATCH_U1_R = crate::BitReader; #[doc = "Latch In unit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LATCH_U1_A { +pub enum LatchU1 { #[doc = "0: ECAT controlled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI controlled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LATCH_U1_A) -> Self { + fn from(variant: LatchU1) -> Self { variant as u8 != 0 } } -impl LATCH_U1_R { +#[doc = "Field `LATCH_U1` reader - Latch In unit 1"] +pub type LatchU1R = crate::BitReader; +impl LatchU1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LATCH_U1_A { + pub const fn variant(&self) -> LatchU1 { match self.bits { - false => LATCH_U1_A::VALUE1, - true => LATCH_U1_A::VALUE2, + false => LatchU1::Value1, + true => LatchU1::Value2, } } #[doc = "ECAT controlled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LATCH_U1_A::VALUE1 + *self == LatchU1::Value1 } #[doc = "PDI controlled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LATCH_U1_A::VALUE2 + *self == LatchU1::Value2 } } impl R { #[doc = "Bit 0 - SYNC out unit control"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new((self.bits & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new((self.bits & 1) != 0) } #[doc = "Bit 4 - Latch In unit 0"] #[inline(always)] - pub fn latch_u0(&self) -> LATCH_U0_R { - LATCH_U0_R::new(((self.bits >> 4) & 1) != 0) + pub fn latch_u0(&self) -> LatchU0R { + LatchU0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Latch In unit 1"] #[inline(always)] - pub fn latch_u1(&self) -> LATCH_U1_R { - LATCH_U1_R::new(((self.bits >> 5) & 1) != 0) + pub fn latch_u1(&self) -> LatchU1R { + LatchU1R::new(((self.bits >> 5) & 1) != 0) } } #[doc = "Cyclic Unit Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_cyc_cont::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_CYC_CONT_SPEC; -impl crate::RegisterSpec for DC_CYC_CONT_SPEC { +pub struct DcCycContSpec; +impl crate::RegisterSpec for DcCycContSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_cyc_cont::R`](R) reader structure"] -impl crate::Readable for DC_CYC_CONT_SPEC {} +impl crate::Readable for DcCycContSpec {} #[doc = "`reset()` method sets DC_CYC_CONT to value 0"] -impl crate::Resettable for DC_CYC_CONT_SPEC { +impl crate::Resettable for DcCycContSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_cyc_start_time.rs b/src/ecat0/dc_cyc_start_time.rs index dd72d2f2..70ed3e1f 100644 --- a/src/ecat0/dc_cyc_start_time.rs +++ b/src/ecat0/dc_cyc_start_time.rs @@ -1,50 +1,41 @@ #[doc = "Register `DC_CYC_START_TIME[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_CYC_START_TIME[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DC_CYC_START_TIME` reader - Start Time Cyclic Operation"] -pub type DC_CYC_START_TIME_R = crate::FieldReader; +pub type DcCycStartTimeR = crate::FieldReader; #[doc = "Field `DC_CYC_START_TIME` writer - Start Time Cyclic Operation"] -pub type DC_CYC_START_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DcCycStartTimeW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Start Time Cyclic Operation"] #[inline(always)] - pub fn dc_cyc_start_time(&self) -> DC_CYC_START_TIME_R { - DC_CYC_START_TIME_R::new(self.bits) + pub fn dc_cyc_start_time(&self) -> DcCycStartTimeR { + DcCycStartTimeR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Start Time Cyclic Operation"] #[inline(always)] #[must_use] - pub fn dc_cyc_start_time(&mut self) -> DC_CYC_START_TIME_W { - DC_CYC_START_TIME_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dc_cyc_start_time(&mut self) -> DcCycStartTimeW { + DcCycStartTimeW::new(self, 0) } } #[doc = "Start Time Cyclic Operation\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_cyc_start_time::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_cyc_start_time::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_CYC_START_TIME_SPEC; -impl crate::RegisterSpec for DC_CYC_START_TIME_SPEC { +pub struct DcCycStartTimeSpec; +impl crate::RegisterSpec for DcCycStartTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_cyc_start_time::R`](R) reader structure"] -impl crate::Readable for DC_CYC_START_TIME_SPEC {} +impl crate::Readable for DcCycStartTimeSpec {} #[doc = "`write(|w| ..)` method takes [`dc_cyc_start_time::W`](W) writer structure"] -impl crate::Writable for DC_CYC_START_TIME_SPEC { +impl crate::Writable for DcCycStartTimeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_CYC_START_TIME[%s] to value 0"] -impl crate::Resettable for DC_CYC_START_TIME_SPEC { +impl crate::Resettable for DcCycStartTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_ecat_cng_ev_time.rs b/src/ecat0/dc_ecat_cng_ev_time.rs index 50a787b6..e01da222 100644 --- a/src/ecat0/dc_ecat_cng_ev_time.rs +++ b/src/ecat0/dc_ecat_cng_ev_time.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_ECAT_CNG_EV_TIME` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ECAT_CNG_EV_TIME` reader - Register captures local time of the beginning of the frame which causes at least one SyncManager to assert an ECAT event"] -pub type ECAT_CNG_EV_TIME_R = crate::FieldReader; +pub type EcatCngEvTimeR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Register captures local time of the beginning of the frame which causes at least one SyncManager to assert an ECAT event"] #[inline(always)] - pub fn ecat_cng_ev_time(&self) -> ECAT_CNG_EV_TIME_R { - ECAT_CNG_EV_TIME_R::new(self.bits) + pub fn ecat_cng_ev_time(&self) -> EcatCngEvTimeR { + EcatCngEvTimeR::new(self.bits) } } #[doc = "EtherCAT Buffer Change Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_ecat_cng_ev_time::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_ECAT_CNG_EV_TIME_SPEC; -impl crate::RegisterSpec for DC_ECAT_CNG_EV_TIME_SPEC { +pub struct DcEcatCngEvTimeSpec; +impl crate::RegisterSpec for DcEcatCngEvTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_ecat_cng_ev_time::R`](R) reader structure"] -impl crate::Readable for DC_ECAT_CNG_EV_TIME_SPEC {} +impl crate::Readable for DcEcatCngEvTimeSpec {} #[doc = "`reset()` method sets DC_ECAT_CNG_EV_TIME to value 0"] -impl crate::Resettable for DC_ECAT_CNG_EV_TIME_SPEC { +impl crate::Resettable for DcEcatCngEvTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_latch0_cont.rs b/src/ecat0/dc_latch0_cont.rs index 715b13ef..f695632b 100644 --- a/src/ecat0/dc_latch0_cont.rs +++ b/src/ecat0/dc_latch0_cont.rs @@ -1,162 +1,153 @@ #[doc = "Register `DC_LATCH0_CONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_LATCH0_CONT` writer"] -pub type W = crate::W; -#[doc = "Field `L0_POS` reader - Latch0 positive edge"] -pub type L0_POS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Latch0 positive edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum L0_POS_A { +pub enum L0Pos { #[doc = "0: Continuous Latch active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single event (only first event active)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: L0_POS_A) -> Self { + fn from(variant: L0Pos) -> Self { variant as u8 != 0 } } -impl L0_POS_R { +#[doc = "Field `L0_POS` reader - Latch0 positive edge"] +pub type L0PosR = crate::BitReader; +impl L0PosR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> L0_POS_A { + pub const fn variant(&self) -> L0Pos { match self.bits { - false => L0_POS_A::VALUE1, - true => L0_POS_A::VALUE2, + false => L0Pos::Value1, + true => L0Pos::Value2, } } #[doc = "Continuous Latch active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == L0_POS_A::VALUE1 + *self == L0Pos::Value1 } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == L0_POS_A::VALUE2 + *self == L0Pos::Value2 } } #[doc = "Field `L0_POS` writer - Latch0 positive edge"] -pub type L0_POS_W<'a, REG> = crate::BitWriter<'a, REG, L0_POS_A>; -impl<'a, REG> L0_POS_W<'a, REG> +pub type L0PosW<'a, REG> = crate::BitWriter<'a, REG, L0Pos>; +impl<'a, REG> L0PosW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Continuous Latch active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(L0_POS_A::VALUE1) + self.variant(L0Pos::Value1) } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(L0_POS_A::VALUE2) + self.variant(L0Pos::Value2) } } -#[doc = "Field `L0_NEG` reader - Latch0 negative edge"] -pub type L0_NEG_R = crate::BitReader; #[doc = "Latch0 negative edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum L0_NEG_A { +pub enum L0Neg { #[doc = "0: Continuous Latch active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single event (only first event active)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: L0_NEG_A) -> Self { + fn from(variant: L0Neg) -> Self { variant as u8 != 0 } } -impl L0_NEG_R { +#[doc = "Field `L0_NEG` reader - Latch0 negative edge"] +pub type L0NegR = crate::BitReader; +impl L0NegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> L0_NEG_A { + pub const fn variant(&self) -> L0Neg { match self.bits { - false => L0_NEG_A::VALUE1, - true => L0_NEG_A::VALUE2, + false => L0Neg::Value1, + true => L0Neg::Value2, } } #[doc = "Continuous Latch active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == L0_NEG_A::VALUE1 + *self == L0Neg::Value1 } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == L0_NEG_A::VALUE2 + *self == L0Neg::Value2 } } #[doc = "Field `L0_NEG` writer - Latch0 negative edge"] -pub type L0_NEG_W<'a, REG> = crate::BitWriter<'a, REG, L0_NEG_A>; -impl<'a, REG> L0_NEG_W<'a, REG> +pub type L0NegW<'a, REG> = crate::BitWriter<'a, REG, L0Neg>; +impl<'a, REG> L0NegW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Continuous Latch active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(L0_NEG_A::VALUE1) + self.variant(L0Neg::Value1) } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(L0_NEG_A::VALUE2) + self.variant(L0Neg::Value2) } } impl R { #[doc = "Bit 0 - Latch0 positive edge"] #[inline(always)] - pub fn l0_pos(&self) -> L0_POS_R { - L0_POS_R::new((self.bits & 1) != 0) + pub fn l0_pos(&self) -> L0PosR { + L0PosR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Latch0 negative edge"] #[inline(always)] - pub fn l0_neg(&self) -> L0_NEG_R { - L0_NEG_R::new(((self.bits >> 1) & 1) != 0) + pub fn l0_neg(&self) -> L0NegR { + L0NegR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Latch0 positive edge"] #[inline(always)] #[must_use] - pub fn l0_pos(&mut self) -> L0_POS_W { - L0_POS_W::new(self, 0) + pub fn l0_pos(&mut self) -> L0PosW { + L0PosW::new(self, 0) } #[doc = "Bit 1 - Latch0 negative edge"] #[inline(always)] #[must_use] - pub fn l0_neg(&mut self) -> L0_NEG_W { - L0_NEG_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn l0_neg(&mut self) -> L0NegW { + L0NegW::new(self, 1) } } #[doc = "Latch0 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_cont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_latch0_cont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH0_CONT_SPEC; -impl crate::RegisterSpec for DC_LATCH0_CONT_SPEC { +pub struct DcLatch0ContSpec; +impl crate::RegisterSpec for DcLatch0ContSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_latch0_cont::R`](R) reader structure"] -impl crate::Readable for DC_LATCH0_CONT_SPEC {} +impl crate::Readable for DcLatch0ContSpec {} #[doc = "`write(|w| ..)` method takes [`dc_latch0_cont::W`](W) writer structure"] -impl crate::Writable for DC_LATCH0_CONT_SPEC { +impl crate::Writable for DcLatch0ContSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DC_LATCH0_CONT to value 0"] -impl crate::Resettable for DC_LATCH0_CONT_SPEC { +impl crate::Resettable for DcLatch0ContSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_latch0_stat.rs b/src/ecat0/dc_latch0_stat.rs index 03978ce1..91eb182f 100644 --- a/src/ecat0/dc_latch0_stat.rs +++ b/src/ecat0/dc_latch0_stat.rs @@ -1,104 +1,104 @@ #[doc = "Register `DC_LATCH0_STAT` reader"] -pub type R = crate::R; -#[doc = "Field `EV_L0_POS` reader - Event Latch0 positive edge"] -pub type EV_L0_POS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Event Latch0 positive edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV_L0_POS_A { +pub enum EvL0Pos { #[doc = "0: Positive edge not detected or continuous mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Positive edge detected in single event mode only"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV_L0_POS_A) -> Self { + fn from(variant: EvL0Pos) -> Self { variant as u8 != 0 } } -impl EV_L0_POS_R { +#[doc = "Field `EV_L0_POS` reader - Event Latch0 positive edge"] +pub type EvL0PosR = crate::BitReader; +impl EvL0PosR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV_L0_POS_A { + pub const fn variant(&self) -> EvL0Pos { match self.bits { - false => EV_L0_POS_A::VALUE1, - true => EV_L0_POS_A::VALUE2, + false => EvL0Pos::Value1, + true => EvL0Pos::Value2, } } #[doc = "Positive edge not detected or continuous mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV_L0_POS_A::VALUE1 + *self == EvL0Pos::Value1 } #[doc = "Positive edge detected in single event mode only"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV_L0_POS_A::VALUE2 + *self == EvL0Pos::Value2 } } -#[doc = "Field `EV_L0_NEG` reader - Event Latch0 negative edge"] -pub type EV_L0_NEG_R = crate::BitReader; #[doc = "Event Latch0 negative edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV_L0_NEG_A { +pub enum EvL0Neg { #[doc = "0: Negative edge not detected or continuous mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Negative edge detected in single event mode only"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV_L0_NEG_A) -> Self { + fn from(variant: EvL0Neg) -> Self { variant as u8 != 0 } } -impl EV_L0_NEG_R { +#[doc = "Field `EV_L0_NEG` reader - Event Latch0 negative edge"] +pub type EvL0NegR = crate::BitReader; +impl EvL0NegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV_L0_NEG_A { + pub const fn variant(&self) -> EvL0Neg { match self.bits { - false => EV_L0_NEG_A::VALUE1, - true => EV_L0_NEG_A::VALUE2, + false => EvL0Neg::Value1, + true => EvL0Neg::Value2, } } #[doc = "Negative edge not detected or continuous mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV_L0_NEG_A::VALUE1 + *self == EvL0Neg::Value1 } #[doc = "Negative edge detected in single event mode only"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV_L0_NEG_A::VALUE2 + *self == EvL0Neg::Value2 } } #[doc = "Field `L0_PIN` reader - Latch0 pin state"] -pub type L0_PIN_R = crate::BitReader; +pub type L0PinR = crate::BitReader; impl R { #[doc = "Bit 0 - Event Latch0 positive edge"] #[inline(always)] - pub fn ev_l0_pos(&self) -> EV_L0_POS_R { - EV_L0_POS_R::new((self.bits & 1) != 0) + pub fn ev_l0_pos(&self) -> EvL0PosR { + EvL0PosR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Event Latch0 negative edge"] #[inline(always)] - pub fn ev_l0_neg(&self) -> EV_L0_NEG_R { - EV_L0_NEG_R::new(((self.bits >> 1) & 1) != 0) + pub fn ev_l0_neg(&self) -> EvL0NegR { + EvL0NegR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Latch0 pin state"] #[inline(always)] - pub fn l0_pin(&self) -> L0_PIN_R { - L0_PIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn l0_pin(&self) -> L0PinR { + L0PinR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "Latch0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH0_STAT_SPEC; -impl crate::RegisterSpec for DC_LATCH0_STAT_SPEC { +pub struct DcLatch0StatSpec; +impl crate::RegisterSpec for DcLatch0StatSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_latch0_stat::R`](R) reader structure"] -impl crate::Readable for DC_LATCH0_STAT_SPEC {} +impl crate::Readable for DcLatch0StatSpec {} #[doc = "`reset()` method sets DC_LATCH0_STAT to value 0"] -impl crate::Resettable for DC_LATCH0_STAT_SPEC { +impl crate::Resettable for DcLatch0StatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_latch0_time_neg.rs b/src/ecat0/dc_latch0_time_neg.rs index 01eec96e..649dd649 100644 --- a/src/ecat0/dc_latch0_time_neg.rs +++ b/src/ecat0/dc_latch0_time_neg.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_LATCH0_TIME_NEG[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DC_LATCH0_TIME_NEG` reader - Captures System time at the negative edge of the Latch0 signal"] -pub type DC_LATCH0_TIME_NEG_R = crate::FieldReader; +pub type DcLatch0TimeNegR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Captures System time at the negative edge of the Latch0 signal"] #[inline(always)] - pub fn dc_latch0_time_neg(&self) -> DC_LATCH0_TIME_NEG_R { - DC_LATCH0_TIME_NEG_R::new(self.bits) + pub fn dc_latch0_time_neg(&self) -> DcLatch0TimeNegR { + DcLatch0TimeNegR::new(self.bits) } } #[doc = "Register captures System time at the negative edge of the Latch0 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_time_neg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH0_TIME_NEG_SPEC; -impl crate::RegisterSpec for DC_LATCH0_TIME_NEG_SPEC { +pub struct DcLatch0TimeNegSpec; +impl crate::RegisterSpec for DcLatch0TimeNegSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_latch0_time_neg::R`](R) reader structure"] -impl crate::Readable for DC_LATCH0_TIME_NEG_SPEC {} +impl crate::Readable for DcLatch0TimeNegSpec {} #[doc = "`reset()` method sets DC_LATCH0_TIME_NEG[%s] to value 0"] -impl crate::Resettable for DC_LATCH0_TIME_NEG_SPEC { +impl crate::Resettable for DcLatch0TimeNegSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_latch0_time_pos.rs b/src/ecat0/dc_latch0_time_pos.rs index d9d7eb3d..15ed67d6 100644 --- a/src/ecat0/dc_latch0_time_pos.rs +++ b/src/ecat0/dc_latch0_time_pos.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_LATCH0_TIME_POS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DC_LATCH0_TIME_POS` reader - Captures System time at the positive edge of the Latch0 signal"] -pub type DC_LATCH0_TIME_POS_R = crate::FieldReader; +pub type DcLatch0TimePosR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Captures System time at the positive edge of the Latch0 signal"] #[inline(always)] - pub fn dc_latch0_time_pos(&self) -> DC_LATCH0_TIME_POS_R { - DC_LATCH0_TIME_POS_R::new(self.bits) + pub fn dc_latch0_time_pos(&self) -> DcLatch0TimePosR { + DcLatch0TimePosR::new(self.bits) } } #[doc = "Register captures System time at the positive edge of the Latch0 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch0_time_pos::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH0_TIME_POS_SPEC; -impl crate::RegisterSpec for DC_LATCH0_TIME_POS_SPEC { +pub struct DcLatch0TimePosSpec; +impl crate::RegisterSpec for DcLatch0TimePosSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_latch0_time_pos::R`](R) reader structure"] -impl crate::Readable for DC_LATCH0_TIME_POS_SPEC {} +impl crate::Readable for DcLatch0TimePosSpec {} #[doc = "`reset()` method sets DC_LATCH0_TIME_POS[%s] to value 0"] -impl crate::Resettable for DC_LATCH0_TIME_POS_SPEC { +impl crate::Resettable for DcLatch0TimePosSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_latch1_cont.rs b/src/ecat0/dc_latch1_cont.rs index ce0bc9d4..64987db1 100644 --- a/src/ecat0/dc_latch1_cont.rs +++ b/src/ecat0/dc_latch1_cont.rs @@ -1,162 +1,153 @@ #[doc = "Register `DC_LATCH1_CONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_LATCH1_CONT` writer"] -pub type W = crate::W; -#[doc = "Field `L1_POS` reader - Latch1 positive edge"] -pub type L1_POS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Latch1 positive edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum L1_POS_A { +pub enum L1Pos { #[doc = "0: Continuous Latch active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single event (only first event active)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: L1_POS_A) -> Self { + fn from(variant: L1Pos) -> Self { variant as u8 != 0 } } -impl L1_POS_R { +#[doc = "Field `L1_POS` reader - Latch1 positive edge"] +pub type L1PosR = crate::BitReader; +impl L1PosR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> L1_POS_A { + pub const fn variant(&self) -> L1Pos { match self.bits { - false => L1_POS_A::VALUE1, - true => L1_POS_A::VALUE2, + false => L1Pos::Value1, + true => L1Pos::Value2, } } #[doc = "Continuous Latch active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == L1_POS_A::VALUE1 + *self == L1Pos::Value1 } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == L1_POS_A::VALUE2 + *self == L1Pos::Value2 } } #[doc = "Field `L1_POS` writer - Latch1 positive edge"] -pub type L1_POS_W<'a, REG> = crate::BitWriter<'a, REG, L1_POS_A>; -impl<'a, REG> L1_POS_W<'a, REG> +pub type L1PosW<'a, REG> = crate::BitWriter<'a, REG, L1Pos>; +impl<'a, REG> L1PosW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Continuous Latch active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(L1_POS_A::VALUE1) + self.variant(L1Pos::Value1) } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(L1_POS_A::VALUE2) + self.variant(L1Pos::Value2) } } -#[doc = "Field `L1_NEG` reader - Latch1 negative edge"] -pub type L1_NEG_R = crate::BitReader; #[doc = "Latch1 negative edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum L1_NEG_A { +pub enum L1Neg { #[doc = "0: Continuous Latch active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single event (only first event active)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: L1_NEG_A) -> Self { + fn from(variant: L1Neg) -> Self { variant as u8 != 0 } } -impl L1_NEG_R { +#[doc = "Field `L1_NEG` reader - Latch1 negative edge"] +pub type L1NegR = crate::BitReader; +impl L1NegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> L1_NEG_A { + pub const fn variant(&self) -> L1Neg { match self.bits { - false => L1_NEG_A::VALUE1, - true => L1_NEG_A::VALUE2, + false => L1Neg::Value1, + true => L1Neg::Value2, } } #[doc = "Continuous Latch active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == L1_NEG_A::VALUE1 + *self == L1Neg::Value1 } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == L1_NEG_A::VALUE2 + *self == L1Neg::Value2 } } #[doc = "Field `L1_NEG` writer - Latch1 negative edge"] -pub type L1_NEG_W<'a, REG> = crate::BitWriter<'a, REG, L1_NEG_A>; -impl<'a, REG> L1_NEG_W<'a, REG> +pub type L1NegW<'a, REG> = crate::BitWriter<'a, REG, L1Neg>; +impl<'a, REG> L1NegW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Continuous Latch active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(L1_NEG_A::VALUE1) + self.variant(L1Neg::Value1) } #[doc = "Single event (only first event active)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(L1_NEG_A::VALUE2) + self.variant(L1Neg::Value2) } } impl R { #[doc = "Bit 0 - Latch1 positive edge"] #[inline(always)] - pub fn l1_pos(&self) -> L1_POS_R { - L1_POS_R::new((self.bits & 1) != 0) + pub fn l1_pos(&self) -> L1PosR { + L1PosR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Latch1 negative edge"] #[inline(always)] - pub fn l1_neg(&self) -> L1_NEG_R { - L1_NEG_R::new(((self.bits >> 1) & 1) != 0) + pub fn l1_neg(&self) -> L1NegR { + L1NegR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Latch1 positive edge"] #[inline(always)] #[must_use] - pub fn l1_pos(&mut self) -> L1_POS_W { - L1_POS_W::new(self, 0) + pub fn l1_pos(&mut self) -> L1PosW { + L1PosW::new(self, 0) } #[doc = "Bit 1 - Latch1 negative edge"] #[inline(always)] #[must_use] - pub fn l1_neg(&mut self) -> L1_NEG_W { - L1_NEG_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn l1_neg(&mut self) -> L1NegW { + L1NegW::new(self, 1) } } #[doc = "Latch1 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_cont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_latch1_cont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH1_CONT_SPEC; -impl crate::RegisterSpec for DC_LATCH1_CONT_SPEC { +pub struct DcLatch1ContSpec; +impl crate::RegisterSpec for DcLatch1ContSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_latch1_cont::R`](R) reader structure"] -impl crate::Readable for DC_LATCH1_CONT_SPEC {} +impl crate::Readable for DcLatch1ContSpec {} #[doc = "`write(|w| ..)` method takes [`dc_latch1_cont::W`](W) writer structure"] -impl crate::Writable for DC_LATCH1_CONT_SPEC { +impl crate::Writable for DcLatch1ContSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DC_LATCH1_CONT to value 0"] -impl crate::Resettable for DC_LATCH1_CONT_SPEC { +impl crate::Resettable for DcLatch1ContSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_latch1_stat.rs b/src/ecat0/dc_latch1_stat.rs index 977ea64b..aa50e235 100644 --- a/src/ecat0/dc_latch1_stat.rs +++ b/src/ecat0/dc_latch1_stat.rs @@ -1,104 +1,104 @@ #[doc = "Register `DC_LATCH1_STAT` reader"] -pub type R = crate::R; -#[doc = "Field `EV_L1_POS` reader - Event Latch1 positive edge"] -pub type EV_L1_POS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Event Latch1 positive edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV_L1_POS_A { +pub enum EvL1Pos { #[doc = "0: Positive edge not detected or continuous mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Positive edge detected in single event mode only"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV_L1_POS_A) -> Self { + fn from(variant: EvL1Pos) -> Self { variant as u8 != 0 } } -impl EV_L1_POS_R { +#[doc = "Field `EV_L1_POS` reader - Event Latch1 positive edge"] +pub type EvL1PosR = crate::BitReader; +impl EvL1PosR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV_L1_POS_A { + pub const fn variant(&self) -> EvL1Pos { match self.bits { - false => EV_L1_POS_A::VALUE1, - true => EV_L1_POS_A::VALUE2, + false => EvL1Pos::Value1, + true => EvL1Pos::Value2, } } #[doc = "Positive edge not detected or continuous mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV_L1_POS_A::VALUE1 + *self == EvL1Pos::Value1 } #[doc = "Positive edge detected in single event mode only"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV_L1_POS_A::VALUE2 + *self == EvL1Pos::Value2 } } -#[doc = "Field `EV_L1_NEG` reader - Event Latch1 negative edge"] -pub type EV_L1_NEG_R = crate::BitReader; #[doc = "Event Latch1 negative edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV_L1_NEG_A { +pub enum EvL1Neg { #[doc = "0: Negative edge not detected or continuous mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Negative edge detected in single event mode only"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV_L1_NEG_A) -> Self { + fn from(variant: EvL1Neg) -> Self { variant as u8 != 0 } } -impl EV_L1_NEG_R { +#[doc = "Field `EV_L1_NEG` reader - Event Latch1 negative edge"] +pub type EvL1NegR = crate::BitReader; +impl EvL1NegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV_L1_NEG_A { + pub const fn variant(&self) -> EvL1Neg { match self.bits { - false => EV_L1_NEG_A::VALUE1, - true => EV_L1_NEG_A::VALUE2, + false => EvL1Neg::Value1, + true => EvL1Neg::Value2, } } #[doc = "Negative edge not detected or continuous mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV_L1_NEG_A::VALUE1 + *self == EvL1Neg::Value1 } #[doc = "Negative edge detected in single event mode only"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV_L1_NEG_A::VALUE2 + *self == EvL1Neg::Value2 } } #[doc = "Field `L1_PIN` reader - Latch1 pin state"] -pub type L1_PIN_R = crate::BitReader; +pub type L1PinR = crate::BitReader; impl R { #[doc = "Bit 0 - Event Latch1 positive edge"] #[inline(always)] - pub fn ev_l1_pos(&self) -> EV_L1_POS_R { - EV_L1_POS_R::new((self.bits & 1) != 0) + pub fn ev_l1_pos(&self) -> EvL1PosR { + EvL1PosR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Event Latch1 negative edge"] #[inline(always)] - pub fn ev_l1_neg(&self) -> EV_L1_NEG_R { - EV_L1_NEG_R::new(((self.bits >> 1) & 1) != 0) + pub fn ev_l1_neg(&self) -> EvL1NegR { + EvL1NegR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Latch1 pin state"] #[inline(always)] - pub fn l1_pin(&self) -> L1_PIN_R { - L1_PIN_R::new(((self.bits >> 2) & 1) != 0) + pub fn l1_pin(&self) -> L1PinR { + L1PinR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "Latch1 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH1_STAT_SPEC; -impl crate::RegisterSpec for DC_LATCH1_STAT_SPEC { +pub struct DcLatch1StatSpec; +impl crate::RegisterSpec for DcLatch1StatSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_latch1_stat::R`](R) reader structure"] -impl crate::Readable for DC_LATCH1_STAT_SPEC {} +impl crate::Readable for DcLatch1StatSpec {} #[doc = "`reset()` method sets DC_LATCH1_STAT to value 0"] -impl crate::Resettable for DC_LATCH1_STAT_SPEC { +impl crate::Resettable for DcLatch1StatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_latch1_time_neg.rs b/src/ecat0/dc_latch1_time_neg.rs index 6cc6449c..f546062d 100644 --- a/src/ecat0/dc_latch1_time_neg.rs +++ b/src/ecat0/dc_latch1_time_neg.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_LATCH1_TIME_NEG[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DC_LATCH1_TIME_NEG` reader - Captures System time at the negative edge of the Latch1 signal"] -pub type DC_LATCH1_TIME_NEG_R = crate::FieldReader; +pub type DcLatch1TimeNegR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Captures System time at the negative edge of the Latch1 signal"] #[inline(always)] - pub fn dc_latch1_time_neg(&self) -> DC_LATCH1_TIME_NEG_R { - DC_LATCH1_TIME_NEG_R::new(self.bits) + pub fn dc_latch1_time_neg(&self) -> DcLatch1TimeNegR { + DcLatch1TimeNegR::new(self.bits) } } #[doc = "Register captures System time at the negative edge of the Latch1 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_time_neg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH1_TIME_NEG_SPEC; -impl crate::RegisterSpec for DC_LATCH1_TIME_NEG_SPEC { +pub struct DcLatch1TimeNegSpec; +impl crate::RegisterSpec for DcLatch1TimeNegSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_latch1_time_neg::R`](R) reader structure"] -impl crate::Readable for DC_LATCH1_TIME_NEG_SPEC {} +impl crate::Readable for DcLatch1TimeNegSpec {} #[doc = "`reset()` method sets DC_LATCH1_TIME_NEG[%s] to value 0"] -impl crate::Resettable for DC_LATCH1_TIME_NEG_SPEC { +impl crate::Resettable for DcLatch1TimeNegSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_latch1_time_pos.rs b/src/ecat0/dc_latch1_time_pos.rs index 4747c7b0..d8c8537b 100644 --- a/src/ecat0/dc_latch1_time_pos.rs +++ b/src/ecat0/dc_latch1_time_pos.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_LATCH1_TIME_POS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DC_LATCH1_TIME_POS` reader - Captures System time at the positive edge of the Latch1 signal"] -pub type DC_LATCH1_TIME_POS_R = crate::FieldReader; +pub type DcLatch1TimePosR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Captures System time at the positive edge of the Latch1 signal"] #[inline(always)] - pub fn dc_latch1_time_pos(&self) -> DC_LATCH1_TIME_POS_R { - DC_LATCH1_TIME_POS_R::new(self.bits) + pub fn dc_latch1_time_pos(&self) -> DcLatch1TimePosR { + DcLatch1TimePosR::new(self.bits) } } #[doc = "Register captures System time at the positive edge of the Latch1 signal\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_latch1_time_pos::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_LATCH1_TIME_POS_SPEC; -impl crate::RegisterSpec for DC_LATCH1_TIME_POS_SPEC { +pub struct DcLatch1TimePosSpec; +impl crate::RegisterSpec for DcLatch1TimePosSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_latch1_time_pos::R`](R) reader structure"] -impl crate::Readable for DC_LATCH1_TIME_POS_SPEC {} +impl crate::Readable for DcLatch1TimePosSpec {} #[doc = "`reset()` method sets DC_LATCH1_TIME_POS[%s] to value 0"] -impl crate::Resettable for DC_LATCH1_TIME_POS_SPEC { +impl crate::Resettable for DcLatch1TimePosSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_next_sync1_pulse.rs b/src/ecat0/dc_next_sync1_pulse.rs index f7431b6c..09627e5a 100644 --- a/src/ecat0/dc_next_sync1_pulse.rs +++ b/src/ecat0/dc_next_sync1_pulse.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_NEXT_SYNC1_PULSE[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DC_NEXT_SYNC1_PULSE` reader - System time of next SYNC1 pulse in ns"] -pub type DC_NEXT_SYNC1_PULSE_R = crate::FieldReader; +pub type DcNextSync1PulseR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - System time of next SYNC1 pulse in ns"] #[inline(always)] - pub fn dc_next_sync1_pulse(&self) -> DC_NEXT_SYNC1_PULSE_R { - DC_NEXT_SYNC1_PULSE_R::new(self.bits) + pub fn dc_next_sync1_pulse(&self) -> DcNextSync1PulseR { + DcNextSync1PulseR::new(self.bits) } } #[doc = "System time of next SYNC1 pulse in ns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_next_sync1_pulse::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_NEXT_SYNC1_PULSE_SPEC; -impl crate::RegisterSpec for DC_NEXT_SYNC1_PULSE_SPEC { +pub struct DcNextSync1PulseSpec; +impl crate::RegisterSpec for DcNextSync1PulseSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_next_sync1_pulse::R`](R) reader structure"] -impl crate::Readable for DC_NEXT_SYNC1_PULSE_SPEC {} +impl crate::Readable for DcNextSync1PulseSpec {} #[doc = "`reset()` method sets DC_NEXT_SYNC1_PULSE[%s] to value 0"] -impl crate::Resettable for DC_NEXT_SYNC1_PULSE_SPEC { +impl crate::Resettable for DcNextSync1PulseSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_pdi_cng_ev_time.rs b/src/ecat0/dc_pdi_cng_ev_time.rs index de7a0c9f..bdbada6c 100644 --- a/src/ecat0/dc_pdi_cng_ev_time.rs +++ b/src/ecat0/dc_pdi_cng_ev_time.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_PDI_CNG_EV_TIME` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PDI_CNG_EV_TIME` reader - Register captures local time when at least one SyncManager asserts an PDI buffer change event"] -pub type PDI_CNG_EV_TIME_R = crate::FieldReader; +pub type PdiCngEvTimeR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Register captures local time when at least one SyncManager asserts an PDI buffer change event"] #[inline(always)] - pub fn pdi_cng_ev_time(&self) -> PDI_CNG_EV_TIME_R { - PDI_CNG_EV_TIME_R::new(self.bits) + pub fn pdi_cng_ev_time(&self) -> PdiCngEvTimeR { + PdiCngEvTimeR::new(self.bits) } } #[doc = "PDI Buffer Change Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pdi_cng_ev_time::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_PDI_CNG_EV_TIME_SPEC; -impl crate::RegisterSpec for DC_PDI_CNG_EV_TIME_SPEC { +pub struct DcPdiCngEvTimeSpec; +impl crate::RegisterSpec for DcPdiCngEvTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_pdi_cng_ev_time::R`](R) reader structure"] -impl crate::Readable for DC_PDI_CNG_EV_TIME_SPEC {} +impl crate::Readable for DcPdiCngEvTimeSpec {} #[doc = "`reset()` method sets DC_PDI_CNG_EV_TIME to value 0"] -impl crate::Resettable for DC_PDI_CNG_EV_TIME_SPEC { +impl crate::Resettable for DcPdiCngEvTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_pdi_start_ev_time.rs b/src/ecat0/dc_pdi_start_ev_time.rs index b9fd7f08..ed6848aa 100644 --- a/src/ecat0/dc_pdi_start_ev_time.rs +++ b/src/ecat0/dc_pdi_start_ev_time.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_PDI_START_EV_TIME` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PDI_START_EV_TIME` reader - Register captures local time when at least one SyncManager asserts an PDI buffer start event"] -pub type PDI_START_EV_TIME_R = crate::FieldReader; +pub type PdiStartEvTimeR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Register captures local time when at least one SyncManager asserts an PDI buffer start event"] #[inline(always)] - pub fn pdi_start_ev_time(&self) -> PDI_START_EV_TIME_R { - PDI_START_EV_TIME_R::new(self.bits) + pub fn pdi_start_ev_time(&self) -> PdiStartEvTimeR { + PdiStartEvTimeR::new(self.bits) } } #[doc = "PDI Buffer Start Event Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pdi_start_ev_time::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_PDI_START_EV_TIME_SPEC; -impl crate::RegisterSpec for DC_PDI_START_EV_TIME_SPEC { +pub struct DcPdiStartEvTimeSpec; +impl crate::RegisterSpec for DcPdiStartEvTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_pdi_start_ev_time::R`](R) reader structure"] -impl crate::Readable for DC_PDI_START_EV_TIME_SPEC {} +impl crate::Readable for DcPdiStartEvTimeSpec {} #[doc = "`reset()` method sets DC_PDI_START_EV_TIME to value 0"] -impl crate::Resettable for DC_PDI_START_EV_TIME_SPEC { +impl crate::Resettable for DcPdiStartEvTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_pulse_len.rs b/src/ecat0/dc_pulse_len.rs index cafc4c48..034c47e8 100644 --- a/src/ecat0/dc_pulse_len.rs +++ b/src/ecat0/dc_pulse_len.rs @@ -1,30 +1,30 @@ #[doc = "Register `DC_PULSE_LEN` reader"] -pub type R = crate::R; -#[doc = "Field `PULS_LENGTH` reader - Pulse length of SyncSignals"] -pub type PULS_LENGTH_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Pulse length of SyncSignals\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PULS_LENGTH_A { +pub enum PulsLength { #[doc = "0: Acknowledge mode: SyncSignal will be cleared by reading SYNC\\[1:0\\] Status register"] - VALUE1 = 0, + Value1 = 0, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PULS_LENGTH_A) -> Self { + fn from(variant: PulsLength) -> Self { variant as _ } } -impl crate::FieldSpec for PULS_LENGTH_A { +impl crate::FieldSpec for PulsLength { type Ux = u16; } -impl PULS_LENGTH_R { +#[doc = "Field `PULS_LENGTH` reader - Pulse length of SyncSignals"] +pub type PulsLengthR = crate::FieldReader; +impl PulsLengthR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PULS_LENGTH_A::VALUE1), + 0 => Some(PulsLength::Value1), _ => None, } } @@ -32,24 +32,24 @@ impl PULS_LENGTH_R { Status register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PULS_LENGTH_A::VALUE1 + *self == PulsLength::Value1 } } impl R { #[doc = "Bits 0:15 - Pulse length of SyncSignals"] #[inline(always)] - pub fn puls_length(&self) -> PULS_LENGTH_R { - PULS_LENGTH_R::new(self.bits) + pub fn puls_length(&self) -> PulsLengthR { + PulsLengthR::new(self.bits) } } #[doc = "Pulse Length of SyncSignals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_pulse_len::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_PULSE_LEN_SPEC; -impl crate::RegisterSpec for DC_PULSE_LEN_SPEC { +pub struct DcPulseLenSpec; +impl crate::RegisterSpec for DcPulseLenSpec { type Ux = u16; } #[doc = "`read()` method returns [`dc_pulse_len::R`](R) reader structure"] -impl crate::Readable for DC_PULSE_LEN_SPEC {} +impl crate::Readable for DcPulseLenSpec {} #[doc = "`reset()` method sets DC_PULSE_LEN to value 0"] -impl crate::Resettable for DC_PULSE_LEN_SPEC { +impl crate::Resettable for DcPulseLenSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/dc_rcv_time_port0.rs b/src/ecat0/dc_rcv_time_port0.rs index 38a61c27..f6243782 100644 --- a/src/ecat0/dc_rcv_time_port0.rs +++ b/src/ecat0/dc_rcv_time_port0.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_RCV_TIME_PORT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LOCAL_TIME_P0` reader - Write by EtherCAT master"] -pub type LOCAL_TIME_P0_R = crate::FieldReader; +pub type LocalTimeP0R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Write by EtherCAT master"] #[inline(always)] - pub fn local_time_p0(&self) -> LOCAL_TIME_P0_R { - LOCAL_TIME_P0_R::new(self.bits) + pub fn local_time_p0(&self) -> LocalTimeP0R { + LocalTimeP0R::new(self.bits) } } #[doc = "Receive Time Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_rcv_time_port0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_RCV_TIME_PORT0_SPEC; -impl crate::RegisterSpec for DC_RCV_TIME_PORT0_SPEC { +pub struct DcRcvTimePort0Spec; +impl crate::RegisterSpec for DcRcvTimePort0Spec { type Ux = u32; } #[doc = "`read()` method returns [`dc_rcv_time_port0::R`](R) reader structure"] -impl crate::Readable for DC_RCV_TIME_PORT0_SPEC {} +impl crate::Readable for DcRcvTimePort0Spec {} #[doc = "`reset()` method sets DC_RCV_TIME_PORT0 to value 0"] -impl crate::Resettable for DC_RCV_TIME_PORT0_SPEC { +impl crate::Resettable for DcRcvTimePort0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_rcv_time_port1.rs b/src/ecat0/dc_rcv_time_port1.rs index e66a5399..572a518e 100644 --- a/src/ecat0/dc_rcv_time_port1.rs +++ b/src/ecat0/dc_rcv_time_port1.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_RCV_TIME_PORT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LOCAL_TIME_P1` reader - Local time of the beginning of a frame"] -pub type LOCAL_TIME_P1_R = crate::FieldReader; +pub type LocalTimeP1R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Local time of the beginning of a frame"] #[inline(always)] - pub fn local_time_p1(&self) -> LOCAL_TIME_P1_R { - LOCAL_TIME_P1_R::new(self.bits) + pub fn local_time_p1(&self) -> LocalTimeP1R { + LocalTimeP1R::new(self.bits) } } #[doc = "Receive Time Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_rcv_time_port1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_RCV_TIME_PORT1_SPEC; -impl crate::RegisterSpec for DC_RCV_TIME_PORT1_SPEC { +pub struct DcRcvTimePort1Spec; +impl crate::RegisterSpec for DcRcvTimePort1Spec { type Ux = u32; } #[doc = "`read()` method returns [`dc_rcv_time_port1::R`](R) reader structure"] -impl crate::Readable for DC_RCV_TIME_PORT1_SPEC {} +impl crate::Readable for DcRcvTimePort1Spec {} #[doc = "`reset()` method sets DC_RCV_TIME_PORT1 to value 0"] -impl crate::Resettable for DC_RCV_TIME_PORT1_SPEC { +impl crate::Resettable for DcRcvTimePort1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_speed_count_diff.rs b/src/ecat0/dc_speed_count_diff.rs index aa5c6f12..72dd6415 100644 --- a/src/ecat0/dc_speed_count_diff.rs +++ b/src/ecat0/dc_speed_count_diff.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_SPEED_COUNT_DIFF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DEVIATION` reader - Representation of the deviation between local clock period and Reference Clock's clock period"] -pub type DEVIATION_R = crate::FieldReader; +pub type DeviationR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Representation of the deviation between local clock period and Reference Clock's clock period"] #[inline(always)] - pub fn deviation(&self) -> DEVIATION_R { - DEVIATION_R::new(self.bits) + pub fn deviation(&self) -> DeviationR { + DeviationR::new(self.bits) } } #[doc = "Speed Counter Diff\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_diff::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SPEED_COUNT_DIFF_SPEC; -impl crate::RegisterSpec for DC_SPEED_COUNT_DIFF_SPEC { +pub struct DcSpeedCountDiffSpec; +impl crate::RegisterSpec for DcSpeedCountDiffSpec { type Ux = u16; } #[doc = "`read()` method returns [`dc_speed_count_diff::R`](R) reader structure"] -impl crate::Readable for DC_SPEED_COUNT_DIFF_SPEC {} +impl crate::Readable for DcSpeedCountDiffSpec {} #[doc = "`reset()` method sets DC_SPEED_COUNT_DIFF to value 0"] -impl crate::Resettable for DC_SPEED_COUNT_DIFF_SPEC { +impl crate::Resettable for DcSpeedCountDiffSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/dc_speed_count_fil_depth.rs b/src/ecat0/dc_speed_count_fil_depth.rs index eb41261a..b39f1a2e 100644 --- a/src/ecat0/dc_speed_count_fil_depth.rs +++ b/src/ecat0/dc_speed_count_fil_depth.rs @@ -1,49 +1,40 @@ #[doc = "Register `DC_SPEED_COUNT_FIL_DEPTH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SPEED_COUNT_FIL_DEPTH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FILTER_DEPTH` reader - Filter depth for averaging the clock period deviation"] -pub type FILTER_DEPTH_R = crate::FieldReader; +pub type FilterDepthR = crate::FieldReader; #[doc = "Field `FILTER_DEPTH` writer - Filter depth for averaging the clock period deviation"] -pub type FILTER_DEPTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type FilterDepthW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Filter depth for averaging the clock period deviation"] #[inline(always)] - pub fn filter_depth(&self) -> FILTER_DEPTH_R { - FILTER_DEPTH_R::new(self.bits & 0x0f) + pub fn filter_depth(&self) -> FilterDepthR { + FilterDepthR::new(self.bits & 0x0f) } } impl W { #[doc = "Bits 0:3 - Filter depth for averaging the clock period deviation"] #[inline(always)] #[must_use] - pub fn filter_depth(&mut self) -> FILTER_DEPTH_W { - FILTER_DEPTH_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn filter_depth(&mut self) -> FilterDepthW { + FilterDepthW::new(self, 0) } } #[doc = "Speed Counter Filter Depth\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_fil_depth::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_speed_count_fil_depth::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SPEED_COUNT_FIL_DEPTH_SPEC; -impl crate::RegisterSpec for DC_SPEED_COUNT_FIL_DEPTH_SPEC { +pub struct DcSpeedCountFilDepthSpec; +impl crate::RegisterSpec for DcSpeedCountFilDepthSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_speed_count_fil_depth::R`](R) reader structure"] -impl crate::Readable for DC_SPEED_COUNT_FIL_DEPTH_SPEC {} +impl crate::Readable for DcSpeedCountFilDepthSpec {} #[doc = "`write(|w| ..)` method takes [`dc_speed_count_fil_depth::W`](W) writer structure"] -impl crate::Writable for DC_SPEED_COUNT_FIL_DEPTH_SPEC { +impl crate::Writable for DcSpeedCountFilDepthSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DC_SPEED_COUNT_FIL_DEPTH to value 0x0c"] -impl crate::Resettable for DC_SPEED_COUNT_FIL_DEPTH_SPEC { +impl crate::Resettable for DcSpeedCountFilDepthSpec { const RESET_VALUE: u8 = 0x0c; } diff --git a/src/ecat0/dc_speed_count_start.rs b/src/ecat0/dc_speed_count_start.rs index 55e76b0d..ea32a31f 100644 --- a/src/ecat0/dc_speed_count_start.rs +++ b/src/ecat0/dc_speed_count_start.rs @@ -1,49 +1,40 @@ #[doc = "Register `DC_SPEED_COUNT_START` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SPEED_COUNT_START` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `COUNT_START` reader - Bandwidth for adjustment of local copy of System Time"] -pub type COUNT_START_R = crate::FieldReader; +pub type CountStartR = crate::FieldReader; #[doc = "Field `COUNT_START` writer - Bandwidth for adjustment of local copy of System Time"] -pub type COUNT_START_W<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; +pub type CountStartW<'a, REG> = crate::FieldWriter<'a, REG, 15, u16>; impl R { #[doc = "Bits 0:14 - Bandwidth for adjustment of local copy of System Time"] #[inline(always)] - pub fn count_start(&self) -> COUNT_START_R { - COUNT_START_R::new(self.bits & 0x7fff) + pub fn count_start(&self) -> CountStartR { + CountStartR::new(self.bits & 0x7fff) } } impl W { #[doc = "Bits 0:14 - Bandwidth for adjustment of local copy of System Time"] #[inline(always)] #[must_use] - pub fn count_start(&mut self) -> COUNT_START_W { - COUNT_START_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn count_start(&mut self) -> CountStartW { + CountStartW::new(self, 0) } } #[doc = "Speed Counter Start\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_speed_count_start::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_speed_count_start::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SPEED_COUNT_START_SPEC; -impl crate::RegisterSpec for DC_SPEED_COUNT_START_SPEC { +pub struct DcSpeedCountStartSpec; +impl crate::RegisterSpec for DcSpeedCountStartSpec { type Ux = u16; } #[doc = "`read()` method returns [`dc_speed_count_start::R`](R) reader structure"] -impl crate::Readable for DC_SPEED_COUNT_START_SPEC {} +impl crate::Readable for DcSpeedCountStartSpec {} #[doc = "`write(|w| ..)` method takes [`dc_speed_count_start::W`](W) writer structure"] -impl crate::Writable for DC_SPEED_COUNT_START_SPEC { +impl crate::Writable for DcSpeedCountStartSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets DC_SPEED_COUNT_START to value 0x1000"] -impl crate::Resettable for DC_SPEED_COUNT_START_SPEC { +impl crate::Resettable for DcSpeedCountStartSpec { const RESET_VALUE: u16 = 0x1000; } diff --git a/src/ecat0/dc_sync0_cyc_time.rs b/src/ecat0/dc_sync0_cyc_time.rs index 86e0a7b6..10babf01 100644 --- a/src/ecat0/dc_sync0_cyc_time.rs +++ b/src/ecat0/dc_sync0_cyc_time.rs @@ -1,43 +1,43 @@ #[doc = "Register `DC_SYNC0_CYC_TIME` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SYNC0_CYC_TIME` writer"] -pub type W = crate::W; -#[doc = "Field `TIME_BETWEEN_SYNC0` reader - Time between two consecutive SYNC0 pulses"] -pub type TIME_BETWEEN_SYNC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Time between two consecutive SYNC0 pulses\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum TIME_BETWEEN_SYNC0_A { +pub enum TimeBetweenSync0 { #[doc = "0: Single shot mode, generate only one SYNC0 pulse"] - VALUE1 = 0, + Value1 = 0, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: TIME_BETWEEN_SYNC0_A) -> Self { + fn from(variant: TimeBetweenSync0) -> Self { variant as _ } } -impl crate::FieldSpec for TIME_BETWEEN_SYNC0_A { +impl crate::FieldSpec for TimeBetweenSync0 { type Ux = u32; } -impl TIME_BETWEEN_SYNC0_R { +#[doc = "Field `TIME_BETWEEN_SYNC0` reader - Time between two consecutive SYNC0 pulses"] +pub type TimeBetweenSync0R = crate::FieldReader; +impl TimeBetweenSync0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TIME_BETWEEN_SYNC0_A::VALUE1), + 0 => Some(TimeBetweenSync0::Value1), _ => None, } } #[doc = "Single shot mode, generate only one SYNC0 pulse"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIME_BETWEEN_SYNC0_A::VALUE1 + *self == TimeBetweenSync0::Value1 } } #[doc = "Field `TIME_BETWEEN_SYNC0` writer - Time between two consecutive SYNC0 pulses"] -pub type TIME_BETWEEN_SYNC0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, TIME_BETWEEN_SYNC0_A>; -impl<'a, REG> TIME_BETWEEN_SYNC0_W<'a, REG> +pub type TimeBetweenSync0W<'a, REG> = crate::FieldWriter<'a, REG, 32, TimeBetweenSync0>; +impl<'a, REG> TimeBetweenSync0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -45,47 +45,38 @@ where #[doc = "Single shot mode, generate only one SYNC0 pulse"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TIME_BETWEEN_SYNC0_A::VALUE1) + self.variant(TimeBetweenSync0::Value1) } } impl R { #[doc = "Bits 0:31 - Time between two consecutive SYNC0 pulses"] #[inline(always)] - pub fn time_between_sync0(&self) -> TIME_BETWEEN_SYNC0_R { - TIME_BETWEEN_SYNC0_R::new(self.bits) + pub fn time_between_sync0(&self) -> TimeBetweenSync0R { + TimeBetweenSync0R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Time between two consecutive SYNC0 pulses"] #[inline(always)] #[must_use] - pub fn time_between_sync0(&mut self) -> TIME_BETWEEN_SYNC0_W { - TIME_BETWEEN_SYNC0_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn time_between_sync0(&mut self) -> TimeBetweenSync0W { + TimeBetweenSync0W::new(self, 0) } } #[doc = "SYNC0 Cycle Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync0_cyc_time::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sync0_cyc_time::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYNC0_CYC_TIME_SPEC; -impl crate::RegisterSpec for DC_SYNC0_CYC_TIME_SPEC { +pub struct DcSync0CycTimeSpec; +impl crate::RegisterSpec for DcSync0CycTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_sync0_cyc_time::R`](R) reader structure"] -impl crate::Readable for DC_SYNC0_CYC_TIME_SPEC {} +impl crate::Readable for DcSync0CycTimeSpec {} #[doc = "`write(|w| ..)` method takes [`dc_sync0_cyc_time::W`](W) writer structure"] -impl crate::Writable for DC_SYNC0_CYC_TIME_SPEC { +impl crate::Writable for DcSync0CycTimeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_SYNC0_CYC_TIME to value 0"] -impl crate::Resettable for DC_SYNC0_CYC_TIME_SPEC { +impl crate::Resettable for DcSync0CycTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_sync0_stat.rs b/src/ecat0/dc_sync0_stat.rs index 0135b6a0..430ee9fc 100644 --- a/src/ecat0/dc_sync0_stat.rs +++ b/src/ecat0/dc_sync0_stat.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_SYNC0_STAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `S0_STATE` reader - SYNC0 state for Acknowledge mode"] -pub type S0_STATE_R = crate::BitReader; +pub type S0StateR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNC0 state for Acknowledge mode"] #[inline(always)] - pub fn s0_state(&self) -> S0_STATE_R { - S0_STATE_R::new((self.bits & 1) != 0) + pub fn s0_state(&self) -> S0StateR { + S0StateR::new((self.bits & 1) != 0) } } #[doc = "SYNC0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync0_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYNC0_STAT_SPEC; -impl crate::RegisterSpec for DC_SYNC0_STAT_SPEC { +pub struct DcSync0StatSpec; +impl crate::RegisterSpec for DcSync0StatSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_sync0_stat::R`](R) reader structure"] -impl crate::Readable for DC_SYNC0_STAT_SPEC {} +impl crate::Readable for DcSync0StatSpec {} #[doc = "`reset()` method sets DC_SYNC0_STAT to value 0"] -impl crate::Resettable for DC_SYNC0_STAT_SPEC { +impl crate::Resettable for DcSync0StatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_sync1_cyc_time.rs b/src/ecat0/dc_sync1_cyc_time.rs index 773ad384..69540183 100644 --- a/src/ecat0/dc_sync1_cyc_time.rs +++ b/src/ecat0/dc_sync1_cyc_time.rs @@ -1,49 +1,40 @@ #[doc = "Register `DC_SYNC1_CYC_TIME` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SYNC1_CYC_TIME` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TIME_SYNC1_SYNC0` reader - Time between SYNC1 pulses and SYNC0 pulse"] -pub type TIME_SYNC1_SYNC0_R = crate::FieldReader; +pub type TimeSync1Sync0R = crate::FieldReader; #[doc = "Field `TIME_SYNC1_SYNC0` writer - Time between SYNC1 pulses and SYNC0 pulse"] -pub type TIME_SYNC1_SYNC0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type TimeSync1Sync0W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Time between SYNC1 pulses and SYNC0 pulse"] #[inline(always)] - pub fn time_sync1_sync0(&self) -> TIME_SYNC1_SYNC0_R { - TIME_SYNC1_SYNC0_R::new(self.bits) + pub fn time_sync1_sync0(&self) -> TimeSync1Sync0R { + TimeSync1Sync0R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Time between SYNC1 pulses and SYNC0 pulse"] #[inline(always)] #[must_use] - pub fn time_sync1_sync0(&mut self) -> TIME_SYNC1_SYNC0_W { - TIME_SYNC1_SYNC0_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn time_sync1_sync0(&mut self) -> TimeSync1Sync0W { + TimeSync1Sync0W::new(self, 0) } } #[doc = "SYNC1 Cycle Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync1_cyc_time::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sync1_cyc_time::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYNC1_CYC_TIME_SPEC; -impl crate::RegisterSpec for DC_SYNC1_CYC_TIME_SPEC { +pub struct DcSync1CycTimeSpec; +impl crate::RegisterSpec for DcSync1CycTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_sync1_cyc_time::R`](R) reader structure"] -impl crate::Readable for DC_SYNC1_CYC_TIME_SPEC {} +impl crate::Readable for DcSync1CycTimeSpec {} #[doc = "`write(|w| ..)` method takes [`dc_sync1_cyc_time::W`](W) writer structure"] -impl crate::Writable for DC_SYNC1_CYC_TIME_SPEC { +impl crate::Writable for DcSync1CycTimeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_SYNC1_CYC_TIME to value 0"] -impl crate::Resettable for DC_SYNC1_CYC_TIME_SPEC { +impl crate::Resettable for DcSync1CycTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_sync1_stat.rs b/src/ecat0/dc_sync1_stat.rs index f52ad68e..710f72d7 100644 --- a/src/ecat0/dc_sync1_stat.rs +++ b/src/ecat0/dc_sync1_stat.rs @@ -1,22 +1,22 @@ #[doc = "Register `DC_SYNC1_STAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `S1_STATE` reader - SYNC1 state for Acknowledge mode"] -pub type S1_STATE_R = crate::BitReader; +pub type S1StateR = crate::BitReader; impl R { #[doc = "Bit 0 - SYNC1 state for Acknowledge mode"] #[inline(always)] - pub fn s1_state(&self) -> S1_STATE_R { - S1_STATE_R::new((self.bits & 1) != 0) + pub fn s1_state(&self) -> S1StateR { + S1StateR::new((self.bits & 1) != 0) } } #[doc = "SYNC1 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sync1_stat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYNC1_STAT_SPEC; -impl crate::RegisterSpec for DC_SYNC1_STAT_SPEC { +pub struct DcSync1StatSpec; +impl crate::RegisterSpec for DcSync1StatSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_sync1_stat::R`](R) reader structure"] -impl crate::Readable for DC_SYNC1_STAT_SPEC {} +impl crate::Readable for DcSync1StatSpec {} #[doc = "`reset()` method sets DC_SYNC1_STAT to value 0"] -impl crate::Resettable for DC_SYNC1_STAT_SPEC { +impl crate::Resettable for DcSync1StatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/dc_sys_time_delay.rs b/src/ecat0/dc_sys_time_delay.rs index fefaf96b..88e0fc86 100644 --- a/src/ecat0/dc_sys_time_delay.rs +++ b/src/ecat0/dc_sys_time_delay.rs @@ -1,49 +1,40 @@ #[doc = "Register `DC_SYS_TIME_DELAY` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SYS_TIME_DELAY` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CLK_DELAY` reader - Delay between Reference Clock and the ESC"] -pub type CLK_DELAY_R = crate::FieldReader; +pub type ClkDelayR = crate::FieldReader; #[doc = "Field `CLK_DELAY` writer - Delay between Reference Clock and the ESC"] -pub type CLK_DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type ClkDelayW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Delay between Reference Clock and the ESC"] #[inline(always)] - pub fn clk_delay(&self) -> CLK_DELAY_R { - CLK_DELAY_R::new(self.bits) + pub fn clk_delay(&self) -> ClkDelayR { + ClkDelayR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Delay between Reference Clock and the ESC"] #[inline(always)] #[must_use] - pub fn clk_delay(&mut self) -> CLK_DELAY_W { - CLK_DELAY_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clk_delay(&mut self) -> ClkDelayW { + ClkDelayW::new(self, 0) } } #[doc = "System Time Delay\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_delay::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_delay::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYS_TIME_DELAY_SPEC; -impl crate::RegisterSpec for DC_SYS_TIME_DELAY_SPEC { +pub struct DcSysTimeDelaySpec; +impl crate::RegisterSpec for DcSysTimeDelaySpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_sys_time_delay::R`](R) reader structure"] -impl crate::Readable for DC_SYS_TIME_DELAY_SPEC {} +impl crate::Readable for DcSysTimeDelaySpec {} #[doc = "`write(|w| ..)` method takes [`dc_sys_time_delay::W`](W) writer structure"] -impl crate::Writable for DC_SYS_TIME_DELAY_SPEC { +impl crate::Writable for DcSysTimeDelaySpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_SYS_TIME_DELAY to value 0"] -impl crate::Resettable for DC_SYS_TIME_DELAY_SPEC { +impl crate::Resettable for DcSysTimeDelaySpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_sys_time_diff.rs b/src/ecat0/dc_sys_time_diff.rs index 528d5de2..724b8016 100644 --- a/src/ecat0/dc_sys_time_diff.rs +++ b/src/ecat0/dc_sys_time_diff.rs @@ -1,63 +1,63 @@ #[doc = "Register `DC_SYS_TIME_DIFF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TIME_DIF` reader - Mean difference between local copy of System Time and received System Time values"] -pub type TIME_DIF_R = crate::FieldReader; -#[doc = "Field `CPY` reader - Local copy of System Time"] -pub type CPY_R = crate::BitReader; +pub type TimeDifR = crate::FieldReader; #[doc = "Local copy of System Time\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CPY_A { +pub enum Cpy { #[doc = "0: Greater than or equal received System Time"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Smaller than received System Time"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CPY_A) -> Self { + fn from(variant: Cpy) -> Self { variant as u8 != 0 } } -impl CPY_R { +#[doc = "Field `CPY` reader - Local copy of System Time"] +pub type CpyR = crate::BitReader; +impl CpyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CPY_A { + pub const fn variant(&self) -> Cpy { match self.bits { - false => CPY_A::VALUE1, - true => CPY_A::VALUE2, + false => Cpy::Value1, + true => Cpy::Value2, } } #[doc = "Greater than or equal received System Time"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CPY_A::VALUE1 + *self == Cpy::Value1 } #[doc = "Smaller than received System Time"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CPY_A::VALUE2 + *self == Cpy::Value2 } } impl R { #[doc = "Bits 0:30 - Mean difference between local copy of System Time and received System Time values"] #[inline(always)] - pub fn time_dif(&self) -> TIME_DIF_R { - TIME_DIF_R::new(self.bits & 0x7fff_ffff) + pub fn time_dif(&self) -> TimeDifR { + TimeDifR::new(self.bits & 0x7fff_ffff) } #[doc = "Bit 31 - Local copy of System Time"] #[inline(always)] - pub fn cpy(&self) -> CPY_R { - CPY_R::new(((self.bits >> 31) & 1) != 0) + pub fn cpy(&self) -> CpyR { + CpyR::new(((self.bits >> 31) & 1) != 0) } } #[doc = "System Time Difference\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_diff::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYS_TIME_DIFF_SPEC; -impl crate::RegisterSpec for DC_SYS_TIME_DIFF_SPEC { +pub struct DcSysTimeDiffSpec; +impl crate::RegisterSpec for DcSysTimeDiffSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_sys_time_diff::R`](R) reader structure"] -impl crate::Readable for DC_SYS_TIME_DIFF_SPEC {} +impl crate::Readable for DcSysTimeDiffSpec {} #[doc = "`reset()` method sets DC_SYS_TIME_DIFF to value 0"] -impl crate::Resettable for DC_SYS_TIME_DIFF_SPEC { +impl crate::Resettable for DcSysTimeDiffSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/dc_sys_time_fil_depth.rs b/src/ecat0/dc_sys_time_fil_depth.rs index cb881d48..9bbf0c00 100644 --- a/src/ecat0/dc_sys_time_fil_depth.rs +++ b/src/ecat0/dc_sys_time_fil_depth.rs @@ -1,49 +1,40 @@ #[doc = "Register `DC_SYS_TIME_FIL_DEPTH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SYS_TIME_FIL_DEPTH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FILTER_DEPTH` reader - Filter depth for averaging the received System Time deviation"] -pub type FILTER_DEPTH_R = crate::FieldReader; +pub type FilterDepthR = crate::FieldReader; #[doc = "Field `FILTER_DEPTH` writer - Filter depth for averaging the received System Time deviation"] -pub type FILTER_DEPTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type FilterDepthW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Filter depth for averaging the received System Time deviation"] #[inline(always)] - pub fn filter_depth(&self) -> FILTER_DEPTH_R { - FILTER_DEPTH_R::new(self.bits & 0x0f) + pub fn filter_depth(&self) -> FilterDepthR { + FilterDepthR::new(self.bits & 0x0f) } } impl W { #[doc = "Bits 0:3 - Filter depth for averaging the received System Time deviation"] #[inline(always)] #[must_use] - pub fn filter_depth(&mut self) -> FILTER_DEPTH_W { - FILTER_DEPTH_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn filter_depth(&mut self) -> FilterDepthW { + FilterDepthW::new(self, 0) } } #[doc = "System Time Difference Filter Depth\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_fil_depth::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_fil_depth::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYS_TIME_FIL_DEPTH_SPEC; -impl crate::RegisterSpec for DC_SYS_TIME_FIL_DEPTH_SPEC { +pub struct DcSysTimeFilDepthSpec; +impl crate::RegisterSpec for DcSysTimeFilDepthSpec { type Ux = u8; } #[doc = "`read()` method returns [`dc_sys_time_fil_depth::R`](R) reader structure"] -impl crate::Readable for DC_SYS_TIME_FIL_DEPTH_SPEC {} +impl crate::Readable for DcSysTimeFilDepthSpec {} #[doc = "`write(|w| ..)` method takes [`dc_sys_time_fil_depth::W`](W) writer structure"] -impl crate::Writable for DC_SYS_TIME_FIL_DEPTH_SPEC { +impl crate::Writable for DcSysTimeFilDepthSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets DC_SYS_TIME_FIL_DEPTH to value 0x04"] -impl crate::Resettable for DC_SYS_TIME_FIL_DEPTH_SPEC { +impl crate::Resettable for DcSysTimeFilDepthSpec { const RESET_VALUE: u8 = 0x04; } diff --git a/src/ecat0/dc_sys_time_offset.rs b/src/ecat0/dc_sys_time_offset.rs index cfc31788..127ecf83 100644 --- a/src/ecat0/dc_sys_time_offset.rs +++ b/src/ecat0/dc_sys_time_offset.rs @@ -1,50 +1,41 @@ #[doc = "Register `DC_SYS_TIME_OFFSET[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC_SYS_TIME_OFFSET[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DC_SYS_TIME_OFFSET` reader - Difference between local time and System Time"] -pub type DC_SYS_TIME_OFFSET_R = crate::FieldReader; +pub type DcSysTimeOffsetR = crate::FieldReader; #[doc = "Field `DC_SYS_TIME_OFFSET` writer - Difference between local time and System Time"] -pub type DC_SYS_TIME_OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DcSysTimeOffsetW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Difference between local time and System Time"] #[inline(always)] - pub fn dc_sys_time_offset(&self) -> DC_SYS_TIME_OFFSET_R { - DC_SYS_TIME_OFFSET_R::new(self.bits) + pub fn dc_sys_time_offset(&self) -> DcSysTimeOffsetR { + DcSysTimeOffsetR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Difference between local time and System Time"] #[inline(always)] #[must_use] - pub fn dc_sys_time_offset(&mut self) -> DC_SYS_TIME_OFFSET_W { - DC_SYS_TIME_OFFSET_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dc_sys_time_offset(&mut self) -> DcSysTimeOffsetW { + DcSysTimeOffsetW::new(self, 0) } } #[doc = "Difference between local time and System Time\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc_sys_time_offset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc_sys_time_offset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DC_SYS_TIME_OFFSET_SPEC; -impl crate::RegisterSpec for DC_SYS_TIME_OFFSET_SPEC { +pub struct DcSysTimeOffsetSpec; +impl crate::RegisterSpec for DcSysTimeOffsetSpec { type Ux = u32; } #[doc = "`read()` method returns [`dc_sys_time_offset::R`](R) reader structure"] -impl crate::Readable for DC_SYS_TIME_OFFSET_SPEC {} +impl crate::Readable for DcSysTimeOffsetSpec {} #[doc = "`write(|w| ..)` method takes [`dc_sys_time_offset::W`](W) writer structure"] -impl crate::Writable for DC_SYS_TIME_OFFSET_SPEC { +impl crate::Writable for DcSysTimeOffsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_SYS_TIME_OFFSET[%s] to value 0"] -impl crate::Resettable for DC_SYS_TIME_OFFSET_SPEC { +impl crate::Resettable for DcSysTimeOffsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/eep_adr.rs b/src/ecat0/eep_adr.rs index 3e124c40..c6d67d4b 100644 --- a/src/ecat0/eep_adr.rs +++ b/src/ecat0/eep_adr.rs @@ -1,51 +1,51 @@ #[doc = "Register `EEP_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EEP_ADR` writer"] -pub type W = crate::W; -#[doc = "Field `EEPROM_ADDR` reader - EEPROM Address"] -pub type EEPROM_ADDR_R = crate::FieldReader; +pub type W = crate::W; #[doc = "EEPROM Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum EEPROM_ADDR_A { +pub enum EepromAddr { #[doc = "0: First word (= 16 bits)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Second word"] - VALUE2 = 1, + Value2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: EEPROM_ADDR_A) -> Self { + fn from(variant: EepromAddr) -> Self { variant as _ } } -impl crate::FieldSpec for EEPROM_ADDR_A { +impl crate::FieldSpec for EepromAddr { type Ux = u32; } -impl EEPROM_ADDR_R { +#[doc = "Field `EEPROM_ADDR` reader - EEPROM Address"] +pub type EepromAddrR = crate::FieldReader; +impl EepromAddrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(EEPROM_ADDR_A::VALUE1), - 1 => Some(EEPROM_ADDR_A::VALUE2), + 0 => Some(EepromAddr::Value1), + 1 => Some(EepromAddr::Value2), _ => None, } } #[doc = "First word (= 16 bits)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EEPROM_ADDR_A::VALUE1 + *self == EepromAddr::Value1 } #[doc = "Second word"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EEPROM_ADDR_A::VALUE2 + *self == EepromAddr::Value2 } } #[doc = "Field `EEPROM_ADDR` writer - EEPROM Address"] -pub type EEPROM_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, EEPROM_ADDR_A>; -impl<'a, REG> EEPROM_ADDR_W<'a, REG> +pub type EepromAddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, EepromAddr>; +impl<'a, REG> EepromAddrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "First word (= 16 bits)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EEPROM_ADDR_A::VALUE1) + self.variant(EepromAddr::Value1) } #[doc = "Second word"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EEPROM_ADDR_A::VALUE2) + self.variant(EepromAddr::Value2) } } impl R { #[doc = "Bits 0:31 - EEPROM Address"] #[inline(always)] - pub fn eeprom_addr(&self) -> EEPROM_ADDR_R { - EEPROM_ADDR_R::new(self.bits) + pub fn eeprom_addr(&self) -> EepromAddrR { + EepromAddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - EEPROM Address"] #[inline(always)] #[must_use] - pub fn eeprom_addr(&mut self) -> EEPROM_ADDR_W { - EEPROM_ADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eeprom_addr(&mut self) -> EepromAddrW { + EepromAddrW::new(self, 0) } } #[doc = "EEPROM Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_adr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_adr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EEP_ADR_SPEC; -impl crate::RegisterSpec for EEP_ADR_SPEC { +pub struct EepAdrSpec; +impl crate::RegisterSpec for EepAdrSpec { type Ux = u32; } #[doc = "`read()` method returns [`eep_adr::R`](R) reader structure"] -impl crate::Readable for EEP_ADR_SPEC {} +impl crate::Readable for EepAdrSpec {} #[doc = "`write(|w| ..)` method takes [`eep_adr::W`](W) writer structure"] -impl crate::Writable for EEP_ADR_SPEC { +impl crate::Writable for EepAdrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EEP_ADR to value 0"] -impl crate::Resettable for EEP_ADR_SPEC { +impl crate::Resettable for EepAdrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/eep_conf.rs b/src/ecat0/eep_conf.rs index db5292fb..d8e292ce 100644 --- a/src/ecat0/eep_conf.rs +++ b/src/ecat0/eep_conf.rs @@ -1,97 +1,97 @@ #[doc = "Register `EEP_CONF` reader"] -pub type R = crate::R; -#[doc = "Field `TO_PDI` reader - EEPROM control is offered to PDI"] -pub type TO_PDI_R = crate::BitReader; +pub type R = crate::R; #[doc = "EEPROM control is offered to PDI\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TO_PDI_A { +pub enum ToPdi { #[doc = "0: No"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Yes (PDI has EEPROM control)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TO_PDI_A) -> Self { + fn from(variant: ToPdi) -> Self { variant as u8 != 0 } } -impl TO_PDI_R { +#[doc = "Field `TO_PDI` reader - EEPROM control is offered to PDI"] +pub type ToPdiR = crate::BitReader; +impl ToPdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TO_PDI_A { + pub const fn variant(&self) -> ToPdi { match self.bits { - false => TO_PDI_A::VALUE1, - true => TO_PDI_A::VALUE2, + false => ToPdi::Value1, + true => ToPdi::Value2, } } #[doc = "No"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TO_PDI_A::VALUE1 + *self == ToPdi::Value1 } #[doc = "Yes (PDI has EEPROM control)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TO_PDI_A::VALUE2 + *self == ToPdi::Value2 } } -#[doc = "Field `FORCE` reader - Force ECAT access"] -pub type FORCE_R = crate::BitReader; #[doc = "Force ECAT access\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCE_A { +pub enum Force { #[doc = "0: Do not change Bit 501.0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset Bit 501.0 to 0"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCE_A) -> Self { + fn from(variant: Force) -> Self { variant as u8 != 0 } } -impl FORCE_R { +#[doc = "Field `FORCE` reader - Force ECAT access"] +pub type ForceR = crate::BitReader; +impl ForceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FORCE_A { + pub const fn variant(&self) -> Force { match self.bits { - false => FORCE_A::VALUE1, - true => FORCE_A::VALUE2, + false => Force::Value1, + true => Force::Value2, } } #[doc = "Do not change Bit 501.0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FORCE_A::VALUE1 + *self == Force::Value1 } #[doc = "Reset Bit 501.0 to 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FORCE_A::VALUE2 + *self == Force::Value2 } } impl R { #[doc = "Bit 0 - EEPROM control is offered to PDI"] #[inline(always)] - pub fn to_pdi(&self) -> TO_PDI_R { - TO_PDI_R::new((self.bits & 1) != 0) + pub fn to_pdi(&self) -> ToPdiR { + ToPdiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Force ECAT access"] #[inline(always)] - pub fn force(&self) -> FORCE_R { - FORCE_R::new(((self.bits >> 1) & 1) != 0) + pub fn force(&self) -> ForceR { + ForceR::new(((self.bits >> 1) & 1) != 0) } } #[doc = "EEPROM Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_conf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EEP_CONF_SPEC; -impl crate::RegisterSpec for EEP_CONF_SPEC { +pub struct EepConfSpec; +impl crate::RegisterSpec for EepConfSpec { type Ux = u8; } #[doc = "`read()` method returns [`eep_conf::R`](R) reader structure"] -impl crate::Readable for EEP_CONF_SPEC {} +impl crate::Readable for EepConfSpec {} #[doc = "`reset()` method sets EEP_CONF to value 0"] -impl crate::Resettable for EEP_CONF_SPEC { +impl crate::Resettable for EepConfSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/eep_cont_stat.rs b/src/ecat0/eep_cont_stat.rs index a099a817..977e9687 100644 --- a/src/ecat0/eep_cont_stat.rs +++ b/src/ecat0/eep_cont_stat.rs @@ -1,211 +1,211 @@ #[doc = "Register `EEP_CONT_STAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EEP_CONT_STAT` writer"] -pub type W = crate::W; -#[doc = "Field `W_EN` reader - ECAT write enable"] -pub type W_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "ECAT write enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum W_EN_A { +pub enum WEn { #[doc = "0: Write requests are disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write requests are enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: W_EN_A) -> Self { + fn from(variant: WEn) -> Self { variant as u8 != 0 } } -impl W_EN_R { +#[doc = "Field `W_EN` reader - ECAT write enable"] +pub type WEnR = crate::BitReader; +impl WEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> W_EN_A { + pub const fn variant(&self) -> WEn { match self.bits { - false => W_EN_A::VALUE1, - true => W_EN_A::VALUE2, + false => WEn::Value1, + true => WEn::Value2, } } #[doc = "Write requests are disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == W_EN_A::VALUE1 + *self == WEn::Value1 } #[doc = "Write requests are enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == W_EN_A::VALUE2 + *self == WEn::Value2 } } -#[doc = "Field `EMUL` reader - EEPROM emulation"] -pub type EMUL_R = crate::BitReader; #[doc = "EEPROM emulation\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMUL_A { +pub enum Emul { #[doc = "0: Normal operation (I2C interface used)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI emulates EEPROM (I2C not used)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMUL_A) -> Self { + fn from(variant: Emul) -> Self { variant as u8 != 0 } } -impl EMUL_R { +#[doc = "Field `EMUL` reader - EEPROM emulation"] +pub type EmulR = crate::BitReader; +impl EmulR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMUL_A { + pub const fn variant(&self) -> Emul { match self.bits { - false => EMUL_A::VALUE1, - true => EMUL_A::VALUE2, + false => Emul::Value1, + true => Emul::Value2, } } #[doc = "Normal operation (I2C interface used)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMUL_A::VALUE1 + *self == Emul::Value1 } #[doc = "PDI emulates EEPROM (I2C not used)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMUL_A::VALUE2 + *self == Emul::Value2 } } -#[doc = "Field `BYTES` reader - Supported number of EEPROM read bytes"] -pub type BYTES_R = crate::BitReader; #[doc = "Supported number of EEPROM read bytes\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BYTES_A { +pub enum Bytes { #[doc = "0: 4 Bytes"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 8 Bytes"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BYTES_A) -> Self { + fn from(variant: Bytes) -> Self { variant as u8 != 0 } } -impl BYTES_R { +#[doc = "Field `BYTES` reader - Supported number of EEPROM read bytes"] +pub type BytesR = crate::BitReader; +impl BytesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BYTES_A { + pub const fn variant(&self) -> Bytes { match self.bits { - false => BYTES_A::VALUE1, - true => BYTES_A::VALUE2, + false => Bytes::Value1, + true => Bytes::Value2, } } #[doc = "4 Bytes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BYTES_A::VALUE1 + *self == Bytes::Value1 } #[doc = "8 Bytes"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BYTES_A::VALUE2 + *self == Bytes::Value2 } } -#[doc = "Field `ALG` reader - Selected EEPROM Algorithm"] -pub type ALG_R = crate::BitReader; #[doc = "Selected EEPROM Algorithm\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALG_A { +pub enum Alg { #[doc = "0: 1 address byte (1 KBit - 16 KBit EEPROMs)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 address bytes (32 KBit - 4 MBit EEPROMs)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALG_A) -> Self { + fn from(variant: Alg) -> Self { variant as u8 != 0 } } -impl ALG_R { +#[doc = "Field `ALG` reader - Selected EEPROM Algorithm"] +pub type AlgR = crate::BitReader; +impl AlgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALG_A { + pub const fn variant(&self) -> Alg { match self.bits { - false => ALG_A::VALUE1, - true => ALG_A::VALUE2, + false => Alg::Value1, + true => Alg::Value2, } } #[doc = "1 address byte (1 KBit - 16 KBit EEPROMs)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALG_A::VALUE1 + *self == Alg::Value1 } #[doc = "2 address bytes (32 KBit - 4 MBit EEPROMs)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALG_A::VALUE2 + *self == Alg::Value2 } } -#[doc = "Field `CMD_REG` reader - Command register"] -pub type CMD_REG_R = crate::FieldReader; #[doc = "Command register\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMD_REG_A { +pub enum CmdReg { #[doc = "0: No command/EEPROM idle (clear error bits)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Write"] - VALUE3 = 2, + Value3 = 2, #[doc = "4: Reload"] - VALUE4 = 4, + Value4 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMD_REG_A) -> Self { + fn from(variant: CmdReg) -> Self { variant as _ } } -impl crate::FieldSpec for CMD_REG_A { +impl crate::FieldSpec for CmdReg { type Ux = u8; } -impl CMD_REG_R { +#[doc = "Field `CMD_REG` reader - Command register"] +pub type CmdRegR = crate::FieldReader; +impl CmdRegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMD_REG_A::VALUE1), - 1 => Some(CMD_REG_A::VALUE2), - 2 => Some(CMD_REG_A::VALUE3), - 4 => Some(CMD_REG_A::VALUE4), + 0 => Some(CmdReg::Value1), + 1 => Some(CmdReg::Value2), + 2 => Some(CmdReg::Value3), + 4 => Some(CmdReg::Value4), _ => None, } } #[doc = "No command/EEPROM idle (clear error bits)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_REG_A::VALUE1 + *self == CmdReg::Value1 } #[doc = "Read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_REG_A::VALUE2 + *self == CmdReg::Value2 } #[doc = "Write"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMD_REG_A::VALUE3 + *self == CmdReg::Value3 } #[doc = "Reload"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMD_REG_A::VALUE4 + *self == CmdReg::Value4 } } #[doc = "Field `CMD_REG` writer - Command register"] -pub type CMD_REG_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMD_REG_A>; -impl<'a, REG> CMD_REG_W<'a, REG> +pub type CmdRegW<'a, REG> = crate::FieldWriter<'a, REG, 3, CmdReg>; +impl<'a, REG> CmdRegW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -213,310 +213,301 @@ where #[doc = "No command/EEPROM idle (clear error bits)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE1) + self.variant(CmdReg::Value1) } #[doc = "Read"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE2) + self.variant(CmdReg::Value2) } #[doc = "Write"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE3) + self.variant(CmdReg::Value3) } #[doc = "Reload"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE4) + self.variant(CmdReg::Value4) } } -#[doc = "Field `ERROR` reader - Checksum Error at in ESC Configuration Area"] -pub type ERROR_R = crate::BitReader; #[doc = "Checksum Error at in ESC Configuration Area\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERROR_A { +pub enum Error { #[doc = "0: Checksum OK"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Checksum error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERROR_A) -> Self { + fn from(variant: Error) -> Self { variant as u8 != 0 } } -impl ERROR_R { +#[doc = "Field `ERROR` reader - Checksum Error at in ESC Configuration Area"] +pub type ErrorR = crate::BitReader; +impl ErrorR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERROR_A { + pub const fn variant(&self) -> Error { match self.bits { - false => ERROR_A::VALUE1, - true => ERROR_A::VALUE2, + false => Error::Value1, + true => Error::Value2, } } #[doc = "Checksum OK"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERROR_A::VALUE1 + *self == Error::Value1 } #[doc = "Checksum error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERROR_A::VALUE2 + *self == Error::Value2 } } -#[doc = "Field `L_STAT` reader - EEPROM loading status"] -pub type L_STAT_R = crate::BitReader; #[doc = "EEPROM loading status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum L_STAT_A { +pub enum LStat { #[doc = "0: EEPROM loaded, device information OK"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EEPROM not loaded, device information not available (EEPROM loading in progress or finished with a failure)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: L_STAT_A) -> Self { + fn from(variant: LStat) -> Self { variant as u8 != 0 } } -impl L_STAT_R { +#[doc = "Field `L_STAT` reader - EEPROM loading status"] +pub type LStatR = crate::BitReader; +impl LStatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> L_STAT_A { + pub const fn variant(&self) -> LStat { match self.bits { - false => L_STAT_A::VALUE1, - true => L_STAT_A::VALUE2, + false => LStat::Value1, + true => LStat::Value2, } } #[doc = "EEPROM loaded, device information OK"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == L_STAT_A::VALUE1 + *self == LStat::Value1 } #[doc = "EEPROM not loaded, device information not available (EEPROM loading in progress or finished with a failure)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == L_STAT_A::VALUE2 + *self == LStat::Value2 } } -#[doc = "Field `ERROR_AC` reader - Error Acknowledge/Command"] -pub type ERROR_AC_R = crate::BitReader; #[doc = "Error Acknowledge/Command\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERROR_AC_A { +pub enum ErrorAc { #[doc = "0: No error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Missing EEPROM acknowledge or invalid command"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERROR_AC_A) -> Self { + fn from(variant: ErrorAc) -> Self { variant as u8 != 0 } } -impl ERROR_AC_R { +#[doc = "Field `ERROR_AC` reader - Error Acknowledge/Command"] +pub type ErrorAcR = crate::BitReader; +impl ErrorAcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERROR_AC_A { + pub const fn variant(&self) -> ErrorAc { match self.bits { - false => ERROR_AC_A::VALUE1, - true => ERROR_AC_A::VALUE2, + false => ErrorAc::Value1, + true => ErrorAc::Value2, } } #[doc = "No error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERROR_AC_A::VALUE1 + *self == ErrorAc::Value1 } #[doc = "Missing EEPROM acknowledge or invalid command"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERROR_AC_A::VALUE2 + *self == ErrorAc::Value2 } } #[doc = "Field `ERROR_AC` writer - Error Acknowledge/Command"] -pub type ERROR_AC_W<'a, REG> = crate::BitWriter<'a, REG, ERROR_AC_A>; -impl<'a, REG> ERROR_AC_W<'a, REG> +pub type ErrorAcW<'a, REG> = crate::BitWriter<'a, REG, ErrorAc>; +impl<'a, REG> ErrorAcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERROR_AC_A::VALUE1) + self.variant(ErrorAc::Value1) } #[doc = "Missing EEPROM acknowledge or invalid command"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERROR_AC_A::VALUE2) + self.variant(ErrorAc::Value2) } } -#[doc = "Field `ERROR_WE` reader - Error Write Enable"] -pub type ERROR_WE_R = crate::BitReader; #[doc = "Error Write Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERROR_WE_A { +pub enum ErrorWe { #[doc = "0: No error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write Command without Write enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERROR_WE_A) -> Self { + fn from(variant: ErrorWe) -> Self { variant as u8 != 0 } } -impl ERROR_WE_R { +#[doc = "Field `ERROR_WE` reader - Error Write Enable"] +pub type ErrorWeR = crate::BitReader; +impl ErrorWeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERROR_WE_A { + pub const fn variant(&self) -> ErrorWe { match self.bits { - false => ERROR_WE_A::VALUE1, - true => ERROR_WE_A::VALUE2, + false => ErrorWe::Value1, + true => ErrorWe::Value2, } } #[doc = "No error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERROR_WE_A::VALUE1 + *self == ErrorWe::Value1 } #[doc = "Write Command without Write enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERROR_WE_A::VALUE2 + *self == ErrorWe::Value2 } } -#[doc = "Field `BUSY` reader - Busy"] -pub type BUSY_R = crate::BitReader; #[doc = "Busy\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: EEPROM Interface is idle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EEPROM Interface is busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Busy"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "EEPROM Interface is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "EEPROM Interface is busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } impl R { #[doc = "Bit 0 - ECAT write enable"] #[inline(always)] - pub fn w_en(&self) -> W_EN_R { - W_EN_R::new((self.bits & 1) != 0) + pub fn w_en(&self) -> WEnR { + WEnR::new((self.bits & 1) != 0) } #[doc = "Bit 5 - EEPROM emulation"] #[inline(always)] - pub fn emul(&self) -> EMUL_R { - EMUL_R::new(((self.bits >> 5) & 1) != 0) + pub fn emul(&self) -> EmulR { + EmulR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Supported number of EEPROM read bytes"] #[inline(always)] - pub fn bytes(&self) -> BYTES_R { - BYTES_R::new(((self.bits >> 6) & 1) != 0) + pub fn bytes(&self) -> BytesR { + BytesR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Selected EEPROM Algorithm"] #[inline(always)] - pub fn alg(&self) -> ALG_R { - ALG_R::new(((self.bits >> 7) & 1) != 0) + pub fn alg(&self) -> AlgR { + AlgR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:10 - Command register"] #[inline(always)] - pub fn cmd_reg(&self) -> CMD_REG_R { - CMD_REG_R::new(((self.bits >> 8) & 7) as u8) + pub fn cmd_reg(&self) -> CmdRegR { + CmdRegR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bit 11 - Checksum Error at in ESC Configuration Area"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 11) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - EEPROM loading status"] #[inline(always)] - pub fn l_stat(&self) -> L_STAT_R { - L_STAT_R::new(((self.bits >> 12) & 1) != 0) + pub fn l_stat(&self) -> LStatR { + LStatR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Error Acknowledge/Command"] #[inline(always)] - pub fn error_ac(&self) -> ERROR_AC_R { - ERROR_AC_R::new(((self.bits >> 13) & 1) != 0) + pub fn error_ac(&self) -> ErrorAcR { + ErrorAcR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Error Write Enable"] #[inline(always)] - pub fn error_we(&self) -> ERROR_WE_R { - ERROR_WE_R::new(((self.bits >> 14) & 1) != 0) + pub fn error_we(&self) -> ErrorWeR { + ErrorWeR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 15) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 8:10 - Command register"] #[inline(always)] #[must_use] - pub fn cmd_reg(&mut self) -> CMD_REG_W { - CMD_REG_W::new(self, 8) + pub fn cmd_reg(&mut self) -> CmdRegW { + CmdRegW::new(self, 8) } #[doc = "Bit 13 - Error Acknowledge/Command"] #[inline(always)] #[must_use] - pub fn error_ac(&mut self) -> ERROR_AC_W { - ERROR_AC_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn error_ac(&mut self) -> ErrorAcW { + ErrorAcW::new(self, 13) } } #[doc = "EEPROM Control/Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_cont_stat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_cont_stat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EEP_CONT_STAT_SPEC; -impl crate::RegisterSpec for EEP_CONT_STAT_SPEC { +pub struct EepContStatSpec; +impl crate::RegisterSpec for EepContStatSpec { type Ux = u16; } #[doc = "`read()` method returns [`eep_cont_stat::R`](R) reader structure"] -impl crate::Readable for EEP_CONT_STAT_SPEC {} +impl crate::Readable for EepContStatSpec {} #[doc = "`write(|w| ..)` method takes [`eep_cont_stat::W`](W) writer structure"] -impl crate::Writable for EEP_CONT_STAT_SPEC { +impl crate::Writable for EepContStatSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets EEP_CONT_STAT to value 0x9460"] -impl crate::Resettable for EEP_CONT_STAT_SPEC { +impl crate::Resettable for EepContStatSpec { const RESET_VALUE: u16 = 0x9460; } diff --git a/src/ecat0/eep_data.rs b/src/ecat0/eep_data.rs index fbe99282..6188024a 100644 --- a/src/ecat0/eep_data.rs +++ b/src/ecat0/eep_data.rs @@ -1,50 +1,41 @@ #[doc = "Register `EEP_DATA[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EEP_DATA[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EEP_DATA` reader - EEPROM Data"] -pub type EEP_DATA_R = crate::FieldReader; +pub type EepDataR = crate::FieldReader; #[doc = "Field `EEP_DATA` writer - EEPROM Data"] -pub type EEP_DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type EepDataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - EEPROM Data"] #[inline(always)] - pub fn eep_data(&self) -> EEP_DATA_R { - EEP_DATA_R::new(self.bits) + pub fn eep_data(&self) -> EepDataR { + EepDataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - EEPROM Data"] #[inline(always)] #[must_use] - pub fn eep_data(&mut self) -> EEP_DATA_W { - EEP_DATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eep_data(&mut self) -> EepDataW { + EepDataW::new(self, 0) } } #[doc = "EEPROM Read/Write data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EEP_DATA_SPEC; -impl crate::RegisterSpec for EEP_DATA_SPEC { +pub struct EepDataSpec; +impl crate::RegisterSpec for EepDataSpec { type Ux = u32; } #[doc = "`read()` method returns [`eep_data::R`](R) reader structure"] -impl crate::Readable for EEP_DATA_SPEC {} +impl crate::Readable for EepDataSpec {} #[doc = "`write(|w| ..)` method takes [`eep_data::W`](W) writer structure"] -impl crate::Writable for EEP_DATA_SPEC { +impl crate::Writable for EepDataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EEP_DATA[%s] to value 0"] -impl crate::Resettable for EEP_DATA_SPEC { +impl crate::Resettable for EepDataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/eep_state.rs b/src/ecat0/eep_state.rs index d7dab598..fd0365c9 100644 --- a/src/ecat0/eep_state.rs +++ b/src/ecat0/eep_state.rs @@ -1,98 +1,89 @@ #[doc = "Register `EEP_STATE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EEP_STATE` writer"] -pub type W = crate::W; -#[doc = "Field `ACCESS` reader - Access to EEPROM"] -pub type ACCESS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Access to EEPROM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACCESS_A { +pub enum Access { #[doc = "0: PDI releases EEPROM access"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI takes EEPROM access (PDI has EEPROM control)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACCESS_A) -> Self { + fn from(variant: Access) -> Self { variant as u8 != 0 } } -impl ACCESS_R { +#[doc = "Field `ACCESS` reader - Access to EEPROM"] +pub type AccessR = crate::BitReader; +impl AccessR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACCESS_A { + pub const fn variant(&self) -> Access { match self.bits { - false => ACCESS_A::VALUE1, - true => ACCESS_A::VALUE2, + false => Access::Value1, + true => Access::Value2, } } #[doc = "PDI releases EEPROM access"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACCESS_A::VALUE1 + *self == Access::Value1 } #[doc = "PDI takes EEPROM access (PDI has EEPROM control)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACCESS_A::VALUE2 + *self == Access::Value2 } } #[doc = "Field `ACCESS` writer - Access to EEPROM"] -pub type ACCESS_W<'a, REG> = crate::BitWriter<'a, REG, ACCESS_A>; -impl<'a, REG> ACCESS_W<'a, REG> +pub type AccessW<'a, REG> = crate::BitWriter<'a, REG, Access>; +impl<'a, REG> AccessW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "PDI releases EEPROM access"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACCESS_A::VALUE1) + self.variant(Access::Value1) } #[doc = "PDI takes EEPROM access (PDI has EEPROM control)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACCESS_A::VALUE2) + self.variant(Access::Value2) } } impl R { #[doc = "Bit 0 - Access to EEPROM"] #[inline(always)] - pub fn access(&self) -> ACCESS_R { - ACCESS_R::new((self.bits & 1) != 0) + pub fn access(&self) -> AccessR { + AccessR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Access to EEPROM"] #[inline(always)] #[must_use] - pub fn access(&mut self) -> ACCESS_W { - ACCESS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn access(&mut self) -> AccessW { + AccessW::new(self, 0) } } #[doc = "EEPROM PDI Access State\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eep_state::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eep_state::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EEP_STATE_SPEC; -impl crate::RegisterSpec for EEP_STATE_SPEC { +pub struct EepStateSpec; +impl crate::RegisterSpec for EepStateSpec { type Ux = u8; } #[doc = "`read()` method returns [`eep_state::R`](R) reader structure"] -impl crate::Readable for EEP_STATE_SPEC {} +impl crate::Readable for EepStateSpec {} #[doc = "`write(|w| ..)` method takes [`eep_state::W`](W) writer structure"] -impl crate::Writable for EEP_STATE_SPEC { +impl crate::Writable for EepStateSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets EEP_STATE to value 0"] -impl crate::Resettable for EEP_STATE_SPEC { +impl crate::Resettable for EepStateSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/err_led.rs b/src/ecat0/err_led.rs index 48f750f0..174d7e28 100644 --- a/src/ecat0/err_led.rs +++ b/src/ecat0/err_led.rs @@ -1,67 +1,67 @@ #[doc = "Register `ERR_LED` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ERR_LED` writer"] -pub type W = crate::W; -#[doc = "Field `LED_CODE` reader - LED Code"] -pub type LED_CODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "LED Code\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LED_CODE_A { +pub enum LedCode { #[doc = "0: OFF"] - VALUE1 = 0, + Value1 = 0, #[doc = "13: Blinking"] - VALUE2 = 13, + Value2 = 13, #[doc = "14: Flickering"] - VALUE3 = 14, + Value3 = 14, #[doc = "15: On"] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LED_CODE_A) -> Self { + fn from(variant: LedCode) -> Self { variant as _ } } -impl crate::FieldSpec for LED_CODE_A { +impl crate::FieldSpec for LedCode { type Ux = u8; } -impl LED_CODE_R { +#[doc = "Field `LED_CODE` reader - LED Code"] +pub type LedCodeR = crate::FieldReader; +impl LedCodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LED_CODE_A::VALUE1), - 13 => Some(LED_CODE_A::VALUE2), - 14 => Some(LED_CODE_A::VALUE3), - 15 => Some(LED_CODE_A::VALUE4), + 0 => Some(LedCode::Value1), + 13 => Some(LedCode::Value2), + 14 => Some(LedCode::Value3), + 15 => Some(LedCode::Value4), _ => None, } } #[doc = "OFF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LED_CODE_A::VALUE1 + *self == LedCode::Value1 } #[doc = "Blinking"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LED_CODE_A::VALUE2 + *self == LedCode::Value2 } #[doc = "Flickering"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LED_CODE_A::VALUE3 + *self == LedCode::Value3 } #[doc = "On"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LED_CODE_A::VALUE4 + *self == LedCode::Value4 } } #[doc = "Field `LED_CODE` writer - LED Code"] -pub type LED_CODE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, LED_CODE_A>; -impl<'a, REG> LED_CODE_W<'a, REG> +pub type LedCodeW<'a, REG> = crate::FieldWriter<'a, REG, 4, LedCode>; +impl<'a, REG> LedCodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,126 +69,117 @@ where #[doc = "OFF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE1) + self.variant(LedCode::Value1) } #[doc = "Blinking"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE2) + self.variant(LedCode::Value2) } #[doc = "Flickering"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE3) + self.variant(LedCode::Value3) } #[doc = "On"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE4) + self.variant(LedCode::Value4) } } -#[doc = "Field `EN_OVERR` reader - Enable Override"] -pub type EN_OVERR_R = crate::BitReader; #[doc = "Enable Override\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_OVERR_A { +pub enum EnOverr { #[doc = "0: Override disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Override enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_OVERR_A) -> Self { + fn from(variant: EnOverr) -> Self { variant as u8 != 0 } } -impl EN_OVERR_R { +#[doc = "Field `EN_OVERR` reader - Enable Override"] +pub type EnOverrR = crate::BitReader; +impl EnOverrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EN_OVERR_A { + pub const fn variant(&self) -> EnOverr { match self.bits { - false => EN_OVERR_A::VALUE1, - true => EN_OVERR_A::VALUE2, + false => EnOverr::Value1, + true => EnOverr::Value2, } } #[doc = "Override disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EN_OVERR_A::VALUE1 + *self == EnOverr::Value1 } #[doc = "Override enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EN_OVERR_A::VALUE2 + *self == EnOverr::Value2 } } #[doc = "Field `EN_OVERR` writer - Enable Override"] -pub type EN_OVERR_W<'a, REG> = crate::BitWriter<'a, REG, EN_OVERR_A>; -impl<'a, REG> EN_OVERR_W<'a, REG> +pub type EnOverrW<'a, REG> = crate::BitWriter<'a, REG, EnOverr>; +impl<'a, REG> EnOverrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EN_OVERR_A::VALUE1) + self.variant(EnOverr::Value1) } #[doc = "Override enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EN_OVERR_A::VALUE2) + self.variant(EnOverr::Value2) } } impl R { #[doc = "Bits 0:3 - LED Code"] #[inline(always)] - pub fn led_code(&self) -> LED_CODE_R { - LED_CODE_R::new(self.bits & 0x0f) + pub fn led_code(&self) -> LedCodeR { + LedCodeR::new(self.bits & 0x0f) } #[doc = "Bit 4 - Enable Override"] #[inline(always)] - pub fn en_overr(&self) -> EN_OVERR_R { - EN_OVERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn en_overr(&self) -> EnOverrR { + EnOverrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - LED Code"] #[inline(always)] #[must_use] - pub fn led_code(&mut self) -> LED_CODE_W { - LED_CODE_W::new(self, 0) + pub fn led_code(&mut self) -> LedCodeW { + LedCodeW::new(self, 0) } #[doc = "Bit 4 - Enable Override"] #[inline(always)] #[must_use] - pub fn en_overr(&mut self) -> EN_OVERR_W { - EN_OVERR_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn en_overr(&mut self) -> EnOverrW { + EnOverrW::new(self, 4) } } #[doc = "RUN ERR Override\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`err_led::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`err_led::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ERR_LED_SPEC; -impl crate::RegisterSpec for ERR_LED_SPEC { +pub struct ErrLedSpec; +impl crate::RegisterSpec for ErrLedSpec { type Ux = u8; } #[doc = "`read()` method returns [`err_led::R`](R) reader structure"] -impl crate::Readable for ERR_LED_SPEC {} +impl crate::Readable for ErrLedSpec {} #[doc = "`write(|w| ..)` method takes [`err_led::W`](W) writer structure"] -impl crate::Writable for ERR_LED_SPEC { +impl crate::Writable for ErrLedSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets ERR_LED to value 0"] -impl crate::Resettable for ERR_LED_SPEC { +impl crate::Resettable for ErrLedSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/esc_config.rs b/src/ecat0/esc_config.rs index e5f22965..9c56506e 100644 --- a/src/ecat0/esc_config.rs +++ b/src/ecat0/esc_config.rs @@ -1,343 +1,343 @@ #[doc = "Register `ESC_CONFIG` reader"] -pub type R = crate::R; -#[doc = "Field `EMUL` reader - Device emulation (control of AL status)"] -pub type EMUL_R = crate::BitReader; +pub type R = crate::R; #[doc = "Device emulation (control of AL status)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMUL_A { +pub enum Emul { #[doc = "0: AL status register has to be set by PDI"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: AL status register will be set to value written to AL control register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMUL_A) -> Self { + fn from(variant: Emul) -> Self { variant as u8 != 0 } } -impl EMUL_R { +#[doc = "Field `EMUL` reader - Device emulation (control of AL status)"] +pub type EmulR = crate::BitReader; +impl EmulR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMUL_A { + pub const fn variant(&self) -> Emul { match self.bits { - false => EMUL_A::VALUE1, - true => EMUL_A::VALUE2, + false => Emul::Value1, + true => Emul::Value2, } } #[doc = "AL status register has to be set by PDI"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMUL_A::VALUE1 + *self == Emul::Value1 } #[doc = "AL status register will be set to value written to AL control register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMUL_A::VALUE2 + *self == Emul::Value2 } } -#[doc = "Field `EHLD` reader - Enhanced Link detection all ports"] -pub type EHLD_R = crate::BitReader; #[doc = "Enhanced Link detection all ports\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHLD_A { +pub enum Ehld { #[doc = "0: disabled (if bits \\[7:4\\]=0)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled at all ports (overrides bits \\[7:4\\])"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHLD_A) -> Self { + fn from(variant: Ehld) -> Self { variant as u8 != 0 } } -impl EHLD_R { +#[doc = "Field `EHLD` reader - Enhanced Link detection all ports"] +pub type EhldR = crate::BitReader; +impl EhldR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHLD_A { + pub const fn variant(&self) -> Ehld { match self.bits { - false => EHLD_A::VALUE1, - true => EHLD_A::VALUE2, + false => Ehld::Value1, + true => Ehld::Value2, } } #[doc = "disabled (if bits \\[7:4\\]=0)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHLD_A::VALUE1 + *self == Ehld::Value1 } #[doc = "enabled at all ports (overrides bits \\[7:4\\])"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHLD_A::VALUE2 + *self == Ehld::Value2 } } -#[doc = "Field `CLKS_OUT` reader - Distributed Clocks SYNC Out Unit"] -pub type CLKS_OUT_R = crate::BitReader; #[doc = "Distributed Clocks SYNC Out Unit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKS_OUT_A { +pub enum ClksOut { #[doc = "0: disabled (power saving)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKS_OUT_A) -> Self { + fn from(variant: ClksOut) -> Self { variant as u8 != 0 } } -impl CLKS_OUT_R { +#[doc = "Field `CLKS_OUT` reader - Distributed Clocks SYNC Out Unit"] +pub type ClksOutR = crate::BitReader; +impl ClksOutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKS_OUT_A { + pub const fn variant(&self) -> ClksOut { match self.bits { - false => CLKS_OUT_A::VALUE1, - true => CLKS_OUT_A::VALUE2, + false => ClksOut::Value1, + true => ClksOut::Value2, } } #[doc = "disabled (power saving)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKS_OUT_A::VALUE1 + *self == ClksOut::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKS_OUT_A::VALUE2 + *self == ClksOut::Value2 } } -#[doc = "Field `CLKS_IN` reader - Distributed Clocks Latch In Unit"] -pub type CLKS_IN_R = crate::BitReader; #[doc = "Distributed Clocks Latch In Unit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKS_IN_A { +pub enum ClksIn { #[doc = "0: disabled (power saving)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKS_IN_A) -> Self { + fn from(variant: ClksIn) -> Self { variant as u8 != 0 } } -impl CLKS_IN_R { +#[doc = "Field `CLKS_IN` reader - Distributed Clocks Latch In Unit"] +pub type ClksInR = crate::BitReader; +impl ClksInR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKS_IN_A { + pub const fn variant(&self) -> ClksIn { match self.bits { - false => CLKS_IN_A::VALUE1, - true => CLKS_IN_A::VALUE2, + false => ClksIn::Value1, + true => ClksIn::Value2, } } #[doc = "disabled (power saving)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKS_IN_A::VALUE1 + *self == ClksIn::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKS_IN_A::VALUE2 + *self == ClksIn::Value2 } } -#[doc = "Field `EHLD_P0` reader - Enhanced Link port 0"] -pub type EHLD_P0_R = crate::BitReader; #[doc = "Enhanced Link port 0\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHLD_P0_A { +pub enum EhldP0 { #[doc = "0: disabled (if bit 1 = 0)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHLD_P0_A) -> Self { + fn from(variant: EhldP0) -> Self { variant as u8 != 0 } } -impl EHLD_P0_R { +#[doc = "Field `EHLD_P0` reader - Enhanced Link port 0"] +pub type EhldP0R = crate::BitReader; +impl EhldP0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHLD_P0_A { + pub const fn variant(&self) -> EhldP0 { match self.bits { - false => EHLD_P0_A::VALUE1, - true => EHLD_P0_A::VALUE2, + false => EhldP0::Value1, + true => EhldP0::Value2, } } #[doc = "disabled (if bit 1 = 0)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHLD_P0_A::VALUE1 + *self == EhldP0::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHLD_P0_A::VALUE2 + *self == EhldP0::Value2 } } -#[doc = "Field `EHLD_P1` reader - Enhanced Link port 1"] -pub type EHLD_P1_R = crate::BitReader; #[doc = "Enhanced Link port 1\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHLD_P1_A { +pub enum EhldP1 { #[doc = "0: disabled (if bit 1 = 0)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHLD_P1_A) -> Self { + fn from(variant: EhldP1) -> Self { variant as u8 != 0 } } -impl EHLD_P1_R { +#[doc = "Field `EHLD_P1` reader - Enhanced Link port 1"] +pub type EhldP1R = crate::BitReader; +impl EhldP1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHLD_P1_A { + pub const fn variant(&self) -> EhldP1 { match self.bits { - false => EHLD_P1_A::VALUE1, - true => EHLD_P1_A::VALUE2, + false => EhldP1::Value1, + true => EhldP1::Value2, } } #[doc = "disabled (if bit 1 = 0)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHLD_P1_A::VALUE1 + *self == EhldP1::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHLD_P1_A::VALUE2 + *self == EhldP1::Value2 } } -#[doc = "Field `EHLD_P2` reader - Enhanced Link port 2"] -pub type EHLD_P2_R = crate::BitReader; #[doc = "Enhanced Link port 2\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHLD_P2_A { +pub enum EhldP2 { #[doc = "0: disabled (if bit 1 = 0)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHLD_P2_A) -> Self { + fn from(variant: EhldP2) -> Self { variant as u8 != 0 } } -impl EHLD_P2_R { +#[doc = "Field `EHLD_P2` reader - Enhanced Link port 2"] +pub type EhldP2R = crate::BitReader; +impl EhldP2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHLD_P2_A { + pub const fn variant(&self) -> EhldP2 { match self.bits { - false => EHLD_P2_A::VALUE1, - true => EHLD_P2_A::VALUE2, + false => EhldP2::Value1, + true => EhldP2::Value2, } } #[doc = "disabled (if bit 1 = 0)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHLD_P2_A::VALUE1 + *self == EhldP2::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHLD_P2_A::VALUE2 + *self == EhldP2::Value2 } } -#[doc = "Field `EHLD_P3` reader - Enhanced Link port 3"] -pub type EHLD_P3_R = crate::BitReader; #[doc = "Enhanced Link port 3\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHLD_P3_A { +pub enum EhldP3 { #[doc = "0: disabled (if bit 1 = 0)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHLD_P3_A) -> Self { + fn from(variant: EhldP3) -> Self { variant as u8 != 0 } } -impl EHLD_P3_R { +#[doc = "Field `EHLD_P3` reader - Enhanced Link port 3"] +pub type EhldP3R = crate::BitReader; +impl EhldP3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHLD_P3_A { + pub const fn variant(&self) -> EhldP3 { match self.bits { - false => EHLD_P3_A::VALUE1, - true => EHLD_P3_A::VALUE2, + false => EhldP3::Value1, + true => EhldP3::Value2, } } #[doc = "disabled (if bit 1 = 0)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHLD_P3_A::VALUE1 + *self == EhldP3::Value1 } #[doc = "enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHLD_P3_A::VALUE2 + *self == EhldP3::Value2 } } impl R { #[doc = "Bit 0 - Device emulation (control of AL status)"] #[inline(always)] - pub fn emul(&self) -> EMUL_R { - EMUL_R::new((self.bits & 1) != 0) + pub fn emul(&self) -> EmulR { + EmulR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enhanced Link detection all ports"] #[inline(always)] - pub fn ehld(&self) -> EHLD_R { - EHLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ehld(&self) -> EhldR { + EhldR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Distributed Clocks SYNC Out Unit"] #[inline(always)] - pub fn clks_out(&self) -> CLKS_OUT_R { - CLKS_OUT_R::new(((self.bits >> 2) & 1) != 0) + pub fn clks_out(&self) -> ClksOutR { + ClksOutR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Distributed Clocks Latch In Unit"] #[inline(always)] - pub fn clks_in(&self) -> CLKS_IN_R { - CLKS_IN_R::new(((self.bits >> 3) & 1) != 0) + pub fn clks_in(&self) -> ClksInR { + ClksInR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enhanced Link port 0"] #[inline(always)] - pub fn ehld_p0(&self) -> EHLD_P0_R { - EHLD_P0_R::new(((self.bits >> 4) & 1) != 0) + pub fn ehld_p0(&self) -> EhldP0R { + EhldP0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enhanced Link port 1"] #[inline(always)] - pub fn ehld_p1(&self) -> EHLD_P1_R { - EHLD_P1_R::new(((self.bits >> 5) & 1) != 0) + pub fn ehld_p1(&self) -> EhldP1R { + EhldP1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enhanced Link port 2"] #[inline(always)] - pub fn ehld_p2(&self) -> EHLD_P2_R { - EHLD_P2_R::new(((self.bits >> 6) & 1) != 0) + pub fn ehld_p2(&self) -> EhldP2R { + EhldP2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enhanced Link port 3"] #[inline(always)] - pub fn ehld_p3(&self) -> EHLD_P3_R { - EHLD_P3_R::new(((self.bits >> 7) & 1) != 0) + pub fn ehld_p3(&self) -> EhldP3R { + EhldP3R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "ESC Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ESC_CONFIG_SPEC; -impl crate::RegisterSpec for ESC_CONFIG_SPEC { +pub struct EscConfigSpec; +impl crate::RegisterSpec for EscConfigSpec { type Ux = u8; } #[doc = "`read()` method returns [`esc_config::R`](R) reader structure"] -impl crate::Readable for ESC_CONFIG_SPEC {} +impl crate::Readable for EscConfigSpec {} #[doc = "`reset()` method sets ESC_CONFIG to value 0xfe"] -impl crate::Resettable for ESC_CONFIG_SPEC { +impl crate::Resettable for EscConfigSpec { const RESET_VALUE: u8 = 0xfe; } diff --git a/src/ecat0/esc_dl_control.rs b/src/ecat0/esc_dl_control.rs index 00c262cb..f4e2f598 100644 --- a/src/ecat0/esc_dl_control.rs +++ b/src/ecat0/esc_dl_control.rs @@ -1,562 +1,562 @@ #[doc = "Register `ESC_DL_CONTROL` reader"] -pub type R = crate::R; -#[doc = "Field `FR` reader - Forwarding rule"] -pub type FR_R = crate::BitReader; +pub type R = crate::R; #[doc = "Forwarding rule\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FR_A { +pub enum Fr { #[doc = "0: EtherCAT frames are processed, Non-EtherCAT frames are forwarded without processing"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EtherCAT frames are processed, Non- EtherCAT frames are destroyed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FR_A) -> Self { + fn from(variant: Fr) -> Self { variant as u8 != 0 } } -impl FR_R { +#[doc = "Field `FR` reader - Forwarding rule"] +pub type FrR = crate::BitReader; +impl FrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FR_A { + pub const fn variant(&self) -> Fr { match self.bits { - false => FR_A::VALUE1, - true => FR_A::VALUE2, + false => Fr::Value1, + true => Fr::Value2, } } #[doc = "EtherCAT frames are processed, Non-EtherCAT frames are forwarded without processing"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FR_A::VALUE1 + *self == Fr::Value1 } #[doc = "EtherCAT frames are processed, Non- EtherCAT frames are destroyed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FR_A::VALUE2 + *self == Fr::Value2 } } -#[doc = "Field `TEMP` reader - Temporary use of settings in LP1-LP3"] -pub type TEMP_R = crate::BitReader; #[doc = "Temporary use of settings in LP1-LP3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TEMP_A { +pub enum Temp { #[doc = "0: permanent use"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: use for about 1 second, then revert to previous settings"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TEMP_A) -> Self { + fn from(variant: Temp) -> Self { variant as u8 != 0 } } -impl TEMP_R { +#[doc = "Field `TEMP` reader - Temporary use of settings in LP1-LP3"] +pub type TempR = crate::BitReader; +impl TempR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TEMP_A { + pub const fn variant(&self) -> Temp { match self.bits { - false => TEMP_A::VALUE1, - true => TEMP_A::VALUE2, + false => Temp::Value1, + true => Temp::Value2, } } #[doc = "permanent use"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TEMP_A::VALUE1 + *self == Temp::Value1 } #[doc = "use for about 1 second, then revert to previous settings"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TEMP_A::VALUE2 + *self == Temp::Value2 } } -#[doc = "Field `LP0` reader - Loop Port 0"] -pub type LP0_R = crate::FieldReader; #[doc = "Loop Port 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LP0_A { +pub enum Lp0 { #[doc = "0: Auto"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auto Close"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Open"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Closed"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LP0_A) -> Self { + fn from(variant: Lp0) -> Self { variant as _ } } -impl crate::FieldSpec for LP0_A { +impl crate::FieldSpec for Lp0 { type Ux = u8; } -impl LP0_R { +#[doc = "Field `LP0` reader - Loop Port 0"] +pub type Lp0R = crate::FieldReader; +impl Lp0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP0_A { + pub const fn variant(&self) -> Lp0 { match self.bits { - 0 => LP0_A::VALUE1, - 1 => LP0_A::VALUE2, - 2 => LP0_A::VALUE3, - 3 => LP0_A::VALUE4, + 0 => Lp0::Value1, + 1 => Lp0::Value2, + 2 => Lp0::Value3, + 3 => Lp0::Value4, _ => unreachable!(), } } #[doc = "Auto"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP0_A::VALUE1 + *self == Lp0::Value1 } #[doc = "Auto Close"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP0_A::VALUE2 + *self == Lp0::Value2 } #[doc = "Open"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LP0_A::VALUE3 + *self == Lp0::Value3 } #[doc = "Closed"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LP0_A::VALUE4 + *self == Lp0::Value4 } } -#[doc = "Field `LP1` reader - Loop Port 1"] -pub type LP1_R = crate::FieldReader; #[doc = "Loop Port 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LP1_A { +pub enum Lp1 { #[doc = "0: Auto"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auto Close"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Open"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Closed"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LP1_A) -> Self { + fn from(variant: Lp1) -> Self { variant as _ } } -impl crate::FieldSpec for LP1_A { +impl crate::FieldSpec for Lp1 { type Ux = u8; } -impl LP1_R { +#[doc = "Field `LP1` reader - Loop Port 1"] +pub type Lp1R = crate::FieldReader; +impl Lp1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP1_A { + pub const fn variant(&self) -> Lp1 { match self.bits { - 0 => LP1_A::VALUE1, - 1 => LP1_A::VALUE2, - 2 => LP1_A::VALUE3, - 3 => LP1_A::VALUE4, + 0 => Lp1::Value1, + 1 => Lp1::Value2, + 2 => Lp1::Value3, + 3 => Lp1::Value4, _ => unreachable!(), } } #[doc = "Auto"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP1_A::VALUE1 + *self == Lp1::Value1 } #[doc = "Auto Close"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP1_A::VALUE2 + *self == Lp1::Value2 } #[doc = "Open"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LP1_A::VALUE3 + *self == Lp1::Value3 } #[doc = "Closed"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LP1_A::VALUE4 + *self == Lp1::Value4 } } -#[doc = "Field `LP2` reader - Loop Port 2"] -pub type LP2_R = crate::FieldReader; #[doc = "Loop Port 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LP2_A { +pub enum Lp2 { #[doc = "0: Auto"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auto Close"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Open"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Closed"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LP2_A) -> Self { + fn from(variant: Lp2) -> Self { variant as _ } } -impl crate::FieldSpec for LP2_A { +impl crate::FieldSpec for Lp2 { type Ux = u8; } -impl LP2_R { +#[doc = "Field `LP2` reader - Loop Port 2"] +pub type Lp2R = crate::FieldReader; +impl Lp2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP2_A { + pub const fn variant(&self) -> Lp2 { match self.bits { - 0 => LP2_A::VALUE1, - 1 => LP2_A::VALUE2, - 2 => LP2_A::VALUE3, - 3 => LP2_A::VALUE4, + 0 => Lp2::Value1, + 1 => Lp2::Value2, + 2 => Lp2::Value3, + 3 => Lp2::Value4, _ => unreachable!(), } } #[doc = "Auto"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP2_A::VALUE1 + *self == Lp2::Value1 } #[doc = "Auto Close"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP2_A::VALUE2 + *self == Lp2::Value2 } #[doc = "Open"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LP2_A::VALUE3 + *self == Lp2::Value3 } #[doc = "Closed"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LP2_A::VALUE4 + *self == Lp2::Value4 } } -#[doc = "Field `LP3` reader - Loop Port 3"] -pub type LP3_R = crate::FieldReader; #[doc = "Loop Port 3\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LP3_A { +pub enum Lp3 { #[doc = "0: Auto"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auto Close"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Open"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Closed"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LP3_A) -> Self { + fn from(variant: Lp3) -> Self { variant as _ } } -impl crate::FieldSpec for LP3_A { +impl crate::FieldSpec for Lp3 { type Ux = u8; } -impl LP3_R { +#[doc = "Field `LP3` reader - Loop Port 3"] +pub type Lp3R = crate::FieldReader; +impl Lp3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP3_A { + pub const fn variant(&self) -> Lp3 { match self.bits { - 0 => LP3_A::VALUE1, - 1 => LP3_A::VALUE2, - 2 => LP3_A::VALUE3, - 3 => LP3_A::VALUE4, + 0 => Lp3::Value1, + 1 => Lp3::Value2, + 2 => Lp3::Value3, + 3 => Lp3::Value4, _ => unreachable!(), } } #[doc = "Auto"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP3_A::VALUE1 + *self == Lp3::Value1 } #[doc = "Auto Close"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP3_A::VALUE2 + *self == Lp3::Value2 } #[doc = "Open"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LP3_A::VALUE3 + *self == Lp3::Value3 } #[doc = "Closed"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LP3_A::VALUE4 + *self == Lp3::Value4 } } -#[doc = "Field `RX_FIFO_SIZE` reader - RX FIFO Size"] -pub type RX_FIFO_SIZE_R = crate::FieldReader; #[doc = "RX FIFO Size\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_FIFO_SIZE_A { +pub enum RxFifoSize { #[doc = "0: -40 ns (-80 ns)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: -40 ns (-80 ns)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: -40 ns"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: -40 ns"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: no change"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: no change"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: no change"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: default"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_FIFO_SIZE_A) -> Self { + fn from(variant: RxFifoSize) -> Self { variant as _ } } -impl crate::FieldSpec for RX_FIFO_SIZE_A { +impl crate::FieldSpec for RxFifoSize { type Ux = u8; } -impl RX_FIFO_SIZE_R { +#[doc = "Field `RX_FIFO_SIZE` reader - RX FIFO Size"] +pub type RxFifoSizeR = crate::FieldReader; +impl RxFifoSizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_FIFO_SIZE_A { + pub const fn variant(&self) -> RxFifoSize { match self.bits { - 0 => RX_FIFO_SIZE_A::VALUE1, - 1 => RX_FIFO_SIZE_A::VALUE2, - 2 => RX_FIFO_SIZE_A::VALUE3, - 3 => RX_FIFO_SIZE_A::VALUE4, - 4 => RX_FIFO_SIZE_A::VALUE5, - 5 => RX_FIFO_SIZE_A::VALUE6, - 6 => RX_FIFO_SIZE_A::VALUE7, - 7 => RX_FIFO_SIZE_A::VALUE8, + 0 => RxFifoSize::Value1, + 1 => RxFifoSize::Value2, + 2 => RxFifoSize::Value3, + 3 => RxFifoSize::Value4, + 4 => RxFifoSize::Value5, + 5 => RxFifoSize::Value6, + 6 => RxFifoSize::Value7, + 7 => RxFifoSize::Value8, _ => unreachable!(), } } #[doc = "-40 ns (-80 ns)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE1 + *self == RxFifoSize::Value1 } #[doc = "-40 ns (-80 ns)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE2 + *self == RxFifoSize::Value2 } #[doc = "-40 ns"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE3 + *self == RxFifoSize::Value3 } #[doc = "-40 ns"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE4 + *self == RxFifoSize::Value4 } #[doc = "no change"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE5 + *self == RxFifoSize::Value5 } #[doc = "no change"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE6 + *self == RxFifoSize::Value6 } #[doc = "no change"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE7 + *self == RxFifoSize::Value7 } #[doc = "default"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == RX_FIFO_SIZE_A::VALUE8 + *self == RxFifoSize::Value8 } } -#[doc = "Field `LJ` reader - EBUS Low Jitter"] -pub type LJ_R = crate::BitReader; #[doc = "EBUS Low Jitter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LJ_A { +pub enum Lj { #[doc = "0: Normal jitter"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reduced jitter"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LJ_A) -> Self { + fn from(variant: Lj) -> Self { variant as u8 != 0 } } -impl LJ_R { +#[doc = "Field `LJ` reader - EBUS Low Jitter"] +pub type LjR = crate::BitReader; +impl LjR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LJ_A { + pub const fn variant(&self) -> Lj { match self.bits { - false => LJ_A::VALUE1, - true => LJ_A::VALUE2, + false => Lj::Value1, + true => Lj::Value2, } } #[doc = "Normal jitter"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LJ_A::VALUE1 + *self == Lj::Value1 } #[doc = "Reduced jitter"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LJ_A::VALUE2 + *self == Lj::Value2 } } -#[doc = "Field `RLD_ST` reader - EBUS remote link down signaling time"] -pub type RLD_ST_R = crate::BitReader; #[doc = "EBUS remote link down signaling time\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RLD_ST_A { +pub enum RldSt { #[doc = "0: Default (~660 ms)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reduced (~80 us)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RLD_ST_A) -> Self { + fn from(variant: RldSt) -> Self { variant as u8 != 0 } } -impl RLD_ST_R { +#[doc = "Field `RLD_ST` reader - EBUS remote link down signaling time"] +pub type RldStR = crate::BitReader; +impl RldStR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RLD_ST_A { + pub const fn variant(&self) -> RldSt { match self.bits { - false => RLD_ST_A::VALUE1, - true => RLD_ST_A::VALUE2, + false => RldSt::Value1, + true => RldSt::Value2, } } #[doc = "Default (~660 ms)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RLD_ST_A::VALUE1 + *self == RldSt::Value1 } #[doc = "Reduced (~80 us)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RLD_ST_A::VALUE2 + *self == RldSt::Value2 } } -#[doc = "Field `S_ALIAS` reader - Station alias"] -pub type S_ALIAS_R = crate::BitReader; #[doc = "Station alias\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S_ALIAS_A { +pub enum SAlias { #[doc = "0: Ignore Station Alias"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Alias can be used for all configured address command types (FPRD,FPWR,...)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S_ALIAS_A) -> Self { + fn from(variant: SAlias) -> Self { variant as u8 != 0 } } -impl S_ALIAS_R { +#[doc = "Field `S_ALIAS` reader - Station alias"] +pub type SAliasR = crate::BitReader; +impl SAliasR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S_ALIAS_A { + pub const fn variant(&self) -> SAlias { match self.bits { - false => S_ALIAS_A::VALUE1, - true => S_ALIAS_A::VALUE2, + false => SAlias::Value1, + true => SAlias::Value2, } } #[doc = "Ignore Station Alias"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S_ALIAS_A::VALUE1 + *self == SAlias::Value1 } #[doc = "Alias can be used for all configured address command types (FPRD,FPWR,...)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S_ALIAS_A::VALUE2 + *self == SAlias::Value2 } } impl R { #[doc = "Bit 0 - Forwarding rule"] #[inline(always)] - pub fn fr(&self) -> FR_R { - FR_R::new((self.bits & 1) != 0) + pub fn fr(&self) -> FrR { + FrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Temporary use of settings in LP1-LP3"] #[inline(always)] - pub fn temp(&self) -> TEMP_R { - TEMP_R::new(((self.bits >> 1) & 1) != 0) + pub fn temp(&self) -> TempR { + TempR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 8:9 - Loop Port 0"] #[inline(always)] - pub fn lp0(&self) -> LP0_R { - LP0_R::new(((self.bits >> 8) & 3) as u8) + pub fn lp0(&self) -> Lp0R { + Lp0R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Loop Port 1"] #[inline(always)] - pub fn lp1(&self) -> LP1_R { - LP1_R::new(((self.bits >> 10) & 3) as u8) + pub fn lp1(&self) -> Lp1R { + Lp1R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Loop Port 2"] #[inline(always)] - pub fn lp2(&self) -> LP2_R { - LP2_R::new(((self.bits >> 12) & 3) as u8) + pub fn lp2(&self) -> Lp2R { + Lp2R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Loop Port 3"] #[inline(always)] - pub fn lp3(&self) -> LP3_R { - LP3_R::new(((self.bits >> 14) & 3) as u8) + pub fn lp3(&self) -> Lp3R { + Lp3R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:18 - RX FIFO Size"] #[inline(always)] - pub fn rx_fifo_size(&self) -> RX_FIFO_SIZE_R { - RX_FIFO_SIZE_R::new(((self.bits >> 16) & 7) as u8) + pub fn rx_fifo_size(&self) -> RxFifoSizeR { + RxFifoSizeR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 19 - EBUS Low Jitter"] #[inline(always)] - pub fn lj(&self) -> LJ_R { - LJ_R::new(((self.bits >> 19) & 1) != 0) + pub fn lj(&self) -> LjR { + LjR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 22 - EBUS remote link down signaling time"] #[inline(always)] - pub fn rld_st(&self) -> RLD_ST_R { - RLD_ST_R::new(((self.bits >> 22) & 1) != 0) + pub fn rld_st(&self) -> RldStR { + RldStR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Station alias"] #[inline(always)] - pub fn s_alias(&self) -> S_ALIAS_R { - S_ALIAS_R::new(((self.bits >> 24) & 1) != 0) + pub fn s_alias(&self) -> SAliasR { + SAliasR::new(((self.bits >> 24) & 1) != 0) } } #[doc = "ESC DL Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_dl_control::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ESC_DL_CONTROL_SPEC; -impl crate::RegisterSpec for ESC_DL_CONTROL_SPEC { +pub struct EscDlControlSpec; +impl crate::RegisterSpec for EscDlControlSpec { type Ux = u32; } #[doc = "`read()` method returns [`esc_dl_control::R`](R) reader structure"] -impl crate::Readable for ESC_DL_CONTROL_SPEC {} +impl crate::Readable for EscDlControlSpec {} #[doc = "`reset()` method sets ESC_DL_CONTROL to value 0x0007_c001"] -impl crate::Resettable for ESC_DL_CONTROL_SPEC { +impl crate::Resettable for EscDlControlSpec { const RESET_VALUE: u32 = 0x0007_c001; } diff --git a/src/ecat0/esc_dl_status.rs b/src/ecat0/esc_dl_status.rs index cde0fa3a..168e8ac1 100644 --- a/src/ecat0/esc_dl_status.rs +++ b/src/ecat0/esc_dl_status.rs @@ -1,630 +1,630 @@ #[doc = "Register `ESC_DL_STATUS` reader"] -pub type R = crate::R; -#[doc = "Field `PDI_EEPROM` reader - PDI operational/EEPROM loaded correctly"] -pub type PDI_EEPROM_R = crate::BitReader; +pub type R = crate::R; #[doc = "PDI operational/EEPROM loaded correctly\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDI_EEPROM_A { +pub enum PdiEeprom { #[doc = "0: EEPROM not loaded, PDI not operational (no access to Process Data RAM)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EEPROM loaded correctly, PDI operational (access to Process Data RAM)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDI_EEPROM_A) -> Self { + fn from(variant: PdiEeprom) -> Self { variant as u8 != 0 } } -impl PDI_EEPROM_R { +#[doc = "Field `PDI_EEPROM` reader - PDI operational/EEPROM loaded correctly"] +pub type PdiEepromR = crate::BitReader; +impl PdiEepromR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDI_EEPROM_A { + pub const fn variant(&self) -> PdiEeprom { match self.bits { - false => PDI_EEPROM_A::VALUE1, - true => PDI_EEPROM_A::VALUE2, + false => PdiEeprom::Value1, + true => PdiEeprom::Value2, } } #[doc = "EEPROM not loaded, PDI not operational (no access to Process Data RAM)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDI_EEPROM_A::VALUE1 + *self == PdiEeprom::Value1 } #[doc = "EEPROM loaded correctly, PDI operational (access to Process Data RAM)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDI_EEPROM_A::VALUE2 + *self == PdiEeprom::Value2 } } -#[doc = "Field `PDI_WDT_S` reader - PDI Watchdog Status"] -pub type PDI_WDT_S_R = crate::BitReader; #[doc = "PDI Watchdog Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDI_WDT_S_A { +pub enum PdiWdtS { #[doc = "0: Watchdog expired"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Watchdog reloaded"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDI_WDT_S_A) -> Self { + fn from(variant: PdiWdtS) -> Self { variant as u8 != 0 } } -impl PDI_WDT_S_R { +#[doc = "Field `PDI_WDT_S` reader - PDI Watchdog Status"] +pub type PdiWdtSR = crate::BitReader; +impl PdiWdtSR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDI_WDT_S_A { + pub const fn variant(&self) -> PdiWdtS { match self.bits { - false => PDI_WDT_S_A::VALUE1, - true => PDI_WDT_S_A::VALUE2, + false => PdiWdtS::Value1, + true => PdiWdtS::Value2, } } #[doc = "Watchdog expired"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDI_WDT_S_A::VALUE1 + *self == PdiWdtS::Value1 } #[doc = "Watchdog reloaded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDI_WDT_S_A::VALUE2 + *self == PdiWdtS::Value2 } } -#[doc = "Field `ELD` reader - Enhanced Link detection"] -pub type ELD_R = crate::BitReader; #[doc = "Enhanced Link detection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ELD_A { +pub enum Eld { #[doc = "0: Deactivated for all ports"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activated for at least one port"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ELD_A) -> Self { + fn from(variant: Eld) -> Self { variant as u8 != 0 } } -impl ELD_R { +#[doc = "Field `ELD` reader - Enhanced Link detection"] +pub type EldR = crate::BitReader; +impl EldR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ELD_A { + pub const fn variant(&self) -> Eld { match self.bits { - false => ELD_A::VALUE1, - true => ELD_A::VALUE2, + false => Eld::Value1, + true => Eld::Value2, } } #[doc = "Deactivated for all ports"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ELD_A::VALUE1 + *self == Eld::Value1 } #[doc = "Activated for at least one port"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ELD_A::VALUE2 + *self == Eld::Value2 } } -#[doc = "Field `LINK_P0` reader - Physical link on Port 0"] -pub type LINK_P0_R = crate::BitReader; #[doc = "Physical link on Port 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINK_P0_A { +pub enum LinkP0 { #[doc = "0: No link"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Link detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINK_P0_A) -> Self { + fn from(variant: LinkP0) -> Self { variant as u8 != 0 } } -impl LINK_P0_R { +#[doc = "Field `LINK_P0` reader - Physical link on Port 0"] +pub type LinkP0R = crate::BitReader; +impl LinkP0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_P0_A { + pub const fn variant(&self) -> LinkP0 { match self.bits { - false => LINK_P0_A::VALUE1, - true => LINK_P0_A::VALUE2, + false => LinkP0::Value1, + true => LinkP0::Value2, } } #[doc = "No link"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_P0_A::VALUE1 + *self == LinkP0::Value1 } #[doc = "Link detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_P0_A::VALUE2 + *self == LinkP0::Value2 } } -#[doc = "Field `LINK_P1` reader - Physical link on Port 1"] -pub type LINK_P1_R = crate::BitReader; #[doc = "Physical link on Port 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINK_P1_A { +pub enum LinkP1 { #[doc = "0: No link"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Link detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINK_P1_A) -> Self { + fn from(variant: LinkP1) -> Self { variant as u8 != 0 } } -impl LINK_P1_R { +#[doc = "Field `LINK_P1` reader - Physical link on Port 1"] +pub type LinkP1R = crate::BitReader; +impl LinkP1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_P1_A { + pub const fn variant(&self) -> LinkP1 { match self.bits { - false => LINK_P1_A::VALUE1, - true => LINK_P1_A::VALUE2, + false => LinkP1::Value1, + true => LinkP1::Value2, } } #[doc = "No link"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_P1_A::VALUE1 + *self == LinkP1::Value1 } #[doc = "Link detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_P1_A::VALUE2 + *self == LinkP1::Value2 } } -#[doc = "Field `LINK_P2` reader - Physical link on Port 2"] -pub type LINK_P2_R = crate::BitReader; #[doc = "Physical link on Port 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINK_P2_A { +pub enum LinkP2 { #[doc = "0: No link"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Link detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINK_P2_A) -> Self { + fn from(variant: LinkP2) -> Self { variant as u8 != 0 } } -impl LINK_P2_R { +#[doc = "Field `LINK_P2` reader - Physical link on Port 2"] +pub type LinkP2R = crate::BitReader; +impl LinkP2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_P2_A { + pub const fn variant(&self) -> LinkP2 { match self.bits { - false => LINK_P2_A::VALUE1, - true => LINK_P2_A::VALUE2, + false => LinkP2::Value1, + true => LinkP2::Value2, } } #[doc = "No link"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_P2_A::VALUE1 + *self == LinkP2::Value1 } #[doc = "Link detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_P2_A::VALUE2 + *self == LinkP2::Value2 } } -#[doc = "Field `LINK_P3` reader - Physical link on Port 3"] -pub type LINK_P3_R = crate::BitReader; #[doc = "Physical link on Port 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LINK_P3_A { +pub enum LinkP3 { #[doc = "0: No link"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Link detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LINK_P3_A) -> Self { + fn from(variant: LinkP3) -> Self { variant as u8 != 0 } } -impl LINK_P3_R { +#[doc = "Field `LINK_P3` reader - Physical link on Port 3"] +pub type LinkP3R = crate::BitReader; +impl LinkP3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_P3_A { + pub const fn variant(&self) -> LinkP3 { match self.bits { - false => LINK_P3_A::VALUE1, - true => LINK_P3_A::VALUE2, + false => LinkP3::Value1, + true => LinkP3::Value2, } } #[doc = "No link"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_P3_A::VALUE1 + *self == LinkP3::Value1 } #[doc = "Link detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_P3_A::VALUE2 + *self == LinkP3::Value2 } } -#[doc = "Field `LP0` reader - Loop Port 0"] -pub type LP0_R = crate::BitReader; #[doc = "Loop Port 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LP0_A { +pub enum Lp0 { #[doc = "0: Open"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Closed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LP0_A) -> Self { + fn from(variant: Lp0) -> Self { variant as u8 != 0 } } -impl LP0_R { +#[doc = "Field `LP0` reader - Loop Port 0"] +pub type Lp0R = crate::BitReader; +impl Lp0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP0_A { + pub const fn variant(&self) -> Lp0 { match self.bits { - false => LP0_A::VALUE1, - true => LP0_A::VALUE2, + false => Lp0::Value1, + true => Lp0::Value2, } } #[doc = "Open"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP0_A::VALUE1 + *self == Lp0::Value1 } #[doc = "Closed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP0_A::VALUE2 + *self == Lp0::Value2 } } -#[doc = "Field `COM_P0` reader - Communication on Port 0"] -pub type COM_P0_R = crate::BitReader; #[doc = "Communication on Port 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COM_P0_A { +pub enum ComP0 { #[doc = "0: No stable communication"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Communication established"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COM_P0_A) -> Self { + fn from(variant: ComP0) -> Self { variant as u8 != 0 } } -impl COM_P0_R { +#[doc = "Field `COM_P0` reader - Communication on Port 0"] +pub type ComP0R = crate::BitReader; +impl ComP0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COM_P0_A { + pub const fn variant(&self) -> ComP0 { match self.bits { - false => COM_P0_A::VALUE1, - true => COM_P0_A::VALUE2, + false => ComP0::Value1, + true => ComP0::Value2, } } #[doc = "No stable communication"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COM_P0_A::VALUE1 + *self == ComP0::Value1 } #[doc = "Communication established"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COM_P0_A::VALUE2 + *self == ComP0::Value2 } } -#[doc = "Field `LP1` reader - Loop Port 1"] -pub type LP1_R = crate::BitReader; #[doc = "Loop Port 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LP1_A { +pub enum Lp1 { #[doc = "0: Open"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Closed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LP1_A) -> Self { + fn from(variant: Lp1) -> Self { variant as u8 != 0 } } -impl LP1_R { +#[doc = "Field `LP1` reader - Loop Port 1"] +pub type Lp1R = crate::BitReader; +impl Lp1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP1_A { + pub const fn variant(&self) -> Lp1 { match self.bits { - false => LP1_A::VALUE1, - true => LP1_A::VALUE2, + false => Lp1::Value1, + true => Lp1::Value2, } } #[doc = "Open"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP1_A::VALUE1 + *self == Lp1::Value1 } #[doc = "Closed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP1_A::VALUE2 + *self == Lp1::Value2 } } -#[doc = "Field `COM_P1` reader - Communication on Port 1"] -pub type COM_P1_R = crate::BitReader; #[doc = "Communication on Port 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COM_P1_A { +pub enum ComP1 { #[doc = "0: No stable communication"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Communication established"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COM_P1_A) -> Self { + fn from(variant: ComP1) -> Self { variant as u8 != 0 } } -impl COM_P1_R { +#[doc = "Field `COM_P1` reader - Communication on Port 1"] +pub type ComP1R = crate::BitReader; +impl ComP1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COM_P1_A { + pub const fn variant(&self) -> ComP1 { match self.bits { - false => COM_P1_A::VALUE1, - true => COM_P1_A::VALUE2, + false => ComP1::Value1, + true => ComP1::Value2, } } #[doc = "No stable communication"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COM_P1_A::VALUE1 + *self == ComP1::Value1 } #[doc = "Communication established"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COM_P1_A::VALUE2 + *self == ComP1::Value2 } } -#[doc = "Field `LP2` reader - Loop Port 2"] -pub type LP2_R = crate::BitReader; #[doc = "Loop Port 2\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LP2_A { +pub enum Lp2 { #[doc = "0: Open"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Closed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LP2_A) -> Self { + fn from(variant: Lp2) -> Self { variant as u8 != 0 } } -impl LP2_R { +#[doc = "Field `LP2` reader - Loop Port 2"] +pub type Lp2R = crate::BitReader; +impl Lp2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP2_A { + pub const fn variant(&self) -> Lp2 { match self.bits { - false => LP2_A::VALUE1, - true => LP2_A::VALUE2, + false => Lp2::Value1, + true => Lp2::Value2, } } #[doc = "Open"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP2_A::VALUE1 + *self == Lp2::Value1 } #[doc = "Closed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP2_A::VALUE2 + *self == Lp2::Value2 } } -#[doc = "Field `COM_P2` reader - Communication on Port 2"] -pub type COM_P2_R = crate::BitReader; #[doc = "Communication on Port 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COM_P2_A { +pub enum ComP2 { #[doc = "0: No stable communication"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Communication established"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COM_P2_A) -> Self { + fn from(variant: ComP2) -> Self { variant as u8 != 0 } } -impl COM_P2_R { +#[doc = "Field `COM_P2` reader - Communication on Port 2"] +pub type ComP2R = crate::BitReader; +impl ComP2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COM_P2_A { + pub const fn variant(&self) -> ComP2 { match self.bits { - false => COM_P2_A::VALUE1, - true => COM_P2_A::VALUE2, + false => ComP2::Value1, + true => ComP2::Value2, } } #[doc = "No stable communication"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COM_P2_A::VALUE1 + *self == ComP2::Value1 } #[doc = "Communication established"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COM_P2_A::VALUE2 + *self == ComP2::Value2 } } -#[doc = "Field `LP3` reader - Loop Port 3"] -pub type LP3_R = crate::BitReader; #[doc = "Loop Port 3\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LP3_A { +pub enum Lp3 { #[doc = "0: Open"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Closed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LP3_A) -> Self { + fn from(variant: Lp3) -> Self { variant as u8 != 0 } } -impl LP3_R { +#[doc = "Field `LP3` reader - Loop Port 3"] +pub type Lp3R = crate::BitReader; +impl Lp3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LP3_A { + pub const fn variant(&self) -> Lp3 { match self.bits { - false => LP3_A::VALUE1, - true => LP3_A::VALUE2, + false => Lp3::Value1, + true => Lp3::Value2, } } #[doc = "Open"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LP3_A::VALUE1 + *self == Lp3::Value1 } #[doc = "Closed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LP3_A::VALUE2 + *self == Lp3::Value2 } } -#[doc = "Field `COM_P3` reader - Communication on Port 3"] -pub type COM_P3_R = crate::BitReader; #[doc = "Communication on Port 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COM_P3_A { +pub enum ComP3 { #[doc = "0: No stable communication"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Communication established"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COM_P3_A) -> Self { + fn from(variant: ComP3) -> Self { variant as u8 != 0 } } -impl COM_P3_R { +#[doc = "Field `COM_P3` reader - Communication on Port 3"] +pub type ComP3R = crate::BitReader; +impl ComP3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COM_P3_A { + pub const fn variant(&self) -> ComP3 { match self.bits { - false => COM_P3_A::VALUE1, - true => COM_P3_A::VALUE2, + false => ComP3::Value1, + true => ComP3::Value2, } } #[doc = "No stable communication"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COM_P3_A::VALUE1 + *self == ComP3::Value1 } #[doc = "Communication established"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COM_P3_A::VALUE2 + *self == ComP3::Value2 } } impl R { #[doc = "Bit 0 - PDI operational/EEPROM loaded correctly"] #[inline(always)] - pub fn pdi_eeprom(&self) -> PDI_EEPROM_R { - PDI_EEPROM_R::new((self.bits & 1) != 0) + pub fn pdi_eeprom(&self) -> PdiEepromR { + PdiEepromR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - PDI Watchdog Status"] #[inline(always)] - pub fn pdi_wdt_s(&self) -> PDI_WDT_S_R { - PDI_WDT_S_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdi_wdt_s(&self) -> PdiWdtSR { + PdiWdtSR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Enhanced Link detection"] #[inline(always)] - pub fn eld(&self) -> ELD_R { - ELD_R::new(((self.bits >> 2) & 1) != 0) + pub fn eld(&self) -> EldR { + EldR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Physical link on Port 0"] #[inline(always)] - pub fn link_p0(&self) -> LINK_P0_R { - LINK_P0_R::new(((self.bits >> 4) & 1) != 0) + pub fn link_p0(&self) -> LinkP0R { + LinkP0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Physical link on Port 1"] #[inline(always)] - pub fn link_p1(&self) -> LINK_P1_R { - LINK_P1_R::new(((self.bits >> 5) & 1) != 0) + pub fn link_p1(&self) -> LinkP1R { + LinkP1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Physical link on Port 2"] #[inline(always)] - pub fn link_p2(&self) -> LINK_P2_R { - LINK_P2_R::new(((self.bits >> 6) & 1) != 0) + pub fn link_p2(&self) -> LinkP2R { + LinkP2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Physical link on Port 3"] #[inline(always)] - pub fn link_p3(&self) -> LINK_P3_R { - LINK_P3_R::new(((self.bits >> 7) & 1) != 0) + pub fn link_p3(&self) -> LinkP3R { + LinkP3R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Loop Port 0"] #[inline(always)] - pub fn lp0(&self) -> LP0_R { - LP0_R::new(((self.bits >> 8) & 1) != 0) + pub fn lp0(&self) -> Lp0R { + Lp0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Communication on Port 0"] #[inline(always)] - pub fn com_p0(&self) -> COM_P0_R { - COM_P0_R::new(((self.bits >> 9) & 1) != 0) + pub fn com_p0(&self) -> ComP0R { + ComP0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Loop Port 1"] #[inline(always)] - pub fn lp1(&self) -> LP1_R { - LP1_R::new(((self.bits >> 10) & 1) != 0) + pub fn lp1(&self) -> Lp1R { + Lp1R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Communication on Port 1"] #[inline(always)] - pub fn com_p1(&self) -> COM_P1_R { - COM_P1_R::new(((self.bits >> 11) & 1) != 0) + pub fn com_p1(&self) -> ComP1R { + ComP1R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Loop Port 2"] #[inline(always)] - pub fn lp2(&self) -> LP2_R { - LP2_R::new(((self.bits >> 12) & 1) != 0) + pub fn lp2(&self) -> Lp2R { + Lp2R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Communication on Port 2"] #[inline(always)] - pub fn com_p2(&self) -> COM_P2_R { - COM_P2_R::new(((self.bits >> 13) & 1) != 0) + pub fn com_p2(&self) -> ComP2R { + ComP2R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Loop Port 3"] #[inline(always)] - pub fn lp3(&self) -> LP3_R { - LP3_R::new(((self.bits >> 14) & 1) != 0) + pub fn lp3(&self) -> Lp3R { + Lp3R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Communication on Port 3"] #[inline(always)] - pub fn com_p3(&self) -> COM_P3_R { - COM_P3_R::new(((self.bits >> 15) & 1) != 0) + pub fn com_p3(&self) -> ComP3R { + ComP3R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "ESC DL Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_dl_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ESC_DL_STATUS_SPEC; -impl crate::RegisterSpec for ESC_DL_STATUS_SPEC { +pub struct EscDlStatusSpec; +impl crate::RegisterSpec for EscDlStatusSpec { type Ux = u16; } #[doc = "`read()` method returns [`esc_dl_status::R`](R) reader structure"] -impl crate::Readable for ESC_DL_STATUS_SPEC {} +impl crate::Readable for EscDlStatusSpec {} #[doc = "`reset()` method sets ESC_DL_STATUS to value 0x5000"] -impl crate::Resettable for ESC_DL_STATUS_SPEC { +impl crate::Resettable for EscDlStatusSpec { const RESET_VALUE: u16 = 0x5000; } diff --git a/src/ecat0/esc_wr_enable.rs b/src/ecat0/esc_wr_enable.rs index e5dfe66e..0a729d22 100644 --- a/src/ecat0/esc_wr_enable.rs +++ b/src/ecat0/esc_wr_enable.rs @@ -1,22 +1,22 @@ #[doc = "Register `ESC_WR_ENABLE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ESC_WR_PROT` reader - Write protection enabled"] -pub type ESC_WR_PROT_R = crate::BitReader; +pub type EscWrProtR = crate::BitReader; impl R { #[doc = "Bit 0 - Write protection enabled"] #[inline(always)] - pub fn esc_wr_prot(&self) -> ESC_WR_PROT_R { - ESC_WR_PROT_R::new((self.bits & 1) != 0) + pub fn esc_wr_prot(&self) -> EscWrProtR { + EscWrProtR::new((self.bits & 1) != 0) } } #[doc = "ESC Write Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_wr_enable::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ESC_WR_ENABLE_SPEC; -impl crate::RegisterSpec for ESC_WR_ENABLE_SPEC { +pub struct EscWrEnableSpec; +impl crate::RegisterSpec for EscWrEnableSpec { type Ux = u8; } #[doc = "`read()` method returns [`esc_wr_enable::R`](R) reader structure"] -impl crate::Readable for ESC_WR_ENABLE_SPEC {} +impl crate::Readable for EscWrEnableSpec {} #[doc = "`reset()` method sets ESC_WR_ENABLE to value 0"] -impl crate::Resettable for ESC_WR_ENABLE_SPEC { +impl crate::Resettable for EscWrEnableSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/esc_wr_protect.rs b/src/ecat0/esc_wr_protect.rs index 293144f8..0c7cc68c 100644 --- a/src/ecat0/esc_wr_protect.rs +++ b/src/ecat0/esc_wr_protect.rs @@ -1,56 +1,56 @@ #[doc = "Register `ESC_WR_PROTECT` reader"] -pub type R = crate::R; -#[doc = "Field `ESC_WR_PROT` reader - Write protect"] -pub type ESC_WR_PROT_R = crate::BitReader; +pub type R = crate::R; #[doc = "Write protect\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ESC_WR_PROT_A { +pub enum EscWrProt { #[doc = "0: Protection disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Protection enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ESC_WR_PROT_A) -> Self { + fn from(variant: EscWrProt) -> Self { variant as u8 != 0 } } -impl ESC_WR_PROT_R { +#[doc = "Field `ESC_WR_PROT` reader - Write protect"] +pub type EscWrProtR = crate::BitReader; +impl EscWrProtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ESC_WR_PROT_A { + pub const fn variant(&self) -> EscWrProt { match self.bits { - false => ESC_WR_PROT_A::VALUE1, - true => ESC_WR_PROT_A::VALUE2, + false => EscWrProt::Value1, + true => EscWrProt::Value2, } } #[doc = "Protection disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ESC_WR_PROT_A::VALUE1 + *self == EscWrProt::Value1 } #[doc = "Protection enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ESC_WR_PROT_A::VALUE2 + *self == EscWrProt::Value2 } } impl R { #[doc = "Bit 0 - Write protect"] #[inline(always)] - pub fn esc_wr_prot(&self) -> ESC_WR_PROT_R { - ESC_WR_PROT_R::new((self.bits & 1) != 0) + pub fn esc_wr_prot(&self) -> EscWrProtR { + EscWrProtR::new((self.bits & 1) != 0) } } #[doc = "ESC Write Protection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`esc_wr_protect::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ESC_WR_PROTECT_SPEC; -impl crate::RegisterSpec for ESC_WR_PROTECT_SPEC { +pub struct EscWrProtectSpec; +impl crate::RegisterSpec for EscWrProtectSpec { type Ux = u8; } #[doc = "`read()` method returns [`esc_wr_protect::R`](R) reader structure"] -impl crate::Readable for ESC_WR_PROTECT_SPEC {} +impl crate::Readable for EscWrProtectSpec {} #[doc = "`reset()` method sets ESC_WR_PROTECT to value 0"] -impl crate::Resettable for ESC_WR_PROTECT_SPEC { +impl crate::Resettable for EscWrProtectSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/event_mask.rs b/src/ecat0/event_mask.rs index 0692d9f8..ce702937 100644 --- a/src/ecat0/event_mask.rs +++ b/src/ecat0/event_mask.rs @@ -1,466 +1,466 @@ #[doc = "Register `EVENT_MASK` reader"] -pub type R = crate::R; -#[doc = "Field `DC_LE_MASK` reader - DC Latch event"] -pub type DC_LE_MASK_R = crate::BitReader; +pub type R = crate::R; #[doc = "DC Latch event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DC_LE_MASK_A { +pub enum DcLeMask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DC_LE_MASK_A) -> Self { + fn from(variant: DcLeMask) -> Self { variant as u8 != 0 } } -impl DC_LE_MASK_R { +#[doc = "Field `DC_LE_MASK` reader - DC Latch event"] +pub type DcLeMaskR = crate::BitReader; +impl DcLeMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DC_LE_MASK_A { + pub const fn variant(&self) -> DcLeMask { match self.bits { - false => DC_LE_MASK_A::VALUE1, - true => DC_LE_MASK_A::VALUE2, + false => DcLeMask::Value1, + true => DcLeMask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DC_LE_MASK_A::VALUE1 + *self == DcLeMask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DC_LE_MASK_A::VALUE2 + *self == DcLeMask::Value2 } } -#[doc = "Field `DL_SE_MASK` reader - DL Status event"] -pub type DL_SE_MASK_R = crate::BitReader; #[doc = "DL Status event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DL_SE_MASK_A { +pub enum DlSeMask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DL_SE_MASK_A) -> Self { + fn from(variant: DlSeMask) -> Self { variant as u8 != 0 } } -impl DL_SE_MASK_R { +#[doc = "Field `DL_SE_MASK` reader - DL Status event"] +pub type DlSeMaskR = crate::BitReader; +impl DlSeMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DL_SE_MASK_A { + pub const fn variant(&self) -> DlSeMask { match self.bits { - false => DL_SE_MASK_A::VALUE1, - true => DL_SE_MASK_A::VALUE2, + false => DlSeMask::Value1, + true => DlSeMask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DL_SE_MASK_A::VALUE1 + *self == DlSeMask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DL_SE_MASK_A::VALUE2 + *self == DlSeMask::Value2 } } -#[doc = "Field `AL_SE_MASK` reader - AL Status event"] -pub type AL_SE_MASK_R = crate::BitReader; #[doc = "AL Status event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AL_SE_MASK_A { +pub enum AlSeMask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AL_SE_MASK_A) -> Self { + fn from(variant: AlSeMask) -> Self { variant as u8 != 0 } } -impl AL_SE_MASK_R { +#[doc = "Field `AL_SE_MASK` reader - AL Status event"] +pub type AlSeMaskR = crate::BitReader; +impl AlSeMaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AL_SE_MASK_A { + pub const fn variant(&self) -> AlSeMask { match self.bits { - false => AL_SE_MASK_A::VALUE1, - true => AL_SE_MASK_A::VALUE2, + false => AlSeMask::Value1, + true => AlSeMask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AL_SE_MASK_A::VALUE1 + *self == AlSeMask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AL_SE_MASK_A::VALUE2 + *self == AlSeMask::Value2 } } -#[doc = "Field `MIR_0_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_0_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_0_MASK_A { +pub enum Mir0Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_0_MASK_A) -> Self { + fn from(variant: Mir0Mask) -> Self { variant as u8 != 0 } } -impl MIR_0_MASK_R { +#[doc = "Field `MIR_0_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir0MaskR = crate::BitReader; +impl Mir0MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_0_MASK_A { + pub const fn variant(&self) -> Mir0Mask { match self.bits { - false => MIR_0_MASK_A::VALUE1, - true => MIR_0_MASK_A::VALUE2, + false => Mir0Mask::Value1, + true => Mir0Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_0_MASK_A::VALUE1 + *self == Mir0Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_0_MASK_A::VALUE2 + *self == Mir0Mask::Value2 } } -#[doc = "Field `MIR_1_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_1_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_1_MASK_A { +pub enum Mir1Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_1_MASK_A) -> Self { + fn from(variant: Mir1Mask) -> Self { variant as u8 != 0 } } -impl MIR_1_MASK_R { +#[doc = "Field `MIR_1_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir1MaskR = crate::BitReader; +impl Mir1MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_1_MASK_A { + pub const fn variant(&self) -> Mir1Mask { match self.bits { - false => MIR_1_MASK_A::VALUE1, - true => MIR_1_MASK_A::VALUE2, + false => Mir1Mask::Value1, + true => Mir1Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_1_MASK_A::VALUE1 + *self == Mir1Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_1_MASK_A::VALUE2 + *self == Mir1Mask::Value2 } } -#[doc = "Field `MIR_2_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_2_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_2_MASK_A { +pub enum Mir2Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_2_MASK_A) -> Self { + fn from(variant: Mir2Mask) -> Self { variant as u8 != 0 } } -impl MIR_2_MASK_R { +#[doc = "Field `MIR_2_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir2MaskR = crate::BitReader; +impl Mir2MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_2_MASK_A { + pub const fn variant(&self) -> Mir2Mask { match self.bits { - false => MIR_2_MASK_A::VALUE1, - true => MIR_2_MASK_A::VALUE2, + false => Mir2Mask::Value1, + true => Mir2Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_2_MASK_A::VALUE1 + *self == Mir2Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_2_MASK_A::VALUE2 + *self == Mir2Mask::Value2 } } -#[doc = "Field `MIR_3_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_3_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_3_MASK_A { +pub enum Mir3Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_3_MASK_A) -> Self { + fn from(variant: Mir3Mask) -> Self { variant as u8 != 0 } } -impl MIR_3_MASK_R { +#[doc = "Field `MIR_3_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir3MaskR = crate::BitReader; +impl Mir3MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_3_MASK_A { + pub const fn variant(&self) -> Mir3Mask { match self.bits { - false => MIR_3_MASK_A::VALUE1, - true => MIR_3_MASK_A::VALUE2, + false => Mir3Mask::Value1, + true => Mir3Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_3_MASK_A::VALUE1 + *self == Mir3Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_3_MASK_A::VALUE2 + *self == Mir3Mask::Value2 } } -#[doc = "Field `MIR_4_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_4_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_4_MASK_A { +pub enum Mir4Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_4_MASK_A) -> Self { + fn from(variant: Mir4Mask) -> Self { variant as u8 != 0 } } -impl MIR_4_MASK_R { +#[doc = "Field `MIR_4_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir4MaskR = crate::BitReader; +impl Mir4MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_4_MASK_A { + pub const fn variant(&self) -> Mir4Mask { match self.bits { - false => MIR_4_MASK_A::VALUE1, - true => MIR_4_MASK_A::VALUE2, + false => Mir4Mask::Value1, + true => Mir4Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_4_MASK_A::VALUE1 + *self == Mir4Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_4_MASK_A::VALUE2 + *self == Mir4Mask::Value2 } } -#[doc = "Field `MIR_5_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_5_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_5_MASK_A { +pub enum Mir5Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_5_MASK_A) -> Self { + fn from(variant: Mir5Mask) -> Self { variant as u8 != 0 } } -impl MIR_5_MASK_R { +#[doc = "Field `MIR_5_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir5MaskR = crate::BitReader; +impl Mir5MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_5_MASK_A { + pub const fn variant(&self) -> Mir5Mask { match self.bits { - false => MIR_5_MASK_A::VALUE1, - true => MIR_5_MASK_A::VALUE2, + false => Mir5Mask::Value1, + true => Mir5Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_5_MASK_A::VALUE1 + *self == Mir5Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_5_MASK_A::VALUE2 + *self == Mir5Mask::Value2 } } -#[doc = "Field `MIR_6_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_6_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_6_MASK_A { +pub enum Mir6Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_6_MASK_A) -> Self { + fn from(variant: Mir6Mask) -> Self { variant as u8 != 0 } } -impl MIR_6_MASK_R { +#[doc = "Field `MIR_6_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir6MaskR = crate::BitReader; +impl Mir6MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_6_MASK_A { + pub const fn variant(&self) -> Mir6Mask { match self.bits { - false => MIR_6_MASK_A::VALUE1, - true => MIR_6_MASK_A::VALUE2, + false => Mir6Mask::Value1, + true => Mir6Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_6_MASK_A::VALUE1 + *self == Mir6Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_6_MASK_A::VALUE2 + *self == Mir6Mask::Value2 } } -#[doc = "Field `MIR_7_MASK` reader - Mirrors values of each SyncManager Status"] -pub type MIR_7_MASK_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_7_MASK_A { +pub enum Mir7Mask { #[doc = "0: Corresponding ECAT Event Request register bit is not mapped"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Corresponding ECAT Event Request register bit is mapped"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_7_MASK_A) -> Self { + fn from(variant: Mir7Mask) -> Self { variant as u8 != 0 } } -impl MIR_7_MASK_R { +#[doc = "Field `MIR_7_MASK` reader - Mirrors values of each SyncManager Status"] +pub type Mir7MaskR = crate::BitReader; +impl Mir7MaskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_7_MASK_A { + pub const fn variant(&self) -> Mir7Mask { match self.bits { - false => MIR_7_MASK_A::VALUE1, - true => MIR_7_MASK_A::VALUE2, + false => Mir7Mask::Value1, + true => Mir7Mask::Value2, } } #[doc = "Corresponding ECAT Event Request register bit is not mapped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_7_MASK_A::VALUE1 + *self == Mir7Mask::Value1 } #[doc = "Corresponding ECAT Event Request register bit is mapped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_7_MASK_A::VALUE2 + *self == Mir7Mask::Value2 } } impl R { #[doc = "Bit 0 - DC Latch event"] #[inline(always)] - pub fn dc_le_mask(&self) -> DC_LE_MASK_R { - DC_LE_MASK_R::new((self.bits & 1) != 0) + pub fn dc_le_mask(&self) -> DcLeMaskR { + DcLeMaskR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - DL Status event"] #[inline(always)] - pub fn dl_se_mask(&self) -> DL_SE_MASK_R { - DL_SE_MASK_R::new(((self.bits >> 2) & 1) != 0) + pub fn dl_se_mask(&self) -> DlSeMaskR { + DlSeMaskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - AL Status event"] #[inline(always)] - pub fn al_se_mask(&self) -> AL_SE_MASK_R { - AL_SE_MASK_R::new(((self.bits >> 3) & 1) != 0) + pub fn al_se_mask(&self) -> AlSeMaskR { + AlSeMaskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_0_mask(&self) -> MIR_0_MASK_R { - MIR_0_MASK_R::new(((self.bits >> 4) & 1) != 0) + pub fn mir_0_mask(&self) -> Mir0MaskR { + Mir0MaskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_1_mask(&self) -> MIR_1_MASK_R { - MIR_1_MASK_R::new(((self.bits >> 5) & 1) != 0) + pub fn mir_1_mask(&self) -> Mir1MaskR { + Mir1MaskR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_2_mask(&self) -> MIR_2_MASK_R { - MIR_2_MASK_R::new(((self.bits >> 6) & 1) != 0) + pub fn mir_2_mask(&self) -> Mir2MaskR { + Mir2MaskR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_3_mask(&self) -> MIR_3_MASK_R { - MIR_3_MASK_R::new(((self.bits >> 7) & 1) != 0) + pub fn mir_3_mask(&self) -> Mir3MaskR { + Mir3MaskR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_4_mask(&self) -> MIR_4_MASK_R { - MIR_4_MASK_R::new(((self.bits >> 8) & 1) != 0) + pub fn mir_4_mask(&self) -> Mir4MaskR { + Mir4MaskR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_5_mask(&self) -> MIR_5_MASK_R { - MIR_5_MASK_R::new(((self.bits >> 9) & 1) != 0) + pub fn mir_5_mask(&self) -> Mir5MaskR { + Mir5MaskR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_6_mask(&self) -> MIR_6_MASK_R { - MIR_6_MASK_R::new(((self.bits >> 10) & 1) != 0) + pub fn mir_6_mask(&self) -> Mir6MaskR { + Mir6MaskR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_7_mask(&self) -> MIR_7_MASK_R { - MIR_7_MASK_R::new(((self.bits >> 11) & 1) != 0) + pub fn mir_7_mask(&self) -> Mir7MaskR { + Mir7MaskR::new(((self.bits >> 11) & 1) != 0) } } #[doc = "ECAT Event Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`event_mask::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVENT_MASK_SPEC; -impl crate::RegisterSpec for EVENT_MASK_SPEC { +pub struct EventMaskSpec; +impl crate::RegisterSpec for EventMaskSpec { type Ux = u16; } #[doc = "`read()` method returns [`event_mask::R`](R) reader structure"] -impl crate::Readable for EVENT_MASK_SPEC {} +impl crate::Readable for EventMaskSpec {} #[doc = "`reset()` method sets EVENT_MASK to value 0"] -impl crate::Resettable for EVENT_MASK_SPEC { +impl crate::Resettable for EventMaskSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/event_req.rs b/src/ecat0/event_req.rs index b3d29d0c..9bee75cb 100644 --- a/src/ecat0/event_req.rs +++ b/src/ecat0/event_req.rs @@ -1,466 +1,466 @@ #[doc = "Register `EVENT_REQ` reader"] -pub type R = crate::R; -#[doc = "Field `DC_LE` reader - DC Latch event"] -pub type DC_LE_R = crate::BitReader; +pub type R = crate::R; #[doc = "DC Latch event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DC_LE_A { +pub enum DcLe { #[doc = "0: No change on DC Latch Inputs"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: At least one change on DC Latch Inputs"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DC_LE_A) -> Self { + fn from(variant: DcLe) -> Self { variant as u8 != 0 } } -impl DC_LE_R { +#[doc = "Field `DC_LE` reader - DC Latch event"] +pub type DcLeR = crate::BitReader; +impl DcLeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DC_LE_A { + pub const fn variant(&self) -> DcLe { match self.bits { - false => DC_LE_A::VALUE1, - true => DC_LE_A::VALUE2, + false => DcLe::Value1, + true => DcLe::Value2, } } #[doc = "No change on DC Latch Inputs"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DC_LE_A::VALUE1 + *self == DcLe::Value1 } #[doc = "At least one change on DC Latch Inputs"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DC_LE_A::VALUE2 + *self == DcLe::Value2 } } -#[doc = "Field `DL_SE` reader - DL Status event"] -pub type DL_SE_R = crate::BitReader; #[doc = "DL Status event\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DL_SE_A { +pub enum DlSe { #[doc = "0: No change in DL Status"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DL Status change"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DL_SE_A) -> Self { + fn from(variant: DlSe) -> Self { variant as u8 != 0 } } -impl DL_SE_R { +#[doc = "Field `DL_SE` reader - DL Status event"] +pub type DlSeR = crate::BitReader; +impl DlSeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DL_SE_A { + pub const fn variant(&self) -> DlSe { match self.bits { - false => DL_SE_A::VALUE1, - true => DL_SE_A::VALUE2, + false => DlSe::Value1, + true => DlSe::Value2, } } #[doc = "No change in DL Status"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DL_SE_A::VALUE1 + *self == DlSe::Value1 } #[doc = "DL Status change"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DL_SE_A::VALUE2 + *self == DlSe::Value2 } } -#[doc = "Field `AL_SE` reader - AL Status event"] -pub type AL_SE_R = crate::BitReader; #[doc = "AL Status event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AL_SE_A { +pub enum AlSe { #[doc = "0: No change in AL Status"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: AL Status change"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AL_SE_A) -> Self { + fn from(variant: AlSe) -> Self { variant as u8 != 0 } } -impl AL_SE_R { +#[doc = "Field `AL_SE` reader - AL Status event"] +pub type AlSeR = crate::BitReader; +impl AlSeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AL_SE_A { + pub const fn variant(&self) -> AlSe { match self.bits { - false => AL_SE_A::VALUE1, - true => AL_SE_A::VALUE2, + false => AlSe::Value1, + true => AlSe::Value2, } } #[doc = "No change in AL Status"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AL_SE_A::VALUE1 + *self == AlSe::Value1 } #[doc = "AL Status change"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AL_SE_A::VALUE2 + *self == AlSe::Value2 } } -#[doc = "Field `MIR_0` reader - Mirrors values of each SyncManager Status"] -pub type MIR_0_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_0_A { +pub enum Mir0 { #[doc = "0: No Sync Channel 0 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 0 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_0_A) -> Self { + fn from(variant: Mir0) -> Self { variant as u8 != 0 } } -impl MIR_0_R { +#[doc = "Field `MIR_0` reader - Mirrors values of each SyncManager Status"] +pub type Mir0R = crate::BitReader; +impl Mir0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_0_A { + pub const fn variant(&self) -> Mir0 { match self.bits { - false => MIR_0_A::VALUE1, - true => MIR_0_A::VALUE2, + false => Mir0::Value1, + true => Mir0::Value2, } } #[doc = "No Sync Channel 0 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_0_A::VALUE1 + *self == Mir0::Value1 } #[doc = "Sync Channel 0 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_0_A::VALUE2 + *self == Mir0::Value2 } } -#[doc = "Field `MIR_1` reader - Mirrors values of each SyncManager Status"] -pub type MIR_1_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_1_A { +pub enum Mir1 { #[doc = "0: No Sync Channel 1 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 1 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_1_A) -> Self { + fn from(variant: Mir1) -> Self { variant as u8 != 0 } } -impl MIR_1_R { +#[doc = "Field `MIR_1` reader - Mirrors values of each SyncManager Status"] +pub type Mir1R = crate::BitReader; +impl Mir1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_1_A { + pub const fn variant(&self) -> Mir1 { match self.bits { - false => MIR_1_A::VALUE1, - true => MIR_1_A::VALUE2, + false => Mir1::Value1, + true => Mir1::Value2, } } #[doc = "No Sync Channel 1 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_1_A::VALUE1 + *self == Mir1::Value1 } #[doc = "Sync Channel 1 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_1_A::VALUE2 + *self == Mir1::Value2 } } -#[doc = "Field `MIR_2` reader - Mirrors values of each SyncManager Status"] -pub type MIR_2_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_2_A { +pub enum Mir2 { #[doc = "0: No Sync Channel 2 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 2 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_2_A) -> Self { + fn from(variant: Mir2) -> Self { variant as u8 != 0 } } -impl MIR_2_R { +#[doc = "Field `MIR_2` reader - Mirrors values of each SyncManager Status"] +pub type Mir2R = crate::BitReader; +impl Mir2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_2_A { + pub const fn variant(&self) -> Mir2 { match self.bits { - false => MIR_2_A::VALUE1, - true => MIR_2_A::VALUE2, + false => Mir2::Value1, + true => Mir2::Value2, } } #[doc = "No Sync Channel 2 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_2_A::VALUE1 + *self == Mir2::Value1 } #[doc = "Sync Channel 2 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_2_A::VALUE2 + *self == Mir2::Value2 } } -#[doc = "Field `MIR_3` reader - Mirrors values of each SyncManager Status"] -pub type MIR_3_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_3_A { +pub enum Mir3 { #[doc = "0: No Sync Channel 3 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 3event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_3_A) -> Self { + fn from(variant: Mir3) -> Self { variant as u8 != 0 } } -impl MIR_3_R { +#[doc = "Field `MIR_3` reader - Mirrors values of each SyncManager Status"] +pub type Mir3R = crate::BitReader; +impl Mir3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_3_A { + pub const fn variant(&self) -> Mir3 { match self.bits { - false => MIR_3_A::VALUE1, - true => MIR_3_A::VALUE2, + false => Mir3::Value1, + true => Mir3::Value2, } } #[doc = "No Sync Channel 3 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_3_A::VALUE1 + *self == Mir3::Value1 } #[doc = "Sync Channel 3event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_3_A::VALUE2 + *self == Mir3::Value2 } } -#[doc = "Field `MIR_4` reader - Mirrors values of each SyncManager Status"] -pub type MIR_4_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_4_A { +pub enum Mir4 { #[doc = "0: No Sync Channel 4 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 4 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_4_A) -> Self { + fn from(variant: Mir4) -> Self { variant as u8 != 0 } } -impl MIR_4_R { +#[doc = "Field `MIR_4` reader - Mirrors values of each SyncManager Status"] +pub type Mir4R = crate::BitReader; +impl Mir4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_4_A { + pub const fn variant(&self) -> Mir4 { match self.bits { - false => MIR_4_A::VALUE1, - true => MIR_4_A::VALUE2, + false => Mir4::Value1, + true => Mir4::Value2, } } #[doc = "No Sync Channel 4 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_4_A::VALUE1 + *self == Mir4::Value1 } #[doc = "Sync Channel 4 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_4_A::VALUE2 + *self == Mir4::Value2 } } -#[doc = "Field `MIR_5` reader - Mirrors values of each SyncManager Status"] -pub type MIR_5_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_5_A { +pub enum Mir5 { #[doc = "0: No Sync Channel 5 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 5 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_5_A) -> Self { + fn from(variant: Mir5) -> Self { variant as u8 != 0 } } -impl MIR_5_R { +#[doc = "Field `MIR_5` reader - Mirrors values of each SyncManager Status"] +pub type Mir5R = crate::BitReader; +impl Mir5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_5_A { + pub const fn variant(&self) -> Mir5 { match self.bits { - false => MIR_5_A::VALUE1, - true => MIR_5_A::VALUE2, + false => Mir5::Value1, + true => Mir5::Value2, } } #[doc = "No Sync Channel 5 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_5_A::VALUE1 + *self == Mir5::Value1 } #[doc = "Sync Channel 5 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_5_A::VALUE2 + *self == Mir5::Value2 } } -#[doc = "Field `MIR_6` reader - Mirrors values of each SyncManager Status"] -pub type MIR_6_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_6_A { +pub enum Mir6 { #[doc = "0: No Sync Channel 6 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 6 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_6_A) -> Self { + fn from(variant: Mir6) -> Self { variant as u8 != 0 } } -impl MIR_6_R { +#[doc = "Field `MIR_6` reader - Mirrors values of each SyncManager Status"] +pub type Mir6R = crate::BitReader; +impl Mir6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_6_A { + pub const fn variant(&self) -> Mir6 { match self.bits { - false => MIR_6_A::VALUE1, - true => MIR_6_A::VALUE2, + false => Mir6::Value1, + true => Mir6::Value2, } } #[doc = "No Sync Channel 6 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_6_A::VALUE1 + *self == Mir6::Value1 } #[doc = "Sync Channel 6 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_6_A::VALUE2 + *self == Mir6::Value2 } } -#[doc = "Field `MIR_7` reader - Mirrors values of each SyncManager Status"] -pub type MIR_7_R = crate::BitReader; #[doc = "Mirrors values of each SyncManager Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIR_7_A { +pub enum Mir7 { #[doc = "0: No Sync Channel 7 event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sync Channel 7 event pending"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIR_7_A) -> Self { + fn from(variant: Mir7) -> Self { variant as u8 != 0 } } -impl MIR_7_R { +#[doc = "Field `MIR_7` reader - Mirrors values of each SyncManager Status"] +pub type Mir7R = crate::BitReader; +impl Mir7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIR_7_A { + pub const fn variant(&self) -> Mir7 { match self.bits { - false => MIR_7_A::VALUE1, - true => MIR_7_A::VALUE2, + false => Mir7::Value1, + true => Mir7::Value2, } } #[doc = "No Sync Channel 7 event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIR_7_A::VALUE1 + *self == Mir7::Value1 } #[doc = "Sync Channel 7 event pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIR_7_A::VALUE2 + *self == Mir7::Value2 } } impl R { #[doc = "Bit 0 - DC Latch event"] #[inline(always)] - pub fn dc_le(&self) -> DC_LE_R { - DC_LE_R::new((self.bits & 1) != 0) + pub fn dc_le(&self) -> DcLeR { + DcLeR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - DL Status event"] #[inline(always)] - pub fn dl_se(&self) -> DL_SE_R { - DL_SE_R::new(((self.bits >> 2) & 1) != 0) + pub fn dl_se(&self) -> DlSeR { + DlSeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - AL Status event"] #[inline(always)] - pub fn al_se(&self) -> AL_SE_R { - AL_SE_R::new(((self.bits >> 3) & 1) != 0) + pub fn al_se(&self) -> AlSeR { + AlSeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_0(&self) -> MIR_0_R { - MIR_0_R::new(((self.bits >> 4) & 1) != 0) + pub fn mir_0(&self) -> Mir0R { + Mir0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_1(&self) -> MIR_1_R { - MIR_1_R::new(((self.bits >> 5) & 1) != 0) + pub fn mir_1(&self) -> Mir1R { + Mir1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_2(&self) -> MIR_2_R { - MIR_2_R::new(((self.bits >> 6) & 1) != 0) + pub fn mir_2(&self) -> Mir2R { + Mir2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_3(&self) -> MIR_3_R { - MIR_3_R::new(((self.bits >> 7) & 1) != 0) + pub fn mir_3(&self) -> Mir3R { + Mir3R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_4(&self) -> MIR_4_R { - MIR_4_R::new(((self.bits >> 8) & 1) != 0) + pub fn mir_4(&self) -> Mir4R { + Mir4R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_5(&self) -> MIR_5_R { - MIR_5_R::new(((self.bits >> 9) & 1) != 0) + pub fn mir_5(&self) -> Mir5R { + Mir5R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_6(&self) -> MIR_6_R { - MIR_6_R::new(((self.bits >> 10) & 1) != 0) + pub fn mir_6(&self) -> Mir6R { + Mir6R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Mirrors values of each SyncManager Status"] #[inline(always)] - pub fn mir_7(&self) -> MIR_7_R { - MIR_7_R::new(((self.bits >> 11) & 1) != 0) + pub fn mir_7(&self) -> Mir7R { + Mir7R::new(((self.bits >> 11) & 1) != 0) } } #[doc = "ECAT Event Request\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`event_req::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVENT_REQ_SPEC; -impl crate::RegisterSpec for EVENT_REQ_SPEC { +pub struct EventReqSpec; +impl crate::RegisterSpec for EventReqSpec { type Ux = u16; } #[doc = "`read()` method returns [`event_req::R`](R) reader structure"] -impl crate::Readable for EVENT_REQ_SPEC {} +impl crate::Readable for EventReqSpec {} #[doc = "`reset()` method sets EVENT_REQ to value 0x04"] -impl crate::Resettable for EVENT_REQ_SPEC { +impl crate::Resettable for EventReqSpec { const RESET_VALUE: u16 = 0x04; } diff --git a/src/ecat0/feature.rs b/src/ecat0/feature.rs index 2838c879..14d081c8 100644 --- a/src/ecat0/feature.rs +++ b/src/ecat0/feature.rs @@ -1,466 +1,466 @@ #[doc = "Register `FEATURE` reader"] -pub type R = crate::R; -#[doc = "Field `FMMU` reader - FMMU Operation"] -pub type FMMU_R = crate::BitReader; +pub type R = crate::R; #[doc = "FMMU Operation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FMMU_A { +pub enum Fmmu { #[doc = "0: Bit oriented"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Byte oriented"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FMMU_A) -> Self { + fn from(variant: Fmmu) -> Self { variant as u8 != 0 } } -impl FMMU_R { +#[doc = "Field `FMMU` reader - FMMU Operation"] +pub type FmmuR = crate::BitReader; +impl FmmuR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FMMU_A { + pub const fn variant(&self) -> Fmmu { match self.bits { - false => FMMU_A::VALUE1, - true => FMMU_A::VALUE2, + false => Fmmu::Value1, + true => Fmmu::Value2, } } #[doc = "Bit oriented"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FMMU_A::VALUE1 + *self == Fmmu::Value1 } #[doc = "Byte oriented"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FMMU_A::VALUE2 + *self == Fmmu::Value2 } } -#[doc = "Field `CLKS` reader - Distributed Clocks"] -pub type CLKS_R = crate::BitReader; #[doc = "Distributed Clocks\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKS_A { +pub enum Clks { #[doc = "0: Not available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Available"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKS_A) -> Self { + fn from(variant: Clks) -> Self { variant as u8 != 0 } } -impl CLKS_R { +#[doc = "Field `CLKS` reader - Distributed Clocks"] +pub type ClksR = crate::BitReader; +impl ClksR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKS_A { + pub const fn variant(&self) -> Clks { match self.bits { - false => CLKS_A::VALUE1, - true => CLKS_A::VALUE2, + false => Clks::Value1, + true => Clks::Value2, } } #[doc = "Not available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKS_A::VALUE1 + *self == Clks::Value1 } #[doc = "Available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKS_A::VALUE2 + *self == Clks::Value2 } } -#[doc = "Field `CLKS_W` reader - Distributed Clocks (width)"] -pub type CLKS_W_R = crate::BitReader; #[doc = "Distributed Clocks (width)\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKS_W_A { +pub enum ClksW { #[doc = "0: 32 bits"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 64 bits"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKS_W_A) -> Self { + fn from(variant: ClksW) -> Self { variant as u8 != 0 } } -impl CLKS_W_R { +#[doc = "Field `CLKS_W` reader - Distributed Clocks (width)"] +pub type ClksWR = crate::BitReader; +impl ClksWR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKS_W_A { + pub const fn variant(&self) -> ClksW { match self.bits { - false => CLKS_W_A::VALUE1, - true => CLKS_W_A::VALUE2, + false => ClksW::Value1, + true => ClksW::Value2, } } #[doc = "32 bits"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKS_W_A::VALUE1 + *self == ClksW::Value1 } #[doc = "64 bits"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKS_W_A::VALUE2 + *self == ClksW::Value2 } } -#[doc = "Field `LJ_EBUS` reader - Low Jitter EBUS"] -pub type LJ_EBUS_R = crate::BitReader; #[doc = "Low Jitter EBUS\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LJ_EBUS_A { +pub enum LjEbus { #[doc = "0: Not available, standard jitter"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Available, jitter minimized"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LJ_EBUS_A) -> Self { + fn from(variant: LjEbus) -> Self { variant as u8 != 0 } } -impl LJ_EBUS_R { +#[doc = "Field `LJ_EBUS` reader - Low Jitter EBUS"] +pub type LjEbusR = crate::BitReader; +impl LjEbusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LJ_EBUS_A { + pub const fn variant(&self) -> LjEbus { match self.bits { - false => LJ_EBUS_A::VALUE1, - true => LJ_EBUS_A::VALUE2, + false => LjEbus::Value1, + true => LjEbus::Value2, } } #[doc = "Not available, standard jitter"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LJ_EBUS_A::VALUE1 + *self == LjEbus::Value1 } #[doc = "Available, jitter minimized"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LJ_EBUS_A::VALUE2 + *self == LjEbus::Value2 } } -#[doc = "Field `ELD_EBUS` reader - Enhanced Link Detection EBUS"] -pub type ELD_EBUS_R = crate::BitReader; #[doc = "Enhanced Link Detection EBUS\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ELD_EBUS_A { +pub enum EldEbus { #[doc = "0: Not available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Available"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ELD_EBUS_A) -> Self { + fn from(variant: EldEbus) -> Self { variant as u8 != 0 } } -impl ELD_EBUS_R { +#[doc = "Field `ELD_EBUS` reader - Enhanced Link Detection EBUS"] +pub type EldEbusR = crate::BitReader; +impl EldEbusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ELD_EBUS_A { + pub const fn variant(&self) -> EldEbus { match self.bits { - false => ELD_EBUS_A::VALUE1, - true => ELD_EBUS_A::VALUE2, + false => EldEbus::Value1, + true => EldEbus::Value2, } } #[doc = "Not available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ELD_EBUS_A::VALUE1 + *self == EldEbus::Value1 } #[doc = "Available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ELD_EBUS_A::VALUE2 + *self == EldEbus::Value2 } } -#[doc = "Field `ELD_MII` reader - Enhanced Link Detection MII"] -pub type ELD_MII_R = crate::BitReader; #[doc = "Enhanced Link Detection MII\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ELD_MII_A { +pub enum EldMii { #[doc = "0: Not available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Available"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ELD_MII_A) -> Self { + fn from(variant: EldMii) -> Self { variant as u8 != 0 } } -impl ELD_MII_R { +#[doc = "Field `ELD_MII` reader - Enhanced Link Detection MII"] +pub type EldMiiR = crate::BitReader; +impl EldMiiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ELD_MII_A { + pub const fn variant(&self) -> EldMii { match self.bits { - false => ELD_MII_A::VALUE1, - true => ELD_MII_A::VALUE2, + false => EldMii::Value1, + true => EldMii::Value2, } } #[doc = "Not available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ELD_MII_A::VALUE1 + *self == EldMii::Value1 } #[doc = "Available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ELD_MII_A::VALUE2 + *self == EldMii::Value2 } } -#[doc = "Field `SH_FCSE` reader - Separate Handling of FCS Errors"] -pub type SH_FCSE_R = crate::BitReader; #[doc = "Separate Handling of FCS Errors\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SH_FCSE_A { +pub enum ShFcse { #[doc = "0: Not supported"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Supported, frames with wrong FCS and additional nibble will be counted separately in Forwarded RX Error Counter"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SH_FCSE_A) -> Self { + fn from(variant: ShFcse) -> Self { variant as u8 != 0 } } -impl SH_FCSE_R { +#[doc = "Field `SH_FCSE` reader - Separate Handling of FCS Errors"] +pub type ShFcseR = crate::BitReader; +impl ShFcseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SH_FCSE_A { + pub const fn variant(&self) -> ShFcse { match self.bits { - false => SH_FCSE_A::VALUE1, - true => SH_FCSE_A::VALUE2, + false => ShFcse::Value1, + true => ShFcse::Value2, } } #[doc = "Not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SH_FCSE_A::VALUE1 + *self == ShFcse::Value1 } #[doc = "Supported, frames with wrong FCS and additional nibble will be counted separately in Forwarded RX Error Counter"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SH_FCSE_A::VALUE2 + *self == ShFcse::Value2 } } -#[doc = "Field `EDC_SYNCA` reader - Enhanced DC SYNC Activation"] -pub type EDC_SYNCA_R = crate::BitReader; #[doc = "Enhanced DC SYNC Activation\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDC_SYNCA_A { +pub enum EdcSynca { #[doc = "0: Not available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Available"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDC_SYNCA_A) -> Self { + fn from(variant: EdcSynca) -> Self { variant as u8 != 0 } } -impl EDC_SYNCA_R { +#[doc = "Field `EDC_SYNCA` reader - Enhanced DC SYNC Activation"] +pub type EdcSyncaR = crate::BitReader; +impl EdcSyncaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EDC_SYNCA_A { + pub const fn variant(&self) -> EdcSynca { match self.bits { - false => EDC_SYNCA_A::VALUE1, - true => EDC_SYNCA_A::VALUE2, + false => EdcSynca::Value1, + true => EdcSynca::Value2, } } #[doc = "Not available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EDC_SYNCA_A::VALUE1 + *self == EdcSynca::Value1 } #[doc = "Available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EDC_SYNCA_A::VALUE2 + *self == EdcSynca::Value2 } } -#[doc = "Field `LRW_CS` reader - EtherCAT LRW command support"] -pub type LRW_CS_R = crate::BitReader; #[doc = "EtherCAT LRW command support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LRW_CS_A { +pub enum LrwCs { #[doc = "0: Supported"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not supported"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LRW_CS_A) -> Self { + fn from(variant: LrwCs) -> Self { variant as u8 != 0 } } -impl LRW_CS_R { +#[doc = "Field `LRW_CS` reader - EtherCAT LRW command support"] +pub type LrwCsR = crate::BitReader; +impl LrwCsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LRW_CS_A { + pub const fn variant(&self) -> LrwCs { match self.bits { - false => LRW_CS_A::VALUE1, - true => LRW_CS_A::VALUE2, + false => LrwCs::Value1, + true => LrwCs::Value2, } } #[doc = "Supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LRW_CS_A::VALUE1 + *self == LrwCs::Value1 } #[doc = "Not supported"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LRW_CS_A::VALUE2 + *self == LrwCs::Value2 } } -#[doc = "Field `RW_CS` reader - EtherCAT read/write command support (BRW, APRW, FPRW)"] -pub type RW_CS_R = crate::BitReader; #[doc = "EtherCAT read/write command support (BRW, APRW, FPRW)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RW_CS_A { +pub enum RwCs { #[doc = "0: Supported"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not supported"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RW_CS_A) -> Self { + fn from(variant: RwCs) -> Self { variant as u8 != 0 } } -impl RW_CS_R { +#[doc = "Field `RW_CS` reader - EtherCAT read/write command support (BRW, APRW, FPRW)"] +pub type RwCsR = crate::BitReader; +impl RwCsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RW_CS_A { + pub const fn variant(&self) -> RwCs { match self.bits { - false => RW_CS_A::VALUE1, - true => RW_CS_A::VALUE2, + false => RwCs::Value1, + true => RwCs::Value2, } } #[doc = "Supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RW_CS_A::VALUE1 + *self == RwCs::Value1 } #[doc = "Not supported"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RW_CS_A::VALUE2 + *self == RwCs::Value2 } } -#[doc = "Field `FX_CONF` reader - Fixed FMMU/SyncManager configuration"] -pub type FX_CONF_R = crate::BitReader; #[doc = "Fixed FMMU/SyncManager configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FX_CONF_A { +pub enum FxConf { #[doc = "0: Variable configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Fixed configuration (refer to documentation of supporting ESCs)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FX_CONF_A) -> Self { + fn from(variant: FxConf) -> Self { variant as u8 != 0 } } -impl FX_CONF_R { +#[doc = "Field `FX_CONF` reader - Fixed FMMU/SyncManager configuration"] +pub type FxConfR = crate::BitReader; +impl FxConfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FX_CONF_A { + pub const fn variant(&self) -> FxConf { match self.bits { - false => FX_CONF_A::VALUE1, - true => FX_CONF_A::VALUE2, + false => FxConf::Value1, + true => FxConf::Value2, } } #[doc = "Variable configuration"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FX_CONF_A::VALUE1 + *self == FxConf::Value1 } #[doc = "Fixed configuration (refer to documentation of supporting ESCs)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FX_CONF_A::VALUE2 + *self == FxConf::Value2 } } impl R { #[doc = "Bit 0 - FMMU Operation"] #[inline(always)] - pub fn fmmu(&self) -> FMMU_R { - FMMU_R::new((self.bits & 1) != 0) + pub fn fmmu(&self) -> FmmuR { + FmmuR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Distributed Clocks"] #[inline(always)] - pub fn clks(&self) -> CLKS_R { - CLKS_R::new(((self.bits >> 2) & 1) != 0) + pub fn clks(&self) -> ClksR { + ClksR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Distributed Clocks (width)"] #[inline(always)] - pub fn clks_w(&self) -> CLKS_W_R { - CLKS_W_R::new(((self.bits >> 3) & 1) != 0) + pub fn clks_w(&self) -> ClksWR { + ClksWR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Low Jitter EBUS"] #[inline(always)] - pub fn lj_ebus(&self) -> LJ_EBUS_R { - LJ_EBUS_R::new(((self.bits >> 4) & 1) != 0) + pub fn lj_ebus(&self) -> LjEbusR { + LjEbusR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Enhanced Link Detection EBUS"] #[inline(always)] - pub fn eld_ebus(&self) -> ELD_EBUS_R { - ELD_EBUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn eld_ebus(&self) -> EldEbusR { + EldEbusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enhanced Link Detection MII"] #[inline(always)] - pub fn eld_mii(&self) -> ELD_MII_R { - ELD_MII_R::new(((self.bits >> 6) & 1) != 0) + pub fn eld_mii(&self) -> EldMiiR { + EldMiiR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Separate Handling of FCS Errors"] #[inline(always)] - pub fn sh_fcse(&self) -> SH_FCSE_R { - SH_FCSE_R::new(((self.bits >> 7) & 1) != 0) + pub fn sh_fcse(&self) -> ShFcseR { + ShFcseR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Enhanced DC SYNC Activation"] #[inline(always)] - pub fn edc_synca(&self) -> EDC_SYNCA_R { - EDC_SYNCA_R::new(((self.bits >> 8) & 1) != 0) + pub fn edc_synca(&self) -> EdcSyncaR { + EdcSyncaR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - EtherCAT LRW command support"] #[inline(always)] - pub fn lrw_cs(&self) -> LRW_CS_R { - LRW_CS_R::new(((self.bits >> 9) & 1) != 0) + pub fn lrw_cs(&self) -> LrwCsR { + LrwCsR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - EtherCAT read/write command support (BRW, APRW, FPRW)"] #[inline(always)] - pub fn rw_cs(&self) -> RW_CS_R { - RW_CS_R::new(((self.bits >> 10) & 1) != 0) + pub fn rw_cs(&self) -> RwCsR { + RwCsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Fixed FMMU/SyncManager configuration"] #[inline(always)] - pub fn fx_conf(&self) -> FX_CONF_R { - FX_CONF_R::new(((self.bits >> 11) & 1) != 0) + pub fn fx_conf(&self) -> FxConfR { + FxConfR::new(((self.bits >> 11) & 1) != 0) } } #[doc = "ESC Features Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`feature::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FEATURE_SPEC; -impl crate::RegisterSpec for FEATURE_SPEC { +pub struct FeatureSpec; +impl crate::RegisterSpec for FeatureSpec { type Ux = u16; } #[doc = "`read()` method returns [`feature::R`](R) reader structure"] -impl crate::Readable for FEATURE_SPEC {} +impl crate::Readable for FeatureSpec {} #[doc = "`reset()` method sets FEATURE to value 0x01cc"] -impl crate::Resettable for FEATURE_SPEC { +impl crate::Resettable for FeatureSpec { const RESET_VALUE: u16 = 0x01cc; } diff --git a/src/ecat0/fmmu_num.rs b/src/ecat0/fmmu_num.rs index c068b2ff..74c0b3e9 100644 --- a/src/ecat0/fmmu_num.rs +++ b/src/ecat0/fmmu_num.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_NUM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `NUM_FMMU` reader - Number of supported FMMU channels (or entities) of the EtherCAT Slave Controller"] -pub type NUM_FMMU_R = crate::FieldReader; +pub type NumFmmuR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Number of supported FMMU channels (or entities) of the EtherCAT Slave Controller"] #[inline(always)] - pub fn num_fmmu(&self) -> NUM_FMMU_R { - NUM_FMMU_R::new(self.bits) + pub fn num_fmmu(&self) -> NumFmmuR { + NumFmmuR::new(self.bits) } } #[doc = "FMMUs Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_num::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_NUM_SPEC; -impl crate::RegisterSpec for FMMU_NUM_SPEC { +pub struct FmmuNumSpec; +impl crate::RegisterSpec for FmmuNumSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_num::R`](R) reader structure"] -impl crate::Readable for FMMU_NUM_SPEC {} +impl crate::Readable for FmmuNumSpec {} #[doc = "`reset()` method sets FMMU_NUM to value 0x08"] -impl crate::Resettable for FMMU_NUM_SPEC { +impl crate::Resettable for FmmuNumSpec { const RESET_VALUE: u8 = 0x08; } diff --git a/src/ecat0/fwd_rx_err_count0.rs b/src/ecat0/fwd_rx_err_count0.rs index dd5ae0d9..d6d49ffe 100644 --- a/src/ecat0/fwd_rx_err_count0.rs +++ b/src/ecat0/fwd_rx_err_count0.rs @@ -1,22 +1,22 @@ #[doc = "Register `FWD_RX_ERR_COUNT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `FORW_ERROR` reader - Forwarded error counter of Port y"] -pub type FORW_ERROR_R = crate::FieldReader; +pub type ForwErrorR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Forwarded error counter of Port y"] #[inline(always)] - pub fn forw_error(&self) -> FORW_ERROR_R { - FORW_ERROR_R::new(self.bits) + pub fn forw_error(&self) -> ForwErrorR { + ForwErrorR::new(self.bits) } } #[doc = "Forwarded RX Error Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fwd_rx_err_count0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FWD_RX_ERR_COUNT0_SPEC; -impl crate::RegisterSpec for FWD_RX_ERR_COUNT0_SPEC { +pub struct FwdRxErrCount0Spec; +impl crate::RegisterSpec for FwdRxErrCount0Spec { type Ux = u8; } #[doc = "`read()` method returns [`fwd_rx_err_count0::R`](R) reader structure"] -impl crate::Readable for FWD_RX_ERR_COUNT0_SPEC {} +impl crate::Readable for FwdRxErrCount0Spec {} #[doc = "`reset()` method sets FWD_RX_ERR_COUNT0 to value 0"] -impl crate::Resettable for FWD_RX_ERR_COUNT0_SPEC { +impl crate::Resettable for FwdRxErrCount0Spec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/fwd_rx_err_count1.rs b/src/ecat0/fwd_rx_err_count1.rs index 72d4225e..7562ba82 100644 --- a/src/ecat0/fwd_rx_err_count1.rs +++ b/src/ecat0/fwd_rx_err_count1.rs @@ -1,22 +1,22 @@ #[doc = "Register `FWD_RX_ERR_COUNT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `FORW_ERROR` reader - Forwarded error counter of Port y"] -pub type FORW_ERROR_R = crate::FieldReader; +pub type ForwErrorR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Forwarded error counter of Port y"] #[inline(always)] - pub fn forw_error(&self) -> FORW_ERROR_R { - FORW_ERROR_R::new(self.bits) + pub fn forw_error(&self) -> ForwErrorR { + ForwErrorR::new(self.bits) } } #[doc = "Forwarded RX Error Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fwd_rx_err_count1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FWD_RX_ERR_COUNT1_SPEC; -impl crate::RegisterSpec for FWD_RX_ERR_COUNT1_SPEC { +pub struct FwdRxErrCount1Spec; +impl crate::RegisterSpec for FwdRxErrCount1Spec { type Ux = u8; } #[doc = "`read()` method returns [`fwd_rx_err_count1::R`](R) reader structure"] -impl crate::Readable for FWD_RX_ERR_COUNT1_SPEC {} +impl crate::Readable for FwdRxErrCount1Spec {} #[doc = "`reset()` method sets FWD_RX_ERR_COUNT1 to value 0"] -impl crate::Resettable for FWD_RX_ERR_COUNT1_SPEC { +impl crate::Resettable for FwdRxErrCount1Spec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/id.rs b/src/ecat0/id.rs index 29b3c004..5e9b03d5 100644 --- a/src/ecat0/id.rs +++ b/src/ecat0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "ECAT0 Module ID\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x0093_c001"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x0093_c001; } diff --git a/src/ecat0/lost_link_count0.rs b/src/ecat0/lost_link_count0.rs index 2a9eaa84..75d4a493 100644 --- a/src/ecat0/lost_link_count0.rs +++ b/src/ecat0/lost_link_count0.rs @@ -1,22 +1,22 @@ #[doc = "Register `LOST_LINK_COUNT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LL_COUNTER` reader - Lost Link counter of Port p"] -pub type LL_COUNTER_R = crate::FieldReader; +pub type LlCounterR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Lost Link counter of Port p"] #[inline(always)] - pub fn ll_counter(&self) -> LL_COUNTER_R { - LL_COUNTER_R::new(self.bits) + pub fn ll_counter(&self) -> LlCounterR { + LlCounterR::new(self.bits) } } #[doc = "Lost Link Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lost_link_count0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LOST_LINK_COUNT0_SPEC; -impl crate::RegisterSpec for LOST_LINK_COUNT0_SPEC { +pub struct LostLinkCount0Spec; +impl crate::RegisterSpec for LostLinkCount0Spec { type Ux = u8; } #[doc = "`read()` method returns [`lost_link_count0::R`](R) reader structure"] -impl crate::Readable for LOST_LINK_COUNT0_SPEC {} +impl crate::Readable for LostLinkCount0Spec {} #[doc = "`reset()` method sets LOST_LINK_COUNT0 to value 0"] -impl crate::Resettable for LOST_LINK_COUNT0_SPEC { +impl crate::Resettable for LostLinkCount0Spec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/lost_link_count1.rs b/src/ecat0/lost_link_count1.rs index e9b6bf40..4d54f678 100644 --- a/src/ecat0/lost_link_count1.rs +++ b/src/ecat0/lost_link_count1.rs @@ -1,22 +1,22 @@ #[doc = "Register `LOST_LINK_COUNT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LL_COUNTER` reader - Lost Link counter of Port p"] -pub type LL_COUNTER_R = crate::FieldReader; +pub type LlCounterR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Lost Link counter of Port p"] #[inline(always)] - pub fn ll_counter(&self) -> LL_COUNTER_R { - LL_COUNTER_R::new(self.bits) + pub fn ll_counter(&self) -> LlCounterR { + LlCounterR::new(self.bits) } } #[doc = "Lost Link Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lost_link_count1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LOST_LINK_COUNT1_SPEC; -impl crate::RegisterSpec for LOST_LINK_COUNT1_SPEC { +pub struct LostLinkCount1Spec; +impl crate::RegisterSpec for LostLinkCount1Spec { type Ux = u8; } #[doc = "`read()` method returns [`lost_link_count1::R`](R) reader structure"] -impl crate::Readable for LOST_LINK_COUNT1_SPEC {} +impl crate::Readable for LostLinkCount1Spec {} #[doc = "`reset()` method sets LOST_LINK_COUNT1 to value 0"] -impl crate::Resettable for LOST_LINK_COUNT1_SPEC { +impl crate::Resettable for LostLinkCount1Spec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/mii_cont_stat.rs b/src/ecat0/mii_cont_stat.rs index 24caa8c7..ca66e172 100644 --- a/src/ecat0/mii_cont_stat.rs +++ b/src/ecat0/mii_cont_stat.rs @@ -1,169 +1,169 @@ #[doc = "Register `MII_CONT_STAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MII_CONT_STAT` writer"] -pub type W = crate::W; -#[doc = "Field `W_EN` reader - Write enable"] -pub type W_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Write enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum W_EN_A { +pub enum WEn { #[doc = "0: Write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: W_EN_A) -> Self { + fn from(variant: WEn) -> Self { variant as u8 != 0 } } -impl W_EN_R { +#[doc = "Field `W_EN` reader - Write enable"] +pub type WEnR = crate::BitReader; +impl WEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> W_EN_A { + pub const fn variant(&self) -> WEn { match self.bits { - false => W_EN_A::VALUE1, - true => W_EN_A::VALUE2, + false => WEn::Value1, + true => WEn::Value2, } } #[doc = "Write disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == W_EN_A::VALUE1 + *self == WEn::Value1 } #[doc = "Write enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == W_EN_A::VALUE2 + *self == WEn::Value2 } } -#[doc = "Field `MIC_PDI` reader - Management Interface can be controlled by PDI"] -pub type MIC_PDI_R = crate::BitReader; #[doc = "Management Interface can be controlled by PDI\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MIC_PDI_A { +pub enum MicPdi { #[doc = "0: Only ECAT control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI control possible"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MIC_PDI_A) -> Self { + fn from(variant: MicPdi) -> Self { variant as u8 != 0 } } -impl MIC_PDI_R { +#[doc = "Field `MIC_PDI` reader - Management Interface can be controlled by PDI"] +pub type MicPdiR = crate::BitReader; +impl MicPdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MIC_PDI_A { + pub const fn variant(&self) -> MicPdi { match self.bits { - false => MIC_PDI_A::VALUE1, - true => MIC_PDI_A::VALUE2, + false => MicPdi::Value1, + true => MicPdi::Value2, } } #[doc = "Only ECAT control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MIC_PDI_A::VALUE1 + *self == MicPdi::Value1 } #[doc = "PDI control possible"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MIC_PDI_A::VALUE2 + *self == MicPdi::Value2 } } -#[doc = "Field `MI_LD` reader - MI link detection"] -pub type MI_LD_R = crate::BitReader; #[doc = "MI link detection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MI_LD_A { +pub enum MiLd { #[doc = "0: Not available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MI link detection active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MI_LD_A) -> Self { + fn from(variant: MiLd) -> Self { variant as u8 != 0 } } -impl MI_LD_R { +#[doc = "Field `MI_LD` reader - MI link detection"] +pub type MiLdR = crate::BitReader; +impl MiLdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MI_LD_A { + pub const fn variant(&self) -> MiLd { match self.bits { - false => MI_LD_A::VALUE1, - true => MI_LD_A::VALUE2, + false => MiLd::Value1, + true => MiLd::Value2, } } #[doc = "Not available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MI_LD_A::VALUE1 + *self == MiLd::Value1 } #[doc = "MI link detection active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MI_LD_A::VALUE2 + *self == MiLd::Value2 } } #[doc = "Field `PHY_ADDR` reader - PHY address of port 0"] -pub type PHY_ADDR_R = crate::FieldReader; -#[doc = "Field `CMD_REG` reader - Command register"] -pub type CMD_REG_R = crate::FieldReader; +pub type PhyAddrR = crate::FieldReader; #[doc = "Command register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMD_REG_A { +pub enum CmdReg { #[doc = "0: No command/MII idle (clear error bits)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Write"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMD_REG_A) -> Self { + fn from(variant: CmdReg) -> Self { variant as _ } } -impl crate::FieldSpec for CMD_REG_A { +impl crate::FieldSpec for CmdReg { type Ux = u8; } -impl CMD_REG_R { +#[doc = "Field `CMD_REG` reader - Command register"] +pub type CmdRegR = crate::FieldReader; +impl CmdRegR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMD_REG_A::VALUE1), - 1 => Some(CMD_REG_A::VALUE2), - 2 => Some(CMD_REG_A::VALUE3), + 0 => Some(CmdReg::Value1), + 1 => Some(CmdReg::Value2), + 2 => Some(CmdReg::Value3), _ => None, } } #[doc = "No command/MII idle (clear error bits)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_REG_A::VALUE1 + *self == CmdReg::Value1 } #[doc = "Read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_REG_A::VALUE2 + *self == CmdReg::Value2 } #[doc = "Write"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMD_REG_A::VALUE3 + *self == CmdReg::Value3 } } #[doc = "Field `CMD_REG` writer - Command register"] -pub type CMD_REG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CMD_REG_A>; -impl<'a, REG> CMD_REG_W<'a, REG> +pub type CmdRegW<'a, REG> = crate::FieldWriter<'a, REG, 2, CmdReg>; +impl<'a, REG> CmdRegW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -171,159 +171,150 @@ where #[doc = "No command/MII idle (clear error bits)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE1) + self.variant(CmdReg::Value1) } #[doc = "Read"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE2) + self.variant(CmdReg::Value2) } #[doc = "Write"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMD_REG_A::VALUE3) + self.variant(CmdReg::Value3) } } -#[doc = "Field `ERROR` reader - Command error"] -pub type ERROR_R = crate::BitReader; #[doc = "Command error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERROR_A { +pub enum Error { #[doc = "0: Last Command was successful"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Invalid command or write command without Write Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERROR_A) -> Self { + fn from(variant: Error) -> Self { variant as u8 != 0 } } -impl ERROR_R { +#[doc = "Field `ERROR` reader - Command error"] +pub type ErrorR = crate::BitReader; +impl ErrorR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERROR_A { + pub const fn variant(&self) -> Error { match self.bits { - false => ERROR_A::VALUE1, - true => ERROR_A::VALUE2, + false => Error::Value1, + true => Error::Value2, } } #[doc = "Last Command was successful"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERROR_A::VALUE1 + *self == Error::Value1 } #[doc = "Invalid command or write command without Write Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERROR_A::VALUE2 + *self == Error::Value2 } } -#[doc = "Field `BUSY` reader - Busy"] -pub type BUSY_R = crate::BitReader; #[doc = "Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: MI control state machine is idle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MI control state machine is active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Busy"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "MI control state machine is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "MI control state machine is active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } impl R { #[doc = "Bit 0 - Write enable"] #[inline(always)] - pub fn w_en(&self) -> W_EN_R { - W_EN_R::new((self.bits & 1) != 0) + pub fn w_en(&self) -> WEnR { + WEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Management Interface can be controlled by PDI"] #[inline(always)] - pub fn mic_pdi(&self) -> MIC_PDI_R { - MIC_PDI_R::new(((self.bits >> 1) & 1) != 0) + pub fn mic_pdi(&self) -> MicPdiR { + MicPdiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MI link detection"] #[inline(always)] - pub fn mi_ld(&self) -> MI_LD_R { - MI_LD_R::new(((self.bits >> 2) & 1) != 0) + pub fn mi_ld(&self) -> MiLdR { + MiLdR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:7 - PHY address of port 0"] #[inline(always)] - pub fn phy_addr(&self) -> PHY_ADDR_R { - PHY_ADDR_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn phy_addr(&self) -> PhyAddrR { + PhyAddrR::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 8:9 - Command register"] #[inline(always)] - pub fn cmd_reg(&self) -> CMD_REG_R { - CMD_REG_R::new(((self.bits >> 8) & 3) as u8) + pub fn cmd_reg(&self) -> CmdRegR { + CmdRegR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 14 - Command error"] #[inline(always)] - pub fn error(&self) -> ERROR_R { - ERROR_R::new(((self.bits >> 14) & 1) != 0) + pub fn error(&self) -> ErrorR { + ErrorR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Busy"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 15) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 8:9 - Command register"] #[inline(always)] #[must_use] - pub fn cmd_reg(&mut self) -> CMD_REG_W { - CMD_REG_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn cmd_reg(&mut self) -> CmdRegW { + CmdRegW::new(self, 8) } } #[doc = "MII Management Control/Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_cont_stat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_cont_stat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_CONT_STAT_SPEC; -impl crate::RegisterSpec for MII_CONT_STAT_SPEC { +pub struct MiiContStatSpec; +impl crate::RegisterSpec for MiiContStatSpec { type Ux = u16; } #[doc = "`read()` method returns [`mii_cont_stat::R`](R) reader structure"] -impl crate::Readable for MII_CONT_STAT_SPEC {} +impl crate::Readable for MiiContStatSpec {} #[doc = "`write(|w| ..)` method takes [`mii_cont_stat::W`](W) writer structure"] -impl crate::Writable for MII_CONT_STAT_SPEC { +impl crate::Writable for MiiContStatSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets MII_CONT_STAT to value 0"] -impl crate::Resettable for MII_CONT_STAT_SPEC { +impl crate::Resettable for MiiContStatSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/mii_ecat_acs_state.rs b/src/ecat0/mii_ecat_acs_state.rs index c30e9181..3614eb02 100644 --- a/src/ecat0/mii_ecat_acs_state.rs +++ b/src/ecat0/mii_ecat_acs_state.rs @@ -1,56 +1,56 @@ #[doc = "Register `MII_ECAT_ACS_STATE` reader"] -pub type R = crate::R; -#[doc = "Field `EN_ACS_MII_BY_PDI` reader - Access to MII management"] -pub type EN_ACS_MII_BY_PDI_R = crate::BitReader; +pub type R = crate::R; #[doc = "Access to MII management\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_ACS_MII_BY_PDI_A { +pub enum EnAcsMiiByPdi { #[doc = "0: ECAT enables PDI takeover of MII management control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ECAT claims exclusive access to MII management"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_ACS_MII_BY_PDI_A) -> Self { + fn from(variant: EnAcsMiiByPdi) -> Self { variant as u8 != 0 } } -impl EN_ACS_MII_BY_PDI_R { +#[doc = "Field `EN_ACS_MII_BY_PDI` reader - Access to MII management"] +pub type EnAcsMiiByPdiR = crate::BitReader; +impl EnAcsMiiByPdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EN_ACS_MII_BY_PDI_A { + pub const fn variant(&self) -> EnAcsMiiByPdi { match self.bits { - false => EN_ACS_MII_BY_PDI_A::VALUE1, - true => EN_ACS_MII_BY_PDI_A::VALUE2, + false => EnAcsMiiByPdi::Value1, + true => EnAcsMiiByPdi::Value2, } } #[doc = "ECAT enables PDI takeover of MII management control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EN_ACS_MII_BY_PDI_A::VALUE1 + *self == EnAcsMiiByPdi::Value1 } #[doc = "ECAT claims exclusive access to MII management"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EN_ACS_MII_BY_PDI_A::VALUE2 + *self == EnAcsMiiByPdi::Value2 } } impl R { #[doc = "Bit 0 - Access to MII management"] #[inline(always)] - pub fn en_acs_mii_by_pdi(&self) -> EN_ACS_MII_BY_PDI_R { - EN_ACS_MII_BY_PDI_R::new((self.bits & 1) != 0) + pub fn en_acs_mii_by_pdi(&self) -> EnAcsMiiByPdiR { + EnAcsMiiByPdiR::new((self.bits & 1) != 0) } } #[doc = "MII ECAT ACS STATE\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_ecat_acs_state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_ECAT_ACS_STATE_SPEC; -impl crate::RegisterSpec for MII_ECAT_ACS_STATE_SPEC { +pub struct MiiEcatAcsStateSpec; +impl crate::RegisterSpec for MiiEcatAcsStateSpec { type Ux = u8; } #[doc = "`read()` method returns [`mii_ecat_acs_state::R`](R) reader structure"] -impl crate::Readable for MII_ECAT_ACS_STATE_SPEC {} +impl crate::Readable for MiiEcatAcsStateSpec {} #[doc = "`reset()` method sets MII_ECAT_ACS_STATE to value 0"] -impl crate::Resettable for MII_ECAT_ACS_STATE_SPEC { +impl crate::Resettable for MiiEcatAcsStateSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/mii_pdi_acs_state.rs b/src/ecat0/mii_pdi_acs_state.rs index eb22671c..be6da4e3 100644 --- a/src/ecat0/mii_pdi_acs_state.rs +++ b/src/ecat0/mii_pdi_acs_state.rs @@ -1,139 +1,130 @@ #[doc = "Register `MII_PDI_ACS_STATE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MII_PDI_ACS_STATE` writer"] -pub type W = crate::W; -#[doc = "Field `ACS_MII_BY_PDI` reader - Access to MII management"] -pub type ACS_MII_BY_PDI_R = crate::BitReader; +pub type W = crate::W; #[doc = "Access to MII management\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACS_MII_BY_PDI_A { +pub enum AcsMiiByPdi { #[doc = "0: ECAT has access to MII managment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PDI has access to MII managment"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACS_MII_BY_PDI_A) -> Self { + fn from(variant: AcsMiiByPdi) -> Self { variant as u8 != 0 } } -impl ACS_MII_BY_PDI_R { +#[doc = "Field `ACS_MII_BY_PDI` reader - Access to MII management"] +pub type AcsMiiByPdiR = crate::BitReader; +impl AcsMiiByPdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACS_MII_BY_PDI_A { + pub const fn variant(&self) -> AcsMiiByPdi { match self.bits { - false => ACS_MII_BY_PDI_A::VALUE1, - true => ACS_MII_BY_PDI_A::VALUE2, + false => AcsMiiByPdi::Value1, + true => AcsMiiByPdi::Value2, } } #[doc = "ECAT has access to MII managment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACS_MII_BY_PDI_A::VALUE1 + *self == AcsMiiByPdi::Value1 } #[doc = "PDI has access to MII managment"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACS_MII_BY_PDI_A::VALUE2 + *self == AcsMiiByPdi::Value2 } } #[doc = "Field `ACS_MII_BY_PDI` writer - Access to MII management"] -pub type ACS_MII_BY_PDI_W<'a, REG> = crate::BitWriter<'a, REG, ACS_MII_BY_PDI_A>; -impl<'a, REG> ACS_MII_BY_PDI_W<'a, REG> +pub type AcsMiiByPdiW<'a, REG> = crate::BitWriter<'a, REG, AcsMiiByPdi>; +impl<'a, REG> AcsMiiByPdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "ECAT has access to MII managment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACS_MII_BY_PDI_A::VALUE1) + self.variant(AcsMiiByPdi::Value1) } #[doc = "PDI has access to MII managment"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACS_MII_BY_PDI_A::VALUE2) + self.variant(AcsMiiByPdi::Value2) } } -#[doc = "Field `FORCE_PDI_ACS_S` reader - Force PDI Access State by ECAT master"] -pub type FORCE_PDI_ACS_S_R = crate::BitReader; #[doc = "Force PDI Access State by ECAT master\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCE_PDI_ACS_S_A { +pub enum ForcePdiAcsS { #[doc = "0: no change"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset Bit ACS_MII_BY_PDI"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCE_PDI_ACS_S_A) -> Self { + fn from(variant: ForcePdiAcsS) -> Self { variant as u8 != 0 } } -impl FORCE_PDI_ACS_S_R { +#[doc = "Field `FORCE_PDI_ACS_S` reader - Force PDI Access State by ECAT master"] +pub type ForcePdiAcsSR = crate::BitReader; +impl ForcePdiAcsSR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FORCE_PDI_ACS_S_A { + pub const fn variant(&self) -> ForcePdiAcsS { match self.bits { - false => FORCE_PDI_ACS_S_A::VALUE1, - true => FORCE_PDI_ACS_S_A::VALUE2, + false => ForcePdiAcsS::Value1, + true => ForcePdiAcsS::Value2, } } #[doc = "no change"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FORCE_PDI_ACS_S_A::VALUE1 + *self == ForcePdiAcsS::Value1 } #[doc = "Reset Bit ACS_MII_BY_PDI"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FORCE_PDI_ACS_S_A::VALUE2 + *self == ForcePdiAcsS::Value2 } } impl R { #[doc = "Bit 0 - Access to MII management"] #[inline(always)] - pub fn acs_mii_by_pdi(&self) -> ACS_MII_BY_PDI_R { - ACS_MII_BY_PDI_R::new((self.bits & 1) != 0) + pub fn acs_mii_by_pdi(&self) -> AcsMiiByPdiR { + AcsMiiByPdiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Force PDI Access State by ECAT master"] #[inline(always)] - pub fn force_pdi_acs_s(&self) -> FORCE_PDI_ACS_S_R { - FORCE_PDI_ACS_S_R::new(((self.bits >> 1) & 1) != 0) + pub fn force_pdi_acs_s(&self) -> ForcePdiAcsSR { + ForcePdiAcsSR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Access to MII management"] #[inline(always)] #[must_use] - pub fn acs_mii_by_pdi(&mut self) -> ACS_MII_BY_PDI_W { - ACS_MII_BY_PDI_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn acs_mii_by_pdi(&mut self) -> AcsMiiByPdiW { + AcsMiiByPdiW::new(self, 0) } } #[doc = "MII PDI ACS STATE\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_pdi_acs_state::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_pdi_acs_state::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_PDI_ACS_STATE_SPEC; -impl crate::RegisterSpec for MII_PDI_ACS_STATE_SPEC { +pub struct MiiPdiAcsStateSpec; +impl crate::RegisterSpec for MiiPdiAcsStateSpec { type Ux = u8; } #[doc = "`read()` method returns [`mii_pdi_acs_state::R`](R) reader structure"] -impl crate::Readable for MII_PDI_ACS_STATE_SPEC {} +impl crate::Readable for MiiPdiAcsStateSpec {} #[doc = "`write(|w| ..)` method takes [`mii_pdi_acs_state::W`](W) writer structure"] -impl crate::Writable for MII_PDI_ACS_STATE_SPEC { +impl crate::Writable for MiiPdiAcsStateSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets MII_PDI_ACS_STATE to value 0"] -impl crate::Resettable for MII_PDI_ACS_STATE_SPEC { +impl crate::Resettable for MiiPdiAcsStateSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/mii_phy_adr.rs b/src/ecat0/mii_phy_adr.rs index 02401176..8f030d93 100644 --- a/src/ecat0/mii_phy_adr.rs +++ b/src/ecat0/mii_phy_adr.rs @@ -1,118 +1,109 @@ #[doc = "Register `MII_PHY_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MII_PHY_ADR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PHY_ADDR` reader - PHY Address"] -pub type PHY_ADDR_R = crate::FieldReader; +pub type PhyAddrR = crate::FieldReader; #[doc = "Field `PHY_ADDR` writer - PHY Address"] -pub type PHY_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `PHY_CADDR` reader - Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] -of this register (valid values are 0-3)"] -pub type PHY_CADDR_R = crate::BitReader; +pub type PhyAddrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] of this register (valid values are 0-3)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PHY_CADDR_A { +pub enum PhyCaddr { #[doc = "0: Show address of port 0 (offset)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Show individual address of port x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PHY_CADDR_A) -> Self { + fn from(variant: PhyCaddr) -> Self { variant as u8 != 0 } } -impl PHY_CADDR_R { +#[doc = "Field `PHY_CADDR` reader - Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] +of this register (valid values are 0-3)"] +pub type PhyCaddrR = crate::BitReader; +impl PhyCaddrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PHY_CADDR_A { + pub const fn variant(&self) -> PhyCaddr { match self.bits { - false => PHY_CADDR_A::VALUE1, - true => PHY_CADDR_A::VALUE2, + false => PhyCaddr::Value1, + true => PhyCaddr::Value2, } } #[doc = "Show address of port 0 (offset)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PHY_CADDR_A::VALUE1 + *self == PhyCaddr::Value1 } #[doc = "Show individual address of port x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PHY_CADDR_A::VALUE2 + *self == PhyCaddr::Value2 } } #[doc = "Field `PHY_CADDR` writer - Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] of this register (valid values are 0-3)"] -pub type PHY_CADDR_W<'a, REG> = crate::BitWriter<'a, REG, PHY_CADDR_A>; -impl<'a, REG> PHY_CADDR_W<'a, REG> +pub type PhyCaddrW<'a, REG> = crate::BitWriter<'a, REG, PhyCaddr>; +impl<'a, REG> PhyCaddrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Show address of port 0 (offset)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PHY_CADDR_A::VALUE1) + self.variant(PhyCaddr::Value1) } #[doc = "Show individual address of port x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PHY_CADDR_A::VALUE2) + self.variant(PhyCaddr::Value2) } } impl R { #[doc = "Bits 0:4 - PHY Address"] #[inline(always)] - pub fn phy_addr(&self) -> PHY_ADDR_R { - PHY_ADDR_R::new(self.bits & 0x1f) + pub fn phy_addr(&self) -> PhyAddrR { + PhyAddrR::new(self.bits & 0x1f) } #[doc = "Bit 7 - Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] of this register (valid values are 0-3)"] #[inline(always)] - pub fn phy_caddr(&self) -> PHY_CADDR_R { - PHY_CADDR_R::new(((self.bits >> 7) & 1) != 0) + pub fn phy_caddr(&self) -> PhyCaddrR { + PhyCaddrR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bits 0:4 - PHY Address"] #[inline(always)] #[must_use] - pub fn phy_addr(&mut self) -> PHY_ADDR_W { - PHY_ADDR_W::new(self, 0) + pub fn phy_addr(&mut self) -> PhyAddrW { + PhyAddrW::new(self, 0) } #[doc = "Bit 7 - Show configured PHY address of port 0-3 in registerECAT0_MII_CONT_STAT\\[7:3\\]. Select port x with bits \\[4:0\\] of this register (valid values are 0-3)"] #[inline(always)] #[must_use] - pub fn phy_caddr(&mut self) -> PHY_CADDR_W { - PHY_CADDR_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn phy_caddr(&mut self) -> PhyCaddrW { + PhyCaddrW::new(self, 7) } } #[doc = "PHY Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_adr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_adr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_PHY_ADR_SPEC; -impl crate::RegisterSpec for MII_PHY_ADR_SPEC { +pub struct MiiPhyAdrSpec; +impl crate::RegisterSpec for MiiPhyAdrSpec { type Ux = u8; } #[doc = "`read()` method returns [`mii_phy_adr::R`](R) reader structure"] -impl crate::Readable for MII_PHY_ADR_SPEC {} +impl crate::Readable for MiiPhyAdrSpec {} #[doc = "`write(|w| ..)` method takes [`mii_phy_adr::W`](W) writer structure"] -impl crate::Writable for MII_PHY_ADR_SPEC { +impl crate::Writable for MiiPhyAdrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets MII_PHY_ADR to value 0"] -impl crate::Resettable for MII_PHY_ADR_SPEC { +impl crate::Resettable for MiiPhyAdrSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/mii_phy_data.rs b/src/ecat0/mii_phy_data.rs index 2d9e915c..f0829c4f 100644 --- a/src/ecat0/mii_phy_data.rs +++ b/src/ecat0/mii_phy_data.rs @@ -1,49 +1,40 @@ #[doc = "Register `MII_PHY_DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MII_PHY_DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PHY_RW_DATA` reader - PHY Read/Write Data"] -pub type PHY_RW_DATA_R = crate::FieldReader; +pub type PhyRwDataR = crate::FieldReader; #[doc = "Field `PHY_RW_DATA` writer - PHY Read/Write Data"] -pub type PHY_RW_DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PhyRwDataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - PHY Read/Write Data"] #[inline(always)] - pub fn phy_rw_data(&self) -> PHY_RW_DATA_R { - PHY_RW_DATA_R::new(self.bits) + pub fn phy_rw_data(&self) -> PhyRwDataR { + PhyRwDataR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - PHY Read/Write Data"] #[inline(always)] #[must_use] - pub fn phy_rw_data(&mut self) -> PHY_RW_DATA_W { - PHY_RW_DATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn phy_rw_data(&mut self) -> PhyRwDataW { + PhyRwDataW::new(self, 0) } } #[doc = "PHY Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_PHY_DATA_SPEC; -impl crate::RegisterSpec for MII_PHY_DATA_SPEC { +pub struct MiiPhyDataSpec; +impl crate::RegisterSpec for MiiPhyDataSpec { type Ux = u16; } #[doc = "`read()` method returns [`mii_phy_data::R`](R) reader structure"] -impl crate::Readable for MII_PHY_DATA_SPEC {} +impl crate::Readable for MiiPhyDataSpec {} #[doc = "`write(|w| ..)` method takes [`mii_phy_data::W`](W) writer structure"] -impl crate::Writable for MII_PHY_DATA_SPEC { +impl crate::Writable for MiiPhyDataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets MII_PHY_DATA to value 0"] -impl crate::Resettable for MII_PHY_DATA_SPEC { +impl crate::Resettable for MiiPhyDataSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/mii_phy_reg_adr.rs b/src/ecat0/mii_phy_reg_adr.rs index fa2c98d6..e2be594d 100644 --- a/src/ecat0/mii_phy_reg_adr.rs +++ b/src/ecat0/mii_phy_reg_adr.rs @@ -1,49 +1,40 @@ #[doc = "Register `MII_PHY_REG_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MII_PHY_REG_ADR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PHY_REG_ADDR` reader - Address of PHY Register that shall beread/written"] -pub type PHY_REG_ADDR_R = crate::FieldReader; +pub type PhyRegAddrR = crate::FieldReader; #[doc = "Field `PHY_REG_ADDR` writer - Address of PHY Register that shall beread/written"] -pub type PHY_REG_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PhyRegAddrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Address of PHY Register that shall beread/written"] #[inline(always)] - pub fn phy_reg_addr(&self) -> PHY_REG_ADDR_R { - PHY_REG_ADDR_R::new(self.bits & 0x1f) + pub fn phy_reg_addr(&self) -> PhyRegAddrR { + PhyRegAddrR::new(self.bits & 0x1f) } } impl W { #[doc = "Bits 0:4 - Address of PHY Register that shall beread/written"] #[inline(always)] #[must_use] - pub fn phy_reg_addr(&mut self) -> PHY_REG_ADDR_W { - PHY_REG_ADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn phy_reg_addr(&mut self) -> PhyRegAddrW { + PhyRegAddrW::new(self, 0) } } #[doc = "PHY Register Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mii_phy_reg_adr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mii_phy_reg_adr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MII_PHY_REG_ADR_SPEC; -impl crate::RegisterSpec for MII_PHY_REG_ADR_SPEC { +pub struct MiiPhyRegAdrSpec; +impl crate::RegisterSpec for MiiPhyRegAdrSpec { type Ux = u8; } #[doc = "`read()` method returns [`mii_phy_reg_adr::R`](R) reader structure"] -impl crate::Readable for MII_PHY_REG_ADR_SPEC {} +impl crate::Readable for MiiPhyRegAdrSpec {} #[doc = "`write(|w| ..)` method takes [`mii_phy_reg_adr::W`](W) writer structure"] -impl crate::Writable for MII_PHY_REG_ADR_SPEC { +impl crate::Writable for MiiPhyRegAdrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets MII_PHY_REG_ADR to value 0"] -impl crate::Resettable for MII_PHY_REG_ADR_SPEC { +impl crate::Resettable for MiiPhyRegAdrSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/pdi_config.rs b/src/ecat0/pdi_config.rs index 2ab8d6ff..c47e526b 100644 --- a/src/ecat0/pdi_config.rs +++ b/src/ecat0/pdi_config.rs @@ -1,123 +1,123 @@ #[doc = "Register `PDI_CONFIG` reader"] -pub type R = crate::R; -#[doc = "Field `BUS_CLK` reader - On-chip bus clock"] -pub type BUS_CLK_R = crate::FieldReader; +pub type R = crate::R; #[doc = "On-chip bus clock\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BUS_CLK_A { +pub enum BusClk { #[doc = "0: asyncronous"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: values 1-31 is used for synchronous multiplication factor (N*25Mhz)"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BUS_CLK_A) -> Self { + fn from(variant: BusClk) -> Self { variant as _ } } -impl crate::FieldSpec for BUS_CLK_A { +impl crate::FieldSpec for BusClk { type Ux = u8; } -impl BUS_CLK_R { +#[doc = "Field `BUS_CLK` reader - On-chip bus clock"] +pub type BusClkR = crate::FieldReader; +impl BusClkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BUS_CLK_A::VALUE1), - 1 => Some(BUS_CLK_A::VALUE2), + 0 => Some(BusClk::Value1), + 1 => Some(BusClk::Value2), _ => None, } } #[doc = "asyncronous"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUS_CLK_A::VALUE1 + *self == BusClk::Value1 } #[doc = "values 1-31 is used for synchronous multiplication factor (N*25Mhz)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUS_CLK_A::VALUE2 + *self == BusClk::Value2 } } -#[doc = "Field `OC_BUS` reader - On-chip bus"] -pub type OC_BUS_R = crate::FieldReader; #[doc = "On-chip bus\n\nValue on reset: 4"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OC_BUS_A { +pub enum OcBus { #[doc = "0: Altera Avalon"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: AXI"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Xilinx PLB v4.6"] - VALUE3 = 2, + Value3 = 2, #[doc = "4: Xilinx OPB"] - VALUE4 = 4, + Value4 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OC_BUS_A) -> Self { + fn from(variant: OcBus) -> Self { variant as _ } } -impl crate::FieldSpec for OC_BUS_A { +impl crate::FieldSpec for OcBus { type Ux = u8; } -impl OC_BUS_R { +#[doc = "Field `OC_BUS` reader - On-chip bus"] +pub type OcBusR = crate::FieldReader; +impl OcBusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OC_BUS_A::VALUE1), - 1 => Some(OC_BUS_A::VALUE2), - 2 => Some(OC_BUS_A::VALUE3), - 4 => Some(OC_BUS_A::VALUE4), + 0 => Some(OcBus::Value1), + 1 => Some(OcBus::Value2), + 2 => Some(OcBus::Value3), + 4 => Some(OcBus::Value4), _ => None, } } #[doc = "Altera Avalon"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OC_BUS_A::VALUE1 + *self == OcBus::Value1 } #[doc = "AXI"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OC_BUS_A::VALUE2 + *self == OcBus::Value2 } #[doc = "Xilinx PLB v4.6"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == OC_BUS_A::VALUE3 + *self == OcBus::Value3 } #[doc = "Xilinx OPB"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == OC_BUS_A::VALUE4 + *self == OcBus::Value4 } } impl R { #[doc = "Bits 0:4 - On-chip bus clock"] #[inline(always)] - pub fn bus_clk(&self) -> BUS_CLK_R { - BUS_CLK_R::new(self.bits & 0x1f) + pub fn bus_clk(&self) -> BusClkR { + BusClkR::new(self.bits & 0x1f) } #[doc = "Bits 5:7 - On-chip bus"] #[inline(always)] - pub fn oc_bus(&self) -> OC_BUS_R { - OC_BUS_R::new((self.bits >> 5) & 7) + pub fn oc_bus(&self) -> OcBusR { + OcBusR::new((self.bits >> 5) & 7) } } #[doc = "PDI Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDI_CONFIG_SPEC; -impl crate::RegisterSpec for PDI_CONFIG_SPEC { +pub struct PdiConfigSpec; +impl crate::RegisterSpec for PdiConfigSpec { type Ux = u8; } #[doc = "`read()` method returns [`pdi_config::R`](R) reader structure"] -impl crate::Readable for PDI_CONFIG_SPEC {} +impl crate::Readable for PdiConfigSpec {} #[doc = "`reset()` method sets PDI_CONFIG to value 0x81"] -impl crate::Resettable for PDI_CONFIG_SPEC { +impl crate::Resettable for PdiConfigSpec { const RESET_VALUE: u8 = 0x81; } diff --git a/src/ecat0/pdi_control.rs b/src/ecat0/pdi_control.rs index 8b4306b7..95c7c3ca 100644 --- a/src/ecat0/pdi_control.rs +++ b/src/ecat0/pdi_control.rs @@ -1,61 +1,61 @@ #[doc = "Register `PDI_CONTROL` reader"] -pub type R = crate::R; -#[doc = "Field `PDI` reader - On-chip bus clock"] -pub type PDI_R = crate::FieldReader; +pub type R = crate::R; #[doc = "On-chip bus clock\n\nValue on reset: 128"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PDI_A { +pub enum Pdi { #[doc = "0: Interface deactivated (no PDI)"] - VALUE1 = 0, + Value1 = 0, #[doc = "128: On-chip Bus"] - VALUE2 = 128, + Value2 = 128, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PDI_A) -> Self { + fn from(variant: Pdi) -> Self { variant as _ } } -impl crate::FieldSpec for PDI_A { +impl crate::FieldSpec for Pdi { type Ux = u8; } -impl PDI_R { +#[doc = "Field `PDI` reader - On-chip bus clock"] +pub type PdiR = crate::FieldReader; +impl PdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PDI_A::VALUE1), - 128 => Some(PDI_A::VALUE2), + 0 => Some(Pdi::Value1), + 128 => Some(Pdi::Value2), _ => None, } } #[doc = "Interface deactivated (no PDI)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDI_A::VALUE1 + *self == Pdi::Value1 } #[doc = "On-chip Bus"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDI_A::VALUE2 + *self == Pdi::Value2 } } impl R { #[doc = "Bits 0:7 - On-chip bus clock"] #[inline(always)] - pub fn pdi(&self) -> PDI_R { - PDI_R::new(self.bits) + pub fn pdi(&self) -> PdiR { + PdiR::new(self.bits) } } #[doc = "PDI Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_control::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDI_CONTROL_SPEC; -impl crate::RegisterSpec for PDI_CONTROL_SPEC { +pub struct PdiControlSpec; +impl crate::RegisterSpec for PdiControlSpec { type Ux = u8; } #[doc = "`read()` method returns [`pdi_control::R`](R) reader structure"] -impl crate::Readable for PDI_CONTROL_SPEC {} +impl crate::Readable for PdiControlSpec {} #[doc = "`reset()` method sets PDI_CONTROL to value 0x80"] -impl crate::Resettable for PDI_CONTROL_SPEC { +impl crate::Resettable for PdiControlSpec { const RESET_VALUE: u8 = 0x80; } diff --git a/src/ecat0/pdi_err_count.rs b/src/ecat0/pdi_err_count.rs index 8209d99d..d6da069a 100644 --- a/src/ecat0/pdi_err_count.rs +++ b/src/ecat0/pdi_err_count.rs @@ -1,22 +1,22 @@ #[doc = "Register `PDI_ERR_COUNT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PDI_ERROR_COUNTER` reader - PDI Error counter"] -pub type PDI_ERROR_COUNTER_R = crate::FieldReader; +pub type PdiErrorCounterR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - PDI Error counter"] #[inline(always)] - pub fn pdi_error_counter(&self) -> PDI_ERROR_COUNTER_R { - PDI_ERROR_COUNTER_R::new(self.bits) + pub fn pdi_error_counter(&self) -> PdiErrorCounterR { + PdiErrorCounterR::new(self.bits) } } #[doc = "PDI Error Counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_err_count::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDI_ERR_COUNT_SPEC; -impl crate::RegisterSpec for PDI_ERR_COUNT_SPEC { +pub struct PdiErrCountSpec; +impl crate::RegisterSpec for PdiErrCountSpec { type Ux = u8; } #[doc = "`read()` method returns [`pdi_err_count::R`](R) reader structure"] -impl crate::Readable for PDI_ERR_COUNT_SPEC {} +impl crate::Readable for PdiErrCountSpec {} #[doc = "`reset()` method sets PDI_ERR_COUNT to value 0"] -impl crate::Resettable for PDI_ERR_COUNT_SPEC { +impl crate::Resettable for PdiErrCountSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/pdi_ext_config.rs b/src/ecat0/pdi_ext_config.rs index f669f7be..0abcac5d 100644 --- a/src/ecat0/pdi_ext_config.rs +++ b/src/ecat0/pdi_ext_config.rs @@ -1,123 +1,123 @@ #[doc = "Register `PDI_EXT_CONFIG` reader"] -pub type R = crate::R; -#[doc = "Field `R_Pref` reader - Read Prefetch Size"] -pub type R_PREF_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Read Prefetch Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum R_PREF_A { +pub enum RPref { #[doc = "0: 4 cycles"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 cycle (typical)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 cycles"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: R_PREF_A) -> Self { + fn from(variant: RPref) -> Self { variant as _ } } -impl crate::FieldSpec for R_PREF_A { +impl crate::FieldSpec for RPref { type Ux = u8; } -impl R_PREF_R { +#[doc = "Field `R_Pref` reader - Read Prefetch Size"] +pub type RPrefR = crate::FieldReader; +impl RPrefR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(R_PREF_A::VALUE1), - 1 => Some(R_PREF_A::VALUE2), - 2 => Some(R_PREF_A::VALUE3), + 0 => Some(RPref::Value1), + 1 => Some(RPref::Value2), + 2 => Some(RPref::Value3), _ => None, } } #[doc = "4 cycles"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == R_PREF_A::VALUE1 + *self == RPref::Value1 } #[doc = "1 cycle (typical)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == R_PREF_A::VALUE2 + *self == RPref::Value2 } #[doc = "2 cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == R_PREF_A::VALUE3 + *self == RPref::Value3 } } -#[doc = "Field `SUB_TYPE` reader - On-chip Sub Type for AXI"] -pub type SUB_TYPE_R = crate::FieldReader; #[doc = "On-chip Sub Type for AXI\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUB_TYPE_A { +pub enum SubType { #[doc = "0: AXI3"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: AXI4"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: AXI4 Lite"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUB_TYPE_A) -> Self { + fn from(variant: SubType) -> Self { variant as _ } } -impl crate::FieldSpec for SUB_TYPE_A { +impl crate::FieldSpec for SubType { type Ux = u8; } -impl SUB_TYPE_R { +#[doc = "Field `SUB_TYPE` reader - On-chip Sub Type for AXI"] +pub type SubTypeR = crate::FieldReader; +impl SubTypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SUB_TYPE_A::VALUE1), - 1 => Some(SUB_TYPE_A::VALUE2), - 2 => Some(SUB_TYPE_A::VALUE3), + 0 => Some(SubType::Value1), + 1 => Some(SubType::Value2), + 2 => Some(SubType::Value3), _ => None, } } #[doc = "AXI3"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUB_TYPE_A::VALUE1 + *self == SubType::Value1 } #[doc = "AXI4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUB_TYPE_A::VALUE2 + *self == SubType::Value2 } #[doc = "AXI4 Lite"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUB_TYPE_A::VALUE3 + *self == SubType::Value3 } } impl R { #[doc = "Bits 0:1 - Read Prefetch Size"] #[inline(always)] - pub fn r_pref(&self) -> R_PREF_R { - R_PREF_R::new((self.bits & 3) as u8) + pub fn r_pref(&self) -> RPrefR { + RPrefR::new((self.bits & 3) as u8) } #[doc = "Bits 8:10 - On-chip Sub Type for AXI"] #[inline(always)] - pub fn sub_type(&self) -> SUB_TYPE_R { - SUB_TYPE_R::new(((self.bits >> 8) & 7) as u8) + pub fn sub_type(&self) -> SubTypeR { + SubTypeR::new(((self.bits >> 8) & 7) as u8) } } #[doc = "PDI Synchronous Microcontroller extended Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdi_ext_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDI_EXT_CONFIG_SPEC; -impl crate::RegisterSpec for PDI_EXT_CONFIG_SPEC { +pub struct PdiExtConfigSpec; +impl crate::RegisterSpec for PdiExtConfigSpec { type Ux = u16; } #[doc = "`read()` method returns [`pdi_ext_config::R`](R) reader structure"] -impl crate::Readable for PDI_EXT_CONFIG_SPEC {} +impl crate::Readable for PdiExtConfigSpec {} #[doc = "`reset()` method sets PDI_EXT_CONFIG to value 0"] -impl crate::Resettable for PDI_EXT_CONFIG_SPEC { +impl crate::Resettable for PdiExtConfigSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/physical_rw_offset.rs b/src/ecat0/physical_rw_offset.rs index e0f50f33..0c4694bc 100644 --- a/src/ecat0/physical_rw_offset.rs +++ b/src/ecat0/physical_rw_offset.rs @@ -1,22 +1,22 @@ #[doc = "Register `PHYSICAL_RW_OFFSET` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `OFFSET` reader - Offset of R/W Commands (FPRW, APRW) between Read address and Write address"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Offset of R/W Commands (FPRW, APRW) between Read address and Write address"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits) } } #[doc = "Physical Read/Write Offset\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`physical_rw_offset::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PHYSICAL_RW_OFFSET_SPEC; -impl crate::RegisterSpec for PHYSICAL_RW_OFFSET_SPEC { +pub struct PhysicalRwOffsetSpec; +impl crate::RegisterSpec for PhysicalRwOffsetSpec { type Ux = u16; } #[doc = "`read()` method returns [`physical_rw_offset::R`](R) reader structure"] -impl crate::Readable for PHYSICAL_RW_OFFSET_SPEC {} +impl crate::Readable for PhysicalRwOffsetSpec {} #[doc = "`reset()` method sets PHYSICAL_RW_OFFSET to value 0"] -impl crate::Resettable for PHYSICAL_RW_OFFSET_SPEC { +impl crate::Resettable for PhysicalRwOffsetSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/port_desc.rs b/src/ecat0/port_desc.rs index afccd1ea..c5516314 100644 --- a/src/ecat0/port_desc.rs +++ b/src/ecat0/port_desc.rs @@ -1,263 +1,263 @@ #[doc = "Register `PORT_DESC` reader"] -pub type R = crate::R; -#[doc = "Field `Port0` reader - Port Configuration"] -pub type PORT0_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Port Configuration\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORT0_A { +pub enum Port0 { #[doc = "0: Not implemented"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not configured (SII EEPROM)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: EBUS"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MII / RMII / RGMII"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORT0_A) -> Self { + fn from(variant: Port0) -> Self { variant as _ } } -impl crate::FieldSpec for PORT0_A { +impl crate::FieldSpec for Port0 { type Ux = u8; } -impl PORT0_R { +#[doc = "Field `Port0` reader - Port Configuration"] +pub type Port0R = crate::FieldReader; +impl Port0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PORT0_A { + pub const fn variant(&self) -> Port0 { match self.bits { - 0 => PORT0_A::VALUE1, - 1 => PORT0_A::VALUE2, - 2 => PORT0_A::VALUE3, - 3 => PORT0_A::VALUE4, + 0 => Port0::Value1, + 1 => Port0::Value2, + 2 => Port0::Value3, + 3 => Port0::Value4, _ => unreachable!(), } } #[doc = "Not implemented"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PORT0_A::VALUE1 + *self == Port0::Value1 } #[doc = "Not configured (SII EEPROM)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PORT0_A::VALUE2 + *self == Port0::Value2 } #[doc = "EBUS"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PORT0_A::VALUE3 + *self == Port0::Value3 } #[doc = "MII / RMII / RGMII"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PORT0_A::VALUE4 + *self == Port0::Value4 } } -#[doc = "Field `Port1` reader - Port Configuration"] -pub type PORT1_R = crate::FieldReader; #[doc = "Port Configuration\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORT1_A { +pub enum Port1 { #[doc = "0: Not implemented"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not configured (SII EEPROM)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: EBUS"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MII / RMII / RGMII"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORT1_A) -> Self { + fn from(variant: Port1) -> Self { variant as _ } } -impl crate::FieldSpec for PORT1_A { +impl crate::FieldSpec for Port1 { type Ux = u8; } -impl PORT1_R { +#[doc = "Field `Port1` reader - Port Configuration"] +pub type Port1R = crate::FieldReader; +impl Port1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PORT1_A { + pub const fn variant(&self) -> Port1 { match self.bits { - 0 => PORT1_A::VALUE1, - 1 => PORT1_A::VALUE2, - 2 => PORT1_A::VALUE3, - 3 => PORT1_A::VALUE4, + 0 => Port1::Value1, + 1 => Port1::Value2, + 2 => Port1::Value3, + 3 => Port1::Value4, _ => unreachable!(), } } #[doc = "Not implemented"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PORT1_A::VALUE1 + *self == Port1::Value1 } #[doc = "Not configured (SII EEPROM)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PORT1_A::VALUE2 + *self == Port1::Value2 } #[doc = "EBUS"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PORT1_A::VALUE3 + *self == Port1::Value3 } #[doc = "MII / RMII / RGMII"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PORT1_A::VALUE4 + *self == Port1::Value4 } } -#[doc = "Field `Port2` reader - Port Configuration"] -pub type PORT2_R = crate::FieldReader; #[doc = "Port Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORT2_A { +pub enum Port2 { #[doc = "0: Not implemented"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not configured (SII EEPROM)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: EBUS"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MII / RMII / RGMII"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORT2_A) -> Self { + fn from(variant: Port2) -> Self { variant as _ } } -impl crate::FieldSpec for PORT2_A { +impl crate::FieldSpec for Port2 { type Ux = u8; } -impl PORT2_R { +#[doc = "Field `Port2` reader - Port Configuration"] +pub type Port2R = crate::FieldReader; +impl Port2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PORT2_A { + pub const fn variant(&self) -> Port2 { match self.bits { - 0 => PORT2_A::VALUE1, - 1 => PORT2_A::VALUE2, - 2 => PORT2_A::VALUE3, - 3 => PORT2_A::VALUE4, + 0 => Port2::Value1, + 1 => Port2::Value2, + 2 => Port2::Value3, + 3 => Port2::Value4, _ => unreachable!(), } } #[doc = "Not implemented"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PORT2_A::VALUE1 + *self == Port2::Value1 } #[doc = "Not configured (SII EEPROM)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PORT2_A::VALUE2 + *self == Port2::Value2 } #[doc = "EBUS"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PORT2_A::VALUE3 + *self == Port2::Value3 } #[doc = "MII / RMII / RGMII"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PORT2_A::VALUE4 + *self == Port2::Value4 } } -#[doc = "Field `Port3` reader - Port Configuration"] -pub type PORT3_R = crate::FieldReader; #[doc = "Port Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PORT3_A { +pub enum Port3 { #[doc = "0: Not implemented"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not configured (SII EEPROM)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: EBUS"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MII / RMII / RGMII"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PORT3_A) -> Self { + fn from(variant: Port3) -> Self { variant as _ } } -impl crate::FieldSpec for PORT3_A { +impl crate::FieldSpec for Port3 { type Ux = u8; } -impl PORT3_R { +#[doc = "Field `Port3` reader - Port Configuration"] +pub type Port3R = crate::FieldReader; +impl Port3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PORT3_A { + pub const fn variant(&self) -> Port3 { match self.bits { - 0 => PORT3_A::VALUE1, - 1 => PORT3_A::VALUE2, - 2 => PORT3_A::VALUE3, - 3 => PORT3_A::VALUE4, + 0 => Port3::Value1, + 1 => Port3::Value2, + 2 => Port3::Value3, + 3 => Port3::Value4, _ => unreachable!(), } } #[doc = "Not implemented"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PORT3_A::VALUE1 + *self == Port3::Value1 } #[doc = "Not configured (SII EEPROM)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PORT3_A::VALUE2 + *self == Port3::Value2 } #[doc = "EBUS"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PORT3_A::VALUE3 + *self == Port3::Value3 } #[doc = "MII / RMII / RGMII"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PORT3_A::VALUE4 + *self == Port3::Value4 } } impl R { #[doc = "Bits 0:1 - Port Configuration"] #[inline(always)] - pub fn port0(&self) -> PORT0_R { - PORT0_R::new(self.bits & 3) + pub fn port0(&self) -> Port0R { + Port0R::new(self.bits & 3) } #[doc = "Bits 2:3 - Port Configuration"] #[inline(always)] - pub fn port1(&self) -> PORT1_R { - PORT1_R::new((self.bits >> 2) & 3) + pub fn port1(&self) -> Port1R { + Port1R::new((self.bits >> 2) & 3) } #[doc = "Bits 4:5 - Port Configuration"] #[inline(always)] - pub fn port2(&self) -> PORT2_R { - PORT2_R::new((self.bits >> 4) & 3) + pub fn port2(&self) -> Port2R { + Port2R::new((self.bits >> 4) & 3) } #[doc = "Bits 6:7 - Port Configuration"] #[inline(always)] - pub fn port3(&self) -> PORT3_R { - PORT3_R::new((self.bits >> 6) & 3) + pub fn port3(&self) -> Port3R { + Port3R::new((self.bits >> 6) & 3) } } #[doc = "Port Descriptor\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`port_desc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PORT_DESC_SPEC; -impl crate::RegisterSpec for PORT_DESC_SPEC { +pub struct PortDescSpec; +impl crate::RegisterSpec for PortDescSpec { type Ux = u8; } #[doc = "`read()` method returns [`port_desc::R`](R) reader structure"] -impl crate::Readable for PORT_DESC_SPEC {} +impl crate::Readable for PortDescSpec {} #[doc = "`reset()` method sets PORT_DESC to value 0x0f"] -impl crate::Resettable for PORT_DESC_SPEC { +impl crate::Resettable for PortDescSpec { const RESET_VALUE: u8 = 0x0f; } diff --git a/src/ecat0/proc_err_count.rs b/src/ecat0/proc_err_count.rs index da2dd7e6..9281666b 100644 --- a/src/ecat0/proc_err_count.rs +++ b/src/ecat0/proc_err_count.rs @@ -1,22 +1,22 @@ #[doc = "Register `PROC_ERR_COUNT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `UNIT_ERROR` reader - ECAT Processing Unit error counter"] -pub type UNIT_ERROR_R = crate::FieldReader; +pub type UnitErrorR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - ECAT Processing Unit error counter"] #[inline(always)] - pub fn unit_error(&self) -> UNIT_ERROR_R { - UNIT_ERROR_R::new(self.bits) + pub fn unit_error(&self) -> UnitErrorR { + UnitErrorR::new(self.bits) } } #[doc = "ECAT Processing Unit Error Counter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`proc_err_count::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PROC_ERR_COUNT_SPEC; -impl crate::RegisterSpec for PROC_ERR_COUNT_SPEC { +pub struct ProcErrCountSpec; +impl crate::RegisterSpec for ProcErrCountSpec { type Ux = u8; } #[doc = "`read()` method returns [`proc_err_count::R`](R) reader structure"] -impl crate::Readable for PROC_ERR_COUNT_SPEC {} +impl crate::Readable for ProcErrCountSpec {} #[doc = "`reset()` method sets PROC_ERR_COUNT to value 0"] -impl crate::Resettable for PROC_ERR_COUNT_SPEC { +impl crate::Resettable for ProcErrCountSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/ram_size.rs b/src/ecat0/ram_size.rs index 802664ce..ade27b37 100644 --- a/src/ecat0/ram_size.rs +++ b/src/ecat0/ram_size.rs @@ -1,22 +1,22 @@ #[doc = "Register `RAM_SIZE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RAM_Size` reader - Process Data RAM size supported by the EtherCAT Slave Controller in KByte"] -pub type RAM_SIZE_R = crate::FieldReader; +pub type RamSizeR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Process Data RAM size supported by the EtherCAT Slave Controller in KByte"] #[inline(always)] - pub fn ram_size(&self) -> RAM_SIZE_R { - RAM_SIZE_R::new(self.bits) + pub fn ram_size(&self) -> RamSizeR { + RamSizeR::new(self.bits) } } #[doc = "RAM Size\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_size::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAM_SIZE_SPEC; -impl crate::RegisterSpec for RAM_SIZE_SPEC { +pub struct RamSizeSpec; +impl crate::RegisterSpec for RamSizeSpec { type Ux = u8; } #[doc = "`read()` method returns [`ram_size::R`](R) reader structure"] -impl crate::Readable for RAM_SIZE_SPEC {} +impl crate::Readable for RamSizeSpec {} #[doc = "`reset()` method sets RAM_SIZE to value 0x08"] -impl crate::Resettable for RAM_SIZE_SPEC { +impl crate::Resettable for RamSizeSpec { const RESET_VALUE: u8 = 0x08; } diff --git a/src/ecat0/readmode_dc_sys_time.rs b/src/ecat0/readmode_dc_sys_time.rs index 007f5ca1..121b7660 100644 --- a/src/ecat0/readmode_dc_sys_time.rs +++ b/src/ecat0/readmode_dc_sys_time.rs @@ -1,23 +1,23 @@ #[doc = "Register `DC_SYS_TIME[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `READ_ACCESS` reader - Read access"] -pub type READ_ACCESS_R = crate::FieldReader; +pub type ReadAccessR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Read access"] #[inline(always)] - pub fn read_access(&self) -> READ_ACCESS_R { - READ_ACCESS_R::new(self.bits) + pub fn read_access(&self) -> ReadAccessR { + ReadAccessR::new(self.bits) } } #[doc = "System Time read access\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_dc_sys_time::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct READMODE_DC_SYS_TIME_SPEC; -impl crate::RegisterSpec for READMODE_DC_SYS_TIME_SPEC { +pub struct ReadmodeDcSysTimeSpec; +impl crate::RegisterSpec for ReadmodeDcSysTimeSpec { type Ux = u32; } #[doc = "`read()` method returns [`readmode_dc_sys_time::R`](R) reader structure"] -impl crate::Readable for READMODE_DC_SYS_TIME_SPEC {} +impl crate::Readable for ReadmodeDcSysTimeSpec {} #[doc = "`reset()` method sets DC_SYS_TIME[%s] to value 0"] -impl crate::Resettable for READMODE_DC_SYS_TIME_SPEC { +impl crate::Resettable for ReadmodeDcSysTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/readmode_esc_reset_ecat.rs b/src/ecat0/readmode_esc_reset_ecat.rs index cc4c5dc2..c36a48f7 100644 --- a/src/ecat0/readmode_esc_reset_ecat.rs +++ b/src/ecat0/readmode_esc_reset_ecat.rs @@ -1,69 +1,69 @@ #[doc = "Register `ESC_RESET_ECAT` reader"] -pub type R = crate::R; -#[doc = "Field `RESET_CMD_STATE` reader - Progress of the reset procedure"] -pub type RESET_CMD_STATE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Progress of the reset procedure\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RESET_CMD_STATE_A { +pub enum ResetCmdState { #[doc = "1: after writing 0x52"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: after writing 0x45 (if 0x52 was written before)"] - VALUE2 = 2, + Value2 = 2, #[doc = "0: default"] - VALUE3 = 0, + Value3 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RESET_CMD_STATE_A) -> Self { + fn from(variant: ResetCmdState) -> Self { variant as _ } } -impl crate::FieldSpec for RESET_CMD_STATE_A { +impl crate::FieldSpec for ResetCmdState { type Ux = u8; } -impl RESET_CMD_STATE_R { +#[doc = "Field `RESET_CMD_STATE` reader - Progress of the reset procedure"] +pub type ResetCmdStateR = crate::FieldReader; +impl ResetCmdStateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(RESET_CMD_STATE_A::VALUE1), - 2 => Some(RESET_CMD_STATE_A::VALUE2), - 0 => Some(RESET_CMD_STATE_A::VALUE3), + 1 => Some(ResetCmdState::Value1), + 2 => Some(ResetCmdState::Value2), + 0 => Some(ResetCmdState::Value3), _ => None, } } #[doc = "after writing 0x52"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE1 + *self == ResetCmdState::Value1 } #[doc = "after writing 0x45 (if 0x52 was written before)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE2 + *self == ResetCmdState::Value2 } #[doc = "default"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE3 + *self == ResetCmdState::Value3 } } impl R { #[doc = "Bits 0:1 - Progress of the reset procedure"] #[inline(always)] - pub fn reset_cmd_state(&self) -> RESET_CMD_STATE_R { - RESET_CMD_STATE_R::new(self.bits & 3) + pub fn reset_cmd_state(&self) -> ResetCmdStateR { + ResetCmdStateR::new(self.bits & 3) } } #[doc = "ESC Reset ECAT \\[READ Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_esc_reset_ecat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct READMODE_ESC_RESET_ECAT_SPEC; -impl crate::RegisterSpec for READMODE_ESC_RESET_ECAT_SPEC { +pub struct ReadmodeEscResetEcatSpec; +impl crate::RegisterSpec for ReadmodeEscResetEcatSpec { type Ux = u8; } #[doc = "`read()` method returns [`readmode_esc_reset_ecat::R`](R) reader structure"] -impl crate::Readable for READMODE_ESC_RESET_ECAT_SPEC {} +impl crate::Readable for ReadmodeEscResetEcatSpec {} #[doc = "`reset()` method sets ESC_RESET_ECAT to value 0"] -impl crate::Resettable for READMODE_ESC_RESET_ECAT_SPEC { +impl crate::Resettable for ReadmodeEscResetEcatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/readmode_esc_reset_pdi.rs b/src/ecat0/readmode_esc_reset_pdi.rs index b74cbcb0..13f316b2 100644 --- a/src/ecat0/readmode_esc_reset_pdi.rs +++ b/src/ecat0/readmode_esc_reset_pdi.rs @@ -1,69 +1,69 @@ #[doc = "Register `ESC_RESET_PDI` reader"] -pub type R = crate::R; -#[doc = "Field `RESET_CMD_STATE` reader - Progress of the reset procedure"] -pub type RESET_CMD_STATE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Progress of the reset procedure\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RESET_CMD_STATE_A { +pub enum ResetCmdState { #[doc = "1: after writing 0x52"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: after writing 0x45 (if 0x52 was written before)"] - VALUE2 = 2, + Value2 = 2, #[doc = "0: default"] - VALUE3 = 0, + Value3 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RESET_CMD_STATE_A) -> Self { + fn from(variant: ResetCmdState) -> Self { variant as _ } } -impl crate::FieldSpec for RESET_CMD_STATE_A { +impl crate::FieldSpec for ResetCmdState { type Ux = u8; } -impl RESET_CMD_STATE_R { +#[doc = "Field `RESET_CMD_STATE` reader - Progress of the reset procedure"] +pub type ResetCmdStateR = crate::FieldReader; +impl ResetCmdStateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(RESET_CMD_STATE_A::VALUE1), - 2 => Some(RESET_CMD_STATE_A::VALUE2), - 0 => Some(RESET_CMD_STATE_A::VALUE3), + 1 => Some(ResetCmdState::Value1), + 2 => Some(ResetCmdState::Value2), + 0 => Some(ResetCmdState::Value3), _ => None, } } #[doc = "after writing 0x52"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE1 + *self == ResetCmdState::Value1 } #[doc = "after writing 0x45 (if 0x52 was written before)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE2 + *self == ResetCmdState::Value2 } #[doc = "default"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RESET_CMD_STATE_A::VALUE3 + *self == ResetCmdState::Value3 } } impl R { #[doc = "Bits 0:1 - Progress of the reset procedure"] #[inline(always)] - pub fn reset_cmd_state(&self) -> RESET_CMD_STATE_R { - RESET_CMD_STATE_R::new(self.bits & 3) + pub fn reset_cmd_state(&self) -> ResetCmdStateR { + ResetCmdStateR::new(self.bits & 3) } } #[doc = "ESC Reset PDI \\[READ Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`readmode_esc_reset_pdi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct READMODE_ESC_RESET_PDI_SPEC; -impl crate::RegisterSpec for READMODE_ESC_RESET_PDI_SPEC { +pub struct ReadmodeEscResetPdiSpec; +impl crate::RegisterSpec for ReadmodeEscResetPdiSpec { type Ux = u8; } #[doc = "`read()` method returns [`readmode_esc_reset_pdi::R`](R) reader structure"] -impl crate::Readable for READMODE_ESC_RESET_PDI_SPEC {} +impl crate::Readable for ReadmodeEscResetPdiSpec {} #[doc = "`reset()` method sets ESC_RESET_PDI to value 0"] -impl crate::Resettable for READMODE_ESC_RESET_PDI_SPEC { +impl crate::Resettable for ReadmodeEscResetPdiSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/receive_time_pu.rs b/src/ecat0/receive_time_pu.rs index 94ce4da2..af47d1a0 100644 --- a/src/ecat0/receive_time_pu.rs +++ b/src/ecat0/receive_time_pu.rs @@ -1,23 +1,23 @@ #[doc = "Register `RECEIVE_TIME_PU[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RECEIVE_TIME_PU` reader - Local time of the beginning of a frame"] -pub type RECEIVE_TIME_PU_R = crate::FieldReader; +pub type ReceiveTimePuR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Local time of the beginning of a frame"] #[inline(always)] - pub fn receive_time_pu(&self) -> RECEIVE_TIME_PU_R { - RECEIVE_TIME_PU_R::new(self.bits) + pub fn receive_time_pu(&self) -> ReceiveTimePuR { + ReceiveTimePuR::new(self.bits) } } #[doc = "Local time of the beginning of a frame\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_time_pu::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RECEIVE_TIME_PU_SPEC; -impl crate::RegisterSpec for RECEIVE_TIME_PU_SPEC { +pub struct ReceiveTimePuSpec; +impl crate::RegisterSpec for ReceiveTimePuSpec { type Ux = u32; } #[doc = "`read()` method returns [`receive_time_pu::R`](R) reader structure"] -impl crate::Readable for RECEIVE_TIME_PU_SPEC {} +impl crate::Readable for ReceiveTimePuSpec {} #[doc = "`reset()` method sets RECEIVE_TIME_PU[%s] to value 0"] -impl crate::Resettable for RECEIVE_TIME_PU_SPEC { +impl crate::Resettable for ReceiveTimePuSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/revision.rs b/src/ecat0/revision.rs index b51898ee..01116b3b 100644 --- a/src/ecat0/revision.rs +++ b/src/ecat0/revision.rs @@ -1,22 +1,22 @@ #[doc = "Register `REVISION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `Revision` reader - Revision of EtherCAT controller"] -pub type REVISION_R = crate::FieldReader; +pub type RevisionR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Revision of EtherCAT controller"] #[inline(always)] - pub fn revision(&self) -> REVISION_R { - REVISION_R::new(self.bits) + pub fn revision(&self) -> RevisionR { + RevisionR::new(self.bits) } } #[doc = "Revision of EtherCAT Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revision::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REVISION_SPEC; -impl crate::RegisterSpec for REVISION_SPEC { +pub struct RevisionSpec; +impl crate::RegisterSpec for RevisionSpec { type Ux = u8; } #[doc = "`read()` method returns [`revision::R`](R) reader structure"] -impl crate::Readable for REVISION_SPEC {} +impl crate::Readable for RevisionSpec {} #[doc = "`reset()` method sets REVISION to value 0x01"] -impl crate::Resettable for REVISION_SPEC { +impl crate::Resettable for RevisionSpec { const RESET_VALUE: u8 = 0x01; } diff --git a/src/ecat0/run_led.rs b/src/ecat0/run_led.rs index 557573fa..ca9f7d33 100644 --- a/src/ecat0/run_led.rs +++ b/src/ecat0/run_led.rs @@ -1,75 +1,75 @@ #[doc = "Register `RUN_LED` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RUN_LED` writer"] -pub type W = crate::W; -#[doc = "Field `LED_CODE` reader - LED Code"] -pub type LED_CODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "LED Code\n\nValue on reset: 14"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LED_CODE_A { +pub enum LedCode { #[doc = "0: OFF - Init State"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash - SafeOp)"] - VALUE2 = 1, + Value2 = 1, #[doc = "13: Blinking - PreOp"] - VALUE3 = 13, + Value3 = 13, #[doc = "14: Flickering - Bootstrap"] - VALUE4 = 14, + Value4 = 14, #[doc = "15: On - Operational"] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LED_CODE_A) -> Self { + fn from(variant: LedCode) -> Self { variant as _ } } -impl crate::FieldSpec for LED_CODE_A { +impl crate::FieldSpec for LedCode { type Ux = u8; } -impl LED_CODE_R { +#[doc = "Field `LED_CODE` reader - LED Code"] +pub type LedCodeR = crate::FieldReader; +impl LedCodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LED_CODE_A::VALUE1), - 1 => Some(LED_CODE_A::VALUE2), - 13 => Some(LED_CODE_A::VALUE3), - 14 => Some(LED_CODE_A::VALUE4), - 15 => Some(LED_CODE_A::VALUE5), + 0 => Some(LedCode::Value1), + 1 => Some(LedCode::Value2), + 13 => Some(LedCode::Value3), + 14 => Some(LedCode::Value4), + 15 => Some(LedCode::Value5), _ => None, } } #[doc = "OFF - Init State"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LED_CODE_A::VALUE1 + *self == LedCode::Value1 } #[doc = "Flash - SafeOp)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LED_CODE_A::VALUE2 + *self == LedCode::Value2 } #[doc = "Blinking - PreOp"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LED_CODE_A::VALUE3 + *self == LedCode::Value3 } #[doc = "Flickering - Bootstrap"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LED_CODE_A::VALUE4 + *self == LedCode::Value4 } #[doc = "On - Operational"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == LED_CODE_A::VALUE5 + *self == LedCode::Value5 } } #[doc = "Field `LED_CODE` writer - LED Code"] -pub type LED_CODE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, LED_CODE_A>; -impl<'a, REG> LED_CODE_W<'a, REG> +pub type LedCodeW<'a, REG> = crate::FieldWriter<'a, REG, 4, LedCode>; +impl<'a, REG> LedCodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,131 +77,122 @@ where #[doc = "OFF - Init State"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE1) + self.variant(LedCode::Value1) } #[doc = "Flash - SafeOp)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE2) + self.variant(LedCode::Value2) } #[doc = "Blinking - PreOp"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE3) + self.variant(LedCode::Value3) } #[doc = "Flickering - Bootstrap"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE4) + self.variant(LedCode::Value4) } #[doc = "On - Operational"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(LED_CODE_A::VALUE5) + self.variant(LedCode::Value5) } } -#[doc = "Field `EN_OVERR` reader - Enable Override"] -pub type EN_OVERR_R = crate::BitReader; #[doc = "Enable Override\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_OVERR_A { +pub enum EnOverr { #[doc = "0: Override disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Override enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_OVERR_A) -> Self { + fn from(variant: EnOverr) -> Self { variant as u8 != 0 } } -impl EN_OVERR_R { +#[doc = "Field `EN_OVERR` reader - Enable Override"] +pub type EnOverrR = crate::BitReader; +impl EnOverrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EN_OVERR_A { + pub const fn variant(&self) -> EnOverr { match self.bits { - false => EN_OVERR_A::VALUE1, - true => EN_OVERR_A::VALUE2, + false => EnOverr::Value1, + true => EnOverr::Value2, } } #[doc = "Override disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EN_OVERR_A::VALUE1 + *self == EnOverr::Value1 } #[doc = "Override enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EN_OVERR_A::VALUE2 + *self == EnOverr::Value2 } } #[doc = "Field `EN_OVERR` writer - Enable Override"] -pub type EN_OVERR_W<'a, REG> = crate::BitWriter<'a, REG, EN_OVERR_A>; -impl<'a, REG> EN_OVERR_W<'a, REG> +pub type EnOverrW<'a, REG> = crate::BitWriter<'a, REG, EnOverr>; +impl<'a, REG> EnOverrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EN_OVERR_A::VALUE1) + self.variant(EnOverr::Value1) } #[doc = "Override enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EN_OVERR_A::VALUE2) + self.variant(EnOverr::Value2) } } impl R { #[doc = "Bits 0:3 - LED Code"] #[inline(always)] - pub fn led_code(&self) -> LED_CODE_R { - LED_CODE_R::new(self.bits & 0x0f) + pub fn led_code(&self) -> LedCodeR { + LedCodeR::new(self.bits & 0x0f) } #[doc = "Bit 4 - Enable Override"] #[inline(always)] - pub fn en_overr(&self) -> EN_OVERR_R { - EN_OVERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn en_overr(&self) -> EnOverrR { + EnOverrR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - LED Code"] #[inline(always)] #[must_use] - pub fn led_code(&mut self) -> LED_CODE_W { - LED_CODE_W::new(self, 0) + pub fn led_code(&mut self) -> LedCodeW { + LedCodeW::new(self, 0) } #[doc = "Bit 4 - Enable Override"] #[inline(always)] #[must_use] - pub fn en_overr(&mut self) -> EN_OVERR_W { - EN_OVERR_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn en_overr(&mut self) -> EnOverrW { + EnOverrW::new(self, 4) } } #[doc = "RUN LED Override\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`run_led::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`run_led::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RUN_LED_SPEC; -impl crate::RegisterSpec for RUN_LED_SPEC { +pub struct RunLedSpec; +impl crate::RegisterSpec for RunLedSpec { type Ux = u8; } #[doc = "`read()` method returns [`run_led::R`](R) reader structure"] -impl crate::Readable for RUN_LED_SPEC {} +impl crate::Readable for RunLedSpec {} #[doc = "`write(|w| ..)` method takes [`run_led::W`](W) writer structure"] -impl crate::Writable for RUN_LED_SPEC { +impl crate::Writable for RunLedSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets RUN_LED to value 0x0e"] -impl crate::Resettable for RUN_LED_SPEC { +impl crate::Resettable for RunLedSpec { const RESET_VALUE: u8 = 0x0e; } diff --git a/src/ecat0/rx_err_count0.rs b/src/ecat0/rx_err_count0.rs index 0c626534..379eda2e 100644 --- a/src/ecat0/rx_err_count0.rs +++ b/src/ecat0/rx_err_count0.rs @@ -1,29 +1,29 @@ #[doc = "Register `RX_ERR_COUNT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `INVALID_FRAME` reader - Invalid frame counter of Port y"] -pub type INVALID_FRAME_R = crate::FieldReader; +pub type InvalidFrameR = crate::FieldReader; #[doc = "Field `RX_ERROR` reader - RX Error counter of Port y"] -pub type RX_ERROR_R = crate::FieldReader; +pub type RxErrorR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Invalid frame counter of Port y"] #[inline(always)] - pub fn invalid_frame(&self) -> INVALID_FRAME_R { - INVALID_FRAME_R::new((self.bits & 0xff) as u8) + pub fn invalid_frame(&self) -> InvalidFrameR { + InvalidFrameR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Error counter of Port y"] #[inline(always)] - pub fn rx_error(&self) -> RX_ERROR_R { - RX_ERROR_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rx_error(&self) -> RxErrorR { + RxErrorR::new(((self.bits >> 8) & 0xff) as u8) } } #[doc = "RX Error Counter Port 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_err_count0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_ERR_COUNT0_SPEC; -impl crate::RegisterSpec for RX_ERR_COUNT0_SPEC { +pub struct RxErrCount0Spec; +impl crate::RegisterSpec for RxErrCount0Spec { type Ux = u16; } #[doc = "`read()` method returns [`rx_err_count0::R`](R) reader structure"] -impl crate::Readable for RX_ERR_COUNT0_SPEC {} +impl crate::Readable for RxErrCount0Spec {} #[doc = "`reset()` method sets RX_ERR_COUNT0 to value 0"] -impl crate::Resettable for RX_ERR_COUNT0_SPEC { +impl crate::Resettable for RxErrCount0Spec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/rx_err_count1.rs b/src/ecat0/rx_err_count1.rs index 5849e1b2..0b05533e 100644 --- a/src/ecat0/rx_err_count1.rs +++ b/src/ecat0/rx_err_count1.rs @@ -1,29 +1,29 @@ #[doc = "Register `RX_ERR_COUNT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `INVALID_FRAME` reader - Invalid frame counter of Port y"] -pub type INVALID_FRAME_R = crate::FieldReader; +pub type InvalidFrameR = crate::FieldReader; #[doc = "Field `RX_ERROR` reader - RX Error counter of Port y"] -pub type RX_ERROR_R = crate::FieldReader; +pub type RxErrorR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Invalid frame counter of Port y"] #[inline(always)] - pub fn invalid_frame(&self) -> INVALID_FRAME_R { - INVALID_FRAME_R::new((self.bits & 0xff) as u8) + pub fn invalid_frame(&self) -> InvalidFrameR { + InvalidFrameR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - RX Error counter of Port y"] #[inline(always)] - pub fn rx_error(&self) -> RX_ERROR_R { - RX_ERROR_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn rx_error(&self) -> RxErrorR { + RxErrorR::new(((self.bits >> 8) & 0xff) as u8) } } #[doc = "RX Error Counter Port 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_err_count1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_ERR_COUNT1_SPEC; -impl crate::RegisterSpec for RX_ERR_COUNT1_SPEC { +pub struct RxErrCount1Spec; +impl crate::RegisterSpec for RxErrCount1Spec { type Ux = u16; } #[doc = "`read()` method returns [`rx_err_count1::R`](R) reader structure"] -impl crate::Readable for RX_ERR_COUNT1_SPEC {} +impl crate::Readable for RxErrCount1Spec {} #[doc = "`reset()` method sets RX_ERR_COUNT1 to value 0"] -impl crate::Resettable for RX_ERR_COUNT1_SPEC { +impl crate::Resettable for RxErrCount1Spec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/station_adr.rs b/src/ecat0/station_adr.rs index e05f889e..775aa2d9 100644 --- a/src/ecat0/station_adr.rs +++ b/src/ecat0/station_adr.rs @@ -1,22 +1,22 @@ #[doc = "Register `STATION_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `NODE_ADDR` reader - Address used for node addressing (FPxx commands)"] -pub type NODE_ADDR_R = crate::FieldReader; +pub type NodeAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Address used for node addressing (FPxx commands)"] #[inline(always)] - pub fn node_addr(&self) -> NODE_ADDR_R { - NODE_ADDR_R::new(self.bits) + pub fn node_addr(&self) -> NodeAddrR { + NodeAddrR::new(self.bits) } } #[doc = "Configured Station Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`station_adr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATION_ADR_SPEC; -impl crate::RegisterSpec for STATION_ADR_SPEC { +pub struct StationAdrSpec; +impl crate::RegisterSpec for StationAdrSpec { type Ux = u16; } #[doc = "`read()` method returns [`station_adr::R`](R) reader structure"] -impl crate::Readable for STATION_ADR_SPEC {} +impl crate::Readable for StationAdrSpec {} #[doc = "`reset()` method sets STATION_ADR to value 0"] -impl crate::Resettable for STATION_ADR_SPEC { +impl crate::Resettable for StationAdrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/station_alias.rs b/src/ecat0/station_alias.rs index 87405540..2f91459e 100644 --- a/src/ecat0/station_alias.rs +++ b/src/ecat0/station_alias.rs @@ -1,49 +1,40 @@ #[doc = "Register `STATION_ALIAS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STATION_ALIAS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ALIAS_ADDR` reader - Alias Address used for node addressing(FPxx commands)"] -pub type ALIAS_ADDR_R = crate::FieldReader; +pub type AliasAddrR = crate::FieldReader; #[doc = "Field `ALIAS_ADDR` writer - Alias Address used for node addressing(FPxx commands)"] -pub type ALIAS_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AliasAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Alias Address used for node addressing(FPxx commands)"] #[inline(always)] - pub fn alias_addr(&self) -> ALIAS_ADDR_R { - ALIAS_ADDR_R::new(self.bits) + pub fn alias_addr(&self) -> AliasAddrR { + AliasAddrR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - Alias Address used for node addressing(FPxx commands)"] #[inline(always)] #[must_use] - pub fn alias_addr(&mut self) -> ALIAS_ADDR_W { - ALIAS_ADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn alias_addr(&mut self) -> AliasAddrW { + AliasAddrW::new(self, 0) } } #[doc = "Configured Station Alias\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`station_alias::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`station_alias::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATION_ALIAS_SPEC; -impl crate::RegisterSpec for STATION_ALIAS_SPEC { +pub struct StationAliasSpec; +impl crate::RegisterSpec for StationAliasSpec { type Ux = u16; } #[doc = "`read()` method returns [`station_alias::R`](R) reader structure"] -impl crate::Readable for STATION_ALIAS_SPEC {} +impl crate::Readable for StationAliasSpec {} #[doc = "`write(|w| ..)` method takes [`station_alias::W`](W) writer structure"] -impl crate::Writable for STATION_ALIAS_SPEC { +impl crate::Writable for StationAliasSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets STATION_ALIAS to value 0"] -impl crate::Resettable for STATION_ALIAS_SPEC { +impl crate::Resettable for StationAliasSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/status.rs b/src/ecat0/status.rs index 673569d3..ceff2a86 100644 --- a/src/ecat0/status.rs +++ b/src/ecat0/status.rs @@ -1,56 +1,56 @@ #[doc = "Register `STATUS` reader"] -pub type R = crate::R; -#[doc = "Field `PARERR` reader - PARITY ERROR"] -pub type PARERR_R = crate::BitReader; +pub type R = crate::R; #[doc = "PARITY ERROR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PARERR_A { +pub enum Parerr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity Error in User or Process RAM"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PARERR_A) -> Self { + fn from(variant: Parerr) -> Self { variant as u8 != 0 } } -impl PARERR_R { +#[doc = "Field `PARERR` reader - PARITY ERROR"] +pub type ParerrR = crate::BitReader; +impl ParerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PARERR_A { + pub const fn variant(&self) -> Parerr { match self.bits { - false => PARERR_A::VALUE1, - true => PARERR_A::VALUE2, + false => Parerr::Value1, + true => Parerr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PARERR_A::VALUE1 + *self == Parerr::Value1 } #[doc = "Parity Error in User or Process RAM"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PARERR_A::VALUE2 + *self == Parerr::Value2 } } impl R { #[doc = "Bit 0 - PARITY ERROR"] #[inline(always)] - pub fn parerr(&self) -> PARERR_R { - PARERR_R::new((self.bits & 1) != 0) + pub fn parerr(&self) -> ParerrR { + ParerrR::new((self.bits & 1) != 0) } } #[doc = "ECAT0 Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`status::R`](R) reader structure"] -impl crate::Readable for STATUS_SPEC {} +impl crate::Readable for StatusSpec {} #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { +impl crate::Resettable for StatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/sync_latch_config.rs b/src/ecat0/sync_latch_config.rs index 3747c98d..2a68b26e 100644 --- a/src/ecat0/sync_latch_config.rs +++ b/src/ecat0/sync_latch_config.rs @@ -1,304 +1,304 @@ #[doc = "Register `SYNC_LATCH_CONFIG` reader"] -pub type R = crate::R; -#[doc = "Field `SYNC0_POL` reader - SYNC0 output driver/polarity"] -pub type SYNC0_POL_R = crate::FieldReader; +pub type R = crate::R; #[doc = "SYNC0 output driver/polarity\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNC0_POL_A { +pub enum Sync0Pol { #[doc = "0: Push-Pull active low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Open Drain (active low)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Push-Pull active high"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Open Source (active high)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNC0_POL_A) -> Self { + fn from(variant: Sync0Pol) -> Self { variant as _ } } -impl crate::FieldSpec for SYNC0_POL_A { +impl crate::FieldSpec for Sync0Pol { type Ux = u8; } -impl SYNC0_POL_R { +#[doc = "Field `SYNC0_POL` reader - SYNC0 output driver/polarity"] +pub type Sync0PolR = crate::FieldReader; +impl Sync0PolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC0_POL_A { + pub const fn variant(&self) -> Sync0Pol { match self.bits { - 0 => SYNC0_POL_A::VALUE1, - 1 => SYNC0_POL_A::VALUE2, - 2 => SYNC0_POL_A::VALUE3, - 3 => SYNC0_POL_A::VALUE4, + 0 => Sync0Pol::Value1, + 1 => Sync0Pol::Value2, + 2 => Sync0Pol::Value3, + 3 => Sync0Pol::Value4, _ => unreachable!(), } } #[doc = "Push-Pull active low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC0_POL_A::VALUE1 + *self == Sync0Pol::Value1 } #[doc = "Open Drain (active low)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC0_POL_A::VALUE2 + *self == Sync0Pol::Value2 } #[doc = "Push-Pull active high"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SYNC0_POL_A::VALUE3 + *self == Sync0Pol::Value3 } #[doc = "Open Source (active high)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SYNC0_POL_A::VALUE4 + *self == Sync0Pol::Value4 } } -#[doc = "Field `SL0_CNF` reader - SYNC0/LATCH0 configuration"] -pub type SL0_CNF_R = crate::BitReader; #[doc = "SYNC0/LATCH0 configuration\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SL0_CNF_A { +pub enum Sl0Cnf { #[doc = "0: LATCH0 Input"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SYNC0 Output"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SL0_CNF_A) -> Self { + fn from(variant: Sl0Cnf) -> Self { variant as u8 != 0 } } -impl SL0_CNF_R { +#[doc = "Field `SL0_CNF` reader - SYNC0/LATCH0 configuration"] +pub type Sl0CnfR = crate::BitReader; +impl Sl0CnfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SL0_CNF_A { + pub const fn variant(&self) -> Sl0Cnf { match self.bits { - false => SL0_CNF_A::VALUE1, - true => SL0_CNF_A::VALUE2, + false => Sl0Cnf::Value1, + true => Sl0Cnf::Value2, } } #[doc = "LATCH0 Input"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SL0_CNF_A::VALUE1 + *self == Sl0Cnf::Value1 } #[doc = "SYNC0 Output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SL0_CNF_A::VALUE2 + *self == Sl0Cnf::Value2 } } -#[doc = "Field `S0_MAP` reader - SYNC0 mapped to registerECAT0_AL_EVENT_REQ. ST_S0"] -pub type S0_MAP_R = crate::BitReader; #[doc = "SYNC0 mapped to registerECAT0_AL_EVENT_REQ. ST_S0\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0_MAP_A { +pub enum S0Map { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0_MAP_A) -> Self { + fn from(variant: S0Map) -> Self { variant as u8 != 0 } } -impl S0_MAP_R { +#[doc = "Field `S0_MAP` reader - SYNC0 mapped to registerECAT0_AL_EVENT_REQ. ST_S0"] +pub type S0MapR = crate::BitReader; +impl S0MapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0_MAP_A { + pub const fn variant(&self) -> S0Map { match self.bits { - false => S0_MAP_A::VALUE1, - true => S0_MAP_A::VALUE2, + false => S0Map::Value1, + true => S0Map::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0_MAP_A::VALUE1 + *self == S0Map::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0_MAP_A::VALUE2 + *self == S0Map::Value2 } } -#[doc = "Field `SYNC1_POL` reader - SYNC1 output driver/polarity"] -pub type SYNC1_POL_R = crate::FieldReader; #[doc = "SYNC1 output driver/polarity\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYNC1_POL_A { +pub enum Sync1Pol { #[doc = "0: Push-Pull active low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Open Drain (active low)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Push-Pull active high"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Open Source (active high)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYNC1_POL_A) -> Self { + fn from(variant: Sync1Pol) -> Self { variant as _ } } -impl crate::FieldSpec for SYNC1_POL_A { +impl crate::FieldSpec for Sync1Pol { type Ux = u8; } -impl SYNC1_POL_R { +#[doc = "Field `SYNC1_POL` reader - SYNC1 output driver/polarity"] +pub type Sync1PolR = crate::FieldReader; +impl Sync1PolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC1_POL_A { + pub const fn variant(&self) -> Sync1Pol { match self.bits { - 0 => SYNC1_POL_A::VALUE1, - 1 => SYNC1_POL_A::VALUE2, - 2 => SYNC1_POL_A::VALUE3, - 3 => SYNC1_POL_A::VALUE4, + 0 => Sync1Pol::Value1, + 1 => Sync1Pol::Value2, + 2 => Sync1Pol::Value3, + 3 => Sync1Pol::Value4, _ => unreachable!(), } } #[doc = "Push-Pull active low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC1_POL_A::VALUE1 + *self == Sync1Pol::Value1 } #[doc = "Open Drain (active low)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC1_POL_A::VALUE2 + *self == Sync1Pol::Value2 } #[doc = "Push-Pull active high"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SYNC1_POL_A::VALUE3 + *self == Sync1Pol::Value3 } #[doc = "Open Source (active high)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SYNC1_POL_A::VALUE4 + *self == Sync1Pol::Value4 } } -#[doc = "Field `SL1_CNF` reader - SYNC1/LATCH1 configuration"] -pub type SL1_CNF_R = crate::BitReader; #[doc = "SYNC1/LATCH1 configuration\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SL1_CNF_A { +pub enum Sl1Cnf { #[doc = "0: LATCH1 Input"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SYNC1 Output"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SL1_CNF_A) -> Self { + fn from(variant: Sl1Cnf) -> Self { variant as u8 != 0 } } -impl SL1_CNF_R { +#[doc = "Field `SL1_CNF` reader - SYNC1/LATCH1 configuration"] +pub type Sl1CnfR = crate::BitReader; +impl Sl1CnfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SL1_CNF_A { + pub const fn variant(&self) -> Sl1Cnf { match self.bits { - false => SL1_CNF_A::VALUE1, - true => SL1_CNF_A::VALUE2, + false => Sl1Cnf::Value1, + true => Sl1Cnf::Value2, } } #[doc = "LATCH1 Input"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SL1_CNF_A::VALUE1 + *self == Sl1Cnf::Value1 } #[doc = "SYNC1 Output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SL1_CNF_A::VALUE2 + *self == Sl1Cnf::Value2 } } -#[doc = "Field `S1_MAP` reader - SYNC1 mapped to registerECAT0_AL_EVENT_REQ. ST_S1"] -pub type S1_MAP_R = crate::BitReader; #[doc = "SYNC1 mapped to registerECAT0_AL_EVENT_REQ. ST_S1\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1_MAP_A { +pub enum S1Map { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1_MAP_A) -> Self { + fn from(variant: S1Map) -> Self { variant as u8 != 0 } } -impl S1_MAP_R { +#[doc = "Field `S1_MAP` reader - SYNC1 mapped to registerECAT0_AL_EVENT_REQ. ST_S1"] +pub type S1MapR = crate::BitReader; +impl S1MapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1_MAP_A { + pub const fn variant(&self) -> S1Map { match self.bits { - false => S1_MAP_A::VALUE1, - true => S1_MAP_A::VALUE2, + false => S1Map::Value1, + true => S1Map::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1_MAP_A::VALUE1 + *self == S1Map::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1_MAP_A::VALUE2 + *self == S1Map::Value2 } } impl R { #[doc = "Bits 0:1 - SYNC0 output driver/polarity"] #[inline(always)] - pub fn sync0_pol(&self) -> SYNC0_POL_R { - SYNC0_POL_R::new(self.bits & 3) + pub fn sync0_pol(&self) -> Sync0PolR { + Sync0PolR::new(self.bits & 3) } #[doc = "Bit 2 - SYNC0/LATCH0 configuration"] #[inline(always)] - pub fn sl0_cnf(&self) -> SL0_CNF_R { - SL0_CNF_R::new(((self.bits >> 2) & 1) != 0) + pub fn sl0_cnf(&self) -> Sl0CnfR { + Sl0CnfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SYNC0 mapped to registerECAT0_AL_EVENT_REQ. ST_S0"] #[inline(always)] - pub fn s0_map(&self) -> S0_MAP_R { - S0_MAP_R::new(((self.bits >> 3) & 1) != 0) + pub fn s0_map(&self) -> S0MapR { + S0MapR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - SYNC1 output driver/polarity"] #[inline(always)] - pub fn sync1_pol(&self) -> SYNC1_POL_R { - SYNC1_POL_R::new((self.bits >> 4) & 3) + pub fn sync1_pol(&self) -> Sync1PolR { + Sync1PolR::new((self.bits >> 4) & 3) } #[doc = "Bit 6 - SYNC1/LATCH1 configuration"] #[inline(always)] - pub fn sl1_cnf(&self) -> SL1_CNF_R { - SL1_CNF_R::new(((self.bits >> 6) & 1) != 0) + pub fn sl1_cnf(&self) -> Sl1CnfR { + Sl1CnfR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - SYNC1 mapped to registerECAT0_AL_EVENT_REQ. ST_S1"] #[inline(always)] - pub fn s1_map(&self) -> S1_MAP_R { - S1_MAP_R::new(((self.bits >> 7) & 1) != 0) + pub fn s1_map(&self) -> S1MapR { + S1MapR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Sync/Latch\\[1:0\\] PDI Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sync_latch_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYNC_LATCH_CONFIG_SPEC; -impl crate::RegisterSpec for SYNC_LATCH_CONFIG_SPEC { +pub struct SyncLatchConfigSpec; +impl crate::RegisterSpec for SyncLatchConfigSpec { type Ux = u8; } #[doc = "`read()` method returns [`sync_latch_config::R`](R) reader structure"] -impl crate::Readable for SYNC_LATCH_CONFIG_SPEC {} +impl crate::Readable for SyncLatchConfigSpec {} #[doc = "`reset()` method sets SYNC_LATCH_CONFIG to value 0xee"] -impl crate::Resettable for SYNC_LATCH_CONFIG_SPEC { +impl crate::Resettable for SyncLatchConfigSpec { const RESET_VALUE: u8 = 0xee; } diff --git a/src/ecat0/sync_manager.rs b/src/ecat0/sync_manager.rs index 95945bf5..5aa95635 100644 --- a/src/ecat0/sync_manager.rs +++ b/src/ecat0/sync_manager.rs @@ -1,22 +1,22 @@ #[doc = "Register `SYNC_MANAGER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `NUM_SM` reader - Number of supported SyncManager channels (or entities) of the EtherCAT Slave Controller"] -pub type NUM_SM_R = crate::FieldReader; +pub type NumSmR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Number of supported SyncManager channels (or entities) of the EtherCAT Slave Controller"] #[inline(always)] - pub fn num_sm(&self) -> NUM_SM_R { - NUM_SM_R::new(self.bits) + pub fn num_sm(&self) -> NumSmR { + NumSmR::new(self.bits) } } #[doc = "SyncManagers Supported\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sync_manager::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYNC_MANAGER_SPEC; -impl crate::RegisterSpec for SYNC_MANAGER_SPEC { +pub struct SyncManagerSpec; +impl crate::RegisterSpec for SyncManagerSpec { type Ux = u8; } #[doc = "`read()` method returns [`sync_manager::R`](R) reader structure"] -impl crate::Readable for SYNC_MANAGER_SPEC {} +impl crate::Readable for SyncManagerSpec {} #[doc = "`reset()` method sets SYNC_MANAGER to value 0x08"] -impl crate::Resettable for SYNC_MANAGER_SPEC { +impl crate::Resettable for SyncManagerSpec { const RESET_VALUE: u8 = 0x08; } diff --git a/src/ecat0/type_.rs b/src/ecat0/type_.rs index dc7320b4..ecae34aa 100644 --- a/src/ecat0/type_.rs +++ b/src/ecat0/type_.rs @@ -1,22 +1,22 @@ #[doc = "Register `TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `Type` reader - Type of EtherCAT controller"] -pub type TYPE_R = crate::FieldReader; +pub type TypeR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Type of EtherCAT controller"] #[inline(always)] - pub fn type_(&self) -> TYPE_R { - TYPE_R::new(self.bits) + pub fn type_(&self) -> TypeR { + TypeR::new(self.bits) } } #[doc = "Type of EtherCAT Controller\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TYPE_SPEC; -impl crate::RegisterSpec for TYPE_SPEC { +pub struct TypeSpec; +impl crate::RegisterSpec for TypeSpec { type Ux = u8; } #[doc = "`read()` method returns [`type_::R`](R) reader structure"] -impl crate::Readable for TYPE_SPEC {} +impl crate::Readable for TypeSpec {} #[doc = "`reset()` method sets TYPE to value 0x98"] -impl crate::Resettable for TYPE_SPEC { +impl crate::Resettable for TypeSpec { const RESET_VALUE: u8 = 0x98; } diff --git a/src/ecat0/wd_count_pdata.rs b/src/ecat0/wd_count_pdata.rs index 73183aa6..5d40dd29 100644 --- a/src/ecat0/wd_count_pdata.rs +++ b/src/ecat0/wd_count_pdata.rs @@ -1,22 +1,22 @@ #[doc = "Register `WD_COUNT_PDATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WD_COUNTER_PD` reader - Watchdog Counter Process Data"] -pub type WD_COUNTER_PD_R = crate::FieldReader; +pub type WdCounterPdR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Watchdog Counter Process Data"] #[inline(always)] - pub fn wd_counter_pd(&self) -> WD_COUNTER_PD_R { - WD_COUNTER_PD_R::new(self.bits) + pub fn wd_counter_pd(&self) -> WdCounterPdR { + WdCounterPdR::new(self.bits) } } #[doc = "Watchdog Counter Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_count_pdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_COUNT_PDATA_SPEC; -impl crate::RegisterSpec for WD_COUNT_PDATA_SPEC { +pub struct WdCountPdataSpec; +impl crate::RegisterSpec for WdCountPdataSpec { type Ux = u8; } #[doc = "`read()` method returns [`wd_count_pdata::R`](R) reader structure"] -impl crate::Readable for WD_COUNT_PDATA_SPEC {} +impl crate::Readable for WdCountPdataSpec {} #[doc = "`reset()` method sets WD_COUNT_PDATA to value 0"] -impl crate::Resettable for WD_COUNT_PDATA_SPEC { +impl crate::Resettable for WdCountPdataSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/wd_count_pdi.rs b/src/ecat0/wd_count_pdi.rs index 7a8d319f..00405c61 100644 --- a/src/ecat0/wd_count_pdi.rs +++ b/src/ecat0/wd_count_pdi.rs @@ -1,22 +1,22 @@ #[doc = "Register `WD_COUNT_PDI` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WD_COUNTER_PDI` reader - Watchdog PDI counter"] -pub type WD_COUNTER_PDI_R = crate::FieldReader; +pub type WdCounterPdiR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Watchdog PDI counter"] #[inline(always)] - pub fn wd_counter_pdi(&self) -> WD_COUNTER_PDI_R { - WD_COUNTER_PDI_R::new(self.bits) + pub fn wd_counter_pdi(&self) -> WdCounterPdiR { + WdCounterPdiR::new(self.bits) } } #[doc = "Watchdog Counter PDI\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_count_pdi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_COUNT_PDI_SPEC; -impl crate::RegisterSpec for WD_COUNT_PDI_SPEC { +pub struct WdCountPdiSpec; +impl crate::RegisterSpec for WdCountPdiSpec { type Ux = u8; } #[doc = "`read()` method returns [`wd_count_pdi::R`](R) reader structure"] -impl crate::Readable for WD_COUNT_PDI_SPEC {} +impl crate::Readable for WdCountPdiSpec {} #[doc = "`reset()` method sets WD_COUNT_PDI to value 0"] -impl crate::Resettable for WD_COUNT_PDI_SPEC { +impl crate::Resettable for WdCountPdiSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/wd_divide.rs b/src/ecat0/wd_divide.rs index 105533ef..bd9953c3 100644 --- a/src/ecat0/wd_divide.rs +++ b/src/ecat0/wd_divide.rs @@ -1,49 +1,40 @@ #[doc = "Register `WD_DIVIDE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WD_DIVIDE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WD_DIV` reader - Watchdog divider"] -pub type WD_DIV_R = crate::FieldReader; +pub type WdDivR = crate::FieldReader; #[doc = "Field `WD_DIV` writer - Watchdog divider"] -pub type WD_DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type WdDivW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Watchdog divider"] #[inline(always)] - pub fn wd_div(&self) -> WD_DIV_R { - WD_DIV_R::new(self.bits) + pub fn wd_div(&self) -> WdDivR { + WdDivR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - Watchdog divider"] #[inline(always)] #[must_use] - pub fn wd_div(&mut self) -> WD_DIV_W { - WD_DIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn wd_div(&mut self) -> WdDivW { + WdDivW::new(self, 0) } } #[doc = "Watchdog Divider\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_divide::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_divide::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_DIVIDE_SPEC; -impl crate::RegisterSpec for WD_DIVIDE_SPEC { +pub struct WdDivideSpec; +impl crate::RegisterSpec for WdDivideSpec { type Ux = u16; } #[doc = "`read()` method returns [`wd_divide::R`](R) reader structure"] -impl crate::Readable for WD_DIVIDE_SPEC {} +impl crate::Readable for WdDivideSpec {} #[doc = "`write(|w| ..)` method takes [`wd_divide::W`](W) writer structure"] -impl crate::Writable for WD_DIVIDE_SPEC { +impl crate::Writable for WdDivideSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets WD_DIVIDE to value 0x09c2"] -impl crate::Resettable for WD_DIVIDE_SPEC { +impl crate::Resettable for WdDivideSpec { const RESET_VALUE: u16 = 0x09c2; } diff --git a/src/ecat0/wd_stat_pdata.rs b/src/ecat0/wd_stat_pdata.rs index 5c287b6d..3dbb76de 100644 --- a/src/ecat0/wd_stat_pdata.rs +++ b/src/ecat0/wd_stat_pdata.rs @@ -1,56 +1,56 @@ #[doc = "Register `WD_STAT_PDATA` reader"] -pub type R = crate::R; -#[doc = "Field `WD_STAT_PD` reader - Watchdog Status of Process Data"] -pub type WD_STAT_PD_R = crate::BitReader; +pub type R = crate::R; #[doc = "Watchdog Status of Process Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WD_STAT_PD_A { +pub enum WdStatPd { #[doc = "0: Watchdog Process Data expired"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Watchdog Process Data is active or disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WD_STAT_PD_A) -> Self { + fn from(variant: WdStatPd) -> Self { variant as u8 != 0 } } -impl WD_STAT_PD_R { +#[doc = "Field `WD_STAT_PD` reader - Watchdog Status of Process Data"] +pub type WdStatPdR = crate::BitReader; +impl WdStatPdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WD_STAT_PD_A { + pub const fn variant(&self) -> WdStatPd { match self.bits { - false => WD_STAT_PD_A::VALUE1, - true => WD_STAT_PD_A::VALUE2, + false => WdStatPd::Value1, + true => WdStatPd::Value2, } } #[doc = "Watchdog Process Data expired"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WD_STAT_PD_A::VALUE1 + *self == WdStatPd::Value1 } #[doc = "Watchdog Process Data is active or disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WD_STAT_PD_A::VALUE2 + *self == WdStatPd::Value2 } } impl R { #[doc = "Bit 0 - Watchdog Status of Process Data"] #[inline(always)] - pub fn wd_stat_pd(&self) -> WD_STAT_PD_R { - WD_STAT_PD_R::new((self.bits & 1) != 0) + pub fn wd_stat_pd(&self) -> WdStatPdR { + WdStatPdR::new((self.bits & 1) != 0) } } #[doc = "Watchdog Status Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_stat_pdata::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_STAT_PDATA_SPEC; -impl crate::RegisterSpec for WD_STAT_PDATA_SPEC { +pub struct WdStatPdataSpec; +impl crate::RegisterSpec for WdStatPdataSpec { type Ux = u16; } #[doc = "`read()` method returns [`wd_stat_pdata::R`](R) reader structure"] -impl crate::Readable for WD_STAT_PDATA_SPEC {} +impl crate::Readable for WdStatPdataSpec {} #[doc = "`reset()` method sets WD_STAT_PDATA to value 0"] -impl crate::Resettable for WD_STAT_PDATA_SPEC { +impl crate::Resettable for WdStatPdataSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0/wd_time_pdata.rs b/src/ecat0/wd_time_pdata.rs index bfaab8a7..a8fc5577 100644 --- a/src/ecat0/wd_time_pdata.rs +++ b/src/ecat0/wd_time_pdata.rs @@ -1,49 +1,40 @@ #[doc = "Register `WD_TIME_PDATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WD_TIME_PDATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WD_TIME_PD` reader - Watchdog Time Process Data"] -pub type WD_TIME_PD_R = crate::FieldReader; +pub type WdTimePdR = crate::FieldReader; #[doc = "Field `WD_TIME_PD` writer - Watchdog Time Process Data"] -pub type WD_TIME_PD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type WdTimePdW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Watchdog Time Process Data"] #[inline(always)] - pub fn wd_time_pd(&self) -> WD_TIME_PD_R { - WD_TIME_PD_R::new(self.bits) + pub fn wd_time_pd(&self) -> WdTimePdR { + WdTimePdR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - Watchdog Time Process Data"] #[inline(always)] #[must_use] - pub fn wd_time_pd(&mut self) -> WD_TIME_PD_W { - WD_TIME_PD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn wd_time_pd(&mut self) -> WdTimePdW { + WdTimePdW::new(self, 0) } } #[doc = "Watchdog Time Process Data\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_time_pdata::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_time_pdata::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_TIME_PDATA_SPEC; -impl crate::RegisterSpec for WD_TIME_PDATA_SPEC { +pub struct WdTimePdataSpec; +impl crate::RegisterSpec for WdTimePdataSpec { type Ux = u16; } #[doc = "`read()` method returns [`wd_time_pdata::R`](R) reader structure"] -impl crate::Readable for WD_TIME_PDATA_SPEC {} +impl crate::Readable for WdTimePdataSpec {} #[doc = "`write(|w| ..)` method takes [`wd_time_pdata::W`](W) writer structure"] -impl crate::Writable for WD_TIME_PDATA_SPEC { +impl crate::Writable for WdTimePdataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets WD_TIME_PDATA to value 0x03e8"] -impl crate::Resettable for WD_TIME_PDATA_SPEC { +impl crate::Resettable for WdTimePdataSpec { const RESET_VALUE: u16 = 0x03e8; } diff --git a/src/ecat0/wd_time_pdi.rs b/src/ecat0/wd_time_pdi.rs index 78e062b2..11d7e393 100644 --- a/src/ecat0/wd_time_pdi.rs +++ b/src/ecat0/wd_time_pdi.rs @@ -1,49 +1,40 @@ #[doc = "Register `WD_TIME_PDI` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WD_TIME_PDI` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WD_TIME_PDI` reader - Watchdog Time PDI"] -pub type WD_TIME_PDI_R = crate::FieldReader; +pub type WdTimePdiR = crate::FieldReader; #[doc = "Field `WD_TIME_PDI` writer - Watchdog Time PDI"] -pub type WD_TIME_PDI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type WdTimePdiW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Watchdog Time PDI"] #[inline(always)] - pub fn wd_time_pdi(&self) -> WD_TIME_PDI_R { - WD_TIME_PDI_R::new(self.bits) + pub fn wd_time_pdi(&self) -> WdTimePdiR { + WdTimePdiR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - Watchdog Time PDI"] #[inline(always)] #[must_use] - pub fn wd_time_pdi(&mut self) -> WD_TIME_PDI_W { - WD_TIME_PDI_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn wd_time_pdi(&mut self) -> WdTimePdiW { + WdTimePdiW::new(self, 0) } } #[doc = "Watchdog Time PDI\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wd_time_pdi::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wd_time_pdi::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WD_TIME_PDI_SPEC; -impl crate::RegisterSpec for WD_TIME_PDI_SPEC { +pub struct WdTimePdiSpec; +impl crate::RegisterSpec for WdTimePdiSpec { type Ux = u16; } #[doc = "`read()` method returns [`wd_time_pdi::R`](R) reader structure"] -impl crate::Readable for WD_TIME_PDI_SPEC {} +impl crate::Readable for WdTimePdiSpec {} #[doc = "`write(|w| ..)` method takes [`wd_time_pdi::W`](W) writer structure"] -impl crate::Writable for WD_TIME_PDI_SPEC { +impl crate::Writable for WdTimePdiSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets WD_TIME_PDI to value 0x03e8"] -impl crate::Resettable for WD_TIME_PDI_SPEC { +impl crate::Resettable for WdTimePdiSpec { const RESET_VALUE: u16 = 0x03e8; } diff --git a/src/ecat0/wr_reg_enable.rs b/src/ecat0/wr_reg_enable.rs index 708946b8..12556195 100644 --- a/src/ecat0/wr_reg_enable.rs +++ b/src/ecat0/wr_reg_enable.rs @@ -1,22 +1,22 @@ #[doc = "Register `WR_REG_ENABLE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WR_REG_EN` reader - Write register protection enabled"] -pub type WR_REG_EN_R = crate::BitReader; +pub type WrRegEnR = crate::BitReader; impl R { #[doc = "Bit 0 - Write register protection enabled"] #[inline(always)] - pub fn wr_reg_en(&self) -> WR_REG_EN_R { - WR_REG_EN_R::new((self.bits & 1) != 0) + pub fn wr_reg_en(&self) -> WrRegEnR { + WrRegEnR::new((self.bits & 1) != 0) } } #[doc = "Write Register Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wr_reg_enable::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WR_REG_ENABLE_SPEC; -impl crate::RegisterSpec for WR_REG_ENABLE_SPEC { +pub struct WrRegEnableSpec; +impl crate::RegisterSpec for WrRegEnableSpec { type Ux = u8; } #[doc = "`read()` method returns [`wr_reg_enable::R`](R) reader structure"] -impl crate::Readable for WR_REG_ENABLE_SPEC {} +impl crate::Readable for WrRegEnableSpec {} #[doc = "`reset()` method sets WR_REG_ENABLE to value 0"] -impl crate::Resettable for WR_REG_ENABLE_SPEC { +impl crate::Resettable for WrRegEnableSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/wr_reg_protect.rs b/src/ecat0/wr_reg_protect.rs index 3c6ba5dd..5ebb0e9b 100644 --- a/src/ecat0/wr_reg_protect.rs +++ b/src/ecat0/wr_reg_protect.rs @@ -1,56 +1,56 @@ #[doc = "Register `WR_REG_PROTECT` reader"] -pub type R = crate::R; -#[doc = "Field `WR_REG_P` reader - Write register protection"] -pub type WR_REG_P_R = crate::BitReader; +pub type R = crate::R; #[doc = "Write register protection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WR_REG_P_A { +pub enum WrRegP { #[doc = "0: Protection disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Protection enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WR_REG_P_A) -> Self { + fn from(variant: WrRegP) -> Self { variant as u8 != 0 } } -impl WR_REG_P_R { +#[doc = "Field `WR_REG_P` reader - Write register protection"] +pub type WrRegPR = crate::BitReader; +impl WrRegPR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WR_REG_P_A { + pub const fn variant(&self) -> WrRegP { match self.bits { - false => WR_REG_P_A::VALUE1, - true => WR_REG_P_A::VALUE2, + false => WrRegP::Value1, + true => WrRegP::Value2, } } #[doc = "Protection disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WR_REG_P_A::VALUE1 + *self == WrRegP::Value1 } #[doc = "Protection enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WR_REG_P_A::VALUE2 + *self == WrRegP::Value2 } } impl R { #[doc = "Bit 0 - Write register protection"] #[inline(always)] - pub fn wr_reg_p(&self) -> WR_REG_P_R { - WR_REG_P_R::new((self.bits & 1) != 0) + pub fn wr_reg_p(&self) -> WrRegPR { + WrRegPR::new((self.bits & 1) != 0) } } #[doc = "Write Register Protection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wr_reg_protect::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WR_REG_PROTECT_SPEC; -impl crate::RegisterSpec for WR_REG_PROTECT_SPEC { +pub struct WrRegProtectSpec; +impl crate::RegisterSpec for WrRegProtectSpec { type Ux = u8; } #[doc = "`read()` method returns [`wr_reg_protect::R`](R) reader structure"] -impl crate::Readable for WR_REG_PROTECT_SPEC {} +impl crate::Readable for WrRegProtectSpec {} #[doc = "`reset()` method sets WR_REG_PROTECT to value 0"] -impl crate::Resettable for WR_REG_PROTECT_SPEC { +impl crate::Resettable for WrRegProtectSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/writemode_dc_sys_time.rs b/src/ecat0/writemode_dc_sys_time.rs index c99b7f53..ec9e401b 100644 --- a/src/ecat0/writemode_dc_sys_time.rs +++ b/src/ecat0/writemode_dc_sys_time.rs @@ -1,36 +1,27 @@ #[doc = "Register `DC_SYS_TIME` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WRITE_ACCESS` writer - Write access"] -pub type WRITE_ACCESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WriteAccessW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Write access"] #[inline(always)] #[must_use] - pub fn write_access(&mut self) -> WRITE_ACCESS_W { - WRITE_ACCESS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn write_access(&mut self) -> WriteAccessW { + WriteAccessW::new(self, 0) } } #[doc = "System Time \\[WRITE Mode\\]\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`writemode_dc_sys_time::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WRITEMODE_DC_SYS_TIME_SPEC; -impl crate::RegisterSpec for WRITEMODE_DC_SYS_TIME_SPEC { +pub struct WritemodeDcSysTimeSpec; +impl crate::RegisterSpec for WritemodeDcSysTimeSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`writemode_dc_sys_time::W`](W) writer structure"] -impl crate::Writable for WRITEMODE_DC_SYS_TIME_SPEC { +impl crate::Writable for WritemodeDcSysTimeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC_SYS_TIME to value 0"] -impl crate::Resettable for WRITEMODE_DC_SYS_TIME_SPEC { +impl crate::Resettable for WritemodeDcSysTimeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0/writemode_esc_reset_ecat.rs b/src/ecat0/writemode_esc_reset_ecat.rs index bb094a00..49449a96 100644 --- a/src/ecat0/writemode_esc_reset_ecat.rs +++ b/src/ecat0/writemode_esc_reset_ecat.rs @@ -1,22 +1,22 @@ #[doc = "Register `ESC_RESET_ECAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESET_CMD` reader - Reset commands issued by EtherCAt Master"] -pub type RESET_CMD_R = crate::FieldReader; +pub type ResetCmdR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Reset commands issued by EtherCAt Master"] #[inline(always)] - pub fn reset_cmd(&self) -> RESET_CMD_R { - RESET_CMD_R::new(self.bits) + pub fn reset_cmd(&self) -> ResetCmdR { + ResetCmdR::new(self.bits) } } #[doc = "ESC Reset ECAT \\[WRITE Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`writemode_esc_reset_ecat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WRITEMODE_ESC_RESET_ECAT_SPEC; -impl crate::RegisterSpec for WRITEMODE_ESC_RESET_ECAT_SPEC { +pub struct WritemodeEscResetEcatSpec; +impl crate::RegisterSpec for WritemodeEscResetEcatSpec { type Ux = u8; } #[doc = "`read()` method returns [`writemode_esc_reset_ecat::R`](R) reader structure"] -impl crate::Readable for WRITEMODE_ESC_RESET_ECAT_SPEC {} +impl crate::Readable for WritemodeEscResetEcatSpec {} #[doc = "`reset()` method sets ESC_RESET_ECAT to value 0"] -impl crate::Resettable for WRITEMODE_ESC_RESET_ECAT_SPEC { +impl crate::Resettable for WritemodeEscResetEcatSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0/writemode_esc_reset_pdi.rs b/src/ecat0/writemode_esc_reset_pdi.rs index 58da9fbe..be80f790 100644 --- a/src/ecat0/writemode_esc_reset_pdi.rs +++ b/src/ecat0/writemode_esc_reset_pdi.rs @@ -1,22 +1,22 @@ #[doc = "Register `ESC_RESET_PDI` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESET_CMD` reader - Reset commands issued by XMC4700"] -pub type RESET_CMD_R = crate::FieldReader; +pub type ResetCmdR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Reset commands issued by XMC4700"] #[inline(always)] - pub fn reset_cmd(&self) -> RESET_CMD_R { - RESET_CMD_R::new(self.bits) + pub fn reset_cmd(&self) -> ResetCmdR { + ResetCmdR::new(self.bits) } } #[doc = "ESC Reset PDI \\[WRITE Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`writemode_esc_reset_pdi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WRITEMODE_ESC_RESET_PDI_SPEC; -impl crate::RegisterSpec for WRITEMODE_ESC_RESET_PDI_SPEC { +pub struct WritemodeEscResetPdiSpec; +impl crate::RegisterSpec for WritemodeEscResetPdiSpec { type Ux = u8; } #[doc = "`read()` method returns [`writemode_esc_reset_pdi::R`](R) reader structure"] -impl crate::Readable for WRITEMODE_ESC_RESET_PDI_SPEC {} +impl crate::Readable for WritemodeEscResetPdiSpec {} #[doc = "`reset()` method sets ESC_RESET_PDI to value 0"] -impl crate::Resettable for WRITEMODE_ESC_RESET_PDI_SPEC { +impl crate::Resettable for WritemodeEscResetPdiSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_con.rs b/src/ecat0_con.rs index d0d20f8a..ea59923f 100644 --- a/src/ecat0_con.rs +++ b/src/ecat0_con.rs @@ -1,40 +1,43 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - con: CON, - conp0: CONP0, - conp1: CONP1, + con: Con, + conp0: Conp0, + conp1: Conp1, } impl RegisterBlock { #[doc = "0x00 - EtherCAT 0 Control"] #[inline(always)] - pub const fn con(&self) -> &CON { + pub const fn con(&self) -> &Con { &self.con } #[doc = "0x04 - EtherCAT 0 Port 1 Control Register"] #[inline(always)] - pub const fn conp0(&self) -> &CONP0 { + pub const fn conp0(&self) -> &Conp0 { &self.conp0 } #[doc = "0x08 - EtherCAT 0 Port 1 Control Register"] #[inline(always)] - pub const fn conp1(&self) -> &CONP1 { + pub const fn conp1(&self) -> &Conp1 { &self.conp1 } } #[doc = "CON (rw) register accessor: EtherCAT 0 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`con::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`con::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@con`] module"] -pub type CON = crate::Reg; +#[doc(alias = "CON")] +pub type Con = crate::Reg; #[doc = "EtherCAT 0 Control"] #[path = "ecat0_con/con_.rs"] pub mod con; #[doc = "CONP0 (rw) register accessor: EtherCAT 0 Port 1 Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conp0`] module"] -pub type CONP0 = crate::Reg; +#[doc(alias = "CONP0")] +pub type Conp0 = crate::Reg; #[doc = "EtherCAT 0 Port 1 Control Register"] pub mod conp0; #[doc = "CONP1 (rw) register accessor: EtherCAT 0 Port 1 Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conp1`] module"] -pub type CONP1 = crate::Reg; +#[doc(alias = "CONP1")] +pub type Conp1 = crate::Reg; #[doc = "EtherCAT 0 Port 1 Control Register"] pub mod conp1; diff --git a/src/ecat0_con/con_.rs b/src/ecat0_con/con_.rs index 060bf375..53f02510 100644 --- a/src/ecat0_con/con_.rs +++ b/src/ecat0_con/con_.rs @@ -1,120 +1,120 @@ #[doc = "Register `CON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CON` writer"] -pub type W = crate::W; -#[doc = "Field `ECATRSTEN` reader - Enable EtherCAT Reset Request"] -pub type ECATRSTEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable EtherCAT Reset Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECATRSTEN_A { +pub enum Ecatrsten { #[doc = "0: Reset request by EtherCAT Master disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset request by EtherCAT Master enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECATRSTEN_A) -> Self { + fn from(variant: Ecatrsten) -> Self { variant as u8 != 0 } } -impl ECATRSTEN_R { +#[doc = "Field `ECATRSTEN` reader - Enable EtherCAT Reset Request"] +pub type EcatrstenR = crate::BitReader; +impl EcatrstenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECATRSTEN_A { + pub const fn variant(&self) -> Ecatrsten { match self.bits { - false => ECATRSTEN_A::VALUE1, - true => ECATRSTEN_A::VALUE2, + false => Ecatrsten::Value1, + true => Ecatrsten::Value2, } } #[doc = "Reset request by EtherCAT Master disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECATRSTEN_A::VALUE1 + *self == Ecatrsten::Value1 } #[doc = "Reset request by EtherCAT Master enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECATRSTEN_A::VALUE2 + *self == Ecatrsten::Value2 } } #[doc = "Field `ECATRSTEN` writer - Enable EtherCAT Reset Request"] -pub type ECATRSTEN_W<'a, REG> = crate::BitWriter<'a, REG, ECATRSTEN_A>; -impl<'a, REG> ECATRSTEN_W<'a, REG> +pub type EcatrstenW<'a, REG> = crate::BitWriter<'a, REG, Ecatrsten>; +impl<'a, REG> EcatrstenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Reset request by EtherCAT Master disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECATRSTEN_A::VALUE1) + self.variant(Ecatrsten::Value1) } #[doc = "Reset request by EtherCAT Master enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECATRSTEN_A::VALUE2) + self.variant(Ecatrsten::Value2) } } -#[doc = "Field `LATCHIN0SEL` reader - LATCHIN0 Input Select"] -pub type LATCHIN0SEL_R = crate::FieldReader; #[doc = "LATCHIN0 Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LATCHIN0SEL_A { +pub enum Latchin0sel { #[doc = "0: Data input LATCHIN0A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input LATCHIN0B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input LATCHIN0C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input LATCHIN0D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LATCHIN0SEL_A) -> Self { + fn from(variant: Latchin0sel) -> Self { variant as _ } } -impl crate::FieldSpec for LATCHIN0SEL_A { +impl crate::FieldSpec for Latchin0sel { type Ux = u8; } -impl LATCHIN0SEL_R { +#[doc = "Field `LATCHIN0SEL` reader - LATCHIN0 Input Select"] +pub type Latchin0selR = crate::FieldReader; +impl Latchin0selR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LATCHIN0SEL_A { + pub const fn variant(&self) -> Latchin0sel { match self.bits { - 0 => LATCHIN0SEL_A::VALUE1, - 1 => LATCHIN0SEL_A::VALUE2, - 2 => LATCHIN0SEL_A::VALUE3, - 3 => LATCHIN0SEL_A::VALUE4, + 0 => Latchin0sel::Value1, + 1 => Latchin0sel::Value2, + 2 => Latchin0sel::Value3, + 3 => Latchin0sel::Value4, _ => unreachable!(), } } #[doc = "Data input LATCHIN0A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LATCHIN0SEL_A::VALUE1 + *self == Latchin0sel::Value1 } #[doc = "Data input LATCHIN0B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LATCHIN0SEL_A::VALUE2 + *self == Latchin0sel::Value2 } #[doc = "Data input LATCHIN0C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LATCHIN0SEL_A::VALUE3 + *self == Latchin0sel::Value3 } #[doc = "Data input LATCHIN0D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LATCHIN0SEL_A::VALUE4 + *self == Latchin0sel::Value4 } } #[doc = "Field `LATCHIN0SEL` writer - LATCHIN0 Input Select"] -pub type LATCHIN0SEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LATCHIN0SEL_A>; -impl<'a, REG> LATCHIN0SEL_W<'a, REG> +pub type Latchin0selW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Latchin0sel>; +impl<'a, REG> Latchin0selW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -122,86 +122,86 @@ where #[doc = "Data input LATCHIN0A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LATCHIN0SEL_A::VALUE1) + self.variant(Latchin0sel::Value1) } #[doc = "Data input LATCHIN0B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LATCHIN0SEL_A::VALUE2) + self.variant(Latchin0sel::Value2) } #[doc = "Data input LATCHIN0C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LATCHIN0SEL_A::VALUE3) + self.variant(Latchin0sel::Value3) } #[doc = "Data input LATCHIN0D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LATCHIN0SEL_A::VALUE4) + self.variant(Latchin0sel::Value4) } } #[doc = "Field `LATCHIN0` reader - EtherCAT LATCH_IN0 Input Signal"] -pub type LATCHIN0_R = crate::BitReader; -#[doc = "Field `LATCHIN1SEL` reader - LATCHIN1 Input Select"] -pub type LATCHIN1SEL_R = crate::FieldReader; +pub type Latchin0R = crate::BitReader; #[doc = "LATCHIN1 Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LATCHIN1SEL_A { +pub enum Latchin1sel { #[doc = "0: Data input LATCHIN1A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input LATCHIN1B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input LATCHIN1C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input LATCHIN1D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LATCHIN1SEL_A) -> Self { + fn from(variant: Latchin1sel) -> Self { variant as _ } } -impl crate::FieldSpec for LATCHIN1SEL_A { +impl crate::FieldSpec for Latchin1sel { type Ux = u8; } -impl LATCHIN1SEL_R { +#[doc = "Field `LATCHIN1SEL` reader - LATCHIN1 Input Select"] +pub type Latchin1selR = crate::FieldReader; +impl Latchin1selR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LATCHIN1SEL_A { + pub const fn variant(&self) -> Latchin1sel { match self.bits { - 0 => LATCHIN1SEL_A::VALUE1, - 1 => LATCHIN1SEL_A::VALUE2, - 2 => LATCHIN1SEL_A::VALUE3, - 3 => LATCHIN1SEL_A::VALUE4, + 0 => Latchin1sel::Value1, + 1 => Latchin1sel::Value2, + 2 => Latchin1sel::Value3, + 3 => Latchin1sel::Value4, _ => unreachable!(), } } #[doc = "Data input LATCHIN1A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LATCHIN1SEL_A::VALUE1 + *self == Latchin1sel::Value1 } #[doc = "Data input LATCHIN1B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LATCHIN1SEL_A::VALUE2 + *self == Latchin1sel::Value2 } #[doc = "Data input LATCHIN1C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LATCHIN1SEL_A::VALUE3 + *self == Latchin1sel::Value3 } #[doc = "Data input LATCHIN1D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LATCHIN1SEL_A::VALUE4 + *self == Latchin1sel::Value4 } } #[doc = "Field `LATCHIN1SEL` writer - LATCHIN1 Input Select"] -pub type LATCHIN1SEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LATCHIN1SEL_A>; -impl<'a, REG> LATCHIN1SEL_W<'a, REG> +pub type Latchin1selW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Latchin1sel>; +impl<'a, REG> Latchin1selW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -209,90 +209,90 @@ where #[doc = "Data input LATCHIN1A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LATCHIN1SEL_A::VALUE1) + self.variant(Latchin1sel::Value1) } #[doc = "Data input LATCHIN1B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LATCHIN1SEL_A::VALUE2) + self.variant(Latchin1sel::Value2) } #[doc = "Data input LATCHIN1C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LATCHIN1SEL_A::VALUE3) + self.variant(Latchin1sel::Value3) } #[doc = "Data input LATCHIN1D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LATCHIN1SEL_A::VALUE4) + self.variant(Latchin1sel::Value4) } } #[doc = "Field `LATCHIN1` reader - EtherCAT LATCH_IN1 Input Signal"] -pub type LATCHIN1_R = crate::BitReader; +pub type Latchin1R = crate::BitReader; #[doc = "Field `PHYOFFSET` reader - Ethernet PHY Address Offset"] -pub type PHYOFFSET_R = crate::FieldReader; +pub type PhyoffsetR = crate::FieldReader; #[doc = "Field `PHYOFFSET` writer - Ethernet PHY Address Offset"] -pub type PHYOFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `MDIO` reader - MDIO Input Select"] -pub type MDIO_R = crate::FieldReader; +pub type PhyoffsetW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "MDIO Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MDIO_A { +pub enum Mdio { #[doc = "0: Data input MDIA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input MDIB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input MDIC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input MDID is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MDIO_A) -> Self { + fn from(variant: Mdio) -> Self { variant as _ } } -impl crate::FieldSpec for MDIO_A { +impl crate::FieldSpec for Mdio { type Ux = u8; } -impl MDIO_R { +#[doc = "Field `MDIO` reader - MDIO Input Select"] +pub type MdioR = crate::FieldReader; +impl MdioR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MDIO_A { + pub const fn variant(&self) -> Mdio { match self.bits { - 0 => MDIO_A::VALUE1, - 1 => MDIO_A::VALUE2, - 2 => MDIO_A::VALUE3, - 3 => MDIO_A::VALUE4, + 0 => Mdio::Value1, + 1 => Mdio::Value2, + 2 => Mdio::Value3, + 3 => Mdio::Value4, _ => unreachable!(), } } #[doc = "Data input MDIA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MDIO_A::VALUE1 + *self == Mdio::Value1 } #[doc = "Data input MDIB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MDIO_A::VALUE2 + *self == Mdio::Value2 } #[doc = "Data input MDIC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MDIO_A::VALUE3 + *self == Mdio::Value3 } #[doc = "Data input MDID is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MDIO_A::VALUE4 + *self == Mdio::Value4 } } #[doc = "Field `MDIO` writer - MDIO Input Select"] -pub type MDIO_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MDIO_A>; -impl<'a, REG> MDIO_W<'a, REG> +pub type MdioW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Mdio>; +impl<'a, REG> MdioW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -300,116 +300,107 @@ where #[doc = "Data input MDIA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE1) + self.variant(Mdio::Value1) } #[doc = "Data input MDIB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE2) + self.variant(Mdio::Value2) } #[doc = "Data input MDIC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE3) + self.variant(Mdio::Value3) } #[doc = "Data input MDID is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE4) + self.variant(Mdio::Value4) } } impl R { #[doc = "Bit 0 - Enable EtherCAT Reset Request"] #[inline(always)] - pub fn ecatrsten(&self) -> ECATRSTEN_R { - ECATRSTEN_R::new((self.bits & 1) != 0) + pub fn ecatrsten(&self) -> EcatrstenR { + EcatrstenR::new((self.bits & 1) != 0) } #[doc = "Bits 8:9 - LATCHIN0 Input Select"] #[inline(always)] - pub fn latchin0sel(&self) -> LATCHIN0SEL_R { - LATCHIN0SEL_R::new(((self.bits >> 8) & 3) as u8) + pub fn latchin0sel(&self) -> Latchin0selR { + Latchin0selR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 11 - EtherCAT LATCH_IN0 Input Signal"] #[inline(always)] - pub fn latchin0(&self) -> LATCHIN0_R { - LATCHIN0_R::new(((self.bits >> 11) & 1) != 0) + pub fn latchin0(&self) -> Latchin0R { + Latchin0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - LATCHIN1 Input Select"] #[inline(always)] - pub fn latchin1sel(&self) -> LATCHIN1SEL_R { - LATCHIN1SEL_R::new(((self.bits >> 12) & 3) as u8) + pub fn latchin1sel(&self) -> Latchin1selR { + Latchin1selR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 15 - EtherCAT LATCH_IN1 Input Signal"] #[inline(always)] - pub fn latchin1(&self) -> LATCHIN1_R { - LATCHIN1_R::new(((self.bits >> 15) & 1) != 0) + pub fn latchin1(&self) -> Latchin1R { + Latchin1R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Ethernet PHY Address Offset"] #[inline(always)] - pub fn phyoffset(&self) -> PHYOFFSET_R { - PHYOFFSET_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn phyoffset(&self) -> PhyoffsetR { + PhyoffsetR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 22:23 - MDIO Input Select"] #[inline(always)] - pub fn mdio(&self) -> MDIO_R { - MDIO_R::new(((self.bits >> 22) & 3) as u8) + pub fn mdio(&self) -> MdioR { + MdioR::new(((self.bits >> 22) & 3) as u8) } } impl W { #[doc = "Bit 0 - Enable EtherCAT Reset Request"] #[inline(always)] #[must_use] - pub fn ecatrsten(&mut self) -> ECATRSTEN_W { - ECATRSTEN_W::new(self, 0) + pub fn ecatrsten(&mut self) -> EcatrstenW { + EcatrstenW::new(self, 0) } #[doc = "Bits 8:9 - LATCHIN0 Input Select"] #[inline(always)] #[must_use] - pub fn latchin0sel(&mut self) -> LATCHIN0SEL_W { - LATCHIN0SEL_W::new(self, 8) + pub fn latchin0sel(&mut self) -> Latchin0selW { + Latchin0selW::new(self, 8) } #[doc = "Bits 12:13 - LATCHIN1 Input Select"] #[inline(always)] #[must_use] - pub fn latchin1sel(&mut self) -> LATCHIN1SEL_W { - LATCHIN1SEL_W::new(self, 12) + pub fn latchin1sel(&mut self) -> Latchin1selW { + Latchin1selW::new(self, 12) } #[doc = "Bits 16:20 - Ethernet PHY Address Offset"] #[inline(always)] #[must_use] - pub fn phyoffset(&mut self) -> PHYOFFSET_W { - PHYOFFSET_W::new(self, 16) + pub fn phyoffset(&mut self) -> PhyoffsetW { + PhyoffsetW::new(self, 16) } #[doc = "Bits 22:23 - MDIO Input Select"] #[inline(always)] #[must_use] - pub fn mdio(&mut self) -> MDIO_W { - MDIO_W::new(self, 22) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mdio(&mut self) -> MdioW { + MdioW::new(self, 22) } } #[doc = "EtherCAT 0 Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`con::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`con::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CON_SPEC; -impl crate::RegisterSpec for CON_SPEC { +pub struct ConSpec; +impl crate::RegisterSpec for ConSpec { type Ux = u32; } #[doc = "`read()` method returns [`con::R`](R) reader structure"] -impl crate::Readable for CON_SPEC {} +impl crate::Readable for ConSpec {} #[doc = "`write(|w| ..)` method takes [`con::W`](W) writer structure"] -impl crate::Writable for CON_SPEC { +impl crate::Writable for ConSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CON to value 0"] -impl crate::Resettable for CON_SPEC { +impl crate::Resettable for ConSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0_con/conp0.rs b/src/ecat0_con/conp0.rs index 62234ed2..8d239641 100644 --- a/src/ecat0_con/conp0.rs +++ b/src/ecat0_con/conp0.rs @@ -1,67 +1,67 @@ #[doc = "Register `CONP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CONP0` writer"] -pub type W = crate::W; -#[doc = "Field `RXD0` reader - PORT0 Receive Input 0 Select"] -pub type RXD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "PORT0 Receive Input 0 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD0_A { +pub enum Rxd0 { #[doc = "0: Data input RXD0A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD0B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD0C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD0D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD0_A) -> Self { + fn from(variant: Rxd0) -> Self { variant as _ } } -impl crate::FieldSpec for RXD0_A { +impl crate::FieldSpec for Rxd0 { type Ux = u8; } -impl RXD0_R { +#[doc = "Field `RXD0` reader - PORT0 Receive Input 0 Select"] +pub type Rxd0R = crate::FieldReader; +impl Rxd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD0_A { + pub const fn variant(&self) -> Rxd0 { match self.bits { - 0 => RXD0_A::VALUE1, - 1 => RXD0_A::VALUE2, - 2 => RXD0_A::VALUE3, - 3 => RXD0_A::VALUE4, + 0 => Rxd0::Value1, + 1 => Rxd0::Value2, + 2 => Rxd0::Value3, + 3 => Rxd0::Value4, _ => unreachable!(), } } #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD0_A::VALUE1 + *self == Rxd0::Value1 } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD0_A::VALUE2 + *self == Rxd0::Value2 } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD0_A::VALUE3 + *self == Rxd0::Value3 } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD0_A::VALUE4 + *self == Rxd0::Value4 } } #[doc = "Field `RXD0` writer - PORT0 Receive Input 0 Select"] -pub type RXD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD0_A>; -impl<'a, REG> RXD0_W<'a, REG> +pub type Rxd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd0>; +impl<'a, REG> Rxd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE1) + self.variant(Rxd0::Value1) } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE2) + self.variant(Rxd0::Value2) } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE3) + self.variant(Rxd0::Value3) } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE4) + self.variant(Rxd0::Value4) } } -#[doc = "Field `RXD1` reader - Port0 Receive Input 1 Select"] -pub type RXD1_R = crate::FieldReader; #[doc = "Port0 Receive Input 1 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD1_A { +pub enum Rxd1 { #[doc = "0: Data input RXD1A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD1B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD1C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD1D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD1_A) -> Self { + fn from(variant: Rxd1) -> Self { variant as _ } } -impl crate::FieldSpec for RXD1_A { +impl crate::FieldSpec for Rxd1 { type Ux = u8; } -impl RXD1_R { +#[doc = "Field `RXD1` reader - Port0 Receive Input 1 Select"] +pub type Rxd1R = crate::FieldReader; +impl Rxd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD1_A { + pub const fn variant(&self) -> Rxd1 { match self.bits { - 0 => RXD1_A::VALUE1, - 1 => RXD1_A::VALUE2, - 2 => RXD1_A::VALUE3, - 3 => RXD1_A::VALUE4, + 0 => Rxd1::Value1, + 1 => Rxd1::Value2, + 2 => Rxd1::Value3, + 3 => Rxd1::Value4, _ => unreachable!(), } } #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD1_A::VALUE1 + *self == Rxd1::Value1 } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD1_A::VALUE2 + *self == Rxd1::Value2 } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD1_A::VALUE3 + *self == Rxd1::Value3 } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD1_A::VALUE4 + *self == Rxd1::Value4 } } #[doc = "Field `RXD1` writer - Port0 Receive Input 1 Select"] -pub type RXD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD1_A>; -impl<'a, REG> RXD1_W<'a, REG> +pub type Rxd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd1>; +impl<'a, REG> Rxd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE1) + self.variant(Rxd1::Value1) } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE2) + self.variant(Rxd1::Value2) } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE3) + self.variant(Rxd1::Value3) } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE4) + self.variant(Rxd1::Value4) } } -#[doc = "Field `RXD2` reader - Port0 Receive Input 2 Select"] -pub type RXD2_R = crate::FieldReader; #[doc = "Port0 Receive Input 2 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD2_A { +pub enum Rxd2 { #[doc = "0: Data input RXD2A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD2B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD2C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD2D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD2_A) -> Self { + fn from(variant: Rxd2) -> Self { variant as _ } } -impl crate::FieldSpec for RXD2_A { +impl crate::FieldSpec for Rxd2 { type Ux = u8; } -impl RXD2_R { +#[doc = "Field `RXD2` reader - Port0 Receive Input 2 Select"] +pub type Rxd2R = crate::FieldReader; +impl Rxd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD2_A { + pub const fn variant(&self) -> Rxd2 { match self.bits { - 0 => RXD2_A::VALUE1, - 1 => RXD2_A::VALUE2, - 2 => RXD2_A::VALUE3, - 3 => RXD2_A::VALUE4, + 0 => Rxd2::Value1, + 1 => Rxd2::Value2, + 2 => Rxd2::Value3, + 3 => Rxd2::Value4, _ => unreachable!(), } } #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD2_A::VALUE1 + *self == Rxd2::Value1 } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD2_A::VALUE2 + *self == Rxd2::Value2 } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD2_A::VALUE3 + *self == Rxd2::Value3 } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD2_A::VALUE4 + *self == Rxd2::Value4 } } #[doc = "Field `RXD2` writer - Port0 Receive Input 2 Select"] -pub type RXD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD2_A>; -impl<'a, REG> RXD2_W<'a, REG> +pub type Rxd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd2>; +impl<'a, REG> Rxd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE1) + self.variant(Rxd2::Value1) } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE2) + self.variant(Rxd2::Value2) } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE3) + self.variant(Rxd2::Value3) } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE4) + self.variant(Rxd2::Value4) } } -#[doc = "Field `RXD3` reader - Port0 Receive Input 3 Select"] -pub type RXD3_R = crate::FieldReader; #[doc = "Port0 Receive Input 3 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD3_A { +pub enum Rxd3 { #[doc = "0: Data input RXD3A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD3B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD3C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD3D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD3_A) -> Self { + fn from(variant: Rxd3) -> Self { variant as _ } } -impl crate::FieldSpec for RXD3_A { +impl crate::FieldSpec for Rxd3 { type Ux = u8; } -impl RXD3_R { +#[doc = "Field `RXD3` reader - Port0 Receive Input 3 Select"] +pub type Rxd3R = crate::FieldReader; +impl Rxd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD3_A { + pub const fn variant(&self) -> Rxd3 { match self.bits { - 0 => RXD3_A::VALUE1, - 1 => RXD3_A::VALUE2, - 2 => RXD3_A::VALUE3, - 3 => RXD3_A::VALUE4, + 0 => Rxd3::Value1, + 1 => Rxd3::Value2, + 2 => Rxd3::Value3, + 3 => Rxd3::Value4, _ => unreachable!(), } } #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD3_A::VALUE1 + *self == Rxd3::Value1 } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD3_A::VALUE2 + *self == Rxd3::Value2 } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD3_A::VALUE3 + *self == Rxd3::Value3 } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD3_A::VALUE4 + *self == Rxd3::Value4 } } #[doc = "Field `RXD3` writer - Port0 Receive Input 3 Select"] -pub type RXD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD3_A>; -impl<'a, REG> RXD3_W<'a, REG> +pub type Rxd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd3>; +impl<'a, REG> Rxd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE1) + self.variant(Rxd3::Value1) } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE2) + self.variant(Rxd3::Value2) } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE3) + self.variant(Rxd3::Value3) } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE4) + self.variant(Rxd3::Value4) } } -#[doc = "Field `RX_ERR` reader - Port0 MII RX ERROR Input Select"] -pub type RX_ERR_R = crate::FieldReader; #[doc = "Port0 MII RX ERROR Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_ERR_A { +pub enum RxErr { #[doc = "0: Data input RX_ERRA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RX_ERRB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RX_ERRC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RX_ERRD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_ERR_A) -> Self { + fn from(variant: RxErr) -> Self { variant as _ } } -impl crate::FieldSpec for RX_ERR_A { +impl crate::FieldSpec for RxErr { type Ux = u8; } -impl RX_ERR_R { +#[doc = "Field `RX_ERR` reader - Port0 MII RX ERROR Input Select"] +pub type RxErrR = crate::FieldReader; +impl RxErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_ERR_A { + pub const fn variant(&self) -> RxErr { match self.bits { - 0 => RX_ERR_A::VALUE1, - 1 => RX_ERR_A::VALUE2, - 2 => RX_ERR_A::VALUE3, - 3 => RX_ERR_A::VALUE4, + 0 => RxErr::Value1, + 1 => RxErr::Value2, + 2 => RxErr::Value3, + 3 => RxErr::Value4, _ => unreachable!(), } } #[doc = "Data input RX_ERRA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_ERR_A::VALUE1 + *self == RxErr::Value1 } #[doc = "Data input RX_ERRB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_ERR_A::VALUE2 + *self == RxErr::Value2 } #[doc = "Data input RX_ERRC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_ERR_A::VALUE3 + *self == RxErr::Value3 } #[doc = "Data input RX_ERRD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_ERR_A::VALUE4 + *self == RxErr::Value4 } } #[doc = "Field `RX_ERR` writer - Port0 MII RX ERROR Input Select"] -pub type RX_ERR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_ERR_A>; -impl<'a, REG> RX_ERR_W<'a, REG> +pub type RxErrW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxErr>; +impl<'a, REG> RxErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Data input RX_ERRA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE1) + self.variant(RxErr::Value1) } #[doc = "Data input RX_ERRB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE2) + self.variant(RxErr::Value2) } #[doc = "Data input RX_ERRC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE3) + self.variant(RxErr::Value3) } #[doc = "Data input RX_ERRD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE4) + self.variant(RxErr::Value4) } } -#[doc = "Field `RX_DV` reader - Port0 MII RX DV Input Select"] -pub type RX_DV_R = crate::FieldReader; #[doc = "Port0 MII RX DV Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_DV_A { +pub enum RxDv { #[doc = "0: Data input RX_DVA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RX_DVB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RX_DVC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RX_DVD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_DV_A) -> Self { + fn from(variant: RxDv) -> Self { variant as _ } } -impl crate::FieldSpec for RX_DV_A { +impl crate::FieldSpec for RxDv { type Ux = u8; } -impl RX_DV_R { +#[doc = "Field `RX_DV` reader - Port0 MII RX DV Input Select"] +pub type RxDvR = crate::FieldReader; +impl RxDvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_DV_A { + pub const fn variant(&self) -> RxDv { match self.bits { - 0 => RX_DV_A::VALUE1, - 1 => RX_DV_A::VALUE2, - 2 => RX_DV_A::VALUE3, - 3 => RX_DV_A::VALUE4, + 0 => RxDv::Value1, + 1 => RxDv::Value2, + 2 => RxDv::Value3, + 3 => RxDv::Value4, _ => unreachable!(), } } #[doc = "Data input RX_DVA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_DV_A::VALUE1 + *self == RxDv::Value1 } #[doc = "Data input RX_DVB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_DV_A::VALUE2 + *self == RxDv::Value2 } #[doc = "Data input RX_DVC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_DV_A::VALUE3 + *self == RxDv::Value3 } #[doc = "Data input RX_DVD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_DV_A::VALUE4 + *self == RxDv::Value4 } } #[doc = "Field `RX_DV` writer - Port0 MII RX DV Input Select"] -pub type RX_DV_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_DV_A>; -impl<'a, REG> RX_DV_W<'a, REG> +pub type RxDvW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxDv>; +impl<'a, REG> RxDvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Data input RX_DVA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE1) + self.variant(RxDv::Value1) } #[doc = "Data input RX_DVB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE2) + self.variant(RxDv::Value2) } #[doc = "Data input RX_DVC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE3) + self.variant(RxDv::Value3) } #[doc = "Data input RX_DVD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE4) + self.variant(RxDv::Value4) } } -#[doc = "Field `RX_CLK` reader - Port0 MII RX Clock Input Select"] -pub type RX_CLK_R = crate::FieldReader; #[doc = "Port0 MII RX Clock Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_CLK_A { +pub enum RxClk { #[doc = "0: Clock input RX_CLKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock input RX_CLKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clock input RX_CLKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Clock input RX_CLKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_CLK_A) -> Self { + fn from(variant: RxClk) -> Self { variant as _ } } -impl crate::FieldSpec for RX_CLK_A { +impl crate::FieldSpec for RxClk { type Ux = u8; } -impl RX_CLK_R { +#[doc = "Field `RX_CLK` reader - Port0 MII RX Clock Input Select"] +pub type RxClkR = crate::FieldReader; +impl RxClkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_CLK_A { + pub const fn variant(&self) -> RxClk { match self.bits { - 0 => RX_CLK_A::VALUE1, - 1 => RX_CLK_A::VALUE2, - 2 => RX_CLK_A::VALUE3, - 3 => RX_CLK_A::VALUE4, + 0 => RxClk::Value1, + 1 => RxClk::Value2, + 2 => RxClk::Value3, + 3 => RxClk::Value4, _ => unreachable!(), } } #[doc = "Clock input RX_CLKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_CLK_A::VALUE1 + *self == RxClk::Value1 } #[doc = "Clock input RX_CLKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_CLK_A::VALUE2 + *self == RxClk::Value2 } #[doc = "Clock input RX_CLKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_CLK_A::VALUE3 + *self == RxClk::Value3 } #[doc = "Clock input RX_CLKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_CLK_A::VALUE4 + *self == RxClk::Value4 } } #[doc = "Field `RX_CLK` writer - Port0 MII RX Clock Input Select"] -pub type RX_CLK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_CLK_A>; -impl<'a, REG> RX_CLK_W<'a, REG> +pub type RxClkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxClk>; +impl<'a, REG> RxClkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Clock input RX_CLKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE1) + self.variant(RxClk::Value1) } #[doc = "Clock input RX_CLKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE2) + self.variant(RxClk::Value2) } #[doc = "Clock input RX_CLKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE3) + self.variant(RxClk::Value3) } #[doc = "Clock input RX_CLKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE4) + self.variant(RxClk::Value4) } } -#[doc = "Field `LINK` reader - Port0 PHY Link Input Select"] -pub type LINK_R = crate::FieldReader; #[doc = "Port0 PHY Link Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LINK_A { +pub enum Link { #[doc = "0: PHY LINKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PHY LINKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: PHY LINKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: PHY LINKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LINK_A) -> Self { + fn from(variant: Link) -> Self { variant as _ } } -impl crate::FieldSpec for LINK_A { +impl crate::FieldSpec for Link { type Ux = u8; } -impl LINK_R { +#[doc = "Field `LINK` reader - Port0 PHY Link Input Select"] +pub type LinkR = crate::FieldReader; +impl LinkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_A { + pub const fn variant(&self) -> Link { match self.bits { - 0 => LINK_A::VALUE1, - 1 => LINK_A::VALUE2, - 2 => LINK_A::VALUE3, - 3 => LINK_A::VALUE4, + 0 => Link::Value1, + 1 => Link::Value2, + 2 => Link::Value3, + 3 => Link::Value4, _ => unreachable!(), } } #[doc = "PHY LINKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_A::VALUE1 + *self == Link::Value1 } #[doc = "PHY LINKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_A::VALUE2 + *self == Link::Value2 } #[doc = "PHY LINKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LINK_A::VALUE3 + *self == Link::Value3 } #[doc = "PHY LINKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LINK_A::VALUE4 + *self == Link::Value4 } } #[doc = "Field `LINK` writer - Port0 PHY Link Input Select"] -pub type LINK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LINK_A>; -impl<'a, REG> LINK_W<'a, REG> +pub type LinkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Link>; +impl<'a, REG> LinkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,84 +664,84 @@ where #[doc = "PHY LINKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE1) + self.variant(Link::Value1) } #[doc = "PHY LINKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE2) + self.variant(Link::Value2) } #[doc = "PHY LINKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE3) + self.variant(Link::Value3) } #[doc = "PHY LINKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE4) + self.variant(Link::Value4) } } -#[doc = "Field `TX_CLK` reader - Port0 MII TX Clock Input Select"] -pub type TX_CLK_R = crate::FieldReader; #[doc = "Port0 MII TX Clock Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TX_CLK_A { +pub enum TxClk { #[doc = "0: Clock input TX_CLKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock input TX_CLKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clock input TX_CLKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Clock input TX_CLKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TX_CLK_A) -> Self { + fn from(variant: TxClk) -> Self { variant as _ } } -impl crate::FieldSpec for TX_CLK_A { +impl crate::FieldSpec for TxClk { type Ux = u8; } -impl TX_CLK_R { +#[doc = "Field `TX_CLK` reader - Port0 MII TX Clock Input Select"] +pub type TxClkR = crate::FieldReader; +impl TxClkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_CLK_A { + pub const fn variant(&self) -> TxClk { match self.bits { - 0 => TX_CLK_A::VALUE1, - 1 => TX_CLK_A::VALUE2, - 2 => TX_CLK_A::VALUE3, - 3 => TX_CLK_A::VALUE4, + 0 => TxClk::Value1, + 1 => TxClk::Value2, + 2 => TxClk::Value3, + 3 => TxClk::Value4, _ => unreachable!(), } } #[doc = "Clock input TX_CLKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_CLK_A::VALUE1 + *self == TxClk::Value1 } #[doc = "Clock input TX_CLKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_CLK_A::VALUE2 + *self == TxClk::Value2 } #[doc = "Clock input TX_CLKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TX_CLK_A::VALUE3 + *self == TxClk::Value3 } #[doc = "Clock input TX_CLKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TX_CLK_A::VALUE4 + *self == TxClk::Value4 } } #[doc = "Field `TX_CLK` writer - Port0 MII TX Clock Input Select"] -pub type TX_CLK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TX_CLK_A>; -impl<'a, REG> TX_CLK_W<'a, REG> +pub type TxClkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TxClk>; +impl<'a, REG> TxClkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -749,84 +749,84 @@ where #[doc = "Clock input TX_CLKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE1) + self.variant(TxClk::Value1) } #[doc = "Clock input TX_CLKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE2) + self.variant(TxClk::Value2) } #[doc = "Clock input TX_CLKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE3) + self.variant(TxClk::Value3) } #[doc = "Clock input TX_CLKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE4) + self.variant(TxClk::Value4) } } -#[doc = "Field `TX_SHIFT` reader - Port0 Manual TX Shift configuration"] -pub type TX_SHIFT_R = crate::FieldReader; #[doc = "Port0 Manual TX Shift configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TX_SHIFT_A { +pub enum TxShift { #[doc = "0: 0 ns"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10 ns"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 20 ns"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 30 ns"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TX_SHIFT_A) -> Self { + fn from(variant: TxShift) -> Self { variant as _ } } -impl crate::FieldSpec for TX_SHIFT_A { +impl crate::FieldSpec for TxShift { type Ux = u8; } -impl TX_SHIFT_R { +#[doc = "Field `TX_SHIFT` reader - Port0 Manual TX Shift configuration"] +pub type TxShiftR = crate::FieldReader; +impl TxShiftR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_SHIFT_A { + pub const fn variant(&self) -> TxShift { match self.bits { - 0 => TX_SHIFT_A::VALUE1, - 1 => TX_SHIFT_A::VALUE2, - 2 => TX_SHIFT_A::VALUE3, - 3 => TX_SHIFT_A::VALUE4, + 0 => TxShift::Value1, + 1 => TxShift::Value2, + 2 => TxShift::Value3, + 3 => TxShift::Value4, _ => unreachable!(), } } #[doc = "0 ns"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_SHIFT_A::VALUE1 + *self == TxShift::Value1 } #[doc = "10 ns"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_SHIFT_A::VALUE2 + *self == TxShift::Value2 } #[doc = "20 ns"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TX_SHIFT_A::VALUE3 + *self == TxShift::Value3 } #[doc = "30 ns"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TX_SHIFT_A::VALUE4 + *self == TxShift::Value4 } } #[doc = "Field `TX_SHIFT` writer - Port0 Manual TX Shift configuration"] -pub type TX_SHIFT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TX_SHIFT_A>; -impl<'a, REG> TX_SHIFT_W<'a, REG> +pub type TxShiftW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TxShift>; +impl<'a, REG> TxShiftW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -834,161 +834,152 @@ where #[doc = "0 ns"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE1) + self.variant(TxShift::Value1) } #[doc = "10 ns"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE2) + self.variant(TxShift::Value2) } #[doc = "20 ns"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE3) + self.variant(TxShift::Value3) } #[doc = "30 ns"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE4) + self.variant(TxShift::Value4) } } impl R { #[doc = "Bits 0:1 - PORT0 Receive Input 0 Select"] #[inline(always)] - pub fn rxd0(&self) -> RXD0_R { - RXD0_R::new((self.bits & 3) as u8) + pub fn rxd0(&self) -> Rxd0R { + Rxd0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port0 Receive Input 1 Select"] #[inline(always)] - pub fn rxd1(&self) -> RXD1_R { - RXD1_R::new(((self.bits >> 2) & 3) as u8) + pub fn rxd1(&self) -> Rxd1R { + Rxd1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port0 Receive Input 2 Select"] #[inline(always)] - pub fn rxd2(&self) -> RXD2_R { - RXD2_R::new(((self.bits >> 4) & 3) as u8) + pub fn rxd2(&self) -> Rxd2R { + Rxd2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port0 Receive Input 3 Select"] #[inline(always)] - pub fn rxd3(&self) -> RXD3_R { - RXD3_R::new(((self.bits >> 6) & 3) as u8) + pub fn rxd3(&self) -> Rxd3R { + Rxd3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port0 MII RX ERROR Input Select"] #[inline(always)] - pub fn rx_err(&self) -> RX_ERR_R { - RX_ERR_R::new(((self.bits >> 8) & 3) as u8) + pub fn rx_err(&self) -> RxErrR { + RxErrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port0 MII RX DV Input Select"] #[inline(always)] - pub fn rx_dv(&self) -> RX_DV_R { - RX_DV_R::new(((self.bits >> 10) & 3) as u8) + pub fn rx_dv(&self) -> RxDvR { + RxDvR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port0 MII RX Clock Input Select"] #[inline(always)] - pub fn rx_clk(&self) -> RX_CLK_R { - RX_CLK_R::new(((self.bits >> 12) & 3) as u8) + pub fn rx_clk(&self) -> RxClkR { + RxClkR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - Port0 PHY Link Input Select"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 16) & 3) as u8) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 28:29 - Port0 MII TX Clock Input Select"] #[inline(always)] - pub fn tx_clk(&self) -> TX_CLK_R { - TX_CLK_R::new(((self.bits >> 28) & 3) as u8) + pub fn tx_clk(&self) -> TxClkR { + TxClkR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port0 Manual TX Shift configuration"] #[inline(always)] - pub fn tx_shift(&self) -> TX_SHIFT_R { - TX_SHIFT_R::new(((self.bits >> 30) & 3) as u8) + pub fn tx_shift(&self) -> TxShiftR { + TxShiftR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - PORT0 Receive Input 0 Select"] #[inline(always)] #[must_use] - pub fn rxd0(&mut self) -> RXD0_W { - RXD0_W::new(self, 0) + pub fn rxd0(&mut self) -> Rxd0W { + Rxd0W::new(self, 0) } #[doc = "Bits 2:3 - Port0 Receive Input 1 Select"] #[inline(always)] #[must_use] - pub fn rxd1(&mut self) -> RXD1_W { - RXD1_W::new(self, 2) + pub fn rxd1(&mut self) -> Rxd1W { + Rxd1W::new(self, 2) } #[doc = "Bits 4:5 - Port0 Receive Input 2 Select"] #[inline(always)] #[must_use] - pub fn rxd2(&mut self) -> RXD2_W { - RXD2_W::new(self, 4) + pub fn rxd2(&mut self) -> Rxd2W { + Rxd2W::new(self, 4) } #[doc = "Bits 6:7 - Port0 Receive Input 3 Select"] #[inline(always)] #[must_use] - pub fn rxd3(&mut self) -> RXD3_W { - RXD3_W::new(self, 6) + pub fn rxd3(&mut self) -> Rxd3W { + Rxd3W::new(self, 6) } #[doc = "Bits 8:9 - Port0 MII RX ERROR Input Select"] #[inline(always)] #[must_use] - pub fn rx_err(&mut self) -> RX_ERR_W { - RX_ERR_W::new(self, 8) + pub fn rx_err(&mut self) -> RxErrW { + RxErrW::new(self, 8) } #[doc = "Bits 10:11 - Port0 MII RX DV Input Select"] #[inline(always)] #[must_use] - pub fn rx_dv(&mut self) -> RX_DV_W { - RX_DV_W::new(self, 10) + pub fn rx_dv(&mut self) -> RxDvW { + RxDvW::new(self, 10) } #[doc = "Bits 12:13 - Port0 MII RX Clock Input Select"] #[inline(always)] #[must_use] - pub fn rx_clk(&mut self) -> RX_CLK_W { - RX_CLK_W::new(self, 12) + pub fn rx_clk(&mut self) -> RxClkW { + RxClkW::new(self, 12) } #[doc = "Bits 16:17 - Port0 PHY Link Input Select"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W { - LINK_W::new(self, 16) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 16) } #[doc = "Bits 28:29 - Port0 MII TX Clock Input Select"] #[inline(always)] #[must_use] - pub fn tx_clk(&mut self) -> TX_CLK_W { - TX_CLK_W::new(self, 28) + pub fn tx_clk(&mut self) -> TxClkW { + TxClkW::new(self, 28) } #[doc = "Bits 30:31 - Port0 Manual TX Shift configuration"] #[inline(always)] #[must_use] - pub fn tx_shift(&mut self) -> TX_SHIFT_W { - TX_SHIFT_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tx_shift(&mut self) -> TxShiftW { + TxShiftW::new(self, 30) } } #[doc = "EtherCAT 0 Port 1 Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CONP0_SPEC; -impl crate::RegisterSpec for CONP0_SPEC { +pub struct Conp0Spec; +impl crate::RegisterSpec for Conp0Spec { type Ux = u32; } #[doc = "`read()` method returns [`conp0::R`](R) reader structure"] -impl crate::Readable for CONP0_SPEC {} +impl crate::Readable for Conp0Spec {} #[doc = "`write(|w| ..)` method takes [`conp0::W`](W) writer structure"] -impl crate::Writable for CONP0_SPEC { +impl crate::Writable for Conp0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONP0 to value 0"] -impl crate::Resettable for CONP0_SPEC { +impl crate::Resettable for Conp0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0_con/conp1.rs b/src/ecat0_con/conp1.rs index 30eec4c9..39844bde 100644 --- a/src/ecat0_con/conp1.rs +++ b/src/ecat0_con/conp1.rs @@ -1,67 +1,67 @@ #[doc = "Register `CONP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CONP1` writer"] -pub type W = crate::W; -#[doc = "Field `RXD0` reader - Port1 Receive Input 0 Select"] -pub type RXD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port1 Receive Input 0 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD0_A { +pub enum Rxd0 { #[doc = "0: Data input RXD0A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD0B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD0C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD0D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD0_A) -> Self { + fn from(variant: Rxd0) -> Self { variant as _ } } -impl crate::FieldSpec for RXD0_A { +impl crate::FieldSpec for Rxd0 { type Ux = u8; } -impl RXD0_R { +#[doc = "Field `RXD0` reader - Port1 Receive Input 0 Select"] +pub type Rxd0R = crate::FieldReader; +impl Rxd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD0_A { + pub const fn variant(&self) -> Rxd0 { match self.bits { - 0 => RXD0_A::VALUE1, - 1 => RXD0_A::VALUE2, - 2 => RXD0_A::VALUE3, - 3 => RXD0_A::VALUE4, + 0 => Rxd0::Value1, + 1 => Rxd0::Value2, + 2 => Rxd0::Value3, + 3 => Rxd0::Value4, _ => unreachable!(), } } #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD0_A::VALUE1 + *self == Rxd0::Value1 } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD0_A::VALUE2 + *self == Rxd0::Value2 } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD0_A::VALUE3 + *self == Rxd0::Value3 } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD0_A::VALUE4 + *self == Rxd0::Value4 } } #[doc = "Field `RXD0` writer - Port1 Receive Input 0 Select"] -pub type RXD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD0_A>; -impl<'a, REG> RXD0_W<'a, REG> +pub type Rxd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd0>; +impl<'a, REG> Rxd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE1) + self.variant(Rxd0::Value1) } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE2) + self.variant(Rxd0::Value2) } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE3) + self.variant(Rxd0::Value3) } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE4) + self.variant(Rxd0::Value4) } } -#[doc = "Field `RXD1` reader - Port1 Receive Input 1 Select"] -pub type RXD1_R = crate::FieldReader; #[doc = "Port1 Receive Input 1 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD1_A { +pub enum Rxd1 { #[doc = "0: Data input RXD1A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD1B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD1C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD1D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD1_A) -> Self { + fn from(variant: Rxd1) -> Self { variant as _ } } -impl crate::FieldSpec for RXD1_A { +impl crate::FieldSpec for Rxd1 { type Ux = u8; } -impl RXD1_R { +#[doc = "Field `RXD1` reader - Port1 Receive Input 1 Select"] +pub type Rxd1R = crate::FieldReader; +impl Rxd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD1_A { + pub const fn variant(&self) -> Rxd1 { match self.bits { - 0 => RXD1_A::VALUE1, - 1 => RXD1_A::VALUE2, - 2 => RXD1_A::VALUE3, - 3 => RXD1_A::VALUE4, + 0 => Rxd1::Value1, + 1 => Rxd1::Value2, + 2 => Rxd1::Value3, + 3 => Rxd1::Value4, _ => unreachable!(), } } #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD1_A::VALUE1 + *self == Rxd1::Value1 } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD1_A::VALUE2 + *self == Rxd1::Value2 } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD1_A::VALUE3 + *self == Rxd1::Value3 } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD1_A::VALUE4 + *self == Rxd1::Value4 } } #[doc = "Field `RXD1` writer - Port1 Receive Input 1 Select"] -pub type RXD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD1_A>; -impl<'a, REG> RXD1_W<'a, REG> +pub type Rxd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd1>; +impl<'a, REG> Rxd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE1) + self.variant(Rxd1::Value1) } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE2) + self.variant(Rxd1::Value2) } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE3) + self.variant(Rxd1::Value3) } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE4) + self.variant(Rxd1::Value4) } } -#[doc = "Field `RXD2` reader - Port1 Receive Input 2 Select"] -pub type RXD2_R = crate::FieldReader; #[doc = "Port1 Receive Input 2 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD2_A { +pub enum Rxd2 { #[doc = "0: Data input RXD2A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD2B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD2C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD2D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD2_A) -> Self { + fn from(variant: Rxd2) -> Self { variant as _ } } -impl crate::FieldSpec for RXD2_A { +impl crate::FieldSpec for Rxd2 { type Ux = u8; } -impl RXD2_R { +#[doc = "Field `RXD2` reader - Port1 Receive Input 2 Select"] +pub type Rxd2R = crate::FieldReader; +impl Rxd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD2_A { + pub const fn variant(&self) -> Rxd2 { match self.bits { - 0 => RXD2_A::VALUE1, - 1 => RXD2_A::VALUE2, - 2 => RXD2_A::VALUE3, - 3 => RXD2_A::VALUE4, + 0 => Rxd2::Value1, + 1 => Rxd2::Value2, + 2 => Rxd2::Value3, + 3 => Rxd2::Value4, _ => unreachable!(), } } #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD2_A::VALUE1 + *self == Rxd2::Value1 } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD2_A::VALUE2 + *self == Rxd2::Value2 } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD2_A::VALUE3 + *self == Rxd2::Value3 } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD2_A::VALUE4 + *self == Rxd2::Value4 } } #[doc = "Field `RXD2` writer - Port1 Receive Input 2 Select"] -pub type RXD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD2_A>; -impl<'a, REG> RXD2_W<'a, REG> +pub type Rxd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd2>; +impl<'a, REG> Rxd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE1) + self.variant(Rxd2::Value1) } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE2) + self.variant(Rxd2::Value2) } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE3) + self.variant(Rxd2::Value3) } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE4) + self.variant(Rxd2::Value4) } } -#[doc = "Field `RXD3` reader - Port1 Receive Input 3 Select"] -pub type RXD3_R = crate::FieldReader; #[doc = "Port1 Receive Input 3 Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD3_A { +pub enum Rxd3 { #[doc = "0: Data input RXD3A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD3B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD3C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD3D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD3_A) -> Self { + fn from(variant: Rxd3) -> Self { variant as _ } } -impl crate::FieldSpec for RXD3_A { +impl crate::FieldSpec for Rxd3 { type Ux = u8; } -impl RXD3_R { +#[doc = "Field `RXD3` reader - Port1 Receive Input 3 Select"] +pub type Rxd3R = crate::FieldReader; +impl Rxd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD3_A { + pub const fn variant(&self) -> Rxd3 { match self.bits { - 0 => RXD3_A::VALUE1, - 1 => RXD3_A::VALUE2, - 2 => RXD3_A::VALUE3, - 3 => RXD3_A::VALUE4, + 0 => Rxd3::Value1, + 1 => Rxd3::Value2, + 2 => Rxd3::Value3, + 3 => Rxd3::Value4, _ => unreachable!(), } } #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD3_A::VALUE1 + *self == Rxd3::Value1 } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD3_A::VALUE2 + *self == Rxd3::Value2 } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD3_A::VALUE3 + *self == Rxd3::Value3 } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD3_A::VALUE4 + *self == Rxd3::Value4 } } #[doc = "Field `RXD3` writer - Port1 Receive Input 3 Select"] -pub type RXD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD3_A>; -impl<'a, REG> RXD3_W<'a, REG> +pub type Rxd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd3>; +impl<'a, REG> Rxd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE1) + self.variant(Rxd3::Value1) } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE2) + self.variant(Rxd3::Value2) } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE3) + self.variant(Rxd3::Value3) } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE4) + self.variant(Rxd3::Value4) } } -#[doc = "Field `RX_ERR` reader - Port1 MII RX ERROR Input Select"] -pub type RX_ERR_R = crate::FieldReader; #[doc = "Port1 MII RX ERROR Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_ERR_A { +pub enum RxErr { #[doc = "0: Data input RX_ERRA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RX_ERRB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RX_ERRC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RX_ERRD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_ERR_A) -> Self { + fn from(variant: RxErr) -> Self { variant as _ } } -impl crate::FieldSpec for RX_ERR_A { +impl crate::FieldSpec for RxErr { type Ux = u8; } -impl RX_ERR_R { +#[doc = "Field `RX_ERR` reader - Port1 MII RX ERROR Input Select"] +pub type RxErrR = crate::FieldReader; +impl RxErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_ERR_A { + pub const fn variant(&self) -> RxErr { match self.bits { - 0 => RX_ERR_A::VALUE1, - 1 => RX_ERR_A::VALUE2, - 2 => RX_ERR_A::VALUE3, - 3 => RX_ERR_A::VALUE4, + 0 => RxErr::Value1, + 1 => RxErr::Value2, + 2 => RxErr::Value3, + 3 => RxErr::Value4, _ => unreachable!(), } } #[doc = "Data input RX_ERRA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_ERR_A::VALUE1 + *self == RxErr::Value1 } #[doc = "Data input RX_ERRB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_ERR_A::VALUE2 + *self == RxErr::Value2 } #[doc = "Data input RX_ERRC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_ERR_A::VALUE3 + *self == RxErr::Value3 } #[doc = "Data input RX_ERRD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_ERR_A::VALUE4 + *self == RxErr::Value4 } } #[doc = "Field `RX_ERR` writer - Port1 MII RX ERROR Input Select"] -pub type RX_ERR_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_ERR_A>; -impl<'a, REG> RX_ERR_W<'a, REG> +pub type RxErrW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxErr>; +impl<'a, REG> RxErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Data input RX_ERRA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE1) + self.variant(RxErr::Value1) } #[doc = "Data input RX_ERRB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE2) + self.variant(RxErr::Value2) } #[doc = "Data input RX_ERRC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE3) + self.variant(RxErr::Value3) } #[doc = "Data input RX_ERRD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_ERR_A::VALUE4) + self.variant(RxErr::Value4) } } -#[doc = "Field `RX_DV` reader - Port1 MII RX DV Input Select"] -pub type RX_DV_R = crate::FieldReader; #[doc = "Port1 MII RX DV Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_DV_A { +pub enum RxDv { #[doc = "0: Data input RX_DVA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RX_DVB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RX_DVC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RX_DVD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_DV_A) -> Self { + fn from(variant: RxDv) -> Self { variant as _ } } -impl crate::FieldSpec for RX_DV_A { +impl crate::FieldSpec for RxDv { type Ux = u8; } -impl RX_DV_R { +#[doc = "Field `RX_DV` reader - Port1 MII RX DV Input Select"] +pub type RxDvR = crate::FieldReader; +impl RxDvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_DV_A { + pub const fn variant(&self) -> RxDv { match self.bits { - 0 => RX_DV_A::VALUE1, - 1 => RX_DV_A::VALUE2, - 2 => RX_DV_A::VALUE3, - 3 => RX_DV_A::VALUE4, + 0 => RxDv::Value1, + 1 => RxDv::Value2, + 2 => RxDv::Value3, + 3 => RxDv::Value4, _ => unreachable!(), } } #[doc = "Data input RX_DVA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_DV_A::VALUE1 + *self == RxDv::Value1 } #[doc = "Data input RX_DVB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_DV_A::VALUE2 + *self == RxDv::Value2 } #[doc = "Data input RX_DVC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_DV_A::VALUE3 + *self == RxDv::Value3 } #[doc = "Data input RX_DVD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_DV_A::VALUE4 + *self == RxDv::Value4 } } #[doc = "Field `RX_DV` writer - Port1 MII RX DV Input Select"] -pub type RX_DV_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_DV_A>; -impl<'a, REG> RX_DV_W<'a, REG> +pub type RxDvW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxDv>; +impl<'a, REG> RxDvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Data input RX_DVA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE1) + self.variant(RxDv::Value1) } #[doc = "Data input RX_DVB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE2) + self.variant(RxDv::Value2) } #[doc = "Data input RX_DVC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE3) + self.variant(RxDv::Value3) } #[doc = "Data input RX_DVD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_DV_A::VALUE4) + self.variant(RxDv::Value4) } } -#[doc = "Field `RX_CLK` reader - Port1 MII RX Clock Input Select"] -pub type RX_CLK_R = crate::FieldReader; #[doc = "Port1 MII RX Clock Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_CLK_A { +pub enum RxClk { #[doc = "0: Clock input RX_CLKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock input RX_CLKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clock input RX_CLKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Clock input RX_CLKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_CLK_A) -> Self { + fn from(variant: RxClk) -> Self { variant as _ } } -impl crate::FieldSpec for RX_CLK_A { +impl crate::FieldSpec for RxClk { type Ux = u8; } -impl RX_CLK_R { +#[doc = "Field `RX_CLK` reader - Port1 MII RX Clock Input Select"] +pub type RxClkR = crate::FieldReader; +impl RxClkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_CLK_A { + pub const fn variant(&self) -> RxClk { match self.bits { - 0 => RX_CLK_A::VALUE1, - 1 => RX_CLK_A::VALUE2, - 2 => RX_CLK_A::VALUE3, - 3 => RX_CLK_A::VALUE4, + 0 => RxClk::Value1, + 1 => RxClk::Value2, + 2 => RxClk::Value3, + 3 => RxClk::Value4, _ => unreachable!(), } } #[doc = "Clock input RX_CLKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_CLK_A::VALUE1 + *self == RxClk::Value1 } #[doc = "Clock input RX_CLKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_CLK_A::VALUE2 + *self == RxClk::Value2 } #[doc = "Clock input RX_CLKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_CLK_A::VALUE3 + *self == RxClk::Value3 } #[doc = "Clock input RX_CLKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_CLK_A::VALUE4 + *self == RxClk::Value4 } } #[doc = "Field `RX_CLK` writer - Port1 MII RX Clock Input Select"] -pub type RX_CLK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RX_CLK_A>; -impl<'a, REG> RX_CLK_W<'a, REG> +pub type RxClkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RxClk>; +impl<'a, REG> RxClkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Clock input RX_CLKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE1) + self.variant(RxClk::Value1) } #[doc = "Clock input RX_CLKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE2) + self.variant(RxClk::Value2) } #[doc = "Clock input RX_CLKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE3) + self.variant(RxClk::Value3) } #[doc = "Clock input RX_CLKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RX_CLK_A::VALUE4) + self.variant(RxClk::Value4) } } -#[doc = "Field `LINK` reader - Port1 PHY Link Input Select"] -pub type LINK_R = crate::FieldReader; #[doc = "Port1 PHY Link Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LINK_A { +pub enum Link { #[doc = "0: PHY LINKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PHY LINKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: PHY LINKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: PHY LINKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LINK_A) -> Self { + fn from(variant: Link) -> Self { variant as _ } } -impl crate::FieldSpec for LINK_A { +impl crate::FieldSpec for Link { type Ux = u8; } -impl LINK_R { +#[doc = "Field `LINK` reader - Port1 PHY Link Input Select"] +pub type LinkR = crate::FieldReader; +impl LinkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LINK_A { + pub const fn variant(&self) -> Link { match self.bits { - 0 => LINK_A::VALUE1, - 1 => LINK_A::VALUE2, - 2 => LINK_A::VALUE3, - 3 => LINK_A::VALUE4, + 0 => Link::Value1, + 1 => Link::Value2, + 2 => Link::Value3, + 3 => Link::Value4, _ => unreachable!(), } } #[doc = "PHY LINKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LINK_A::VALUE1 + *self == Link::Value1 } #[doc = "PHY LINKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LINK_A::VALUE2 + *self == Link::Value2 } #[doc = "PHY LINKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LINK_A::VALUE3 + *self == Link::Value3 } #[doc = "PHY LINKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LINK_A::VALUE4 + *self == Link::Value4 } } #[doc = "Field `LINK` writer - Port1 PHY Link Input Select"] -pub type LINK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, LINK_A>; -impl<'a, REG> LINK_W<'a, REG> +pub type LinkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Link>; +impl<'a, REG> LinkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,84 +664,84 @@ where #[doc = "PHY LINKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE1) + self.variant(Link::Value1) } #[doc = "PHY LINKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE2) + self.variant(Link::Value2) } #[doc = "PHY LINKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE3) + self.variant(Link::Value3) } #[doc = "PHY LINKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LINK_A::VALUE4) + self.variant(Link::Value4) } } -#[doc = "Field `TX_CLK` reader - Port1 MII TX Clock Input Select"] -pub type TX_CLK_R = crate::FieldReader; #[doc = "Port1 MII TX Clock Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TX_CLK_A { +pub enum TxClk { #[doc = "0: Clock input TX_CLKA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock input TX_CLKB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Clock input TX_CLKC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Clock input TX_CLKD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TX_CLK_A) -> Self { + fn from(variant: TxClk) -> Self { variant as _ } } -impl crate::FieldSpec for TX_CLK_A { +impl crate::FieldSpec for TxClk { type Ux = u8; } -impl TX_CLK_R { +#[doc = "Field `TX_CLK` reader - Port1 MII TX Clock Input Select"] +pub type TxClkR = crate::FieldReader; +impl TxClkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_CLK_A { + pub const fn variant(&self) -> TxClk { match self.bits { - 0 => TX_CLK_A::VALUE1, - 1 => TX_CLK_A::VALUE2, - 2 => TX_CLK_A::VALUE3, - 3 => TX_CLK_A::VALUE4, + 0 => TxClk::Value1, + 1 => TxClk::Value2, + 2 => TxClk::Value3, + 3 => TxClk::Value4, _ => unreachable!(), } } #[doc = "Clock input TX_CLKA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_CLK_A::VALUE1 + *self == TxClk::Value1 } #[doc = "Clock input TX_CLKB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_CLK_A::VALUE2 + *self == TxClk::Value2 } #[doc = "Clock input TX_CLKC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TX_CLK_A::VALUE3 + *self == TxClk::Value3 } #[doc = "Clock input TX_CLKD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TX_CLK_A::VALUE4 + *self == TxClk::Value4 } } #[doc = "Field `TX_CLK` writer - Port1 MII TX Clock Input Select"] -pub type TX_CLK_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TX_CLK_A>; -impl<'a, REG> TX_CLK_W<'a, REG> +pub type TxClkW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TxClk>; +impl<'a, REG> TxClkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -749,84 +749,84 @@ where #[doc = "Clock input TX_CLKA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE1) + self.variant(TxClk::Value1) } #[doc = "Clock input TX_CLKB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE2) + self.variant(TxClk::Value2) } #[doc = "Clock input TX_CLKC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE3) + self.variant(TxClk::Value3) } #[doc = "Clock input TX_CLKD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TX_CLK_A::VALUE4) + self.variant(TxClk::Value4) } } -#[doc = "Field `TX_SHIFT` reader - Port1 Manual TX Shift configuration"] -pub type TX_SHIFT_R = crate::FieldReader; #[doc = "Port1 Manual TX Shift configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TX_SHIFT_A { +pub enum TxShift { #[doc = "0: 0 ns"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10 ns"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 20 ns"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 30 ns"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TX_SHIFT_A) -> Self { + fn from(variant: TxShift) -> Self { variant as _ } } -impl crate::FieldSpec for TX_SHIFT_A { +impl crate::FieldSpec for TxShift { type Ux = u8; } -impl TX_SHIFT_R { +#[doc = "Field `TX_SHIFT` reader - Port1 Manual TX Shift configuration"] +pub type TxShiftR = crate::FieldReader; +impl TxShiftR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_SHIFT_A { + pub const fn variant(&self) -> TxShift { match self.bits { - 0 => TX_SHIFT_A::VALUE1, - 1 => TX_SHIFT_A::VALUE2, - 2 => TX_SHIFT_A::VALUE3, - 3 => TX_SHIFT_A::VALUE4, + 0 => TxShift::Value1, + 1 => TxShift::Value2, + 2 => TxShift::Value3, + 3 => TxShift::Value4, _ => unreachable!(), } } #[doc = "0 ns"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_SHIFT_A::VALUE1 + *self == TxShift::Value1 } #[doc = "10 ns"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_SHIFT_A::VALUE2 + *self == TxShift::Value2 } #[doc = "20 ns"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TX_SHIFT_A::VALUE3 + *self == TxShift::Value3 } #[doc = "30 ns"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TX_SHIFT_A::VALUE4 + *self == TxShift::Value4 } } #[doc = "Field `TX_SHIFT` writer - Port1 Manual TX Shift configuration"] -pub type TX_SHIFT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TX_SHIFT_A>; -impl<'a, REG> TX_SHIFT_W<'a, REG> +pub type TxShiftW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TxShift>; +impl<'a, REG> TxShiftW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -834,161 +834,152 @@ where #[doc = "0 ns"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE1) + self.variant(TxShift::Value1) } #[doc = "10 ns"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE2) + self.variant(TxShift::Value2) } #[doc = "20 ns"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE3) + self.variant(TxShift::Value3) } #[doc = "30 ns"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TX_SHIFT_A::VALUE4) + self.variant(TxShift::Value4) } } impl R { #[doc = "Bits 0:1 - Port1 Receive Input 0 Select"] #[inline(always)] - pub fn rxd0(&self) -> RXD0_R { - RXD0_R::new((self.bits & 3) as u8) + pub fn rxd0(&self) -> Rxd0R { + Rxd0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port1 Receive Input 1 Select"] #[inline(always)] - pub fn rxd1(&self) -> RXD1_R { - RXD1_R::new(((self.bits >> 2) & 3) as u8) + pub fn rxd1(&self) -> Rxd1R { + Rxd1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port1 Receive Input 2 Select"] #[inline(always)] - pub fn rxd2(&self) -> RXD2_R { - RXD2_R::new(((self.bits >> 4) & 3) as u8) + pub fn rxd2(&self) -> Rxd2R { + Rxd2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port1 Receive Input 3 Select"] #[inline(always)] - pub fn rxd3(&self) -> RXD3_R { - RXD3_R::new(((self.bits >> 6) & 3) as u8) + pub fn rxd3(&self) -> Rxd3R { + Rxd3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port1 MII RX ERROR Input Select"] #[inline(always)] - pub fn rx_err(&self) -> RX_ERR_R { - RX_ERR_R::new(((self.bits >> 8) & 3) as u8) + pub fn rx_err(&self) -> RxErrR { + RxErrR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port1 MII RX DV Input Select"] #[inline(always)] - pub fn rx_dv(&self) -> RX_DV_R { - RX_DV_R::new(((self.bits >> 10) & 3) as u8) + pub fn rx_dv(&self) -> RxDvR { + RxDvR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port1 MII RX Clock Input Select"] #[inline(always)] - pub fn rx_clk(&self) -> RX_CLK_R { - RX_CLK_R::new(((self.bits >> 12) & 3) as u8) + pub fn rx_clk(&self) -> RxClkR { + RxClkR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:17 - Port1 PHY Link Input Select"] #[inline(always)] - pub fn link(&self) -> LINK_R { - LINK_R::new(((self.bits >> 16) & 3) as u8) + pub fn link(&self) -> LinkR { + LinkR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 28:29 - Port1 MII TX Clock Input Select"] #[inline(always)] - pub fn tx_clk(&self) -> TX_CLK_R { - TX_CLK_R::new(((self.bits >> 28) & 3) as u8) + pub fn tx_clk(&self) -> TxClkR { + TxClkR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port1 Manual TX Shift configuration"] #[inline(always)] - pub fn tx_shift(&self) -> TX_SHIFT_R { - TX_SHIFT_R::new(((self.bits >> 30) & 3) as u8) + pub fn tx_shift(&self) -> TxShiftR { + TxShiftR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port1 Receive Input 0 Select"] #[inline(always)] #[must_use] - pub fn rxd0(&mut self) -> RXD0_W { - RXD0_W::new(self, 0) + pub fn rxd0(&mut self) -> Rxd0W { + Rxd0W::new(self, 0) } #[doc = "Bits 2:3 - Port1 Receive Input 1 Select"] #[inline(always)] #[must_use] - pub fn rxd1(&mut self) -> RXD1_W { - RXD1_W::new(self, 2) + pub fn rxd1(&mut self) -> Rxd1W { + Rxd1W::new(self, 2) } #[doc = "Bits 4:5 - Port1 Receive Input 2 Select"] #[inline(always)] #[must_use] - pub fn rxd2(&mut self) -> RXD2_W { - RXD2_W::new(self, 4) + pub fn rxd2(&mut self) -> Rxd2W { + Rxd2W::new(self, 4) } #[doc = "Bits 6:7 - Port1 Receive Input 3 Select"] #[inline(always)] #[must_use] - pub fn rxd3(&mut self) -> RXD3_W { - RXD3_W::new(self, 6) + pub fn rxd3(&mut self) -> Rxd3W { + Rxd3W::new(self, 6) } #[doc = "Bits 8:9 - Port1 MII RX ERROR Input Select"] #[inline(always)] #[must_use] - pub fn rx_err(&mut self) -> RX_ERR_W { - RX_ERR_W::new(self, 8) + pub fn rx_err(&mut self) -> RxErrW { + RxErrW::new(self, 8) } #[doc = "Bits 10:11 - Port1 MII RX DV Input Select"] #[inline(always)] #[must_use] - pub fn rx_dv(&mut self) -> RX_DV_W { - RX_DV_W::new(self, 10) + pub fn rx_dv(&mut self) -> RxDvW { + RxDvW::new(self, 10) } #[doc = "Bits 12:13 - Port1 MII RX Clock Input Select"] #[inline(always)] #[must_use] - pub fn rx_clk(&mut self) -> RX_CLK_W { - RX_CLK_W::new(self, 12) + pub fn rx_clk(&mut self) -> RxClkW { + RxClkW::new(self, 12) } #[doc = "Bits 16:17 - Port1 PHY Link Input Select"] #[inline(always)] #[must_use] - pub fn link(&mut self) -> LINK_W { - LINK_W::new(self, 16) + pub fn link(&mut self) -> LinkW { + LinkW::new(self, 16) } #[doc = "Bits 28:29 - Port1 MII TX Clock Input Select"] #[inline(always)] #[must_use] - pub fn tx_clk(&mut self) -> TX_CLK_W { - TX_CLK_W::new(self, 28) + pub fn tx_clk(&mut self) -> TxClkW { + TxClkW::new(self, 28) } #[doc = "Bits 30:31 - Port1 Manual TX Shift configuration"] #[inline(always)] #[must_use] - pub fn tx_shift(&mut self) -> TX_SHIFT_W { - TX_SHIFT_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tx_shift(&mut self) -> TxShiftW { + TxShiftW::new(self, 30) } } #[doc = "EtherCAT 0 Port 1 Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CONP1_SPEC; -impl crate::RegisterSpec for CONP1_SPEC { +pub struct Conp1Spec; +impl crate::RegisterSpec for Conp1Spec { type Ux = u32; } #[doc = "`read()` method returns [`conp1::R`](R) reader structure"] -impl crate::Readable for CONP1_SPEC {} +impl crate::Readable for Conp1Spec {} #[doc = "`write(|w| ..)` method takes [`conp1::W`](W) writer structure"] -impl crate::Writable for CONP1_SPEC { +impl crate::Writable for Conp1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CONP1 to value 0"] -impl crate::Resettable for CONP1_SPEC { +impl crate::Resettable for Conp1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0_fmmu0.rs b/src/ecat0_fmmu0.rs index cbcf2d19..49a4535a 100644 --- a/src/ecat0_fmmu0.rs +++ b/src/ecat0_fmmu0.rs @@ -1,94 +1,102 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - fmmu_l_start_adr: FMMU_L_START_ADR, - fmmu_len: FMMU_LEN, - fmmu_l_start_bit: FMMU_L_START_BIT, - fmmu_l_stop_bit: FMMU_L_STOP_BIT, - fmmu_p_start_adr: FMMU_P_START_ADR, - fmmu_p_start_bit: FMMU_P_START_BIT, - fmmu_type: FMMU_TYPE, - fmmu_act: FMMU_ACT, + fmmu_l_start_adr: FmmuLStartAdr, + fmmu_len: FmmuLen, + fmmu_l_start_bit: FmmuLStartBit, + fmmu_l_stop_bit: FmmuLStopBit, + fmmu_p_start_adr: FmmuPStartAdr, + fmmu_p_start_bit: FmmuPStartBit, + fmmu_type: FmmuType, + fmmu_act: FmmuAct, } impl RegisterBlock { #[doc = "0x00 - Logical Start address FMMU"] #[inline(always)] - pub const fn fmmu_l_start_adr(&self) -> &FMMU_L_START_ADR { + pub const fn fmmu_l_start_adr(&self) -> &FmmuLStartAdr { &self.fmmu_l_start_adr } #[doc = "0x04 - Length FMMU 0"] #[inline(always)] - pub const fn fmmu_len(&self) -> &FMMU_LEN { + pub const fn fmmu_len(&self) -> &FmmuLen { &self.fmmu_len } #[doc = "0x06 - Start bit FMMU 0 in logical address space"] #[inline(always)] - pub const fn fmmu_l_start_bit(&self) -> &FMMU_L_START_BIT { + pub const fn fmmu_l_start_bit(&self) -> &FmmuLStartBit { &self.fmmu_l_start_bit } #[doc = "0x07 - Stop bit FMMU 0 in logical address space"] #[inline(always)] - pub const fn fmmu_l_stop_bit(&self) -> &FMMU_L_STOP_BIT { + pub const fn fmmu_l_stop_bit(&self) -> &FmmuLStopBit { &self.fmmu_l_stop_bit } #[doc = "0x08 - Ph0sical Start address FMMU y"] #[inline(always)] - pub const fn fmmu_p_start_adr(&self) -> &FMMU_P_START_ADR { + pub const fn fmmu_p_start_adr(&self) -> &FmmuPStartAdr { &self.fmmu_p_start_adr } #[doc = "0x0a - Ph0sical Start bit FMMU y"] #[inline(always)] - pub const fn fmmu_p_start_bit(&self) -> &FMMU_P_START_BIT { + pub const fn fmmu_p_start_bit(&self) -> &FmmuPStartBit { &self.fmmu_p_start_bit } #[doc = "0x0b - T0pe FMMU y"] #[inline(always)] - pub const fn fmmu_type(&self) -> &FMMU_TYPE { + pub const fn fmmu_type(&self) -> &FmmuType { &self.fmmu_type } #[doc = "0x0c - Activate FMMU 0"] #[inline(always)] - pub const fn fmmu_act(&self) -> &FMMU_ACT { + pub const fn fmmu_act(&self) -> &FmmuAct { &self.fmmu_act } } #[doc = "FMMU_L_START_ADR (r) register accessor: Logical Start address FMMU\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_start_adr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_l_start_adr`] module"] -pub type FMMU_L_START_ADR = crate::Reg; +#[doc(alias = "FMMU_L_START_ADR")] +pub type FmmuLStartAdr = crate::Reg; #[doc = "Logical Start address FMMU"] pub mod fmmu_l_start_adr; #[doc = "FMMU_LEN (r) register accessor: Length FMMU 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_len::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_len`] module"] -pub type FMMU_LEN = crate::Reg; +#[doc(alias = "FMMU_LEN")] +pub type FmmuLen = crate::Reg; #[doc = "Length FMMU 0"] pub mod fmmu_len; #[doc = "FMMU_L_START_BIT (r) register accessor: Start bit FMMU 0 in logical address space\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_start_bit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_l_start_bit`] module"] -pub type FMMU_L_START_BIT = crate::Reg; +#[doc(alias = "FMMU_L_START_BIT")] +pub type FmmuLStartBit = crate::Reg; #[doc = "Start bit FMMU 0 in logical address space"] pub mod fmmu_l_start_bit; #[doc = "FMMU_L_STOP_BIT (r) register accessor: Stop bit FMMU 0 in logical address space\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_stop_bit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_l_stop_bit`] module"] -pub type FMMU_L_STOP_BIT = crate::Reg; +#[doc(alias = "FMMU_L_STOP_BIT")] +pub type FmmuLStopBit = crate::Reg; #[doc = "Stop bit FMMU 0 in logical address space"] pub mod fmmu_l_stop_bit; #[doc = "FMMU_P_START_ADR (r) register accessor: Ph0sical Start address FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_p_start_adr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_p_start_adr`] module"] -pub type FMMU_P_START_ADR = crate::Reg; +#[doc(alias = "FMMU_P_START_ADR")] +pub type FmmuPStartAdr = crate::Reg; #[doc = "Ph0sical Start address FMMU y"] pub mod fmmu_p_start_adr; #[doc = "FMMU_P_START_BIT (r) register accessor: Ph0sical Start bit FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_p_start_bit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_p_start_bit`] module"] -pub type FMMU_P_START_BIT = crate::Reg; +#[doc(alias = "FMMU_P_START_BIT")] +pub type FmmuPStartBit = crate::Reg; #[doc = "Ph0sical Start bit FMMU y"] pub mod fmmu_p_start_bit; #[doc = "FMMU_TYPE (r) register accessor: T0pe FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_type`] module"] -pub type FMMU_TYPE = crate::Reg; +#[doc(alias = "FMMU_TYPE")] +pub type FmmuType = crate::Reg; #[doc = "T0pe FMMU y"] pub mod fmmu_type; #[doc = "FMMU_ACT (r) register accessor: Activate FMMU 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_act::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmmu_act`] module"] -pub type FMMU_ACT = crate::Reg; +#[doc(alias = "FMMU_ACT")] +pub type FmmuAct = crate::Reg; #[doc = "Activate FMMU 0"] pub mod fmmu_act; diff --git a/src/ecat0_fmmu0/fmmu_act.rs b/src/ecat0_fmmu0/fmmu_act.rs index 0700843e..667d527f 100644 --- a/src/ecat0_fmmu0/fmmu_act.rs +++ b/src/ecat0_fmmu0/fmmu_act.rs @@ -1,56 +1,56 @@ #[doc = "Register `FMMU_ACT` reader"] -pub type R = crate::R; -#[doc = "Field `ACT` reader - FMMU Activation"] -pub type ACT_R = crate::BitReader; +pub type R = crate::R; #[doc = "FMMU Activation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACT_A { +pub enum Act { #[doc = "0: FMMU deactivated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FMMU activated. FMMU checks logical addressed blocks to be mapped according to mapping configured"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACT_A) -> Self { + fn from(variant: Act) -> Self { variant as u8 != 0 } } -impl ACT_R { +#[doc = "Field `ACT` reader - FMMU Activation"] +pub type ActR = crate::BitReader; +impl ActR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACT_A { + pub const fn variant(&self) -> Act { match self.bits { - false => ACT_A::VALUE1, - true => ACT_A::VALUE2, + false => Act::Value1, + true => Act::Value2, } } #[doc = "FMMU deactivated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACT_A::VALUE1 + *self == Act::Value1 } #[doc = "FMMU activated. FMMU checks logical addressed blocks to be mapped according to mapping configured"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACT_A::VALUE2 + *self == Act::Value2 } } impl R { #[doc = "Bit 0 - FMMU Activation"] #[inline(always)] - pub fn act(&self) -> ACT_R { - ACT_R::new((self.bits & 1) != 0) + pub fn act(&self) -> ActR { + ActR::new((self.bits & 1) != 0) } } #[doc = "Activate FMMU 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_act::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_ACT_SPEC; -impl crate::RegisterSpec for FMMU_ACT_SPEC { +pub struct FmmuActSpec; +impl crate::RegisterSpec for FmmuActSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_act::R`](R) reader structure"] -impl crate::Readable for FMMU_ACT_SPEC {} +impl crate::Readable for FmmuActSpec {} #[doc = "`reset()` method sets FMMU_ACT to value 0"] -impl crate::Resettable for FMMU_ACT_SPEC { +impl crate::Resettable for FmmuActSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_l_start_adr.rs b/src/ecat0_fmmu0/fmmu_l_start_adr.rs index 3aafada5..22f15161 100644 --- a/src/ecat0_fmmu0/fmmu_l_start_adr.rs +++ b/src/ecat0_fmmu0/fmmu_l_start_adr.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_L_START_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `L_START_ADDR` reader - Logical start address within the EtherCAT Address Space"] -pub type L_START_ADDR_R = crate::FieldReader; +pub type LStartAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Logical start address within the EtherCAT Address Space"] #[inline(always)] - pub fn l_start_addr(&self) -> L_START_ADDR_R { - L_START_ADDR_R::new(self.bits) + pub fn l_start_addr(&self) -> LStartAddrR { + LStartAddrR::new(self.bits) } } #[doc = "Logical Start address FMMU\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_start_adr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_L_START_ADR_SPEC; -impl crate::RegisterSpec for FMMU_L_START_ADR_SPEC { +pub struct FmmuLStartAdrSpec; +impl crate::RegisterSpec for FmmuLStartAdrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fmmu_l_start_adr::R`](R) reader structure"] -impl crate::Readable for FMMU_L_START_ADR_SPEC {} +impl crate::Readable for FmmuLStartAdrSpec {} #[doc = "`reset()` method sets FMMU_L_START_ADR to value 0"] -impl crate::Resettable for FMMU_L_START_ADR_SPEC { +impl crate::Resettable for FmmuLStartAdrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_l_start_bit.rs b/src/ecat0_fmmu0/fmmu_l_start_bit.rs index b317c6a3..196bd86c 100644 --- a/src/ecat0_fmmu0/fmmu_l_start_bit.rs +++ b/src/ecat0_fmmu0/fmmu_l_start_bit.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_L_START_BIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `L_START_BIT` reader - Logical starting bit that shall be mapped"] -pub type L_START_BIT_R = crate::FieldReader; +pub type LStartBitR = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Logical starting bit that shall be mapped"] #[inline(always)] - pub fn l_start_bit(&self) -> L_START_BIT_R { - L_START_BIT_R::new(self.bits & 7) + pub fn l_start_bit(&self) -> LStartBitR { + LStartBitR::new(self.bits & 7) } } #[doc = "Start bit FMMU 0 in logical address space\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_start_bit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_L_START_BIT_SPEC; -impl crate::RegisterSpec for FMMU_L_START_BIT_SPEC { +pub struct FmmuLStartBitSpec; +impl crate::RegisterSpec for FmmuLStartBitSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_l_start_bit::R`](R) reader structure"] -impl crate::Readable for FMMU_L_START_BIT_SPEC {} +impl crate::Readable for FmmuLStartBitSpec {} #[doc = "`reset()` method sets FMMU_L_START_BIT to value 0"] -impl crate::Resettable for FMMU_L_START_BIT_SPEC { +impl crate::Resettable for FmmuLStartBitSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_l_stop_bit.rs b/src/ecat0_fmmu0/fmmu_l_stop_bit.rs index 8940a783..d8ca4fc6 100644 --- a/src/ecat0_fmmu0/fmmu_l_stop_bit.rs +++ b/src/ecat0_fmmu0/fmmu_l_stop_bit.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_L_STOP_BIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `L_STOP_BIT` reader - Last logical bit that shall be mapped"] -pub type L_STOP_BIT_R = crate::FieldReader; +pub type LStopBitR = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Last logical bit that shall be mapped"] #[inline(always)] - pub fn l_stop_bit(&self) -> L_STOP_BIT_R { - L_STOP_BIT_R::new(self.bits & 7) + pub fn l_stop_bit(&self) -> LStopBitR { + LStopBitR::new(self.bits & 7) } } #[doc = "Stop bit FMMU 0 in logical address space\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_l_stop_bit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_L_STOP_BIT_SPEC; -impl crate::RegisterSpec for FMMU_L_STOP_BIT_SPEC { +pub struct FmmuLStopBitSpec; +impl crate::RegisterSpec for FmmuLStopBitSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_l_stop_bit::R`](R) reader structure"] -impl crate::Readable for FMMU_L_STOP_BIT_SPEC {} +impl crate::Readable for FmmuLStopBitSpec {} #[doc = "`reset()` method sets FMMU_L_STOP_BIT to value 0"] -impl crate::Resettable for FMMU_L_STOP_BIT_SPEC { +impl crate::Resettable for FmmuLStopBitSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_len.rs b/src/ecat0_fmmu0/fmmu_len.rs index f8d390fe..b45d195e 100644 --- a/src/ecat0_fmmu0/fmmu_len.rs +++ b/src/ecat0_fmmu0/fmmu_len.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_LEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `OFFSET` reader - Offset from the first logical FMMU Byte to the last FMMU Byte + 1"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Offset from the first logical FMMU Byte to the last FMMU Byte + 1"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(self.bits) + pub fn offset(&self) -> OffsetR { + OffsetR::new(self.bits) } } #[doc = "Length FMMU 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_len::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_LEN_SPEC; -impl crate::RegisterSpec for FMMU_LEN_SPEC { +pub struct FmmuLenSpec; +impl crate::RegisterSpec for FmmuLenSpec { type Ux = u16; } #[doc = "`read()` method returns [`fmmu_len::R`](R) reader structure"] -impl crate::Readable for FMMU_LEN_SPEC {} +impl crate::Readable for FmmuLenSpec {} #[doc = "`reset()` method sets FMMU_LEN to value 0"] -impl crate::Resettable for FMMU_LEN_SPEC { +impl crate::Resettable for FmmuLenSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_p_start_adr.rs b/src/ecat0_fmmu0/fmmu_p_start_adr.rs index d6e9a1f5..87c2ef22 100644 --- a/src/ecat0_fmmu0/fmmu_p_start_adr.rs +++ b/src/ecat0_fmmu0/fmmu_p_start_adr.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_P_START_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `P_START_ADDR` reader - Physical Start Address"] -pub type P_START_ADDR_R = crate::FieldReader; +pub type PStartAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Physical Start Address"] #[inline(always)] - pub fn p_start_addr(&self) -> P_START_ADDR_R { - P_START_ADDR_R::new(self.bits) + pub fn p_start_addr(&self) -> PStartAddrR { + PStartAddrR::new(self.bits) } } #[doc = "Ph0sical Start address FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_p_start_adr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_P_START_ADR_SPEC; -impl crate::RegisterSpec for FMMU_P_START_ADR_SPEC { +pub struct FmmuPStartAdrSpec; +impl crate::RegisterSpec for FmmuPStartAdrSpec { type Ux = u16; } #[doc = "`read()` method returns [`fmmu_p_start_adr::R`](R) reader structure"] -impl crate::Readable for FMMU_P_START_ADR_SPEC {} +impl crate::Readable for FmmuPStartAdrSpec {} #[doc = "`reset()` method sets FMMU_P_START_ADR to value 0"] -impl crate::Resettable for FMMU_P_START_ADR_SPEC { +impl crate::Resettable for FmmuPStartAdrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_p_start_bit.rs b/src/ecat0_fmmu0/fmmu_p_start_bit.rs index 372a2ef0..e0c42165 100644 --- a/src/ecat0_fmmu0/fmmu_p_start_bit.rs +++ b/src/ecat0_fmmu0/fmmu_p_start_bit.rs @@ -1,22 +1,22 @@ #[doc = "Register `FMMU_P_START_BIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `P_START_BIT` reader - Physical starting bit as target of logical start bit mapping"] -pub type P_START_BIT_R = crate::FieldReader; +pub type PStartBitR = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Physical starting bit as target of logical start bit mapping"] #[inline(always)] - pub fn p_start_bit(&self) -> P_START_BIT_R { - P_START_BIT_R::new(self.bits & 7) + pub fn p_start_bit(&self) -> PStartBitR { + PStartBitR::new(self.bits & 7) } } #[doc = "Ph0sical Start bit FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_p_start_bit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_P_START_BIT_SPEC; -impl crate::RegisterSpec for FMMU_P_START_BIT_SPEC { +pub struct FmmuPStartBitSpec; +impl crate::RegisterSpec for FmmuPStartBitSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_p_start_bit::R`](R) reader structure"] -impl crate::Readable for FMMU_P_START_BIT_SPEC {} +impl crate::Readable for FmmuPStartBitSpec {} #[doc = "`reset()` method sets FMMU_P_START_BIT to value 0"] -impl crate::Resettable for FMMU_P_START_BIT_SPEC { +impl crate::Resettable for FmmuPStartBitSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_fmmu0/fmmu_type.rs b/src/ecat0_fmmu0/fmmu_type.rs index 39ef64ef..e979f7c1 100644 --- a/src/ecat0_fmmu0/fmmu_type.rs +++ b/src/ecat0_fmmu0/fmmu_type.rs @@ -1,97 +1,97 @@ #[doc = "Register `FMMU_TYPE` reader"] -pub type R = crate::R; -#[doc = "Field `R_ACC` reader - Read Access"] -pub type R_ACC_R = crate::BitReader; +pub type R = crate::R; #[doc = "Read Access\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum R_ACC_A { +pub enum RAcc { #[doc = "0: Ignore mapping for read accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use mapping for read accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: R_ACC_A) -> Self { + fn from(variant: RAcc) -> Self { variant as u8 != 0 } } -impl R_ACC_R { +#[doc = "Field `R_ACC` reader - Read Access"] +pub type RAccR = crate::BitReader; +impl RAccR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> R_ACC_A { + pub const fn variant(&self) -> RAcc { match self.bits { - false => R_ACC_A::VALUE1, - true => R_ACC_A::VALUE2, + false => RAcc::Value1, + true => RAcc::Value2, } } #[doc = "Ignore mapping for read accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == R_ACC_A::VALUE1 + *self == RAcc::Value1 } #[doc = "Use mapping for read accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == R_ACC_A::VALUE2 + *self == RAcc::Value2 } } -#[doc = "Field `W_ACC` reader - Write Access"] -pub type W_ACC_R = crate::BitReader; #[doc = "Write Access\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum W_ACC_A { +pub enum WAcc { #[doc = "0: Ignore mapping for write accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use mapping for write accesses"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: W_ACC_A) -> Self { + fn from(variant: WAcc) -> Self { variant as u8 != 0 } } -impl W_ACC_R { +#[doc = "Field `W_ACC` reader - Write Access"] +pub type WAccR = crate::BitReader; +impl WAccR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> W_ACC_A { + pub const fn variant(&self) -> WAcc { match self.bits { - false => W_ACC_A::VALUE1, - true => W_ACC_A::VALUE2, + false => WAcc::Value1, + true => WAcc::Value2, } } #[doc = "Ignore mapping for write accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == W_ACC_A::VALUE1 + *self == WAcc::Value1 } #[doc = "Use mapping for write accesses"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == W_ACC_A::VALUE2 + *self == WAcc::Value2 } } impl R { #[doc = "Bit 0 - Read Access"] #[inline(always)] - pub fn r_acc(&self) -> R_ACC_R { - R_ACC_R::new((self.bits & 1) != 0) + pub fn r_acc(&self) -> RAccR { + RAccR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Write Access"] #[inline(always)] - pub fn w_acc(&self) -> W_ACC_R { - W_ACC_R::new(((self.bits >> 1) & 1) != 0) + pub fn w_acc(&self) -> WAccR { + WAccR::new(((self.bits >> 1) & 1) != 0) } } #[doc = "T0pe FMMU y\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmmu_type::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMMU_TYPE_SPEC; -impl crate::RegisterSpec for FMMU_TYPE_SPEC { +pub struct FmmuTypeSpec; +impl crate::RegisterSpec for FmmuTypeSpec { type Ux = u8; } #[doc = "`read()` method returns [`fmmu_type::R`](R) reader structure"] -impl crate::Readable for FMMU_TYPE_SPEC {} +impl crate::Readable for FmmuTypeSpec {} #[doc = "`reset()` method sets FMMU_TYPE to value 0"] -impl crate::Resettable for FMMU_TYPE_SPEC { +impl crate::Resettable for FmmuTypeSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_sm0.rs b/src/ecat0_sm0.rs index ec000847..2041816c 100644 --- a/src/ecat0_sm0.rs +++ b/src/ecat0_sm0.rs @@ -1,72 +1,78 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sm_p_start_adr: SM_P_START_ADR, - sm_len: SM_LEN, - sm_control: SM_CONTROL, - sm_status: SM_STATUS, - sm_act: SM_ACT, - sm_pdi_ctr: SM_PDI_CTR, + sm_p_start_adr: SmPStartAdr, + sm_len: SmLen, + sm_control: SmControl, + sm_status: SmStatus, + sm_act: SmAct, + sm_pdi_ctr: SmPdiCtr, } impl RegisterBlock { #[doc = "0x00 - Physical Start Address SyncManager 0"] #[inline(always)] - pub const fn sm_p_start_adr(&self) -> &SM_P_START_ADR { + pub const fn sm_p_start_adr(&self) -> &SmPStartAdr { &self.sm_p_start_adr } #[doc = "0x02 - Length SyncManager 0"] #[inline(always)] - pub const fn sm_len(&self) -> &SM_LEN { + pub const fn sm_len(&self) -> &SmLen { &self.sm_len } #[doc = "0x04 - Control Register SyncManager 0"] #[inline(always)] - pub const fn sm_control(&self) -> &SM_CONTROL { + pub const fn sm_control(&self) -> &SmControl { &self.sm_control } #[doc = "0x05 - Status Register SyncManager 0"] #[inline(always)] - pub const fn sm_status(&self) -> &SM_STATUS { + pub const fn sm_status(&self) -> &SmStatus { &self.sm_status } #[doc = "0x06 - Activate SyncManager 0"] #[inline(always)] - pub const fn sm_act(&self) -> &SM_ACT { + pub const fn sm_act(&self) -> &SmAct { &self.sm_act } #[doc = "0x07 - PDI Control SyncManager 0"] #[inline(always)] - pub const fn sm_pdi_ctr(&self) -> &SM_PDI_CTR { + pub const fn sm_pdi_ctr(&self) -> &SmPdiCtr { &self.sm_pdi_ctr } } #[doc = "SM_P_START_ADR (r) register accessor: Physical Start Address SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_p_start_adr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_p_start_adr`] module"] -pub type SM_P_START_ADR = crate::Reg; +#[doc(alias = "SM_P_START_ADR")] +pub type SmPStartAdr = crate::Reg; #[doc = "Physical Start Address SyncManager 0"] pub mod sm_p_start_adr; #[doc = "SM_LEN (r) register accessor: Length SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_len::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_len`] module"] -pub type SM_LEN = crate::Reg; +#[doc(alias = "SM_LEN")] +pub type SmLen = crate::Reg; #[doc = "Length SyncManager 0"] pub mod sm_len; #[doc = "SM_CONTROL (r) register accessor: Control Register SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_control::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_control`] module"] -pub type SM_CONTROL = crate::Reg; +#[doc(alias = "SM_CONTROL")] +pub type SmControl = crate::Reg; #[doc = "Control Register SyncManager 0"] pub mod sm_control; #[doc = "SM_STATUS (r) register accessor: Status Register SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_status`] module"] -pub type SM_STATUS = crate::Reg; +#[doc(alias = "SM_STATUS")] +pub type SmStatus = crate::Reg; #[doc = "Status Register SyncManager 0"] pub mod sm_status; #[doc = "SM_ACT (r) register accessor: Activate SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_act::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_act`] module"] -pub type SM_ACT = crate::Reg; +#[doc(alias = "SM_ACT")] +pub type SmAct = crate::Reg; #[doc = "Activate SyncManager 0"] pub mod sm_act; #[doc = "SM_PDI_CTR (rw) register accessor: PDI Control SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_pdi_ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sm_pdi_ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sm_pdi_ctr`] module"] -pub type SM_PDI_CTR = crate::Reg; +#[doc(alias = "SM_PDI_CTR")] +pub type SmPdiCtr = crate::Reg; #[doc = "PDI Control SyncManager 0"] pub mod sm_pdi_ctr; diff --git a/src/ecat0_sm0/sm_act.rs b/src/ecat0_sm0/sm_act.rs index aacdbb6c..7632b5f0 100644 --- a/src/ecat0_sm0/sm_act.rs +++ b/src/ecat0_sm0/sm_act.rs @@ -1,145 +1,145 @@ #[doc = "Register `SM_ACT` reader"] -pub type R = crate::R; -#[doc = "Field `SM_EN` reader - SyncManager Enable/Disable"] -pub type SM_EN_R = crate::BitReader; +pub type R = crate::R; #[doc = "SyncManager Enable/Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SM_EN_A { +pub enum SmEn { #[doc = "0: Disable: Access to Memory without SyncManager control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable: SyncManager is active and controls Memory area set in configuration"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SM_EN_A) -> Self { + fn from(variant: SmEn) -> Self { variant as u8 != 0 } } -impl SM_EN_R { +#[doc = "Field `SM_EN` reader - SyncManager Enable/Disable"] +pub type SmEnR = crate::BitReader; +impl SmEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SM_EN_A { + pub const fn variant(&self) -> SmEn { match self.bits { - false => SM_EN_A::VALUE1, - true => SM_EN_A::VALUE2, + false => SmEn::Value1, + true => SmEn::Value2, } } #[doc = "Disable: Access to Memory without SyncManager control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SM_EN_A::VALUE1 + *self == SmEn::Value1 } #[doc = "Enable: SyncManager is active and controls Memory area set in configuration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SM_EN_A::VALUE2 + *self == SmEn::Value2 } } #[doc = "Field `REP_REQ` reader - Repeat Request"] -pub type REP_REQ_R = crate::BitReader; -#[doc = "Field `LE_ECAT` reader - LatchEvent ECAT"] -pub type LE_ECAT_R = crate::BitReader; +pub type RepReqR = crate::BitReader; #[doc = "LatchEvent ECAT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LE_ECAT_A { +pub enum LeEcat { #[doc = "0: No"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Generate Latch event if EtherCAT master issues a buffer exchange"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LE_ECAT_A) -> Self { + fn from(variant: LeEcat) -> Self { variant as u8 != 0 } } -impl LE_ECAT_R { +#[doc = "Field `LE_ECAT` reader - LatchEvent ECAT"] +pub type LeEcatR = crate::BitReader; +impl LeEcatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LE_ECAT_A { + pub const fn variant(&self) -> LeEcat { match self.bits { - false => LE_ECAT_A::VALUE1, - true => LE_ECAT_A::VALUE2, + false => LeEcat::Value1, + true => LeEcat::Value2, } } #[doc = "No"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LE_ECAT_A::VALUE1 + *self == LeEcat::Value1 } #[doc = "Generate Latch event if EtherCAT master issues a buffer exchange"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LE_ECAT_A::VALUE2 + *self == LeEcat::Value2 } } -#[doc = "Field `LE_PDI` reader - LatchEvent PDI"] -pub type LE_PDI_R = crate::BitReader; #[doc = "LatchEvent PDI\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LE_PDI_A { +pub enum LePdi { #[doc = "0: No"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Generate Latch events if PDI issues a buffer exchange or if PDI accesses buffer start address"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LE_PDI_A) -> Self { + fn from(variant: LePdi) -> Self { variant as u8 != 0 } } -impl LE_PDI_R { +#[doc = "Field `LE_PDI` reader - LatchEvent PDI"] +pub type LePdiR = crate::BitReader; +impl LePdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LE_PDI_A { + pub const fn variant(&self) -> LePdi { match self.bits { - false => LE_PDI_A::VALUE1, - true => LE_PDI_A::VALUE2, + false => LePdi::Value1, + true => LePdi::Value2, } } #[doc = "No"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LE_PDI_A::VALUE1 + *self == LePdi::Value1 } #[doc = "Generate Latch events if PDI issues a buffer exchange or if PDI accesses buffer start address"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LE_PDI_A::VALUE2 + *self == LePdi::Value2 } } impl R { #[doc = "Bit 0 - SyncManager Enable/Disable"] #[inline(always)] - pub fn sm_en(&self) -> SM_EN_R { - SM_EN_R::new((self.bits & 1) != 0) + pub fn sm_en(&self) -> SmEnR { + SmEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeat Request"] #[inline(always)] - pub fn rep_req(&self) -> REP_REQ_R { - REP_REQ_R::new(((self.bits >> 1) & 1) != 0) + pub fn rep_req(&self) -> RepReqR { + RepReqR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 6 - LatchEvent ECAT"] #[inline(always)] - pub fn le_ecat(&self) -> LE_ECAT_R { - LE_ECAT_R::new(((self.bits >> 6) & 1) != 0) + pub fn le_ecat(&self) -> LeEcatR { + LeEcatR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LatchEvent PDI"] #[inline(always)] - pub fn le_pdi(&self) -> LE_PDI_R { - LE_PDI_R::new(((self.bits >> 7) & 1) != 0) + pub fn le_pdi(&self) -> LePdiR { + LePdiR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Activate SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_act::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_ACT_SPEC; -impl crate::RegisterSpec for SM_ACT_SPEC { +pub struct SmActSpec; +impl crate::RegisterSpec for SmActSpec { type Ux = u8; } #[doc = "`read()` method returns [`sm_act::R`](R) reader structure"] -impl crate::Readable for SM_ACT_SPEC {} +impl crate::Readable for SmActSpec {} #[doc = "`reset()` method sets SM_ACT to value 0"] -impl crate::Resettable for SM_ACT_SPEC { +impl crate::Resettable for SmActSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_sm0/sm_control.rs b/src/ecat0_sm0/sm_control.rs index 001dceaf..d5fa61b3 100644 --- a/src/ecat0_sm0/sm_control.rs +++ b/src/ecat0_sm0/sm_control.rs @@ -1,230 +1,230 @@ #[doc = "Register `SM_CONTROL` reader"] -pub type R = crate::R; -#[doc = "Field `OP_MODE` reader - Operation Mode"] -pub type OP_MODE_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Operation Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OP_MODE_A { +pub enum OpMode { #[doc = "0: Buffered (3 buffer mode)"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: Mailbox (Single buffer mode)"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OP_MODE_A) -> Self { + fn from(variant: OpMode) -> Self { variant as _ } } -impl crate::FieldSpec for OP_MODE_A { +impl crate::FieldSpec for OpMode { type Ux = u8; } -impl OP_MODE_R { +#[doc = "Field `OP_MODE` reader - Operation Mode"] +pub type OpModeR = crate::FieldReader; +impl OpModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OP_MODE_A::VALUE1), - 2 => Some(OP_MODE_A::VALUE3), + 0 => Some(OpMode::Value1), + 2 => Some(OpMode::Value3), _ => None, } } #[doc = "Buffered (3 buffer mode)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OP_MODE_A::VALUE1 + *self == OpMode::Value1 } #[doc = "Mailbox (Single buffer mode)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == OP_MODE_A::VALUE3 + *self == OpMode::Value3 } } -#[doc = "Field `DIR` reader - Direction"] -pub type DIR_R = crate::FieldReader; #[doc = "Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIR_A { +pub enum Dir { #[doc = "0: Read: ECAT read access, PDI write access"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write: ECAT write access, PDI read access"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIR_A) -> Self { + fn from(variant: Dir) -> Self { variant as _ } } -impl crate::FieldSpec for DIR_A { +impl crate::FieldSpec for Dir { type Ux = u8; } -impl DIR_R { +#[doc = "Field `DIR` reader - Direction"] +pub type DirR = crate::FieldReader; +impl DirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIR_A::VALUE1), - 1 => Some(DIR_A::VALUE2), + 0 => Some(Dir::Value1), + 1 => Some(Dir::Value2), _ => None, } } #[doc = "Read: ECAT read access, PDI write access"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIR_A::VALUE1 + *self == Dir::Value1 } #[doc = "Write: ECAT write access, PDI read access"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIR_A::VALUE2 + *self == Dir::Value2 } } -#[doc = "Field `INT_ECAT` reader - Interrupt in ECAT Event Request Register"] -pub type INT_ECAT_R = crate::BitReader; #[doc = "Interrupt in ECAT Event Request Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INT_ECAT_A { +pub enum IntEcat { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INT_ECAT_A) -> Self { + fn from(variant: IntEcat) -> Self { variant as u8 != 0 } } -impl INT_ECAT_R { +#[doc = "Field `INT_ECAT` reader - Interrupt in ECAT Event Request Register"] +pub type IntEcatR = crate::BitReader; +impl IntEcatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INT_ECAT_A { + pub const fn variant(&self) -> IntEcat { match self.bits { - false => INT_ECAT_A::VALUE1, - true => INT_ECAT_A::VALUE2, + false => IntEcat::Value1, + true => IntEcat::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INT_ECAT_A::VALUE1 + *self == IntEcat::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INT_ECAT_A::VALUE2 + *self == IntEcat::Value2 } } -#[doc = "Field `INT_PDI` reader - Interrupt in PDI Event Request Register"] -pub type INT_PDI_R = crate::BitReader; #[doc = "Interrupt in PDI Event Request Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INT_PDI_A { +pub enum IntPdi { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INT_PDI_A) -> Self { + fn from(variant: IntPdi) -> Self { variant as u8 != 0 } } -impl INT_PDI_R { +#[doc = "Field `INT_PDI` reader - Interrupt in PDI Event Request Register"] +pub type IntPdiR = crate::BitReader; +impl IntPdiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INT_PDI_A { + pub const fn variant(&self) -> IntPdi { match self.bits { - false => INT_PDI_A::VALUE1, - true => INT_PDI_A::VALUE2, + false => IntPdi::Value1, + true => IntPdi::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INT_PDI_A::VALUE1 + *self == IntPdi::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INT_PDI_A::VALUE2 + *self == IntPdi::Value2 } } -#[doc = "Field `WD_TRG` reader - Watchdog Trigger Enable"] -pub type WD_TRG_R = crate::BitReader; #[doc = "Watchdog Trigger Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WD_TRG_A { +pub enum WdTrg { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WD_TRG_A) -> Self { + fn from(variant: WdTrg) -> Self { variant as u8 != 0 } } -impl WD_TRG_R { +#[doc = "Field `WD_TRG` reader - Watchdog Trigger Enable"] +pub type WdTrgR = crate::BitReader; +impl WdTrgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WD_TRG_A { + pub const fn variant(&self) -> WdTrg { match self.bits { - false => WD_TRG_A::VALUE1, - true => WD_TRG_A::VALUE2, + false => WdTrg::Value1, + true => WdTrg::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WD_TRG_A::VALUE1 + *self == WdTrg::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WD_TRG_A::VALUE2 + *self == WdTrg::Value2 } } impl R { #[doc = "Bits 0:1 - Operation Mode"] #[inline(always)] - pub fn op_mode(&self) -> OP_MODE_R { - OP_MODE_R::new(self.bits & 3) + pub fn op_mode(&self) -> OpModeR { + OpModeR::new(self.bits & 3) } #[doc = "Bits 2:3 - Direction"] #[inline(always)] - pub fn dir(&self) -> DIR_R { - DIR_R::new((self.bits >> 2) & 3) + pub fn dir(&self) -> DirR { + DirR::new((self.bits >> 2) & 3) } #[doc = "Bit 4 - Interrupt in ECAT Event Request Register"] #[inline(always)] - pub fn int_ecat(&self) -> INT_ECAT_R { - INT_ECAT_R::new(((self.bits >> 4) & 1) != 0) + pub fn int_ecat(&self) -> IntEcatR { + IntEcatR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt in PDI Event Request Register"] #[inline(always)] - pub fn int_pdi(&self) -> INT_PDI_R { - INT_PDI_R::new(((self.bits >> 5) & 1) != 0) + pub fn int_pdi(&self) -> IntPdiR { + IntPdiR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Watchdog Trigger Enable"] #[inline(always)] - pub fn wd_trg(&self) -> WD_TRG_R { - WD_TRG_R::new(((self.bits >> 6) & 1) != 0) + pub fn wd_trg(&self) -> WdTrgR { + WdTrgR::new(((self.bits >> 6) & 1) != 0) } } #[doc = "Control Register SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_control::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_CONTROL_SPEC; -impl crate::RegisterSpec for SM_CONTROL_SPEC { +pub struct SmControlSpec; +impl crate::RegisterSpec for SmControlSpec { type Ux = u8; } #[doc = "`read()` method returns [`sm_control::R`](R) reader structure"] -impl crate::Readable for SM_CONTROL_SPEC {} +impl crate::Readable for SmControlSpec {} #[doc = "`reset()` method sets SM_CONTROL to value 0"] -impl crate::Resettable for SM_CONTROL_SPEC { +impl crate::Resettable for SmControlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_sm0/sm_len.rs b/src/ecat0_sm0/sm_len.rs index f2ddfeba..f5931822 100644 --- a/src/ecat0_sm0/sm_len.rs +++ b/src/ecat0_sm0/sm_len.rs @@ -1,22 +1,22 @@ #[doc = "Register `SM_LEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `NO_BYTES` reader - Number of bytes assigned to SyncManager"] -pub type NO_BYTES_R = crate::FieldReader; +pub type NoBytesR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Number of bytes assigned to SyncManager"] #[inline(always)] - pub fn no_bytes(&self) -> NO_BYTES_R { - NO_BYTES_R::new(self.bits) + pub fn no_bytes(&self) -> NoBytesR { + NoBytesR::new(self.bits) } } #[doc = "Length SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_len::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_LEN_SPEC; -impl crate::RegisterSpec for SM_LEN_SPEC { +pub struct SmLenSpec; +impl crate::RegisterSpec for SmLenSpec { type Ux = u16; } #[doc = "`read()` method returns [`sm_len::R`](R) reader structure"] -impl crate::Readable for SM_LEN_SPEC {} +impl crate::Readable for SmLenSpec {} #[doc = "`reset()` method sets SM_LEN to value 0"] -impl crate::Resettable for SM_LEN_SPEC { +impl crate::Resettable for SmLenSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0_sm0/sm_p_start_adr.rs b/src/ecat0_sm0/sm_p_start_adr.rs index 2c0d0ab5..a2b79349 100644 --- a/src/ecat0_sm0/sm_p_start_adr.rs +++ b/src/ecat0_sm0/sm_p_start_adr.rs @@ -1,22 +1,22 @@ #[doc = "Register `SM_P_START_ADR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `FIRST_BYTE` reader - Specifies first byte that will be handled by SyncManager"] -pub type FIRST_BYTE_R = crate::FieldReader; +pub type FirstByteR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Specifies first byte that will be handled by SyncManager"] #[inline(always)] - pub fn first_byte(&self) -> FIRST_BYTE_R { - FIRST_BYTE_R::new(self.bits) + pub fn first_byte(&self) -> FirstByteR { + FirstByteR::new(self.bits) } } #[doc = "Physical Start Address SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_p_start_adr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_P_START_ADR_SPEC; -impl crate::RegisterSpec for SM_P_START_ADR_SPEC { +pub struct SmPStartAdrSpec; +impl crate::RegisterSpec for SmPStartAdrSpec { type Ux = u16; } #[doc = "`read()` method returns [`sm_p_start_adr::R`](R) reader structure"] -impl crate::Readable for SM_P_START_ADR_SPEC {} +impl crate::Readable for SmPStartAdrSpec {} #[doc = "`reset()` method sets SM_P_START_ADR to value 0"] -impl crate::Resettable for SM_P_START_ADR_SPEC { +impl crate::Resettable for SmPStartAdrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/ecat0_sm0/sm_pdi_ctr.rs b/src/ecat0_sm0/sm_pdi_ctr.rs index 8a427a87..fc25dfa3 100644 --- a/src/ecat0_sm0/sm_pdi_ctr.rs +++ b/src/ecat0_sm0/sm_pdi_ctr.rs @@ -1,113 +1,104 @@ #[doc = "Register `SM_PDI_CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SM_PDI_CTR` writer"] -pub type W = crate::W; -#[doc = "Field `DEACT` reader - Deactivate SyncManager"] -pub type DEACT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Deactivate SyncManager\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEACT_A { +pub enum Deact { #[doc = "0: Read 0 for Normal operation, SyncManager activated, write 0 for Activate SyncManager"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read 1 for SyncManager deactivated and reset SyncManager locks access to Memory area, write 1 for Request SyncManager deactivation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEACT_A) -> Self { + fn from(variant: Deact) -> Self { variant as u8 != 0 } } -impl DEACT_R { +#[doc = "Field `DEACT` reader - Deactivate SyncManager"] +pub type DeactR = crate::BitReader; +impl DeactR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DEACT_A { + pub const fn variant(&self) -> Deact { match self.bits { - false => DEACT_A::VALUE1, - true => DEACT_A::VALUE2, + false => Deact::Value1, + true => Deact::Value2, } } #[doc = "Read 0 for Normal operation, SyncManager activated, write 0 for Activate SyncManager"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DEACT_A::VALUE1 + *self == Deact::Value1 } #[doc = "Read 1 for SyncManager deactivated and reset SyncManager locks access to Memory area, write 1 for Request SyncManager deactivation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DEACT_A::VALUE2 + *self == Deact::Value2 } } #[doc = "Field `DEACT` writer - Deactivate SyncManager"] -pub type DEACT_W<'a, REG> = crate::BitWriter<'a, REG, DEACT_A>; -impl<'a, REG> DEACT_W<'a, REG> +pub type DeactW<'a, REG> = crate::BitWriter<'a, REG, Deact>; +impl<'a, REG> DeactW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read 0 for Normal operation, SyncManager activated, write 0 for Activate SyncManager"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DEACT_A::VALUE1) + self.variant(Deact::Value1) } #[doc = "Read 1 for SyncManager deactivated and reset SyncManager locks access to Memory area, write 1 for Request SyncManager deactivation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DEACT_A::VALUE2) + self.variant(Deact::Value2) } } #[doc = "Field `REP_ACK` reader - Repeat Ack"] -pub type REP_ACK_R = crate::BitReader; +pub type RepAckR = crate::BitReader; #[doc = "Field `REP_ACK` writer - Repeat Ack"] -pub type REP_ACK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RepAckW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Deactivate SyncManager"] #[inline(always)] - pub fn deact(&self) -> DEACT_R { - DEACT_R::new((self.bits & 1) != 0) + pub fn deact(&self) -> DeactR { + DeactR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Repeat Ack"] #[inline(always)] - pub fn rep_ack(&self) -> REP_ACK_R { - REP_ACK_R::new(((self.bits >> 1) & 1) != 0) + pub fn rep_ack(&self) -> RepAckR { + RepAckR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Deactivate SyncManager"] #[inline(always)] #[must_use] - pub fn deact(&mut self) -> DEACT_W { - DEACT_W::new(self, 0) + pub fn deact(&mut self) -> DeactW { + DeactW::new(self, 0) } #[doc = "Bit 1 - Repeat Ack"] #[inline(always)] #[must_use] - pub fn rep_ack(&mut self) -> REP_ACK_W { - REP_ACK_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn rep_ack(&mut self) -> RepAckW { + RepAckW::new(self, 1) } } #[doc = "PDI Control SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_pdi_ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sm_pdi_ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_PDI_CTR_SPEC; -impl crate::RegisterSpec for SM_PDI_CTR_SPEC { +pub struct SmPdiCtrSpec; +impl crate::RegisterSpec for SmPdiCtrSpec { type Ux = u8; } #[doc = "`read()` method returns [`sm_pdi_ctr::R`](R) reader structure"] -impl crate::Readable for SM_PDI_CTR_SPEC {} +impl crate::Readable for SmPdiCtrSpec {} #[doc = "`write(|w| ..)` method takes [`sm_pdi_ctr::W`](W) writer structure"] -impl crate::Writable for SM_PDI_CTR_SPEC { +impl crate::Writable for SmPdiCtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets SM_PDI_CTR to value 0"] -impl crate::Resettable for SM_PDI_CTR_SPEC { +impl crate::Resettable for SmPdiCtrSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/ecat0_sm0/sm_status.rs b/src/ecat0_sm0/sm_status.rs index 532d85cf..806ccc3d 100644 --- a/src/ecat0_sm0/sm_status.rs +++ b/src/ecat0_sm0/sm_status.rs @@ -1,282 +1,282 @@ #[doc = "Register `SM_STATUS` reader"] -pub type R = crate::R; -#[doc = "Field `INT_W` reader - Interrupt Write"] -pub type INT_W_R = crate::BitReader; +pub type R = crate::R; #[doc = "Interrupt Write\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INT_W_A { +pub enum IntW { #[doc = "0: Interrupt cleared after first byte of buffer was read"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt after buffer was completely and successfully written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INT_W_A) -> Self { + fn from(variant: IntW) -> Self { variant as u8 != 0 } } -impl INT_W_R { +#[doc = "Field `INT_W` reader - Interrupt Write"] +pub type IntWR = crate::BitReader; +impl IntWR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INT_W_A { + pub const fn variant(&self) -> IntW { match self.bits { - false => INT_W_A::VALUE1, - true => INT_W_A::VALUE2, + false => IntW::Value1, + true => IntW::Value2, } } #[doc = "Interrupt cleared after first byte of buffer was read"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INT_W_A::VALUE1 + *self == IntW::Value1 } #[doc = "Interrupt after buffer was completely and successfully written"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INT_W_A::VALUE2 + *self == IntW::Value2 } } -#[doc = "Field `INT_R` reader - Interrupt Read"] -pub type INT_R_R = crate::BitReader; #[doc = "Interrupt Read\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INT_R_A { +pub enum IntR { #[doc = "0: Interrupt cleared after first byte of buffer was written"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt after buffer was completely and successful read"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INT_R_A) -> Self { + fn from(variant: IntR) -> Self { variant as u8 != 0 } } -impl INT_R_R { +#[doc = "Field `INT_R` reader - Interrupt Read"] +pub type IntRR = crate::BitReader; +impl IntRR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INT_R_A { + pub const fn variant(&self) -> IntR { match self.bits { - false => INT_R_A::VALUE1, - true => INT_R_A::VALUE2, + false => IntR::Value1, + true => IntR::Value2, } } #[doc = "Interrupt cleared after first byte of buffer was written"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INT_R_A::VALUE1 + *self == IntR::Value1 } #[doc = "Interrupt after buffer was completely and successful read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INT_R_A::VALUE2 + *self == IntR::Value2 } } -#[doc = "Field `MB_STATUS` reader - Mailbox mode: mailbox status"] -pub type MB_STATUS_R = crate::BitReader; #[doc = "Mailbox mode: mailbox status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MB_STATUS_A { +pub enum MbStatus { #[doc = "0: Mailbox empty"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Mailbox full"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MB_STATUS_A) -> Self { + fn from(variant: MbStatus) -> Self { variant as u8 != 0 } } -impl MB_STATUS_R { +#[doc = "Field `MB_STATUS` reader - Mailbox mode: mailbox status"] +pub type MbStatusR = crate::BitReader; +impl MbStatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MB_STATUS_A { + pub const fn variant(&self) -> MbStatus { match self.bits { - false => MB_STATUS_A::VALUE1, - true => MB_STATUS_A::VALUE2, + false => MbStatus::Value1, + true => MbStatus::Value2, } } #[doc = "Mailbox empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MB_STATUS_A::VALUE1 + *self == MbStatus::Value1 } #[doc = "Mailbox full"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MB_STATUS_A::VALUE2 + *self == MbStatus::Value2 } } -#[doc = "Field `BUF_STATUS` reader - Buffered mode: buffer status (last written buffer)"] -pub type BUF_STATUS_R = crate::FieldReader; #[doc = "Buffered mode: buffer status (last written buffer)\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BUF_STATUS_A { +pub enum BufStatus { #[doc = "0: 1. buffer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2. buffer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 3. buffer"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: (no buffer written)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BUF_STATUS_A) -> Self { + fn from(variant: BufStatus) -> Self { variant as _ } } -impl crate::FieldSpec for BUF_STATUS_A { +impl crate::FieldSpec for BufStatus { type Ux = u8; } -impl BUF_STATUS_R { +#[doc = "Field `BUF_STATUS` reader - Buffered mode: buffer status (last written buffer)"] +pub type BufStatusR = crate::FieldReader; +impl BufStatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUF_STATUS_A { + pub const fn variant(&self) -> BufStatus { match self.bits { - 0 => BUF_STATUS_A::VALUE1, - 1 => BUF_STATUS_A::VALUE2, - 2 => BUF_STATUS_A::VALUE3, - 3 => BUF_STATUS_A::VALUE4, + 0 => BufStatus::Value1, + 1 => BufStatus::Value2, + 2 => BufStatus::Value3, + 3 => BufStatus::Value4, _ => unreachable!(), } } #[doc = "1. buffer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUF_STATUS_A::VALUE1 + *self == BufStatus::Value1 } #[doc = "2. buffer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUF_STATUS_A::VALUE2 + *self == BufStatus::Value2 } #[doc = "3. buffer"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BUF_STATUS_A::VALUE3 + *self == BufStatus::Value3 } #[doc = "(no buffer written)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BUF_STATUS_A::VALUE4 + *self == BufStatus::Value4 } } -#[doc = "Field `R_BUF_IU` reader - Read buffer in use (opened)"] -pub type R_BUF_IU_R = crate::BitReader; #[doc = "Read buffer in use (opened)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum R_BUF_IU_A { +pub enum RBufIu { #[doc = "0: buffer not in use"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: buffer in use"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: R_BUF_IU_A) -> Self { + fn from(variant: RBufIu) -> Self { variant as u8 != 0 } } -impl R_BUF_IU_R { +#[doc = "Field `R_BUF_IU` reader - Read buffer in use (opened)"] +pub type RBufIuR = crate::BitReader; +impl RBufIuR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> R_BUF_IU_A { + pub const fn variant(&self) -> RBufIu { match self.bits { - false => R_BUF_IU_A::VALUE1, - true => R_BUF_IU_A::VALUE2, + false => RBufIu::Value1, + true => RBufIu::Value2, } } #[doc = "buffer not in use"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == R_BUF_IU_A::VALUE1 + *self == RBufIu::Value1 } #[doc = "buffer in use"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == R_BUF_IU_A::VALUE2 + *self == RBufIu::Value2 } } -#[doc = "Field `W_BUF_IU` reader - Write buffer in use (opened)"] -pub type W_BUF_IU_R = crate::BitReader; #[doc = "Write buffer in use (opened)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum W_BUF_IU_A { +pub enum WBufIu { #[doc = "0: buffer not in use"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: buffer in use"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: W_BUF_IU_A) -> Self { + fn from(variant: WBufIu) -> Self { variant as u8 != 0 } } -impl W_BUF_IU_R { +#[doc = "Field `W_BUF_IU` reader - Write buffer in use (opened)"] +pub type WBufIuR = crate::BitReader; +impl WBufIuR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> W_BUF_IU_A { + pub const fn variant(&self) -> WBufIu { match self.bits { - false => W_BUF_IU_A::VALUE1, - true => W_BUF_IU_A::VALUE2, + false => WBufIu::Value1, + true => WBufIu::Value2, } } #[doc = "buffer not in use"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == W_BUF_IU_A::VALUE1 + *self == WBufIu::Value1 } #[doc = "buffer in use"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == W_BUF_IU_A::VALUE2 + *self == WBufIu::Value2 } } impl R { #[doc = "Bit 0 - Interrupt Write"] #[inline(always)] - pub fn int_w(&self) -> INT_W_R { - INT_W_R::new((self.bits & 1) != 0) + pub fn int_w(&self) -> IntWR { + IntWR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Read"] #[inline(always)] - pub fn int_r(&self) -> INT_R_R { - INT_R_R::new(((self.bits >> 1) & 1) != 0) + pub fn int_r(&self) -> IntRR { + IntRR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Mailbox mode: mailbox status"] #[inline(always)] - pub fn mb_status(&self) -> MB_STATUS_R { - MB_STATUS_R::new(((self.bits >> 3) & 1) != 0) + pub fn mb_status(&self) -> MbStatusR { + MbStatusR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Buffered mode: buffer status (last written buffer)"] #[inline(always)] - pub fn buf_status(&self) -> BUF_STATUS_R { - BUF_STATUS_R::new((self.bits >> 4) & 3) + pub fn buf_status(&self) -> BufStatusR { + BufStatusR::new((self.bits >> 4) & 3) } #[doc = "Bit 6 - Read buffer in use (opened)"] #[inline(always)] - pub fn r_buf_iu(&self) -> R_BUF_IU_R { - R_BUF_IU_R::new(((self.bits >> 6) & 1) != 0) + pub fn r_buf_iu(&self) -> RBufIuR { + RBufIuR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Write buffer in use (opened)"] #[inline(always)] - pub fn w_buf_iu(&self) -> W_BUF_IU_R { - W_BUF_IU_R::new(((self.bits >> 7) & 1) != 0) + pub fn w_buf_iu(&self) -> WBufIuR { + WBufIuR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Status Register SyncManager 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sm_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SM_STATUS_SPEC; -impl crate::RegisterSpec for SM_STATUS_SPEC { +pub struct SmStatusSpec; +impl crate::RegisterSpec for SmStatusSpec { type Ux = u8; } #[doc = "`read()` method returns [`sm_status::R`](R) reader structure"] -impl crate::Readable for SM_STATUS_SPEC {} +impl crate::Readable for SmStatusSpec {} #[doc = "`reset()` method sets SM_STATUS to value 0x30"] -impl crate::Resettable for SM_STATUS_SPEC { +impl crate::Resettable for SmStatusSpec { const RESET_VALUE: u8 = 0x30; } diff --git a/src/eru0.rs b/src/eru0.rs index dfd04d6e..ed352599 100644 --- a/src/eru0.rs +++ b/src/eru0.rs @@ -1,52 +1,55 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - exisel: EXISEL, + exisel: Exisel, _reserved1: [u8; 0x0c], - exicon: [EXICON; 4], - exocon: [EXOCON; 4], + exicon: [Exicon; 4], + exocon: [Exocon; 4], } impl RegisterBlock { #[doc = "0x00 - Event Input Select"] #[inline(always)] - pub const fn exisel(&self) -> &EXISEL { + pub const fn exisel(&self) -> &Exisel { &self.exisel } #[doc = "0x10..0x20 - Event Input Control"] #[inline(always)] - pub const fn exicon(&self, n: usize) -> &EXICON { + pub const fn exicon(&self, n: usize) -> &Exicon { &self.exicon[n] } #[doc = "Iterator for array of:"] #[doc = "0x10..0x20 - Event Input Control"] #[inline(always)] - pub fn exicon_iter(&self) -> impl Iterator { + pub fn exicon_iter(&self) -> impl Iterator { self.exicon.iter() } #[doc = "0x20..0x30 - Event Output Trigger Control"] #[inline(always)] - pub const fn exocon(&self, n: usize) -> &EXOCON { + pub const fn exocon(&self, n: usize) -> &Exocon { &self.exocon[n] } #[doc = "Iterator for array of:"] #[doc = "0x20..0x30 - Event Output Trigger Control"] #[inline(always)] - pub fn exocon_iter(&self) -> impl Iterator { + pub fn exocon_iter(&self) -> impl Iterator { self.exocon.iter() } } #[doc = "EXISEL (rw) register accessor: Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exisel`] module"] -pub type EXISEL = crate::Reg; +#[doc(alias = "EXISEL")] +pub type Exisel = crate::Reg; #[doc = "Event Input Select"] pub mod exisel; #[doc = "EXICON (rw) register accessor: Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exicon`] module"] -pub type EXICON = crate::Reg; +#[doc(alias = "EXICON")] +pub type Exicon = crate::Reg; #[doc = "Event Input Control"] pub mod exicon; #[doc = "EXOCON (rw) register accessor: Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exocon`] module"] -pub type EXOCON = crate::Reg; +#[doc(alias = "EXOCON")] +pub type Exocon = crate::Reg; #[doc = "Event Output Trigger Control"] pub mod exocon; diff --git a/src/eru0/exicon.rs b/src/eru0/exicon.rs index 8f7693fb..499afd80 100644 --- a/src/eru0/exicon.rs +++ b/src/eru0/exicon.rs @@ -1,279 +1,279 @@ #[doc = "Register `EXICON[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXICON[%s]` writer"] -pub type W = crate::W; -#[doc = "Field `PE` reader - Output Trigger Pulse Enable for ETLx"] -pub type PE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Output Trigger Pulse Enable for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PE_A { +pub enum Pe { #[doc = "0: The trigger pulse generation is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The trigger pulse generation is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PE_A) -> Self { + fn from(variant: Pe) -> Self { variant as u8 != 0 } } -impl PE_R { +#[doc = "Field `PE` reader - Output Trigger Pulse Enable for ETLx"] +pub type PeR = crate::BitReader; +impl PeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PE_A { + pub const fn variant(&self) -> Pe { match self.bits { - false => PE_A::VALUE1, - true => PE_A::VALUE2, + false => Pe::Value1, + true => Pe::Value2, } } #[doc = "The trigger pulse generation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PE_A::VALUE1 + *self == Pe::Value1 } #[doc = "The trigger pulse generation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PE_A::VALUE2 + *self == Pe::Value2 } } #[doc = "Field `PE` writer - Output Trigger Pulse Enable for ETLx"] -pub type PE_W<'a, REG> = crate::BitWriter<'a, REG, PE_A>; -impl<'a, REG> PE_W<'a, REG> +pub type PeW<'a, REG> = crate::BitWriter<'a, REG, Pe>; +impl<'a, REG> PeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The trigger pulse generation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PE_A::VALUE1) + self.variant(Pe::Value1) } #[doc = "The trigger pulse generation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PE_A::VALUE2) + self.variant(Pe::Value2) } } -#[doc = "Field `LD` reader - Rebuild Level Detection for Status Flag for ETLx"] -pub type LD_R = crate::BitReader; #[doc = "Rebuild Level Detection for Status Flag for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LD_A { +pub enum Ld { #[doc = "0: The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LD_A) -> Self { + fn from(variant: Ld) -> Self { variant as u8 != 0 } } -impl LD_R { +#[doc = "Field `LD` reader - Rebuild Level Detection for Status Flag for ETLx"] +pub type LdR = crate::BitReader; +impl LdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LD_A { + pub const fn variant(&self) -> Ld { match self.bits { - false => LD_A::VALUE1, - true => LD_A::VALUE2, + false => Ld::Value1, + true => Ld::Value2, } } #[doc = "The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LD_A::VALUE1 + *self == Ld::Value1 } #[doc = "The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LD_A::VALUE2 + *self == Ld::Value2 } } #[doc = "Field `LD` writer - Rebuild Level Detection for Status Flag for ETLx"] -pub type LD_W<'a, REG> = crate::BitWriter<'a, REG, LD_A>; -impl<'a, REG> LD_W<'a, REG> +pub type LdW<'a, REG> = crate::BitWriter<'a, REG, Ld>; +impl<'a, REG> LdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LD_A::VALUE1) + self.variant(Ld::Value1) } #[doc = "The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LD_A::VALUE2) + self.variant(Ld::Value2) } } -#[doc = "Field `RE` reader - Rising Edge Detection Enable ETLx"] -pub type RE_R = crate::BitReader; #[doc = "Rising Edge Detection Enable ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RE_A { +pub enum Re { #[doc = "0: A rising edge is not considered as edge event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge is considered as edge event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RE_A) -> Self { + fn from(variant: Re) -> Self { variant as u8 != 0 } } -impl RE_R { +#[doc = "Field `RE` reader - Rising Edge Detection Enable ETLx"] +pub type ReR = crate::BitReader; +impl ReR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RE_A { + pub const fn variant(&self) -> Re { match self.bits { - false => RE_A::VALUE1, - true => RE_A::VALUE2, + false => Re::Value1, + true => Re::Value2, } } #[doc = "A rising edge is not considered as edge event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RE_A::VALUE1 + *self == Re::Value1 } #[doc = "A rising edge is considered as edge event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RE_A::VALUE2 + *self == Re::Value2 } } #[doc = "Field `RE` writer - Rising Edge Detection Enable ETLx"] -pub type RE_W<'a, REG> = crate::BitWriter<'a, REG, RE_A>; -impl<'a, REG> RE_W<'a, REG> +pub type ReW<'a, REG> = crate::BitWriter<'a, REG, Re>; +impl<'a, REG> ReW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A rising edge is not considered as edge event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RE_A::VALUE1) + self.variant(Re::Value1) } #[doc = "A rising edge is considered as edge event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RE_A::VALUE2) + self.variant(Re::Value2) } } -#[doc = "Field `FE` reader - Falling Edge Detection Enable ETLx"] -pub type FE_R = crate::BitReader; #[doc = "Falling Edge Detection Enable ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_A { +pub enum Fe { #[doc = "0: A falling edge is not considered as edge event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A falling edge is considered as edge event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_A) -> Self { + fn from(variant: Fe) -> Self { variant as u8 != 0 } } -impl FE_R { +#[doc = "Field `FE` reader - Falling Edge Detection Enable ETLx"] +pub type FeR = crate::BitReader; +impl FeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FE_A { + pub const fn variant(&self) -> Fe { match self.bits { - false => FE_A::VALUE1, - true => FE_A::VALUE2, + false => Fe::Value1, + true => Fe::Value2, } } #[doc = "A falling edge is not considered as edge event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FE_A::VALUE1 + *self == Fe::Value1 } #[doc = "A falling edge is considered as edge event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FE_A::VALUE2 + *self == Fe::Value2 } } #[doc = "Field `FE` writer - Falling Edge Detection Enable ETLx"] -pub type FE_W<'a, REG> = crate::BitWriter<'a, REG, FE_A>; -impl<'a, REG> FE_W<'a, REG> +pub type FeW<'a, REG> = crate::BitWriter<'a, REG, Fe>; +impl<'a, REG> FeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A falling edge is not considered as edge event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_A::VALUE1) + self.variant(Fe::Value1) } #[doc = "A falling edge is considered as edge event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_A::VALUE2) + self.variant(Fe::Value2) } } -#[doc = "Field `OCS` reader - Output Channel Select for ETLx Output Trigger Pulse"] -pub type OCS_R = crate::FieldReader; #[doc = "Output Channel Select for ETLx Output Trigger Pulse\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum OCS_A { +pub enum Ocs { #[doc = "0: Trigger pulses are sent to OGU0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger pulses are sent to OGU1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger pulses are sent to OGU2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Trigger pulses are sent to OGU3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: OCS_A) -> Self { + fn from(variant: Ocs) -> Self { variant as _ } } -impl crate::FieldSpec for OCS_A { +impl crate::FieldSpec for Ocs { type Ux = u8; } -impl OCS_R { +#[doc = "Field `OCS` reader - Output Channel Select for ETLx Output Trigger Pulse"] +pub type OcsR = crate::FieldReader; +impl OcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(OCS_A::VALUE1), - 1 => Some(OCS_A::VALUE2), - 2 => Some(OCS_A::VALUE3), - 3 => Some(OCS_A::VALUE4), + 0 => Some(Ocs::Value1), + 1 => Some(Ocs::Value2), + 2 => Some(Ocs::Value3), + 3 => Some(Ocs::Value4), _ => None, } } #[doc = "Trigger pulses are sent to OGU0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OCS_A::VALUE1 + *self == Ocs::Value1 } #[doc = "Trigger pulses are sent to OGU1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OCS_A::VALUE2 + *self == Ocs::Value2 } #[doc = "Trigger pulses are sent to OGU2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == OCS_A::VALUE3 + *self == Ocs::Value3 } #[doc = "Trigger pulses are sent to OGU3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == OCS_A::VALUE4 + *self == Ocs::Value4 } } #[doc = "Field `OCS` writer - Output Channel Select for ETLx Output Trigger Pulse"] -pub type OCS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, OCS_A>; -impl<'a, REG> OCS_W<'a, REG> +pub type OcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ocs>; +impl<'a, REG> OcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,137 +281,137 @@ where #[doc = "Trigger pulses are sent to OGU0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OCS_A::VALUE1) + self.variant(Ocs::Value1) } #[doc = "Trigger pulses are sent to OGU1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OCS_A::VALUE2) + self.variant(Ocs::Value2) } #[doc = "Trigger pulses are sent to OGU2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(OCS_A::VALUE3) + self.variant(Ocs::Value3) } #[doc = "Trigger pulses are sent to OGU3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(OCS_A::VALUE4) + self.variant(Ocs::Value4) } } -#[doc = "Field `FL` reader - Status Flag for ETLx"] -pub type FL_R = crate::BitReader; #[doc = "Status Flag for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FL_A { +pub enum Fl { #[doc = "0: The enabled edge event has not been detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The enabled edge event has been detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FL_A) -> Self { + fn from(variant: Fl) -> Self { variant as u8 != 0 } } -impl FL_R { +#[doc = "Field `FL` reader - Status Flag for ETLx"] +pub type FlR = crate::BitReader; +impl FlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FL_A { + pub const fn variant(&self) -> Fl { match self.bits { - false => FL_A::VALUE1, - true => FL_A::VALUE2, + false => Fl::Value1, + true => Fl::Value2, } } #[doc = "The enabled edge event has not been detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FL_A::VALUE1 + *self == Fl::Value1 } #[doc = "The enabled edge event has been detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FL_A::VALUE2 + *self == Fl::Value2 } } #[doc = "Field `FL` writer - Status Flag for ETLx"] -pub type FL_W<'a, REG> = crate::BitWriter<'a, REG, FL_A>; -impl<'a, REG> FL_W<'a, REG> +pub type FlW<'a, REG> = crate::BitWriter<'a, REG, Fl>; +impl<'a, REG> FlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The enabled edge event has not been detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FL_A::VALUE1) + self.variant(Fl::Value1) } #[doc = "The enabled edge event has been detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FL_A::VALUE2) + self.variant(Fl::Value2) } } -#[doc = "Field `SS` reader - Input Source Select for ERSx"] -pub type SS_R = crate::FieldReader; #[doc = "Input Source Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SS_A { +pub enum Ss { #[doc = "0: Input A without additional combination"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input B without additional combination"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input A OR input B"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input A AND input B"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SS_A) -> Self { + fn from(variant: Ss) -> Self { variant as _ } } -impl crate::FieldSpec for SS_A { +impl crate::FieldSpec for Ss { type Ux = u8; } -impl SS_R { +#[doc = "Field `SS` reader - Input Source Select for ERSx"] +pub type SsR = crate::FieldReader; +impl SsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SS_A { + pub const fn variant(&self) -> Ss { match self.bits { - 0 => SS_A::VALUE1, - 1 => SS_A::VALUE2, - 2 => SS_A::VALUE3, - 3 => SS_A::VALUE4, + 0 => Ss::Value1, + 1 => Ss::Value2, + 2 => Ss::Value3, + 3 => Ss::Value4, _ => unreachable!(), } } #[doc = "Input A without additional combination"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SS_A::VALUE1 + *self == Ss::Value1 } #[doc = "Input B without additional combination"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SS_A::VALUE2 + *self == Ss::Value2 } #[doc = "Input A OR input B"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SS_A::VALUE3 + *self == Ss::Value3 } #[doc = "Input A AND input B"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SS_A::VALUE4 + *self == Ss::Value4 } } #[doc = "Field `SS` writer - Input Source Select for ERSx"] -pub type SS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, SS_A>; -impl<'a, REG> SS_W<'a, REG> +pub type SsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ss>; +impl<'a, REG> SsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -419,257 +419,248 @@ where #[doc = "Input A without additional combination"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SS_A::VALUE1) + self.variant(Ss::Value1) } #[doc = "Input B without additional combination"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SS_A::VALUE2) + self.variant(Ss::Value2) } #[doc = "Input A OR input B"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SS_A::VALUE3) + self.variant(Ss::Value3) } #[doc = "Input A AND input B"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SS_A::VALUE4) + self.variant(Ss::Value4) } } -#[doc = "Field `NA` reader - Input A Negation Select for ERSx"] -pub type NA_R = crate::BitReader; #[doc = "Input A Negation Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NA_A { +pub enum Na { #[doc = "0: Input A is used directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input A is inverted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NA_A) -> Self { + fn from(variant: Na) -> Self { variant as u8 != 0 } } -impl NA_R { +#[doc = "Field `NA` reader - Input A Negation Select for ERSx"] +pub type NaR = crate::BitReader; +impl NaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NA_A { + pub const fn variant(&self) -> Na { match self.bits { - false => NA_A::VALUE1, - true => NA_A::VALUE2, + false => Na::Value1, + true => Na::Value2, } } #[doc = "Input A is used directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NA_A::VALUE1 + *self == Na::Value1 } #[doc = "Input A is inverted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NA_A::VALUE2 + *self == Na::Value2 } } #[doc = "Field `NA` writer - Input A Negation Select for ERSx"] -pub type NA_W<'a, REG> = crate::BitWriter<'a, REG, NA_A>; -impl<'a, REG> NA_W<'a, REG> +pub type NaW<'a, REG> = crate::BitWriter<'a, REG, Na>; +impl<'a, REG> NaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Input A is used directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NA_A::VALUE1) + self.variant(Na::Value1) } #[doc = "Input A is inverted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NA_A::VALUE2) + self.variant(Na::Value2) } } -#[doc = "Field `NB` reader - Input B Negation Select for ERSx"] -pub type NB_R = crate::BitReader; #[doc = "Input B Negation Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NB_A { +pub enum Nb { #[doc = "0: Input B is used directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input B is inverted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NB_A) -> Self { + fn from(variant: Nb) -> Self { variant as u8 != 0 } } -impl NB_R { +#[doc = "Field `NB` reader - Input B Negation Select for ERSx"] +pub type NbR = crate::BitReader; +impl NbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NB_A { + pub const fn variant(&self) -> Nb { match self.bits { - false => NB_A::VALUE1, - true => NB_A::VALUE2, + false => Nb::Value1, + true => Nb::Value2, } } #[doc = "Input B is used directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NB_A::VALUE1 + *self == Nb::Value1 } #[doc = "Input B is inverted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NB_A::VALUE2 + *self == Nb::Value2 } } #[doc = "Field `NB` writer - Input B Negation Select for ERSx"] -pub type NB_W<'a, REG> = crate::BitWriter<'a, REG, NB_A>; -impl<'a, REG> NB_W<'a, REG> +pub type NbW<'a, REG> = crate::BitWriter<'a, REG, Nb>; +impl<'a, REG> NbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Input B is used directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NB_A::VALUE1) + self.variant(Nb::Value1) } #[doc = "Input B is inverted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NB_A::VALUE2) + self.variant(Nb::Value2) } } impl R { #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"] #[inline(always)] - pub fn pe(&self) -> PE_R { - PE_R::new((self.bits & 1) != 0) + pub fn pe(&self) -> PeR { + PeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"] #[inline(always)] - pub fn ld(&self) -> LD_R { - LD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ld(&self) -> LdR { + LdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"] #[inline(always)] - pub fn re(&self) -> RE_R { - RE_R::new(((self.bits >> 2) & 1) != 0) + pub fn re(&self) -> ReR { + ReR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"] #[inline(always)] - pub fn fe(&self) -> FE_R { - FE_R::new(((self.bits >> 3) & 1) != 0) + pub fn fe(&self) -> FeR { + FeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"] #[inline(always)] - pub fn ocs(&self) -> OCS_R { - OCS_R::new(((self.bits >> 4) & 7) as u8) + pub fn ocs(&self) -> OcsR { + OcsR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 7 - Status Flag for ETLx"] #[inline(always)] - pub fn fl(&self) -> FL_R { - FL_R::new(((self.bits >> 7) & 1) != 0) + pub fn fl(&self) -> FlR { + FlR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Input Source Select for ERSx"] #[inline(always)] - pub fn ss(&self) -> SS_R { - SS_R::new(((self.bits >> 8) & 3) as u8) + pub fn ss(&self) -> SsR { + SsR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Input A Negation Select for ERSx"] #[inline(always)] - pub fn na(&self) -> NA_R { - NA_R::new(((self.bits >> 10) & 1) != 0) + pub fn na(&self) -> NaR { + NaR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Input B Negation Select for ERSx"] #[inline(always)] - pub fn nb(&self) -> NB_R { - NB_R::new(((self.bits >> 11) & 1) != 0) + pub fn nb(&self) -> NbR { + NbR::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PE_W { - PE_W::new(self, 0) + pub fn pe(&mut self) -> PeW { + PeW::new(self, 0) } #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"] #[inline(always)] #[must_use] - pub fn ld(&mut self) -> LD_W { - LD_W::new(self, 1) + pub fn ld(&mut self) -> LdW { + LdW::new(self, 1) } #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"] #[inline(always)] #[must_use] - pub fn re(&mut self) -> RE_W { - RE_W::new(self, 2) + pub fn re(&mut self) -> ReW { + ReW::new(self, 2) } #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FE_W { - FE_W::new(self, 3) + pub fn fe(&mut self) -> FeW { + FeW::new(self, 3) } #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"] #[inline(always)] #[must_use] - pub fn ocs(&mut self) -> OCS_W { - OCS_W::new(self, 4) + pub fn ocs(&mut self) -> OcsW { + OcsW::new(self, 4) } #[doc = "Bit 7 - Status Flag for ETLx"] #[inline(always)] #[must_use] - pub fn fl(&mut self) -> FL_W { - FL_W::new(self, 7) + pub fn fl(&mut self) -> FlW { + FlW::new(self, 7) } #[doc = "Bits 8:9 - Input Source Select for ERSx"] #[inline(always)] #[must_use] - pub fn ss(&mut self) -> SS_W { - SS_W::new(self, 8) + pub fn ss(&mut self) -> SsW { + SsW::new(self, 8) } #[doc = "Bit 10 - Input A Negation Select for ERSx"] #[inline(always)] #[must_use] - pub fn na(&mut self) -> NA_W { - NA_W::new(self, 10) + pub fn na(&mut self) -> NaW { + NaW::new(self, 10) } #[doc = "Bit 11 - Input B Negation Select for ERSx"] #[inline(always)] #[must_use] - pub fn nb(&mut self) -> NB_W { - NB_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nb(&mut self) -> NbW { + NbW::new(self, 11) } } #[doc = "Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EXICON_SPEC; -impl crate::RegisterSpec for EXICON_SPEC { +pub struct ExiconSpec; +impl crate::RegisterSpec for ExiconSpec { type Ux = u32; } #[doc = "`read()` method returns [`exicon::R`](R) reader structure"] -impl crate::Readable for EXICON_SPEC {} +impl crate::Readable for ExiconSpec {} #[doc = "`write(|w| ..)` method takes [`exicon::W`](W) writer structure"] -impl crate::Writable for EXICON_SPEC { +impl crate::Writable for ExiconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXICON[%s] to value 0"] -impl crate::Resettable for EXICON_SPEC { +impl crate::Resettable for ExiconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eru0/exisel.rs b/src/eru0/exisel.rs index e067e66c..51453851 100644 --- a/src/eru0/exisel.rs +++ b/src/eru0/exisel.rs @@ -1,67 +1,67 @@ #[doc = "Register `EXISEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXISEL` writer"] -pub type W = crate::W; -#[doc = "Field `EXS0A` reader - Event Source Select for A0 (ERS0)"] -pub type EXS0A_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Event Source Select for A0 (ERS0)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS0A_A { +pub enum Exs0a { #[doc = "0: Input ERU_0A0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_0A1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_0A2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_0A3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS0A_A) -> Self { + fn from(variant: Exs0a) -> Self { variant as _ } } -impl crate::FieldSpec for EXS0A_A { +impl crate::FieldSpec for Exs0a { type Ux = u8; } -impl EXS0A_R { +#[doc = "Field `EXS0A` reader - Event Source Select for A0 (ERS0)"] +pub type Exs0aR = crate::FieldReader; +impl Exs0aR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS0A_A { + pub const fn variant(&self) -> Exs0a { match self.bits { - 0 => EXS0A_A::VALUE1, - 1 => EXS0A_A::VALUE2, - 2 => EXS0A_A::VALUE3, - 3 => EXS0A_A::VALUE4, + 0 => Exs0a::Value1, + 1 => Exs0a::Value2, + 2 => Exs0a::Value3, + 3 => Exs0a::Value4, _ => unreachable!(), } } #[doc = "Input ERU_0A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS0A_A::VALUE1 + *self == Exs0a::Value1 } #[doc = "Input ERU_0A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS0A_A::VALUE2 + *self == Exs0a::Value2 } #[doc = "Input ERU_0A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS0A_A::VALUE3 + *self == Exs0a::Value3 } #[doc = "Input ERU_0A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS0A_A::VALUE4 + *self == Exs0a::Value4 } } #[doc = "Field `EXS0A` writer - Event Source Select for A0 (ERS0)"] -pub type EXS0A_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS0A_A>; -impl<'a, REG> EXS0A_W<'a, REG> +pub type Exs0aW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs0a>; +impl<'a, REG> Exs0aW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Input ERU_0A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS0A_A::VALUE1) + self.variant(Exs0a::Value1) } #[doc = "Input ERU_0A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS0A_A::VALUE2) + self.variant(Exs0a::Value2) } #[doc = "Input ERU_0A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS0A_A::VALUE3) + self.variant(Exs0a::Value3) } #[doc = "Input ERU_0A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS0A_A::VALUE4) + self.variant(Exs0a::Value4) } } -#[doc = "Field `EXS0B` reader - Event Source Select for B0 (ERS0)"] -pub type EXS0B_R = crate::FieldReader; #[doc = "Event Source Select for B0 (ERS0)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS0B_A { +pub enum Exs0b { #[doc = "0: Input ERU_0B0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_0B1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_0B2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_0B3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS0B_A) -> Self { + fn from(variant: Exs0b) -> Self { variant as _ } } -impl crate::FieldSpec for EXS0B_A { +impl crate::FieldSpec for Exs0b { type Ux = u8; } -impl EXS0B_R { +#[doc = "Field `EXS0B` reader - Event Source Select for B0 (ERS0)"] +pub type Exs0bR = crate::FieldReader; +impl Exs0bR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS0B_A { + pub const fn variant(&self) -> Exs0b { match self.bits { - 0 => EXS0B_A::VALUE1, - 1 => EXS0B_A::VALUE2, - 2 => EXS0B_A::VALUE3, - 3 => EXS0B_A::VALUE4, + 0 => Exs0b::Value1, + 1 => Exs0b::Value2, + 2 => Exs0b::Value3, + 3 => Exs0b::Value4, _ => unreachable!(), } } #[doc = "Input ERU_0B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS0B_A::VALUE1 + *self == Exs0b::Value1 } #[doc = "Input ERU_0B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS0B_A::VALUE2 + *self == Exs0b::Value2 } #[doc = "Input ERU_0B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS0B_A::VALUE3 + *self == Exs0b::Value3 } #[doc = "Input ERU_0B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS0B_A::VALUE4 + *self == Exs0b::Value4 } } #[doc = "Field `EXS0B` writer - Event Source Select for B0 (ERS0)"] -pub type EXS0B_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS0B_A>; -impl<'a, REG> EXS0B_W<'a, REG> +pub type Exs0bW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs0b>; +impl<'a, REG> Exs0bW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Input ERU_0B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS0B_A::VALUE1) + self.variant(Exs0b::Value1) } #[doc = "Input ERU_0B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS0B_A::VALUE2) + self.variant(Exs0b::Value2) } #[doc = "Input ERU_0B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS0B_A::VALUE3) + self.variant(Exs0b::Value3) } #[doc = "Input ERU_0B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS0B_A::VALUE4) + self.variant(Exs0b::Value4) } } -#[doc = "Field `EXS1A` reader - Event Source Select for A1 (ERS1)"] -pub type EXS1A_R = crate::FieldReader; #[doc = "Event Source Select for A1 (ERS1)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS1A_A { +pub enum Exs1a { #[doc = "0: Input ERU_1A0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_1A1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_1A2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_1A3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS1A_A) -> Self { + fn from(variant: Exs1a) -> Self { variant as _ } } -impl crate::FieldSpec for EXS1A_A { +impl crate::FieldSpec for Exs1a { type Ux = u8; } -impl EXS1A_R { +#[doc = "Field `EXS1A` reader - Event Source Select for A1 (ERS1)"] +pub type Exs1aR = crate::FieldReader; +impl Exs1aR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS1A_A { + pub const fn variant(&self) -> Exs1a { match self.bits { - 0 => EXS1A_A::VALUE1, - 1 => EXS1A_A::VALUE2, - 2 => EXS1A_A::VALUE3, - 3 => EXS1A_A::VALUE4, + 0 => Exs1a::Value1, + 1 => Exs1a::Value2, + 2 => Exs1a::Value3, + 3 => Exs1a::Value4, _ => unreachable!(), } } #[doc = "Input ERU_1A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS1A_A::VALUE1 + *self == Exs1a::Value1 } #[doc = "Input ERU_1A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS1A_A::VALUE2 + *self == Exs1a::Value2 } #[doc = "Input ERU_1A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS1A_A::VALUE3 + *self == Exs1a::Value3 } #[doc = "Input ERU_1A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS1A_A::VALUE4 + *self == Exs1a::Value4 } } #[doc = "Field `EXS1A` writer - Event Source Select for A1 (ERS1)"] -pub type EXS1A_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS1A_A>; -impl<'a, REG> EXS1A_W<'a, REG> +pub type Exs1aW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs1a>; +impl<'a, REG> Exs1aW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Input ERU_1A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS1A_A::VALUE1) + self.variant(Exs1a::Value1) } #[doc = "Input ERU_1A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS1A_A::VALUE2) + self.variant(Exs1a::Value2) } #[doc = "Input ERU_1A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS1A_A::VALUE3) + self.variant(Exs1a::Value3) } #[doc = "Input ERU_1A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS1A_A::VALUE4) + self.variant(Exs1a::Value4) } } -#[doc = "Field `EXS1B` reader - Event Source Select for B1 (ERS1)"] -pub type EXS1B_R = crate::FieldReader; #[doc = "Event Source Select for B1 (ERS1)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS1B_A { +pub enum Exs1b { #[doc = "0: Input ERU_1B0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_1B1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_1B2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_1B3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS1B_A) -> Self { + fn from(variant: Exs1b) -> Self { variant as _ } } -impl crate::FieldSpec for EXS1B_A { +impl crate::FieldSpec for Exs1b { type Ux = u8; } -impl EXS1B_R { +#[doc = "Field `EXS1B` reader - Event Source Select for B1 (ERS1)"] +pub type Exs1bR = crate::FieldReader; +impl Exs1bR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS1B_A { + pub const fn variant(&self) -> Exs1b { match self.bits { - 0 => EXS1B_A::VALUE1, - 1 => EXS1B_A::VALUE2, - 2 => EXS1B_A::VALUE3, - 3 => EXS1B_A::VALUE4, + 0 => Exs1b::Value1, + 1 => Exs1b::Value2, + 2 => Exs1b::Value3, + 3 => Exs1b::Value4, _ => unreachable!(), } } #[doc = "Input ERU_1B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS1B_A::VALUE1 + *self == Exs1b::Value1 } #[doc = "Input ERU_1B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS1B_A::VALUE2 + *self == Exs1b::Value2 } #[doc = "Input ERU_1B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS1B_A::VALUE3 + *self == Exs1b::Value3 } #[doc = "Input ERU_1B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS1B_A::VALUE4 + *self == Exs1b::Value4 } } #[doc = "Field `EXS1B` writer - Event Source Select for B1 (ERS1)"] -pub type EXS1B_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS1B_A>; -impl<'a, REG> EXS1B_W<'a, REG> +pub type Exs1bW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs1b>; +impl<'a, REG> Exs1bW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Input ERU_1B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS1B_A::VALUE1) + self.variant(Exs1b::Value1) } #[doc = "Input ERU_1B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS1B_A::VALUE2) + self.variant(Exs1b::Value2) } #[doc = "Input ERU_1B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS1B_A::VALUE3) + self.variant(Exs1b::Value3) } #[doc = "Input ERU_1B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS1B_A::VALUE4) + self.variant(Exs1b::Value4) } } -#[doc = "Field `EXS2A` reader - Event Source Select for A2 (ERS2)"] -pub type EXS2A_R = crate::FieldReader; #[doc = "Event Source Select for A2 (ERS2)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS2A_A { +pub enum Exs2a { #[doc = "0: Input ERU_2A0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_2A1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_2A2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_2A3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS2A_A) -> Self { + fn from(variant: Exs2a) -> Self { variant as _ } } -impl crate::FieldSpec for EXS2A_A { +impl crate::FieldSpec for Exs2a { type Ux = u8; } -impl EXS2A_R { +#[doc = "Field `EXS2A` reader - Event Source Select for A2 (ERS2)"] +pub type Exs2aR = crate::FieldReader; +impl Exs2aR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS2A_A { + pub const fn variant(&self) -> Exs2a { match self.bits { - 0 => EXS2A_A::VALUE1, - 1 => EXS2A_A::VALUE2, - 2 => EXS2A_A::VALUE3, - 3 => EXS2A_A::VALUE4, + 0 => Exs2a::Value1, + 1 => Exs2a::Value2, + 2 => Exs2a::Value3, + 3 => Exs2a::Value4, _ => unreachable!(), } } #[doc = "Input ERU_2A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS2A_A::VALUE1 + *self == Exs2a::Value1 } #[doc = "Input ERU_2A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS2A_A::VALUE2 + *self == Exs2a::Value2 } #[doc = "Input ERU_2A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS2A_A::VALUE3 + *self == Exs2a::Value3 } #[doc = "Input ERU_2A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS2A_A::VALUE4 + *self == Exs2a::Value4 } } #[doc = "Field `EXS2A` writer - Event Source Select for A2 (ERS2)"] -pub type EXS2A_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS2A_A>; -impl<'a, REG> EXS2A_W<'a, REG> +pub type Exs2aW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs2a>; +impl<'a, REG> Exs2aW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Input ERU_2A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS2A_A::VALUE1) + self.variant(Exs2a::Value1) } #[doc = "Input ERU_2A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS2A_A::VALUE2) + self.variant(Exs2a::Value2) } #[doc = "Input ERU_2A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS2A_A::VALUE3) + self.variant(Exs2a::Value3) } #[doc = "Input ERU_2A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS2A_A::VALUE4) + self.variant(Exs2a::Value4) } } -#[doc = "Field `EXS2B` reader - Event Source Select for B2 (ERS2)"] -pub type EXS2B_R = crate::FieldReader; #[doc = "Event Source Select for B2 (ERS2)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS2B_A { +pub enum Exs2b { #[doc = "0: Input ERU_2B0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_2B1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_2B2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_2B3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS2B_A) -> Self { + fn from(variant: Exs2b) -> Self { variant as _ } } -impl crate::FieldSpec for EXS2B_A { +impl crate::FieldSpec for Exs2b { type Ux = u8; } -impl EXS2B_R { +#[doc = "Field `EXS2B` reader - Event Source Select for B2 (ERS2)"] +pub type Exs2bR = crate::FieldReader; +impl Exs2bR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS2B_A { + pub const fn variant(&self) -> Exs2b { match self.bits { - 0 => EXS2B_A::VALUE1, - 1 => EXS2B_A::VALUE2, - 2 => EXS2B_A::VALUE3, - 3 => EXS2B_A::VALUE4, + 0 => Exs2b::Value1, + 1 => Exs2b::Value2, + 2 => Exs2b::Value3, + 3 => Exs2b::Value4, _ => unreachable!(), } } #[doc = "Input ERU_2B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS2B_A::VALUE1 + *self == Exs2b::Value1 } #[doc = "Input ERU_2B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS2B_A::VALUE2 + *self == Exs2b::Value2 } #[doc = "Input ERU_2B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS2B_A::VALUE3 + *self == Exs2b::Value3 } #[doc = "Input ERU_2B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS2B_A::VALUE4 + *self == Exs2b::Value4 } } #[doc = "Field `EXS2B` writer - Event Source Select for B2 (ERS2)"] -pub type EXS2B_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS2B_A>; -impl<'a, REG> EXS2B_W<'a, REG> +pub type Exs2bW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs2b>; +impl<'a, REG> Exs2bW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Input ERU_2B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS2B_A::VALUE1) + self.variant(Exs2b::Value1) } #[doc = "Input ERU_2B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS2B_A::VALUE2) + self.variant(Exs2b::Value2) } #[doc = "Input ERU_2B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS2B_A::VALUE3) + self.variant(Exs2b::Value3) } #[doc = "Input ERU_2B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS2B_A::VALUE4) + self.variant(Exs2b::Value4) } } -#[doc = "Field `EXS3A` reader - Event Source Select for A3 (ERS3)"] -pub type EXS3A_R = crate::FieldReader; #[doc = "Event Source Select for A3 (ERS3)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS3A_A { +pub enum Exs3a { #[doc = "0: Input ERU_3A0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_3A1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_3A2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_3A3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS3A_A) -> Self { + fn from(variant: Exs3a) -> Self { variant as _ } } -impl crate::FieldSpec for EXS3A_A { +impl crate::FieldSpec for Exs3a { type Ux = u8; } -impl EXS3A_R { +#[doc = "Field `EXS3A` reader - Event Source Select for A3 (ERS3)"] +pub type Exs3aR = crate::FieldReader; +impl Exs3aR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS3A_A { + pub const fn variant(&self) -> Exs3a { match self.bits { - 0 => EXS3A_A::VALUE1, - 1 => EXS3A_A::VALUE2, - 2 => EXS3A_A::VALUE3, - 3 => EXS3A_A::VALUE4, + 0 => Exs3a::Value1, + 1 => Exs3a::Value2, + 2 => Exs3a::Value3, + 3 => Exs3a::Value4, _ => unreachable!(), } } #[doc = "Input ERU_3A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS3A_A::VALUE1 + *self == Exs3a::Value1 } #[doc = "Input ERU_3A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS3A_A::VALUE2 + *self == Exs3a::Value2 } #[doc = "Input ERU_3A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS3A_A::VALUE3 + *self == Exs3a::Value3 } #[doc = "Input ERU_3A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS3A_A::VALUE4 + *self == Exs3a::Value4 } } #[doc = "Field `EXS3A` writer - Event Source Select for A3 (ERS3)"] -pub type EXS3A_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS3A_A>; -impl<'a, REG> EXS3A_W<'a, REG> +pub type Exs3aW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs3a>; +impl<'a, REG> Exs3aW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Input ERU_3A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS3A_A::VALUE1) + self.variant(Exs3a::Value1) } #[doc = "Input ERU_3A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS3A_A::VALUE2) + self.variant(Exs3a::Value2) } #[doc = "Input ERU_3A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS3A_A::VALUE3) + self.variant(Exs3a::Value3) } #[doc = "Input ERU_3A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS3A_A::VALUE4) + self.variant(Exs3a::Value4) } } -#[doc = "Field `EXS3B` reader - Event Source Select for B3 (ERS3)"] -pub type EXS3B_R = crate::FieldReader; #[doc = "Event Source Select for B3 (ERS3)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EXS3B_A { +pub enum Exs3b { #[doc = "0: Input ERU_3B0 is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_3B1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_3B2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_3B3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EXS3B_A) -> Self { + fn from(variant: Exs3b) -> Self { variant as _ } } -impl crate::FieldSpec for EXS3B_A { +impl crate::FieldSpec for Exs3b { type Ux = u8; } -impl EXS3B_R { +#[doc = "Field `EXS3B` reader - Event Source Select for B3 (ERS3)"] +pub type Exs3bR = crate::FieldReader; +impl Exs3bR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXS3B_A { + pub const fn variant(&self) -> Exs3b { match self.bits { - 0 => EXS3B_A::VALUE1, - 1 => EXS3B_A::VALUE2, - 2 => EXS3B_A::VALUE3, - 3 => EXS3B_A::VALUE4, + 0 => Exs3b::Value1, + 1 => Exs3b::Value2, + 2 => Exs3b::Value3, + 3 => Exs3b::Value4, _ => unreachable!(), } } #[doc = "Input ERU_3B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXS3B_A::VALUE1 + *self == Exs3b::Value1 } #[doc = "Input ERU_3B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXS3B_A::VALUE2 + *self == Exs3b::Value2 } #[doc = "Input ERU_3B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EXS3B_A::VALUE3 + *self == Exs3b::Value3 } #[doc = "Input ERU_3B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EXS3B_A::VALUE4 + *self == Exs3b::Value4 } } #[doc = "Field `EXS3B` writer - Event Source Select for B3 (ERS3)"] -pub type EXS3B_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EXS3B_A>; -impl<'a, REG> EXS3B_W<'a, REG> +pub type Exs3bW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Exs3b>; +impl<'a, REG> Exs3bW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,139 +664,130 @@ where #[doc = "Input ERU_3B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXS3B_A::VALUE1) + self.variant(Exs3b::Value1) } #[doc = "Input ERU_3B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXS3B_A::VALUE2) + self.variant(Exs3b::Value2) } #[doc = "Input ERU_3B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EXS3B_A::VALUE3) + self.variant(Exs3b::Value3) } #[doc = "Input ERU_3B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EXS3B_A::VALUE4) + self.variant(Exs3b::Value4) } } impl R { #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"] #[inline(always)] - pub fn exs0a(&self) -> EXS0A_R { - EXS0A_R::new((self.bits & 3) as u8) + pub fn exs0a(&self) -> Exs0aR { + Exs0aR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"] #[inline(always)] - pub fn exs0b(&self) -> EXS0B_R { - EXS0B_R::new(((self.bits >> 2) & 3) as u8) + pub fn exs0b(&self) -> Exs0bR { + Exs0bR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"] #[inline(always)] - pub fn exs1a(&self) -> EXS1A_R { - EXS1A_R::new(((self.bits >> 4) & 3) as u8) + pub fn exs1a(&self) -> Exs1aR { + Exs1aR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"] #[inline(always)] - pub fn exs1b(&self) -> EXS1B_R { - EXS1B_R::new(((self.bits >> 6) & 3) as u8) + pub fn exs1b(&self) -> Exs1bR { + Exs1bR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"] #[inline(always)] - pub fn exs2a(&self) -> EXS2A_R { - EXS2A_R::new(((self.bits >> 8) & 3) as u8) + pub fn exs2a(&self) -> Exs2aR { + Exs2aR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"] #[inline(always)] - pub fn exs2b(&self) -> EXS2B_R { - EXS2B_R::new(((self.bits >> 10) & 3) as u8) + pub fn exs2b(&self) -> Exs2bR { + Exs2bR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"] #[inline(always)] - pub fn exs3a(&self) -> EXS3A_R { - EXS3A_R::new(((self.bits >> 12) & 3) as u8) + pub fn exs3a(&self) -> Exs3aR { + Exs3aR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"] #[inline(always)] - pub fn exs3b(&self) -> EXS3B_R { - EXS3B_R::new(((self.bits >> 14) & 3) as u8) + pub fn exs3b(&self) -> Exs3bR { + Exs3bR::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"] #[inline(always)] #[must_use] - pub fn exs0a(&mut self) -> EXS0A_W { - EXS0A_W::new(self, 0) + pub fn exs0a(&mut self) -> Exs0aW { + Exs0aW::new(self, 0) } #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"] #[inline(always)] #[must_use] - pub fn exs0b(&mut self) -> EXS0B_W { - EXS0B_W::new(self, 2) + pub fn exs0b(&mut self) -> Exs0bW { + Exs0bW::new(self, 2) } #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"] #[inline(always)] #[must_use] - pub fn exs1a(&mut self) -> EXS1A_W { - EXS1A_W::new(self, 4) + pub fn exs1a(&mut self) -> Exs1aW { + Exs1aW::new(self, 4) } #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"] #[inline(always)] #[must_use] - pub fn exs1b(&mut self) -> EXS1B_W { - EXS1B_W::new(self, 6) + pub fn exs1b(&mut self) -> Exs1bW { + Exs1bW::new(self, 6) } #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"] #[inline(always)] #[must_use] - pub fn exs2a(&mut self) -> EXS2A_W { - EXS2A_W::new(self, 8) + pub fn exs2a(&mut self) -> Exs2aW { + Exs2aW::new(self, 8) } #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"] #[inline(always)] #[must_use] - pub fn exs2b(&mut self) -> EXS2B_W { - EXS2B_W::new(self, 10) + pub fn exs2b(&mut self) -> Exs2bW { + Exs2bW::new(self, 10) } #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"] #[inline(always)] #[must_use] - pub fn exs3a(&mut self) -> EXS3A_W { - EXS3A_W::new(self, 12) + pub fn exs3a(&mut self) -> Exs3aW { + Exs3aW::new(self, 12) } #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"] #[inline(always)] #[must_use] - pub fn exs3b(&mut self) -> EXS3B_W { - EXS3B_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn exs3b(&mut self) -> Exs3bW { + Exs3bW::new(self, 14) } } #[doc = "Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EXISEL_SPEC; -impl crate::RegisterSpec for EXISEL_SPEC { +pub struct ExiselSpec; +impl crate::RegisterSpec for ExiselSpec { type Ux = u32; } #[doc = "`read()` method returns [`exisel::R`](R) reader structure"] -impl crate::Readable for EXISEL_SPEC {} +impl crate::Readable for ExiselSpec {} #[doc = "`write(|w| ..)` method takes [`exisel::W`](W) writer structure"] -impl crate::Writable for EXISEL_SPEC { +impl crate::Writable for ExiselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXISEL to value 0"] -impl crate::Resettable for EXISEL_SPEC { +impl crate::Resettable for ExiselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eru0/exocon.rs b/src/eru0/exocon.rs index f060e1d5..8a60f367 100644 --- a/src/eru0/exocon.rs +++ b/src/eru0/exocon.rs @@ -1,67 +1,67 @@ #[doc = "Register `EXOCON[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXOCON[%s]` writer"] -pub type W = crate::W; -#[doc = "Field `ISS` reader - Internal Trigger Source Selection"] -pub type ISS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Internal Trigger Source Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ISS_A { +pub enum Iss { #[doc = "0: The peripheral trigger function is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input ERU_OGUy1 is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input ERU_OGUy2 is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input ERU_OGUy3 is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ISS_A) -> Self { + fn from(variant: Iss) -> Self { variant as _ } } -impl crate::FieldSpec for ISS_A { +impl crate::FieldSpec for Iss { type Ux = u8; } -impl ISS_R { +#[doc = "Field `ISS` reader - Internal Trigger Source Selection"] +pub type IssR = crate::FieldReader; +impl IssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ISS_A { + pub const fn variant(&self) -> Iss { match self.bits { - 0 => ISS_A::VALUE1, - 1 => ISS_A::VALUE2, - 2 => ISS_A::VALUE3, - 3 => ISS_A::VALUE4, + 0 => Iss::Value1, + 1 => Iss::Value2, + 2 => Iss::Value3, + 3 => Iss::Value4, _ => unreachable!(), } } #[doc = "The peripheral trigger function is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ISS_A::VALUE1 + *self == Iss::Value1 } #[doc = "Input ERU_OGUy1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ISS_A::VALUE2 + *self == Iss::Value2 } #[doc = "Input ERU_OGUy2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ISS_A::VALUE3 + *self == Iss::Value3 } #[doc = "Input ERU_OGUy3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ISS_A::VALUE4 + *self == Iss::Value4 } } #[doc = "Field `ISS` writer - Internal Trigger Source Selection"] -pub type ISS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ISS_A>; -impl<'a, REG> ISS_W<'a, REG> +pub type IssW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Iss>; +impl<'a, REG> IssW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,173 +69,173 @@ where #[doc = "The peripheral trigger function is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ISS_A::VALUE1) + self.variant(Iss::Value1) } #[doc = "Input ERU_OGUy1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ISS_A::VALUE2) + self.variant(Iss::Value2) } #[doc = "Input ERU_OGUy2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ISS_A::VALUE3) + self.variant(Iss::Value3) } #[doc = "Input ERU_OGUy3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ISS_A::VALUE4) + self.variant(Iss::Value4) } } -#[doc = "Field `GEEN` reader - Gating Event Enable"] -pub type GEEN_R = crate::BitReader; #[doc = "Gating Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GEEN_A { +pub enum Geen { #[doc = "0: The event detection is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The event detection is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GEEN_A) -> Self { + fn from(variant: Geen) -> Self { variant as u8 != 0 } } -impl GEEN_R { +#[doc = "Field `GEEN` reader - Gating Event Enable"] +pub type GeenR = crate::BitReader; +impl GeenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GEEN_A { + pub const fn variant(&self) -> Geen { match self.bits { - false => GEEN_A::VALUE1, - true => GEEN_A::VALUE2, + false => Geen::Value1, + true => Geen::Value2, } } #[doc = "The event detection is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GEEN_A::VALUE1 + *self == Geen::Value1 } #[doc = "The event detection is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GEEN_A::VALUE2 + *self == Geen::Value2 } } #[doc = "Field `GEEN` writer - Gating Event Enable"] -pub type GEEN_W<'a, REG> = crate::BitWriter<'a, REG, GEEN_A>; -impl<'a, REG> GEEN_W<'a, REG> +pub type GeenW<'a, REG> = crate::BitWriter<'a, REG, Geen>; +impl<'a, REG> GeenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The event detection is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GEEN_A::VALUE1) + self.variant(Geen::Value1) } #[doc = "The event detection is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GEEN_A::VALUE2) + self.variant(Geen::Value2) } } -#[doc = "Field `PDR` reader - Pattern Detection Result Flag"] -pub type PDR_R = crate::BitReader; #[doc = "Pattern Detection Result Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDR_A { +pub enum Pdr { #[doc = "0: A pattern miss is detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A pattern match is detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDR_A) -> Self { + fn from(variant: Pdr) -> Self { variant as u8 != 0 } } -impl PDR_R { +#[doc = "Field `PDR` reader - Pattern Detection Result Flag"] +pub type PdrR = crate::BitReader; +impl PdrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDR_A { + pub const fn variant(&self) -> Pdr { match self.bits { - false => PDR_A::VALUE1, - true => PDR_A::VALUE2, + false => Pdr::Value1, + true => Pdr::Value2, } } #[doc = "A pattern miss is detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDR_A::VALUE1 + *self == Pdr::Value1 } #[doc = "A pattern match is detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDR_A::VALUE2 + *self == Pdr::Value2 } } -#[doc = "Field `GP` reader - Gating Selection for Pattern Detection Result"] -pub type GP_R = crate::FieldReader; #[doc = "Gating Selection for Pattern Detection Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum GP_A { +pub enum Gp { #[doc = "0: ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: GP_A) -> Self { + fn from(variant: Gp) -> Self { variant as _ } } -impl crate::FieldSpec for GP_A { +impl crate::FieldSpec for Gp { type Ux = u8; } -impl GP_R { +#[doc = "Field `GP` reader - Gating Selection for Pattern Detection Result"] +pub type GpR = crate::FieldReader; +impl GpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GP_A { + pub const fn variant(&self) -> Gp { match self.bits { - 0 => GP_A::VALUE1, - 1 => GP_A::VALUE2, - 2 => GP_A::VALUE3, - 3 => GP_A::VALUE4, + 0 => Gp::Value1, + 1 => Gp::Value2, + 2 => Gp::Value3, + 3 => Gp::Value4, _ => unreachable!(), } } #[doc = "ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GP_A::VALUE1 + *self == Gp::Value1 } #[doc = "ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GP_A::VALUE2 + *self == Gp::Value2 } #[doc = "ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == GP_A::VALUE3 + *self == Gp::Value3 } #[doc = "ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == GP_A::VALUE4 + *self == Gp::Value4 } } #[doc = "Field `GP` writer - Gating Selection for Pattern Detection Result"] -pub type GP_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, GP_A>; -impl<'a, REG> GP_W<'a, REG> +pub type GpW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Gp>; +impl<'a, REG> GpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -243,346 +243,337 @@ where #[doc = "ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GP_A::VALUE1) + self.variant(Gp::Value1) } #[doc = "ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GP_A::VALUE2) + self.variant(Gp::Value2) } #[doc = "ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(GP_A::VALUE3) + self.variant(Gp::Value3) } #[doc = "ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(GP_A::VALUE4) + self.variant(Gp::Value4) } } -#[doc = "Field `IPEN0` reader - Pattern Detection Enable for ETL0"] -pub type IPEN0_R = crate::BitReader; #[doc = "Pattern Detection Enable for ETL0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IPEN0_A { +pub enum Ipen0 { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IPEN0_A) -> Self { + fn from(variant: Ipen0) -> Self { variant as u8 != 0 } } -impl IPEN0_R { +#[doc = "Field `IPEN0` reader - Pattern Detection Enable for ETL0"] +pub type Ipen0R = crate::BitReader; +impl Ipen0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IPEN0_A { + pub const fn variant(&self) -> Ipen0 { match self.bits { - false => IPEN0_A::VALUE1, - true => IPEN0_A::VALUE2, + false => Ipen0::Value1, + true => Ipen0::Value2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IPEN0_A::VALUE1 + *self == Ipen0::Value1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IPEN0_A::VALUE2 + *self == Ipen0::Value2 } } #[doc = "Field `IPEN0` writer - Pattern Detection Enable for ETL0"] -pub type IPEN0_W<'a, REG> = crate::BitWriter<'a, REG, IPEN0_A>; -impl<'a, REG> IPEN0_W<'a, REG> +pub type Ipen0W<'a, REG> = crate::BitWriter<'a, REG, Ipen0>; +impl<'a, REG> Ipen0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IPEN0_A::VALUE1) + self.variant(Ipen0::Value1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IPEN0_A::VALUE2) + self.variant(Ipen0::Value2) } } -#[doc = "Field `IPEN1` reader - Pattern Detection Enable for ETL1"] -pub type IPEN1_R = crate::BitReader; #[doc = "Pattern Detection Enable for ETL1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IPEN1_A { +pub enum Ipen1 { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IPEN1_A) -> Self { + fn from(variant: Ipen1) -> Self { variant as u8 != 0 } } -impl IPEN1_R { +#[doc = "Field `IPEN1` reader - Pattern Detection Enable for ETL1"] +pub type Ipen1R = crate::BitReader; +impl Ipen1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IPEN1_A { + pub const fn variant(&self) -> Ipen1 { match self.bits { - false => IPEN1_A::VALUE1, - true => IPEN1_A::VALUE2, + false => Ipen1::Value1, + true => Ipen1::Value2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IPEN1_A::VALUE1 + *self == Ipen1::Value1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IPEN1_A::VALUE2 + *self == Ipen1::Value2 } } #[doc = "Field `IPEN1` writer - Pattern Detection Enable for ETL1"] -pub type IPEN1_W<'a, REG> = crate::BitWriter<'a, REG, IPEN1_A>; -impl<'a, REG> IPEN1_W<'a, REG> +pub type Ipen1W<'a, REG> = crate::BitWriter<'a, REG, Ipen1>; +impl<'a, REG> Ipen1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IPEN1_A::VALUE1) + self.variant(Ipen1::Value1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IPEN1_A::VALUE2) + self.variant(Ipen1::Value2) } } -#[doc = "Field `IPEN2` reader - Pattern Detection Enable for ETL2"] -pub type IPEN2_R = crate::BitReader; #[doc = "Pattern Detection Enable for ETL2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IPEN2_A { +pub enum Ipen2 { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IPEN2_A) -> Self { + fn from(variant: Ipen2) -> Self { variant as u8 != 0 } } -impl IPEN2_R { +#[doc = "Field `IPEN2` reader - Pattern Detection Enable for ETL2"] +pub type Ipen2R = crate::BitReader; +impl Ipen2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IPEN2_A { + pub const fn variant(&self) -> Ipen2 { match self.bits { - false => IPEN2_A::VALUE1, - true => IPEN2_A::VALUE2, + false => Ipen2::Value1, + true => Ipen2::Value2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IPEN2_A::VALUE1 + *self == Ipen2::Value1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IPEN2_A::VALUE2 + *self == Ipen2::Value2 } } #[doc = "Field `IPEN2` writer - Pattern Detection Enable for ETL2"] -pub type IPEN2_W<'a, REG> = crate::BitWriter<'a, REG, IPEN2_A>; -impl<'a, REG> IPEN2_W<'a, REG> +pub type Ipen2W<'a, REG> = crate::BitWriter<'a, REG, Ipen2>; +impl<'a, REG> Ipen2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IPEN2_A::VALUE1) + self.variant(Ipen2::Value1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IPEN2_A::VALUE2) + self.variant(Ipen2::Value2) } } -#[doc = "Field `IPEN3` reader - Pattern Detection Enable for ETL3"] -pub type IPEN3_R = crate::BitReader; #[doc = "Pattern Detection Enable for ETL3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IPEN3_A { +pub enum Ipen3 { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IPEN3_A) -> Self { + fn from(variant: Ipen3) -> Self { variant as u8 != 0 } } -impl IPEN3_R { +#[doc = "Field `IPEN3` reader - Pattern Detection Enable for ETL3"] +pub type Ipen3R = crate::BitReader; +impl Ipen3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IPEN3_A { + pub const fn variant(&self) -> Ipen3 { match self.bits { - false => IPEN3_A::VALUE1, - true => IPEN3_A::VALUE2, + false => Ipen3::Value1, + true => Ipen3::Value2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IPEN3_A::VALUE1 + *self == Ipen3::Value1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IPEN3_A::VALUE2 + *self == Ipen3::Value2 } } #[doc = "Field `IPEN3` writer - Pattern Detection Enable for ETL3"] -pub type IPEN3_W<'a, REG> = crate::BitWriter<'a, REG, IPEN3_A>; -impl<'a, REG> IPEN3_W<'a, REG> +pub type Ipen3W<'a, REG> = crate::BitWriter<'a, REG, Ipen3>; +impl<'a, REG> Ipen3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IPEN3_A::VALUE1) + self.variant(Ipen3::Value1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IPEN3_A::VALUE2) + self.variant(Ipen3::Value2) } } impl R { #[doc = "Bits 0:1 - Internal Trigger Source Selection"] #[inline(always)] - pub fn iss(&self) -> ISS_R { - ISS_R::new((self.bits & 3) as u8) + pub fn iss(&self) -> IssR { + IssR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Gating Event Enable"] #[inline(always)] - pub fn geen(&self) -> GEEN_R { - GEEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn geen(&self) -> GeenR { + GeenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pattern Detection Result Flag"] #[inline(always)] - pub fn pdr(&self) -> PDR_R { - PDR_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdr(&self) -> PdrR { + PdrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"] #[inline(always)] - pub fn gp(&self) -> GP_R { - GP_R::new(((self.bits >> 4) & 3) as u8) + pub fn gp(&self) -> GpR { + GpR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 12 - Pattern Detection Enable for ETL0"] #[inline(always)] - pub fn ipen0(&self) -> IPEN0_R { - IPEN0_R::new(((self.bits >> 12) & 1) != 0) + pub fn ipen0(&self) -> Ipen0R { + Ipen0R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pattern Detection Enable for ETL1"] #[inline(always)] - pub fn ipen1(&self) -> IPEN1_R { - IPEN1_R::new(((self.bits >> 13) & 1) != 0) + pub fn ipen1(&self) -> Ipen1R { + Ipen1R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pattern Detection Enable for ETL2"] #[inline(always)] - pub fn ipen2(&self) -> IPEN2_R { - IPEN2_R::new(((self.bits >> 14) & 1) != 0) + pub fn ipen2(&self) -> Ipen2R { + Ipen2R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pattern Detection Enable for ETL3"] #[inline(always)] - pub fn ipen3(&self) -> IPEN3_R { - IPEN3_R::new(((self.bits >> 15) & 1) != 0) + pub fn ipen3(&self) -> Ipen3R { + Ipen3R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Internal Trigger Source Selection"] #[inline(always)] #[must_use] - pub fn iss(&mut self) -> ISS_W { - ISS_W::new(self, 0) + pub fn iss(&mut self) -> IssW { + IssW::new(self, 0) } #[doc = "Bit 2 - Gating Event Enable"] #[inline(always)] #[must_use] - pub fn geen(&mut self) -> GEEN_W { - GEEN_W::new(self, 2) + pub fn geen(&mut self) -> GeenW { + GeenW::new(self, 2) } #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"] #[inline(always)] #[must_use] - pub fn gp(&mut self) -> GP_W { - GP_W::new(self, 4) + pub fn gp(&mut self) -> GpW { + GpW::new(self, 4) } #[doc = "Bit 12 - Pattern Detection Enable for ETL0"] #[inline(always)] #[must_use] - pub fn ipen0(&mut self) -> IPEN0_W { - IPEN0_W::new(self, 12) + pub fn ipen0(&mut self) -> Ipen0W { + Ipen0W::new(self, 12) } #[doc = "Bit 13 - Pattern Detection Enable for ETL1"] #[inline(always)] #[must_use] - pub fn ipen1(&mut self) -> IPEN1_W { - IPEN1_W::new(self, 13) + pub fn ipen1(&mut self) -> Ipen1W { + Ipen1W::new(self, 13) } #[doc = "Bit 14 - Pattern Detection Enable for ETL2"] #[inline(always)] #[must_use] - pub fn ipen2(&mut self) -> IPEN2_W { - IPEN2_W::new(self, 14) + pub fn ipen2(&mut self) -> Ipen2W { + Ipen2W::new(self, 14) } #[doc = "Bit 15 - Pattern Detection Enable for ETL3"] #[inline(always)] #[must_use] - pub fn ipen3(&mut self) -> IPEN3_W { - IPEN3_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ipen3(&mut self) -> Ipen3W { + Ipen3W::new(self, 15) } } #[doc = "Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EXOCON_SPEC; -impl crate::RegisterSpec for EXOCON_SPEC { +pub struct ExoconSpec; +impl crate::RegisterSpec for ExoconSpec { type Ux = u32; } #[doc = "`read()` method returns [`exocon::R`](R) reader structure"] -impl crate::Readable for EXOCON_SPEC {} +impl crate::Readable for ExoconSpec {} #[doc = "`write(|w| ..)` method takes [`exocon::W`](W) writer structure"] -impl crate::Writable for EXOCON_SPEC { +impl crate::Writable for ExoconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXOCON[%s] to value 0x08"] -impl crate::Resettable for EXOCON_SPEC { +impl crate::Resettable for ExoconSpec { const RESET_VALUE: u32 = 0x08; } diff --git a/src/eth0.rs b/src/eth0.rs index b83ed79c..e7c747d0 100644 --- a/src/eth0.rs +++ b/src/eth0.rs @@ -1,1513 +1,1649 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - mac_configuration: MAC_CONFIGURATION, - mac_frame_filter: MAC_FRAME_FILTER, - hash_table_high: HASH_TABLE_HIGH, - hash_table_low: HASH_TABLE_LOW, - gmii_address: GMII_ADDRESS, - gmii_data: GMII_DATA, - flow_control: FLOW_CONTROL, - vlan_tag: VLAN_TAG, - version: VERSION, - debug: DEBUG, - remote_wake_up_frame_filter: REMOTE_WAKE_UP_FRAME_FILTER, - pmt_control_status: PMT_CONTROL_STATUS, + mac_configuration: MacConfiguration, + mac_frame_filter: MacFrameFilter, + hash_table_high: HashTableHigh, + hash_table_low: HashTableLow, + gmii_address: GmiiAddress, + gmii_data: GmiiData, + flow_control: FlowControl, + vlan_tag: VlanTag, + version: Version, + debug: Debug, + remote_wake_up_frame_filter: RemoteWakeUpFrameFilter, + pmt_control_status: PmtControlStatus, _reserved12: [u8; 0x08], - interrupt_status: INTERRUPT_STATUS, - interrupt_mask: INTERRUPT_MASK, - mac_address0_high: MAC_ADDRESS0_HIGH, - mac_address0_low: MAC_ADDRESS0_LOW, - mac_address1_high: MAC_ADDRESS1_HIGH, - mac_address1_low: MAC_ADDRESS1_LOW, - mac_address2_high: MAC_ADDRESS2_HIGH, - mac_address2_low: MAC_ADDRESS2_LOW, - mac_address3_high: MAC_ADDRESS3_HIGH, - mac_address3_low: MAC_ADDRESS3_LOW, + interrupt_status: InterruptStatus, + interrupt_mask: InterruptMask, + mac_address0_high: MacAddress0High, + mac_address0_low: MacAddress0Low, + mac_address1_high: MacAddress1High, + mac_address1_low: MacAddress1Low, + mac_address2_high: MacAddress2High, + mac_address2_low: MacAddress2Low, + mac_address3_high: MacAddress3High, + mac_address3_low: MacAddress3Low, _reserved22: [u8; 0xa0], - mmc_control: MMC_CONTROL, - mmc_receive_interrupt: MMC_RECEIVE_INTERRUPT, - mmc_transmit_interrupt: MMC_TRANSMIT_INTERRUPT, - mmc_receive_interrupt_mask: MMC_RECEIVE_INTERRUPT_MASK, - mmc_transmit_interrupt_mask: MMC_TRANSMIT_INTERRUPT_MASK, - tx_octet_count_good_bad: TX_OCTET_COUNT_GOOD_BAD, - tx_frame_count_good_bad: TX_FRAME_COUNT_GOOD_BAD, - tx_broadcast_frames_good: TX_BROADCAST_FRAMES_GOOD, - tx_multicast_frames_good: TX_MULTICAST_FRAMES_GOOD, - tx_64octets_frames_good_bad: TX_64OCTETS_FRAMES_GOOD_BAD, - tx_65to127octets_frames_good_bad: TX_65TO127OCTETS_FRAMES_GOOD_BAD, - tx_128to255octets_frames_good_bad: TX_128TO255OCTETS_FRAMES_GOOD_BAD, - tx_256to511octets_frames_good_bad: TX_256TO511OCTETS_FRAMES_GOOD_BAD, - tx_512to1023octets_frames_good_bad: TX_512TO1023OCTETS_FRAMES_GOOD_BAD, - tx_1024tomaxoctets_frames_good_bad: TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD, - tx_unicast_frames_good_bad: TX_UNICAST_FRAMES_GOOD_BAD, - tx_multicast_frames_good_bad: TX_MULTICAST_FRAMES_GOOD_BAD, - tx_broadcast_frames_good_bad: TX_BROADCAST_FRAMES_GOOD_BAD, - tx_underflow_error_frames: TX_UNDERFLOW_ERROR_FRAMES, - tx_single_collision_good_frames: TX_SINGLE_COLLISION_GOOD_FRAMES, - tx_multiple_collision_good_frames: TX_MULTIPLE_COLLISION_GOOD_FRAMES, - tx_deferred_frames: TX_DEFERRED_FRAMES, - tx_late_collision_frames: TX_LATE_COLLISION_FRAMES, - tx_excessive_collision_frames: TX_EXCESSIVE_COLLISION_FRAMES, - tx_carrier_error_frames: TX_CARRIER_ERROR_FRAMES, - tx_octet_count_good: TX_OCTET_COUNT_GOOD, - tx_frame_count_good: TX_FRAME_COUNT_GOOD, - tx_excessive_deferral_error: TX_EXCESSIVE_DEFERRAL_ERROR, - tx_pause_frames: TX_PAUSE_FRAMES, - tx_vlan_frames_good: TX_VLAN_FRAMES_GOOD, - tx_osize_frames_good: TX_OSIZE_FRAMES_GOOD, + mmc_control: MmcControl, + mmc_receive_interrupt: MmcReceiveInterrupt, + mmc_transmit_interrupt: MmcTransmitInterrupt, + mmc_receive_interrupt_mask: MmcReceiveInterruptMask, + mmc_transmit_interrupt_mask: MmcTransmitInterruptMask, + tx_octet_count_good_bad: TxOctetCountGoodBad, + tx_frame_count_good_bad: TxFrameCountGoodBad, + tx_broadcast_frames_good: TxBroadcastFramesGood, + tx_multicast_frames_good: TxMulticastFramesGood, + tx_64octets_frames_good_bad: Tx64octetsFramesGoodBad, + tx_65to127octets_frames_good_bad: Tx65to127octetsFramesGoodBad, + tx_128to255octets_frames_good_bad: Tx128to255octetsFramesGoodBad, + tx_256to511octets_frames_good_bad: Tx256to511octetsFramesGoodBad, + tx_512to1023octets_frames_good_bad: Tx512to1023octetsFramesGoodBad, + tx_1024tomaxoctets_frames_good_bad: Tx1024tomaxoctetsFramesGoodBad, + tx_unicast_frames_good_bad: TxUnicastFramesGoodBad, + tx_multicast_frames_good_bad: TxMulticastFramesGoodBad, + tx_broadcast_frames_good_bad: TxBroadcastFramesGoodBad, + tx_underflow_error_frames: TxUnderflowErrorFrames, + tx_single_collision_good_frames: TxSingleCollisionGoodFrames, + tx_multiple_collision_good_frames: TxMultipleCollisionGoodFrames, + tx_deferred_frames: TxDeferredFrames, + tx_late_collision_frames: TxLateCollisionFrames, + tx_excessive_collision_frames: TxExcessiveCollisionFrames, + tx_carrier_error_frames: TxCarrierErrorFrames, + tx_octet_count_good: TxOctetCountGood, + tx_frame_count_good: TxFrameCountGood, + tx_excessive_deferral_error: TxExcessiveDeferralError, + tx_pause_frames: TxPauseFrames, + tx_vlan_frames_good: TxVlanFramesGood, + tx_osize_frames_good: TxOsizeFramesGood, _reserved53: [u8; 0x04], - rx_frames_count_good_bad: RX_FRAMES_COUNT_GOOD_BAD, - rx_octet_count_good_bad: RX_OCTET_COUNT_GOOD_BAD, - rx_octet_count_good: RX_OCTET_COUNT_GOOD, - rx_broadcast_frames_good: RX_BROADCAST_FRAMES_GOOD, - rx_multicast_frames_good: RX_MULTICAST_FRAMES_GOOD, - rx_crc_error_frames: RX_CRC_ERROR_FRAMES, - rx_alignment_error_frames: RX_ALIGNMENT_ERROR_FRAMES, - rx_runt_error_frames: RX_RUNT_ERROR_FRAMES, - rx_jabber_error_frames: RX_JABBER_ERROR_FRAMES, - rx_undersize_frames_good: RX_UNDERSIZE_FRAMES_GOOD, - rx_oversize_frames_good: RX_OVERSIZE_FRAMES_GOOD, - rx_64octets_frames_good_bad: RX_64OCTETS_FRAMES_GOOD_BAD, - rx_65to127octets_frames_good_bad: RX_65TO127OCTETS_FRAMES_GOOD_BAD, - rx_128to255octets_frames_good_bad: RX_128TO255OCTETS_FRAMES_GOOD_BAD, - rx_256to511octets_frames_good_bad: RX_256TO511OCTETS_FRAMES_GOOD_BAD, - rx_512to1023octets_frames_good_bad: RX_512TO1023OCTETS_FRAMES_GOOD_BAD, - rx_1024tomaxoctets_frames_good_bad: RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD, - rx_unicast_frames_good: RX_UNICAST_FRAMES_GOOD, - rx_length_error_frames: RX_LENGTH_ERROR_FRAMES, - rx_out_of_range_type_frames: RX_OUT_OF_RANGE_TYPE_FRAMES, - rx_pause_frames: RX_PAUSE_FRAMES, - rx_fifo_overflow_frames: RX_FIFO_OVERFLOW_FRAMES, - rx_vlan_frames_good_bad: RX_VLAN_FRAMES_GOOD_BAD, - rx_watchdog_error_frames: RX_WATCHDOG_ERROR_FRAMES, - rx_receive_error_frames: RX_RECEIVE_ERROR_FRAMES, - rx_control_frames_good: RX_CONTROL_FRAMES_GOOD, + rx_frames_count_good_bad: RxFramesCountGoodBad, + rx_octet_count_good_bad: RxOctetCountGoodBad, + rx_octet_count_good: RxOctetCountGood, + rx_broadcast_frames_good: RxBroadcastFramesGood, + rx_multicast_frames_good: RxMulticastFramesGood, + rx_crc_error_frames: RxCrcErrorFrames, + rx_alignment_error_frames: RxAlignmentErrorFrames, + rx_runt_error_frames: RxRuntErrorFrames, + rx_jabber_error_frames: RxJabberErrorFrames, + rx_undersize_frames_good: RxUndersizeFramesGood, + rx_oversize_frames_good: RxOversizeFramesGood, + rx_64octets_frames_good_bad: Rx64octetsFramesGoodBad, + rx_65to127octets_frames_good_bad: Rx65to127octetsFramesGoodBad, + rx_128to255octets_frames_good_bad: Rx128to255octetsFramesGoodBad, + rx_256to511octets_frames_good_bad: Rx256to511octetsFramesGoodBad, + rx_512to1023octets_frames_good_bad: Rx512to1023octetsFramesGoodBad, + rx_1024tomaxoctets_frames_good_bad: Rx1024tomaxoctetsFramesGoodBad, + rx_unicast_frames_good: RxUnicastFramesGood, + rx_length_error_frames: RxLengthErrorFrames, + rx_out_of_range_type_frames: RxOutOfRangeTypeFrames, + rx_pause_frames: RxPauseFrames, + rx_fifo_overflow_frames: RxFifoOverflowFrames, + rx_vlan_frames_good_bad: RxVlanFramesGoodBad, + rx_watchdog_error_frames: RxWatchdogErrorFrames, + rx_receive_error_frames: RxReceiveErrorFrames, + rx_control_frames_good: RxControlFramesGood, _reserved79: [u8; 0x18], - mmc_ipc_receive_interrupt_mask: MMC_IPC_RECEIVE_INTERRUPT_MASK, + mmc_ipc_receive_interrupt_mask: MmcIpcReceiveInterruptMask, _reserved80: [u8; 0x04], - mmc_ipc_receive_interrupt: MMC_IPC_RECEIVE_INTERRUPT, + mmc_ipc_receive_interrupt: MmcIpcReceiveInterrupt, _reserved81: [u8; 0x04], - rxipv4_good_frames: RXIPV4_GOOD_FRAMES, - rxipv4_header_error_frames: RXIPV4_HEADER_ERROR_FRAMES, - rxipv4_no_payload_frames: RXIPV4_NO_PAYLOAD_FRAMES, - rxipv4_fragmented_frames: RXIPV4_FRAGMENTED_FRAMES, - rxipv4_udp_checksum_disabled_frames: RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES, - rxipv6_good_frames: RXIPV6_GOOD_FRAMES, - rxipv6_header_error_frames: RXIPV6_HEADER_ERROR_FRAMES, - rxipv6_no_payload_frames: RXIPV6_NO_PAYLOAD_FRAMES, - rxudp_good_frames: RXUDP_GOOD_FRAMES, - rxudp_error_frames: RXUDP_ERROR_FRAMES, - rxtcp_good_frames: RXTCP_GOOD_FRAMES, - rxtcp_error_frames: RXTCP_ERROR_FRAMES, - rxicmp_good_frames: RXICMP_GOOD_FRAMES, - rxicmp_error_frames: RXICMP_ERROR_FRAMES, + rxipv4_good_frames: Rxipv4GoodFrames, + rxipv4_header_error_frames: Rxipv4HeaderErrorFrames, + rxipv4_no_payload_frames: Rxipv4NoPayloadFrames, + rxipv4_fragmented_frames: Rxipv4FragmentedFrames, + rxipv4_udp_checksum_disabled_frames: Rxipv4UdpChecksumDisabledFrames, + rxipv6_good_frames: Rxipv6GoodFrames, + rxipv6_header_error_frames: Rxipv6HeaderErrorFrames, + rxipv6_no_payload_frames: Rxipv6NoPayloadFrames, + rxudp_good_frames: RxudpGoodFrames, + rxudp_error_frames: RxudpErrorFrames, + rxtcp_good_frames: RxtcpGoodFrames, + rxtcp_error_frames: RxtcpErrorFrames, + rxicmp_good_frames: RxicmpGoodFrames, + rxicmp_error_frames: RxicmpErrorFrames, _reserved95: [u8; 0x08], - rxipv4_good_octets: RXIPV4_GOOD_OCTETS, - rxipv4_header_error_octets: RXIPV4_HEADER_ERROR_OCTETS, - rxipv4_no_payload_octets: RXIPV4_NO_PAYLOAD_OCTETS, - rxipv4_fragmented_octets: RXIPV4_FRAGMENTED_OCTETS, - rxipv4_udp_checksum_disable_octets: RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS, - rxipv6_good_octets: RXIPV6_GOOD_OCTETS, - rxipv6_header_error_octets: RXIPV6_HEADER_ERROR_OCTETS, - rxipv6_no_payload_octets: RXIPV6_NO_PAYLOAD_OCTETS, - rxudp_good_octets: RXUDP_GOOD_OCTETS, - rxudp_error_octets: RXUDP_ERROR_OCTETS, - rxtcp_good_octets: RXTCP_GOOD_OCTETS, - rxtcp_error_octets: RXTCP_ERROR_OCTETS, - rxicmp_good_octets: RXICMP_GOOD_OCTETS, - rxicmp_error_octets: RXICMP_ERROR_OCTETS, + rxipv4_good_octets: Rxipv4GoodOctets, + rxipv4_header_error_octets: Rxipv4HeaderErrorOctets, + rxipv4_no_payload_octets: Rxipv4NoPayloadOctets, + rxipv4_fragmented_octets: Rxipv4FragmentedOctets, + rxipv4_udp_checksum_disable_octets: Rxipv4UdpChecksumDisableOctets, + rxipv6_good_octets: Rxipv6GoodOctets, + rxipv6_header_error_octets: Rxipv6HeaderErrorOctets, + rxipv6_no_payload_octets: Rxipv6NoPayloadOctets, + rxudp_good_octets: RxudpGoodOctets, + rxudp_error_octets: RxudpErrorOctets, + rxtcp_good_octets: RxtcpGoodOctets, + rxtcp_error_octets: RxtcpErrorOctets, + rxicmp_good_octets: RxicmpGoodOctets, + rxicmp_error_octets: RxicmpErrorOctets, _reserved109: [u8; 0x0478], - timestamp_control: TIMESTAMP_CONTROL, - sub_second_increment: SUB_SECOND_INCREMENT, - system_time_seconds: SYSTEM_TIME_SECONDS, - system_time_nanoseconds: SYSTEM_TIME_NANOSECONDS, - system_time_seconds_update: SYSTEM_TIME_SECONDS_UPDATE, - system_time_nanoseconds_update: SYSTEM_TIME_NANOSECONDS_UPDATE, - timestamp_addend: TIMESTAMP_ADDEND, - target_time_seconds: TARGET_TIME_SECONDS, - target_time_nanoseconds: TARGET_TIME_NANOSECONDS, - system_time_higher_word_seconds: SYSTEM_TIME_HIGHER_WORD_SECONDS, - timestamp_status: TIMESTAMP_STATUS, + timestamp_control: TimestampControl, + sub_second_increment: SubSecondIncrement, + system_time_seconds: SystemTimeSeconds, + system_time_nanoseconds: SystemTimeNanoseconds, + system_time_seconds_update: SystemTimeSecondsUpdate, + system_time_nanoseconds_update: SystemTimeNanosecondsUpdate, + timestamp_addend: TimestampAddend, + target_time_seconds: TargetTimeSeconds, + target_time_nanoseconds: TargetTimeNanoseconds, + system_time_higher_word_seconds: SystemTimeHigherWordSeconds, + timestamp_status: TimestampStatus, _reserved120: [u8; 0x08d4], - bus_mode: BUS_MODE, - transmit_poll_demand: TRANSMIT_POLL_DEMAND, - receive_poll_demand: RECEIVE_POLL_DEMAND, - receive_descriptor_list_address: RECEIVE_DESCRIPTOR_LIST_ADDRESS, - transmit_descriptor_list_address: TRANSMIT_DESCRIPTOR_LIST_ADDRESS, - status: STATUS, - operation_mode: OPERATION_MODE, - interrupt_enable: INTERRUPT_ENABLE, - missed_frame_and_buffer_overflow_counter: MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, - receive_interrupt_watchdog_timer: RECEIVE_INTERRUPT_WATCHDOG_TIMER, + bus_mode: BusMode, + transmit_poll_demand: TransmitPollDemand, + receive_poll_demand: ReceivePollDemand, + receive_descriptor_list_address: ReceiveDescriptorListAddress, + transmit_descriptor_list_address: TransmitDescriptorListAddress, + status: Status, + operation_mode: OperationMode, + interrupt_enable: InterruptEnable, + missed_frame_and_buffer_overflow_counter: MissedFrameAndBufferOverflowCounter, + receive_interrupt_watchdog_timer: ReceiveInterruptWatchdogTimer, _reserved130: [u8; 0x04], - ahb_status: AHB_STATUS, + ahb_status: AhbStatus, _reserved131: [u8; 0x18], - current_host_transmit_descriptor: CURRENT_HOST_TRANSMIT_DESCRIPTOR, - current_host_receive_descriptor: CURRENT_HOST_RECEIVE_DESCRIPTOR, - current_host_transmit_buffer_address: CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, - current_host_receive_buffer_address: CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, - hw_feature: HW_FEATURE, + current_host_transmit_descriptor: CurrentHostTransmitDescriptor, + current_host_receive_descriptor: CurrentHostReceiveDescriptor, + current_host_transmit_buffer_address: CurrentHostTransmitBufferAddress, + current_host_receive_buffer_address: CurrentHostReceiveBufferAddress, + hw_feature: HwFeature, } impl RegisterBlock { #[doc = "0x00 - MAC Configuration Register"] #[inline(always)] - pub const fn mac_configuration(&self) -> &MAC_CONFIGURATION { + pub const fn mac_configuration(&self) -> &MacConfiguration { &self.mac_configuration } #[doc = "0x04 - MAC Frame Filter"] #[inline(always)] - pub const fn mac_frame_filter(&self) -> &MAC_FRAME_FILTER { + pub const fn mac_frame_filter(&self) -> &MacFrameFilter { &self.mac_frame_filter } #[doc = "0x08 - Hash Table High Register"] #[inline(always)] - pub const fn hash_table_high(&self) -> &HASH_TABLE_HIGH { + pub const fn hash_table_high(&self) -> &HashTableHigh { &self.hash_table_high } #[doc = "0x0c - Hash Table Low Register"] #[inline(always)] - pub const fn hash_table_low(&self) -> &HASH_TABLE_LOW { + pub const fn hash_table_low(&self) -> &HashTableLow { &self.hash_table_low } #[doc = "0x10 - MII Address Register"] #[inline(always)] - pub const fn gmii_address(&self) -> &GMII_ADDRESS { + pub const fn gmii_address(&self) -> &GmiiAddress { &self.gmii_address } #[doc = "0x14 - MII Data Register"] #[inline(always)] - pub const fn gmii_data(&self) -> &GMII_DATA { + pub const fn gmii_data(&self) -> &GmiiData { &self.gmii_data } #[doc = "0x18 - Flow Control Register"] #[inline(always)] - pub const fn flow_control(&self) -> &FLOW_CONTROL { + pub const fn flow_control(&self) -> &FlowControl { &self.flow_control } #[doc = "0x1c - VLAN Tag Register"] #[inline(always)] - pub const fn vlan_tag(&self) -> &VLAN_TAG { + pub const fn vlan_tag(&self) -> &VlanTag { &self.vlan_tag } #[doc = "0x20 - Version Register"] #[inline(always)] - pub const fn version(&self) -> &VERSION { + pub const fn version(&self) -> &Version { &self.version } #[doc = "0x24 - Debug Register"] #[inline(always)] - pub const fn debug(&self) -> &DEBUG { + pub const fn debug(&self) -> &Debug { &self.debug } #[doc = "0x28 - Remote Wake Up Frame Filter Register"] #[inline(always)] - pub const fn remote_wake_up_frame_filter(&self) -> &REMOTE_WAKE_UP_FRAME_FILTER { + pub const fn remote_wake_up_frame_filter(&self) -> &RemoteWakeUpFrameFilter { &self.remote_wake_up_frame_filter } #[doc = "0x2c - PMT Control and Status Register"] #[inline(always)] - pub const fn pmt_control_status(&self) -> &PMT_CONTROL_STATUS { + pub const fn pmt_control_status(&self) -> &PmtControlStatus { &self.pmt_control_status } #[doc = "0x38 - Interrupt Register"] #[inline(always)] - pub const fn interrupt_status(&self) -> &INTERRUPT_STATUS { + pub const fn interrupt_status(&self) -> &InterruptStatus { &self.interrupt_status } #[doc = "0x3c - Interrupt Mask Register"] #[inline(always)] - pub const fn interrupt_mask(&self) -> &INTERRUPT_MASK { + pub const fn interrupt_mask(&self) -> &InterruptMask { &self.interrupt_mask } #[doc = "0x40 - MAC Address0 High Register"] #[inline(always)] - pub const fn mac_address0_high(&self) -> &MAC_ADDRESS0_HIGH { + pub const fn mac_address0_high(&self) -> &MacAddress0High { &self.mac_address0_high } #[doc = "0x44 - MAC Address0 Low Register"] #[inline(always)] - pub const fn mac_address0_low(&self) -> &MAC_ADDRESS0_LOW { + pub const fn mac_address0_low(&self) -> &MacAddress0Low { &self.mac_address0_low } #[doc = "0x48 - MAC Address1 High Register"] #[inline(always)] - pub const fn mac_address1_high(&self) -> &MAC_ADDRESS1_HIGH { + pub const fn mac_address1_high(&self) -> &MacAddress1High { &self.mac_address1_high } #[doc = "0x4c - MAC Address1 Low Register"] #[inline(always)] - pub const fn mac_address1_low(&self) -> &MAC_ADDRESS1_LOW { + pub const fn mac_address1_low(&self) -> &MacAddress1Low { &self.mac_address1_low } #[doc = "0x50 - MAC Address2 High Register"] #[inline(always)] - pub const fn mac_address2_high(&self) -> &MAC_ADDRESS2_HIGH { + pub const fn mac_address2_high(&self) -> &MacAddress2High { &self.mac_address2_high } #[doc = "0x54 - MAC Address2 Low Register"] #[inline(always)] - pub const fn mac_address2_low(&self) -> &MAC_ADDRESS2_LOW { + pub const fn mac_address2_low(&self) -> &MacAddress2Low { &self.mac_address2_low } #[doc = "0x58 - MAC Address3 High Register"] #[inline(always)] - pub const fn mac_address3_high(&self) -> &MAC_ADDRESS3_HIGH { + pub const fn mac_address3_high(&self) -> &MacAddress3High { &self.mac_address3_high } #[doc = "0x5c - MAC Address3 Low Register"] #[inline(always)] - pub const fn mac_address3_low(&self) -> &MAC_ADDRESS3_LOW { + pub const fn mac_address3_low(&self) -> &MacAddress3Low { &self.mac_address3_low } #[doc = "0x100 - MMC Control Register"] #[inline(always)] - pub const fn mmc_control(&self) -> &MMC_CONTROL { + pub const fn mmc_control(&self) -> &MmcControl { &self.mmc_control } #[doc = "0x104 - MMC Receive Interrupt Register"] #[inline(always)] - pub const fn mmc_receive_interrupt(&self) -> &MMC_RECEIVE_INTERRUPT { + pub const fn mmc_receive_interrupt(&self) -> &MmcReceiveInterrupt { &self.mmc_receive_interrupt } #[doc = "0x108 - MMC Transmit Interrupt Register"] #[inline(always)] - pub const fn mmc_transmit_interrupt(&self) -> &MMC_TRANSMIT_INTERRUPT { + pub const fn mmc_transmit_interrupt(&self) -> &MmcTransmitInterrupt { &self.mmc_transmit_interrupt } #[doc = "0x10c - MMC Reveive Interrupt Mask Register"] #[inline(always)] - pub const fn mmc_receive_interrupt_mask(&self) -> &MMC_RECEIVE_INTERRUPT_MASK { + pub const fn mmc_receive_interrupt_mask(&self) -> &MmcReceiveInterruptMask { &self.mmc_receive_interrupt_mask } #[doc = "0x110 - MMC Transmit Interrupt Mask Register"] #[inline(always)] - pub const fn mmc_transmit_interrupt_mask(&self) -> &MMC_TRANSMIT_INTERRUPT_MASK { + pub const fn mmc_transmit_interrupt_mask(&self) -> &MmcTransmitInterruptMask { &self.mmc_transmit_interrupt_mask } #[doc = "0x114 - Transmit Octet Count for Good and Bad Frames Register"] #[inline(always)] - pub const fn tx_octet_count_good_bad(&self) -> &TX_OCTET_COUNT_GOOD_BAD { + pub const fn tx_octet_count_good_bad(&self) -> &TxOctetCountGoodBad { &self.tx_octet_count_good_bad } #[doc = "0x118 - Transmit Frame Count for Goodand Bad Frames Register"] #[inline(always)] - pub const fn tx_frame_count_good_bad(&self) -> &TX_FRAME_COUNT_GOOD_BAD { + pub const fn tx_frame_count_good_bad(&self) -> &TxFrameCountGoodBad { &self.tx_frame_count_good_bad } #[doc = "0x11c - Transmit Frame Count for Good Broadcast Frames"] #[inline(always)] - pub const fn tx_broadcast_frames_good(&self) -> &TX_BROADCAST_FRAMES_GOOD { + pub const fn tx_broadcast_frames_good(&self) -> &TxBroadcastFramesGood { &self.tx_broadcast_frames_good } #[doc = "0x120 - Transmit Frame Count for Good Multicast Frames"] #[inline(always)] - pub const fn tx_multicast_frames_good(&self) -> &TX_MULTICAST_FRAMES_GOOD { + pub const fn tx_multicast_frames_good(&self) -> &TxMulticastFramesGood { &self.tx_multicast_frames_good } #[doc = "0x124 - Transmit Octet Count for Good and Bad 64 Byte Frames"] #[inline(always)] - pub const fn tx_64octets_frames_good_bad(&self) -> &TX_64OCTETS_FRAMES_GOOD_BAD { + pub const fn tx_64octets_frames_good_bad(&self) -> &Tx64octetsFramesGoodBad { &self.tx_64octets_frames_good_bad } #[doc = "0x128 - Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames"] #[inline(always)] - pub const fn tx_65to127octets_frames_good_bad(&self) -> &TX_65TO127OCTETS_FRAMES_GOOD_BAD { + pub const fn tx_65to127octets_frames_good_bad(&self) -> &Tx65to127octetsFramesGoodBad { &self.tx_65to127octets_frames_good_bad } #[doc = "0x12c - Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames"] #[inline(always)] - pub const fn tx_128to255octets_frames_good_bad(&self) -> &TX_128TO255OCTETS_FRAMES_GOOD_BAD { + pub const fn tx_128to255octets_frames_good_bad(&self) -> &Tx128to255octetsFramesGoodBad { &self.tx_128to255octets_frames_good_bad } #[doc = "0x130 - Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames"] #[inline(always)] - pub const fn tx_256to511octets_frames_good_bad(&self) -> &TX_256TO511OCTETS_FRAMES_GOOD_BAD { + pub const fn tx_256to511octets_frames_good_bad(&self) -> &Tx256to511octetsFramesGoodBad { &self.tx_256to511octets_frames_good_bad } #[doc = "0x134 - Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames"] #[inline(always)] - pub const fn tx_512to1023octets_frames_good_bad(&self) -> &TX_512TO1023OCTETS_FRAMES_GOOD_BAD { + pub const fn tx_512to1023octets_frames_good_bad(&self) -> &Tx512to1023octetsFramesGoodBad { &self.tx_512to1023octets_frames_good_bad } #[doc = "0x138 - Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames"] #[inline(always)] - pub const fn tx_1024tomaxoctets_frames_good_bad(&self) -> &TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD { + pub const fn tx_1024tomaxoctets_frames_good_bad(&self) -> &Tx1024tomaxoctetsFramesGoodBad { &self.tx_1024tomaxoctets_frames_good_bad } #[doc = "0x13c - Transmit Frame Count for Good and Bad Unicast Frames"] #[inline(always)] - pub const fn tx_unicast_frames_good_bad(&self) -> &TX_UNICAST_FRAMES_GOOD_BAD { + pub const fn tx_unicast_frames_good_bad(&self) -> &TxUnicastFramesGoodBad { &self.tx_unicast_frames_good_bad } #[doc = "0x140 - Transmit Frame Count for Good and Bad Multicast Frames"] #[inline(always)] - pub const fn tx_multicast_frames_good_bad(&self) -> &TX_MULTICAST_FRAMES_GOOD_BAD { + pub const fn tx_multicast_frames_good_bad(&self) -> &TxMulticastFramesGoodBad { &self.tx_multicast_frames_good_bad } #[doc = "0x144 - Transmit Frame Count for Good and Bad Broadcast Frames"] #[inline(always)] - pub const fn tx_broadcast_frames_good_bad(&self) -> &TX_BROADCAST_FRAMES_GOOD_BAD { + pub const fn tx_broadcast_frames_good_bad(&self) -> &TxBroadcastFramesGoodBad { &self.tx_broadcast_frames_good_bad } #[doc = "0x148 - Transmit Frame Count for Underflow Error Frames"] #[inline(always)] - pub const fn tx_underflow_error_frames(&self) -> &TX_UNDERFLOW_ERROR_FRAMES { + pub const fn tx_underflow_error_frames(&self) -> &TxUnderflowErrorFrames { &self.tx_underflow_error_frames } #[doc = "0x14c - Transmit Frame Count for Frames Transmitted after Single Collision"] #[inline(always)] - pub const fn tx_single_collision_good_frames(&self) -> &TX_SINGLE_COLLISION_GOOD_FRAMES { + pub const fn tx_single_collision_good_frames(&self) -> &TxSingleCollisionGoodFrames { &self.tx_single_collision_good_frames } #[doc = "0x150 - Transmit Frame Count for Frames Transmitted after Multiple Collision"] #[inline(always)] - pub const fn tx_multiple_collision_good_frames(&self) -> &TX_MULTIPLE_COLLISION_GOOD_FRAMES { + pub const fn tx_multiple_collision_good_frames(&self) -> &TxMultipleCollisionGoodFrames { &self.tx_multiple_collision_good_frames } #[doc = "0x154 - Tx Deferred Frames Register"] #[inline(always)] - pub const fn tx_deferred_frames(&self) -> &TX_DEFERRED_FRAMES { + pub const fn tx_deferred_frames(&self) -> &TxDeferredFrames { &self.tx_deferred_frames } #[doc = "0x158 - Transmit Frame Count for Late Collision Error Frames"] #[inline(always)] - pub const fn tx_late_collision_frames(&self) -> &TX_LATE_COLLISION_FRAMES { + pub const fn tx_late_collision_frames(&self) -> &TxLateCollisionFrames { &self.tx_late_collision_frames } #[doc = "0x15c - Transmit Frame Count for Excessive Collision Error Frames"] #[inline(always)] - pub const fn tx_excessive_collision_frames(&self) -> &TX_EXCESSIVE_COLLISION_FRAMES { + pub const fn tx_excessive_collision_frames(&self) -> &TxExcessiveCollisionFrames { &self.tx_excessive_collision_frames } #[doc = "0x160 - Transmit Frame Count for Carrier Sense Error Frames"] #[inline(always)] - pub const fn tx_carrier_error_frames(&self) -> &TX_CARRIER_ERROR_FRAMES { + pub const fn tx_carrier_error_frames(&self) -> &TxCarrierErrorFrames { &self.tx_carrier_error_frames } #[doc = "0x164 - Tx Octet Count Good Register"] #[inline(always)] - pub const fn tx_octet_count_good(&self) -> &TX_OCTET_COUNT_GOOD { + pub const fn tx_octet_count_good(&self) -> &TxOctetCountGood { &self.tx_octet_count_good } #[doc = "0x168 - Tx Frame Count Good Register"] #[inline(always)] - pub const fn tx_frame_count_good(&self) -> &TX_FRAME_COUNT_GOOD { + pub const fn tx_frame_count_good(&self) -> &TxFrameCountGood { &self.tx_frame_count_good } #[doc = "0x16c - Transmit Frame Count for Excessive Deferral Error Frames"] #[inline(always)] - pub const fn tx_excessive_deferral_error(&self) -> &TX_EXCESSIVE_DEFERRAL_ERROR { + pub const fn tx_excessive_deferral_error(&self) -> &TxExcessiveDeferralError { &self.tx_excessive_deferral_error } #[doc = "0x170 - Transmit Frame Count for Good PAUSE Frames"] #[inline(always)] - pub const fn tx_pause_frames(&self) -> &TX_PAUSE_FRAMES { + pub const fn tx_pause_frames(&self) -> &TxPauseFrames { &self.tx_pause_frames } #[doc = "0x174 - Transmit Frame Count for Good VLAN Frames"] #[inline(always)] - pub const fn tx_vlan_frames_good(&self) -> &TX_VLAN_FRAMES_GOOD { + pub const fn tx_vlan_frames_good(&self) -> &TxVlanFramesGood { &self.tx_vlan_frames_good } #[doc = "0x178 - Transmit Frame Count for Good Oversize Frames"] #[inline(always)] - pub const fn tx_osize_frames_good(&self) -> &TX_OSIZE_FRAMES_GOOD { + pub const fn tx_osize_frames_good(&self) -> &TxOsizeFramesGood { &self.tx_osize_frames_good } #[doc = "0x180 - Receive Frame Count for Good and Bad Frames"] #[inline(always)] - pub const fn rx_frames_count_good_bad(&self) -> &RX_FRAMES_COUNT_GOOD_BAD { + pub const fn rx_frames_count_good_bad(&self) -> &RxFramesCountGoodBad { &self.rx_frames_count_good_bad } #[doc = "0x184 - Receive Octet Count for Good and Bad Frames"] #[inline(always)] - pub const fn rx_octet_count_good_bad(&self) -> &RX_OCTET_COUNT_GOOD_BAD { + pub const fn rx_octet_count_good_bad(&self) -> &RxOctetCountGoodBad { &self.rx_octet_count_good_bad } #[doc = "0x188 - Rx Octet Count Good Register"] #[inline(always)] - pub const fn rx_octet_count_good(&self) -> &RX_OCTET_COUNT_GOOD { + pub const fn rx_octet_count_good(&self) -> &RxOctetCountGood { &self.rx_octet_count_good } #[doc = "0x18c - Receive Frame Count for Good Broadcast Frames"] #[inline(always)] - pub const fn rx_broadcast_frames_good(&self) -> &RX_BROADCAST_FRAMES_GOOD { + pub const fn rx_broadcast_frames_good(&self) -> &RxBroadcastFramesGood { &self.rx_broadcast_frames_good } #[doc = "0x190 - Receive Frame Count for Good Multicast Frames"] #[inline(always)] - pub const fn rx_multicast_frames_good(&self) -> &RX_MULTICAST_FRAMES_GOOD { + pub const fn rx_multicast_frames_good(&self) -> &RxMulticastFramesGood { &self.rx_multicast_frames_good } #[doc = "0x194 - Receive Frame Count for CRC Error Frames"] #[inline(always)] - pub const fn rx_crc_error_frames(&self) -> &RX_CRC_ERROR_FRAMES { + pub const fn rx_crc_error_frames(&self) -> &RxCrcErrorFrames { &self.rx_crc_error_frames } #[doc = "0x198 - Receive Frame Count for Alignment Error Frames"] #[inline(always)] - pub const fn rx_alignment_error_frames(&self) -> &RX_ALIGNMENT_ERROR_FRAMES { + pub const fn rx_alignment_error_frames(&self) -> &RxAlignmentErrorFrames { &self.rx_alignment_error_frames } #[doc = "0x19c - Receive Frame Count for Runt Error Frames"] #[inline(always)] - pub const fn rx_runt_error_frames(&self) -> &RX_RUNT_ERROR_FRAMES { + pub const fn rx_runt_error_frames(&self) -> &RxRuntErrorFrames { &self.rx_runt_error_frames } #[doc = "0x1a0 - Receive Frame Count for Jabber Error Frames"] #[inline(always)] - pub const fn rx_jabber_error_frames(&self) -> &RX_JABBER_ERROR_FRAMES { + pub const fn rx_jabber_error_frames(&self) -> &RxJabberErrorFrames { &self.rx_jabber_error_frames } #[doc = "0x1a4 - Receive Frame Count for Undersize Frames"] #[inline(always)] - pub const fn rx_undersize_frames_good(&self) -> &RX_UNDERSIZE_FRAMES_GOOD { + pub const fn rx_undersize_frames_good(&self) -> &RxUndersizeFramesGood { &self.rx_undersize_frames_good } #[doc = "0x1a8 - Rx Oversize Frames Good Register"] #[inline(always)] - pub const fn rx_oversize_frames_good(&self) -> &RX_OVERSIZE_FRAMES_GOOD { + pub const fn rx_oversize_frames_good(&self) -> &RxOversizeFramesGood { &self.rx_oversize_frames_good } #[doc = "0x1ac - Receive Frame Count for Good and Bad 64 Byte Frames"] #[inline(always)] - pub const fn rx_64octets_frames_good_bad(&self) -> &RX_64OCTETS_FRAMES_GOOD_BAD { + pub const fn rx_64octets_frames_good_bad(&self) -> &Rx64octetsFramesGoodBad { &self.rx_64octets_frames_good_bad } #[doc = "0x1b0 - Receive Frame Count for Good and Bad 65 to 127 Bytes Frames"] #[inline(always)] - pub const fn rx_65to127octets_frames_good_bad(&self) -> &RX_65TO127OCTETS_FRAMES_GOOD_BAD { + pub const fn rx_65to127octets_frames_good_bad(&self) -> &Rx65to127octetsFramesGoodBad { &self.rx_65to127octets_frames_good_bad } #[doc = "0x1b4 - Receive Frame Count for Good and Bad 128 to 255 Bytes Frames"] #[inline(always)] - pub const fn rx_128to255octets_frames_good_bad(&self) -> &RX_128TO255OCTETS_FRAMES_GOOD_BAD { + pub const fn rx_128to255octets_frames_good_bad(&self) -> &Rx128to255octetsFramesGoodBad { &self.rx_128to255octets_frames_good_bad } #[doc = "0x1b8 - Receive Frame Count for Good and Bad 256 to 511 Bytes Frames"] #[inline(always)] - pub const fn rx_256to511octets_frames_good_bad(&self) -> &RX_256TO511OCTETS_FRAMES_GOOD_BAD { + pub const fn rx_256to511octets_frames_good_bad(&self) -> &Rx256to511octetsFramesGoodBad { &self.rx_256to511octets_frames_good_bad } #[doc = "0x1bc - Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames"] #[inline(always)] - pub const fn rx_512to1023octets_frames_good_bad(&self) -> &RX_512TO1023OCTETS_FRAMES_GOOD_BAD { + pub const fn rx_512to1023octets_frames_good_bad(&self) -> &Rx512to1023octetsFramesGoodBad { &self.rx_512to1023octets_frames_good_bad } #[doc = "0x1c0 - Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames"] #[inline(always)] - pub const fn rx_1024tomaxoctets_frames_good_bad(&self) -> &RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD { + pub const fn rx_1024tomaxoctets_frames_good_bad(&self) -> &Rx1024tomaxoctetsFramesGoodBad { &self.rx_1024tomaxoctets_frames_good_bad } #[doc = "0x1c4 - Receive Frame Count for Good Unicast Frames"] #[inline(always)] - pub const fn rx_unicast_frames_good(&self) -> &RX_UNICAST_FRAMES_GOOD { + pub const fn rx_unicast_frames_good(&self) -> &RxUnicastFramesGood { &self.rx_unicast_frames_good } #[doc = "0x1c8 - Receive Frame Count for Length Error Frames"] #[inline(always)] - pub const fn rx_length_error_frames(&self) -> &RX_LENGTH_ERROR_FRAMES { + pub const fn rx_length_error_frames(&self) -> &RxLengthErrorFrames { &self.rx_length_error_frames } #[doc = "0x1cc - Receive Frame Count for Out of Range Frames"] #[inline(always)] - pub const fn rx_out_of_range_type_frames(&self) -> &RX_OUT_OF_RANGE_TYPE_FRAMES { + pub const fn rx_out_of_range_type_frames(&self) -> &RxOutOfRangeTypeFrames { &self.rx_out_of_range_type_frames } #[doc = "0x1d0 - Receive Frame Count for PAUSE Frames"] #[inline(always)] - pub const fn rx_pause_frames(&self) -> &RX_PAUSE_FRAMES { + pub const fn rx_pause_frames(&self) -> &RxPauseFrames { &self.rx_pause_frames } #[doc = "0x1d4 - Receive Frame Count for FIFO Overflow Frames"] #[inline(always)] - pub const fn rx_fifo_overflow_frames(&self) -> &RX_FIFO_OVERFLOW_FRAMES { + pub const fn rx_fifo_overflow_frames(&self) -> &RxFifoOverflowFrames { &self.rx_fifo_overflow_frames } #[doc = "0x1d8 - Receive Frame Count for Good and Bad VLAN Frames"] #[inline(always)] - pub const fn rx_vlan_frames_good_bad(&self) -> &RX_VLAN_FRAMES_GOOD_BAD { + pub const fn rx_vlan_frames_good_bad(&self) -> &RxVlanFramesGoodBad { &self.rx_vlan_frames_good_bad } #[doc = "0x1dc - Receive Frame Count for Watchdog Error Frames"] #[inline(always)] - pub const fn rx_watchdog_error_frames(&self) -> &RX_WATCHDOG_ERROR_FRAMES { + pub const fn rx_watchdog_error_frames(&self) -> &RxWatchdogErrorFrames { &self.rx_watchdog_error_frames } #[doc = "0x1e0 - Receive Frame Count for Receive Error Frames"] #[inline(always)] - pub const fn rx_receive_error_frames(&self) -> &RX_RECEIVE_ERROR_FRAMES { + pub const fn rx_receive_error_frames(&self) -> &RxReceiveErrorFrames { &self.rx_receive_error_frames } #[doc = "0x1e4 - Receive Frame Count for Good Control Frames Frames"] #[inline(always)] - pub const fn rx_control_frames_good(&self) -> &RX_CONTROL_FRAMES_GOOD { + pub const fn rx_control_frames_good(&self) -> &RxControlFramesGood { &self.rx_control_frames_good } #[doc = "0x200 - MMC Receive Checksum Offload Interrupt Mask Register"] #[inline(always)] - pub const fn mmc_ipc_receive_interrupt_mask(&self) -> &MMC_IPC_RECEIVE_INTERRUPT_MASK { + pub const fn mmc_ipc_receive_interrupt_mask(&self) -> &MmcIpcReceiveInterruptMask { &self.mmc_ipc_receive_interrupt_mask } #[doc = "0x208 - MMC Receive Checksum Offload Interrupt Register"] #[inline(always)] - pub const fn mmc_ipc_receive_interrupt(&self) -> &MMC_IPC_RECEIVE_INTERRUPT { + pub const fn mmc_ipc_receive_interrupt(&self) -> &MmcIpcReceiveInterrupt { &self.mmc_ipc_receive_interrupt } #[doc = "0x210 - RxIPv4 Good Frames Register"] #[inline(always)] - pub const fn rxipv4_good_frames(&self) -> &RXIPV4_GOOD_FRAMES { + pub const fn rxipv4_good_frames(&self) -> &Rxipv4GoodFrames { &self.rxipv4_good_frames } #[doc = "0x214 - Receive IPV4 Header Error Frame Counter Register"] #[inline(always)] - pub const fn rxipv4_header_error_frames(&self) -> &RXIPV4_HEADER_ERROR_FRAMES { + pub const fn rxipv4_header_error_frames(&self) -> &Rxipv4HeaderErrorFrames { &self.rxipv4_header_error_frames } #[doc = "0x218 - Receive IPV4 No Payload Frame Counter Register"] #[inline(always)] - pub const fn rxipv4_no_payload_frames(&self) -> &RXIPV4_NO_PAYLOAD_FRAMES { + pub const fn rxipv4_no_payload_frames(&self) -> &Rxipv4NoPayloadFrames { &self.rxipv4_no_payload_frames } #[doc = "0x21c - Receive IPV4 Fragmented Frame Counter Register"] #[inline(always)] - pub const fn rxipv4_fragmented_frames(&self) -> &RXIPV4_FRAGMENTED_FRAMES { + pub const fn rxipv4_fragmented_frames(&self) -> &Rxipv4FragmentedFrames { &self.rxipv4_fragmented_frames } #[doc = "0x220 - Receive IPV4 UDP Checksum Disabled Frame Counter Register"] #[inline(always)] - pub const fn rxipv4_udp_checksum_disabled_frames(&self) -> &RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES { + pub const fn rxipv4_udp_checksum_disabled_frames(&self) -> &Rxipv4UdpChecksumDisabledFrames { &self.rxipv4_udp_checksum_disabled_frames } #[doc = "0x224 - RxIPv6 Good Frames Register"] #[inline(always)] - pub const fn rxipv6_good_frames(&self) -> &RXIPV6_GOOD_FRAMES { + pub const fn rxipv6_good_frames(&self) -> &Rxipv6GoodFrames { &self.rxipv6_good_frames } #[doc = "0x228 - Receive IPV6 Header Error Frame Counter Register"] #[inline(always)] - pub const fn rxipv6_header_error_frames(&self) -> &RXIPV6_HEADER_ERROR_FRAMES { + pub const fn rxipv6_header_error_frames(&self) -> &Rxipv6HeaderErrorFrames { &self.rxipv6_header_error_frames } #[doc = "0x22c - Receive IPV6 No Payload Frame Counter Register"] #[inline(always)] - pub const fn rxipv6_no_payload_frames(&self) -> &RXIPV6_NO_PAYLOAD_FRAMES { + pub const fn rxipv6_no_payload_frames(&self) -> &Rxipv6NoPayloadFrames { &self.rxipv6_no_payload_frames } #[doc = "0x230 - RxUDP Good Frames Register"] #[inline(always)] - pub const fn rxudp_good_frames(&self) -> &RXUDP_GOOD_FRAMES { + pub const fn rxudp_good_frames(&self) -> &RxudpGoodFrames { &self.rxudp_good_frames } #[doc = "0x234 - RxUDP Error Frames Register"] #[inline(always)] - pub const fn rxudp_error_frames(&self) -> &RXUDP_ERROR_FRAMES { + pub const fn rxudp_error_frames(&self) -> &RxudpErrorFrames { &self.rxudp_error_frames } #[doc = "0x238 - RxTCP Good Frames Register"] #[inline(always)] - pub const fn rxtcp_good_frames(&self) -> &RXTCP_GOOD_FRAMES { + pub const fn rxtcp_good_frames(&self) -> &RxtcpGoodFrames { &self.rxtcp_good_frames } #[doc = "0x23c - RxTCP Error Frames Register"] #[inline(always)] - pub const fn rxtcp_error_frames(&self) -> &RXTCP_ERROR_FRAMES { + pub const fn rxtcp_error_frames(&self) -> &RxtcpErrorFrames { &self.rxtcp_error_frames } #[doc = "0x240 - RxICMP Good Frames Register"] #[inline(always)] - pub const fn rxicmp_good_frames(&self) -> &RXICMP_GOOD_FRAMES { + pub const fn rxicmp_good_frames(&self) -> &RxicmpGoodFrames { &self.rxicmp_good_frames } #[doc = "0x244 - RxICMP Error Frames Register"] #[inline(always)] - pub const fn rxicmp_error_frames(&self) -> &RXICMP_ERROR_FRAMES { + pub const fn rxicmp_error_frames(&self) -> &RxicmpErrorFrames { &self.rxicmp_error_frames } #[doc = "0x250 - RxIPv4 Good Octets Register"] #[inline(always)] - pub const fn rxipv4_good_octets(&self) -> &RXIPV4_GOOD_OCTETS { + pub const fn rxipv4_good_octets(&self) -> &Rxipv4GoodOctets { &self.rxipv4_good_octets } #[doc = "0x254 - Receive IPV4 Header Error Octet Counter Register"] #[inline(always)] - pub const fn rxipv4_header_error_octets(&self) -> &RXIPV4_HEADER_ERROR_OCTETS { + pub const fn rxipv4_header_error_octets(&self) -> &Rxipv4HeaderErrorOctets { &self.rxipv4_header_error_octets } #[doc = "0x258 - Receive IPV4 No Payload Octet Counter Register"] #[inline(always)] - pub const fn rxipv4_no_payload_octets(&self) -> &RXIPV4_NO_PAYLOAD_OCTETS { + pub const fn rxipv4_no_payload_octets(&self) -> &Rxipv4NoPayloadOctets { &self.rxipv4_no_payload_octets } #[doc = "0x25c - Receive IPV4 Fragmented Octet Counter Register"] #[inline(always)] - pub const fn rxipv4_fragmented_octets(&self) -> &RXIPV4_FRAGMENTED_OCTETS { + pub const fn rxipv4_fragmented_octets(&self) -> &Rxipv4FragmentedOctets { &self.rxipv4_fragmented_octets } #[doc = "0x260 - Receive IPV4 Fragmented Octet Counter Register"] #[inline(always)] - pub const fn rxipv4_udp_checksum_disable_octets(&self) -> &RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS { + pub const fn rxipv4_udp_checksum_disable_octets(&self) -> &Rxipv4UdpChecksumDisableOctets { &self.rxipv4_udp_checksum_disable_octets } #[doc = "0x264 - RxIPv6 Good Octets Register"] #[inline(always)] - pub const fn rxipv6_good_octets(&self) -> &RXIPV6_GOOD_OCTETS { + pub const fn rxipv6_good_octets(&self) -> &Rxipv6GoodOctets { &self.rxipv6_good_octets } #[doc = "0x268 - Receive IPV6 Header Error Octet Counter Register"] #[inline(always)] - pub const fn rxipv6_header_error_octets(&self) -> &RXIPV6_HEADER_ERROR_OCTETS { + pub const fn rxipv6_header_error_octets(&self) -> &Rxipv6HeaderErrorOctets { &self.rxipv6_header_error_octets } #[doc = "0x26c - Receive IPV6 No Payload Octet Counter Register"] #[inline(always)] - pub const fn rxipv6_no_payload_octets(&self) -> &RXIPV6_NO_PAYLOAD_OCTETS { + pub const fn rxipv6_no_payload_octets(&self) -> &Rxipv6NoPayloadOctets { &self.rxipv6_no_payload_octets } #[doc = "0x270 - Receive UDP Good Octets Register"] #[inline(always)] - pub const fn rxudp_good_octets(&self) -> &RXUDP_GOOD_OCTETS { + pub const fn rxudp_good_octets(&self) -> &RxudpGoodOctets { &self.rxudp_good_octets } #[doc = "0x274 - Receive UDP Error Octets Register"] #[inline(always)] - pub const fn rxudp_error_octets(&self) -> &RXUDP_ERROR_OCTETS { + pub const fn rxudp_error_octets(&self) -> &RxudpErrorOctets { &self.rxudp_error_octets } #[doc = "0x278 - Receive TCP Good Octets Register"] #[inline(always)] - pub const fn rxtcp_good_octets(&self) -> &RXTCP_GOOD_OCTETS { + pub const fn rxtcp_good_octets(&self) -> &RxtcpGoodOctets { &self.rxtcp_good_octets } #[doc = "0x27c - Receive TCP Error Octets Register"] #[inline(always)] - pub const fn rxtcp_error_octets(&self) -> &RXTCP_ERROR_OCTETS { + pub const fn rxtcp_error_octets(&self) -> &RxtcpErrorOctets { &self.rxtcp_error_octets } #[doc = "0x280 - Receive ICMP Good Octets Register"] #[inline(always)] - pub const fn rxicmp_good_octets(&self) -> &RXICMP_GOOD_OCTETS { + pub const fn rxicmp_good_octets(&self) -> &RxicmpGoodOctets { &self.rxicmp_good_octets } #[doc = "0x284 - Receive ICMP Error Octets Register"] #[inline(always)] - pub const fn rxicmp_error_octets(&self) -> &RXICMP_ERROR_OCTETS { + pub const fn rxicmp_error_octets(&self) -> &RxicmpErrorOctets { &self.rxicmp_error_octets } #[doc = "0x700 - Timestamp Control Register"] #[inline(always)] - pub const fn timestamp_control(&self) -> &TIMESTAMP_CONTROL { + pub const fn timestamp_control(&self) -> &TimestampControl { &self.timestamp_control } #[doc = "0x704 - Sub-Second Increment Register"] #[inline(always)] - pub const fn sub_second_increment(&self) -> &SUB_SECOND_INCREMENT { + pub const fn sub_second_increment(&self) -> &SubSecondIncrement { &self.sub_second_increment } #[doc = "0x708 - System Time - Seconds Register"] #[inline(always)] - pub const fn system_time_seconds(&self) -> &SYSTEM_TIME_SECONDS { + pub const fn system_time_seconds(&self) -> &SystemTimeSeconds { &self.system_time_seconds } #[doc = "0x70c - System Time Nanoseconds Register"] #[inline(always)] - pub const fn system_time_nanoseconds(&self) -> &SYSTEM_TIME_NANOSECONDS { + pub const fn system_time_nanoseconds(&self) -> &SystemTimeNanoseconds { &self.system_time_nanoseconds } #[doc = "0x710 - System Time - Seconds Update Register"] #[inline(always)] - pub const fn system_time_seconds_update(&self) -> &SYSTEM_TIME_SECONDS_UPDATE { + pub const fn system_time_seconds_update(&self) -> &SystemTimeSecondsUpdate { &self.system_time_seconds_update } #[doc = "0x714 - System Time Nanoseconds Update Register"] #[inline(always)] - pub const fn system_time_nanoseconds_update(&self) -> &SYSTEM_TIME_NANOSECONDS_UPDATE { + pub const fn system_time_nanoseconds_update(&self) -> &SystemTimeNanosecondsUpdate { &self.system_time_nanoseconds_update } #[doc = "0x718 - Timestamp Addend Register"] #[inline(always)] - pub const fn timestamp_addend(&self) -> &TIMESTAMP_ADDEND { + pub const fn timestamp_addend(&self) -> &TimestampAddend { &self.timestamp_addend } #[doc = "0x71c - Target Time Seconds Register"] #[inline(always)] - pub const fn target_time_seconds(&self) -> &TARGET_TIME_SECONDS { + pub const fn target_time_seconds(&self) -> &TargetTimeSeconds { &self.target_time_seconds } #[doc = "0x720 - Target Time Nanoseconds Register"] #[inline(always)] - pub const fn target_time_nanoseconds(&self) -> &TARGET_TIME_NANOSECONDS { + pub const fn target_time_nanoseconds(&self) -> &TargetTimeNanoseconds { &self.target_time_nanoseconds } #[doc = "0x724 - System Time - Higher Word Seconds Register"] #[inline(always)] - pub const fn system_time_higher_word_seconds(&self) -> &SYSTEM_TIME_HIGHER_WORD_SECONDS { + pub const fn system_time_higher_word_seconds(&self) -> &SystemTimeHigherWordSeconds { &self.system_time_higher_word_seconds } #[doc = "0x728 - Timestamp Status Register"] #[inline(always)] - pub const fn timestamp_status(&self) -> &TIMESTAMP_STATUS { + pub const fn timestamp_status(&self) -> &TimestampStatus { &self.timestamp_status } #[doc = "0x1000 - Bus Mode Register"] #[inline(always)] - pub const fn bus_mode(&self) -> &BUS_MODE { + pub const fn bus_mode(&self) -> &BusMode { &self.bus_mode } #[doc = "0x1004 - Transmit Poll Demand Register"] #[inline(always)] - pub const fn transmit_poll_demand(&self) -> &TRANSMIT_POLL_DEMAND { + pub const fn transmit_poll_demand(&self) -> &TransmitPollDemand { &self.transmit_poll_demand } #[doc = "0x1008 - Receive Poll Demand Register"] #[inline(always)] - pub const fn receive_poll_demand(&self) -> &RECEIVE_POLL_DEMAND { + pub const fn receive_poll_demand(&self) -> &ReceivePollDemand { &self.receive_poll_demand } #[doc = "0x100c - Receive Descriptor Address Register"] #[inline(always)] - pub const fn receive_descriptor_list_address(&self) -> &RECEIVE_DESCRIPTOR_LIST_ADDRESS { + pub const fn receive_descriptor_list_address(&self) -> &ReceiveDescriptorListAddress { &self.receive_descriptor_list_address } #[doc = "0x1010 - Transmit descripter Address Register"] #[inline(always)] - pub const fn transmit_descriptor_list_address(&self) -> &TRANSMIT_DESCRIPTOR_LIST_ADDRESS { + pub const fn transmit_descriptor_list_address(&self) -> &TransmitDescriptorListAddress { &self.transmit_descriptor_list_address } #[doc = "0x1014 - Status Register"] #[inline(always)] - pub const fn status(&self) -> &STATUS { + pub const fn status(&self) -> &Status { &self.status } #[doc = "0x1018 - Operation Mode Register"] #[inline(always)] - pub const fn operation_mode(&self) -> &OPERATION_MODE { + pub const fn operation_mode(&self) -> &OperationMode { &self.operation_mode } #[doc = "0x101c - Interrupt Enable Register"] #[inline(always)] - pub const fn interrupt_enable(&self) -> &INTERRUPT_ENABLE { + pub const fn interrupt_enable(&self) -> &InterruptEnable { &self.interrupt_enable } #[doc = "0x1020 - Missed Frame and Buffer Overflow Counter Register"] #[inline(always)] - pub const fn missed_frame_and_buffer_overflow_counter(&self) -> &MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER { + pub const fn missed_frame_and_buffer_overflow_counter(&self) -> &MissedFrameAndBufferOverflowCounter { &self.missed_frame_and_buffer_overflow_counter } #[doc = "0x1024 - Receive Interrupt Watchdog Timer Register"] #[inline(always)] - pub const fn receive_interrupt_watchdog_timer(&self) -> &RECEIVE_INTERRUPT_WATCHDOG_TIMER { + pub const fn receive_interrupt_watchdog_timer(&self) -> &ReceiveInterruptWatchdogTimer { &self.receive_interrupt_watchdog_timer } #[doc = "0x102c - AHB Status Register"] #[inline(always)] - pub const fn ahb_status(&self) -> &AHB_STATUS { + pub const fn ahb_status(&self) -> &AhbStatus { &self.ahb_status } #[doc = "0x1048 - Current Host Transmit Descriptor Register"] #[inline(always)] - pub const fn current_host_transmit_descriptor(&self) -> &CURRENT_HOST_TRANSMIT_DESCRIPTOR { + pub const fn current_host_transmit_descriptor(&self) -> &CurrentHostTransmitDescriptor { &self.current_host_transmit_descriptor } #[doc = "0x104c - Current Host Receive Descriptor Register"] #[inline(always)] - pub const fn current_host_receive_descriptor(&self) -> &CURRENT_HOST_RECEIVE_DESCRIPTOR { + pub const fn current_host_receive_descriptor(&self) -> &CurrentHostReceiveDescriptor { &self.current_host_receive_descriptor } #[doc = "0x1050 - Current Host Transmit Buffer Address Register"] #[inline(always)] - pub const fn current_host_transmit_buffer_address(&self) -> &CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS { + pub const fn current_host_transmit_buffer_address(&self) -> &CurrentHostTransmitBufferAddress { &self.current_host_transmit_buffer_address } #[doc = "0x1054 - Current Host Receive Buffer Address Register"] #[inline(always)] - pub const fn current_host_receive_buffer_address(&self) -> &CURRENT_HOST_RECEIVE_BUFFER_ADDRESS { + pub const fn current_host_receive_buffer_address(&self) -> &CurrentHostReceiveBufferAddress { &self.current_host_receive_buffer_address } #[doc = "0x1058 - HW Feature Register"] #[inline(always)] - pub const fn hw_feature(&self) -> &HW_FEATURE { + pub const fn hw_feature(&self) -> &HwFeature { &self.hw_feature } } #[doc = "MAC_CONFIGURATION (rw) register accessor: MAC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_configuration::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_configuration::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_configuration`] module"] -pub type MAC_CONFIGURATION = crate::Reg; +#[doc(alias = "MAC_CONFIGURATION")] +pub type MacConfiguration = crate::Reg; #[doc = "MAC Configuration Register"] pub mod mac_configuration; #[doc = "MAC_FRAME_FILTER (rw) register accessor: MAC Frame Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_filter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_filter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_frame_filter`] module"] -pub type MAC_FRAME_FILTER = crate::Reg; +#[doc(alias = "MAC_FRAME_FILTER")] +pub type MacFrameFilter = crate::Reg; #[doc = "MAC Frame Filter"] pub mod mac_frame_filter; #[doc = "HASH_TABLE_HIGH (rw) register accessor: Hash Table High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_high`] module"] -pub type HASH_TABLE_HIGH = crate::Reg; +#[doc(alias = "HASH_TABLE_HIGH")] +pub type HashTableHigh = crate::Reg; #[doc = "Hash Table High Register"] pub mod hash_table_high; #[doc = "HASH_TABLE_LOW (rw) register accessor: Hash Table Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hash_table_low`] module"] -pub type HASH_TABLE_LOW = crate::Reg; +#[doc(alias = "HASH_TABLE_LOW")] +pub type HashTableLow = crate::Reg; #[doc = "Hash Table Low Register"] pub mod hash_table_low; #[doc = "GMII_ADDRESS (rw) register accessor: MII Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_address`] module"] -pub type GMII_ADDRESS = crate::Reg; +#[doc(alias = "GMII_ADDRESS")] +pub type GmiiAddress = crate::Reg; #[doc = "MII Address Register"] pub mod gmii_address; #[doc = "GMII_DATA (rw) register accessor: MII Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmii_data`] module"] -pub type GMII_DATA = crate::Reg; +#[doc(alias = "GMII_DATA")] +pub type GmiiData = crate::Reg; #[doc = "MII Data Register"] pub mod gmii_data; #[doc = "FLOW_CONTROL (rw) register accessor: Flow Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flow_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flow_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flow_control`] module"] -pub type FLOW_CONTROL = crate::Reg; +#[doc(alias = "FLOW_CONTROL")] +pub type FlowControl = crate::Reg; #[doc = "Flow Control Register"] pub mod flow_control; #[doc = "VLAN_TAG (rw) register accessor: VLAN Tag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_tag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_tag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vlan_tag`] module"] -pub type VLAN_TAG = crate::Reg; +#[doc(alias = "VLAN_TAG")] +pub type VlanTag = crate::Reg; #[doc = "VLAN Tag Register"] pub mod vlan_tag; #[doc = "VERSION (r) register accessor: Version Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] -pub type VERSION = crate::Reg; +#[doc(alias = "VERSION")] +pub type Version = crate::Reg; #[doc = "Version Register"] pub mod version; #[doc = "DEBUG (r) register accessor: Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug`] module"] -pub type DEBUG = crate::Reg; +#[doc(alias = "DEBUG")] +pub type Debug = crate::Reg; #[doc = "Debug Register"] pub mod debug; #[doc = "REMOTE_WAKE_UP_FRAME_FILTER (rw) register accessor: Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`remote_wake_up_frame_filter::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@remote_wake_up_frame_filter`] module"] -pub type REMOTE_WAKE_UP_FRAME_FILTER = crate::Reg; +#[doc(alias = "REMOTE_WAKE_UP_FRAME_FILTER")] +pub type RemoteWakeUpFrameFilter = crate::Reg; #[doc = "Remote Wake Up Frame Filter Register"] pub mod remote_wake_up_frame_filter; #[doc = "PMT_CONTROL_STATUS (rw) register accessor: PMT Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmt_control_status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmt_control_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmt_control_status`] module"] -pub type PMT_CONTROL_STATUS = crate::Reg; +#[doc(alias = "PMT_CONTROL_STATUS")] +pub type PmtControlStatus = crate::Reg; #[doc = "PMT Control and Status Register"] pub mod pmt_control_status; #[doc = "INTERRUPT_STATUS (r) register accessor: Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_status`] module"] -pub type INTERRUPT_STATUS = crate::Reg; +#[doc(alias = "INTERRUPT_STATUS")] +pub type InterruptStatus = crate::Reg; #[doc = "Interrupt Register"] pub mod interrupt_status; #[doc = "INTERRUPT_MASK (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_mask`] module"] -pub type INTERRUPT_MASK = crate::Reg; +#[doc(alias = "INTERRUPT_MASK")] +pub type InterruptMask = crate::Reg; #[doc = "Interrupt Mask Register"] pub mod interrupt_mask; #[doc = "MAC_ADDRESS0_HIGH (rw) register accessor: MAC Address0 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_high`] module"] -pub type MAC_ADDRESS0_HIGH = crate::Reg; +#[doc(alias = "MAC_ADDRESS0_HIGH")] +pub type MacAddress0High = crate::Reg; #[doc = "MAC Address0 High Register"] pub mod mac_address0_high; #[doc = "MAC_ADDRESS0_LOW (rw) register accessor: MAC Address0 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address0_low`] module"] -pub type MAC_ADDRESS0_LOW = crate::Reg; +#[doc(alias = "MAC_ADDRESS0_LOW")] +pub type MacAddress0Low = crate::Reg; #[doc = "MAC Address0 Low Register"] pub mod mac_address0_low; #[doc = "MAC_ADDRESS1_HIGH (rw) register accessor: MAC Address1 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_high`] module"] -pub type MAC_ADDRESS1_HIGH = crate::Reg; +#[doc(alias = "MAC_ADDRESS1_HIGH")] +pub type MacAddress1High = crate::Reg; #[doc = "MAC Address1 High Register"] pub mod mac_address1_high; #[doc = "MAC_ADDRESS1_LOW (rw) register accessor: MAC Address1 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address1_low`] module"] -pub type MAC_ADDRESS1_LOW = crate::Reg; +#[doc(alias = "MAC_ADDRESS1_LOW")] +pub type MacAddress1Low = crate::Reg; #[doc = "MAC Address1 Low Register"] pub mod mac_address1_low; #[doc = "MAC_ADDRESS2_HIGH (rw) register accessor: MAC Address2 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_high`] module"] -pub type MAC_ADDRESS2_HIGH = crate::Reg; +#[doc(alias = "MAC_ADDRESS2_HIGH")] +pub type MacAddress2High = crate::Reg; #[doc = "MAC Address2 High Register"] pub mod mac_address2_high; #[doc = "MAC_ADDRESS2_LOW (rw) register accessor: MAC Address2 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address2_low`] module"] -pub type MAC_ADDRESS2_LOW = crate::Reg; +#[doc(alias = "MAC_ADDRESS2_LOW")] +pub type MacAddress2Low = crate::Reg; #[doc = "MAC Address2 Low Register"] pub mod mac_address2_low; #[doc = "MAC_ADDRESS3_HIGH (rw) register accessor: MAC Address3 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_high`] module"] -pub type MAC_ADDRESS3_HIGH = crate::Reg; +#[doc(alias = "MAC_ADDRESS3_HIGH")] +pub type MacAddress3High = crate::Reg; #[doc = "MAC Address3 High Register"] pub mod mac_address3_high; #[doc = "MAC_ADDRESS3_LOW (rw) register accessor: MAC Address3 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_address3_low`] module"] -pub type MAC_ADDRESS3_LOW = crate::Reg; +#[doc(alias = "MAC_ADDRESS3_LOW")] +pub type MacAddress3Low = crate::Reg; #[doc = "MAC Address3 Low Register"] pub mod mac_address3_low; #[doc = "MMC_CONTROL (rw) register accessor: MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_control`] module"] -pub type MMC_CONTROL = crate::Reg; +#[doc(alias = "MMC_CONTROL")] +pub type MmcControl = crate::Reg; #[doc = "MMC Control Register"] pub mod mmc_control; #[doc = "MMC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt`] module"] -pub type MMC_RECEIVE_INTERRUPT = crate::Reg; +#[doc(alias = "MMC_RECEIVE_INTERRUPT")] +pub type MmcReceiveInterrupt = crate::Reg; #[doc = "MMC Receive Interrupt Register"] pub mod mmc_receive_interrupt; #[doc = "MMC_TRANSMIT_INTERRUPT (r) register accessor: MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt`] module"] -pub type MMC_TRANSMIT_INTERRUPT = crate::Reg; +#[doc(alias = "MMC_TRANSMIT_INTERRUPT")] +pub type MmcTransmitInterrupt = crate::Reg; #[doc = "MMC Transmit Interrupt Register"] pub mod mmc_transmit_interrupt; #[doc = "MMC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_receive_interrupt_mask`] module"] -pub type MMC_RECEIVE_INTERRUPT_MASK = crate::Reg; +#[doc(alias = "MMC_RECEIVE_INTERRUPT_MASK")] +pub type MmcReceiveInterruptMask = crate::Reg; #[doc = "MMC Reveive Interrupt Mask Register"] pub mod mmc_receive_interrupt_mask; #[doc = "MMC_TRANSMIT_INTERRUPT_MASK (rw) register accessor: MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_transmit_interrupt_mask`] module"] -pub type MMC_TRANSMIT_INTERRUPT_MASK = crate::Reg; +#[doc(alias = "MMC_TRANSMIT_INTERRUPT_MASK")] +pub type MmcTransmitInterruptMask = crate::Reg; #[doc = "MMC Transmit Interrupt Mask Register"] pub mod mmc_transmit_interrupt_mask; #[doc = "TX_OCTET_COUNT_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good_bad`] module"] -pub type TX_OCTET_COUNT_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_OCTET_COUNT_GOOD_BAD")] +pub type TxOctetCountGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad Frames Register"] pub mod tx_octet_count_good_bad; #[doc = "TX_FRAME_COUNT_GOOD_BAD (r) register accessor: Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good_bad`] module"] -pub type TX_FRAME_COUNT_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_FRAME_COUNT_GOOD_BAD")] +pub type TxFrameCountGoodBad = crate::Reg; #[doc = "Transmit Frame Count for Goodand Bad Frames Register"] pub mod tx_frame_count_good_bad; #[doc = "TX_BROADCAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good`] module"] -pub type TX_BROADCAST_FRAMES_GOOD = crate::Reg; +#[doc(alias = "TX_BROADCAST_FRAMES_GOOD")] +pub type TxBroadcastFramesGood = crate::Reg; #[doc = "Transmit Frame Count for Good Broadcast Frames"] pub mod tx_broadcast_frames_good; #[doc = "TX_MULTICAST_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good`] module"] -pub type TX_MULTICAST_FRAMES_GOOD = crate::Reg; +#[doc(alias = "TX_MULTICAST_FRAMES_GOOD")] +pub type TxMulticastFramesGood = crate::Reg; #[doc = "Transmit Frame Count for Good Multicast Frames"] pub mod tx_multicast_frames_good; #[doc = "TX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_64octets_frames_good_bad`] module"] -pub type TX_64OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_64OCTETS_FRAMES_GOOD_BAD")] +pub type Tx64octetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 64 Byte Frames"] pub mod tx_64octets_frames_good_bad; #[doc = "TX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_65to127octets_frames_good_bad`] module"] -pub type TX_65TO127OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_65TO127OCTETS_FRAMES_GOOD_BAD")] +pub type Tx65to127octetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames"] pub mod tx_65to127octets_frames_good_bad; #[doc = "TX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_128to255octets_frames_good_bad`] module"] -pub type TX_128TO255OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_128TO255OCTETS_FRAMES_GOOD_BAD")] +pub type Tx128to255octetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames"] pub mod tx_128to255octets_frames_good_bad; #[doc = "TX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_256to511octets_frames_good_bad`] module"] -pub type TX_256TO511OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_256TO511OCTETS_FRAMES_GOOD_BAD")] +pub type Tx256to511octetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames"] pub mod tx_256to511octets_frames_good_bad; #[doc = "TX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_512to1023octets_frames_good_bad`] module"] -pub type TX_512TO1023OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_512TO1023OCTETS_FRAMES_GOOD_BAD")] +pub type Tx512to1023octetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames"] pub mod tx_512to1023octets_frames_good_bad; #[doc = "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_1024tomaxoctets_frames_good_bad`] module"] -pub type TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD")] +pub type Tx1024tomaxoctetsFramesGoodBad = crate::Reg; #[doc = "Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames"] pub mod tx_1024tomaxoctets_frames_good_bad; #[doc = "TX_UNICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_unicast_frames_good_bad`] module"] -pub type TX_UNICAST_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_UNICAST_FRAMES_GOOD_BAD")] +pub type TxUnicastFramesGoodBad = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Unicast Frames"] pub mod tx_unicast_frames_good_bad; #[doc = "TX_MULTICAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multicast_frames_good_bad`] module"] -pub type TX_MULTICAST_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_MULTICAST_FRAMES_GOOD_BAD")] +pub type TxMulticastFramesGoodBad = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Multicast Frames"] pub mod tx_multicast_frames_good_bad; #[doc = "TX_BROADCAST_FRAMES_GOOD_BAD (r) register accessor: Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_broadcast_frames_good_bad`] module"] -pub type TX_BROADCAST_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "TX_BROADCAST_FRAMES_GOOD_BAD")] +pub type TxBroadcastFramesGoodBad = crate::Reg; #[doc = "Transmit Frame Count for Good and Bad Broadcast Frames"] pub mod tx_broadcast_frames_good_bad; #[doc = "TX_UNDERFLOW_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_underflow_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_underflow_error_frames`] module"] -pub type TX_UNDERFLOW_ERROR_FRAMES = crate::Reg; +#[doc(alias = "TX_UNDERFLOW_ERROR_FRAMES")] +pub type TxUnderflowErrorFrames = crate::Reg; #[doc = "Transmit Frame Count for Underflow Error Frames"] pub mod tx_underflow_error_frames; #[doc = "TX_SINGLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_single_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_single_collision_good_frames`] module"] -pub type TX_SINGLE_COLLISION_GOOD_FRAMES = crate::Reg; +#[doc(alias = "TX_SINGLE_COLLISION_GOOD_FRAMES")] +pub type TxSingleCollisionGoodFrames = crate::Reg; #[doc = "Transmit Frame Count for Frames Transmitted after Single Collision"] pub mod tx_single_collision_good_frames; #[doc = "TX_MULTIPLE_COLLISION_GOOD_FRAMES (r) register accessor: Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_multiple_collision_good_frames`] module"] -pub type TX_MULTIPLE_COLLISION_GOOD_FRAMES = crate::Reg; +#[doc(alias = "TX_MULTIPLE_COLLISION_GOOD_FRAMES")] +pub type TxMultipleCollisionGoodFrames = crate::Reg; #[doc = "Transmit Frame Count for Frames Transmitted after Multiple Collision"] pub mod tx_multiple_collision_good_frames; #[doc = "TX_DEFERRED_FRAMES (r) register accessor: Tx Deferred Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_deferred_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_deferred_frames`] module"] -pub type TX_DEFERRED_FRAMES = crate::Reg; +#[doc(alias = "TX_DEFERRED_FRAMES")] +pub type TxDeferredFrames = crate::Reg; #[doc = "Tx Deferred Frames Register"] pub mod tx_deferred_frames; #[doc = "TX_LATE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_late_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_late_collision_frames`] module"] -pub type TX_LATE_COLLISION_FRAMES = crate::Reg; +#[doc(alias = "TX_LATE_COLLISION_FRAMES")] +pub type TxLateCollisionFrames = crate::Reg; #[doc = "Transmit Frame Count for Late Collision Error Frames"] pub mod tx_late_collision_frames; #[doc = "TX_EXCESSIVE_COLLISION_FRAMES (r) register accessor: Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_collision_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_collision_frames`] module"] -pub type TX_EXCESSIVE_COLLISION_FRAMES = crate::Reg; +#[doc(alias = "TX_EXCESSIVE_COLLISION_FRAMES")] +pub type TxExcessiveCollisionFrames = crate::Reg; #[doc = "Transmit Frame Count for Excessive Collision Error Frames"] pub mod tx_excessive_collision_frames; #[doc = "TX_CARRIER_ERROR_FRAMES (r) register accessor: Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_carrier_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_carrier_error_frames`] module"] -pub type TX_CARRIER_ERROR_FRAMES = crate::Reg; +#[doc(alias = "TX_CARRIER_ERROR_FRAMES")] +pub type TxCarrierErrorFrames = crate::Reg; #[doc = "Transmit Frame Count for Carrier Sense Error Frames"] pub mod tx_carrier_error_frames; #[doc = "TX_OCTET_COUNT_GOOD (r) register accessor: Tx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_octet_count_good`] module"] -pub type TX_OCTET_COUNT_GOOD = crate::Reg; +#[doc(alias = "TX_OCTET_COUNT_GOOD")] +pub type TxOctetCountGood = crate::Reg; #[doc = "Tx Octet Count Good Register"] pub mod tx_octet_count_good; #[doc = "TX_FRAME_COUNT_GOOD (r) register accessor: Tx Frame Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_frame_count_good`] module"] -pub type TX_FRAME_COUNT_GOOD = crate::Reg; +#[doc(alias = "TX_FRAME_COUNT_GOOD")] +pub type TxFrameCountGood = crate::Reg; #[doc = "Tx Frame Count Good Register"] pub mod tx_frame_count_good; #[doc = "TX_EXCESSIVE_DEFERRAL_ERROR (r) register accessor: Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_deferral_error::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_excessive_deferral_error`] module"] -pub type TX_EXCESSIVE_DEFERRAL_ERROR = crate::Reg; +#[doc(alias = "TX_EXCESSIVE_DEFERRAL_ERROR")] +pub type TxExcessiveDeferralError = crate::Reg; #[doc = "Transmit Frame Count for Excessive Deferral Error Frames"] pub mod tx_excessive_deferral_error; #[doc = "TX_PAUSE_FRAMES (r) register accessor: Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_pause_frames`] module"] -pub type TX_PAUSE_FRAMES = crate::Reg; +#[doc(alias = "TX_PAUSE_FRAMES")] +pub type TxPauseFrames = crate::Reg; #[doc = "Transmit Frame Count for Good PAUSE Frames"] pub mod tx_pause_frames; #[doc = "TX_VLAN_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_vlan_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_vlan_frames_good`] module"] -pub type TX_VLAN_FRAMES_GOOD = crate::Reg; +#[doc(alias = "TX_VLAN_FRAMES_GOOD")] +pub type TxVlanFramesGood = crate::Reg; #[doc = "Transmit Frame Count for Good VLAN Frames"] pub mod tx_vlan_frames_good; #[doc = "TX_OSIZE_FRAMES_GOOD (r) register accessor: Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_osize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_osize_frames_good`] module"] -pub type TX_OSIZE_FRAMES_GOOD = crate::Reg; +#[doc(alias = "TX_OSIZE_FRAMES_GOOD")] +pub type TxOsizeFramesGood = crate::Reg; #[doc = "Transmit Frame Count for Good Oversize Frames"] pub mod tx_osize_frames_good; #[doc = "RX_FRAMES_COUNT_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_frames_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_frames_count_good_bad`] module"] -pub type RX_FRAMES_COUNT_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_FRAMES_COUNT_GOOD_BAD")] +pub type RxFramesCountGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad Frames"] pub mod rx_frames_count_good_bad; #[doc = "RX_OCTET_COUNT_GOOD_BAD (r) register accessor: Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good_bad`] module"] -pub type RX_OCTET_COUNT_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_OCTET_COUNT_GOOD_BAD")] +pub type RxOctetCountGoodBad = crate::Reg; #[doc = "Receive Octet Count for Good and Bad Frames"] pub mod rx_octet_count_good_bad; #[doc = "RX_OCTET_COUNT_GOOD (r) register accessor: Rx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_octet_count_good`] module"] -pub type RX_OCTET_COUNT_GOOD = crate::Reg; +#[doc(alias = "RX_OCTET_COUNT_GOOD")] +pub type RxOctetCountGood = crate::Reg; #[doc = "Rx Octet Count Good Register"] pub mod rx_octet_count_good; #[doc = "RX_BROADCAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_broadcast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_broadcast_frames_good`] module"] -pub type RX_BROADCAST_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_BROADCAST_FRAMES_GOOD")] +pub type RxBroadcastFramesGood = crate::Reg; #[doc = "Receive Frame Count for Good Broadcast Frames"] pub mod rx_broadcast_frames_good; #[doc = "RX_MULTICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_multicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_multicast_frames_good`] module"] -pub type RX_MULTICAST_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_MULTICAST_FRAMES_GOOD")] +pub type RxMulticastFramesGood = crate::Reg; #[doc = "Receive Frame Count for Good Multicast Frames"] pub mod rx_multicast_frames_good; #[doc = "RX_CRC_ERROR_FRAMES (r) register accessor: Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_crc_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_crc_error_frames`] module"] -pub type RX_CRC_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_CRC_ERROR_FRAMES")] +pub type RxCrcErrorFrames = crate::Reg; #[doc = "Receive Frame Count for CRC Error Frames"] pub mod rx_crc_error_frames; #[doc = "RX_ALIGNMENT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_alignment_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_alignment_error_frames`] module"] -pub type RX_ALIGNMENT_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_ALIGNMENT_ERROR_FRAMES")] +pub type RxAlignmentErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Alignment Error Frames"] pub mod rx_alignment_error_frames; #[doc = "RX_RUNT_ERROR_FRAMES (r) register accessor: Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_runt_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_runt_error_frames`] module"] -pub type RX_RUNT_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_RUNT_ERROR_FRAMES")] +pub type RxRuntErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Runt Error Frames"] pub mod rx_runt_error_frames; #[doc = "RX_JABBER_ERROR_FRAMES (r) register accessor: Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_jabber_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_jabber_error_frames`] module"] -pub type RX_JABBER_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_JABBER_ERROR_FRAMES")] +pub type RxJabberErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Jabber Error Frames"] pub mod rx_jabber_error_frames; #[doc = "RX_UNDERSIZE_FRAMES_GOOD (r) register accessor: Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_undersize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_undersize_frames_good`] module"] -pub type RX_UNDERSIZE_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_UNDERSIZE_FRAMES_GOOD")] +pub type RxUndersizeFramesGood = crate::Reg; #[doc = "Receive Frame Count for Undersize Frames"] pub mod rx_undersize_frames_good; #[doc = "RX_OVERSIZE_FRAMES_GOOD (r) register accessor: Rx Oversize Frames Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_oversize_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_oversize_frames_good`] module"] -pub type RX_OVERSIZE_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_OVERSIZE_FRAMES_GOOD")] +pub type RxOversizeFramesGood = crate::Reg; #[doc = "Rx Oversize Frames Good Register"] pub mod rx_oversize_frames_good; #[doc = "RX_64OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_64octets_frames_good_bad`] module"] -pub type RX_64OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_64OCTETS_FRAMES_GOOD_BAD")] +pub type Rx64octetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 64 Byte Frames"] pub mod rx_64octets_frames_good_bad; #[doc = "RX_65TO127OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_65to127octets_frames_good_bad`] module"] -pub type RX_65TO127OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_65TO127OCTETS_FRAMES_GOOD_BAD")] +pub type Rx65to127octetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 65 to 127 Bytes Frames"] pub mod rx_65to127octets_frames_good_bad; #[doc = "RX_128TO255OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_128to255octets_frames_good_bad`] module"] -pub type RX_128TO255OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_128TO255OCTETS_FRAMES_GOOD_BAD")] +pub type Rx128to255octetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 128 to 255 Bytes Frames"] pub mod rx_128to255octets_frames_good_bad; #[doc = "RX_256TO511OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_256to511octets_frames_good_bad`] module"] -pub type RX_256TO511OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_256TO511OCTETS_FRAMES_GOOD_BAD")] +pub type Rx256to511octetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 256 to 511 Bytes Frames"] pub mod rx_256to511octets_frames_good_bad; #[doc = "RX_512TO1023OCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_512to1023octets_frames_good_bad`] module"] -pub type RX_512TO1023OCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_512TO1023OCTETS_FRAMES_GOOD_BAD")] +pub type Rx512to1023octetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames"] pub mod rx_512to1023octets_frames_good_bad; #[doc = "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_1024tomaxoctets_frames_good_bad`] module"] -pub type RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD")] +pub type Rx1024tomaxoctetsFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames"] pub mod rx_1024tomaxoctets_frames_good_bad; #[doc = "RX_UNICAST_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_unicast_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_unicast_frames_good`] module"] -pub type RX_UNICAST_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_UNICAST_FRAMES_GOOD")] +pub type RxUnicastFramesGood = crate::Reg; #[doc = "Receive Frame Count for Good Unicast Frames"] pub mod rx_unicast_frames_good; #[doc = "RX_LENGTH_ERROR_FRAMES (r) register accessor: Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_length_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_length_error_frames`] module"] -pub type RX_LENGTH_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_LENGTH_ERROR_FRAMES")] +pub type RxLengthErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Length Error Frames"] pub mod rx_length_error_frames; #[doc = "RX_OUT_OF_RANGE_TYPE_FRAMES (r) register accessor: Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_out_of_range_type_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_out_of_range_type_frames`] module"] -pub type RX_OUT_OF_RANGE_TYPE_FRAMES = crate::Reg; +#[doc(alias = "RX_OUT_OF_RANGE_TYPE_FRAMES")] +pub type RxOutOfRangeTypeFrames = crate::Reg; #[doc = "Receive Frame Count for Out of Range Frames"] pub mod rx_out_of_range_type_frames; #[doc = "RX_PAUSE_FRAMES (r) register accessor: Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_pause_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_pause_frames`] module"] -pub type RX_PAUSE_FRAMES = crate::Reg; +#[doc(alias = "RX_PAUSE_FRAMES")] +pub type RxPauseFrames = crate::Reg; #[doc = "Receive Frame Count for PAUSE Frames"] pub mod rx_pause_frames; #[doc = "RX_FIFO_OVERFLOW_FRAMES (r) register accessor: Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_fifo_overflow_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_fifo_overflow_frames`] module"] -pub type RX_FIFO_OVERFLOW_FRAMES = crate::Reg; +#[doc(alias = "RX_FIFO_OVERFLOW_FRAMES")] +pub type RxFifoOverflowFrames = crate::Reg; #[doc = "Receive Frame Count for FIFO Overflow Frames"] pub mod rx_fifo_overflow_frames; #[doc = "RX_VLAN_FRAMES_GOOD_BAD (r) register accessor: Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_vlan_frames_good_bad`] module"] -pub type RX_VLAN_FRAMES_GOOD_BAD = crate::Reg; +#[doc(alias = "RX_VLAN_FRAMES_GOOD_BAD")] +pub type RxVlanFramesGoodBad = crate::Reg; #[doc = "Receive Frame Count for Good and Bad VLAN Frames"] pub mod rx_vlan_frames_good_bad; #[doc = "RX_WATCHDOG_ERROR_FRAMES (r) register accessor: Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_watchdog_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_watchdog_error_frames`] module"] -pub type RX_WATCHDOG_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_WATCHDOG_ERROR_FRAMES")] +pub type RxWatchdogErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Watchdog Error Frames"] pub mod rx_watchdog_error_frames; #[doc = "RX_RECEIVE_ERROR_FRAMES (r) register accessor: Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_receive_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_receive_error_frames`] module"] -pub type RX_RECEIVE_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RX_RECEIVE_ERROR_FRAMES")] +pub type RxReceiveErrorFrames = crate::Reg; #[doc = "Receive Frame Count for Receive Error Frames"] pub mod rx_receive_error_frames; #[doc = "RX_CONTROL_FRAMES_GOOD (r) register accessor: Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_control_frames_good::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_control_frames_good`] module"] -pub type RX_CONTROL_FRAMES_GOOD = crate::Reg; +#[doc(alias = "RX_CONTROL_FRAMES_GOOD")] +pub type RxControlFramesGood = crate::Reg; #[doc = "Receive Frame Count for Good Control Frames Frames"] pub mod rx_control_frames_good; #[doc = "MMC_IPC_RECEIVE_INTERRUPT_MASK (rw) register accessor: MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt_mask`] module"] -pub type MMC_IPC_RECEIVE_INTERRUPT_MASK = crate::Reg; +#[doc(alias = "MMC_IPC_RECEIVE_INTERRUPT_MASK")] +pub type MmcIpcReceiveInterruptMask = crate::Reg; #[doc = "MMC Receive Checksum Offload Interrupt Mask Register"] pub mod mmc_ipc_receive_interrupt_mask; #[doc = "MMC_IPC_RECEIVE_INTERRUPT (r) register accessor: MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmc_ipc_receive_interrupt`] module"] -pub type MMC_IPC_RECEIVE_INTERRUPT = crate::Reg; +#[doc(alias = "MMC_IPC_RECEIVE_INTERRUPT")] +pub type MmcIpcReceiveInterrupt = crate::Reg; #[doc = "MMC Receive Checksum Offload Interrupt Register"] pub mod mmc_ipc_receive_interrupt; #[doc = "RXIPV4_GOOD_FRAMES (r) register accessor: RxIPv4 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_frames`] module"] -pub type RXIPV4_GOOD_FRAMES = crate::Reg; +#[doc(alias = "RXIPV4_GOOD_FRAMES")] +pub type Rxipv4GoodFrames = crate::Reg; #[doc = "RxIPv4 Good Frames Register"] pub mod rxipv4_good_frames; #[doc = "RXIPV4_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_frames`] module"] -pub type RXIPV4_HEADER_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RXIPV4_HEADER_ERROR_FRAMES")] +pub type Rxipv4HeaderErrorFrames = crate::Reg; #[doc = "Receive IPV4 Header Error Frame Counter Register"] pub mod rxipv4_header_error_frames; #[doc = "RXIPV4_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_frames`] module"] -pub type RXIPV4_NO_PAYLOAD_FRAMES = crate::Reg; +#[doc(alias = "RXIPV4_NO_PAYLOAD_FRAMES")] +pub type Rxipv4NoPayloadFrames = crate::Reg; #[doc = "Receive IPV4 No Payload Frame Counter Register"] pub mod rxipv4_no_payload_frames; #[doc = "RXIPV4_FRAGMENTED_FRAMES (r) register accessor: Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_frames`] module"] -pub type RXIPV4_FRAGMENTED_FRAMES = crate::Reg; +#[doc(alias = "RXIPV4_FRAGMENTED_FRAMES")] +pub type Rxipv4FragmentedFrames = crate::Reg; #[doc = "Receive IPV4 Fragmented Frame Counter Register"] pub mod rxipv4_fragmented_frames; #[doc = "RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES (r) register accessor: Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disabled_frames`] module"] -pub type RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES = crate::Reg; +#[doc(alias = "RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES")] +pub type Rxipv4UdpChecksumDisabledFrames = crate::Reg; #[doc = "Receive IPV4 UDP Checksum Disabled Frame Counter Register"] pub mod rxipv4_udp_checksum_disabled_frames; #[doc = "RXIPV6_GOOD_FRAMES (r) register accessor: RxIPv6 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_frames`] module"] -pub type RXIPV6_GOOD_FRAMES = crate::Reg; +#[doc(alias = "RXIPV6_GOOD_FRAMES")] +pub type Rxipv6GoodFrames = crate::Reg; #[doc = "RxIPv6 Good Frames Register"] pub mod rxipv6_good_frames; #[doc = "RXIPV6_HEADER_ERROR_FRAMES (r) register accessor: Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_frames`] module"] -pub type RXIPV6_HEADER_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RXIPV6_HEADER_ERROR_FRAMES")] +pub type Rxipv6HeaderErrorFrames = crate::Reg; #[doc = "Receive IPV6 Header Error Frame Counter Register"] pub mod rxipv6_header_error_frames; #[doc = "RXIPV6_NO_PAYLOAD_FRAMES (r) register accessor: Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_frames`] module"] -pub type RXIPV6_NO_PAYLOAD_FRAMES = crate::Reg; +#[doc(alias = "RXIPV6_NO_PAYLOAD_FRAMES")] +pub type Rxipv6NoPayloadFrames = crate::Reg; #[doc = "Receive IPV6 No Payload Frame Counter Register"] pub mod rxipv6_no_payload_frames; #[doc = "RXUDP_GOOD_FRAMES (r) register accessor: RxUDP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_frames`] module"] -pub type RXUDP_GOOD_FRAMES = crate::Reg; +#[doc(alias = "RXUDP_GOOD_FRAMES")] +pub type RxudpGoodFrames = crate::Reg; #[doc = "RxUDP Good Frames Register"] pub mod rxudp_good_frames; #[doc = "RXUDP_ERROR_FRAMES (r) register accessor: RxUDP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_frames`] module"] -pub type RXUDP_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RXUDP_ERROR_FRAMES")] +pub type RxudpErrorFrames = crate::Reg; #[doc = "RxUDP Error Frames Register"] pub mod rxudp_error_frames; #[doc = "RXTCP_GOOD_FRAMES (r) register accessor: RxTCP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_frames`] module"] -pub type RXTCP_GOOD_FRAMES = crate::Reg; +#[doc(alias = "RXTCP_GOOD_FRAMES")] +pub type RxtcpGoodFrames = crate::Reg; #[doc = "RxTCP Good Frames Register"] pub mod rxtcp_good_frames; #[doc = "RXTCP_ERROR_FRAMES (r) register accessor: RxTCP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_frames`] module"] -pub type RXTCP_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RXTCP_ERROR_FRAMES")] +pub type RxtcpErrorFrames = crate::Reg; #[doc = "RxTCP Error Frames Register"] pub mod rxtcp_error_frames; #[doc = "RXICMP_GOOD_FRAMES (r) register accessor: RxICMP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_frames`] module"] -pub type RXICMP_GOOD_FRAMES = crate::Reg; +#[doc(alias = "RXICMP_GOOD_FRAMES")] +pub type RxicmpGoodFrames = crate::Reg; #[doc = "RxICMP Good Frames Register"] pub mod rxicmp_good_frames; #[doc = "RXICMP_ERROR_FRAMES (r) register accessor: RxICMP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_frames::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_frames`] module"] -pub type RXICMP_ERROR_FRAMES = crate::Reg; +#[doc(alias = "RXICMP_ERROR_FRAMES")] +pub type RxicmpErrorFrames = crate::Reg; #[doc = "RxICMP Error Frames Register"] pub mod rxicmp_error_frames; #[doc = "RXIPV4_GOOD_OCTETS (r) register accessor: RxIPv4 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_good_octets`] module"] -pub type RXIPV4_GOOD_OCTETS = crate::Reg; +#[doc(alias = "RXIPV4_GOOD_OCTETS")] +pub type Rxipv4GoodOctets = crate::Reg; #[doc = "RxIPv4 Good Octets Register"] pub mod rxipv4_good_octets; #[doc = "RXIPV4_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_header_error_octets`] module"] -pub type RXIPV4_HEADER_ERROR_OCTETS = crate::Reg; +#[doc(alias = "RXIPV4_HEADER_ERROR_OCTETS")] +pub type Rxipv4HeaderErrorOctets = crate::Reg; #[doc = "Receive IPV4 Header Error Octet Counter Register"] pub mod rxipv4_header_error_octets; #[doc = "RXIPV4_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_no_payload_octets`] module"] -pub type RXIPV4_NO_PAYLOAD_OCTETS = crate::Reg; +#[doc(alias = "RXIPV4_NO_PAYLOAD_OCTETS")] +pub type Rxipv4NoPayloadOctets = crate::Reg; #[doc = "Receive IPV4 No Payload Octet Counter Register"] pub mod rxipv4_no_payload_octets; #[doc = "RXIPV4_FRAGMENTED_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_fragmented_octets`] module"] -pub type RXIPV4_FRAGMENTED_OCTETS = crate::Reg; +#[doc(alias = "RXIPV4_FRAGMENTED_OCTETS")] +pub type Rxipv4FragmentedOctets = crate::Reg; #[doc = "Receive IPV4 Fragmented Octet Counter Register"] pub mod rxipv4_fragmented_octets; #[doc = "RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS (r) register accessor: Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv4_udp_checksum_disable_octets`] module"] -pub type RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS = crate::Reg; +#[doc(alias = "RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS")] +pub type Rxipv4UdpChecksumDisableOctets = crate::Reg; #[doc = "Receive IPV4 Fragmented Octet Counter Register"] pub mod rxipv4_udp_checksum_disable_octets; #[doc = "RXIPV6_GOOD_OCTETS (r) register accessor: RxIPv6 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_good_octets`] module"] -pub type RXIPV6_GOOD_OCTETS = crate::Reg; +#[doc(alias = "RXIPV6_GOOD_OCTETS")] +pub type Rxipv6GoodOctets = crate::Reg; #[doc = "RxIPv6 Good Octets Register"] pub mod rxipv6_good_octets; #[doc = "RXIPV6_HEADER_ERROR_OCTETS (r) register accessor: Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_header_error_octets`] module"] -pub type RXIPV6_HEADER_ERROR_OCTETS = crate::Reg; +#[doc(alias = "RXIPV6_HEADER_ERROR_OCTETS")] +pub type Rxipv6HeaderErrorOctets = crate::Reg; #[doc = "Receive IPV6 Header Error Octet Counter Register"] pub mod rxipv6_header_error_octets; #[doc = "RXIPV6_NO_PAYLOAD_OCTETS (r) register accessor: Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxipv6_no_payload_octets`] module"] -pub type RXIPV6_NO_PAYLOAD_OCTETS = crate::Reg; +#[doc(alias = "RXIPV6_NO_PAYLOAD_OCTETS")] +pub type Rxipv6NoPayloadOctets = crate::Reg; #[doc = "Receive IPV6 No Payload Octet Counter Register"] pub mod rxipv6_no_payload_octets; #[doc = "RXUDP_GOOD_OCTETS (r) register accessor: Receive UDP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_good_octets`] module"] -pub type RXUDP_GOOD_OCTETS = crate::Reg; +#[doc(alias = "RXUDP_GOOD_OCTETS")] +pub type RxudpGoodOctets = crate::Reg; #[doc = "Receive UDP Good Octets Register"] pub mod rxudp_good_octets; #[doc = "RXUDP_ERROR_OCTETS (r) register accessor: Receive UDP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxudp_error_octets`] module"] -pub type RXUDP_ERROR_OCTETS = crate::Reg; +#[doc(alias = "RXUDP_ERROR_OCTETS")] +pub type RxudpErrorOctets = crate::Reg; #[doc = "Receive UDP Error Octets Register"] pub mod rxudp_error_octets; #[doc = "RXTCP_GOOD_OCTETS (r) register accessor: Receive TCP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_good_octets`] module"] -pub type RXTCP_GOOD_OCTETS = crate::Reg; +#[doc(alias = "RXTCP_GOOD_OCTETS")] +pub type RxtcpGoodOctets = crate::Reg; #[doc = "Receive TCP Good Octets Register"] pub mod rxtcp_good_octets; #[doc = "RXTCP_ERROR_OCTETS (r) register accessor: Receive TCP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxtcp_error_octets`] module"] -pub type RXTCP_ERROR_OCTETS = crate::Reg; +#[doc(alias = "RXTCP_ERROR_OCTETS")] +pub type RxtcpErrorOctets = crate::Reg; #[doc = "Receive TCP Error Octets Register"] pub mod rxtcp_error_octets; #[doc = "RXICMP_GOOD_OCTETS (r) register accessor: Receive ICMP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_good_octets`] module"] -pub type RXICMP_GOOD_OCTETS = crate::Reg; +#[doc(alias = "RXICMP_GOOD_OCTETS")] +pub type RxicmpGoodOctets = crate::Reg; #[doc = "Receive ICMP Good Octets Register"] pub mod rxicmp_good_octets; #[doc = "RXICMP_ERROR_OCTETS (r) register accessor: Receive ICMP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_octets::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rxicmp_error_octets`] module"] -pub type RXICMP_ERROR_OCTETS = crate::Reg; +#[doc(alias = "RXICMP_ERROR_OCTETS")] +pub type RxicmpErrorOctets = crate::Reg; #[doc = "Receive ICMP Error Octets Register"] pub mod rxicmp_error_octets; #[doc = "TIMESTAMP_CONTROL (rw) register accessor: Timestamp Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_control`] module"] -pub type TIMESTAMP_CONTROL = crate::Reg; +#[doc(alias = "TIMESTAMP_CONTROL")] +pub type TimestampControl = crate::Reg; #[doc = "Timestamp Control Register"] pub mod timestamp_control; #[doc = "SUB_SECOND_INCREMENT (rw) register accessor: Sub-Second Increment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sub_second_increment::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sub_second_increment::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sub_second_increment`] module"] -pub type SUB_SECOND_INCREMENT = crate::Reg; +#[doc(alias = "SUB_SECOND_INCREMENT")] +pub type SubSecondIncrement = crate::Reg; #[doc = "Sub-Second Increment Register"] pub mod sub_second_increment; #[doc = "SYSTEM_TIME_SECONDS (r) register accessor: System Time - Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds`] module"] -pub type SYSTEM_TIME_SECONDS = crate::Reg; +#[doc(alias = "SYSTEM_TIME_SECONDS")] +pub type SystemTimeSeconds = crate::Reg; #[doc = "System Time - Seconds Register"] pub mod system_time_seconds; #[doc = "SYSTEM_TIME_NANOSECONDS (r) register accessor: System Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds`] module"] -pub type SYSTEM_TIME_NANOSECONDS = crate::Reg; +#[doc(alias = "SYSTEM_TIME_NANOSECONDS")] +pub type SystemTimeNanoseconds = crate::Reg; #[doc = "System Time Nanoseconds Register"] pub mod system_time_nanoseconds; #[doc = "SYSTEM_TIME_SECONDS_UPDATE (rw) register accessor: System Time - Seconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds_update::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_seconds_update::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_seconds_update`] module"] -pub type SYSTEM_TIME_SECONDS_UPDATE = crate::Reg; +#[doc(alias = "SYSTEM_TIME_SECONDS_UPDATE")] +pub type SystemTimeSecondsUpdate = crate::Reg; #[doc = "System Time - Seconds Update Register"] pub mod system_time_seconds_update; #[doc = "SYSTEM_TIME_NANOSECONDS_UPDATE (rw) register accessor: System Time Nanoseconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds_update::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_nanoseconds_update`] module"] -pub type SYSTEM_TIME_NANOSECONDS_UPDATE = crate::Reg; +#[doc(alias = "SYSTEM_TIME_NANOSECONDS_UPDATE")] +pub type SystemTimeNanosecondsUpdate = crate::Reg; #[doc = "System Time Nanoseconds Update Register"] pub mod system_time_nanoseconds_update; #[doc = "TIMESTAMP_ADDEND (rw) register accessor: Timestamp Addend Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_addend::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_addend::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_addend`] module"] -pub type TIMESTAMP_ADDEND = crate::Reg; +#[doc(alias = "TIMESTAMP_ADDEND")] +pub type TimestampAddend = crate::Reg; #[doc = "Timestamp Addend Register"] pub mod timestamp_addend; #[doc = "TARGET_TIME_SECONDS (rw) register accessor: Target Time Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_seconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_seconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_seconds`] module"] -pub type TARGET_TIME_SECONDS = crate::Reg; +#[doc(alias = "TARGET_TIME_SECONDS")] +pub type TargetTimeSeconds = crate::Reg; #[doc = "Target Time Seconds Register"] pub mod target_time_seconds; #[doc = "TARGET_TIME_NANOSECONDS (rw) register accessor: Target Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nanoseconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_time_nanoseconds`] module"] -pub type TARGET_TIME_NANOSECONDS = crate::Reg; +#[doc(alias = "TARGET_TIME_NANOSECONDS")] +pub type TargetTimeNanoseconds = crate::Reg; #[doc = "Target Time Nanoseconds Register"] pub mod target_time_nanoseconds; #[doc = "SYSTEM_TIME_HIGHER_WORD_SECONDS (rw) register accessor: System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_higher_word_seconds::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@system_time_higher_word_seconds`] module"] -pub type SYSTEM_TIME_HIGHER_WORD_SECONDS = crate::Reg; +#[doc(alias = "SYSTEM_TIME_HIGHER_WORD_SECONDS")] +pub type SystemTimeHigherWordSeconds = crate::Reg; #[doc = "System Time - Higher Word Seconds Register"] pub mod system_time_higher_word_seconds; #[doc = "TIMESTAMP_STATUS (r) register accessor: Timestamp Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timestamp_status`] module"] -pub type TIMESTAMP_STATUS = crate::Reg; +#[doc(alias = "TIMESTAMP_STATUS")] +pub type TimestampStatus = crate::Reg; #[doc = "Timestamp Status Register"] pub mod timestamp_status; #[doc = "BUS_MODE (rw) register accessor: Bus Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_mode`] module"] -pub type BUS_MODE = crate::Reg; +#[doc(alias = "BUS_MODE")] +pub type BusMode = crate::Reg; #[doc = "Bus Mode Register"] pub mod bus_mode; #[doc = "TRANSMIT_POLL_DEMAND (rw) register accessor: Transmit Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_poll_demand`] module"] -pub type TRANSMIT_POLL_DEMAND = crate::Reg; +#[doc(alias = "TRANSMIT_POLL_DEMAND")] +pub type TransmitPollDemand = crate::Reg; #[doc = "Transmit Poll Demand Register"] pub mod transmit_poll_demand; #[doc = "RECEIVE_POLL_DEMAND (rw) register accessor: Receive Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_poll_demand::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_poll_demand::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_poll_demand`] module"] -pub type RECEIVE_POLL_DEMAND = crate::Reg; +#[doc(alias = "RECEIVE_POLL_DEMAND")] +pub type ReceivePollDemand = crate::Reg; #[doc = "Receive Poll Demand Register"] pub mod receive_poll_demand; #[doc = "RECEIVE_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Receive Descriptor Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_descriptor_list_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_descriptor_list_address`] module"] -pub type RECEIVE_DESCRIPTOR_LIST_ADDRESS = crate::Reg; +#[doc(alias = "RECEIVE_DESCRIPTOR_LIST_ADDRESS")] +pub type ReceiveDescriptorListAddress = crate::Reg; #[doc = "Receive Descriptor Address Register"] pub mod receive_descriptor_list_address; #[doc = "TRANSMIT_DESCRIPTOR_LIST_ADDRESS (rw) register accessor: Transmit descripter Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_descriptor_list_address::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transmit_descriptor_list_address`] module"] -pub type TRANSMIT_DESCRIPTOR_LIST_ADDRESS = crate::Reg; +#[doc(alias = "TRANSMIT_DESCRIPTOR_LIST_ADDRESS")] +pub type TransmitDescriptorListAddress = crate::Reg; #[doc = "Transmit descripter Address Register"] pub mod transmit_descriptor_list_address; #[doc = "STATUS (rw) register accessor: Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"] -pub type STATUS = crate::Reg; +#[doc(alias = "STATUS")] +pub type Status = crate::Reg; #[doc = "Status Register"] pub mod status; #[doc = "OPERATION_MODE (rw) register accessor: Operation Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`operation_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`operation_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@operation_mode`] module"] -pub type OPERATION_MODE = crate::Reg; +#[doc(alias = "OPERATION_MODE")] +pub type OperationMode = crate::Reg; #[doc = "Operation Mode Register"] pub mod operation_mode; #[doc = "INTERRUPT_ENABLE (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_enable::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_enable::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_enable`] module"] -pub type INTERRUPT_ENABLE = crate::Reg; +#[doc(alias = "INTERRUPT_ENABLE")] +pub type InterruptEnable = crate::Reg; #[doc = "Interrupt Enable Register"] pub mod interrupt_enable; #[doc = "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER (r) register accessor: Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@missed_frame_and_buffer_overflow_counter`] module"] -pub type MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER = crate::Reg; +#[doc(alias = "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER")] +pub type MissedFrameAndBufferOverflowCounter = crate::Reg; #[doc = "Missed Frame and Buffer Overflow Counter Register"] pub mod missed_frame_and_buffer_overflow_counter; #[doc = "RECEIVE_INTERRUPT_WATCHDOG_TIMER (rw) register accessor: Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@receive_interrupt_watchdog_timer`] module"] -pub type RECEIVE_INTERRUPT_WATCHDOG_TIMER = crate::Reg; +#[doc(alias = "RECEIVE_INTERRUPT_WATCHDOG_TIMER")] +pub type ReceiveInterruptWatchdogTimer = crate::Reg; #[doc = "Receive Interrupt Watchdog Timer Register"] pub mod receive_interrupt_watchdog_timer; #[doc = "AHB_STATUS (r) register accessor: AHB Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_status`] module"] -pub type AHB_STATUS = crate::Reg; +#[doc(alias = "AHB_STATUS")] +pub type AhbStatus = crate::Reg; #[doc = "AHB Status Register"] pub mod ahb_status; #[doc = "CURRENT_HOST_TRANSMIT_DESCRIPTOR (r) register accessor: Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_descriptor`] module"] -pub type CURRENT_HOST_TRANSMIT_DESCRIPTOR = crate::Reg; +#[doc(alias = "CURRENT_HOST_TRANSMIT_DESCRIPTOR")] +pub type CurrentHostTransmitDescriptor = crate::Reg; #[doc = "Current Host Transmit Descriptor Register"] pub mod current_host_transmit_descriptor; #[doc = "CURRENT_HOST_RECEIVE_DESCRIPTOR (r) register accessor: Current Host Receive Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_descriptor::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_descriptor`] module"] -pub type CURRENT_HOST_RECEIVE_DESCRIPTOR = crate::Reg; +#[doc(alias = "CURRENT_HOST_RECEIVE_DESCRIPTOR")] +pub type CurrentHostReceiveDescriptor = crate::Reg; #[doc = "Current Host Receive Descriptor Register"] pub mod current_host_receive_descriptor; #[doc = "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS (r) register accessor: Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_transmit_buffer_address`] module"] -pub type CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS = crate::Reg; +#[doc(alias = "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS")] +pub type CurrentHostTransmitBufferAddress = crate::Reg; #[doc = "Current Host Transmit Buffer Address Register"] pub mod current_host_transmit_buffer_address; #[doc = "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS (r) register accessor: Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_buffer_address::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@current_host_receive_buffer_address`] module"] -pub type CURRENT_HOST_RECEIVE_BUFFER_ADDRESS = crate::Reg; +#[doc(alias = "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS")] +pub type CurrentHostReceiveBufferAddress = crate::Reg; #[doc = "Current Host Receive Buffer Address Register"] pub mod current_host_receive_buffer_address; #[doc = "HW_FEATURE (rw) register accessor: HW Feature Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_feature::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hw_feature::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hw_feature`] module"] -pub type HW_FEATURE = crate::Reg; +#[doc(alias = "HW_FEATURE")] +pub type HwFeature = crate::Reg; #[doc = "HW Feature Register"] pub mod hw_feature; diff --git a/src/eth0/ahb_status.rs b/src/eth0/ahb_status.rs index 567a6350..54437125 100644 --- a/src/eth0/ahb_status.rs +++ b/src/eth0/ahb_status.rs @@ -1,22 +1,22 @@ #[doc = "Register `AHB_STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `AHBMS` reader - AHB Master Status"] -pub type AHBMS_R = crate::BitReader; +pub type AhbmsR = crate::BitReader; impl R { #[doc = "Bit 0 - AHB Master Status"] #[inline(always)] - pub fn ahbms(&self) -> AHBMS_R { - AHBMS_R::new((self.bits & 1) != 0) + pub fn ahbms(&self) -> AhbmsR { + AhbmsR::new((self.bits & 1) != 0) } } #[doc = "AHB Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AHB_STATUS_SPEC; -impl crate::RegisterSpec for AHB_STATUS_SPEC { +pub struct AhbStatusSpec; +impl crate::RegisterSpec for AhbStatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`ahb_status::R`](R) reader structure"] -impl crate::Readable for AHB_STATUS_SPEC {} +impl crate::Readable for AhbStatusSpec {} #[doc = "`reset()` method sets AHB_STATUS to value 0"] -impl crate::Resettable for AHB_STATUS_SPEC { +impl crate::Resettable for AhbStatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/bus_mode.rs b/src/eth0/bus_mode.rs index 68d7312a..69bd48cf 100644 --- a/src/eth0/bus_mode.rs +++ b/src/eth0/bus_mode.rs @@ -1,236 +1,227 @@ #[doc = "Register `BUS_MODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BUS_MODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SWR` reader - Software Reset"] -pub type SWR_R = crate::BitReader; +pub type SwrR = crate::BitReader; #[doc = "Field `SWR` writer - Software Reset"] -pub type SWR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SwrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DA` reader - DMA Arbitration Scheme"] -pub type DA_R = crate::BitReader; +pub type DaR = crate::BitReader; #[doc = "Field `DA` writer - DMA Arbitration Scheme"] -pub type DA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSL` reader - Descriptor Skip Length"] -pub type DSL_R = crate::FieldReader; +pub type DslR = crate::FieldReader; #[doc = "Field `DSL` writer - Descriptor Skip Length"] -pub type DSL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DslW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `ATDS` reader - Alternate Descriptor Size"] -pub type ATDS_R = crate::BitReader; +pub type AtdsR = crate::BitReader; #[doc = "Field `ATDS` writer - Alternate Descriptor Size"] -pub type ATDS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AtdsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PBL` reader - Programmable Burst Length"] -pub type PBL_R = crate::FieldReader; +pub type PblR = crate::FieldReader; #[doc = "Field `PBL` writer - Programmable Burst Length"] -pub type PBL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type PblW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `PR` reader - Priority Ratio"] -pub type PR_R = crate::FieldReader; +pub type PrR = crate::FieldReader; #[doc = "Field `PR` writer - Priority Ratio"] -pub type PR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PrW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FB` reader - Fixed Burst"] -pub type FB_R = crate::BitReader; +pub type FbR = crate::BitReader; #[doc = "Field `FB` writer - Fixed Burst"] -pub type FB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPBL` reader - Rx DMA PBL"] -pub type RPBL_R = crate::FieldReader; +pub type RpblR = crate::FieldReader; #[doc = "Field `RPBL` writer - Rx DMA PBL"] -pub type RPBL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type RpblW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `USP` reader - Use Seperate PBL"] -pub type USP_R = crate::BitReader; +pub type UspR = crate::BitReader; #[doc = "Field `USP` writer - Use Seperate PBL"] -pub type USP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UspW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PBLX8` reader - 8xPBL Mode"] -pub type PBLX8_R = crate::BitReader; +pub type Pblx8R = crate::BitReader; #[doc = "Field `PBLX8` writer - 8xPBL Mode"] -pub type PBLX8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pblx8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AAL` reader - Address Aligned Beats"] -pub type AAL_R = crate::BitReader; +pub type AalR = crate::BitReader; #[doc = "Field `AAL` writer - Address Aligned Beats"] -pub type AAL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AalW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MB` reader - Mixed Burst"] -pub type MB_R = crate::BitReader; +pub type MbR = crate::BitReader; #[doc = "Field `MB` writer - Mixed Burst"] -pub type MB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPR` reader - Transmit Priority"] -pub type TXPR_R = crate::BitReader; +pub type TxprR = crate::BitReader; #[doc = "Field `TXPR` writer - Transmit Priority"] -pub type TXPR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxprW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRWG` reader - Channel Priority Weights"] -pub type PRWG_R = crate::FieldReader; +pub type PrwgR = crate::FieldReader; impl R { #[doc = "Bit 0 - Software Reset"] #[inline(always)] - pub fn swr(&self) -> SWR_R { - SWR_R::new((self.bits & 1) != 0) + pub fn swr(&self) -> SwrR { + SwrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] - pub fn da(&self) -> DA_R { - DA_R::new(((self.bits >> 1) & 1) != 0) + pub fn da(&self) -> DaR { + DaR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] - pub fn dsl(&self) -> DSL_R { - DSL_R::new(((self.bits >> 2) & 0x1f) as u8) + pub fn dsl(&self) -> DslR { + DslR::new(((self.bits >> 2) & 0x1f) as u8) } #[doc = "Bit 7 - Alternate Descriptor Size"] #[inline(always)] - pub fn atds(&self) -> ATDS_R { - ATDS_R::new(((self.bits >> 7) & 1) != 0) + pub fn atds(&self) -> AtdsR { + AtdsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:13 - Programmable Burst Length"] #[inline(always)] - pub fn pbl(&self) -> PBL_R { - PBL_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn pbl(&self) -> PblR { + PblR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 14:15 - Priority Ratio"] #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new(((self.bits >> 14) & 3) as u8) + pub fn pr(&self) -> PrR { + PrR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Fixed Burst"] #[inline(always)] - pub fn fb(&self) -> FB_R { - FB_R::new(((self.bits >> 16) & 1) != 0) + pub fn fb(&self) -> FbR { + FbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:22 - Rx DMA PBL"] #[inline(always)] - pub fn rpbl(&self) -> RPBL_R { - RPBL_R::new(((self.bits >> 17) & 0x3f) as u8) + pub fn rpbl(&self) -> RpblR { + RpblR::new(((self.bits >> 17) & 0x3f) as u8) } #[doc = "Bit 23 - Use Seperate PBL"] #[inline(always)] - pub fn usp(&self) -> USP_R { - USP_R::new(((self.bits >> 23) & 1) != 0) + pub fn usp(&self) -> UspR { + UspR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - 8xPBL Mode"] #[inline(always)] - pub fn pblx8(&self) -> PBLX8_R { - PBLX8_R::new(((self.bits >> 24) & 1) != 0) + pub fn pblx8(&self) -> Pblx8R { + Pblx8R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Address Aligned Beats"] #[inline(always)] - pub fn aal(&self) -> AAL_R { - AAL_R::new(((self.bits >> 25) & 1) != 0) + pub fn aal(&self) -> AalR { + AalR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Mixed Burst"] #[inline(always)] - pub fn mb(&self) -> MB_R { - MB_R::new(((self.bits >> 26) & 1) != 0) + pub fn mb(&self) -> MbR { + MbR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Transmit Priority"] #[inline(always)] - pub fn txpr(&self) -> TXPR_R { - TXPR_R::new(((self.bits >> 27) & 1) != 0) + pub fn txpr(&self) -> TxprR { + TxprR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:29 - Channel Priority Weights"] #[inline(always)] - pub fn prwg(&self) -> PRWG_R { - PRWG_R::new(((self.bits >> 28) & 3) as u8) + pub fn prwg(&self) -> PrwgR { + PrwgR::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bit 0 - Software Reset"] #[inline(always)] #[must_use] - pub fn swr(&mut self) -> SWR_W { - SWR_W::new(self, 0) + pub fn swr(&mut self) -> SwrW { + SwrW::new(self, 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] #[must_use] - pub fn da(&mut self) -> DA_W { - DA_W::new(self, 1) + pub fn da(&mut self) -> DaW { + DaW::new(self, 1) } #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] #[must_use] - pub fn dsl(&mut self) -> DSL_W { - DSL_W::new(self, 2) + pub fn dsl(&mut self) -> DslW { + DslW::new(self, 2) } #[doc = "Bit 7 - Alternate Descriptor Size"] #[inline(always)] #[must_use] - pub fn atds(&mut self) -> ATDS_W { - ATDS_W::new(self, 7) + pub fn atds(&mut self) -> AtdsW { + AtdsW::new(self, 7) } #[doc = "Bits 8:13 - Programmable Burst Length"] #[inline(always)] #[must_use] - pub fn pbl(&mut self) -> PBL_W { - PBL_W::new(self, 8) + pub fn pbl(&mut self) -> PblW { + PblW::new(self, 8) } #[doc = "Bits 14:15 - Priority Ratio"] #[inline(always)] #[must_use] - pub fn pr(&mut self) -> PR_W { - PR_W::new(self, 14) + pub fn pr(&mut self) -> PrW { + PrW::new(self, 14) } #[doc = "Bit 16 - Fixed Burst"] #[inline(always)] #[must_use] - pub fn fb(&mut self) -> FB_W { - FB_W::new(self, 16) + pub fn fb(&mut self) -> FbW { + FbW::new(self, 16) } #[doc = "Bits 17:22 - Rx DMA PBL"] #[inline(always)] #[must_use] - pub fn rpbl(&mut self) -> RPBL_W { - RPBL_W::new(self, 17) + pub fn rpbl(&mut self) -> RpblW { + RpblW::new(self, 17) } #[doc = "Bit 23 - Use Seperate PBL"] #[inline(always)] #[must_use] - pub fn usp(&mut self) -> USP_W { - USP_W::new(self, 23) + pub fn usp(&mut self) -> UspW { + UspW::new(self, 23) } #[doc = "Bit 24 - 8xPBL Mode"] #[inline(always)] #[must_use] - pub fn pblx8(&mut self) -> PBLX8_W { - PBLX8_W::new(self, 24) + pub fn pblx8(&mut self) -> Pblx8W { + Pblx8W::new(self, 24) } #[doc = "Bit 25 - Address Aligned Beats"] #[inline(always)] #[must_use] - pub fn aal(&mut self) -> AAL_W { - AAL_W::new(self, 25) + pub fn aal(&mut self) -> AalW { + AalW::new(self, 25) } #[doc = "Bit 26 - Mixed Burst"] #[inline(always)] #[must_use] - pub fn mb(&mut self) -> MB_W { - MB_W::new(self, 26) + pub fn mb(&mut self) -> MbW { + MbW::new(self, 26) } #[doc = "Bit 27 - Transmit Priority"] #[inline(always)] #[must_use] - pub fn txpr(&mut self) -> TXPR_W { - TXPR_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn txpr(&mut self) -> TxprW { + TxprW::new(self, 27) } } #[doc = "Bus Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BUS_MODE_SPEC; -impl crate::RegisterSpec for BUS_MODE_SPEC { +pub struct BusModeSpec; +impl crate::RegisterSpec for BusModeSpec { type Ux = u32; } #[doc = "`read()` method returns [`bus_mode::R`](R) reader structure"] -impl crate::Readable for BUS_MODE_SPEC {} +impl crate::Readable for BusModeSpec {} #[doc = "`write(|w| ..)` method takes [`bus_mode::W`](W) writer structure"] -impl crate::Writable for BUS_MODE_SPEC { +impl crate::Writable for BusModeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BUS_MODE to value 0x0002_0101"] -impl crate::Resettable for BUS_MODE_SPEC { +impl crate::Resettable for BusModeSpec { const RESET_VALUE: u32 = 0x0002_0101; } diff --git a/src/eth0/current_host_receive_buffer_address.rs b/src/eth0/current_host_receive_buffer_address.rs index 3cabf1c4..c306a3e9 100644 --- a/src/eth0/current_host_receive_buffer_address.rs +++ b/src/eth0/current_host_receive_buffer_address.rs @@ -1,22 +1,22 @@ #[doc = "Register `CURRENT_HOST_RECEIVE_BUFFER_ADDRESS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CURRBUFAPTR` reader - Host Receive Buffer Address Pointer"] -pub type CURRBUFAPTR_R = crate::FieldReader; +pub type CurrbufaptrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Host Receive Buffer Address Pointer"] #[inline(always)] - pub fn currbufaptr(&self) -> CURRBUFAPTR_R { - CURRBUFAPTR_R::new(self.bits) + pub fn currbufaptr(&self) -> CurrbufaptrR { + CurrbufaptrR::new(self.bits) } } #[doc = "Current Host Receive Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC; -impl crate::RegisterSpec for CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC { +pub struct CurrentHostReceiveBufferAddressSpec; +impl crate::RegisterSpec for CurrentHostReceiveBufferAddressSpec { type Ux = u32; } #[doc = "`read()` method returns [`current_host_receive_buffer_address::R`](R) reader structure"] -impl crate::Readable for CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC {} +impl crate::Readable for CurrentHostReceiveBufferAddressSpec {} #[doc = "`reset()` method sets CURRENT_HOST_RECEIVE_BUFFER_ADDRESS to value 0"] -impl crate::Resettable for CURRENT_HOST_RECEIVE_BUFFER_ADDRESS_SPEC { +impl crate::Resettable for CurrentHostReceiveBufferAddressSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/current_host_receive_descriptor.rs b/src/eth0/current_host_receive_descriptor.rs index 92f5f854..eba292de 100644 --- a/src/eth0/current_host_receive_descriptor.rs +++ b/src/eth0/current_host_receive_descriptor.rs @@ -1,22 +1,22 @@ #[doc = "Register `CURRENT_HOST_RECEIVE_DESCRIPTOR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CURRDESAPTR` reader - Host Receive Descriptor Address Pointer"] -pub type CURRDESAPTR_R = crate::FieldReader; +pub type CurrdesaptrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Host Receive Descriptor Address Pointer"] #[inline(always)] - pub fn currdesaptr(&self) -> CURRDESAPTR_R { - CURRDESAPTR_R::new(self.bits) + pub fn currdesaptr(&self) -> CurrdesaptrR { + CurrdesaptrR::new(self.bits) } } #[doc = "Current Host Receive Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_receive_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC; -impl crate::RegisterSpec for CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC { +pub struct CurrentHostReceiveDescriptorSpec; +impl crate::RegisterSpec for CurrentHostReceiveDescriptorSpec { type Ux = u32; } #[doc = "`read()` method returns [`current_host_receive_descriptor::R`](R) reader structure"] -impl crate::Readable for CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC {} +impl crate::Readable for CurrentHostReceiveDescriptorSpec {} #[doc = "`reset()` method sets CURRENT_HOST_RECEIVE_DESCRIPTOR to value 0"] -impl crate::Resettable for CURRENT_HOST_RECEIVE_DESCRIPTOR_SPEC { +impl crate::Resettable for CurrentHostReceiveDescriptorSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/current_host_transmit_buffer_address.rs b/src/eth0/current_host_transmit_buffer_address.rs index 120f4717..d9a88383 100644 --- a/src/eth0/current_host_transmit_buffer_address.rs +++ b/src/eth0/current_host_transmit_buffer_address.rs @@ -1,22 +1,22 @@ #[doc = "Register `CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CURTBUFAPTR` reader - Host Transmit Buffer Address Pointer"] -pub type CURTBUFAPTR_R = crate::FieldReader; +pub type CurtbufaptrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Host Transmit Buffer Address Pointer"] #[inline(always)] - pub fn curtbufaptr(&self) -> CURTBUFAPTR_R { - CURTBUFAPTR_R::new(self.bits) + pub fn curtbufaptr(&self) -> CurtbufaptrR { + CurtbufaptrR::new(self.bits) } } #[doc = "Current Host Transmit Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_buffer_address::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC; -impl crate::RegisterSpec for CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC { +pub struct CurrentHostTransmitBufferAddressSpec; +impl crate::RegisterSpec for CurrentHostTransmitBufferAddressSpec { type Ux = u32; } #[doc = "`read()` method returns [`current_host_transmit_buffer_address::R`](R) reader structure"] -impl crate::Readable for CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC {} +impl crate::Readable for CurrentHostTransmitBufferAddressSpec {} #[doc = "`reset()` method sets CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS to value 0"] -impl crate::Resettable for CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS_SPEC { +impl crate::Resettable for CurrentHostTransmitBufferAddressSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/current_host_transmit_descriptor.rs b/src/eth0/current_host_transmit_descriptor.rs index b6c89a82..9f08e0bc 100644 --- a/src/eth0/current_host_transmit_descriptor.rs +++ b/src/eth0/current_host_transmit_descriptor.rs @@ -1,22 +1,22 @@ #[doc = "Register `CURRENT_HOST_TRANSMIT_DESCRIPTOR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CURTDESAPTR` reader - Host Transmit Descriptor Address Pointer"] -pub type CURTDESAPTR_R = crate::FieldReader; +pub type CurtdesaptrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Host Transmit Descriptor Address Pointer"] #[inline(always)] - pub fn curtdesaptr(&self) -> CURTDESAPTR_R { - CURTDESAPTR_R::new(self.bits) + pub fn curtdesaptr(&self) -> CurtdesaptrR { + CurtdesaptrR::new(self.bits) } } #[doc = "Current Host Transmit Descriptor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`current_host_transmit_descriptor::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC; -impl crate::RegisterSpec for CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC { +pub struct CurrentHostTransmitDescriptorSpec; +impl crate::RegisterSpec for CurrentHostTransmitDescriptorSpec { type Ux = u32; } #[doc = "`read()` method returns [`current_host_transmit_descriptor::R`](R) reader structure"] -impl crate::Readable for CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC {} +impl crate::Readable for CurrentHostTransmitDescriptorSpec {} #[doc = "`reset()` method sets CURRENT_HOST_TRANSMIT_DESCRIPTOR to value 0"] -impl crate::Resettable for CURRENT_HOST_TRANSMIT_DESCRIPTOR_SPEC { +impl crate::Resettable for CurrentHostTransmitDescriptorSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/debug.rs b/src/eth0/debug.rs index 9ae9427c..70f65456 100644 --- a/src/eth0/debug.rs +++ b/src/eth0/debug.rs @@ -1,99 +1,99 @@ #[doc = "Register `DEBUG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RPESTS` reader - MAC MII Receive Protocol Engine Status"] -pub type RPESTS_R = crate::BitReader; +pub type RpestsR = crate::BitReader; #[doc = "Field `RFCFCSTS` reader - MAC Receive Frame Controller FIFO Status"] -pub type RFCFCSTS_R = crate::FieldReader; +pub type RfcfcstsR = crate::FieldReader; #[doc = "Field `RWCSTS` reader - MTL Rx FIFO Write Controller Active Status"] -pub type RWCSTS_R = crate::BitReader; +pub type RwcstsR = crate::BitReader; #[doc = "Field `RRCSTS` reader - MTL Rx FIFO Read Controller State"] -pub type RRCSTS_R = crate::FieldReader; +pub type RrcstsR = crate::FieldReader; #[doc = "Field `RXFSTS` reader - MTL Rx FIFO Fill-level Status"] -pub type RXFSTS_R = crate::FieldReader; +pub type RxfstsR = crate::FieldReader; #[doc = "Field `TPESTS` reader - MAC MII Transmit Protocol Engine Status"] -pub type TPESTS_R = crate::BitReader; +pub type TpestsR = crate::BitReader; #[doc = "Field `TFCSTS` reader - MAC Transmit Frame Controller Status"] -pub type TFCSTS_R = crate::FieldReader; +pub type TfcstsR = crate::FieldReader; #[doc = "Field `TXPAUSED` reader - MAC transmitter in PAUSE"] -pub type TXPAUSED_R = crate::BitReader; +pub type TxpausedR = crate::BitReader; #[doc = "Field `TRCSTS` reader - MTL Tx FIFO Read Controller Status"] -pub type TRCSTS_R = crate::FieldReader; +pub type TrcstsR = crate::FieldReader; #[doc = "Field `TWCSTS` reader - MTL Tx FIFO Write Controller Active Status"] -pub type TWCSTS_R = crate::BitReader; +pub type TwcstsR = crate::BitReader; #[doc = "Field `TXFSTS` reader - MTL Tx FIFO Not Empty Status"] -pub type TXFSTS_R = crate::BitReader; +pub type TxfstsR = crate::BitReader; #[doc = "Field `TXSTSFSTS` reader - MTL TxStatus FIFO Full Status"] -pub type TXSTSFSTS_R = crate::BitReader; +pub type TxstsfstsR = crate::BitReader; impl R { #[doc = "Bit 0 - MAC MII Receive Protocol Engine Status"] #[inline(always)] - pub fn rpests(&self) -> RPESTS_R { - RPESTS_R::new((self.bits & 1) != 0) + pub fn rpests(&self) -> RpestsR { + RpestsR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - MAC Receive Frame Controller FIFO Status"] #[inline(always)] - pub fn rfcfcsts(&self) -> RFCFCSTS_R { - RFCFCSTS_R::new(((self.bits >> 1) & 3) as u8) + pub fn rfcfcsts(&self) -> RfcfcstsR { + RfcfcstsR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 4 - MTL Rx FIFO Write Controller Active Status"] #[inline(always)] - pub fn rwcsts(&self) -> RWCSTS_R { - RWCSTS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rwcsts(&self) -> RwcstsR { + RwcstsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - MTL Rx FIFO Read Controller State"] #[inline(always)] - pub fn rrcsts(&self) -> RRCSTS_R { - RRCSTS_R::new(((self.bits >> 5) & 3) as u8) + pub fn rrcsts(&self) -> RrcstsR { + RrcstsR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bits 8:9 - MTL Rx FIFO Fill-level Status"] #[inline(always)] - pub fn rxfsts(&self) -> RXFSTS_R { - RXFSTS_R::new(((self.bits >> 8) & 3) as u8) + pub fn rxfsts(&self) -> RxfstsR { + RxfstsR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 16 - MAC MII Transmit Protocol Engine Status"] #[inline(always)] - pub fn tpests(&self) -> TPESTS_R { - TPESTS_R::new(((self.bits >> 16) & 1) != 0) + pub fn tpests(&self) -> TpestsR { + TpestsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:18 - MAC Transmit Frame Controller Status"] #[inline(always)] - pub fn tfcsts(&self) -> TFCSTS_R { - TFCSTS_R::new(((self.bits >> 17) & 3) as u8) + pub fn tfcsts(&self) -> TfcstsR { + TfcstsR::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bit 19 - MAC transmitter in PAUSE"] #[inline(always)] - pub fn txpaused(&self) -> TXPAUSED_R { - TXPAUSED_R::new(((self.bits >> 19) & 1) != 0) + pub fn txpaused(&self) -> TxpausedR { + TxpausedR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - MTL Tx FIFO Read Controller Status"] #[inline(always)] - pub fn trcsts(&self) -> TRCSTS_R { - TRCSTS_R::new(((self.bits >> 20) & 3) as u8) + pub fn trcsts(&self) -> TrcstsR { + TrcstsR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 22 - MTL Tx FIFO Write Controller Active Status"] #[inline(always)] - pub fn twcsts(&self) -> TWCSTS_R { - TWCSTS_R::new(((self.bits >> 22) & 1) != 0) + pub fn twcsts(&self) -> TwcstsR { + TwcstsR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - MTL Tx FIFO Not Empty Status"] #[inline(always)] - pub fn txfsts(&self) -> TXFSTS_R { - TXFSTS_R::new(((self.bits >> 24) & 1) != 0) + pub fn txfsts(&self) -> TxfstsR { + TxfstsR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MTL TxStatus FIFO Full Status"] #[inline(always)] - pub fn txstsfsts(&self) -> TXSTSFSTS_R { - TXSTSFSTS_R::new(((self.bits >> 25) & 1) != 0) + pub fn txstsfsts(&self) -> TxstsfstsR { + TxstsfstsR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "Debug Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`debug::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DEBUG_SPEC; -impl crate::RegisterSpec for DEBUG_SPEC { +pub struct DebugSpec; +impl crate::RegisterSpec for DebugSpec { type Ux = u32; } #[doc = "`read()` method returns [`debug::R`](R) reader structure"] -impl crate::Readable for DEBUG_SPEC {} +impl crate::Readable for DebugSpec {} #[doc = "`reset()` method sets DEBUG to value 0"] -impl crate::Resettable for DEBUG_SPEC { +impl crate::Resettable for DebugSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/flow_control.rs b/src/eth0/flow_control.rs index 51f05926..654914e4 100644 --- a/src/eth0/flow_control.rs +++ b/src/eth0/flow_control.rs @@ -1,139 +1,130 @@ #[doc = "Register `FLOW_CONTROL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FLOW_CONTROL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FCA_BPA` reader - Flow Control Busy or Backpressure Activate"] -pub type FCA_BPA_R = crate::BitReader; +pub type FcaBpaR = crate::BitReader; #[doc = "Field `FCA_BPA` writer - Flow Control Busy or Backpressure Activate"] -pub type FCA_BPA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FcaBpaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TFE` reader - Transmit Flow Control Enable"] -pub type TFE_R = crate::BitReader; +pub type TfeR = crate::BitReader; #[doc = "Field `TFE` writer - Transmit Flow Control Enable"] -pub type TFE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TfeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RFE` reader - Receive Flow Control Enable"] -pub type RFE_R = crate::BitReader; +pub type RfeR = crate::BitReader; #[doc = "Field `RFE` writer - Receive Flow Control Enable"] -pub type RFE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RfeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UP` reader - Unicast Pause Frame Detect"] -pub type UP_R = crate::BitReader; +pub type UpR = crate::BitReader; #[doc = "Field `UP` writer - Unicast Pause Frame Detect"] -pub type UP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PLT` reader - Pause Low Threshold"] -pub type PLT_R = crate::FieldReader; +pub type PltR = crate::FieldReader; #[doc = "Field `PLT` writer - Pause Low Threshold"] -pub type PLT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PltW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DZPQ` reader - Disable Zero-Quanta Pause"] -pub type DZPQ_R = crate::BitReader; +pub type DzpqR = crate::BitReader; #[doc = "Field `DZPQ` writer - Disable Zero-Quanta Pause"] -pub type DZPQ_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DzpqW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PT` reader - Pause Time"] -pub type PT_R = crate::FieldReader; +pub type PtR = crate::FieldReader; #[doc = "Field `PT` writer - Pause Time"] -pub type PT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PtW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] - pub fn fca_bpa(&self) -> FCA_BPA_R { - FCA_BPA_R::new((self.bits & 1) != 0) + pub fn fca_bpa(&self) -> FcaBpaR { + FcaBpaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] - pub fn tfe(&self) -> TFE_R { - TFE_R::new(((self.bits >> 1) & 1) != 0) + pub fn tfe(&self) -> TfeR { + TfeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] - pub fn rfe(&self) -> RFE_R { - RFE_R::new(((self.bits >> 2) & 1) != 0) + pub fn rfe(&self) -> RfeR { + RfeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Unicast Pause Frame Detect"] #[inline(always)] - pub fn up(&self) -> UP_R { - UP_R::new(((self.bits >> 3) & 1) != 0) + pub fn up(&self) -> UpR { + UpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Pause Low Threshold"] #[inline(always)] - pub fn plt(&self) -> PLT_R { - PLT_R::new(((self.bits >> 4) & 3) as u8) + pub fn plt(&self) -> PltR { + PltR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 7 - Disable Zero-Quanta Pause"] #[inline(always)] - pub fn dzpq(&self) -> DZPQ_R { - DZPQ_R::new(((self.bits >> 7) & 1) != 0) + pub fn dzpq(&self) -> DzpqR { + DzpqR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 16:31 - Pause Time"] #[inline(always)] - pub fn pt(&self) -> PT_R { - PT_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn pt(&self) -> PtR { + PtR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] #[must_use] - pub fn fca_bpa(&mut self) -> FCA_BPA_W { - FCA_BPA_W::new(self, 0) + pub fn fca_bpa(&mut self) -> FcaBpaW { + FcaBpaW::new(self, 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] #[must_use] - pub fn tfe(&mut self) -> TFE_W { - TFE_W::new(self, 1) + pub fn tfe(&mut self) -> TfeW { + TfeW::new(self, 1) } #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] #[must_use] - pub fn rfe(&mut self) -> RFE_W { - RFE_W::new(self, 2) + pub fn rfe(&mut self) -> RfeW { + RfeW::new(self, 2) } #[doc = "Bit 3 - Unicast Pause Frame Detect"] #[inline(always)] #[must_use] - pub fn up(&mut self) -> UP_W { - UP_W::new(self, 3) + pub fn up(&mut self) -> UpW { + UpW::new(self, 3) } #[doc = "Bits 4:5 - Pause Low Threshold"] #[inline(always)] #[must_use] - pub fn plt(&mut self) -> PLT_W { - PLT_W::new(self, 4) + pub fn plt(&mut self) -> PltW { + PltW::new(self, 4) } #[doc = "Bit 7 - Disable Zero-Quanta Pause"] #[inline(always)] #[must_use] - pub fn dzpq(&mut self) -> DZPQ_W { - DZPQ_W::new(self, 7) + pub fn dzpq(&mut self) -> DzpqW { + DzpqW::new(self, 7) } #[doc = "Bits 16:31 - Pause Time"] #[inline(always)] #[must_use] - pub fn pt(&mut self) -> PT_W { - PT_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pt(&mut self) -> PtW { + PtW::new(self, 16) } } #[doc = "Flow Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flow_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flow_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FLOW_CONTROL_SPEC; -impl crate::RegisterSpec for FLOW_CONTROL_SPEC { +pub struct FlowControlSpec; +impl crate::RegisterSpec for FlowControlSpec { type Ux = u32; } #[doc = "`read()` method returns [`flow_control::R`](R) reader structure"] -impl crate::Readable for FLOW_CONTROL_SPEC {} +impl crate::Readable for FlowControlSpec {} #[doc = "`write(|w| ..)` method takes [`flow_control::W`](W) writer structure"] -impl crate::Writable for FLOW_CONTROL_SPEC { +impl crate::Writable for FlowControlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FLOW_CONTROL to value 0"] -impl crate::Resettable for FLOW_CONTROL_SPEC { +impl crate::Resettable for FlowControlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/gmii_address.rs b/src/eth0/gmii_address.rs index 7c948e93..5c571c46 100644 --- a/src/eth0/gmii_address.rs +++ b/src/eth0/gmii_address.rs @@ -1,109 +1,100 @@ #[doc = "Register `GMII_ADDRESS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GMII_ADDRESS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MB` reader - MII Busy"] -pub type MB_R = crate::BitReader; +pub type MbR = crate::BitReader; #[doc = "Field `MB` writer - MII Busy"] -pub type MB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MW` reader - MII Write"] -pub type MW_R = crate::BitReader; +pub type MwR = crate::BitReader; #[doc = "Field `MW` writer - MII Write"] -pub type MW_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MwW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CR` reader - CSR Clock Range"] -pub type CR_R = crate::FieldReader; +pub type CrR = crate::FieldReader; #[doc = "Field `CR` writer - CSR Clock Range"] -pub type CR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `MR` reader - MII Register"] -pub type MR_R = crate::FieldReader; +pub type MrR = crate::FieldReader; #[doc = "Field `MR` writer - MII Register"] -pub type MR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type MrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PA` reader - Physical Layer Address"] -pub type PA_R = crate::FieldReader; +pub type PaR = crate::FieldReader; #[doc = "Field `PA` writer - Physical Layer Address"] -pub type PA_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bit 0 - MII Busy"] #[inline(always)] - pub fn mb(&self) -> MB_R { - MB_R::new((self.bits & 1) != 0) + pub fn mb(&self) -> MbR { + MbR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MII Write"] #[inline(always)] - pub fn mw(&self) -> MW_R { - MW_R::new(((self.bits >> 1) & 1) != 0) + pub fn mw(&self) -> MwR { + MwR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] - pub fn cr(&self) -> CR_R { - CR_R::new(((self.bits >> 2) & 0x0f) as u8) + pub fn cr(&self) -> CrR { + CrR::new(((self.bits >> 2) & 0x0f) as u8) } #[doc = "Bits 6:10 - MII Register"] #[inline(always)] - pub fn mr(&self) -> MR_R { - MR_R::new(((self.bits >> 6) & 0x1f) as u8) + pub fn mr(&self) -> MrR { + MrR::new(((self.bits >> 6) & 0x1f) as u8) } #[doc = "Bits 11:15 - Physical Layer Address"] #[inline(always)] - pub fn pa(&self) -> PA_R { - PA_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pa(&self) -> PaR { + PaR::new(((self.bits >> 11) & 0x1f) as u8) } } impl W { #[doc = "Bit 0 - MII Busy"] #[inline(always)] #[must_use] - pub fn mb(&mut self) -> MB_W { - MB_W::new(self, 0) + pub fn mb(&mut self) -> MbW { + MbW::new(self, 0) } #[doc = "Bit 1 - MII Write"] #[inline(always)] #[must_use] - pub fn mw(&mut self) -> MW_W { - MW_W::new(self, 1) + pub fn mw(&mut self) -> MwW { + MwW::new(self, 1) } #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] #[must_use] - pub fn cr(&mut self) -> CR_W { - CR_W::new(self, 2) + pub fn cr(&mut self) -> CrW { + CrW::new(self, 2) } #[doc = "Bits 6:10 - MII Register"] #[inline(always)] #[must_use] - pub fn mr(&mut self) -> MR_W { - MR_W::new(self, 6) + pub fn mr(&mut self) -> MrW { + MrW::new(self, 6) } #[doc = "Bits 11:15 - Physical Layer Address"] #[inline(always)] #[must_use] - pub fn pa(&mut self) -> PA_W { - PA_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pa(&mut self) -> PaW { + PaW::new(self, 11) } } #[doc = "MII Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GMII_ADDRESS_SPEC; -impl crate::RegisterSpec for GMII_ADDRESS_SPEC { +pub struct GmiiAddressSpec; +impl crate::RegisterSpec for GmiiAddressSpec { type Ux = u32; } #[doc = "`read()` method returns [`gmii_address::R`](R) reader structure"] -impl crate::Readable for GMII_ADDRESS_SPEC {} +impl crate::Readable for GmiiAddressSpec {} #[doc = "`write(|w| ..)` method takes [`gmii_address::W`](W) writer structure"] -impl crate::Writable for GMII_ADDRESS_SPEC { +impl crate::Writable for GmiiAddressSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMII_ADDRESS to value 0"] -impl crate::Resettable for GMII_ADDRESS_SPEC { +impl crate::Resettable for GmiiAddressSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/gmii_data.rs b/src/eth0/gmii_data.rs index 6bb8fe48..bf40a312 100644 --- a/src/eth0/gmii_data.rs +++ b/src/eth0/gmii_data.rs @@ -1,49 +1,40 @@ #[doc = "Register `GMII_DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GMII_DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MD` reader - MII Data"] -pub type MD_R = crate::FieldReader; +pub type MdR = crate::FieldReader; #[doc = "Field `MD` writer - MII Data"] -pub type MD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type MdW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - MII Data"] #[inline(always)] - pub fn md(&self) -> MD_R { - MD_R::new((self.bits & 0xffff) as u16) + pub fn md(&self) -> MdR { + MdR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - MII Data"] #[inline(always)] #[must_use] - pub fn md(&mut self) -> MD_W { - MD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn md(&mut self) -> MdW { + MdW::new(self, 0) } } #[doc = "MII Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmii_data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmii_data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GMII_DATA_SPEC; -impl crate::RegisterSpec for GMII_DATA_SPEC { +pub struct GmiiDataSpec; +impl crate::RegisterSpec for GmiiDataSpec { type Ux = u32; } #[doc = "`read()` method returns [`gmii_data::R`](R) reader structure"] -impl crate::Readable for GMII_DATA_SPEC {} +impl crate::Readable for GmiiDataSpec {} #[doc = "`write(|w| ..)` method takes [`gmii_data::W`](W) writer structure"] -impl crate::Writable for GMII_DATA_SPEC { +impl crate::Writable for GmiiDataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GMII_DATA to value 0"] -impl crate::Resettable for GMII_DATA_SPEC { +impl crate::Resettable for GmiiDataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/hash_table_high.rs b/src/eth0/hash_table_high.rs index fa1df834..55631b10 100644 --- a/src/eth0/hash_table_high.rs +++ b/src/eth0/hash_table_high.rs @@ -1,49 +1,40 @@ #[doc = "Register `HASH_TABLE_HIGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HASH_TABLE_HIGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `HTH` reader - Hash Table High"] -pub type HTH_R = crate::FieldReader; +pub type HthR = crate::FieldReader; #[doc = "Field `HTH` writer - Hash Table High"] -pub type HTH_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type HthW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Hash Table High"] #[inline(always)] - pub fn hth(&self) -> HTH_R { - HTH_R::new(self.bits) + pub fn hth(&self) -> HthR { + HthR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Hash Table High"] #[inline(always)] #[must_use] - pub fn hth(&mut self) -> HTH_W { - HTH_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hth(&mut self) -> HthW { + HthW::new(self, 0) } } #[doc = "Hash Table High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HASH_TABLE_HIGH_SPEC; -impl crate::RegisterSpec for HASH_TABLE_HIGH_SPEC { +pub struct HashTableHighSpec; +impl crate::RegisterSpec for HashTableHighSpec { type Ux = u32; } #[doc = "`read()` method returns [`hash_table_high::R`](R) reader structure"] -impl crate::Readable for HASH_TABLE_HIGH_SPEC {} +impl crate::Readable for HashTableHighSpec {} #[doc = "`write(|w| ..)` method takes [`hash_table_high::W`](W) writer structure"] -impl crate::Writable for HASH_TABLE_HIGH_SPEC { +impl crate::Writable for HashTableHighSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HASH_TABLE_HIGH to value 0"] -impl crate::Resettable for HASH_TABLE_HIGH_SPEC { +impl crate::Resettable for HashTableHighSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/hash_table_low.rs b/src/eth0/hash_table_low.rs index b359af1a..ca8496c1 100644 --- a/src/eth0/hash_table_low.rs +++ b/src/eth0/hash_table_low.rs @@ -1,49 +1,40 @@ #[doc = "Register `HASH_TABLE_LOW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HASH_TABLE_LOW` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `HTL` reader - Hash Table Low"] -pub type HTL_R = crate::FieldReader; +pub type HtlR = crate::FieldReader; #[doc = "Field `HTL` writer - Hash Table Low"] -pub type HTL_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type HtlW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Hash Table Low"] #[inline(always)] - pub fn htl(&self) -> HTL_R { - HTL_R::new(self.bits) + pub fn htl(&self) -> HtlR { + HtlR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Hash Table Low"] #[inline(always)] #[must_use] - pub fn htl(&mut self) -> HTL_W { - HTL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn htl(&mut self) -> HtlW { + HtlW::new(self, 0) } } #[doc = "Hash Table Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hash_table_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hash_table_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HASH_TABLE_LOW_SPEC; -impl crate::RegisterSpec for HASH_TABLE_LOW_SPEC { +pub struct HashTableLowSpec; +impl crate::RegisterSpec for HashTableLowSpec { type Ux = u32; } #[doc = "`read()` method returns [`hash_table_low::R`](R) reader structure"] -impl crate::Readable for HASH_TABLE_LOW_SPEC {} +impl crate::Readable for HashTableLowSpec {} #[doc = "`write(|w| ..)` method takes [`hash_table_low::W`](W) writer structure"] -impl crate::Writable for HASH_TABLE_LOW_SPEC { +impl crate::Writable for HashTableLowSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HASH_TABLE_LOW to value 0"] -impl crate::Resettable for HASH_TABLE_LOW_SPEC { +impl crate::Resettable for HashTableLowSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/hw_feature.rs b/src/eth0/hw_feature.rs index bf757840..a637cb87 100644 --- a/src/eth0/hw_feature.rs +++ b/src/eth0/hw_feature.rs @@ -1,231 +1,222 @@ #[doc = "Register `HW_FEATURE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HW_FEATURE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MIISEL` reader - 10 or 100 Mbps support"] -pub type MIISEL_R = crate::BitReader; +pub type MiiselR = crate::BitReader; #[doc = "Field `GMIISEL` reader - 1000 Mbps support"] -pub type GMIISEL_R = crate::BitReader; +pub type GmiiselR = crate::BitReader; #[doc = "Field `HDSEL` reader - Half-Duplex support"] -pub type HDSEL_R = crate::BitReader; +pub type HdselR = crate::BitReader; #[doc = "Field `EXTHASHEN` reader - Expanded DA Hash Filter"] -pub type EXTHASHEN_R = crate::BitReader; +pub type ExthashenR = crate::BitReader; #[doc = "Field `HASHSEL` reader - HASH Filter"] -pub type HASHSEL_R = crate::BitReader; +pub type HashselR = crate::BitReader; #[doc = "Field `ADDMACADRSEL` reader - Multiple MAC Address Registers"] -pub type ADDMACADRSEL_R = crate::BitReader; +pub type AddmacadrselR = crate::BitReader; #[doc = "Field `PCSSEL` reader - PCS registers (TBI, SGMII, or RTBI PHY interface)"] -pub type PCSSEL_R = crate::BitReader; +pub type PcsselR = crate::BitReader; #[doc = "Field `L3L4FLTREN` reader - Layer 3 and Layer 4 Filter Feature"] -pub type L3L4FLTREN_R = crate::BitReader; +pub type L3l4fltrenR = crate::BitReader; #[doc = "Field `SMASEL` reader - SMA (MDIO) Interface"] -pub type SMASEL_R = crate::BitReader; +pub type SmaselR = crate::BitReader; #[doc = "Field `RWKSEL` reader - PMT Remote Wakeup"] -pub type RWKSEL_R = crate::BitReader; +pub type RwkselR = crate::BitReader; #[doc = "Field `MGKSEL` reader - PMT Magic Packet"] -pub type MGKSEL_R = crate::BitReader; +pub type MgkselR = crate::BitReader; #[doc = "Field `MMCSEL` reader - RMON Module"] -pub type MMCSEL_R = crate::BitReader; +pub type MmcselR = crate::BitReader; #[doc = "Field `TSVER1SEL` reader - Only IEEE 1588-2002 Timestamp"] -pub type TSVER1SEL_R = crate::BitReader; +pub type Tsver1selR = crate::BitReader; #[doc = "Field `TSVER2SEL` reader - IEEE 1588-2008 Advanced Timestamp"] -pub type TSVER2SEL_R = crate::BitReader; +pub type Tsver2selR = crate::BitReader; #[doc = "Field `EEESEL` reader - Energy Efficient Ethernet"] -pub type EEESEL_R = crate::BitReader; +pub type EeeselR = crate::BitReader; #[doc = "Field `AVSEL` reader - AV Feature"] -pub type AVSEL_R = crate::BitReader; +pub type AvselR = crate::BitReader; #[doc = "Field `TXCOESEL` reader - Checksum Offload in Tx"] -pub type TXCOESEL_R = crate::BitReader; +pub type TxcoeselR = crate::BitReader; #[doc = "Field `RXTYP1COE` reader - IP Checksum Offload (Type 1) in Rx"] -pub type RXTYP1COE_R = crate::BitReader; +pub type Rxtyp1coeR = crate::BitReader; #[doc = "Field `RXTYP2COE` reader - IP Checksum Offload (Type 2) in Rx"] -pub type RXTYP2COE_R = crate::BitReader; +pub type Rxtyp2coeR = crate::BitReader; #[doc = "Field `RXFIFOSIZE` reader - Rx FIFO > 2,048 Bytes"] -pub type RXFIFOSIZE_R = crate::BitReader; +pub type RxfifosizeR = crate::BitReader; #[doc = "Field `RXFIFOSIZE` writer - Rx FIFO > 2,048 Bytes"] -pub type RXFIFOSIZE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxfifosizeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXCHCNT` reader - Number of additional Rx channels"] -pub type RXCHCNT_R = crate::FieldReader; +pub type RxchcntR = crate::FieldReader; #[doc = "Field `TXCHCNT` reader - Number of additional Tx channels"] -pub type TXCHCNT_R = crate::FieldReader; +pub type TxchcntR = crate::FieldReader; #[doc = "Field `ENHDESSEL` reader - Alternate (Enhanced Descriptor)"] -pub type ENHDESSEL_R = crate::BitReader; +pub type EnhdesselR = crate::BitReader; #[doc = "Field `INTTSEN` reader - Timestamping with Internal System Time"] -pub type INTTSEN_R = crate::BitReader; +pub type InttsenR = crate::BitReader; #[doc = "Field `FLEXIPPSEN` reader - Flexible Pulse-Per-Second Output"] -pub type FLEXIPPSEN_R = crate::BitReader; +pub type FlexippsenR = crate::BitReader; #[doc = "Field `SAVLANINS` reader - Source Address or VLAN Insertion"] -pub type SAVLANINS_R = crate::BitReader; +pub type SavlaninsR = crate::BitReader; #[doc = "Field `ACTPHYIF` reader - Active or Selected PHY interface"] -pub type ACTPHYIF_R = crate::FieldReader; +pub type ActphyifR = crate::FieldReader; impl R { #[doc = "Bit 0 - 10 or 100 Mbps support"] #[inline(always)] - pub fn miisel(&self) -> MIISEL_R { - MIISEL_R::new((self.bits & 1) != 0) + pub fn miisel(&self) -> MiiselR { + MiiselR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - 1000 Mbps support"] #[inline(always)] - pub fn gmiisel(&self) -> GMIISEL_R { - GMIISEL_R::new(((self.bits >> 1) & 1) != 0) + pub fn gmiisel(&self) -> GmiiselR { + GmiiselR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Half-Duplex support"] #[inline(always)] - pub fn hdsel(&self) -> HDSEL_R { - HDSEL_R::new(((self.bits >> 2) & 1) != 0) + pub fn hdsel(&self) -> HdselR { + HdselR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Expanded DA Hash Filter"] #[inline(always)] - pub fn exthashen(&self) -> EXTHASHEN_R { - EXTHASHEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn exthashen(&self) -> ExthashenR { + ExthashenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - HASH Filter"] #[inline(always)] - pub fn hashsel(&self) -> HASHSEL_R { - HASHSEL_R::new(((self.bits >> 4) & 1) != 0) + pub fn hashsel(&self) -> HashselR { + HashselR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Multiple MAC Address Registers"] #[inline(always)] - pub fn addmacadrsel(&self) -> ADDMACADRSEL_R { - ADDMACADRSEL_R::new(((self.bits >> 5) & 1) != 0) + pub fn addmacadrsel(&self) -> AddmacadrselR { + AddmacadrselR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - PCS registers (TBI, SGMII, or RTBI PHY interface)"] #[inline(always)] - pub fn pcssel(&self) -> PCSSEL_R { - PCSSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn pcssel(&self) -> PcsselR { + PcsselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Layer 3 and Layer 4 Filter Feature"] #[inline(always)] - pub fn l3l4fltren(&self) -> L3L4FLTREN_R { - L3L4FLTREN_R::new(((self.bits >> 7) & 1) != 0) + pub fn l3l4fltren(&self) -> L3l4fltrenR { + L3l4fltrenR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - SMA (MDIO) Interface"] #[inline(always)] - pub fn smasel(&self) -> SMASEL_R { - SMASEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn smasel(&self) -> SmaselR { + SmaselR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PMT Remote Wakeup"] #[inline(always)] - pub fn rwksel(&self) -> RWKSEL_R { - RWKSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn rwksel(&self) -> RwkselR { + RwkselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - PMT Magic Packet"] #[inline(always)] - pub fn mgksel(&self) -> MGKSEL_R { - MGKSEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn mgksel(&self) -> MgkselR { + MgkselR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - RMON Module"] #[inline(always)] - pub fn mmcsel(&self) -> MMCSEL_R { - MMCSEL_R::new(((self.bits >> 11) & 1) != 0) + pub fn mmcsel(&self) -> MmcselR { + MmcselR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Only IEEE 1588-2002 Timestamp"] #[inline(always)] - pub fn tsver1sel(&self) -> TSVER1SEL_R { - TSVER1SEL_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsver1sel(&self) -> Tsver1selR { + Tsver1selR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - IEEE 1588-2008 Advanced Timestamp"] #[inline(always)] - pub fn tsver2sel(&self) -> TSVER2SEL_R { - TSVER2SEL_R::new(((self.bits >> 13) & 1) != 0) + pub fn tsver2sel(&self) -> Tsver2selR { + Tsver2selR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Energy Efficient Ethernet"] #[inline(always)] - pub fn eeesel(&self) -> EEESEL_R { - EEESEL_R::new(((self.bits >> 14) & 1) != 0) + pub fn eeesel(&self) -> EeeselR { + EeeselR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - AV Feature"] #[inline(always)] - pub fn avsel(&self) -> AVSEL_R { - AVSEL_R::new(((self.bits >> 15) & 1) != 0) + pub fn avsel(&self) -> AvselR { + AvselR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Checksum Offload in Tx"] #[inline(always)] - pub fn txcoesel(&self) -> TXCOESEL_R { - TXCOESEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn txcoesel(&self) -> TxcoeselR { + TxcoeselR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - IP Checksum Offload (Type 1) in Rx"] #[inline(always)] - pub fn rxtyp1coe(&self) -> RXTYP1COE_R { - RXTYP1COE_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxtyp1coe(&self) -> Rxtyp1coeR { + Rxtyp1coeR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - IP Checksum Offload (Type 2) in Rx"] #[inline(always)] - pub fn rxtyp2coe(&self) -> RXTYP2COE_R { - RXTYP2COE_R::new(((self.bits >> 18) & 1) != 0) + pub fn rxtyp2coe(&self) -> Rxtyp2coeR { + Rxtyp2coeR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Rx FIFO > 2,048 Bytes"] #[inline(always)] - pub fn rxfifosize(&self) -> RXFIFOSIZE_R { - RXFIFOSIZE_R::new(((self.bits >> 19) & 1) != 0) + pub fn rxfifosize(&self) -> RxfifosizeR { + RxfifosizeR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:21 - Number of additional Rx channels"] #[inline(always)] - pub fn rxchcnt(&self) -> RXCHCNT_R { - RXCHCNT_R::new(((self.bits >> 20) & 3) as u8) + pub fn rxchcnt(&self) -> RxchcntR { + RxchcntR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Number of additional Tx channels"] #[inline(always)] - pub fn txchcnt(&self) -> TXCHCNT_R { - TXCHCNT_R::new(((self.bits >> 22) & 3) as u8) + pub fn txchcnt(&self) -> TxchcntR { + TxchcntR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Alternate (Enhanced Descriptor)"] #[inline(always)] - pub fn enhdessel(&self) -> ENHDESSEL_R { - ENHDESSEL_R::new(((self.bits >> 24) & 1) != 0) + pub fn enhdessel(&self) -> EnhdesselR { + EnhdesselR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Timestamping with Internal System Time"] #[inline(always)] - pub fn inttsen(&self) -> INTTSEN_R { - INTTSEN_R::new(((self.bits >> 25) & 1) != 0) + pub fn inttsen(&self) -> InttsenR { + InttsenR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Flexible Pulse-Per-Second Output"] #[inline(always)] - pub fn flexippsen(&self) -> FLEXIPPSEN_R { - FLEXIPPSEN_R::new(((self.bits >> 26) & 1) != 0) + pub fn flexippsen(&self) -> FlexippsenR { + FlexippsenR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Source Address or VLAN Insertion"] #[inline(always)] - pub fn savlanins(&self) -> SAVLANINS_R { - SAVLANINS_R::new(((self.bits >> 27) & 1) != 0) + pub fn savlanins(&self) -> SavlaninsR { + SavlaninsR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - Active or Selected PHY interface"] #[inline(always)] - pub fn actphyif(&self) -> ACTPHYIF_R { - ACTPHYIF_R::new(((self.bits >> 28) & 7) as u8) + pub fn actphyif(&self) -> ActphyifR { + ActphyifR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bit 19 - Rx FIFO > 2,048 Bytes"] #[inline(always)] #[must_use] - pub fn rxfifosize(&mut self) -> RXFIFOSIZE_W { - RXFIFOSIZE_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rxfifosize(&mut self) -> RxfifosizeW { + RxfifosizeW::new(self, 19) } } #[doc = "HW Feature Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hw_feature::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hw_feature::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HW_FEATURE_SPEC; -impl crate::RegisterSpec for HW_FEATURE_SPEC { +pub struct HwFeatureSpec; +impl crate::RegisterSpec for HwFeatureSpec { type Ux = u32; } #[doc = "`read()` method returns [`hw_feature::R`](R) reader structure"] -impl crate::Readable for HW_FEATURE_SPEC {} +impl crate::Readable for HwFeatureSpec {} #[doc = "`write(|w| ..)` method takes [`hw_feature::W`](W) writer structure"] -impl crate::Writable for HW_FEATURE_SPEC { +impl crate::Writable for HwFeatureSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HW_FEATURE to value 0x0305_2f35"] -impl crate::Resettable for HW_FEATURE_SPEC { +impl crate::Resettable for HwFeatureSpec { const RESET_VALUE: u32 = 0x0305_2f35; } diff --git a/src/eth0/interrupt_enable.rs b/src/eth0/interrupt_enable.rs index ff4928e1..46e78364 100644 --- a/src/eth0/interrupt_enable.rs +++ b/src/eth0/interrupt_enable.rs @@ -1,259 +1,250 @@ #[doc = "Register `INTERRUPT_ENABLE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTERRUPT_ENABLE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TIE` reader - Transmit Interrupt Enable"] -pub type TIE_R = crate::BitReader; +pub type TieR = crate::BitReader; #[doc = "Field `TIE` writer - Transmit Interrupt Enable"] -pub type TIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TieW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSE` reader - Transmit Stopped Enable"] -pub type TSE_R = crate::BitReader; +pub type TseR = crate::BitReader; #[doc = "Field `TSE` writer - Transmit Stopped Enable"] -pub type TSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TUE` reader - Transmit Buffer Unvailable Enable"] -pub type TUE_R = crate::BitReader; +pub type TueR = crate::BitReader; #[doc = "Field `TUE` writer - Transmit Buffer Unvailable Enable"] -pub type TUE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TueW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TJE` reader - Transmit Jabber Timeout Enable"] -pub type TJE_R = crate::BitReader; +pub type TjeR = crate::BitReader; #[doc = "Field `TJE` writer - Transmit Jabber Timeout Enable"] -pub type TJE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TjeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OVE` reader - Overflow Interrupt Enable"] -pub type OVE_R = crate::BitReader; +pub type OveR = crate::BitReader; #[doc = "Field `OVE` writer - Overflow Interrupt Enable"] -pub type OVE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OveW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UNE` reader - Underflow Interrupt Enable"] -pub type UNE_R = crate::BitReader; +pub type UneR = crate::BitReader; #[doc = "Field `UNE` writer - Underflow Interrupt Enable"] -pub type UNE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RIE` reader - Receive Interrupt Enable"] -pub type RIE_R = crate::BitReader; +pub type RieR = crate::BitReader; #[doc = "Field `RIE` writer - Receive Interrupt Enable"] -pub type RIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RieW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RUE` reader - Receive Buffer Unavailable Enable"] -pub type RUE_R = crate::BitReader; +pub type RueR = crate::BitReader; #[doc = "Field `RUE` writer - Receive Buffer Unavailable Enable"] -pub type RUE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RueW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSE` reader - Receive Stopped Enable"] -pub type RSE_R = crate::BitReader; +pub type RseR = crate::BitReader; #[doc = "Field `RSE` writer - Receive Stopped Enable"] -pub type RSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWE` reader - Receive Watchdog Timeout Enable"] -pub type RWE_R = crate::BitReader; +pub type RweR = crate::BitReader; #[doc = "Field `RWE` writer - Receive Watchdog Timeout Enable"] -pub type RWE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RweW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETE` reader - Early Transmit Interrupt Enable"] -pub type ETE_R = crate::BitReader; +pub type EteR = crate::BitReader; #[doc = "Field `ETE` writer - Early Transmit Interrupt Enable"] -pub type ETE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EteW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FBE` reader - Fatal Bus Error Enable"] -pub type FBE_R = crate::BitReader; +pub type FbeR = crate::BitReader; #[doc = "Field `FBE` writer - Fatal Bus Error Enable"] -pub type FBE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FbeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERE` reader - Early Receive Interrupt Enable"] -pub type ERE_R = crate::BitReader; +pub type EreR = crate::BitReader; #[doc = "Field `ERE` writer - Early Receive Interrupt Enable"] -pub type ERE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EreW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AIE` reader - Abnormal Interrupt Summary Enable"] -pub type AIE_R = crate::BitReader; +pub type AieR = crate::BitReader; #[doc = "Field `AIE` writer - Abnormal Interrupt Summary Enable"] -pub type AIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AieW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NIE` reader - Normal Interrupt Summary Enable"] -pub type NIE_R = crate::BitReader; +pub type NieR = crate::BitReader; #[doc = "Field `NIE` writer - Normal Interrupt Summary Enable"] -pub type NIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NieW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] - pub fn tie(&self) -> TIE_R { - TIE_R::new((self.bits & 1) != 0) + pub fn tie(&self) -> TieR { + TieR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] - pub fn tse(&self) -> TSE_R { - TSE_R::new(((self.bits >> 1) & 1) != 0) + pub fn tse(&self) -> TseR { + TseR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmit Buffer Unvailable Enable"] #[inline(always)] - pub fn tue(&self) -> TUE_R { - TUE_R::new(((self.bits >> 2) & 1) != 0) + pub fn tue(&self) -> TueR { + TueR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] #[inline(always)] - pub fn tje(&self) -> TJE_R { - TJE_R::new(((self.bits >> 3) & 1) != 0) + pub fn tje(&self) -> TjeR { + TjeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ove(&self) -> OVE_R { - OVE_R::new(((self.bits >> 4) & 1) != 0) + pub fn ove(&self) -> OveR { + OveR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Underflow Interrupt Enable"] #[inline(always)] - pub fn une(&self) -> UNE_R { - UNE_R::new(((self.bits >> 5) & 1) != 0) + pub fn une(&self) -> UneR { + UneR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Receive Interrupt Enable"] #[inline(always)] - pub fn rie(&self) -> RIE_R { - RIE_R::new(((self.bits >> 6) & 1) != 0) + pub fn rie(&self) -> RieR { + RieR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] #[inline(always)] - pub fn rue(&self) -> RUE_R { - RUE_R::new(((self.bits >> 7) & 1) != 0) + pub fn rue(&self) -> RueR { + RueR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Receive Stopped Enable"] #[inline(always)] - pub fn rse(&self) -> RSE_R { - RSE_R::new(((self.bits >> 8) & 1) != 0) + pub fn rse(&self) -> RseR { + RseR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] #[inline(always)] - pub fn rwe(&self) -> RWE_R { - RWE_R::new(((self.bits >> 9) & 1) != 0) + pub fn rwe(&self) -> RweR { + RweR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Early Transmit Interrupt Enable"] #[inline(always)] - pub fn ete(&self) -> ETE_R { - ETE_R::new(((self.bits >> 10) & 1) != 0) + pub fn ete(&self) -> EteR { + EteR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Fatal Bus Error Enable"] #[inline(always)] - pub fn fbe(&self) -> FBE_R { - FBE_R::new(((self.bits >> 13) & 1) != 0) + pub fn fbe(&self) -> FbeR { + FbeR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Early Receive Interrupt Enable"] #[inline(always)] - pub fn ere(&self) -> ERE_R { - ERE_R::new(((self.bits >> 14) & 1) != 0) + pub fn ere(&self) -> EreR { + EreR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] #[inline(always)] - pub fn aie(&self) -> AIE_R { - AIE_R::new(((self.bits >> 15) & 1) != 0) + pub fn aie(&self) -> AieR { + AieR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Normal Interrupt Summary Enable"] #[inline(always)] - pub fn nie(&self) -> NIE_R { - NIE_R::new(((self.bits >> 16) & 1) != 0) + pub fn nie(&self) -> NieR { + NieR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tie(&mut self) -> TIE_W { - TIE_W::new(self, 0) + pub fn tie(&mut self) -> TieW { + TieW::new(self, 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] #[must_use] - pub fn tse(&mut self) -> TSE_W { - TSE_W::new(self, 1) + pub fn tse(&mut self) -> TseW { + TseW::new(self, 1) } #[doc = "Bit 2 - Transmit Buffer Unvailable Enable"] #[inline(always)] #[must_use] - pub fn tue(&mut self) -> TUE_W { - TUE_W::new(self, 2) + pub fn tue(&mut self) -> TueW { + TueW::new(self, 2) } #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] #[inline(always)] #[must_use] - pub fn tje(&mut self) -> TJE_W { - TJE_W::new(self, 3) + pub fn tje(&mut self) -> TjeW { + TjeW::new(self, 3) } #[doc = "Bit 4 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ove(&mut self) -> OVE_W { - OVE_W::new(self, 4) + pub fn ove(&mut self) -> OveW { + OveW::new(self, 4) } #[doc = "Bit 5 - Underflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn une(&mut self) -> UNE_W { - UNE_W::new(self, 5) + pub fn une(&mut self) -> UneW { + UneW::new(self, 5) } #[doc = "Bit 6 - Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rie(&mut self) -> RIE_W { - RIE_W::new(self, 6) + pub fn rie(&mut self) -> RieW { + RieW::new(self, 6) } #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] #[inline(always)] #[must_use] - pub fn rue(&mut self) -> RUE_W { - RUE_W::new(self, 7) + pub fn rue(&mut self) -> RueW { + RueW::new(self, 7) } #[doc = "Bit 8 - Receive Stopped Enable"] #[inline(always)] #[must_use] - pub fn rse(&mut self) -> RSE_W { - RSE_W::new(self, 8) + pub fn rse(&mut self) -> RseW { + RseW::new(self, 8) } #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] #[inline(always)] #[must_use] - pub fn rwe(&mut self) -> RWE_W { - RWE_W::new(self, 9) + pub fn rwe(&mut self) -> RweW { + RweW::new(self, 9) } #[doc = "Bit 10 - Early Transmit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ete(&mut self) -> ETE_W { - ETE_W::new(self, 10) + pub fn ete(&mut self) -> EteW { + EteW::new(self, 10) } #[doc = "Bit 13 - Fatal Bus Error Enable"] #[inline(always)] #[must_use] - pub fn fbe(&mut self) -> FBE_W { - FBE_W::new(self, 13) + pub fn fbe(&mut self) -> FbeW { + FbeW::new(self, 13) } #[doc = "Bit 14 - Early Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ere(&mut self) -> ERE_W { - ERE_W::new(self, 14) + pub fn ere(&mut self) -> EreW { + EreW::new(self, 14) } #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] #[inline(always)] #[must_use] - pub fn aie(&mut self) -> AIE_W { - AIE_W::new(self, 15) + pub fn aie(&mut self) -> AieW { + AieW::new(self, 15) } #[doc = "Bit 16 - Normal Interrupt Summary Enable"] #[inline(always)] #[must_use] - pub fn nie(&mut self) -> NIE_W { - NIE_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nie(&mut self) -> NieW { + NieW::new(self, 16) } } #[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTERRUPT_ENABLE_SPEC; -impl crate::RegisterSpec for INTERRUPT_ENABLE_SPEC { +pub struct InterruptEnableSpec; +impl crate::RegisterSpec for InterruptEnableSpec { type Ux = u32; } #[doc = "`read()` method returns [`interrupt_enable::R`](R) reader structure"] -impl crate::Readable for INTERRUPT_ENABLE_SPEC {} +impl crate::Readable for InterruptEnableSpec {} #[doc = "`write(|w| ..)` method takes [`interrupt_enable::W`](W) writer structure"] -impl crate::Writable for INTERRUPT_ENABLE_SPEC { +impl crate::Writable for InterruptEnableSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTERRUPT_ENABLE to value 0"] -impl crate::Resettable for INTERRUPT_ENABLE_SPEC { +impl crate::Resettable for InterruptEnableSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/interrupt_mask.rs b/src/eth0/interrupt_mask.rs index f4787cf9..11806df8 100644 --- a/src/eth0/interrupt_mask.rs +++ b/src/eth0/interrupt_mask.rs @@ -1,64 +1,55 @@ #[doc = "Register `INTERRUPT_MASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTERRUPT_MASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PMTIM` reader - PMT Interrupt Mask"] -pub type PMTIM_R = crate::BitReader; +pub type PmtimR = crate::BitReader; #[doc = "Field `PMTIM` writer - PMT Interrupt Mask"] -pub type PMTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PmtimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSIM` reader - Timestamp Interrupt Mask"] -pub type TSIM_R = crate::BitReader; +pub type TsimR = crate::BitReader; #[doc = "Field `TSIM` writer - Timestamp Interrupt Mask"] -pub type TSIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 3 - PMT Interrupt Mask"] #[inline(always)] - pub fn pmtim(&self) -> PMTIM_R { - PMTIM_R::new(((self.bits >> 3) & 1) != 0) + pub fn pmtim(&self) -> PmtimR { + PmtimR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] - pub fn tsim(&self) -> TSIM_R { - TSIM_R::new(((self.bits >> 9) & 1) != 0) + pub fn tsim(&self) -> TsimR { + TsimR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 3 - PMT Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pmtim(&mut self) -> PMTIM_W { - PMTIM_W::new(self, 3) + pub fn pmtim(&mut self) -> PmtimW { + PmtimW::new(self, 3) } #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tsim(&mut self) -> TSIM_W { - TSIM_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tsim(&mut self) -> TsimW { + TsimW::new(self, 9) } } #[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTERRUPT_MASK_SPEC; -impl crate::RegisterSpec for INTERRUPT_MASK_SPEC { +pub struct InterruptMaskSpec; +impl crate::RegisterSpec for InterruptMaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`interrupt_mask::R`](R) reader structure"] -impl crate::Readable for INTERRUPT_MASK_SPEC {} +impl crate::Readable for InterruptMaskSpec {} #[doc = "`write(|w| ..)` method takes [`interrupt_mask::W`](W) writer structure"] -impl crate::Writable for INTERRUPT_MASK_SPEC { +impl crate::Writable for InterruptMaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTERRUPT_MASK to value 0"] -impl crate::Resettable for INTERRUPT_MASK_SPEC { +impl crate::Resettable for InterruptMaskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/interrupt_status.rs b/src/eth0/interrupt_status.rs index 0a7aa7e6..bd75414d 100644 --- a/src/eth0/interrupt_status.rs +++ b/src/eth0/interrupt_status.rs @@ -1,57 +1,57 @@ #[doc = "Register `INTERRUPT_STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PMTIS` reader - PMT Interrupt Status"] -pub type PMTIS_R = crate::BitReader; +pub type PmtisR = crate::BitReader; #[doc = "Field `MMCIS` reader - MMC Interrupt Status"] -pub type MMCIS_R = crate::BitReader; +pub type MmcisR = crate::BitReader; #[doc = "Field `MMCRXIS` reader - MMC Receive Interrupt Status"] -pub type MMCRXIS_R = crate::BitReader; +pub type MmcrxisR = crate::BitReader; #[doc = "Field `MMCTXIS` reader - MMC Transmit Interrupt Status"] -pub type MMCTXIS_R = crate::BitReader; +pub type MmctxisR = crate::BitReader; #[doc = "Field `MMCRXIPIS` reader - MMC Receive Checksum Offload Interrupt Status"] -pub type MMCRXIPIS_R = crate::BitReader; +pub type MmcrxipisR = crate::BitReader; #[doc = "Field `TSIS` reader - Timestamp Interrupt Status"] -pub type TSIS_R = crate::BitReader; +pub type TsisR = crate::BitReader; impl R { #[doc = "Bit 3 - PMT Interrupt Status"] #[inline(always)] - pub fn pmtis(&self) -> PMTIS_R { - PMTIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn pmtis(&self) -> PmtisR { + PmtisR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Interrupt Status"] #[inline(always)] - pub fn mmcis(&self) -> MMCIS_R { - MMCIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn mmcis(&self) -> MmcisR { + MmcisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive Interrupt Status"] #[inline(always)] - pub fn mmcrxis(&self) -> MMCRXIS_R { - MMCRXIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn mmcrxis(&self) -> MmcrxisR { + MmcrxisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Transmit Interrupt Status"] #[inline(always)] - pub fn mmctxis(&self) -> MMCTXIS_R { - MMCTXIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn mmctxis(&self) -> MmctxisR { + MmctxisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Receive Checksum Offload Interrupt Status"] #[inline(always)] - pub fn mmcrxipis(&self) -> MMCRXIPIS_R { - MMCRXIPIS_R::new(((self.bits >> 7) & 1) != 0) + pub fn mmcrxipis(&self) -> MmcrxipisR { + MmcrxipisR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - Timestamp Interrupt Status"] #[inline(always)] - pub fn tsis(&self) -> TSIS_R { - TSIS_R::new(((self.bits >> 9) & 1) != 0) + pub fn tsis(&self) -> TsisR { + TsisR::new(((self.bits >> 9) & 1) != 0) } } #[doc = "Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INTERRUPT_STATUS_SPEC; -impl crate::RegisterSpec for INTERRUPT_STATUS_SPEC { +pub struct InterruptStatusSpec; +impl crate::RegisterSpec for InterruptStatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`interrupt_status::R`](R) reader structure"] -impl crate::Readable for INTERRUPT_STATUS_SPEC {} +impl crate::Readable for InterruptStatusSpec {} #[doc = "`reset()` method sets INTERRUPT_STATUS to value 0"] -impl crate::Resettable for INTERRUPT_STATUS_SPEC { +impl crate::Resettable for InterruptStatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mac_address0_high.rs b/src/eth0/mac_address0_high.rs index 42dafe8d..a284374e 100644 --- a/src/eth0/mac_address0_high.rs +++ b/src/eth0/mac_address0_high.rs @@ -1,56 +1,47 @@ #[doc = "Register `MAC_ADDRESS0_HIGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS0_HIGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRHI` reader - MAC Address0 \\[47:32\\]"] -pub type ADDRHI_R = crate::FieldReader; +pub type AddrhiR = crate::FieldReader; #[doc = "Field `ADDRHI` writer - MAC Address0 \\[47:32\\]"] -pub type ADDRHI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AddrhiW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `AE` reader - Address Enable"] -pub type AE_R = crate::BitReader; +pub type AeR = crate::BitReader; impl R { #[doc = "Bits 0:15 - MAC Address0 \\[47:32\\]"] #[inline(always)] - pub fn addrhi(&self) -> ADDRHI_R { - ADDRHI_R::new((self.bits & 0xffff) as u16) + pub fn addrhi(&self) -> AddrhiR { + AddrhiR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - pub fn ae(&self) -> AE_R { - AE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ae(&self) -> AeR { + AeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - MAC Address0 \\[47:32\\]"] #[inline(always)] #[must_use] - pub fn addrhi(&mut self) -> ADDRHI_W { - ADDRHI_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrhi(&mut self) -> AddrhiW { + AddrhiW::new(self, 0) } } #[doc = "MAC Address0 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS0_HIGH_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS0_HIGH_SPEC { +pub struct MacAddress0HighSpec; +impl crate::RegisterSpec for MacAddress0HighSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address0_high::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS0_HIGH_SPEC {} +impl crate::Readable for MacAddress0HighSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address0_high::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS0_HIGH_SPEC { +impl crate::Writable for MacAddress0HighSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS0_HIGH to value 0x8000_ffff"] -impl crate::Resettable for MAC_ADDRESS0_HIGH_SPEC { +impl crate::Resettable for MacAddress0HighSpec { const RESET_VALUE: u32 = 0x8000_ffff; } diff --git a/src/eth0/mac_address0_low.rs b/src/eth0/mac_address0_low.rs index 02208270..1ffb48de 100644 --- a/src/eth0/mac_address0_low.rs +++ b/src/eth0/mac_address0_low.rs @@ -1,49 +1,40 @@ #[doc = "Register `MAC_ADDRESS0_LOW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS0_LOW` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRLO` reader - MAC Address0 \\[31:0\\]"] -pub type ADDRLO_R = crate::FieldReader; +pub type AddrloR = crate::FieldReader; #[doc = "Field `ADDRLO` writer - MAC Address0 \\[31:0\\]"] -pub type ADDRLO_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddrloW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - MAC Address0 \\[31:0\\]"] #[inline(always)] - pub fn addrlo(&self) -> ADDRLO_R { - ADDRLO_R::new(self.bits) + pub fn addrlo(&self) -> AddrloR { + AddrloR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - MAC Address0 \\[31:0\\]"] #[inline(always)] #[must_use] - pub fn addrlo(&mut self) -> ADDRLO_W { - ADDRLO_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrlo(&mut self) -> AddrloW { + AddrloW::new(self, 0) } } #[doc = "MAC Address0 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address0_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address0_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS0_LOW_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS0_LOW_SPEC { +pub struct MacAddress0LowSpec; +impl crate::RegisterSpec for MacAddress0LowSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address0_low::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS0_LOW_SPEC {} +impl crate::Readable for MacAddress0LowSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address0_low::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS0_LOW_SPEC { +impl crate::Writable for MacAddress0LowSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS0_LOW to value 0xffff_ffff"] -impl crate::Resettable for MAC_ADDRESS0_LOW_SPEC { +impl crate::Resettable for MacAddress0LowSpec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/eth0/mac_address1_high.rs b/src/eth0/mac_address1_high.rs index eba0d3c5..f1f5b796 100644 --- a/src/eth0/mac_address1_high.rs +++ b/src/eth0/mac_address1_high.rs @@ -1,94 +1,85 @@ #[doc = "Register `MAC_ADDRESS1_HIGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS1_HIGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRHI` reader - MAC Address1 \\[47:32\\]"] -pub type ADDRHI_R = crate::FieldReader; +pub type AddrhiR = crate::FieldReader; #[doc = "Field `ADDRHI` writer - MAC Address1 \\[47:32\\]"] -pub type ADDRHI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AddrhiW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `MBC` reader - Mask Byte Control"] -pub type MBC_R = crate::FieldReader; +pub type MbcR = crate::FieldReader; #[doc = "Field `MBC` writer - Mask Byte Control"] -pub type MBC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type MbcW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `SA` reader - Source Address"] -pub type SA_R = crate::BitReader; +pub type SaR = crate::BitReader; #[doc = "Field `SA` writer - Source Address"] -pub type SA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AE` reader - Address Enable"] -pub type AE_R = crate::BitReader; +pub type AeR = crate::BitReader; #[doc = "Field `AE` writer - Address Enable"] -pub type AE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:15 - MAC Address1 \\[47:32\\]"] #[inline(always)] - pub fn addrhi(&self) -> ADDRHI_R { - ADDRHI_R::new((self.bits & 0xffff) as u16) + pub fn addrhi(&self) -> AddrhiR { + AddrhiR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - pub fn mbc(&self) -> MBC_R { - MBC_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn mbc(&self) -> MbcR { + MbcR::new(((self.bits >> 24) & 0x3f) as u8) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - pub fn sa(&self) -> SA_R { - SA_R::new(((self.bits >> 30) & 1) != 0) + pub fn sa(&self) -> SaR { + SaR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - pub fn ae(&self) -> AE_R { - AE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ae(&self) -> AeR { + AeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - MAC Address1 \\[47:32\\]"] #[inline(always)] #[must_use] - pub fn addrhi(&mut self) -> ADDRHI_W { - ADDRHI_W::new(self, 0) + pub fn addrhi(&mut self) -> AddrhiW { + AddrhiW::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] #[must_use] - pub fn mbc(&mut self) -> MBC_W { - MBC_W::new(self, 24) + pub fn mbc(&mut self) -> MbcW { + MbcW::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] #[must_use] - pub fn sa(&mut self) -> SA_W { - SA_W::new(self, 30) + pub fn sa(&mut self) -> SaW { + SaW::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] #[must_use] - pub fn ae(&mut self) -> AE_W { - AE_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ae(&mut self) -> AeW { + AeW::new(self, 31) } } #[doc = "MAC Address1 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS1_HIGH_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS1_HIGH_SPEC { +pub struct MacAddress1HighSpec; +impl crate::RegisterSpec for MacAddress1HighSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address1_high::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS1_HIGH_SPEC {} +impl crate::Readable for MacAddress1HighSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address1_high::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS1_HIGH_SPEC { +impl crate::Writable for MacAddress1HighSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS1_HIGH to value 0xffff"] -impl crate::Resettable for MAC_ADDRESS1_HIGH_SPEC { +impl crate::Resettable for MacAddress1HighSpec { const RESET_VALUE: u32 = 0xffff; } diff --git a/src/eth0/mac_address1_low.rs b/src/eth0/mac_address1_low.rs index e21e24e5..787f9a64 100644 --- a/src/eth0/mac_address1_low.rs +++ b/src/eth0/mac_address1_low.rs @@ -1,49 +1,40 @@ #[doc = "Register `MAC_ADDRESS1_LOW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS1_LOW` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRLO` reader - MAC Address1 \\[31:0\\]"] -pub type ADDRLO_R = crate::FieldReader; +pub type AddrloR = crate::FieldReader; #[doc = "Field `ADDRLO` writer - MAC Address1 \\[31:0\\]"] -pub type ADDRLO_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddrloW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - MAC Address1 \\[31:0\\]"] #[inline(always)] - pub fn addrlo(&self) -> ADDRLO_R { - ADDRLO_R::new(self.bits) + pub fn addrlo(&self) -> AddrloR { + AddrloR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - MAC Address1 \\[31:0\\]"] #[inline(always)] #[must_use] - pub fn addrlo(&mut self) -> ADDRLO_W { - ADDRLO_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrlo(&mut self) -> AddrloW { + AddrloW::new(self, 0) } } #[doc = "MAC Address1 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address1_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address1_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS1_LOW_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS1_LOW_SPEC { +pub struct MacAddress1LowSpec; +impl crate::RegisterSpec for MacAddress1LowSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address1_low::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS1_LOW_SPEC {} +impl crate::Readable for MacAddress1LowSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address1_low::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS1_LOW_SPEC { +impl crate::Writable for MacAddress1LowSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS1_LOW to value 0xffff_ffff"] -impl crate::Resettable for MAC_ADDRESS1_LOW_SPEC { +impl crate::Resettable for MacAddress1LowSpec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/eth0/mac_address2_high.rs b/src/eth0/mac_address2_high.rs index 4ac77206..933deee6 100644 --- a/src/eth0/mac_address2_high.rs +++ b/src/eth0/mac_address2_high.rs @@ -1,94 +1,85 @@ #[doc = "Register `MAC_ADDRESS2_HIGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS2_HIGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRHI` reader - MAC Address2 \\[47:32\\]"] -pub type ADDRHI_R = crate::FieldReader; +pub type AddrhiR = crate::FieldReader; #[doc = "Field `ADDRHI` writer - MAC Address2 \\[47:32\\]"] -pub type ADDRHI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AddrhiW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `MBC` reader - Mask Byte Control"] -pub type MBC_R = crate::FieldReader; +pub type MbcR = crate::FieldReader; #[doc = "Field `MBC` writer - Mask Byte Control"] -pub type MBC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type MbcW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `SA` reader - Source Address"] -pub type SA_R = crate::BitReader; +pub type SaR = crate::BitReader; #[doc = "Field `SA` writer - Source Address"] -pub type SA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AE` reader - Address Enable"] -pub type AE_R = crate::BitReader; +pub type AeR = crate::BitReader; #[doc = "Field `AE` writer - Address Enable"] -pub type AE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:15 - MAC Address2 \\[47:32\\]"] #[inline(always)] - pub fn addrhi(&self) -> ADDRHI_R { - ADDRHI_R::new((self.bits & 0xffff) as u16) + pub fn addrhi(&self) -> AddrhiR { + AddrhiR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - pub fn mbc(&self) -> MBC_R { - MBC_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn mbc(&self) -> MbcR { + MbcR::new(((self.bits >> 24) & 0x3f) as u8) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - pub fn sa(&self) -> SA_R { - SA_R::new(((self.bits >> 30) & 1) != 0) + pub fn sa(&self) -> SaR { + SaR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - pub fn ae(&self) -> AE_R { - AE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ae(&self) -> AeR { + AeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - MAC Address2 \\[47:32\\]"] #[inline(always)] #[must_use] - pub fn addrhi(&mut self) -> ADDRHI_W { - ADDRHI_W::new(self, 0) + pub fn addrhi(&mut self) -> AddrhiW { + AddrhiW::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] #[must_use] - pub fn mbc(&mut self) -> MBC_W { - MBC_W::new(self, 24) + pub fn mbc(&mut self) -> MbcW { + MbcW::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] #[must_use] - pub fn sa(&mut self) -> SA_W { - SA_W::new(self, 30) + pub fn sa(&mut self) -> SaW { + SaW::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] #[must_use] - pub fn ae(&mut self) -> AE_W { - AE_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ae(&mut self) -> AeW { + AeW::new(self, 31) } } #[doc = "MAC Address2 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS2_HIGH_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS2_HIGH_SPEC { +pub struct MacAddress2HighSpec; +impl crate::RegisterSpec for MacAddress2HighSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address2_high::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS2_HIGH_SPEC {} +impl crate::Readable for MacAddress2HighSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address2_high::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS2_HIGH_SPEC { +impl crate::Writable for MacAddress2HighSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS2_HIGH to value 0xffff"] -impl crate::Resettable for MAC_ADDRESS2_HIGH_SPEC { +impl crate::Resettable for MacAddress2HighSpec { const RESET_VALUE: u32 = 0xffff; } diff --git a/src/eth0/mac_address2_low.rs b/src/eth0/mac_address2_low.rs index e9667cc4..c3532a6f 100644 --- a/src/eth0/mac_address2_low.rs +++ b/src/eth0/mac_address2_low.rs @@ -1,49 +1,40 @@ #[doc = "Register `MAC_ADDRESS2_LOW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS2_LOW` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRLO` reader - MAC Address2 \\[31:0\\]"] -pub type ADDRLO_R = crate::FieldReader; +pub type AddrloR = crate::FieldReader; #[doc = "Field `ADDRLO` writer - MAC Address2 \\[31:0\\]"] -pub type ADDRLO_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddrloW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - MAC Address2 \\[31:0\\]"] #[inline(always)] - pub fn addrlo(&self) -> ADDRLO_R { - ADDRLO_R::new(self.bits) + pub fn addrlo(&self) -> AddrloR { + AddrloR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - MAC Address2 \\[31:0\\]"] #[inline(always)] #[must_use] - pub fn addrlo(&mut self) -> ADDRLO_W { - ADDRLO_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrlo(&mut self) -> AddrloW { + AddrloW::new(self, 0) } } #[doc = "MAC Address2 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address2_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address2_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS2_LOW_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS2_LOW_SPEC { +pub struct MacAddress2LowSpec; +impl crate::RegisterSpec for MacAddress2LowSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address2_low::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS2_LOW_SPEC {} +impl crate::Readable for MacAddress2LowSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address2_low::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS2_LOW_SPEC { +impl crate::Writable for MacAddress2LowSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS2_LOW to value 0xffff_ffff"] -impl crate::Resettable for MAC_ADDRESS2_LOW_SPEC { +impl crate::Resettable for MacAddress2LowSpec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/eth0/mac_address3_high.rs b/src/eth0/mac_address3_high.rs index 338e9179..6bba7caf 100644 --- a/src/eth0/mac_address3_high.rs +++ b/src/eth0/mac_address3_high.rs @@ -1,94 +1,85 @@ #[doc = "Register `MAC_ADDRESS3_HIGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS3_HIGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRHI` reader - MAC Address3 \\[47:32\\]"] -pub type ADDRHI_R = crate::FieldReader; +pub type AddrhiR = crate::FieldReader; #[doc = "Field `ADDRHI` writer - MAC Address3 \\[47:32\\]"] -pub type ADDRHI_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AddrhiW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `MBC` reader - Mask Byte Control"] -pub type MBC_R = crate::FieldReader; +pub type MbcR = crate::FieldReader; #[doc = "Field `MBC` writer - Mask Byte Control"] -pub type MBC_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type MbcW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `SA` reader - Source Address"] -pub type SA_R = crate::BitReader; +pub type SaR = crate::BitReader; #[doc = "Field `SA` writer - Source Address"] -pub type SA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AE` reader - Address Enable"] -pub type AE_R = crate::BitReader; +pub type AeR = crate::BitReader; #[doc = "Field `AE` writer - Address Enable"] -pub type AE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AeW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:15 - MAC Address3 \\[47:32\\]"] #[inline(always)] - pub fn addrhi(&self) -> ADDRHI_R { - ADDRHI_R::new((self.bits & 0xffff) as u16) + pub fn addrhi(&self) -> AddrhiR { + AddrhiR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - pub fn mbc(&self) -> MBC_R { - MBC_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn mbc(&self) -> MbcR { + MbcR::new(((self.bits >> 24) & 0x3f) as u8) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - pub fn sa(&self) -> SA_R { - SA_R::new(((self.bits >> 30) & 1) != 0) + pub fn sa(&self) -> SaR { + SaR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - pub fn ae(&self) -> AE_R { - AE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ae(&self) -> AeR { + AeR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - MAC Address3 \\[47:32\\]"] #[inline(always)] #[must_use] - pub fn addrhi(&mut self) -> ADDRHI_W { - ADDRHI_W::new(self, 0) + pub fn addrhi(&mut self) -> AddrhiW { + AddrhiW::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] #[must_use] - pub fn mbc(&mut self) -> MBC_W { - MBC_W::new(self, 24) + pub fn mbc(&mut self) -> MbcW { + MbcW::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] #[must_use] - pub fn sa(&mut self) -> SA_W { - SA_W::new(self, 30) + pub fn sa(&mut self) -> SaW { + SaW::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] #[must_use] - pub fn ae(&mut self) -> AE_W { - AE_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ae(&mut self) -> AeW { + AeW::new(self, 31) } } #[doc = "MAC Address3 High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_high::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_high::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS3_HIGH_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS3_HIGH_SPEC { +pub struct MacAddress3HighSpec; +impl crate::RegisterSpec for MacAddress3HighSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address3_high::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS3_HIGH_SPEC {} +impl crate::Readable for MacAddress3HighSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address3_high::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS3_HIGH_SPEC { +impl crate::Writable for MacAddress3HighSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS3_HIGH to value 0xffff"] -impl crate::Resettable for MAC_ADDRESS3_HIGH_SPEC { +impl crate::Resettable for MacAddress3HighSpec { const RESET_VALUE: u32 = 0xffff; } diff --git a/src/eth0/mac_address3_low.rs b/src/eth0/mac_address3_low.rs index 4b776a13..9283c534 100644 --- a/src/eth0/mac_address3_low.rs +++ b/src/eth0/mac_address3_low.rs @@ -1,49 +1,40 @@ #[doc = "Register `MAC_ADDRESS3_LOW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_ADDRESS3_LOW` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRLO` reader - MAC Address3 \\[31:0\\]"] -pub type ADDRLO_R = crate::FieldReader; +pub type AddrloR = crate::FieldReader; #[doc = "Field `ADDRLO` writer - MAC Address3 \\[31:0\\]"] -pub type ADDRLO_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddrloW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - MAC Address3 \\[31:0\\]"] #[inline(always)] - pub fn addrlo(&self) -> ADDRLO_R { - ADDRLO_R::new(self.bits) + pub fn addrlo(&self) -> AddrloR { + AddrloR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - MAC Address3 \\[31:0\\]"] #[inline(always)] #[must_use] - pub fn addrlo(&mut self) -> ADDRLO_W { - ADDRLO_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addrlo(&mut self) -> AddrloW { + AddrloW::new(self, 0) } } #[doc = "MAC Address3 Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_address3_low::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_address3_low::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_ADDRESS3_LOW_SPEC; -impl crate::RegisterSpec for MAC_ADDRESS3_LOW_SPEC { +pub struct MacAddress3LowSpec; +impl crate::RegisterSpec for MacAddress3LowSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_address3_low::R`](R) reader structure"] -impl crate::Readable for MAC_ADDRESS3_LOW_SPEC {} +impl crate::Readable for MacAddress3LowSpec {} #[doc = "`write(|w| ..)` method takes [`mac_address3_low::W`](W) writer structure"] -impl crate::Writable for MAC_ADDRESS3_LOW_SPEC { +impl crate::Writable for MacAddress3LowSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_ADDRESS3_LOW to value 0xffff_ffff"] -impl crate::Resettable for MAC_ADDRESS3_LOW_SPEC { +impl crate::Resettable for MacAddress3LowSpec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/eth0/mac_configuration.rs b/src/eth0/mac_configuration.rs index ca70f785..2a45d4b3 100644 --- a/src/eth0/mac_configuration.rs +++ b/src/eth0/mac_configuration.rs @@ -1,340 +1,331 @@ #[doc = "Register `MAC_CONFIGURATION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_CONFIGURATION` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRELEN` reader - Preamble Length for Transmit Frames"] -pub type PRELEN_R = crate::FieldReader; +pub type PrelenR = crate::FieldReader; #[doc = "Field `PRELEN` writer - Preamble Length for Transmit Frames"] -pub type PRELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PrelenW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `RE` reader - Receiver Enable"] -pub type RE_R = crate::BitReader; +pub type ReR = crate::BitReader; #[doc = "Field `RE` writer - Receiver Enable"] -pub type RE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ReW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TE` reader - Transmitter Enable"] -pub type TE_R = crate::BitReader; +pub type TeR = crate::BitReader; #[doc = "Field `TE` writer - Transmitter Enable"] -pub type TE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DC` reader - Deferral Check"] -pub type DC_R = crate::BitReader; +pub type DcR = crate::BitReader; #[doc = "Field `DC` writer - Deferral Check"] -pub type DC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BL` reader - Back-Off Limit"] -pub type BL_R = crate::FieldReader; +pub type BlR = crate::FieldReader; #[doc = "Field `BL` writer - Back-Off Limit"] -pub type BL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type BlW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `ACS` reader - Automatic Pad or CRC Stripping"] -pub type ACS_R = crate::BitReader; +pub type AcsR = crate::BitReader; #[doc = "Field `ACS` writer - Automatic Pad or CRC Stripping"] -pub type ACS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AcsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DR` reader - Disable Retry"] -pub type DR_R = crate::BitReader; +pub type DrR = crate::BitReader; #[doc = "Field `DR` writer - Disable Retry"] -pub type DR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IPC` reader - Checksum Offload"] -pub type IPC_R = crate::BitReader; +pub type IpcR = crate::BitReader; #[doc = "Field `IPC` writer - Checksum Offload"] -pub type IPC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IpcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DM` reader - Duplex Mode"] -pub type DM_R = crate::BitReader; +pub type DmR = crate::BitReader; #[doc = "Field `DM` writer - Duplex Mode"] -pub type DM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LM` reader - Loopback Mode"] -pub type LM_R = crate::BitReader; +pub type LmR = crate::BitReader; #[doc = "Field `LM` writer - Loopback Mode"] -pub type LM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DO` reader - Disable Receive Own"] -pub type DO_R = crate::BitReader; +pub type DoR = crate::BitReader; #[doc = "Field `DO` writer - Disable Receive Own"] -pub type DO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FES` reader - Speed"] -pub type FES_R = crate::BitReader; +pub type FesR = crate::BitReader; #[doc = "Field `FES` writer - Speed"] -pub type FES_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FesW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DCRS` reader - Disable Carrier Sense During Transmission"] -pub type DCRS_R = crate::BitReader; +pub type DcrsR = crate::BitReader; #[doc = "Field `DCRS` writer - Disable Carrier Sense During Transmission"] -pub type DCRS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DcrsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IFG` reader - Inter-Frame Gap"] -pub type IFG_R = crate::FieldReader; +pub type IfgR = crate::FieldReader; #[doc = "Field `IFG` writer - Inter-Frame Gap"] -pub type IFG_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type IfgW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `JE` reader - Jumbo Frame Enable"] -pub type JE_R = crate::BitReader; +pub type JeR = crate::BitReader; #[doc = "Field `JE` writer - Jumbo Frame Enable"] -pub type JE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type JeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BE` reader - Frame Burst Enable"] -pub type BE_R = crate::BitReader; +pub type BeR = crate::BitReader; #[doc = "Field `JD` reader - Jabber Disable"] -pub type JD_R = crate::BitReader; +pub type JdR = crate::BitReader; #[doc = "Field `JD` writer - Jabber Disable"] -pub type JD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type JdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WD` reader - Watchdog Disable"] -pub type WD_R = crate::BitReader; +pub type WdR = crate::BitReader; #[doc = "Field `WD` writer - Watchdog Disable"] -pub type WD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type WdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TC` reader - Transmit Configuration in RMII"] -pub type TC_R = crate::BitReader; +pub type TcR = crate::BitReader; #[doc = "Field `CST` reader - CRC Stripping of Type Frames"] -pub type CST_R = crate::BitReader; +pub type CstR = crate::BitReader; #[doc = "Field `CST` writer - CRC Stripping of Type Frames"] -pub type CST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TWOKPE` reader - IEEE 802.3as support for 2K packets Enable"] -pub type TWOKPE_R = crate::BitReader; +pub type TwokpeR = crate::BitReader; #[doc = "Field `TWOKPE` writer - IEEE 802.3as support for 2K packets Enable"] -pub type TWOKPE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TwokpeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SARC` reader - Source Address Insertion or Replacement Control"] -pub type SARC_R = crate::FieldReader; +pub type SarcR = crate::FieldReader; impl R { #[doc = "Bits 0:1 - Preamble Length for Transmit Frames"] #[inline(always)] - pub fn prelen(&self) -> PRELEN_R { - PRELEN_R::new((self.bits & 3) as u8) + pub fn prelen(&self) -> PrelenR { + PrelenR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] - pub fn re(&self) -> RE_R { - RE_R::new(((self.bits >> 2) & 1) != 0) + pub fn re(&self) -> ReR { + ReR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] - pub fn te(&self) -> TE_R { - TE_R::new(((self.bits >> 3) & 1) != 0) + pub fn te(&self) -> TeR { + TeR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Deferral Check"] #[inline(always)] - pub fn dc(&self) -> DC_R { - DC_R::new(((self.bits >> 4) & 1) != 0) + pub fn dc(&self) -> DcR { + DcR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Back-Off Limit"] #[inline(always)] - pub fn bl(&self) -> BL_R { - BL_R::new(((self.bits >> 5) & 3) as u8) + pub fn bl(&self) -> BlR { + BlR::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Automatic Pad or CRC Stripping"] #[inline(always)] - pub fn acs(&self) -> ACS_R { - ACS_R::new(((self.bits >> 7) & 1) != 0) + pub fn acs(&self) -> AcsR { + AcsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - Disable Retry"] #[inline(always)] - pub fn dr(&self) -> DR_R { - DR_R::new(((self.bits >> 9) & 1) != 0) + pub fn dr(&self) -> DrR { + DrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Checksum Offload"] #[inline(always)] - pub fn ipc(&self) -> IPC_R { - IPC_R::new(((self.bits >> 10) & 1) != 0) + pub fn ipc(&self) -> IpcR { + IpcR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Duplex Mode"] #[inline(always)] - pub fn dm(&self) -> DM_R { - DM_R::new(((self.bits >> 11) & 1) != 0) + pub fn dm(&self) -> DmR { + DmR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Loopback Mode"] #[inline(always)] - pub fn lm(&self) -> LM_R { - LM_R::new(((self.bits >> 12) & 1) != 0) + pub fn lm(&self) -> LmR { + LmR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Disable Receive Own"] #[inline(always)] - pub fn do_(&self) -> DO_R { - DO_R::new(((self.bits >> 13) & 1) != 0) + pub fn do_(&self) -> DoR { + DoR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Speed"] #[inline(always)] - pub fn fes(&self) -> FES_R { - FES_R::new(((self.bits >> 14) & 1) != 0) + pub fn fes(&self) -> FesR { + FesR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] #[inline(always)] - pub fn dcrs(&self) -> DCRS_R { - DCRS_R::new(((self.bits >> 16) & 1) != 0) + pub fn dcrs(&self) -> DcrsR { + DcrsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:19 - Inter-Frame Gap"] #[inline(always)] - pub fn ifg(&self) -> IFG_R { - IFG_R::new(((self.bits >> 17) & 7) as u8) + pub fn ifg(&self) -> IfgR { + IfgR::new(((self.bits >> 17) & 7) as u8) } #[doc = "Bit 20 - Jumbo Frame Enable"] #[inline(always)] - pub fn je(&self) -> JE_R { - JE_R::new(((self.bits >> 20) & 1) != 0) + pub fn je(&self) -> JeR { + JeR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Frame Burst Enable"] #[inline(always)] - pub fn be(&self) -> BE_R { - BE_R::new(((self.bits >> 21) & 1) != 0) + pub fn be(&self) -> BeR { + BeR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Jabber Disable"] #[inline(always)] - pub fn jd(&self) -> JD_R { - JD_R::new(((self.bits >> 22) & 1) != 0) + pub fn jd(&self) -> JdR { + JdR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Watchdog Disable"] #[inline(always)] - pub fn wd(&self) -> WD_R { - WD_R::new(((self.bits >> 23) & 1) != 0) + pub fn wd(&self) -> WdR { + WdR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Transmit Configuration in RMII"] #[inline(always)] - pub fn tc(&self) -> TC_R { - TC_R::new(((self.bits >> 24) & 1) != 0) + pub fn tc(&self) -> TcR { + TcR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - CRC Stripping of Type Frames"] #[inline(always)] - pub fn cst(&self) -> CST_R { - CST_R::new(((self.bits >> 25) & 1) != 0) + pub fn cst(&self) -> CstR { + CstR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 27 - IEEE 802.3as support for 2K packets Enable"] #[inline(always)] - pub fn twokpe(&self) -> TWOKPE_R { - TWOKPE_R::new(((self.bits >> 27) & 1) != 0) + pub fn twokpe(&self) -> TwokpeR { + TwokpeR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - Source Address Insertion or Replacement Control"] #[inline(always)] - pub fn sarc(&self) -> SARC_R { - SARC_R::new(((self.bits >> 28) & 7) as u8) + pub fn sarc(&self) -> SarcR { + SarcR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:1 - Preamble Length for Transmit Frames"] #[inline(always)] #[must_use] - pub fn prelen(&mut self) -> PRELEN_W { - PRELEN_W::new(self, 0) + pub fn prelen(&mut self) -> PrelenW { + PrelenW::new(self, 0) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] #[must_use] - pub fn re(&mut self) -> RE_W { - RE_W::new(self, 2) + pub fn re(&mut self) -> ReW { + ReW::new(self, 2) } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] #[must_use] - pub fn te(&mut self) -> TE_W { - TE_W::new(self, 3) + pub fn te(&mut self) -> TeW { + TeW::new(self, 3) } #[doc = "Bit 4 - Deferral Check"] #[inline(always)] #[must_use] - pub fn dc(&mut self) -> DC_W { - DC_W::new(self, 4) + pub fn dc(&mut self) -> DcW { + DcW::new(self, 4) } #[doc = "Bits 5:6 - Back-Off Limit"] #[inline(always)] #[must_use] - pub fn bl(&mut self) -> BL_W { - BL_W::new(self, 5) + pub fn bl(&mut self) -> BlW { + BlW::new(self, 5) } #[doc = "Bit 7 - Automatic Pad or CRC Stripping"] #[inline(always)] #[must_use] - pub fn acs(&mut self) -> ACS_W { - ACS_W::new(self, 7) + pub fn acs(&mut self) -> AcsW { + AcsW::new(self, 7) } #[doc = "Bit 9 - Disable Retry"] #[inline(always)] #[must_use] - pub fn dr(&mut self) -> DR_W { - DR_W::new(self, 9) + pub fn dr(&mut self) -> DrW { + DrW::new(self, 9) } #[doc = "Bit 10 - Checksum Offload"] #[inline(always)] #[must_use] - pub fn ipc(&mut self) -> IPC_W { - IPC_W::new(self, 10) + pub fn ipc(&mut self) -> IpcW { + IpcW::new(self, 10) } #[doc = "Bit 11 - Duplex Mode"] #[inline(always)] #[must_use] - pub fn dm(&mut self) -> DM_W { - DM_W::new(self, 11) + pub fn dm(&mut self) -> DmW { + DmW::new(self, 11) } #[doc = "Bit 12 - Loopback Mode"] #[inline(always)] #[must_use] - pub fn lm(&mut self) -> LM_W { - LM_W::new(self, 12) + pub fn lm(&mut self) -> LmW { + LmW::new(self, 12) } #[doc = "Bit 13 - Disable Receive Own"] #[inline(always)] #[must_use] - pub fn do_(&mut self) -> DO_W { - DO_W::new(self, 13) + pub fn do_(&mut self) -> DoW { + DoW::new(self, 13) } #[doc = "Bit 14 - Speed"] #[inline(always)] #[must_use] - pub fn fes(&mut self) -> FES_W { - FES_W::new(self, 14) + pub fn fes(&mut self) -> FesW { + FesW::new(self, 14) } #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] #[inline(always)] #[must_use] - pub fn dcrs(&mut self) -> DCRS_W { - DCRS_W::new(self, 16) + pub fn dcrs(&mut self) -> DcrsW { + DcrsW::new(self, 16) } #[doc = "Bits 17:19 - Inter-Frame Gap"] #[inline(always)] #[must_use] - pub fn ifg(&mut self) -> IFG_W { - IFG_W::new(self, 17) + pub fn ifg(&mut self) -> IfgW { + IfgW::new(self, 17) } #[doc = "Bit 20 - Jumbo Frame Enable"] #[inline(always)] #[must_use] - pub fn je(&mut self) -> JE_W { - JE_W::new(self, 20) + pub fn je(&mut self) -> JeW { + JeW::new(self, 20) } #[doc = "Bit 22 - Jabber Disable"] #[inline(always)] #[must_use] - pub fn jd(&mut self) -> JD_W { - JD_W::new(self, 22) + pub fn jd(&mut self) -> JdW { + JdW::new(self, 22) } #[doc = "Bit 23 - Watchdog Disable"] #[inline(always)] #[must_use] - pub fn wd(&mut self) -> WD_W { - WD_W::new(self, 23) + pub fn wd(&mut self) -> WdW { + WdW::new(self, 23) } #[doc = "Bit 25 - CRC Stripping of Type Frames"] #[inline(always)] #[must_use] - pub fn cst(&mut self) -> CST_W { - CST_W::new(self, 25) + pub fn cst(&mut self) -> CstW { + CstW::new(self, 25) } #[doc = "Bit 27 - IEEE 802.3as support for 2K packets Enable"] #[inline(always)] #[must_use] - pub fn twokpe(&mut self) -> TWOKPE_W { - TWOKPE_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn twokpe(&mut self) -> TwokpeW { + TwokpeW::new(self, 27) } } #[doc = "MAC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_configuration::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_configuration::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_CONFIGURATION_SPEC; -impl crate::RegisterSpec for MAC_CONFIGURATION_SPEC { +pub struct MacConfigurationSpec; +impl crate::RegisterSpec for MacConfigurationSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_configuration::R`](R) reader structure"] -impl crate::Readable for MAC_CONFIGURATION_SPEC {} +impl crate::Readable for MacConfigurationSpec {} #[doc = "`write(|w| ..)` method takes [`mac_configuration::W`](W) writer structure"] -impl crate::Writable for MAC_CONFIGURATION_SPEC { +impl crate::Writable for MacConfigurationSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_CONFIGURATION to value 0x8000"] -impl crate::Resettable for MAC_CONFIGURATION_SPEC { +impl crate::Resettable for MacConfigurationSpec { const RESET_VALUE: u32 = 0x8000; } diff --git a/src/eth0/mac_frame_filter.rs b/src/eth0/mac_frame_filter.rs index 93b2b04f..35e1a5c4 100644 --- a/src/eth0/mac_frame_filter.rs +++ b/src/eth0/mac_frame_filter.rs @@ -1,228 +1,219 @@ #[doc = "Register `MAC_FRAME_FILTER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MAC_FRAME_FILTER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PR` reader - Promiscuous Mode"] -pub type PR_R = crate::BitReader; +pub type PrR = crate::BitReader; #[doc = "Field `PR` writer - Promiscuous Mode"] -pub type PR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HUC` reader - Hash Unicast"] -pub type HUC_R = crate::BitReader; +pub type HucR = crate::BitReader; #[doc = "Field `HUC` writer - Hash Unicast"] -pub type HUC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HucW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HMC` reader - Hash Multicast"] -pub type HMC_R = crate::BitReader; +pub type HmcR = crate::BitReader; #[doc = "Field `HMC` writer - Hash Multicast"] -pub type HMC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HmcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DAIF` reader - DA Inverse Filtering"] -pub type DAIF_R = crate::BitReader; +pub type DaifR = crate::BitReader; #[doc = "Field `DAIF` writer - DA Inverse Filtering"] -pub type DAIF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DaifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PM` reader - Pass All Multicast"] -pub type PM_R = crate::BitReader; +pub type PmR = crate::BitReader; #[doc = "Field `PM` writer - Pass All Multicast"] -pub type PM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DBF` reader - Disable Broadcast Frames"] -pub type DBF_R = crate::BitReader; +pub type DbfR = crate::BitReader; #[doc = "Field `DBF` writer - Disable Broadcast Frames"] -pub type DBF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DbfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PCF` reader - Pass Control Frames"] -pub type PCF_R = crate::FieldReader; +pub type PcfR = crate::FieldReader; #[doc = "Field `PCF` writer - Pass Control Frames"] -pub type PCF_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PcfW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SAIF` reader - SA Inverse Filtering"] -pub type SAIF_R = crate::BitReader; +pub type SaifR = crate::BitReader; #[doc = "Field `SAIF` writer - SA Inverse Filtering"] -pub type SAIF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SaifW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SAF` reader - Source Address Filter Enable"] -pub type SAF_R = crate::BitReader; +pub type SafR = crate::BitReader; #[doc = "Field `SAF` writer - Source Address Filter Enable"] -pub type SAF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SafW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HPF` reader - Hash or Perfect Filter"] -pub type HPF_R = crate::BitReader; +pub type HpfR = crate::BitReader; #[doc = "Field `HPF` writer - Hash or Perfect Filter"] -pub type HPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HpfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VTFE` reader - VLAN Tag Filter Enable"] -pub type VTFE_R = crate::BitReader; +pub type VtfeR = crate::BitReader; #[doc = "Field `VTFE` writer - VLAN Tag Filter Enable"] -pub type VTFE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type VtfeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IPFE` reader - Layer 3 and Layer 4 Filter Enable"] -pub type IPFE_R = crate::BitReader; +pub type IpfeR = crate::BitReader; #[doc = "Field `DNTU` reader - Drop non-TCP/UDP over IP Frames"] -pub type DNTU_R = crate::BitReader; +pub type DntuR = crate::BitReader; #[doc = "Field `RA` reader - Receive All"] -pub type RA_R = crate::BitReader; +pub type RaR = crate::BitReader; #[doc = "Field `RA` writer - Receive All"] -pub type RA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] - pub fn pr(&self) -> PR_R { - PR_R::new((self.bits & 1) != 0) + pub fn pr(&self) -> PrR { + PrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] - pub fn huc(&self) -> HUC_R { - HUC_R::new(((self.bits >> 1) & 1) != 0) + pub fn huc(&self) -> HucR { + HucR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] - pub fn hmc(&self) -> HMC_R { - HMC_R::new(((self.bits >> 2) & 1) != 0) + pub fn hmc(&self) -> HmcR { + HmcR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DA Inverse Filtering"] #[inline(always)] - pub fn daif(&self) -> DAIF_R { - DAIF_R::new(((self.bits >> 3) & 1) != 0) + pub fn daif(&self) -> DaifR { + DaifR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pass All Multicast"] #[inline(always)] - pub fn pm(&self) -> PM_R { - PM_R::new(((self.bits >> 4) & 1) != 0) + pub fn pm(&self) -> PmR { + PmR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Disable Broadcast Frames"] #[inline(always)] - pub fn dbf(&self) -> DBF_R { - DBF_R::new(((self.bits >> 5) & 1) != 0) + pub fn dbf(&self) -> DbfR { + DbfR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Pass Control Frames"] #[inline(always)] - pub fn pcf(&self) -> PCF_R { - PCF_R::new(((self.bits >> 6) & 3) as u8) + pub fn pcf(&self) -> PcfR { + PcfR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bit 8 - SA Inverse Filtering"] #[inline(always)] - pub fn saif(&self) -> SAIF_R { - SAIF_R::new(((self.bits >> 8) & 1) != 0) + pub fn saif(&self) -> SaifR { + SaifR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Source Address Filter Enable"] #[inline(always)] - pub fn saf(&self) -> SAF_R { - SAF_R::new(((self.bits >> 9) & 1) != 0) + pub fn saf(&self) -> SafR { + SafR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Hash or Perfect Filter"] #[inline(always)] - pub fn hpf(&self) -> HPF_R { - HPF_R::new(((self.bits >> 10) & 1) != 0) + pub fn hpf(&self) -> HpfR { + HpfR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 16 - VLAN Tag Filter Enable"] #[inline(always)] - pub fn vtfe(&self) -> VTFE_R { - VTFE_R::new(((self.bits >> 16) & 1) != 0) + pub fn vtfe(&self) -> VtfeR { + VtfeR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - Layer 3 and Layer 4 Filter Enable"] #[inline(always)] - pub fn ipfe(&self) -> IPFE_R { - IPFE_R::new(((self.bits >> 20) & 1) != 0) + pub fn ipfe(&self) -> IpfeR { + IpfeR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Drop non-TCP/UDP over IP Frames"] #[inline(always)] - pub fn dntu(&self) -> DNTU_R { - DNTU_R::new(((self.bits >> 21) & 1) != 0) + pub fn dntu(&self) -> DntuR { + DntuR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 31 - Receive All"] #[inline(always)] - pub fn ra(&self) -> RA_R { - RA_R::new(((self.bits >> 31) & 1) != 0) + pub fn ra(&self) -> RaR { + RaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] #[must_use] - pub fn pr(&mut self) -> PR_W { - PR_W::new(self, 0) + pub fn pr(&mut self) -> PrW { + PrW::new(self, 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] #[must_use] - pub fn huc(&mut self) -> HUC_W { - HUC_W::new(self, 1) + pub fn huc(&mut self) -> HucW { + HucW::new(self, 1) } #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] #[must_use] - pub fn hmc(&mut self) -> HMC_W { - HMC_W::new(self, 2) + pub fn hmc(&mut self) -> HmcW { + HmcW::new(self, 2) } #[doc = "Bit 3 - DA Inverse Filtering"] #[inline(always)] #[must_use] - pub fn daif(&mut self) -> DAIF_W { - DAIF_W::new(self, 3) + pub fn daif(&mut self) -> DaifW { + DaifW::new(self, 3) } #[doc = "Bit 4 - Pass All Multicast"] #[inline(always)] #[must_use] - pub fn pm(&mut self) -> PM_W { - PM_W::new(self, 4) + pub fn pm(&mut self) -> PmW { + PmW::new(self, 4) } #[doc = "Bit 5 - Disable Broadcast Frames"] #[inline(always)] #[must_use] - pub fn dbf(&mut self) -> DBF_W { - DBF_W::new(self, 5) + pub fn dbf(&mut self) -> DbfW { + DbfW::new(self, 5) } #[doc = "Bits 6:7 - Pass Control Frames"] #[inline(always)] #[must_use] - pub fn pcf(&mut self) -> PCF_W { - PCF_W::new(self, 6) + pub fn pcf(&mut self) -> PcfW { + PcfW::new(self, 6) } #[doc = "Bit 8 - SA Inverse Filtering"] #[inline(always)] #[must_use] - pub fn saif(&mut self) -> SAIF_W { - SAIF_W::new(self, 8) + pub fn saif(&mut self) -> SaifW { + SaifW::new(self, 8) } #[doc = "Bit 9 - Source Address Filter Enable"] #[inline(always)] #[must_use] - pub fn saf(&mut self) -> SAF_W { - SAF_W::new(self, 9) + pub fn saf(&mut self) -> SafW { + SafW::new(self, 9) } #[doc = "Bit 10 - Hash or Perfect Filter"] #[inline(always)] #[must_use] - pub fn hpf(&mut self) -> HPF_W { - HPF_W::new(self, 10) + pub fn hpf(&mut self) -> HpfW { + HpfW::new(self, 10) } #[doc = "Bit 16 - VLAN Tag Filter Enable"] #[inline(always)] #[must_use] - pub fn vtfe(&mut self) -> VTFE_W { - VTFE_W::new(self, 16) + pub fn vtfe(&mut self) -> VtfeW { + VtfeW::new(self, 16) } #[doc = "Bit 31 - Receive All"] #[inline(always)] #[must_use] - pub fn ra(&mut self) -> RA_W { - RA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ra(&mut self) -> RaW { + RaW::new(self, 31) } } #[doc = "MAC Frame Filter\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mac_frame_filter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mac_frame_filter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAC_FRAME_FILTER_SPEC; -impl crate::RegisterSpec for MAC_FRAME_FILTER_SPEC { +pub struct MacFrameFilterSpec; +impl crate::RegisterSpec for MacFrameFilterSpec { type Ux = u32; } #[doc = "`read()` method returns [`mac_frame_filter::R`](R) reader structure"] -impl crate::Readable for MAC_FRAME_FILTER_SPEC {} +impl crate::Readable for MacFrameFilterSpec {} #[doc = "`write(|w| ..)` method takes [`mac_frame_filter::W`](W) writer structure"] -impl crate::Writable for MAC_FRAME_FILTER_SPEC { +impl crate::Writable for MacFrameFilterSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MAC_FRAME_FILTER to value 0"] -impl crate::Resettable for MAC_FRAME_FILTER_SPEC { +impl crate::Resettable for MacFrameFilterSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/missed_frame_and_buffer_overflow_counter.rs b/src/eth0/missed_frame_and_buffer_overflow_counter.rs index e958542d..0396fdc8 100644 --- a/src/eth0/missed_frame_and_buffer_overflow_counter.rs +++ b/src/eth0/missed_frame_and_buffer_overflow_counter.rs @@ -1,43 +1,43 @@ #[doc = "Register `MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MISFRMCNT` reader - This field indicates the number of frames missed by the controller because of the RAM Receive Buffer being unavailable. This counter is incremented each time the DMA discards an incoming frame. The counter is cleared when this register is read."] -pub type MISFRMCNT_R = crate::FieldReader; +pub type MisfrmcntR = crate::FieldReader; #[doc = "Field `MISCNTOVF` reader - Overflow bit for Missed Frame Counter"] -pub type MISCNTOVF_R = crate::BitReader; +pub type MiscntovfR = crate::BitReader; #[doc = "Field `OVFFRMCNT` reader - This field indicates the number of frames missed by the application. The counter is cleared when this register is read."] -pub type OVFFRMCNT_R = crate::FieldReader; +pub type OvffrmcntR = crate::FieldReader; #[doc = "Field `OVFCNTOVF` reader - Overflow bit for FIFO Overflow Counter"] -pub type OVFCNTOVF_R = crate::BitReader; +pub type OvfcntovfR = crate::BitReader; impl R { #[doc = "Bits 0:15 - This field indicates the number of frames missed by the controller because of the RAM Receive Buffer being unavailable. This counter is incremented each time the DMA discards an incoming frame. The counter is cleared when this register is read."] #[inline(always)] - pub fn misfrmcnt(&self) -> MISFRMCNT_R { - MISFRMCNT_R::new((self.bits & 0xffff) as u16) + pub fn misfrmcnt(&self) -> MisfrmcntR { + MisfrmcntR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Overflow bit for Missed Frame Counter"] #[inline(always)] - pub fn miscntovf(&self) -> MISCNTOVF_R { - MISCNTOVF_R::new(((self.bits >> 16) & 1) != 0) + pub fn miscntovf(&self) -> MiscntovfR { + MiscntovfR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:27 - This field indicates the number of frames missed by the application. The counter is cleared when this register is read."] #[inline(always)] - pub fn ovffrmcnt(&self) -> OVFFRMCNT_R { - OVFFRMCNT_R::new(((self.bits >> 17) & 0x07ff) as u16) + pub fn ovffrmcnt(&self) -> OvffrmcntR { + OvffrmcntR::new(((self.bits >> 17) & 0x07ff) as u16) } #[doc = "Bit 28 - Overflow bit for FIFO Overflow Counter"] #[inline(always)] - pub fn ovfcntovf(&self) -> OVFCNTOVF_R { - OVFCNTOVF_R::new(((self.bits >> 28) & 1) != 0) + pub fn ovfcntovf(&self) -> OvfcntovfR { + OvfcntovfR::new(((self.bits >> 28) & 1) != 0) } } #[doc = "Missed Frame and Buffer Overflow Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`missed_frame_and_buffer_overflow_counter::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC; -impl crate::RegisterSpec for MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC { +pub struct MissedFrameAndBufferOverflowCounterSpec; +impl crate::RegisterSpec for MissedFrameAndBufferOverflowCounterSpec { type Ux = u32; } #[doc = "`read()` method returns [`missed_frame_and_buffer_overflow_counter::R`](R) reader structure"] -impl crate::Readable for MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC {} +impl crate::Readable for MissedFrameAndBufferOverflowCounterSpec {} #[doc = "`reset()` method sets MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER to value 0"] -impl crate::Resettable for MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER_SPEC { +impl crate::Resettable for MissedFrameAndBufferOverflowCounterSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_control.rs b/src/eth0/mmc_control.rs index de88ca71..b118f61a 100644 --- a/src/eth0/mmc_control.rs +++ b/src/eth0/mmc_control.rs @@ -1,139 +1,130 @@ #[doc = "Register `MMC_CONTROL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMC_CONTROL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CNTRST` reader - Counters Reset"] -pub type CNTRST_R = crate::BitReader; +pub type CntrstR = crate::BitReader; #[doc = "Field `CNTRST` writer - Counters Reset"] -pub type CNTRST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CntrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTSTOPRO` reader - Counters Stop Rollover"] -pub type CNTSTOPRO_R = crate::BitReader; +pub type CntstoproR = crate::BitReader; #[doc = "Field `CNTSTOPRO` writer - Counters Stop Rollover"] -pub type CNTSTOPRO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CntstoproW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSTONRD` reader - Reset on Read"] -pub type RSTONRD_R = crate::BitReader; +pub type RstonrdR = crate::BitReader; #[doc = "Field `RSTONRD` writer - Reset on Read"] -pub type RSTONRD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RstonrdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTFREEZ` reader - MMC Counter Freeze"] -pub type CNTFREEZ_R = crate::BitReader; +pub type CntfreezR = crate::BitReader; #[doc = "Field `CNTFREEZ` writer - MMC Counter Freeze"] -pub type CNTFREEZ_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CntfreezW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTPRST` reader - Counters Preset"] -pub type CNTPRST_R = crate::BitReader; +pub type CntprstR = crate::BitReader; #[doc = "Field `CNTPRST` writer - Counters Preset"] -pub type CNTPRST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CntprstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNTPRSTLVL` reader - Full-Half Preset"] -pub type CNTPRSTLVL_R = crate::BitReader; +pub type CntprstlvlR = crate::BitReader; #[doc = "Field `CNTPRSTLVL` writer - Full-Half Preset"] -pub type CNTPRSTLVL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CntprstlvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UCDBC` reader - Update MMC Counters for Dropped Broadcast Frames"] -pub type UCDBC_R = crate::BitReader; +pub type UcdbcR = crate::BitReader; #[doc = "Field `UCDBC` writer - Update MMC Counters for Dropped Broadcast Frames"] -pub type UCDBC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UcdbcW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Counters Reset"] #[inline(always)] - pub fn cntrst(&self) -> CNTRST_R { - CNTRST_R::new((self.bits & 1) != 0) + pub fn cntrst(&self) -> CntrstR { + CntrstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Counters Stop Rollover"] #[inline(always)] - pub fn cntstopro(&self) -> CNTSTOPRO_R { - CNTSTOPRO_R::new(((self.bits >> 1) & 1) != 0) + pub fn cntstopro(&self) -> CntstoproR { + CntstoproR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Reset on Read"] #[inline(always)] - pub fn rstonrd(&self) -> RSTONRD_R { - RSTONRD_R::new(((self.bits >> 2) & 1) != 0) + pub fn rstonrd(&self) -> RstonrdR { + RstonrdR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Counter Freeze"] #[inline(always)] - pub fn cntfreez(&self) -> CNTFREEZ_R { - CNTFREEZ_R::new(((self.bits >> 3) & 1) != 0) + pub fn cntfreez(&self) -> CntfreezR { + CntfreezR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Counters Preset"] #[inline(always)] - pub fn cntprst(&self) -> CNTPRST_R { - CNTPRST_R::new(((self.bits >> 4) & 1) != 0) + pub fn cntprst(&self) -> CntprstR { + CntprstR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Full-Half Preset"] #[inline(always)] - pub fn cntprstlvl(&self) -> CNTPRSTLVL_R { - CNTPRSTLVL_R::new(((self.bits >> 5) & 1) != 0) + pub fn cntprstlvl(&self) -> CntprstlvlR { + CntprstlvlR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] #[inline(always)] - pub fn ucdbc(&self) -> UCDBC_R { - UCDBC_R::new(((self.bits >> 8) & 1) != 0) + pub fn ucdbc(&self) -> UcdbcR { + UcdbcR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Counters Reset"] #[inline(always)] #[must_use] - pub fn cntrst(&mut self) -> CNTRST_W { - CNTRST_W::new(self, 0) + pub fn cntrst(&mut self) -> CntrstW { + CntrstW::new(self, 0) } #[doc = "Bit 1 - Counters Stop Rollover"] #[inline(always)] #[must_use] - pub fn cntstopro(&mut self) -> CNTSTOPRO_W { - CNTSTOPRO_W::new(self, 1) + pub fn cntstopro(&mut self) -> CntstoproW { + CntstoproW::new(self, 1) } #[doc = "Bit 2 - Reset on Read"] #[inline(always)] #[must_use] - pub fn rstonrd(&mut self) -> RSTONRD_W { - RSTONRD_W::new(self, 2) + pub fn rstonrd(&mut self) -> RstonrdW { + RstonrdW::new(self, 2) } #[doc = "Bit 3 - MMC Counter Freeze"] #[inline(always)] #[must_use] - pub fn cntfreez(&mut self) -> CNTFREEZ_W { - CNTFREEZ_W::new(self, 3) + pub fn cntfreez(&mut self) -> CntfreezW { + CntfreezW::new(self, 3) } #[doc = "Bit 4 - Counters Preset"] #[inline(always)] #[must_use] - pub fn cntprst(&mut self) -> CNTPRST_W { - CNTPRST_W::new(self, 4) + pub fn cntprst(&mut self) -> CntprstW { + CntprstW::new(self, 4) } #[doc = "Bit 5 - Full-Half Preset"] #[inline(always)] #[must_use] - pub fn cntprstlvl(&mut self) -> CNTPRSTLVL_W { - CNTPRSTLVL_W::new(self, 5) + pub fn cntprstlvl(&mut self) -> CntprstlvlW { + CntprstlvlW::new(self, 5) } #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] #[inline(always)] #[must_use] - pub fn ucdbc(&mut self) -> UCDBC_W { - UCDBC_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ucdbc(&mut self) -> UcdbcW { + UcdbcW::new(self, 8) } } #[doc = "MMC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_CONTROL_SPEC; -impl crate::RegisterSpec for MMC_CONTROL_SPEC { +pub struct MmcControlSpec; +impl crate::RegisterSpec for MmcControlSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_control::R`](R) reader structure"] -impl crate::Readable for MMC_CONTROL_SPEC {} +impl crate::Readable for MmcControlSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_control::W`](W) writer structure"] -impl crate::Writable for MMC_CONTROL_SPEC { +impl crate::Writable for MmcControlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_CONTROL to value 0"] -impl crate::Resettable for MMC_CONTROL_SPEC { +impl crate::Resettable for MmcControlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_ipc_receive_interrupt.rs b/src/eth0/mmc_ipc_receive_interrupt.rs index 811a952e..ac42dfd1 100644 --- a/src/eth0/mmc_ipc_receive_interrupt.rs +++ b/src/eth0/mmc_ipc_receive_interrupt.rs @@ -1,211 +1,211 @@ #[doc = "Register `MMC_IPC_RECEIVE_INTERRUPT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4GFIS` reader - MMC Receive IPV4 Good Frame Counter Interrupt Status"] -pub type RXIPV4GFIS_R = crate::BitReader; +pub type Rxipv4gfisR = crate::BitReader; #[doc = "Field `RXIPV4HERFIS` reader - MMC Receive IPV4 Header Error Frame Counter Interrupt Status"] -pub type RXIPV4HERFIS_R = crate::BitReader; +pub type Rxipv4herfisR = crate::BitReader; #[doc = "Field `RXIPV4NOPAYFIS` reader - MMC Receive IPV4 No Payload Frame Counter Interrupt Status"] -pub type RXIPV4NOPAYFIS_R = crate::BitReader; +pub type Rxipv4nopayfisR = crate::BitReader; #[doc = "Field `RXIPV4FRAGFIS` reader - MMC Receive IPV4 Fragmented Frame Counter Interrupt Status"] -pub type RXIPV4FRAGFIS_R = crate::BitReader; +pub type Rxipv4fragfisR = crate::BitReader; #[doc = "Field `RXIPV4UDSBLFIS` reader - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Status"] -pub type RXIPV4UDSBLFIS_R = crate::BitReader; +pub type Rxipv4udsblfisR = crate::BitReader; #[doc = "Field `RXIPV6GFIS` reader - MMC Receive IPV6 Good Frame Counter Interrupt Status"] -pub type RXIPV6GFIS_R = crate::BitReader; +pub type Rxipv6gfisR = crate::BitReader; #[doc = "Field `RXIPV6HERFIS` reader - MMC Receive IPV6 Header Error Frame Counter Interrupt Status"] -pub type RXIPV6HERFIS_R = crate::BitReader; +pub type Rxipv6herfisR = crate::BitReader; #[doc = "Field `RXIPV6NOPAYFIS` reader - MMC Receive IPV6 No Payload Frame Counter Interrupt Status"] -pub type RXIPV6NOPAYFIS_R = crate::BitReader; +pub type Rxipv6nopayfisR = crate::BitReader; #[doc = "Field `RXUDPGFIS` reader - MMC Receive UDP Good Frame Counter Interrupt Status"] -pub type RXUDPGFIS_R = crate::BitReader; +pub type RxudpgfisR = crate::BitReader; #[doc = "Field `RXUDPERFIS` reader - MMC Receive UDP Error Frame Counter Interrupt Status"] -pub type RXUDPERFIS_R = crate::BitReader; +pub type RxudperfisR = crate::BitReader; #[doc = "Field `RXTCPGFIS` reader - MMC Receive TCP Good Frame Counter Interrupt Status"] -pub type RXTCPGFIS_R = crate::BitReader; +pub type RxtcpgfisR = crate::BitReader; #[doc = "Field `RXTCPERFIS` reader - MMC Receive TCP Error Frame Counter Interrupt Status"] -pub type RXTCPERFIS_R = crate::BitReader; +pub type RxtcperfisR = crate::BitReader; #[doc = "Field `RXICMPGFIS` reader - MMC Receive ICMP Good Frame Counter Interrupt Status"] -pub type RXICMPGFIS_R = crate::BitReader; +pub type RxicmpgfisR = crate::BitReader; #[doc = "Field `RXICMPERFIS` reader - MMC Receive ICMP Error Frame Counter Interrupt Status"] -pub type RXICMPERFIS_R = crate::BitReader; +pub type RxicmperfisR = crate::BitReader; #[doc = "Field `RXIPV4GOIS` reader - MMC Receive IPV4 Good Octet Counter Interrupt Status"] -pub type RXIPV4GOIS_R = crate::BitReader; +pub type Rxipv4goisR = crate::BitReader; #[doc = "Field `RXIPV4HEROIS` reader - MMC Receive IPV4 Header Error Octet Counter Interrupt Status"] -pub type RXIPV4HEROIS_R = crate::BitReader; +pub type Rxipv4heroisR = crate::BitReader; #[doc = "Field `RXIPV4NOPAYOIS` reader - MMC Receive IPV4 No Payload Octet Counter Interrupt Status"] -pub type RXIPV4NOPAYOIS_R = crate::BitReader; +pub type Rxipv4nopayoisR = crate::BitReader; #[doc = "Field `RXIPV4FRAGOIS` reader - MMC Receive IPV4 Fragmented Octet Counter Interrupt Status"] -pub type RXIPV4FRAGOIS_R = crate::BitReader; +pub type Rxipv4fragoisR = crate::BitReader; #[doc = "Field `RXIPV4UDSBLOIS` reader - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Status"] -pub type RXIPV4UDSBLOIS_R = crate::BitReader; +pub type Rxipv4udsbloisR = crate::BitReader; #[doc = "Field `RXIPV6GOIS` reader - MMC Receive IPV6 Good Octet Counter Interrupt Status"] -pub type RXIPV6GOIS_R = crate::BitReader; +pub type Rxipv6goisR = crate::BitReader; #[doc = "Field `RXIPV6HEROIS` reader - MMC Receive IPV6 Header Error Octet Counter Interrupt Status"] -pub type RXIPV6HEROIS_R = crate::BitReader; +pub type Rxipv6heroisR = crate::BitReader; #[doc = "Field `RXIPV6NOPAYOIS` reader - MMC Receive IPV6 No Payload Octet Counter Interrupt Status"] -pub type RXIPV6NOPAYOIS_R = crate::BitReader; +pub type Rxipv6nopayoisR = crate::BitReader; #[doc = "Field `RXUDPGOIS` reader - MMC Receive UDP Good Octet Counter Interrupt Status"] -pub type RXUDPGOIS_R = crate::BitReader; +pub type RxudpgoisR = crate::BitReader; #[doc = "Field `RXUDPEROIS` reader - MMC Receive UDP Error Octet Counter Interrupt Status"] -pub type RXUDPEROIS_R = crate::BitReader; +pub type RxudperoisR = crate::BitReader; #[doc = "Field `RXTCPGOIS` reader - MMC Receive TCP Good Octet Counter Interrupt Status"] -pub type RXTCPGOIS_R = crate::BitReader; +pub type RxtcpgoisR = crate::BitReader; #[doc = "Field `RXTCPEROIS` reader - MMC Receive TCP Error Octet Counter Interrupt Status"] -pub type RXTCPEROIS_R = crate::BitReader; +pub type RxtcperoisR = crate::BitReader; #[doc = "Field `RXICMPGOIS` reader - MMC Receive ICMP Good Octet Counter Interrupt Status"] -pub type RXICMPGOIS_R = crate::BitReader; +pub type RxicmpgoisR = crate::BitReader; #[doc = "Field `RXICMPEROIS` reader - MMC Receive ICMP Error Octet Counter Interrupt Status"] -pub type RXICMPEROIS_R = crate::BitReader; +pub type RxicmperoisR = crate::BitReader; impl R { #[doc = "Bit 0 - MMC Receive IPV4 Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4gfis(&self) -> RXIPV4GFIS_R { - RXIPV4GFIS_R::new((self.bits & 1) != 0) + pub fn rxipv4gfis(&self) -> Rxipv4gfisR { + Rxipv4gfisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive IPV4 Header Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4herfis(&self) -> RXIPV4HERFIS_R { - RXIPV4HERFIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxipv4herfis(&self) -> Rxipv4herfisR { + Rxipv4herfisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Receive IPV4 No Payload Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4nopayfis(&self) -> RXIPV4NOPAYFIS_R { - RXIPV4NOPAYFIS_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxipv4nopayfis(&self) -> Rxipv4nopayfisR { + Rxipv4nopayfisR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Receive IPV4 Fragmented Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4fragfis(&self) -> RXIPV4FRAGFIS_R { - RXIPV4FRAGFIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxipv4fragfis(&self) -> Rxipv4fragfisR { + Rxipv4fragfisR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4udsblfis(&self) -> RXIPV4UDSBLFIS_R { - RXIPV4UDSBLFIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxipv4udsblfis(&self) -> Rxipv4udsblfisR { + Rxipv4udsblfisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive IPV6 Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6gfis(&self) -> RXIPV6GFIS_R { - RXIPV6GFIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxipv6gfis(&self) -> Rxipv6gfisR { + Rxipv6gfisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Receive IPV6 Header Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6herfis(&self) -> RXIPV6HERFIS_R { - RXIPV6HERFIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn rxipv6herfis(&self) -> Rxipv6herfisR { + Rxipv6herfisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Receive IPV6 No Payload Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6nopayfis(&self) -> RXIPV6NOPAYFIS_R { - RXIPV6NOPAYFIS_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxipv6nopayfis(&self) -> Rxipv6nopayfisR { + Rxipv6nopayfisR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Receive UDP Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxudpgfis(&self) -> RXUDPGFIS_R { - RXUDPGFIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxudpgfis(&self) -> RxudpgfisR { + RxudpgfisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Receive UDP Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxudperfis(&self) -> RXUDPERFIS_R { - RXUDPERFIS_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxudperfis(&self) -> RxudperfisR { + RxudperfisR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Receive TCP Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxtcpgfis(&self) -> RXTCPGFIS_R { - RXTCPGFIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxtcpgfis(&self) -> RxtcpgfisR { + RxtcpgfisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Receive TCP Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxtcperfis(&self) -> RXTCPERFIS_R { - RXTCPERFIS_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxtcperfis(&self) -> RxtcperfisR { + RxtcperfisR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Receive ICMP Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxicmpgfis(&self) -> RXICMPGFIS_R { - RXICMPGFIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxicmpgfis(&self) -> RxicmpgfisR { + RxicmpgfisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Receive ICMP Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxicmperfis(&self) -> RXICMPERFIS_R { - RXICMPERFIS_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxicmperfis(&self) -> RxicmperfisR { + RxicmperfisR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - MMC Receive IPV4 Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4gois(&self) -> RXIPV4GOIS_R { - RXIPV4GOIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn rxipv4gois(&self) -> Rxipv4goisR { + Rxipv4goisR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Receive IPV4 Header Error Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4herois(&self) -> RXIPV4HEROIS_R { - RXIPV4HEROIS_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxipv4herois(&self) -> Rxipv4heroisR { + Rxipv4heroisR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Receive IPV4 No Payload Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4nopayois(&self) -> RXIPV4NOPAYOIS_R { - RXIPV4NOPAYOIS_R::new(((self.bits >> 18) & 1) != 0) + pub fn rxipv4nopayois(&self) -> Rxipv4nopayoisR { + Rxipv4nopayoisR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Receive IPV4 Fragmented Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4fragois(&self) -> RXIPV4FRAGOIS_R { - RXIPV4FRAGOIS_R::new(((self.bits >> 19) & 1) != 0) + pub fn rxipv4fragois(&self) -> Rxipv4fragoisR { + Rxipv4fragoisR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv4udsblois(&self) -> RXIPV4UDSBLOIS_R { - RXIPV4UDSBLOIS_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxipv4udsblois(&self) -> Rxipv4udsbloisR { + Rxipv4udsbloisR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Receive IPV6 Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6gois(&self) -> RXIPV6GOIS_R { - RXIPV6GOIS_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxipv6gois(&self) -> Rxipv6goisR { + Rxipv6goisR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Receive IPV6 Header Error Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6herois(&self) -> RXIPV6HEROIS_R { - RXIPV6HEROIS_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxipv6herois(&self) -> Rxipv6heroisR { + Rxipv6heroisR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Receive IPV6 No Payload Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxipv6nopayois(&self) -> RXIPV6NOPAYOIS_R { - RXIPV6NOPAYOIS_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxipv6nopayois(&self) -> Rxipv6nopayoisR { + Rxipv6nopayoisR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Receive UDP Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxudpgois(&self) -> RXUDPGOIS_R { - RXUDPGOIS_R::new(((self.bits >> 24) & 1) != 0) + pub fn rxudpgois(&self) -> RxudpgoisR { + RxudpgoisR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Receive UDP Error Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxudperois(&self) -> RXUDPEROIS_R { - RXUDPEROIS_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxudperois(&self) -> RxudperoisR { + RxudperoisR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - MMC Receive TCP Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxtcpgois(&self) -> RXTCPGOIS_R { - RXTCPGOIS_R::new(((self.bits >> 26) & 1) != 0) + pub fn rxtcpgois(&self) -> RxtcpgoisR { + RxtcpgoisR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - MMC Receive TCP Error Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxtcperois(&self) -> RXTCPEROIS_R { - RXTCPEROIS_R::new(((self.bits >> 27) & 1) != 0) + pub fn rxtcperois(&self) -> RxtcperoisR { + RxtcperoisR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - MMC Receive ICMP Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxicmpgois(&self) -> RXICMPGOIS_R { - RXICMPGOIS_R::new(((self.bits >> 28) & 1) != 0) + pub fn rxicmpgois(&self) -> RxicmpgoisR { + RxicmpgoisR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - MMC Receive ICMP Error Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxicmperois(&self) -> RXICMPEROIS_R { - RXICMPEROIS_R::new(((self.bits >> 29) & 1) != 0) + pub fn rxicmperois(&self) -> RxicmperoisR { + RxicmperoisR::new(((self.bits >> 29) & 1) != 0) } } #[doc = "MMC Receive Checksum Offload Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_IPC_RECEIVE_INTERRUPT_SPEC; -impl crate::RegisterSpec for MMC_IPC_RECEIVE_INTERRUPT_SPEC { +pub struct MmcIpcReceiveInterruptSpec; +impl crate::RegisterSpec for MmcIpcReceiveInterruptSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_ipc_receive_interrupt::R`](R) reader structure"] -impl crate::Readable for MMC_IPC_RECEIVE_INTERRUPT_SPEC {} +impl crate::Readable for MmcIpcReceiveInterruptSpec {} #[doc = "`reset()` method sets MMC_IPC_RECEIVE_INTERRUPT to value 0"] -impl crate::Resettable for MMC_IPC_RECEIVE_INTERRUPT_SPEC { +impl crate::Resettable for MmcIpcReceiveInterruptSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_ipc_receive_interrupt_mask.rs b/src/eth0/mmc_ipc_receive_interrupt_mask.rs index 3d82c778..7820ed82 100644 --- a/src/eth0/mmc_ipc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_ipc_receive_interrupt_mask.rs @@ -1,454 +1,445 @@ #[doc = "Register `MMC_IPC_RECEIVE_INTERRUPT_MASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMC_IPC_RECEIVE_INTERRUPT_MASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RXIPV4GFIM` reader - MMC Receive IPV4 Good Frame Counter Interrupt Mask"] -pub type RXIPV4GFIM_R = crate::BitReader; +pub type Rxipv4gfimR = crate::BitReader; #[doc = "Field `RXIPV4GFIM` writer - MMC Receive IPV4 Good Frame Counter Interrupt Mask"] -pub type RXIPV4GFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4gfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4HERFIM` reader - MMC Receive IPV4 Header Error Frame Counter Interrupt Mask"] -pub type RXIPV4HERFIM_R = crate::BitReader; +pub type Rxipv4herfimR = crate::BitReader; #[doc = "Field `RXIPV4HERFIM` writer - MMC Receive IPV4 Header Error Frame Counter Interrupt Mask"] -pub type RXIPV4HERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4herfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4NOPAYFIM` reader - MMC Receive IPV4 No Payload Frame Counter Interrupt Mask"] -pub type RXIPV4NOPAYFIM_R = crate::BitReader; +pub type Rxipv4nopayfimR = crate::BitReader; #[doc = "Field `RXIPV4NOPAYFIM` writer - MMC Receive IPV4 No Payload Frame Counter Interrupt Mask"] -pub type RXIPV4NOPAYFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4nopayfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4FRAGFIM` reader - MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask"] -pub type RXIPV4FRAGFIM_R = crate::BitReader; +pub type Rxipv4fragfimR = crate::BitReader; #[doc = "Field `RXIPV4FRAGFIM` writer - MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask"] -pub type RXIPV4FRAGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4fragfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4UDSBLFIM` reader - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask"] -pub type RXIPV4UDSBLFIM_R = crate::BitReader; +pub type Rxipv4udsblfimR = crate::BitReader; #[doc = "Field `RXIPV4UDSBLFIM` writer - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask"] -pub type RXIPV4UDSBLFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4udsblfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6GFIM` reader - MMC Receive IPV6 Good Frame Counter Interrupt Mask"] -pub type RXIPV6GFIM_R = crate::BitReader; +pub type Rxipv6gfimR = crate::BitReader; #[doc = "Field `RXIPV6GFIM` writer - MMC Receive IPV6 Good Frame Counter Interrupt Mask"] -pub type RXIPV6GFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6gfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6HERFIM` reader - MMC Receive IPV6 Header Error Frame Counter Interrupt Mask"] -pub type RXIPV6HERFIM_R = crate::BitReader; +pub type Rxipv6herfimR = crate::BitReader; #[doc = "Field `RXIPV6HERFIM` writer - MMC Receive IPV6 Header Error Frame Counter Interrupt Mask"] -pub type RXIPV6HERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6herfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6NOPAYFIM` reader - MMC Receive IPV6 No Payload Frame Counter Interrupt Mask"] -pub type RXIPV6NOPAYFIM_R = crate::BitReader; +pub type Rxipv6nopayfimR = crate::BitReader; #[doc = "Field `RXIPV6NOPAYFIM` writer - MMC Receive IPV6 No Payload Frame Counter Interrupt Mask"] -pub type RXIPV6NOPAYFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6nopayfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUDPGFIM` reader - MMC Receive UDP Good Frame Counter Interrupt Mask"] -pub type RXUDPGFIM_R = crate::BitReader; +pub type RxudpgfimR = crate::BitReader; #[doc = "Field `RXUDPGFIM` writer - MMC Receive UDP Good Frame Counter Interrupt Mask"] -pub type RXUDPGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxudpgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUDPERFIM` reader - MMC Receive UDP Error Frame Counter Interrupt Mask"] -pub type RXUDPERFIM_R = crate::BitReader; +pub type RxudperfimR = crate::BitReader; #[doc = "Field `RXUDPERFIM` writer - MMC Receive UDP Error Frame Counter Interrupt Mask"] -pub type RXUDPERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxudperfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTCPGFIM` reader - MMC Receive TCP Good Frame Counter Interrupt Mask"] -pub type RXTCPGFIM_R = crate::BitReader; +pub type RxtcpgfimR = crate::BitReader; #[doc = "Field `RXTCPGFIM` writer - MMC Receive TCP Good Frame Counter Interrupt Mask"] -pub type RXTCPGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxtcpgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTCPERFIM` reader - MMC Receive TCP Error Frame Counter Interrupt Mask"] -pub type RXTCPERFIM_R = crate::BitReader; +pub type RxtcperfimR = crate::BitReader; #[doc = "Field `RXTCPERFIM` writer - MMC Receive TCP Error Frame Counter Interrupt Mask"] -pub type RXTCPERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxtcperfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXICMPGFIM` reader - MMC Receive ICMP Good Frame Counter Interrupt Mask"] -pub type RXICMPGFIM_R = crate::BitReader; +pub type RxicmpgfimR = crate::BitReader; #[doc = "Field `RXICMPGFIM` writer - MMC Receive ICMP Good Frame Counter Interrupt Mask"] -pub type RXICMPGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxicmpgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXICMPERFIM` reader - MMC Receive ICMP Error Frame Counter Interrupt Mask"] -pub type RXICMPERFIM_R = crate::BitReader; +pub type RxicmperfimR = crate::BitReader; #[doc = "Field `RXICMPERFIM` writer - MMC Receive ICMP Error Frame Counter Interrupt Mask"] -pub type RXICMPERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxicmperfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4GOIM` reader - MMC Receive IPV4 Good Octet Counter Interrupt Mask"] -pub type RXIPV4GOIM_R = crate::BitReader; +pub type Rxipv4goimR = crate::BitReader; #[doc = "Field `RXIPV4GOIM` writer - MMC Receive IPV4 Good Octet Counter Interrupt Mask"] -pub type RXIPV4GOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4goimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4HEROIM` reader - MMC Receive IPV4 Header Error Octet Counter Interrupt Mask"] -pub type RXIPV4HEROIM_R = crate::BitReader; +pub type Rxipv4heroimR = crate::BitReader; #[doc = "Field `RXIPV4HEROIM` writer - MMC Receive IPV4 Header Error Octet Counter Interrupt Mask"] -pub type RXIPV4HEROIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4heroimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4NOPAYOIM` reader - MMC Receive IPV4 No Payload Octet Counter Interrupt Mask"] -pub type RXIPV4NOPAYOIM_R = crate::BitReader; +pub type Rxipv4nopayoimR = crate::BitReader; #[doc = "Field `RXIPV4NOPAYOIM` writer - MMC Receive IPV4 No Payload Octet Counter Interrupt Mask"] -pub type RXIPV4NOPAYOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4nopayoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4FRAGOIM` reader - MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask"] -pub type RXIPV4FRAGOIM_R = crate::BitReader; +pub type Rxipv4fragoimR = crate::BitReader; #[doc = "Field `RXIPV4FRAGOIM` writer - MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask"] -pub type RXIPV4FRAGOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4fragoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV4UDSBLOIM` reader - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask"] -pub type RXIPV4UDSBLOIM_R = crate::BitReader; +pub type Rxipv4udsbloimR = crate::BitReader; #[doc = "Field `RXIPV4UDSBLOIM` writer - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask"] -pub type RXIPV4UDSBLOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv4udsbloimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6GOIM` reader - MMC Receive IPV6 Good Octet Counter Interrupt Mask"] -pub type RXIPV6GOIM_R = crate::BitReader; +pub type Rxipv6goimR = crate::BitReader; #[doc = "Field `RXIPV6GOIM` writer - MMC Receive IPV6 Good Octet Counter Interrupt Mask"] -pub type RXIPV6GOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6goimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6HEROIM` reader - MMC Receive IPV6 Header Error Octet Counter Interrupt Mask"] -pub type RXIPV6HEROIM_R = crate::BitReader; +pub type Rxipv6heroimR = crate::BitReader; #[doc = "Field `RXIPV6HEROIM` writer - MMC Receive IPV6 Header Error Octet Counter Interrupt Mask"] -pub type RXIPV6HEROIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6heroimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXIPV6NOPAYOIM` reader - MMC Receive IPV6 No Payload Octet Counter Interrupt Mask"] -pub type RXIPV6NOPAYOIM_R = crate::BitReader; +pub type Rxipv6nopayoimR = crate::BitReader; #[doc = "Field `RXIPV6NOPAYOIM` writer - MMC Receive IPV6 No Payload Octet Counter Interrupt Mask"] -pub type RXIPV6NOPAYOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rxipv6nopayoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUDPGOIM` reader - MMC Receive UDP Good Octet Counter Interrupt Mask"] -pub type RXUDPGOIM_R = crate::BitReader; +pub type RxudpgoimR = crate::BitReader; #[doc = "Field `RXUDPGOIM` writer - MMC Receive UDP Good Octet Counter Interrupt Mask"] -pub type RXUDPGOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxudpgoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUDPEROIM` reader - MMC Receive UDP Error Octet Counter Interrupt Mask"] -pub type RXUDPEROIM_R = crate::BitReader; +pub type RxudperoimR = crate::BitReader; #[doc = "Field `RXUDPEROIM` writer - MMC Receive UDP Error Octet Counter Interrupt Mask"] -pub type RXUDPEROIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxudperoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTCPGOIM` reader - MMC Receive TCP Good Octet Counter Interrupt Mask"] -pub type RXTCPGOIM_R = crate::BitReader; +pub type RxtcpgoimR = crate::BitReader; #[doc = "Field `RXTCPGOIM` writer - MMC Receive TCP Good Octet Counter Interrupt Mask"] -pub type RXTCPGOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxtcpgoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXTCPEROIM` reader - MMC Receive TCP Error Octet Counter Interrupt Mask"] -pub type RXTCPEROIM_R = crate::BitReader; +pub type RxtcperoimR = crate::BitReader; #[doc = "Field `RXTCPEROIM` writer - MMC Receive TCP Error Octet Counter Interrupt Mask"] -pub type RXTCPEROIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxtcperoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXICMPGOIM` reader - MMC Receive ICMP Good Octet Counter Interrupt Mask"] -pub type RXICMPGOIM_R = crate::BitReader; +pub type RxicmpgoimR = crate::BitReader; #[doc = "Field `RXICMPGOIM` writer - MMC Receive ICMP Good Octet Counter Interrupt Mask"] -pub type RXICMPGOIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxicmpgoimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXICMPEROIM` reader - MMC Receive ICMP Error Octet Counter Interrupt Mask"] -pub type RXICMPEROIM_R = crate::BitReader; +pub type RxicmperoimR = crate::BitReader; #[doc = "Field `RXICMPEROIM` writer - MMC Receive ICMP Error Octet Counter Interrupt Mask"] -pub type RXICMPEROIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxicmperoimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - MMC Receive IPV4 Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4gfim(&self) -> RXIPV4GFIM_R { - RXIPV4GFIM_R::new((self.bits & 1) != 0) + pub fn rxipv4gfim(&self) -> Rxipv4gfimR { + Rxipv4gfimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive IPV4 Header Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4herfim(&self) -> RXIPV4HERFIM_R { - RXIPV4HERFIM_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxipv4herfim(&self) -> Rxipv4herfimR { + Rxipv4herfimR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Receive IPV4 No Payload Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4nopayfim(&self) -> RXIPV4NOPAYFIM_R { - RXIPV4NOPAYFIM_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxipv4nopayfim(&self) -> Rxipv4nopayfimR { + Rxipv4nopayfimR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4fragfim(&self) -> RXIPV4FRAGFIM_R { - RXIPV4FRAGFIM_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxipv4fragfim(&self) -> Rxipv4fragfimR { + Rxipv4fragfimR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4udsblfim(&self) -> RXIPV4UDSBLFIM_R { - RXIPV4UDSBLFIM_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxipv4udsblfim(&self) -> Rxipv4udsblfimR { + Rxipv4udsblfimR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive IPV6 Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6gfim(&self) -> RXIPV6GFIM_R { - RXIPV6GFIM_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxipv6gfim(&self) -> Rxipv6gfimR { + Rxipv6gfimR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Receive IPV6 Header Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6herfim(&self) -> RXIPV6HERFIM_R { - RXIPV6HERFIM_R::new(((self.bits >> 6) & 1) != 0) + pub fn rxipv6herfim(&self) -> Rxipv6herfimR { + Rxipv6herfimR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Receive IPV6 No Payload Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6nopayfim(&self) -> RXIPV6NOPAYFIM_R { - RXIPV6NOPAYFIM_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxipv6nopayfim(&self) -> Rxipv6nopayfimR { + Rxipv6nopayfimR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Receive UDP Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxudpgfim(&self) -> RXUDPGFIM_R { - RXUDPGFIM_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxudpgfim(&self) -> RxudpgfimR { + RxudpgfimR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Receive UDP Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxudperfim(&self) -> RXUDPERFIM_R { - RXUDPERFIM_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxudperfim(&self) -> RxudperfimR { + RxudperfimR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Receive TCP Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxtcpgfim(&self) -> RXTCPGFIM_R { - RXTCPGFIM_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxtcpgfim(&self) -> RxtcpgfimR { + RxtcpgfimR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Receive TCP Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxtcperfim(&self) -> RXTCPERFIM_R { - RXTCPERFIM_R::new(((self.bits >> 11) & 1) != 0) + pub fn rxtcperfim(&self) -> RxtcperfimR { + RxtcperfimR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Receive ICMP Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxicmpgfim(&self) -> RXICMPGFIM_R { - RXICMPGFIM_R::new(((self.bits >> 12) & 1) != 0) + pub fn rxicmpgfim(&self) -> RxicmpgfimR { + RxicmpgfimR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Receive ICMP Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxicmperfim(&self) -> RXICMPERFIM_R { - RXICMPERFIM_R::new(((self.bits >> 13) & 1) != 0) + pub fn rxicmperfim(&self) -> RxicmperfimR { + RxicmperfimR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - MMC Receive IPV4 Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4goim(&self) -> RXIPV4GOIM_R { - RXIPV4GOIM_R::new(((self.bits >> 16) & 1) != 0) + pub fn rxipv4goim(&self) -> Rxipv4goimR { + Rxipv4goimR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Receive IPV4 Header Error Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4heroim(&self) -> RXIPV4HEROIM_R { - RXIPV4HEROIM_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxipv4heroim(&self) -> Rxipv4heroimR { + Rxipv4heroimR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Receive IPV4 No Payload Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4nopayoim(&self) -> RXIPV4NOPAYOIM_R { - RXIPV4NOPAYOIM_R::new(((self.bits >> 18) & 1) != 0) + pub fn rxipv4nopayoim(&self) -> Rxipv4nopayoimR { + Rxipv4nopayoimR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4fragoim(&self) -> RXIPV4FRAGOIM_R { - RXIPV4FRAGOIM_R::new(((self.bits >> 19) & 1) != 0) + pub fn rxipv4fragoim(&self) -> Rxipv4fragoimR { + Rxipv4fragoimR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv4udsbloim(&self) -> RXIPV4UDSBLOIM_R { - RXIPV4UDSBLOIM_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxipv4udsbloim(&self) -> Rxipv4udsbloimR { + Rxipv4udsbloimR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Receive IPV6 Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6goim(&self) -> RXIPV6GOIM_R { - RXIPV6GOIM_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxipv6goim(&self) -> Rxipv6goimR { + Rxipv6goimR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Receive IPV6 Header Error Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6heroim(&self) -> RXIPV6HEROIM_R { - RXIPV6HEROIM_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxipv6heroim(&self) -> Rxipv6heroimR { + Rxipv6heroimR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Receive IPV6 No Payload Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxipv6nopayoim(&self) -> RXIPV6NOPAYOIM_R { - RXIPV6NOPAYOIM_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxipv6nopayoim(&self) -> Rxipv6nopayoimR { + Rxipv6nopayoimR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Receive UDP Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxudpgoim(&self) -> RXUDPGOIM_R { - RXUDPGOIM_R::new(((self.bits >> 24) & 1) != 0) + pub fn rxudpgoim(&self) -> RxudpgoimR { + RxudpgoimR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Receive UDP Error Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxudperoim(&self) -> RXUDPEROIM_R { - RXUDPEROIM_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxudperoim(&self) -> RxudperoimR { + RxudperoimR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - MMC Receive TCP Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxtcpgoim(&self) -> RXTCPGOIM_R { - RXTCPGOIM_R::new(((self.bits >> 26) & 1) != 0) + pub fn rxtcpgoim(&self) -> RxtcpgoimR { + RxtcpgoimR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - MMC Receive TCP Error Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxtcperoim(&self) -> RXTCPEROIM_R { - RXTCPEROIM_R::new(((self.bits >> 27) & 1) != 0) + pub fn rxtcperoim(&self) -> RxtcperoimR { + RxtcperoimR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - MMC Receive ICMP Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxicmpgoim(&self) -> RXICMPGOIM_R { - RXICMPGOIM_R::new(((self.bits >> 28) & 1) != 0) + pub fn rxicmpgoim(&self) -> RxicmpgoimR { + RxicmpgoimR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - MMC Receive ICMP Error Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxicmperoim(&self) -> RXICMPEROIM_R { - RXICMPEROIM_R::new(((self.bits >> 29) & 1) != 0) + pub fn rxicmperoim(&self) -> RxicmperoimR { + RxicmperoimR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - MMC Receive IPV4 Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4gfim(&mut self) -> RXIPV4GFIM_W { - RXIPV4GFIM_W::new(self, 0) + pub fn rxipv4gfim(&mut self) -> Rxipv4gfimW { + Rxipv4gfimW::new(self, 0) } #[doc = "Bit 1 - MMC Receive IPV4 Header Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4herfim(&mut self) -> RXIPV4HERFIM_W { - RXIPV4HERFIM_W::new(self, 1) + pub fn rxipv4herfim(&mut self) -> Rxipv4herfimW { + Rxipv4herfimW::new(self, 1) } #[doc = "Bit 2 - MMC Receive IPV4 No Payload Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4nopayfim(&mut self) -> RXIPV4NOPAYFIM_W { - RXIPV4NOPAYFIM_W::new(self, 2) + pub fn rxipv4nopayfim(&mut self) -> Rxipv4nopayfimW { + Rxipv4nopayfimW::new(self, 2) } #[doc = "Bit 3 - MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4fragfim(&mut self) -> RXIPV4FRAGFIM_W { - RXIPV4FRAGFIM_W::new(self, 3) + pub fn rxipv4fragfim(&mut self) -> Rxipv4fragfimW { + Rxipv4fragfimW::new(self, 3) } #[doc = "Bit 4 - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4udsblfim(&mut self) -> RXIPV4UDSBLFIM_W { - RXIPV4UDSBLFIM_W::new(self, 4) + pub fn rxipv4udsblfim(&mut self) -> Rxipv4udsblfimW { + Rxipv4udsblfimW::new(self, 4) } #[doc = "Bit 5 - MMC Receive IPV6 Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6gfim(&mut self) -> RXIPV6GFIM_W { - RXIPV6GFIM_W::new(self, 5) + pub fn rxipv6gfim(&mut self) -> Rxipv6gfimW { + Rxipv6gfimW::new(self, 5) } #[doc = "Bit 6 - MMC Receive IPV6 Header Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6herfim(&mut self) -> RXIPV6HERFIM_W { - RXIPV6HERFIM_W::new(self, 6) + pub fn rxipv6herfim(&mut self) -> Rxipv6herfimW { + Rxipv6herfimW::new(self, 6) } #[doc = "Bit 7 - MMC Receive IPV6 No Payload Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6nopayfim(&mut self) -> RXIPV6NOPAYFIM_W { - RXIPV6NOPAYFIM_W::new(self, 7) + pub fn rxipv6nopayfim(&mut self) -> Rxipv6nopayfimW { + Rxipv6nopayfimW::new(self, 7) } #[doc = "Bit 8 - MMC Receive UDP Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxudpgfim(&mut self) -> RXUDPGFIM_W { - RXUDPGFIM_W::new(self, 8) + pub fn rxudpgfim(&mut self) -> RxudpgfimW { + RxudpgfimW::new(self, 8) } #[doc = "Bit 9 - MMC Receive UDP Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxudperfim(&mut self) -> RXUDPERFIM_W { - RXUDPERFIM_W::new(self, 9) + pub fn rxudperfim(&mut self) -> RxudperfimW { + RxudperfimW::new(self, 9) } #[doc = "Bit 10 - MMC Receive TCP Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxtcpgfim(&mut self) -> RXTCPGFIM_W { - RXTCPGFIM_W::new(self, 10) + pub fn rxtcpgfim(&mut self) -> RxtcpgfimW { + RxtcpgfimW::new(self, 10) } #[doc = "Bit 11 - MMC Receive TCP Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxtcperfim(&mut self) -> RXTCPERFIM_W { - RXTCPERFIM_W::new(self, 11) + pub fn rxtcperfim(&mut self) -> RxtcperfimW { + RxtcperfimW::new(self, 11) } #[doc = "Bit 12 - MMC Receive ICMP Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxicmpgfim(&mut self) -> RXICMPGFIM_W { - RXICMPGFIM_W::new(self, 12) + pub fn rxicmpgfim(&mut self) -> RxicmpgfimW { + RxicmpgfimW::new(self, 12) } #[doc = "Bit 13 - MMC Receive ICMP Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxicmperfim(&mut self) -> RXICMPERFIM_W { - RXICMPERFIM_W::new(self, 13) + pub fn rxicmperfim(&mut self) -> RxicmperfimW { + RxicmperfimW::new(self, 13) } #[doc = "Bit 16 - MMC Receive IPV4 Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4goim(&mut self) -> RXIPV4GOIM_W { - RXIPV4GOIM_W::new(self, 16) + pub fn rxipv4goim(&mut self) -> Rxipv4goimW { + Rxipv4goimW::new(self, 16) } #[doc = "Bit 17 - MMC Receive IPV4 Header Error Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4heroim(&mut self) -> RXIPV4HEROIM_W { - RXIPV4HEROIM_W::new(self, 17) + pub fn rxipv4heroim(&mut self) -> Rxipv4heroimW { + Rxipv4heroimW::new(self, 17) } #[doc = "Bit 18 - MMC Receive IPV4 No Payload Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4nopayoim(&mut self) -> RXIPV4NOPAYOIM_W { - RXIPV4NOPAYOIM_W::new(self, 18) + pub fn rxipv4nopayoim(&mut self) -> Rxipv4nopayoimW { + Rxipv4nopayoimW::new(self, 18) } #[doc = "Bit 19 - MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4fragoim(&mut self) -> RXIPV4FRAGOIM_W { - RXIPV4FRAGOIM_W::new(self, 19) + pub fn rxipv4fragoim(&mut self) -> Rxipv4fragoimW { + Rxipv4fragoimW::new(self, 19) } #[doc = "Bit 20 - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv4udsbloim(&mut self) -> RXIPV4UDSBLOIM_W { - RXIPV4UDSBLOIM_W::new(self, 20) + pub fn rxipv4udsbloim(&mut self) -> Rxipv4udsbloimW { + Rxipv4udsbloimW::new(self, 20) } #[doc = "Bit 21 - MMC Receive IPV6 Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6goim(&mut self) -> RXIPV6GOIM_W { - RXIPV6GOIM_W::new(self, 21) + pub fn rxipv6goim(&mut self) -> Rxipv6goimW { + Rxipv6goimW::new(self, 21) } #[doc = "Bit 22 - MMC Receive IPV6 Header Error Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6heroim(&mut self) -> RXIPV6HEROIM_W { - RXIPV6HEROIM_W::new(self, 22) + pub fn rxipv6heroim(&mut self) -> Rxipv6heroimW { + Rxipv6heroimW::new(self, 22) } #[doc = "Bit 23 - MMC Receive IPV6 No Payload Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxipv6nopayoim(&mut self) -> RXIPV6NOPAYOIM_W { - RXIPV6NOPAYOIM_W::new(self, 23) + pub fn rxipv6nopayoim(&mut self) -> Rxipv6nopayoimW { + Rxipv6nopayoimW::new(self, 23) } #[doc = "Bit 24 - MMC Receive UDP Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxudpgoim(&mut self) -> RXUDPGOIM_W { - RXUDPGOIM_W::new(self, 24) + pub fn rxudpgoim(&mut self) -> RxudpgoimW { + RxudpgoimW::new(self, 24) } #[doc = "Bit 25 - MMC Receive UDP Error Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxudperoim(&mut self) -> RXUDPEROIM_W { - RXUDPEROIM_W::new(self, 25) + pub fn rxudperoim(&mut self) -> RxudperoimW { + RxudperoimW::new(self, 25) } #[doc = "Bit 26 - MMC Receive TCP Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxtcpgoim(&mut self) -> RXTCPGOIM_W { - RXTCPGOIM_W::new(self, 26) + pub fn rxtcpgoim(&mut self) -> RxtcpgoimW { + RxtcpgoimW::new(self, 26) } #[doc = "Bit 27 - MMC Receive TCP Error Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxtcperoim(&mut self) -> RXTCPEROIM_W { - RXTCPEROIM_W::new(self, 27) + pub fn rxtcperoim(&mut self) -> RxtcperoimW { + RxtcperoimW::new(self, 27) } #[doc = "Bit 28 - MMC Receive ICMP Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxicmpgoim(&mut self) -> RXICMPGOIM_W { - RXICMPGOIM_W::new(self, 28) + pub fn rxicmpgoim(&mut self) -> RxicmpgoimW { + RxicmpgoimW::new(self, 28) } #[doc = "Bit 29 - MMC Receive ICMP Error Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxicmperoim(&mut self) -> RXICMPEROIM_W { - RXICMPEROIM_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rxicmperoim(&mut self) -> RxicmperoimW { + RxicmperoimW::new(self, 29) } } #[doc = "MMC Receive Checksum Offload Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_ipc_receive_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_ipc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC; -impl crate::RegisterSpec for MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC { +pub struct MmcIpcReceiveInterruptMaskSpec; +impl crate::RegisterSpec for MmcIpcReceiveInterruptMaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_ipc_receive_interrupt_mask::R`](R) reader structure"] -impl crate::Readable for MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC {} +impl crate::Readable for MmcIpcReceiveInterruptMaskSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_ipc_receive_interrupt_mask::W`](W) writer structure"] -impl crate::Writable for MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC { +impl crate::Writable for MmcIpcReceiveInterruptMaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_IPC_RECEIVE_INTERRUPT_MASK to value 0"] -impl crate::Resettable for MMC_IPC_RECEIVE_INTERRUPT_MASK_SPEC { +impl crate::Resettable for MmcIpcReceiveInterruptMaskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_receive_interrupt.rs b/src/eth0/mmc_receive_interrupt.rs index 4dcaab74..d9b07fbd 100644 --- a/src/eth0/mmc_receive_interrupt.rs +++ b/src/eth0/mmc_receive_interrupt.rs @@ -1,197 +1,197 @@ #[doc = "Register `MMC_RECEIVE_INTERRUPT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXGBFRMIS` reader - MMC Receive Good Bad Frame Counter Interrupt Status"] -pub type RXGBFRMIS_R = crate::BitReader; +pub type RxgbfrmisR = crate::BitReader; #[doc = "Field `RXGBOCTIS` reader - MMC Receive Good Bad Octet Counter Interrupt Status"] -pub type RXGBOCTIS_R = crate::BitReader; +pub type RxgboctisR = crate::BitReader; #[doc = "Field `RXGOCTIS` reader - MMC Receive Good Octet Counter Interrupt Status."] -pub type RXGOCTIS_R = crate::BitReader; +pub type RxgoctisR = crate::BitReader; #[doc = "Field `RXBCGFIS` reader - MMC Receive Broadcast Good Frame Counter Interrupt Status."] -pub type RXBCGFIS_R = crate::BitReader; +pub type RxbcgfisR = crate::BitReader; #[doc = "Field `RXMCGFIS` reader - MMC Receive Multicast Good Frame Counter Interrupt Status"] -pub type RXMCGFIS_R = crate::BitReader; +pub type RxmcgfisR = crate::BitReader; #[doc = "Field `RXCRCERFIS` reader - MMC Receive CRC Error Frame Counter Interrupt Status"] -pub type RXCRCERFIS_R = crate::BitReader; +pub type RxcrcerfisR = crate::BitReader; #[doc = "Field `RXALGNERFIS` reader - MMC Receive Alignment Error Frame Counter Interrupt Status"] -pub type RXALGNERFIS_R = crate::BitReader; +pub type RxalgnerfisR = crate::BitReader; #[doc = "Field `RXRUNTFIS` reader - MMC Receive Runt Frame Counter Interrupt Status"] -pub type RXRUNTFIS_R = crate::BitReader; +pub type RxruntfisR = crate::BitReader; #[doc = "Field `RXJABERFIS` reader - MMC Receive Jabber Error Frame Counter Interrupt Status"] -pub type RXJABERFIS_R = crate::BitReader; +pub type RxjaberfisR = crate::BitReader; #[doc = "Field `RXUSIZEGFIS` reader - MMC Receive Undersize Good Frame Counter Interrupt Status"] -pub type RXUSIZEGFIS_R = crate::BitReader; +pub type RxusizegfisR = crate::BitReader; #[doc = "Field `RXOSIZEGFIS` reader - MMC Receive Oversize Good Frame Counter Interrupt Status"] -pub type RXOSIZEGFIS_R = crate::BitReader; +pub type RxosizegfisR = crate::BitReader; #[doc = "Field `RX64OCTGBFIS` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] -pub type RX64OCTGBFIS_R = crate::BitReader; +pub type Rx64octgbfisR = crate::BitReader; #[doc = "Field `RX65T127OCTGBFIS` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub type RX65T127OCTGBFIS_R = crate::BitReader; +pub type Rx65t127octgbfisR = crate::BitReader; #[doc = "Field `RX128T255OCTGBFIS` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub type RX128T255OCTGBFIS_R = crate::BitReader; +pub type Rx128t255octgbfisR = crate::BitReader; #[doc = "Field `RX256T511OCTGBFIS` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub type RX256T511OCTGBFIS_R = crate::BitReader; +pub type Rx256t511octgbfisR = crate::BitReader; #[doc = "Field `RX512T1023OCTGBFIS` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub type RX512T1023OCTGBFIS_R = crate::BitReader; +pub type Rx512t1023octgbfisR = crate::BitReader; #[doc = "Field `RX1024TMAXOCTGBFIS` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status"] -pub type RX1024TMAXOCTGBFIS_R = crate::BitReader; +pub type Rx1024tmaxoctgbfisR = crate::BitReader; #[doc = "Field `RXUCGFIS` reader - MMC Receive Unicast Good Frame Counter Interrupt Status"] -pub type RXUCGFIS_R = crate::BitReader; +pub type RxucgfisR = crate::BitReader; #[doc = "Field `RXLENERFIS` reader - MMC Receive Length Error Frame Counter Interrupt Status"] -pub type RXLENERFIS_R = crate::BitReader; +pub type RxlenerfisR = crate::BitReader; #[doc = "Field `RXORANGEFIS` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Status"] -pub type RXORANGEFIS_R = crate::BitReader; +pub type RxorangefisR = crate::BitReader; #[doc = "Field `RXPAUSFIS` reader - MMC Receive Pause Frame Counter Interrupt Status"] -pub type RXPAUSFIS_R = crate::BitReader; +pub type RxpausfisR = crate::BitReader; #[doc = "Field `RXFOVFIS` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] -pub type RXFOVFIS_R = crate::BitReader; +pub type RxfovfisR = crate::BitReader; #[doc = "Field `RXVLANGBFIS` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] -pub type RXVLANGBFIS_R = crate::BitReader; +pub type RxvlangbfisR = crate::BitReader; #[doc = "Field `RXWDOGFIS` reader - MMC Receive Watchdog Error Frame Counter Interrupt Status"] -pub type RXWDOGFIS_R = crate::BitReader; +pub type RxwdogfisR = crate::BitReader; #[doc = "Field `RXRCVERRFIS` reader - MMC Receive Error Frame Counter Interrupt Status"] -pub type RXRCVERRFIS_R = crate::BitReader; +pub type RxrcverrfisR = crate::BitReader; #[doc = "Field `RXCTRLFIS` reader - MMC Receive Control Frame Counter Interrupt Status"] -pub type RXCTRLFIS_R = crate::BitReader; +pub type RxctrlfisR = crate::BitReader; impl R { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxgbfrmis(&self) -> RXGBFRMIS_R { - RXGBFRMIS_R::new((self.bits & 1) != 0) + pub fn rxgbfrmis(&self) -> RxgbfrmisR { + RxgbfrmisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn rxgboctis(&self) -> RXGBOCTIS_R { - RXGBOCTIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxgboctis(&self) -> RxgboctisR { + RxgboctisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Status."] #[inline(always)] - pub fn rxgoctis(&self) -> RXGOCTIS_R { - RXGOCTIS_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxgoctis(&self) -> RxgoctisR { + RxgoctisR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Status."] #[inline(always)] - pub fn rxbcgfis(&self) -> RXBCGFIS_R { - RXBCGFIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxbcgfis(&self) -> RxbcgfisR { + RxbcgfisR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxmcgfis(&self) -> RXMCGFIS_R { - RXMCGFIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxmcgfis(&self) -> RxmcgfisR { + RxmcgfisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxcrcerfis(&self) -> RXCRCERFIS_R { - RXCRCERFIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxcrcerfis(&self) -> RxcrcerfisR { + RxcrcerfisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxalgnerfis(&self) -> RXALGNERFIS_R { - RXALGNERFIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn rxalgnerfis(&self) -> RxalgnerfisR { + RxalgnerfisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxruntfis(&self) -> RXRUNTFIS_R { - RXRUNTFIS_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxruntfis(&self) -> RxruntfisR { + RxruntfisR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxjaberfis(&self) -> RXJABERFIS_R { - RXJABERFIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxjaberfis(&self) -> RxjaberfisR { + RxjaberfisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxusizegfis(&self) -> RXUSIZEGFIS_R { - RXUSIZEGFIS_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxusizegfis(&self) -> RxusizegfisR { + RxusizegfisR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxosizegfis(&self) -> RXOSIZEGFIS_R { - RXOSIZEGFIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxosizegfis(&self) -> RxosizegfisR { + RxosizegfisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx64octgbfis(&self) -> RX64OCTGBFIS_R { - RX64OCTGBFIS_R::new(((self.bits >> 11) & 1) != 0) + pub fn rx64octgbfis(&self) -> Rx64octgbfisR { + Rx64octgbfisR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx65t127octgbfis(&self) -> RX65T127OCTGBFIS_R { - RX65T127OCTGBFIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn rx65t127octgbfis(&self) -> Rx65t127octgbfisR { + Rx65t127octgbfisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx128t255octgbfis(&self) -> RX128T255OCTGBFIS_R { - RX128T255OCTGBFIS_R::new(((self.bits >> 13) & 1) != 0) + pub fn rx128t255octgbfis(&self) -> Rx128t255octgbfisR { + Rx128t255octgbfisR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx256t511octgbfis(&self) -> RX256T511OCTGBFIS_R { - RX256T511OCTGBFIS_R::new(((self.bits >> 14) & 1) != 0) + pub fn rx256t511octgbfis(&self) -> Rx256t511octgbfisR { + Rx256t511octgbfisR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx512t1023octgbfis(&self) -> RX512T1023OCTGBFIS_R { - RX512T1023OCTGBFIS_R::new(((self.bits >> 15) & 1) != 0) + pub fn rx512t1023octgbfis(&self) -> Rx512t1023octgbfisR { + Rx512t1023octgbfisR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rx1024tmaxoctgbfis(&self) -> RX1024TMAXOCTGBFIS_R { - RX1024TMAXOCTGBFIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn rx1024tmaxoctgbfis(&self) -> Rx1024tmaxoctgbfisR { + Rx1024tmaxoctgbfisR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxucgfis(&self) -> RXUCGFIS_R { - RXUCGFIS_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxucgfis(&self) -> RxucgfisR { + RxucgfisR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxlenerfis(&self) -> RXLENERFIS_R { - RXLENERFIS_R::new(((self.bits >> 18) & 1) != 0) + pub fn rxlenerfis(&self) -> RxlenerfisR { + RxlenerfisR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxorangefis(&self) -> RXORANGEFIS_R { - RXORANGEFIS_R::new(((self.bits >> 19) & 1) != 0) + pub fn rxorangefis(&self) -> RxorangefisR { + RxorangefisR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxpausfis(&self) -> RXPAUSFIS_R { - RXPAUSFIS_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxpausfis(&self) -> RxpausfisR { + RxpausfisR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxfovfis(&self) -> RXFOVFIS_R { - RXFOVFIS_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxfovfis(&self) -> RxfovfisR { + RxfovfisR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxvlangbfis(&self) -> RXVLANGBFIS_R { - RXVLANGBFIS_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxvlangbfis(&self) -> RxvlangbfisR { + RxvlangbfisR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxwdogfis(&self) -> RXWDOGFIS_R { - RXWDOGFIS_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxwdogfis(&self) -> RxwdogfisR { + RxwdogfisR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxrcverrfis(&self) -> RXRCVERRFIS_R { - RXRCVERRFIS_R::new(((self.bits >> 24) & 1) != 0) + pub fn rxrcverrfis(&self) -> RxrcverrfisR { + RxrcverrfisR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Status"] #[inline(always)] - pub fn rxctrlfis(&self) -> RXCTRLFIS_R { - RXCTRLFIS_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxctrlfis(&self) -> RxctrlfisR { + RxctrlfisR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "MMC Receive Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_RECEIVE_INTERRUPT_SPEC; -impl crate::RegisterSpec for MMC_RECEIVE_INTERRUPT_SPEC { +pub struct MmcReceiveInterruptSpec; +impl crate::RegisterSpec for MmcReceiveInterruptSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_receive_interrupt::R`](R) reader structure"] -impl crate::Readable for MMC_RECEIVE_INTERRUPT_SPEC {} +impl crate::Readable for MmcReceiveInterruptSpec {} #[doc = "`reset()` method sets MMC_RECEIVE_INTERRUPT to value 0"] -impl crate::Resettable for MMC_RECEIVE_INTERRUPT_SPEC { +impl crate::Resettable for MmcReceiveInterruptSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_receive_interrupt_mask.rs b/src/eth0/mmc_receive_interrupt_mask.rs index 535b1c41..892574e1 100644 --- a/src/eth0/mmc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_receive_interrupt_mask.rs @@ -1,424 +1,415 @@ #[doc = "Register `MMC_RECEIVE_INTERRUPT_MASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMC_RECEIVE_INTERRUPT_MASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RXGBFRMIM` reader - MMC Receive Good Bad Frame Counter Interrupt Mask"] -pub type RXGBFRMIM_R = crate::BitReader; +pub type RxgbfrmimR = crate::BitReader; #[doc = "Field `RXGBFRMIM` writer - MMC Receive Good Bad Frame Counter Interrupt Mask"] -pub type RXGBFRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxgbfrmimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXGBOCTIM` reader - MMC Receive Good Bad Octet Counter Interrupt Mask"] -pub type RXGBOCTIM_R = crate::BitReader; +pub type RxgboctimR = crate::BitReader; #[doc = "Field `RXGBOCTIM` writer - MMC Receive Good Bad Octet Counter Interrupt Mask"] -pub type RXGBOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxgboctimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXGOCTIM` reader - MMC Receive Good Octet Counter Interrupt Mask"] -pub type RXGOCTIM_R = crate::BitReader; +pub type RxgoctimR = crate::BitReader; #[doc = "Field `RXGOCTIM` writer - MMC Receive Good Octet Counter Interrupt Mask"] -pub type RXGOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxgoctimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXBCGFIM` reader - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] -pub type RXBCGFIM_R = crate::BitReader; +pub type RxbcgfimR = crate::BitReader; #[doc = "Field `RXBCGFIM` writer - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] -pub type RXBCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxbcgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXMCGFIM` reader - MMC Receive Multicast Good Frame Counter Interrupt Mask"] -pub type RXMCGFIM_R = crate::BitReader; +pub type RxmcgfimR = crate::BitReader; #[doc = "Field `RXMCGFIM` writer - MMC Receive Multicast Good Frame Counter Interrupt Mask"] -pub type RXMCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxmcgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXCRCERFIM` reader - MMC Receive CRC Error Frame Counter Interrupt Mask"] -pub type RXCRCERFIM_R = crate::BitReader; +pub type RxcrcerfimR = crate::BitReader; #[doc = "Field `RXCRCERFIM` writer - MMC Receive CRC Error Frame Counter Interrupt Mask"] -pub type RXCRCERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxcrcerfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXALGNERFIM` reader - MMC Receive Alignment Error Frame Counter Interrupt Mask"] -pub type RXALGNERFIM_R = crate::BitReader; +pub type RxalgnerfimR = crate::BitReader; #[doc = "Field `RXALGNERFIM` writer - MMC Receive Alignment Error Frame Counter Interrupt Mask"] -pub type RXALGNERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxalgnerfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXRUNTFIM` reader - MMC Receive Runt Frame Counter Interrupt Mask"] -pub type RXRUNTFIM_R = crate::BitReader; +pub type RxruntfimR = crate::BitReader; #[doc = "Field `RXRUNTFIM` writer - MMC Receive Runt Frame Counter Interrupt Mask"] -pub type RXRUNTFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxruntfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXJABERFIM` reader - MMC Receive Jabber Error Frame Counter Interrupt Mask"] -pub type RXJABERFIM_R = crate::BitReader; +pub type RxjaberfimR = crate::BitReader; #[doc = "Field `RXJABERFIM` writer - MMC Receive Jabber Error Frame Counter Interrupt Mask"] -pub type RXJABERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxjaberfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUSIZEGFIM` reader - MMC Receive Undersize Good Frame Counter Interrupt Mask"] -pub type RXUSIZEGFIM_R = crate::BitReader; +pub type RxusizegfimR = crate::BitReader; #[doc = "Field `RXUSIZEGFIM` writer - MMC Receive Undersize Good Frame Counter Interrupt Mask"] -pub type RXUSIZEGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxusizegfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXOSIZEGFIM` reader - MMC Receive Oversize Good Frame Counter Interrupt Mask"] -pub type RXOSIZEGFIM_R = crate::BitReader; +pub type RxosizegfimR = crate::BitReader; #[doc = "Field `RXOSIZEGFIM` writer - MMC Receive Oversize Good Frame Counter Interrupt Mask"] -pub type RXOSIZEGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxosizegfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX64OCTGBFIM` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX64OCTGBFIM_R = crate::BitReader; +pub type Rx64octgbfimR = crate::BitReader; #[doc = "Field `RX64OCTGBFIM` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX64OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx64octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX65T127OCTGBFIM` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX65T127OCTGBFIM_R = crate::BitReader; +pub type Rx65t127octgbfimR = crate::BitReader; #[doc = "Field `RX65T127OCTGBFIM` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX65T127OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx65t127octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX128T255OCTGBFIM` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX128T255OCTGBFIM_R = crate::BitReader; +pub type Rx128t255octgbfimR = crate::BitReader; #[doc = "Field `RX128T255OCTGBFIM` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX128T255OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx128t255octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX256T511OCTGBFIM` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX256T511OCTGBFIM_R = crate::BitReader; +pub type Rx256t511octgbfimR = crate::BitReader; #[doc = "Field `RX256T511OCTGBFIM` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX256T511OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx256t511octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX512T1023OCTGBFIM` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX512T1023OCTGBFIM_R = crate::BitReader; +pub type Rx512t1023octgbfimR = crate::BitReader; #[doc = "Field `RX512T1023OCTGBFIM` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX512T1023OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx512t1023octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RX1024TMAXOCTGBFIM` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX1024TMAXOCTGBFIM_R = crate::BitReader; +pub type Rx1024tmaxoctgbfimR = crate::BitReader; #[doc = "Field `RX1024TMAXOCTGBFIM` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub type RX1024TMAXOCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Rx1024tmaxoctgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXUCGFIM` reader - MMC Receive Unicast Good Frame Counter Interrupt Mask"] -pub type RXUCGFIM_R = crate::BitReader; +pub type RxucgfimR = crate::BitReader; #[doc = "Field `RXUCGFIM` writer - MMC Receive Unicast Good Frame Counter Interrupt Mask"] -pub type RXUCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxucgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXLENERFIM` reader - MMC Receive Length Error Frame Counter Interrupt Mask"] -pub type RXLENERFIM_R = crate::BitReader; +pub type RxlenerfimR = crate::BitReader; #[doc = "Field `RXLENERFIM` writer - MMC Receive Length Error Frame Counter Interrupt Mask"] -pub type RXLENERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxlenerfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXORANGEFIM` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] -pub type RXORANGEFIM_R = crate::BitReader; +pub type RxorangefimR = crate::BitReader; #[doc = "Field `RXORANGEFIM` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] -pub type RXORANGEFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxorangefimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXPAUSFIM` reader - MMC Receive Pause Frame Counter Interrupt Mask"] -pub type RXPAUSFIM_R = crate::BitReader; +pub type RxpausfimR = crate::BitReader; #[doc = "Field `RXPAUSFIM` writer - MMC Receive Pause Frame Counter Interrupt Mask"] -pub type RXPAUSFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxpausfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXFOVFIM` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] -pub type RXFOVFIM_R = crate::BitReader; +pub type RxfovfimR = crate::BitReader; #[doc = "Field `RXFOVFIM` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] -pub type RXFOVFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxfovfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXVLANGBFIM` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] -pub type RXVLANGBFIM_R = crate::BitReader; +pub type RxvlangbfimR = crate::BitReader; #[doc = "Field `RXVLANGBFIM` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] -pub type RXVLANGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxvlangbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXWDOGFIM` reader - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] -pub type RXWDOGFIM_R = crate::BitReader; +pub type RxwdogfimR = crate::BitReader; #[doc = "Field `RXWDOGFIM` writer - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] -pub type RXWDOGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxwdogfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXRCVERRFIM` reader - MMC Receive Error Frame Counter Interrupt Mask"] -pub type RXRCVERRFIM_R = crate::BitReader; +pub type RxrcverrfimR = crate::BitReader; #[doc = "Field `RXRCVERRFIM` writer - MMC Receive Error Frame Counter Interrupt Mask"] -pub type RXRCVERRFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxrcverrfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RXCTRLFIM` reader - MMC Receive Control Frame Counter Interrupt Mask"] -pub type RXCTRLFIM_R = crate::BitReader; +pub type RxctrlfimR = crate::BitReader; #[doc = "Field `RXCTRLFIM` writer - MMC Receive Control Frame Counter Interrupt Mask"] -pub type RXCTRLFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxctrlfimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxgbfrmim(&self) -> RXGBFRMIM_R { - RXGBFRMIM_R::new((self.bits & 1) != 0) + pub fn rxgbfrmim(&self) -> RxgbfrmimR { + RxgbfrmimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxgboctim(&self) -> RXGBOCTIM_R { - RXGBOCTIM_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxgboctim(&self) -> RxgboctimR { + RxgboctimR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn rxgoctim(&self) -> RXGOCTIM_R { - RXGOCTIM_R::new(((self.bits >> 2) & 1) != 0) + pub fn rxgoctim(&self) -> RxgoctimR { + RxgoctimR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxbcgfim(&self) -> RXBCGFIM_R { - RXBCGFIM_R::new(((self.bits >> 3) & 1) != 0) + pub fn rxbcgfim(&self) -> RxbcgfimR { + RxbcgfimR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxmcgfim(&self) -> RXMCGFIM_R { - RXMCGFIM_R::new(((self.bits >> 4) & 1) != 0) + pub fn rxmcgfim(&self) -> RxmcgfimR { + RxmcgfimR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxcrcerfim(&self) -> RXCRCERFIM_R { - RXCRCERFIM_R::new(((self.bits >> 5) & 1) != 0) + pub fn rxcrcerfim(&self) -> RxcrcerfimR { + RxcrcerfimR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxalgnerfim(&self) -> RXALGNERFIM_R { - RXALGNERFIM_R::new(((self.bits >> 6) & 1) != 0) + pub fn rxalgnerfim(&self) -> RxalgnerfimR { + RxalgnerfimR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxruntfim(&self) -> RXRUNTFIM_R { - RXRUNTFIM_R::new(((self.bits >> 7) & 1) != 0) + pub fn rxruntfim(&self) -> RxruntfimR { + RxruntfimR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxjaberfim(&self) -> RXJABERFIM_R { - RXJABERFIM_R::new(((self.bits >> 8) & 1) != 0) + pub fn rxjaberfim(&self) -> RxjaberfimR { + RxjaberfimR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxusizegfim(&self) -> RXUSIZEGFIM_R { - RXUSIZEGFIM_R::new(((self.bits >> 9) & 1) != 0) + pub fn rxusizegfim(&self) -> RxusizegfimR { + RxusizegfimR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxosizegfim(&self) -> RXOSIZEGFIM_R { - RXOSIZEGFIM_R::new(((self.bits >> 10) & 1) != 0) + pub fn rxosizegfim(&self) -> RxosizegfimR { + RxosizegfimR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx64octgbfim(&self) -> RX64OCTGBFIM_R { - RX64OCTGBFIM_R::new(((self.bits >> 11) & 1) != 0) + pub fn rx64octgbfim(&self) -> Rx64octgbfimR { + Rx64octgbfimR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx65t127octgbfim(&self) -> RX65T127OCTGBFIM_R { - RX65T127OCTGBFIM_R::new(((self.bits >> 12) & 1) != 0) + pub fn rx65t127octgbfim(&self) -> Rx65t127octgbfimR { + Rx65t127octgbfimR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx128t255octgbfim(&self) -> RX128T255OCTGBFIM_R { - RX128T255OCTGBFIM_R::new(((self.bits >> 13) & 1) != 0) + pub fn rx128t255octgbfim(&self) -> Rx128t255octgbfimR { + Rx128t255octgbfimR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx256t511octgbfim(&self) -> RX256T511OCTGBFIM_R { - RX256T511OCTGBFIM_R::new(((self.bits >> 14) & 1) != 0) + pub fn rx256t511octgbfim(&self) -> Rx256t511octgbfimR { + Rx256t511octgbfimR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx512t1023octgbfim(&self) -> RX512T1023OCTGBFIM_R { - RX512T1023OCTGBFIM_R::new(((self.bits >> 15) & 1) != 0) + pub fn rx512t1023octgbfim(&self) -> Rx512t1023octgbfimR { + Rx512t1023octgbfimR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rx1024tmaxoctgbfim(&self) -> RX1024TMAXOCTGBFIM_R { - RX1024TMAXOCTGBFIM_R::new(((self.bits >> 16) & 1) != 0) + pub fn rx1024tmaxoctgbfim(&self) -> Rx1024tmaxoctgbfimR { + Rx1024tmaxoctgbfimR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxucgfim(&self) -> RXUCGFIM_R { - RXUCGFIM_R::new(((self.bits >> 17) & 1) != 0) + pub fn rxucgfim(&self) -> RxucgfimR { + RxucgfimR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxlenerfim(&self) -> RXLENERFIM_R { - RXLENERFIM_R::new(((self.bits >> 18) & 1) != 0) + pub fn rxlenerfim(&self) -> RxlenerfimR { + RxlenerfimR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxorangefim(&self) -> RXORANGEFIM_R { - RXORANGEFIM_R::new(((self.bits >> 19) & 1) != 0) + pub fn rxorangefim(&self) -> RxorangefimR { + RxorangefimR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxpausfim(&self) -> RXPAUSFIM_R { - RXPAUSFIM_R::new(((self.bits >> 20) & 1) != 0) + pub fn rxpausfim(&self) -> RxpausfimR { + RxpausfimR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxfovfim(&self) -> RXFOVFIM_R { - RXFOVFIM_R::new(((self.bits >> 21) & 1) != 0) + pub fn rxfovfim(&self) -> RxfovfimR { + RxfovfimR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxvlangbfim(&self) -> RXVLANGBFIM_R { - RXVLANGBFIM_R::new(((self.bits >> 22) & 1) != 0) + pub fn rxvlangbfim(&self) -> RxvlangbfimR { + RxvlangbfimR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxwdogfim(&self) -> RXWDOGFIM_R { - RXWDOGFIM_R::new(((self.bits >> 23) & 1) != 0) + pub fn rxwdogfim(&self) -> RxwdogfimR { + RxwdogfimR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxrcverrfim(&self) -> RXRCVERRFIM_R { - RXRCVERRFIM_R::new(((self.bits >> 24) & 1) != 0) + pub fn rxrcverrfim(&self) -> RxrcverrfimR { + RxrcverrfimR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] #[inline(always)] - pub fn rxctrlfim(&self) -> RXCTRLFIM_R { - RXCTRLFIM_R::new(((self.bits >> 25) & 1) != 0) + pub fn rxctrlfim(&self) -> RxctrlfimR { + RxctrlfimR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxgbfrmim(&mut self) -> RXGBFRMIM_W { - RXGBFRMIM_W::new(self, 0) + pub fn rxgbfrmim(&mut self) -> RxgbfrmimW { + RxgbfrmimW::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxgboctim(&mut self) -> RXGBOCTIM_W { - RXGBOCTIM_W::new(self, 1) + pub fn rxgboctim(&mut self) -> RxgboctimW { + RxgboctimW::new(self, 1) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxgoctim(&mut self) -> RXGOCTIM_W { - RXGOCTIM_W::new(self, 2) + pub fn rxgoctim(&mut self) -> RxgoctimW { + RxgoctimW::new(self, 2) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxbcgfim(&mut self) -> RXBCGFIM_W { - RXBCGFIM_W::new(self, 3) + pub fn rxbcgfim(&mut self) -> RxbcgfimW { + RxbcgfimW::new(self, 3) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxmcgfim(&mut self) -> RXMCGFIM_W { - RXMCGFIM_W::new(self, 4) + pub fn rxmcgfim(&mut self) -> RxmcgfimW { + RxmcgfimW::new(self, 4) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxcrcerfim(&mut self) -> RXCRCERFIM_W { - RXCRCERFIM_W::new(self, 5) + pub fn rxcrcerfim(&mut self) -> RxcrcerfimW { + RxcrcerfimW::new(self, 5) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxalgnerfim(&mut self) -> RXALGNERFIM_W { - RXALGNERFIM_W::new(self, 6) + pub fn rxalgnerfim(&mut self) -> RxalgnerfimW { + RxalgnerfimW::new(self, 6) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxruntfim(&mut self) -> RXRUNTFIM_W { - RXRUNTFIM_W::new(self, 7) + pub fn rxruntfim(&mut self) -> RxruntfimW { + RxruntfimW::new(self, 7) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxjaberfim(&mut self) -> RXJABERFIM_W { - RXJABERFIM_W::new(self, 8) + pub fn rxjaberfim(&mut self) -> RxjaberfimW { + RxjaberfimW::new(self, 8) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxusizegfim(&mut self) -> RXUSIZEGFIM_W { - RXUSIZEGFIM_W::new(self, 9) + pub fn rxusizegfim(&mut self) -> RxusizegfimW { + RxusizegfimW::new(self, 9) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxosizegfim(&mut self) -> RXOSIZEGFIM_W { - RXOSIZEGFIM_W::new(self, 10) + pub fn rxosizegfim(&mut self) -> RxosizegfimW { + RxosizegfimW::new(self, 10) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx64octgbfim(&mut self) -> RX64OCTGBFIM_W { - RX64OCTGBFIM_W::new(self, 11) + pub fn rx64octgbfim(&mut self) -> Rx64octgbfimW { + Rx64octgbfimW::new(self, 11) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx65t127octgbfim(&mut self) -> RX65T127OCTGBFIM_W { - RX65T127OCTGBFIM_W::new(self, 12) + pub fn rx65t127octgbfim(&mut self) -> Rx65t127octgbfimW { + Rx65t127octgbfimW::new(self, 12) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx128t255octgbfim(&mut self) -> RX128T255OCTGBFIM_W { - RX128T255OCTGBFIM_W::new(self, 13) + pub fn rx128t255octgbfim(&mut self) -> Rx128t255octgbfimW { + Rx128t255octgbfimW::new(self, 13) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx256t511octgbfim(&mut self) -> RX256T511OCTGBFIM_W { - RX256T511OCTGBFIM_W::new(self, 14) + pub fn rx256t511octgbfim(&mut self) -> Rx256t511octgbfimW { + Rx256t511octgbfimW::new(self, 14) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx512t1023octgbfim(&mut self) -> RX512T1023OCTGBFIM_W { - RX512T1023OCTGBFIM_W::new(self, 15) + pub fn rx512t1023octgbfim(&mut self) -> Rx512t1023octgbfimW { + Rx512t1023octgbfimW::new(self, 15) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rx1024tmaxoctgbfim(&mut self) -> RX1024TMAXOCTGBFIM_W { - RX1024TMAXOCTGBFIM_W::new(self, 16) + pub fn rx1024tmaxoctgbfim(&mut self) -> Rx1024tmaxoctgbfimW { + Rx1024tmaxoctgbfimW::new(self, 16) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxucgfim(&mut self) -> RXUCGFIM_W { - RXUCGFIM_W::new(self, 17) + pub fn rxucgfim(&mut self) -> RxucgfimW { + RxucgfimW::new(self, 17) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxlenerfim(&mut self) -> RXLENERFIM_W { - RXLENERFIM_W::new(self, 18) + pub fn rxlenerfim(&mut self) -> RxlenerfimW { + RxlenerfimW::new(self, 18) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxorangefim(&mut self) -> RXORANGEFIM_W { - RXORANGEFIM_W::new(self, 19) + pub fn rxorangefim(&mut self) -> RxorangefimW { + RxorangefimW::new(self, 19) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxpausfim(&mut self) -> RXPAUSFIM_W { - RXPAUSFIM_W::new(self, 20) + pub fn rxpausfim(&mut self) -> RxpausfimW { + RxpausfimW::new(self, 20) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxfovfim(&mut self) -> RXFOVFIM_W { - RXFOVFIM_W::new(self, 21) + pub fn rxfovfim(&mut self) -> RxfovfimW { + RxfovfimW::new(self, 21) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxvlangbfim(&mut self) -> RXVLANGBFIM_W { - RXVLANGBFIM_W::new(self, 22) + pub fn rxvlangbfim(&mut self) -> RxvlangbfimW { + RxvlangbfimW::new(self, 22) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxwdogfim(&mut self) -> RXWDOGFIM_W { - RXWDOGFIM_W::new(self, 23) + pub fn rxwdogfim(&mut self) -> RxwdogfimW { + RxwdogfimW::new(self, 23) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxrcverrfim(&mut self) -> RXRCVERRFIM_W { - RXRCVERRFIM_W::new(self, 24) + pub fn rxrcverrfim(&mut self) -> RxrcverrfimW { + RxrcverrfimW::new(self, 24) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn rxctrlfim(&mut self) -> RXCTRLFIM_W { - RXCTRLFIM_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rxctrlfim(&mut self) -> RxctrlfimW { + RxctrlfimW::new(self, 25) } } #[doc = "MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_RECEIVE_INTERRUPT_MASK_SPEC; -impl crate::RegisterSpec for MMC_RECEIVE_INTERRUPT_MASK_SPEC { +pub struct MmcReceiveInterruptMaskSpec; +impl crate::RegisterSpec for MmcReceiveInterruptMaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_receive_interrupt_mask::R`](R) reader structure"] -impl crate::Readable for MMC_RECEIVE_INTERRUPT_MASK_SPEC {} +impl crate::Readable for MmcReceiveInterruptMaskSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_receive_interrupt_mask::W`](W) writer structure"] -impl crate::Writable for MMC_RECEIVE_INTERRUPT_MASK_SPEC { +impl crate::Writable for MmcReceiveInterruptMaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_RECEIVE_INTERRUPT_MASK to value 0"] -impl crate::Resettable for MMC_RECEIVE_INTERRUPT_MASK_SPEC { +impl crate::Resettable for MmcReceiveInterruptMaskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_transmit_interrupt.rs b/src/eth0/mmc_transmit_interrupt.rs index c1695943..6c26e5a4 100644 --- a/src/eth0/mmc_transmit_interrupt.rs +++ b/src/eth0/mmc_transmit_interrupt.rs @@ -1,197 +1,197 @@ #[doc = "Register `MMC_TRANSMIT_INTERRUPT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXGBOCTIS` reader - MMC Transmit Good Bad Octet Counter Interrupt Status"] -pub type TXGBOCTIS_R = crate::BitReader; +pub type TxgboctisR = crate::BitReader; #[doc = "Field `TXGBFRMIS` reader - MMC Transmit Good Bad Frame Counter Interrupt Status"] -pub type TXGBFRMIS_R = crate::BitReader; +pub type TxgbfrmisR = crate::BitReader; #[doc = "Field `TXBCGFIS` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] -pub type TXBCGFIS_R = crate::BitReader; +pub type TxbcgfisR = crate::BitReader; #[doc = "Field `TXMCGFIS` reader - MMC Transmit Multicast Good Frame Counter Interrupt Status"] -pub type TXMCGFIS_R = crate::BitReader; +pub type TxmcgfisR = crate::BitReader; #[doc = "Field `TX64OCTGBFIS` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status."] -pub type TX64OCTGBFIS_R = crate::BitReader; +pub type Tx64octgbfisR = crate::BitReader; #[doc = "Field `TX65T127OCTGBFIS` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] -pub type TX65T127OCTGBFIS_R = crate::BitReader; +pub type Tx65t127octgbfisR = crate::BitReader; #[doc = "Field `TX128T255OCTGBFIS` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] -pub type TX128T255OCTGBFIS_R = crate::BitReader; +pub type Tx128t255octgbfisR = crate::BitReader; #[doc = "Field `TX256T511OCTGBFIS` reader - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] -pub type TX256T511OCTGBFIS_R = crate::BitReader; +pub type Tx256t511octgbfisR = crate::BitReader; #[doc = "Field `TX512T1023OCTGBFIS` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] -pub type TX512T1023OCTGBFIS_R = crate::BitReader; +pub type Tx512t1023octgbfisR = crate::BitReader; #[doc = "Field `TX1024TMAXOCTGBFIS` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status"] -pub type TX1024TMAXOCTGBFIS_R = crate::BitReader; +pub type Tx1024tmaxoctgbfisR = crate::BitReader; #[doc = "Field `TXUCGBFIS` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] -pub type TXUCGBFIS_R = crate::BitReader; +pub type TxucgbfisR = crate::BitReader; #[doc = "Field `TXMCGBFIS` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] -pub type TXMCGBFIS_R = crate::BitReader; +pub type TxmcgbfisR = crate::BitReader; #[doc = "Field `TXBCGBFIS` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] -pub type TXBCGBFIS_R = crate::BitReader; +pub type TxbcgbfisR = crate::BitReader; #[doc = "Field `TXUFLOWERFIS` reader - MMC Transmit Underflow Error Frame Counter Interrupt Status"] -pub type TXUFLOWERFIS_R = crate::BitReader; +pub type TxuflowerfisR = crate::BitReader; #[doc = "Field `TXSCOLGFIS` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] -pub type TXSCOLGFIS_R = crate::BitReader; +pub type TxscolgfisR = crate::BitReader; #[doc = "Field `TXMCOLGFIS` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] -pub type TXMCOLGFIS_R = crate::BitReader; +pub type TxmcolgfisR = crate::BitReader; #[doc = "Field `TXDEFFIS` reader - MMC Transmit Deferred Frame Counter Interrupt Status"] -pub type TXDEFFIS_R = crate::BitReader; +pub type TxdeffisR = crate::BitReader; #[doc = "Field `TXLATCOLFIS` reader - MMC Transmit Late Collision Frame Counter Interrupt Status"] -pub type TXLATCOLFIS_R = crate::BitReader; +pub type TxlatcolfisR = crate::BitReader; #[doc = "Field `TXEXCOLFIS` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] -pub type TXEXCOLFIS_R = crate::BitReader; +pub type TxexcolfisR = crate::BitReader; #[doc = "Field `TXCARERFIS` reader - MMC Transmit Carrier Error Frame Counter Interrupt Status"] -pub type TXCARERFIS_R = crate::BitReader; +pub type TxcarerfisR = crate::BitReader; #[doc = "Field `TXGOCTIS` reader - MMC Transmit Good Octet Counter Interrupt Status"] -pub type TXGOCTIS_R = crate::BitReader; +pub type TxgoctisR = crate::BitReader; #[doc = "Field `TXGFRMIS` reader - MMC Transmit Good Frame Counter Interrupt Status"] -pub type TXGFRMIS_R = crate::BitReader; +pub type TxgfrmisR = crate::BitReader; #[doc = "Field `TXEXDEFFIS` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] -pub type TXEXDEFFIS_R = crate::BitReader; +pub type TxexdeffisR = crate::BitReader; #[doc = "Field `TXPAUSFIS` reader - MMC Transmit Pause Frame Counter Interrupt Status"] -pub type TXPAUSFIS_R = crate::BitReader; +pub type TxpausfisR = crate::BitReader; #[doc = "Field `TXVLANGFIS` reader - MMC Transmit VLAN Good Frame Counter Interrupt Status"] -pub type TXVLANGFIS_R = crate::BitReader; +pub type TxvlangfisR = crate::BitReader; #[doc = "Field `TXOSIZEGFIS` reader - MMC Transmit Oversize Good Frame Counter Interrupt Status"] -pub type TXOSIZEGFIS_R = crate::BitReader; +pub type TxosizegfisR = crate::BitReader; impl R { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Status"] #[inline(always)] - pub fn txgboctis(&self) -> TXGBOCTIS_R { - TXGBOCTIS_R::new((self.bits & 1) != 0) + pub fn txgboctis(&self) -> TxgboctisR { + TxgboctisR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgbfrmis(&self) -> TXGBFRMIS_R { - TXGBFRMIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn txgbfrmis(&self) -> TxgbfrmisR { + TxgbfrmisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txbcgfis(&self) -> TXBCGFIS_R { - TXBCGFIS_R::new(((self.bits >> 2) & 1) != 0) + pub fn txbcgfis(&self) -> TxbcgfisR { + TxbcgfisR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcgfis(&self) -> TXMCGFIS_R { - TXMCGFIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn txmcgfis(&self) -> TxmcgfisR { + TxmcgfisR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status."] #[inline(always)] - pub fn tx64octgbfis(&self) -> TX64OCTGBFIS_R { - TX64OCTGBFIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn tx64octgbfis(&self) -> Tx64octgbfisR { + Tx64octgbfisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx65t127octgbfis(&self) -> TX65T127OCTGBFIS_R { - TX65T127OCTGBFIS_R::new(((self.bits >> 5) & 1) != 0) + pub fn tx65t127octgbfis(&self) -> Tx65t127octgbfisR { + Tx65t127octgbfisR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx128t255octgbfis(&self) -> TX128T255OCTGBFIS_R { - TX128T255OCTGBFIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn tx128t255octgbfis(&self) -> Tx128t255octgbfisR { + Tx128t255octgbfisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx256t511octgbfis(&self) -> TX256T511OCTGBFIS_R { - TX256T511OCTGBFIS_R::new(((self.bits >> 7) & 1) != 0) + pub fn tx256t511octgbfis(&self) -> Tx256t511octgbfisR { + Tx256t511octgbfisR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx512t1023octgbfis(&self) -> TX512T1023OCTGBFIS_R { - TX512T1023OCTGBFIS_R::new(((self.bits >> 8) & 1) != 0) + pub fn tx512t1023octgbfis(&self) -> Tx512t1023octgbfisR { + Tx512t1023octgbfisR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn tx1024tmaxoctgbfis(&self) -> TX1024TMAXOCTGBFIS_R { - TX1024TMAXOCTGBFIS_R::new(((self.bits >> 9) & 1) != 0) + pub fn tx1024tmaxoctgbfis(&self) -> Tx1024tmaxoctgbfisR { + Tx1024tmaxoctgbfisR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txucgbfis(&self) -> TXUCGBFIS_R { - TXUCGBFIS_R::new(((self.bits >> 10) & 1) != 0) + pub fn txucgbfis(&self) -> TxucgbfisR { + TxucgbfisR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcgbfis(&self) -> TXMCGBFIS_R { - TXMCGBFIS_R::new(((self.bits >> 11) & 1) != 0) + pub fn txmcgbfis(&self) -> TxmcgbfisR { + TxmcgbfisR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status"] #[inline(always)] - pub fn txbcgbfis(&self) -> TXBCGBFIS_R { - TXBCGBFIS_R::new(((self.bits >> 12) & 1) != 0) + pub fn txbcgbfis(&self) -> TxbcgbfisR { + TxbcgbfisR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn txuflowerfis(&self) -> TXUFLOWERFIS_R { - TXUFLOWERFIS_R::new(((self.bits >> 13) & 1) != 0) + pub fn txuflowerfis(&self) -> TxuflowerfisR { + TxuflowerfisR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txscolgfis(&self) -> TXSCOLGFIS_R { - TXSCOLGFIS_R::new(((self.bits >> 14) & 1) != 0) + pub fn txscolgfis(&self) -> TxscolgfisR { + TxscolgfisR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txmcolgfis(&self) -> TXMCOLGFIS_R { - TXMCOLGFIS_R::new(((self.bits >> 15) & 1) != 0) + pub fn txmcolgfis(&self) -> TxmcolgfisR { + TxmcolgfisR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Status"] #[inline(always)] - pub fn txdeffis(&self) -> TXDEFFIS_R { - TXDEFFIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn txdeffis(&self) -> TxdeffisR { + TxdeffisR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Status"] #[inline(always)] - pub fn txlatcolfis(&self) -> TXLATCOLFIS_R { - TXLATCOLFIS_R::new(((self.bits >> 17) & 1) != 0) + pub fn txlatcolfis(&self) -> TxlatcolfisR { + TxlatcolfisR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Status"] #[inline(always)] - pub fn txexcolfis(&self) -> TXEXCOLFIS_R { - TXEXCOLFIS_R::new(((self.bits >> 18) & 1) != 0) + pub fn txexcolfis(&self) -> TxexcolfisR { + TxexcolfisR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Status"] #[inline(always)] - pub fn txcarerfis(&self) -> TXCARERFIS_R { - TXCARERFIS_R::new(((self.bits >> 19) & 1) != 0) + pub fn txcarerfis(&self) -> TxcarerfisR { + TxcarerfisR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Status"] #[inline(always)] - pub fn txgoctis(&self) -> TXGOCTIS_R { - TXGOCTIS_R::new(((self.bits >> 20) & 1) != 0) + pub fn txgoctis(&self) -> TxgoctisR { + TxgoctisR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txgfrmis(&self) -> TXGFRMIS_R { - TXGFRMIS_R::new(((self.bits >> 21) & 1) != 0) + pub fn txgfrmis(&self) -> TxgfrmisR { + TxgfrmisR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Status"] #[inline(always)] - pub fn txexdeffis(&self) -> TXEXDEFFIS_R { - TXEXDEFFIS_R::new(((self.bits >> 22) & 1) != 0) + pub fn txexdeffis(&self) -> TxexdeffisR { + TxexdeffisR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Status"] #[inline(always)] - pub fn txpausfis(&self) -> TXPAUSFIS_R { - TXPAUSFIS_R::new(((self.bits >> 23) & 1) != 0) + pub fn txpausfis(&self) -> TxpausfisR { + TxpausfisR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txvlangfis(&self) -> TXVLANGFIS_R { - TXVLANGFIS_R::new(((self.bits >> 24) & 1) != 0) + pub fn txvlangfis(&self) -> TxvlangfisR { + TxvlangfisR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Status"] #[inline(always)] - pub fn txosizegfis(&self) -> TXOSIZEGFIS_R { - TXOSIZEGFIS_R::new(((self.bits >> 25) & 1) != 0) + pub fn txosizegfis(&self) -> TxosizegfisR { + TxosizegfisR::new(((self.bits >> 25) & 1) != 0) } } #[doc = "MMC Transmit Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_TRANSMIT_INTERRUPT_SPEC; -impl crate::RegisterSpec for MMC_TRANSMIT_INTERRUPT_SPEC { +pub struct MmcTransmitInterruptSpec; +impl crate::RegisterSpec for MmcTransmitInterruptSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_transmit_interrupt::R`](R) reader structure"] -impl crate::Readable for MMC_TRANSMIT_INTERRUPT_SPEC {} +impl crate::Readable for MmcTransmitInterruptSpec {} #[doc = "`reset()` method sets MMC_TRANSMIT_INTERRUPT to value 0"] -impl crate::Resettable for MMC_TRANSMIT_INTERRUPT_SPEC { +impl crate::Resettable for MmcTransmitInterruptSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/mmc_transmit_interrupt_mask.rs b/src/eth0/mmc_transmit_interrupt_mask.rs index 91067220..35a0b313 100644 --- a/src/eth0/mmc_transmit_interrupt_mask.rs +++ b/src/eth0/mmc_transmit_interrupt_mask.rs @@ -1,424 +1,415 @@ #[doc = "Register `MMC_TRANSMIT_INTERRUPT_MASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMC_TRANSMIT_INTERRUPT_MASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TXGBOCTIM` reader - MMC Transmit Good Bad Octet Counter Interrupt Mask"] -pub type TXGBOCTIM_R = crate::BitReader; +pub type TxgboctimR = crate::BitReader; #[doc = "Field `TXGBOCTIM` writer - MMC Transmit Good Bad Octet Counter Interrupt Mask"] -pub type TXGBOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxgboctimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXGBFRMIM` reader - MMC Transmit Good Bad Frame Counter Interrupt Mask"] -pub type TXGBFRMIM_R = crate::BitReader; +pub type TxgbfrmimR = crate::BitReader; #[doc = "Field `TXGBFRMIM` writer - MMC Transmit Good Bad Frame Counter Interrupt Mask"] -pub type TXGBFRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxgbfrmimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBCGFIM` reader - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] -pub type TXBCGFIM_R = crate::BitReader; +pub type TxbcgfimR = crate::BitReader; #[doc = "Field `TXBCGFIM` writer - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] -pub type TXBCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxbcgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXMCGFIM` reader - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] -pub type TXMCGFIM_R = crate::BitReader; +pub type TxmcgfimR = crate::BitReader; #[doc = "Field `TXMCGFIM` writer - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] -pub type TXMCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxmcgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX64OCTGBFIM` reader - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX64OCTGBFIM_R = crate::BitReader; +pub type Tx64octgbfimR = crate::BitReader; #[doc = "Field `TX64OCTGBFIM` writer - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX64OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx64octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX65T127OCTGBFIM` reader - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX65T127OCTGBFIM_R = crate::BitReader; +pub type Tx65t127octgbfimR = crate::BitReader; #[doc = "Field `TX65T127OCTGBFIM` writer - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX65T127OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx65t127octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX128T255OCTGBFIM` reader - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX128T255OCTGBFIM_R = crate::BitReader; +pub type Tx128t255octgbfimR = crate::BitReader; #[doc = "Field `TX128T255OCTGBFIM` writer - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX128T255OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx128t255octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX256T511OCTGBFIM` reader - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX256T511OCTGBFIM_R = crate::BitReader; +pub type Tx256t511octgbfimR = crate::BitReader; #[doc = "Field `TX256T511OCTGBFIM` writer - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX256T511OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx256t511octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX512T1023OCTGBFIM` reader - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX512T1023OCTGBFIM_R = crate::BitReader; +pub type Tx512t1023octgbfimR = crate::BitReader; #[doc = "Field `TX512T1023OCTGBFIM` writer - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX512T1023OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx512t1023octgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TX1024TMAXOCTGBFIM` reader - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX1024TMAXOCTGBFIM_R = crate::BitReader; +pub type Tx1024tmaxoctgbfimR = crate::BitReader; #[doc = "Field `TX1024TMAXOCTGBFIM` writer - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] -pub type TX1024TMAXOCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tx1024tmaxoctgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUCGBFIM` reader - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] -pub type TXUCGBFIM_R = crate::BitReader; +pub type TxucgbfimR = crate::BitReader; #[doc = "Field `TXUCGBFIM` writer - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] -pub type TXUCGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxucgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXMCGBFIM` reader - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] -pub type TXMCGBFIM_R = crate::BitReader; +pub type TxmcgbfimR = crate::BitReader; #[doc = "Field `TXMCGBFIM` writer - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] -pub type TXMCGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxmcgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXBCGBFIM` reader - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] -pub type TXBCGBFIM_R = crate::BitReader; +pub type TxbcgbfimR = crate::BitReader; #[doc = "Field `TXBCGBFIM` writer - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] -pub type TXBCGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxbcgbfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXUFLOWERFIM` reader - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] -pub type TXUFLOWERFIM_R = crate::BitReader; +pub type TxuflowerfimR = crate::BitReader; #[doc = "Field `TXUFLOWERFIM` writer - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] -pub type TXUFLOWERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxuflowerfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXSCOLGFIM` reader - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] -pub type TXSCOLGFIM_R = crate::BitReader; +pub type TxscolgfimR = crate::BitReader; #[doc = "Field `TXSCOLGFIM` writer - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] -pub type TXSCOLGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxscolgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXMCOLGFIM` reader - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] -pub type TXMCOLGFIM_R = crate::BitReader; +pub type TxmcolgfimR = crate::BitReader; #[doc = "Field `TXMCOLGFIM` writer - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] -pub type TXMCOLGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxmcolgfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXDEFFIM` reader - MMC Transmit Deferred Frame Counter Interrupt Mask"] -pub type TXDEFFIM_R = crate::BitReader; +pub type TxdeffimR = crate::BitReader; #[doc = "Field `TXDEFFIM` writer - MMC Transmit Deferred Frame Counter Interrupt Mask"] -pub type TXDEFFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxdeffimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXLATCOLFIM` reader - MMC Transmit Late Collision Frame Counter Interrupt Mask"] -pub type TXLATCOLFIM_R = crate::BitReader; +pub type TxlatcolfimR = crate::BitReader; #[doc = "Field `TXLATCOLFIM` writer - MMC Transmit Late Collision Frame Counter Interrupt Mask"] -pub type TXLATCOLFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxlatcolfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEXCOLFIM` reader - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] -pub type TXEXCOLFIM_R = crate::BitReader; +pub type TxexcolfimR = crate::BitReader; #[doc = "Field `TXEXCOLFIM` writer - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] -pub type TXEXCOLFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxexcolfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXCARERFIM` reader - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] -pub type TXCARERFIM_R = crate::BitReader; +pub type TxcarerfimR = crate::BitReader; #[doc = "Field `TXCARERFIM` writer - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] -pub type TXCARERFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxcarerfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXGOCTIM` reader - MMC Transmit Good Octet Counter Interrupt Mask"] -pub type TXGOCTIM_R = crate::BitReader; +pub type TxgoctimR = crate::BitReader; #[doc = "Field `TXGOCTIM` writer - MMC Transmit Good Octet Counter Interrupt Mask"] -pub type TXGOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxgoctimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXGFRMIM` reader - MMC Transmit Good Frame Counter Interrupt Mask"] -pub type TXGFRMIM_R = crate::BitReader; +pub type TxgfrmimR = crate::BitReader; #[doc = "Field `TXGFRMIM` writer - MMC Transmit Good Frame Counter Interrupt Mask"] -pub type TXGFRMIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxgfrmimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXEXDEFFIM` reader - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] -pub type TXEXDEFFIM_R = crate::BitReader; +pub type TxexdeffimR = crate::BitReader; #[doc = "Field `TXEXDEFFIM` writer - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] -pub type TXEXDEFFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxexdeffimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXPAUSFIM` reader - MMC Transmit Pause Frame Counter Interrupt Mask"] -pub type TXPAUSFIM_R = crate::BitReader; +pub type TxpausfimR = crate::BitReader; #[doc = "Field `TXPAUSFIM` writer - MMC Transmit Pause Frame Counter Interrupt Mask"] -pub type TXPAUSFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxpausfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXVLANGFIM` reader - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] -pub type TXVLANGFIM_R = crate::BitReader; +pub type TxvlangfimR = crate::BitReader; #[doc = "Field `TXVLANGFIM` writer - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] -pub type TXVLANGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxvlangfimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TXOSIZEGFIM` reader - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] -pub type TXOSIZEGFIM_R = crate::BitReader; +pub type TxosizegfimR = crate::BitReader; #[doc = "Field `TXOSIZEGFIM` writer - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] -pub type TXOSIZEGFIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxosizegfimW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txgboctim(&self) -> TXGBOCTIM_R { - TXGBOCTIM_R::new((self.bits & 1) != 0) + pub fn txgboctim(&self) -> TxgboctimR { + TxgboctimR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgbfrmim(&self) -> TXGBFRMIM_R { - TXGBFRMIM_R::new(((self.bits >> 1) & 1) != 0) + pub fn txgbfrmim(&self) -> TxgbfrmimR { + TxgbfrmimR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txbcgfim(&self) -> TXBCGFIM_R { - TXBCGFIM_R::new(((self.bits >> 2) & 1) != 0) + pub fn txbcgfim(&self) -> TxbcgfimR { + TxbcgfimR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcgfim(&self) -> TXMCGFIM_R { - TXMCGFIM_R::new(((self.bits >> 3) & 1) != 0) + pub fn txmcgfim(&self) -> TxmcgfimR { + TxmcgfimR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx64octgbfim(&self) -> TX64OCTGBFIM_R { - TX64OCTGBFIM_R::new(((self.bits >> 4) & 1) != 0) + pub fn tx64octgbfim(&self) -> Tx64octgbfimR { + Tx64octgbfimR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx65t127octgbfim(&self) -> TX65T127OCTGBFIM_R { - TX65T127OCTGBFIM_R::new(((self.bits >> 5) & 1) != 0) + pub fn tx65t127octgbfim(&self) -> Tx65t127octgbfimR { + Tx65t127octgbfimR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx128t255octgbfim(&self) -> TX128T255OCTGBFIM_R { - TX128T255OCTGBFIM_R::new(((self.bits >> 6) & 1) != 0) + pub fn tx128t255octgbfim(&self) -> Tx128t255octgbfimR { + Tx128t255octgbfimR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx256t511octgbfim(&self) -> TX256T511OCTGBFIM_R { - TX256T511OCTGBFIM_R::new(((self.bits >> 7) & 1) != 0) + pub fn tx256t511octgbfim(&self) -> Tx256t511octgbfimR { + Tx256t511octgbfimR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx512t1023octgbfim(&self) -> TX512T1023OCTGBFIM_R { - TX512T1023OCTGBFIM_R::new(((self.bits >> 8) & 1) != 0) + pub fn tx512t1023octgbfim(&self) -> Tx512t1023octgbfimR { + Tx512t1023octgbfimR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn tx1024tmaxoctgbfim(&self) -> TX1024TMAXOCTGBFIM_R { - TX1024TMAXOCTGBFIM_R::new(((self.bits >> 9) & 1) != 0) + pub fn tx1024tmaxoctgbfim(&self) -> Tx1024tmaxoctgbfimR { + Tx1024tmaxoctgbfimR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txucgbfim(&self) -> TXUCGBFIM_R { - TXUCGBFIM_R::new(((self.bits >> 10) & 1) != 0) + pub fn txucgbfim(&self) -> TxucgbfimR { + TxucgbfimR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcgbfim(&self) -> TXMCGBFIM_R { - TXMCGBFIM_R::new(((self.bits >> 11) & 1) != 0) + pub fn txmcgbfim(&self) -> TxmcgbfimR { + TxmcgbfimR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txbcgbfim(&self) -> TXBCGBFIM_R { - TXBCGBFIM_R::new(((self.bits >> 12) & 1) != 0) + pub fn txbcgbfim(&self) -> TxbcgbfimR { + TxbcgbfimR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txuflowerfim(&self) -> TXUFLOWERFIM_R { - TXUFLOWERFIM_R::new(((self.bits >> 13) & 1) != 0) + pub fn txuflowerfim(&self) -> TxuflowerfimR { + TxuflowerfimR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txscolgfim(&self) -> TXSCOLGFIM_R { - TXSCOLGFIM_R::new(((self.bits >> 14) & 1) != 0) + pub fn txscolgfim(&self) -> TxscolgfimR { + TxscolgfimR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txmcolgfim(&self) -> TXMCOLGFIM_R { - TXMCOLGFIM_R::new(((self.bits >> 15) & 1) != 0) + pub fn txmcolgfim(&self) -> TxmcolgfimR { + TxmcolgfimR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txdeffim(&self) -> TXDEFFIM_R { - TXDEFFIM_R::new(((self.bits >> 16) & 1) != 0) + pub fn txdeffim(&self) -> TxdeffimR { + TxdeffimR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txlatcolfim(&self) -> TXLATCOLFIM_R { - TXLATCOLFIM_R::new(((self.bits >> 17) & 1) != 0) + pub fn txlatcolfim(&self) -> TxlatcolfimR { + TxlatcolfimR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txexcolfim(&self) -> TXEXCOLFIM_R { - TXEXCOLFIM_R::new(((self.bits >> 18) & 1) != 0) + pub fn txexcolfim(&self) -> TxexcolfimR { + TxexcolfimR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txcarerfim(&self) -> TXCARERFIM_R { - TXCARERFIM_R::new(((self.bits >> 19) & 1) != 0) + pub fn txcarerfim(&self) -> TxcarerfimR { + TxcarerfimR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] #[inline(always)] - pub fn txgoctim(&self) -> TXGOCTIM_R { - TXGOCTIM_R::new(((self.bits >> 20) & 1) != 0) + pub fn txgoctim(&self) -> TxgoctimR { + TxgoctimR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txgfrmim(&self) -> TXGFRMIM_R { - TXGFRMIM_R::new(((self.bits >> 21) & 1) != 0) + pub fn txgfrmim(&self) -> TxgfrmimR { + TxgfrmimR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txexdeffim(&self) -> TXEXDEFFIM_R { - TXEXDEFFIM_R::new(((self.bits >> 22) & 1) != 0) + pub fn txexdeffim(&self) -> TxexdeffimR { + TxexdeffimR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txpausfim(&self) -> TXPAUSFIM_R { - TXPAUSFIM_R::new(((self.bits >> 23) & 1) != 0) + pub fn txpausfim(&self) -> TxpausfimR { + TxpausfimR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txvlangfim(&self) -> TXVLANGFIM_R { - TXVLANGFIM_R::new(((self.bits >> 24) & 1) != 0) + pub fn txvlangfim(&self) -> TxvlangfimR { + TxvlangfimR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - pub fn txosizegfim(&self) -> TXOSIZEGFIM_R { - TXOSIZEGFIM_R::new(((self.bits >> 25) & 1) != 0) + pub fn txosizegfim(&self) -> TxosizegfimR { + TxosizegfimR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txgboctim(&mut self) -> TXGBOCTIM_W { - TXGBOCTIM_W::new(self, 0) + pub fn txgboctim(&mut self) -> TxgboctimW { + TxgboctimW::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txgbfrmim(&mut self) -> TXGBFRMIM_W { - TXGBFRMIM_W::new(self, 1) + pub fn txgbfrmim(&mut self) -> TxgbfrmimW { + TxgbfrmimW::new(self, 1) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txbcgfim(&mut self) -> TXBCGFIM_W { - TXBCGFIM_W::new(self, 2) + pub fn txbcgfim(&mut self) -> TxbcgfimW { + TxbcgfimW::new(self, 2) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txmcgfim(&mut self) -> TXMCGFIM_W { - TXMCGFIM_W::new(self, 3) + pub fn txmcgfim(&mut self) -> TxmcgfimW { + TxmcgfimW::new(self, 3) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx64octgbfim(&mut self) -> TX64OCTGBFIM_W { - TX64OCTGBFIM_W::new(self, 4) + pub fn tx64octgbfim(&mut self) -> Tx64octgbfimW { + Tx64octgbfimW::new(self, 4) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx65t127octgbfim(&mut self) -> TX65T127OCTGBFIM_W { - TX65T127OCTGBFIM_W::new(self, 5) + pub fn tx65t127octgbfim(&mut self) -> Tx65t127octgbfimW { + Tx65t127octgbfimW::new(self, 5) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx128t255octgbfim(&mut self) -> TX128T255OCTGBFIM_W { - TX128T255OCTGBFIM_W::new(self, 6) + pub fn tx128t255octgbfim(&mut self) -> Tx128t255octgbfimW { + Tx128t255octgbfimW::new(self, 6) } #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx256t511octgbfim(&mut self) -> TX256T511OCTGBFIM_W { - TX256T511OCTGBFIM_W::new(self, 7) + pub fn tx256t511octgbfim(&mut self) -> Tx256t511octgbfimW { + Tx256t511octgbfimW::new(self, 7) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx512t1023octgbfim(&mut self) -> TX512T1023OCTGBFIM_W { - TX512T1023OCTGBFIM_W::new(self, 8) + pub fn tx512t1023octgbfim(&mut self) -> Tx512t1023octgbfimW { + Tx512t1023octgbfimW::new(self, 8) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn tx1024tmaxoctgbfim(&mut self) -> TX1024TMAXOCTGBFIM_W { - TX1024TMAXOCTGBFIM_W::new(self, 9) + pub fn tx1024tmaxoctgbfim(&mut self) -> Tx1024tmaxoctgbfimW { + Tx1024tmaxoctgbfimW::new(self, 9) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txucgbfim(&mut self) -> TXUCGBFIM_W { - TXUCGBFIM_W::new(self, 10) + pub fn txucgbfim(&mut self) -> TxucgbfimW { + TxucgbfimW::new(self, 10) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txmcgbfim(&mut self) -> TXMCGBFIM_W { - TXMCGBFIM_W::new(self, 11) + pub fn txmcgbfim(&mut self) -> TxmcgbfimW { + TxmcgbfimW::new(self, 11) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txbcgbfim(&mut self) -> TXBCGBFIM_W { - TXBCGBFIM_W::new(self, 12) + pub fn txbcgbfim(&mut self) -> TxbcgbfimW { + TxbcgbfimW::new(self, 12) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txuflowerfim(&mut self) -> TXUFLOWERFIM_W { - TXUFLOWERFIM_W::new(self, 13) + pub fn txuflowerfim(&mut self) -> TxuflowerfimW { + TxuflowerfimW::new(self, 13) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txscolgfim(&mut self) -> TXSCOLGFIM_W { - TXSCOLGFIM_W::new(self, 14) + pub fn txscolgfim(&mut self) -> TxscolgfimW { + TxscolgfimW::new(self, 14) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txmcolgfim(&mut self) -> TXMCOLGFIM_W { - TXMCOLGFIM_W::new(self, 15) + pub fn txmcolgfim(&mut self) -> TxmcolgfimW { + TxmcolgfimW::new(self, 15) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txdeffim(&mut self) -> TXDEFFIM_W { - TXDEFFIM_W::new(self, 16) + pub fn txdeffim(&mut self) -> TxdeffimW { + TxdeffimW::new(self, 16) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txlatcolfim(&mut self) -> TXLATCOLFIM_W { - TXLATCOLFIM_W::new(self, 17) + pub fn txlatcolfim(&mut self) -> TxlatcolfimW { + TxlatcolfimW::new(self, 17) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txexcolfim(&mut self) -> TXEXCOLFIM_W { - TXEXCOLFIM_W::new(self, 18) + pub fn txexcolfim(&mut self) -> TxexcolfimW { + TxexcolfimW::new(self, 18) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txcarerfim(&mut self) -> TXCARERFIM_W { - TXCARERFIM_W::new(self, 19) + pub fn txcarerfim(&mut self) -> TxcarerfimW { + TxcarerfimW::new(self, 19) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txgoctim(&mut self) -> TXGOCTIM_W { - TXGOCTIM_W::new(self, 20) + pub fn txgoctim(&mut self) -> TxgoctimW { + TxgoctimW::new(self, 20) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txgfrmim(&mut self) -> TXGFRMIM_W { - TXGFRMIM_W::new(self, 21) + pub fn txgfrmim(&mut self) -> TxgfrmimW { + TxgfrmimW::new(self, 21) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txexdeffim(&mut self) -> TXEXDEFFIM_W { - TXEXDEFFIM_W::new(self, 22) + pub fn txexdeffim(&mut self) -> TxexdeffimW { + TxexdeffimW::new(self, 22) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txpausfim(&mut self) -> TXPAUSFIM_W { - TXPAUSFIM_W::new(self, 23) + pub fn txpausfim(&mut self) -> TxpausfimW { + TxpausfimW::new(self, 23) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txvlangfim(&mut self) -> TXVLANGFIM_W { - TXVLANGFIM_W::new(self, 24) + pub fn txvlangfim(&mut self) -> TxvlangfimW { + TxvlangfimW::new(self, 24) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] #[must_use] - pub fn txosizegfim(&mut self) -> TXOSIZEGFIM_W { - TXOSIZEGFIM_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn txosizegfim(&mut self) -> TxosizegfimW { + TxosizegfimW::new(self, 25) } } #[doc = "MMC Transmit Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmc_transmit_interrupt_mask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmc_transmit_interrupt_mask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMC_TRANSMIT_INTERRUPT_MASK_SPEC; -impl crate::RegisterSpec for MMC_TRANSMIT_INTERRUPT_MASK_SPEC { +pub struct MmcTransmitInterruptMaskSpec; +impl crate::RegisterSpec for MmcTransmitInterruptMaskSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmc_transmit_interrupt_mask::R`](R) reader structure"] -impl crate::Readable for MMC_TRANSMIT_INTERRUPT_MASK_SPEC {} +impl crate::Readable for MmcTransmitInterruptMaskSpec {} #[doc = "`write(|w| ..)` method takes [`mmc_transmit_interrupt_mask::W`](W) writer structure"] -impl crate::Writable for MMC_TRANSMIT_INTERRUPT_MASK_SPEC { +impl crate::Writable for MmcTransmitInterruptMaskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMC_TRANSMIT_INTERRUPT_MASK to value 0"] -impl crate::Resettable for MMC_TRANSMIT_INTERRUPT_MASK_SPEC { +impl crate::Resettable for MmcTransmitInterruptMaskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/operation_mode.rs b/src/eth0/operation_mode.rs index 7c793796..f1df401e 100644 --- a/src/eth0/operation_mode.rs +++ b/src/eth0/operation_mode.rs @@ -1,214 +1,205 @@ #[doc = "Register `OPERATION_MODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OPERATION_MODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SR` reader - Start or Stop Receive"] -pub type SR_R = crate::BitReader; +pub type SrR = crate::BitReader; #[doc = "Field `SR` writer - Start or Stop Receive"] -pub type SR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OSF` reader - Operate on Second Frame"] -pub type OSF_R = crate::BitReader; +pub type OsfR = crate::BitReader; #[doc = "Field `OSF` writer - Operate on Second Frame"] -pub type OSF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OsfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTC` reader - Receive Threshold Control"] -pub type RTC_R = crate::FieldReader; +pub type RtcR = crate::FieldReader; #[doc = "Field `RTC` writer - Receive Threshold Control"] -pub type RTC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type RtcW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FUF` reader - Forward Undersized Good Frames"] -pub type FUF_R = crate::BitReader; +pub type FufR = crate::BitReader; #[doc = "Field `FUF` writer - Forward Undersized Good Frames"] -pub type FUF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FEF` reader - Forward Error Frames"] -pub type FEF_R = crate::BitReader; +pub type FefR = crate::BitReader; #[doc = "Field `FEF` writer - Forward Error Frames"] -pub type FEF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FefW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST` reader - Start or Stop Transmission Command"] -pub type ST_R = crate::BitReader; +pub type StR = crate::BitReader; #[doc = "Field `ST` writer - Start or Stop Transmission Command"] -pub type ST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TTC` reader - Transmit Threshold Control"] -pub type TTC_R = crate::FieldReader; +pub type TtcR = crate::FieldReader; #[doc = "Field `TTC` writer - Transmit Threshold Control"] -pub type TTC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TtcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `FTF` reader - Flush Transmit FIFO"] -pub type FTF_R = crate::BitReader; +pub type FtfR = crate::BitReader; #[doc = "Field `FTF` writer - Flush Transmit FIFO"] -pub type FTF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FtfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSF` reader - Transmit Store and Forward"] -pub type TSF_R = crate::BitReader; +pub type TsfR = crate::BitReader; #[doc = "Field `TSF` writer - Transmit Store and Forward"] -pub type TSF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DFF` reader - Disable Flushing of Received Frames"] -pub type DFF_R = crate::BitReader; +pub type DffR = crate::BitReader; #[doc = "Field `DFF` writer - Disable Flushing of Received Frames"] -pub type DFF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DffW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RSF` reader - Receive Store and Forward"] -pub type RSF_R = crate::BitReader; +pub type RsfR = crate::BitReader; #[doc = "Field `RSF` writer - Receive Store and Forward"] -pub type RSF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RsfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DT` reader - Disable Dropping of TCP/IP Checksum Error Frames"] -pub type DT_R = crate::BitReader; +pub type DtR = crate::BitReader; #[doc = "Field `DT` writer - Disable Dropping of TCP/IP Checksum Error Frames"] -pub type DT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DtW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] - pub fn sr(&self) -> SR_R { - SR_R::new(((self.bits >> 1) & 1) != 0) + pub fn sr(&self) -> SrR { + SrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] - pub fn osf(&self) -> OSF_R { - OSF_R::new(((self.bits >> 2) & 1) != 0) + pub fn osf(&self) -> OsfR { + OsfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] - pub fn rtc(&self) -> RTC_R { - RTC_R::new(((self.bits >> 3) & 3) as u8) + pub fn rtc(&self) -> RtcR { + RtcR::new(((self.bits >> 3) & 3) as u8) } #[doc = "Bit 6 - Forward Undersized Good Frames"] #[inline(always)] - pub fn fuf(&self) -> FUF_R { - FUF_R::new(((self.bits >> 6) & 1) != 0) + pub fn fuf(&self) -> FufR { + FufR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Forward Error Frames"] #[inline(always)] - pub fn fef(&self) -> FEF_R { - FEF_R::new(((self.bits >> 7) & 1) != 0) + pub fn fef(&self) -> FefR { + FefR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 13 - Start or Stop Transmission Command"] #[inline(always)] - pub fn st(&self) -> ST_R { - ST_R::new(((self.bits >> 13) & 1) != 0) + pub fn st(&self) -> StR { + StR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:16 - Transmit Threshold Control"] #[inline(always)] - pub fn ttc(&self) -> TTC_R { - TTC_R::new(((self.bits >> 14) & 7) as u8) + pub fn ttc(&self) -> TtcR { + TtcR::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bit 20 - Flush Transmit FIFO"] #[inline(always)] - pub fn ftf(&self) -> FTF_R { - FTF_R::new(((self.bits >> 20) & 1) != 0) + pub fn ftf(&self) -> FtfR { + FtfR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Transmit Store and Forward"] #[inline(always)] - pub fn tsf(&self) -> TSF_R { - TSF_R::new(((self.bits >> 21) & 1) != 0) + pub fn tsf(&self) -> TsfR { + TsfR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 24 - Disable Flushing of Received Frames"] #[inline(always)] - pub fn dff(&self) -> DFF_R { - DFF_R::new(((self.bits >> 24) & 1) != 0) + pub fn dff(&self) -> DffR { + DffR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Receive Store and Forward"] #[inline(always)] - pub fn rsf(&self) -> RSF_R { - RSF_R::new(((self.bits >> 25) & 1) != 0) + pub fn rsf(&self) -> RsfR { + RsfR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] #[inline(always)] - pub fn dt(&self) -> DT_R { - DT_R::new(((self.bits >> 26) & 1) != 0) + pub fn dt(&self) -> DtR { + DtR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] #[must_use] - pub fn sr(&mut self) -> SR_W { - SR_W::new(self, 1) + pub fn sr(&mut self) -> SrW { + SrW::new(self, 1) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] #[must_use] - pub fn osf(&mut self) -> OSF_W { - OSF_W::new(self, 2) + pub fn osf(&mut self) -> OsfW { + OsfW::new(self, 2) } #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] #[must_use] - pub fn rtc(&mut self) -> RTC_W { - RTC_W::new(self, 3) + pub fn rtc(&mut self) -> RtcW { + RtcW::new(self, 3) } #[doc = "Bit 6 - Forward Undersized Good Frames"] #[inline(always)] #[must_use] - pub fn fuf(&mut self) -> FUF_W { - FUF_W::new(self, 6) + pub fn fuf(&mut self) -> FufW { + FufW::new(self, 6) } #[doc = "Bit 7 - Forward Error Frames"] #[inline(always)] #[must_use] - pub fn fef(&mut self) -> FEF_W { - FEF_W::new(self, 7) + pub fn fef(&mut self) -> FefW { + FefW::new(self, 7) } #[doc = "Bit 13 - Start or Stop Transmission Command"] #[inline(always)] #[must_use] - pub fn st(&mut self) -> ST_W { - ST_W::new(self, 13) + pub fn st(&mut self) -> StW { + StW::new(self, 13) } #[doc = "Bits 14:16 - Transmit Threshold Control"] #[inline(always)] #[must_use] - pub fn ttc(&mut self) -> TTC_W { - TTC_W::new(self, 14) + pub fn ttc(&mut self) -> TtcW { + TtcW::new(self, 14) } #[doc = "Bit 20 - Flush Transmit FIFO"] #[inline(always)] #[must_use] - pub fn ftf(&mut self) -> FTF_W { - FTF_W::new(self, 20) + pub fn ftf(&mut self) -> FtfW { + FtfW::new(self, 20) } #[doc = "Bit 21 - Transmit Store and Forward"] #[inline(always)] #[must_use] - pub fn tsf(&mut self) -> TSF_W { - TSF_W::new(self, 21) + pub fn tsf(&mut self) -> TsfW { + TsfW::new(self, 21) } #[doc = "Bit 24 - Disable Flushing of Received Frames"] #[inline(always)] #[must_use] - pub fn dff(&mut self) -> DFF_W { - DFF_W::new(self, 24) + pub fn dff(&mut self) -> DffW { + DffW::new(self, 24) } #[doc = "Bit 25 - Receive Store and Forward"] #[inline(always)] #[must_use] - pub fn rsf(&mut self) -> RSF_W { - RSF_W::new(self, 25) + pub fn rsf(&mut self) -> RsfW { + RsfW::new(self, 25) } #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] #[inline(always)] #[must_use] - pub fn dt(&mut self) -> DT_W { - DT_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dt(&mut self) -> DtW { + DtW::new(self, 26) } } #[doc = "Operation Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`operation_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`operation_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OPERATION_MODE_SPEC; -impl crate::RegisterSpec for OPERATION_MODE_SPEC { +pub struct OperationModeSpec; +impl crate::RegisterSpec for OperationModeSpec { type Ux = u32; } #[doc = "`read()` method returns [`operation_mode::R`](R) reader structure"] -impl crate::Readable for OPERATION_MODE_SPEC {} +impl crate::Readable for OperationModeSpec {} #[doc = "`write(|w| ..)` method takes [`operation_mode::W`](W) writer structure"] -impl crate::Writable for OPERATION_MODE_SPEC { +impl crate::Writable for OperationModeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OPERATION_MODE to value 0"] -impl crate::Resettable for OPERATION_MODE_SPEC { +impl crate::Resettable for OperationModeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/pmt_control_status.rs b/src/eth0/pmt_control_status.rs index cea36e32..55977204 100644 --- a/src/eth0/pmt_control_status.rs +++ b/src/eth0/pmt_control_status.rs @@ -1,123 +1,114 @@ #[doc = "Register `PMT_CONTROL_STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PMT_CONTROL_STATUS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PWRDWN` reader - Power Down"] -pub type PWRDWN_R = crate::BitReader; +pub type PwrdwnR = crate::BitReader; #[doc = "Field `PWRDWN` writer - Power Down"] -pub type PWRDWN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PwrdwnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MGKPKTEN` reader - Magic Packet Enable"] -pub type MGKPKTEN_R = crate::BitReader; +pub type MgkpktenR = crate::BitReader; #[doc = "Field `MGKPKTEN` writer - Magic Packet Enable"] -pub type MGKPKTEN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MgkpktenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWKPKTEN` reader - Wake-Up Frame Enable"] -pub type RWKPKTEN_R = crate::BitReader; +pub type RwkpktenR = crate::BitReader; #[doc = "Field `RWKPKTEN` writer - Wake-Up Frame Enable"] -pub type RWKPKTEN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RwkpktenW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MGKPRCVD` reader - Magic Packet Received"] -pub type MGKPRCVD_R = crate::BitReader; +pub type MgkprcvdR = crate::BitReader; #[doc = "Field `RWKPRCVD` reader - Wake-Up Frame Received"] -pub type RWKPRCVD_R = crate::BitReader; +pub type RwkprcvdR = crate::BitReader; #[doc = "Field `GLBLUCAST` reader - Global Unicast"] -pub type GLBLUCAST_R = crate::BitReader; +pub type GlblucastR = crate::BitReader; #[doc = "Field `GLBLUCAST` writer - Global Unicast"] -pub type GLBLUCAST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type GlblucastW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWKFILTRST` reader - Wake-Up Frame Filter Register Pointer Reset"] -pub type RWKFILTRST_R = crate::BitReader; +pub type RwkfiltrstR = crate::BitReader; #[doc = "Field `RWKFILTRST` writer - Wake-Up Frame Filter Register Pointer Reset"] -pub type RWKFILTRST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RwkfiltrstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Power Down"] #[inline(always)] - pub fn pwrdwn(&self) -> PWRDWN_R { - PWRDWN_R::new((self.bits & 1) != 0) + pub fn pwrdwn(&self) -> PwrdwnR { + PwrdwnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Magic Packet Enable"] #[inline(always)] - pub fn mgkpkten(&self) -> MGKPKTEN_R { - MGKPKTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn mgkpkten(&self) -> MgkpktenR { + MgkpktenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Wake-Up Frame Enable"] #[inline(always)] - pub fn rwkpkten(&self) -> RWKPKTEN_R { - RWKPKTEN_R::new(((self.bits >> 2) & 1) != 0) + pub fn rwkpkten(&self) -> RwkpktenR { + RwkpktenR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - Magic Packet Received"] #[inline(always)] - pub fn mgkprcvd(&self) -> MGKPRCVD_R { - MGKPRCVD_R::new(((self.bits >> 5) & 1) != 0) + pub fn mgkprcvd(&self) -> MgkprcvdR { + MgkprcvdR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Wake-Up Frame Received"] #[inline(always)] - pub fn rwkprcvd(&self) -> RWKPRCVD_R { - RWKPRCVD_R::new(((self.bits >> 6) & 1) != 0) + pub fn rwkprcvd(&self) -> RwkprcvdR { + RwkprcvdR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 9 - Global Unicast"] #[inline(always)] - pub fn glblucast(&self) -> GLBLUCAST_R { - GLBLUCAST_R::new(((self.bits >> 9) & 1) != 0) + pub fn glblucast(&self) -> GlblucastR { + GlblucastR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 31 - Wake-Up Frame Filter Register Pointer Reset"] #[inline(always)] - pub fn rwkfiltrst(&self) -> RWKFILTRST_R { - RWKFILTRST_R::new(((self.bits >> 31) & 1) != 0) + pub fn rwkfiltrst(&self) -> RwkfiltrstR { + RwkfiltrstR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Power Down"] #[inline(always)] #[must_use] - pub fn pwrdwn(&mut self) -> PWRDWN_W { - PWRDWN_W::new(self, 0) + pub fn pwrdwn(&mut self) -> PwrdwnW { + PwrdwnW::new(self, 0) } #[doc = "Bit 1 - Magic Packet Enable"] #[inline(always)] #[must_use] - pub fn mgkpkten(&mut self) -> MGKPKTEN_W { - MGKPKTEN_W::new(self, 1) + pub fn mgkpkten(&mut self) -> MgkpktenW { + MgkpktenW::new(self, 1) } #[doc = "Bit 2 - Wake-Up Frame Enable"] #[inline(always)] #[must_use] - pub fn rwkpkten(&mut self) -> RWKPKTEN_W { - RWKPKTEN_W::new(self, 2) + pub fn rwkpkten(&mut self) -> RwkpktenW { + RwkpktenW::new(self, 2) } #[doc = "Bit 9 - Global Unicast"] #[inline(always)] #[must_use] - pub fn glblucast(&mut self) -> GLBLUCAST_W { - GLBLUCAST_W::new(self, 9) + pub fn glblucast(&mut self) -> GlblucastW { + GlblucastW::new(self, 9) } #[doc = "Bit 31 - Wake-Up Frame Filter Register Pointer Reset"] #[inline(always)] #[must_use] - pub fn rwkfiltrst(&mut self) -> RWKFILTRST_W { - RWKFILTRST_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rwkfiltrst(&mut self) -> RwkfiltrstW { + RwkfiltrstW::new(self, 31) } } #[doc = "PMT Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmt_control_status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmt_control_status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PMT_CONTROL_STATUS_SPEC; -impl crate::RegisterSpec for PMT_CONTROL_STATUS_SPEC { +pub struct PmtControlStatusSpec; +impl crate::RegisterSpec for PmtControlStatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`pmt_control_status::R`](R) reader structure"] -impl crate::Readable for PMT_CONTROL_STATUS_SPEC {} +impl crate::Readable for PmtControlStatusSpec {} #[doc = "`write(|w| ..)` method takes [`pmt_control_status::W`](W) writer structure"] -impl crate::Writable for PMT_CONTROL_STATUS_SPEC { +impl crate::Writable for PmtControlStatusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMT_CONTROL_STATUS to value 0"] -impl crate::Resettable for PMT_CONTROL_STATUS_SPEC { +impl crate::Resettable for PmtControlStatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/receive_descriptor_list_address.rs b/src/eth0/receive_descriptor_list_address.rs index 9302198f..3ef280a6 100644 --- a/src/eth0/receive_descriptor_list_address.rs +++ b/src/eth0/receive_descriptor_list_address.rs @@ -1,49 +1,40 @@ #[doc = "Register `RECEIVE_DESCRIPTOR_LIST_ADDRESS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RECEIVE_DESCRIPTOR_LIST_ADDRESS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RDESLA_32bit` reader - Start of Receive List"] -pub type RDESLA_32BIT_R = crate::FieldReader; +pub type Rdesla32bitR = crate::FieldReader; #[doc = "Field `RDESLA_32bit` writer - Start of Receive List"] -pub type RDESLA_32BIT_W<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; +pub type Rdesla32bitW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bits 2:31 - Start of Receive List"] #[inline(always)] - pub fn rdesla_32bit(&self) -> RDESLA_32BIT_R { - RDESLA_32BIT_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn rdesla_32bit(&self) -> Rdesla32bitR { + Rdesla32bitR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bits 2:31 - Start of Receive List"] #[inline(always)] #[must_use] - pub fn rdesla_32bit(&mut self) -> RDESLA_32BIT_W { - RDESLA_32BIT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rdesla_32bit(&mut self) -> Rdesla32bitW { + Rdesla32bitW::new(self, 2) } } #[doc = "Receive Descriptor Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_descriptor_list_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_descriptor_list_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC; -impl crate::RegisterSpec for RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC { +pub struct ReceiveDescriptorListAddressSpec; +impl crate::RegisterSpec for ReceiveDescriptorListAddressSpec { type Ux = u32; } #[doc = "`read()` method returns [`receive_descriptor_list_address::R`](R) reader structure"] -impl crate::Readable for RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC {} +impl crate::Readable for ReceiveDescriptorListAddressSpec {} #[doc = "`write(|w| ..)` method takes [`receive_descriptor_list_address::W`](W) writer structure"] -impl crate::Writable for RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC { +impl crate::Writable for ReceiveDescriptorListAddressSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RECEIVE_DESCRIPTOR_LIST_ADDRESS to value 0"] -impl crate::Resettable for RECEIVE_DESCRIPTOR_LIST_ADDRESS_SPEC { +impl crate::Resettable for ReceiveDescriptorListAddressSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/receive_interrupt_watchdog_timer.rs b/src/eth0/receive_interrupt_watchdog_timer.rs index d7726381..15560251 100644 --- a/src/eth0/receive_interrupt_watchdog_timer.rs +++ b/src/eth0/receive_interrupt_watchdog_timer.rs @@ -1,49 +1,40 @@ #[doc = "Register `RECEIVE_INTERRUPT_WATCHDOG_TIMER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RECEIVE_INTERRUPT_WATCHDOG_TIMER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RIWT` reader - RI Watchdog Timer Count"] -pub type RIWT_R = crate::FieldReader; +pub type RiwtR = crate::FieldReader; #[doc = "Field `RIWT` writer - RI Watchdog Timer Count"] -pub type RIWT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type RiwtW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - RI Watchdog Timer Count"] #[inline(always)] - pub fn riwt(&self) -> RIWT_R { - RIWT_R::new((self.bits & 0xff) as u8) + pub fn riwt(&self) -> RiwtR { + RiwtR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - RI Watchdog Timer Count"] #[inline(always)] #[must_use] - pub fn riwt(&mut self) -> RIWT_W { - RIWT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn riwt(&mut self) -> RiwtW { + RiwtW::new(self, 0) } } #[doc = "Receive Interrupt Watchdog Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_interrupt_watchdog_timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_interrupt_watchdog_timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC; -impl crate::RegisterSpec for RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC { +pub struct ReceiveInterruptWatchdogTimerSpec; +impl crate::RegisterSpec for ReceiveInterruptWatchdogTimerSpec { type Ux = u32; } #[doc = "`read()` method returns [`receive_interrupt_watchdog_timer::R`](R) reader structure"] -impl crate::Readable for RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC {} +impl crate::Readable for ReceiveInterruptWatchdogTimerSpec {} #[doc = "`write(|w| ..)` method takes [`receive_interrupt_watchdog_timer::W`](W) writer structure"] -impl crate::Writable for RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC { +impl crate::Writable for ReceiveInterruptWatchdogTimerSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RECEIVE_INTERRUPT_WATCHDOG_TIMER to value 0"] -impl crate::Resettable for RECEIVE_INTERRUPT_WATCHDOG_TIMER_SPEC { +impl crate::Resettable for ReceiveInterruptWatchdogTimerSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/receive_poll_demand.rs b/src/eth0/receive_poll_demand.rs index 29d28991..ff6ad646 100644 --- a/src/eth0/receive_poll_demand.rs +++ b/src/eth0/receive_poll_demand.rs @@ -1,49 +1,40 @@ #[doc = "Register `RECEIVE_POLL_DEMAND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RECEIVE_POLL_DEMAND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPD` reader - Receive Poll Demand"] -pub type RPD_R = crate::FieldReader; +pub type RpdR = crate::FieldReader; #[doc = "Field `RPD` writer - Receive Poll Demand"] -pub type RPD_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type RpdW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Receive Poll Demand"] #[inline(always)] - pub fn rpd(&self) -> RPD_R { - RPD_R::new(self.bits) + pub fn rpd(&self) -> RpdR { + RpdR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Receive Poll Demand"] #[inline(always)] #[must_use] - pub fn rpd(&mut self) -> RPD_W { - RPD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rpd(&mut self) -> RpdW { + RpdW::new(self, 0) } } #[doc = "Receive Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`receive_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`receive_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RECEIVE_POLL_DEMAND_SPEC; -impl crate::RegisterSpec for RECEIVE_POLL_DEMAND_SPEC { +pub struct ReceivePollDemandSpec; +impl crate::RegisterSpec for ReceivePollDemandSpec { type Ux = u32; } #[doc = "`read()` method returns [`receive_poll_demand::R`](R) reader structure"] -impl crate::Readable for RECEIVE_POLL_DEMAND_SPEC {} +impl crate::Readable for ReceivePollDemandSpec {} #[doc = "`write(|w| ..)` method takes [`receive_poll_demand::W`](W) writer structure"] -impl crate::Writable for RECEIVE_POLL_DEMAND_SPEC { +impl crate::Writable for ReceivePollDemandSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RECEIVE_POLL_DEMAND to value 0"] -impl crate::Resettable for RECEIVE_POLL_DEMAND_SPEC { +impl crate::Resettable for ReceivePollDemandSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/remote_wake_up_frame_filter.rs b/src/eth0/remote_wake_up_frame_filter.rs index 9e308902..8d3a85de 100644 --- a/src/eth0/remote_wake_up_frame_filter.rs +++ b/src/eth0/remote_wake_up_frame_filter.rs @@ -1,49 +1,40 @@ #[doc = "Register `REMOTE_WAKE_UP_FRAME_FILTER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REMOTE_WAKE_UP_FRAME_FILTER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WKUPFRMFTR` reader - Remote Wake-Up Frame Filter"] -pub type WKUPFRMFTR_R = crate::FieldReader; +pub type WkupfrmftrR = crate::FieldReader; #[doc = "Field `WKUPFRMFTR` writer - Remote Wake-Up Frame Filter"] -pub type WKUPFRMFTR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WkupfrmftrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Remote Wake-Up Frame Filter"] #[inline(always)] - pub fn wkupfrmftr(&self) -> WKUPFRMFTR_R { - WKUPFRMFTR_R::new(self.bits) + pub fn wkupfrmftr(&self) -> WkupfrmftrR { + WkupfrmftrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Remote Wake-Up Frame Filter"] #[inline(always)] #[must_use] - pub fn wkupfrmftr(&mut self) -> WKUPFRMFTR_W { - WKUPFRMFTR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wkupfrmftr(&mut self) -> WkupfrmftrW { + WkupfrmftrW::new(self, 0) } } #[doc = "Remote Wake Up Frame Filter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`remote_wake_up_frame_filter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`remote_wake_up_frame_filter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REMOTE_WAKE_UP_FRAME_FILTER_SPEC; -impl crate::RegisterSpec for REMOTE_WAKE_UP_FRAME_FILTER_SPEC { +pub struct RemoteWakeUpFrameFilterSpec; +impl crate::RegisterSpec for RemoteWakeUpFrameFilterSpec { type Ux = u32; } #[doc = "`read()` method returns [`remote_wake_up_frame_filter::R`](R) reader structure"] -impl crate::Readable for REMOTE_WAKE_UP_FRAME_FILTER_SPEC {} +impl crate::Readable for RemoteWakeUpFrameFilterSpec {} #[doc = "`write(|w| ..)` method takes [`remote_wake_up_frame_filter::W`](W) writer structure"] -impl crate::Writable for REMOTE_WAKE_UP_FRAME_FILTER_SPEC { +impl crate::Writable for RemoteWakeUpFrameFilterSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REMOTE_WAKE_UP_FRAME_FILTER to value 0"] -impl crate::Resettable for REMOTE_WAKE_UP_FRAME_FILTER_SPEC { +impl crate::Resettable for RemoteWakeUpFrameFilterSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs b/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs index 31de4066..1cf78429 100644 --- a/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs +++ b/src/eth0/rx_1024tomaxoctets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX1024_MAXOCTGB` reader - This field indicates the number of received good and bad frames with length between 1,024 and maxsize (inclusive) bytes, exclusive of preamble and retried frames."] -pub type RX1024_MAXOCTGB_R = crate::FieldReader; +pub type Rx1024MaxoctgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames with length between 1,024 and maxsize (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn rx1024_maxoctgb(&self) -> RX1024_MAXOCTGB_R { - RX1024_MAXOCTGB_R::new(self.bits) + pub fn rx1024_maxoctgb(&self) -> Rx1024MaxoctgbR { + Rx1024MaxoctgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx1024tomaxoctetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx1024tomaxoctetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_1024tomaxoctets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx1024tomaxoctetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx1024tomaxoctetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_128to255octets_frames_good_bad.rs b/src/eth0/rx_128to255octets_frames_good_bad.rs index d7602b34..2238855a 100644 --- a/src/eth0/rx_128to255octets_frames_good_bad.rs +++ b/src/eth0/rx_128to255octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_128TO255OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX128_255OCTGB` reader - This field indicates the number of received good and bad frames with length between 128 and 255 (inclusive) bytes, exclusive of preamble."] -pub type RX128_255OCTGB_R = crate::FieldReader; +pub type Rx128_255octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames with length between 128 and 255 (inclusive) bytes, exclusive of preamble."] #[inline(always)] - pub fn rx128_255octgb(&self) -> RX128_255OCTGB_R { - RX128_255OCTGB_R::new(self.bits) + pub fn rx128_255octgb(&self) -> Rx128_255octgbR { + Rx128_255octgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx128to255octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx128to255octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_128to255octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx128to255octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_128TO255OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx128to255octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_256to511octets_frames_good_bad.rs b/src/eth0/rx_256to511octets_frames_good_bad.rs index 90327629..89b6bfea 100644 --- a/src/eth0/rx_256to511octets_frames_good_bad.rs +++ b/src/eth0/rx_256to511octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_256TO511OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX256_511OCTGB` reader - This field indicates the number of received good and bad frames with length between 256 and 511 (inclusive) bytes, exclusive of preamble."] -pub type RX256_511OCTGB_R = crate::FieldReader; +pub type Rx256_511octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames with length between 256 and 511 (inclusive) bytes, exclusive of preamble."] #[inline(always)] - pub fn rx256_511octgb(&self) -> RX256_511OCTGB_R { - RX256_511OCTGB_R::new(self.bits) + pub fn rx256_511octgb(&self) -> Rx256_511octgbR { + Rx256_511octgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx256to511octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx256to511octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_256to511octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx256to511octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_256TO511OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx256to511octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_512to1023octets_frames_good_bad.rs b/src/eth0/rx_512to1023octets_frames_good_bad.rs index d9888d62..5034e615 100644 --- a/src/eth0/rx_512to1023octets_frames_good_bad.rs +++ b/src/eth0/rx_512to1023octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_512TO1023OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX512_1023OCTGB` reader - This field indicates the number of received good and bad frames with length between 512 and 1,023 (inclusive) bytes, exclusive of preamble."] -pub type RX512_1023OCTGB_R = crate::FieldReader; +pub type Rx512_1023octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames with length between 512 and 1,023 (inclusive) bytes, exclusive of preamble."] #[inline(always)] - pub fn rx512_1023octgb(&self) -> RX512_1023OCTGB_R { - RX512_1023OCTGB_R::new(self.bits) + pub fn rx512_1023octgb(&self) -> Rx512_1023octgbR { + Rx512_1023octgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx512to1023octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx512to1023octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_512to1023octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx512to1023octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_512TO1023OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx512to1023octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_64octets_frames_good_bad.rs b/src/eth0/rx_64octets_frames_good_bad.rs index 1cafffe4..8fda73ac 100644 --- a/src/eth0/rx_64octets_frames_good_bad.rs +++ b/src/eth0/rx_64octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_64OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX64OCTGB` reader - This field indicates the number of received good and bad frames with length 64 bytes, exclusive of preamble."] -pub type RX64OCTGB_R = crate::FieldReader; +pub type Rx64octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames with length 64 bytes, exclusive of preamble."] #[inline(always)] - pub fn rx64octgb(&self) -> RX64OCTGB_R { - RX64OCTGB_R::new(self.bits) + pub fn rx64octgb(&self) -> Rx64octgbR { + Rx64octgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_64OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_64OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx64octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx64octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_64octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_64OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx64octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_64OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_64OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx64octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_65to127octets_frames_good_bad.rs b/src/eth0/rx_65to127octets_frames_good_bad.rs index 69843349..7b0e18ca 100644 --- a/src/eth0/rx_65to127octets_frames_good_bad.rs +++ b/src/eth0/rx_65to127octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_65TO127OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RX65_127OCTGB` reader - This field indicates the number of received good and bad frames received with length between 65 and 127 (inclusive) bytes, exclusive of preamble."] -pub type RX65_127OCTGB_R = crate::FieldReader; +pub type Rx65_127octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames received with length between 65 and 127 (inclusive) bytes, exclusive of preamble."] #[inline(always)] - pub fn rx65_127octgb(&self) -> RX65_127OCTGB_R { - RX65_127OCTGB_R::new(self.bits) + pub fn rx65_127octgb(&self) -> Rx65_127octgbR { + Rx65_127octgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Rx65to127octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Rx65to127octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_65to127octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Rx65to127octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_65TO127OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Rx65to127octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_alignment_error_frames.rs b/src/eth0/rx_alignment_error_frames.rs index db3834e3..8f9c0cb9 100644 --- a/src/eth0/rx_alignment_error_frames.rs +++ b/src/eth0/rx_alignment_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_ALIGNMENT_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXALGNERR` reader - This field indicates the number of frames received with alignment (dribble) error."] -pub type RXALGNERR_R = crate::FieldReader; +pub type RxalgnerrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with alignment (dribble) error."] #[inline(always)] - pub fn rxalgnerr(&self) -> RXALGNERR_R { - RXALGNERR_R::new(self.bits) + pub fn rxalgnerr(&self) -> RxalgnerrR { + RxalgnerrR::new(self.bits) } } #[doc = "Receive Frame Count for Alignment Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_alignment_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_ALIGNMENT_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_ALIGNMENT_ERROR_FRAMES_SPEC { +pub struct RxAlignmentErrorFramesSpec; +impl crate::RegisterSpec for RxAlignmentErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_alignment_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_ALIGNMENT_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxAlignmentErrorFramesSpec {} #[doc = "`reset()` method sets RX_ALIGNMENT_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_ALIGNMENT_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxAlignmentErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_broadcast_frames_good.rs b/src/eth0/rx_broadcast_frames_good.rs index 522799d9..4db1c1af 100644 --- a/src/eth0/rx_broadcast_frames_good.rs +++ b/src/eth0/rx_broadcast_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_BROADCAST_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXBCASTG` reader - This field indicates the number of received good broadcast frames."] -pub type RXBCASTG_R = crate::FieldReader; +pub type RxbcastgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good broadcast frames."] #[inline(always)] - pub fn rxbcastg(&self) -> RXBCASTG_R { - RXBCASTG_R::new(self.bits) + pub fn rxbcastg(&self) -> RxbcastgR { + RxbcastgR::new(self.bits) } } #[doc = "Receive Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_BROADCAST_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_BROADCAST_FRAMES_GOOD_SPEC { +pub struct RxBroadcastFramesGoodSpec; +impl crate::RegisterSpec for RxBroadcastFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_broadcast_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_BROADCAST_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxBroadcastFramesGoodSpec {} #[doc = "`reset()` method sets RX_BROADCAST_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_BROADCAST_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxBroadcastFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_control_frames_good.rs b/src/eth0/rx_control_frames_good.rs index 2cc7a68b..22e4ae12 100644 --- a/src/eth0/rx_control_frames_good.rs +++ b/src/eth0/rx_control_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_CONTROL_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXCTRLG` reader - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] -pub type RXCTRLG_R = crate::FieldReader; +pub type RxctrlgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] #[inline(always)] - pub fn rxctrlg(&self) -> RXCTRLG_R { - RXCTRLG_R::new(self.bits) + pub fn rxctrlg(&self) -> RxctrlgR { + RxctrlgR::new(self.bits) } } #[doc = "Receive Frame Count for Good Control Frames Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_control_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_CONTROL_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_CONTROL_FRAMES_GOOD_SPEC { +pub struct RxControlFramesGoodSpec; +impl crate::RegisterSpec for RxControlFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_control_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_CONTROL_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxControlFramesGoodSpec {} #[doc = "`reset()` method sets RX_CONTROL_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_CONTROL_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxControlFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_crc_error_frames.rs b/src/eth0/rx_crc_error_frames.rs index bbd9088b..ab203195 100644 --- a/src/eth0/rx_crc_error_frames.rs +++ b/src/eth0/rx_crc_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_CRC_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXCRCERR` reader - This field indicates the number of frames received with CRC error."] -pub type RXCRCERR_R = crate::FieldReader; +pub type RxcrcerrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with CRC error."] #[inline(always)] - pub fn rxcrcerr(&self) -> RXCRCERR_R { - RXCRCERR_R::new(self.bits) + pub fn rxcrcerr(&self) -> RxcrcerrR { + RxcrcerrR::new(self.bits) } } #[doc = "Receive Frame Count for CRC Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_crc_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_CRC_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_CRC_ERROR_FRAMES_SPEC { +pub struct RxCrcErrorFramesSpec; +impl crate::RegisterSpec for RxCrcErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_crc_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_CRC_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxCrcErrorFramesSpec {} #[doc = "`reset()` method sets RX_CRC_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_CRC_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxCrcErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_fifo_overflow_frames.rs b/src/eth0/rx_fifo_overflow_frames.rs index 105ac3b7..f3bf2a36 100644 --- a/src/eth0/rx_fifo_overflow_frames.rs +++ b/src/eth0/rx_fifo_overflow_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_FIFO_OVERFLOW_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXFIFOOVFL` reader - This field indicates the number of received frames missed because of FIFO overflow."] -pub type RXFIFOOVFL_R = crate::FieldReader; +pub type RxfifoovflR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received frames missed because of FIFO overflow."] #[inline(always)] - pub fn rxfifoovfl(&self) -> RXFIFOOVFL_R { - RXFIFOOVFL_R::new(self.bits) + pub fn rxfifoovfl(&self) -> RxfifoovflR { + RxfifoovflR::new(self.bits) } } #[doc = "Receive Frame Count for FIFO Overflow Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_fifo_overflow_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_FIFO_OVERFLOW_FRAMES_SPEC; -impl crate::RegisterSpec for RX_FIFO_OVERFLOW_FRAMES_SPEC { +pub struct RxFifoOverflowFramesSpec; +impl crate::RegisterSpec for RxFifoOverflowFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_fifo_overflow_frames::R`](R) reader structure"] -impl crate::Readable for RX_FIFO_OVERFLOW_FRAMES_SPEC {} +impl crate::Readable for RxFifoOverflowFramesSpec {} #[doc = "`reset()` method sets RX_FIFO_OVERFLOW_FRAMES to value 0"] -impl crate::Resettable for RX_FIFO_OVERFLOW_FRAMES_SPEC { +impl crate::Resettable for RxFifoOverflowFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_frames_count_good_bad.rs b/src/eth0/rx_frames_count_good_bad.rs index 62305550..9affb6cd 100644 --- a/src/eth0/rx_frames_count_good_bad.rs +++ b/src/eth0/rx_frames_count_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_FRAMES_COUNT_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXFRMGB` reader - This field indicates the number of received good and bad frames."] -pub type RXFRMGB_R = crate::FieldReader; +pub type RxfrmgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad frames."] #[inline(always)] - pub fn rxfrmgb(&self) -> RXFRMGB_R { - RXFRMGB_R::new(self.bits) + pub fn rxfrmgb(&self) -> RxfrmgbR { + RxfrmgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_frames_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_FRAMES_COUNT_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_FRAMES_COUNT_GOOD_BAD_SPEC { +pub struct RxFramesCountGoodBadSpec; +impl crate::RegisterSpec for RxFramesCountGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_frames_count_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_FRAMES_COUNT_GOOD_BAD_SPEC {} +impl crate::Readable for RxFramesCountGoodBadSpec {} #[doc = "`reset()` method sets RX_FRAMES_COUNT_GOOD_BAD to value 0"] -impl crate::Resettable for RX_FRAMES_COUNT_GOOD_BAD_SPEC { +impl crate::Resettable for RxFramesCountGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_jabber_error_frames.rs b/src/eth0/rx_jabber_error_frames.rs index 3bcf4483..f709abf5 100644 --- a/src/eth0/rx_jabber_error_frames.rs +++ b/src/eth0/rx_jabber_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_JABBER_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXJABERR` reader - This field indicates the number of giant frames received with length (including CRC) greater than 1,518 bytes (1,522 bytes for VLAN tagged) and with CRC error. If Jumbo Frame mode is enabled, then frames of length greater than 9,018 bytes (9,022 for VLAN tagged) are considered as giant frames."] -pub type RXJABERR_R = crate::FieldReader; +pub type RxjaberrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of giant frames received with length (including CRC) greater than 1,518 bytes (1,522 bytes for VLAN tagged) and with CRC error. If Jumbo Frame mode is enabled, then frames of length greater than 9,018 bytes (9,022 for VLAN tagged) are considered as giant frames."] #[inline(always)] - pub fn rxjaberr(&self) -> RXJABERR_R { - RXJABERR_R::new(self.bits) + pub fn rxjaberr(&self) -> RxjaberrR { + RxjaberrR::new(self.bits) } } #[doc = "Receive Frame Count for Jabber Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_jabber_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_JABBER_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_JABBER_ERROR_FRAMES_SPEC { +pub struct RxJabberErrorFramesSpec; +impl crate::RegisterSpec for RxJabberErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_jabber_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_JABBER_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxJabberErrorFramesSpec {} #[doc = "`reset()` method sets RX_JABBER_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_JABBER_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxJabberErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_length_error_frames.rs b/src/eth0/rx_length_error_frames.rs index 79b8572e..3a9d1109 100644 --- a/src/eth0/rx_length_error_frames.rs +++ b/src/eth0/rx_length_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_LENGTH_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXLENERR` reader - This field indicates the number of frames received with length error (Length type field not equal to frame size) for all frames with valid length field."] -pub type RXLENERR_R = crate::FieldReader; +pub type RxlenerrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with length error (Length type field not equal to frame size) for all frames with valid length field."] #[inline(always)] - pub fn rxlenerr(&self) -> RXLENERR_R { - RXLENERR_R::new(self.bits) + pub fn rxlenerr(&self) -> RxlenerrR { + RxlenerrR::new(self.bits) } } #[doc = "Receive Frame Count for Length Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_length_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_LENGTH_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_LENGTH_ERROR_FRAMES_SPEC { +pub struct RxLengthErrorFramesSpec; +impl crate::RegisterSpec for RxLengthErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_length_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_LENGTH_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxLengthErrorFramesSpec {} #[doc = "`reset()` method sets RX_LENGTH_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_LENGTH_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxLengthErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_multicast_frames_good.rs b/src/eth0/rx_multicast_frames_good.rs index 7f411b45..6d1a7a76 100644 --- a/src/eth0/rx_multicast_frames_good.rs +++ b/src/eth0/rx_multicast_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_MULTICAST_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXMCASTG` reader - This field indicates the number of received good multicast frames."] -pub type RXMCASTG_R = crate::FieldReader; +pub type RxmcastgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good multicast frames."] #[inline(always)] - pub fn rxmcastg(&self) -> RXMCASTG_R { - RXMCASTG_R::new(self.bits) + pub fn rxmcastg(&self) -> RxmcastgR { + RxmcastgR::new(self.bits) } } #[doc = "Receive Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_MULTICAST_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_MULTICAST_FRAMES_GOOD_SPEC { +pub struct RxMulticastFramesGoodSpec; +impl crate::RegisterSpec for RxMulticastFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_multicast_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_MULTICAST_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxMulticastFramesGoodSpec {} #[doc = "`reset()` method sets RX_MULTICAST_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_MULTICAST_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxMulticastFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_octet_count_good.rs b/src/eth0/rx_octet_count_good.rs index 79b33e95..442d0211 100644 --- a/src/eth0/rx_octet_count_good.rs +++ b/src/eth0/rx_octet_count_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_OCTET_COUNT_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXOCTG` reader - This field indicates the number of bytes received, exclusive of preamble, only in good frames."] -pub type RXOCTG_R = crate::FieldReader; +pub type RxoctgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received, exclusive of preamble, only in good frames."] #[inline(always)] - pub fn rxoctg(&self) -> RXOCTG_R { - RXOCTG_R::new(self.bits) + pub fn rxoctg(&self) -> RxoctgR { + RxoctgR::new(self.bits) } } #[doc = "Rx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_OCTET_COUNT_GOOD_SPEC; -impl crate::RegisterSpec for RX_OCTET_COUNT_GOOD_SPEC { +pub struct RxOctetCountGoodSpec; +impl crate::RegisterSpec for RxOctetCountGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_octet_count_good::R`](R) reader structure"] -impl crate::Readable for RX_OCTET_COUNT_GOOD_SPEC {} +impl crate::Readable for RxOctetCountGoodSpec {} #[doc = "`reset()` method sets RX_OCTET_COUNT_GOOD to value 0"] -impl crate::Resettable for RX_OCTET_COUNT_GOOD_SPEC { +impl crate::Resettable for RxOctetCountGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_octet_count_good_bad.rs b/src/eth0/rx_octet_count_good_bad.rs index b05cf958..5ad63537 100644 --- a/src/eth0/rx_octet_count_good_bad.rs +++ b/src/eth0/rx_octet_count_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_OCTET_COUNT_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXOCTGB` reader - This field indicates the number of bytes received, exclusive of preamble, in good and bad frames."] -pub type RXOCTGB_R = crate::FieldReader; +pub type RxoctgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received, exclusive of preamble, in good and bad frames."] #[inline(always)] - pub fn rxoctgb(&self) -> RXOCTGB_R { - RXOCTGB_R::new(self.bits) + pub fn rxoctgb(&self) -> RxoctgbR { + RxoctgbR::new(self.bits) } } #[doc = "Receive Octet Count for Good and Bad Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_OCTET_COUNT_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_OCTET_COUNT_GOOD_BAD_SPEC { +pub struct RxOctetCountGoodBadSpec; +impl crate::RegisterSpec for RxOctetCountGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_octet_count_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_OCTET_COUNT_GOOD_BAD_SPEC {} +impl crate::Readable for RxOctetCountGoodBadSpec {} #[doc = "`reset()` method sets RX_OCTET_COUNT_GOOD_BAD to value 0"] -impl crate::Resettable for RX_OCTET_COUNT_GOOD_BAD_SPEC { +impl crate::Resettable for RxOctetCountGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_out_of_range_type_frames.rs b/src/eth0/rx_out_of_range_type_frames.rs index 791128ee..9cf28dcc 100644 --- a/src/eth0/rx_out_of_range_type_frames.rs +++ b/src/eth0/rx_out_of_range_type_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_OUT_OF_RANGE_TYPE_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXOUTOFRNG` reader - This field indicates the number of received frames with length field not equal to the valid frame size (greater than 1,500 but less than 1,536)."] -pub type RXOUTOFRNG_R = crate::FieldReader; +pub type RxoutofrngR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received frames with length field not equal to the valid frame size (greater than 1,500 but less than 1,536)."] #[inline(always)] - pub fn rxoutofrng(&self) -> RXOUTOFRNG_R { - RXOUTOFRNG_R::new(self.bits) + pub fn rxoutofrng(&self) -> RxoutofrngR { + RxoutofrngR::new(self.bits) } } #[doc = "Receive Frame Count for Out of Range Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_out_of_range_type_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC; -impl crate::RegisterSpec for RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC { +pub struct RxOutOfRangeTypeFramesSpec; +impl crate::RegisterSpec for RxOutOfRangeTypeFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_out_of_range_type_frames::R`](R) reader structure"] -impl crate::Readable for RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC {} +impl crate::Readable for RxOutOfRangeTypeFramesSpec {} #[doc = "`reset()` method sets RX_OUT_OF_RANGE_TYPE_FRAMES to value 0"] -impl crate::Resettable for RX_OUT_OF_RANGE_TYPE_FRAMES_SPEC { +impl crate::Resettable for RxOutOfRangeTypeFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_oversize_frames_good.rs b/src/eth0/rx_oversize_frames_good.rs index b804282c..111eca70 100644 --- a/src/eth0/rx_oversize_frames_good.rs +++ b/src/eth0/rx_oversize_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_OVERSIZE_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXOVERSZG` reader - This field indicates the number of frames received without errors, with length greater than the maxsize (1,518 or 1,522 for VLAN tagged frames; 2,000 bytes if enabled by setting MAC Configuration.2KPE)."] -pub type RXOVERSZG_R = crate::FieldReader; +pub type RxoverszgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received without errors, with length greater than the maxsize (1,518 or 1,522 for VLAN tagged frames; 2,000 bytes if enabled by setting MAC Configuration.2KPE)."] #[inline(always)] - pub fn rxoverszg(&self) -> RXOVERSZG_R { - RXOVERSZG_R::new(self.bits) + pub fn rxoverszg(&self) -> RxoverszgR { + RxoverszgR::new(self.bits) } } #[doc = "Rx Oversize Frames Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_oversize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_OVERSIZE_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_OVERSIZE_FRAMES_GOOD_SPEC { +pub struct RxOversizeFramesGoodSpec; +impl crate::RegisterSpec for RxOversizeFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_oversize_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_OVERSIZE_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxOversizeFramesGoodSpec {} #[doc = "`reset()` method sets RX_OVERSIZE_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_OVERSIZE_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxOversizeFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_pause_frames.rs b/src/eth0/rx_pause_frames.rs index d9a756ef..5004d493 100644 --- a/src/eth0/rx_pause_frames.rs +++ b/src/eth0/rx_pause_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_PAUSE_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXPAUSEFRM` reader - This field indicates the number of received good and valid PAUSE frames."] -pub type RXPAUSEFRM_R = crate::FieldReader; +pub type RxpausefrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and valid PAUSE frames."] #[inline(always)] - pub fn rxpausefrm(&self) -> RXPAUSEFRM_R { - RXPAUSEFRM_R::new(self.bits) + pub fn rxpausefrm(&self) -> RxpausefrmR { + RxpausefrmR::new(self.bits) } } #[doc = "Receive Frame Count for PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_PAUSE_FRAMES_SPEC; -impl crate::RegisterSpec for RX_PAUSE_FRAMES_SPEC { +pub struct RxPauseFramesSpec; +impl crate::RegisterSpec for RxPauseFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_pause_frames::R`](R) reader structure"] -impl crate::Readable for RX_PAUSE_FRAMES_SPEC {} +impl crate::Readable for RxPauseFramesSpec {} #[doc = "`reset()` method sets RX_PAUSE_FRAMES to value 0"] -impl crate::Resettable for RX_PAUSE_FRAMES_SPEC { +impl crate::Resettable for RxPauseFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_receive_error_frames.rs b/src/eth0/rx_receive_error_frames.rs index 92263e15..21cb410e 100644 --- a/src/eth0/rx_receive_error_frames.rs +++ b/src/eth0/rx_receive_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_RECEIVE_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXRCVERR` reader - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] -pub type RXRCVERR_R = crate::FieldReader; +pub type RxrcverrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] #[inline(always)] - pub fn rxrcverr(&self) -> RXRCVERR_R { - RXRCVERR_R::new(self.bits) + pub fn rxrcverr(&self) -> RxrcverrR { + RxrcverrR::new(self.bits) } } #[doc = "Receive Frame Count for Receive Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_receive_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_RECEIVE_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_RECEIVE_ERROR_FRAMES_SPEC { +pub struct RxReceiveErrorFramesSpec; +impl crate::RegisterSpec for RxReceiveErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_receive_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_RECEIVE_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxReceiveErrorFramesSpec {} #[doc = "`reset()` method sets RX_RECEIVE_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_RECEIVE_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxReceiveErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_runt_error_frames.rs b/src/eth0/rx_runt_error_frames.rs index d840acfe..dcdbf960 100644 --- a/src/eth0/rx_runt_error_frames.rs +++ b/src/eth0/rx_runt_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_RUNT_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXRUNTERR` reader - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] -pub type RXRUNTERR_R = crate::FieldReader; +pub type RxrunterrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] #[inline(always)] - pub fn rxrunterr(&self) -> RXRUNTERR_R { - RXRUNTERR_R::new(self.bits) + pub fn rxrunterr(&self) -> RxrunterrR { + RxrunterrR::new(self.bits) } } #[doc = "Receive Frame Count for Runt Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_runt_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_RUNT_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_RUNT_ERROR_FRAMES_SPEC { +pub struct RxRuntErrorFramesSpec; +impl crate::RegisterSpec for RxRuntErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_runt_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_RUNT_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxRuntErrorFramesSpec {} #[doc = "`reset()` method sets RX_RUNT_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_RUNT_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxRuntErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_undersize_frames_good.rs b/src/eth0/rx_undersize_frames_good.rs index 32420602..cf8b068a 100644 --- a/src/eth0/rx_undersize_frames_good.rs +++ b/src/eth0/rx_undersize_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_UNDERSIZE_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUNDERSZG` reader - This field indicates the number of frames received with length less than 64 bytes and without errors."] -pub type RXUNDERSZG_R = crate::FieldReader; +pub type RxunderszgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with length less than 64 bytes and without errors."] #[inline(always)] - pub fn rxunderszg(&self) -> RXUNDERSZG_R { - RXUNDERSZG_R::new(self.bits) + pub fn rxunderszg(&self) -> RxunderszgR { + RxunderszgR::new(self.bits) } } #[doc = "Receive Frame Count for Undersize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_undersize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_UNDERSIZE_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_UNDERSIZE_FRAMES_GOOD_SPEC { +pub struct RxUndersizeFramesGoodSpec; +impl crate::RegisterSpec for RxUndersizeFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_undersize_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_UNDERSIZE_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxUndersizeFramesGoodSpec {} #[doc = "`reset()` method sets RX_UNDERSIZE_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_UNDERSIZE_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxUndersizeFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_unicast_frames_good.rs b/src/eth0/rx_unicast_frames_good.rs index 4882e81a..fd84b8c2 100644 --- a/src/eth0/rx_unicast_frames_good.rs +++ b/src/eth0/rx_unicast_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_UNICAST_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUCASTG` reader - This field indicates the number of received good unicast frames."] -pub type RXUCASTG_R = crate::FieldReader; +pub type RxucastgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good unicast frames."] #[inline(always)] - pub fn rxucastg(&self) -> RXUCASTG_R { - RXUCASTG_R::new(self.bits) + pub fn rxucastg(&self) -> RxucastgR { + RxucastgR::new(self.bits) } } #[doc = "Receive Frame Count for Good Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_unicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_UNICAST_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for RX_UNICAST_FRAMES_GOOD_SPEC { +pub struct RxUnicastFramesGoodSpec; +impl crate::RegisterSpec for RxUnicastFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_unicast_frames_good::R`](R) reader structure"] -impl crate::Readable for RX_UNICAST_FRAMES_GOOD_SPEC {} +impl crate::Readable for RxUnicastFramesGoodSpec {} #[doc = "`reset()` method sets RX_UNICAST_FRAMES_GOOD to value 0"] -impl crate::Resettable for RX_UNICAST_FRAMES_GOOD_SPEC { +impl crate::Resettable for RxUnicastFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_vlan_frames_good_bad.rs b/src/eth0/rx_vlan_frames_good_bad.rs index c6045da3..6b046962 100644 --- a/src/eth0/rx_vlan_frames_good_bad.rs +++ b/src/eth0/rx_vlan_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_VLAN_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXVLANFRGB` reader - This field indicates the number of received good and bad VLAN frames."] -pub type RXVLANFRGB_R = crate::FieldReader; +pub type RxvlanfrgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good and bad VLAN frames."] #[inline(always)] - pub fn rxvlanfrgb(&self) -> RXVLANFRGB_R { - RXVLANFRGB_R::new(self.bits) + pub fn rxvlanfrgb(&self) -> RxvlanfrgbR { + RxvlanfrgbR::new(self.bits) } } #[doc = "Receive Frame Count for Good and Bad VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_vlan_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_VLAN_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for RX_VLAN_FRAMES_GOOD_BAD_SPEC { +pub struct RxVlanFramesGoodBadSpec; +impl crate::RegisterSpec for RxVlanFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_vlan_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for RX_VLAN_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for RxVlanFramesGoodBadSpec {} #[doc = "`reset()` method sets RX_VLAN_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for RX_VLAN_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for RxVlanFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rx_watchdog_error_frames.rs b/src/eth0/rx_watchdog_error_frames.rs index c49ad1a6..6cf96e45 100644 --- a/src/eth0/rx_watchdog_error_frames.rs +++ b/src/eth0/rx_watchdog_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RX_WATCHDOG_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXWDGERR` reader - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] -pub type RXWDGERR_R = crate::FieldReader; +pub type RxwdgerrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames received with error because of the watchdog timeout error (frames with more than 2,048 bytes data load)."] #[inline(always)] - pub fn rxwdgerr(&self) -> RXWDGERR_R { - RXWDGERR_R::new(self.bits) + pub fn rxwdgerr(&self) -> RxwdgerrR { + RxwdgerrR::new(self.bits) } } #[doc = "Receive Frame Count for Watchdog Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_watchdog_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RX_WATCHDOG_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RX_WATCHDOG_ERROR_FRAMES_SPEC { +pub struct RxWatchdogErrorFramesSpec; +impl crate::RegisterSpec for RxWatchdogErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rx_watchdog_error_frames::R`](R) reader structure"] -impl crate::Readable for RX_WATCHDOG_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxWatchdogErrorFramesSpec {} #[doc = "`reset()` method sets RX_WATCHDOG_ERROR_FRAMES to value 0"] -impl crate::Resettable for RX_WATCHDOG_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxWatchdogErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxicmp_error_frames.rs b/src/eth0/rxicmp_error_frames.rs index 0f8b6ea6..84dde91c 100644 --- a/src/eth0/rxicmp_error_frames.rs +++ b/src/eth0/rxicmp_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXICMP_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXICMPERRFRM` reader - This field indicates the number of good IP datagrams whose ICMP payload has a checksum error."] -pub type RXICMPERRFRM_R = crate::FieldReader; +pub type RxicmperrfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams whose ICMP payload has a checksum error."] #[inline(always)] - pub fn rxicmperrfrm(&self) -> RXICMPERRFRM_R { - RXICMPERRFRM_R::new(self.bits) + pub fn rxicmperrfrm(&self) -> RxicmperrfrmR { + RxicmperrfrmR::new(self.bits) } } #[doc = "RxICMP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXICMP_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RXICMP_ERROR_FRAMES_SPEC { +pub struct RxicmpErrorFramesSpec; +impl crate::RegisterSpec for RxicmpErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxicmp_error_frames::R`](R) reader structure"] -impl crate::Readable for RXICMP_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxicmpErrorFramesSpec {} #[doc = "`reset()` method sets RXICMP_ERROR_FRAMES to value 0"] -impl crate::Resettable for RXICMP_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxicmpErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxicmp_error_octets.rs b/src/eth0/rxicmp_error_octets.rs index 697a1f3c..bc07c95c 100644 --- a/src/eth0/rxicmp_error_octets.rs +++ b/src/eth0/rxicmp_error_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXICMP_ERROR_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXICMPERROCT` reader - Number of bytes received in an ICMP segment with checksum errors"] -pub type RXICMPERROCT_R = crate::FieldReader; +pub type RxicmperroctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Number of bytes received in an ICMP segment with checksum errors"] #[inline(always)] - pub fn rxicmperroct(&self) -> RXICMPERROCT_R { - RXICMPERROCT_R::new(self.bits) + pub fn rxicmperroct(&self) -> RxicmperroctR { + RxicmperroctR::new(self.bits) } } #[doc = "Receive ICMP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXICMP_ERROR_OCTETS_SPEC; -impl crate::RegisterSpec for RXICMP_ERROR_OCTETS_SPEC { +pub struct RxicmpErrorOctetsSpec; +impl crate::RegisterSpec for RxicmpErrorOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxicmp_error_octets::R`](R) reader structure"] -impl crate::Readable for RXICMP_ERROR_OCTETS_SPEC {} +impl crate::Readable for RxicmpErrorOctetsSpec {} #[doc = "`reset()` method sets RXICMP_ERROR_OCTETS to value 0"] -impl crate::Resettable for RXICMP_ERROR_OCTETS_SPEC { +impl crate::Resettable for RxicmpErrorOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxicmp_good_frames.rs b/src/eth0/rxicmp_good_frames.rs index 350f656a..c9b027ed 100644 --- a/src/eth0/rxicmp_good_frames.rs +++ b/src/eth0/rxicmp_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXICMP_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXICMPGDFRM` reader - This field indicates the number of good IP datagrams with a good ICMP payload."] -pub type RXICMPGDFRM_R = crate::FieldReader; +pub type RxicmpgdfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams with a good ICMP payload."] #[inline(always)] - pub fn rxicmpgdfrm(&self) -> RXICMPGDFRM_R { - RXICMPGDFRM_R::new(self.bits) + pub fn rxicmpgdfrm(&self) -> RxicmpgdfrmR { + RxicmpgdfrmR::new(self.bits) } } #[doc = "RxICMP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXICMP_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for RXICMP_GOOD_FRAMES_SPEC { +pub struct RxicmpGoodFramesSpec; +impl crate::RegisterSpec for RxicmpGoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxicmp_good_frames::R`](R) reader structure"] -impl crate::Readable for RXICMP_GOOD_FRAMES_SPEC {} +impl crate::Readable for RxicmpGoodFramesSpec {} #[doc = "`reset()` method sets RXICMP_GOOD_FRAMES to value 0"] -impl crate::Resettable for RXICMP_GOOD_FRAMES_SPEC { +impl crate::Resettable for RxicmpGoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxicmp_good_octets.rs b/src/eth0/rxicmp_good_octets.rs index 73ef7133..29cecece 100644 --- a/src/eth0/rxicmp_good_octets.rs +++ b/src/eth0/rxicmp_good_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXICMP_GOOD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXICMPGDOCT` reader - This field indicates the number of bytes received in a good ICMP segment. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXICMPGDOCT_R = crate::FieldReader; +pub type RxicmpgdoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in a good ICMP segment. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxicmpgdoct(&self) -> RXICMPGDOCT_R { - RXICMPGDOCT_R::new(self.bits) + pub fn rxicmpgdoct(&self) -> RxicmpgdoctR { + RxicmpgdoctR::new(self.bits) } } #[doc = "Receive ICMP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxicmp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXICMP_GOOD_OCTETS_SPEC; -impl crate::RegisterSpec for RXICMP_GOOD_OCTETS_SPEC { +pub struct RxicmpGoodOctetsSpec; +impl crate::RegisterSpec for RxicmpGoodOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxicmp_good_octets::R`](R) reader structure"] -impl crate::Readable for RXICMP_GOOD_OCTETS_SPEC {} +impl crate::Readable for RxicmpGoodOctetsSpec {} #[doc = "`reset()` method sets RXICMP_GOOD_OCTETS to value 0"] -impl crate::Resettable for RXICMP_GOOD_OCTETS_SPEC { +impl crate::Resettable for RxicmpGoodOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_fragmented_frames.rs b/src/eth0/rxipv4_fragmented_frames.rs index c27990aa..d5252726 100644 --- a/src/eth0/rxipv4_fragmented_frames.rs +++ b/src/eth0/rxipv4_fragmented_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_FRAGMENTED_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4FRAGFRM` reader - This field indicates the number of good IPv4 datagrams received with fragmentation."] -pub type RXIPV4FRAGFRM_R = crate::FieldReader; +pub type Rxipv4fragfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IPv4 datagrams received with fragmentation."] #[inline(always)] - pub fn rxipv4fragfrm(&self) -> RXIPV4FRAGFRM_R { - RXIPV4FRAGFRM_R::new(self.bits) + pub fn rxipv4fragfrm(&self) -> Rxipv4fragfrmR { + Rxipv4fragfrmR::new(self.bits) } } #[doc = "Receive IPV4 Fragmented Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_FRAGMENTED_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV4_FRAGMENTED_FRAMES_SPEC { +pub struct Rxipv4FragmentedFramesSpec; +impl crate::RegisterSpec for Rxipv4FragmentedFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_fragmented_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV4_FRAGMENTED_FRAMES_SPEC {} +impl crate::Readable for Rxipv4FragmentedFramesSpec {} #[doc = "`reset()` method sets RXIPV4_FRAGMENTED_FRAMES to value 0"] -impl crate::Resettable for RXIPV4_FRAGMENTED_FRAMES_SPEC { +impl crate::Resettable for Rxipv4FragmentedFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_fragmented_octets.rs b/src/eth0/rxipv4_fragmented_octets.rs index adc385dd..2e8d7cc4 100644 --- a/src/eth0/rxipv4_fragmented_octets.rs +++ b/src/eth0/rxipv4_fragmented_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_FRAGMENTED_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4FRAGOCT` reader - This field indicates the number of bytes received in fragmented IPv4 datagrams. The value in the IPv4 headers Length field is used to update this counter."] -pub type RXIPV4FRAGOCT_R = crate::FieldReader; +pub type Rxipv4fragoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in fragmented IPv4 datagrams. The value in the IPv4 headers Length field is used to update this counter."] #[inline(always)] - pub fn rxipv4fragoct(&self) -> RXIPV4FRAGOCT_R { - RXIPV4FRAGOCT_R::new(self.bits) + pub fn rxipv4fragoct(&self) -> Rxipv4fragoctR { + Rxipv4fragoctR::new(self.bits) } } #[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_fragmented_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_FRAGMENTED_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV4_FRAGMENTED_OCTETS_SPEC { +pub struct Rxipv4FragmentedOctetsSpec; +impl crate::RegisterSpec for Rxipv4FragmentedOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_fragmented_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV4_FRAGMENTED_OCTETS_SPEC {} +impl crate::Readable for Rxipv4FragmentedOctetsSpec {} #[doc = "`reset()` method sets RXIPV4_FRAGMENTED_OCTETS to value 0"] -impl crate::Resettable for RXIPV4_FRAGMENTED_OCTETS_SPEC { +impl crate::Resettable for Rxipv4FragmentedOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_good_frames.rs b/src/eth0/rxipv4_good_frames.rs index 96ee0303..9ef5561c 100644 --- a/src/eth0/rxipv4_good_frames.rs +++ b/src/eth0/rxipv4_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4GDFRM` reader - This field indicates the number of good IPv4 datagrams received with the TCP, UDP, or ICMP payload."] -pub type RXIPV4GDFRM_R = crate::FieldReader; +pub type Rxipv4gdfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IPv4 datagrams received with the TCP, UDP, or ICMP payload."] #[inline(always)] - pub fn rxipv4gdfrm(&self) -> RXIPV4GDFRM_R { - RXIPV4GDFRM_R::new(self.bits) + pub fn rxipv4gdfrm(&self) -> Rxipv4gdfrmR { + Rxipv4gdfrmR::new(self.bits) } } #[doc = "RxIPv4 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV4_GOOD_FRAMES_SPEC { +pub struct Rxipv4GoodFramesSpec; +impl crate::RegisterSpec for Rxipv4GoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_good_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV4_GOOD_FRAMES_SPEC {} +impl crate::Readable for Rxipv4GoodFramesSpec {} #[doc = "`reset()` method sets RXIPV4_GOOD_FRAMES to value 0"] -impl crate::Resettable for RXIPV4_GOOD_FRAMES_SPEC { +impl crate::Resettable for Rxipv4GoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_good_octets.rs b/src/eth0/rxipv4_good_octets.rs index 0cb19e08..4e41c4dc 100644 --- a/src/eth0/rxipv4_good_octets.rs +++ b/src/eth0/rxipv4_good_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_GOOD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4GDOCT` reader - This field indicates the number of bytes received in good IPv4 datagrams encapsulating TCP, UDP, or ICMP data. The Ethernet header, FCS, pad, or IP pad"] -pub type RXIPV4GDOCT_R = crate::FieldReader; +pub type Rxipv4gdoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in good IPv4 datagrams encapsulating TCP, UDP, or ICMP data. The Ethernet header, FCS, pad, or IP pad"] #[inline(always)] - pub fn rxipv4gdoct(&self) -> RXIPV4GDOCT_R { - RXIPV4GDOCT_R::new(self.bits) + pub fn rxipv4gdoct(&self) -> Rxipv4gdoctR { + Rxipv4gdoctR::new(self.bits) } } #[doc = "RxIPv4 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_GOOD_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV4_GOOD_OCTETS_SPEC { +pub struct Rxipv4GoodOctetsSpec; +impl crate::RegisterSpec for Rxipv4GoodOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_good_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV4_GOOD_OCTETS_SPEC {} +impl crate::Readable for Rxipv4GoodOctetsSpec {} #[doc = "`reset()` method sets RXIPV4_GOOD_OCTETS to value 0"] -impl crate::Resettable for RXIPV4_GOOD_OCTETS_SPEC { +impl crate::Resettable for Rxipv4GoodOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_header_error_frames.rs b/src/eth0/rxipv4_header_error_frames.rs index cda4e729..b8cc3c9d 100644 --- a/src/eth0/rxipv4_header_error_frames.rs +++ b/src/eth0/rxipv4_header_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_HEADER_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4HDRERRFRM` reader - This field indicates the number of IPv4 datagrams received with header errors (checksum, length, or version mismatch)."] -pub type RXIPV4HDRERRFRM_R = crate::FieldReader; +pub type Rxipv4hdrerrfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of IPv4 datagrams received with header errors (checksum, length, or version mismatch)."] #[inline(always)] - pub fn rxipv4hdrerrfrm(&self) -> RXIPV4HDRERRFRM_R { - RXIPV4HDRERRFRM_R::new(self.bits) + pub fn rxipv4hdrerrfrm(&self) -> Rxipv4hdrerrfrmR { + Rxipv4hdrerrfrmR::new(self.bits) } } #[doc = "Receive IPV4 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_HEADER_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV4_HEADER_ERROR_FRAMES_SPEC { +pub struct Rxipv4HeaderErrorFramesSpec; +impl crate::RegisterSpec for Rxipv4HeaderErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_header_error_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV4_HEADER_ERROR_FRAMES_SPEC {} +impl crate::Readable for Rxipv4HeaderErrorFramesSpec {} #[doc = "`reset()` method sets RXIPV4_HEADER_ERROR_FRAMES to value 0"] -impl crate::Resettable for RXIPV4_HEADER_ERROR_FRAMES_SPEC { +impl crate::Resettable for Rxipv4HeaderErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_header_error_octets.rs b/src/eth0/rxipv4_header_error_octets.rs index c38fc1ab..a440967a 100644 --- a/src/eth0/rxipv4_header_error_octets.rs +++ b/src/eth0/rxipv4_header_error_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_HEADER_ERROR_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4HDRERROCT` reader - This field indicates the number of bytes received in the IPv4 datagrams with header errors (checksum, length, or version mismatch). The value in the Length field of IPv4 header is used to update this counter."] -pub type RXIPV4HDRERROCT_R = crate::FieldReader; +pub type Rxipv4hdrerroctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in the IPv4 datagrams with header errors (checksum, length, or version mismatch). The value in the Length field of IPv4 header is used to update this counter."] #[inline(always)] - pub fn rxipv4hdrerroct(&self) -> RXIPV4HDRERROCT_R { - RXIPV4HDRERROCT_R::new(self.bits) + pub fn rxipv4hdrerroct(&self) -> Rxipv4hdrerroctR { + Rxipv4hdrerroctR::new(self.bits) } } #[doc = "Receive IPV4 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_HEADER_ERROR_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV4_HEADER_ERROR_OCTETS_SPEC { +pub struct Rxipv4HeaderErrorOctetsSpec; +impl crate::RegisterSpec for Rxipv4HeaderErrorOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_header_error_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV4_HEADER_ERROR_OCTETS_SPEC {} +impl crate::Readable for Rxipv4HeaderErrorOctetsSpec {} #[doc = "`reset()` method sets RXIPV4_HEADER_ERROR_OCTETS to value 0"] -impl crate::Resettable for RXIPV4_HEADER_ERROR_OCTETS_SPEC { +impl crate::Resettable for Rxipv4HeaderErrorOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_no_payload_frames.rs b/src/eth0/rxipv4_no_payload_frames.rs index 06a0129b..c153b2d4 100644 --- a/src/eth0/rxipv4_no_payload_frames.rs +++ b/src/eth0/rxipv4_no_payload_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_NO_PAYLOAD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4NOPAYFRM` reader - This field indicates the number of IPv4 datagram frames received that did not have a TCP, UDP, or ICMP payload processed by the Checksum engine."] -pub type RXIPV4NOPAYFRM_R = crate::FieldReader; +pub type Rxipv4nopayfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of IPv4 datagram frames received that did not have a TCP, UDP, or ICMP payload processed by the Checksum engine."] #[inline(always)] - pub fn rxipv4nopayfrm(&self) -> RXIPV4NOPAYFRM_R { - RXIPV4NOPAYFRM_R::new(self.bits) + pub fn rxipv4nopayfrm(&self) -> Rxipv4nopayfrmR { + Rxipv4nopayfrmR::new(self.bits) } } #[doc = "Receive IPV4 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_NO_PAYLOAD_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV4_NO_PAYLOAD_FRAMES_SPEC { +pub struct Rxipv4NoPayloadFramesSpec; +impl crate::RegisterSpec for Rxipv4NoPayloadFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_no_payload_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV4_NO_PAYLOAD_FRAMES_SPEC {} +impl crate::Readable for Rxipv4NoPayloadFramesSpec {} #[doc = "`reset()` method sets RXIPV4_NO_PAYLOAD_FRAMES to value 0"] -impl crate::Resettable for RXIPV4_NO_PAYLOAD_FRAMES_SPEC { +impl crate::Resettable for Rxipv4NoPayloadFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_no_payload_octets.rs b/src/eth0/rxipv4_no_payload_octets.rs index 0805e8d5..ea43bba5 100644 --- a/src/eth0/rxipv4_no_payload_octets.rs +++ b/src/eth0/rxipv4_no_payload_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_NO_PAYLOAD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4NOPAYOCT` reader - This field indicates the number of bytes received in IPv4 datagrams that did not have a TCP, UDP, or ICMP payload. The value in the IPv4 headers Length field is used to update this counter."] -pub type RXIPV4NOPAYOCT_R = crate::FieldReader; +pub type Rxipv4nopayoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in IPv4 datagrams that did not have a TCP, UDP, or ICMP payload. The value in the IPv4 headers Length field is used to update this counter."] #[inline(always)] - pub fn rxipv4nopayoct(&self) -> RXIPV4NOPAYOCT_R { - RXIPV4NOPAYOCT_R::new(self.bits) + pub fn rxipv4nopayoct(&self) -> Rxipv4nopayoctR { + Rxipv4nopayoctR::new(self.bits) } } #[doc = "Receive IPV4 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_NO_PAYLOAD_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV4_NO_PAYLOAD_OCTETS_SPEC { +pub struct Rxipv4NoPayloadOctetsSpec; +impl crate::RegisterSpec for Rxipv4NoPayloadOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_no_payload_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV4_NO_PAYLOAD_OCTETS_SPEC {} +impl crate::Readable for Rxipv4NoPayloadOctetsSpec {} #[doc = "`reset()` method sets RXIPV4_NO_PAYLOAD_OCTETS to value 0"] -impl crate::Resettable for RXIPV4_NO_PAYLOAD_OCTETS_SPEC { +impl crate::Resettable for Rxipv4NoPayloadOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_udp_checksum_disable_octets.rs b/src/eth0/rxipv4_udp_checksum_disable_octets.rs index 8a563e1a..0f10d0cd 100644 --- a/src/eth0/rxipv4_udp_checksum_disable_octets.rs +++ b/src/eth0/rxipv4_udp_checksum_disable_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4UDSBLOCT` reader - This field indicates the number of bytes received in a UDP segment that had the UDP checksum disabled. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXIPV4UDSBLOCT_R = crate::FieldReader; +pub type Rxipv4udsbloctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in a UDP segment that had the UDP checksum disabled. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxipv4udsbloct(&self) -> RXIPV4UDSBLOCT_R { - RXIPV4UDSBLOCT_R::new(self.bits) + pub fn rxipv4udsbloct(&self) -> Rxipv4udsbloctR { + Rxipv4udsbloctR::new(self.bits) } } #[doc = "Receive IPV4 Fragmented Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disable_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC { +pub struct Rxipv4UdpChecksumDisableOctetsSpec; +impl crate::RegisterSpec for Rxipv4UdpChecksumDisableOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_udp_checksum_disable_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC {} +impl crate::Readable for Rxipv4UdpChecksumDisableOctetsSpec {} #[doc = "`reset()` method sets RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS to value 0"] -impl crate::Resettable for RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS_SPEC { +impl crate::Resettable for Rxipv4UdpChecksumDisableOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv4_udp_checksum_disabled_frames.rs b/src/eth0/rxipv4_udp_checksum_disabled_frames.rs index 56153397..f75d28b2 100644 --- a/src/eth0/rxipv4_udp_checksum_disabled_frames.rs +++ b/src/eth0/rxipv4_udp_checksum_disabled_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV4UDSBLFRM` reader - This field indicates the number of received good IPv4 datagrams which have the UDP payload with checksum disabled."] -pub type RXIPV4UDSBLFRM_R = crate::FieldReader; +pub type Rxipv4udsblfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of received good IPv4 datagrams which have the UDP payload with checksum disabled."] #[inline(always)] - pub fn rxipv4udsblfrm(&self) -> RXIPV4UDSBLFRM_R { - RXIPV4UDSBLFRM_R::new(self.bits) + pub fn rxipv4udsblfrm(&self) -> Rxipv4udsblfrmR { + Rxipv4udsblfrmR::new(self.bits) } } #[doc = "Receive IPV4 UDP Checksum Disabled Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv4_udp_checksum_disabled_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC { +pub struct Rxipv4UdpChecksumDisabledFramesSpec; +impl crate::RegisterSpec for Rxipv4UdpChecksumDisabledFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv4_udp_checksum_disabled_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC {} +impl crate::Readable for Rxipv4UdpChecksumDisabledFramesSpec {} #[doc = "`reset()` method sets RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES to value 0"] -impl crate::Resettable for RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES_SPEC { +impl crate::Resettable for Rxipv4UdpChecksumDisabledFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_good_frames.rs b/src/eth0/rxipv6_good_frames.rs index 6077c681..905395e1 100644 --- a/src/eth0/rxipv6_good_frames.rs +++ b/src/eth0/rxipv6_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6GDFRM` reader - This field indicates the number of good IPv6 datagrams received with TCP, UDP, or ICMP payloads."] -pub type RXIPV6GDFRM_R = crate::FieldReader; +pub type Rxipv6gdfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IPv6 datagrams received with TCP, UDP, or ICMP payloads."] #[inline(always)] - pub fn rxipv6gdfrm(&self) -> RXIPV6GDFRM_R { - RXIPV6GDFRM_R::new(self.bits) + pub fn rxipv6gdfrm(&self) -> Rxipv6gdfrmR { + Rxipv6gdfrmR::new(self.bits) } } #[doc = "RxIPv6 Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV6_GOOD_FRAMES_SPEC { +pub struct Rxipv6GoodFramesSpec; +impl crate::RegisterSpec for Rxipv6GoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_good_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV6_GOOD_FRAMES_SPEC {} +impl crate::Readable for Rxipv6GoodFramesSpec {} #[doc = "`reset()` method sets RXIPV6_GOOD_FRAMES to value 0"] -impl crate::Resettable for RXIPV6_GOOD_FRAMES_SPEC { +impl crate::Resettable for Rxipv6GoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_good_octets.rs b/src/eth0/rxipv6_good_octets.rs index 255f23ad..49f2220a 100644 --- a/src/eth0/rxipv6_good_octets.rs +++ b/src/eth0/rxipv6_good_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_GOOD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6GDOCT` reader - Thsi field indicates the number of bytes received in good IPv6 datagrams encapsulating TCP, UDP or ICMPv6 data."] -pub type RXIPV6GDOCT_R = crate::FieldReader; +pub type Rxipv6gdoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Thsi field indicates the number of bytes received in good IPv6 datagrams encapsulating TCP, UDP or ICMPv6 data."] #[inline(always)] - pub fn rxipv6gdoct(&self) -> RXIPV6GDOCT_R { - RXIPV6GDOCT_R::new(self.bits) + pub fn rxipv6gdoct(&self) -> Rxipv6gdoctR { + Rxipv6gdoctR::new(self.bits) } } #[doc = "RxIPv6 Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_GOOD_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV6_GOOD_OCTETS_SPEC { +pub struct Rxipv6GoodOctetsSpec; +impl crate::RegisterSpec for Rxipv6GoodOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_good_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV6_GOOD_OCTETS_SPEC {} +impl crate::Readable for Rxipv6GoodOctetsSpec {} #[doc = "`reset()` method sets RXIPV6_GOOD_OCTETS to value 0"] -impl crate::Resettable for RXIPV6_GOOD_OCTETS_SPEC { +impl crate::Resettable for Rxipv6GoodOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_header_error_frames.rs b/src/eth0/rxipv6_header_error_frames.rs index a5d1df7d..997751e4 100644 --- a/src/eth0/rxipv6_header_error_frames.rs +++ b/src/eth0/rxipv6_header_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_HEADER_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6HDRERRFRM` reader - This field indicates the number of IPv6 datagrams received with header errors (length or version mismatch)."] -pub type RXIPV6HDRERRFRM_R = crate::FieldReader; +pub type Rxipv6hdrerrfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of IPv6 datagrams received with header errors (length or version mismatch)."] #[inline(always)] - pub fn rxipv6hdrerrfrm(&self) -> RXIPV6HDRERRFRM_R { - RXIPV6HDRERRFRM_R::new(self.bits) + pub fn rxipv6hdrerrfrm(&self) -> Rxipv6hdrerrfrmR { + Rxipv6hdrerrfrmR::new(self.bits) } } #[doc = "Receive IPV6 Header Error Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_HEADER_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV6_HEADER_ERROR_FRAMES_SPEC { +pub struct Rxipv6HeaderErrorFramesSpec; +impl crate::RegisterSpec for Rxipv6HeaderErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_header_error_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV6_HEADER_ERROR_FRAMES_SPEC {} +impl crate::Readable for Rxipv6HeaderErrorFramesSpec {} #[doc = "`reset()` method sets RXIPV6_HEADER_ERROR_FRAMES to value 0"] -impl crate::Resettable for RXIPV6_HEADER_ERROR_FRAMES_SPEC { +impl crate::Resettable for Rxipv6HeaderErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_header_error_octets.rs b/src/eth0/rxipv6_header_error_octets.rs index 572058aa..28eaae6e 100644 --- a/src/eth0/rxipv6_header_error_octets.rs +++ b/src/eth0/rxipv6_header_error_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_HEADER_ERROR_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6HDRERROCT` reader - This field indicates the number of bytes received in IPv6 datagrams with header errors (length or version mismatch). The value in the IPv6 headers Length field is used to update this counter."] -pub type RXIPV6HDRERROCT_R = crate::FieldReader; +pub type Rxipv6hdrerroctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in IPv6 datagrams with header errors (length or version mismatch). The value in the IPv6 headers Length field is used to update this counter."] #[inline(always)] - pub fn rxipv6hdrerroct(&self) -> RXIPV6HDRERROCT_R { - RXIPV6HDRERROCT_R::new(self.bits) + pub fn rxipv6hdrerroct(&self) -> Rxipv6hdrerroctR { + Rxipv6hdrerroctR::new(self.bits) } } #[doc = "Receive IPV6 Header Error Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_header_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_HEADER_ERROR_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV6_HEADER_ERROR_OCTETS_SPEC { +pub struct Rxipv6HeaderErrorOctetsSpec; +impl crate::RegisterSpec for Rxipv6HeaderErrorOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_header_error_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV6_HEADER_ERROR_OCTETS_SPEC {} +impl crate::Readable for Rxipv6HeaderErrorOctetsSpec {} #[doc = "`reset()` method sets RXIPV6_HEADER_ERROR_OCTETS to value 0"] -impl crate::Resettable for RXIPV6_HEADER_ERROR_OCTETS_SPEC { +impl crate::Resettable for Rxipv6HeaderErrorOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_no_payload_frames.rs b/src/eth0/rxipv6_no_payload_frames.rs index 7a3a694a..0187db09 100644 --- a/src/eth0/rxipv6_no_payload_frames.rs +++ b/src/eth0/rxipv6_no_payload_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_NO_PAYLOAD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6NOPAYFRM` reader - This field indicates the number of IPv6 datagram frames received that did not have a TCP, UDP, or ICMP payload. This includes all IPv6 datagrams with fragmentation or security extension headers."] -pub type RXIPV6NOPAYFRM_R = crate::FieldReader; +pub type Rxipv6nopayfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of IPv6 datagram frames received that did not have a TCP, UDP, or ICMP payload. This includes all IPv6 datagrams with fragmentation or security extension headers."] #[inline(always)] - pub fn rxipv6nopayfrm(&self) -> RXIPV6NOPAYFRM_R { - RXIPV6NOPAYFRM_R::new(self.bits) + pub fn rxipv6nopayfrm(&self) -> Rxipv6nopayfrmR { + Rxipv6nopayfrmR::new(self.bits) } } #[doc = "Receive IPV6 No Payload Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_NO_PAYLOAD_FRAMES_SPEC; -impl crate::RegisterSpec for RXIPV6_NO_PAYLOAD_FRAMES_SPEC { +pub struct Rxipv6NoPayloadFramesSpec; +impl crate::RegisterSpec for Rxipv6NoPayloadFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_no_payload_frames::R`](R) reader structure"] -impl crate::Readable for RXIPV6_NO_PAYLOAD_FRAMES_SPEC {} +impl crate::Readable for Rxipv6NoPayloadFramesSpec {} #[doc = "`reset()` method sets RXIPV6_NO_PAYLOAD_FRAMES to value 0"] -impl crate::Resettable for RXIPV6_NO_PAYLOAD_FRAMES_SPEC { +impl crate::Resettable for Rxipv6NoPayloadFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxipv6_no_payload_octets.rs b/src/eth0/rxipv6_no_payload_octets.rs index 6165c522..9af4e740 100644 --- a/src/eth0/rxipv6_no_payload_octets.rs +++ b/src/eth0/rxipv6_no_payload_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXIPV6_NO_PAYLOAD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXIPV6NOPAYOCT` reader - This field indicates the number of bytes received in IPv6 datagrams that did not have a TCP, UDP, or ICMP payload. The value in the IPv6 headers Length field is used to update this counter."] -pub type RXIPV6NOPAYOCT_R = crate::FieldReader; +pub type Rxipv6nopayoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in IPv6 datagrams that did not have a TCP, UDP, or ICMP payload. The value in the IPv6 headers Length field is used to update this counter."] #[inline(always)] - pub fn rxipv6nopayoct(&self) -> RXIPV6NOPAYOCT_R { - RXIPV6NOPAYOCT_R::new(self.bits) + pub fn rxipv6nopayoct(&self) -> Rxipv6nopayoctR { + Rxipv6nopayoctR::new(self.bits) } } #[doc = "Receive IPV6 No Payload Octet Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxipv6_no_payload_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXIPV6_NO_PAYLOAD_OCTETS_SPEC; -impl crate::RegisterSpec for RXIPV6_NO_PAYLOAD_OCTETS_SPEC { +pub struct Rxipv6NoPayloadOctetsSpec; +impl crate::RegisterSpec for Rxipv6NoPayloadOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxipv6_no_payload_octets::R`](R) reader structure"] -impl crate::Readable for RXIPV6_NO_PAYLOAD_OCTETS_SPEC {} +impl crate::Readable for Rxipv6NoPayloadOctetsSpec {} #[doc = "`reset()` method sets RXIPV6_NO_PAYLOAD_OCTETS to value 0"] -impl crate::Resettable for RXIPV6_NO_PAYLOAD_OCTETS_SPEC { +impl crate::Resettable for Rxipv6NoPayloadOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxtcp_error_frames.rs b/src/eth0/rxtcp_error_frames.rs index 906af0b7..0de6f856 100644 --- a/src/eth0/rxtcp_error_frames.rs +++ b/src/eth0/rxtcp_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXTCP_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXTCPERRFRM` reader - This field indicates the number of good IP datagrams whose TCP payload has a checksum error."] -pub type RXTCPERRFRM_R = crate::FieldReader; +pub type RxtcperrfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams whose TCP payload has a checksum error."] #[inline(always)] - pub fn rxtcperrfrm(&self) -> RXTCPERRFRM_R { - RXTCPERRFRM_R::new(self.bits) + pub fn rxtcperrfrm(&self) -> RxtcperrfrmR { + RxtcperrfrmR::new(self.bits) } } #[doc = "RxTCP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXTCP_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RXTCP_ERROR_FRAMES_SPEC { +pub struct RxtcpErrorFramesSpec; +impl crate::RegisterSpec for RxtcpErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxtcp_error_frames::R`](R) reader structure"] -impl crate::Readable for RXTCP_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxtcpErrorFramesSpec {} #[doc = "`reset()` method sets RXTCP_ERROR_FRAMES to value 0"] -impl crate::Resettable for RXTCP_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxtcpErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxtcp_error_octets.rs b/src/eth0/rxtcp_error_octets.rs index 9f067968..74e4b81b 100644 --- a/src/eth0/rxtcp_error_octets.rs +++ b/src/eth0/rxtcp_error_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXTCP_ERROR_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXTCPERROCT` reader - Thsi field indicates the number of bytes received in a TCP segment with checksum errors. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXTCPERROCT_R = crate::FieldReader; +pub type RxtcperroctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Thsi field indicates the number of bytes received in a TCP segment with checksum errors. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxtcperroct(&self) -> RXTCPERROCT_R { - RXTCPERROCT_R::new(self.bits) + pub fn rxtcperroct(&self) -> RxtcperroctR { + RxtcperroctR::new(self.bits) } } #[doc = "Receive TCP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXTCP_ERROR_OCTETS_SPEC; -impl crate::RegisterSpec for RXTCP_ERROR_OCTETS_SPEC { +pub struct RxtcpErrorOctetsSpec; +impl crate::RegisterSpec for RxtcpErrorOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxtcp_error_octets::R`](R) reader structure"] -impl crate::Readable for RXTCP_ERROR_OCTETS_SPEC {} +impl crate::Readable for RxtcpErrorOctetsSpec {} #[doc = "`reset()` method sets RXTCP_ERROR_OCTETS to value 0"] -impl crate::Resettable for RXTCP_ERROR_OCTETS_SPEC { +impl crate::Resettable for RxtcpErrorOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxtcp_good_frames.rs b/src/eth0/rxtcp_good_frames.rs index 556ff979..5d1ebf32 100644 --- a/src/eth0/rxtcp_good_frames.rs +++ b/src/eth0/rxtcp_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXTCP_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXTCPGDFRM` reader - This field indicates the number of good IP datagrams with a good TCP payload."] -pub type RXTCPGDFRM_R = crate::FieldReader; +pub type RxtcpgdfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams with a good TCP payload."] #[inline(always)] - pub fn rxtcpgdfrm(&self) -> RXTCPGDFRM_R { - RXTCPGDFRM_R::new(self.bits) + pub fn rxtcpgdfrm(&self) -> RxtcpgdfrmR { + RxtcpgdfrmR::new(self.bits) } } #[doc = "RxTCP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXTCP_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for RXTCP_GOOD_FRAMES_SPEC { +pub struct RxtcpGoodFramesSpec; +impl crate::RegisterSpec for RxtcpGoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxtcp_good_frames::R`](R) reader structure"] -impl crate::Readable for RXTCP_GOOD_FRAMES_SPEC {} +impl crate::Readable for RxtcpGoodFramesSpec {} #[doc = "`reset()` method sets RXTCP_GOOD_FRAMES to value 0"] -impl crate::Resettable for RXTCP_GOOD_FRAMES_SPEC { +impl crate::Resettable for RxtcpGoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxtcp_good_octets.rs b/src/eth0/rxtcp_good_octets.rs index eb8a5e1c..f529b0fe 100644 --- a/src/eth0/rxtcp_good_octets.rs +++ b/src/eth0/rxtcp_good_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXTCP_GOOD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXTCPGDOCT` reader - This field indicates the number of bytes received in a good TCP segment. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXTCPGDOCT_R = crate::FieldReader; +pub type RxtcpgdoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in a good TCP segment. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxtcpgdoct(&self) -> RXTCPGDOCT_R { - RXTCPGDOCT_R::new(self.bits) + pub fn rxtcpgdoct(&self) -> RxtcpgdoctR { + RxtcpgdoctR::new(self.bits) } } #[doc = "Receive TCP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxtcp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXTCP_GOOD_OCTETS_SPEC; -impl crate::RegisterSpec for RXTCP_GOOD_OCTETS_SPEC { +pub struct RxtcpGoodOctetsSpec; +impl crate::RegisterSpec for RxtcpGoodOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxtcp_good_octets::R`](R) reader structure"] -impl crate::Readable for RXTCP_GOOD_OCTETS_SPEC {} +impl crate::Readable for RxtcpGoodOctetsSpec {} #[doc = "`reset()` method sets RXTCP_GOOD_OCTETS to value 0"] -impl crate::Resettable for RXTCP_GOOD_OCTETS_SPEC { +impl crate::Resettable for RxtcpGoodOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxudp_error_frames.rs b/src/eth0/rxudp_error_frames.rs index 5d15bbaf..ca75add2 100644 --- a/src/eth0/rxudp_error_frames.rs +++ b/src/eth0/rxudp_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXUDP_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUDPERRFRM` reader - This field indicates the number of good IP datagrams whose UDP payload has a checksum error."] -pub type RXUDPERRFRM_R = crate::FieldReader; +pub type RxudperrfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams whose UDP payload has a checksum error."] #[inline(always)] - pub fn rxudperrfrm(&self) -> RXUDPERRFRM_R { - RXUDPERRFRM_R::new(self.bits) + pub fn rxudperrfrm(&self) -> RxudperrfrmR { + RxudperrfrmR::new(self.bits) } } #[doc = "RxUDP Error Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXUDP_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for RXUDP_ERROR_FRAMES_SPEC { +pub struct RxudpErrorFramesSpec; +impl crate::RegisterSpec for RxudpErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxudp_error_frames::R`](R) reader structure"] -impl crate::Readable for RXUDP_ERROR_FRAMES_SPEC {} +impl crate::Readable for RxudpErrorFramesSpec {} #[doc = "`reset()` method sets RXUDP_ERROR_FRAMES to value 0"] -impl crate::Resettable for RXUDP_ERROR_FRAMES_SPEC { +impl crate::Resettable for RxudpErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxudp_error_octets.rs b/src/eth0/rxudp_error_octets.rs index 80be3ba4..c0c17561 100644 --- a/src/eth0/rxudp_error_octets.rs +++ b/src/eth0/rxudp_error_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXUDP_ERROR_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUDPERROCT` reader - This field indicates the number of bytes received in a UDP segment with checksum errors. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXUDPERROCT_R = crate::FieldReader; +pub type RxudperroctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in a UDP segment with checksum errors. This counter does not count the IP Header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxudperroct(&self) -> RXUDPERROCT_R { - RXUDPERROCT_R::new(self.bits) + pub fn rxudperroct(&self) -> RxudperroctR { + RxudperroctR::new(self.bits) } } #[doc = "Receive UDP Error Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_error_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXUDP_ERROR_OCTETS_SPEC; -impl crate::RegisterSpec for RXUDP_ERROR_OCTETS_SPEC { +pub struct RxudpErrorOctetsSpec; +impl crate::RegisterSpec for RxudpErrorOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxudp_error_octets::R`](R) reader structure"] -impl crate::Readable for RXUDP_ERROR_OCTETS_SPEC {} +impl crate::Readable for RxudpErrorOctetsSpec {} #[doc = "`reset()` method sets RXUDP_ERROR_OCTETS to value 0"] -impl crate::Resettable for RXUDP_ERROR_OCTETS_SPEC { +impl crate::Resettable for RxudpErrorOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxudp_good_frames.rs b/src/eth0/rxudp_good_frames.rs index d796052e..99df4686 100644 --- a/src/eth0/rxudp_good_frames.rs +++ b/src/eth0/rxudp_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXUDP_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUDPGDFRM` reader - This field indicates the number of good IP datagrams with a good UDP payload. This counter is not updated when the counter is incremented."] -pub type RXUDPGDFRM_R = crate::FieldReader; +pub type RxudpgdfrmR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good IP datagrams with a good UDP payload. This counter is not updated when the counter is incremented."] #[inline(always)] - pub fn rxudpgdfrm(&self) -> RXUDPGDFRM_R { - RXUDPGDFRM_R::new(self.bits) + pub fn rxudpgdfrm(&self) -> RxudpgdfrmR { + RxudpgdfrmR::new(self.bits) } } #[doc = "RxUDP Good Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXUDP_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for RXUDP_GOOD_FRAMES_SPEC { +pub struct RxudpGoodFramesSpec; +impl crate::RegisterSpec for RxudpGoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxudp_good_frames::R`](R) reader structure"] -impl crate::Readable for RXUDP_GOOD_FRAMES_SPEC {} +impl crate::Readable for RxudpGoodFramesSpec {} #[doc = "`reset()` method sets RXUDP_GOOD_FRAMES to value 0"] -impl crate::Resettable for RXUDP_GOOD_FRAMES_SPEC { +impl crate::Resettable for RxudpGoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/rxudp_good_octets.rs b/src/eth0/rxudp_good_octets.rs index 52798b60..13651d4f 100644 --- a/src/eth0/rxudp_good_octets.rs +++ b/src/eth0/rxudp_good_octets.rs @@ -1,22 +1,22 @@ #[doc = "Register `RXUDP_GOOD_OCTETS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RXUDPGDOCT` reader - This field indicates the number of bytes received in a good UDP segment. This counter does not count IP header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] -pub type RXUDPGDOCT_R = crate::FieldReader; +pub type RxudpgdoctR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes received in a good UDP segment. This counter does not count IP header bytes. The Ethernet header, FCS, pad, or IP pad bytes are not included in this counter."] #[inline(always)] - pub fn rxudpgdoct(&self) -> RXUDPGDOCT_R { - RXUDPGDOCT_R::new(self.bits) + pub fn rxudpgdoct(&self) -> RxudpgdoctR { + RxudpgdoctR::new(self.bits) } } #[doc = "Receive UDP Good Octets Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rxudp_good_octets::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RXUDP_GOOD_OCTETS_SPEC; -impl crate::RegisterSpec for RXUDP_GOOD_OCTETS_SPEC { +pub struct RxudpGoodOctetsSpec; +impl crate::RegisterSpec for RxudpGoodOctetsSpec { type Ux = u32; } #[doc = "`read()` method returns [`rxudp_good_octets::R`](R) reader structure"] -impl crate::Readable for RXUDP_GOOD_OCTETS_SPEC {} +impl crate::Readable for RxudpGoodOctetsSpec {} #[doc = "`reset()` method sets RXUDP_GOOD_OCTETS to value 0"] -impl crate::Resettable for RXUDP_GOOD_OCTETS_SPEC { +impl crate::Resettable for RxudpGoodOctetsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/status.rs b/src/eth0/status.rs index 1009e095..c652fe92 100644 --- a/src/eth0/status.rs +++ b/src/eth0/status.rs @@ -1,301 +1,292 @@ #[doc = "Register `STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STATUS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TI` reader - Transmit Interrupt"] -pub type TI_R = crate::BitReader; +pub type TiR = crate::BitReader; #[doc = "Field `TI` writer - Transmit Interrupt"] -pub type TI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TPS` reader - Transmit Process Stopped"] -pub type TPS_R = crate::BitReader; +pub type TpsR = crate::BitReader; #[doc = "Field `TPS` writer - Transmit Process Stopped"] -pub type TPS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TpsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TU` reader - Transmit Buffer Unavailable"] -pub type TU_R = crate::BitReader; +pub type TuR = crate::BitReader; #[doc = "Field `TU` writer - Transmit Buffer Unavailable"] -pub type TU_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TJT` reader - Transmit Jabber Timeout"] -pub type TJT_R = crate::BitReader; +pub type TjtR = crate::BitReader; #[doc = "Field `TJT` writer - Transmit Jabber Timeout"] -pub type TJT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TjtW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OVF` reader - Receive Overflow"] -pub type OVF_R = crate::BitReader; +pub type OvfR = crate::BitReader; #[doc = "Field `OVF` writer - Receive Overflow"] -pub type OVF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `UNF` reader - Transmit Underflow"] -pub type UNF_R = crate::BitReader; +pub type UnfR = crate::BitReader; #[doc = "Field `UNF` writer - Transmit Underflow"] -pub type UNF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UnfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RI` reader - Receive Interrupt"] -pub type RI_R = crate::BitReader; +pub type RiR = crate::BitReader; #[doc = "Field `RI` writer - Receive Interrupt"] -pub type RI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RU` reader - Receive Buffer Unavailable"] -pub type RU_R = crate::BitReader; +pub type RuR = crate::BitReader; #[doc = "Field `RU` writer - Receive Buffer Unavailable"] -pub type RU_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RuW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPS` reader - Receive Process Stopped"] -pub type RPS_R = crate::BitReader; +pub type RpsR = crate::BitReader; #[doc = "Field `RPS` writer - Receive Process Stopped"] -pub type RPS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWT` reader - Receive Watchdog Timeout"] -pub type RWT_R = crate::BitReader; +pub type RwtR = crate::BitReader; #[doc = "Field `RWT` writer - Receive Watchdog Timeout"] -pub type RWT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RwtW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ETI` reader - Early Transmit Interrupt"] -pub type ETI_R = crate::BitReader; +pub type EtiR = crate::BitReader; #[doc = "Field `ETI` writer - Early Transmit Interrupt"] -pub type ETI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EtiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FBI` reader - Fatal Bus Error Interrupt"] -pub type FBI_R = crate::BitReader; +pub type FbiR = crate::BitReader; #[doc = "Field `FBI` writer - Fatal Bus Error Interrupt"] -pub type FBI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FbiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ERI` reader - Early Receive Interrupt"] -pub type ERI_R = crate::BitReader; +pub type EriR = crate::BitReader; #[doc = "Field `ERI` writer - Early Receive Interrupt"] -pub type ERI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EriW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AIS` reader - Abnormal Interrupt Summary"] -pub type AIS_R = crate::BitReader; +pub type AisR = crate::BitReader; #[doc = "Field `AIS` writer - Abnormal Interrupt Summary"] -pub type AIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NIS` reader - Normal Interrupt Summary"] -pub type NIS_R = crate::BitReader; +pub type NisR = crate::BitReader; #[doc = "Field `NIS` writer - Normal Interrupt Summary"] -pub type NIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RS` reader - Received Process State"] -pub type RS_R = crate::FieldReader; +pub type RsR = crate::FieldReader; #[doc = "Field `TS` reader - Transmit Process State"] -pub type TS_R = crate::FieldReader; +pub type TsR = crate::FieldReader; #[doc = "Field `EB` reader - Error Bits"] -pub type EB_R = crate::FieldReader; +pub type EbR = crate::FieldReader; #[doc = "Field `EMI` reader - ETH MMC Interrupt"] -pub type EMI_R = crate::BitReader; +pub type EmiR = crate::BitReader; #[doc = "Field `EPI` reader - ETH PMT Interrupt"] -pub type EPI_R = crate::BitReader; +pub type EpiR = crate::BitReader; #[doc = "Field `TTI` reader - Timestamp Trigger Interrupt"] -pub type TTI_R = crate::BitReader; +pub type TtiR = crate::BitReader; impl R { #[doc = "Bit 0 - Transmit Interrupt"] #[inline(always)] - pub fn ti(&self) -> TI_R { - TI_R::new((self.bits & 1) != 0) + pub fn ti(&self) -> TiR { + TiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Process Stopped"] #[inline(always)] - pub fn tps(&self) -> TPS_R { - TPS_R::new(((self.bits >> 1) & 1) != 0) + pub fn tps(&self) -> TpsR { + TpsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Transmit Buffer Unavailable"] #[inline(always)] - pub fn tu(&self) -> TU_R { - TU_R::new(((self.bits >> 2) & 1) != 0) + pub fn tu(&self) -> TuR { + TuR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Transmit Jabber Timeout"] #[inline(always)] - pub fn tjt(&self) -> TJT_R { - TJT_R::new(((self.bits >> 3) & 1) != 0) + pub fn tjt(&self) -> TjtR { + TjtR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive Overflow"] #[inline(always)] - pub fn ovf(&self) -> OVF_R { - OVF_R::new(((self.bits >> 4) & 1) != 0) + pub fn ovf(&self) -> OvfR { + OvfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Transmit Underflow"] #[inline(always)] - pub fn unf(&self) -> UNF_R { - UNF_R::new(((self.bits >> 5) & 1) != 0) + pub fn unf(&self) -> UnfR { + UnfR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Receive Interrupt"] #[inline(always)] - pub fn ri(&self) -> RI_R { - RI_R::new(((self.bits >> 6) & 1) != 0) + pub fn ri(&self) -> RiR { + RiR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Buffer Unavailable"] #[inline(always)] - pub fn ru(&self) -> RU_R { - RU_R::new(((self.bits >> 7) & 1) != 0) + pub fn ru(&self) -> RuR { + RuR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Receive Process Stopped"] #[inline(always)] - pub fn rps(&self) -> RPS_R { - RPS_R::new(((self.bits >> 8) & 1) != 0) + pub fn rps(&self) -> RpsR { + RpsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Receive Watchdog Timeout"] #[inline(always)] - pub fn rwt(&self) -> RWT_R { - RWT_R::new(((self.bits >> 9) & 1) != 0) + pub fn rwt(&self) -> RwtR { + RwtR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Early Transmit Interrupt"] #[inline(always)] - pub fn eti(&self) -> ETI_R { - ETI_R::new(((self.bits >> 10) & 1) != 0) + pub fn eti(&self) -> EtiR { + EtiR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 13 - Fatal Bus Error Interrupt"] #[inline(always)] - pub fn fbi(&self) -> FBI_R { - FBI_R::new(((self.bits >> 13) & 1) != 0) + pub fn fbi(&self) -> FbiR { + FbiR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Early Receive Interrupt"] #[inline(always)] - pub fn eri(&self) -> ERI_R { - ERI_R::new(((self.bits >> 14) & 1) != 0) + pub fn eri(&self) -> EriR { + EriR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Abnormal Interrupt Summary"] #[inline(always)] - pub fn ais(&self) -> AIS_R { - AIS_R::new(((self.bits >> 15) & 1) != 0) + pub fn ais(&self) -> AisR { + AisR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Normal Interrupt Summary"] #[inline(always)] - pub fn nis(&self) -> NIS_R { - NIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn nis(&self) -> NisR { + NisR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:19 - Received Process State"] #[inline(always)] - pub fn rs(&self) -> RS_R { - RS_R::new(((self.bits >> 17) & 7) as u8) + pub fn rs(&self) -> RsR { + RsR::new(((self.bits >> 17) & 7) as u8) } #[doc = "Bits 20:22 - Transmit Process State"] #[inline(always)] - pub fn ts(&self) -> TS_R { - TS_R::new(((self.bits >> 20) & 7) as u8) + pub fn ts(&self) -> TsR { + TsR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 23:25 - Error Bits"] #[inline(always)] - pub fn eb(&self) -> EB_R { - EB_R::new(((self.bits >> 23) & 7) as u8) + pub fn eb(&self) -> EbR { + EbR::new(((self.bits >> 23) & 7) as u8) } #[doc = "Bit 27 - ETH MMC Interrupt"] #[inline(always)] - pub fn emi(&self) -> EMI_R { - EMI_R::new(((self.bits >> 27) & 1) != 0) + pub fn emi(&self) -> EmiR { + EmiR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - ETH PMT Interrupt"] #[inline(always)] - pub fn epi(&self) -> EPI_R { - EPI_R::new(((self.bits >> 28) & 1) != 0) + pub fn epi(&self) -> EpiR { + EpiR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Timestamp Trigger Interrupt"] #[inline(always)] - pub fn tti(&self) -> TTI_R { - TTI_R::new(((self.bits >> 29) & 1) != 0) + pub fn tti(&self) -> TtiR { + TtiR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transmit Interrupt"] #[inline(always)] #[must_use] - pub fn ti(&mut self) -> TI_W { - TI_W::new(self, 0) + pub fn ti(&mut self) -> TiW { + TiW::new(self, 0) } #[doc = "Bit 1 - Transmit Process Stopped"] #[inline(always)] #[must_use] - pub fn tps(&mut self) -> TPS_W { - TPS_W::new(self, 1) + pub fn tps(&mut self) -> TpsW { + TpsW::new(self, 1) } #[doc = "Bit 2 - Transmit Buffer Unavailable"] #[inline(always)] #[must_use] - pub fn tu(&mut self) -> TU_W { - TU_W::new(self, 2) + pub fn tu(&mut self) -> TuW { + TuW::new(self, 2) } #[doc = "Bit 3 - Transmit Jabber Timeout"] #[inline(always)] #[must_use] - pub fn tjt(&mut self) -> TJT_W { - TJT_W::new(self, 3) + pub fn tjt(&mut self) -> TjtW { + TjtW::new(self, 3) } #[doc = "Bit 4 - Receive Overflow"] #[inline(always)] #[must_use] - pub fn ovf(&mut self) -> OVF_W { - OVF_W::new(self, 4) + pub fn ovf(&mut self) -> OvfW { + OvfW::new(self, 4) } #[doc = "Bit 5 - Transmit Underflow"] #[inline(always)] #[must_use] - pub fn unf(&mut self) -> UNF_W { - UNF_W::new(self, 5) + pub fn unf(&mut self) -> UnfW { + UnfW::new(self, 5) } #[doc = "Bit 6 - Receive Interrupt"] #[inline(always)] #[must_use] - pub fn ri(&mut self) -> RI_W { - RI_W::new(self, 6) + pub fn ri(&mut self) -> RiW { + RiW::new(self, 6) } #[doc = "Bit 7 - Receive Buffer Unavailable"] #[inline(always)] #[must_use] - pub fn ru(&mut self) -> RU_W { - RU_W::new(self, 7) + pub fn ru(&mut self) -> RuW { + RuW::new(self, 7) } #[doc = "Bit 8 - Receive Process Stopped"] #[inline(always)] #[must_use] - pub fn rps(&mut self) -> RPS_W { - RPS_W::new(self, 8) + pub fn rps(&mut self) -> RpsW { + RpsW::new(self, 8) } #[doc = "Bit 9 - Receive Watchdog Timeout"] #[inline(always)] #[must_use] - pub fn rwt(&mut self) -> RWT_W { - RWT_W::new(self, 9) + pub fn rwt(&mut self) -> RwtW { + RwtW::new(self, 9) } #[doc = "Bit 10 - Early Transmit Interrupt"] #[inline(always)] #[must_use] - pub fn eti(&mut self) -> ETI_W { - ETI_W::new(self, 10) + pub fn eti(&mut self) -> EtiW { + EtiW::new(self, 10) } #[doc = "Bit 13 - Fatal Bus Error Interrupt"] #[inline(always)] #[must_use] - pub fn fbi(&mut self) -> FBI_W { - FBI_W::new(self, 13) + pub fn fbi(&mut self) -> FbiW { + FbiW::new(self, 13) } #[doc = "Bit 14 - Early Receive Interrupt"] #[inline(always)] #[must_use] - pub fn eri(&mut self) -> ERI_W { - ERI_W::new(self, 14) + pub fn eri(&mut self) -> EriW { + EriW::new(self, 14) } #[doc = "Bit 15 - Abnormal Interrupt Summary"] #[inline(always)] #[must_use] - pub fn ais(&mut self) -> AIS_W { - AIS_W::new(self, 15) + pub fn ais(&mut self) -> AisW { + AisW::new(self, 15) } #[doc = "Bit 16 - Normal Interrupt Summary"] #[inline(always)] #[must_use] - pub fn nis(&mut self) -> NIS_W { - NIS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nis(&mut self) -> NisW { + NisW::new(self, 16) } } #[doc = "Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`status::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUS_SPEC; -impl crate::RegisterSpec for STATUS_SPEC { +pub struct StatusSpec; +impl crate::RegisterSpec for StatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`status::R`](R) reader structure"] -impl crate::Readable for STATUS_SPEC {} +impl crate::Readable for StatusSpec {} #[doc = "`write(|w| ..)` method takes [`status::W`](W) writer structure"] -impl crate::Writable for STATUS_SPEC { +impl crate::Writable for StatusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STATUS to value 0"] -impl crate::Resettable for STATUS_SPEC { +impl crate::Resettable for StatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/sub_second_increment.rs b/src/eth0/sub_second_increment.rs index b49af5fd..9900d428 100644 --- a/src/eth0/sub_second_increment.rs +++ b/src/eth0/sub_second_increment.rs @@ -1,49 +1,40 @@ #[doc = "Register `SUB_SECOND_INCREMENT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SUB_SECOND_INCREMENT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SSINC` reader - Sub-second Increment Value"] -pub type SSINC_R = crate::FieldReader; +pub type SsincR = crate::FieldReader; #[doc = "Field `SSINC` writer - Sub-second Increment Value"] -pub type SSINC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SsincW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Sub-second Increment Value"] #[inline(always)] - pub fn ssinc(&self) -> SSINC_R { - SSINC_R::new((self.bits & 0xff) as u8) + pub fn ssinc(&self) -> SsincR { + SsincR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Sub-second Increment Value"] #[inline(always)] #[must_use] - pub fn ssinc(&mut self) -> SSINC_W { - SSINC_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ssinc(&mut self) -> SsincW { + SsincW::new(self, 0) } } #[doc = "Sub-Second Increment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sub_second_increment::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sub_second_increment::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SUB_SECOND_INCREMENT_SPEC; -impl crate::RegisterSpec for SUB_SECOND_INCREMENT_SPEC { +pub struct SubSecondIncrementSpec; +impl crate::RegisterSpec for SubSecondIncrementSpec { type Ux = u32; } #[doc = "`read()` method returns [`sub_second_increment::R`](R) reader structure"] -impl crate::Readable for SUB_SECOND_INCREMENT_SPEC {} +impl crate::Readable for SubSecondIncrementSpec {} #[doc = "`write(|w| ..)` method takes [`sub_second_increment::W`](W) writer structure"] -impl crate::Writable for SUB_SECOND_INCREMENT_SPEC { +impl crate::Writable for SubSecondIncrementSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SUB_SECOND_INCREMENT to value 0"] -impl crate::Resettable for SUB_SECOND_INCREMENT_SPEC { +impl crate::Resettable for SubSecondIncrementSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/system_time_higher_word_seconds.rs b/src/eth0/system_time_higher_word_seconds.rs index ba4d0bcb..c4d5af7c 100644 --- a/src/eth0/system_time_higher_word_seconds.rs +++ b/src/eth0/system_time_higher_word_seconds.rs @@ -1,49 +1,40 @@ #[doc = "Register `SYSTEM_TIME_HIGHER_WORD_SECONDS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYSTEM_TIME_HIGHER_WORD_SECONDS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSHWR` reader - Timestamp Higher Word Register"] -pub type TSHWR_R = crate::FieldReader; +pub type TshwrR = crate::FieldReader; #[doc = "Field `TSHWR` writer - Timestamp Higher Word Register"] -pub type TSHWR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TshwrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timestamp Higher Word Register"] #[inline(always)] - pub fn tshwr(&self) -> TSHWR_R { - TSHWR_R::new((self.bits & 0xffff) as u16) + pub fn tshwr(&self) -> TshwrR { + TshwrR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timestamp Higher Word Register"] #[inline(always)] #[must_use] - pub fn tshwr(&mut self) -> TSHWR_W { - TSHWR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tshwr(&mut self) -> TshwrW { + TshwrW::new(self, 0) } } #[doc = "System Time - Higher Word Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_higher_word_seconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_higher_word_seconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC; -impl crate::RegisterSpec for SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC { +pub struct SystemTimeHigherWordSecondsSpec; +impl crate::RegisterSpec for SystemTimeHigherWordSecondsSpec { type Ux = u32; } #[doc = "`read()` method returns [`system_time_higher_word_seconds::R`](R) reader structure"] -impl crate::Readable for SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC {} +impl crate::Readable for SystemTimeHigherWordSecondsSpec {} #[doc = "`write(|w| ..)` method takes [`system_time_higher_word_seconds::W`](W) writer structure"] -impl crate::Writable for SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC { +impl crate::Writable for SystemTimeHigherWordSecondsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTEM_TIME_HIGHER_WORD_SECONDS to value 0"] -impl crate::Resettable for SYSTEM_TIME_HIGHER_WORD_SECONDS_SPEC { +impl crate::Resettable for SystemTimeHigherWordSecondsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/system_time_nanoseconds.rs b/src/eth0/system_time_nanoseconds.rs index 51f868eb..a55480eb 100644 --- a/src/eth0/system_time_nanoseconds.rs +++ b/src/eth0/system_time_nanoseconds.rs @@ -1,22 +1,22 @@ #[doc = "Register `SYSTEM_TIME_NANOSECONDS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TSSS` reader - Timestamp Sub Seconds"] -pub type TSSS_R = crate::FieldReader; +pub type TsssR = crate::FieldReader; impl R { #[doc = "Bits 0:30 - Timestamp Sub Seconds"] #[inline(always)] - pub fn tsss(&self) -> TSSS_R { - TSSS_R::new(self.bits & 0x7fff_ffff) + pub fn tsss(&self) -> TsssR { + TsssR::new(self.bits & 0x7fff_ffff) } } #[doc = "System Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSTEM_TIME_NANOSECONDS_SPEC; -impl crate::RegisterSpec for SYSTEM_TIME_NANOSECONDS_SPEC { +pub struct SystemTimeNanosecondsSpec; +impl crate::RegisterSpec for SystemTimeNanosecondsSpec { type Ux = u32; } #[doc = "`read()` method returns [`system_time_nanoseconds::R`](R) reader structure"] -impl crate::Readable for SYSTEM_TIME_NANOSECONDS_SPEC {} +impl crate::Readable for SystemTimeNanosecondsSpec {} #[doc = "`reset()` method sets SYSTEM_TIME_NANOSECONDS to value 0"] -impl crate::Resettable for SYSTEM_TIME_NANOSECONDS_SPEC { +impl crate::Resettable for SystemTimeNanosecondsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/system_time_nanoseconds_update.rs b/src/eth0/system_time_nanoseconds_update.rs index b4d1c444..0af4d034 100644 --- a/src/eth0/system_time_nanoseconds_update.rs +++ b/src/eth0/system_time_nanoseconds_update.rs @@ -1,64 +1,55 @@ #[doc = "Register `SYSTEM_TIME_NANOSECONDS_UPDATE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYSTEM_TIME_NANOSECONDS_UPDATE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSSS` reader - Timestamp Sub Second"] -pub type TSSS_R = crate::FieldReader; +pub type TsssR = crate::FieldReader; #[doc = "Field `TSSS` writer - Timestamp Sub Second"] -pub type TSSS_W<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; +pub type TsssW<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; #[doc = "Field `ADDSUB` reader - Add or subtract time"] -pub type ADDSUB_R = crate::BitReader; +pub type AddsubR = crate::BitReader; #[doc = "Field `ADDSUB` writer - Add or subtract time"] -pub type ADDSUB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AddsubW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:30 - Timestamp Sub Second"] #[inline(always)] - pub fn tsss(&self) -> TSSS_R { - TSSS_R::new(self.bits & 0x7fff_ffff) + pub fn tsss(&self) -> TsssR { + TsssR::new(self.bits & 0x7fff_ffff) } #[doc = "Bit 31 - Add or subtract time"] #[inline(always)] - pub fn addsub(&self) -> ADDSUB_R { - ADDSUB_R::new(((self.bits >> 31) & 1) != 0) + pub fn addsub(&self) -> AddsubR { + AddsubR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:30 - Timestamp Sub Second"] #[inline(always)] #[must_use] - pub fn tsss(&mut self) -> TSSS_W { - TSSS_W::new(self, 0) + pub fn tsss(&mut self) -> TsssW { + TsssW::new(self, 0) } #[doc = "Bit 31 - Add or subtract time"] #[inline(always)] #[must_use] - pub fn addsub(&mut self) -> ADDSUB_W { - ADDSUB_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addsub(&mut self) -> AddsubW { + AddsubW::new(self, 31) } } #[doc = "System Time Nanoseconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_nanoseconds_update::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_nanoseconds_update::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC; -impl crate::RegisterSpec for SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC { +pub struct SystemTimeNanosecondsUpdateSpec; +impl crate::RegisterSpec for SystemTimeNanosecondsUpdateSpec { type Ux = u32; } #[doc = "`read()` method returns [`system_time_nanoseconds_update::R`](R) reader structure"] -impl crate::Readable for SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC {} +impl crate::Readable for SystemTimeNanosecondsUpdateSpec {} #[doc = "`write(|w| ..)` method takes [`system_time_nanoseconds_update::W`](W) writer structure"] -impl crate::Writable for SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC { +impl crate::Writable for SystemTimeNanosecondsUpdateSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTEM_TIME_NANOSECONDS_UPDATE to value 0"] -impl crate::Resettable for SYSTEM_TIME_NANOSECONDS_UPDATE_SPEC { +impl crate::Resettable for SystemTimeNanosecondsUpdateSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/system_time_seconds.rs b/src/eth0/system_time_seconds.rs index 7691823b..5c2e052f 100644 --- a/src/eth0/system_time_seconds.rs +++ b/src/eth0/system_time_seconds.rs @@ -1,22 +1,22 @@ #[doc = "Register `SYSTEM_TIME_SECONDS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TSS` reader - Timestamp Second"] -pub type TSS_R = crate::FieldReader; +pub type TssR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&self) -> TSS_R { - TSS_R::new(self.bits) + pub fn tss(&self) -> TssR { + TssR::new(self.bits) } } #[doc = "System Time - Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSTEM_TIME_SECONDS_SPEC; -impl crate::RegisterSpec for SYSTEM_TIME_SECONDS_SPEC { +pub struct SystemTimeSecondsSpec; +impl crate::RegisterSpec for SystemTimeSecondsSpec { type Ux = u32; } #[doc = "`read()` method returns [`system_time_seconds::R`](R) reader structure"] -impl crate::Readable for SYSTEM_TIME_SECONDS_SPEC {} +impl crate::Readable for SystemTimeSecondsSpec {} #[doc = "`reset()` method sets SYSTEM_TIME_SECONDS to value 0"] -impl crate::Resettable for SYSTEM_TIME_SECONDS_SPEC { +impl crate::Resettable for SystemTimeSecondsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/system_time_seconds_update.rs b/src/eth0/system_time_seconds_update.rs index 1f36bb2f..24084d93 100644 --- a/src/eth0/system_time_seconds_update.rs +++ b/src/eth0/system_time_seconds_update.rs @@ -1,49 +1,40 @@ #[doc = "Register `SYSTEM_TIME_SECONDS_UPDATE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYSTEM_TIME_SECONDS_UPDATE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSS` reader - Timestamp Second"] -pub type TSS_R = crate::FieldReader; +pub type TssR = crate::FieldReader; #[doc = "Field `TSS` writer - Timestamp Second"] -pub type TSS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type TssW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - pub fn tss(&self) -> TSS_R { - TSS_R::new(self.bits) + pub fn tss(&self) -> TssR { + TssR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] #[must_use] - pub fn tss(&mut self) -> TSS_W { - TSS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tss(&mut self) -> TssW { + TssW::new(self, 0) } } #[doc = "System Time - Seconds Update Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`system_time_seconds_update::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`system_time_seconds_update::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSTEM_TIME_SECONDS_UPDATE_SPEC; -impl crate::RegisterSpec for SYSTEM_TIME_SECONDS_UPDATE_SPEC { +pub struct SystemTimeSecondsUpdateSpec; +impl crate::RegisterSpec for SystemTimeSecondsUpdateSpec { type Ux = u32; } #[doc = "`read()` method returns [`system_time_seconds_update::R`](R) reader structure"] -impl crate::Readable for SYSTEM_TIME_SECONDS_UPDATE_SPEC {} +impl crate::Readable for SystemTimeSecondsUpdateSpec {} #[doc = "`write(|w| ..)` method takes [`system_time_seconds_update::W`](W) writer structure"] -impl crate::Writable for SYSTEM_TIME_SECONDS_UPDATE_SPEC { +impl crate::Writable for SystemTimeSecondsUpdateSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSTEM_TIME_SECONDS_UPDATE to value 0"] -impl crate::Resettable for SYSTEM_TIME_SECONDS_UPDATE_SPEC { +impl crate::Resettable for SystemTimeSecondsUpdateSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/target_time_nanoseconds.rs b/src/eth0/target_time_nanoseconds.rs index e7914fa4..34391778 100644 --- a/src/eth0/target_time_nanoseconds.rs +++ b/src/eth0/target_time_nanoseconds.rs @@ -1,56 +1,47 @@ #[doc = "Register `TARGET_TIME_NANOSECONDS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TARGET_TIME_NANOSECONDS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TTSLO` reader - Target Timestamp Low Register"] -pub type TTSLO_R = crate::FieldReader; +pub type TtsloR = crate::FieldReader; #[doc = "Field `TTSLO` writer - Target Timestamp Low Register"] -pub type TTSLO_W<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; +pub type TtsloW<'a, REG> = crate::FieldWriter<'a, REG, 31, u32>; #[doc = "Field `TRGTBUSY` reader - Target Time Register Busy"] -pub type TRGTBUSY_R = crate::BitReader; +pub type TrgtbusyR = crate::BitReader; impl R { #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] - pub fn ttslo(&self) -> TTSLO_R { - TTSLO_R::new(self.bits & 0x7fff_ffff) + pub fn ttslo(&self) -> TtsloR { + TtsloR::new(self.bits & 0x7fff_ffff) } #[doc = "Bit 31 - Target Time Register Busy"] #[inline(always)] - pub fn trgtbusy(&self) -> TRGTBUSY_R { - TRGTBUSY_R::new(((self.bits >> 31) & 1) != 0) + pub fn trgtbusy(&self) -> TrgtbusyR { + TrgtbusyR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] #[must_use] - pub fn ttslo(&mut self) -> TTSLO_W { - TTSLO_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ttslo(&mut self) -> TtsloW { + TtsloW::new(self, 0) } } #[doc = "Target Time Nanoseconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_nanoseconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_nanoseconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TARGET_TIME_NANOSECONDS_SPEC; -impl crate::RegisterSpec for TARGET_TIME_NANOSECONDS_SPEC { +pub struct TargetTimeNanosecondsSpec; +impl crate::RegisterSpec for TargetTimeNanosecondsSpec { type Ux = u32; } #[doc = "`read()` method returns [`target_time_nanoseconds::R`](R) reader structure"] -impl crate::Readable for TARGET_TIME_NANOSECONDS_SPEC {} +impl crate::Readable for TargetTimeNanosecondsSpec {} #[doc = "`write(|w| ..)` method takes [`target_time_nanoseconds::W`](W) writer structure"] -impl crate::Writable for TARGET_TIME_NANOSECONDS_SPEC { +impl crate::Writable for TargetTimeNanosecondsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_NANOSECONDS to value 0"] -impl crate::Resettable for TARGET_TIME_NANOSECONDS_SPEC { +impl crate::Resettable for TargetTimeNanosecondsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/target_time_seconds.rs b/src/eth0/target_time_seconds.rs index 008daa3d..774cdd8f 100644 --- a/src/eth0/target_time_seconds.rs +++ b/src/eth0/target_time_seconds.rs @@ -1,49 +1,40 @@ #[doc = "Register `TARGET_TIME_SECONDS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TARGET_TIME_SECONDS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSTR` reader - Target Time Seconds Register"] -pub type TSTR_R = crate::FieldReader; +pub type TstrR = crate::FieldReader; #[doc = "Field `TSTR` writer - Target Time Seconds Register"] -pub type TSTR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type TstrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Target Time Seconds Register"] #[inline(always)] - pub fn tstr(&self) -> TSTR_R { - TSTR_R::new(self.bits) + pub fn tstr(&self) -> TstrR { + TstrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Target Time Seconds Register"] #[inline(always)] #[must_use] - pub fn tstr(&mut self) -> TSTR_W { - TSTR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tstr(&mut self) -> TstrW { + TstrW::new(self, 0) } } #[doc = "Target Time Seconds Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`target_time_seconds::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`target_time_seconds::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TARGET_TIME_SECONDS_SPEC; -impl crate::RegisterSpec for TARGET_TIME_SECONDS_SPEC { +pub struct TargetTimeSecondsSpec; +impl crate::RegisterSpec for TargetTimeSecondsSpec { type Ux = u32; } #[doc = "`read()` method returns [`target_time_seconds::R`](R) reader structure"] -impl crate::Readable for TARGET_TIME_SECONDS_SPEC {} +impl crate::Readable for TargetTimeSecondsSpec {} #[doc = "`write(|w| ..)` method takes [`target_time_seconds::W`](W) writer structure"] -impl crate::Writable for TARGET_TIME_SECONDS_SPEC { +impl crate::Writable for TargetTimeSecondsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TARGET_TIME_SECONDS to value 0"] -impl crate::Resettable for TARGET_TIME_SECONDS_SPEC { +impl crate::Resettable for TargetTimeSecondsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/timestamp_addend.rs b/src/eth0/timestamp_addend.rs index eac9bba1..07dad584 100644 --- a/src/eth0/timestamp_addend.rs +++ b/src/eth0/timestamp_addend.rs @@ -1,49 +1,40 @@ #[doc = "Register `TIMESTAMP_ADDEND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMESTAMP_ADDEND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSAR` reader - Timestamp Addend Register"] -pub type TSAR_R = crate::FieldReader; +pub type TsarR = crate::FieldReader; #[doc = "Field `TSAR` writer - Timestamp Addend Register"] -pub type TSAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type TsarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] - pub fn tsar(&self) -> TSAR_R { - TSAR_R::new(self.bits) + pub fn tsar(&self) -> TsarR { + TsarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] #[must_use] - pub fn tsar(&mut self) -> TSAR_W { - TSAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tsar(&mut self) -> TsarW { + TsarW::new(self, 0) } } #[doc = "Timestamp Addend Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_addend::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_addend::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMESTAMP_ADDEND_SPEC; -impl crate::RegisterSpec for TIMESTAMP_ADDEND_SPEC { +pub struct TimestampAddendSpec; +impl crate::RegisterSpec for TimestampAddendSpec { type Ux = u32; } #[doc = "`read()` method returns [`timestamp_addend::R`](R) reader structure"] -impl crate::Readable for TIMESTAMP_ADDEND_SPEC {} +impl crate::Readable for TimestampAddendSpec {} #[doc = "`write(|w| ..)` method takes [`timestamp_addend::W`](W) writer structure"] -impl crate::Writable for TIMESTAMP_ADDEND_SPEC { +impl crate::Writable for TimestampAddendSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMP_ADDEND to value 0"] -impl crate::Resettable for TIMESTAMP_ADDEND_SPEC { +impl crate::Resettable for TimestampAddendSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/timestamp_control.rs b/src/eth0/timestamp_control.rs index 57b53168..b56af6d8 100644 --- a/src/eth0/timestamp_control.rs +++ b/src/eth0/timestamp_control.rs @@ -1,274 +1,265 @@ #[doc = "Register `TIMESTAMP_CONTROL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMESTAMP_CONTROL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSENA` reader - Timestamp Enable"] -pub type TSENA_R = crate::BitReader; +pub type TsenaR = crate::BitReader; #[doc = "Field `TSENA` writer - Timestamp Enable"] -pub type TSENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSCFUPDT` reader - Timestamp Fine or Coarse Update"] -pub type TSCFUPDT_R = crate::BitReader; +pub type TscfupdtR = crate::BitReader; #[doc = "Field `TSCFUPDT` writer - Timestamp Fine or Coarse Update"] -pub type TSCFUPDT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TscfupdtW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSINIT` reader - Timestamp Initialize"] -pub type TSINIT_R = crate::BitReader; +pub type TsinitR = crate::BitReader; #[doc = "Field `TSINIT` writer - Timestamp Initialize"] -pub type TSINIT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsinitW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSUPDT` reader - Timestamp Update"] -pub type TSUPDT_R = crate::BitReader; +pub type TsupdtR = crate::BitReader; #[doc = "Field `TSUPDT` writer - Timestamp Update"] -pub type TSUPDT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsupdtW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSTRIG` reader - Timestamp Interrupt Trigger Enable"] -pub type TSTRIG_R = crate::BitReader; +pub type TstrigR = crate::BitReader; #[doc = "Field `TSTRIG` writer - Timestamp Interrupt Trigger Enable"] -pub type TSTRIG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TstrigW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSADDREG` reader - Addend Reg Update"] -pub type TSADDREG_R = crate::BitReader; +pub type TsaddregR = crate::BitReader; #[doc = "Field `TSADDREG` writer - Addend Reg Update"] -pub type TSADDREG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsaddregW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSENALL` reader - Enable Timestamp for All Frames"] -pub type TSENALL_R = crate::BitReader; +pub type TsenallR = crate::BitReader; #[doc = "Field `TSENALL` writer - Enable Timestamp for All Frames"] -pub type TSENALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsenallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSCTRLSSR` reader - Timestamp Digital or Binary Rollover Control"] -pub type TSCTRLSSR_R = crate::BitReader; +pub type TsctrlssrR = crate::BitReader; #[doc = "Field `TSCTRLSSR` writer - Timestamp Digital or Binary Rollover Control"] -pub type TSCTRLSSR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsctrlssrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSVER2ENA` reader - Enable PTP packet Processing for Version 2 Format"] -pub type TSVER2ENA_R = crate::BitReader; +pub type Tsver2enaR = crate::BitReader; #[doc = "Field `TSVER2ENA` writer - Enable PTP packet Processing for Version 2 Format"] -pub type TSVER2ENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tsver2enaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSIPENA` reader - Enable Processing of PTP over Ethernet Frames"] -pub type TSIPENA_R = crate::BitReader; +pub type TsipenaR = crate::BitReader; #[doc = "Field `TSIPENA` writer - Enable Processing of PTP over Ethernet Frames"] -pub type TSIPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsipenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSIPV6ENA` reader - Enable Processing of PTP Frames Sent Over IPv6-UDP"] -pub type TSIPV6ENA_R = crate::BitReader; +pub type Tsipv6enaR = crate::BitReader; #[doc = "Field `TSIPV6ENA` writer - Enable Processing of PTP Frames Sent Over IPv6-UDP"] -pub type TSIPV6ENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tsipv6enaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSIPV4ENA` reader - Enable Processing of PTP Frames Sent over IPv4-UDP"] -pub type TSIPV4ENA_R = crate::BitReader; +pub type Tsipv4enaR = crate::BitReader; #[doc = "Field `TSIPV4ENA` writer - Enable Processing of PTP Frames Sent over IPv4-UDP"] -pub type TSIPV4ENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Tsipv4enaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSEVNTENA` reader - Enable Timestamp Snapshot for Event Messages"] -pub type TSEVNTENA_R = crate::BitReader; +pub type TsevntenaR = crate::BitReader; #[doc = "Field `TSEVNTENA` writer - Enable Timestamp Snapshot for Event Messages"] -pub type TSEVNTENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsevntenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TSMSTRENA` reader - Enable Snapshot for Messages Relevant to Master"] -pub type TSMSTRENA_R = crate::BitReader; +pub type TsmstrenaR = crate::BitReader; #[doc = "Field `TSMSTRENA` writer - Enable Snapshot for Messages Relevant to Master"] -pub type TSMSTRENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsmstrenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAPTYPSEL` reader - Select PTP packets for Taking Snapshots"] -pub type SNAPTYPSEL_R = crate::FieldReader; +pub type SnaptypselR = crate::FieldReader; #[doc = "Field `SNAPTYPSEL` writer - Select PTP packets for Taking Snapshots"] -pub type SNAPTYPSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SnaptypselW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `TSENMACADDR` reader - Enable MAC address for PTP Frame Filtering"] -pub type TSENMACADDR_R = crate::BitReader; +pub type TsenmacaddrR = crate::BitReader; #[doc = "Field `TSENMACADDR` writer - Enable MAC address for PTP Frame Filtering"] -pub type TSENMACADDR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsenmacaddrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] - pub fn tsena(&self) -> TSENA_R { - TSENA_R::new((self.bits & 1) != 0) + pub fn tsena(&self) -> TsenaR { + TsenaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] - pub fn tscfupdt(&self) -> TSCFUPDT_R { - TSCFUPDT_R::new(((self.bits >> 1) & 1) != 0) + pub fn tscfupdt(&self) -> TscfupdtR { + TscfupdtR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] - pub fn tsinit(&self) -> TSINIT_R { - TSINIT_R::new(((self.bits >> 2) & 1) != 0) + pub fn tsinit(&self) -> TsinitR { + TsinitR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timestamp Update"] #[inline(always)] - pub fn tsupdt(&self) -> TSUPDT_R { - TSUPDT_R::new(((self.bits >> 3) & 1) != 0) + pub fn tsupdt(&self) -> TsupdtR { + TsupdtR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] #[inline(always)] - pub fn tstrig(&self) -> TSTRIG_R { - TSTRIG_R::new(((self.bits >> 4) & 1) != 0) + pub fn tstrig(&self) -> TstrigR { + TstrigR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Addend Reg Update"] #[inline(always)] - pub fn tsaddreg(&self) -> TSADDREG_R { - TSADDREG_R::new(((self.bits >> 5) & 1) != 0) + pub fn tsaddreg(&self) -> TsaddregR { + TsaddregR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Enable Timestamp for All Frames"] #[inline(always)] - pub fn tsenall(&self) -> TSENALL_R { - TSENALL_R::new(((self.bits >> 8) & 1) != 0) + pub fn tsenall(&self) -> TsenallR { + TsenallR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] #[inline(always)] - pub fn tsctrlssr(&self) -> TSCTRLSSR_R { - TSCTRLSSR_R::new(((self.bits >> 9) & 1) != 0) + pub fn tsctrlssr(&self) -> TsctrlssrR { + TsctrlssrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] #[inline(always)] - pub fn tsver2ena(&self) -> TSVER2ENA_R { - TSVER2ENA_R::new(((self.bits >> 10) & 1) != 0) + pub fn tsver2ena(&self) -> Tsver2enaR { + Tsver2enaR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] #[inline(always)] - pub fn tsipena(&self) -> TSIPENA_R { - TSIPENA_R::new(((self.bits >> 11) & 1) != 0) + pub fn tsipena(&self) -> TsipenaR { + TsipenaR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Enable Processing of PTP Frames Sent Over IPv6-UDP"] #[inline(always)] - pub fn tsipv6ena(&self) -> TSIPV6ENA_R { - TSIPV6ENA_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsipv6ena(&self) -> Tsipv6enaR { + Tsipv6enaR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] #[inline(always)] - pub fn tsipv4ena(&self) -> TSIPV4ENA_R { - TSIPV4ENA_R::new(((self.bits >> 13) & 1) != 0) + pub fn tsipv4ena(&self) -> Tsipv4enaR { + Tsipv4enaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] #[inline(always)] - pub fn tsevntena(&self) -> TSEVNTENA_R { - TSEVNTENA_R::new(((self.bits >> 14) & 1) != 0) + pub fn tsevntena(&self) -> TsevntenaR { + TsevntenaR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] #[inline(always)] - pub fn tsmstrena(&self) -> TSMSTRENA_R { - TSMSTRENA_R::new(((self.bits >> 15) & 1) != 0) + pub fn tsmstrena(&self) -> TsmstrenaR { + TsmstrenaR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] #[inline(always)] - pub fn snaptypsel(&self) -> SNAPTYPSEL_R { - SNAPTYPSEL_R::new(((self.bits >> 16) & 3) as u8) + pub fn snaptypsel(&self) -> SnaptypselR { + SnaptypselR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] #[inline(always)] - pub fn tsenmacaddr(&self) -> TSENMACADDR_R { - TSENMACADDR_R::new(((self.bits >> 18) & 1) != 0) + pub fn tsenmacaddr(&self) -> TsenmacaddrR { + TsenmacaddrR::new(((self.bits >> 18) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] #[must_use] - pub fn tsena(&mut self) -> TSENA_W { - TSENA_W::new(self, 0) + pub fn tsena(&mut self) -> TsenaW { + TsenaW::new(self, 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] #[must_use] - pub fn tscfupdt(&mut self) -> TSCFUPDT_W { - TSCFUPDT_W::new(self, 1) + pub fn tscfupdt(&mut self) -> TscfupdtW { + TscfupdtW::new(self, 1) } #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] #[must_use] - pub fn tsinit(&mut self) -> TSINIT_W { - TSINIT_W::new(self, 2) + pub fn tsinit(&mut self) -> TsinitW { + TsinitW::new(self, 2) } #[doc = "Bit 3 - Timestamp Update"] #[inline(always)] #[must_use] - pub fn tsupdt(&mut self) -> TSUPDT_W { - TSUPDT_W::new(self, 3) + pub fn tsupdt(&mut self) -> TsupdtW { + TsupdtW::new(self, 3) } #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] #[inline(always)] #[must_use] - pub fn tstrig(&mut self) -> TSTRIG_W { - TSTRIG_W::new(self, 4) + pub fn tstrig(&mut self) -> TstrigW { + TstrigW::new(self, 4) } #[doc = "Bit 5 - Addend Reg Update"] #[inline(always)] #[must_use] - pub fn tsaddreg(&mut self) -> TSADDREG_W { - TSADDREG_W::new(self, 5) + pub fn tsaddreg(&mut self) -> TsaddregW { + TsaddregW::new(self, 5) } #[doc = "Bit 8 - Enable Timestamp for All Frames"] #[inline(always)] #[must_use] - pub fn tsenall(&mut self) -> TSENALL_W { - TSENALL_W::new(self, 8) + pub fn tsenall(&mut self) -> TsenallW { + TsenallW::new(self, 8) } #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] #[inline(always)] #[must_use] - pub fn tsctrlssr(&mut self) -> TSCTRLSSR_W { - TSCTRLSSR_W::new(self, 9) + pub fn tsctrlssr(&mut self) -> TsctrlssrW { + TsctrlssrW::new(self, 9) } #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] #[inline(always)] #[must_use] - pub fn tsver2ena(&mut self) -> TSVER2ENA_W { - TSVER2ENA_W::new(self, 10) + pub fn tsver2ena(&mut self) -> Tsver2enaW { + Tsver2enaW::new(self, 10) } #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] #[inline(always)] #[must_use] - pub fn tsipena(&mut self) -> TSIPENA_W { - TSIPENA_W::new(self, 11) + pub fn tsipena(&mut self) -> TsipenaW { + TsipenaW::new(self, 11) } #[doc = "Bit 12 - Enable Processing of PTP Frames Sent Over IPv6-UDP"] #[inline(always)] #[must_use] - pub fn tsipv6ena(&mut self) -> TSIPV6ENA_W { - TSIPV6ENA_W::new(self, 12) + pub fn tsipv6ena(&mut self) -> Tsipv6enaW { + Tsipv6enaW::new(self, 12) } #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] #[inline(always)] #[must_use] - pub fn tsipv4ena(&mut self) -> TSIPV4ENA_W { - TSIPV4ENA_W::new(self, 13) + pub fn tsipv4ena(&mut self) -> Tsipv4enaW { + Tsipv4enaW::new(self, 13) } #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] #[inline(always)] #[must_use] - pub fn tsevntena(&mut self) -> TSEVNTENA_W { - TSEVNTENA_W::new(self, 14) + pub fn tsevntena(&mut self) -> TsevntenaW { + TsevntenaW::new(self, 14) } #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] #[inline(always)] #[must_use] - pub fn tsmstrena(&mut self) -> TSMSTRENA_W { - TSMSTRENA_W::new(self, 15) + pub fn tsmstrena(&mut self) -> TsmstrenaW { + TsmstrenaW::new(self, 15) } #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] #[inline(always)] #[must_use] - pub fn snaptypsel(&mut self) -> SNAPTYPSEL_W { - SNAPTYPSEL_W::new(self, 16) + pub fn snaptypsel(&mut self) -> SnaptypselW { + SnaptypselW::new(self, 16) } #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] #[inline(always)] #[must_use] - pub fn tsenmacaddr(&mut self) -> TSENMACADDR_W { - TSENMACADDR_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tsenmacaddr(&mut self) -> TsenmacaddrW { + TsenmacaddrW::new(self, 18) } } #[doc = "Timestamp Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timestamp_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMESTAMP_CONTROL_SPEC; -impl crate::RegisterSpec for TIMESTAMP_CONTROL_SPEC { +pub struct TimestampControlSpec; +impl crate::RegisterSpec for TimestampControlSpec { type Ux = u32; } #[doc = "`read()` method returns [`timestamp_control::R`](R) reader structure"] -impl crate::Readable for TIMESTAMP_CONTROL_SPEC {} +impl crate::Readable for TimestampControlSpec {} #[doc = "`write(|w| ..)` method takes [`timestamp_control::W`](W) writer structure"] -impl crate::Writable for TIMESTAMP_CONTROL_SPEC { +impl crate::Writable for TimestampControlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMESTAMP_CONTROL to value 0x2000"] -impl crate::Resettable for TIMESTAMP_CONTROL_SPEC { +impl crate::Resettable for TimestampControlSpec { const RESET_VALUE: u32 = 0x2000; } diff --git a/src/eth0/timestamp_status.rs b/src/eth0/timestamp_status.rs index f0a13bcd..48baf5aa 100644 --- a/src/eth0/timestamp_status.rs +++ b/src/eth0/timestamp_status.rs @@ -1,78 +1,78 @@ #[doc = "Register `TIMESTAMP_STATUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TSSOVF` reader - Timestamp Seconds Overflow"] -pub type TSSOVF_R = crate::BitReader; +pub type TssovfR = crate::BitReader; #[doc = "Field `TSTARGT` reader - Timestamp Target Time Reached"] -pub type TSTARGT_R = crate::BitReader; +pub type TstargtR = crate::BitReader; #[doc = "Field `TSTRGTERR` reader - Timestamp Target Time Error"] -pub type TSTRGTERR_R = crate::BitReader; +pub type TstrgterrR = crate::BitReader; #[doc = "Field `TSTARGT1` reader - Timestamp Target Time Reached for Target Time PPS1"] -pub type TSTARGT1_R = crate::BitReader; +pub type Tstargt1R = crate::BitReader; #[doc = "Field `TSTRGTERR1` reader - Timestamp Target Time Error"] -pub type TSTRGTERR1_R = crate::BitReader; +pub type Tstrgterr1R = crate::BitReader; #[doc = "Field `TSTARGT2` reader - Timestamp Target Time Reached for Target Time PPS2"] -pub type TSTARGT2_R = crate::BitReader; +pub type Tstargt2R = crate::BitReader; #[doc = "Field `TSTRGTERR2` reader - Timestamp Target Time Error"] -pub type TSTRGTERR2_R = crate::BitReader; +pub type Tstrgterr2R = crate::BitReader; #[doc = "Field `TSTARGT3` reader - Timestamp Target Time Reached for Target Time PPS3"] -pub type TSTARGT3_R = crate::BitReader; +pub type Tstargt3R = crate::BitReader; #[doc = "Field `TSTRGTERR3` reader - Timestamp Target Time Error"] -pub type TSTRGTERR3_R = crate::BitReader; +pub type Tstrgterr3R = crate::BitReader; impl R { #[doc = "Bit 0 - Timestamp Seconds Overflow"] #[inline(always)] - pub fn tssovf(&self) -> TSSOVF_R { - TSSOVF_R::new((self.bits & 1) != 0) + pub fn tssovf(&self) -> TssovfR { + TssovfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timestamp Target Time Reached"] #[inline(always)] - pub fn tstargt(&self) -> TSTARGT_R { - TSTARGT_R::new(((self.bits >> 1) & 1) != 0) + pub fn tstargt(&self) -> TstargtR { + TstargtR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Timestamp Target Time Error"] #[inline(always)] - pub fn tstrgterr(&self) -> TSTRGTERR_R { - TSTRGTERR_R::new(((self.bits >> 3) & 1) != 0) + pub fn tstrgterr(&self) -> TstrgterrR { + TstrgterrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Timestamp Target Time Reached for Target Time PPS1"] #[inline(always)] - pub fn tstargt1(&self) -> TSTARGT1_R { - TSTARGT1_R::new(((self.bits >> 4) & 1) != 0) + pub fn tstargt1(&self) -> Tstargt1R { + Tstargt1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Timestamp Target Time Error"] #[inline(always)] - pub fn tstrgterr1(&self) -> TSTRGTERR1_R { - TSTRGTERR1_R::new(((self.bits >> 5) & 1) != 0) + pub fn tstrgterr1(&self) -> Tstrgterr1R { + Tstrgterr1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Timestamp Target Time Reached for Target Time PPS2"] #[inline(always)] - pub fn tstargt2(&self) -> TSTARGT2_R { - TSTARGT2_R::new(((self.bits >> 6) & 1) != 0) + pub fn tstargt2(&self) -> Tstargt2R { + Tstargt2R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Timestamp Target Time Error"] #[inline(always)] - pub fn tstrgterr2(&self) -> TSTRGTERR2_R { - TSTRGTERR2_R::new(((self.bits >> 7) & 1) != 0) + pub fn tstrgterr2(&self) -> Tstrgterr2R { + Tstrgterr2R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Timestamp Target Time Reached for Target Time PPS3"] #[inline(always)] - pub fn tstargt3(&self) -> TSTARGT3_R { - TSTARGT3_R::new(((self.bits >> 8) & 1) != 0) + pub fn tstargt3(&self) -> Tstargt3R { + Tstargt3R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Timestamp Target Time Error"] #[inline(always)] - pub fn tstrgterr3(&self) -> TSTRGTERR3_R { - TSTRGTERR3_R::new(((self.bits >> 9) & 1) != 0) + pub fn tstrgterr3(&self) -> Tstrgterr3R { + Tstrgterr3R::new(((self.bits >> 9) & 1) != 0) } } #[doc = "Timestamp Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timestamp_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMESTAMP_STATUS_SPEC; -impl crate::RegisterSpec for TIMESTAMP_STATUS_SPEC { +pub struct TimestampStatusSpec; +impl crate::RegisterSpec for TimestampStatusSpec { type Ux = u32; } #[doc = "`read()` method returns [`timestamp_status::R`](R) reader structure"] -impl crate::Readable for TIMESTAMP_STATUS_SPEC {} +impl crate::Readable for TimestampStatusSpec {} #[doc = "`reset()` method sets TIMESTAMP_STATUS to value 0"] -impl crate::Resettable for TIMESTAMP_STATUS_SPEC { +impl crate::Resettable for TimestampStatusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/transmit_descriptor_list_address.rs b/src/eth0/transmit_descriptor_list_address.rs index 38fbdb40..48cbcb04 100644 --- a/src/eth0/transmit_descriptor_list_address.rs +++ b/src/eth0/transmit_descriptor_list_address.rs @@ -1,49 +1,40 @@ #[doc = "Register `TRANSMIT_DESCRIPTOR_LIST_ADDRESS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRANSMIT_DESCRIPTOR_LIST_ADDRESS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TDESLA_32bit` reader - Start of Transmit List"] -pub type TDESLA_32BIT_R = crate::FieldReader; +pub type Tdesla32bitR = crate::FieldReader; #[doc = "Field `TDESLA_32bit` writer - Start of Transmit List"] -pub type TDESLA_32BIT_W<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; +pub type Tdesla32bitW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bits 2:31 - Start of Transmit List"] #[inline(always)] - pub fn tdesla_32bit(&self) -> TDESLA_32BIT_R { - TDESLA_32BIT_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn tdesla_32bit(&self) -> Tdesla32bitR { + Tdesla32bitR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bits 2:31 - Start of Transmit List"] #[inline(always)] #[must_use] - pub fn tdesla_32bit(&mut self) -> TDESLA_32BIT_W { - TDESLA_32BIT_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tdesla_32bit(&mut self) -> Tdesla32bitW { + Tdesla32bitW::new(self, 2) } } #[doc = "Transmit descripter Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_descriptor_list_address::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_descriptor_list_address::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC; -impl crate::RegisterSpec for TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC { +pub struct TransmitDescriptorListAddressSpec; +impl crate::RegisterSpec for TransmitDescriptorListAddressSpec { type Ux = u32; } #[doc = "`read()` method returns [`transmit_descriptor_list_address::R`](R) reader structure"] -impl crate::Readable for TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC {} +impl crate::Readable for TransmitDescriptorListAddressSpec {} #[doc = "`write(|w| ..)` method takes [`transmit_descriptor_list_address::W`](W) writer structure"] -impl crate::Writable for TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC { +impl crate::Writable for TransmitDescriptorListAddressSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRANSMIT_DESCRIPTOR_LIST_ADDRESS to value 0"] -impl crate::Resettable for TRANSMIT_DESCRIPTOR_LIST_ADDRESS_SPEC { +impl crate::Resettable for TransmitDescriptorListAddressSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/transmit_poll_demand.rs b/src/eth0/transmit_poll_demand.rs index 7386aa69..3b3fa490 100644 --- a/src/eth0/transmit_poll_demand.rs +++ b/src/eth0/transmit_poll_demand.rs @@ -1,49 +1,40 @@ #[doc = "Register `TRANSMIT_POLL_DEMAND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRANSMIT_POLL_DEMAND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TPD` reader - Transmit Poll Demand"] -pub type TPD_R = crate::FieldReader; +pub type TpdR = crate::FieldReader; #[doc = "Field `TPD` writer - Transmit Poll Demand"] -pub type TPD_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type TpdW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Transmit Poll Demand"] #[inline(always)] - pub fn tpd(&self) -> TPD_R { - TPD_R::new(self.bits) + pub fn tpd(&self) -> TpdR { + TpdR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Transmit Poll Demand"] #[inline(always)] #[must_use] - pub fn tpd(&mut self) -> TPD_W { - TPD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tpd(&mut self) -> TpdW { + TpdW::new(self, 0) } } #[doc = "Transmit Poll Demand Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transmit_poll_demand::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transmit_poll_demand::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRANSMIT_POLL_DEMAND_SPEC; -impl crate::RegisterSpec for TRANSMIT_POLL_DEMAND_SPEC { +pub struct TransmitPollDemandSpec; +impl crate::RegisterSpec for TransmitPollDemandSpec { type Ux = u32; } #[doc = "`read()` method returns [`transmit_poll_demand::R`](R) reader structure"] -impl crate::Readable for TRANSMIT_POLL_DEMAND_SPEC {} +impl crate::Readable for TransmitPollDemandSpec {} #[doc = "`write(|w| ..)` method takes [`transmit_poll_demand::W`](W) writer structure"] -impl crate::Writable for TRANSMIT_POLL_DEMAND_SPEC { +impl crate::Writable for TransmitPollDemandSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRANSMIT_POLL_DEMAND to value 0"] -impl crate::Resettable for TRANSMIT_POLL_DEMAND_SPEC { +impl crate::Resettable for TransmitPollDemandSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs b/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs index cf970e8e..86bbf909 100644 --- a/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs +++ b/src/eth0/tx_1024tomaxoctets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX1024_MAXOCTGB` reader - This field indicates the number of good and bad frames transmitted with length between 1,024 and maxsize (inclusive) bytes, exclusive of preamble and retried frames."] -pub type TX1024_MAXOCTGB_R = crate::FieldReader; +pub type Tx1024MaxoctgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good and bad frames transmitted with length between 1,024 and maxsize (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx1024_maxoctgb(&self) -> TX1024_MAXOCTGB_R { - TX1024_MAXOCTGB_R::new(self.bits) + pub fn tx1024_maxoctgb(&self) -> Tx1024MaxoctgbR { + Tx1024MaxoctgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_1024tomaxoctets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx1024tomaxoctetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx1024tomaxoctetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_1024tomaxoctets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx1024tomaxoctetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx1024tomaxoctetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_128to255octets_frames_good_bad.rs b/src/eth0/tx_128to255octets_frames_good_bad.rs index b10a3abd..214ee86e 100644 --- a/src/eth0/tx_128to255octets_frames_good_bad.rs +++ b/src/eth0/tx_128to255octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_128TO255OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX128_255OCTGB` reader - This field indicates the number of transmitted good and bad frames with length between 128 and 255 (inclusive) bytes, exclusive of preamble and retried frames."] -pub type TX128_255OCTGB_R = crate::FieldReader; +pub type Tx128_255octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad frames with length between 128 and 255 (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx128_255octgb(&self) -> TX128_255OCTGB_R { - TX128_255OCTGB_R::new(self.bits) + pub fn tx128_255octgb(&self) -> Tx128_255octgbR { + Tx128_255octgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_128to255octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx128to255octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx128to255octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_128to255octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx128to255octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_128TO255OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_128TO255OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx128to255octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_256to511octets_frames_good_bad.rs b/src/eth0/tx_256to511octets_frames_good_bad.rs index b7933cba..05b26052 100644 --- a/src/eth0/tx_256to511octets_frames_good_bad.rs +++ b/src/eth0/tx_256to511octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_256TO511OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX256_511OCTGB` reader - This field indicates the number of transmitted good and bad frames with length between 256 and 511 (inclusive) bytes, exclusive of preamble and retried frames."] -pub type TX256_511OCTGB_R = crate::FieldReader; +pub type Tx256_511octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad frames with length between 256 and 511 (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx256_511octgb(&self) -> TX256_511OCTGB_R { - TX256_511OCTGB_R::new(self.bits) + pub fn tx256_511octgb(&self) -> Tx256_511octgbR { + Tx256_511octgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_256to511octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx256to511octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx256to511octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_256to511octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx256to511octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_256TO511OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_256TO511OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx256to511octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_512to1023octets_frames_good_bad.rs b/src/eth0/tx_512to1023octets_frames_good_bad.rs index 4e0e16a0..516625e0 100644 --- a/src/eth0/tx_512to1023octets_frames_good_bad.rs +++ b/src/eth0/tx_512to1023octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_512TO1023OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX512_1023OCTGB` reader - This field indicates the number of transmitted good and bad frames with length between 512 and 1,023 (inclusive) bytes, exclusive of preamble and retried frames."] -pub type TX512_1023OCTGB_R = crate::FieldReader; +pub type Tx512_1023octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad frames with length between 512 and 1,023 (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx512_1023octgb(&self) -> TX512_1023OCTGB_R { - TX512_1023OCTGB_R::new(self.bits) + pub fn tx512_1023octgb(&self) -> Tx512_1023octgbR { + Tx512_1023octgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_512to1023octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx512to1023octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx512to1023octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_512to1023octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx512to1023octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_512TO1023OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_512TO1023OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx512to1023octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_64octets_frames_good_bad.rs b/src/eth0/tx_64octets_frames_good_bad.rs index f09504a6..2eadcff5 100644 --- a/src/eth0/tx_64octets_frames_good_bad.rs +++ b/src/eth0/tx_64octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_64OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX64OCTGB` reader - This field indicates the number of transmitted good and bad frames with length of 64 bytes, exclusive of preamble and retried frames."] -pub type TX64OCTGB_R = crate::FieldReader; +pub type Tx64octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad frames with length of 64 bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx64octgb(&self) -> TX64OCTGB_R { - TX64OCTGB_R::new(self.bits) + pub fn tx64octgb(&self) -> Tx64octgbR { + Tx64octgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 64 Byte Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_64octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_64OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_64OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx64octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx64octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_64octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_64OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx64octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_64OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_64OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx64octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_65to127octets_frames_good_bad.rs b/src/eth0/tx_65to127octets_frames_good_bad.rs index 299775cd..aba71a7d 100644 --- a/src/eth0/tx_65to127octets_frames_good_bad.rs +++ b/src/eth0/tx_65to127octets_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_65TO127OCTETS_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TX65_127OCTGB` reader - This field indicates the number of transmitted good and bad frames with length between 65 and 127 (inclusive) bytes, exclusive of preamble and retried frames."] -pub type TX65_127OCTGB_R = crate::FieldReader; +pub type Tx65_127octgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad frames with length between 65 and 127 (inclusive) bytes, exclusive of preamble and retried frames."] #[inline(always)] - pub fn tx65_127octgb(&self) -> TX65_127OCTGB_R { - TX65_127OCTGB_R::new(self.bits) + pub fn tx65_127octgb(&self) -> Tx65_127octgbR { + Tx65_127octgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_65to127octets_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { +pub struct Tx65to127octetsFramesGoodBadSpec; +impl crate::RegisterSpec for Tx65to127octetsFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_65to127octets_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for Tx65to127octetsFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_65TO127OCTETS_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_65TO127OCTETS_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for Tx65to127octetsFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_broadcast_frames_good.rs b/src/eth0/tx_broadcast_frames_good.rs index bdd715db..6696de21 100644 --- a/src/eth0/tx_broadcast_frames_good.rs +++ b/src/eth0/tx_broadcast_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_BROADCAST_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXBCASTG` reader - This field indicates the number of transmitted good broadcast frames."] -pub type TXBCASTG_R = crate::FieldReader; +pub type TxbcastgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good broadcast frames."] #[inline(always)] - pub fn txbcastg(&self) -> TXBCASTG_R { - TXBCASTG_R::new(self.bits) + pub fn txbcastg(&self) -> TxbcastgR { + TxbcastgR::new(self.bits) } } #[doc = "Transmit Frame Count for Good Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_BROADCAST_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for TX_BROADCAST_FRAMES_GOOD_SPEC { +pub struct TxBroadcastFramesGoodSpec; +impl crate::RegisterSpec for TxBroadcastFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_broadcast_frames_good::R`](R) reader structure"] -impl crate::Readable for TX_BROADCAST_FRAMES_GOOD_SPEC {} +impl crate::Readable for TxBroadcastFramesGoodSpec {} #[doc = "`reset()` method sets TX_BROADCAST_FRAMES_GOOD to value 0"] -impl crate::Resettable for TX_BROADCAST_FRAMES_GOOD_SPEC { +impl crate::Resettable for TxBroadcastFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_broadcast_frames_good_bad.rs b/src/eth0/tx_broadcast_frames_good_bad.rs index 4916f5e7..d90eee53 100644 --- a/src/eth0/tx_broadcast_frames_good_bad.rs +++ b/src/eth0/tx_broadcast_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_BROADCAST_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXBCASTGB` reader - This field indicates the number of transmitted good and bad broadcast frames."] -pub type TXBCASTGB_R = crate::FieldReader; +pub type TxbcastgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad broadcast frames."] #[inline(always)] - pub fn txbcastgb(&self) -> TXBCASTGB_R { - TXBCASTGB_R::new(self.bits) + pub fn txbcastgb(&self) -> TxbcastgbR { + TxbcastgbR::new(self.bits) } } #[doc = "Transmit Frame Count for Good and Bad Broadcast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_broadcast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_BROADCAST_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_BROADCAST_FRAMES_GOOD_BAD_SPEC { +pub struct TxBroadcastFramesGoodBadSpec; +impl crate::RegisterSpec for TxBroadcastFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_broadcast_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_BROADCAST_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for TxBroadcastFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_BROADCAST_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_BROADCAST_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for TxBroadcastFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_carrier_error_frames.rs b/src/eth0/tx_carrier_error_frames.rs index 934056d3..d087a4ce 100644 --- a/src/eth0/tx_carrier_error_frames.rs +++ b/src/eth0/tx_carrier_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_CARRIER_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXCARR` reader - This field indicates the number of frames aborted because of carrier sense error (no carrier or loss of carrier)."] -pub type TXCARR_R = crate::FieldReader; +pub type TxcarrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames aborted because of carrier sense error (no carrier or loss of carrier)."] #[inline(always)] - pub fn txcarr(&self) -> TXCARR_R { - TXCARR_R::new(self.bits) + pub fn txcarr(&self) -> TxcarrR { + TxcarrR::new(self.bits) } } #[doc = "Transmit Frame Count for Carrier Sense Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_carrier_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_CARRIER_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for TX_CARRIER_ERROR_FRAMES_SPEC { +pub struct TxCarrierErrorFramesSpec; +impl crate::RegisterSpec for TxCarrierErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_carrier_error_frames::R`](R) reader structure"] -impl crate::Readable for TX_CARRIER_ERROR_FRAMES_SPEC {} +impl crate::Readable for TxCarrierErrorFramesSpec {} #[doc = "`reset()` method sets TX_CARRIER_ERROR_FRAMES to value 0"] -impl crate::Resettable for TX_CARRIER_ERROR_FRAMES_SPEC { +impl crate::Resettable for TxCarrierErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_deferred_frames.rs b/src/eth0/tx_deferred_frames.rs index cebc6757..fd79cdd3 100644 --- a/src/eth0/tx_deferred_frames.rs +++ b/src/eth0/tx_deferred_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_DEFERRED_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXDEFRD` reader - This field indicates the number of successfully transmitted frames after a deferral in the half-duplex mode."] -pub type TXDEFRD_R = crate::FieldReader; +pub type TxdefrdR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of successfully transmitted frames after a deferral in the half-duplex mode."] #[inline(always)] - pub fn txdefrd(&self) -> TXDEFRD_R { - TXDEFRD_R::new(self.bits) + pub fn txdefrd(&self) -> TxdefrdR { + TxdefrdR::new(self.bits) } } #[doc = "Tx Deferred Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_deferred_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_DEFERRED_FRAMES_SPEC; -impl crate::RegisterSpec for TX_DEFERRED_FRAMES_SPEC { +pub struct TxDeferredFramesSpec; +impl crate::RegisterSpec for TxDeferredFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_deferred_frames::R`](R) reader structure"] -impl crate::Readable for TX_DEFERRED_FRAMES_SPEC {} +impl crate::Readable for TxDeferredFramesSpec {} #[doc = "`reset()` method sets TX_DEFERRED_FRAMES to value 0"] -impl crate::Resettable for TX_DEFERRED_FRAMES_SPEC { +impl crate::Resettable for TxDeferredFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_excessive_collision_frames.rs b/src/eth0/tx_excessive_collision_frames.rs index abedf48f..8c8c8a3b 100644 --- a/src/eth0/tx_excessive_collision_frames.rs +++ b/src/eth0/tx_excessive_collision_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_EXCESSIVE_COLLISION_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXEXSCOL` reader - This field indicates the number of frames aborted because of excessive (16) collision error."] -pub type TXEXSCOL_R = crate::FieldReader; +pub type TxexscolR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames aborted because of excessive (16) collision error."] #[inline(always)] - pub fn txexscol(&self) -> TXEXSCOL_R { - TXEXSCOL_R::new(self.bits) + pub fn txexscol(&self) -> TxexscolR { + TxexscolR::new(self.bits) } } #[doc = "Transmit Frame Count for Excessive Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_EXCESSIVE_COLLISION_FRAMES_SPEC; -impl crate::RegisterSpec for TX_EXCESSIVE_COLLISION_FRAMES_SPEC { +pub struct TxExcessiveCollisionFramesSpec; +impl crate::RegisterSpec for TxExcessiveCollisionFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_excessive_collision_frames::R`](R) reader structure"] -impl crate::Readable for TX_EXCESSIVE_COLLISION_FRAMES_SPEC {} +impl crate::Readable for TxExcessiveCollisionFramesSpec {} #[doc = "`reset()` method sets TX_EXCESSIVE_COLLISION_FRAMES to value 0"] -impl crate::Resettable for TX_EXCESSIVE_COLLISION_FRAMES_SPEC { +impl crate::Resettable for TxExcessiveCollisionFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_excessive_deferral_error.rs b/src/eth0/tx_excessive_deferral_error.rs index fafc9a38..560e00fb 100644 --- a/src/eth0/tx_excessive_deferral_error.rs +++ b/src/eth0/tx_excessive_deferral_error.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_EXCESSIVE_DEFERRAL_ERROR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXEXSDEF` reader - This field indicates the number of frames aborted because of excessive deferral error, that is, frames deferred for more than two max-sized frame times."] -pub type TXEXSDEF_R = crate::FieldReader; +pub type TxexsdefR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames aborted because of excessive deferral error, that is, frames deferred for more than two max-sized frame times."] #[inline(always)] - pub fn txexsdef(&self) -> TXEXSDEF_R { - TXEXSDEF_R::new(self.bits) + pub fn txexsdef(&self) -> TxexsdefR { + TxexsdefR::new(self.bits) } } #[doc = "Transmit Frame Count for Excessive Deferral Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_excessive_deferral_error::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_EXCESSIVE_DEFERRAL_ERROR_SPEC; -impl crate::RegisterSpec for TX_EXCESSIVE_DEFERRAL_ERROR_SPEC { +pub struct TxExcessiveDeferralErrorSpec; +impl crate::RegisterSpec for TxExcessiveDeferralErrorSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_excessive_deferral_error::R`](R) reader structure"] -impl crate::Readable for TX_EXCESSIVE_DEFERRAL_ERROR_SPEC {} +impl crate::Readable for TxExcessiveDeferralErrorSpec {} #[doc = "`reset()` method sets TX_EXCESSIVE_DEFERRAL_ERROR to value 0"] -impl crate::Resettable for TX_EXCESSIVE_DEFERRAL_ERROR_SPEC { +impl crate::Resettable for TxExcessiveDeferralErrorSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_frame_count_good.rs b/src/eth0/tx_frame_count_good.rs index c6237f94..b49cdee6 100644 --- a/src/eth0/tx_frame_count_good.rs +++ b/src/eth0/tx_frame_count_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_FRAME_COUNT_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXFRMG` reader - This field indicates the number of transmitted good frames, exclusive of preamble."] -pub type TXFRMG_R = crate::FieldReader; +pub type TxfrmgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good frames, exclusive of preamble."] #[inline(always)] - pub fn txfrmg(&self) -> TXFRMG_R { - TXFRMG_R::new(self.bits) + pub fn txfrmg(&self) -> TxfrmgR { + TxfrmgR::new(self.bits) } } #[doc = "Tx Frame Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_FRAME_COUNT_GOOD_SPEC; -impl crate::RegisterSpec for TX_FRAME_COUNT_GOOD_SPEC { +pub struct TxFrameCountGoodSpec; +impl crate::RegisterSpec for TxFrameCountGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_frame_count_good::R`](R) reader structure"] -impl crate::Readable for TX_FRAME_COUNT_GOOD_SPEC {} +impl crate::Readable for TxFrameCountGoodSpec {} #[doc = "`reset()` method sets TX_FRAME_COUNT_GOOD to value 0"] -impl crate::Resettable for TX_FRAME_COUNT_GOOD_SPEC { +impl crate::Resettable for TxFrameCountGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_frame_count_good_bad.rs b/src/eth0/tx_frame_count_good_bad.rs index a8be5001..3dc40e1b 100644 --- a/src/eth0/tx_frame_count_good_bad.rs +++ b/src/eth0/tx_frame_count_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_FRAME_COUNT_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXFRMGB` reader - This field indicates the number of good and bad frames transmitted, exclusive of retried frames"] -pub type TXFRMGB_R = crate::FieldReader; +pub type TxfrmgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of good and bad frames transmitted, exclusive of retried frames"] #[inline(always)] - pub fn txfrmgb(&self) -> TXFRMGB_R { - TXFRMGB_R::new(self.bits) + pub fn txfrmgb(&self) -> TxfrmgbR { + TxfrmgbR::new(self.bits) } } #[doc = "Transmit Frame Count for Goodand Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_frame_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_FRAME_COUNT_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_FRAME_COUNT_GOOD_BAD_SPEC { +pub struct TxFrameCountGoodBadSpec; +impl crate::RegisterSpec for TxFrameCountGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_frame_count_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_FRAME_COUNT_GOOD_BAD_SPEC {} +impl crate::Readable for TxFrameCountGoodBadSpec {} #[doc = "`reset()` method sets TX_FRAME_COUNT_GOOD_BAD to value 0"] -impl crate::Resettable for TX_FRAME_COUNT_GOOD_BAD_SPEC { +impl crate::Resettable for TxFrameCountGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_late_collision_frames.rs b/src/eth0/tx_late_collision_frames.rs index e804cb84..0de3118e 100644 --- a/src/eth0/tx_late_collision_frames.rs +++ b/src/eth0/tx_late_collision_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_LATE_COLLISION_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXLATECOL` reader - This field indicates the number of frames aborted because of late collision error."] -pub type TXLATECOL_R = crate::FieldReader; +pub type TxlatecolR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames aborted because of late collision error."] #[inline(always)] - pub fn txlatecol(&self) -> TXLATECOL_R { - TXLATECOL_R::new(self.bits) + pub fn txlatecol(&self) -> TxlatecolR { + TxlatecolR::new(self.bits) } } #[doc = "Transmit Frame Count for Late Collision Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_late_collision_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_LATE_COLLISION_FRAMES_SPEC; -impl crate::RegisterSpec for TX_LATE_COLLISION_FRAMES_SPEC { +pub struct TxLateCollisionFramesSpec; +impl crate::RegisterSpec for TxLateCollisionFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_late_collision_frames::R`](R) reader structure"] -impl crate::Readable for TX_LATE_COLLISION_FRAMES_SPEC {} +impl crate::Readable for TxLateCollisionFramesSpec {} #[doc = "`reset()` method sets TX_LATE_COLLISION_FRAMES to value 0"] -impl crate::Resettable for TX_LATE_COLLISION_FRAMES_SPEC { +impl crate::Resettable for TxLateCollisionFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_multicast_frames_good.rs b/src/eth0/tx_multicast_frames_good.rs index 33c7bc3d..af1f6625 100644 --- a/src/eth0/tx_multicast_frames_good.rs +++ b/src/eth0/tx_multicast_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_MULTICAST_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXMCASTG` reader - This field indicates the number of transmitted good multicast frames."] -pub type TXMCASTG_R = crate::FieldReader; +pub type TxmcastgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good multicast frames."] #[inline(always)] - pub fn txmcastg(&self) -> TXMCASTG_R { - TXMCASTG_R::new(self.bits) + pub fn txmcastg(&self) -> TxmcastgR { + TxmcastgR::new(self.bits) } } #[doc = "Transmit Frame Count for Good Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_MULTICAST_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for TX_MULTICAST_FRAMES_GOOD_SPEC { +pub struct TxMulticastFramesGoodSpec; +impl crate::RegisterSpec for TxMulticastFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_multicast_frames_good::R`](R) reader structure"] -impl crate::Readable for TX_MULTICAST_FRAMES_GOOD_SPEC {} +impl crate::Readable for TxMulticastFramesGoodSpec {} #[doc = "`reset()` method sets TX_MULTICAST_FRAMES_GOOD to value 0"] -impl crate::Resettable for TX_MULTICAST_FRAMES_GOOD_SPEC { +impl crate::Resettable for TxMulticastFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_multicast_frames_good_bad.rs b/src/eth0/tx_multicast_frames_good_bad.rs index 3f66ef24..365aa148 100644 --- a/src/eth0/tx_multicast_frames_good_bad.rs +++ b/src/eth0/tx_multicast_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_MULTICAST_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXMCASTGB` reader - This field indicates the number of transmitted good and bad multicast frames."] -pub type TXMCASTGB_R = crate::FieldReader; +pub type TxmcastgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad multicast frames."] #[inline(always)] - pub fn txmcastgb(&self) -> TXMCASTGB_R { - TXMCASTGB_R::new(self.bits) + pub fn txmcastgb(&self) -> TxmcastgbR { + TxmcastgbR::new(self.bits) } } #[doc = "Transmit Frame Count for Good and Bad Multicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_MULTICAST_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_MULTICAST_FRAMES_GOOD_BAD_SPEC { +pub struct TxMulticastFramesGoodBadSpec; +impl crate::RegisterSpec for TxMulticastFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_multicast_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_MULTICAST_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for TxMulticastFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_MULTICAST_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_MULTICAST_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for TxMulticastFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_multiple_collision_good_frames.rs b/src/eth0/tx_multiple_collision_good_frames.rs index bfe4a438..a3ba4fc1 100644 --- a/src/eth0/tx_multiple_collision_good_frames.rs +++ b/src/eth0/tx_multiple_collision_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_MULTIPLE_COLLISION_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXMULTCOLG` reader - This field indicates the number of successfully transmitted frames after multiple collisions in the half-duplex mode."] -pub type TXMULTCOLG_R = crate::FieldReader; +pub type TxmultcolgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of successfully transmitted frames after multiple collisions in the half-duplex mode."] #[inline(always)] - pub fn txmultcolg(&self) -> TXMULTCOLG_R { - TXMULTCOLG_R::new(self.bits) + pub fn txmultcolg(&self) -> TxmultcolgR { + TxmultcolgR::new(self.bits) } } #[doc = "Transmit Frame Count for Frames Transmitted after Multiple Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_multiple_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC { +pub struct TxMultipleCollisionGoodFramesSpec; +impl crate::RegisterSpec for TxMultipleCollisionGoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_multiple_collision_good_frames::R`](R) reader structure"] -impl crate::Readable for TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC {} +impl crate::Readable for TxMultipleCollisionGoodFramesSpec {} #[doc = "`reset()` method sets TX_MULTIPLE_COLLISION_GOOD_FRAMES to value 0"] -impl crate::Resettable for TX_MULTIPLE_COLLISION_GOOD_FRAMES_SPEC { +impl crate::Resettable for TxMultipleCollisionGoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_octet_count_good.rs b/src/eth0/tx_octet_count_good.rs index 1478b24d..5ba38a20 100644 --- a/src/eth0/tx_octet_count_good.rs +++ b/src/eth0/tx_octet_count_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_OCTET_COUNT_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXOCTG` reader - This field indicates the number of bytes transmitted, exclusive of preamble, in good frames."] -pub type TXOCTG_R = crate::FieldReader; +pub type TxoctgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes transmitted, exclusive of preamble, in good frames."] #[inline(always)] - pub fn txoctg(&self) -> TXOCTG_R { - TXOCTG_R::new(self.bits) + pub fn txoctg(&self) -> TxoctgR { + TxoctgR::new(self.bits) } } #[doc = "Tx Octet Count Good Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_OCTET_COUNT_GOOD_SPEC; -impl crate::RegisterSpec for TX_OCTET_COUNT_GOOD_SPEC { +pub struct TxOctetCountGoodSpec; +impl crate::RegisterSpec for TxOctetCountGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_octet_count_good::R`](R) reader structure"] -impl crate::Readable for TX_OCTET_COUNT_GOOD_SPEC {} +impl crate::Readable for TxOctetCountGoodSpec {} #[doc = "`reset()` method sets TX_OCTET_COUNT_GOOD to value 0"] -impl crate::Resettable for TX_OCTET_COUNT_GOOD_SPEC { +impl crate::Resettable for TxOctetCountGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_octet_count_good_bad.rs b/src/eth0/tx_octet_count_good_bad.rs index cba1085e..a127ec1b 100644 --- a/src/eth0/tx_octet_count_good_bad.rs +++ b/src/eth0/tx_octet_count_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_OCTET_COUNT_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXOCTGB` reader - This field indicates the number of bytes transmitted in good and bad frames exclusive of preamble and retried bytes."] -pub type TXOCTGB_R = crate::FieldReader; +pub type TxoctgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of bytes transmitted in good and bad frames exclusive of preamble and retried bytes."] #[inline(always)] - pub fn txoctgb(&self) -> TXOCTGB_R { - TXOCTGB_R::new(self.bits) + pub fn txoctgb(&self) -> TxoctgbR { + TxoctgbR::new(self.bits) } } #[doc = "Transmit Octet Count for Good and Bad Frames Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_octet_count_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_OCTET_COUNT_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_OCTET_COUNT_GOOD_BAD_SPEC { +pub struct TxOctetCountGoodBadSpec; +impl crate::RegisterSpec for TxOctetCountGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_octet_count_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_OCTET_COUNT_GOOD_BAD_SPEC {} +impl crate::Readable for TxOctetCountGoodBadSpec {} #[doc = "`reset()` method sets TX_OCTET_COUNT_GOOD_BAD to value 0"] -impl crate::Resettable for TX_OCTET_COUNT_GOOD_BAD_SPEC { +impl crate::Resettable for TxOctetCountGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_osize_frames_good.rs b/src/eth0/tx_osize_frames_good.rs index 111f2568..9d54e4f5 100644 --- a/src/eth0/tx_osize_frames_good.rs +++ b/src/eth0/tx_osize_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_OSIZE_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXOSIZG` reader - This field indicates the number of frames transmitted without errors and with length greater than the maxsize (1,518 or 1,522 bytes for VLAN tagged frames; 2000 bytes if enabled by setting MAC Configuration.2KPE)."] -pub type TXOSIZG_R = crate::FieldReader; +pub type TxosizgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames transmitted without errors and with length greater than the maxsize (1,518 or 1,522 bytes for VLAN tagged frames; 2000 bytes if enabled by setting MAC Configuration.2KPE)."] #[inline(always)] - pub fn txosizg(&self) -> TXOSIZG_R { - TXOSIZG_R::new(self.bits) + pub fn txosizg(&self) -> TxosizgR { + TxosizgR::new(self.bits) } } #[doc = "Transmit Frame Count for Good Oversize Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_osize_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_OSIZE_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for TX_OSIZE_FRAMES_GOOD_SPEC { +pub struct TxOsizeFramesGoodSpec; +impl crate::RegisterSpec for TxOsizeFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_osize_frames_good::R`](R) reader structure"] -impl crate::Readable for TX_OSIZE_FRAMES_GOOD_SPEC {} +impl crate::Readable for TxOsizeFramesGoodSpec {} #[doc = "`reset()` method sets TX_OSIZE_FRAMES_GOOD to value 0"] -impl crate::Resettable for TX_OSIZE_FRAMES_GOOD_SPEC { +impl crate::Resettable for TxOsizeFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_pause_frames.rs b/src/eth0/tx_pause_frames.rs index a22d49bc..fd84017c 100644 --- a/src/eth0/tx_pause_frames.rs +++ b/src/eth0/tx_pause_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_PAUSE_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXPAUSE` reader - This field indicates the number of transmitted good PAUSE frames."] -pub type TXPAUSE_R = crate::FieldReader; +pub type TxpauseR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good PAUSE frames."] #[inline(always)] - pub fn txpause(&self) -> TXPAUSE_R { - TXPAUSE_R::new(self.bits) + pub fn txpause(&self) -> TxpauseR { + TxpauseR::new(self.bits) } } #[doc = "Transmit Frame Count for Good PAUSE Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_pause_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_PAUSE_FRAMES_SPEC; -impl crate::RegisterSpec for TX_PAUSE_FRAMES_SPEC { +pub struct TxPauseFramesSpec; +impl crate::RegisterSpec for TxPauseFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_pause_frames::R`](R) reader structure"] -impl crate::Readable for TX_PAUSE_FRAMES_SPEC {} +impl crate::Readable for TxPauseFramesSpec {} #[doc = "`reset()` method sets TX_PAUSE_FRAMES to value 0"] -impl crate::Resettable for TX_PAUSE_FRAMES_SPEC { +impl crate::Resettable for TxPauseFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_single_collision_good_frames.rs b/src/eth0/tx_single_collision_good_frames.rs index ef1e763e..fab21507 100644 --- a/src/eth0/tx_single_collision_good_frames.rs +++ b/src/eth0/tx_single_collision_good_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_SINGLE_COLLISION_GOOD_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXSNGLCOLG` reader - This field indicates the number of successfully transmitted frames after a single collision in the half-duplex mode."] -pub type TXSNGLCOLG_R = crate::FieldReader; +pub type TxsnglcolgR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of successfully transmitted frames after a single collision in the half-duplex mode."] #[inline(always)] - pub fn txsnglcolg(&self) -> TXSNGLCOLG_R { - TXSNGLCOLG_R::new(self.bits) + pub fn txsnglcolg(&self) -> TxsnglcolgR { + TxsnglcolgR::new(self.bits) } } #[doc = "Transmit Frame Count for Frames Transmitted after Single Collision\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_single_collision_good_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC; -impl crate::RegisterSpec for TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC { +pub struct TxSingleCollisionGoodFramesSpec; +impl crate::RegisterSpec for TxSingleCollisionGoodFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_single_collision_good_frames::R`](R) reader structure"] -impl crate::Readable for TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC {} +impl crate::Readable for TxSingleCollisionGoodFramesSpec {} #[doc = "`reset()` method sets TX_SINGLE_COLLISION_GOOD_FRAMES to value 0"] -impl crate::Resettable for TX_SINGLE_COLLISION_GOOD_FRAMES_SPEC { +impl crate::Resettable for TxSingleCollisionGoodFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_underflow_error_frames.rs b/src/eth0/tx_underflow_error_frames.rs index 93e55ac9..8e7dacd6 100644 --- a/src/eth0/tx_underflow_error_frames.rs +++ b/src/eth0/tx_underflow_error_frames.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_UNDERFLOW_ERROR_FRAMES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXUNDRFLW` reader - This field indicates the number of frames aborted because of frame underflow error."] -pub type TXUNDRFLW_R = crate::FieldReader; +pub type TxundrflwR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of frames aborted because of frame underflow error."] #[inline(always)] - pub fn txundrflw(&self) -> TXUNDRFLW_R { - TXUNDRFLW_R::new(self.bits) + pub fn txundrflw(&self) -> TxundrflwR { + TxundrflwR::new(self.bits) } } #[doc = "Transmit Frame Count for Underflow Error Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_underflow_error_frames::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_UNDERFLOW_ERROR_FRAMES_SPEC; -impl crate::RegisterSpec for TX_UNDERFLOW_ERROR_FRAMES_SPEC { +pub struct TxUnderflowErrorFramesSpec; +impl crate::RegisterSpec for TxUnderflowErrorFramesSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_underflow_error_frames::R`](R) reader structure"] -impl crate::Readable for TX_UNDERFLOW_ERROR_FRAMES_SPEC {} +impl crate::Readable for TxUnderflowErrorFramesSpec {} #[doc = "`reset()` method sets TX_UNDERFLOW_ERROR_FRAMES to value 0"] -impl crate::Resettable for TX_UNDERFLOW_ERROR_FRAMES_SPEC { +impl crate::Resettable for TxUnderflowErrorFramesSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_unicast_frames_good_bad.rs b/src/eth0/tx_unicast_frames_good_bad.rs index ca67a94e..2124f4ee 100644 --- a/src/eth0/tx_unicast_frames_good_bad.rs +++ b/src/eth0/tx_unicast_frames_good_bad.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_UNICAST_FRAMES_GOOD_BAD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXUCASTGB` reader - This field indicates the number of transmitted good and bad unicast frames."] -pub type TXUCASTGB_R = crate::FieldReader; +pub type TxucastgbR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This field indicates the number of transmitted good and bad unicast frames."] #[inline(always)] - pub fn txucastgb(&self) -> TXUCASTGB_R { - TXUCASTGB_R::new(self.bits) + pub fn txucastgb(&self) -> TxucastgbR { + TxucastgbR::new(self.bits) } } #[doc = "Transmit Frame Count for Good and Bad Unicast Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_unicast_frames_good_bad::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_UNICAST_FRAMES_GOOD_BAD_SPEC; -impl crate::RegisterSpec for TX_UNICAST_FRAMES_GOOD_BAD_SPEC { +pub struct TxUnicastFramesGoodBadSpec; +impl crate::RegisterSpec for TxUnicastFramesGoodBadSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_unicast_frames_good_bad::R`](R) reader structure"] -impl crate::Readable for TX_UNICAST_FRAMES_GOOD_BAD_SPEC {} +impl crate::Readable for TxUnicastFramesGoodBadSpec {} #[doc = "`reset()` method sets TX_UNICAST_FRAMES_GOOD_BAD to value 0"] -impl crate::Resettable for TX_UNICAST_FRAMES_GOOD_BAD_SPEC { +impl crate::Resettable for TxUnicastFramesGoodBadSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/tx_vlan_frames_good.rs b/src/eth0/tx_vlan_frames_good.rs index e092e4a0..4858b0ee 100644 --- a/src/eth0/tx_vlan_frames_good.rs +++ b/src/eth0/tx_vlan_frames_good.rs @@ -1,22 +1,22 @@ #[doc = "Register `TX_VLAN_FRAMES_GOOD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TXVLANG` reader - This register maintains the number of transmitted good VLAN frames, exclusive of retried frames."] -pub type TXVLANG_R = crate::FieldReader; +pub type TxvlangR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - This register maintains the number of transmitted good VLAN frames, exclusive of retried frames."] #[inline(always)] - pub fn txvlang(&self) -> TXVLANG_R { - TXVLANG_R::new(self.bits) + pub fn txvlang(&self) -> TxvlangR { + TxvlangR::new(self.bits) } } #[doc = "Transmit Frame Count for Good VLAN Frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_vlan_frames_good::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TX_VLAN_FRAMES_GOOD_SPEC; -impl crate::RegisterSpec for TX_VLAN_FRAMES_GOOD_SPEC { +pub struct TxVlanFramesGoodSpec; +impl crate::RegisterSpec for TxVlanFramesGoodSpec { type Ux = u32; } #[doc = "`read()` method returns [`tx_vlan_frames_good::R`](R) reader structure"] -impl crate::Readable for TX_VLAN_FRAMES_GOOD_SPEC {} +impl crate::Readable for TxVlanFramesGoodSpec {} #[doc = "`reset()` method sets TX_VLAN_FRAMES_GOOD to value 0"] -impl crate::Resettable for TX_VLAN_FRAMES_GOOD_SPEC { +impl crate::Resettable for TxVlanFramesGoodSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0/version.rs b/src/eth0/version.rs index b3e2943e..e07ae624 100644 --- a/src/eth0/version.rs +++ b/src/eth0/version.rs @@ -1,29 +1,29 @@ #[doc = "Register `VERSION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SNPSVER` reader - Synopsys-defined Version (3.7)"] -pub type SNPSVER_R = crate::FieldReader; +pub type SnpsverR = crate::FieldReader; #[doc = "Field `USERVER` reader - User-defined Version (Configured with the coreConsultant)"] -pub type USERVER_R = crate::FieldReader; +pub type UserverR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Synopsys-defined Version (3.7)"] #[inline(always)] - pub fn snpsver(&self) -> SNPSVER_R { - SNPSVER_R::new((self.bits & 0xff) as u8) + pub fn snpsver(&self) -> SnpsverR { + SnpsverR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - User-defined Version (Configured with the coreConsultant)"] #[inline(always)] - pub fn userver(&self) -> USERVER_R { - USERVER_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn userver(&self) -> UserverR { + UserverR::new(((self.bits >> 8) & 0xff) as u8) } } #[doc = "Version Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VERSION_SPEC; -impl crate::RegisterSpec for VERSION_SPEC { +pub struct VersionSpec; +impl crate::RegisterSpec for VersionSpec { type Ux = u32; } #[doc = "`read()` method returns [`version::R`](R) reader structure"] -impl crate::Readable for VERSION_SPEC {} +impl crate::Readable for VersionSpec {} #[doc = "`reset()` method sets VERSION to value 0x1037"] -impl crate::Resettable for VERSION_SPEC { +impl crate::Resettable for VersionSpec { const RESET_VALUE: u32 = 0x1037; } diff --git a/src/eth0/vlan_tag.rs b/src/eth0/vlan_tag.rs index 6ab03815..2ea0d920 100644 --- a/src/eth0/vlan_tag.rs +++ b/src/eth0/vlan_tag.rs @@ -1,101 +1,92 @@ #[doc = "Register `VLAN_TAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `VLAN_TAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VL` reader - VLAN Tag Identifier for Receive Frames"] -pub type VL_R = crate::FieldReader; +pub type VlR = crate::FieldReader; #[doc = "Field `VL` writer - VLAN Tag Identifier for Receive Frames"] -pub type VL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type VlW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `ETV` reader - Enable 12-Bit VLAN Tag Comparison"] -pub type ETV_R = crate::BitReader; +pub type EtvR = crate::BitReader; #[doc = "Field `ETV` writer - Enable 12-Bit VLAN Tag Comparison"] -pub type ETV_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EtvW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VTIM` reader - VLAN Tag Inverse Match Enable"] -pub type VTIM_R = crate::BitReader; +pub type VtimR = crate::BitReader; #[doc = "Field `VTIM` writer - VLAN Tag Inverse Match Enable"] -pub type VTIM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type VtimW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESVL` reader - Enable S-VLAN"] -pub type ESVL_R = crate::BitReader; +pub type EsvlR = crate::BitReader; #[doc = "Field `ESVL` writer - Enable S-VLAN"] -pub type ESVL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EsvlW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VTHM` reader - VLAN Tag Hash Table Match Enable"] -pub type VTHM_R = crate::BitReader; +pub type VthmR = crate::BitReader; impl R { #[doc = "Bits 0:15 - VLAN Tag Identifier for Receive Frames"] #[inline(always)] - pub fn vl(&self) -> VL_R { - VL_R::new((self.bits & 0xffff) as u16) + pub fn vl(&self) -> VlR { + VlR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] - pub fn etv(&self) -> ETV_R { - ETV_R::new(((self.bits >> 16) & 1) != 0) + pub fn etv(&self) -> EtvR { + EtvR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] - pub fn vtim(&self) -> VTIM_R { - VTIM_R::new(((self.bits >> 17) & 1) != 0) + pub fn vtim(&self) -> VtimR { + VtimR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Enable S-VLAN"] #[inline(always)] - pub fn esvl(&self) -> ESVL_R { - ESVL_R::new(((self.bits >> 18) & 1) != 0) + pub fn esvl(&self) -> EsvlR { + EsvlR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - VLAN Tag Hash Table Match Enable"] #[inline(always)] - pub fn vthm(&self) -> VTHM_R { - VTHM_R::new(((self.bits >> 19) & 1) != 0) + pub fn vthm(&self) -> VthmR { + VthmR::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - VLAN Tag Identifier for Receive Frames"] #[inline(always)] #[must_use] - pub fn vl(&mut self) -> VL_W { - VL_W::new(self, 0) + pub fn vl(&mut self) -> VlW { + VlW::new(self, 0) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] #[must_use] - pub fn etv(&mut self) -> ETV_W { - ETV_W::new(self, 16) + pub fn etv(&mut self) -> EtvW { + EtvW::new(self, 16) } #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] #[must_use] - pub fn vtim(&mut self) -> VTIM_W { - VTIM_W::new(self, 17) + pub fn vtim(&mut self) -> VtimW { + VtimW::new(self, 17) } #[doc = "Bit 18 - Enable S-VLAN"] #[inline(always)] #[must_use] - pub fn esvl(&mut self) -> ESVL_W { - ESVL_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn esvl(&mut self) -> EsvlW { + EsvlW::new(self, 18) } } #[doc = "VLAN Tag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vlan_tag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vlan_tag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VLAN_TAG_SPEC; -impl crate::RegisterSpec for VLAN_TAG_SPEC { +pub struct VlanTagSpec; +impl crate::RegisterSpec for VlanTagSpec { type Ux = u32; } #[doc = "`read()` method returns [`vlan_tag::R`](R) reader structure"] -impl crate::Readable for VLAN_TAG_SPEC {} +impl crate::Readable for VlanTagSpec {} #[doc = "`write(|w| ..)` method takes [`vlan_tag::W`](W) writer structure"] -impl crate::Writable for VLAN_TAG_SPEC { +impl crate::Writable for VlanTagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VLAN_TAG to value 0"] -impl crate::Resettable for VLAN_TAG_SPEC { +impl crate::Resettable for VlanTagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/eth0_con.rs b/src/eth0_con.rs index 9a577abf..0596e555 100644 --- a/src/eth0_con.rs +++ b/src/eth0_con.rs @@ -1,17 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - eth0_con: ETH0_CON, + eth0_con: Eth0Con, } impl RegisterBlock { #[doc = "0x00 - Ethernet 0 Port Control Register"] #[inline(always)] - pub const fn eth0_con(&self) -> Ð0_CON { + pub const fn eth0_con(&self) -> &Eth0Con { &self.eth0_con } } #[doc = "ETH0_CON (rw) register accessor: Ethernet 0 Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eth0_con::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eth0_con::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@eth0_con`] module"] -pub type ETH0_CON = crate::Reg; +#[doc(alias = "ETH0_CON")] +pub type Eth0Con = crate::Reg; #[doc = "Ethernet 0 Port Control Register"] pub mod eth0_con; diff --git a/src/eth0_con/eth0_con.rs b/src/eth0_con/eth0_con.rs index 04b8ecc9..46577b38 100644 --- a/src/eth0_con/eth0_con.rs +++ b/src/eth0_con/eth0_con.rs @@ -1,67 +1,67 @@ #[doc = "Register `ETH0_CON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ETH0_CON` writer"] -pub type W = crate::W; -#[doc = "Field `RXD0` reader - MAC Receive Input 0"] -pub type RXD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "MAC Receive Input 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD0_A { +pub enum Rxd0 { #[doc = "0: Data input RXD0A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD0B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD0C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD0D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD0_A) -> Self { + fn from(variant: Rxd0) -> Self { variant as _ } } -impl crate::FieldSpec for RXD0_A { +impl crate::FieldSpec for Rxd0 { type Ux = u8; } -impl RXD0_R { +#[doc = "Field `RXD0` reader - MAC Receive Input 0"] +pub type Rxd0R = crate::FieldReader; +impl Rxd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD0_A { + pub const fn variant(&self) -> Rxd0 { match self.bits { - 0 => RXD0_A::VALUE1, - 1 => RXD0_A::VALUE2, - 2 => RXD0_A::VALUE3, - 3 => RXD0_A::VALUE4, + 0 => Rxd0::Value1, + 1 => Rxd0::Value2, + 2 => Rxd0::Value3, + 3 => Rxd0::Value4, _ => unreachable!(), } } #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD0_A::VALUE1 + *self == Rxd0::Value1 } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD0_A::VALUE2 + *self == Rxd0::Value2 } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD0_A::VALUE3 + *self == Rxd0::Value3 } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD0_A::VALUE4 + *self == Rxd0::Value4 } } #[doc = "Field `RXD0` writer - MAC Receive Input 0"] -pub type RXD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD0_A>; -impl<'a, REG> RXD0_W<'a, REG> +pub type Rxd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd0>; +impl<'a, REG> Rxd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Data input RXD0A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE1) + self.variant(Rxd0::Value1) } #[doc = "Data input RXD0B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE2) + self.variant(Rxd0::Value2) } #[doc = "Data input RXD0C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE3) + self.variant(Rxd0::Value3) } #[doc = "Data input RXD0D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD0_A::VALUE4) + self.variant(Rxd0::Value4) } } -#[doc = "Field `RXD1` reader - MAC Receive Input 1"] -pub type RXD1_R = crate::FieldReader; #[doc = "MAC Receive Input 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD1_A { +pub enum Rxd1 { #[doc = "0: Data input RXD1A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD1B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD1C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD1D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD1_A) -> Self { + fn from(variant: Rxd1) -> Self { variant as _ } } -impl crate::FieldSpec for RXD1_A { +impl crate::FieldSpec for Rxd1 { type Ux = u8; } -impl RXD1_R { +#[doc = "Field `RXD1` reader - MAC Receive Input 1"] +pub type Rxd1R = crate::FieldReader; +impl Rxd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD1_A { + pub const fn variant(&self) -> Rxd1 { match self.bits { - 0 => RXD1_A::VALUE1, - 1 => RXD1_A::VALUE2, - 2 => RXD1_A::VALUE3, - 3 => RXD1_A::VALUE4, + 0 => Rxd1::Value1, + 1 => Rxd1::Value2, + 2 => Rxd1::Value3, + 3 => Rxd1::Value4, _ => unreachable!(), } } #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD1_A::VALUE1 + *self == Rxd1::Value1 } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD1_A::VALUE2 + *self == Rxd1::Value2 } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD1_A::VALUE3 + *self == Rxd1::Value3 } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD1_A::VALUE4 + *self == Rxd1::Value4 } } #[doc = "Field `RXD1` writer - MAC Receive Input 1"] -pub type RXD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD1_A>; -impl<'a, REG> RXD1_W<'a, REG> +pub type Rxd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd1>; +impl<'a, REG> Rxd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Data input RXD1A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE1) + self.variant(Rxd1::Value1) } #[doc = "Data input RXD1B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE2) + self.variant(Rxd1::Value2) } #[doc = "Data input RXD1C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE3) + self.variant(Rxd1::Value3) } #[doc = "Data input RXD1D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD1_A::VALUE4) + self.variant(Rxd1::Value4) } } -#[doc = "Field `RXD2` reader - MAC Receive Input 2"] -pub type RXD2_R = crate::FieldReader; #[doc = "MAC Receive Input 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD2_A { +pub enum Rxd2 { #[doc = "0: Data input RXD2A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD2B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD2C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD2D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD2_A) -> Self { + fn from(variant: Rxd2) -> Self { variant as _ } } -impl crate::FieldSpec for RXD2_A { +impl crate::FieldSpec for Rxd2 { type Ux = u8; } -impl RXD2_R { +#[doc = "Field `RXD2` reader - MAC Receive Input 2"] +pub type Rxd2R = crate::FieldReader; +impl Rxd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD2_A { + pub const fn variant(&self) -> Rxd2 { match self.bits { - 0 => RXD2_A::VALUE1, - 1 => RXD2_A::VALUE2, - 2 => RXD2_A::VALUE3, - 3 => RXD2_A::VALUE4, + 0 => Rxd2::Value1, + 1 => Rxd2::Value2, + 2 => Rxd2::Value3, + 3 => Rxd2::Value4, _ => unreachable!(), } } #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD2_A::VALUE1 + *self == Rxd2::Value1 } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD2_A::VALUE2 + *self == Rxd2::Value2 } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD2_A::VALUE3 + *self == Rxd2::Value3 } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD2_A::VALUE4 + *self == Rxd2::Value4 } } #[doc = "Field `RXD2` writer - MAC Receive Input 2"] -pub type RXD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD2_A>; -impl<'a, REG> RXD2_W<'a, REG> +pub type Rxd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd2>; +impl<'a, REG> Rxd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Data input RXD2A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE1) + self.variant(Rxd2::Value1) } #[doc = "Data input RXD2B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE2) + self.variant(Rxd2::Value2) } #[doc = "Data input RXD2C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE3) + self.variant(Rxd2::Value3) } #[doc = "Data input RXD2D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD2_A::VALUE4) + self.variant(Rxd2::Value4) } } -#[doc = "Field `RXD3` reader - MAC Receive Input 3"] -pub type RXD3_R = crate::FieldReader; #[doc = "MAC Receive Input 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXD3_A { +pub enum Rxd3 { #[doc = "0: Data input RXD3A is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXD3B is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXD3C is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXD3D is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXD3_A) -> Self { + fn from(variant: Rxd3) -> Self { variant as _ } } -impl crate::FieldSpec for RXD3_A { +impl crate::FieldSpec for Rxd3 { type Ux = u8; } -impl RXD3_R { +#[doc = "Field `RXD3` reader - MAC Receive Input 3"] +pub type Rxd3R = crate::FieldReader; +impl Rxd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXD3_A { + pub const fn variant(&self) -> Rxd3 { match self.bits { - 0 => RXD3_A::VALUE1, - 1 => RXD3_A::VALUE2, - 2 => RXD3_A::VALUE3, - 3 => RXD3_A::VALUE4, + 0 => Rxd3::Value1, + 1 => Rxd3::Value2, + 2 => Rxd3::Value3, + 3 => Rxd3::Value4, _ => unreachable!(), } } #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXD3_A::VALUE1 + *self == Rxd3::Value1 } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXD3_A::VALUE2 + *self == Rxd3::Value2 } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXD3_A::VALUE3 + *self == Rxd3::Value3 } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXD3_A::VALUE4 + *self == Rxd3::Value4 } } #[doc = "Field `RXD3` writer - MAC Receive Input 3"] -pub type RXD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXD3_A>; -impl<'a, REG> RXD3_W<'a, REG> +pub type Rxd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxd3>; +impl<'a, REG> Rxd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Data input RXD3A is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE1) + self.variant(Rxd3::Value1) } #[doc = "Data input RXD3B is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE2) + self.variant(Rxd3::Value2) } #[doc = "Data input RXD3C is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE3) + self.variant(Rxd3::Value3) } #[doc = "Data input RXD3D is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXD3_A::VALUE4) + self.variant(Rxd3::Value4) } } -#[doc = "Field `CLK_RMII` reader - RMII clock input"] -pub type CLK_RMII_R = crate::FieldReader; #[doc = "RMII clock input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLK_RMII_A { +pub enum ClkRmii { #[doc = "0: Data input RMIIA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RMIIB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RMIIC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RMIID is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLK_RMII_A) -> Self { + fn from(variant: ClkRmii) -> Self { variant as _ } } -impl crate::FieldSpec for CLK_RMII_A { +impl crate::FieldSpec for ClkRmii { type Ux = u8; } -impl CLK_RMII_R { +#[doc = "Field `CLK_RMII` reader - RMII clock input"] +pub type ClkRmiiR = crate::FieldReader; +impl ClkRmiiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLK_RMII_A { + pub const fn variant(&self) -> ClkRmii { match self.bits { - 0 => CLK_RMII_A::VALUE1, - 1 => CLK_RMII_A::VALUE2, - 2 => CLK_RMII_A::VALUE3, - 3 => CLK_RMII_A::VALUE4, + 0 => ClkRmii::Value1, + 1 => ClkRmii::Value2, + 2 => ClkRmii::Value3, + 3 => ClkRmii::Value4, _ => unreachable!(), } } #[doc = "Data input RMIIA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLK_RMII_A::VALUE1 + *self == ClkRmii::Value1 } #[doc = "Data input RMIIB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLK_RMII_A::VALUE2 + *self == ClkRmii::Value2 } #[doc = "Data input RMIIC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLK_RMII_A::VALUE3 + *self == ClkRmii::Value3 } #[doc = "Data input RMIID is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLK_RMII_A::VALUE4 + *self == ClkRmii::Value4 } } #[doc = "Field `CLK_RMII` writer - RMII clock input"] -pub type CLK_RMII_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CLK_RMII_A>; -impl<'a, REG> CLK_RMII_W<'a, REG> +pub type ClkRmiiW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ClkRmii>; +impl<'a, REG> ClkRmiiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Data input RMIIA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLK_RMII_A::VALUE1) + self.variant(ClkRmii::Value1) } #[doc = "Data input RMIIB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLK_RMII_A::VALUE2) + self.variant(ClkRmii::Value2) } #[doc = "Data input RMIIC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLK_RMII_A::VALUE3) + self.variant(ClkRmii::Value3) } #[doc = "Data input RMIID is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLK_RMII_A::VALUE4) + self.variant(ClkRmii::Value4) } } -#[doc = "Field `CRS_DV` reader - CRS_DV input"] -pub type CRS_DV_R = crate::FieldReader; #[doc = "CRS_DV input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CRS_DV_A { +pub enum CrsDv { #[doc = "0: Data input CRS_DVA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input CRS_DVB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input CRS_DVC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input CRS_DVD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CRS_DV_A) -> Self { + fn from(variant: CrsDv) -> Self { variant as _ } } -impl crate::FieldSpec for CRS_DV_A { +impl crate::FieldSpec for CrsDv { type Ux = u8; } -impl CRS_DV_R { +#[doc = "Field `CRS_DV` reader - CRS_DV input"] +pub type CrsDvR = crate::FieldReader; +impl CrsDvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CRS_DV_A { + pub const fn variant(&self) -> CrsDv { match self.bits { - 0 => CRS_DV_A::VALUE1, - 1 => CRS_DV_A::VALUE2, - 2 => CRS_DV_A::VALUE3, - 3 => CRS_DV_A::VALUE4, + 0 => CrsDv::Value1, + 1 => CrsDv::Value2, + 2 => CrsDv::Value3, + 3 => CrsDv::Value4, _ => unreachable!(), } } #[doc = "Data input CRS_DVA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CRS_DV_A::VALUE1 + *self == CrsDv::Value1 } #[doc = "Data input CRS_DVB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CRS_DV_A::VALUE2 + *self == CrsDv::Value2 } #[doc = "Data input CRS_DVC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CRS_DV_A::VALUE3 + *self == CrsDv::Value3 } #[doc = "Data input CRS_DVD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CRS_DV_A::VALUE4 + *self == CrsDv::Value4 } } #[doc = "Field `CRS_DV` writer - CRS_DV input"] -pub type CRS_DV_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CRS_DV_A>; -impl<'a, REG> CRS_DV_W<'a, REG> +pub type CrsDvW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CrsDv>; +impl<'a, REG> CrsDvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Data input CRS_DVA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRS_DV_A::VALUE1) + self.variant(CrsDv::Value1) } #[doc = "Data input CRS_DVB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRS_DV_A::VALUE2) + self.variant(CrsDv::Value2) } #[doc = "Data input CRS_DVC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CRS_DV_A::VALUE3) + self.variant(CrsDv::Value3) } #[doc = "Data input CRS_DVD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CRS_DV_A::VALUE4) + self.variant(CrsDv::Value4) } } -#[doc = "Field `CRS` reader - CRS input"] -pub type CRS_R = crate::FieldReader; #[doc = "CRS input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CRS_A { +pub enum Crs { #[doc = "0: Data input CRSA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input CRSB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input CRSC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input CRSD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CRS_A) -> Self { + fn from(variant: Crs) -> Self { variant as _ } } -impl crate::FieldSpec for CRS_A { +impl crate::FieldSpec for Crs { type Ux = u8; } -impl CRS_R { +#[doc = "Field `CRS` reader - CRS input"] +pub type CrsR = crate::FieldReader; +impl CrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CRS_A { + pub const fn variant(&self) -> Crs { match self.bits { - 0 => CRS_A::VALUE1, - 1 => CRS_A::VALUE2, - 2 => CRS_A::VALUE3, - 3 => CRS_A::VALUE4, + 0 => Crs::Value1, + 1 => Crs::Value2, + 2 => Crs::Value3, + 3 => Crs::Value4, _ => unreachable!(), } } #[doc = "Data input CRSA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CRS_A::VALUE1 + *self == Crs::Value1 } #[doc = "Data input CRSB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CRS_A::VALUE2 + *self == Crs::Value2 } #[doc = "Data input CRSC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CRS_A::VALUE3 + *self == Crs::Value3 } #[doc = "Data input CRSD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CRS_A::VALUE4 + *self == Crs::Value4 } } #[doc = "Field `CRS` writer - CRS input"] -pub type CRS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CRS_A>; -impl<'a, REG> CRS_W<'a, REG> +pub type CrsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Crs>; +impl<'a, REG> CrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Data input CRSA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRS_A::VALUE1) + self.variant(Crs::Value1) } #[doc = "Data input CRSB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRS_A::VALUE2) + self.variant(Crs::Value2) } #[doc = "Data input CRSC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CRS_A::VALUE3) + self.variant(Crs::Value3) } #[doc = "Data input CRSD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CRS_A::VALUE4) + self.variant(Crs::Value4) } } -#[doc = "Field `RXER` reader - RXER Input"] -pub type RXER_R = crate::FieldReader; #[doc = "RXER Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RXER_A { +pub enum Rxer { #[doc = "0: Data input RXERA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input RXERB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input RXERC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input RXERD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RXER_A) -> Self { + fn from(variant: Rxer) -> Self { variant as _ } } -impl crate::FieldSpec for RXER_A { +impl crate::FieldSpec for Rxer { type Ux = u8; } -impl RXER_R { +#[doc = "Field `RXER` reader - RXER Input"] +pub type RxerR = crate::FieldReader; +impl RxerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXER_A { + pub const fn variant(&self) -> Rxer { match self.bits { - 0 => RXER_A::VALUE1, - 1 => RXER_A::VALUE2, - 2 => RXER_A::VALUE3, - 3 => RXER_A::VALUE4, + 0 => Rxer::Value1, + 1 => Rxer::Value2, + 2 => Rxer::Value3, + 3 => Rxer::Value4, _ => unreachable!(), } } #[doc = "Data input RXERA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXER_A::VALUE1 + *self == Rxer::Value1 } #[doc = "Data input RXERB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXER_A::VALUE2 + *self == Rxer::Value2 } #[doc = "Data input RXERC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RXER_A::VALUE3 + *self == Rxer::Value3 } #[doc = "Data input RXERD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RXER_A::VALUE4 + *self == Rxer::Value4 } } #[doc = "Field `RXER` writer - RXER Input"] -pub type RXER_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RXER_A>; -impl<'a, REG> RXER_W<'a, REG> +pub type RxerW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rxer>; +impl<'a, REG> RxerW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,84 +664,84 @@ where #[doc = "Data input RXERA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXER_A::VALUE1) + self.variant(Rxer::Value1) } #[doc = "Data input RXERB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXER_A::VALUE2) + self.variant(Rxer::Value2) } #[doc = "Data input RXERC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RXER_A::VALUE3) + self.variant(Rxer::Value3) } #[doc = "Data input RXERD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RXER_A::VALUE4) + self.variant(Rxer::Value4) } } -#[doc = "Field `COL` reader - COL input"] -pub type COL_R = crate::FieldReader; #[doc = "COL input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum COL_A { +pub enum Col { #[doc = "0: Data input COLA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input COLB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input COLC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input COLD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: COL_A) -> Self { + fn from(variant: Col) -> Self { variant as _ } } -impl crate::FieldSpec for COL_A { +impl crate::FieldSpec for Col { type Ux = u8; } -impl COL_R { +#[doc = "Field `COL` reader - COL input"] +pub type ColR = crate::FieldReader; +impl ColR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COL_A { + pub const fn variant(&self) -> Col { match self.bits { - 0 => COL_A::VALUE1, - 1 => COL_A::VALUE2, - 2 => COL_A::VALUE3, - 3 => COL_A::VALUE4, + 0 => Col::Value1, + 1 => Col::Value2, + 2 => Col::Value3, + 3 => Col::Value4, _ => unreachable!(), } } #[doc = "Data input COLA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COL_A::VALUE1 + *self == Col::Value1 } #[doc = "Data input COLB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COL_A::VALUE2 + *self == Col::Value2 } #[doc = "Data input COLC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == COL_A::VALUE3 + *self == Col::Value3 } #[doc = "Data input COLD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == COL_A::VALUE4 + *self == Col::Value4 } } #[doc = "Field `COL` writer - COL input"] -pub type COL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, COL_A>; -impl<'a, REG> COL_W<'a, REG> +pub type ColW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Col>; +impl<'a, REG> ColW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -749,84 +749,84 @@ where #[doc = "Data input COLA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE1) + self.variant(Col::Value1) } #[doc = "Data input COLB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE2) + self.variant(Col::Value2) } #[doc = "Data input COLC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE3) + self.variant(Col::Value3) } #[doc = "Data input COLD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE4) + self.variant(Col::Value4) } } -#[doc = "Field `CLK_TX` reader - CLK_TX input"] -pub type CLK_TX_R = crate::FieldReader; #[doc = "CLK_TX input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLK_TX_A { +pub enum ClkTx { #[doc = "0: Data input CLK_TXA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input CLK_TXB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input CLK_TXC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input CLK_TXD is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLK_TX_A) -> Self { + fn from(variant: ClkTx) -> Self { variant as _ } } -impl crate::FieldSpec for CLK_TX_A { +impl crate::FieldSpec for ClkTx { type Ux = u8; } -impl CLK_TX_R { +#[doc = "Field `CLK_TX` reader - CLK_TX input"] +pub type ClkTxR = crate::FieldReader; +impl ClkTxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLK_TX_A { + pub const fn variant(&self) -> ClkTx { match self.bits { - 0 => CLK_TX_A::VALUE1, - 1 => CLK_TX_A::VALUE2, - 2 => CLK_TX_A::VALUE3, - 3 => CLK_TX_A::VALUE4, + 0 => ClkTx::Value1, + 1 => ClkTx::Value2, + 2 => ClkTx::Value3, + 3 => ClkTx::Value4, _ => unreachable!(), } } #[doc = "Data input CLK_TXA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLK_TX_A::VALUE1 + *self == ClkTx::Value1 } #[doc = "Data input CLK_TXB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLK_TX_A::VALUE2 + *self == ClkTx::Value2 } #[doc = "Data input CLK_TXC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLK_TX_A::VALUE3 + *self == ClkTx::Value3 } #[doc = "Data input CLK_TXD is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLK_TX_A::VALUE4 + *self == ClkTx::Value4 } } #[doc = "Field `CLK_TX` writer - CLK_TX input"] -pub type CLK_TX_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CLK_TX_A>; -impl<'a, REG> CLK_TX_W<'a, REG> +pub type ClkTxW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ClkTx>; +impl<'a, REG> ClkTxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -834,84 +834,84 @@ where #[doc = "Data input CLK_TXA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLK_TX_A::VALUE1) + self.variant(ClkTx::Value1) } #[doc = "Data input CLK_TXB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLK_TX_A::VALUE2) + self.variant(ClkTx::Value2) } #[doc = "Data input CLK_TXC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLK_TX_A::VALUE3) + self.variant(ClkTx::Value3) } #[doc = "Data input CLK_TXD is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLK_TX_A::VALUE4) + self.variant(ClkTx::Value4) } } -#[doc = "Field `MDIO` reader - MDIO Input Select"] -pub type MDIO_R = crate::FieldReader; #[doc = "MDIO Input Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MDIO_A { +pub enum Mdio { #[doc = "0: Data input MDIA is selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input MDIB is selected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Data input MDIC is selected"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Data input MDID is selected"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MDIO_A) -> Self { + fn from(variant: Mdio) -> Self { variant as _ } } -impl crate::FieldSpec for MDIO_A { +impl crate::FieldSpec for Mdio { type Ux = u8; } -impl MDIO_R { +#[doc = "Field `MDIO` reader - MDIO Input Select"] +pub type MdioR = crate::FieldReader; +impl MdioR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MDIO_A { + pub const fn variant(&self) -> Mdio { match self.bits { - 0 => MDIO_A::VALUE1, - 1 => MDIO_A::VALUE2, - 2 => MDIO_A::VALUE3, - 3 => MDIO_A::VALUE4, + 0 => Mdio::Value1, + 1 => Mdio::Value2, + 2 => Mdio::Value3, + 3 => Mdio::Value4, _ => unreachable!(), } } #[doc = "Data input MDIA is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MDIO_A::VALUE1 + *self == Mdio::Value1 } #[doc = "Data input MDIB is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MDIO_A::VALUE2 + *self == Mdio::Value2 } #[doc = "Data input MDIC is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MDIO_A::VALUE3 + *self == Mdio::Value3 } #[doc = "Data input MDID is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MDIO_A::VALUE4 + *self == Mdio::Value4 } } #[doc = "Field `MDIO` writer - MDIO Input Select"] -pub type MDIO_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MDIO_A>; -impl<'a, REG> MDIO_W<'a, REG> +pub type MdioW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Mdio>; +impl<'a, REG> MdioW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -919,236 +919,227 @@ where #[doc = "Data input MDIA is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE1) + self.variant(Mdio::Value1) } #[doc = "Data input MDIB is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE2) + self.variant(Mdio::Value2) } #[doc = "Data input MDIC is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE3) + self.variant(Mdio::Value3) } #[doc = "Data input MDID is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MDIO_A::VALUE4) + self.variant(Mdio::Value4) } } -#[doc = "Field `INFSEL` reader - Ethernet MAC Interface Selection"] -pub type INFSEL_R = crate::BitReader; #[doc = "Ethernet MAC Interface Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INFSEL_A { +pub enum Infsel { #[doc = "0: MII"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: RMII"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INFSEL_A) -> Self { + fn from(variant: Infsel) -> Self { variant as u8 != 0 } } -impl INFSEL_R { +#[doc = "Field `INFSEL` reader - Ethernet MAC Interface Selection"] +pub type InfselR = crate::BitReader; +impl InfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INFSEL_A { + pub const fn variant(&self) -> Infsel { match self.bits { - false => INFSEL_A::VALUE1, - true => INFSEL_A::VALUE2, + false => Infsel::Value1, + true => Infsel::Value2, } } #[doc = "MII"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INFSEL_A::VALUE1 + *self == Infsel::Value1 } #[doc = "RMII"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INFSEL_A::VALUE2 + *self == Infsel::Value2 } } #[doc = "Field `INFSEL` writer - Ethernet MAC Interface Selection"] -pub type INFSEL_W<'a, REG> = crate::BitWriter<'a, REG, INFSEL_A>; -impl<'a, REG> INFSEL_W<'a, REG> +pub type InfselW<'a, REG> = crate::BitWriter<'a, REG, Infsel>; +impl<'a, REG> InfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MII"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INFSEL_A::VALUE1) + self.variant(Infsel::Value1) } #[doc = "RMII"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INFSEL_A::VALUE2) + self.variant(Infsel::Value2) } } impl R { #[doc = "Bits 0:1 - MAC Receive Input 0"] #[inline(always)] - pub fn rxd0(&self) -> RXD0_R { - RXD0_R::new((self.bits & 3) as u8) + pub fn rxd0(&self) -> Rxd0R { + Rxd0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - MAC Receive Input 1"] #[inline(always)] - pub fn rxd1(&self) -> RXD1_R { - RXD1_R::new(((self.bits >> 2) & 3) as u8) + pub fn rxd1(&self) -> Rxd1R { + Rxd1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - MAC Receive Input 2"] #[inline(always)] - pub fn rxd2(&self) -> RXD2_R { - RXD2_R::new(((self.bits >> 4) & 3) as u8) + pub fn rxd2(&self) -> Rxd2R { + Rxd2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - MAC Receive Input 3"] #[inline(always)] - pub fn rxd3(&self) -> RXD3_R { - RXD3_R::new(((self.bits >> 6) & 3) as u8) + pub fn rxd3(&self) -> Rxd3R { + Rxd3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - RMII clock input"] #[inline(always)] - pub fn clk_rmii(&self) -> CLK_RMII_R { - CLK_RMII_R::new(((self.bits >> 8) & 3) as u8) + pub fn clk_rmii(&self) -> ClkRmiiR { + ClkRmiiR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - CRS_DV input"] #[inline(always)] - pub fn crs_dv(&self) -> CRS_DV_R { - CRS_DV_R::new(((self.bits >> 10) & 3) as u8) + pub fn crs_dv(&self) -> CrsDvR { + CrsDvR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - CRS input"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new(((self.bits >> 12) & 3) as u8) + pub fn crs(&self) -> CrsR { + CrsR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - RXER Input"] #[inline(always)] - pub fn rxer(&self) -> RXER_R { - RXER_R::new(((self.bits >> 14) & 3) as u8) + pub fn rxer(&self) -> RxerR { + RxerR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - COL input"] #[inline(always)] - pub fn col(&self) -> COL_R { - COL_R::new(((self.bits >> 16) & 3) as u8) + pub fn col(&self) -> ColR { + ColR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - CLK_TX input"] #[inline(always)] - pub fn clk_tx(&self) -> CLK_TX_R { - CLK_TX_R::new(((self.bits >> 18) & 3) as u8) + pub fn clk_tx(&self) -> ClkTxR { + ClkTxR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 22:23 - MDIO Input Select"] #[inline(always)] - pub fn mdio(&self) -> MDIO_R { - MDIO_R::new(((self.bits >> 22) & 3) as u8) + pub fn mdio(&self) -> MdioR { + MdioR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 26 - Ethernet MAC Interface Selection"] #[inline(always)] - pub fn infsel(&self) -> INFSEL_R { - INFSEL_R::new(((self.bits >> 26) & 1) != 0) + pub fn infsel(&self) -> InfselR { + InfselR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - MAC Receive Input 0"] #[inline(always)] #[must_use] - pub fn rxd0(&mut self) -> RXD0_W { - RXD0_W::new(self, 0) + pub fn rxd0(&mut self) -> Rxd0W { + Rxd0W::new(self, 0) } #[doc = "Bits 2:3 - MAC Receive Input 1"] #[inline(always)] #[must_use] - pub fn rxd1(&mut self) -> RXD1_W { - RXD1_W::new(self, 2) + pub fn rxd1(&mut self) -> Rxd1W { + Rxd1W::new(self, 2) } #[doc = "Bits 4:5 - MAC Receive Input 2"] #[inline(always)] #[must_use] - pub fn rxd2(&mut self) -> RXD2_W { - RXD2_W::new(self, 4) + pub fn rxd2(&mut self) -> Rxd2W { + Rxd2W::new(self, 4) } #[doc = "Bits 6:7 - MAC Receive Input 3"] #[inline(always)] #[must_use] - pub fn rxd3(&mut self) -> RXD3_W { - RXD3_W::new(self, 6) + pub fn rxd3(&mut self) -> Rxd3W { + Rxd3W::new(self, 6) } #[doc = "Bits 8:9 - RMII clock input"] #[inline(always)] #[must_use] - pub fn clk_rmii(&mut self) -> CLK_RMII_W { - CLK_RMII_W::new(self, 8) + pub fn clk_rmii(&mut self) -> ClkRmiiW { + ClkRmiiW::new(self, 8) } #[doc = "Bits 10:11 - CRS_DV input"] #[inline(always)] #[must_use] - pub fn crs_dv(&mut self) -> CRS_DV_W { - CRS_DV_W::new(self, 10) + pub fn crs_dv(&mut self) -> CrsDvW { + CrsDvW::new(self, 10) } #[doc = "Bits 12:13 - CRS input"] #[inline(always)] #[must_use] - pub fn crs(&mut self) -> CRS_W { - CRS_W::new(self, 12) + pub fn crs(&mut self) -> CrsW { + CrsW::new(self, 12) } #[doc = "Bits 14:15 - RXER Input"] #[inline(always)] #[must_use] - pub fn rxer(&mut self) -> RXER_W { - RXER_W::new(self, 14) + pub fn rxer(&mut self) -> RxerW { + RxerW::new(self, 14) } #[doc = "Bits 16:17 - COL input"] #[inline(always)] #[must_use] - pub fn col(&mut self) -> COL_W { - COL_W::new(self, 16) + pub fn col(&mut self) -> ColW { + ColW::new(self, 16) } #[doc = "Bits 18:19 - CLK_TX input"] #[inline(always)] #[must_use] - pub fn clk_tx(&mut self) -> CLK_TX_W { - CLK_TX_W::new(self, 18) + pub fn clk_tx(&mut self) -> ClkTxW { + ClkTxW::new(self, 18) } #[doc = "Bits 22:23 - MDIO Input Select"] #[inline(always)] #[must_use] - pub fn mdio(&mut self) -> MDIO_W { - MDIO_W::new(self, 22) + pub fn mdio(&mut self) -> MdioW { + MdioW::new(self, 22) } #[doc = "Bit 26 - Ethernet MAC Interface Selection"] #[inline(always)] #[must_use] - pub fn infsel(&mut self) -> INFSEL_W { - INFSEL_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn infsel(&mut self) -> InfselW { + InfselW::new(self, 26) } } #[doc = "Ethernet 0 Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`eth0_con::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`eth0_con::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ETH0_CON_SPEC; -impl crate::RegisterSpec for ETH0_CON_SPEC { +pub struct Eth0ConSpec; +impl crate::RegisterSpec for Eth0ConSpec { type Ux = u32; } #[doc = "`read()` method returns [`eth0_con::R`](R) reader structure"] -impl crate::Readable for ETH0_CON_SPEC {} +impl crate::Readable for Eth0ConSpec {} #[doc = "`write(|w| ..)` method takes [`eth0_con::W`](W) writer structure"] -impl crate::Writable for ETH0_CON_SPEC { +impl crate::Writable for Eth0ConSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ETH0_CON to value 0"] -impl crate::Resettable for ETH0_CON_SPEC { +impl crate::Resettable for Eth0ConSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce.rs b/src/fce.rs index cf693937..e68f1231 100644 --- a/src/fce.rs +++ b/src/fce.rs @@ -1,29 +1,31 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clc: CLC, + clc: Clc, _reserved1: [u8; 0x04], - id: ID, + id: Id, } impl RegisterBlock { #[doc = "0x00 - Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &CLC { + pub const fn clc(&self) -> &Clc { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } } #[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -pub type CLC = crate::Reg; +#[doc(alias = "CLC")] +pub type Clc = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; diff --git a/src/fce/clc.rs b/src/fce/clc.rs index de254070..49755390 100644 --- a/src/fce/clc.rs +++ b/src/fce/clc.rs @@ -1,56 +1,47 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DISR_R = crate::BitReader; +pub type DisrR = crate::BitReader; #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DISS_R = crate::BitReader; +pub type DissR = crate::BitReader; impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DISR_R { - DISR_R::new((self.bits & 1) != 0) + pub fn disr(&self) -> DisrR { + DisrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DISS_R { - DISS_R::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DissR { + DissR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DISR_W { - DISR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn disr(&mut self) -> DisrW { + DisrW::new(self, 0) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLC_SPEC; -impl crate::RegisterSpec for CLC_SPEC { +pub struct ClcSpec; +impl crate::RegisterSpec for ClcSpec { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for CLC_SPEC {} +impl crate::Readable for ClcSpec {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for CLC_SPEC { +impl crate::Writable for ClcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for CLC_SPEC { +impl crate::Resettable for ClcSpec { const RESET_VALUE: u32 = 0x03; } diff --git a/src/fce/id.rs b/src/fce/id.rs index f575170f..551cc54b 100644 --- a/src/fce/id.rs +++ b/src/fce/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00ca_c001"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00ca_c001; } diff --git a/src/fce_ke0.rs b/src/fce_ke0.rs index caa8c089..54c7379c 100644 --- a/src/fce_ke0.rs +++ b/src/fce_ke0.rs @@ -1,93 +1,101 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - ir: IR, - res: RES, - cfg: CFG, - sts: STS, - length: LENGTH, - check: CHECK, - crc: CRC, - ctr: CTR, + ir: Ir, + res: Res, + cfg: Cfg, + sts: Sts, + length: Length, + check: Check, + crc: Crc, + ctr: Ctr, } impl RegisterBlock { #[doc = "0x00 - Input Register"] #[inline(always)] - pub const fn ir(&self) -> &IR { + pub const fn ir(&self) -> &Ir { &self.ir } #[doc = "0x04 - CRC Result Register"] #[inline(always)] - pub const fn res(&self) -> &RES { + pub const fn res(&self) -> &Res { &self.res } #[doc = "0x08 - CRC Configuration Register"] #[inline(always)] - pub const fn cfg(&self) -> &CFG { + pub const fn cfg(&self) -> &Cfg { &self.cfg } #[doc = "0x0c - CRC Status Register"] #[inline(always)] - pub const fn sts(&self) -> &STS { + pub const fn sts(&self) -> &Sts { &self.sts } #[doc = "0x10 - CRC Length Register"] #[inline(always)] - pub const fn length(&self) -> &LENGTH { + pub const fn length(&self) -> &Length { &self.length } #[doc = "0x14 - CRC Check Register"] #[inline(always)] - pub const fn check(&self) -> &CHECK { + pub const fn check(&self) -> &Check { &self.check } #[doc = "0x18 - CRC Register"] #[inline(always)] - pub const fn crc(&self) -> &CRC { + pub const fn crc(&self) -> &Crc { &self.crc } #[doc = "0x1c - CRC Test Register"] #[inline(always)] - pub const fn ctr(&self) -> &CTR { + pub const fn ctr(&self) -> &Ctr { &self.ctr } } #[doc = "IR (rw) register accessor: Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ir`] module"] -pub type IR = crate::Reg; +#[doc(alias = "IR")] +pub type Ir = crate::Reg; #[doc = "Input Register"] pub mod ir; #[doc = "RES (r) register accessor: CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] module"] -pub type RES = crate::Reg; +#[doc(alias = "RES")] +pub type Res = crate::Reg; #[doc = "CRC Result Register"] pub mod res; #[doc = "CFG (rw) register accessor: CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub type CFG = crate::Reg; +#[doc(alias = "CFG")] +pub type Cfg = crate::Reg; #[doc = "CRC Configuration Register"] pub mod cfg; #[doc = "STS (rw) register accessor: CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] -pub type STS = crate::Reg; +#[doc(alias = "STS")] +pub type Sts = crate::Reg; #[doc = "CRC Status Register"] pub mod sts; #[doc = "LENGTH (rw) register accessor: CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`] module"] -pub type LENGTH = crate::Reg; +#[doc(alias = "LENGTH")] +pub type Length = crate::Reg; #[doc = "CRC Length Register"] pub mod length; #[doc = "CHECK (rw) register accessor: CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@check`] module"] -pub type CHECK = crate::Reg; +#[doc(alias = "CHECK")] +pub type Check = crate::Reg; #[doc = "CRC Check Register"] pub mod check; #[doc = "CRC (rw) register accessor: CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crc`] module"] -pub type CRC = crate::Reg; +#[doc(alias = "CRC")] +pub type Crc = crate::Reg; #[doc = "CRC Register"] pub mod crc; #[doc = "CTR (rw) register accessor: CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -pub type CTR = crate::Reg; +#[doc(alias = "CTR")] +pub type Ctr = crate::Reg; #[doc = "CRC Test Register"] pub mod ctr; diff --git a/src/fce_ke0/cfg.rs b/src/fce_ke0/cfg.rs index d47d6d7d..89b79a7d 100644 --- a/src/fce_ke0/cfg.rs +++ b/src/fce_ke0/cfg.rs @@ -1,610 +1,601 @@ #[doc = "Register `CFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub type W = crate::W; -#[doc = "Field `CMI` reader - CRC Mismatch Interrupt"] -pub type CMI_R = crate::BitReader; +pub type W = crate::W; #[doc = "CRC Mismatch Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMI_A { +pub enum Cmi { #[doc = "0: CRC Mismatch Interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CRC Mismatch Interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMI_A) -> Self { + fn from(variant: Cmi) -> Self { variant as u8 != 0 } } -impl CMI_R { +#[doc = "Field `CMI` reader - CRC Mismatch Interrupt"] +pub type CmiR = crate::BitReader; +impl CmiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMI_A { + pub const fn variant(&self) -> Cmi { match self.bits { - false => CMI_A::VALUE1, - true => CMI_A::VALUE2, + false => Cmi::Value1, + true => Cmi::Value2, } } #[doc = "CRC Mismatch Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMI_A::VALUE1 + *self == Cmi::Value1 } #[doc = "CRC Mismatch Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMI_A::VALUE2 + *self == Cmi::Value2 } } #[doc = "Field `CMI` writer - CRC Mismatch Interrupt"] -pub type CMI_W<'a, REG> = crate::BitWriter<'a, REG, CMI_A>; -impl<'a, REG> CMI_W<'a, REG> +pub type CmiW<'a, REG> = crate::BitWriter<'a, REG, Cmi>; +impl<'a, REG> CmiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC Mismatch Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMI_A::VALUE1) + self.variant(Cmi::Value1) } #[doc = "CRC Mismatch Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMI_A::VALUE2) + self.variant(Cmi::Value2) } } -#[doc = "Field `CEI` reader - Configuration Error Interrupt"] -pub type CEI_R = crate::BitReader; #[doc = "Configuration Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEI_A { +pub enum Cei { #[doc = "0: Configuration Error Interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Configuration Error Interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEI_A) -> Self { + fn from(variant: Cei) -> Self { variant as u8 != 0 } } -impl CEI_R { +#[doc = "Field `CEI` reader - Configuration Error Interrupt"] +pub type CeiR = crate::BitReader; +impl CeiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEI_A { + pub const fn variant(&self) -> Cei { match self.bits { - false => CEI_A::VALUE1, - true => CEI_A::VALUE2, + false => Cei::Value1, + true => Cei::Value2, } } #[doc = "Configuration Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEI_A::VALUE1 + *self == Cei::Value1 } #[doc = "Configuration Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEI_A::VALUE2 + *self == Cei::Value2 } } #[doc = "Field `CEI` writer - Configuration Error Interrupt"] -pub type CEI_W<'a, REG> = crate::BitWriter<'a, REG, CEI_A>; -impl<'a, REG> CEI_W<'a, REG> +pub type CeiW<'a, REG> = crate::BitWriter<'a, REG, Cei>; +impl<'a, REG> CeiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Configuration Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEI_A::VALUE1) + self.variant(Cei::Value1) } #[doc = "Configuration Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEI_A::VALUE2) + self.variant(Cei::Value2) } } -#[doc = "Field `LEI` reader - Length Error Interrupt"] -pub type LEI_R = crate::BitReader; #[doc = "Length Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEI_A { +pub enum Lei { #[doc = "0: Length Error Interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Length Error Interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEI_A) -> Self { + fn from(variant: Lei) -> Self { variant as u8 != 0 } } -impl LEI_R { +#[doc = "Field `LEI` reader - Length Error Interrupt"] +pub type LeiR = crate::BitReader; +impl LeiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LEI_A { + pub const fn variant(&self) -> Lei { match self.bits { - false => LEI_A::VALUE1, - true => LEI_A::VALUE2, + false => Lei::Value1, + true => Lei::Value2, } } #[doc = "Length Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LEI_A::VALUE1 + *self == Lei::Value1 } #[doc = "Length Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LEI_A::VALUE2 + *self == Lei::Value2 } } #[doc = "Field `LEI` writer - Length Error Interrupt"] -pub type LEI_W<'a, REG> = crate::BitWriter<'a, REG, LEI_A>; -impl<'a, REG> LEI_W<'a, REG> +pub type LeiW<'a, REG> = crate::BitWriter<'a, REG, Lei>; +impl<'a, REG> LeiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Length Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LEI_A::VALUE1) + self.variant(Lei::Value1) } #[doc = "Length Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LEI_A::VALUE2) + self.variant(Lei::Value2) } } -#[doc = "Field `BEI` reader - Bus Error Interrupt"] -pub type BEI_R = crate::BitReader; #[doc = "Bus Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BEI_A { +pub enum Bei { #[doc = "0: Bus Error Interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bus Error Interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BEI_A) -> Self { + fn from(variant: Bei) -> Self { variant as u8 != 0 } } -impl BEI_R { +#[doc = "Field `BEI` reader - Bus Error Interrupt"] +pub type BeiR = crate::BitReader; +impl BeiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BEI_A { + pub const fn variant(&self) -> Bei { match self.bits { - false => BEI_A::VALUE1, - true => BEI_A::VALUE2, + false => Bei::Value1, + true => Bei::Value2, } } #[doc = "Bus Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BEI_A::VALUE1 + *self == Bei::Value1 } #[doc = "Bus Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BEI_A::VALUE2 + *self == Bei::Value2 } } #[doc = "Field `BEI` writer - Bus Error Interrupt"] -pub type BEI_W<'a, REG> = crate::BitWriter<'a, REG, BEI_A>; -impl<'a, REG> BEI_W<'a, REG> +pub type BeiW<'a, REG> = crate::BitWriter<'a, REG, Bei>; +impl<'a, REG> BeiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bus Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BEI_A::VALUE1) + self.variant(Bei::Value1) } #[doc = "Bus Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BEI_A::VALUE2) + self.variant(Bei::Value2) } } -#[doc = "Field `CCE` reader - CRC Check Comparison"] -pub type CCE_R = crate::BitReader; #[doc = "CRC Check Comparison\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCE_A { +pub enum Cce { #[doc = "0: CRC check comparison at the end of a message is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CRC check comparison at the end of a message is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCE_A) -> Self { + fn from(variant: Cce) -> Self { variant as u8 != 0 } } -impl CCE_R { +#[doc = "Field `CCE` reader - CRC Check Comparison"] +pub type CceR = crate::BitReader; +impl CceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCE_A { + pub const fn variant(&self) -> Cce { match self.bits { - false => CCE_A::VALUE1, - true => CCE_A::VALUE2, + false => Cce::Value1, + true => Cce::Value2, } } #[doc = "CRC check comparison at the end of a message is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCE_A::VALUE1 + *self == Cce::Value1 } #[doc = "CRC check comparison at the end of a message is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCE_A::VALUE2 + *self == Cce::Value2 } } #[doc = "Field `CCE` writer - CRC Check Comparison"] -pub type CCE_W<'a, REG> = crate::BitWriter<'a, REG, CCE_A>; -impl<'a, REG> CCE_W<'a, REG> +pub type CceW<'a, REG> = crate::BitWriter<'a, REG, Cce>; +impl<'a, REG> CceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC check comparison at the end of a message is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCE_A::VALUE1) + self.variant(Cce::Value1) } #[doc = "CRC check comparison at the end of a message is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCE_A::VALUE2) + self.variant(Cce::Value2) } } -#[doc = "Field `ALR` reader - Automatic Length Reload"] -pub type ALR_R = crate::BitReader; #[doc = "Automatic Length Reload\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ALR_A { +pub enum Alr { #[doc = "0: Disables automatic reload of the LENGTH field."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enables automatic reload of the LENGTH field at the end of a message."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ALR_A) -> Self { + fn from(variant: Alr) -> Self { variant as u8 != 0 } } -impl ALR_R { +#[doc = "Field `ALR` reader - Automatic Length Reload"] +pub type AlrR = crate::BitReader; +impl AlrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ALR_A { + pub const fn variant(&self) -> Alr { match self.bits { - false => ALR_A::VALUE1, - true => ALR_A::VALUE2, + false => Alr::Value1, + true => Alr::Value2, } } #[doc = "Disables automatic reload of the LENGTH field."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ALR_A::VALUE1 + *self == Alr::Value1 } #[doc = "Enables automatic reload of the LENGTH field at the end of a message."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ALR_A::VALUE2 + *self == Alr::Value2 } } #[doc = "Field `ALR` writer - Automatic Length Reload"] -pub type ALR_W<'a, REG> = crate::BitWriter<'a, REG, ALR_A>; -impl<'a, REG> ALR_W<'a, REG> +pub type AlrW<'a, REG> = crate::BitWriter<'a, REG, Alr>; +impl<'a, REG> AlrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables automatic reload of the LENGTH field."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ALR_A::VALUE1) + self.variant(Alr::Value1) } #[doc = "Enables automatic reload of the LENGTH field at the end of a message."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ALR_A::VALUE2) + self.variant(Alr::Value2) } } -#[doc = "Field `REFIN` reader - IR Byte Wise Reflection"] -pub type REFIN_R = crate::BitReader; #[doc = "IR Byte Wise Reflection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REFIN_A { +pub enum Refin { #[doc = "0: IR Byte Wise Reflection is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: IR Byte Wise Reflection is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REFIN_A) -> Self { + fn from(variant: Refin) -> Self { variant as u8 != 0 } } -impl REFIN_R { +#[doc = "Field `REFIN` reader - IR Byte Wise Reflection"] +pub type RefinR = crate::BitReader; +impl RefinR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REFIN_A { + pub const fn variant(&self) -> Refin { match self.bits { - false => REFIN_A::VALUE1, - true => REFIN_A::VALUE2, + false => Refin::Value1, + true => Refin::Value2, } } #[doc = "IR Byte Wise Reflection is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REFIN_A::VALUE1 + *self == Refin::Value1 } #[doc = "IR Byte Wise Reflection is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REFIN_A::VALUE2 + *self == Refin::Value2 } } #[doc = "Field `REFIN` writer - IR Byte Wise Reflection"] -pub type REFIN_W<'a, REG> = crate::BitWriter<'a, REG, REFIN_A>; -impl<'a, REG> REFIN_W<'a, REG> +pub type RefinW<'a, REG> = crate::BitWriter<'a, REG, Refin>; +impl<'a, REG> RefinW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "IR Byte Wise Reflection is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REFIN_A::VALUE1) + self.variant(Refin::Value1) } #[doc = "IR Byte Wise Reflection is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REFIN_A::VALUE2) + self.variant(Refin::Value2) } } -#[doc = "Field `REFOUT` reader - CRC 32-Bit Wise Reflection"] -pub type REFOUT_R = crate::BitReader; #[doc = "CRC 32-Bit Wise Reflection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REFOUT_A { +pub enum Refout { #[doc = "0: CRC 32-bit wise is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CRC 32-bit wise is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REFOUT_A) -> Self { + fn from(variant: Refout) -> Self { variant as u8 != 0 } } -impl REFOUT_R { +#[doc = "Field `REFOUT` reader - CRC 32-Bit Wise Reflection"] +pub type RefoutR = crate::BitReader; +impl RefoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REFOUT_A { + pub const fn variant(&self) -> Refout { match self.bits { - false => REFOUT_A::VALUE1, - true => REFOUT_A::VALUE2, + false => Refout::Value1, + true => Refout::Value2, } } #[doc = "CRC 32-bit wise is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REFOUT_A::VALUE1 + *self == Refout::Value1 } #[doc = "CRC 32-bit wise is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REFOUT_A::VALUE2 + *self == Refout::Value2 } } #[doc = "Field `REFOUT` writer - CRC 32-Bit Wise Reflection"] -pub type REFOUT_W<'a, REG> = crate::BitWriter<'a, REG, REFOUT_A>; -impl<'a, REG> REFOUT_W<'a, REG> +pub type RefoutW<'a, REG> = crate::BitWriter<'a, REG, Refout>; +impl<'a, REG> RefoutW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC 32-bit wise is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REFOUT_A::VALUE1) + self.variant(Refout::Value1) } #[doc = "CRC 32-bit wise is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REFOUT_A::VALUE2) + self.variant(Refout::Value2) } } -#[doc = "Field `XSEL` reader - Selects the value to be xored with the final CRC"] -pub type XSEL_R = crate::BitReader; #[doc = "Selects the value to be xored with the final CRC\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XSEL_A { +pub enum Xsel { #[doc = "0: 0x00000000"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 0xFFFFFFFF"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XSEL_A) -> Self { + fn from(variant: Xsel) -> Self { variant as u8 != 0 } } -impl XSEL_R { +#[doc = "Field `XSEL` reader - Selects the value to be xored with the final CRC"] +pub type XselR = crate::BitReader; +impl XselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XSEL_A { + pub const fn variant(&self) -> Xsel { match self.bits { - false => XSEL_A::VALUE1, - true => XSEL_A::VALUE2, + false => Xsel::Value1, + true => Xsel::Value2, } } #[doc = "0x00000000"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XSEL_A::VALUE1 + *self == Xsel::Value1 } #[doc = "0xFFFFFFFF"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XSEL_A::VALUE2 + *self == Xsel::Value2 } } #[doc = "Field `XSEL` writer - Selects the value to be xored with the final CRC"] -pub type XSEL_W<'a, REG> = crate::BitWriter<'a, REG, XSEL_A>; -impl<'a, REG> XSEL_W<'a, REG> +pub type XselW<'a, REG> = crate::BitWriter<'a, REG, Xsel>; +impl<'a, REG> XselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "0x00000000"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XSEL_A::VALUE1) + self.variant(Xsel::Value1) } #[doc = "0xFFFFFFFF"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XSEL_A::VALUE2) + self.variant(Xsel::Value2) } } impl R { #[doc = "Bit 0 - CRC Mismatch Interrupt"] #[inline(always)] - pub fn cmi(&self) -> CMI_R { - CMI_R::new((self.bits & 1) != 0) + pub fn cmi(&self) -> CmiR { + CmiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Error Interrupt"] #[inline(always)] - pub fn cei(&self) -> CEI_R { - CEI_R::new(((self.bits >> 1) & 1) != 0) + pub fn cei(&self) -> CeiR { + CeiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Length Error Interrupt"] #[inline(always)] - pub fn lei(&self) -> LEI_R { - LEI_R::new(((self.bits >> 2) & 1) != 0) + pub fn lei(&self) -> LeiR { + LeiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Bus Error Interrupt"] #[inline(always)] - pub fn bei(&self) -> BEI_R { - BEI_R::new(((self.bits >> 3) & 1) != 0) + pub fn bei(&self) -> BeiR { + BeiR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CRC Check Comparison"] #[inline(always)] - pub fn cce(&self) -> CCE_R { - CCE_R::new(((self.bits >> 4) & 1) != 0) + pub fn cce(&self) -> CceR { + CceR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Length Reload"] #[inline(always)] - pub fn alr(&self) -> ALR_R { - ALR_R::new(((self.bits >> 5) & 1) != 0) + pub fn alr(&self) -> AlrR { + AlrR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - IR Byte Wise Reflection"] #[inline(always)] - pub fn refin(&self) -> REFIN_R { - REFIN_R::new(((self.bits >> 8) & 1) != 0) + pub fn refin(&self) -> RefinR { + RefinR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"] #[inline(always)] - pub fn refout(&self) -> REFOUT_R { - REFOUT_R::new(((self.bits >> 9) & 1) != 0) + pub fn refout(&self) -> RefoutR { + RefoutR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Selects the value to be xored with the final CRC"] #[inline(always)] - pub fn xsel(&self) -> XSEL_R { - XSEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn xsel(&self) -> XselR { + XselR::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Mismatch Interrupt"] #[inline(always)] #[must_use] - pub fn cmi(&mut self) -> CMI_W { - CMI_W::new(self, 0) + pub fn cmi(&mut self) -> CmiW { + CmiW::new(self, 0) } #[doc = "Bit 1 - Configuration Error Interrupt"] #[inline(always)] #[must_use] - pub fn cei(&mut self) -> CEI_W { - CEI_W::new(self, 1) + pub fn cei(&mut self) -> CeiW { + CeiW::new(self, 1) } #[doc = "Bit 2 - Length Error Interrupt"] #[inline(always)] #[must_use] - pub fn lei(&mut self) -> LEI_W { - LEI_W::new(self, 2) + pub fn lei(&mut self) -> LeiW { + LeiW::new(self, 2) } #[doc = "Bit 3 - Bus Error Interrupt"] #[inline(always)] #[must_use] - pub fn bei(&mut self) -> BEI_W { - BEI_W::new(self, 3) + pub fn bei(&mut self) -> BeiW { + BeiW::new(self, 3) } #[doc = "Bit 4 - CRC Check Comparison"] #[inline(always)] #[must_use] - pub fn cce(&mut self) -> CCE_W { - CCE_W::new(self, 4) + pub fn cce(&mut self) -> CceW { + CceW::new(self, 4) } #[doc = "Bit 5 - Automatic Length Reload"] #[inline(always)] #[must_use] - pub fn alr(&mut self) -> ALR_W { - ALR_W::new(self, 5) + pub fn alr(&mut self) -> AlrW { + AlrW::new(self, 5) } #[doc = "Bit 8 - IR Byte Wise Reflection"] #[inline(always)] #[must_use] - pub fn refin(&mut self) -> REFIN_W { - REFIN_W::new(self, 8) + pub fn refin(&mut self) -> RefinW { + RefinW::new(self, 8) } #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"] #[inline(always)] #[must_use] - pub fn refout(&mut self) -> REFOUT_W { - REFOUT_W::new(self, 9) + pub fn refout(&mut self) -> RefoutW { + RefoutW::new(self, 9) } #[doc = "Bit 10 - Selects the value to be xored with the final CRC"] #[inline(always)] #[must_use] - pub fn xsel(&mut self) -> XSEL_W { - XSEL_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xsel(&mut self) -> XselW { + XselW::new(self, 10) } } #[doc = "CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFG_SPEC; -impl crate::RegisterSpec for CFG_SPEC { +pub struct CfgSpec; +impl crate::RegisterSpec for CfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfg::R`](R) reader structure"] -impl crate::Readable for CFG_SPEC {} +impl crate::Readable for CfgSpec {} #[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] -impl crate::Writable for CFG_SPEC { +impl crate::Writable for CfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x0700"] -impl crate::Resettable for CFG_SPEC { +impl crate::Resettable for CfgSpec { const RESET_VALUE: u32 = 0x0700; } diff --git a/src/fce_ke0/check.rs b/src/fce_ke0/check.rs index 05f78800..42b3f408 100644 --- a/src/fce_ke0/check.rs +++ b/src/fce_ke0/check.rs @@ -1,49 +1,40 @@ #[doc = "Register `CHECK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHECK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CHECK` reader - CHECK Register"] -pub type CHECK_R = crate::FieldReader; +pub type CheckR = crate::FieldReader; #[doc = "Field `CHECK` writer - CHECK Register"] -pub type CHECK_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type CheckW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CHECK Register"] #[inline(always)] - pub fn check(&self) -> CHECK_R { - CHECK_R::new(self.bits) + pub fn check(&self) -> CheckR { + CheckR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CHECK Register"] #[inline(always)] #[must_use] - pub fn check(&mut self) -> CHECK_W { - CHECK_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn check(&mut self) -> CheckW { + CheckW::new(self, 0) } } #[doc = "CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHECK_SPEC; -impl crate::RegisterSpec for CHECK_SPEC { +pub struct CheckSpec; +impl crate::RegisterSpec for CheckSpec { type Ux = u32; } #[doc = "`read()` method returns [`check::R`](R) reader structure"] -impl crate::Readable for CHECK_SPEC {} +impl crate::Readable for CheckSpec {} #[doc = "`write(|w| ..)` method takes [`check::W`](W) writer structure"] -impl crate::Writable for CHECK_SPEC { +impl crate::Writable for CheckSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHECK to value 0"] -impl crate::Resettable for CHECK_SPEC { +impl crate::Resettable for CheckSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/crc.rs b/src/fce_ke0/crc.rs index b4f2e53e..f2f728c3 100644 --- a/src/fce_ke0/crc.rs +++ b/src/fce_ke0/crc.rs @@ -1,49 +1,40 @@ #[doc = "Register `CRC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CRC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRC` reader - CRC Register"] -pub type CRC_R = crate::FieldReader; +pub type CrcR = crate::FieldReader; #[doc = "Field `CRC` writer - CRC Register"] -pub type CRC_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type CrcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CRC Register"] #[inline(always)] - pub fn crc(&self) -> CRC_R { - CRC_R::new(self.bits) + pub fn crc(&self) -> CrcR { + CrcR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC Register"] #[inline(always)] #[must_use] - pub fn crc(&mut self) -> CRC_W { - CRC_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn crc(&mut self) -> CrcW { + CrcW::new(self, 0) } } #[doc = "CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CRC_SPEC; -impl crate::RegisterSpec for CRC_SPEC { +pub struct CrcSpec; +impl crate::RegisterSpec for CrcSpec { type Ux = u32; } #[doc = "`read()` method returns [`crc::R`](R) reader structure"] -impl crate::Readable for CRC_SPEC {} +impl crate::Readable for CrcSpec {} #[doc = "`write(|w| ..)` method takes [`crc::W`](W) writer structure"] -impl crate::Writable for CRC_SPEC { +impl crate::Writable for CrcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CRC to value 0"] -impl crate::Resettable for CRC_SPEC { +impl crate::Resettable for CrcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/ctr.rs b/src/fce_ke0/ctr.rs index 179d1ac3..5b3a7351 100644 --- a/src/fce_ke0/ctr.rs +++ b/src/fce_ke0/ctr.rs @@ -1,79 +1,70 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FCM` reader - Force CRC Mismatch"] -pub type FCM_R = crate::BitReader; +pub type FcmR = crate::BitReader; #[doc = "Field `FCM` writer - Force CRC Mismatch"] -pub type FCM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FcmW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRM_CFG` reader - Force CFG Register Mismatch"] -pub type FRM_CFG_R = crate::BitReader; +pub type FrmCfgR = crate::BitReader; #[doc = "Field `FRM_CFG` writer - Force CFG Register Mismatch"] -pub type FRM_CFG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FrmCfgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRM_CHECK` reader - Force Check Register Mismatch"] -pub type FRM_CHECK_R = crate::BitReader; +pub type FrmCheckR = crate::BitReader; #[doc = "Field `FRM_CHECK` writer - Force Check Register Mismatch"] -pub type FRM_CHECK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FrmCheckW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force CRC Mismatch"] #[inline(always)] - pub fn fcm(&self) -> FCM_R { - FCM_R::new((self.bits & 1) != 0) + pub fn fcm(&self) -> FcmR { + FcmR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Force CFG Register Mismatch"] #[inline(always)] - pub fn frm_cfg(&self) -> FRM_CFG_R { - FRM_CFG_R::new(((self.bits >> 1) & 1) != 0) + pub fn frm_cfg(&self) -> FrmCfgR { + FrmCfgR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Force Check Register Mismatch"] #[inline(always)] - pub fn frm_check(&self) -> FRM_CHECK_R { - FRM_CHECK_R::new(((self.bits >> 2) & 1) != 0) + pub fn frm_check(&self) -> FrmCheckR { + FrmCheckR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force CRC Mismatch"] #[inline(always)] #[must_use] - pub fn fcm(&mut self) -> FCM_W { - FCM_W::new(self, 0) + pub fn fcm(&mut self) -> FcmW { + FcmW::new(self, 0) } #[doc = "Bit 1 - Force CFG Register Mismatch"] #[inline(always)] #[must_use] - pub fn frm_cfg(&mut self) -> FRM_CFG_W { - FRM_CFG_W::new(self, 1) + pub fn frm_cfg(&mut self) -> FrmCfgW { + FrmCfgW::new(self, 1) } #[doc = "Bit 2 - Force Check Register Mismatch"] #[inline(always)] #[must_use] - pub fn frm_check(&mut self) -> FRM_CHECK_W { - FRM_CHECK_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn frm_check(&mut self) -> FrmCheckW { + FrmCheckW::new(self, 2) } } #[doc = "CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTR_SPEC; -impl crate::RegisterSpec for CTR_SPEC { +pub struct CtrSpec; +impl crate::RegisterSpec for CtrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CTR_SPEC {} +impl crate::Readable for CtrSpec {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CTR_SPEC { +impl crate::Writable for CtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0"] -impl crate::Resettable for CTR_SPEC { +impl crate::Resettable for CtrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/ir.rs b/src/fce_ke0/ir.rs index 091015fa..4d3f58ca 100644 --- a/src/fce_ke0/ir.rs +++ b/src/fce_ke0/ir.rs @@ -1,49 +1,40 @@ #[doc = "Register `IR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IR` reader - Input Register"] -pub type IR_R = crate::FieldReader; +pub type IrR = crate::FieldReader; #[doc = "Field `IR` writer - Input Register"] -pub type IR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type IrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Input Register"] #[inline(always)] - pub fn ir(&self) -> IR_R { - IR_R::new(self.bits) + pub fn ir(&self) -> IrR { + IrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Input Register"] #[inline(always)] #[must_use] - pub fn ir(&mut self) -> IR_W { - IR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ir(&mut self) -> IrW { + IrW::new(self, 0) } } #[doc = "Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IR_SPEC; -impl crate::RegisterSpec for IR_SPEC { +pub struct IrSpec; +impl crate::RegisterSpec for IrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ir::R`](R) reader structure"] -impl crate::Readable for IR_SPEC {} +impl crate::Readable for IrSpec {} #[doc = "`write(|w| ..)` method takes [`ir::W`](W) writer structure"] -impl crate::Writable for IR_SPEC { +impl crate::Writable for IrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IR to value 0"] -impl crate::Resettable for IR_SPEC { +impl crate::Resettable for IrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/length.rs b/src/fce_ke0/length.rs index 45bdc976..0f784a0b 100644 --- a/src/fce_ke0/length.rs +++ b/src/fce_ke0/length.rs @@ -1,49 +1,40 @@ #[doc = "Register `LENGTH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LENGTH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LENGTH` reader - Message Length Register"] -pub type LENGTH_R = crate::FieldReader; +pub type LengthR = crate::FieldReader; #[doc = "Field `LENGTH` writer - Message Length Register"] -pub type LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type LengthW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Message Length Register"] #[inline(always)] - pub fn length(&self) -> LENGTH_R { - LENGTH_R::new((self.bits & 0xffff) as u16) + pub fn length(&self) -> LengthR { + LengthR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Message Length Register"] #[inline(always)] #[must_use] - pub fn length(&mut self) -> LENGTH_W { - LENGTH_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn length(&mut self) -> LengthW { + LengthW::new(self, 0) } } #[doc = "CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LENGTH_SPEC; -impl crate::RegisterSpec for LENGTH_SPEC { +pub struct LengthSpec; +impl crate::RegisterSpec for LengthSpec { type Ux = u32; } #[doc = "`read()` method returns [`length::R`](R) reader structure"] -impl crate::Readable for LENGTH_SPEC {} +impl crate::Readable for LengthSpec {} #[doc = "`write(|w| ..)` method takes [`length::W`](W) writer structure"] -impl crate::Writable for LENGTH_SPEC { +impl crate::Writable for LengthSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LENGTH to value 0"] -impl crate::Resettable for LENGTH_SPEC { +impl crate::Resettable for LengthSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/res.rs b/src/fce_ke0/res.rs index f673a85c..064b7481 100644 --- a/src/fce_ke0/res.rs +++ b/src/fce_ke0/res.rs @@ -1,22 +1,22 @@ #[doc = "Register `RES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RES` reader - Result Register"] -pub type RES_R = crate::FieldReader; +pub type ResR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Result Register"] #[inline(always)] - pub fn res(&self) -> RES_R { - RES_R::new(self.bits) + pub fn res(&self) -> ResR { + ResR::new(self.bits) } } #[doc = "CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RES_SPEC; -impl crate::RegisterSpec for RES_SPEC { +pub struct ResSpec; +impl crate::RegisterSpec for ResSpec { type Ux = u32; } #[doc = "`read()` method returns [`res::R`](R) reader structure"] -impl crate::Readable for RES_SPEC {} +impl crate::Readable for ResSpec {} #[doc = "`reset()` method sets RES to value 0xffff_ffff"] -impl crate::Resettable for RES_SPEC { +impl crate::Resettable for ResSpec { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/fce_ke0/sts.rs b/src/fce_ke0/sts.rs index 4c9c79f7..188150e9 100644 --- a/src/fce_ke0/sts.rs +++ b/src/fce_ke0/sts.rs @@ -1,94 +1,85 @@ #[doc = "Register `STS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMF` reader - CRC Mismatch Flag"] -pub type CMF_R = crate::BitReader; +pub type CmfR = crate::BitReader; #[doc = "Field `CMF` writer - CRC Mismatch Flag"] -pub type CMF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CmfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEF` reader - Configuration Error Flag"] -pub type CEF_R = crate::BitReader; +pub type CefR = crate::BitReader; #[doc = "Field `CEF` writer - Configuration Error Flag"] -pub type CEF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CefW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEF` reader - Length Error Flag"] -pub type LEF_R = crate::BitReader; +pub type LefR = crate::BitReader; #[doc = "Field `LEF` writer - Length Error Flag"] -pub type LEF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LefW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEF` reader - Bus Error Flag"] -pub type BEF_R = crate::BitReader; +pub type BefR = crate::BitReader; #[doc = "Field `BEF` writer - Bus Error Flag"] -pub type BEF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BefW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CRC Mismatch Flag"] #[inline(always)] - pub fn cmf(&self) -> CMF_R { - CMF_R::new((self.bits & 1) != 0) + pub fn cmf(&self) -> CmfR { + CmfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Error Flag"] #[inline(always)] - pub fn cef(&self) -> CEF_R { - CEF_R::new(((self.bits >> 1) & 1) != 0) + pub fn cef(&self) -> CefR { + CefR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Length Error Flag"] #[inline(always)] - pub fn lef(&self) -> LEF_R { - LEF_R::new(((self.bits >> 2) & 1) != 0) + pub fn lef(&self) -> LefR { + LefR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Bus Error Flag"] #[inline(always)] - pub fn bef(&self) -> BEF_R { - BEF_R::new(((self.bits >> 3) & 1) != 0) + pub fn bef(&self) -> BefR { + BefR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Mismatch Flag"] #[inline(always)] #[must_use] - pub fn cmf(&mut self) -> CMF_W { - CMF_W::new(self, 0) + pub fn cmf(&mut self) -> CmfW { + CmfW::new(self, 0) } #[doc = "Bit 1 - Configuration Error Flag"] #[inline(always)] #[must_use] - pub fn cef(&mut self) -> CEF_W { - CEF_W::new(self, 1) + pub fn cef(&mut self) -> CefW { + CefW::new(self, 1) } #[doc = "Bit 2 - Length Error Flag"] #[inline(always)] #[must_use] - pub fn lef(&mut self) -> LEF_W { - LEF_W::new(self, 2) + pub fn lef(&mut self) -> LefW { + LefW::new(self, 2) } #[doc = "Bit 3 - Bus Error Flag"] #[inline(always)] #[must_use] - pub fn bef(&mut self) -> BEF_W { - BEF_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bef(&mut self) -> BefW { + BefW::new(self, 3) } } #[doc = "CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STS_SPEC; -impl crate::RegisterSpec for STS_SPEC { +pub struct StsSpec; +impl crate::RegisterSpec for StsSpec { type Ux = u32; } #[doc = "`read()` method returns [`sts::R`](R) reader structure"] -impl crate::Readable for STS_SPEC {} +impl crate::Readable for StsSpec {} #[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] -impl crate::Writable for STS_SPEC { +impl crate::Writable for StsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0"] -impl crate::Resettable for STS_SPEC { +impl crate::Resettable for StsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0.rs b/src/flash0.rs index 040dbe14..909f7da1 100644 --- a/src/flash0.rs +++ b/src/flash0.rs @@ -1,86 +1,93 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x1008], - id: ID, + id: Id, _reserved1: [u8; 0x04], - fsr: FSR, - fcon: FCON, - marp: MARP, + fsr: Fsr, + fcon: Fcon, + marp: Marp, _reserved4: [u8; 0x04], - procon0: PROCON0, - procon1: PROCON1, - procon2: PROCON2, + procon0: Procon0, + procon1: Procon1, + procon2: Procon2, } impl RegisterBlock { #[doc = "0x1008 - Flash Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x1010 - Flash Status Register"] #[inline(always)] - pub const fn fsr(&self) -> &FSR { + pub const fn fsr(&self) -> &Fsr { &self.fsr } #[doc = "0x1014 - Flash Configuration Register"] #[inline(always)] - pub const fn fcon(&self) -> &FCON { + pub const fn fcon(&self) -> &Fcon { &self.fcon } #[doc = "0x1018 - Margin Control Register PFLASH"] #[inline(always)] - pub const fn marp(&self) -> &MARP { + pub const fn marp(&self) -> &Marp { &self.marp } #[doc = "0x1020 - Flash Protection Configuration Register User 0"] #[inline(always)] - pub const fn procon0(&self) -> &PROCON0 { + pub const fn procon0(&self) -> &Procon0 { &self.procon0 } #[doc = "0x1024 - Flash Protection Configuration Register User 1"] #[inline(always)] - pub const fn procon1(&self) -> &PROCON1 { + pub const fn procon1(&self) -> &Procon1 { &self.procon1 } #[doc = "0x1028 - Flash Protection Configuration Register User 2"] #[inline(always)] - pub const fn procon2(&self) -> &PROCON2 { + pub const fn procon2(&self) -> &Procon2 { &self.procon2 } } #[doc = "ID (r) register accessor: Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Flash Module Identification Register"] pub mod id; #[doc = "FSR (r) register accessor: Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsr`] module"] -pub type FSR = crate::Reg; +#[doc(alias = "FSR")] +pub type Fsr = crate::Reg; #[doc = "Flash Status Register"] pub mod fsr; #[doc = "FCON (rw) register accessor: Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcon`] module"] -pub type FCON = crate::Reg; +#[doc(alias = "FCON")] +pub type Fcon = crate::Reg; #[doc = "Flash Configuration Register"] pub mod fcon; #[doc = "MARP (rw) register accessor: Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@marp`] module"] -pub type MARP = crate::Reg; +#[doc(alias = "MARP")] +pub type Marp = crate::Reg; #[doc = "Margin Control Register PFLASH"] pub mod marp; #[doc = "PROCON0 (r) register accessor: Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon0`] module"] -pub type PROCON0 = crate::Reg; +#[doc(alias = "PROCON0")] +pub type Procon0 = crate::Reg; #[doc = "Flash Protection Configuration Register User 0"] pub mod procon0; #[doc = "PROCON1 (r) register accessor: Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon1`] module"] -pub type PROCON1 = crate::Reg; +#[doc(alias = "PROCON1")] +pub type Procon1 = crate::Reg; #[doc = "Flash Protection Configuration Register User 1"] pub mod procon1; #[doc = "PROCON2 (r) register accessor: Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon2`] module"] -pub type PROCON2 = crate::Reg; +#[doc(alias = "PROCON2")] +pub type Procon2 = crate::Reg; #[doc = "Flash Protection Configuration Register User 2"] pub mod procon2; diff --git a/src/flash0/fcon.rs b/src/flash0/fcon.rs index 2ec1dd3e..b4b93ffd 100644 --- a/src/flash0/fcon.rs +++ b/src/flash0/fcon.rs @@ -1,75 +1,75 @@ #[doc = "Register `FCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FCON` writer"] -pub type W = crate::W; -#[doc = "Field `WSPFLASH` reader - Wait States for read access to PFLASH"] -pub type WSPFLASH_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Wait States for read access to PFLASH\n\nValue on reset: 6"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WSPFLASH_A { +pub enum Wspflash { #[doc = "0: PFLASH access in one clock cycle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PFLASH access in one clock cycle"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: PFLASH access in two clock cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: PFLASH access in three clock cycles"] - VALUE4 = 3, + Value4 = 3, #[doc = "15: PFLASH access in fifteen clock cycles."] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WSPFLASH_A) -> Self { + fn from(variant: Wspflash) -> Self { variant as _ } } -impl crate::FieldSpec for WSPFLASH_A { +impl crate::FieldSpec for Wspflash { type Ux = u8; } -impl WSPFLASH_R { +#[doc = "Field `WSPFLASH` reader - Wait States for read access to PFLASH"] +pub type WspflashR = crate::FieldReader; +impl WspflashR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WSPFLASH_A::VALUE1), - 1 => Some(WSPFLASH_A::VALUE2), - 2 => Some(WSPFLASH_A::VALUE3), - 3 => Some(WSPFLASH_A::VALUE4), - 15 => Some(WSPFLASH_A::VALUE5), + 0 => Some(Wspflash::Value1), + 1 => Some(Wspflash::Value2), + 2 => Some(Wspflash::Value3), + 3 => Some(Wspflash::Value4), + 15 => Some(Wspflash::Value5), _ => None, } } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WSPFLASH_A::VALUE1 + *self == Wspflash::Value1 } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WSPFLASH_A::VALUE2 + *self == Wspflash::Value2 } #[doc = "PFLASH access in two clock cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WSPFLASH_A::VALUE3 + *self == Wspflash::Value3 } #[doc = "PFLASH access in three clock cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WSPFLASH_A::VALUE4 + *self == Wspflash::Value4 } #[doc = "PFLASH access in fifteen clock cycles."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == WSPFLASH_A::VALUE5 + *self == Wspflash::Value5 } } #[doc = "Field `WSPFLASH` writer - Wait States for read access to PFLASH"] -pub type WSPFLASH_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WSPFLASH_A>; -impl<'a, REG> WSPFLASH_W<'a, REG> +pub type WspflashW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wspflash>; +impl<'a, REG> WspflashW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,876 +77,867 @@ where #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WSPFLASH_A::VALUE1) + self.variant(Wspflash::Value1) } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WSPFLASH_A::VALUE2) + self.variant(Wspflash::Value2) } #[doc = "PFLASH access in two clock cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WSPFLASH_A::VALUE3) + self.variant(Wspflash::Value3) } #[doc = "PFLASH access in three clock cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WSPFLASH_A::VALUE4) + self.variant(Wspflash::Value4) } #[doc = "PFLASH access in fifteen clock cycles."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(WSPFLASH_A::VALUE5) + self.variant(Wspflash::Value5) } } -#[doc = "Field `WSECPF` reader - Wait State for Error Correction of PFLASH"] -pub type WSECPF_R = crate::BitReader; #[doc = "Wait State for Error Correction of PFLASH\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WSECPF_A { +pub enum Wsecpf { #[doc = "0: No additional wait state for error correction"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WSECPF_A) -> Self { + fn from(variant: Wsecpf) -> Self { variant as u8 != 0 } } -impl WSECPF_R { +#[doc = "Field `WSECPF` reader - Wait State for Error Correction of PFLASH"] +pub type WsecpfR = crate::BitReader; +impl WsecpfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WSECPF_A { + pub const fn variant(&self) -> Wsecpf { match self.bits { - false => WSECPF_A::VALUE1, - true => WSECPF_A::VALUE2, + false => Wsecpf::Value1, + true => Wsecpf::Value2, } } #[doc = "No additional wait state for error correction"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WSECPF_A::VALUE1 + *self == Wsecpf::Value1 } #[doc = "One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WSECPF_A::VALUE2 + *self == Wsecpf::Value2 } } #[doc = "Field `WSECPF` writer - Wait State for Error Correction of PFLASH"] -pub type WSECPF_W<'a, REG> = crate::BitWriter<'a, REG, WSECPF_A>; -impl<'a, REG> WSECPF_W<'a, REG> +pub type WsecpfW<'a, REG> = crate::BitWriter<'a, REG, Wsecpf>; +impl<'a, REG> WsecpfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No additional wait state for error correction"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WSECPF_A::VALUE1) + self.variant(Wsecpf::Value1) } #[doc = "One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WSECPF_A::VALUE2) + self.variant(Wsecpf::Value2) } } -#[doc = "Field `IDLE` reader - Dynamic Flash Idle"] -pub type IDLE_R = crate::BitReader; #[doc = "Dynamic Flash Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IDLE_A { +pub enum Idle { #[doc = "0: Normal/standard Flash read operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IDLE_A) -> Self { + fn from(variant: Idle) -> Self { variant as u8 != 0 } } -impl IDLE_R { +#[doc = "Field `IDLE` reader - Dynamic Flash Idle"] +pub type IdleR = crate::BitReader; +impl IdleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IDLE_A { + pub const fn variant(&self) -> Idle { match self.bits { - false => IDLE_A::VALUE1, - true => IDLE_A::VALUE2, + false => Idle::Value1, + true => Idle::Value2, } } #[doc = "Normal/standard Flash read operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IDLE_A::VALUE1 + *self == Idle::Value1 } #[doc = "Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IDLE_A::VALUE2 + *self == Idle::Value2 } } #[doc = "Field `IDLE` writer - Dynamic Flash Idle"] -pub type IDLE_W<'a, REG> = crate::BitWriter<'a, REG, IDLE_A>; -impl<'a, REG> IDLE_W<'a, REG> +pub type IdleW<'a, REG> = crate::BitWriter<'a, REG, Idle>; +impl<'a, REG> IdleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal/standard Flash read operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IDLE_A::VALUE1) + self.variant(Idle::Value1) } #[doc = "Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IDLE_A::VALUE2) + self.variant(Idle::Value2) } } -#[doc = "Field `ESLDIS` reader - External Sleep Request Disable"] -pub type ESLDIS_R = crate::BitReader; #[doc = "External Sleep Request Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ESLDIS_A { +pub enum Esldis { #[doc = "0: External sleep request signal input is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Externally requested Flash sleep is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ESLDIS_A) -> Self { + fn from(variant: Esldis) -> Self { variant as u8 != 0 } } -impl ESLDIS_R { +#[doc = "Field `ESLDIS` reader - External Sleep Request Disable"] +pub type EsldisR = crate::BitReader; +impl EsldisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ESLDIS_A { + pub const fn variant(&self) -> Esldis { match self.bits { - false => ESLDIS_A::VALUE1, - true => ESLDIS_A::VALUE2, + false => Esldis::Value1, + true => Esldis::Value2, } } #[doc = "External sleep request signal input is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ESLDIS_A::VALUE1 + *self == Esldis::Value1 } #[doc = "Externally requested Flash sleep is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ESLDIS_A::VALUE2 + *self == Esldis::Value2 } } #[doc = "Field `ESLDIS` writer - External Sleep Request Disable"] -pub type ESLDIS_W<'a, REG> = crate::BitWriter<'a, REG, ESLDIS_A>; -impl<'a, REG> ESLDIS_W<'a, REG> +pub type EsldisW<'a, REG> = crate::BitWriter<'a, REG, Esldis>; +impl<'a, REG> EsldisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External sleep request signal input is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ESLDIS_A::VALUE1) + self.variant(Esldis::Value1) } #[doc = "Externally requested Flash sleep is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ESLDIS_A::VALUE2) + self.variant(Esldis::Value2) } } -#[doc = "Field `SLEEP` reader - Flash SLEEP"] -pub type SLEEP_R = crate::BitReader; #[doc = "Flash SLEEP\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLEEP_A { +pub enum Sleep { #[doc = "0: Normal state or wake-up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash sleep mode is requested"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLEEP_A) -> Self { + fn from(variant: Sleep) -> Self { variant as u8 != 0 } } -impl SLEEP_R { +#[doc = "Field `SLEEP` reader - Flash SLEEP"] +pub type SleepR = crate::BitReader; +impl SleepR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLEEP_A { + pub const fn variant(&self) -> Sleep { match self.bits { - false => SLEEP_A::VALUE1, - true => SLEEP_A::VALUE2, + false => Sleep::Value1, + true => Sleep::Value2, } } #[doc = "Normal state or wake-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLEEP_A::VALUE1 + *self == Sleep::Value1 } #[doc = "Flash sleep mode is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLEEP_A::VALUE2 + *self == Sleep::Value2 } } #[doc = "Field `SLEEP` writer - Flash SLEEP"] -pub type SLEEP_W<'a, REG> = crate::BitWriter<'a, REG, SLEEP_A>; -impl<'a, REG> SLEEP_W<'a, REG> +pub type SleepW<'a, REG> = crate::BitWriter<'a, REG, Sleep>; +impl<'a, REG> SleepW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal state or wake-up"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SLEEP_A::VALUE1) + self.variant(Sleep::Value1) } #[doc = "Flash sleep mode is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SLEEP_A::VALUE2) + self.variant(Sleep::Value2) } } -#[doc = "Field `RPA` reader - Read Protection Activated"] -pub type RPA_R = crate::BitReader; #[doc = "Read Protection Activated\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPA_A { +pub enum Rpa { #[doc = "0: The Flash-internal read protection is not activated. Bits DCF, DDF are not taken into account. Bits DCF, DDFx can be cleared"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The Flash-internal read protection is activated. Bits DCF, DDF are enabled and evaluated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPA_A) -> Self { + fn from(variant: Rpa) -> Self { variant as u8 != 0 } } -impl RPA_R { +#[doc = "Field `RPA` reader - Read Protection Activated"] +pub type RpaR = crate::BitReader; +impl RpaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPA_A { + pub const fn variant(&self) -> Rpa { match self.bits { - false => RPA_A::VALUE1, - true => RPA_A::VALUE2, + false => Rpa::Value1, + true => Rpa::Value2, } } #[doc = "The Flash-internal read protection is not activated. Bits DCF, DDF are not taken into account. Bits DCF, DDFx can be cleared"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPA_A::VALUE1 + *self == Rpa::Value1 } #[doc = "The Flash-internal read protection is activated. Bits DCF, DDF are enabled and evaluated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPA_A::VALUE2 + *self == Rpa::Value2 } } -#[doc = "Field `DCF` reader - Disable Code Fetch from Flash Memory"] -pub type DCF_R = crate::BitReader; #[doc = "Disable Code Fetch from Flash Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCF_A { +pub enum Dcf { #[doc = "0: Code fetching from the Flash memory area is allowed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCF_A) -> Self { + fn from(variant: Dcf) -> Self { variant as u8 != 0 } } -impl DCF_R { +#[doc = "Field `DCF` reader - Disable Code Fetch from Flash Memory"] +pub type DcfR = crate::BitReader; +impl DcfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCF_A { + pub const fn variant(&self) -> Dcf { match self.bits { - false => DCF_A::VALUE1, - true => DCF_A::VALUE2, + false => Dcf::Value1, + true => Dcf::Value2, } } #[doc = "Code fetching from the Flash memory area is allowed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCF_A::VALUE1 + *self == Dcf::Value1 } #[doc = "Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCF_A::VALUE2 + *self == Dcf::Value2 } } #[doc = "Field `DCF` writer - Disable Code Fetch from Flash Memory"] -pub type DCF_W<'a, REG> = crate::BitWriter<'a, REG, DCF_A>; -impl<'a, REG> DCF_W<'a, REG> +pub type DcfW<'a, REG> = crate::BitWriter<'a, REG, Dcf>; +impl<'a, REG> DcfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Code fetching from the Flash memory area is allowed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCF_A::VALUE1) + self.variant(Dcf::Value1) } #[doc = "Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCF_A::VALUE2) + self.variant(Dcf::Value2) } } -#[doc = "Field `DDF` reader - Disable Any Data Fetch from Flash"] -pub type DDF_R = crate::BitReader; #[doc = "Disable Any Data Fetch from Flash\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DDF_A { +pub enum Ddf { #[doc = "0: Data read access to the Flash memory area is allowed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DDF_A) -> Self { + fn from(variant: Ddf) -> Self { variant as u8 != 0 } } -impl DDF_R { +#[doc = "Field `DDF` reader - Disable Any Data Fetch from Flash"] +pub type DdfR = crate::BitReader; +impl DdfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DDF_A { + pub const fn variant(&self) -> Ddf { match self.bits { - false => DDF_A::VALUE1, - true => DDF_A::VALUE2, + false => Ddf::Value1, + true => Ddf::Value2, } } #[doc = "Data read access to the Flash memory area is allowed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DDF_A::VALUE1 + *self == Ddf::Value1 } #[doc = "Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DDF_A::VALUE2 + *self == Ddf::Value2 } } #[doc = "Field `DDF` writer - Disable Any Data Fetch from Flash"] -pub type DDF_W<'a, REG> = crate::BitWriter<'a, REG, DDF_A>; -impl<'a, REG> DDF_W<'a, REG> +pub type DdfW<'a, REG> = crate::BitWriter<'a, REG, Ddf>; +impl<'a, REG> DdfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data read access to the Flash memory area is allowed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DDF_A::VALUE1) + self.variant(Ddf::Value1) } #[doc = "Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DDF_A::VALUE2) + self.variant(Ddf::Value2) } } -#[doc = "Field `VOPERM` reader - Verify and Operation Error Interrupt Mask"] -pub type VOPERM_R = crate::BitReader; #[doc = "Verify and Operation Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VOPERM_A { +pub enum Voperm { #[doc = "0: Interrupt not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VOPERM_A) -> Self { + fn from(variant: Voperm) -> Self { variant as u8 != 0 } } -impl VOPERM_R { +#[doc = "Field `VOPERM` reader - Verify and Operation Error Interrupt Mask"] +pub type VopermR = crate::BitReader; +impl VopermR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VOPERM_A { + pub const fn variant(&self) -> Voperm { match self.bits { - false => VOPERM_A::VALUE1, - true => VOPERM_A::VALUE2, + false => Voperm::Value1, + true => Voperm::Value2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VOPERM_A::VALUE1 + *self == Voperm::Value1 } #[doc = "Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VOPERM_A::VALUE2 + *self == Voperm::Value2 } } #[doc = "Field `VOPERM` writer - Verify and Operation Error Interrupt Mask"] -pub type VOPERM_W<'a, REG> = crate::BitWriter<'a, REG, VOPERM_A>; -impl<'a, REG> VOPERM_W<'a, REG> +pub type VopermW<'a, REG> = crate::BitWriter<'a, REG, Voperm>; +impl<'a, REG> VopermW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VOPERM_A::VALUE1) + self.variant(Voperm::Value1) } #[doc = "Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VOPERM_A::VALUE2) + self.variant(Voperm::Value2) } } -#[doc = "Field `SQERM` reader - Command Sequence Error Interrupt Mask"] -pub type SQERM_R = crate::BitReader; #[doc = "Command Sequence Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SQERM_A { +pub enum Sqerm { #[doc = "0: Interrupt not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash interrupt because of Sequence Error is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SQERM_A) -> Self { + fn from(variant: Sqerm) -> Self { variant as u8 != 0 } } -impl SQERM_R { +#[doc = "Field `SQERM` reader - Command Sequence Error Interrupt Mask"] +pub type SqermR = crate::BitReader; +impl SqermR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SQERM_A { + pub const fn variant(&self) -> Sqerm { match self.bits { - false => SQERM_A::VALUE1, - true => SQERM_A::VALUE2, + false => Sqerm::Value1, + true => Sqerm::Value2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SQERM_A::VALUE1 + *self == Sqerm::Value1 } #[doc = "Flash interrupt because of Sequence Error is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SQERM_A::VALUE2 + *self == Sqerm::Value2 } } #[doc = "Field `SQERM` writer - Command Sequence Error Interrupt Mask"] -pub type SQERM_W<'a, REG> = crate::BitWriter<'a, REG, SQERM_A>; -impl<'a, REG> SQERM_W<'a, REG> +pub type SqermW<'a, REG> = crate::BitWriter<'a, REG, Sqerm>; +impl<'a, REG> SqermW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SQERM_A::VALUE1) + self.variant(Sqerm::Value1) } #[doc = "Flash interrupt because of Sequence Error is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SQERM_A::VALUE2) + self.variant(Sqerm::Value2) } } -#[doc = "Field `PROERM` reader - Protection Error Interrupt Mask"] -pub type PROERM_R = crate::BitReader; #[doc = "Protection Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PROERM_A { +pub enum Proerm { #[doc = "0: Interrupt not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash interrupt because of Protection Error is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PROERM_A) -> Self { + fn from(variant: Proerm) -> Self { variant as u8 != 0 } } -impl PROERM_R { +#[doc = "Field `PROERM` reader - Protection Error Interrupt Mask"] +pub type ProermR = crate::BitReader; +impl ProermR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PROERM_A { + pub const fn variant(&self) -> Proerm { match self.bits { - false => PROERM_A::VALUE1, - true => PROERM_A::VALUE2, + false => Proerm::Value1, + true => Proerm::Value2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PROERM_A::VALUE1 + *self == Proerm::Value1 } #[doc = "Flash interrupt because of Protection Error is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PROERM_A::VALUE2 + *self == Proerm::Value2 } } #[doc = "Field `PROERM` writer - Protection Error Interrupt Mask"] -pub type PROERM_W<'a, REG> = crate::BitWriter<'a, REG, PROERM_A>; -impl<'a, REG> PROERM_W<'a, REG> +pub type ProermW<'a, REG> = crate::BitWriter<'a, REG, Proerm>; +impl<'a, REG> ProermW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PROERM_A::VALUE1) + self.variant(Proerm::Value1) } #[doc = "Flash interrupt because of Protection Error is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PROERM_A::VALUE2) + self.variant(Proerm::Value2) } } -#[doc = "Field `PFSBERM` reader - PFLASH Single-Bit Error Interrupt Mask"] -pub type PFSBERM_R = crate::BitReader; #[doc = "PFLASH Single-Bit Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFSBERM_A { +pub enum Pfsberm { #[doc = "0: No Single-Bit Error interrupt enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single-Bit Error interrupt enabled for PFLASH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFSBERM_A) -> Self { + fn from(variant: Pfsberm) -> Self { variant as u8 != 0 } } -impl PFSBERM_R { +#[doc = "Field `PFSBERM` reader - PFLASH Single-Bit Error Interrupt Mask"] +pub type PfsbermR = crate::BitReader; +impl PfsbermR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFSBERM_A { + pub const fn variant(&self) -> Pfsberm { match self.bits { - false => PFSBERM_A::VALUE1, - true => PFSBERM_A::VALUE2, + false => Pfsberm::Value1, + true => Pfsberm::Value2, } } #[doc = "No Single-Bit Error interrupt enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFSBERM_A::VALUE1 + *self == Pfsberm::Value1 } #[doc = "Single-Bit Error interrupt enabled for PFLASH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFSBERM_A::VALUE2 + *self == Pfsberm::Value2 } } #[doc = "Field `PFSBERM` writer - PFLASH Single-Bit Error Interrupt Mask"] -pub type PFSBERM_W<'a, REG> = crate::BitWriter<'a, REG, PFSBERM_A>; -impl<'a, REG> PFSBERM_W<'a, REG> +pub type PfsbermW<'a, REG> = crate::BitWriter<'a, REG, Pfsberm>; +impl<'a, REG> PfsbermW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Single-Bit Error interrupt enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PFSBERM_A::VALUE1) + self.variant(Pfsberm::Value1) } #[doc = "Single-Bit Error interrupt enabled for PFLASH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PFSBERM_A::VALUE2) + self.variant(Pfsberm::Value2) } } -#[doc = "Field `PFDBERM` reader - PFLASH Double-Bit Error Interrupt Mask"] -pub type PFDBERM_R = crate::BitReader; #[doc = "PFLASH Double-Bit Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFDBERM_A { +pub enum Pfdberm { #[doc = "0: Double-Bit Error interrupt for PFLASH not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFDBERM_A) -> Self { + fn from(variant: Pfdberm) -> Self { variant as u8 != 0 } } -impl PFDBERM_R { +#[doc = "Field `PFDBERM` reader - PFLASH Double-Bit Error Interrupt Mask"] +pub type PfdbermR = crate::BitReader; +impl PfdbermR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFDBERM_A { + pub const fn variant(&self) -> Pfdberm { match self.bits { - false => PFDBERM_A::VALUE1, - true => PFDBERM_A::VALUE2, + false => Pfdberm::Value1, + true => Pfdberm::Value2, } } #[doc = "Double-Bit Error interrupt for PFLASH not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFDBERM_A::VALUE1 + *self == Pfdberm::Value1 } #[doc = "Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFDBERM_A::VALUE2 + *self == Pfdberm::Value2 } } #[doc = "Field `PFDBERM` writer - PFLASH Double-Bit Error Interrupt Mask"] -pub type PFDBERM_W<'a, REG> = crate::BitWriter<'a, REG, PFDBERM_A>; -impl<'a, REG> PFDBERM_W<'a, REG> +pub type PfdbermW<'a, REG> = crate::BitWriter<'a, REG, Pfdberm>; +impl<'a, REG> PfdbermW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Double-Bit Error interrupt for PFLASH not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PFDBERM_A::VALUE1) + self.variant(Pfdberm::Value1) } #[doc = "Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PFDBERM_A::VALUE2) + self.variant(Pfdberm::Value2) } } -#[doc = "Field `EOBM` reader - End of Busy Interrupt Mask"] -pub type EOBM_R = crate::BitReader; #[doc = "End of Busy Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EOBM_A { +pub enum Eobm { #[doc = "0: Interrupt not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: EOB interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EOBM_A) -> Self { + fn from(variant: Eobm) -> Self { variant as u8 != 0 } } -impl EOBM_R { +#[doc = "Field `EOBM` reader - End of Busy Interrupt Mask"] +pub type EobmR = crate::BitReader; +impl EobmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EOBM_A { + pub const fn variant(&self) -> Eobm { match self.bits { - false => EOBM_A::VALUE1, - true => EOBM_A::VALUE2, + false => Eobm::Value1, + true => Eobm::Value2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EOBM_A::VALUE1 + *self == Eobm::Value1 } #[doc = "EOB interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EOBM_A::VALUE2 + *self == Eobm::Value2 } } #[doc = "Field `EOBM` writer - End of Busy Interrupt Mask"] -pub type EOBM_W<'a, REG> = crate::BitWriter<'a, REG, EOBM_A>; -impl<'a, REG> EOBM_W<'a, REG> +pub type EobmW<'a, REG> = crate::BitWriter<'a, REG, Eobm>; +impl<'a, REG> EobmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EOBM_A::VALUE1) + self.variant(Eobm::Value1) } #[doc = "EOB interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EOBM_A::VALUE2) + self.variant(Eobm::Value2) } } impl R { #[doc = "Bits 0:3 - Wait States for read access to PFLASH"] #[inline(always)] - pub fn wspflash(&self) -> WSPFLASH_R { - WSPFLASH_R::new((self.bits & 0x0f) as u8) + pub fn wspflash(&self) -> WspflashR { + WspflashR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"] #[inline(always)] - pub fn wsecpf(&self) -> WSECPF_R { - WSECPF_R::new(((self.bits >> 4) & 1) != 0) + pub fn wsecpf(&self) -> WsecpfR { + WsecpfR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 13 - Dynamic Flash Idle"] #[inline(always)] - pub fn idle(&self) -> IDLE_R { - IDLE_R::new(((self.bits >> 13) & 1) != 0) + pub fn idle(&self) -> IdleR { + IdleR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - External Sleep Request Disable"] #[inline(always)] - pub fn esldis(&self) -> ESLDIS_R { - ESLDIS_R::new(((self.bits >> 14) & 1) != 0) + pub fn esldis(&self) -> EsldisR { + EsldisR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Flash SLEEP"] #[inline(always)] - pub fn sleep(&self) -> SLEEP_R { - SLEEP_R::new(((self.bits >> 15) & 1) != 0) + pub fn sleep(&self) -> SleepR { + SleepR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Read Protection Activated"] #[inline(always)] - pub fn rpa(&self) -> RPA_R { - RPA_R::new(((self.bits >> 16) & 1) != 0) + pub fn rpa(&self) -> RpaR { + RpaR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"] #[inline(always)] - pub fn dcf(&self) -> DCF_R { - DCF_R::new(((self.bits >> 17) & 1) != 0) + pub fn dcf(&self) -> DcfR { + DcfR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Any Data Fetch from Flash"] #[inline(always)] - pub fn ddf(&self) -> DDF_R { - DDF_R::new(((self.bits >> 18) & 1) != 0) + pub fn ddf(&self) -> DdfR { + DdfR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"] #[inline(always)] - pub fn voperm(&self) -> VOPERM_R { - VOPERM_R::new(((self.bits >> 24) & 1) != 0) + pub fn voperm(&self) -> VopermR { + VopermR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"] #[inline(always)] - pub fn sqerm(&self) -> SQERM_R { - SQERM_R::new(((self.bits >> 25) & 1) != 0) + pub fn sqerm(&self) -> SqermR { + SqermR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Protection Error Interrupt Mask"] #[inline(always)] - pub fn proerm(&self) -> PROERM_R { - PROERM_R::new(((self.bits >> 26) & 1) != 0) + pub fn proerm(&self) -> ProermR { + ProermR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"] #[inline(always)] - pub fn pfsberm(&self) -> PFSBERM_R { - PFSBERM_R::new(((self.bits >> 27) & 1) != 0) + pub fn pfsberm(&self) -> PfsbermR { + PfsbermR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"] #[inline(always)] - pub fn pfdberm(&self) -> PFDBERM_R { - PFDBERM_R::new(((self.bits >> 29) & 1) != 0) + pub fn pfdberm(&self) -> PfdbermR { + PfdbermR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 31 - End of Busy Interrupt Mask"] #[inline(always)] - pub fn eobm(&self) -> EOBM_R { - EOBM_R::new(((self.bits >> 31) & 1) != 0) + pub fn eobm(&self) -> EobmR { + EobmR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Wait States for read access to PFLASH"] #[inline(always)] #[must_use] - pub fn wspflash(&mut self) -> WSPFLASH_W { - WSPFLASH_W::new(self, 0) + pub fn wspflash(&mut self) -> WspflashW { + WspflashW::new(self, 0) } #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"] #[inline(always)] #[must_use] - pub fn wsecpf(&mut self) -> WSECPF_W { - WSECPF_W::new(self, 4) + pub fn wsecpf(&mut self) -> WsecpfW { + WsecpfW::new(self, 4) } #[doc = "Bit 13 - Dynamic Flash Idle"] #[inline(always)] #[must_use] - pub fn idle(&mut self) -> IDLE_W { - IDLE_W::new(self, 13) + pub fn idle(&mut self) -> IdleW { + IdleW::new(self, 13) } #[doc = "Bit 14 - External Sleep Request Disable"] #[inline(always)] #[must_use] - pub fn esldis(&mut self) -> ESLDIS_W { - ESLDIS_W::new(self, 14) + pub fn esldis(&mut self) -> EsldisW { + EsldisW::new(self, 14) } #[doc = "Bit 15 - Flash SLEEP"] #[inline(always)] #[must_use] - pub fn sleep(&mut self) -> SLEEP_W { - SLEEP_W::new(self, 15) + pub fn sleep(&mut self) -> SleepW { + SleepW::new(self, 15) } #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"] #[inline(always)] #[must_use] - pub fn dcf(&mut self) -> DCF_W { - DCF_W::new(self, 17) + pub fn dcf(&mut self) -> DcfW { + DcfW::new(self, 17) } #[doc = "Bit 18 - Disable Any Data Fetch from Flash"] #[inline(always)] #[must_use] - pub fn ddf(&mut self) -> DDF_W { - DDF_W::new(self, 18) + pub fn ddf(&mut self) -> DdfW { + DdfW::new(self, 18) } #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn voperm(&mut self) -> VOPERM_W { - VOPERM_W::new(self, 24) + pub fn voperm(&mut self) -> VopermW { + VopermW::new(self, 24) } #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn sqerm(&mut self) -> SQERM_W { - SQERM_W::new(self, 25) + pub fn sqerm(&mut self) -> SqermW { + SqermW::new(self, 25) } #[doc = "Bit 26 - Protection Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn proerm(&mut self) -> PROERM_W { - PROERM_W::new(self, 26) + pub fn proerm(&mut self) -> ProermW { + ProermW::new(self, 26) } #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pfsberm(&mut self) -> PFSBERM_W { - PFSBERM_W::new(self, 27) + pub fn pfsberm(&mut self) -> PfsbermW { + PfsbermW::new(self, 27) } #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pfdberm(&mut self) -> PFDBERM_W { - PFDBERM_W::new(self, 29) + pub fn pfdberm(&mut self) -> PfdbermW { + PfdbermW::new(self, 29) } #[doc = "Bit 31 - End of Busy Interrupt Mask"] #[inline(always)] #[must_use] - pub fn eobm(&mut self) -> EOBM_W { - EOBM_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eobm(&mut self) -> EobmW { + EobmW::new(self, 31) } } #[doc = "Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FCON_SPEC; -impl crate::RegisterSpec for FCON_SPEC { +pub struct FconSpec; +impl crate::RegisterSpec for FconSpec { type Ux = u32; } #[doc = "`read()` method returns [`fcon::R`](R) reader structure"] -impl crate::Readable for FCON_SPEC {} +impl crate::Readable for FconSpec {} #[doc = "`write(|w| ..)` method takes [`fcon::W`](W) writer structure"] -impl crate::Writable for FCON_SPEC { +impl crate::Writable for FconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FCON to value 0x06"] -impl crate::Resettable for FCON_SPEC { +impl crate::Resettable for FconSpec { const RESET_VALUE: u32 = 0x06; } diff --git a/src/flash0/fsr.rs b/src/flash0/fsr.rs index 10ec6822..5e86d241 100644 --- a/src/flash0/fsr.rs +++ b/src/flash0/fsr.rs @@ -1,801 +1,801 @@ #[doc = "Register `FSR` reader"] -pub type R = crate::R; -#[doc = "Field `PBUSY` reader - Program Flash Busy"] -pub type PBUSY_R = crate::BitReader; +pub type R = crate::R; #[doc = "Program Flash Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PBUSY_A { +pub enum Pbusy { #[doc = "0: PFLASH ready, not busy; PFLASH in read mode."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PFLASH busy; PFLASH not in read mode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PBUSY_A) -> Self { + fn from(variant: Pbusy) -> Self { variant as u8 != 0 } } -impl PBUSY_R { +#[doc = "Field `PBUSY` reader - Program Flash Busy"] +pub type PbusyR = crate::BitReader; +impl PbusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PBUSY_A { + pub const fn variant(&self) -> Pbusy { match self.bits { - false => PBUSY_A::VALUE1, - true => PBUSY_A::VALUE2, + false => Pbusy::Value1, + true => Pbusy::Value2, } } #[doc = "PFLASH ready, not busy; PFLASH in read mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PBUSY_A::VALUE1 + *self == Pbusy::Value1 } #[doc = "PFLASH busy; PFLASH not in read mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PBUSY_A::VALUE2 + *self == Pbusy::Value2 } } #[doc = "Field `FABUSY` reader - Flash Array Busy"] -pub type FABUSY_R = crate::BitReader; -#[doc = "Field `PROG` reader - Programming State"] -pub type PROG_R = crate::BitReader; +pub type FabusyR = crate::BitReader; #[doc = "Programming State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PROG_A { +pub enum Prog { #[doc = "0: There is no program operation requested or in progress or just finished."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Programming operation (write page) requested (from FIM) or in action or finished."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PROG_A) -> Self { + fn from(variant: Prog) -> Self { variant as u8 != 0 } } -impl PROG_R { +#[doc = "Field `PROG` reader - Programming State"] +pub type ProgR = crate::BitReader; +impl ProgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PROG_A { + pub const fn variant(&self) -> Prog { match self.bits { - false => PROG_A::VALUE1, - true => PROG_A::VALUE2, + false => Prog::Value1, + true => Prog::Value2, } } #[doc = "There is no program operation requested or in progress or just finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PROG_A::VALUE1 + *self == Prog::Value1 } #[doc = "Programming operation (write page) requested (from FIM) or in action or finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PROG_A::VALUE2 + *self == Prog::Value2 } } -#[doc = "Field `ERASE` reader - Erase State"] -pub type ERASE_R = crate::BitReader; #[doc = "Erase State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERASE_A { +pub enum Erase { #[doc = "0: There is no erase operation requested or in progress or just finished"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Erase operation requested (from FIM) or in action or finished."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERASE_A) -> Self { + fn from(variant: Erase) -> Self { variant as u8 != 0 } } -impl ERASE_R { +#[doc = "Field `ERASE` reader - Erase State"] +pub type EraseR = crate::BitReader; +impl EraseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERASE_A { + pub const fn variant(&self) -> Erase { match self.bits { - false => ERASE_A::VALUE1, - true => ERASE_A::VALUE2, + false => Erase::Value1, + true => Erase::Value2, } } #[doc = "There is no erase operation requested or in progress or just finished"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERASE_A::VALUE1 + *self == Erase::Value1 } #[doc = "Erase operation requested (from FIM) or in action or finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERASE_A::VALUE2 + *self == Erase::Value2 } } -#[doc = "Field `PFPAGE` reader - Program Flash in Page Mode"] -pub type PFPAGE_R = crate::BitReader; #[doc = "Program Flash in Page Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFPAGE_A { +pub enum Pfpage { #[doc = "0: Program Flash not in page mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Program Flash in page mode; assembly buffer of PFLASH (256 byte) is in use (being filled up)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFPAGE_A) -> Self { + fn from(variant: Pfpage) -> Self { variant as u8 != 0 } } -impl PFPAGE_R { +#[doc = "Field `PFPAGE` reader - Program Flash in Page Mode"] +pub type PfpageR = crate::BitReader; +impl PfpageR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFPAGE_A { + pub const fn variant(&self) -> Pfpage { match self.bits { - false => PFPAGE_A::VALUE1, - true => PFPAGE_A::VALUE2, + false => Pfpage::Value1, + true => Pfpage::Value2, } } #[doc = "Program Flash not in page mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFPAGE_A::VALUE1 + *self == Pfpage::Value1 } #[doc = "Program Flash in page mode; assembly buffer of PFLASH (256 byte) is in use (being filled up)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFPAGE_A::VALUE2 + *self == Pfpage::Value2 } } -#[doc = "Field `PFOPER` reader - Program Flash Operation Error"] -pub type PFOPER_R = crate::BitReader; #[doc = "Program Flash Operation Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFOPER_A { +pub enum Pfoper { #[doc = "0: No operation error reported by Program Flash"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash array operation aborted, because of a Flash array failure, e.g. an ECC error in microcode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFOPER_A) -> Self { + fn from(variant: Pfoper) -> Self { variant as u8 != 0 } } -impl PFOPER_R { +#[doc = "Field `PFOPER` reader - Program Flash Operation Error"] +pub type PfoperR = crate::BitReader; +impl PfoperR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFOPER_A { + pub const fn variant(&self) -> Pfoper { match self.bits { - false => PFOPER_A::VALUE1, - true => PFOPER_A::VALUE2, + false => Pfoper::Value1, + true => Pfoper::Value2, } } #[doc = "No operation error reported by Program Flash"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFOPER_A::VALUE1 + *self == Pfoper::Value1 } #[doc = "Flash array operation aborted, because of a Flash array failure, e.g. an ECC error in microcode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFOPER_A::VALUE2 + *self == Pfoper::Value2 } } -#[doc = "Field `SQER` reader - Command Sequence Error"] -pub type SQER_R = crate::BitReader; #[doc = "Command Sequence Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SQER_A { +pub enum Sqer { #[doc = "0: No sequence error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Command state machine operation unsuccessful because of improper address or command sequence."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SQER_A) -> Self { + fn from(variant: Sqer) -> Self { variant as u8 != 0 } } -impl SQER_R { +#[doc = "Field `SQER` reader - Command Sequence Error"] +pub type SqerR = crate::BitReader; +impl SqerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SQER_A { + pub const fn variant(&self) -> Sqer { match self.bits { - false => SQER_A::VALUE1, - true => SQER_A::VALUE2, + false => Sqer::Value1, + true => Sqer::Value2, } } #[doc = "No sequence error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SQER_A::VALUE1 + *self == Sqer::Value1 } #[doc = "Command state machine operation unsuccessful because of improper address or command sequence."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SQER_A::VALUE2 + *self == Sqer::Value2 } } -#[doc = "Field `PROER` reader - Protection Error"] -pub type PROER_R = crate::BitReader; #[doc = "Protection Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PROER_A { +pub enum Proer { #[doc = "0: No protection error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Protection error."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PROER_A) -> Self { + fn from(variant: Proer) -> Self { variant as u8 != 0 } } -impl PROER_R { +#[doc = "Field `PROER` reader - Protection Error"] +pub type ProerR = crate::BitReader; +impl ProerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PROER_A { + pub const fn variant(&self) -> Proer { match self.bits { - false => PROER_A::VALUE1, - true => PROER_A::VALUE2, + false => Proer::Value1, + true => Proer::Value2, } } #[doc = "No protection error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PROER_A::VALUE1 + *self == Proer::Value1 } #[doc = "Protection error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PROER_A::VALUE2 + *self == Proer::Value2 } } -#[doc = "Field `PFSBER` reader - PFLASH Single-Bit Error and Correction"] -pub type PFSBER_R = crate::BitReader; #[doc = "PFLASH Single-Bit Error and Correction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFSBER_A { +pub enum Pfsber { #[doc = "0: No Single-Bit Error detected during read access to PFLASH"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Single-Bit Error detected and corrected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFSBER_A) -> Self { + fn from(variant: Pfsber) -> Self { variant as u8 != 0 } } -impl PFSBER_R { +#[doc = "Field `PFSBER` reader - PFLASH Single-Bit Error and Correction"] +pub type PfsberR = crate::BitReader; +impl PfsberR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFSBER_A { + pub const fn variant(&self) -> Pfsber { match self.bits { - false => PFSBER_A::VALUE1, - true => PFSBER_A::VALUE2, + false => Pfsber::Value1, + true => Pfsber::Value2, } } #[doc = "No Single-Bit Error detected during read access to PFLASH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFSBER_A::VALUE1 + *self == Pfsber::Value1 } #[doc = "Single-Bit Error detected and corrected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFSBER_A::VALUE2 + *self == Pfsber::Value2 } } -#[doc = "Field `PFDBER` reader - PFLASH Double-Bit Error"] -pub type PFDBER_R = crate::BitReader; #[doc = "PFLASH Double-Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PFDBER_A { +pub enum Pfdber { #[doc = "0: No Double-Bit Error detected during read access to PFLASH"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Double-Bit Error detected in PFLASH"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PFDBER_A) -> Self { + fn from(variant: Pfdber) -> Self { variant as u8 != 0 } } -impl PFDBER_R { +#[doc = "Field `PFDBER` reader - PFLASH Double-Bit Error"] +pub type PfdberR = crate::BitReader; +impl PfdberR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PFDBER_A { + pub const fn variant(&self) -> Pfdber { match self.bits { - false => PFDBER_A::VALUE1, - true => PFDBER_A::VALUE2, + false => Pfdber::Value1, + true => Pfdber::Value2, } } #[doc = "No Double-Bit Error detected during read access to PFLASH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PFDBER_A::VALUE1 + *self == Pfdber::Value1 } #[doc = "Double-Bit Error detected in PFLASH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PFDBER_A::VALUE2 + *self == Pfdber::Value2 } } -#[doc = "Field `PROIN` reader - Protection Installed"] -pub type PROIN_R = crate::BitReader; #[doc = "Protection Installed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PROIN_A { +pub enum Proin { #[doc = "0: No protection is installed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read or/and write protection for one or more users is configured and correctly confirmed in the User Configuration Block(s)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PROIN_A) -> Self { + fn from(variant: Proin) -> Self { variant as u8 != 0 } } -impl PROIN_R { +#[doc = "Field `PROIN` reader - Protection Installed"] +pub type ProinR = crate::BitReader; +impl ProinR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PROIN_A { + pub const fn variant(&self) -> Proin { match self.bits { - false => PROIN_A::VALUE1, - true => PROIN_A::VALUE2, + false => Proin::Value1, + true => Proin::Value2, } } #[doc = "No protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PROIN_A::VALUE1 + *self == Proin::Value1 } #[doc = "Read or/and write protection for one or more users is configured and correctly confirmed in the User Configuration Block(s)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PROIN_A::VALUE2 + *self == Proin::Value2 } } -#[doc = "Field `RPROIN` reader - Read Protection Installed"] -pub type RPROIN_R = crate::BitReader; #[doc = "Read Protection Installed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPROIN_A { +pub enum Rproin { #[doc = "0: No read protection installed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read protection and global write protection is configured and correctly confirmed in the User Configuration Block 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPROIN_A) -> Self { + fn from(variant: Rproin) -> Self { variant as u8 != 0 } } -impl RPROIN_R { +#[doc = "Field `RPROIN` reader - Read Protection Installed"] +pub type RproinR = crate::BitReader; +impl RproinR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPROIN_A { + pub const fn variant(&self) -> Rproin { match self.bits { - false => RPROIN_A::VALUE1, - true => RPROIN_A::VALUE2, + false => Rproin::Value1, + true => Rproin::Value2, } } #[doc = "No read protection installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPROIN_A::VALUE1 + *self == Rproin::Value1 } #[doc = "Read protection and global write protection is configured and correctly confirmed in the User Configuration Block 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPROIN_A::VALUE2 + *self == Rproin::Value2 } } -#[doc = "Field `RPRODIS` reader - Read Protection Disable State"] -pub type RPRODIS_R = crate::BitReader; #[doc = "Read Protection Disable State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPRODIS_A { +pub enum Rprodis { #[doc = "0: Read protection (if installed) is not disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read and global write protection is temporarily disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPRODIS_A) -> Self { + fn from(variant: Rprodis) -> Self { variant as u8 != 0 } } -impl RPRODIS_R { +#[doc = "Field `RPRODIS` reader - Read Protection Disable State"] +pub type RprodisR = crate::BitReader; +impl RprodisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPRODIS_A { + pub const fn variant(&self) -> Rprodis { match self.bits { - false => RPRODIS_A::VALUE1, - true => RPRODIS_A::VALUE2, + false => Rprodis::Value1, + true => Rprodis::Value2, } } #[doc = "Read protection (if installed) is not disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPRODIS_A::VALUE1 + *self == Rprodis::Value1 } #[doc = "Read and global write protection is temporarily disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPRODIS_A::VALUE2 + *self == Rprodis::Value2 } } -#[doc = "Field `WPROIN0` reader - Sector Write Protection Installed for User 0"] -pub type WPROIN0_R = crate::BitReader; #[doc = "Sector Write Protection Installed for User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROIN0_A { +pub enum Wproin0 { #[doc = "0: No write protection installed for user 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sector write protection for user 0 is configured and correctly confirmed in the User Configuration Block 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROIN0_A) -> Self { + fn from(variant: Wproin0) -> Self { variant as u8 != 0 } } -impl WPROIN0_R { +#[doc = "Field `WPROIN0` reader - Sector Write Protection Installed for User 0"] +pub type Wproin0R = crate::BitReader; +impl Wproin0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROIN0_A { + pub const fn variant(&self) -> Wproin0 { match self.bits { - false => WPROIN0_A::VALUE1, - true => WPROIN0_A::VALUE2, + false => Wproin0::Value1, + true => Wproin0::Value2, } } #[doc = "No write protection installed for user 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROIN0_A::VALUE1 + *self == Wproin0::Value1 } #[doc = "Sector write protection for user 0 is configured and correctly confirmed in the User Configuration Block 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROIN0_A::VALUE2 + *self == Wproin0::Value2 } } -#[doc = "Field `WPROIN1` reader - Sector Write Protection Installed for User 1"] -pub type WPROIN1_R = crate::BitReader; #[doc = "Sector Write Protection Installed for User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROIN1_A { +pub enum Wproin1 { #[doc = "0: No write protection installed for user 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sector write protection for user 1 is configured and correctly confirmed in the User Configuration Block 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROIN1_A) -> Self { + fn from(variant: Wproin1) -> Self { variant as u8 != 0 } } -impl WPROIN1_R { +#[doc = "Field `WPROIN1` reader - Sector Write Protection Installed for User 1"] +pub type Wproin1R = crate::BitReader; +impl Wproin1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROIN1_A { + pub const fn variant(&self) -> Wproin1 { match self.bits { - false => WPROIN1_A::VALUE1, - true => WPROIN1_A::VALUE2, + false => Wproin1::Value1, + true => Wproin1::Value2, } } #[doc = "No write protection installed for user 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROIN1_A::VALUE1 + *self == Wproin1::Value1 } #[doc = "Sector write protection for user 1 is configured and correctly confirmed in the User Configuration Block 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROIN1_A::VALUE2 + *self == Wproin1::Value2 } } -#[doc = "Field `WPROIN2` reader - Sector OTP Protection Installed for User 2"] -pub type WPROIN2_R = crate::BitReader; #[doc = "Sector OTP Protection Installed for User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPROIN2_A { +pub enum Wproin2 { #[doc = "0: No OTP write protection installed for user 2"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Sector OTP write protection with ROM functionality is configured and correctly confirmed in the UCB2. The protection is locked for ever."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPROIN2_A) -> Self { + fn from(variant: Wproin2) -> Self { variant as u8 != 0 } } -impl WPROIN2_R { +#[doc = "Field `WPROIN2` reader - Sector OTP Protection Installed for User 2"] +pub type Wproin2R = crate::BitReader; +impl Wproin2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPROIN2_A { + pub const fn variant(&self) -> Wproin2 { match self.bits { - false => WPROIN2_A::VALUE1, - true => WPROIN2_A::VALUE2, + false => Wproin2::Value1, + true => Wproin2::Value2, } } #[doc = "No OTP write protection installed for user 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPROIN2_A::VALUE1 + *self == Wproin2::Value1 } #[doc = "Sector OTP write protection with ROM functionality is configured and correctly confirmed in the UCB2. The protection is locked for ever."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPROIN2_A::VALUE2 + *self == Wproin2::Value2 } } -#[doc = "Field `WPRODIS0` reader - Sector Write Protection Disabled for User 0"] -pub type WPRODIS0_R = crate::BitReader; #[doc = "Sector Write Protection Disabled for User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPRODIS0_A { +pub enum Wprodis0 { #[doc = "0: All protected sectors of user 0 are locked if write protection is installed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: All write-protected sectors of user 0 are temporarily unlocked, if not coincidently locked by user 2 or via read protection."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPRODIS0_A) -> Self { + fn from(variant: Wprodis0) -> Self { variant as u8 != 0 } } -impl WPRODIS0_R { +#[doc = "Field `WPRODIS0` reader - Sector Write Protection Disabled for User 0"] +pub type Wprodis0R = crate::BitReader; +impl Wprodis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPRODIS0_A { + pub const fn variant(&self) -> Wprodis0 { match self.bits { - false => WPRODIS0_A::VALUE1, - true => WPRODIS0_A::VALUE2, + false => Wprodis0::Value1, + true => Wprodis0::Value2, } } #[doc = "All protected sectors of user 0 are locked if write protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPRODIS0_A::VALUE1 + *self == Wprodis0::Value1 } #[doc = "All write-protected sectors of user 0 are temporarily unlocked, if not coincidently locked by user 2 or via read protection."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPRODIS0_A::VALUE2 + *self == Wprodis0::Value2 } } -#[doc = "Field `WPRODIS1` reader - Sector Write Protection Disabled for User 1"] -pub type WPRODIS1_R = crate::BitReader; #[doc = "Sector Write Protection Disabled for User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPRODIS1_A { +pub enum Wprodis1 { #[doc = "0: All protected sectors of user 1 are locked if write protection is installed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: All write-protected sectors of user 1 are temporarily unlocked, if not coincidently locked by user 0 or user 2 or via read protection."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPRODIS1_A) -> Self { + fn from(variant: Wprodis1) -> Self { variant as u8 != 0 } } -impl WPRODIS1_R { +#[doc = "Field `WPRODIS1` reader - Sector Write Protection Disabled for User 1"] +pub type Wprodis1R = crate::BitReader; +impl Wprodis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPRODIS1_A { + pub const fn variant(&self) -> Wprodis1 { match self.bits { - false => WPRODIS1_A::VALUE1, - true => WPRODIS1_A::VALUE2, + false => Wprodis1::Value1, + true => Wprodis1::Value2, } } #[doc = "All protected sectors of user 1 are locked if write protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPRODIS1_A::VALUE1 + *self == Wprodis1::Value1 } #[doc = "All write-protected sectors of user 1 are temporarily unlocked, if not coincidently locked by user 0 or user 2 or via read protection."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPRODIS1_A::VALUE2 + *self == Wprodis1::Value2 } } -#[doc = "Field `SLM` reader - Flash Sleep Mode"] -pub type SLM_R = crate::BitReader; #[doc = "Flash Sleep Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLM_A { +pub enum Slm { #[doc = "0: Flash not in sleep mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flash is in sleep or shut down mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLM_A) -> Self { + fn from(variant: Slm) -> Self { variant as u8 != 0 } } -impl SLM_R { +#[doc = "Field `SLM` reader - Flash Sleep Mode"] +pub type SlmR = crate::BitReader; +impl SlmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLM_A { + pub const fn variant(&self) -> Slm { match self.bits { - false => SLM_A::VALUE1, - true => SLM_A::VALUE2, + false => Slm::Value1, + true => Slm::Value2, } } #[doc = "Flash not in sleep mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLM_A::VALUE1 + *self == Slm::Value1 } #[doc = "Flash is in sleep or shut down mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLM_A::VALUE2 + *self == Slm::Value2 } } -#[doc = "Field `VER` reader - Verify Error"] -pub type VER_R = crate::BitReader; #[doc = "Verify Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VER_A { +pub enum Ver { #[doc = "0: The page is correctly programmed or the sector correctly erased. All programmed or erased bits have full expected quality."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A program verify error or an erase verify error has been detected. Full quality (retention time) of all programmed (\"1\") or erased (\"0\") bits cannot be guaranteed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VER_A) -> Self { + fn from(variant: Ver) -> Self { variant as u8 != 0 } } -impl VER_R { +#[doc = "Field `VER` reader - Verify Error"] +pub type VerR = crate::BitReader; +impl VerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VER_A { + pub const fn variant(&self) -> Ver { match self.bits { - false => VER_A::VALUE1, - true => VER_A::VALUE2, + false => Ver::Value1, + true => Ver::Value2, } } #[doc = "The page is correctly programmed or the sector correctly erased. All programmed or erased bits have full expected quality."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VER_A::VALUE1 + *self == Ver::Value1 } #[doc = "A program verify error or an erase verify error has been detected. Full quality (retention time) of all programmed (\"1\") or erased (\"0\") bits cannot be guaranteed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VER_A::VALUE2 + *self == Ver::Value2 } } impl R { #[doc = "Bit 0 - Program Flash Busy"] #[inline(always)] - pub fn pbusy(&self) -> PBUSY_R { - PBUSY_R::new((self.bits & 1) != 0) + pub fn pbusy(&self) -> PbusyR { + PbusyR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Flash Array Busy"] #[inline(always)] - pub fn fabusy(&self) -> FABUSY_R { - FABUSY_R::new(((self.bits >> 1) & 1) != 0) + pub fn fabusy(&self) -> FabusyR { + FabusyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Programming State"] #[inline(always)] - pub fn prog(&self) -> PROG_R { - PROG_R::new(((self.bits >> 4) & 1) != 0) + pub fn prog(&self) -> ProgR { + ProgR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Erase State"] #[inline(always)] - pub fn erase(&self) -> ERASE_R { - ERASE_R::new(((self.bits >> 5) & 1) != 0) + pub fn erase(&self) -> EraseR { + EraseR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Program Flash in Page Mode"] #[inline(always)] - pub fn pfpage(&self) -> PFPAGE_R { - PFPAGE_R::new(((self.bits >> 6) & 1) != 0) + pub fn pfpage(&self) -> PfpageR { + PfpageR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Program Flash Operation Error"] #[inline(always)] - pub fn pfoper(&self) -> PFOPER_R { - PFOPER_R::new(((self.bits >> 8) & 1) != 0) + pub fn pfoper(&self) -> PfoperR { + PfoperR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Command Sequence Error"] #[inline(always)] - pub fn sqer(&self) -> SQER_R { - SQER_R::new(((self.bits >> 10) & 1) != 0) + pub fn sqer(&self) -> SqerR { + SqerR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Protection Error"] #[inline(always)] - pub fn proer(&self) -> PROER_R { - PROER_R::new(((self.bits >> 11) & 1) != 0) + pub fn proer(&self) -> ProerR { + ProerR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - PFLASH Single-Bit Error and Correction"] #[inline(always)] - pub fn pfsber(&self) -> PFSBER_R { - PFSBER_R::new(((self.bits >> 12) & 1) != 0) + pub fn pfsber(&self) -> PfsberR { + PfsberR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - PFLASH Double-Bit Error"] #[inline(always)] - pub fn pfdber(&self) -> PFDBER_R { - PFDBER_R::new(((self.bits >> 14) & 1) != 0) + pub fn pfdber(&self) -> PfdberR { + PfdberR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Protection Installed"] #[inline(always)] - pub fn proin(&self) -> PROIN_R { - PROIN_R::new(((self.bits >> 16) & 1) != 0) + pub fn proin(&self) -> ProinR { + ProinR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Read Protection Installed"] #[inline(always)] - pub fn rproin(&self) -> RPROIN_R { - RPROIN_R::new(((self.bits >> 18) & 1) != 0) + pub fn rproin(&self) -> RproinR { + RproinR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Read Protection Disable State"] #[inline(always)] - pub fn rprodis(&self) -> RPRODIS_R { - RPRODIS_R::new(((self.bits >> 19) & 1) != 0) + pub fn rprodis(&self) -> RprodisR { + RprodisR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - Sector Write Protection Installed for User 0"] #[inline(always)] - pub fn wproin0(&self) -> WPROIN0_R { - WPROIN0_R::new(((self.bits >> 21) & 1) != 0) + pub fn wproin0(&self) -> Wproin0R { + Wproin0R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Sector Write Protection Installed for User 1"] #[inline(always)] - pub fn wproin1(&self) -> WPROIN1_R { - WPROIN1_R::new(((self.bits >> 22) & 1) != 0) + pub fn wproin1(&self) -> Wproin1R { + Wproin1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Sector OTP Protection Installed for User 2"] #[inline(always)] - pub fn wproin2(&self) -> WPROIN2_R { - WPROIN2_R::new(((self.bits >> 23) & 1) != 0) + pub fn wproin2(&self) -> Wproin2R { + Wproin2R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 25 - Sector Write Protection Disabled for User 0"] #[inline(always)] - pub fn wprodis0(&self) -> WPRODIS0_R { - WPRODIS0_R::new(((self.bits >> 25) & 1) != 0) + pub fn wprodis0(&self) -> Wprodis0R { + Wprodis0R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Sector Write Protection Disabled for User 1"] #[inline(always)] - pub fn wprodis1(&self) -> WPRODIS1_R { - WPRODIS1_R::new(((self.bits >> 26) & 1) != 0) + pub fn wprodis1(&self) -> Wprodis1R { + Wprodis1R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - Flash Sleep Mode"] #[inline(always)] - pub fn slm(&self) -> SLM_R { - SLM_R::new(((self.bits >> 28) & 1) != 0) + pub fn slm(&self) -> SlmR { + SlmR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 31 - Verify Error"] #[inline(always)] - pub fn ver(&self) -> VER_R { - VER_R::new(((self.bits >> 31) & 1) != 0) + pub fn ver(&self) -> VerR { + VerR::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FSR_SPEC; -impl crate::RegisterSpec for FSR_SPEC { +pub struct FsrSpec; +impl crate::RegisterSpec for FsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fsr::R`](R) reader structure"] -impl crate::Readable for FSR_SPEC {} +impl crate::Readable for FsrSpec {} #[doc = "`reset()` method sets FSR to value 0"] -impl crate::Resettable for FSR_SPEC { +impl crate::Resettable for FsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/id.rs b/src/flash0/id.rs index 904cafd6..4159251e 100644 --- a/src/flash0/id.rs +++ b/src/flash0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x0092_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x0092_c000; } diff --git a/src/flash0/marp.rs b/src/flash0/marp.rs index 05f37925..4fa15eef 100644 --- a/src/flash0/marp.rs +++ b/src/flash0/marp.rs @@ -1,59 +1,59 @@ #[doc = "Register `MARP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MARP` writer"] -pub type W = crate::W; -#[doc = "Field `MARGIN` reader - PFLASH Margin Selection"] -pub type MARGIN_R = crate::FieldReader; +pub type W = crate::W; #[doc = "PFLASH Margin Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MARGIN_A { +pub enum Margin { #[doc = "0: Standard (default) margin."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] - VALUE2 = 1, + Value2 = 1, #[doc = "4: Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] - VALUE3 = 4, + Value3 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MARGIN_A) -> Self { + fn from(variant: Margin) -> Self { variant as _ } } -impl crate::FieldSpec for MARGIN_A { +impl crate::FieldSpec for Margin { type Ux = u8; } -impl MARGIN_R { +#[doc = "Field `MARGIN` reader - PFLASH Margin Selection"] +pub type MarginR = crate::FieldReader; +impl MarginR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MARGIN_A::VALUE1), - 1 => Some(MARGIN_A::VALUE2), - 4 => Some(MARGIN_A::VALUE3), + 0 => Some(Margin::Value1), + 1 => Some(Margin::Value2), + 4 => Some(Margin::Value3), _ => None, } } #[doc = "Standard (default) margin."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MARGIN_A::VALUE1 + *self == Margin::Value1 } #[doc = "Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MARGIN_A::VALUE2 + *self == Margin::Value2 } #[doc = "Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MARGIN_A::VALUE3 + *self == Margin::Value3 } } #[doc = "Field `MARGIN` writer - PFLASH Margin Selection"] -pub type MARGIN_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MARGIN_A>; -impl<'a, REG> MARGIN_W<'a, REG> +pub type MarginW<'a, REG> = crate::FieldWriter<'a, REG, 4, Margin>; +impl<'a, REG> MarginW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,121 +61,112 @@ where #[doc = "Standard (default) margin."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MARGIN_A::VALUE1) + self.variant(Margin::Value1) } #[doc = "Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MARGIN_A::VALUE2) + self.variant(Margin::Value2) } #[doc = "Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MARGIN_A::VALUE3) + self.variant(Margin::Value3) } } -#[doc = "Field `TRAPDIS` reader - PFLASH Double-Bit Error Trap Disable"] -pub type TRAPDIS_R = crate::BitReader; #[doc = "PFLASH Double-Bit Error Trap Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TRAPDIS_A { +pub enum Trapdis { #[doc = "0: If a double-bit error occurs in PFLASH, a bus error trap is generated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The double-bit error trap is disabled. Shall be used only during margin check"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TRAPDIS_A) -> Self { + fn from(variant: Trapdis) -> Self { variant as u8 != 0 } } -impl TRAPDIS_R { +#[doc = "Field `TRAPDIS` reader - PFLASH Double-Bit Error Trap Disable"] +pub type TrapdisR = crate::BitReader; +impl TrapdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRAPDIS_A { + pub const fn variant(&self) -> Trapdis { match self.bits { - false => TRAPDIS_A::VALUE1, - true => TRAPDIS_A::VALUE2, + false => Trapdis::Value1, + true => Trapdis::Value2, } } #[doc = "If a double-bit error occurs in PFLASH, a bus error trap is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRAPDIS_A::VALUE1 + *self == Trapdis::Value1 } #[doc = "The double-bit error trap is disabled. Shall be used only during margin check"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRAPDIS_A::VALUE2 + *self == Trapdis::Value2 } } #[doc = "Field `TRAPDIS` writer - PFLASH Double-Bit Error Trap Disable"] -pub type TRAPDIS_W<'a, REG> = crate::BitWriter<'a, REG, TRAPDIS_A>; -impl<'a, REG> TRAPDIS_W<'a, REG> +pub type TrapdisW<'a, REG> = crate::BitWriter<'a, REG, Trapdis>; +impl<'a, REG> TrapdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "If a double-bit error occurs in PFLASH, a bus error trap is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRAPDIS_A::VALUE1) + self.variant(Trapdis::Value1) } #[doc = "The double-bit error trap is disabled. Shall be used only during margin check"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRAPDIS_A::VALUE2) + self.variant(Trapdis::Value2) } } impl R { #[doc = "Bits 0:3 - PFLASH Margin Selection"] #[inline(always)] - pub fn margin(&self) -> MARGIN_R { - MARGIN_R::new((self.bits & 0x0f) as u8) + pub fn margin(&self) -> MarginR { + MarginR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"] #[inline(always)] - pub fn trapdis(&self) -> TRAPDIS_R { - TRAPDIS_R::new(((self.bits >> 15) & 1) != 0) + pub fn trapdis(&self) -> TrapdisR { + TrapdisR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - PFLASH Margin Selection"] #[inline(always)] #[must_use] - pub fn margin(&mut self) -> MARGIN_W { - MARGIN_W::new(self, 0) + pub fn margin(&mut self) -> MarginW { + MarginW::new(self, 0) } #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"] #[inline(always)] #[must_use] - pub fn trapdis(&mut self) -> TRAPDIS_W { - TRAPDIS_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn trapdis(&mut self) -> TrapdisW { + TrapdisW::new(self, 15) } } #[doc = "Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MARP_SPEC; -impl crate::RegisterSpec for MARP_SPEC { +pub struct MarpSpec; +impl crate::RegisterSpec for MarpSpec { type Ux = u32; } #[doc = "`read()` method returns [`marp::R`](R) reader structure"] -impl crate::Readable for MARP_SPEC {} +impl crate::Readable for MarpSpec {} #[doc = "`write(|w| ..)` method takes [`marp::W`](W) writer structure"] -impl crate::Writable for MARP_SPEC { +impl crate::Writable for MarpSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MARP to value 0"] -impl crate::Resettable for MARP_SPEC { +impl crate::Resettable for MarpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon0.rs b/src/flash0/procon0.rs index 2d5ffdbb..6df83f88 100644 --- a/src/flash0/procon0.rs +++ b/src/flash0/procon0.rs @@ -1,589 +1,589 @@ #[doc = "Register `PROCON0` reader"] -pub type R = crate::R; -#[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 0"] -pub type S0L_R = crate::BitReader; +pub type R = crate::R; #[doc = "Sector 0 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0L_A { +pub enum S0l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0L_A) -> Self { + fn from(variant: S0l) -> Self { variant as u8 != 0 } } -impl S0L_R { +#[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 0"] +pub type S0lR = crate::BitReader; +impl S0lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0L_A { + pub const fn variant(&self) -> S0l { match self.bits { - false => S0L_A::VALUE1, - true => S0L_A::VALUE2, + false => S0l::Value1, + true => S0l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0L_A::VALUE1 + *self == S0l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0L_A::VALUE2 + *self == S0l::Value2 } } -#[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 0"] -pub type S1L_R = crate::BitReader; #[doc = "Sector 1 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1L_A { +pub enum S1l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1L_A) -> Self { + fn from(variant: S1l) -> Self { variant as u8 != 0 } } -impl S1L_R { +#[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 0"] +pub type S1lR = crate::BitReader; +impl S1lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1L_A { + pub const fn variant(&self) -> S1l { match self.bits { - false => S1L_A::VALUE1, - true => S1L_A::VALUE2, + false => S1l::Value1, + true => S1l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1L_A::VALUE1 + *self == S1l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1L_A::VALUE2 + *self == S1l::Value2 } } -#[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 0"] -pub type S2L_R = crate::BitReader; #[doc = "Sector 2 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2L_A { +pub enum S2l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2L_A) -> Self { + fn from(variant: S2l) -> Self { variant as u8 != 0 } } -impl S2L_R { +#[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 0"] +pub type S2lR = crate::BitReader; +impl S2lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2L_A { + pub const fn variant(&self) -> S2l { match self.bits { - false => S2L_A::VALUE1, - true => S2L_A::VALUE2, + false => S2l::Value1, + true => S2l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2L_A::VALUE1 + *self == S2l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2L_A::VALUE2 + *self == S2l::Value2 } } -#[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 0"] -pub type S3L_R = crate::BitReader; #[doc = "Sector 3 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3L_A { +pub enum S3l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3L_A) -> Self { + fn from(variant: S3l) -> Self { variant as u8 != 0 } } -impl S3L_R { +#[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 0"] +pub type S3lR = crate::BitReader; +impl S3lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3L_A { + pub const fn variant(&self) -> S3l { match self.bits { - false => S3L_A::VALUE1, - true => S3L_A::VALUE2, + false => S3l::Value1, + true => S3l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3L_A::VALUE1 + *self == S3l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3L_A::VALUE2 + *self == S3l::Value2 } } -#[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 0"] -pub type S4L_R = crate::BitReader; #[doc = "Sector 4 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4L_A { +pub enum S4l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4L_A) -> Self { + fn from(variant: S4l) -> Self { variant as u8 != 0 } } -impl S4L_R { +#[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 0"] +pub type S4lR = crate::BitReader; +impl S4lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4L_A { + pub const fn variant(&self) -> S4l { match self.bits { - false => S4L_A::VALUE1, - true => S4L_A::VALUE2, + false => S4l::Value1, + true => S4l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4L_A::VALUE1 + *self == S4l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4L_A::VALUE2 + *self == S4l::Value2 } } -#[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 0"] -pub type S5L_R = crate::BitReader; #[doc = "Sector 5 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5L_A { +pub enum S5l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5L_A) -> Self { + fn from(variant: S5l) -> Self { variant as u8 != 0 } } -impl S5L_R { +#[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 0"] +pub type S5lR = crate::BitReader; +impl S5lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5L_A { + pub const fn variant(&self) -> S5l { match self.bits { - false => S5L_A::VALUE1, - true => S5L_A::VALUE2, + false => S5l::Value1, + true => S5l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5L_A::VALUE1 + *self == S5l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5L_A::VALUE2 + *self == S5l::Value2 } } -#[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 0"] -pub type S6L_R = crate::BitReader; #[doc = "Sector 6 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6L_A { +pub enum S6l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6L_A) -> Self { + fn from(variant: S6l) -> Self { variant as u8 != 0 } } -impl S6L_R { +#[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 0"] +pub type S6lR = crate::BitReader; +impl S6lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6L_A { + pub const fn variant(&self) -> S6l { match self.bits { - false => S6L_A::VALUE1, - true => S6L_A::VALUE2, + false => S6l::Value1, + true => S6l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6L_A::VALUE1 + *self == S6l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6L_A::VALUE2 + *self == S6l::Value2 } } -#[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 0"] -pub type S7L_R = crate::BitReader; #[doc = "Sector 7 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7L_A { +pub enum S7l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7L_A) -> Self { + fn from(variant: S7l) -> Self { variant as u8 != 0 } } -impl S7L_R { +#[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 0"] +pub type S7lR = crate::BitReader; +impl S7lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7L_A { + pub const fn variant(&self) -> S7l { match self.bits { - false => S7L_A::VALUE1, - true => S7L_A::VALUE2, + false => S7l::Value1, + true => S7l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7L_A::VALUE1 + *self == S7l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7L_A::VALUE2 + *self == S7l::Value2 } } -#[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 0"] -pub type S8L_R = crate::BitReader; #[doc = "Sector 8 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8L_A { +pub enum S8l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8L_A) -> Self { + fn from(variant: S8l) -> Self { variant as u8 != 0 } } -impl S8L_R { +#[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 0"] +pub type S8lR = crate::BitReader; +impl S8lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8L_A { + pub const fn variant(&self) -> S8l { match self.bits { - false => S8L_A::VALUE1, - true => S8L_A::VALUE2, + false => S8l::Value1, + true => S8l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8L_A::VALUE1 + *self == S8l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8L_A::VALUE2 + *self == S8l::Value2 } } -#[doc = "Field `S9L` reader - Sector 9 Locked for Write Protection by User 0"] -pub type S9L_R = crate::BitReader; #[doc = "Sector 9 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S9L_A { +pub enum S9l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S9L_A) -> Self { + fn from(variant: S9l) -> Self { variant as u8 != 0 } } -impl S9L_R { +#[doc = "Field `S9L` reader - Sector 9 Locked for Write Protection by User 0"] +pub type S9lR = crate::BitReader; +impl S9lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S9L_A { + pub const fn variant(&self) -> S9l { match self.bits { - false => S9L_A::VALUE1, - true => S9L_A::VALUE2, + false => S9l::Value1, + true => S9l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S9L_A::VALUE1 + *self == S9l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S9L_A::VALUE2 + *self == S9l::Value2 } } -#[doc = "Field `S10_S11L` reader - Sectors 10 and 11 Locked for Write Protection by User 0"] -pub type S10_S11L_R = crate::BitReader; #[doc = "Sectors 10 and 11 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S10_S11L_A { +pub enum S10S11l { #[doc = "0: No write protection is configured for sectors 10+11."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 10+11."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S10_S11L_A) -> Self { + fn from(variant: S10S11l) -> Self { variant as u8 != 0 } } -impl S10_S11L_R { +#[doc = "Field `S10_S11L` reader - Sectors 10 and 11 Locked for Write Protection by User 0"] +pub type S10S11lR = crate::BitReader; +impl S10S11lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S10_S11L_A { + pub const fn variant(&self) -> S10S11l { match self.bits { - false => S10_S11L_A::VALUE1, - true => S10_S11L_A::VALUE2, + false => S10S11l::Value1, + true => S10S11l::Value2, } } #[doc = "No write protection is configured for sectors 10+11."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S10_S11L_A::VALUE1 + *self == S10S11l::Value1 } #[doc = "Write protection is configured for sectors 10+11."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S10_S11L_A::VALUE2 + *self == S10S11l::Value2 } } -#[doc = "Field `S12_S13L` reader - Sectors 12 and 13 Locked for Write Protection by User 0"] -pub type S12_S13L_R = crate::BitReader; #[doc = "Sectors 12 and 13 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S12_S13L_A { +pub enum S12S13l { #[doc = "0: No write protection is configured for sectors 12+13."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 12+13."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S12_S13L_A) -> Self { + fn from(variant: S12S13l) -> Self { variant as u8 != 0 } } -impl S12_S13L_R { +#[doc = "Field `S12_S13L` reader - Sectors 12 and 13 Locked for Write Protection by User 0"] +pub type S12S13lR = crate::BitReader; +impl S12S13lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S12_S13L_A { + pub const fn variant(&self) -> S12S13l { match self.bits { - false => S12_S13L_A::VALUE1, - true => S12_S13L_A::VALUE2, + false => S12S13l::Value1, + true => S12S13l::Value2, } } #[doc = "No write protection is configured for sectors 12+13."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S12_S13L_A::VALUE1 + *self == S12S13l::Value1 } #[doc = "Write protection is configured for sectors 12+13."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S12_S13L_A::VALUE2 + *self == S12S13l::Value2 } } -#[doc = "Field `S14_S15L` reader - Sectors 14 and 15 Locked for Write Protection by User 0"] -pub type S14_S15L_R = crate::BitReader; #[doc = "Sectors 14 and 15 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S14_S15L_A { +pub enum S14S15l { #[doc = "0: No write protection is configured for sectors 14+15."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 14+15."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S14_S15L_A) -> Self { + fn from(variant: S14S15l) -> Self { variant as u8 != 0 } } -impl S14_S15L_R { +#[doc = "Field `S14_S15L` reader - Sectors 14 and 15 Locked for Write Protection by User 0"] +pub type S14S15lR = crate::BitReader; +impl S14S15lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S14_S15L_A { + pub const fn variant(&self) -> S14S15l { match self.bits { - false => S14_S15L_A::VALUE1, - true => S14_S15L_A::VALUE2, + false => S14S15l::Value1, + true => S14S15l::Value2, } } #[doc = "No write protection is configured for sectors 14+15."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S14_S15L_A::VALUE1 + *self == S14S15l::Value1 } #[doc = "Write protection is configured for sectors 14+15."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S14_S15L_A::VALUE2 + *self == S14S15l::Value2 } } -#[doc = "Field `RPRO` reader - Read Protection Configuration"] -pub type RPRO_R = crate::BitReader; #[doc = "Read Protection Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPRO_A { +pub enum Rpro { #[doc = "0: No read protection configured"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read protection and global write protection is configured by user 0 (master user)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPRO_A) -> Self { + fn from(variant: Rpro) -> Self { variant as u8 != 0 } } -impl RPRO_R { +#[doc = "Field `RPRO` reader - Read Protection Configuration"] +pub type RproR = crate::BitReader; +impl RproR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPRO_A { + pub const fn variant(&self) -> Rpro { match self.bits { - false => RPRO_A::VALUE1, - true => RPRO_A::VALUE2, + false => Rpro::Value1, + true => Rpro::Value2, } } #[doc = "No read protection configured"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPRO_A::VALUE1 + *self == Rpro::Value1 } #[doc = "Read protection and global write protection is configured by user 0 (master user)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPRO_A::VALUE2 + *self == Rpro::Value2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s0l(&self) -> S0L_R { - S0L_R::new((self.bits & 1) != 0) + pub fn s0l(&self) -> S0lR { + S0lR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s1l(&self) -> S1L_R { - S1L_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1l(&self) -> S1lR { + S1lR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s2l(&self) -> S2L_R { - S2L_R::new(((self.bits >> 2) & 1) != 0) + pub fn s2l(&self) -> S2lR { + S2lR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s3l(&self) -> S3L_R { - S3L_R::new(((self.bits >> 3) & 1) != 0) + pub fn s3l(&self) -> S3lR { + S3lR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s4l(&self) -> S4L_R { - S4L_R::new(((self.bits >> 4) & 1) != 0) + pub fn s4l(&self) -> S4lR { + S4lR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s5l(&self) -> S5L_R { - S5L_R::new(((self.bits >> 5) & 1) != 0) + pub fn s5l(&self) -> S5lR { + S5lR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s6l(&self) -> S6L_R { - S6L_R::new(((self.bits >> 6) & 1) != 0) + pub fn s6l(&self) -> S6lR { + S6lR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s7l(&self) -> S7L_R { - S7L_R::new(((self.bits >> 7) & 1) != 0) + pub fn s7l(&self) -> S7lR { + S7lR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s8l(&self) -> S8L_R { - S8L_R::new(((self.bits >> 8) & 1) != 0) + pub fn s8l(&self) -> S8lR { + S8lR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sector 9 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s9l(&self) -> S9L_R { - S9L_R::new(((self.bits >> 9) & 1) != 0) + pub fn s9l(&self) -> S9lR { + S9lR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Sectors 10 and 11 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s10_s11l(&self) -> S10_S11L_R { - S10_S11L_R::new(((self.bits >> 10) & 1) != 0) + pub fn s10_s11l(&self) -> S10S11lR { + S10S11lR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Sectors 12 and 13 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s12_s13l(&self) -> S12_S13L_R { - S12_S13L_R::new(((self.bits >> 11) & 1) != 0) + pub fn s12_s13l(&self) -> S12S13lR { + S12S13lR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Sectors 14 and 15 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s14_s15l(&self) -> S14_S15L_R { - S14_S15L_R::new(((self.bits >> 12) & 1) != 0) + pub fn s14_s15l(&self) -> S14S15lR { + S14S15lR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 15 - Read Protection Configuration"] #[inline(always)] - pub fn rpro(&self) -> RPRO_R { - RPRO_R::new(((self.bits >> 15) & 1) != 0) + pub fn rpro(&self) -> RproR { + RproR::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PROCON0_SPEC; -impl crate::RegisterSpec for PROCON0_SPEC { +pub struct Procon0Spec; +impl crate::RegisterSpec for Procon0Spec { type Ux = u32; } #[doc = "`read()` method returns [`procon0::R`](R) reader structure"] -impl crate::Readable for PROCON0_SPEC {} +impl crate::Readable for Procon0Spec {} #[doc = "`reset()` method sets PROCON0 to value 0"] -impl crate::Resettable for PROCON0_SPEC { +impl crate::Resettable for Procon0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon1.rs b/src/flash0/procon1.rs index e2fc589e..752758d1 100644 --- a/src/flash0/procon1.rs +++ b/src/flash0/procon1.rs @@ -1,589 +1,589 @@ #[doc = "Register `PROCON1` reader"] -pub type R = crate::R; -#[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 1"] -pub type S0L_R = crate::BitReader; +pub type R = crate::R; #[doc = "Sector 0 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0L_A { +pub enum S0l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0L_A) -> Self { + fn from(variant: S0l) -> Self { variant as u8 != 0 } } -impl S0L_R { +#[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 1"] +pub type S0lR = crate::BitReader; +impl S0lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0L_A { + pub const fn variant(&self) -> S0l { match self.bits { - false => S0L_A::VALUE1, - true => S0L_A::VALUE2, + false => S0l::Value1, + true => S0l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0L_A::VALUE1 + *self == S0l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0L_A::VALUE2 + *self == S0l::Value2 } } -#[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 1"] -pub type S1L_R = crate::BitReader; #[doc = "Sector 1 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1L_A { +pub enum S1l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1L_A) -> Self { + fn from(variant: S1l) -> Self { variant as u8 != 0 } } -impl S1L_R { +#[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 1"] +pub type S1lR = crate::BitReader; +impl S1lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1L_A { + pub const fn variant(&self) -> S1l { match self.bits { - false => S1L_A::VALUE1, - true => S1L_A::VALUE2, + false => S1l::Value1, + true => S1l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1L_A::VALUE1 + *self == S1l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1L_A::VALUE2 + *self == S1l::Value2 } } -#[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 1"] -pub type S2L_R = crate::BitReader; #[doc = "Sector 2 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2L_A { +pub enum S2l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2L_A) -> Self { + fn from(variant: S2l) -> Self { variant as u8 != 0 } } -impl S2L_R { +#[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 1"] +pub type S2lR = crate::BitReader; +impl S2lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2L_A { + pub const fn variant(&self) -> S2l { match self.bits { - false => S2L_A::VALUE1, - true => S2L_A::VALUE2, + false => S2l::Value1, + true => S2l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2L_A::VALUE1 + *self == S2l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2L_A::VALUE2 + *self == S2l::Value2 } } -#[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 1"] -pub type S3L_R = crate::BitReader; #[doc = "Sector 3 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3L_A { +pub enum S3l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3L_A) -> Self { + fn from(variant: S3l) -> Self { variant as u8 != 0 } } -impl S3L_R { +#[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 1"] +pub type S3lR = crate::BitReader; +impl S3lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3L_A { + pub const fn variant(&self) -> S3l { match self.bits { - false => S3L_A::VALUE1, - true => S3L_A::VALUE2, + false => S3l::Value1, + true => S3l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3L_A::VALUE1 + *self == S3l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3L_A::VALUE2 + *self == S3l::Value2 } } -#[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 1"] -pub type S4L_R = crate::BitReader; #[doc = "Sector 4 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4L_A { +pub enum S4l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4L_A) -> Self { + fn from(variant: S4l) -> Self { variant as u8 != 0 } } -impl S4L_R { +#[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 1"] +pub type S4lR = crate::BitReader; +impl S4lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4L_A { + pub const fn variant(&self) -> S4l { match self.bits { - false => S4L_A::VALUE1, - true => S4L_A::VALUE2, + false => S4l::Value1, + true => S4l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4L_A::VALUE1 + *self == S4l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4L_A::VALUE2 + *self == S4l::Value2 } } -#[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 1"] -pub type S5L_R = crate::BitReader; #[doc = "Sector 5 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5L_A { +pub enum S5l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5L_A) -> Self { + fn from(variant: S5l) -> Self { variant as u8 != 0 } } -impl S5L_R { +#[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 1"] +pub type S5lR = crate::BitReader; +impl S5lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5L_A { + pub const fn variant(&self) -> S5l { match self.bits { - false => S5L_A::VALUE1, - true => S5L_A::VALUE2, + false => S5l::Value1, + true => S5l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5L_A::VALUE1 + *self == S5l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5L_A::VALUE2 + *self == S5l::Value2 } } -#[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 1"] -pub type S6L_R = crate::BitReader; #[doc = "Sector 6 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6L_A { +pub enum S6l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6L_A) -> Self { + fn from(variant: S6l) -> Self { variant as u8 != 0 } } -impl S6L_R { +#[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 1"] +pub type S6lR = crate::BitReader; +impl S6lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6L_A { + pub const fn variant(&self) -> S6l { match self.bits { - false => S6L_A::VALUE1, - true => S6L_A::VALUE2, + false => S6l::Value1, + true => S6l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6L_A::VALUE1 + *self == S6l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6L_A::VALUE2 + *self == S6l::Value2 } } -#[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 1"] -pub type S7L_R = crate::BitReader; #[doc = "Sector 7 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7L_A { +pub enum S7l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7L_A) -> Self { + fn from(variant: S7l) -> Self { variant as u8 != 0 } } -impl S7L_R { +#[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 1"] +pub type S7lR = crate::BitReader; +impl S7lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7L_A { + pub const fn variant(&self) -> S7l { match self.bits { - false => S7L_A::VALUE1, - true => S7L_A::VALUE2, + false => S7l::Value1, + true => S7l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7L_A::VALUE1 + *self == S7l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7L_A::VALUE2 + *self == S7l::Value2 } } -#[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 1"] -pub type S8L_R = crate::BitReader; #[doc = "Sector 8 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8L_A { +pub enum S8l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8L_A) -> Self { + fn from(variant: S8l) -> Self { variant as u8 != 0 } } -impl S8L_R { +#[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 1"] +pub type S8lR = crate::BitReader; +impl S8lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8L_A { + pub const fn variant(&self) -> S8l { match self.bits { - false => S8L_A::VALUE1, - true => S8L_A::VALUE2, + false => S8l::Value1, + true => S8l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8L_A::VALUE1 + *self == S8l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8L_A::VALUE2 + *self == S8l::Value2 } } -#[doc = "Field `S9L` reader - Sector 9 Locked for Write Protection by User 1"] -pub type S9L_R = crate::BitReader; #[doc = "Sector 9 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S9L_A { +pub enum S9l { #[doc = "0: No write protection is configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sector n."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S9L_A) -> Self { + fn from(variant: S9l) -> Self { variant as u8 != 0 } } -impl S9L_R { +#[doc = "Field `S9L` reader - Sector 9 Locked for Write Protection by User 1"] +pub type S9lR = crate::BitReader; +impl S9lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S9L_A { + pub const fn variant(&self) -> S9l { match self.bits { - false => S9L_A::VALUE1, - true => S9L_A::VALUE2, + false => S9l::Value1, + true => S9l::Value2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S9L_A::VALUE1 + *self == S9l::Value1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S9L_A::VALUE2 + *self == S9l::Value2 } } -#[doc = "Field `S10_S11L` reader - Sectors 10 and 11 Locked for Write Protection by User 1"] -pub type S10_S11L_R = crate::BitReader; #[doc = "Sectors 10 and 11 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S10_S11L_A { +pub enum S10S11l { #[doc = "0: No write protection is configured for sectors 10+11."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 10+11."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S10_S11L_A) -> Self { + fn from(variant: S10S11l) -> Self { variant as u8 != 0 } } -impl S10_S11L_R { +#[doc = "Field `S10_S11L` reader - Sectors 10 and 11 Locked for Write Protection by User 1"] +pub type S10S11lR = crate::BitReader; +impl S10S11lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S10_S11L_A { + pub const fn variant(&self) -> S10S11l { match self.bits { - false => S10_S11L_A::VALUE1, - true => S10_S11L_A::VALUE2, + false => S10S11l::Value1, + true => S10S11l::Value2, } } #[doc = "No write protection is configured for sectors 10+11."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S10_S11L_A::VALUE1 + *self == S10S11l::Value1 } #[doc = "Write protection is configured for sectors 10+11."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S10_S11L_A::VALUE2 + *self == S10S11l::Value2 } } -#[doc = "Field `S12_S13L` reader - Sectors 12 and 13 Locked for Write Protection by User 1"] -pub type S12_S13L_R = crate::BitReader; #[doc = "Sectors 12 and 13 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S12_S13L_A { +pub enum S12S13l { #[doc = "0: No write protection is configured for sectors 12+13."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 12+13."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S12_S13L_A) -> Self { + fn from(variant: S12S13l) -> Self { variant as u8 != 0 } } -impl S12_S13L_R { +#[doc = "Field `S12_S13L` reader - Sectors 12 and 13 Locked for Write Protection by User 1"] +pub type S12S13lR = crate::BitReader; +impl S12S13lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S12_S13L_A { + pub const fn variant(&self) -> S12S13l { match self.bits { - false => S12_S13L_A::VALUE1, - true => S12_S13L_A::VALUE2, + false => S12S13l::Value1, + true => S12S13l::Value2, } } #[doc = "No write protection is configured for sectors 12+13."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S12_S13L_A::VALUE1 + *self == S12S13l::Value1 } #[doc = "Write protection is configured for sectors 12+13."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S12_S13L_A::VALUE2 + *self == S12S13l::Value2 } } -#[doc = "Field `S14_S15L` reader - Sectors 14 and 15 Locked for Write Protection by User 1"] -pub type S14_S15L_R = crate::BitReader; #[doc = "Sectors 14 and 15 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S14_S15L_A { +pub enum S14S15l { #[doc = "0: No write protection is configured for sectors 14+15."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection is configured for sectors 14+15."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S14_S15L_A) -> Self { + fn from(variant: S14S15l) -> Self { variant as u8 != 0 } } -impl S14_S15L_R { +#[doc = "Field `S14_S15L` reader - Sectors 14 and 15 Locked for Write Protection by User 1"] +pub type S14S15lR = crate::BitReader; +impl S14S15lR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S14_S15L_A { + pub const fn variant(&self) -> S14S15l { match self.bits { - false => S14_S15L_A::VALUE1, - true => S14_S15L_A::VALUE2, + false => S14S15l::Value1, + true => S14S15l::Value2, } } #[doc = "No write protection is configured for sectors 14+15."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S14_S15L_A::VALUE1 + *self == S14S15l::Value1 } #[doc = "Write protection is configured for sectors 14+15."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S14_S15L_A::VALUE2 + *self == S14S15l::Value2 } } -#[doc = "Field `PSR` reader - Physical Sector Repair"] -pub type PSR_R = crate::BitReader; #[doc = "Physical Sector Repair\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PSR_A { +pub enum Psr { #[doc = "0: Physical Sector Repair command disabled; Erase Physical Sector command sequence available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Physical Sector Repair command sequence enabled; Erase Physical Sector command sequence disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PSR_A) -> Self { + fn from(variant: Psr) -> Self { variant as u8 != 0 } } -impl PSR_R { +#[doc = "Field `PSR` reader - Physical Sector Repair"] +pub type PsrR = crate::BitReader; +impl PsrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PSR_A { + pub const fn variant(&self) -> Psr { match self.bits { - false => PSR_A::VALUE1, - true => PSR_A::VALUE2, + false => Psr::Value1, + true => Psr::Value2, } } #[doc = "Physical Sector Repair command disabled; Erase Physical Sector command sequence available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PSR_A::VALUE1 + *self == Psr::Value1 } #[doc = "Physical Sector Repair command sequence enabled; Erase Physical Sector command sequence disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PSR_A::VALUE2 + *self == Psr::Value2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s0l(&self) -> S0L_R { - S0L_R::new((self.bits & 1) != 0) + pub fn s0l(&self) -> S0lR { + S0lR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s1l(&self) -> S1L_R { - S1L_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1l(&self) -> S1lR { + S1lR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s2l(&self) -> S2L_R { - S2L_R::new(((self.bits >> 2) & 1) != 0) + pub fn s2l(&self) -> S2lR { + S2lR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s3l(&self) -> S3L_R { - S3L_R::new(((self.bits >> 3) & 1) != 0) + pub fn s3l(&self) -> S3lR { + S3lR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s4l(&self) -> S4L_R { - S4L_R::new(((self.bits >> 4) & 1) != 0) + pub fn s4l(&self) -> S4lR { + S4lR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s5l(&self) -> S5L_R { - S5L_R::new(((self.bits >> 5) & 1) != 0) + pub fn s5l(&self) -> S5lR { + S5lR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s6l(&self) -> S6L_R { - S6L_R::new(((self.bits >> 6) & 1) != 0) + pub fn s6l(&self) -> S6lR { + S6lR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s7l(&self) -> S7L_R { - S7L_R::new(((self.bits >> 7) & 1) != 0) + pub fn s7l(&self) -> S7lR { + S7lR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s8l(&self) -> S8L_R { - S8L_R::new(((self.bits >> 8) & 1) != 0) + pub fn s8l(&self) -> S8lR { + S8lR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sector 9 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s9l(&self) -> S9L_R { - S9L_R::new(((self.bits >> 9) & 1) != 0) + pub fn s9l(&self) -> S9lR { + S9lR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Sectors 10 and 11 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s10_s11l(&self) -> S10_S11L_R { - S10_S11L_R::new(((self.bits >> 10) & 1) != 0) + pub fn s10_s11l(&self) -> S10S11lR { + S10S11lR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Sectors 12 and 13 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s12_s13l(&self) -> S12_S13L_R { - S12_S13L_R::new(((self.bits >> 11) & 1) != 0) + pub fn s12_s13l(&self) -> S12S13lR { + S12S13lR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Sectors 14 and 15 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s14_s15l(&self) -> S14_S15L_R { - S14_S15L_R::new(((self.bits >> 12) & 1) != 0) + pub fn s14_s15l(&self) -> S14S15lR { + S14S15lR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 16 - Physical Sector Repair"] #[inline(always)] - pub fn psr(&self) -> PSR_R { - PSR_R::new(((self.bits >> 16) & 1) != 0) + pub fn psr(&self) -> PsrR { + PsrR::new(((self.bits >> 16) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PROCON1_SPEC; -impl crate::RegisterSpec for PROCON1_SPEC { +pub struct Procon1Spec; +impl crate::RegisterSpec for Procon1Spec { type Ux = u32; } #[doc = "`read()` method returns [`procon1::R`](R) reader structure"] -impl crate::Readable for PROCON1_SPEC {} +impl crate::Readable for Procon1Spec {} #[doc = "`reset()` method sets PROCON1 to value 0"] -impl crate::Resettable for PROCON1_SPEC { +impl crate::Resettable for Procon1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon2.rs b/src/flash0/procon2.rs index f37bfdd0..f5ca7931 100644 --- a/src/flash0/procon2.rs +++ b/src/flash0/procon2.rs @@ -1,548 +1,548 @@ #[doc = "Register `PROCON2` reader"] -pub type R = crate::R; -#[doc = "Field `S0ROM` reader - Sector 0 Locked Forever by User 2"] -pub type S0ROM_R = crate::BitReader; +pub type R = crate::R; #[doc = "Sector 0 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0ROM_A { +pub enum S0rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0ROM_A) -> Self { + fn from(variant: S0rom) -> Self { variant as u8 != 0 } } -impl S0ROM_R { +#[doc = "Field `S0ROM` reader - Sector 0 Locked Forever by User 2"] +pub type S0romR = crate::BitReader; +impl S0romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0ROM_A { + pub const fn variant(&self) -> S0rom { match self.bits { - false => S0ROM_A::VALUE1, - true => S0ROM_A::VALUE2, + false => S0rom::Value1, + true => S0rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0ROM_A::VALUE1 + *self == S0rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0ROM_A::VALUE2 + *self == S0rom::Value2 } } -#[doc = "Field `S1ROM` reader - Sector 1 Locked Forever by User 2"] -pub type S1ROM_R = crate::BitReader; #[doc = "Sector 1 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1ROM_A { +pub enum S1rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1ROM_A) -> Self { + fn from(variant: S1rom) -> Self { variant as u8 != 0 } } -impl S1ROM_R { +#[doc = "Field `S1ROM` reader - Sector 1 Locked Forever by User 2"] +pub type S1romR = crate::BitReader; +impl S1romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1ROM_A { + pub const fn variant(&self) -> S1rom { match self.bits { - false => S1ROM_A::VALUE1, - true => S1ROM_A::VALUE2, + false => S1rom::Value1, + true => S1rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1ROM_A::VALUE1 + *self == S1rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1ROM_A::VALUE2 + *self == S1rom::Value2 } } -#[doc = "Field `S2ROM` reader - Sector 2 Locked Forever by User 2"] -pub type S2ROM_R = crate::BitReader; #[doc = "Sector 2 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2ROM_A { +pub enum S2rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2ROM_A) -> Self { + fn from(variant: S2rom) -> Self { variant as u8 != 0 } } -impl S2ROM_R { +#[doc = "Field `S2ROM` reader - Sector 2 Locked Forever by User 2"] +pub type S2romR = crate::BitReader; +impl S2romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2ROM_A { + pub const fn variant(&self) -> S2rom { match self.bits { - false => S2ROM_A::VALUE1, - true => S2ROM_A::VALUE2, + false => S2rom::Value1, + true => S2rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2ROM_A::VALUE1 + *self == S2rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2ROM_A::VALUE2 + *self == S2rom::Value2 } } -#[doc = "Field `S3ROM` reader - Sector 3 Locked Forever by User 2"] -pub type S3ROM_R = crate::BitReader; #[doc = "Sector 3 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3ROM_A { +pub enum S3rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3ROM_A) -> Self { + fn from(variant: S3rom) -> Self { variant as u8 != 0 } } -impl S3ROM_R { +#[doc = "Field `S3ROM` reader - Sector 3 Locked Forever by User 2"] +pub type S3romR = crate::BitReader; +impl S3romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3ROM_A { + pub const fn variant(&self) -> S3rom { match self.bits { - false => S3ROM_A::VALUE1, - true => S3ROM_A::VALUE2, + false => S3rom::Value1, + true => S3rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3ROM_A::VALUE1 + *self == S3rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3ROM_A::VALUE2 + *self == S3rom::Value2 } } -#[doc = "Field `S4ROM` reader - Sector 4 Locked Forever by User 2"] -pub type S4ROM_R = crate::BitReader; #[doc = "Sector 4 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4ROM_A { +pub enum S4rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4ROM_A) -> Self { + fn from(variant: S4rom) -> Self { variant as u8 != 0 } } -impl S4ROM_R { +#[doc = "Field `S4ROM` reader - Sector 4 Locked Forever by User 2"] +pub type S4romR = crate::BitReader; +impl S4romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4ROM_A { + pub const fn variant(&self) -> S4rom { match self.bits { - false => S4ROM_A::VALUE1, - true => S4ROM_A::VALUE2, + false => S4rom::Value1, + true => S4rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4ROM_A::VALUE1 + *self == S4rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4ROM_A::VALUE2 + *self == S4rom::Value2 } } -#[doc = "Field `S5ROM` reader - Sector 5 Locked Forever by User 2"] -pub type S5ROM_R = crate::BitReader; #[doc = "Sector 5 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5ROM_A { +pub enum S5rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5ROM_A) -> Self { + fn from(variant: S5rom) -> Self { variant as u8 != 0 } } -impl S5ROM_R { +#[doc = "Field `S5ROM` reader - Sector 5 Locked Forever by User 2"] +pub type S5romR = crate::BitReader; +impl S5romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5ROM_A { + pub const fn variant(&self) -> S5rom { match self.bits { - false => S5ROM_A::VALUE1, - true => S5ROM_A::VALUE2, + false => S5rom::Value1, + true => S5rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5ROM_A::VALUE1 + *self == S5rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5ROM_A::VALUE2 + *self == S5rom::Value2 } } -#[doc = "Field `S6ROM` reader - Sector 6 Locked Forever by User 2"] -pub type S6ROM_R = crate::BitReader; #[doc = "Sector 6 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6ROM_A { +pub enum S6rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6ROM_A) -> Self { + fn from(variant: S6rom) -> Self { variant as u8 != 0 } } -impl S6ROM_R { +#[doc = "Field `S6ROM` reader - Sector 6 Locked Forever by User 2"] +pub type S6romR = crate::BitReader; +impl S6romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6ROM_A { + pub const fn variant(&self) -> S6rom { match self.bits { - false => S6ROM_A::VALUE1, - true => S6ROM_A::VALUE2, + false => S6rom::Value1, + true => S6rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6ROM_A::VALUE1 + *self == S6rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6ROM_A::VALUE2 + *self == S6rom::Value2 } } -#[doc = "Field `S7ROM` reader - Sector 7 Locked Forever by User 2"] -pub type S7ROM_R = crate::BitReader; #[doc = "Sector 7 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7ROM_A { +pub enum S7rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7ROM_A) -> Self { + fn from(variant: S7rom) -> Self { variant as u8 != 0 } } -impl S7ROM_R { +#[doc = "Field `S7ROM` reader - Sector 7 Locked Forever by User 2"] +pub type S7romR = crate::BitReader; +impl S7romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7ROM_A { + pub const fn variant(&self) -> S7rom { match self.bits { - false => S7ROM_A::VALUE1, - true => S7ROM_A::VALUE2, + false => S7rom::Value1, + true => S7rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7ROM_A::VALUE1 + *self == S7rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7ROM_A::VALUE2 + *self == S7rom::Value2 } } -#[doc = "Field `S8ROM` reader - Sector 8 Locked Forever by User 2"] -pub type S8ROM_R = crate::BitReader; #[doc = "Sector 8 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8ROM_A { +pub enum S8rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8ROM_A) -> Self { + fn from(variant: S8rom) -> Self { variant as u8 != 0 } } -impl S8ROM_R { +#[doc = "Field `S8ROM` reader - Sector 8 Locked Forever by User 2"] +pub type S8romR = crate::BitReader; +impl S8romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8ROM_A { + pub const fn variant(&self) -> S8rom { match self.bits { - false => S8ROM_A::VALUE1, - true => S8ROM_A::VALUE2, + false => S8rom::Value1, + true => S8rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8ROM_A::VALUE1 + *self == S8rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8ROM_A::VALUE2 + *self == S8rom::Value2 } } -#[doc = "Field `S9ROM` reader - Sector 9 Locked Forever by User 2"] -pub type S9ROM_R = crate::BitReader; #[doc = "Sector 9 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S9ROM_A { +pub enum S9rom { #[doc = "0: No ROM functionality configured for sector n."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S9ROM_A) -> Self { + fn from(variant: S9rom) -> Self { variant as u8 != 0 } } -impl S9ROM_R { +#[doc = "Field `S9ROM` reader - Sector 9 Locked Forever by User 2"] +pub type S9romR = crate::BitReader; +impl S9romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S9ROM_A { + pub const fn variant(&self) -> S9rom { match self.bits { - false => S9ROM_A::VALUE1, - true => S9ROM_A::VALUE2, + false => S9rom::Value1, + true => S9rom::Value2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S9ROM_A::VALUE1 + *self == S9rom::Value1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S9ROM_A::VALUE2 + *self == S9rom::Value2 } } -#[doc = "Field `S10_S11ROM` reader - Sectors 10 and 11 Locked Forever by User 2"] -pub type S10_S11ROM_R = crate::BitReader; #[doc = "Sectors 10 and 11 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S10_S11ROM_A { +pub enum S10S11rom { #[doc = "0: No ROM functionality is configured for sectors 10+11."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sectors 10+11."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S10_S11ROM_A) -> Self { + fn from(variant: S10S11rom) -> Self { variant as u8 != 0 } } -impl S10_S11ROM_R { +#[doc = "Field `S10_S11ROM` reader - Sectors 10 and 11 Locked Forever by User 2"] +pub type S10S11romR = crate::BitReader; +impl S10S11romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S10_S11ROM_A { + pub const fn variant(&self) -> S10S11rom { match self.bits { - false => S10_S11ROM_A::VALUE1, - true => S10_S11ROM_A::VALUE2, + false => S10S11rom::Value1, + true => S10S11rom::Value2, } } #[doc = "No ROM functionality is configured for sectors 10+11."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S10_S11ROM_A::VALUE1 + *self == S10S11rom::Value1 } #[doc = "ROM functionality is configured for sectors 10+11."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S10_S11ROM_A::VALUE2 + *self == S10S11rom::Value2 } } -#[doc = "Field `S12_S13ROM` reader - Sectors 12 and 13 Locked Forever by User 2"] -pub type S12_S13ROM_R = crate::BitReader; #[doc = "Sectors 12 and 13 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S12_S13ROM_A { +pub enum S12S13rom { #[doc = "0: No ROM functionality is configured for sectors 12+13."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sectors 12+13."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S12_S13ROM_A) -> Self { + fn from(variant: S12S13rom) -> Self { variant as u8 != 0 } } -impl S12_S13ROM_R { +#[doc = "Field `S12_S13ROM` reader - Sectors 12 and 13 Locked Forever by User 2"] +pub type S12S13romR = crate::BitReader; +impl S12S13romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S12_S13ROM_A { + pub const fn variant(&self) -> S12S13rom { match self.bits { - false => S12_S13ROM_A::VALUE1, - true => S12_S13ROM_A::VALUE2, + false => S12S13rom::Value1, + true => S12S13rom::Value2, } } #[doc = "No ROM functionality is configured for sectors 12+13."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S12_S13ROM_A::VALUE1 + *self == S12S13rom::Value1 } #[doc = "ROM functionality is configured for sectors 12+13."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S12_S13ROM_A::VALUE2 + *self == S12S13rom::Value2 } } -#[doc = "Field `S14_S15ROM` reader - Sectors 14 and 15 Locked Forever by User 2"] -pub type S14_S15ROM_R = crate::BitReader; #[doc = "Sectors 14 and 15 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S14_S15ROM_A { +pub enum S14S15rom { #[doc = "0: No ROM functionality is configured for sectors 14+15."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ROM functionality is configured for sectors 14+15."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S14_S15ROM_A) -> Self { + fn from(variant: S14S15rom) -> Self { variant as u8 != 0 } } -impl S14_S15ROM_R { +#[doc = "Field `S14_S15ROM` reader - Sectors 14 and 15 Locked Forever by User 2"] +pub type S14S15romR = crate::BitReader; +impl S14S15romR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S14_S15ROM_A { + pub const fn variant(&self) -> S14S15rom { match self.bits { - false => S14_S15ROM_A::VALUE1, - true => S14_S15ROM_A::VALUE2, + false => S14S15rom::Value1, + true => S14S15rom::Value2, } } #[doc = "No ROM functionality is configured for sectors 14+15."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S14_S15ROM_A::VALUE1 + *self == S14S15rom::Value1 } #[doc = "ROM functionality is configured for sectors 14+15."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S14_S15ROM_A::VALUE2 + *self == S14S15rom::Value2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked Forever by User 2"] #[inline(always)] - pub fn s0rom(&self) -> S0ROM_R { - S0ROM_R::new((self.bits & 1) != 0) + pub fn s0rom(&self) -> S0romR { + S0romR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked Forever by User 2"] #[inline(always)] - pub fn s1rom(&self) -> S1ROM_R { - S1ROM_R::new(((self.bits >> 1) & 1) != 0) + pub fn s1rom(&self) -> S1romR { + S1romR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked Forever by User 2"] #[inline(always)] - pub fn s2rom(&self) -> S2ROM_R { - S2ROM_R::new(((self.bits >> 2) & 1) != 0) + pub fn s2rom(&self) -> S2romR { + S2romR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked Forever by User 2"] #[inline(always)] - pub fn s3rom(&self) -> S3ROM_R { - S3ROM_R::new(((self.bits >> 3) & 1) != 0) + pub fn s3rom(&self) -> S3romR { + S3romR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked Forever by User 2"] #[inline(always)] - pub fn s4rom(&self) -> S4ROM_R { - S4ROM_R::new(((self.bits >> 4) & 1) != 0) + pub fn s4rom(&self) -> S4romR { + S4romR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked Forever by User 2"] #[inline(always)] - pub fn s5rom(&self) -> S5ROM_R { - S5ROM_R::new(((self.bits >> 5) & 1) != 0) + pub fn s5rom(&self) -> S5romR { + S5romR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked Forever by User 2"] #[inline(always)] - pub fn s6rom(&self) -> S6ROM_R { - S6ROM_R::new(((self.bits >> 6) & 1) != 0) + pub fn s6rom(&self) -> S6romR { + S6romR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked Forever by User 2"] #[inline(always)] - pub fn s7rom(&self) -> S7ROM_R { - S7ROM_R::new(((self.bits >> 7) & 1) != 0) + pub fn s7rom(&self) -> S7romR { + S7romR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked Forever by User 2"] #[inline(always)] - pub fn s8rom(&self) -> S8ROM_R { - S8ROM_R::new(((self.bits >> 8) & 1) != 0) + pub fn s8rom(&self) -> S8romR { + S8romR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sector 9 Locked Forever by User 2"] #[inline(always)] - pub fn s9rom(&self) -> S9ROM_R { - S9ROM_R::new(((self.bits >> 9) & 1) != 0) + pub fn s9rom(&self) -> S9romR { + S9romR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Sectors 10 and 11 Locked Forever by User 2"] #[inline(always)] - pub fn s10_s11rom(&self) -> S10_S11ROM_R { - S10_S11ROM_R::new(((self.bits >> 10) & 1) != 0) + pub fn s10_s11rom(&self) -> S10S11romR { + S10S11romR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Sectors 12 and 13 Locked Forever by User 2"] #[inline(always)] - pub fn s12_s13rom(&self) -> S12_S13ROM_R { - S12_S13ROM_R::new(((self.bits >> 11) & 1) != 0) + pub fn s12_s13rom(&self) -> S12S13romR { + S12S13romR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Sectors 14 and 15 Locked Forever by User 2"] #[inline(always)] - pub fn s14_s15rom(&self) -> S14_S15ROM_R { - S14_S15ROM_R::new(((self.bits >> 12) & 1) != 0) + pub fn s14_s15rom(&self) -> S14S15romR { + S14S15romR::new(((self.bits >> 12) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PROCON2_SPEC; -impl crate::RegisterSpec for PROCON2_SPEC { +pub struct Procon2Spec; +impl crate::RegisterSpec for Procon2Spec { type Ux = u32; } #[doc = "`read()` method returns [`procon2::R`](R) reader structure"] -impl crate::Readable for PROCON2_SPEC {} +impl crate::Readable for Procon2Spec {} #[doc = "`reset()` method sets PROCON2 to value 0"] -impl crate::Resettable for PROCON2_SPEC { +impl crate::Resettable for Procon2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/generic.rs b/src/generic.rs index ec96dd7c..c2e30fcf 100644 --- a/src/generic.rs +++ b/src/generic.rs @@ -50,6 +50,8 @@ pub trait Readable: RegisterSpec {} #[doc = ""] #[doc = " Registers marked with `Readable` can be also be `modify`'ed."] pub trait Writable: RegisterSpec { + #[doc = " Is it safe to write any bits to register"] + type Safety; #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"] const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"] @@ -223,6 +225,29 @@ where #[doc = ""] #[doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."] pub type W = raw::W; +impl W { + #[doc = " Writes raw bits to the register."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self + } +} +impl W +where + REG: Writable, +{ + #[doc = " Writes raw bits to the register."] + #[inline(always)] + pub fn set(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self + } +} #[doc = " Field reader."] #[doc = ""] #[doc = " Result of the `read` methods of fields."] @@ -272,9 +297,9 @@ impl BitReader { self.bit() } } -#[doc(hidden)] +#[doc = " Marker for register/field writers which can take any value of specified width"] pub struct Safe; -#[doc(hidden)] +#[doc = " You should check that value is allowed to pass to register/field writer marked with this"] pub struct Unsafe; #[doc = " Write field Proxy with unsafe `bits`"] pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; diff --git a/src/gpdma0.rs b/src/gpdma0.rs index 32f7f0f5..d47ceb74 100644 --- a/src/gpdma0.rs +++ b/src/gpdma0.rs @@ -1,388 +1,420 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - rawtfr: RAWTFR, + rawtfr: Rawtfr, _reserved1: [u8; 0x04], - rawblock: RAWBLOCK, + rawblock: Rawblock, _reserved2: [u8; 0x04], - rawsrctran: RAWSRCTRAN, + rawsrctran: Rawsrctran, _reserved3: [u8; 0x04], - rawdsttran: RAWDSTTRAN, + rawdsttran: Rawdsttran, _reserved4: [u8; 0x04], - rawerr: RAWERR, + rawerr: Rawerr, _reserved5: [u8; 0x04], - statustfr: STATUSTFR, + statustfr: Statustfr, _reserved6: [u8; 0x04], - statusblock: STATUSBLOCK, + statusblock: Statusblock, _reserved7: [u8; 0x04], - statussrctran: STATUSSRCTRAN, + statussrctran: Statussrctran, _reserved8: [u8; 0x04], - statusdsttran: STATUSDSTTRAN, + statusdsttran: Statusdsttran, _reserved9: [u8; 0x04], - statuserr: STATUSERR, + statuserr: Statuserr, _reserved10: [u8; 0x04], - masktfr: MASKTFR, + masktfr: Masktfr, _reserved11: [u8; 0x04], - maskblock: MASKBLOCK, + maskblock: Maskblock, _reserved12: [u8; 0x04], - masksrctran: MASKSRCTRAN, + masksrctran: Masksrctran, _reserved13: [u8; 0x04], - maskdsttran: MASKDSTTRAN, + maskdsttran: Maskdsttran, _reserved14: [u8; 0x04], - maskerr: MASKERR, + maskerr: Maskerr, _reserved15: [u8; 0x04], - cleartfr: CLEARTFR, + cleartfr: Cleartfr, _reserved16: [u8; 0x04], - clearblock: CLEARBLOCK, + clearblock: Clearblock, _reserved17: [u8; 0x04], - clearsrctran: CLEARSRCTRAN, + clearsrctran: Clearsrctran, _reserved18: [u8; 0x04], - cleardsttran: CLEARDSTTRAN, + cleardsttran: Cleardsttran, _reserved19: [u8; 0x04], - clearerr: CLEARERR, + clearerr: Clearerr, _reserved20: [u8; 0x04], - statusint: STATUSINT, + statusint: Statusint, _reserved21: [u8; 0x04], - reqsrcreg: REQSRCREG, + reqsrcreg: Reqsrcreg, _reserved22: [u8; 0x04], - reqdstreg: REQDSTREG, + reqdstreg: Reqdstreg, _reserved23: [u8; 0x04], - sglreqsrcreg: SGLREQSRCREG, + sglreqsrcreg: Sglreqsrcreg, _reserved24: [u8; 0x04], - sglreqdstreg: SGLREQDSTREG, + sglreqdstreg: Sglreqdstreg, _reserved25: [u8; 0x04], - lstsrcreg: LSTSRCREG, + lstsrcreg: Lstsrcreg, _reserved26: [u8; 0x04], - lstdstreg: LSTDSTREG, + lstdstreg: Lstdstreg, _reserved27: [u8; 0x04], - dmacfgreg: DMACFGREG, + dmacfgreg: Dmacfgreg, _reserved28: [u8; 0x04], - chenreg: CHENREG, + chenreg: Chenreg, _reserved29: [u8; 0x04], - id: ID, + id: Id, _reserved30: [u8; 0x4c], - type_: TYPE, - version: VERSION, + type_: Type, + version: Version, } impl RegisterBlock { #[doc = "0x00 - Raw IntTfr Status"] #[inline(always)] - pub const fn rawtfr(&self) -> &RAWTFR { + pub const fn rawtfr(&self) -> &Rawtfr { &self.rawtfr } #[doc = "0x08 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawblock(&self) -> &RAWBLOCK { + pub const fn rawblock(&self) -> &Rawblock { &self.rawblock } #[doc = "0x10 - Raw IntSrcTran Status"] #[inline(always)] - pub const fn rawsrctran(&self) -> &RAWSRCTRAN { + pub const fn rawsrctran(&self) -> &Rawsrctran { &self.rawsrctran } #[doc = "0x18 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawdsttran(&self) -> &RAWDSTTRAN { + pub const fn rawdsttran(&self) -> &Rawdsttran { &self.rawdsttran } #[doc = "0x20 - Raw IntErr Status"] #[inline(always)] - pub const fn rawerr(&self) -> &RAWERR { + pub const fn rawerr(&self) -> &Rawerr { &self.rawerr } #[doc = "0x28 - IntTfr Status"] #[inline(always)] - pub const fn statustfr(&self) -> &STATUSTFR { + pub const fn statustfr(&self) -> &Statustfr { &self.statustfr } #[doc = "0x30 - IntBlock Status"] #[inline(always)] - pub const fn statusblock(&self) -> &STATUSBLOCK { + pub const fn statusblock(&self) -> &Statusblock { &self.statusblock } #[doc = "0x38 - IntSrcTran Status"] #[inline(always)] - pub const fn statussrctran(&self) -> &STATUSSRCTRAN { + pub const fn statussrctran(&self) -> &Statussrctran { &self.statussrctran } #[doc = "0x40 - IntBlock Status"] #[inline(always)] - pub const fn statusdsttran(&self) -> &STATUSDSTTRAN { + pub const fn statusdsttran(&self) -> &Statusdsttran { &self.statusdsttran } #[doc = "0x48 - IntErr Status"] #[inline(always)] - pub const fn statuserr(&self) -> &STATUSERR { + pub const fn statuserr(&self) -> &Statuserr { &self.statuserr } #[doc = "0x50 - Mask for Raw IntTfr Status"] #[inline(always)] - pub const fn masktfr(&self) -> &MASKTFR { + pub const fn masktfr(&self) -> &Masktfr { &self.masktfr } #[doc = "0x58 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskblock(&self) -> &MASKBLOCK { + pub const fn maskblock(&self) -> &Maskblock { &self.maskblock } #[doc = "0x60 - Mask for Raw IntSrcTran Status"] #[inline(always)] - pub const fn masksrctran(&self) -> &MASKSRCTRAN { + pub const fn masksrctran(&self) -> &Masksrctran { &self.masksrctran } #[doc = "0x68 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskdsttran(&self) -> &MASKDSTTRAN { + pub const fn maskdsttran(&self) -> &Maskdsttran { &self.maskdsttran } #[doc = "0x70 - Mask for Raw IntErr Status"] #[inline(always)] - pub const fn maskerr(&self) -> &MASKERR { + pub const fn maskerr(&self) -> &Maskerr { &self.maskerr } #[doc = "0x78 - IntTfr Status"] #[inline(always)] - pub const fn cleartfr(&self) -> &CLEARTFR { + pub const fn cleartfr(&self) -> &Cleartfr { &self.cleartfr } #[doc = "0x80 - IntBlock Status"] #[inline(always)] - pub const fn clearblock(&self) -> &CLEARBLOCK { + pub const fn clearblock(&self) -> &Clearblock { &self.clearblock } #[doc = "0x88 - IntSrcTran Status"] #[inline(always)] - pub const fn clearsrctran(&self) -> &CLEARSRCTRAN { + pub const fn clearsrctran(&self) -> &Clearsrctran { &self.clearsrctran } #[doc = "0x90 - IntBlock Status"] #[inline(always)] - pub const fn cleardsttran(&self) -> &CLEARDSTTRAN { + pub const fn cleardsttran(&self) -> &Cleardsttran { &self.cleardsttran } #[doc = "0x98 - IntErr Status"] #[inline(always)] - pub const fn clearerr(&self) -> &CLEARERR { + pub const fn clearerr(&self) -> &Clearerr { &self.clearerr } #[doc = "0xa0 - Combined Interrupt Status Register"] #[inline(always)] - pub const fn statusint(&self) -> &STATUSINT { + pub const fn statusint(&self) -> &Statusint { &self.statusint } #[doc = "0xa8 - Source Software Transaction Request Register"] #[inline(always)] - pub const fn reqsrcreg(&self) -> &REQSRCREG { + pub const fn reqsrcreg(&self) -> &Reqsrcreg { &self.reqsrcreg } #[doc = "0xb0 - Destination Software Transaction Request Register"] #[inline(always)] - pub const fn reqdstreg(&self) -> &REQDSTREG { + pub const fn reqdstreg(&self) -> &Reqdstreg { &self.reqdstreg } #[doc = "0xb8 - Single Source Transaction Request Register"] #[inline(always)] - pub const fn sglreqsrcreg(&self) -> &SGLREQSRCREG { + pub const fn sglreqsrcreg(&self) -> &Sglreqsrcreg { &self.sglreqsrcreg } #[doc = "0xc0 - Single Destination Transaction Request Register"] #[inline(always)] - pub const fn sglreqdstreg(&self) -> &SGLREQDSTREG { + pub const fn sglreqdstreg(&self) -> &Sglreqdstreg { &self.sglreqdstreg } #[doc = "0xc8 - Last Source Transaction Request Register"] #[inline(always)] - pub const fn lstsrcreg(&self) -> &LSTSRCREG { + pub const fn lstsrcreg(&self) -> &Lstsrcreg { &self.lstsrcreg } #[doc = "0xd0 - Last Destination Transaction Request Register"] #[inline(always)] - pub const fn lstdstreg(&self) -> &LSTDSTREG { + pub const fn lstdstreg(&self) -> &Lstdstreg { &self.lstdstreg } #[doc = "0xd8 - GPDMA Configuration Register"] #[inline(always)] - pub const fn dmacfgreg(&self) -> &DMACFGREG { + pub const fn dmacfgreg(&self) -> &Dmacfgreg { &self.dmacfgreg } #[doc = "0xe0 - GPDMA Channel Enable Register"] #[inline(always)] - pub const fn chenreg(&self) -> &CHENREG { + pub const fn chenreg(&self) -> &Chenreg { &self.chenreg } #[doc = "0xe8 - GPDMA0 ID Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x138 - GPDMA Component Type"] #[inline(always)] - pub const fn type_(&self) -> &TYPE { + pub const fn type_(&self) -> &Type { &self.type_ } #[doc = "0x13c - DMA Component Version"] #[inline(always)] - pub const fn version(&self) -> &VERSION { + pub const fn version(&self) -> &Version { &self.version } } #[doc = "RAWTFR (rw) register accessor: Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawtfr`] module"] -pub type RAWTFR = crate::Reg; +#[doc(alias = "RAWTFR")] +pub type Rawtfr = crate::Reg; #[doc = "Raw IntTfr Status"] pub mod rawtfr; #[doc = "RAWBLOCK (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawblock`] module"] -pub type RAWBLOCK = crate::Reg; +#[doc(alias = "RAWBLOCK")] +pub type Rawblock = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawblock; #[doc = "RAWSRCTRAN (rw) register accessor: Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawsrctran`] module"] -pub type RAWSRCTRAN = crate::Reg; +#[doc(alias = "RAWSRCTRAN")] +pub type Rawsrctran = crate::Reg; #[doc = "Raw IntSrcTran Status"] pub mod rawsrctran; #[doc = "RAWDSTTRAN (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawdsttran`] module"] -pub type RAWDSTTRAN = crate::Reg; +#[doc(alias = "RAWDSTTRAN")] +pub type Rawdsttran = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawdsttran; #[doc = "RAWERR (rw) register accessor: Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawerr`] module"] -pub type RAWERR = crate::Reg; +#[doc(alias = "RAWERR")] +pub type Rawerr = crate::Reg; #[doc = "Raw IntErr Status"] pub mod rawerr; #[doc = "STATUSTFR (r) register accessor: IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statustfr`] module"] -pub type STATUSTFR = crate::Reg; +#[doc(alias = "STATUSTFR")] +pub type Statustfr = crate::Reg; #[doc = "IntTfr Status"] pub mod statustfr; #[doc = "STATUSBLOCK (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusblock`] module"] -pub type STATUSBLOCK = crate::Reg; +#[doc(alias = "STATUSBLOCK")] +pub type Statusblock = crate::Reg; #[doc = "IntBlock Status"] pub mod statusblock; #[doc = "STATUSSRCTRAN (r) register accessor: IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statussrctran`] module"] -pub type STATUSSRCTRAN = crate::Reg; +#[doc(alias = "STATUSSRCTRAN")] +pub type Statussrctran = crate::Reg; #[doc = "IntSrcTran Status"] pub mod statussrctran; #[doc = "STATUSDSTTRAN (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusdsttran`] module"] -pub type STATUSDSTTRAN = crate::Reg; +#[doc(alias = "STATUSDSTTRAN")] +pub type Statusdsttran = crate::Reg; #[doc = "IntBlock Status"] pub mod statusdsttran; #[doc = "STATUSERR (r) register accessor: IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statuserr`] module"] -pub type STATUSERR = crate::Reg; +#[doc(alias = "STATUSERR")] +pub type Statuserr = crate::Reg; #[doc = "IntErr Status"] pub mod statuserr; #[doc = "MASKTFR (rw) register accessor: Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masktfr`] module"] -pub type MASKTFR = crate::Reg; +#[doc(alias = "MASKTFR")] +pub type Masktfr = crate::Reg; #[doc = "Mask for Raw IntTfr Status"] pub mod masktfr; #[doc = "MASKBLOCK (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskblock`] module"] -pub type MASKBLOCK = crate::Reg; +#[doc(alias = "MASKBLOCK")] +pub type Maskblock = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskblock; #[doc = "MASKSRCTRAN (rw) register accessor: Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masksrctran`] module"] -pub type MASKSRCTRAN = crate::Reg; +#[doc(alias = "MASKSRCTRAN")] +pub type Masksrctran = crate::Reg; #[doc = "Mask for Raw IntSrcTran Status"] pub mod masksrctran; #[doc = "MASKDSTTRAN (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskdsttran`] module"] -pub type MASKDSTTRAN = crate::Reg; +#[doc(alias = "MASKDSTTRAN")] +pub type Maskdsttran = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskdsttran; #[doc = "MASKERR (rw) register accessor: Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskerr`] module"] -pub type MASKERR = crate::Reg; +#[doc(alias = "MASKERR")] +pub type Maskerr = crate::Reg; #[doc = "Mask for Raw IntErr Status"] pub mod maskerr; #[doc = "CLEARTFR (w) register accessor: IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleartfr`] module"] -pub type CLEARTFR = crate::Reg; +#[doc(alias = "CLEARTFR")] +pub type Cleartfr = crate::Reg; #[doc = "IntTfr Status"] pub mod cleartfr; #[doc = "CLEARBLOCK (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearblock`] module"] -pub type CLEARBLOCK = crate::Reg; +#[doc(alias = "CLEARBLOCK")] +pub type Clearblock = crate::Reg; #[doc = "IntBlock Status"] pub mod clearblock; #[doc = "CLEARSRCTRAN (w) register accessor: IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearsrctran`] module"] -pub type CLEARSRCTRAN = crate::Reg; +#[doc(alias = "CLEARSRCTRAN")] +pub type Clearsrctran = crate::Reg; #[doc = "IntSrcTran Status"] pub mod clearsrctran; #[doc = "CLEARDSTTRAN (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleardsttran`] module"] -pub type CLEARDSTTRAN = crate::Reg; +#[doc(alias = "CLEARDSTTRAN")] +pub type Cleardsttran = crate::Reg; #[doc = "IntBlock Status"] pub mod cleardsttran; #[doc = "CLEARERR (w) register accessor: IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearerr`] module"] -pub type CLEARERR = crate::Reg; +#[doc(alias = "CLEARERR")] +pub type Clearerr = crate::Reg; #[doc = "IntErr Status"] pub mod clearerr; #[doc = "STATUSINT (r) register accessor: Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusint`] module"] -pub type STATUSINT = crate::Reg; +#[doc(alias = "STATUSINT")] +pub type Statusint = crate::Reg; #[doc = "Combined Interrupt Status Register"] pub mod statusint; #[doc = "REQSRCREG (rw) register accessor: Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqsrcreg`] module"] -pub type REQSRCREG = crate::Reg; +#[doc(alias = "REQSRCREG")] +pub type Reqsrcreg = crate::Reg; #[doc = "Source Software Transaction Request Register"] pub mod reqsrcreg; #[doc = "REQDSTREG (rw) register accessor: Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdstreg`] module"] -pub type REQDSTREG = crate::Reg; +#[doc(alias = "REQDSTREG")] +pub type Reqdstreg = crate::Reg; #[doc = "Destination Software Transaction Request Register"] pub mod reqdstreg; #[doc = "SGLREQSRCREG (rw) register accessor: Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqsrcreg`] module"] -pub type SGLREQSRCREG = crate::Reg; +#[doc(alias = "SGLREQSRCREG")] +pub type Sglreqsrcreg = crate::Reg; #[doc = "Single Source Transaction Request Register"] pub mod sglreqsrcreg; #[doc = "SGLREQDSTREG (rw) register accessor: Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqdstreg`] module"] -pub type SGLREQDSTREG = crate::Reg; +#[doc(alias = "SGLREQDSTREG")] +pub type Sglreqdstreg = crate::Reg; #[doc = "Single Destination Transaction Request Register"] pub mod sglreqdstreg; #[doc = "LSTSRCREG (rw) register accessor: Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstsrcreg`] module"] -pub type LSTSRCREG = crate::Reg; +#[doc(alias = "LSTSRCREG")] +pub type Lstsrcreg = crate::Reg; #[doc = "Last Source Transaction Request Register"] pub mod lstsrcreg; #[doc = "LSTDSTREG (rw) register accessor: Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstdstreg`] module"] -pub type LSTDSTREG = crate::Reg; +#[doc(alias = "LSTDSTREG")] +pub type Lstdstreg = crate::Reg; #[doc = "Last Destination Transaction Request Register"] pub mod lstdstreg; #[doc = "DMACFGREG (rw) register accessor: GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacfgreg`] module"] -pub type DMACFGREG = crate::Reg; +#[doc(alias = "DMACFGREG")] +pub type Dmacfgreg = crate::Reg; #[doc = "GPDMA Configuration Register"] pub mod dmacfgreg; #[doc = "CHENREG (rw) register accessor: GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chenreg`] module"] -pub type CHENREG = crate::Reg; +#[doc(alias = "CHENREG")] +pub type Chenreg = crate::Reg; #[doc = "GPDMA Channel Enable Register"] pub mod chenreg; #[doc = "ID (r) register accessor: GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "GPDMA0 ID Register"] pub mod id; #[doc = "TYPE (r) register accessor: GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] module"] -pub type TYPE = crate::Reg; +#[doc(alias = "TYPE")] +pub type Type = crate::Reg; #[doc = "GPDMA Component Type"] pub mod type_; #[doc = "VERSION (r) register accessor: DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] -pub type VERSION = crate::Reg; +#[doc(alias = "VERSION")] +pub type Version = crate::Reg; #[doc = "DMA Component Version"] pub mod version; diff --git a/src/gpdma0/chenreg.rs b/src/gpdma0/chenreg.rs index 3edc6fe9..d444b0e0 100644 --- a/src/gpdma0/chenreg.rs +++ b/src/gpdma0/chenreg.rs @@ -1,51 +1,51 @@ #[doc = "Register `CHENREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHENREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH` reader - Enables/Disables the channel"] -pub type CH_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Enables/Disables the channel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CH_A { +pub enum Ch { #[doc = "0: Disable the Channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable the Channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CH_A) -> Self { + fn from(variant: Ch) -> Self { variant as _ } } -impl crate::FieldSpec for CH_A { +impl crate::FieldSpec for Ch { type Ux = u8; } -impl CH_R { +#[doc = "Field `CH` reader - Enables/Disables the channel"] +pub type ChR = crate::FieldReader; +impl ChR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CH_A::VALUE1), - 1 => Some(CH_A::VALUE2), + 0 => Some(Ch::Value1), + 1 => Some(Ch::Value2), _ => None, } } #[doc = "Disable the Channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_A::VALUE1 + *self == Ch::Value1 } #[doc = "Enable the Channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_A::VALUE2 + *self == Ch::Value2 } } #[doc = "Field `CH` writer - Enables/Disables the channel"] -pub type CH_W<'a, REG> = crate::FieldWriter<'a, REG, 8, CH_A>; -impl<'a, REG> CH_W<'a, REG> +pub type ChW<'a, REG> = crate::FieldWriter<'a, REG, 8, Ch>; +impl<'a, REG> ChW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,60 +53,51 @@ where #[doc = "Disable the Channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_A::VALUE1) + self.variant(Ch::Value1) } #[doc = "Enable the Channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_A::VALUE2) + self.variant(Ch::Value2) } } #[doc = "Field `WE_CH` writer - Channel enable write enable"] -pub type WE_CH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type WeChW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Enables/Disables the channel"] #[inline(always)] - pub fn ch(&self) -> CH_R { - CH_R::new((self.bits & 0xff) as u8) + pub fn ch(&self) -> ChR { + ChR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Enables/Disables the channel"] #[inline(always)] #[must_use] - pub fn ch(&mut self) -> CH_W { - CH_W::new(self, 0) + pub fn ch(&mut self) -> ChW { + ChW::new(self, 0) } #[doc = "Bits 8:15 - Channel enable write enable"] #[inline(always)] #[must_use] - pub fn we_ch(&mut self) -> WE_CH_W { - WE_CH_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch(&mut self) -> WeChW { + WeChW::new(self, 8) } } #[doc = "GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHENREG_SPEC; -impl crate::RegisterSpec for CHENREG_SPEC { +pub struct ChenregSpec; +impl crate::RegisterSpec for ChenregSpec { type Ux = u32; } #[doc = "`read()` method returns [`chenreg::R`](R) reader structure"] -impl crate::Readable for CHENREG_SPEC {} +impl crate::Readable for ChenregSpec {} #[doc = "`write(|w| ..)` method takes [`chenreg::W`](W) writer structure"] -impl crate::Writable for CHENREG_SPEC { +impl crate::Writable for ChenregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHENREG to value 0"] -impl crate::Resettable for CHENREG_SPEC { +impl crate::Resettable for ChenregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearblock.rs b/src/gpdma0/clearblock.rs index 4f84d4ca..666404d1 100644 --- a/src/gpdma0/clearblock.rs +++ b/src/gpdma0/clearblock.rs @@ -1,324 +1,315 @@ #[doc = "Register `CLEARBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_AW { +pub enum Ch4 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_AW) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_AW>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE1) + self.variant(Ch4::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE2) + self.variant(Ch4::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_AW { +pub enum Ch5 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_AW) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_AW>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE1) + self.variant(Ch5::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE2) + self.variant(Ch5::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_AW { +pub enum Ch6 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_AW) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_AW>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE1) + self.variant(Ch6::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE2) + self.variant(Ch6::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_AW { +pub enum Ch7 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_AW) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_AW>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE1) + self.variant(Ch7::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE2) + self.variant(Ch7::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARBLOCK_SPEC; -impl crate::RegisterSpec for CLEARBLOCK_SPEC { +pub struct ClearblockSpec; +impl crate::RegisterSpec for ClearblockSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearblock::W`](W) writer structure"] -impl crate::Writable for CLEARBLOCK_SPEC { +impl crate::Writable for ClearblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARBLOCK to value 0"] -impl crate::Resettable for CLEARBLOCK_SPEC { +impl crate::Resettable for ClearblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/cleardsttran.rs b/src/gpdma0/cleardsttran.rs index 21b1b48e..e3a28b59 100644 --- a/src/gpdma0/cleardsttran.rs +++ b/src/gpdma0/cleardsttran.rs @@ -1,324 +1,315 @@ #[doc = "Register `CLEARDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_AW { +pub enum Ch4 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_AW) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_AW>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE1) + self.variant(Ch4::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE2) + self.variant(Ch4::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_AW { +pub enum Ch5 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_AW) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_AW>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE1) + self.variant(Ch5::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE2) + self.variant(Ch5::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_AW { +pub enum Ch6 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_AW) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_AW>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE1) + self.variant(Ch6::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE2) + self.variant(Ch6::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_AW { +pub enum Ch7 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_AW) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_AW>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE1) + self.variant(Ch7::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE2) + self.variant(Ch7::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARDSTTRAN_SPEC; -impl crate::RegisterSpec for CLEARDSTTRAN_SPEC { +pub struct CleardsttranSpec; +impl crate::RegisterSpec for CleardsttranSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleardsttran::W`](W) writer structure"] -impl crate::Writable for CLEARDSTTRAN_SPEC { +impl crate::Writable for CleardsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARDSTTRAN to value 0"] -impl crate::Resettable for CLEARDSTTRAN_SPEC { +impl crate::Resettable for CleardsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearerr.rs b/src/gpdma0/clearerr.rs index a1786c79..50120fac 100644 --- a/src/gpdma0/clearerr.rs +++ b/src/gpdma0/clearerr.rs @@ -1,324 +1,315 @@ #[doc = "Register `CLEARERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_AW { +pub enum Ch4 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_AW) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_AW>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE1) + self.variant(Ch4::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE2) + self.variant(Ch4::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_AW { +pub enum Ch5 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_AW) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_AW>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE1) + self.variant(Ch5::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE2) + self.variant(Ch5::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_AW { +pub enum Ch6 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_AW) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_AW>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE1) + self.variant(Ch6::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE2) + self.variant(Ch6::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_AW { +pub enum Ch7 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_AW) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_AW>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE1) + self.variant(Ch7::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE2) + self.variant(Ch7::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARERR_SPEC; -impl crate::RegisterSpec for CLEARERR_SPEC { +pub struct ClearerrSpec; +impl crate::RegisterSpec for ClearerrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearerr::W`](W) writer structure"] -impl crate::Writable for CLEARERR_SPEC { +impl crate::Writable for ClearerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARERR to value 0"] -impl crate::Resettable for CLEARERR_SPEC { +impl crate::Resettable for ClearerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearsrctran.rs b/src/gpdma0/clearsrctran.rs index 119b94d2..0f9dfd0c 100644 --- a/src/gpdma0/clearsrctran.rs +++ b/src/gpdma0/clearsrctran.rs @@ -1,324 +1,315 @@ #[doc = "Register `CLEARSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_AW { +pub enum Ch4 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_AW) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_AW>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE1) + self.variant(Ch4::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE2) + self.variant(Ch4::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_AW { +pub enum Ch5 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_AW) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_AW>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE1) + self.variant(Ch5::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE2) + self.variant(Ch5::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_AW { +pub enum Ch6 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_AW) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_AW>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE1) + self.variant(Ch6::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE2) + self.variant(Ch6::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_AW { +pub enum Ch7 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_AW) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_AW>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE1) + self.variant(Ch7::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE2) + self.variant(Ch7::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARSRCTRAN_SPEC; -impl crate::RegisterSpec for CLEARSRCTRAN_SPEC { +pub struct ClearsrctranSpec; +impl crate::RegisterSpec for ClearsrctranSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearsrctran::W`](W) writer structure"] -impl crate::Writable for CLEARSRCTRAN_SPEC { +impl crate::Writable for ClearsrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARSRCTRAN to value 0"] -impl crate::Resettable for CLEARSRCTRAN_SPEC { +impl crate::Resettable for ClearsrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/cleartfr.rs b/src/gpdma0/cleartfr.rs index bd130e08..5bcb63d3 100644 --- a/src/gpdma0/cleartfr.rs +++ b/src/gpdma0/cleartfr.rs @@ -1,324 +1,315 @@ #[doc = "Register `CLEARTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_AW { +pub enum Ch4 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_AW) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_AW>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE1) + self.variant(Ch4::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_AW::VALUE2) + self.variant(Ch4::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_AW { +pub enum Ch5 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_AW) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_AW>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE1) + self.variant(Ch5::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_AW::VALUE2) + self.variant(Ch5::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_AW { +pub enum Ch6 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_AW) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_AW>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE1) + self.variant(Ch6::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_AW::VALUE2) + self.variant(Ch6::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_AW { +pub enum Ch7 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_AW) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_AW>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE1) + self.variant(Ch7::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_AW::VALUE2) + self.variant(Ch7::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARTFR_SPEC; -impl crate::RegisterSpec for CLEARTFR_SPEC { +pub struct CleartfrSpec; +impl crate::RegisterSpec for CleartfrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleartfr::W`](W) writer structure"] -impl crate::Writable for CLEARTFR_SPEC { +impl crate::Writable for CleartfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARTFR to value 0"] -impl crate::Resettable for CLEARTFR_SPEC { +impl crate::Resettable for CleartfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/dmacfgreg.rs b/src/gpdma0/dmacfgreg.rs index 0defde59..18085a8a 100644 --- a/src/gpdma0/dmacfgreg.rs +++ b/src/gpdma0/dmacfgreg.rs @@ -1,98 +1,89 @@ #[doc = "Register `DMACFGREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DMACFGREG` writer"] -pub type W = crate::W; -#[doc = "Field `DMA_EN` reader - GPDMA Enable bit."] -pub type DMA_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "GPDMA Enable bit.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA_EN_A { +pub enum DmaEn { #[doc = "0: GPDMA Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: GPDMA Enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA_EN_A) -> Self { + fn from(variant: DmaEn) -> Self { variant as u8 != 0 } } -impl DMA_EN_R { +#[doc = "Field `DMA_EN` reader - GPDMA Enable bit."] +pub type DmaEnR = crate::BitReader; +impl DmaEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA_EN_A { + pub const fn variant(&self) -> DmaEn { match self.bits { - false => DMA_EN_A::VALUE1, - true => DMA_EN_A::VALUE2, + false => DmaEn::Value1, + true => DmaEn::Value2, } } #[doc = "GPDMA Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA_EN_A::VALUE1 + *self == DmaEn::Value1 } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA_EN_A::VALUE2 + *self == DmaEn::Value2 } } #[doc = "Field `DMA_EN` writer - GPDMA Enable bit."] -pub type DMA_EN_W<'a, REG> = crate::BitWriter<'a, REG, DMA_EN_A>; -impl<'a, REG> DMA_EN_W<'a, REG> +pub type DmaEnW<'a, REG> = crate::BitWriter<'a, REG, DmaEn>; +impl<'a, REG> DmaEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "GPDMA Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA_EN_A::VALUE1) + self.variant(DmaEn::Value1) } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA_EN_A::VALUE2) + self.variant(DmaEn::Value2) } } impl R { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] - pub fn dma_en(&self) -> DMA_EN_R { - DMA_EN_R::new((self.bits & 1) != 0) + pub fn dma_en(&self) -> DmaEnR { + DmaEnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] #[must_use] - pub fn dma_en(&mut self) -> DMA_EN_W { - DMA_EN_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dma_en(&mut self) -> DmaEnW { + DmaEnW::new(self, 0) } } #[doc = "GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DMACFGREG_SPEC; -impl crate::RegisterSpec for DMACFGREG_SPEC { +pub struct DmacfgregSpec; +impl crate::RegisterSpec for DmacfgregSpec { type Ux = u32; } #[doc = "`read()` method returns [`dmacfgreg::R`](R) reader structure"] -impl crate::Readable for DMACFGREG_SPEC {} +impl crate::Readable for DmacfgregSpec {} #[doc = "`write(|w| ..)` method takes [`dmacfgreg::W`](W) writer structure"] -impl crate::Writable for DMACFGREG_SPEC { +impl crate::Writable for DmacfgregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMACFGREG to value 0"] -impl crate::Resettable for DMACFGREG_SPEC { +impl crate::Resettable for DmacfgregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/id.rs b/src/gpdma0/id.rs index 489c2fcb..adb8f451 100644 --- a/src/gpdma0/id.rs +++ b/src/gpdma0/id.rs @@ -1,22 +1,22 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Hardcoded GPDMA Peripheral ID"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Hardcoded GPDMA Peripheral ID"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00af_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00af_c000; } diff --git a/src/gpdma0/lstdstreg.rs b/src/gpdma0/lstdstreg.rs index 4115d9d0..e9ed2ff2 100644 --- a/src/gpdma0/lstdstreg.rs +++ b/src/gpdma0/lstdstreg.rs @@ -1,842 +1,833 @@ #[doc = "Register `LSTDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTDSTREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Destination last request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Destination last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Destination last request for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Destination last request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Destination last request for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Destination last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Destination last request for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Destination last request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Destination last request for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Destination last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Destination last request for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Destination last request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Destination last request for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Destination last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Destination last request for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Destination last request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Destination last request for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Destination last request for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Destination last request for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Destination last request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Destination last request for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Destination last request for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Destination last request for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Destination last request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Destination last request for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Destination last request for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Destination last request for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Destination last request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Destination last request for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Destination last request for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Destination last request for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Destination last request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Destination last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Destination last transaction request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Destination last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Destination last transaction request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Destination last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Destination last transaction request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Destination last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Destination last transaction request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Destination last transaction request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Destination last transaction request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Destination last transaction request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Destination last transaction request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Destination last transaction request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Destination last transaction request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Destination last transaction request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Destination last transaction request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Destination last request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Destination last request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Destination last request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Destination last request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Destination last request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Destination last request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Destination last request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Destination last request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Destination last transaction request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Destination last transaction request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Destination last transaction request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Destination last transaction request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LSTDSTREG_SPEC; -impl crate::RegisterSpec for LSTDSTREG_SPEC { +pub struct LstdstregSpec; +impl crate::RegisterSpec for LstdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`lstdstreg::R`](R) reader structure"] -impl crate::Readable for LSTDSTREG_SPEC {} +impl crate::Readable for LstdstregSpec {} #[doc = "`write(|w| ..)` method takes [`lstdstreg::W`](W) writer structure"] -impl crate::Writable for LSTDSTREG_SPEC { +impl crate::Writable for LstdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTDSTREG to value 0"] -impl crate::Resettable for LSTDSTREG_SPEC { +impl crate::Resettable for LstdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/lstsrcreg.rs b/src/gpdma0/lstsrcreg.rs index a4327078..20baa62c 100644 --- a/src/gpdma0/lstsrcreg.rs +++ b/src/gpdma0/lstsrcreg.rs @@ -1,842 +1,833 @@ #[doc = "Register `LSTSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTSRCREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Source last request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Source last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Source last request for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Source last request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Source last request for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Source last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Source last request for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Source last request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Source last request for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Source last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Source last request for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Source last request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Source last request for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Source last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Source last request for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Source last request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Source last request for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Source last request for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Source last request for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Source last request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Source last request for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Source last request for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Source last request for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Source last request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Source last request for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Source last request for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Source last request for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Source last request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Source last request for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Source last request for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Source last request for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Source last request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Source last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source last transaction request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source last transaction request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source last transaction request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source last transaction request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Source last transaction request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source last transaction request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Source last transaction request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source last transaction request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Source last transaction request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source last transaction request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Source last transaction request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source last transaction request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source last request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source last request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source last request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source last request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Source last request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Source last request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Source last request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Source last request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Source last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Source last transaction request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Source last transaction request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Source last transaction request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Source last transaction request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LSTSRCREG_SPEC; -impl crate::RegisterSpec for LSTSRCREG_SPEC { +pub struct LstsrcregSpec; +impl crate::RegisterSpec for LstsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`lstsrcreg::R`](R) reader structure"] -impl crate::Readable for LSTSRCREG_SPEC {} +impl crate::Readable for LstsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`lstsrcreg::W`](W) writer structure"] -impl crate::Writable for LSTSRCREG_SPEC { +impl crate::Writable for LstsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTSRCREG to value 0"] -impl crate::Resettable for LSTSRCREG_SPEC { +impl crate::Resettable for LstsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskblock.rs b/src/gpdma0/maskblock.rs index baeb3489..241e92e9 100644 --- a/src/gpdma0/maskblock.rs +++ b/src/gpdma0/maskblock.rs @@ -1,842 +1,833 @@ #[doc = "Register `MASKBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKBLOCK` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Mask bit for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Mask bit for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Mask bit for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Mask bit for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKBLOCK_SPEC; -impl crate::RegisterSpec for MASKBLOCK_SPEC { +pub struct MaskblockSpec; +impl crate::RegisterSpec for MaskblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskblock::R`](R) reader structure"] -impl crate::Readable for MASKBLOCK_SPEC {} +impl crate::Readable for MaskblockSpec {} #[doc = "`write(|w| ..)` method takes [`maskblock::W`](W) writer structure"] -impl crate::Writable for MASKBLOCK_SPEC { +impl crate::Writable for MaskblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKBLOCK to value 0"] -impl crate::Resettable for MASKBLOCK_SPEC { +impl crate::Resettable for MaskblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskdsttran.rs b/src/gpdma0/maskdsttran.rs index 60390095..6cfb3530 100644 --- a/src/gpdma0/maskdsttran.rs +++ b/src/gpdma0/maskdsttran.rs @@ -1,842 +1,833 @@ #[doc = "Register `MASKDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKDSTTRAN` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Mask bit for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Mask bit for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Mask bit for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Mask bit for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKDSTTRAN_SPEC; -impl crate::RegisterSpec for MASKDSTTRAN_SPEC { +pub struct MaskdsttranSpec; +impl crate::RegisterSpec for MaskdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskdsttran::R`](R) reader structure"] -impl crate::Readable for MASKDSTTRAN_SPEC {} +impl crate::Readable for MaskdsttranSpec {} #[doc = "`write(|w| ..)` method takes [`maskdsttran::W`](W) writer structure"] -impl crate::Writable for MASKDSTTRAN_SPEC { +impl crate::Writable for MaskdsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKDSTTRAN to value 0"] -impl crate::Resettable for MASKDSTTRAN_SPEC { +impl crate::Resettable for MaskdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskerr.rs b/src/gpdma0/maskerr.rs index 76db4b52..0ba98006 100644 --- a/src/gpdma0/maskerr.rs +++ b/src/gpdma0/maskerr.rs @@ -1,842 +1,833 @@ #[doc = "Register `MASKERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKERR` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Mask bit for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Mask bit for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Mask bit for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Mask bit for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKERR_SPEC; -impl crate::RegisterSpec for MASKERR_SPEC { +pub struct MaskerrSpec; +impl crate::RegisterSpec for MaskerrSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskerr::R`](R) reader structure"] -impl crate::Readable for MASKERR_SPEC {} +impl crate::Readable for MaskerrSpec {} #[doc = "`write(|w| ..)` method takes [`maskerr::W`](W) writer structure"] -impl crate::Writable for MASKERR_SPEC { +impl crate::Writable for MaskerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKERR to value 0"] -impl crate::Resettable for MASKERR_SPEC { +impl crate::Resettable for MaskerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/masksrctran.rs b/src/gpdma0/masksrctran.rs index ce1fd964..a8e7ef37 100644 --- a/src/gpdma0/masksrctran.rs +++ b/src/gpdma0/masksrctran.rs @@ -1,842 +1,833 @@ #[doc = "Register `MASKSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKSRCTRAN` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Mask bit for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Mask bit for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Mask bit for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Mask bit for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKSRCTRAN_SPEC; -impl crate::RegisterSpec for MASKSRCTRAN_SPEC { +pub struct MasksrctranSpec; +impl crate::RegisterSpec for MasksrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`masksrctran::R`](R) reader structure"] -impl crate::Readable for MASKSRCTRAN_SPEC {} +impl crate::Readable for MasksrctranSpec {} #[doc = "`write(|w| ..)` method takes [`masksrctran::W`](W) writer structure"] -impl crate::Writable for MASKSRCTRAN_SPEC { +impl crate::Writable for MasksrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKSRCTRAN to value 0"] -impl crate::Resettable for MASKSRCTRAN_SPEC { +impl crate::Resettable for MasksrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/masktfr.rs b/src/gpdma0/masktfr.rs index ef931a68..c5c3f920 100644 --- a/src/gpdma0/masktfr.rs +++ b/src/gpdma0/masktfr.rs @@ -1,842 +1,833 @@ #[doc = "Register `MASKTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKTFR` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } -#[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type CH4_R = crate::BitReader; #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH4_A { +pub enum Ch4 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH4_A) -> Self { + fn from(variant: Ch4) -> Self { variant as u8 != 0 } } -impl CH4_R { +#[doc = "Field `CH4` reader - Mask bit for channel 4"] +pub type Ch4R = crate::BitReader; +impl Ch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH4_A { + pub const fn variant(&self) -> Ch4 { match self.bits { - false => CH4_A::VALUE1, - true => CH4_A::VALUE2, + false => Ch4::Value1, + true => Ch4::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH4_A::VALUE1 + *self == Ch4::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH4_A::VALUE2 + *self == Ch4::Value2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; -impl<'a, REG> CH4_W<'a, REG> +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; +impl<'a, REG> Ch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE1) + self.variant(Ch4::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH4_A::VALUE2) + self.variant(Ch4::Value2) } } -#[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type CH5_R = crate::BitReader; #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH5_A { +pub enum Ch5 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH5_A) -> Self { + fn from(variant: Ch5) -> Self { variant as u8 != 0 } } -impl CH5_R { +#[doc = "Field `CH5` reader - Mask bit for channel 5"] +pub type Ch5R = crate::BitReader; +impl Ch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH5_A { + pub const fn variant(&self) -> Ch5 { match self.bits { - false => CH5_A::VALUE1, - true => CH5_A::VALUE2, + false => Ch5::Value1, + true => Ch5::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH5_A::VALUE1 + *self == Ch5::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH5_A::VALUE2 + *self == Ch5::Value2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; -impl<'a, REG> CH5_W<'a, REG> +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; +impl<'a, REG> Ch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE1) + self.variant(Ch5::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH5_A::VALUE2) + self.variant(Ch5::Value2) } } -#[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type CH6_R = crate::BitReader; #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH6_A { +pub enum Ch6 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH6_A) -> Self { + fn from(variant: Ch6) -> Self { variant as u8 != 0 } } -impl CH6_R { +#[doc = "Field `CH6` reader - Mask bit for channel 6"] +pub type Ch6R = crate::BitReader; +impl Ch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH6_A { + pub const fn variant(&self) -> Ch6 { match self.bits { - false => CH6_A::VALUE1, - true => CH6_A::VALUE2, + false => Ch6::Value1, + true => Ch6::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH6_A::VALUE1 + *self == Ch6::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH6_A::VALUE2 + *self == Ch6::Value2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; -impl<'a, REG> CH6_W<'a, REG> +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; +impl<'a, REG> Ch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE1) + self.variant(Ch6::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH6_A::VALUE2) + self.variant(Ch6::Value2) } } -#[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type CH7_R = crate::BitReader; #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH7_A { +pub enum Ch7 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH7_A) -> Self { + fn from(variant: Ch7) -> Self { variant as u8 != 0 } } -impl CH7_R { +#[doc = "Field `CH7` reader - Mask bit for channel 7"] +pub type Ch7R = crate::BitReader; +impl Ch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH7_A { + pub const fn variant(&self) -> Ch7 { match self.bits { - false => CH7_A::VALUE1, - true => CH7_A::VALUE2, + false => Ch7::Value1, + true => Ch7::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH7_A::VALUE1 + *self == Ch7::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH7_A::VALUE2 + *self == Ch7::Value2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; -impl<'a, REG> CH7_W<'a, REG> +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; +impl<'a, REG> Ch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE1) + self.variant(Ch7::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH7_A::VALUE2) + self.variant(Ch7::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKTFR_SPEC; -impl crate::RegisterSpec for MASKTFR_SPEC { +pub struct MasktfrSpec; +impl crate::RegisterSpec for MasktfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`masktfr::R`](R) reader structure"] -impl crate::Readable for MASKTFR_SPEC {} +impl crate::Readable for MasktfrSpec {} #[doc = "`write(|w| ..)` method takes [`masktfr::W`](W) writer structure"] -impl crate::Writable for MASKTFR_SPEC { +impl crate::Writable for MasktfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKTFR to value 0"] -impl crate::Resettable for MASKTFR_SPEC { +impl crate::Resettable for MasktfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawblock.rs b/src/gpdma0/rawblock.rs index 62aba1ec..c0947a48 100644 --- a/src/gpdma0/rawblock.rs +++ b/src/gpdma0/rawblock.rs @@ -1,154 +1,145 @@ #[doc = "Register `RAWBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWBLOCK_SPEC; -impl crate::RegisterSpec for RAWBLOCK_SPEC { +pub struct RawblockSpec; +impl crate::RegisterSpec for RawblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawblock::R`](R) reader structure"] -impl crate::Readable for RAWBLOCK_SPEC {} +impl crate::Readable for RawblockSpec {} #[doc = "`write(|w| ..)` method takes [`rawblock::W`](W) writer structure"] -impl crate::Writable for RAWBLOCK_SPEC { +impl crate::Writable for RawblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWBLOCK to value 0"] -impl crate::Resettable for RAWBLOCK_SPEC { +impl crate::Resettable for RawblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawdsttran.rs b/src/gpdma0/rawdsttran.rs index 1109167a..d75ff89a 100644 --- a/src/gpdma0/rawdsttran.rs +++ b/src/gpdma0/rawdsttran.rs @@ -1,154 +1,145 @@ #[doc = "Register `RAWDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWDSTTRAN_SPEC; -impl crate::RegisterSpec for RAWDSTTRAN_SPEC { +pub struct RawdsttranSpec; +impl crate::RegisterSpec for RawdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawdsttran::R`](R) reader structure"] -impl crate::Readable for RAWDSTTRAN_SPEC {} +impl crate::Readable for RawdsttranSpec {} #[doc = "`write(|w| ..)` method takes [`rawdsttran::W`](W) writer structure"] -impl crate::Writable for RAWDSTTRAN_SPEC { +impl crate::Writable for RawdsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWDSTTRAN to value 0"] -impl crate::Resettable for RAWDSTTRAN_SPEC { +impl crate::Resettable for RawdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawerr.rs b/src/gpdma0/rawerr.rs index 8cdf0c38..334c0e7b 100644 --- a/src/gpdma0/rawerr.rs +++ b/src/gpdma0/rawerr.rs @@ -1,154 +1,145 @@ #[doc = "Register `RAWERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWERR_SPEC; -impl crate::RegisterSpec for RAWERR_SPEC { +pub struct RawerrSpec; +impl crate::RegisterSpec for RawerrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawerr::R`](R) reader structure"] -impl crate::Readable for RAWERR_SPEC {} +impl crate::Readable for RawerrSpec {} #[doc = "`write(|w| ..)` method takes [`rawerr::W`](W) writer structure"] -impl crate::Writable for RAWERR_SPEC { +impl crate::Writable for RawerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWERR to value 0"] -impl crate::Resettable for RAWERR_SPEC { +impl crate::Resettable for RawerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawsrctran.rs b/src/gpdma0/rawsrctran.rs index 0c410030..7691e0e1 100644 --- a/src/gpdma0/rawsrctran.rs +++ b/src/gpdma0/rawsrctran.rs @@ -1,154 +1,145 @@ #[doc = "Register `RAWSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWSRCTRAN_SPEC; -impl crate::RegisterSpec for RAWSRCTRAN_SPEC { +pub struct RawsrctranSpec; +impl crate::RegisterSpec for RawsrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawsrctran::R`](R) reader structure"] -impl crate::Readable for RAWSRCTRAN_SPEC {} +impl crate::Readable for RawsrctranSpec {} #[doc = "`write(|w| ..)` method takes [`rawsrctran::W`](W) writer structure"] -impl crate::Writable for RAWSRCTRAN_SPEC { +impl crate::Writable for RawsrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWSRCTRAN to value 0"] -impl crate::Resettable for RAWSRCTRAN_SPEC { +impl crate::Resettable for RawsrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawtfr.rs b/src/gpdma0/rawtfr.rs index f658b3a1..ac409458 100644 --- a/src/gpdma0/rawtfr.rs +++ b/src/gpdma0/rawtfr.rs @@ -1,154 +1,145 @@ #[doc = "Register `RAWTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } } #[doc = "Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWTFR_SPEC; -impl crate::RegisterSpec for RAWTFR_SPEC { +pub struct RawtfrSpec; +impl crate::RegisterSpec for RawtfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawtfr::R`](R) reader structure"] -impl crate::Readable for RAWTFR_SPEC {} +impl crate::Readable for RawtfrSpec {} #[doc = "`write(|w| ..)` method takes [`rawtfr::W`](W) writer structure"] -impl crate::Writable for RAWTFR_SPEC { +impl crate::Writable for RawtfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWTFR to value 0"] -impl crate::Resettable for RAWTFR_SPEC { +impl crate::Resettable for RawtfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/reqdstreg.rs b/src/gpdma0/reqdstreg.rs index a78cd507..b2c31957 100644 --- a/src/gpdma0/reqdstreg.rs +++ b/src/gpdma0/reqdstreg.rs @@ -1,450 +1,441 @@ #[doc = "Register `REQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REQDSTREG_SPEC; -impl crate::RegisterSpec for REQDSTREG_SPEC { +pub struct ReqdstregSpec; +impl crate::RegisterSpec for ReqdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`reqdstreg::R`](R) reader structure"] -impl crate::Readable for REQDSTREG_SPEC {} +impl crate::Readable for ReqdstregSpec {} #[doc = "`write(|w| ..)` method takes [`reqdstreg::W`](W) writer structure"] -impl crate::Writable for REQDSTREG_SPEC { +impl crate::Writable for ReqdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQDSTREG to value 0"] -impl crate::Resettable for REQDSTREG_SPEC { +impl crate::Resettable for ReqdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/reqsrcreg.rs b/src/gpdma0/reqsrcreg.rs index d89ae52b..9d66ef8b 100644 --- a/src/gpdma0/reqsrcreg.rs +++ b/src/gpdma0/reqsrcreg.rs @@ -1,450 +1,441 @@ #[doc = "Register `REQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REQSRCREG_SPEC; -impl crate::RegisterSpec for REQSRCREG_SPEC { +pub struct ReqsrcregSpec; +impl crate::RegisterSpec for ReqsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`reqsrcreg::R`](R) reader structure"] -impl crate::Readable for REQSRCREG_SPEC {} +impl crate::Readable for ReqsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`reqsrcreg::W`](W) writer structure"] -impl crate::Writable for REQSRCREG_SPEC { +impl crate::Writable for ReqsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQSRCREG to value 0"] -impl crate::Resettable for REQSRCREG_SPEC { +impl crate::Resettable for ReqsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/sglreqdstreg.rs b/src/gpdma0/sglreqdstreg.rs index fabf5523..c46e0148 100644 --- a/src/gpdma0/sglreqdstreg.rs +++ b/src/gpdma0/sglreqdstreg.rs @@ -1,450 +1,441 @@ #[doc = "Register `SGLREQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SGLREQDSTREG_SPEC; -impl crate::RegisterSpec for SGLREQDSTREG_SPEC { +pub struct SglreqdstregSpec; +impl crate::RegisterSpec for SglreqdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`sglreqdstreg::R`](R) reader structure"] -impl crate::Readable for SGLREQDSTREG_SPEC {} +impl crate::Readable for SglreqdstregSpec {} #[doc = "`write(|w| ..)` method takes [`sglreqdstreg::W`](W) writer structure"] -impl crate::Writable for SGLREQDSTREG_SPEC { +impl crate::Writable for SglreqdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQDSTREG to value 0"] -impl crate::Resettable for SGLREQDSTREG_SPEC { +impl crate::Resettable for SglreqdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/sglreqsrcreg.rs b/src/gpdma0/sglreqsrcreg.rs index af4f7f2f..7bc377b2 100644 --- a/src/gpdma0/sglreqsrcreg.rs +++ b/src/gpdma0/sglreqsrcreg.rs @@ -1,450 +1,441 @@ #[doc = "Register `SGLREQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH4_AW { +pub enum WeCh4 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH4_AW) -> Self { + fn from(variant: WeCh4) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_AW>; -impl<'a, REG> WE_CH4_W<'a, REG> +pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; +impl<'a, REG> WeCh4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE1) + self.variant(WeCh4::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH4_AW::VALUE2) + self.variant(WeCh4::Value2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH5_AW { +pub enum WeCh5 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH5_AW) -> Self { + fn from(variant: WeCh5) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_AW>; -impl<'a, REG> WE_CH5_W<'a, REG> +pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; +impl<'a, REG> WeCh5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE1) + self.variant(WeCh5::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH5_AW::VALUE2) + self.variant(WeCh5::Value2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH6_AW { +pub enum WeCh6 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH6_AW) -> Self { + fn from(variant: WeCh6) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_AW>; -impl<'a, REG> WE_CH6_W<'a, REG> +pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; +impl<'a, REG> WeCh6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE1) + self.variant(WeCh6::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH6_AW::VALUE2) + self.variant(WeCh6::Value2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH7_AW { +pub enum WeCh7 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH7_AW) -> Self { + fn from(variant: WeCh7) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_AW>; -impl<'a, REG> WE_CH7_W<'a, REG> +pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; +impl<'a, REG> WeCh7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE1) + self.variant(WeCh7::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH7_AW::VALUE2) + self.variant(WeCh7::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> CH4_W { - CH4_W::new(self, 4) + pub fn ch4(&mut self) -> Ch4W { + Ch4W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> CH5_W { - CH5_W::new(self, 5) + pub fn ch5(&mut self) -> Ch5W { + Ch5W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> CH6_W { - CH6_W::new(self, 6) + pub fn ch6(&mut self) -> Ch6W { + Ch6W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> CH7_W { - CH7_W::new(self, 7) + pub fn ch7(&mut self) -> Ch7W { + Ch7W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WE_CH4_W { - WE_CH4_W::new(self, 12) + pub fn we_ch4(&mut self) -> WeCh4W { + WeCh4W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WE_CH5_W { - WE_CH5_W::new(self, 13) + pub fn we_ch5(&mut self) -> WeCh5W { + WeCh5W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WE_CH6_W { - WE_CH6_W::new(self, 14) + pub fn we_ch6(&mut self) -> WeCh6W { + WeCh6W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WE_CH7_W { - WE_CH7_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch7(&mut self) -> WeCh7W { + WeCh7W::new(self, 15) } } #[doc = "Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SGLREQSRCREG_SPEC; -impl crate::RegisterSpec for SGLREQSRCREG_SPEC { +pub struct SglreqsrcregSpec; +impl crate::RegisterSpec for SglreqsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`sglreqsrcreg::R`](R) reader structure"] -impl crate::Readable for SGLREQSRCREG_SPEC {} +impl crate::Readable for SglreqsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`sglreqsrcreg::W`](W) writer structure"] -impl crate::Writable for SGLREQSRCREG_SPEC { +impl crate::Writable for SglreqsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQSRCREG to value 0"] -impl crate::Resettable for SGLREQSRCREG_SPEC { +impl crate::Resettable for SglreqsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusblock.rs b/src/gpdma0/statusblock.rs index 6ee6c7ea..096403b6 100644 --- a/src/gpdma0/statusblock.rs +++ b/src/gpdma0/statusblock.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSBLOCK_SPEC; -impl crate::RegisterSpec for STATUSBLOCK_SPEC { +pub struct StatusblockSpec; +impl crate::RegisterSpec for StatusblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusblock::R`](R) reader structure"] -impl crate::Readable for STATUSBLOCK_SPEC {} +impl crate::Readable for StatusblockSpec {} #[doc = "`reset()` method sets STATUSBLOCK to value 0"] -impl crate::Resettable for STATUSBLOCK_SPEC { +impl crate::Resettable for StatusblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusdsttran.rs b/src/gpdma0/statusdsttran.rs index bb986da7..6b09cde7 100644 --- a/src/gpdma0/statusdsttran.rs +++ b/src/gpdma0/statusdsttran.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSDSTTRAN_SPEC; -impl crate::RegisterSpec for STATUSDSTTRAN_SPEC { +pub struct StatusdsttranSpec; +impl crate::RegisterSpec for StatusdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusdsttran::R`](R) reader structure"] -impl crate::Readable for STATUSDSTTRAN_SPEC {} +impl crate::Readable for StatusdsttranSpec {} #[doc = "`reset()` method sets STATUSDSTTRAN to value 0"] -impl crate::Resettable for STATUSDSTTRAN_SPEC { +impl crate::Resettable for StatusdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statuserr.rs b/src/gpdma0/statuserr.rs index b6b41015..9a24c4e8 100644 --- a/src/gpdma0/statuserr.rs +++ b/src/gpdma0/statuserr.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSERR_SPEC; -impl crate::RegisterSpec for STATUSERR_SPEC { +pub struct StatuserrSpec; +impl crate::RegisterSpec for StatuserrSpec { type Ux = u32; } #[doc = "`read()` method returns [`statuserr::R`](R) reader structure"] -impl crate::Readable for STATUSERR_SPEC {} +impl crate::Readable for StatuserrSpec {} #[doc = "`reset()` method sets STATUSERR to value 0"] -impl crate::Resettable for STATUSERR_SPEC { +impl crate::Resettable for StatuserrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusint.rs b/src/gpdma0/statusint.rs index e8fd9f1e..a98fb3e6 100644 --- a/src/gpdma0/statusint.rs +++ b/src/gpdma0/statusint.rs @@ -1,50 +1,50 @@ #[doc = "Register `STATUSINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TFR` reader - OR of the contents of STATUSTFR register"] -pub type TFR_R = crate::BitReader; +pub type TfrR = crate::BitReader; #[doc = "Field `BLOCK` reader - OR of the contents of STATUSBLOCK register"] -pub type BLOCK_R = crate::BitReader; +pub type BlockR = crate::BitReader; #[doc = "Field `SRCT` reader - OR of the contents of STATUSSRCTRAN register"] -pub type SRCT_R = crate::BitReader; +pub type SrctR = crate::BitReader; #[doc = "Field `DSTT` reader - OR of the contents of STATUSDSTTRAN register"] -pub type DSTT_R = crate::BitReader; +pub type DsttR = crate::BitReader; #[doc = "Field `ERR` reader - OR of the contents of STATUSERR register"] -pub type ERR_R = crate::BitReader; +pub type ErrR = crate::BitReader; impl R { #[doc = "Bit 0 - OR of the contents of STATUSTFR register"] #[inline(always)] - pub fn tfr(&self) -> TFR_R { - TFR_R::new((self.bits & 1) != 0) + pub fn tfr(&self) -> TfrR { + TfrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - OR of the contents of STATUSBLOCK register"] #[inline(always)] - pub fn block(&self) -> BLOCK_R { - BLOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn block(&self) -> BlockR { + BlockR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OR of the contents of STATUSSRCTRAN register"] #[inline(always)] - pub fn srct(&self) -> SRCT_R { - SRCT_R::new(((self.bits >> 2) & 1) != 0) + pub fn srct(&self) -> SrctR { + SrctR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - OR of the contents of STATUSDSTTRAN register"] #[inline(always)] - pub fn dstt(&self) -> DSTT_R { - DSTT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dstt(&self) -> DsttR { + DsttR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OR of the contents of STATUSERR register"] #[inline(always)] - pub fn err(&self) -> ERR_R { - ERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn err(&self) -> ErrR { + ErrR::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSINT_SPEC; -impl crate::RegisterSpec for STATUSINT_SPEC { +pub struct StatusintSpec; +impl crate::RegisterSpec for StatusintSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusint::R`](R) reader structure"] -impl crate::Readable for STATUSINT_SPEC {} +impl crate::Readable for StatusintSpec {} #[doc = "`reset()` method sets STATUSINT to value 0"] -impl crate::Resettable for STATUSINT_SPEC { +impl crate::Resettable for StatusintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statussrctran.rs b/src/gpdma0/statussrctran.rs index 69659f32..f270a0a4 100644 --- a/src/gpdma0/statussrctran.rs +++ b/src/gpdma0/statussrctran.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSSRCTRAN_SPEC; -impl crate::RegisterSpec for STATUSSRCTRAN_SPEC { +pub struct StatussrctranSpec; +impl crate::RegisterSpec for StatussrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`statussrctran::R`](R) reader structure"] -impl crate::Readable for STATUSSRCTRAN_SPEC {} +impl crate::Readable for StatussrctranSpec {} #[doc = "`reset()` method sets STATUSSRCTRAN to value 0"] -impl crate::Resettable for STATUSSRCTRAN_SPEC { +impl crate::Resettable for StatussrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statustfr.rs b/src/gpdma0/statustfr.rs index cb402cb0..1ca2f1bd 100644 --- a/src/gpdma0/statustfr.rs +++ b/src/gpdma0/statustfr.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type CH4_R = crate::BitReader; +pub type Ch4R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type CH5_R = crate::BitReader; +pub type Ch5R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type CH6_R = crate::BitReader; +pub type Ch6R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type CH7_R = crate::BitReader; +pub type Ch7R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> CH4_R { - CH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> Ch4R { + Ch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> CH5_R { - CH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> Ch5R { + Ch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> CH6_R { - CH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> Ch6R { + Ch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> CH7_R { - CH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> Ch7R { + Ch7R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSTFR_SPEC; -impl crate::RegisterSpec for STATUSTFR_SPEC { +pub struct StatustfrSpec; +impl crate::RegisterSpec for StatustfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`statustfr::R`](R) reader structure"] -impl crate::Readable for STATUSTFR_SPEC {} +impl crate::Readable for StatustfrSpec {} #[doc = "`reset()` method sets STATUSTFR to value 0"] -impl crate::Resettable for STATUSTFR_SPEC { +impl crate::Resettable for StatustfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/type_.rs b/src/gpdma0/type_.rs index cf672516..49e402c0 100644 --- a/src/gpdma0/type_.rs +++ b/src/gpdma0/type_.rs @@ -1,22 +1,22 @@ #[doc = "Register `TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Component Type"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Component Type"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TYPE_SPEC; -impl crate::RegisterSpec for TYPE_SPEC { +pub struct TypeSpec; +impl crate::RegisterSpec for TypeSpec { type Ux = u32; } #[doc = "`read()` method returns [`type_::R`](R) reader structure"] -impl crate::Readable for TYPE_SPEC {} +impl crate::Readable for TypeSpec {} #[doc = "`reset()` method sets TYPE to value 0x4457_1110"] -impl crate::Resettable for TYPE_SPEC { +impl crate::Resettable for TypeSpec { const RESET_VALUE: u32 = 0x4457_1110; } diff --git a/src/gpdma0/version.rs b/src/gpdma0/version.rs index 1b3d1f83..66e4c358 100644 --- a/src/gpdma0/version.rs +++ b/src/gpdma0/version.rs @@ -1,22 +1,22 @@ #[doc = "Register `VERSION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Version number of the component"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Version number of the component"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VERSION_SPEC; -impl crate::RegisterSpec for VERSION_SPEC { +pub struct VersionSpec; +impl crate::RegisterSpec for VersionSpec { type Ux = u32; } #[doc = "`read()` method returns [`version::R`](R) reader structure"] -impl crate::Readable for VERSION_SPEC {} +impl crate::Readable for VersionSpec {} #[doc = "`reset()` method sets VERSION to value 0x3231_342a"] -impl crate::Resettable for VERSION_SPEC { +impl crate::Resettable for VersionSpec { const RESET_VALUE: u32 = 0x3231_342a; } diff --git a/src/gpdma0_ch0.rs b/src/gpdma0_ch0.rs index 2601babd..9850b313 100644 --- a/src/gpdma0_ch0.rs +++ b/src/gpdma0_ch0.rs @@ -1,157 +1,170 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sar: SAR, + sar: Sar, _reserved1: [u8; 0x04], - dar: DAR, + dar: Dar, _reserved2: [u8; 0x04], - llp: LLP, + llp: Llp, _reserved3: [u8; 0x04], - ctll: CTLL, - ctlh: CTLH, - sstat: SSTAT, + ctll: Ctll, + ctlh: Ctlh, + sstat: Sstat, _reserved6: [u8; 0x04], - dstat: DSTAT, + dstat: Dstat, _reserved7: [u8; 0x04], - sstatar: SSTATAR, + sstatar: Sstatar, _reserved8: [u8; 0x04], - dstatar: DSTATAR, + dstatar: Dstatar, _reserved9: [u8; 0x04], - cfgl: CFGL, - cfgh: CFGH, - sgr: SGR, + cfgl: Cfgl, + cfgh: Cfgh, + sgr: Sgr, _reserved12: [u8; 0x04], - dsr: DSR, + dsr: Dsr, } impl RegisterBlock { #[doc = "0x00 - Source Address Register"] #[inline(always)] - pub const fn sar(&self) -> &SAR { + pub const fn sar(&self) -> &Sar { &self.sar } #[doc = "0x08 - Destination Address Register"] #[inline(always)] - pub const fn dar(&self) -> &DAR { + pub const fn dar(&self) -> &Dar { &self.dar } #[doc = "0x10 - Linked List Pointer Register"] #[inline(always)] - pub const fn llp(&self) -> &LLP { + pub const fn llp(&self) -> &Llp { &self.llp } #[doc = "0x18 - Control Register Low"] #[inline(always)] - pub const fn ctll(&self) -> &CTLL { + pub const fn ctll(&self) -> &Ctll { &self.ctll } #[doc = "0x1c - Control Register High"] #[inline(always)] - pub const fn ctlh(&self) -> &CTLH { + pub const fn ctlh(&self) -> &Ctlh { &self.ctlh } #[doc = "0x20 - Source Status Register"] #[inline(always)] - pub const fn sstat(&self) -> &SSTAT { + pub const fn sstat(&self) -> &Sstat { &self.sstat } #[doc = "0x28 - Destination Status Register"] #[inline(always)] - pub const fn dstat(&self) -> &DSTAT { + pub const fn dstat(&self) -> &Dstat { &self.dstat } #[doc = "0x30 - Source Status Address Register"] #[inline(always)] - pub const fn sstatar(&self) -> &SSTATAR { + pub const fn sstatar(&self) -> &Sstatar { &self.sstatar } #[doc = "0x38 - Destination Status Address Register"] #[inline(always)] - pub const fn dstatar(&self) -> &DSTATAR { + pub const fn dstatar(&self) -> &Dstatar { &self.dstatar } #[doc = "0x40 - Configuration Register Low"] #[inline(always)] - pub const fn cfgl(&self) -> &CFGL { + pub const fn cfgl(&self) -> &Cfgl { &self.cfgl } #[doc = "0x44 - Configuration Register High"] #[inline(always)] - pub const fn cfgh(&self) -> &CFGH { + pub const fn cfgh(&self) -> &Cfgh { &self.cfgh } #[doc = "0x48 - Source Gather Register"] #[inline(always)] - pub const fn sgr(&self) -> &SGR { + pub const fn sgr(&self) -> &Sgr { &self.sgr } #[doc = "0x50 - Destination Scatter Register"] #[inline(always)] - pub const fn dsr(&self) -> &DSR { + pub const fn dsr(&self) -> &Dsr { &self.dsr } } #[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] -pub type SAR = crate::Reg; +#[doc(alias = "SAR")] +pub type Sar = crate::Reg; #[doc = "Source Address Register"] pub mod sar; #[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] -pub type DAR = crate::Reg; +#[doc(alias = "DAR")] +pub type Dar = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; #[doc = "LLP (rw) register accessor: Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@llp`] module"] -pub type LLP = crate::Reg; +#[doc(alias = "LLP")] +pub type Llp = crate::Reg; #[doc = "Linked List Pointer Register"] pub mod llp; #[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] -pub type CTLL = crate::Reg; +#[doc(alias = "CTLL")] +pub type Ctll = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; #[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] -pub type CTLH = crate::Reg; +#[doc(alias = "CTLH")] +pub type Ctlh = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; #[doc = "SSTAT (rw) register accessor: Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstat`] module"] -pub type SSTAT = crate::Reg; +#[doc(alias = "SSTAT")] +pub type Sstat = crate::Reg; #[doc = "Source Status Register"] pub mod sstat; #[doc = "DSTAT (rw) register accessor: Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstat`] module"] -pub type DSTAT = crate::Reg; +#[doc(alias = "DSTAT")] +pub type Dstat = crate::Reg; #[doc = "Destination Status Register"] pub mod dstat; #[doc = "SSTATAR (rw) register accessor: Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatar`] module"] -pub type SSTATAR = crate::Reg; +#[doc(alias = "SSTATAR")] +pub type Sstatar = crate::Reg; #[doc = "Source Status Address Register"] pub mod sstatar; #[doc = "DSTATAR (rw) register accessor: Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstatar`] module"] -pub type DSTATAR = crate::Reg; +#[doc(alias = "DSTATAR")] +pub type Dstatar = crate::Reg; #[doc = "Destination Status Address Register"] pub mod dstatar; #[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] -pub type CFGL = crate::Reg; +#[doc(alias = "CFGL")] +pub type Cfgl = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; #[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] -pub type CFGH = crate::Reg; +#[doc(alias = "CFGH")] +pub type Cfgh = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; #[doc = "SGR (rw) register accessor: Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sgr`] module"] -pub type SGR = crate::Reg; +#[doc(alias = "SGR")] +pub type Sgr = crate::Reg; #[doc = "Source Gather Register"] pub mod sgr; #[doc = "DSR (rw) register accessor: Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsr`] module"] -pub type DSR = crate::Reg; +#[doc(alias = "DSR")] +pub type Dsr = crate::Reg; #[doc = "Destination Scatter Register"] pub mod dsr; diff --git a/src/gpdma0_ch0/cfgh.rs b/src/gpdma0_ch0/cfgh.rs index 1e3ff173..1dd259af 100644 --- a/src/gpdma0_ch0/cfgh.rs +++ b/src/gpdma0_ch0/cfgh.rs @@ -1,237 +1,228 @@ #[doc = "Register `CFGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGH` writer"] -pub type W = crate::W; -#[doc = "Field `FCMODE` reader - Flow Control Mode"] -pub type FCMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Flow Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCMODE_A { +pub enum Fcmode { #[doc = "0: Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCMODE_A) -> Self { + fn from(variant: Fcmode) -> Self { variant as u8 != 0 } } -impl FCMODE_R { +#[doc = "Field `FCMODE` reader - Flow Control Mode"] +pub type FcmodeR = crate::BitReader; +impl FcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCMODE_A { + pub const fn variant(&self) -> Fcmode { match self.bits { - false => FCMODE_A::VALUE1, - true => FCMODE_A::VALUE2, + false => Fcmode::Value1, + true => Fcmode::Value2, } } #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCMODE_A::VALUE1 + *self == Fcmode::Value1 } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCMODE_A::VALUE2 + *self == Fcmode::Value2 } } #[doc = "Field `FCMODE` writer - Flow Control Mode"] -pub type FCMODE_W<'a, REG> = crate::BitWriter<'a, REG, FCMODE_A>; -impl<'a, REG> FCMODE_W<'a, REG> +pub type FcmodeW<'a, REG> = crate::BitWriter<'a, REG, Fcmode>; +impl<'a, REG> FcmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE1) + self.variant(Fcmode::Value1) } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE2) + self.variant(Fcmode::Value2) } } -#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] -pub type FIFO_MODE_R = crate::BitReader; #[doc = "FIFO Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_MODE_A { +pub enum FifoMode { #[doc = "0: Space/data available for single AHB transfer of the specified transfer width."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_MODE_A) -> Self { + fn from(variant: FifoMode) -> Self { variant as u8 != 0 } } -impl FIFO_MODE_R { +#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] +pub type FifoModeR = crate::BitReader; +impl FifoModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_MODE_A { + pub const fn variant(&self) -> FifoMode { match self.bits { - false => FIFO_MODE_A::VALUE1, - true => FIFO_MODE_A::VALUE2, + false => FifoMode::Value1, + true => FifoMode::Value2, } } #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_MODE_A::VALUE1 + *self == FifoMode::Value1 } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_MODE_A::VALUE2 + *self == FifoMode::Value2 } } #[doc = "Field `FIFO_MODE` writer - FIFO Mode Select"] -pub type FIFO_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FIFO_MODE_A>; -impl<'a, REG> FIFO_MODE_W<'a, REG> +pub type FifoModeW<'a, REG> = crate::BitWriter<'a, REG, FifoMode>; +impl<'a, REG> FifoModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE1) + self.variant(FifoMode::Value1) } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE2) + self.variant(FifoMode::Value2) } } #[doc = "Field `PROTCTL` reader - Protection Control"] -pub type PROTCTL_R = crate::FieldReader; +pub type ProtctlR = crate::FieldReader; #[doc = "Field `PROTCTL` writer - Protection Control"] -pub type PROTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type ProtctlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DS_UPD_EN` reader - Destination Status Update Enable"] -pub type DS_UPD_EN_R = crate::BitReader; +pub type DsUpdEnR = crate::BitReader; #[doc = "Field `DS_UPD_EN` writer - Destination Status Update Enable"] -pub type DS_UPD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DsUpdEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS_UPD_EN` reader - Source Status Update Enable"] -pub type SS_UPD_EN_R = crate::BitReader; +pub type SsUpdEnR = crate::BitReader; #[doc = "Field `SS_UPD_EN` writer - Source Status Update Enable"] -pub type SS_UPD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SsUpdEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRC_PER` reader - Source Peripheral"] -pub type SRC_PER_R = crate::FieldReader; +pub type SrcPerR = crate::FieldReader; #[doc = "Field `SRC_PER` writer - Source Peripheral"] -pub type SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SrcPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `DEST_PER` reader - Destination Peripheral"] -pub type DEST_PER_R = crate::FieldReader; +pub type DestPerR = crate::FieldReader; #[doc = "Field `DEST_PER` writer - Destination Peripheral"] -pub type DEST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DestPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - pub fn fcmode(&self) -> FCMODE_R { - FCMODE_R::new((self.bits & 1) != 0) + pub fn fcmode(&self) -> FcmodeR { + FcmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - pub fn fifo_mode(&self) -> FIFO_MODE_R { - FIFO_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn fifo_mode(&self) -> FifoModeR { + FifoModeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - pub fn protctl(&self) -> PROTCTL_R { - PROTCTL_R::new(((self.bits >> 2) & 7) as u8) + pub fn protctl(&self) -> ProtctlR { + ProtctlR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bit 5 - Destination Status Update Enable"] #[inline(always)] - pub fn ds_upd_en(&self) -> DS_UPD_EN_R { - DS_UPD_EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn ds_upd_en(&self) -> DsUpdEnR { + DsUpdEnR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source Status Update Enable"] #[inline(always)] - pub fn ss_upd_en(&self) -> SS_UPD_EN_R { - SS_UPD_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn ss_upd_en(&self) -> SsUpdEnR { + SsUpdEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - pub fn src_per(&self) -> SRC_PER_R { - SRC_PER_R::new(((self.bits >> 7) & 0x0f) as u8) + pub fn src_per(&self) -> SrcPerR { + SrcPerR::new(((self.bits >> 7) & 0x0f) as u8) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - pub fn dest_per(&self) -> DEST_PER_R { - DEST_PER_R::new(((self.bits >> 11) & 0x0f) as u8) + pub fn dest_per(&self) -> DestPerR { + DestPerR::new(((self.bits >> 11) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] #[must_use] - pub fn fcmode(&mut self) -> FCMODE_W { - FCMODE_W::new(self, 0) + pub fn fcmode(&mut self) -> FcmodeW { + FcmodeW::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] #[must_use] - pub fn fifo_mode(&mut self) -> FIFO_MODE_W { - FIFO_MODE_W::new(self, 1) + pub fn fifo_mode(&mut self) -> FifoModeW { + FifoModeW::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] #[must_use] - pub fn protctl(&mut self) -> PROTCTL_W { - PROTCTL_W::new(self, 2) + pub fn protctl(&mut self) -> ProtctlW { + ProtctlW::new(self, 2) } #[doc = "Bit 5 - Destination Status Update Enable"] #[inline(always)] #[must_use] - pub fn ds_upd_en(&mut self) -> DS_UPD_EN_W { - DS_UPD_EN_W::new(self, 5) + pub fn ds_upd_en(&mut self) -> DsUpdEnW { + DsUpdEnW::new(self, 5) } #[doc = "Bit 6 - Source Status Update Enable"] #[inline(always)] #[must_use] - pub fn ss_upd_en(&mut self) -> SS_UPD_EN_W { - SS_UPD_EN_W::new(self, 6) + pub fn ss_upd_en(&mut self) -> SsUpdEnW { + SsUpdEnW::new(self, 6) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] #[must_use] - pub fn src_per(&mut self) -> SRC_PER_W { - SRC_PER_W::new(self, 7) + pub fn src_per(&mut self) -> SrcPerW { + SrcPerW::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] #[must_use] - pub fn dest_per(&mut self) -> DEST_PER_W { - DEST_PER_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dest_per(&mut self) -> DestPerW { + DestPerW::new(self, 11) } } #[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGH_SPEC; -impl crate::RegisterSpec for CFGH_SPEC { +pub struct CfghSpec; +impl crate::RegisterSpec for CfghSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgh::R`](R) reader structure"] -impl crate::Readable for CFGH_SPEC {} +impl crate::Readable for CfghSpec {} #[doc = "`write(|w| ..)` method takes [`cfgh::W`](W) writer structure"] -impl crate::Writable for CFGH_SPEC { +impl crate::Writable for CfghSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGH to value 0x04"] -impl crate::Resettable for CFGH_SPEC { +impl crate::Resettable for CfghSpec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/gpdma0_ch0/cfgl.rs b/src/gpdma0_ch0/cfgl.rs index 30148e4a..c4ff1394 100644 --- a/src/gpdma0_ch0/cfgl.rs +++ b/src/gpdma0_ch0/cfgl.rs @@ -1,258 +1,258 @@ #[doc = "Register `CFGL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH_PRIOR` reader - Channel priority"] -pub type CH_PRIOR_R = crate::FieldReader; +pub type ChPriorR = crate::FieldReader; #[doc = "Field `CH_PRIOR` writer - Channel priority"] -pub type CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `CH_SUSP` reader - Channel Suspend"] -pub type CH_SUSP_R = crate::BitReader; +pub type ChPriorW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Channel Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH_SUSP_A { +pub enum ChSusp { #[doc = "0: Not suspended."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Suspend DMA transfer from the source."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH_SUSP_A) -> Self { + fn from(variant: ChSusp) -> Self { variant as u8 != 0 } } -impl CH_SUSP_R { +#[doc = "Field `CH_SUSP` reader - Channel Suspend"] +pub type ChSuspR = crate::BitReader; +impl ChSuspR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH_SUSP_A { + pub const fn variant(&self) -> ChSusp { match self.bits { - false => CH_SUSP_A::VALUE1, - true => CH_SUSP_A::VALUE2, + false => ChSusp::Value1, + true => ChSusp::Value2, } } #[doc = "Not suspended."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_SUSP_A::VALUE1 + *self == ChSusp::Value1 } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_SUSP_A::VALUE2 + *self == ChSusp::Value2 } } #[doc = "Field `CH_SUSP` writer - Channel Suspend"] -pub type CH_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, CH_SUSP_A>; -impl<'a, REG> CH_SUSP_W<'a, REG> +pub type ChSuspW<'a, REG> = crate::BitWriter<'a, REG, ChSusp>; +impl<'a, REG> ChSuspW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not suspended."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE1) + self.variant(ChSusp::Value1) } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE2) + self.variant(ChSusp::Value2) } } -#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] -pub type FIFO_EMPTY_R = crate::BitReader; #[doc = "Indicates if there is data left in the channel FIFO\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_EMPTY_A { +pub enum FifoEmpty { #[doc = "1: Channel FIFO empty"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: Channel FIFO not empty"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_EMPTY_A) -> Self { + fn from(variant: FifoEmpty) -> Self { variant as u8 != 0 } } -impl FIFO_EMPTY_R { +#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] +pub type FifoEmptyR = crate::BitReader; +impl FifoEmptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_EMPTY_A { + pub const fn variant(&self) -> FifoEmpty { match self.bits { - true => FIFO_EMPTY_A::VALUE1, - false => FIFO_EMPTY_A::VALUE2, + true => FifoEmpty::Value1, + false => FifoEmpty::Value2, } } #[doc = "Channel FIFO empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE1 + *self == FifoEmpty::Value1 } #[doc = "Channel FIFO not empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE2 + *self == FifoEmpty::Value2 } } -#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_R = crate::BitReader; #[doc = "Destination Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_DST_A { +pub enum HsSelDst { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware- initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_DST_A) -> Self { + fn from(variant: HsSelDst) -> Self { variant as u8 != 0 } } -impl HS_SEL_DST_R { +#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] +pub type HsSelDstR = crate::BitReader; +impl HsSelDstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_DST_A { + pub const fn variant(&self) -> HsSelDst { match self.bits { - false => HS_SEL_DST_A::VALUE1, - true => HS_SEL_DST_A::VALUE2, + false => HsSelDst::Value1, + true => HsSelDst::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_DST_A::VALUE1 + *self == HsSelDst::Value1 } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_DST_A::VALUE2 + *self == HsSelDst::Value2 } } #[doc = "Field `HS_SEL_DST` writer - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_DST_A>; -impl<'a, REG> HS_SEL_DST_W<'a, REG> +pub type HsSelDstW<'a, REG> = crate::BitWriter<'a, REG, HsSelDst>; +impl<'a, REG> HsSelDstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE1) + self.variant(HsSelDst::Value1) } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE2) + self.variant(HsSelDst::Value2) } } -#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_R = crate::BitReader; #[doc = "Source Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_SRC_A { +pub enum HsSelSrc { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware-initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_SRC_A) -> Self { + fn from(variant: HsSelSrc) -> Self { variant as u8 != 0 } } -impl HS_SEL_SRC_R { +#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] +pub type HsSelSrcR = crate::BitReader; +impl HsSelSrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_SRC_A { + pub const fn variant(&self) -> HsSelSrc { match self.bits { - false => HS_SEL_SRC_A::VALUE1, - true => HS_SEL_SRC_A::VALUE2, + false => HsSelSrc::Value1, + true => HsSelSrc::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE1 + *self == HsSelSrc::Value1 } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE2 + *self == HsSelSrc::Value2 } } #[doc = "Field `HS_SEL_SRC` writer - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_SRC_A>; -impl<'a, REG> HS_SEL_SRC_W<'a, REG> +pub type HsSelSrcW<'a, REG> = crate::BitWriter<'a, REG, HsSelSrc>; +impl<'a, REG> HsSelSrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE1) + self.variant(HsSelSrc::Value1) } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE2) + self.variant(HsSelSrc::Value2) } } -#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] -pub type LOCK_CH_L_R = crate::FieldReader; #[doc = "Channel Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_CH_L_A { +pub enum LockChL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_CH_L_A) -> Self { + fn from(variant: LockChL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_CH_L_A { +impl crate::FieldSpec for LockChL { type Ux = u8; } -impl LOCK_CH_L_R { +#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] +pub type LockChLR = crate::FieldReader; +impl LockChLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_CH_L_A::VALUE1), - 1 => Some(LOCK_CH_L_A::VALUE2), - 2 => Some(LOCK_CH_L_A::VALUE3), + 0 => Some(LockChL::Value1), + 1 => Some(LockChL::Value2), + 2 => Some(LockChL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_CH_L_A::VALUE1 + *self == LockChL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_CH_L_A::VALUE2 + *self == LockChL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_CH_L_A::VALUE3 + *self == LockChL::Value3 } } #[doc = "Field `LOCK_CH_L` writer - Channel Lock Level"] -pub type LOCK_CH_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_CH_L_A>; -impl<'a, REG> LOCK_CH_L_W<'a, REG> +pub type LockChLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockChL>; +impl<'a, REG> LockChLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,71 +260,71 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE1) + self.variant(LockChL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE2) + self.variant(LockChL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE3) + self.variant(LockChL::Value3) } } -#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] -pub type LOCK_B_L_R = crate::FieldReader; #[doc = "Bus Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_B_L_A { +pub enum LockBL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_B_L_A) -> Self { + fn from(variant: LockBL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_B_L_A { +impl crate::FieldSpec for LockBL { type Ux = u8; } -impl LOCK_B_L_R { +#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] +pub type LockBLR = crate::FieldReader; +impl LockBLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_B_L_A::VALUE1), - 1 => Some(LOCK_B_L_A::VALUE2), - 2 => Some(LOCK_B_L_A::VALUE3), + 0 => Some(LockBL::Value1), + 1 => Some(LockBL::Value2), + 2 => Some(LockBL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_B_L_A::VALUE1 + *self == LockBL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_B_L_A::VALUE2 + *self == LockBL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_B_L_A::VALUE3 + *self == LockBL::Value3 } } #[doc = "Field `LOCK_B_L` writer - Bus Lock Level"] -pub type LOCK_B_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_B_L_A>; -impl<'a, REG> LOCK_B_L_W<'a, REG> +pub type LockBLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockBL>; +impl<'a, REG> LockBLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -332,320 +332,311 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE1) + self.variant(LockBL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE2) + self.variant(LockBL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE3) + self.variant(LockBL::Value3) } } #[doc = "Field `LOCK_CH` reader - Channel Lock Bit"] -pub type LOCK_CH_R = crate::BitReader; +pub type LockChR = crate::BitReader; #[doc = "Field `LOCK_CH` writer - Channel Lock Bit"] -pub type LOCK_CH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LockChW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCK_B` reader - Bus Lock Bit"] -pub type LOCK_B_R = crate::BitReader; +pub type LockBR = crate::BitReader; #[doc = "Field `LOCK_B` writer - Bus Lock Bit"] -pub type LOCK_B_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_R = crate::BitReader; +pub type LockBW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Destination Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DST_HS_POL_A { +pub enum DstHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DST_HS_POL_A) -> Self { + fn from(variant: DstHsPol) -> Self { variant as u8 != 0 } } -impl DST_HS_POL_R { +#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] +pub type DstHsPolR = crate::BitReader; +impl DstHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DST_HS_POL_A { + pub const fn variant(&self) -> DstHsPol { match self.bits { - false => DST_HS_POL_A::VALUE1, - true => DST_HS_POL_A::VALUE2, + false => DstHsPol::Value1, + true => DstHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DST_HS_POL_A::VALUE1 + *self == DstHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DST_HS_POL_A::VALUE2 + *self == DstHsPol::Value2 } } #[doc = "Field `DST_HS_POL` writer - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, DST_HS_POL_A>; -impl<'a, REG> DST_HS_POL_W<'a, REG> +pub type DstHsPolW<'a, REG> = crate::BitWriter<'a, REG, DstHsPol>; +impl<'a, REG> DstHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE1) + self.variant(DstHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE2) + self.variant(DstHsPol::Value2) } } -#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_R = crate::BitReader; #[doc = "Source Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRC_HS_POL_A { +pub enum SrcHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRC_HS_POL_A) -> Self { + fn from(variant: SrcHsPol) -> Self { variant as u8 != 0 } } -impl SRC_HS_POL_R { +#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] +pub type SrcHsPolR = crate::BitReader; +impl SrcHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRC_HS_POL_A { + pub const fn variant(&self) -> SrcHsPol { match self.bits { - false => SRC_HS_POL_A::VALUE1, - true => SRC_HS_POL_A::VALUE2, + false => SrcHsPol::Value1, + true => SrcHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRC_HS_POL_A::VALUE1 + *self == SrcHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRC_HS_POL_A::VALUE2 + *self == SrcHsPol::Value2 } } #[doc = "Field `SRC_HS_POL` writer - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, SRC_HS_POL_A>; -impl<'a, REG> SRC_HS_POL_W<'a, REG> +pub type SrcHsPolW<'a, REG> = crate::BitWriter<'a, REG, SrcHsPol>; +impl<'a, REG> SrcHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE1) + self.variant(SrcHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE2) + self.variant(SrcHsPol::Value2) } } #[doc = "Field `MAX_ABRST` reader - Maximum AMBA Burst Length"] -pub type MAX_ABRST_R = crate::FieldReader; +pub type MaxAbrstR = crate::FieldReader; #[doc = "Field `MAX_ABRST` writer - Maximum AMBA Burst Length"] -pub type MAX_ABRST_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type MaxAbrstW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `RELOAD_SRC` reader - Automatic Source Reload"] -pub type RELOAD_SRC_R = crate::BitReader; +pub type ReloadSrcR = crate::BitReader; #[doc = "Field `RELOAD_SRC` writer - Automatic Source Reload"] -pub type RELOAD_SRC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ReloadSrcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RELOAD_DST` reader - Automatic Destination Reload"] -pub type RELOAD_DST_R = crate::BitReader; +pub type ReloadDstR = crate::BitReader; #[doc = "Field `RELOAD_DST` writer - Automatic Destination Reload"] -pub type RELOAD_DST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ReloadDstW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - pub fn ch_prior(&self) -> CH_PRIOR_R { - CH_PRIOR_R::new(((self.bits >> 5) & 7) as u8) + pub fn ch_prior(&self) -> ChPriorR { + ChPriorR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - pub fn ch_susp(&self) -> CH_SUSP_R { - CH_SUSP_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch_susp(&self) -> ChSuspR { + ChSuspR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Indicates if there is data left in the channel FIFO"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new(((self.bits >> 9) & 1) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { - HS_SEL_DST_R::new(((self.bits >> 10) & 1) != 0) + pub fn hs_sel_dst(&self) -> HsSelDstR { + HsSelDstR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { - HS_SEL_SRC_R::new(((self.bits >> 11) & 1) != 0) + pub fn hs_sel_src(&self) -> HsSelSrcR { + HsSelSrcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - pub fn lock_ch_l(&self) -> LOCK_CH_L_R { - LOCK_CH_L_R::new(((self.bits >> 12) & 3) as u8) + pub fn lock_ch_l(&self) -> LockChLR { + LockChLR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - pub fn lock_b_l(&self) -> LOCK_B_L_R { - LOCK_B_L_R::new(((self.bits >> 14) & 3) as u8) + pub fn lock_b_l(&self) -> LockBLR { + LockBLR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - pub fn lock_ch(&self) -> LOCK_CH_R { - LOCK_CH_R::new(((self.bits >> 16) & 1) != 0) + pub fn lock_ch(&self) -> LockChR { + LockChR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - pub fn lock_b(&self) -> LOCK_B_R { - LOCK_B_R::new(((self.bits >> 17) & 1) != 0) + pub fn lock_b(&self) -> LockBR { + LockBR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - pub fn dst_hs_pol(&self) -> DST_HS_POL_R { - DST_HS_POL_R::new(((self.bits >> 18) & 1) != 0) + pub fn dst_hs_pol(&self) -> DstHsPolR { + DstHsPolR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - pub fn src_hs_pol(&self) -> SRC_HS_POL_R { - SRC_HS_POL_R::new(((self.bits >> 19) & 1) != 0) + pub fn src_hs_pol(&self) -> SrcHsPolR { + SrcHsPolR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - pub fn max_abrst(&self) -> MAX_ABRST_R { - MAX_ABRST_R::new(((self.bits >> 20) & 0x03ff) as u16) + pub fn max_abrst(&self) -> MaxAbrstR { + MaxAbrstR::new(((self.bits >> 20) & 0x03ff) as u16) } #[doc = "Bit 30 - Automatic Source Reload"] #[inline(always)] - pub fn reload_src(&self) -> RELOAD_SRC_R { - RELOAD_SRC_R::new(((self.bits >> 30) & 1) != 0) + pub fn reload_src(&self) -> ReloadSrcR { + ReloadSrcR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Automatic Destination Reload"] #[inline(always)] - pub fn reload_dst(&self) -> RELOAD_DST_R { - RELOAD_DST_R::new(((self.bits >> 31) & 1) != 0) + pub fn reload_dst(&self) -> ReloadDstR { + ReloadDstR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] #[must_use] - pub fn ch_prior(&mut self) -> CH_PRIOR_W { - CH_PRIOR_W::new(self, 5) + pub fn ch_prior(&mut self) -> ChPriorW { + ChPriorW::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] #[must_use] - pub fn ch_susp(&mut self) -> CH_SUSP_W { - CH_SUSP_W::new(self, 8) + pub fn ch_susp(&mut self) -> ChSuspW { + ChSuspW::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { - HS_SEL_DST_W::new(self, 10) + pub fn hs_sel_dst(&mut self) -> HsSelDstW { + HsSelDstW::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { - HS_SEL_SRC_W::new(self, 11) + pub fn hs_sel_src(&mut self) -> HsSelSrcW { + HsSelSrcW::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] #[must_use] - pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { - LOCK_CH_L_W::new(self, 12) + pub fn lock_ch_l(&mut self) -> LockChLW { + LockChLW::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] #[must_use] - pub fn lock_b_l(&mut self) -> LOCK_B_L_W { - LOCK_B_L_W::new(self, 14) + pub fn lock_b_l(&mut self) -> LockBLW { + LockBLW::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_ch(&mut self) -> LOCK_CH_W { - LOCK_CH_W::new(self, 16) + pub fn lock_ch(&mut self) -> LockChW { + LockChW::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_b(&mut self) -> LOCK_B_W { - LOCK_B_W::new(self, 17) + pub fn lock_b(&mut self) -> LockBW { + LockBW::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { - DST_HS_POL_W::new(self, 18) + pub fn dst_hs_pol(&mut self) -> DstHsPolW { + DstHsPolW::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { - SRC_HS_POL_W::new(self, 19) + pub fn src_hs_pol(&mut self) -> SrcHsPolW { + SrcHsPolW::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] #[must_use] - pub fn max_abrst(&mut self) -> MAX_ABRST_W { - MAX_ABRST_W::new(self, 20) + pub fn max_abrst(&mut self) -> MaxAbrstW { + MaxAbrstW::new(self, 20) } #[doc = "Bit 30 - Automatic Source Reload"] #[inline(always)] #[must_use] - pub fn reload_src(&mut self) -> RELOAD_SRC_W { - RELOAD_SRC_W::new(self, 30) + pub fn reload_src(&mut self) -> ReloadSrcW { + ReloadSrcW::new(self, 30) } #[doc = "Bit 31 - Automatic Destination Reload"] #[inline(always)] #[must_use] - pub fn reload_dst(&mut self) -> RELOAD_DST_W { - RELOAD_DST_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn reload_dst(&mut self) -> ReloadDstW { + ReloadDstW::new(self, 31) } } #[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGL_SPEC; -impl crate::RegisterSpec for CFGL_SPEC { +pub struct CfglSpec; +impl crate::RegisterSpec for CfglSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgl::R`](R) reader structure"] -impl crate::Readable for CFGL_SPEC {} +impl crate::Readable for CfglSpec {} #[doc = "`write(|w| ..)` method takes [`cfgl::W`](W) writer structure"] -impl crate::Writable for CFGL_SPEC { +impl crate::Writable for CfglSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGL to value 0x0e00"] -impl crate::Resettable for CFGL_SPEC { +impl crate::Resettable for CfglSpec { const RESET_VALUE: u32 = 0x0e00; } diff --git a/src/gpdma0_ch0/ctlh.rs b/src/gpdma0_ch0/ctlh.rs index b193f905..828a2d1a 100644 --- a/src/gpdma0_ch0/ctlh.rs +++ b/src/gpdma0_ch0/ctlh.rs @@ -1,64 +1,55 @@ #[doc = "Register `CTLH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_TS` reader - Block Transfer Size"] -pub type BLOCK_TS_R = crate::FieldReader; +pub type BlockTsR = crate::FieldReader; #[doc = "Field `BLOCK_TS` writer - Block Transfer Size"] -pub type BLOCK_TS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BlockTsW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DONE` reader - Done bit"] -pub type DONE_R = crate::BitReader; +pub type DoneR = crate::BitReader; #[doc = "Field `DONE` writer - Done bit"] -pub type DONE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - pub fn block_ts(&self) -> BLOCK_TS_R { - BLOCK_TS_R::new((self.bits & 0x0fff) as u16) + pub fn block_ts(&self) -> BlockTsR { + BlockTsR::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - pub fn done(&self) -> DONE_R { - DONE_R::new(((self.bits >> 12) & 1) != 0) + pub fn done(&self) -> DoneR { + DoneR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn block_ts(&mut self) -> BLOCK_TS_W { - BLOCK_TS_W::new(self, 0) + pub fn block_ts(&mut self) -> BlockTsW { + BlockTsW::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn done(&mut self) -> DoneW { + DoneW::new(self, 12) } } #[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLH_SPEC; -impl crate::RegisterSpec for CTLH_SPEC { +pub struct CtlhSpec; +impl crate::RegisterSpec for CtlhSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctlh::R`](R) reader structure"] -impl crate::Readable for CTLH_SPEC {} +impl crate::Readable for CtlhSpec {} #[doc = "`write(|w| ..)` method takes [`ctlh::W`](W) writer structure"] -impl crate::Writable for CTLH_SPEC { +impl crate::Writable for CtlhSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLH to value 0x02"] -impl crate::Resettable for CTLH_SPEC { +impl crate::Resettable for CtlhSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/gpdma0_ch0/ctll.rs b/src/gpdma0_ch0/ctll.rs index cedf80d1..32a6a3f0 100644 --- a/src/gpdma0_ch0/ctll.rs +++ b/src/gpdma0_ch0/ctll.rs @@ -1,71 +1,71 @@ #[doc = "Register `CTLL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INT_EN` reader - Interrupt Enable Bit"] -pub type INT_EN_R = crate::BitReader; +pub type IntEnR = crate::BitReader; #[doc = "Field `INT_EN` writer - Interrupt Enable Bit"] -pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DST_TR_WIDTH` reader - Destination Transfer Width"] -pub type DST_TR_WIDTH_R = crate::FieldReader; +pub type DstTrWidthR = crate::FieldReader; #[doc = "Field `DST_TR_WIDTH` writer - Destination Transfer Width"] -pub type DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DstTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_TR_WIDTH` reader - Source Transfer Width"] -pub type SRC_TR_WIDTH_R = crate::FieldReader; +pub type SrcTrWidthR = crate::FieldReader; #[doc = "Field `SRC_TR_WIDTH` writer - Source Transfer Width"] -pub type SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `DINC` reader - Destination Address Increment"] -pub type DINC_R = crate::FieldReader; +pub type SrcTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Destination Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DINC_A { +pub enum Dinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DINC_A) -> Self { + fn from(variant: Dinc) -> Self { variant as _ } } -impl crate::FieldSpec for DINC_A { +impl crate::FieldSpec for Dinc { type Ux = u8; } -impl DINC_R { +#[doc = "Field `DINC` reader - Destination Address Increment"] +pub type DincR = crate::FieldReader; +impl DincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DINC_A::VALUE1), - 1 => Some(DINC_A::VALUE2), - 2 => Some(DINC_A::VALUE3), + 0 => Some(Dinc::Value1), + 1 => Some(Dinc::Value2), + 2 => Some(Dinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DINC_A::VALUE1 + *self == Dinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DINC_A::VALUE2 + *self == Dinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DINC_A::VALUE3 + *self == Dinc::Value3 } } #[doc = "Field `DINC` writer - Destination Address Increment"] -pub type DINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DINC_A>; -impl<'a, REG> DINC_W<'a, REG> +pub type DincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dinc>; +impl<'a, REG> DincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,71 +73,71 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE1) + self.variant(Dinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE2) + self.variant(Dinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE3) + self.variant(Dinc::Value3) } } -#[doc = "Field `SINC` reader - Source Address Increment"] -pub type SINC_R = crate::FieldReader; #[doc = "Source Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SINC_A { +pub enum Sinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SINC_A) -> Self { + fn from(variant: Sinc) -> Self { variant as _ } } -impl crate::FieldSpec for SINC_A { +impl crate::FieldSpec for Sinc { type Ux = u8; } -impl SINC_R { +#[doc = "Field `SINC` reader - Source Address Increment"] +pub type SincR = crate::FieldReader; +impl SincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SINC_A::VALUE1), - 1 => Some(SINC_A::VALUE2), - 2 => Some(SINC_A::VALUE3), + 0 => Some(Sinc::Value1), + 1 => Some(Sinc::Value2), + 2 => Some(Sinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SINC_A::VALUE1 + *self == Sinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SINC_A::VALUE2 + *self == Sinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SINC_A::VALUE3 + *self == Sinc::Value3 } } #[doc = "Field `SINC` writer - Source Address Increment"] -pub type SINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SINC_A>; -impl<'a, REG> SINC_W<'a, REG> +pub type SincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sinc>; +impl<'a, REG> SincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,304 +145,295 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE1) + self.variant(Sinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE2) + self.variant(Sinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE3) + self.variant(Sinc::Value3) } } #[doc = "Field `DEST_MSIZE` reader - Destination Burst Transaction Length"] -pub type DEST_MSIZE_R = crate::FieldReader; +pub type DestMsizeR = crate::FieldReader; #[doc = "Field `DEST_MSIZE` writer - Destination Burst Transaction Length"] -pub type DEST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DestMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_MSIZE` reader - Source Burst Transaction Length"] -pub type SRC_MSIZE_R = crate::FieldReader; +pub type SrcMsizeR = crate::FieldReader; #[doc = "Field `SRC_MSIZE` writer - Source Burst Transaction Length"] -pub type SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `SRC_GATHER_EN` reader - Source gather enable"] -pub type SRC_GATHER_EN_R = crate::BitReader; +pub type SrcMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Source gather enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRC_GATHER_EN_A { +pub enum SrcGatherEn { #[doc = "0: Gather disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gather enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRC_GATHER_EN_A) -> Self { + fn from(variant: SrcGatherEn) -> Self { variant as u8 != 0 } } -impl SRC_GATHER_EN_R { +#[doc = "Field `SRC_GATHER_EN` reader - Source gather enable"] +pub type SrcGatherEnR = crate::BitReader; +impl SrcGatherEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRC_GATHER_EN_A { + pub const fn variant(&self) -> SrcGatherEn { match self.bits { - false => SRC_GATHER_EN_A::VALUE1, - true => SRC_GATHER_EN_A::VALUE2, + false => SrcGatherEn::Value1, + true => SrcGatherEn::Value2, } } #[doc = "Gather disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRC_GATHER_EN_A::VALUE1 + *self == SrcGatherEn::Value1 } #[doc = "Gather enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRC_GATHER_EN_A::VALUE2 + *self == SrcGatherEn::Value2 } } #[doc = "Field `SRC_GATHER_EN` writer - Source gather enable"] -pub type SRC_GATHER_EN_W<'a, REG> = crate::BitWriter<'a, REG, SRC_GATHER_EN_A>; -impl<'a, REG> SRC_GATHER_EN_W<'a, REG> +pub type SrcGatherEnW<'a, REG> = crate::BitWriter<'a, REG, SrcGatherEn>; +impl<'a, REG> SrcGatherEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Gather disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRC_GATHER_EN_A::VALUE1) + self.variant(SrcGatherEn::Value1) } #[doc = "Gather enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRC_GATHER_EN_A::VALUE2) + self.variant(SrcGatherEn::Value2) } } -#[doc = "Field `DST_SCATTER_EN` reader - Destination scatter enable"] -pub type DST_SCATTER_EN_R = crate::BitReader; #[doc = "Destination scatter enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DST_SCATTER_EN_A { +pub enum DstScatterEn { #[doc = "0: Scatter disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Scatter enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DST_SCATTER_EN_A) -> Self { + fn from(variant: DstScatterEn) -> Self { variant as u8 != 0 } } -impl DST_SCATTER_EN_R { +#[doc = "Field `DST_SCATTER_EN` reader - Destination scatter enable"] +pub type DstScatterEnR = crate::BitReader; +impl DstScatterEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DST_SCATTER_EN_A { + pub const fn variant(&self) -> DstScatterEn { match self.bits { - false => DST_SCATTER_EN_A::VALUE1, - true => DST_SCATTER_EN_A::VALUE2, + false => DstScatterEn::Value1, + true => DstScatterEn::Value2, } } #[doc = "Scatter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DST_SCATTER_EN_A::VALUE1 + *self == DstScatterEn::Value1 } #[doc = "Scatter enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DST_SCATTER_EN_A::VALUE2 + *self == DstScatterEn::Value2 } } #[doc = "Field `DST_SCATTER_EN` writer - Destination scatter enable"] -pub type DST_SCATTER_EN_W<'a, REG> = crate::BitWriter<'a, REG, DST_SCATTER_EN_A>; -impl<'a, REG> DST_SCATTER_EN_W<'a, REG> +pub type DstScatterEnW<'a, REG> = crate::BitWriter<'a, REG, DstScatterEn>; +impl<'a, REG> DstScatterEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Scatter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DST_SCATTER_EN_A::VALUE1) + self.variant(DstScatterEn::Value1) } #[doc = "Scatter enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DST_SCATTER_EN_A::VALUE2) + self.variant(DstScatterEn::Value2) } } #[doc = "Field `TT_FC` reader - Transfer Type and Flow Control"] -pub type TT_FC_R = crate::FieldReader; +pub type TtFcR = crate::FieldReader; #[doc = "Field `TT_FC` writer - Transfer Type and Flow Control"] -pub type TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TtFcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `LLP_DST_EN` reader - Linked List Pointer for Destination Enable"] -pub type LLP_DST_EN_R = crate::BitReader; +pub type LlpDstEnR = crate::BitReader; #[doc = "Field `LLP_DST_EN` writer - Linked List Pointer for Destination Enable"] -pub type LLP_DST_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LlpDstEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LLP_SRC_EN` reader - Linked List Pointer for Source Enable"] -pub type LLP_SRC_EN_R = crate::BitReader; +pub type LlpSrcEnR = crate::BitReader; #[doc = "Field `LLP_SRC_EN` writer - Linked List Pointer for Source Enable"] -pub type LLP_SRC_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LlpSrcEnW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - pub fn int_en(&self) -> INT_EN_R { - INT_EN_R::new((self.bits & 1) != 0) + pub fn int_en(&self) -> IntEnR { + IntEnR::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { - DST_TR_WIDTH_R::new(((self.bits >> 1) & 7) as u8) + pub fn dst_tr_width(&self) -> DstTrWidthR { + DstTrWidthR::new(((self.bits >> 1) & 7) as u8) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { - SRC_TR_WIDTH_R::new(((self.bits >> 4) & 7) as u8) + pub fn src_tr_width(&self) -> SrcTrWidthR { + SrcTrWidthR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - pub fn dinc(&self) -> DINC_R { - DINC_R::new(((self.bits >> 7) & 3) as u8) + pub fn dinc(&self) -> DincR { + DincR::new(((self.bits >> 7) & 3) as u8) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - pub fn sinc(&self) -> SINC_R { - SINC_R::new(((self.bits >> 9) & 3) as u8) + pub fn sinc(&self) -> SincR { + SincR::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - pub fn dest_msize(&self) -> DEST_MSIZE_R { - DEST_MSIZE_R::new(((self.bits >> 11) & 7) as u8) + pub fn dest_msize(&self) -> DestMsizeR { + DestMsizeR::new(((self.bits >> 11) & 7) as u8) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - pub fn src_msize(&self) -> SRC_MSIZE_R { - SRC_MSIZE_R::new(((self.bits >> 14) & 7) as u8) + pub fn src_msize(&self) -> SrcMsizeR { + SrcMsizeR::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bit 17 - Source gather enable"] #[inline(always)] - pub fn src_gather_en(&self) -> SRC_GATHER_EN_R { - SRC_GATHER_EN_R::new(((self.bits >> 17) & 1) != 0) + pub fn src_gather_en(&self) -> SrcGatherEnR { + SrcGatherEnR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination scatter enable"] #[inline(always)] - pub fn dst_scatter_en(&self) -> DST_SCATTER_EN_R { - DST_SCATTER_EN_R::new(((self.bits >> 18) & 1) != 0) + pub fn dst_scatter_en(&self) -> DstScatterEnR { + DstScatterEnR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - pub fn tt_fc(&self) -> TT_FC_R { - TT_FC_R::new(((self.bits >> 20) & 7) as u8) + pub fn tt_fc(&self) -> TtFcR { + TtFcR::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 27 - Linked List Pointer for Destination Enable"] #[inline(always)] - pub fn llp_dst_en(&self) -> LLP_DST_EN_R { - LLP_DST_EN_R::new(((self.bits >> 27) & 1) != 0) + pub fn llp_dst_en(&self) -> LlpDstEnR { + LlpDstEnR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Linked List Pointer for Source Enable"] #[inline(always)] - pub fn llp_src_en(&self) -> LLP_SRC_EN_R { - LLP_SRC_EN_R::new(((self.bits >> 28) & 1) != 0) + pub fn llp_src_en(&self) -> LlpSrcEnR { + LlpSrcEnR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] #[must_use] - pub fn int_en(&mut self) -> INT_EN_W { - INT_EN_W::new(self, 0) + pub fn int_en(&mut self) -> IntEnW { + IntEnW::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] #[must_use] - pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { - DST_TR_WIDTH_W::new(self, 1) + pub fn dst_tr_width(&mut self) -> DstTrWidthW { + DstTrWidthW::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] #[must_use] - pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { - SRC_TR_WIDTH_W::new(self, 4) + pub fn src_tr_width(&mut self) -> SrcTrWidthW { + SrcTrWidthW::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] #[must_use] - pub fn dinc(&mut self) -> DINC_W { - DINC_W::new(self, 7) + pub fn dinc(&mut self) -> DincW { + DincW::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] #[must_use] - pub fn sinc(&mut self) -> SINC_W { - SINC_W::new(self, 9) + pub fn sinc(&mut self) -> SincW { + SincW::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn dest_msize(&mut self) -> DEST_MSIZE_W { - DEST_MSIZE_W::new(self, 11) + pub fn dest_msize(&mut self) -> DestMsizeW { + DestMsizeW::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn src_msize(&mut self) -> SRC_MSIZE_W { - SRC_MSIZE_W::new(self, 14) + pub fn src_msize(&mut self) -> SrcMsizeW { + SrcMsizeW::new(self, 14) } #[doc = "Bit 17 - Source gather enable"] #[inline(always)] #[must_use] - pub fn src_gather_en(&mut self) -> SRC_GATHER_EN_W { - SRC_GATHER_EN_W::new(self, 17) + pub fn src_gather_en(&mut self) -> SrcGatherEnW { + SrcGatherEnW::new(self, 17) } #[doc = "Bit 18 - Destination scatter enable"] #[inline(always)] #[must_use] - pub fn dst_scatter_en(&mut self) -> DST_SCATTER_EN_W { - DST_SCATTER_EN_W::new(self, 18) + pub fn dst_scatter_en(&mut self) -> DstScatterEnW { + DstScatterEnW::new(self, 18) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] #[must_use] - pub fn tt_fc(&mut self) -> TT_FC_W { - TT_FC_W::new(self, 20) + pub fn tt_fc(&mut self) -> TtFcW { + TtFcW::new(self, 20) } #[doc = "Bit 27 - Linked List Pointer for Destination Enable"] #[inline(always)] #[must_use] - pub fn llp_dst_en(&mut self) -> LLP_DST_EN_W { - LLP_DST_EN_W::new(self, 27) + pub fn llp_dst_en(&mut self) -> LlpDstEnW { + LlpDstEnW::new(self, 27) } #[doc = "Bit 28 - Linked List Pointer for Source Enable"] #[inline(always)] #[must_use] - pub fn llp_src_en(&mut self) -> LLP_SRC_EN_W { - LLP_SRC_EN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn llp_src_en(&mut self) -> LlpSrcEnW { + LlpSrcEnW::new(self, 28) } } #[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLL_SPEC; -impl crate::RegisterSpec for CTLL_SPEC { +pub struct CtllSpec; +impl crate::RegisterSpec for CtllSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctll::R`](R) reader structure"] -impl crate::Readable for CTLL_SPEC {} +impl crate::Readable for CtllSpec {} #[doc = "`write(|w| ..)` method takes [`ctll::W`](W) writer structure"] -impl crate::Writable for CTLL_SPEC { +impl crate::Writable for CtllSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLL to value 0x0030_4801"] -impl crate::Resettable for CTLL_SPEC { +impl crate::Resettable for CtllSpec { const RESET_VALUE: u32 = 0x0030_4801; } diff --git a/src/gpdma0_ch0/dar.rs b/src/gpdma0_ch0/dar.rs index e65cf651..c29a247f 100644 --- a/src/gpdma0_ch0/dar.rs +++ b/src/gpdma0_ch0/dar.rs @@ -1,49 +1,40 @@ #[doc = "Register `DAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAR` reader - Current Destination address of DMA transfer"] -pub type DAR_R = crate::FieldReader; +pub type DarR = crate::FieldReader; #[doc = "Field `DAR` writer - Current Destination address of DMA transfer"] -pub type DAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - pub fn dar(&self) -> DAR_R { - DAR_R::new(self.bits) + pub fn dar(&self) -> DarR { + DarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] #[must_use] - pub fn dar(&mut self) -> DAR_W { - DAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dar(&mut self) -> DarW { + DarW::new(self, 0) } } #[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAR_SPEC; -impl crate::RegisterSpec for DAR_SPEC { +pub struct DarSpec; +impl crate::RegisterSpec for DarSpec { type Ux = u32; } #[doc = "`read()` method returns [`dar::R`](R) reader structure"] -impl crate::Readable for DAR_SPEC {} +impl crate::Readable for DarSpec {} #[doc = "`write(|w| ..)` method takes [`dar::W`](W) writer structure"] -impl crate::Writable for DAR_SPEC { +impl crate::Writable for DarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAR to value 0"] -impl crate::Resettable for DAR_SPEC { +impl crate::Resettable for DarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dsr.rs b/src/gpdma0_ch0/dsr.rs index 04ca94a8..e8fb90ca 100644 --- a/src/gpdma0_ch0/dsr.rs +++ b/src/gpdma0_ch0/dsr.rs @@ -1,64 +1,55 @@ #[doc = "Register `DSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSI` reader - Destination scatter interval"] -pub type DSI_R = crate::FieldReader; +pub type DsiR = crate::FieldReader; #[doc = "Field `DSI` writer - Destination scatter interval"] -pub type DSI_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type DsiW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `DSC` reader - Destination scatter count"] -pub type DSC_R = crate::FieldReader; +pub type DscR = crate::FieldReader; #[doc = "Field `DSC` writer - Destination scatter count"] -pub type DSC_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DscW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:19 - Destination scatter interval"] #[inline(always)] - pub fn dsi(&self) -> DSI_R { - DSI_R::new(self.bits & 0x000f_ffff) + pub fn dsi(&self) -> DsiR { + DsiR::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:31 - Destination scatter count"] #[inline(always)] - pub fn dsc(&self) -> DSC_R { - DSC_R::new(((self.bits >> 20) & 0x0fff) as u16) + pub fn dsc(&self) -> DscR { + DscR::new(((self.bits >> 20) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:19 - Destination scatter interval"] #[inline(always)] #[must_use] - pub fn dsi(&mut self) -> DSI_W { - DSI_W::new(self, 0) + pub fn dsi(&mut self) -> DsiW { + DsiW::new(self, 0) } #[doc = "Bits 20:31 - Destination scatter count"] #[inline(always)] #[must_use] - pub fn dsc(&mut self) -> DSC_W { - DSC_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dsc(&mut self) -> DscW { + DscW::new(self, 20) } } #[doc = "Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DSR_SPEC; -impl crate::RegisterSpec for DSR_SPEC { +pub struct DsrSpec; +impl crate::RegisterSpec for DsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`dsr::R`](R) reader structure"] -impl crate::Readable for DSR_SPEC {} +impl crate::Readable for DsrSpec {} #[doc = "`write(|w| ..)` method takes [`dsr::W`](W) writer structure"] -impl crate::Writable for DSR_SPEC { +impl crate::Writable for DsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSR to value 0"] -impl crate::Resettable for DSR_SPEC { +impl crate::Resettable for DsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dstat.rs b/src/gpdma0_ch0/dstat.rs index 8e7d00ed..b9c36c84 100644 --- a/src/gpdma0_ch0/dstat.rs +++ b/src/gpdma0_ch0/dstat.rs @@ -1,49 +1,40 @@ #[doc = "Register `DSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSTAT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSTAT` reader - Destination Status"] -pub type DSTAT_R = crate::FieldReader; +pub type DstatR = crate::FieldReader; #[doc = "Field `DSTAT` writer - Destination Status"] -pub type DSTAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DstatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Status"] #[inline(always)] - pub fn dstat(&self) -> DSTAT_R { - DSTAT_R::new(self.bits) + pub fn dstat(&self) -> DstatR { + DstatR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Status"] #[inline(always)] #[must_use] - pub fn dstat(&mut self) -> DSTAT_W { - DSTAT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dstat(&mut self) -> DstatW { + DstatW::new(self, 0) } } #[doc = "Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DSTAT_SPEC; -impl crate::RegisterSpec for DSTAT_SPEC { +pub struct DstatSpec; +impl crate::RegisterSpec for DstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`dstat::R`](R) reader structure"] -impl crate::Readable for DSTAT_SPEC {} +impl crate::Readable for DstatSpec {} #[doc = "`write(|w| ..)` method takes [`dstat::W`](W) writer structure"] -impl crate::Writable for DSTAT_SPEC { +impl crate::Writable for DstatSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSTAT to value 0"] -impl crate::Resettable for DSTAT_SPEC { +impl crate::Resettable for DstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dstatar.rs b/src/gpdma0_ch0/dstatar.rs index e84b0d07..50b3aa7a 100644 --- a/src/gpdma0_ch0/dstatar.rs +++ b/src/gpdma0_ch0/dstatar.rs @@ -1,49 +1,40 @@ #[doc = "Register `DSTATAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSTATAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSTATAR` reader - Destination Status Address"] -pub type DSTATAR_R = crate::FieldReader; +pub type DstatarR = crate::FieldReader; #[doc = "Field `DSTATAR` writer - Destination Status Address"] -pub type DSTATAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DstatarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Status Address"] #[inline(always)] - pub fn dstatar(&self) -> DSTATAR_R { - DSTATAR_R::new(self.bits) + pub fn dstatar(&self) -> DstatarR { + DstatarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Status Address"] #[inline(always)] #[must_use] - pub fn dstatar(&mut self) -> DSTATAR_W { - DSTATAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dstatar(&mut self) -> DstatarW { + DstatarW::new(self, 0) } } #[doc = "Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DSTATAR_SPEC; -impl crate::RegisterSpec for DSTATAR_SPEC { +pub struct DstatarSpec; +impl crate::RegisterSpec for DstatarSpec { type Ux = u32; } #[doc = "`read()` method returns [`dstatar::R`](R) reader structure"] -impl crate::Readable for DSTATAR_SPEC {} +impl crate::Readable for DstatarSpec {} #[doc = "`write(|w| ..)` method takes [`dstatar::W`](W) writer structure"] -impl crate::Writable for DSTATAR_SPEC { +impl crate::Writable for DstatarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSTATAR to value 0"] -impl crate::Resettable for DSTATAR_SPEC { +impl crate::Resettable for DstatarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/llp.rs b/src/gpdma0_ch0/llp.rs index 533fab0a..decbe30e 100644 --- a/src/gpdma0_ch0/llp.rs +++ b/src/gpdma0_ch0/llp.rs @@ -1,49 +1,40 @@ #[doc = "Register `LLP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LLP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LOC` reader - Starting Address In Memory"] -pub type LOC_R = crate::FieldReader; +pub type LocR = crate::FieldReader; #[doc = "Field `LOC` writer - Starting Address In Memory"] -pub type LOC_W<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; +pub type LocW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bits 2:31 - Starting Address In Memory"] #[inline(always)] - pub fn loc(&self) -> LOC_R { - LOC_R::new((self.bits >> 2) & 0x3fff_ffff) + pub fn loc(&self) -> LocR { + LocR::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bits 2:31 - Starting Address In Memory"] #[inline(always)] #[must_use] - pub fn loc(&mut self) -> LOC_W { - LOC_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn loc(&mut self) -> LocW { + LocW::new(self, 2) } } #[doc = "Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LLP_SPEC; -impl crate::RegisterSpec for LLP_SPEC { +pub struct LlpSpec; +impl crate::RegisterSpec for LlpSpec { type Ux = u32; } #[doc = "`read()` method returns [`llp::R`](R) reader structure"] -impl crate::Readable for LLP_SPEC {} +impl crate::Readable for LlpSpec {} #[doc = "`write(|w| ..)` method takes [`llp::W`](W) writer structure"] -impl crate::Writable for LLP_SPEC { +impl crate::Writable for LlpSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LLP to value 0"] -impl crate::Resettable for LLP_SPEC { +impl crate::Resettable for LlpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sar.rs b/src/gpdma0_ch0/sar.rs index 156571e6..cf5b145b 100644 --- a/src/gpdma0_ch0/sar.rs +++ b/src/gpdma0_ch0/sar.rs @@ -1,49 +1,40 @@ #[doc = "Register `SAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SAR` reader - Current Source Address of DMA transfer"] -pub type SAR_R = crate::FieldReader; +pub type SarR = crate::FieldReader; #[doc = "Field `SAR` writer - Current Source Address of DMA transfer"] -pub type SAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - pub fn sar(&self) -> SAR_R { - SAR_R::new(self.bits) + pub fn sar(&self) -> SarR { + SarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] #[must_use] - pub fn sar(&mut self) -> SAR_W { - SAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sar(&mut self) -> SarW { + SarW::new(self, 0) } } #[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SAR_SPEC; -impl crate::RegisterSpec for SAR_SPEC { +pub struct SarSpec; +impl crate::RegisterSpec for SarSpec { type Ux = u32; } #[doc = "`read()` method returns [`sar::R`](R) reader structure"] -impl crate::Readable for SAR_SPEC {} +impl crate::Readable for SarSpec {} #[doc = "`write(|w| ..)` method takes [`sar::W`](W) writer structure"] -impl crate::Writable for SAR_SPEC { +impl crate::Writable for SarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAR to value 0"] -impl crate::Resettable for SAR_SPEC { +impl crate::Resettable for SarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sgr.rs b/src/gpdma0_ch0/sgr.rs index d313a0a6..69c6079a 100644 --- a/src/gpdma0_ch0/sgr.rs +++ b/src/gpdma0_ch0/sgr.rs @@ -1,64 +1,55 @@ #[doc = "Register `SGR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SGI` reader - Source gather interval"] -pub type SGI_R = crate::FieldReader; +pub type SgiR = crate::FieldReader; #[doc = "Field `SGI` writer - Source gather interval"] -pub type SGI_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type SgiW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `SGC` reader - Source gather count"] -pub type SGC_R = crate::FieldReader; +pub type SgcR = crate::FieldReader; #[doc = "Field `SGC` writer - Source gather count"] -pub type SGC_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type SgcW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:19 - Source gather interval"] #[inline(always)] - pub fn sgi(&self) -> SGI_R { - SGI_R::new(self.bits & 0x000f_ffff) + pub fn sgi(&self) -> SgiR { + SgiR::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:31 - Source gather count"] #[inline(always)] - pub fn sgc(&self) -> SGC_R { - SGC_R::new(((self.bits >> 20) & 0x0fff) as u16) + pub fn sgc(&self) -> SgcR { + SgcR::new(((self.bits >> 20) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:19 - Source gather interval"] #[inline(always)] #[must_use] - pub fn sgi(&mut self) -> SGI_W { - SGI_W::new(self, 0) + pub fn sgi(&mut self) -> SgiW { + SgiW::new(self, 0) } #[doc = "Bits 20:31 - Source gather count"] #[inline(always)] #[must_use] - pub fn sgc(&mut self) -> SGC_W { - SGC_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sgc(&mut self) -> SgcW { + SgcW::new(self, 20) } } #[doc = "Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SGR_SPEC; -impl crate::RegisterSpec for SGR_SPEC { +pub struct SgrSpec; +impl crate::RegisterSpec for SgrSpec { type Ux = u32; } #[doc = "`read()` method returns [`sgr::R`](R) reader structure"] -impl crate::Readable for SGR_SPEC {} +impl crate::Readable for SgrSpec {} #[doc = "`write(|w| ..)` method takes [`sgr::W`](W) writer structure"] -impl crate::Writable for SGR_SPEC { +impl crate::Writable for SgrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGR to value 0"] -impl crate::Resettable for SGR_SPEC { +impl crate::Resettable for SgrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sstat.rs b/src/gpdma0_ch0/sstat.rs index 2c569649..8082f02d 100644 --- a/src/gpdma0_ch0/sstat.rs +++ b/src/gpdma0_ch0/sstat.rs @@ -1,49 +1,40 @@ #[doc = "Register `SSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SSTAT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SSTAT` reader - Source Status"] -pub type SSTAT_R = crate::FieldReader; +pub type SstatR = crate::FieldReader; #[doc = "Field `SSTAT` writer - Source Status"] -pub type SSTAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SstatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Status"] #[inline(always)] - pub fn sstat(&self) -> SSTAT_R { - SSTAT_R::new(self.bits) + pub fn sstat(&self) -> SstatR { + SstatR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Status"] #[inline(always)] #[must_use] - pub fn sstat(&mut self) -> SSTAT_W { - SSTAT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sstat(&mut self) -> SstatW { + SstatW::new(self, 0) } } #[doc = "Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SSTAT_SPEC; -impl crate::RegisterSpec for SSTAT_SPEC { +pub struct SstatSpec; +impl crate::RegisterSpec for SstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`sstat::R`](R) reader structure"] -impl crate::Readable for SSTAT_SPEC {} +impl crate::Readable for SstatSpec {} #[doc = "`write(|w| ..)` method takes [`sstat::W`](W) writer structure"] -impl crate::Writable for SSTAT_SPEC { +impl crate::Writable for SstatSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SSTAT to value 0"] -impl crate::Resettable for SSTAT_SPEC { +impl crate::Resettable for SstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sstatar.rs b/src/gpdma0_ch0/sstatar.rs index e6063a53..cbf9847c 100644 --- a/src/gpdma0_ch0/sstatar.rs +++ b/src/gpdma0_ch0/sstatar.rs @@ -1,49 +1,40 @@ #[doc = "Register `SSTATAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SSTATAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SSTATAR` reader - Source Status Address"] -pub type SSTATAR_R = crate::FieldReader; +pub type SstatarR = crate::FieldReader; #[doc = "Field `SSTATAR` writer - Source Status Address"] -pub type SSTATAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SstatarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Status Address"] #[inline(always)] - pub fn sstatar(&self) -> SSTATAR_R { - SSTATAR_R::new(self.bits) + pub fn sstatar(&self) -> SstatarR { + SstatarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Status Address"] #[inline(always)] #[must_use] - pub fn sstatar(&mut self) -> SSTATAR_W { - SSTATAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sstatar(&mut self) -> SstatarW { + SstatarW::new(self, 0) } } #[doc = "Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SSTATAR_SPEC; -impl crate::RegisterSpec for SSTATAR_SPEC { +pub struct SstatarSpec; +impl crate::RegisterSpec for SstatarSpec { type Ux = u32; } #[doc = "`read()` method returns [`sstatar::R`](R) reader structure"] -impl crate::Readable for SSTATAR_SPEC {} +impl crate::Readable for SstatarSpec {} #[doc = "`write(|w| ..)` method takes [`sstatar::W`](W) writer structure"] -impl crate::Writable for SSTATAR_SPEC { +impl crate::Writable for SstatarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SSTATAR to value 0"] -impl crate::Resettable for SSTATAR_SPEC { +impl crate::Resettable for SstatarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch2.rs b/src/gpdma0_ch2.rs index 92db00c3..6850653c 100644 --- a/src/gpdma0_ch2.rs +++ b/src/gpdma0_ch2.rs @@ -1,75 +1,81 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sar: SAR, + sar: Sar, _reserved1: [u8; 0x04], - dar: DAR, + dar: Dar, _reserved2: [u8; 0x0c], - ctll: CTLL, - ctlh: CTLH, + ctll: Ctll, + ctlh: Ctlh, _reserved4: [u8; 0x20], - cfgl: CFGL, - cfgh: CFGH, + cfgl: Cfgl, + cfgh: Cfgh, } impl RegisterBlock { #[doc = "0x00 - Source Address Register"] #[inline(always)] - pub const fn sar(&self) -> &SAR { + pub const fn sar(&self) -> &Sar { &self.sar } #[doc = "0x08 - Destination Address Register"] #[inline(always)] - pub const fn dar(&self) -> &DAR { + pub const fn dar(&self) -> &Dar { &self.dar } #[doc = "0x18 - Control Register Low"] #[inline(always)] - pub const fn ctll(&self) -> &CTLL { + pub const fn ctll(&self) -> &Ctll { &self.ctll } #[doc = "0x1c - Control Register High"] #[inline(always)] - pub const fn ctlh(&self) -> &CTLH { + pub const fn ctlh(&self) -> &Ctlh { &self.ctlh } #[doc = "0x40 - Configuration Register Low"] #[inline(always)] - pub const fn cfgl(&self) -> &CFGL { + pub const fn cfgl(&self) -> &Cfgl { &self.cfgl } #[doc = "0x44 - Configuration Register High"] #[inline(always)] - pub const fn cfgh(&self) -> &CFGH { + pub const fn cfgh(&self) -> &Cfgh { &self.cfgh } } #[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] -pub type SAR = crate::Reg; +#[doc(alias = "SAR")] +pub type Sar = crate::Reg; #[doc = "Source Address Register"] pub mod sar; #[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] -pub type DAR = crate::Reg; +#[doc(alias = "DAR")] +pub type Dar = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; #[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] -pub type CTLL = crate::Reg; +#[doc(alias = "CTLL")] +pub type Ctll = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; #[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] -pub type CTLH = crate::Reg; +#[doc(alias = "CTLH")] +pub type Ctlh = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; #[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] -pub type CFGL = crate::Reg; +#[doc(alias = "CFGL")] +pub type Cfgl = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; #[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] -pub type CFGH = crate::Reg; +#[doc(alias = "CFGH")] +pub type Cfgh = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; diff --git a/src/gpdma0_ch2/cfgh.rs b/src/gpdma0_ch2/cfgh.rs index 8f1fc507..32adc452 100644 --- a/src/gpdma0_ch2/cfgh.rs +++ b/src/gpdma0_ch2/cfgh.rs @@ -1,207 +1,198 @@ #[doc = "Register `CFGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGH` writer"] -pub type W = crate::W; -#[doc = "Field `FCMODE` reader - Flow Control Mode"] -pub type FCMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Flow Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCMODE_A { +pub enum Fcmode { #[doc = "0: Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCMODE_A) -> Self { + fn from(variant: Fcmode) -> Self { variant as u8 != 0 } } -impl FCMODE_R { +#[doc = "Field `FCMODE` reader - Flow Control Mode"] +pub type FcmodeR = crate::BitReader; +impl FcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCMODE_A { + pub const fn variant(&self) -> Fcmode { match self.bits { - false => FCMODE_A::VALUE1, - true => FCMODE_A::VALUE2, + false => Fcmode::Value1, + true => Fcmode::Value2, } } #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCMODE_A::VALUE1 + *self == Fcmode::Value1 } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCMODE_A::VALUE2 + *self == Fcmode::Value2 } } #[doc = "Field `FCMODE` writer - Flow Control Mode"] -pub type FCMODE_W<'a, REG> = crate::BitWriter<'a, REG, FCMODE_A>; -impl<'a, REG> FCMODE_W<'a, REG> +pub type FcmodeW<'a, REG> = crate::BitWriter<'a, REG, Fcmode>; +impl<'a, REG> FcmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE1) + self.variant(Fcmode::Value1) } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE2) + self.variant(Fcmode::Value2) } } -#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] -pub type FIFO_MODE_R = crate::BitReader; #[doc = "FIFO Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_MODE_A { +pub enum FifoMode { #[doc = "0: Space/data available for single AHB transfer of the specified transfer width."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_MODE_A) -> Self { + fn from(variant: FifoMode) -> Self { variant as u8 != 0 } } -impl FIFO_MODE_R { +#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] +pub type FifoModeR = crate::BitReader; +impl FifoModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_MODE_A { + pub const fn variant(&self) -> FifoMode { match self.bits { - false => FIFO_MODE_A::VALUE1, - true => FIFO_MODE_A::VALUE2, + false => FifoMode::Value1, + true => FifoMode::Value2, } } #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_MODE_A::VALUE1 + *self == FifoMode::Value1 } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_MODE_A::VALUE2 + *self == FifoMode::Value2 } } #[doc = "Field `FIFO_MODE` writer - FIFO Mode Select"] -pub type FIFO_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FIFO_MODE_A>; -impl<'a, REG> FIFO_MODE_W<'a, REG> +pub type FifoModeW<'a, REG> = crate::BitWriter<'a, REG, FifoMode>; +impl<'a, REG> FifoModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE1) + self.variant(FifoMode::Value1) } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE2) + self.variant(FifoMode::Value2) } } #[doc = "Field `PROTCTL` reader - Protection Control"] -pub type PROTCTL_R = crate::FieldReader; +pub type ProtctlR = crate::FieldReader; #[doc = "Field `PROTCTL` writer - Protection Control"] -pub type PROTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type ProtctlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_PER` reader - Source Peripheral"] -pub type SRC_PER_R = crate::FieldReader; +pub type SrcPerR = crate::FieldReader; #[doc = "Field `SRC_PER` writer - Source Peripheral"] -pub type SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SrcPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `DEST_PER` reader - Destination Peripheral"] -pub type DEST_PER_R = crate::FieldReader; +pub type DestPerR = crate::FieldReader; #[doc = "Field `DEST_PER` writer - Destination Peripheral"] -pub type DEST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DestPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - pub fn fcmode(&self) -> FCMODE_R { - FCMODE_R::new((self.bits & 1) != 0) + pub fn fcmode(&self) -> FcmodeR { + FcmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - pub fn fifo_mode(&self) -> FIFO_MODE_R { - FIFO_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn fifo_mode(&self) -> FifoModeR { + FifoModeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - pub fn protctl(&self) -> PROTCTL_R { - PROTCTL_R::new(((self.bits >> 2) & 7) as u8) + pub fn protctl(&self) -> ProtctlR { + ProtctlR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - pub fn src_per(&self) -> SRC_PER_R { - SRC_PER_R::new(((self.bits >> 7) & 0x0f) as u8) + pub fn src_per(&self) -> SrcPerR { + SrcPerR::new(((self.bits >> 7) & 0x0f) as u8) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - pub fn dest_per(&self) -> DEST_PER_R { - DEST_PER_R::new(((self.bits >> 11) & 0x0f) as u8) + pub fn dest_per(&self) -> DestPerR { + DestPerR::new(((self.bits >> 11) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] #[must_use] - pub fn fcmode(&mut self) -> FCMODE_W { - FCMODE_W::new(self, 0) + pub fn fcmode(&mut self) -> FcmodeW { + FcmodeW::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] #[must_use] - pub fn fifo_mode(&mut self) -> FIFO_MODE_W { - FIFO_MODE_W::new(self, 1) + pub fn fifo_mode(&mut self) -> FifoModeW { + FifoModeW::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] #[must_use] - pub fn protctl(&mut self) -> PROTCTL_W { - PROTCTL_W::new(self, 2) + pub fn protctl(&mut self) -> ProtctlW { + ProtctlW::new(self, 2) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] #[must_use] - pub fn src_per(&mut self) -> SRC_PER_W { - SRC_PER_W::new(self, 7) + pub fn src_per(&mut self) -> SrcPerW { + SrcPerW::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] #[must_use] - pub fn dest_per(&mut self) -> DEST_PER_W { - DEST_PER_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dest_per(&mut self) -> DestPerW { + DestPerW::new(self, 11) } } #[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGH_SPEC; -impl crate::RegisterSpec for CFGH_SPEC { +pub struct CfghSpec; +impl crate::RegisterSpec for CfghSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgh::R`](R) reader structure"] -impl crate::Readable for CFGH_SPEC {} +impl crate::Readable for CfghSpec {} #[doc = "`write(|w| ..)` method takes [`cfgh::W`](W) writer structure"] -impl crate::Writable for CFGH_SPEC { +impl crate::Writable for CfghSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGH to value 0x04"] -impl crate::Resettable for CFGH_SPEC { +impl crate::Resettable for CfghSpec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/gpdma0_ch2/cfgl.rs b/src/gpdma0_ch2/cfgl.rs index 82587518..665f6e76 100644 --- a/src/gpdma0_ch2/cfgl.rs +++ b/src/gpdma0_ch2/cfgl.rs @@ -1,258 +1,258 @@ #[doc = "Register `CFGL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH_PRIOR` reader - Channel priority"] -pub type CH_PRIOR_R = crate::FieldReader; +pub type ChPriorR = crate::FieldReader; #[doc = "Field `CH_PRIOR` writer - Channel priority"] -pub type CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `CH_SUSP` reader - Channel Suspend"] -pub type CH_SUSP_R = crate::BitReader; +pub type ChPriorW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Channel Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH_SUSP_A { +pub enum ChSusp { #[doc = "0: Not suspended."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Suspend DMA transfer from the source."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH_SUSP_A) -> Self { + fn from(variant: ChSusp) -> Self { variant as u8 != 0 } } -impl CH_SUSP_R { +#[doc = "Field `CH_SUSP` reader - Channel Suspend"] +pub type ChSuspR = crate::BitReader; +impl ChSuspR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH_SUSP_A { + pub const fn variant(&self) -> ChSusp { match self.bits { - false => CH_SUSP_A::VALUE1, - true => CH_SUSP_A::VALUE2, + false => ChSusp::Value1, + true => ChSusp::Value2, } } #[doc = "Not suspended."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_SUSP_A::VALUE1 + *self == ChSusp::Value1 } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_SUSP_A::VALUE2 + *self == ChSusp::Value2 } } #[doc = "Field `CH_SUSP` writer - Channel Suspend"] -pub type CH_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, CH_SUSP_A>; -impl<'a, REG> CH_SUSP_W<'a, REG> +pub type ChSuspW<'a, REG> = crate::BitWriter<'a, REG, ChSusp>; +impl<'a, REG> ChSuspW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not suspended."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE1) + self.variant(ChSusp::Value1) } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE2) + self.variant(ChSusp::Value2) } } -#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] -pub type FIFO_EMPTY_R = crate::BitReader; #[doc = "Indicates if there is data left in the channel FIFO\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_EMPTY_A { +pub enum FifoEmpty { #[doc = "1: Channel FIFO empty"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: Channel FIFO not empty"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_EMPTY_A) -> Self { + fn from(variant: FifoEmpty) -> Self { variant as u8 != 0 } } -impl FIFO_EMPTY_R { +#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] +pub type FifoEmptyR = crate::BitReader; +impl FifoEmptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_EMPTY_A { + pub const fn variant(&self) -> FifoEmpty { match self.bits { - true => FIFO_EMPTY_A::VALUE1, - false => FIFO_EMPTY_A::VALUE2, + true => FifoEmpty::Value1, + false => FifoEmpty::Value2, } } #[doc = "Channel FIFO empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE1 + *self == FifoEmpty::Value1 } #[doc = "Channel FIFO not empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE2 + *self == FifoEmpty::Value2 } } -#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_R = crate::BitReader; #[doc = "Destination Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_DST_A { +pub enum HsSelDst { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware- initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_DST_A) -> Self { + fn from(variant: HsSelDst) -> Self { variant as u8 != 0 } } -impl HS_SEL_DST_R { +#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] +pub type HsSelDstR = crate::BitReader; +impl HsSelDstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_DST_A { + pub const fn variant(&self) -> HsSelDst { match self.bits { - false => HS_SEL_DST_A::VALUE1, - true => HS_SEL_DST_A::VALUE2, + false => HsSelDst::Value1, + true => HsSelDst::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_DST_A::VALUE1 + *self == HsSelDst::Value1 } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_DST_A::VALUE2 + *self == HsSelDst::Value2 } } #[doc = "Field `HS_SEL_DST` writer - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_DST_A>; -impl<'a, REG> HS_SEL_DST_W<'a, REG> +pub type HsSelDstW<'a, REG> = crate::BitWriter<'a, REG, HsSelDst>; +impl<'a, REG> HsSelDstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE1) + self.variant(HsSelDst::Value1) } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE2) + self.variant(HsSelDst::Value2) } } -#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_R = crate::BitReader; #[doc = "Source Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_SRC_A { +pub enum HsSelSrc { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware-initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_SRC_A) -> Self { + fn from(variant: HsSelSrc) -> Self { variant as u8 != 0 } } -impl HS_SEL_SRC_R { +#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] +pub type HsSelSrcR = crate::BitReader; +impl HsSelSrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_SRC_A { + pub const fn variant(&self) -> HsSelSrc { match self.bits { - false => HS_SEL_SRC_A::VALUE1, - true => HS_SEL_SRC_A::VALUE2, + false => HsSelSrc::Value1, + true => HsSelSrc::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE1 + *self == HsSelSrc::Value1 } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE2 + *self == HsSelSrc::Value2 } } #[doc = "Field `HS_SEL_SRC` writer - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_SRC_A>; -impl<'a, REG> HS_SEL_SRC_W<'a, REG> +pub type HsSelSrcW<'a, REG> = crate::BitWriter<'a, REG, HsSelSrc>; +impl<'a, REG> HsSelSrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE1) + self.variant(HsSelSrc::Value1) } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE2) + self.variant(HsSelSrc::Value2) } } -#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] -pub type LOCK_CH_L_R = crate::FieldReader; #[doc = "Channel Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_CH_L_A { +pub enum LockChL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_CH_L_A) -> Self { + fn from(variant: LockChL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_CH_L_A { +impl crate::FieldSpec for LockChL { type Ux = u8; } -impl LOCK_CH_L_R { +#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] +pub type LockChLR = crate::FieldReader; +impl LockChLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_CH_L_A::VALUE1), - 1 => Some(LOCK_CH_L_A::VALUE2), - 2 => Some(LOCK_CH_L_A::VALUE3), + 0 => Some(LockChL::Value1), + 1 => Some(LockChL::Value2), + 2 => Some(LockChL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_CH_L_A::VALUE1 + *self == LockChL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_CH_L_A::VALUE2 + *self == LockChL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_CH_L_A::VALUE3 + *self == LockChL::Value3 } } #[doc = "Field `LOCK_CH_L` writer - Channel Lock Level"] -pub type LOCK_CH_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_CH_L_A>; -impl<'a, REG> LOCK_CH_L_W<'a, REG> +pub type LockChLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockChL>; +impl<'a, REG> LockChLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,71 +260,71 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE1) + self.variant(LockChL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE2) + self.variant(LockChL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE3) + self.variant(LockChL::Value3) } } -#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] -pub type LOCK_B_L_R = crate::FieldReader; #[doc = "Bus Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_B_L_A { +pub enum LockBL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_B_L_A) -> Self { + fn from(variant: LockBL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_B_L_A { +impl crate::FieldSpec for LockBL { type Ux = u8; } -impl LOCK_B_L_R { +#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] +pub type LockBLR = crate::FieldReader; +impl LockBLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_B_L_A::VALUE1), - 1 => Some(LOCK_B_L_A::VALUE2), - 2 => Some(LOCK_B_L_A::VALUE3), + 0 => Some(LockBL::Value1), + 1 => Some(LockBL::Value2), + 2 => Some(LockBL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_B_L_A::VALUE1 + *self == LockBL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_B_L_A::VALUE2 + *self == LockBL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_B_L_A::VALUE3 + *self == LockBL::Value3 } } #[doc = "Field `LOCK_B_L` writer - Bus Lock Level"] -pub type LOCK_B_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_B_L_A>; -impl<'a, REG> LOCK_B_L_W<'a, REG> +pub type LockBLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockBL>; +impl<'a, REG> LockBLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -332,290 +332,281 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE1) + self.variant(LockBL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE2) + self.variant(LockBL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE3) + self.variant(LockBL::Value3) } } #[doc = "Field `LOCK_CH` reader - Channel Lock Bit"] -pub type LOCK_CH_R = crate::BitReader; +pub type LockChR = crate::BitReader; #[doc = "Field `LOCK_CH` writer - Channel Lock Bit"] -pub type LOCK_CH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LockChW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCK_B` reader - Bus Lock Bit"] -pub type LOCK_B_R = crate::BitReader; +pub type LockBR = crate::BitReader; #[doc = "Field `LOCK_B` writer - Bus Lock Bit"] -pub type LOCK_B_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_R = crate::BitReader; +pub type LockBW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Destination Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DST_HS_POL_A { +pub enum DstHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DST_HS_POL_A) -> Self { + fn from(variant: DstHsPol) -> Self { variant as u8 != 0 } } -impl DST_HS_POL_R { +#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] +pub type DstHsPolR = crate::BitReader; +impl DstHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DST_HS_POL_A { + pub const fn variant(&self) -> DstHsPol { match self.bits { - false => DST_HS_POL_A::VALUE1, - true => DST_HS_POL_A::VALUE2, + false => DstHsPol::Value1, + true => DstHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DST_HS_POL_A::VALUE1 + *self == DstHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DST_HS_POL_A::VALUE2 + *self == DstHsPol::Value2 } } #[doc = "Field `DST_HS_POL` writer - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, DST_HS_POL_A>; -impl<'a, REG> DST_HS_POL_W<'a, REG> +pub type DstHsPolW<'a, REG> = crate::BitWriter<'a, REG, DstHsPol>; +impl<'a, REG> DstHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE1) + self.variant(DstHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE2) + self.variant(DstHsPol::Value2) } } -#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_R = crate::BitReader; #[doc = "Source Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRC_HS_POL_A { +pub enum SrcHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRC_HS_POL_A) -> Self { + fn from(variant: SrcHsPol) -> Self { variant as u8 != 0 } } -impl SRC_HS_POL_R { +#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] +pub type SrcHsPolR = crate::BitReader; +impl SrcHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRC_HS_POL_A { + pub const fn variant(&self) -> SrcHsPol { match self.bits { - false => SRC_HS_POL_A::VALUE1, - true => SRC_HS_POL_A::VALUE2, + false => SrcHsPol::Value1, + true => SrcHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRC_HS_POL_A::VALUE1 + *self == SrcHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRC_HS_POL_A::VALUE2 + *self == SrcHsPol::Value2 } } #[doc = "Field `SRC_HS_POL` writer - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, SRC_HS_POL_A>; -impl<'a, REG> SRC_HS_POL_W<'a, REG> +pub type SrcHsPolW<'a, REG> = crate::BitWriter<'a, REG, SrcHsPol>; +impl<'a, REG> SrcHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE1) + self.variant(SrcHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE2) + self.variant(SrcHsPol::Value2) } } #[doc = "Field `MAX_ABRST` reader - Maximum AMBA Burst Length"] -pub type MAX_ABRST_R = crate::FieldReader; +pub type MaxAbrstR = crate::FieldReader; #[doc = "Field `MAX_ABRST` writer - Maximum AMBA Burst Length"] -pub type MAX_ABRST_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type MaxAbrstW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - pub fn ch_prior(&self) -> CH_PRIOR_R { - CH_PRIOR_R::new(((self.bits >> 5) & 7) as u8) + pub fn ch_prior(&self) -> ChPriorR { + ChPriorR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - pub fn ch_susp(&self) -> CH_SUSP_R { - CH_SUSP_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch_susp(&self) -> ChSuspR { + ChSuspR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Indicates if there is data left in the channel FIFO"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new(((self.bits >> 9) & 1) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { - HS_SEL_DST_R::new(((self.bits >> 10) & 1) != 0) + pub fn hs_sel_dst(&self) -> HsSelDstR { + HsSelDstR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { - HS_SEL_SRC_R::new(((self.bits >> 11) & 1) != 0) + pub fn hs_sel_src(&self) -> HsSelSrcR { + HsSelSrcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - pub fn lock_ch_l(&self) -> LOCK_CH_L_R { - LOCK_CH_L_R::new(((self.bits >> 12) & 3) as u8) + pub fn lock_ch_l(&self) -> LockChLR { + LockChLR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - pub fn lock_b_l(&self) -> LOCK_B_L_R { - LOCK_B_L_R::new(((self.bits >> 14) & 3) as u8) + pub fn lock_b_l(&self) -> LockBLR { + LockBLR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - pub fn lock_ch(&self) -> LOCK_CH_R { - LOCK_CH_R::new(((self.bits >> 16) & 1) != 0) + pub fn lock_ch(&self) -> LockChR { + LockChR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - pub fn lock_b(&self) -> LOCK_B_R { - LOCK_B_R::new(((self.bits >> 17) & 1) != 0) + pub fn lock_b(&self) -> LockBR { + LockBR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - pub fn dst_hs_pol(&self) -> DST_HS_POL_R { - DST_HS_POL_R::new(((self.bits >> 18) & 1) != 0) + pub fn dst_hs_pol(&self) -> DstHsPolR { + DstHsPolR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - pub fn src_hs_pol(&self) -> SRC_HS_POL_R { - SRC_HS_POL_R::new(((self.bits >> 19) & 1) != 0) + pub fn src_hs_pol(&self) -> SrcHsPolR { + SrcHsPolR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - pub fn max_abrst(&self) -> MAX_ABRST_R { - MAX_ABRST_R::new(((self.bits >> 20) & 0x03ff) as u16) + pub fn max_abrst(&self) -> MaxAbrstR { + MaxAbrstR::new(((self.bits >> 20) & 0x03ff) as u16) } } impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] #[must_use] - pub fn ch_prior(&mut self) -> CH_PRIOR_W { - CH_PRIOR_W::new(self, 5) + pub fn ch_prior(&mut self) -> ChPriorW { + ChPriorW::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] #[must_use] - pub fn ch_susp(&mut self) -> CH_SUSP_W { - CH_SUSP_W::new(self, 8) + pub fn ch_susp(&mut self) -> ChSuspW { + ChSuspW::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { - HS_SEL_DST_W::new(self, 10) + pub fn hs_sel_dst(&mut self) -> HsSelDstW { + HsSelDstW::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { - HS_SEL_SRC_W::new(self, 11) + pub fn hs_sel_src(&mut self) -> HsSelSrcW { + HsSelSrcW::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] #[must_use] - pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { - LOCK_CH_L_W::new(self, 12) + pub fn lock_ch_l(&mut self) -> LockChLW { + LockChLW::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] #[must_use] - pub fn lock_b_l(&mut self) -> LOCK_B_L_W { - LOCK_B_L_W::new(self, 14) + pub fn lock_b_l(&mut self) -> LockBLW { + LockBLW::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_ch(&mut self) -> LOCK_CH_W { - LOCK_CH_W::new(self, 16) + pub fn lock_ch(&mut self) -> LockChW { + LockChW::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_b(&mut self) -> LOCK_B_W { - LOCK_B_W::new(self, 17) + pub fn lock_b(&mut self) -> LockBW { + LockBW::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { - DST_HS_POL_W::new(self, 18) + pub fn dst_hs_pol(&mut self) -> DstHsPolW { + DstHsPolW::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { - SRC_HS_POL_W::new(self, 19) + pub fn src_hs_pol(&mut self) -> SrcHsPolW { + SrcHsPolW::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] #[must_use] - pub fn max_abrst(&mut self) -> MAX_ABRST_W { - MAX_ABRST_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn max_abrst(&mut self) -> MaxAbrstW { + MaxAbrstW::new(self, 20) } } #[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGL_SPEC; -impl crate::RegisterSpec for CFGL_SPEC { +pub struct CfglSpec; +impl crate::RegisterSpec for CfglSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgl::R`](R) reader structure"] -impl crate::Readable for CFGL_SPEC {} +impl crate::Readable for CfglSpec {} #[doc = "`write(|w| ..)` method takes [`cfgl::W`](W) writer structure"] -impl crate::Writable for CFGL_SPEC { +impl crate::Writable for CfglSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGL to value 0x0e00"] -impl crate::Resettable for CFGL_SPEC { +impl crate::Resettable for CfglSpec { const RESET_VALUE: u32 = 0x0e00; } diff --git a/src/gpdma0_ch2/ctlh.rs b/src/gpdma0_ch2/ctlh.rs index b193f905..828a2d1a 100644 --- a/src/gpdma0_ch2/ctlh.rs +++ b/src/gpdma0_ch2/ctlh.rs @@ -1,64 +1,55 @@ #[doc = "Register `CTLH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_TS` reader - Block Transfer Size"] -pub type BLOCK_TS_R = crate::FieldReader; +pub type BlockTsR = crate::FieldReader; #[doc = "Field `BLOCK_TS` writer - Block Transfer Size"] -pub type BLOCK_TS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BlockTsW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DONE` reader - Done bit"] -pub type DONE_R = crate::BitReader; +pub type DoneR = crate::BitReader; #[doc = "Field `DONE` writer - Done bit"] -pub type DONE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - pub fn block_ts(&self) -> BLOCK_TS_R { - BLOCK_TS_R::new((self.bits & 0x0fff) as u16) + pub fn block_ts(&self) -> BlockTsR { + BlockTsR::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - pub fn done(&self) -> DONE_R { - DONE_R::new(((self.bits >> 12) & 1) != 0) + pub fn done(&self) -> DoneR { + DoneR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn block_ts(&mut self) -> BLOCK_TS_W { - BLOCK_TS_W::new(self, 0) + pub fn block_ts(&mut self) -> BlockTsW { + BlockTsW::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn done(&mut self) -> DoneW { + DoneW::new(self, 12) } } #[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLH_SPEC; -impl crate::RegisterSpec for CTLH_SPEC { +pub struct CtlhSpec; +impl crate::RegisterSpec for CtlhSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctlh::R`](R) reader structure"] -impl crate::Readable for CTLH_SPEC {} +impl crate::Readable for CtlhSpec {} #[doc = "`write(|w| ..)` method takes [`ctlh::W`](W) writer structure"] -impl crate::Writable for CTLH_SPEC { +impl crate::Writable for CtlhSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLH to value 0x02"] -impl crate::Resettable for CTLH_SPEC { +impl crate::Resettable for CtlhSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/gpdma0_ch2/ctll.rs b/src/gpdma0_ch2/ctll.rs index 11e6834f..815080e6 100644 --- a/src/gpdma0_ch2/ctll.rs +++ b/src/gpdma0_ch2/ctll.rs @@ -1,71 +1,71 @@ #[doc = "Register `CTLL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INT_EN` reader - Interrupt Enable Bit"] -pub type INT_EN_R = crate::BitReader; +pub type IntEnR = crate::BitReader; #[doc = "Field `INT_EN` writer - Interrupt Enable Bit"] -pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DST_TR_WIDTH` reader - Destination Transfer Width"] -pub type DST_TR_WIDTH_R = crate::FieldReader; +pub type DstTrWidthR = crate::FieldReader; #[doc = "Field `DST_TR_WIDTH` writer - Destination Transfer Width"] -pub type DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DstTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_TR_WIDTH` reader - Source Transfer Width"] -pub type SRC_TR_WIDTH_R = crate::FieldReader; +pub type SrcTrWidthR = crate::FieldReader; #[doc = "Field `SRC_TR_WIDTH` writer - Source Transfer Width"] -pub type SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `DINC` reader - Destination Address Increment"] -pub type DINC_R = crate::FieldReader; +pub type SrcTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Destination Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DINC_A { +pub enum Dinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DINC_A) -> Self { + fn from(variant: Dinc) -> Self { variant as _ } } -impl crate::FieldSpec for DINC_A { +impl crate::FieldSpec for Dinc { type Ux = u8; } -impl DINC_R { +#[doc = "Field `DINC` reader - Destination Address Increment"] +pub type DincR = crate::FieldReader; +impl DincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DINC_A::VALUE1), - 1 => Some(DINC_A::VALUE2), - 2 => Some(DINC_A::VALUE3), + 0 => Some(Dinc::Value1), + 1 => Some(Dinc::Value2), + 2 => Some(Dinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DINC_A::VALUE1 + *self == Dinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DINC_A::VALUE2 + *self == Dinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DINC_A::VALUE3 + *self == Dinc::Value3 } } #[doc = "Field `DINC` writer - Destination Address Increment"] -pub type DINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DINC_A>; -impl<'a, REG> DINC_W<'a, REG> +pub type DincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dinc>; +impl<'a, REG> DincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,71 +73,71 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE1) + self.variant(Dinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE2) + self.variant(Dinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE3) + self.variant(Dinc::Value3) } } -#[doc = "Field `SINC` reader - Source Address Increment"] -pub type SINC_R = crate::FieldReader; #[doc = "Source Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SINC_A { +pub enum Sinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SINC_A) -> Self { + fn from(variant: Sinc) -> Self { variant as _ } } -impl crate::FieldSpec for SINC_A { +impl crate::FieldSpec for Sinc { type Ux = u8; } -impl SINC_R { +#[doc = "Field `SINC` reader - Source Address Increment"] +pub type SincR = crate::FieldReader; +impl SincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SINC_A::VALUE1), - 1 => Some(SINC_A::VALUE2), - 2 => Some(SINC_A::VALUE3), + 0 => Some(Sinc::Value1), + 1 => Some(Sinc::Value2), + 2 => Some(Sinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SINC_A::VALUE1 + *self == Sinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SINC_A::VALUE2 + *self == Sinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SINC_A::VALUE3 + *self == Sinc::Value3 } } #[doc = "Field `SINC` writer - Source Address Increment"] -pub type SINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SINC_A>; -impl<'a, REG> SINC_W<'a, REG> +pub type SincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sinc>; +impl<'a, REG> SincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,146 +145,137 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE1) + self.variant(Sinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE2) + self.variant(Sinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE3) + self.variant(Sinc::Value3) } } #[doc = "Field `DEST_MSIZE` reader - Destination Burst Transaction Length"] -pub type DEST_MSIZE_R = crate::FieldReader; +pub type DestMsizeR = crate::FieldReader; #[doc = "Field `DEST_MSIZE` writer - Destination Burst Transaction Length"] -pub type DEST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DestMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_MSIZE` reader - Source Burst Transaction Length"] -pub type SRC_MSIZE_R = crate::FieldReader; +pub type SrcMsizeR = crate::FieldReader; #[doc = "Field `SRC_MSIZE` writer - Source Burst Transaction Length"] -pub type SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SrcMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `TT_FC` reader - Transfer Type and Flow Control"] -pub type TT_FC_R = crate::FieldReader; +pub type TtFcR = crate::FieldReader; #[doc = "Field `TT_FC` writer - Transfer Type and Flow Control"] -pub type TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TtFcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - pub fn int_en(&self) -> INT_EN_R { - INT_EN_R::new((self.bits & 1) != 0) + pub fn int_en(&self) -> IntEnR { + IntEnR::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { - DST_TR_WIDTH_R::new(((self.bits >> 1) & 7) as u8) + pub fn dst_tr_width(&self) -> DstTrWidthR { + DstTrWidthR::new(((self.bits >> 1) & 7) as u8) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { - SRC_TR_WIDTH_R::new(((self.bits >> 4) & 7) as u8) + pub fn src_tr_width(&self) -> SrcTrWidthR { + SrcTrWidthR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - pub fn dinc(&self) -> DINC_R { - DINC_R::new(((self.bits >> 7) & 3) as u8) + pub fn dinc(&self) -> DincR { + DincR::new(((self.bits >> 7) & 3) as u8) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - pub fn sinc(&self) -> SINC_R { - SINC_R::new(((self.bits >> 9) & 3) as u8) + pub fn sinc(&self) -> SincR { + SincR::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - pub fn dest_msize(&self) -> DEST_MSIZE_R { - DEST_MSIZE_R::new(((self.bits >> 11) & 7) as u8) + pub fn dest_msize(&self) -> DestMsizeR { + DestMsizeR::new(((self.bits >> 11) & 7) as u8) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - pub fn src_msize(&self) -> SRC_MSIZE_R { - SRC_MSIZE_R::new(((self.bits >> 14) & 7) as u8) + pub fn src_msize(&self) -> SrcMsizeR { + SrcMsizeR::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - pub fn tt_fc(&self) -> TT_FC_R { - TT_FC_R::new(((self.bits >> 20) & 7) as u8) + pub fn tt_fc(&self) -> TtFcR { + TtFcR::new(((self.bits >> 20) & 7) as u8) } } impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] #[must_use] - pub fn int_en(&mut self) -> INT_EN_W { - INT_EN_W::new(self, 0) + pub fn int_en(&mut self) -> IntEnW { + IntEnW::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] #[must_use] - pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { - DST_TR_WIDTH_W::new(self, 1) + pub fn dst_tr_width(&mut self) -> DstTrWidthW { + DstTrWidthW::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] #[must_use] - pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { - SRC_TR_WIDTH_W::new(self, 4) + pub fn src_tr_width(&mut self) -> SrcTrWidthW { + SrcTrWidthW::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] #[must_use] - pub fn dinc(&mut self) -> DINC_W { - DINC_W::new(self, 7) + pub fn dinc(&mut self) -> DincW { + DincW::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] #[must_use] - pub fn sinc(&mut self) -> SINC_W { - SINC_W::new(self, 9) + pub fn sinc(&mut self) -> SincW { + SincW::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn dest_msize(&mut self) -> DEST_MSIZE_W { - DEST_MSIZE_W::new(self, 11) + pub fn dest_msize(&mut self) -> DestMsizeW { + DestMsizeW::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn src_msize(&mut self) -> SRC_MSIZE_W { - SRC_MSIZE_W::new(self, 14) + pub fn src_msize(&mut self) -> SrcMsizeW { + SrcMsizeW::new(self, 14) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] #[must_use] - pub fn tt_fc(&mut self) -> TT_FC_W { - TT_FC_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tt_fc(&mut self) -> TtFcW { + TtFcW::new(self, 20) } } #[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLL_SPEC; -impl crate::RegisterSpec for CTLL_SPEC { +pub struct CtllSpec; +impl crate::RegisterSpec for CtllSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctll::R`](R) reader structure"] -impl crate::Readable for CTLL_SPEC {} +impl crate::Readable for CtllSpec {} #[doc = "`write(|w| ..)` method takes [`ctll::W`](W) writer structure"] -impl crate::Writable for CTLL_SPEC { +impl crate::Writable for CtllSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLL to value 0x0030_4801"] -impl crate::Resettable for CTLL_SPEC { +impl crate::Resettable for CtllSpec { const RESET_VALUE: u32 = 0x0030_4801; } diff --git a/src/gpdma0_ch2/dar.rs b/src/gpdma0_ch2/dar.rs index e65cf651..c29a247f 100644 --- a/src/gpdma0_ch2/dar.rs +++ b/src/gpdma0_ch2/dar.rs @@ -1,49 +1,40 @@ #[doc = "Register `DAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAR` reader - Current Destination address of DMA transfer"] -pub type DAR_R = crate::FieldReader; +pub type DarR = crate::FieldReader; #[doc = "Field `DAR` writer - Current Destination address of DMA transfer"] -pub type DAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - pub fn dar(&self) -> DAR_R { - DAR_R::new(self.bits) + pub fn dar(&self) -> DarR { + DarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] #[must_use] - pub fn dar(&mut self) -> DAR_W { - DAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dar(&mut self) -> DarW { + DarW::new(self, 0) } } #[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAR_SPEC; -impl crate::RegisterSpec for DAR_SPEC { +pub struct DarSpec; +impl crate::RegisterSpec for DarSpec { type Ux = u32; } #[doc = "`read()` method returns [`dar::R`](R) reader structure"] -impl crate::Readable for DAR_SPEC {} +impl crate::Readable for DarSpec {} #[doc = "`write(|w| ..)` method takes [`dar::W`](W) writer structure"] -impl crate::Writable for DAR_SPEC { +impl crate::Writable for DarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAR to value 0"] -impl crate::Resettable for DAR_SPEC { +impl crate::Resettable for DarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch2/sar.rs b/src/gpdma0_ch2/sar.rs index 156571e6..cf5b145b 100644 --- a/src/gpdma0_ch2/sar.rs +++ b/src/gpdma0_ch2/sar.rs @@ -1,49 +1,40 @@ #[doc = "Register `SAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SAR` reader - Current Source Address of DMA transfer"] -pub type SAR_R = crate::FieldReader; +pub type SarR = crate::FieldReader; #[doc = "Field `SAR` writer - Current Source Address of DMA transfer"] -pub type SAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - pub fn sar(&self) -> SAR_R { - SAR_R::new(self.bits) + pub fn sar(&self) -> SarR { + SarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] #[must_use] - pub fn sar(&mut self) -> SAR_W { - SAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sar(&mut self) -> SarW { + SarW::new(self, 0) } } #[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SAR_SPEC; -impl crate::RegisterSpec for SAR_SPEC { +pub struct SarSpec; +impl crate::RegisterSpec for SarSpec { type Ux = u32; } #[doc = "`read()` method returns [`sar::R`](R) reader structure"] -impl crate::Readable for SAR_SPEC {} +impl crate::Readable for SarSpec {} #[doc = "`write(|w| ..)` method takes [`sar::W`](W) writer structure"] -impl crate::Writable for SAR_SPEC { +impl crate::Writable for SarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAR to value 0"] -impl crate::Resettable for SAR_SPEC { +impl crate::Resettable for SarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1.rs b/src/gpdma1.rs index 4563b778..5247a587 100644 --- a/src/gpdma1.rs +++ b/src/gpdma1.rs @@ -1,388 +1,420 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - rawtfr: RAWTFR, + rawtfr: Rawtfr, _reserved1: [u8; 0x04], - rawblock: RAWBLOCK, + rawblock: Rawblock, _reserved2: [u8; 0x04], - rawsrctran: RAWSRCTRAN, + rawsrctran: Rawsrctran, _reserved3: [u8; 0x04], - rawdsttran: RAWDSTTRAN, + rawdsttran: Rawdsttran, _reserved4: [u8; 0x04], - rawerr: RAWERR, + rawerr: Rawerr, _reserved5: [u8; 0x04], - statustfr: STATUSTFR, + statustfr: Statustfr, _reserved6: [u8; 0x04], - statusblock: STATUSBLOCK, + statusblock: Statusblock, _reserved7: [u8; 0x04], - statussrctran: STATUSSRCTRAN, + statussrctran: Statussrctran, _reserved8: [u8; 0x04], - statusdsttran: STATUSDSTTRAN, + statusdsttran: Statusdsttran, _reserved9: [u8; 0x04], - statuserr: STATUSERR, + statuserr: Statuserr, _reserved10: [u8; 0x04], - masktfr: MASKTFR, + masktfr: Masktfr, _reserved11: [u8; 0x04], - maskblock: MASKBLOCK, + maskblock: Maskblock, _reserved12: [u8; 0x04], - masksrctran: MASKSRCTRAN, + masksrctran: Masksrctran, _reserved13: [u8; 0x04], - maskdsttran: MASKDSTTRAN, + maskdsttran: Maskdsttran, _reserved14: [u8; 0x04], - maskerr: MASKERR, + maskerr: Maskerr, _reserved15: [u8; 0x04], - cleartfr: CLEARTFR, + cleartfr: Cleartfr, _reserved16: [u8; 0x04], - clearblock: CLEARBLOCK, + clearblock: Clearblock, _reserved17: [u8; 0x04], - clearsrctran: CLEARSRCTRAN, + clearsrctran: Clearsrctran, _reserved18: [u8; 0x04], - cleardsttran: CLEARDSTTRAN, + cleardsttran: Cleardsttran, _reserved19: [u8; 0x04], - clearerr: CLEARERR, + clearerr: Clearerr, _reserved20: [u8; 0x04], - statusint: STATUSINT, + statusint: Statusint, _reserved21: [u8; 0x04], - reqsrcreg: REQSRCREG, + reqsrcreg: Reqsrcreg, _reserved22: [u8; 0x04], - reqdstreg: REQDSTREG, + reqdstreg: Reqdstreg, _reserved23: [u8; 0x04], - sglreqsrcreg: SGLREQSRCREG, + sglreqsrcreg: Sglreqsrcreg, _reserved24: [u8; 0x04], - sglreqdstreg: SGLREQDSTREG, + sglreqdstreg: Sglreqdstreg, _reserved25: [u8; 0x04], - lstsrcreg: LSTSRCREG, + lstsrcreg: Lstsrcreg, _reserved26: [u8; 0x04], - lstdstreg: LSTDSTREG, + lstdstreg: Lstdstreg, _reserved27: [u8; 0x04], - dmacfgreg: DMACFGREG, + dmacfgreg: Dmacfgreg, _reserved28: [u8; 0x04], - chenreg: CHENREG, + chenreg: Chenreg, _reserved29: [u8; 0x04], - id: ID, + id: Id, _reserved30: [u8; 0x4c], - type_: TYPE, - version: VERSION, + type_: Type, + version: Version, } impl RegisterBlock { #[doc = "0x00 - Raw IntTfr Status"] #[inline(always)] - pub const fn rawtfr(&self) -> &RAWTFR { + pub const fn rawtfr(&self) -> &Rawtfr { &self.rawtfr } #[doc = "0x08 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawblock(&self) -> &RAWBLOCK { + pub const fn rawblock(&self) -> &Rawblock { &self.rawblock } #[doc = "0x10 - Raw IntSrcTran Status"] #[inline(always)] - pub const fn rawsrctran(&self) -> &RAWSRCTRAN { + pub const fn rawsrctran(&self) -> &Rawsrctran { &self.rawsrctran } #[doc = "0x18 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawdsttran(&self) -> &RAWDSTTRAN { + pub const fn rawdsttran(&self) -> &Rawdsttran { &self.rawdsttran } #[doc = "0x20 - Raw IntErr Status"] #[inline(always)] - pub const fn rawerr(&self) -> &RAWERR { + pub const fn rawerr(&self) -> &Rawerr { &self.rawerr } #[doc = "0x28 - IntTfr Status"] #[inline(always)] - pub const fn statustfr(&self) -> &STATUSTFR { + pub const fn statustfr(&self) -> &Statustfr { &self.statustfr } #[doc = "0x30 - IntBlock Status"] #[inline(always)] - pub const fn statusblock(&self) -> &STATUSBLOCK { + pub const fn statusblock(&self) -> &Statusblock { &self.statusblock } #[doc = "0x38 - IntSrcTran Status"] #[inline(always)] - pub const fn statussrctran(&self) -> &STATUSSRCTRAN { + pub const fn statussrctran(&self) -> &Statussrctran { &self.statussrctran } #[doc = "0x40 - IntBlock Status"] #[inline(always)] - pub const fn statusdsttran(&self) -> &STATUSDSTTRAN { + pub const fn statusdsttran(&self) -> &Statusdsttran { &self.statusdsttran } #[doc = "0x48 - IntErr Status"] #[inline(always)] - pub const fn statuserr(&self) -> &STATUSERR { + pub const fn statuserr(&self) -> &Statuserr { &self.statuserr } #[doc = "0x50 - Mask for Raw IntTfr Status"] #[inline(always)] - pub const fn masktfr(&self) -> &MASKTFR { + pub const fn masktfr(&self) -> &Masktfr { &self.masktfr } #[doc = "0x58 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskblock(&self) -> &MASKBLOCK { + pub const fn maskblock(&self) -> &Maskblock { &self.maskblock } #[doc = "0x60 - Mask for Raw IntSrcTran Status"] #[inline(always)] - pub const fn masksrctran(&self) -> &MASKSRCTRAN { + pub const fn masksrctran(&self) -> &Masksrctran { &self.masksrctran } #[doc = "0x68 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskdsttran(&self) -> &MASKDSTTRAN { + pub const fn maskdsttran(&self) -> &Maskdsttran { &self.maskdsttran } #[doc = "0x70 - Mask for Raw IntErr Status"] #[inline(always)] - pub const fn maskerr(&self) -> &MASKERR { + pub const fn maskerr(&self) -> &Maskerr { &self.maskerr } #[doc = "0x78 - IntTfr Status"] #[inline(always)] - pub const fn cleartfr(&self) -> &CLEARTFR { + pub const fn cleartfr(&self) -> &Cleartfr { &self.cleartfr } #[doc = "0x80 - IntBlock Status"] #[inline(always)] - pub const fn clearblock(&self) -> &CLEARBLOCK { + pub const fn clearblock(&self) -> &Clearblock { &self.clearblock } #[doc = "0x88 - IntSrcTran Status"] #[inline(always)] - pub const fn clearsrctran(&self) -> &CLEARSRCTRAN { + pub const fn clearsrctran(&self) -> &Clearsrctran { &self.clearsrctran } #[doc = "0x90 - IntBlock Status"] #[inline(always)] - pub const fn cleardsttran(&self) -> &CLEARDSTTRAN { + pub const fn cleardsttran(&self) -> &Cleardsttran { &self.cleardsttran } #[doc = "0x98 - IntErr Status"] #[inline(always)] - pub const fn clearerr(&self) -> &CLEARERR { + pub const fn clearerr(&self) -> &Clearerr { &self.clearerr } #[doc = "0xa0 - Combined Interrupt Status Register"] #[inline(always)] - pub const fn statusint(&self) -> &STATUSINT { + pub const fn statusint(&self) -> &Statusint { &self.statusint } #[doc = "0xa8 - Source Software Transaction Request Register"] #[inline(always)] - pub const fn reqsrcreg(&self) -> &REQSRCREG { + pub const fn reqsrcreg(&self) -> &Reqsrcreg { &self.reqsrcreg } #[doc = "0xb0 - Destination Software Transaction Request Register"] #[inline(always)] - pub const fn reqdstreg(&self) -> &REQDSTREG { + pub const fn reqdstreg(&self) -> &Reqdstreg { &self.reqdstreg } #[doc = "0xb8 - Single Source Transaction Request Register"] #[inline(always)] - pub const fn sglreqsrcreg(&self) -> &SGLREQSRCREG { + pub const fn sglreqsrcreg(&self) -> &Sglreqsrcreg { &self.sglreqsrcreg } #[doc = "0xc0 - Single Destination Transaction Request Register"] #[inline(always)] - pub const fn sglreqdstreg(&self) -> &SGLREQDSTREG { + pub const fn sglreqdstreg(&self) -> &Sglreqdstreg { &self.sglreqdstreg } #[doc = "0xc8 - Last Source Transaction Request Register"] #[inline(always)] - pub const fn lstsrcreg(&self) -> &LSTSRCREG { + pub const fn lstsrcreg(&self) -> &Lstsrcreg { &self.lstsrcreg } #[doc = "0xd0 - Last Destination Transaction Request Register"] #[inline(always)] - pub const fn lstdstreg(&self) -> &LSTDSTREG { + pub const fn lstdstreg(&self) -> &Lstdstreg { &self.lstdstreg } #[doc = "0xd8 - GPDMA Configuration Register"] #[inline(always)] - pub const fn dmacfgreg(&self) -> &DMACFGREG { + pub const fn dmacfgreg(&self) -> &Dmacfgreg { &self.dmacfgreg } #[doc = "0xe0 - GPDMA Channel Enable Register"] #[inline(always)] - pub const fn chenreg(&self) -> &CHENREG { + pub const fn chenreg(&self) -> &Chenreg { &self.chenreg } #[doc = "0xe8 - GPDMA1 ID Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x138 - GPDMA Component Type"] #[inline(always)] - pub const fn type_(&self) -> &TYPE { + pub const fn type_(&self) -> &Type { &self.type_ } #[doc = "0x13c - DMA Component Version"] #[inline(always)] - pub const fn version(&self) -> &VERSION { + pub const fn version(&self) -> &Version { &self.version } } #[doc = "RAWTFR (rw) register accessor: Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawtfr`] module"] -pub type RAWTFR = crate::Reg; +#[doc(alias = "RAWTFR")] +pub type Rawtfr = crate::Reg; #[doc = "Raw IntTfr Status"] pub mod rawtfr; #[doc = "RAWBLOCK (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawblock`] module"] -pub type RAWBLOCK = crate::Reg; +#[doc(alias = "RAWBLOCK")] +pub type Rawblock = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawblock; #[doc = "RAWSRCTRAN (rw) register accessor: Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawsrctran`] module"] -pub type RAWSRCTRAN = crate::Reg; +#[doc(alias = "RAWSRCTRAN")] +pub type Rawsrctran = crate::Reg; #[doc = "Raw IntSrcTran Status"] pub mod rawsrctran; #[doc = "RAWDSTTRAN (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawdsttran`] module"] -pub type RAWDSTTRAN = crate::Reg; +#[doc(alias = "RAWDSTTRAN")] +pub type Rawdsttran = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawdsttran; #[doc = "RAWERR (rw) register accessor: Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawerr`] module"] -pub type RAWERR = crate::Reg; +#[doc(alias = "RAWERR")] +pub type Rawerr = crate::Reg; #[doc = "Raw IntErr Status"] pub mod rawerr; #[doc = "STATUSTFR (r) register accessor: IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statustfr`] module"] -pub type STATUSTFR = crate::Reg; +#[doc(alias = "STATUSTFR")] +pub type Statustfr = crate::Reg; #[doc = "IntTfr Status"] pub mod statustfr; #[doc = "STATUSBLOCK (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusblock`] module"] -pub type STATUSBLOCK = crate::Reg; +#[doc(alias = "STATUSBLOCK")] +pub type Statusblock = crate::Reg; #[doc = "IntBlock Status"] pub mod statusblock; #[doc = "STATUSSRCTRAN (r) register accessor: IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statussrctran`] module"] -pub type STATUSSRCTRAN = crate::Reg; +#[doc(alias = "STATUSSRCTRAN")] +pub type Statussrctran = crate::Reg; #[doc = "IntSrcTran Status"] pub mod statussrctran; #[doc = "STATUSDSTTRAN (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusdsttran`] module"] -pub type STATUSDSTTRAN = crate::Reg; +#[doc(alias = "STATUSDSTTRAN")] +pub type Statusdsttran = crate::Reg; #[doc = "IntBlock Status"] pub mod statusdsttran; #[doc = "STATUSERR (r) register accessor: IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statuserr`] module"] -pub type STATUSERR = crate::Reg; +#[doc(alias = "STATUSERR")] +pub type Statuserr = crate::Reg; #[doc = "IntErr Status"] pub mod statuserr; #[doc = "MASKTFR (rw) register accessor: Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masktfr`] module"] -pub type MASKTFR = crate::Reg; +#[doc(alias = "MASKTFR")] +pub type Masktfr = crate::Reg; #[doc = "Mask for Raw IntTfr Status"] pub mod masktfr; #[doc = "MASKBLOCK (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskblock`] module"] -pub type MASKBLOCK = crate::Reg; +#[doc(alias = "MASKBLOCK")] +pub type Maskblock = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskblock; #[doc = "MASKSRCTRAN (rw) register accessor: Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masksrctran`] module"] -pub type MASKSRCTRAN = crate::Reg; +#[doc(alias = "MASKSRCTRAN")] +pub type Masksrctran = crate::Reg; #[doc = "Mask for Raw IntSrcTran Status"] pub mod masksrctran; #[doc = "MASKDSTTRAN (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskdsttran`] module"] -pub type MASKDSTTRAN = crate::Reg; +#[doc(alias = "MASKDSTTRAN")] +pub type Maskdsttran = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskdsttran; #[doc = "MASKERR (rw) register accessor: Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskerr`] module"] -pub type MASKERR = crate::Reg; +#[doc(alias = "MASKERR")] +pub type Maskerr = crate::Reg; #[doc = "Mask for Raw IntErr Status"] pub mod maskerr; #[doc = "CLEARTFR (w) register accessor: IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleartfr`] module"] -pub type CLEARTFR = crate::Reg; +#[doc(alias = "CLEARTFR")] +pub type Cleartfr = crate::Reg; #[doc = "IntTfr Status"] pub mod cleartfr; #[doc = "CLEARBLOCK (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearblock`] module"] -pub type CLEARBLOCK = crate::Reg; +#[doc(alias = "CLEARBLOCK")] +pub type Clearblock = crate::Reg; #[doc = "IntBlock Status"] pub mod clearblock; #[doc = "CLEARSRCTRAN (w) register accessor: IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearsrctran`] module"] -pub type CLEARSRCTRAN = crate::Reg; +#[doc(alias = "CLEARSRCTRAN")] +pub type Clearsrctran = crate::Reg; #[doc = "IntSrcTran Status"] pub mod clearsrctran; #[doc = "CLEARDSTTRAN (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleardsttran`] module"] -pub type CLEARDSTTRAN = crate::Reg; +#[doc(alias = "CLEARDSTTRAN")] +pub type Cleardsttran = crate::Reg; #[doc = "IntBlock Status"] pub mod cleardsttran; #[doc = "CLEARERR (w) register accessor: IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearerr`] module"] -pub type CLEARERR = crate::Reg; +#[doc(alias = "CLEARERR")] +pub type Clearerr = crate::Reg; #[doc = "IntErr Status"] pub mod clearerr; #[doc = "STATUSINT (r) register accessor: Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusint`] module"] -pub type STATUSINT = crate::Reg; +#[doc(alias = "STATUSINT")] +pub type Statusint = crate::Reg; #[doc = "Combined Interrupt Status Register"] pub mod statusint; #[doc = "REQSRCREG (rw) register accessor: Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqsrcreg`] module"] -pub type REQSRCREG = crate::Reg; +#[doc(alias = "REQSRCREG")] +pub type Reqsrcreg = crate::Reg; #[doc = "Source Software Transaction Request Register"] pub mod reqsrcreg; #[doc = "REQDSTREG (rw) register accessor: Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdstreg`] module"] -pub type REQDSTREG = crate::Reg; +#[doc(alias = "REQDSTREG")] +pub type Reqdstreg = crate::Reg; #[doc = "Destination Software Transaction Request Register"] pub mod reqdstreg; #[doc = "SGLREQSRCREG (rw) register accessor: Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqsrcreg`] module"] -pub type SGLREQSRCREG = crate::Reg; +#[doc(alias = "SGLREQSRCREG")] +pub type Sglreqsrcreg = crate::Reg; #[doc = "Single Source Transaction Request Register"] pub mod sglreqsrcreg; #[doc = "SGLREQDSTREG (rw) register accessor: Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqdstreg`] module"] -pub type SGLREQDSTREG = crate::Reg; +#[doc(alias = "SGLREQDSTREG")] +pub type Sglreqdstreg = crate::Reg; #[doc = "Single Destination Transaction Request Register"] pub mod sglreqdstreg; #[doc = "LSTSRCREG (rw) register accessor: Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstsrcreg`] module"] -pub type LSTSRCREG = crate::Reg; +#[doc(alias = "LSTSRCREG")] +pub type Lstsrcreg = crate::Reg; #[doc = "Last Source Transaction Request Register"] pub mod lstsrcreg; #[doc = "LSTDSTREG (rw) register accessor: Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstdstreg`] module"] -pub type LSTDSTREG = crate::Reg; +#[doc(alias = "LSTDSTREG")] +pub type Lstdstreg = crate::Reg; #[doc = "Last Destination Transaction Request Register"] pub mod lstdstreg; #[doc = "DMACFGREG (rw) register accessor: GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacfgreg`] module"] -pub type DMACFGREG = crate::Reg; +#[doc(alias = "DMACFGREG")] +pub type Dmacfgreg = crate::Reg; #[doc = "GPDMA Configuration Register"] pub mod dmacfgreg; #[doc = "CHENREG (rw) register accessor: GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chenreg`] module"] -pub type CHENREG = crate::Reg; +#[doc(alias = "CHENREG")] +pub type Chenreg = crate::Reg; #[doc = "GPDMA Channel Enable Register"] pub mod chenreg; #[doc = "ID (r) register accessor: GPDMA1 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "GPDMA1 ID Register"] pub mod id; #[doc = "TYPE (r) register accessor: GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] module"] -pub type TYPE = crate::Reg; +#[doc(alias = "TYPE")] +pub type Type = crate::Reg; #[doc = "GPDMA Component Type"] pub mod type_; #[doc = "VERSION (r) register accessor: DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] -pub type VERSION = crate::Reg; +#[doc(alias = "VERSION")] +pub type Version = crate::Reg; #[doc = "DMA Component Version"] pub mod version; diff --git a/src/gpdma1/chenreg.rs b/src/gpdma1/chenreg.rs index c8cecacd..9d88c314 100644 --- a/src/gpdma1/chenreg.rs +++ b/src/gpdma1/chenreg.rs @@ -1,51 +1,51 @@ #[doc = "Register `CHENREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHENREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH` reader - Enables/Disables the channel"] -pub type CH_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Enables/Disables the channel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CH_A { +pub enum Ch { #[doc = "0: Disable the Channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable the Channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CH_A) -> Self { + fn from(variant: Ch) -> Self { variant as _ } } -impl crate::FieldSpec for CH_A { +impl crate::FieldSpec for Ch { type Ux = u8; } -impl CH_R { +#[doc = "Field `CH` reader - Enables/Disables the channel"] +pub type ChR = crate::FieldReader; +impl ChR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CH_A::VALUE1), - 1 => Some(CH_A::VALUE2), + 0 => Some(Ch::Value1), + 1 => Some(Ch::Value2), _ => None, } } #[doc = "Disable the Channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_A::VALUE1 + *self == Ch::Value1 } #[doc = "Enable the Channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_A::VALUE2 + *self == Ch::Value2 } } #[doc = "Field `CH` writer - Enables/Disables the channel"] -pub type CH_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CH_A>; -impl<'a, REG> CH_W<'a, REG> +pub type ChW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ch>; +impl<'a, REG> ChW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,60 +53,51 @@ where #[doc = "Disable the Channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_A::VALUE1) + self.variant(Ch::Value1) } #[doc = "Enable the Channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_A::VALUE2) + self.variant(Ch::Value2) } } #[doc = "Field `WE_CH` writer - Channel enable write enable"] -pub type WE_CH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type WeChW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Enables/Disables the channel"] #[inline(always)] - pub fn ch(&self) -> CH_R { - CH_R::new((self.bits & 0x0f) as u8) + pub fn ch(&self) -> ChR { + ChR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Enables/Disables the channel"] #[inline(always)] #[must_use] - pub fn ch(&mut self) -> CH_W { - CH_W::new(self, 0) + pub fn ch(&mut self) -> ChW { + ChW::new(self, 0) } #[doc = "Bits 8:11 - Channel enable write enable"] #[inline(always)] #[must_use] - pub fn we_ch(&mut self) -> WE_CH_W { - WE_CH_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch(&mut self) -> WeChW { + WeChW::new(self, 8) } } #[doc = "GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHENREG_SPEC; -impl crate::RegisterSpec for CHENREG_SPEC { +pub struct ChenregSpec; +impl crate::RegisterSpec for ChenregSpec { type Ux = u32; } #[doc = "`read()` method returns [`chenreg::R`](R) reader structure"] -impl crate::Readable for CHENREG_SPEC {} +impl crate::Readable for ChenregSpec {} #[doc = "`write(|w| ..)` method takes [`chenreg::W`](W) writer structure"] -impl crate::Writable for CHENREG_SPEC { +impl crate::Writable for ChenregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHENREG to value 0"] -impl crate::Resettable for CHENREG_SPEC { +impl crate::Resettable for ChenregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/clearblock.rs b/src/gpdma1/clearblock.rs index 92b7851b..b23ddb4f 100644 --- a/src/gpdma1/clearblock.rs +++ b/src/gpdma1/clearblock.rs @@ -1,176 +1,167 @@ #[doc = "Register `CLEARBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARBLOCK_SPEC; -impl crate::RegisterSpec for CLEARBLOCK_SPEC { +pub struct ClearblockSpec; +impl crate::RegisterSpec for ClearblockSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearblock::W`](W) writer structure"] -impl crate::Writable for CLEARBLOCK_SPEC { +impl crate::Writable for ClearblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARBLOCK to value 0"] -impl crate::Resettable for CLEARBLOCK_SPEC { +impl crate::Resettable for ClearblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/cleardsttran.rs b/src/gpdma1/cleardsttran.rs index 4844c3ba..3f400570 100644 --- a/src/gpdma1/cleardsttran.rs +++ b/src/gpdma1/cleardsttran.rs @@ -1,176 +1,167 @@ #[doc = "Register `CLEARDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARDSTTRAN_SPEC; -impl crate::RegisterSpec for CLEARDSTTRAN_SPEC { +pub struct CleardsttranSpec; +impl crate::RegisterSpec for CleardsttranSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleardsttran::W`](W) writer structure"] -impl crate::Writable for CLEARDSTTRAN_SPEC { +impl crate::Writable for CleardsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARDSTTRAN to value 0"] -impl crate::Resettable for CLEARDSTTRAN_SPEC { +impl crate::Resettable for CleardsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/clearerr.rs b/src/gpdma1/clearerr.rs index 0ba14d88..6999e46b 100644 --- a/src/gpdma1/clearerr.rs +++ b/src/gpdma1/clearerr.rs @@ -1,176 +1,167 @@ #[doc = "Register `CLEARERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARERR_SPEC; -impl crate::RegisterSpec for CLEARERR_SPEC { +pub struct ClearerrSpec; +impl crate::RegisterSpec for ClearerrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearerr::W`](W) writer structure"] -impl crate::Writable for CLEARERR_SPEC { +impl crate::Writable for ClearerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARERR to value 0"] -impl crate::Resettable for CLEARERR_SPEC { +impl crate::Resettable for ClearerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/clearsrctran.rs b/src/gpdma1/clearsrctran.rs index 6aeff8a7..2005cc1f 100644 --- a/src/gpdma1/clearsrctran.rs +++ b/src/gpdma1/clearsrctran.rs @@ -1,176 +1,167 @@ #[doc = "Register `CLEARSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARSRCTRAN_SPEC; -impl crate::RegisterSpec for CLEARSRCTRAN_SPEC { +pub struct ClearsrctranSpec; +impl crate::RegisterSpec for ClearsrctranSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearsrctran::W`](W) writer structure"] -impl crate::Writable for CLEARSRCTRAN_SPEC { +impl crate::Writable for ClearsrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARSRCTRAN to value 0"] -impl crate::Resettable for CLEARSRCTRAN_SPEC { +impl crate::Resettable for ClearsrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/cleartfr.rs b/src/gpdma1/cleartfr.rs index 07b45de1..d90ac351 100644 --- a/src/gpdma1/cleartfr.rs +++ b/src/gpdma1/cleartfr.rs @@ -1,176 +1,167 @@ #[doc = "Register `CLEARTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_AW { +pub enum Ch0 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_AW) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_AW>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE1) + self.variant(Ch0::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_AW::VALUE2) + self.variant(Ch0::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_AW { +pub enum Ch1 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_AW) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_AW>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE1) + self.variant(Ch1::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_AW::VALUE2) + self.variant(Ch1::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_AW { +pub enum Ch2 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_AW) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_AW>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE1) + self.variant(Ch2::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_AW::VALUE2) + self.variant(Ch2::Value2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_AW { +pub enum Ch3 { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: clear status"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_AW) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_AW>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE1) + self.variant(Ch3::Value1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_AW::VALUE2) + self.variant(Ch3::Value2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLEARTFR_SPEC; -impl crate::RegisterSpec for CLEARTFR_SPEC { +pub struct CleartfrSpec; +impl crate::RegisterSpec for CleartfrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleartfr::W`](W) writer structure"] -impl crate::Writable for CLEARTFR_SPEC { +impl crate::Writable for CleartfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARTFR to value 0"] -impl crate::Resettable for CLEARTFR_SPEC { +impl crate::Resettable for CleartfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/dmacfgreg.rs b/src/gpdma1/dmacfgreg.rs index 0defde59..18085a8a 100644 --- a/src/gpdma1/dmacfgreg.rs +++ b/src/gpdma1/dmacfgreg.rs @@ -1,98 +1,89 @@ #[doc = "Register `DMACFGREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DMACFGREG` writer"] -pub type W = crate::W; -#[doc = "Field `DMA_EN` reader - GPDMA Enable bit."] -pub type DMA_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "GPDMA Enable bit.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA_EN_A { +pub enum DmaEn { #[doc = "0: GPDMA Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: GPDMA Enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA_EN_A) -> Self { + fn from(variant: DmaEn) -> Self { variant as u8 != 0 } } -impl DMA_EN_R { +#[doc = "Field `DMA_EN` reader - GPDMA Enable bit."] +pub type DmaEnR = crate::BitReader; +impl DmaEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA_EN_A { + pub const fn variant(&self) -> DmaEn { match self.bits { - false => DMA_EN_A::VALUE1, - true => DMA_EN_A::VALUE2, + false => DmaEn::Value1, + true => DmaEn::Value2, } } #[doc = "GPDMA Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA_EN_A::VALUE1 + *self == DmaEn::Value1 } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA_EN_A::VALUE2 + *self == DmaEn::Value2 } } #[doc = "Field `DMA_EN` writer - GPDMA Enable bit."] -pub type DMA_EN_W<'a, REG> = crate::BitWriter<'a, REG, DMA_EN_A>; -impl<'a, REG> DMA_EN_W<'a, REG> +pub type DmaEnW<'a, REG> = crate::BitWriter<'a, REG, DmaEn>; +impl<'a, REG> DmaEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "GPDMA Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA_EN_A::VALUE1) + self.variant(DmaEn::Value1) } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA_EN_A::VALUE2) + self.variant(DmaEn::Value2) } } impl R { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] - pub fn dma_en(&self) -> DMA_EN_R { - DMA_EN_R::new((self.bits & 1) != 0) + pub fn dma_en(&self) -> DmaEnR { + DmaEnR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] #[must_use] - pub fn dma_en(&mut self) -> DMA_EN_W { - DMA_EN_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dma_en(&mut self) -> DmaEnW { + DmaEnW::new(self, 0) } } #[doc = "GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DMACFGREG_SPEC; -impl crate::RegisterSpec for DMACFGREG_SPEC { +pub struct DmacfgregSpec; +impl crate::RegisterSpec for DmacfgregSpec { type Ux = u32; } #[doc = "`read()` method returns [`dmacfgreg::R`](R) reader structure"] -impl crate::Readable for DMACFGREG_SPEC {} +impl crate::Readable for DmacfgregSpec {} #[doc = "`write(|w| ..)` method takes [`dmacfgreg::W`](W) writer structure"] -impl crate::Writable for DMACFGREG_SPEC { +impl crate::Writable for DmacfgregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMACFGREG to value 0"] -impl crate::Resettable for DMACFGREG_SPEC { +impl crate::Resettable for DmacfgregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/id.rs b/src/gpdma1/id.rs index 3ec26a76..f739f8de 100644 --- a/src/gpdma1/id.rs +++ b/src/gpdma1/id.rs @@ -1,22 +1,22 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Hardcoded GPDMA Peripheral ID"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Hardcoded GPDMA Peripheral ID"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "GPDMA1 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00b0_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00b0_c000; } diff --git a/src/gpdma1/lstdstreg.rs b/src/gpdma1/lstdstreg.rs index 9871b854..ce9a4ed0 100644 --- a/src/gpdma1/lstdstreg.rs +++ b/src/gpdma1/lstdstreg.rs @@ -1,438 +1,429 @@ #[doc = "Register `LSTDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTDSTREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Destination last request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Destination last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Destination last request for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Destination last request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Destination last request for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Destination last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Destination last request for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Destination last request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Destination last request for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Destination last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Destination last request for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Destination last request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Destination last request for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Destination last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Destination last request for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Destination last request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Destination last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Destination last transaction request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Destination last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Destination last transaction request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Destination last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Destination last transaction request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Destination last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Destination last transaction request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LSTDSTREG_SPEC; -impl crate::RegisterSpec for LSTDSTREG_SPEC { +pub struct LstdstregSpec; +impl crate::RegisterSpec for LstdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`lstdstreg::R`](R) reader structure"] -impl crate::Readable for LSTDSTREG_SPEC {} +impl crate::Readable for LstdstregSpec {} #[doc = "`write(|w| ..)` method takes [`lstdstreg::W`](W) writer structure"] -impl crate::Writable for LSTDSTREG_SPEC { +impl crate::Writable for LstdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTDSTREG to value 0"] -impl crate::Resettable for LSTDSTREG_SPEC { +impl crate::Resettable for LstdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/lstsrcreg.rs b/src/gpdma1/lstsrcreg.rs index 6be38ebd..273a2364 100644 --- a/src/gpdma1/lstsrcreg.rs +++ b/src/gpdma1/lstsrcreg.rs @@ -1,438 +1,429 @@ #[doc = "Register `LSTSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTSRCREG` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Source last request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Source last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Source last request for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Source last request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Source last request for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Source last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Source last request for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Source last request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Source last request for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Source last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Source last request for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Source last request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Source last request for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Source last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: Not last transaction in current block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Last transaction in current block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Source last request for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Source last request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Source last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source last transaction request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source last transaction request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source last transaction request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source last transaction request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Source last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LSTSRCREG_SPEC; -impl crate::RegisterSpec for LSTSRCREG_SPEC { +pub struct LstsrcregSpec; +impl crate::RegisterSpec for LstsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`lstsrcreg::R`](R) reader structure"] -impl crate::Readable for LSTSRCREG_SPEC {} +impl crate::Readable for LstsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`lstsrcreg::W`](W) writer structure"] -impl crate::Writable for LSTSRCREG_SPEC { +impl crate::Writable for LstsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTSRCREG to value 0"] -impl crate::Resettable for LSTSRCREG_SPEC { +impl crate::Resettable for LstsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/maskblock.rs b/src/gpdma1/maskblock.rs index 5a506598..a92af3b0 100644 --- a/src/gpdma1/maskblock.rs +++ b/src/gpdma1/maskblock.rs @@ -1,438 +1,429 @@ #[doc = "Register `MASKBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKBLOCK` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKBLOCK_SPEC; -impl crate::RegisterSpec for MASKBLOCK_SPEC { +pub struct MaskblockSpec; +impl crate::RegisterSpec for MaskblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskblock::R`](R) reader structure"] -impl crate::Readable for MASKBLOCK_SPEC {} +impl crate::Readable for MaskblockSpec {} #[doc = "`write(|w| ..)` method takes [`maskblock::W`](W) writer structure"] -impl crate::Writable for MASKBLOCK_SPEC { +impl crate::Writable for MaskblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKBLOCK to value 0"] -impl crate::Resettable for MASKBLOCK_SPEC { +impl crate::Resettable for MaskblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/maskdsttran.rs b/src/gpdma1/maskdsttran.rs index 39d032f7..314058d9 100644 --- a/src/gpdma1/maskdsttran.rs +++ b/src/gpdma1/maskdsttran.rs @@ -1,438 +1,429 @@ #[doc = "Register `MASKDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKDSTTRAN` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKDSTTRAN_SPEC; -impl crate::RegisterSpec for MASKDSTTRAN_SPEC { +pub struct MaskdsttranSpec; +impl crate::RegisterSpec for MaskdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskdsttran::R`](R) reader structure"] -impl crate::Readable for MASKDSTTRAN_SPEC {} +impl crate::Readable for MaskdsttranSpec {} #[doc = "`write(|w| ..)` method takes [`maskdsttran::W`](W) writer structure"] -impl crate::Writable for MASKDSTTRAN_SPEC { +impl crate::Writable for MaskdsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKDSTTRAN to value 0"] -impl crate::Resettable for MASKDSTTRAN_SPEC { +impl crate::Resettable for MaskdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/maskerr.rs b/src/gpdma1/maskerr.rs index 503c4e9b..d30bed21 100644 --- a/src/gpdma1/maskerr.rs +++ b/src/gpdma1/maskerr.rs @@ -1,438 +1,429 @@ #[doc = "Register `MASKERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKERR` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKERR_SPEC; -impl crate::RegisterSpec for MASKERR_SPEC { +pub struct MaskerrSpec; +impl crate::RegisterSpec for MaskerrSpec { type Ux = u32; } #[doc = "`read()` method returns [`maskerr::R`](R) reader structure"] -impl crate::Readable for MASKERR_SPEC {} +impl crate::Readable for MaskerrSpec {} #[doc = "`write(|w| ..)` method takes [`maskerr::W`](W) writer structure"] -impl crate::Writable for MASKERR_SPEC { +impl crate::Writable for MaskerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKERR to value 0"] -impl crate::Resettable for MASKERR_SPEC { +impl crate::Resettable for MaskerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/masksrctran.rs b/src/gpdma1/masksrctran.rs index 8abfc7d7..3a4f2a99 100644 --- a/src/gpdma1/masksrctran.rs +++ b/src/gpdma1/masksrctran.rs @@ -1,438 +1,429 @@ #[doc = "Register `MASKSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKSRCTRAN` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKSRCTRAN_SPEC; -impl crate::RegisterSpec for MASKSRCTRAN_SPEC { +pub struct MasksrctranSpec; +impl crate::RegisterSpec for MasksrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`masksrctran::R`](R) reader structure"] -impl crate::Readable for MASKSRCTRAN_SPEC {} +impl crate::Readable for MasksrctranSpec {} #[doc = "`write(|w| ..)` method takes [`masksrctran::W`](W) writer structure"] -impl crate::Writable for MASKSRCTRAN_SPEC { +impl crate::Writable for MasksrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKSRCTRAN to value 0"] -impl crate::Resettable for MASKSRCTRAN_SPEC { +impl crate::Resettable for MasksrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/masktfr.rs b/src/gpdma1/masktfr.rs index e1b3aa7f..b961d04e 100644 --- a/src/gpdma1/masktfr.rs +++ b/src/gpdma1/masktfr.rs @@ -1,438 +1,429 @@ #[doc = "Register `MASKTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKTFR` writer"] -pub type W = crate::W; -#[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type CH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH0_A { +pub enum Ch0 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH0_A) -> Self { + fn from(variant: Ch0) -> Self { variant as u8 != 0 } } -impl CH0_R { +#[doc = "Field `CH0` reader - Mask bit for channel 0"] +pub type Ch0R = crate::BitReader; +impl Ch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH0_A { + pub const fn variant(&self) -> Ch0 { match self.bits { - false => CH0_A::VALUE1, - true => CH0_A::VALUE2, + false => Ch0::Value1, + true => Ch0::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH0_A::VALUE1 + *self == Ch0::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH0_A::VALUE2 + *self == Ch0::Value2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; -impl<'a, REG> CH0_W<'a, REG> +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; +impl<'a, REG> Ch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE1) + self.variant(Ch0::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH0_A::VALUE2) + self.variant(Ch0::Value2) } } -#[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type CH1_R = crate::BitReader; #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH1_A { +pub enum Ch1 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH1_A) -> Self { + fn from(variant: Ch1) -> Self { variant as u8 != 0 } } -impl CH1_R { +#[doc = "Field `CH1` reader - Mask bit for channel 1"] +pub type Ch1R = crate::BitReader; +impl Ch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH1_A { + pub const fn variant(&self) -> Ch1 { match self.bits { - false => CH1_A::VALUE1, - true => CH1_A::VALUE2, + false => Ch1::Value1, + true => Ch1::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH1_A::VALUE1 + *self == Ch1::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH1_A::VALUE2 + *self == Ch1::Value2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; -impl<'a, REG> CH1_W<'a, REG> +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; +impl<'a, REG> Ch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE1) + self.variant(Ch1::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH1_A::VALUE2) + self.variant(Ch1::Value2) } } -#[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type CH2_R = crate::BitReader; #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH2_A { +pub enum Ch2 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH2_A) -> Self { + fn from(variant: Ch2) -> Self { variant as u8 != 0 } } -impl CH2_R { +#[doc = "Field `CH2` reader - Mask bit for channel 2"] +pub type Ch2R = crate::BitReader; +impl Ch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH2_A { + pub const fn variant(&self) -> Ch2 { match self.bits { - false => CH2_A::VALUE1, - true => CH2_A::VALUE2, + false => Ch2::Value1, + true => Ch2::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH2_A::VALUE1 + *self == Ch2::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH2_A::VALUE2 + *self == Ch2::Value2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; -impl<'a, REG> CH2_W<'a, REG> +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; +impl<'a, REG> Ch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE1) + self.variant(Ch2::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH2_A::VALUE2) + self.variant(Ch2::Value2) } } -#[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type CH3_R = crate::BitReader; #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH3_A { +pub enum Ch3 { #[doc = "0: masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unmasked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH3_A) -> Self { + fn from(variant: Ch3) -> Self { variant as u8 != 0 } } -impl CH3_R { +#[doc = "Field `CH3` reader - Mask bit for channel 3"] +pub type Ch3R = crate::BitReader; +impl Ch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH3_A { + pub const fn variant(&self) -> Ch3 { match self.bits { - false => CH3_A::VALUE1, - true => CH3_A::VALUE2, + false => Ch3::Value1, + true => Ch3::Value2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH3_A::VALUE1 + *self == Ch3::Value1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH3_A::VALUE2 + *self == Ch3::Value2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; -impl<'a, REG> CH3_W<'a, REG> +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; +impl<'a, REG> Ch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE1) + self.variant(Ch3::Value1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH3_A::VALUE2) + self.variant(Ch3::Value2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MASKTFR_SPEC; -impl crate::RegisterSpec for MASKTFR_SPEC { +pub struct MasktfrSpec; +impl crate::RegisterSpec for MasktfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`masktfr::R`](R) reader structure"] -impl crate::Readable for MASKTFR_SPEC {} +impl crate::Readable for MasktfrSpec {} #[doc = "`write(|w| ..)` method takes [`masktfr::W`](W) writer structure"] -impl crate::Writable for MASKTFR_SPEC { +impl crate::Writable for MasktfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKTFR to value 0"] -impl crate::Resettable for MASKTFR_SPEC { +impl crate::Resettable for MasktfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/rawblock.rs b/src/gpdma1/rawblock.rs index 5a8667ff..6e63e3c7 100644 --- a/src/gpdma1/rawblock.rs +++ b/src/gpdma1/rawblock.rs @@ -1,94 +1,85 @@ #[doc = "Register `RAWBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWBLOCK_SPEC; -impl crate::RegisterSpec for RAWBLOCK_SPEC { +pub struct RawblockSpec; +impl crate::RegisterSpec for RawblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawblock::R`](R) reader structure"] -impl crate::Readable for RAWBLOCK_SPEC {} +impl crate::Readable for RawblockSpec {} #[doc = "`write(|w| ..)` method takes [`rawblock::W`](W) writer structure"] -impl crate::Writable for RAWBLOCK_SPEC { +impl crate::Writable for RawblockSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWBLOCK to value 0"] -impl crate::Resettable for RAWBLOCK_SPEC { +impl crate::Resettable for RawblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/rawdsttran.rs b/src/gpdma1/rawdsttran.rs index 2e771115..62b15e1b 100644 --- a/src/gpdma1/rawdsttran.rs +++ b/src/gpdma1/rawdsttran.rs @@ -1,94 +1,85 @@ #[doc = "Register `RAWDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWDSTTRAN_SPEC; -impl crate::RegisterSpec for RAWDSTTRAN_SPEC { +pub struct RawdsttranSpec; +impl crate::RegisterSpec for RawdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawdsttran::R`](R) reader structure"] -impl crate::Readable for RAWDSTTRAN_SPEC {} +impl crate::Readable for RawdsttranSpec {} #[doc = "`write(|w| ..)` method takes [`rawdsttran::W`](W) writer structure"] -impl crate::Writable for RAWDSTTRAN_SPEC { +impl crate::Writable for RawdsttranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWDSTTRAN to value 0"] -impl crate::Resettable for RAWDSTTRAN_SPEC { +impl crate::Resettable for RawdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/rawerr.rs b/src/gpdma1/rawerr.rs index 8bb1c2d1..1ee40fd3 100644 --- a/src/gpdma1/rawerr.rs +++ b/src/gpdma1/rawerr.rs @@ -1,94 +1,85 @@ #[doc = "Register `RAWERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWERR_SPEC; -impl crate::RegisterSpec for RAWERR_SPEC { +pub struct RawerrSpec; +impl crate::RegisterSpec for RawerrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawerr::R`](R) reader structure"] -impl crate::Readable for RAWERR_SPEC {} +impl crate::Readable for RawerrSpec {} #[doc = "`write(|w| ..)` method takes [`rawerr::W`](W) writer structure"] -impl crate::Writable for RAWERR_SPEC { +impl crate::Writable for RawerrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWERR to value 0"] -impl crate::Resettable for RAWERR_SPEC { +impl crate::Resettable for RawerrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/rawsrctran.rs b/src/gpdma1/rawsrctran.rs index f1d63279..40db19a2 100644 --- a/src/gpdma1/rawsrctran.rs +++ b/src/gpdma1/rawsrctran.rs @@ -1,94 +1,85 @@ #[doc = "Register `RAWSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWSRCTRAN_SPEC; -impl crate::RegisterSpec for RAWSRCTRAN_SPEC { +pub struct RawsrctranSpec; +impl crate::RegisterSpec for RawsrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawsrctran::R`](R) reader structure"] -impl crate::Readable for RAWSRCTRAN_SPEC {} +impl crate::Readable for RawsrctranSpec {} #[doc = "`write(|w| ..)` method takes [`rawsrctran::W`](W) writer structure"] -impl crate::Writable for RAWSRCTRAN_SPEC { +impl crate::Writable for RawsrctranSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWSRCTRAN to value 0"] -impl crate::Resettable for RAWSRCTRAN_SPEC { +impl crate::Resettable for RawsrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/rawtfr.rs b/src/gpdma1/rawtfr.rs index 27990b80..e0bfeac9 100644 --- a/src/gpdma1/rawtfr.rs +++ b/src/gpdma1/rawtfr.rs @@ -1,94 +1,85 @@ #[doc = "Register `RAWTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } } #[doc = "Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWTFR_SPEC; -impl crate::RegisterSpec for RAWTFR_SPEC { +pub struct RawtfrSpec; +impl crate::RegisterSpec for RawtfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawtfr::R`](R) reader structure"] -impl crate::Readable for RAWTFR_SPEC {} +impl crate::Readable for RawtfrSpec {} #[doc = "`write(|w| ..)` method takes [`rawtfr::W`](W) writer structure"] -impl crate::Writable for RAWTFR_SPEC { +impl crate::Writable for RawtfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWTFR to value 0"] -impl crate::Resettable for RAWTFR_SPEC { +impl crate::Resettable for RawtfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/reqdstreg.rs b/src/gpdma1/reqdstreg.rs index d68f1228..24be5bd4 100644 --- a/src/gpdma1/reqdstreg.rs +++ b/src/gpdma1/reqdstreg.rs @@ -1,242 +1,233 @@ #[doc = "Register `REQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REQDSTREG_SPEC; -impl crate::RegisterSpec for REQDSTREG_SPEC { +pub struct ReqdstregSpec; +impl crate::RegisterSpec for ReqdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`reqdstreg::R`](R) reader structure"] -impl crate::Readable for REQDSTREG_SPEC {} +impl crate::Readable for ReqdstregSpec {} #[doc = "`write(|w| ..)` method takes [`reqdstreg::W`](W) writer structure"] -impl crate::Writable for REQDSTREG_SPEC { +impl crate::Writable for ReqdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQDSTREG to value 0"] -impl crate::Resettable for REQDSTREG_SPEC { +impl crate::Resettable for ReqdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/reqsrcreg.rs b/src/gpdma1/reqsrcreg.rs index 31c52f85..ca91e856 100644 --- a/src/gpdma1/reqsrcreg.rs +++ b/src/gpdma1/reqsrcreg.rs @@ -1,242 +1,233 @@ #[doc = "Register `REQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REQSRCREG_SPEC; -impl crate::RegisterSpec for REQSRCREG_SPEC { +pub struct ReqsrcregSpec; +impl crate::RegisterSpec for ReqsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`reqsrcreg::R`](R) reader structure"] -impl crate::Readable for REQSRCREG_SPEC {} +impl crate::Readable for ReqsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`reqsrcreg::W`](W) writer structure"] -impl crate::Writable for REQSRCREG_SPEC { +impl crate::Writable for ReqsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQSRCREG to value 0"] -impl crate::Resettable for REQSRCREG_SPEC { +impl crate::Resettable for ReqsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/sglreqdstreg.rs b/src/gpdma1/sglreqdstreg.rs index 1bc59adc..893f7801 100644 --- a/src/gpdma1/sglreqdstreg.rs +++ b/src/gpdma1/sglreqdstreg.rs @@ -1,242 +1,233 @@ #[doc = "Register `SGLREQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SGLREQDSTREG_SPEC; -impl crate::RegisterSpec for SGLREQDSTREG_SPEC { +pub struct SglreqdstregSpec; +impl crate::RegisterSpec for SglreqdstregSpec { type Ux = u32; } #[doc = "`read()` method returns [`sglreqdstreg::R`](R) reader structure"] -impl crate::Readable for SGLREQDSTREG_SPEC {} +impl crate::Readable for SglreqdstregSpec {} #[doc = "`write(|w| ..)` method takes [`sglreqdstreg::W`](W) writer structure"] -impl crate::Writable for SGLREQDSTREG_SPEC { +impl crate::Writable for SglreqdstregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQDSTREG to value 0"] -impl crate::Resettable for SGLREQDSTREG_SPEC { +impl crate::Resettable for SglreqdstregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/sglreqsrcreg.rs b/src/gpdma1/sglreqsrcreg.rs index 9ab8ade3..ee091146 100644 --- a/src/gpdma1/sglreqsrcreg.rs +++ b/src/gpdma1/sglreqsrcreg.rs @@ -1,242 +1,233 @@ #[doc = "Register `SGLREQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH0_AW { +pub enum WeCh0 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH0_AW) -> Self { + fn from(variant: WeCh0) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_AW>; -impl<'a, REG> WE_CH0_W<'a, REG> +pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; +impl<'a, REG> WeCh0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE1) + self.variant(WeCh0::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH0_AW::VALUE2) + self.variant(WeCh0::Value2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH1_AW { +pub enum WeCh1 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH1_AW) -> Self { + fn from(variant: WeCh1) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_AW>; -impl<'a, REG> WE_CH1_W<'a, REG> +pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; +impl<'a, REG> WeCh1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE1) + self.variant(WeCh1::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH1_AW::VALUE2) + self.variant(WeCh1::Value2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH2_AW { +pub enum WeCh2 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH2_AW) -> Self { + fn from(variant: WeCh2) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_AW>; -impl<'a, REG> WE_CH2_W<'a, REG> +pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; +impl<'a, REG> WeCh2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE1) + self.variant(WeCh2::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH2_AW::VALUE2) + self.variant(WeCh2::Value2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WE_CH3_AW { +pub enum WeCh3 { #[doc = "0: write disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WE_CH3_AW) -> Self { + fn from(variant: WeCh3) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_AW>; -impl<'a, REG> WE_CH3_W<'a, REG> +pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; +impl<'a, REG> WeCh3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE1) + self.variant(WeCh3::Value1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WE_CH3_AW::VALUE2) + self.variant(WeCh3::Value2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> CH0_W { - CH0_W::new(self, 0) + pub fn ch0(&mut self) -> Ch0W { + Ch0W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> CH1_W { - CH1_W::new(self, 1) + pub fn ch1(&mut self) -> Ch1W { + Ch1W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> CH2_W { - CH2_W::new(self, 2) + pub fn ch2(&mut self) -> Ch2W { + Ch2W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> CH3_W { - CH3_W::new(self, 3) + pub fn ch3(&mut self) -> Ch3W { + Ch3W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WE_CH0_W { - WE_CH0_W::new(self, 8) + pub fn we_ch0(&mut self) -> WeCh0W { + WeCh0W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WE_CH1_W { - WE_CH1_W::new(self, 9) + pub fn we_ch1(&mut self) -> WeCh1W { + WeCh1W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WE_CH2_W { - WE_CH2_W::new(self, 10) + pub fn we_ch2(&mut self) -> WeCh2W { + WeCh2W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WE_CH3_W { - WE_CH3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn we_ch3(&mut self) -> WeCh3W { + WeCh3W::new(self, 11) } } #[doc = "Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SGLREQSRCREG_SPEC; -impl crate::RegisterSpec for SGLREQSRCREG_SPEC { +pub struct SglreqsrcregSpec; +impl crate::RegisterSpec for SglreqsrcregSpec { type Ux = u32; } #[doc = "`read()` method returns [`sglreqsrcreg::R`](R) reader structure"] -impl crate::Readable for SGLREQSRCREG_SPEC {} +impl crate::Readable for SglreqsrcregSpec {} #[doc = "`write(|w| ..)` method takes [`sglreqsrcreg::W`](W) writer structure"] -impl crate::Writable for SGLREQSRCREG_SPEC { +impl crate::Writable for SglreqsrcregSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQSRCREG to value 0"] -impl crate::Resettable for SGLREQSRCREG_SPEC { +impl crate::Resettable for SglreqsrcregSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statusblock.rs b/src/gpdma1/statusblock.rs index bcdee3eb..bdd3811e 100644 --- a/src/gpdma1/statusblock.rs +++ b/src/gpdma1/statusblock.rs @@ -1,43 +1,43 @@ #[doc = "Register `STATUSBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSBLOCK_SPEC; -impl crate::RegisterSpec for STATUSBLOCK_SPEC { +pub struct StatusblockSpec; +impl crate::RegisterSpec for StatusblockSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusblock::R`](R) reader structure"] -impl crate::Readable for STATUSBLOCK_SPEC {} +impl crate::Readable for StatusblockSpec {} #[doc = "`reset()` method sets STATUSBLOCK to value 0"] -impl crate::Resettable for STATUSBLOCK_SPEC { +impl crate::Resettable for StatusblockSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statusdsttran.rs b/src/gpdma1/statusdsttran.rs index c789ac07..71f793a7 100644 --- a/src/gpdma1/statusdsttran.rs +++ b/src/gpdma1/statusdsttran.rs @@ -1,43 +1,43 @@ #[doc = "Register `STATUSDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSDSTTRAN_SPEC; -impl crate::RegisterSpec for STATUSDSTTRAN_SPEC { +pub struct StatusdsttranSpec; +impl crate::RegisterSpec for StatusdsttranSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusdsttran::R`](R) reader structure"] -impl crate::Readable for STATUSDSTTRAN_SPEC {} +impl crate::Readable for StatusdsttranSpec {} #[doc = "`reset()` method sets STATUSDSTTRAN to value 0"] -impl crate::Resettable for STATUSDSTTRAN_SPEC { +impl crate::Resettable for StatusdsttranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statuserr.rs b/src/gpdma1/statuserr.rs index a53bb128..eef5c086 100644 --- a/src/gpdma1/statuserr.rs +++ b/src/gpdma1/statuserr.rs @@ -1,43 +1,43 @@ #[doc = "Register `STATUSERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } #[doc = "IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSERR_SPEC; -impl crate::RegisterSpec for STATUSERR_SPEC { +pub struct StatuserrSpec; +impl crate::RegisterSpec for StatuserrSpec { type Ux = u32; } #[doc = "`read()` method returns [`statuserr::R`](R) reader structure"] -impl crate::Readable for STATUSERR_SPEC {} +impl crate::Readable for StatuserrSpec {} #[doc = "`reset()` method sets STATUSERR to value 0"] -impl crate::Resettable for STATUSERR_SPEC { +impl crate::Resettable for StatuserrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statusint.rs b/src/gpdma1/statusint.rs index e8fd9f1e..a98fb3e6 100644 --- a/src/gpdma1/statusint.rs +++ b/src/gpdma1/statusint.rs @@ -1,50 +1,50 @@ #[doc = "Register `STATUSINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TFR` reader - OR of the contents of STATUSTFR register"] -pub type TFR_R = crate::BitReader; +pub type TfrR = crate::BitReader; #[doc = "Field `BLOCK` reader - OR of the contents of STATUSBLOCK register"] -pub type BLOCK_R = crate::BitReader; +pub type BlockR = crate::BitReader; #[doc = "Field `SRCT` reader - OR of the contents of STATUSSRCTRAN register"] -pub type SRCT_R = crate::BitReader; +pub type SrctR = crate::BitReader; #[doc = "Field `DSTT` reader - OR of the contents of STATUSDSTTRAN register"] -pub type DSTT_R = crate::BitReader; +pub type DsttR = crate::BitReader; #[doc = "Field `ERR` reader - OR of the contents of STATUSERR register"] -pub type ERR_R = crate::BitReader; +pub type ErrR = crate::BitReader; impl R { #[doc = "Bit 0 - OR of the contents of STATUSTFR register"] #[inline(always)] - pub fn tfr(&self) -> TFR_R { - TFR_R::new((self.bits & 1) != 0) + pub fn tfr(&self) -> TfrR { + TfrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - OR of the contents of STATUSBLOCK register"] #[inline(always)] - pub fn block(&self) -> BLOCK_R { - BLOCK_R::new(((self.bits >> 1) & 1) != 0) + pub fn block(&self) -> BlockR { + BlockR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OR of the contents of STATUSSRCTRAN register"] #[inline(always)] - pub fn srct(&self) -> SRCT_R { - SRCT_R::new(((self.bits >> 2) & 1) != 0) + pub fn srct(&self) -> SrctR { + SrctR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - OR of the contents of STATUSDSTTRAN register"] #[inline(always)] - pub fn dstt(&self) -> DSTT_R { - DSTT_R::new(((self.bits >> 3) & 1) != 0) + pub fn dstt(&self) -> DsttR { + DsttR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OR of the contents of STATUSERR register"] #[inline(always)] - pub fn err(&self) -> ERR_R { - ERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn err(&self) -> ErrR { + ErrR::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSINT_SPEC; -impl crate::RegisterSpec for STATUSINT_SPEC { +pub struct StatusintSpec; +impl crate::RegisterSpec for StatusintSpec { type Ux = u32; } #[doc = "`read()` method returns [`statusint::R`](R) reader structure"] -impl crate::Readable for STATUSINT_SPEC {} +impl crate::Readable for StatusintSpec {} #[doc = "`reset()` method sets STATUSINT to value 0"] -impl crate::Resettable for STATUSINT_SPEC { +impl crate::Resettable for StatusintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statussrctran.rs b/src/gpdma1/statussrctran.rs index c433350d..03942459 100644 --- a/src/gpdma1/statussrctran.rs +++ b/src/gpdma1/statussrctran.rs @@ -1,43 +1,43 @@ #[doc = "Register `STATUSSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } #[doc = "IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSSRCTRAN_SPEC; -impl crate::RegisterSpec for STATUSSRCTRAN_SPEC { +pub struct StatussrctranSpec; +impl crate::RegisterSpec for StatussrctranSpec { type Ux = u32; } #[doc = "`read()` method returns [`statussrctran::R`](R) reader structure"] -impl crate::Readable for STATUSSRCTRAN_SPEC {} +impl crate::Readable for StatussrctranSpec {} #[doc = "`reset()` method sets STATUSSRCTRAN to value 0"] -impl crate::Resettable for STATUSSRCTRAN_SPEC { +impl crate::Resettable for StatussrctranSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/statustfr.rs b/src/gpdma1/statustfr.rs index 327310a6..267d4af7 100644 --- a/src/gpdma1/statustfr.rs +++ b/src/gpdma1/statustfr.rs @@ -1,43 +1,43 @@ #[doc = "Register `STATUSTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type CH0_R = crate::BitReader; +pub type Ch0R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type CH1_R = crate::BitReader; +pub type Ch1R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type CH2_R = crate::BitReader; +pub type Ch2R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type CH3_R = crate::BitReader; +pub type Ch3R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> CH0_R { - CH0_R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> Ch0R { + Ch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> CH1_R { - CH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> Ch1R { + Ch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> CH2_R { - CH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> Ch2R { + Ch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> CH3_R { - CH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> Ch3R { + Ch3R::new(((self.bits >> 3) & 1) != 0) } } #[doc = "IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STATUSTFR_SPEC; -impl crate::RegisterSpec for STATUSTFR_SPEC { +pub struct StatustfrSpec; +impl crate::RegisterSpec for StatustfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`statustfr::R`](R) reader structure"] -impl crate::Readable for STATUSTFR_SPEC {} +impl crate::Readable for StatustfrSpec {} #[doc = "`reset()` method sets STATUSTFR to value 0"] -impl crate::Resettable for STATUSTFR_SPEC { +impl crate::Resettable for StatustfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1/type_.rs b/src/gpdma1/type_.rs index cf672516..49e402c0 100644 --- a/src/gpdma1/type_.rs +++ b/src/gpdma1/type_.rs @@ -1,22 +1,22 @@ #[doc = "Register `TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Component Type"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Component Type"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TYPE_SPEC; -impl crate::RegisterSpec for TYPE_SPEC { +pub struct TypeSpec; +impl crate::RegisterSpec for TypeSpec { type Ux = u32; } #[doc = "`read()` method returns [`type_::R`](R) reader structure"] -impl crate::Readable for TYPE_SPEC {} +impl crate::Readable for TypeSpec {} #[doc = "`reset()` method sets TYPE to value 0x4457_1110"] -impl crate::Resettable for TYPE_SPEC { +impl crate::Resettable for TypeSpec { const RESET_VALUE: u32 = 0x4457_1110; } diff --git a/src/gpdma1/version.rs b/src/gpdma1/version.rs index 1b3d1f83..66e4c358 100644 --- a/src/gpdma1/version.rs +++ b/src/gpdma1/version.rs @@ -1,22 +1,22 @@ #[doc = "Register `VERSION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Version number of the component"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Version number of the component"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } #[doc = "DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VERSION_SPEC; -impl crate::RegisterSpec for VERSION_SPEC { +pub struct VersionSpec; +impl crate::RegisterSpec for VersionSpec { type Ux = u32; } #[doc = "`read()` method returns [`version::R`](R) reader structure"] -impl crate::Readable for VERSION_SPEC {} +impl crate::Readable for VersionSpec {} #[doc = "`reset()` method sets VERSION to value 0x3231_342a"] -impl crate::Resettable for VERSION_SPEC { +impl crate::Resettable for VersionSpec { const RESET_VALUE: u32 = 0x3231_342a; } diff --git a/src/gpdma1_ch0.rs b/src/gpdma1_ch0.rs index 92db00c3..6850653c 100644 --- a/src/gpdma1_ch0.rs +++ b/src/gpdma1_ch0.rs @@ -1,75 +1,81 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sar: SAR, + sar: Sar, _reserved1: [u8; 0x04], - dar: DAR, + dar: Dar, _reserved2: [u8; 0x0c], - ctll: CTLL, - ctlh: CTLH, + ctll: Ctll, + ctlh: Ctlh, _reserved4: [u8; 0x20], - cfgl: CFGL, - cfgh: CFGH, + cfgl: Cfgl, + cfgh: Cfgh, } impl RegisterBlock { #[doc = "0x00 - Source Address Register"] #[inline(always)] - pub const fn sar(&self) -> &SAR { + pub const fn sar(&self) -> &Sar { &self.sar } #[doc = "0x08 - Destination Address Register"] #[inline(always)] - pub const fn dar(&self) -> &DAR { + pub const fn dar(&self) -> &Dar { &self.dar } #[doc = "0x18 - Control Register Low"] #[inline(always)] - pub const fn ctll(&self) -> &CTLL { + pub const fn ctll(&self) -> &Ctll { &self.ctll } #[doc = "0x1c - Control Register High"] #[inline(always)] - pub const fn ctlh(&self) -> &CTLH { + pub const fn ctlh(&self) -> &Ctlh { &self.ctlh } #[doc = "0x40 - Configuration Register Low"] #[inline(always)] - pub const fn cfgl(&self) -> &CFGL { + pub const fn cfgl(&self) -> &Cfgl { &self.cfgl } #[doc = "0x44 - Configuration Register High"] #[inline(always)] - pub const fn cfgh(&self) -> &CFGH { + pub const fn cfgh(&self) -> &Cfgh { &self.cfgh } } #[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] -pub type SAR = crate::Reg; +#[doc(alias = "SAR")] +pub type Sar = crate::Reg; #[doc = "Source Address Register"] pub mod sar; #[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] -pub type DAR = crate::Reg; +#[doc(alias = "DAR")] +pub type Dar = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; #[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] -pub type CTLL = crate::Reg; +#[doc(alias = "CTLL")] +pub type Ctll = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; #[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] -pub type CTLH = crate::Reg; +#[doc(alias = "CTLH")] +pub type Ctlh = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; #[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] -pub type CFGL = crate::Reg; +#[doc(alias = "CFGL")] +pub type Cfgl = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; #[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] -pub type CFGH = crate::Reg; +#[doc(alias = "CFGH")] +pub type Cfgh = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; diff --git a/src/gpdma1_ch0/cfgh.rs b/src/gpdma1_ch0/cfgh.rs index 8f1fc507..32adc452 100644 --- a/src/gpdma1_ch0/cfgh.rs +++ b/src/gpdma1_ch0/cfgh.rs @@ -1,207 +1,198 @@ #[doc = "Register `CFGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGH` writer"] -pub type W = crate::W; -#[doc = "Field `FCMODE` reader - Flow Control Mode"] -pub type FCMODE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Flow Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCMODE_A { +pub enum Fcmode { #[doc = "0: Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCMODE_A) -> Self { + fn from(variant: Fcmode) -> Self { variant as u8 != 0 } } -impl FCMODE_R { +#[doc = "Field `FCMODE` reader - Flow Control Mode"] +pub type FcmodeR = crate::BitReader; +impl FcmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCMODE_A { + pub const fn variant(&self) -> Fcmode { match self.bits { - false => FCMODE_A::VALUE1, - true => FCMODE_A::VALUE2, + false => Fcmode::Value1, + true => Fcmode::Value2, } } #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCMODE_A::VALUE1 + *self == Fcmode::Value1 } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCMODE_A::VALUE2 + *self == Fcmode::Value2 } } #[doc = "Field `FCMODE` writer - Flow Control Mode"] -pub type FCMODE_W<'a, REG> = crate::BitWriter<'a, REG, FCMODE_A>; -impl<'a, REG> FCMODE_W<'a, REG> +pub type FcmodeW<'a, REG> = crate::BitWriter<'a, REG, Fcmode>; +impl<'a, REG> FcmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE1) + self.variant(Fcmode::Value1) } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCMODE_A::VALUE2) + self.variant(Fcmode::Value2) } } -#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] -pub type FIFO_MODE_R = crate::BitReader; #[doc = "FIFO Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_MODE_A { +pub enum FifoMode { #[doc = "0: Space/data available for single AHB transfer of the specified transfer width."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_MODE_A) -> Self { + fn from(variant: FifoMode) -> Self { variant as u8 != 0 } } -impl FIFO_MODE_R { +#[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] +pub type FifoModeR = crate::BitReader; +impl FifoModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_MODE_A { + pub const fn variant(&self) -> FifoMode { match self.bits { - false => FIFO_MODE_A::VALUE1, - true => FIFO_MODE_A::VALUE2, + false => FifoMode::Value1, + true => FifoMode::Value2, } } #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_MODE_A::VALUE1 + *self == FifoMode::Value1 } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_MODE_A::VALUE2 + *self == FifoMode::Value2 } } #[doc = "Field `FIFO_MODE` writer - FIFO Mode Select"] -pub type FIFO_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FIFO_MODE_A>; -impl<'a, REG> FIFO_MODE_W<'a, REG> +pub type FifoModeW<'a, REG> = crate::BitWriter<'a, REG, FifoMode>; +impl<'a, REG> FifoModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE1) + self.variant(FifoMode::Value1) } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FIFO_MODE_A::VALUE2) + self.variant(FifoMode::Value2) } } #[doc = "Field `PROTCTL` reader - Protection Control"] -pub type PROTCTL_R = crate::FieldReader; +pub type ProtctlR = crate::FieldReader; #[doc = "Field `PROTCTL` writer - Protection Control"] -pub type PROTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type ProtctlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_PER` reader - Source Peripheral"] -pub type SRC_PER_R = crate::FieldReader; +pub type SrcPerR = crate::FieldReader; #[doc = "Field `SRC_PER` writer - Source Peripheral"] -pub type SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SrcPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `DEST_PER` reader - Destination Peripheral"] -pub type DEST_PER_R = crate::FieldReader; +pub type DestPerR = crate::FieldReader; #[doc = "Field `DEST_PER` writer - Destination Peripheral"] -pub type DEST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DestPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - pub fn fcmode(&self) -> FCMODE_R { - FCMODE_R::new((self.bits & 1) != 0) + pub fn fcmode(&self) -> FcmodeR { + FcmodeR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - pub fn fifo_mode(&self) -> FIFO_MODE_R { - FIFO_MODE_R::new(((self.bits >> 1) & 1) != 0) + pub fn fifo_mode(&self) -> FifoModeR { + FifoModeR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - pub fn protctl(&self) -> PROTCTL_R { - PROTCTL_R::new(((self.bits >> 2) & 7) as u8) + pub fn protctl(&self) -> ProtctlR { + ProtctlR::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - pub fn src_per(&self) -> SRC_PER_R { - SRC_PER_R::new(((self.bits >> 7) & 0x0f) as u8) + pub fn src_per(&self) -> SrcPerR { + SrcPerR::new(((self.bits >> 7) & 0x0f) as u8) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - pub fn dest_per(&self) -> DEST_PER_R { - DEST_PER_R::new(((self.bits >> 11) & 0x0f) as u8) + pub fn dest_per(&self) -> DestPerR { + DestPerR::new(((self.bits >> 11) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] #[must_use] - pub fn fcmode(&mut self) -> FCMODE_W { - FCMODE_W::new(self, 0) + pub fn fcmode(&mut self) -> FcmodeW { + FcmodeW::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] #[must_use] - pub fn fifo_mode(&mut self) -> FIFO_MODE_W { - FIFO_MODE_W::new(self, 1) + pub fn fifo_mode(&mut self) -> FifoModeW { + FifoModeW::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] #[must_use] - pub fn protctl(&mut self) -> PROTCTL_W { - PROTCTL_W::new(self, 2) + pub fn protctl(&mut self) -> ProtctlW { + ProtctlW::new(self, 2) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] #[must_use] - pub fn src_per(&mut self) -> SRC_PER_W { - SRC_PER_W::new(self, 7) + pub fn src_per(&mut self) -> SrcPerW { + SrcPerW::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] #[must_use] - pub fn dest_per(&mut self) -> DEST_PER_W { - DEST_PER_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dest_per(&mut self) -> DestPerW { + DestPerW::new(self, 11) } } #[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGH_SPEC; -impl crate::RegisterSpec for CFGH_SPEC { +pub struct CfghSpec; +impl crate::RegisterSpec for CfghSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgh::R`](R) reader structure"] -impl crate::Readable for CFGH_SPEC {} +impl crate::Readable for CfghSpec {} #[doc = "`write(|w| ..)` method takes [`cfgh::W`](W) writer structure"] -impl crate::Writable for CFGH_SPEC { +impl crate::Writable for CfghSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGH to value 0x04"] -impl crate::Resettable for CFGH_SPEC { +impl crate::Resettable for CfghSpec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/gpdma1_ch0/cfgl.rs b/src/gpdma1_ch0/cfgl.rs index 82587518..665f6e76 100644 --- a/src/gpdma1_ch0/cfgl.rs +++ b/src/gpdma1_ch0/cfgl.rs @@ -1,258 +1,258 @@ #[doc = "Register `CFGL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH_PRIOR` reader - Channel priority"] -pub type CH_PRIOR_R = crate::FieldReader; +pub type ChPriorR = crate::FieldReader; #[doc = "Field `CH_PRIOR` writer - Channel priority"] -pub type CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `CH_SUSP` reader - Channel Suspend"] -pub type CH_SUSP_R = crate::BitReader; +pub type ChPriorW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Channel Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH_SUSP_A { +pub enum ChSusp { #[doc = "0: Not suspended."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Suspend DMA transfer from the source."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH_SUSP_A) -> Self { + fn from(variant: ChSusp) -> Self { variant as u8 != 0 } } -impl CH_SUSP_R { +#[doc = "Field `CH_SUSP` reader - Channel Suspend"] +pub type ChSuspR = crate::BitReader; +impl ChSuspR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH_SUSP_A { + pub const fn variant(&self) -> ChSusp { match self.bits { - false => CH_SUSP_A::VALUE1, - true => CH_SUSP_A::VALUE2, + false => ChSusp::Value1, + true => ChSusp::Value2, } } #[doc = "Not suspended."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_SUSP_A::VALUE1 + *self == ChSusp::Value1 } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_SUSP_A::VALUE2 + *self == ChSusp::Value2 } } #[doc = "Field `CH_SUSP` writer - Channel Suspend"] -pub type CH_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, CH_SUSP_A>; -impl<'a, REG> CH_SUSP_W<'a, REG> +pub type ChSuspW<'a, REG> = crate::BitWriter<'a, REG, ChSusp>; +impl<'a, REG> ChSuspW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not suspended."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE1) + self.variant(ChSusp::Value1) } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_SUSP_A::VALUE2) + self.variant(ChSusp::Value2) } } -#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] -pub type FIFO_EMPTY_R = crate::BitReader; #[doc = "Indicates if there is data left in the channel FIFO\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FIFO_EMPTY_A { +pub enum FifoEmpty { #[doc = "1: Channel FIFO empty"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: Channel FIFO not empty"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FIFO_EMPTY_A) -> Self { + fn from(variant: FifoEmpty) -> Self { variant as u8 != 0 } } -impl FIFO_EMPTY_R { +#[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] +pub type FifoEmptyR = crate::BitReader; +impl FifoEmptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FIFO_EMPTY_A { + pub const fn variant(&self) -> FifoEmpty { match self.bits { - true => FIFO_EMPTY_A::VALUE1, - false => FIFO_EMPTY_A::VALUE2, + true => FifoEmpty::Value1, + false => FifoEmpty::Value2, } } #[doc = "Channel FIFO empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE1 + *self == FifoEmpty::Value1 } #[doc = "Channel FIFO not empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FIFO_EMPTY_A::VALUE2 + *self == FifoEmpty::Value2 } } -#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_R = crate::BitReader; #[doc = "Destination Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_DST_A { +pub enum HsSelDst { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware- initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_DST_A) -> Self { + fn from(variant: HsSelDst) -> Self { variant as u8 != 0 } } -impl HS_SEL_DST_R { +#[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] +pub type HsSelDstR = crate::BitReader; +impl HsSelDstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_DST_A { + pub const fn variant(&self) -> HsSelDst { match self.bits { - false => HS_SEL_DST_A::VALUE1, - true => HS_SEL_DST_A::VALUE2, + false => HsSelDst::Value1, + true => HsSelDst::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_DST_A::VALUE1 + *self == HsSelDst::Value1 } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_DST_A::VALUE2 + *self == HsSelDst::Value2 } } #[doc = "Field `HS_SEL_DST` writer - Destination Software or Hardware Handshaking Select"] -pub type HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_DST_A>; -impl<'a, REG> HS_SEL_DST_W<'a, REG> +pub type HsSelDstW<'a, REG> = crate::BitWriter<'a, REG, HsSelDst>; +impl<'a, REG> HsSelDstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE1) + self.variant(HsSelDst::Value1) } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_DST_A::VALUE2) + self.variant(HsSelDst::Value2) } } -#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_R = crate::BitReader; #[doc = "Source Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HS_SEL_SRC_A { +pub enum HsSelSrc { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software handshaking interface. Hardware-initiated transaction requests are ignored."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HS_SEL_SRC_A) -> Self { + fn from(variant: HsSelSrc) -> Self { variant as u8 != 0 } } -impl HS_SEL_SRC_R { +#[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] +pub type HsSelSrcR = crate::BitReader; +impl HsSelSrcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HS_SEL_SRC_A { + pub const fn variant(&self) -> HsSelSrc { match self.bits { - false => HS_SEL_SRC_A::VALUE1, - true => HS_SEL_SRC_A::VALUE2, + false => HsSelSrc::Value1, + true => HsSelSrc::Value2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE1 + *self == HsSelSrc::Value1 } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HS_SEL_SRC_A::VALUE2 + *self == HsSelSrc::Value2 } } #[doc = "Field `HS_SEL_SRC` writer - Source Software or Hardware Handshaking Select"] -pub type HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_SRC_A>; -impl<'a, REG> HS_SEL_SRC_W<'a, REG> +pub type HsSelSrcW<'a, REG> = crate::BitWriter<'a, REG, HsSelSrc>; +impl<'a, REG> HsSelSrcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE1) + self.variant(HsSelSrc::Value1) } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HS_SEL_SRC_A::VALUE2) + self.variant(HsSelSrc::Value2) } } -#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] -pub type LOCK_CH_L_R = crate::FieldReader; #[doc = "Channel Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_CH_L_A { +pub enum LockChL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_CH_L_A) -> Self { + fn from(variant: LockChL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_CH_L_A { +impl crate::FieldSpec for LockChL { type Ux = u8; } -impl LOCK_CH_L_R { +#[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] +pub type LockChLR = crate::FieldReader; +impl LockChLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_CH_L_A::VALUE1), - 1 => Some(LOCK_CH_L_A::VALUE2), - 2 => Some(LOCK_CH_L_A::VALUE3), + 0 => Some(LockChL::Value1), + 1 => Some(LockChL::Value2), + 2 => Some(LockChL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_CH_L_A::VALUE1 + *self == LockChL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_CH_L_A::VALUE2 + *self == LockChL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_CH_L_A::VALUE3 + *self == LockChL::Value3 } } #[doc = "Field `LOCK_CH_L` writer - Channel Lock Level"] -pub type LOCK_CH_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_CH_L_A>; -impl<'a, REG> LOCK_CH_L_W<'a, REG> +pub type LockChLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockChL>; +impl<'a, REG> LockChLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,71 +260,71 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE1) + self.variant(LockChL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE2) + self.variant(LockChL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_CH_L_A::VALUE3) + self.variant(LockChL::Value3) } } -#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] -pub type LOCK_B_L_R = crate::FieldReader; #[doc = "Bus Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LOCK_B_L_A { +pub enum LockBL { #[doc = "0: Over complete DMA transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Over complete DMA block transfer"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Over complete DMA transaction"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LOCK_B_L_A) -> Self { + fn from(variant: LockBL) -> Self { variant as _ } } -impl crate::FieldSpec for LOCK_B_L_A { +impl crate::FieldSpec for LockBL { type Ux = u8; } -impl LOCK_B_L_R { +#[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] +pub type LockBLR = crate::FieldReader; +impl LockBLR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LOCK_B_L_A::VALUE1), - 1 => Some(LOCK_B_L_A::VALUE2), - 2 => Some(LOCK_B_L_A::VALUE3), + 0 => Some(LockBL::Value1), + 1 => Some(LockBL::Value2), + 2 => Some(LockBL::Value3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOCK_B_L_A::VALUE1 + *self == LockBL::Value1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOCK_B_L_A::VALUE2 + *self == LockBL::Value2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LOCK_B_L_A::VALUE3 + *self == LockBL::Value3 } } #[doc = "Field `LOCK_B_L` writer - Bus Lock Level"] -pub type LOCK_B_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_B_L_A>; -impl<'a, REG> LOCK_B_L_W<'a, REG> +pub type LockBLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockBL>; +impl<'a, REG> LockBLW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -332,290 +332,281 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE1) + self.variant(LockBL::Value1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE2) + self.variant(LockBL::Value2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LOCK_B_L_A::VALUE3) + self.variant(LockBL::Value3) } } #[doc = "Field `LOCK_CH` reader - Channel Lock Bit"] -pub type LOCK_CH_R = crate::BitReader; +pub type LockChR = crate::BitReader; #[doc = "Field `LOCK_CH` writer - Channel Lock Bit"] -pub type LOCK_CH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LockChW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCK_B` reader - Bus Lock Bit"] -pub type LOCK_B_R = crate::BitReader; +pub type LockBR = crate::BitReader; #[doc = "Field `LOCK_B` writer - Bus Lock Bit"] -pub type LOCK_B_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_R = crate::BitReader; +pub type LockBW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Destination Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DST_HS_POL_A { +pub enum DstHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DST_HS_POL_A) -> Self { + fn from(variant: DstHsPol) -> Self { variant as u8 != 0 } } -impl DST_HS_POL_R { +#[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] +pub type DstHsPolR = crate::BitReader; +impl DstHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DST_HS_POL_A { + pub const fn variant(&self) -> DstHsPol { match self.bits { - false => DST_HS_POL_A::VALUE1, - true => DST_HS_POL_A::VALUE2, + false => DstHsPol::Value1, + true => DstHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DST_HS_POL_A::VALUE1 + *self == DstHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DST_HS_POL_A::VALUE2 + *self == DstHsPol::Value2 } } #[doc = "Field `DST_HS_POL` writer - Destination Handshaking Interface Polarity"] -pub type DST_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, DST_HS_POL_A>; -impl<'a, REG> DST_HS_POL_W<'a, REG> +pub type DstHsPolW<'a, REG> = crate::BitWriter<'a, REG, DstHsPol>; +impl<'a, REG> DstHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE1) + self.variant(DstHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DST_HS_POL_A::VALUE2) + self.variant(DstHsPol::Value2) } } -#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_R = crate::BitReader; #[doc = "Source Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRC_HS_POL_A { +pub enum SrcHsPol { #[doc = "0: Active high"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active low"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRC_HS_POL_A) -> Self { + fn from(variant: SrcHsPol) -> Self { variant as u8 != 0 } } -impl SRC_HS_POL_R { +#[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] +pub type SrcHsPolR = crate::BitReader; +impl SrcHsPolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRC_HS_POL_A { + pub const fn variant(&self) -> SrcHsPol { match self.bits { - false => SRC_HS_POL_A::VALUE1, - true => SRC_HS_POL_A::VALUE2, + false => SrcHsPol::Value1, + true => SrcHsPol::Value2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRC_HS_POL_A::VALUE1 + *self == SrcHsPol::Value1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRC_HS_POL_A::VALUE2 + *self == SrcHsPol::Value2 } } #[doc = "Field `SRC_HS_POL` writer - Source Handshaking Interface Polarity"] -pub type SRC_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, SRC_HS_POL_A>; -impl<'a, REG> SRC_HS_POL_W<'a, REG> +pub type SrcHsPolW<'a, REG> = crate::BitWriter<'a, REG, SrcHsPol>; +impl<'a, REG> SrcHsPolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE1) + self.variant(SrcHsPol::Value1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRC_HS_POL_A::VALUE2) + self.variant(SrcHsPol::Value2) } } #[doc = "Field `MAX_ABRST` reader - Maximum AMBA Burst Length"] -pub type MAX_ABRST_R = crate::FieldReader; +pub type MaxAbrstR = crate::FieldReader; #[doc = "Field `MAX_ABRST` writer - Maximum AMBA Burst Length"] -pub type MAX_ABRST_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type MaxAbrstW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - pub fn ch_prior(&self) -> CH_PRIOR_R { - CH_PRIOR_R::new(((self.bits >> 5) & 7) as u8) + pub fn ch_prior(&self) -> ChPriorR { + ChPriorR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - pub fn ch_susp(&self) -> CH_SUSP_R { - CH_SUSP_R::new(((self.bits >> 8) & 1) != 0) + pub fn ch_susp(&self) -> ChSuspR { + ChSuspR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Indicates if there is data left in the channel FIFO"] #[inline(always)] - pub fn fifo_empty(&self) -> FIFO_EMPTY_R { - FIFO_EMPTY_R::new(((self.bits >> 9) & 1) != 0) + pub fn fifo_empty(&self) -> FifoEmptyR { + FifoEmptyR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { - HS_SEL_DST_R::new(((self.bits >> 10) & 1) != 0) + pub fn hs_sel_dst(&self) -> HsSelDstR { + HsSelDstR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { - HS_SEL_SRC_R::new(((self.bits >> 11) & 1) != 0) + pub fn hs_sel_src(&self) -> HsSelSrcR { + HsSelSrcR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - pub fn lock_ch_l(&self) -> LOCK_CH_L_R { - LOCK_CH_L_R::new(((self.bits >> 12) & 3) as u8) + pub fn lock_ch_l(&self) -> LockChLR { + LockChLR::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - pub fn lock_b_l(&self) -> LOCK_B_L_R { - LOCK_B_L_R::new(((self.bits >> 14) & 3) as u8) + pub fn lock_b_l(&self) -> LockBLR { + LockBLR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - pub fn lock_ch(&self) -> LOCK_CH_R { - LOCK_CH_R::new(((self.bits >> 16) & 1) != 0) + pub fn lock_ch(&self) -> LockChR { + LockChR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - pub fn lock_b(&self) -> LOCK_B_R { - LOCK_B_R::new(((self.bits >> 17) & 1) != 0) + pub fn lock_b(&self) -> LockBR { + LockBR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - pub fn dst_hs_pol(&self) -> DST_HS_POL_R { - DST_HS_POL_R::new(((self.bits >> 18) & 1) != 0) + pub fn dst_hs_pol(&self) -> DstHsPolR { + DstHsPolR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - pub fn src_hs_pol(&self) -> SRC_HS_POL_R { - SRC_HS_POL_R::new(((self.bits >> 19) & 1) != 0) + pub fn src_hs_pol(&self) -> SrcHsPolR { + SrcHsPolR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - pub fn max_abrst(&self) -> MAX_ABRST_R { - MAX_ABRST_R::new(((self.bits >> 20) & 0x03ff) as u16) + pub fn max_abrst(&self) -> MaxAbrstR { + MaxAbrstR::new(((self.bits >> 20) & 0x03ff) as u16) } } impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] #[must_use] - pub fn ch_prior(&mut self) -> CH_PRIOR_W { - CH_PRIOR_W::new(self, 5) + pub fn ch_prior(&mut self) -> ChPriorW { + ChPriorW::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] #[must_use] - pub fn ch_susp(&mut self) -> CH_SUSP_W { - CH_SUSP_W::new(self, 8) + pub fn ch_susp(&mut self) -> ChSuspW { + ChSuspW::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { - HS_SEL_DST_W::new(self, 10) + pub fn hs_sel_dst(&mut self) -> HsSelDstW { + HsSelDstW::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { - HS_SEL_SRC_W::new(self, 11) + pub fn hs_sel_src(&mut self) -> HsSelSrcW { + HsSelSrcW::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] #[must_use] - pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { - LOCK_CH_L_W::new(self, 12) + pub fn lock_ch_l(&mut self) -> LockChLW { + LockChLW::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] #[must_use] - pub fn lock_b_l(&mut self) -> LOCK_B_L_W { - LOCK_B_L_W::new(self, 14) + pub fn lock_b_l(&mut self) -> LockBLW { + LockBLW::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_ch(&mut self) -> LOCK_CH_W { - LOCK_CH_W::new(self, 16) + pub fn lock_ch(&mut self) -> LockChW { + LockChW::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_b(&mut self) -> LOCK_B_W { - LOCK_B_W::new(self, 17) + pub fn lock_b(&mut self) -> LockBW { + LockBW::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { - DST_HS_POL_W::new(self, 18) + pub fn dst_hs_pol(&mut self) -> DstHsPolW { + DstHsPolW::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { - SRC_HS_POL_W::new(self, 19) + pub fn src_hs_pol(&mut self) -> SrcHsPolW { + SrcHsPolW::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] #[must_use] - pub fn max_abrst(&mut self) -> MAX_ABRST_W { - MAX_ABRST_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn max_abrst(&mut self) -> MaxAbrstW { + MaxAbrstW::new(self, 20) } } #[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFGL_SPEC; -impl crate::RegisterSpec for CFGL_SPEC { +pub struct CfglSpec; +impl crate::RegisterSpec for CfglSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfgl::R`](R) reader structure"] -impl crate::Readable for CFGL_SPEC {} +impl crate::Readable for CfglSpec {} #[doc = "`write(|w| ..)` method takes [`cfgl::W`](W) writer structure"] -impl crate::Writable for CFGL_SPEC { +impl crate::Writable for CfglSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGL to value 0x0e00"] -impl crate::Resettable for CFGL_SPEC { +impl crate::Resettable for CfglSpec { const RESET_VALUE: u32 = 0x0e00; } diff --git a/src/gpdma1_ch0/ctlh.rs b/src/gpdma1_ch0/ctlh.rs index b193f905..828a2d1a 100644 --- a/src/gpdma1_ch0/ctlh.rs +++ b/src/gpdma1_ch0/ctlh.rs @@ -1,64 +1,55 @@ #[doc = "Register `CTLH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_TS` reader - Block Transfer Size"] -pub type BLOCK_TS_R = crate::FieldReader; +pub type BlockTsR = crate::FieldReader; #[doc = "Field `BLOCK_TS` writer - Block Transfer Size"] -pub type BLOCK_TS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BlockTsW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DONE` reader - Done bit"] -pub type DONE_R = crate::BitReader; +pub type DoneR = crate::BitReader; #[doc = "Field `DONE` writer - Done bit"] -pub type DONE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - pub fn block_ts(&self) -> BLOCK_TS_R { - BLOCK_TS_R::new((self.bits & 0x0fff) as u16) + pub fn block_ts(&self) -> BlockTsR { + BlockTsR::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - pub fn done(&self) -> DONE_R { - DONE_R::new(((self.bits >> 12) & 1) != 0) + pub fn done(&self) -> DoneR { + DoneR::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn block_ts(&mut self) -> BLOCK_TS_W { - BLOCK_TS_W::new(self, 0) + pub fn block_ts(&mut self) -> BlockTsW { + BlockTsW::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DONE_W { - DONE_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn done(&mut self) -> DoneW { + DoneW::new(self, 12) } } #[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLH_SPEC; -impl crate::RegisterSpec for CTLH_SPEC { +pub struct CtlhSpec; +impl crate::RegisterSpec for CtlhSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctlh::R`](R) reader structure"] -impl crate::Readable for CTLH_SPEC {} +impl crate::Readable for CtlhSpec {} #[doc = "`write(|w| ..)` method takes [`ctlh::W`](W) writer structure"] -impl crate::Writable for CTLH_SPEC { +impl crate::Writable for CtlhSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLH to value 0x02"] -impl crate::Resettable for CTLH_SPEC { +impl crate::Resettable for CtlhSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/gpdma1_ch0/ctll.rs b/src/gpdma1_ch0/ctll.rs index 11e6834f..815080e6 100644 --- a/src/gpdma1_ch0/ctll.rs +++ b/src/gpdma1_ch0/ctll.rs @@ -1,71 +1,71 @@ #[doc = "Register `CTLL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INT_EN` reader - Interrupt Enable Bit"] -pub type INT_EN_R = crate::BitReader; +pub type IntEnR = crate::BitReader; #[doc = "Field `INT_EN` writer - Interrupt Enable Bit"] -pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DST_TR_WIDTH` reader - Destination Transfer Width"] -pub type DST_TR_WIDTH_R = crate::FieldReader; +pub type DstTrWidthR = crate::FieldReader; #[doc = "Field `DST_TR_WIDTH` writer - Destination Transfer Width"] -pub type DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DstTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_TR_WIDTH` reader - Source Transfer Width"] -pub type SRC_TR_WIDTH_R = crate::FieldReader; +pub type SrcTrWidthR = crate::FieldReader; #[doc = "Field `SRC_TR_WIDTH` writer - Source Transfer Width"] -pub type SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `DINC` reader - Destination Address Increment"] -pub type DINC_R = crate::FieldReader; +pub type SrcTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Destination Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DINC_A { +pub enum Dinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DINC_A) -> Self { + fn from(variant: Dinc) -> Self { variant as _ } } -impl crate::FieldSpec for DINC_A { +impl crate::FieldSpec for Dinc { type Ux = u8; } -impl DINC_R { +#[doc = "Field `DINC` reader - Destination Address Increment"] +pub type DincR = crate::FieldReader; +impl DincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DINC_A::VALUE1), - 1 => Some(DINC_A::VALUE2), - 2 => Some(DINC_A::VALUE3), + 0 => Some(Dinc::Value1), + 1 => Some(Dinc::Value2), + 2 => Some(Dinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DINC_A::VALUE1 + *self == Dinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DINC_A::VALUE2 + *self == Dinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DINC_A::VALUE3 + *self == Dinc::Value3 } } #[doc = "Field `DINC` writer - Destination Address Increment"] -pub type DINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DINC_A>; -impl<'a, REG> DINC_W<'a, REG> +pub type DincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dinc>; +impl<'a, REG> DincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,71 +73,71 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE1) + self.variant(Dinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE2) + self.variant(Dinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DINC_A::VALUE3) + self.variant(Dinc::Value3) } } -#[doc = "Field `SINC` reader - Source Address Increment"] -pub type SINC_R = crate::FieldReader; #[doc = "Source Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SINC_A { +pub enum Sinc { #[doc = "0: Increment"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Decrement"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: No change"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SINC_A) -> Self { + fn from(variant: Sinc) -> Self { variant as _ } } -impl crate::FieldSpec for SINC_A { +impl crate::FieldSpec for Sinc { type Ux = u8; } -impl SINC_R { +#[doc = "Field `SINC` reader - Source Address Increment"] +pub type SincR = crate::FieldReader; +impl SincR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SINC_A::VALUE1), - 1 => Some(SINC_A::VALUE2), - 2 => Some(SINC_A::VALUE3), + 0 => Some(Sinc::Value1), + 1 => Some(Sinc::Value2), + 2 => Some(Sinc::Value3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SINC_A::VALUE1 + *self == Sinc::Value1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SINC_A::VALUE2 + *self == Sinc::Value2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SINC_A::VALUE3 + *self == Sinc::Value3 } } #[doc = "Field `SINC` writer - Source Address Increment"] -pub type SINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SINC_A>; -impl<'a, REG> SINC_W<'a, REG> +pub type SincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sinc>; +impl<'a, REG> SincW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -145,146 +145,137 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE1) + self.variant(Sinc::Value1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE2) + self.variant(Sinc::Value2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SINC_A::VALUE3) + self.variant(Sinc::Value3) } } #[doc = "Field `DEST_MSIZE` reader - Destination Burst Transaction Length"] -pub type DEST_MSIZE_R = crate::FieldReader; +pub type DestMsizeR = crate::FieldReader; #[doc = "Field `DEST_MSIZE` writer - Destination Burst Transaction Length"] -pub type DEST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DestMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_MSIZE` reader - Source Burst Transaction Length"] -pub type SRC_MSIZE_R = crate::FieldReader; +pub type SrcMsizeR = crate::FieldReader; #[doc = "Field `SRC_MSIZE` writer - Source Burst Transaction Length"] -pub type SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SrcMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `TT_FC` reader - Transfer Type and Flow Control"] -pub type TT_FC_R = crate::FieldReader; +pub type TtFcR = crate::FieldReader; #[doc = "Field `TT_FC` writer - Transfer Type and Flow Control"] -pub type TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TtFcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - pub fn int_en(&self) -> INT_EN_R { - INT_EN_R::new((self.bits & 1) != 0) + pub fn int_en(&self) -> IntEnR { + IntEnR::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { - DST_TR_WIDTH_R::new(((self.bits >> 1) & 7) as u8) + pub fn dst_tr_width(&self) -> DstTrWidthR { + DstTrWidthR::new(((self.bits >> 1) & 7) as u8) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { - SRC_TR_WIDTH_R::new(((self.bits >> 4) & 7) as u8) + pub fn src_tr_width(&self) -> SrcTrWidthR { + SrcTrWidthR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - pub fn dinc(&self) -> DINC_R { - DINC_R::new(((self.bits >> 7) & 3) as u8) + pub fn dinc(&self) -> DincR { + DincR::new(((self.bits >> 7) & 3) as u8) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - pub fn sinc(&self) -> SINC_R { - SINC_R::new(((self.bits >> 9) & 3) as u8) + pub fn sinc(&self) -> SincR { + SincR::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - pub fn dest_msize(&self) -> DEST_MSIZE_R { - DEST_MSIZE_R::new(((self.bits >> 11) & 7) as u8) + pub fn dest_msize(&self) -> DestMsizeR { + DestMsizeR::new(((self.bits >> 11) & 7) as u8) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - pub fn src_msize(&self) -> SRC_MSIZE_R { - SRC_MSIZE_R::new(((self.bits >> 14) & 7) as u8) + pub fn src_msize(&self) -> SrcMsizeR { + SrcMsizeR::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - pub fn tt_fc(&self) -> TT_FC_R { - TT_FC_R::new(((self.bits >> 20) & 7) as u8) + pub fn tt_fc(&self) -> TtFcR { + TtFcR::new(((self.bits >> 20) & 7) as u8) } } impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] #[must_use] - pub fn int_en(&mut self) -> INT_EN_W { - INT_EN_W::new(self, 0) + pub fn int_en(&mut self) -> IntEnW { + IntEnW::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] #[must_use] - pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { - DST_TR_WIDTH_W::new(self, 1) + pub fn dst_tr_width(&mut self) -> DstTrWidthW { + DstTrWidthW::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] #[must_use] - pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { - SRC_TR_WIDTH_W::new(self, 4) + pub fn src_tr_width(&mut self) -> SrcTrWidthW { + SrcTrWidthW::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] #[must_use] - pub fn dinc(&mut self) -> DINC_W { - DINC_W::new(self, 7) + pub fn dinc(&mut self) -> DincW { + DincW::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] #[must_use] - pub fn sinc(&mut self) -> SINC_W { - SINC_W::new(self, 9) + pub fn sinc(&mut self) -> SincW { + SincW::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn dest_msize(&mut self) -> DEST_MSIZE_W { - DEST_MSIZE_W::new(self, 11) + pub fn dest_msize(&mut self) -> DestMsizeW { + DestMsizeW::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn src_msize(&mut self) -> SRC_MSIZE_W { - SRC_MSIZE_W::new(self, 14) + pub fn src_msize(&mut self) -> SrcMsizeW { + SrcMsizeW::new(self, 14) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] #[must_use] - pub fn tt_fc(&mut self) -> TT_FC_W { - TT_FC_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tt_fc(&mut self) -> TtFcW { + TtFcW::new(self, 20) } } #[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTLL_SPEC; -impl crate::RegisterSpec for CTLL_SPEC { +pub struct CtllSpec; +impl crate::RegisterSpec for CtllSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctll::R`](R) reader structure"] -impl crate::Readable for CTLL_SPEC {} +impl crate::Readable for CtllSpec {} #[doc = "`write(|w| ..)` method takes [`ctll::W`](W) writer structure"] -impl crate::Writable for CTLL_SPEC { +impl crate::Writable for CtllSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLL to value 0x0030_4801"] -impl crate::Resettable for CTLL_SPEC { +impl crate::Resettable for CtllSpec { const RESET_VALUE: u32 = 0x0030_4801; } diff --git a/src/gpdma1_ch0/dar.rs b/src/gpdma1_ch0/dar.rs index e65cf651..c29a247f 100644 --- a/src/gpdma1_ch0/dar.rs +++ b/src/gpdma1_ch0/dar.rs @@ -1,49 +1,40 @@ #[doc = "Register `DAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAR` reader - Current Destination address of DMA transfer"] -pub type DAR_R = crate::FieldReader; +pub type DarR = crate::FieldReader; #[doc = "Field `DAR` writer - Current Destination address of DMA transfer"] -pub type DAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - pub fn dar(&self) -> DAR_R { - DAR_R::new(self.bits) + pub fn dar(&self) -> DarR { + DarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] #[must_use] - pub fn dar(&mut self) -> DAR_W { - DAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dar(&mut self) -> DarW { + DarW::new(self, 0) } } #[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAR_SPEC; -impl crate::RegisterSpec for DAR_SPEC { +pub struct DarSpec; +impl crate::RegisterSpec for DarSpec { type Ux = u32; } #[doc = "`read()` method returns [`dar::R`](R) reader structure"] -impl crate::Readable for DAR_SPEC {} +impl crate::Readable for DarSpec {} #[doc = "`write(|w| ..)` method takes [`dar::W`](W) writer structure"] -impl crate::Writable for DAR_SPEC { +impl crate::Writable for DarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAR to value 0"] -impl crate::Resettable for DAR_SPEC { +impl crate::Resettable for DarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma1_ch0/sar.rs b/src/gpdma1_ch0/sar.rs index 156571e6..cf5b145b 100644 --- a/src/gpdma1_ch0/sar.rs +++ b/src/gpdma1_ch0/sar.rs @@ -1,49 +1,40 @@ #[doc = "Register `SAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SAR` reader - Current Source Address of DMA transfer"] -pub type SAR_R = crate::FieldReader; +pub type SarR = crate::FieldReader; #[doc = "Field `SAR` writer - Current Source Address of DMA transfer"] -pub type SAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - pub fn sar(&self) -> SAR_R { - SAR_R::new(self.bits) + pub fn sar(&self) -> SarR { + SarR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] #[must_use] - pub fn sar(&mut self) -> SAR_W { - SAR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sar(&mut self) -> SarW { + SarW::new(self, 0) } } #[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SAR_SPEC; -impl crate::RegisterSpec for SAR_SPEC { +pub struct SarSpec; +impl crate::RegisterSpec for SarSpec { type Ux = u32; } #[doc = "`read()` method returns [`sar::R`](R) reader structure"] -impl crate::Readable for SAR_SPEC {} +impl crate::Readable for SarSpec {} #[doc = "`write(|w| ..)` method takes [`sar::W`](W) writer structure"] -impl crate::Writable for SAR_SPEC { +impl crate::Writable for SarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAR to value 0"] -impl crate::Resettable for SAR_SPEC { +impl crate::Resettable for SarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0.rs b/src/ledts0.rs index 9603f433..80f8b83e 100644 --- a/src/ledts0.rs +++ b/src/ledts0.rs @@ -1,127 +1,138 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, - globctl: GLOBCTL, - fnctl: FNCTL, - evfr: EVFR, - tsval: TSVAL, - line0: LINE0, - line1: LINE1, - ldcmp0: LDCMP0, - ldcmp1: LDCMP1, - tscmp0: TSCMP0, - tscmp1: TSCMP1, + id: Id, + globctl: Globctl, + fnctl: Fnctl, + evfr: Evfr, + tsval: Tsval, + line0: Line0, + line1: Line1, + ldcmp0: Ldcmp0, + ldcmp1: Ldcmp1, + tscmp0: Tscmp0, + tscmp1: Tscmp1, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x04 - Global Control Register"] #[inline(always)] - pub const fn globctl(&self) -> &GLOBCTL { + pub const fn globctl(&self) -> &Globctl { &self.globctl } #[doc = "0x08 - Function Control Register"] #[inline(always)] - pub const fn fnctl(&self) -> &FNCTL { + pub const fn fnctl(&self) -> &Fnctl { &self.fnctl } #[doc = "0x0c - Event Flag Register"] #[inline(always)] - pub const fn evfr(&self) -> &EVFR { + pub const fn evfr(&self) -> &Evfr { &self.evfr } #[doc = "0x10 - Touch-sense TS-Counter Value"] #[inline(always)] - pub const fn tsval(&self) -> &TSVAL { + pub const fn tsval(&self) -> &Tsval { &self.tsval } #[doc = "0x14 - Line Pattern Register 0"] #[inline(always)] - pub const fn line0(&self) -> &LINE0 { + pub const fn line0(&self) -> &Line0 { &self.line0 } #[doc = "0x18 - Line Pattern Register 1"] #[inline(always)] - pub const fn line1(&self) -> &LINE1 { + pub const fn line1(&self) -> &Line1 { &self.line1 } #[doc = "0x1c - LED Compare Register 0"] #[inline(always)] - pub const fn ldcmp0(&self) -> &LDCMP0 { + pub const fn ldcmp0(&self) -> &Ldcmp0 { &self.ldcmp0 } #[doc = "0x20 - LED Compare Register 1"] #[inline(always)] - pub const fn ldcmp1(&self) -> &LDCMP1 { + pub const fn ldcmp1(&self) -> &Ldcmp1 { &self.ldcmp1 } #[doc = "0x24 - Touch-sense Compare Register 0"] #[inline(always)] - pub const fn tscmp0(&self) -> &TSCMP0 { + pub const fn tscmp0(&self) -> &Tscmp0 { &self.tscmp0 } #[doc = "0x28 - Touch-sense Compare Register 1"] #[inline(always)] - pub const fn tscmp1(&self) -> &TSCMP1 { + pub const fn tscmp1(&self) -> &Tscmp1 { &self.tscmp1 } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "GLOBCTL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globctl`] module"] -pub type GLOBCTL = crate::Reg; +#[doc(alias = "GLOBCTL")] +pub type Globctl = crate::Reg; #[doc = "Global Control Register"] pub mod globctl; #[doc = "FNCTL (rw) register accessor: Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fnctl`] module"] -pub type FNCTL = crate::Reg; +#[doc(alias = "FNCTL")] +pub type Fnctl = crate::Reg; #[doc = "Function Control Register"] pub mod fnctl; #[doc = "EVFR (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evfr`] module"] -pub type EVFR = crate::Reg; +#[doc(alias = "EVFR")] +pub type Evfr = crate::Reg; #[doc = "Event Flag Register"] pub mod evfr; #[doc = "TSVAL (rw) register accessor: Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsval`] module"] -pub type TSVAL = crate::Reg; +#[doc(alias = "TSVAL")] +pub type Tsval = crate::Reg; #[doc = "Touch-sense TS-Counter Value"] pub mod tsval; #[doc = "LINE0 (rw) register accessor: Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line0`] module"] -pub type LINE0 = crate::Reg; +#[doc(alias = "LINE0")] +pub type Line0 = crate::Reg; #[doc = "Line Pattern Register 0"] pub mod line0; #[doc = "LINE1 (rw) register accessor: Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line1`] module"] -pub type LINE1 = crate::Reg; +#[doc(alias = "LINE1")] +pub type Line1 = crate::Reg; #[doc = "Line Pattern Register 1"] pub mod line1; #[doc = "LDCMP0 (rw) register accessor: LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp0`] module"] -pub type LDCMP0 = crate::Reg; +#[doc(alias = "LDCMP0")] +pub type Ldcmp0 = crate::Reg; #[doc = "LED Compare Register 0"] pub mod ldcmp0; #[doc = "LDCMP1 (rw) register accessor: LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp1`] module"] -pub type LDCMP1 = crate::Reg; +#[doc(alias = "LDCMP1")] +pub type Ldcmp1 = crate::Reg; #[doc = "LED Compare Register 1"] pub mod ldcmp1; #[doc = "TSCMP0 (rw) register accessor: Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp0`] module"] -pub type TSCMP0 = crate::Reg; +#[doc(alias = "TSCMP0")] +pub type Tscmp0 = crate::Reg; #[doc = "Touch-sense Compare Register 0"] pub mod tscmp0; #[doc = "TSCMP1 (rw) register accessor: Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp1`] module"] -pub type TSCMP1 = crate::Reg; +#[doc(alias = "TSCMP1")] +pub type Tscmp1 = crate::Reg; #[doc = "Touch-sense Compare Register 1"] pub mod tscmp1; diff --git a/src/ledts0/evfr.rs b/src/ledts0/evfr.rs index 8716037c..c22b9d74 100644 --- a/src/ledts0/evfr.rs +++ b/src/ledts0/evfr.rs @@ -1,207 +1,198 @@ #[doc = "Register `EVFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EVFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSF` reader - Time Slice Interrupt Flag"] -pub type TSF_R = crate::BitReader; +pub type TsfR = crate::BitReader; #[doc = "Field `TFF` reader - (Extended) Time Frame Interrupt Flag"] -pub type TFF_R = crate::BitReader; +pub type TffR = crate::BitReader; #[doc = "Field `TPF` reader - Autoscan Time Period Interrupt Flag"] -pub type TPF_R = crate::BitReader; -#[doc = "Field `TSCTROVF` reader - TS-Counter Overflow Indication"] -pub type TSCTROVF_R = crate::BitReader; +pub type TpfR = crate::BitReader; #[doc = "TS-Counter Overflow Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSCTROVF_A { +pub enum Tsctrovf { #[doc = "0: No overflow has occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The TS-counter has overflowed at least once."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSCTROVF_A) -> Self { + fn from(variant: Tsctrovf) -> Self { variant as u8 != 0 } } -impl TSCTROVF_R { +#[doc = "Field `TSCTROVF` reader - TS-Counter Overflow Indication"] +pub type TsctrovfR = crate::BitReader; +impl TsctrovfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSCTROVF_A { + pub const fn variant(&self) -> Tsctrovf { match self.bits { - false => TSCTROVF_A::VALUE1, - true => TSCTROVF_A::VALUE2, + false => Tsctrovf::Value1, + true => Tsctrovf::Value2, } } #[doc = "No overflow has occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSCTROVF_A::VALUE1 + *self == Tsctrovf::Value1 } #[doc = "The TS-counter has overflowed at least once."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSCTROVF_A::VALUE2 + *self == Tsctrovf::Value2 } } #[doc = "Clear Time Slice Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSF_AW { +pub enum Ctsf { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TSF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSF_AW) -> Self { + fn from(variant: Ctsf) -> Self { variant as u8 != 0 } } #[doc = "Field `CTSF` writer - Clear Time Slice Interrupt Flag"] -pub type CTSF_W<'a, REG> = crate::BitWriter<'a, REG, CTSF_AW>; -impl<'a, REG> CTSF_W<'a, REG> +pub type CtsfW<'a, REG> = crate::BitWriter<'a, REG, Ctsf>; +impl<'a, REG> CtsfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTSF_AW::VALUE1) + self.variant(Ctsf::Value1) } #[doc = "Bit TSF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTSF_AW::VALUE2) + self.variant(Ctsf::Value2) } } #[doc = "Clear (Extended) Time Frame Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTFF_AW { +pub enum Ctff { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TFF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTFF_AW) -> Self { + fn from(variant: Ctff) -> Self { variant as u8 != 0 } } #[doc = "Field `CTFF` writer - Clear (Extended) Time Frame Interrupt Flag"] -pub type CTFF_W<'a, REG> = crate::BitWriter<'a, REG, CTFF_AW>; -impl<'a, REG> CTFF_W<'a, REG> +pub type CtffW<'a, REG> = crate::BitWriter<'a, REG, Ctff>; +impl<'a, REG> CtffW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTFF_AW::VALUE1) + self.variant(Ctff::Value1) } #[doc = "Bit TFF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTFF_AW::VALUE2) + self.variant(Ctff::Value2) } } #[doc = "Clear Autoscan Time Period Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTPF_AW { +pub enum Ctpf { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TPF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTPF_AW) -> Self { + fn from(variant: Ctpf) -> Self { variant as u8 != 0 } } #[doc = "Field `CTPF` writer - Clear Autoscan Time Period Interrupt Flag"] -pub type CTPF_W<'a, REG> = crate::BitWriter<'a, REG, CTPF_AW>; -impl<'a, REG> CTPF_W<'a, REG> +pub type CtpfW<'a, REG> = crate::BitWriter<'a, REG, Ctpf>; +impl<'a, REG> CtpfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTPF_AW::VALUE1) + self.variant(Ctpf::Value1) } #[doc = "Bit TPF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTPF_AW::VALUE2) + self.variant(Ctpf::Value2) } } impl R { #[doc = "Bit 0 - Time Slice Interrupt Flag"] #[inline(always)] - pub fn tsf(&self) -> TSF_R { - TSF_R::new((self.bits & 1) != 0) + pub fn tsf(&self) -> TsfR { + TsfR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - (Extended) Time Frame Interrupt Flag"] #[inline(always)] - pub fn tff(&self) -> TFF_R { - TFF_R::new(((self.bits >> 1) & 1) != 0) + pub fn tff(&self) -> TffR { + TffR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Autoscan Time Period Interrupt Flag"] #[inline(always)] - pub fn tpf(&self) -> TPF_R { - TPF_R::new(((self.bits >> 2) & 1) != 0) + pub fn tpf(&self) -> TpfR { + TpfR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TS-Counter Overflow Indication"] #[inline(always)] - pub fn tsctrovf(&self) -> TSCTROVF_R { - TSCTROVF_R::new(((self.bits >> 3) & 1) != 0) + pub fn tsctrovf(&self) -> TsctrovfR { + TsctrovfR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 16 - Clear Time Slice Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctsf(&mut self) -> CTSF_W { - CTSF_W::new(self, 16) + pub fn ctsf(&mut self) -> CtsfW { + CtsfW::new(self, 16) } #[doc = "Bit 17 - Clear (Extended) Time Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctff(&mut self) -> CTFF_W { - CTFF_W::new(self, 17) + pub fn ctff(&mut self) -> CtffW { + CtffW::new(self, 17) } #[doc = "Bit 18 - Clear Autoscan Time Period Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctpf(&mut self) -> CTPF_W { - CTPF_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ctpf(&mut self) -> CtpfW { + CtpfW::new(self, 18) } } #[doc = "Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVFR_SPEC; -impl crate::RegisterSpec for EVFR_SPEC { +pub struct EvfrSpec; +impl crate::RegisterSpec for EvfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`evfr::R`](R) reader structure"] -impl crate::Readable for EVFR_SPEC {} +impl crate::Readable for EvfrSpec {} #[doc = "`write(|w| ..)` method takes [`evfr::W`](W) writer structure"] -impl crate::Writable for EVFR_SPEC { +impl crate::Writable for EvfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EVFR to value 0"] -impl crate::Resettable for EVFR_SPEC { +impl crate::Resettable for EvfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/fnctl.rs b/src/ledts0/fnctl.rs index 1a643c3d..b80b5ab7 100644 --- a/src/ledts0/fnctl.rs +++ b/src/ledts0/fnctl.rs @@ -1,51 +1,51 @@ #[doc = "Register `FNCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FNCTL` writer"] -pub type W = crate::W; -#[doc = "Field `PADT` reader - Touch-Sense TSIN Pad Turn"] -pub type PADT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Touch-Sense TSIN Pad Turn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PADT_A { +pub enum Padt { #[doc = "0: TSIN0"] - VALUE1 = 0, + Value1 = 0, #[doc = "7: TSIN7"] - VALUE2 = 7, + Value2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PADT_A) -> Self { + fn from(variant: Padt) -> Self { variant as _ } } -impl crate::FieldSpec for PADT_A { +impl crate::FieldSpec for Padt { type Ux = u8; } -impl PADT_R { +#[doc = "Field `PADT` reader - Touch-Sense TSIN Pad Turn"] +pub type PadtR = crate::FieldReader; +impl PadtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PADT_A::VALUE1), - 7 => Some(PADT_A::VALUE2), + 0 => Some(Padt::Value1), + 7 => Some(Padt::Value2), _ => None, } } #[doc = "TSIN0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PADT_A::VALUE1 + *self == Padt::Value1 } #[doc = "TSIN7"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PADT_A::VALUE2 + *self == Padt::Value2 } } #[doc = "Field `PADT` writer - Touch-Sense TSIN Pad Turn"] -pub type PADT_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PADT_A>; -impl<'a, REG> PADT_W<'a, REG> +pub type PadtW<'a, REG> = crate::FieldWriter<'a, REG, 3, Padt>; +impl<'a, REG> PadtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,108 +53,108 @@ where #[doc = "TSIN0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PADT_A::VALUE1) + self.variant(Padt::Value1) } #[doc = "TSIN7"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PADT_A::VALUE2) + self.variant(Padt::Value2) } } -#[doc = "Field `PADTSW` reader - Software Control for Touch-Sense Pad Turn"] -pub type PADTSW_R = crate::BitReader; #[doc = "Software Control for Touch-Sense Pad Turn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PADTSW_A { +pub enum Padtsw { #[doc = "0: The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PADTSW_A) -> Self { + fn from(variant: Padtsw) -> Self { variant as u8 != 0 } } -impl PADTSW_R { +#[doc = "Field `PADTSW` reader - Software Control for Touch-Sense Pad Turn"] +pub type PadtswR = crate::BitReader; +impl PadtswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PADTSW_A { + pub const fn variant(&self) -> Padtsw { match self.bits { - false => PADTSW_A::VALUE1, - true => PADTSW_A::VALUE2, + false => Padtsw::Value1, + true => Padtsw::Value2, } } #[doc = "The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PADTSW_A::VALUE1 + *self == Padtsw::Value1 } #[doc = "Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PADTSW_A::VALUE2 + *self == Padtsw::Value2 } } #[doc = "Field `PADTSW` writer - Software Control for Touch-Sense Pad Turn"] -pub type PADTSW_W<'a, REG> = crate::BitWriter<'a, REG, PADTSW_A>; -impl<'a, REG> PADTSW_W<'a, REG> +pub type PadtswW<'a, REG> = crate::BitWriter<'a, REG, Padtsw>; +impl<'a, REG> PadtswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PADTSW_A::VALUE1) + self.variant(Padtsw::Value1) } #[doc = "Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PADTSW_A::VALUE2) + self.variant(Padtsw::Value2) } } -#[doc = "Field `EPULL` reader - Enable External Pull-up Configuration on Pin COLA"] -pub type EPULL_R = crate::BitReader; #[doc = "Enable External Pull-up Configuration on Pin COLA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPULL_A { +pub enum Epull { #[doc = "0: HW over-rule to enable internal pull-up is active on TSIN\\[x\\] for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPULL_A) -> Self { + fn from(variant: Epull) -> Self { variant as u8 != 0 } } -impl EPULL_R { +#[doc = "Field `EPULL` reader - Enable External Pull-up Configuration on Pin COLA"] +pub type EpullR = crate::BitReader; +impl EpullR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPULL_A { + pub const fn variant(&self) -> Epull { match self.bits { - false => EPULL_A::VALUE1, - true => EPULL_A::VALUE2, + false => Epull::Value1, + true => Epull::Value2, } } #[doc = "HW over-rule to enable internal pull-up is active on TSIN\\[x\\] for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPULL_A::VALUE1 + *self == Epull::Value1 } #[doc = "Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPULL_A::VALUE2 + *self == Epull::Value2 } } #[doc = "Field `EPULL` writer - Enable External Pull-up Configuration on Pin COLA"] -pub type EPULL_W<'a, REG> = crate::BitWriter<'a, REG, EPULL_A>; -impl<'a, REG> EPULL_W<'a, REG> +pub type EpullW<'a, REG> = crate::BitWriter<'a, REG, Epull>; +impl<'a, REG> EpullW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -162,68 +162,68 @@ where for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPULL_A::VALUE1) + self.variant(Epull::Value1) } #[doc = "Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPULL_A::VALUE2) + self.variant(Epull::Value2) } } #[doc = "Field `FNCOL` reader - Previous Active Function/LED Column Status"] -pub type FNCOL_R = crate::FieldReader; -#[doc = "Field `ACCCNT` reader - Accumulate Count on Touch-Sense Input"] -pub type ACCCNT_R = crate::FieldReader; +pub type FncolR = crate::FieldReader; #[doc = "Accumulate Count on Touch-Sense Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ACCCNT_A { +pub enum Acccnt { #[doc = "0: 1 time"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 times"] - VALUE2 = 1, + Value2 = 1, #[doc = "15: 16 times"] - VALUE3 = 15, + Value3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ACCCNT_A) -> Self { + fn from(variant: Acccnt) -> Self { variant as _ } } -impl crate::FieldSpec for ACCCNT_A { +impl crate::FieldSpec for Acccnt { type Ux = u8; } -impl ACCCNT_R { +#[doc = "Field `ACCCNT` reader - Accumulate Count on Touch-Sense Input"] +pub type AcccntR = crate::FieldReader; +impl AcccntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACCCNT_A::VALUE1), - 1 => Some(ACCCNT_A::VALUE2), - 15 => Some(ACCCNT_A::VALUE3), + 0 => Some(Acccnt::Value1), + 1 => Some(Acccnt::Value2), + 15 => Some(Acccnt::Value3), _ => None, } } #[doc = "1 time"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACCCNT_A::VALUE1 + *self == Acccnt::Value1 } #[doc = "2 times"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACCCNT_A::VALUE2 + *self == Acccnt::Value2 } #[doc = "16 times"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ACCCNT_A::VALUE3 + *self == Acccnt::Value3 } } #[doc = "Field `ACCCNT` writer - Accumulate Count on Touch-Sense Input"] -pub type ACCCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ACCCNT_A>; -impl<'a, REG> ACCCNT_W<'a, REG> +pub type AcccntW<'a, REG> = crate::FieldWriter<'a, REG, 4, Acccnt>; +impl<'a, REG> AcccntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -231,132 +231,132 @@ where #[doc = "1 time"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACCCNT_A::VALUE1) + self.variant(Acccnt::Value1) } #[doc = "2 times"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACCCNT_A::VALUE2) + self.variant(Acccnt::Value2) } #[doc = "16 times"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ACCCNT_A::VALUE3) + self.variant(Acccnt::Value3) } } -#[doc = "Field `TSCCMP` reader - Common Compare Enable for Touch-Sense"] -pub type TSCCMP_R = crate::BitReader; #[doc = "Common Compare Enable for Touch-Sense\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSCCMP_A { +pub enum Tsccmp { #[doc = "0: Disable common compare for touch-sense"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable common compare for touch-sense"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSCCMP_A) -> Self { + fn from(variant: Tsccmp) -> Self { variant as u8 != 0 } } -impl TSCCMP_R { +#[doc = "Field `TSCCMP` reader - Common Compare Enable for Touch-Sense"] +pub type TsccmpR = crate::BitReader; +impl TsccmpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSCCMP_A { + pub const fn variant(&self) -> Tsccmp { match self.bits { - false => TSCCMP_A::VALUE1, - true => TSCCMP_A::VALUE2, + false => Tsccmp::Value1, + true => Tsccmp::Value2, } } #[doc = "Disable common compare for touch-sense"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSCCMP_A::VALUE1 + *self == Tsccmp::Value1 } #[doc = "Enable common compare for touch-sense"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSCCMP_A::VALUE2 + *self == Tsccmp::Value2 } } #[doc = "Field `TSCCMP` writer - Common Compare Enable for Touch-Sense"] -pub type TSCCMP_W<'a, REG> = crate::BitWriter<'a, REG, TSCCMP_A>; -impl<'a, REG> TSCCMP_W<'a, REG> +pub type TsccmpW<'a, REG> = crate::BitWriter<'a, REG, Tsccmp>; +impl<'a, REG> TsccmpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable common compare for touch-sense"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSCCMP_A::VALUE1) + self.variant(Tsccmp::Value1) } #[doc = "Enable common compare for touch-sense"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSCCMP_A::VALUE2) + self.variant(Tsccmp::Value2) } } -#[doc = "Field `TSOEXT` reader - Extension for Touch-Sense Output for Pin-Low-Level"] -pub type TSOEXT_R = crate::FieldReader; #[doc = "Extension for Touch-Sense Output for Pin-Low-Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSOEXT_A { +pub enum Tsoext { #[doc = "0: Extend by 1 ledts_clk"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Extend by 4 ledts_clk"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Extend by 8 ledts_clk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Extend by 16 ledts_clk"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSOEXT_A) -> Self { + fn from(variant: Tsoext) -> Self { variant as _ } } -impl crate::FieldSpec for TSOEXT_A { +impl crate::FieldSpec for Tsoext { type Ux = u8; } -impl TSOEXT_R { +#[doc = "Field `TSOEXT` reader - Extension for Touch-Sense Output for Pin-Low-Level"] +pub type TsoextR = crate::FieldReader; +impl TsoextR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSOEXT_A { + pub const fn variant(&self) -> Tsoext { match self.bits { - 0 => TSOEXT_A::VALUE1, - 1 => TSOEXT_A::VALUE2, - 2 => TSOEXT_A::VALUE3, - 3 => TSOEXT_A::VALUE4, + 0 => Tsoext::Value1, + 1 => Tsoext::Value2, + 2 => Tsoext::Value3, + 3 => Tsoext::Value4, _ => unreachable!(), } } #[doc = "Extend by 1 ledts_clk"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSOEXT_A::VALUE1 + *self == Tsoext::Value1 } #[doc = "Extend by 4 ledts_clk"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSOEXT_A::VALUE2 + *self == Tsoext::Value2 } #[doc = "Extend by 8 ledts_clk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TSOEXT_A::VALUE3 + *self == Tsoext::Value3 } #[doc = "Extend by 16 ledts_clk"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TSOEXT_A::VALUE4 + *self == Tsoext::Value4 } } #[doc = "Field `TSOEXT` writer - Extension for Touch-Sense Output for Pin-Low-Level"] -pub type TSOEXT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TSOEXT_A>; -impl<'a, REG> TSOEXT_W<'a, REG> +pub type TsoextW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Tsoext>; +impl<'a, REG> TsoextW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -364,174 +364,174 @@ where #[doc = "Extend by 1 ledts_clk"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSOEXT_A::VALUE1) + self.variant(Tsoext::Value1) } #[doc = "Extend by 4 ledts_clk"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSOEXT_A::VALUE2) + self.variant(Tsoext::Value2) } #[doc = "Extend by 8 ledts_clk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TSOEXT_A::VALUE3) + self.variant(Tsoext::Value3) } #[doc = "Extend by 16 ledts_clk"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TSOEXT_A::VALUE4) + self.variant(Tsoext::Value4) } } -#[doc = "Field `TSCTRR` reader - TS-Counter Auto Reset"] -pub type TSCTRR_R = crate::BitReader; #[doc = "TS-Counter Auto Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSCTRR_A { +pub enum Tsctrr { #[doc = "0: Disable TS-counter automatic reset"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSCTRR_A) -> Self { + fn from(variant: Tsctrr) -> Self { variant as u8 != 0 } } -impl TSCTRR_R { +#[doc = "Field `TSCTRR` reader - TS-Counter Auto Reset"] +pub type TsctrrR = crate::BitReader; +impl TsctrrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSCTRR_A { + pub const fn variant(&self) -> Tsctrr { match self.bits { - false => TSCTRR_A::VALUE1, - true => TSCTRR_A::VALUE2, + false => Tsctrr::Value1, + true => Tsctrr::Value2, } } #[doc = "Disable TS-counter automatic reset"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSCTRR_A::VALUE1 + *self == Tsctrr::Value1 } #[doc = "Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSCTRR_A::VALUE2 + *self == Tsctrr::Value2 } } #[doc = "Field `TSCTRR` writer - TS-Counter Auto Reset"] -pub type TSCTRR_W<'a, REG> = crate::BitWriter<'a, REG, TSCTRR_A>; -impl<'a, REG> TSCTRR_W<'a, REG> +pub type TsctrrW<'a, REG> = crate::BitWriter<'a, REG, Tsctrr>; +impl<'a, REG> TsctrrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable TS-counter automatic reset"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSCTRR_A::VALUE1) + self.variant(Tsctrr::Value1) } #[doc = "Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSCTRR_A::VALUE2) + self.variant(Tsctrr::Value2) } } -#[doc = "Field `TSCTRSAT` reader - Saturation of TS-Counter"] -pub type TSCTRSAT_R = crate::BitReader; #[doc = "Saturation of TS-Counter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSCTRSAT_A { +pub enum Tsctrsat { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSCTRSAT_A) -> Self { + fn from(variant: Tsctrsat) -> Self { variant as u8 != 0 } } -impl TSCTRSAT_R { +#[doc = "Field `TSCTRSAT` reader - Saturation of TS-Counter"] +pub type TsctrsatR = crate::BitReader; +impl TsctrsatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSCTRSAT_A { + pub const fn variant(&self) -> Tsctrsat { match self.bits { - false => TSCTRSAT_A::VALUE1, - true => TSCTRSAT_A::VALUE2, + false => Tsctrsat::Value1, + true => Tsctrsat::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSCTRSAT_A::VALUE1 + *self == Tsctrsat::Value1 } #[doc = "Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSCTRSAT_A::VALUE2 + *self == Tsctrsat::Value2 } } #[doc = "Field `TSCTRSAT` writer - Saturation of TS-Counter"] -pub type TSCTRSAT_W<'a, REG> = crate::BitWriter<'a, REG, TSCTRSAT_A>; -impl<'a, REG> TSCTRSAT_W<'a, REG> +pub type TsctrsatW<'a, REG> = crate::BitWriter<'a, REG, Tsctrsat>; +impl<'a, REG> TsctrsatW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSCTRSAT_A::VALUE1) + self.variant(Tsctrsat::Value1) } #[doc = "Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSCTRSAT_A::VALUE2) + self.variant(Tsctrsat::Value2) } } -#[doc = "Field `NR_TSIN` reader - Number of Touch-Sense Input"] -pub type NR_TSIN_R = crate::FieldReader; #[doc = "Number of Touch-Sense Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NR_TSIN_A { +pub enum NrTsin { #[doc = "0: 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "7: 8"] - VALUE2 = 7, + Value2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NR_TSIN_A) -> Self { + fn from(variant: NrTsin) -> Self { variant as _ } } -impl crate::FieldSpec for NR_TSIN_A { +impl crate::FieldSpec for NrTsin { type Ux = u8; } -impl NR_TSIN_R { +#[doc = "Field `NR_TSIN` reader - Number of Touch-Sense Input"] +pub type NrTsinR = crate::FieldReader; +impl NrTsinR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NR_TSIN_A::VALUE1), - 7 => Some(NR_TSIN_A::VALUE2), + 0 => Some(NrTsin::Value1), + 7 => Some(NrTsin::Value2), _ => None, } } #[doc = "1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NR_TSIN_A::VALUE1 + *self == NrTsin::Value1 } #[doc = "8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NR_TSIN_A::VALUE2 + *self == NrTsin::Value2 } } #[doc = "Field `NR_TSIN` writer - Number of Touch-Sense Input"] -pub type NR_TSIN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, NR_TSIN_A>; -impl<'a, REG> NR_TSIN_W<'a, REG> +pub type NrTsinW<'a, REG> = crate::FieldWriter<'a, REG, 3, NrTsin>; +impl<'a, REG> NrTsinW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -539,159 +539,159 @@ where #[doc = "1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NR_TSIN_A::VALUE1) + self.variant(NrTsin::Value1) } #[doc = "8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NR_TSIN_A::VALUE2) + self.variant(NrTsin::Value2) } } -#[doc = "Field `COLLEV` reader - Active Level of LED Column"] -pub type COLLEV_R = crate::BitReader; #[doc = "Active Level of LED Column\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COLLEV_A { +pub enum Collev { #[doc = "0: Active low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active high"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COLLEV_A) -> Self { + fn from(variant: Collev) -> Self { variant as u8 != 0 } } -impl COLLEV_R { +#[doc = "Field `COLLEV` reader - Active Level of LED Column"] +pub type CollevR = crate::BitReader; +impl CollevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COLLEV_A { + pub const fn variant(&self) -> Collev { match self.bits { - false => COLLEV_A::VALUE1, - true => COLLEV_A::VALUE2, + false => Collev::Value1, + true => Collev::Value2, } } #[doc = "Active low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COLLEV_A::VALUE1 + *self == Collev::Value1 } #[doc = "Active high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COLLEV_A::VALUE2 + *self == Collev::Value2 } } #[doc = "Field `COLLEV` writer - Active Level of LED Column"] -pub type COLLEV_W<'a, REG> = crate::BitWriter<'a, REG, COLLEV_A>; -impl<'a, REG> COLLEV_W<'a, REG> +pub type CollevW<'a, REG> = crate::BitWriter<'a, REG, Collev>; +impl<'a, REG> CollevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active low"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(COLLEV_A::VALUE1) + self.variant(Collev::Value1) } #[doc = "Active high"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(COLLEV_A::VALUE2) + self.variant(Collev::Value2) } } -#[doc = "Field `NR_LEDCOL` reader - Number of LED Columns"] -pub type NR_LEDCOL_R = crate::FieldReader; #[doc = "Number of LED Columns\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NR_LEDCOL_A { +pub enum NrLedcol { #[doc = "0: 1 LED column"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 LED columns"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 3 LED columns"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 4 LED columns"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: 5 LED columns"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: 6 LED columns"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: 7 LED columns"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: 8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NR_LEDCOL_A) -> Self { + fn from(variant: NrLedcol) -> Self { variant as _ } } -impl crate::FieldSpec for NR_LEDCOL_A { +impl crate::FieldSpec for NrLedcol { type Ux = u8; } -impl NR_LEDCOL_R { +#[doc = "Field `NR_LEDCOL` reader - Number of LED Columns"] +pub type NrLedcolR = crate::FieldReader; +impl NrLedcolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NR_LEDCOL_A { + pub const fn variant(&self) -> NrLedcol { match self.bits { - 0 => NR_LEDCOL_A::VALUE1, - 1 => NR_LEDCOL_A::VALUE2, - 2 => NR_LEDCOL_A::VALUE3, - 3 => NR_LEDCOL_A::VALUE4, - 4 => NR_LEDCOL_A::VALUE5, - 5 => NR_LEDCOL_A::VALUE6, - 6 => NR_LEDCOL_A::VALUE7, - 7 => NR_LEDCOL_A::VALUE8, + 0 => NrLedcol::Value1, + 1 => NrLedcol::Value2, + 2 => NrLedcol::Value3, + 3 => NrLedcol::Value4, + 4 => NrLedcol::Value5, + 5 => NrLedcol::Value6, + 6 => NrLedcol::Value7, + 7 => NrLedcol::Value8, _ => unreachable!(), } } #[doc = "1 LED column"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NR_LEDCOL_A::VALUE1 + *self == NrLedcol::Value1 } #[doc = "2 LED columns"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NR_LEDCOL_A::VALUE2 + *self == NrLedcol::Value2 } #[doc = "3 LED columns"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == NR_LEDCOL_A::VALUE3 + *self == NrLedcol::Value3 } #[doc = "4 LED columns"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == NR_LEDCOL_A::VALUE4 + *self == NrLedcol::Value4 } #[doc = "5 LED columns"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == NR_LEDCOL_A::VALUE5 + *self == NrLedcol::Value5 } #[doc = "6 LED columns"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == NR_LEDCOL_A::VALUE6 + *self == NrLedcol::Value6 } #[doc = "7 LED columns"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == NR_LEDCOL_A::VALUE7 + *self == NrLedcol::Value7 } #[doc = "8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == NR_LEDCOL_A::VALUE8 + *self == NrLedcol::Value8 } } #[doc = "Field `NR_LEDCOL` writer - Number of LED Columns"] -pub type NR_LEDCOL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, NR_LEDCOL_A>; -impl<'a, REG> NR_LEDCOL_W<'a, REG> +pub type NrLedcolW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, NrLedcol>; +impl<'a, REG> NrLedcolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -699,197 +699,188 @@ where #[doc = "1 LED column"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE1) + self.variant(NrLedcol::Value1) } #[doc = "2 LED columns"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE2) + self.variant(NrLedcol::Value2) } #[doc = "3 LED columns"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE3) + self.variant(NrLedcol::Value3) } #[doc = "4 LED columns"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE4) + self.variant(NrLedcol::Value4) } #[doc = "5 LED columns"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE5) + self.variant(NrLedcol::Value5) } #[doc = "6 LED columns"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE6) + self.variant(NrLedcol::Value6) } #[doc = "7 LED columns"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE7) + self.variant(NrLedcol::Value7) } #[doc = "8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(NR_LEDCOL_A::VALUE8) + self.variant(NrLedcol::Value8) } } impl R { #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"] #[inline(always)] - pub fn padt(&self) -> PADT_R { - PADT_R::new((self.bits & 7) as u8) + pub fn padt(&self) -> PadtR { + PadtR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"] #[inline(always)] - pub fn padtsw(&self) -> PADTSW_R { - PADTSW_R::new(((self.bits >> 3) & 1) != 0) + pub fn padtsw(&self) -> PadtswR { + PadtswR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"] #[inline(always)] - pub fn epull(&self) -> EPULL_R { - EPULL_R::new(((self.bits >> 4) & 1) != 0) + pub fn epull(&self) -> EpullR { + EpullR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Previous Active Function/LED Column Status"] #[inline(always)] - pub fn fncol(&self) -> FNCOL_R { - FNCOL_R::new(((self.bits >> 5) & 7) as u8) + pub fn fncol(&self) -> FncolR { + FncolR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"] #[inline(always)] - pub fn acccnt(&self) -> ACCCNT_R { - ACCCNT_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn acccnt(&self) -> AcccntR { + AcccntR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"] #[inline(always)] - pub fn tsccmp(&self) -> TSCCMP_R { - TSCCMP_R::new(((self.bits >> 20) & 1) != 0) + pub fn tsccmp(&self) -> TsccmpR { + TsccmpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"] #[inline(always)] - pub fn tsoext(&self) -> TSOEXT_R { - TSOEXT_R::new(((self.bits >> 21) & 3) as u8) + pub fn tsoext(&self) -> TsoextR { + TsoextR::new(((self.bits >> 21) & 3) as u8) } #[doc = "Bit 23 - TS-Counter Auto Reset"] #[inline(always)] - pub fn tsctrr(&self) -> TSCTRR_R { - TSCTRR_R::new(((self.bits >> 23) & 1) != 0) + pub fn tsctrr(&self) -> TsctrrR { + TsctrrR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Saturation of TS-Counter"] #[inline(always)] - pub fn tsctrsat(&self) -> TSCTRSAT_R { - TSCTRSAT_R::new(((self.bits >> 24) & 1) != 0) + pub fn tsctrsat(&self) -> TsctrsatR { + TsctrsatR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:27 - Number of Touch-Sense Input"] #[inline(always)] - pub fn nr_tsin(&self) -> NR_TSIN_R { - NR_TSIN_R::new(((self.bits >> 25) & 7) as u8) + pub fn nr_tsin(&self) -> NrTsinR { + NrTsinR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bit 28 - Active Level of LED Column"] #[inline(always)] - pub fn collev(&self) -> COLLEV_R { - COLLEV_R::new(((self.bits >> 28) & 1) != 0) + pub fn collev(&self) -> CollevR { + CollevR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bits 29:31 - Number of LED Columns"] #[inline(always)] - pub fn nr_ledcol(&self) -> NR_LEDCOL_R { - NR_LEDCOL_R::new(((self.bits >> 29) & 7) as u8) + pub fn nr_ledcol(&self) -> NrLedcolR { + NrLedcolR::new(((self.bits >> 29) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"] #[inline(always)] #[must_use] - pub fn padt(&mut self) -> PADT_W { - PADT_W::new(self, 0) + pub fn padt(&mut self) -> PadtW { + PadtW::new(self, 0) } #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"] #[inline(always)] #[must_use] - pub fn padtsw(&mut self) -> PADTSW_W { - PADTSW_W::new(self, 3) + pub fn padtsw(&mut self) -> PadtswW { + PadtswW::new(self, 3) } #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"] #[inline(always)] #[must_use] - pub fn epull(&mut self) -> EPULL_W { - EPULL_W::new(self, 4) + pub fn epull(&mut self) -> EpullW { + EpullW::new(self, 4) } #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"] #[inline(always)] #[must_use] - pub fn acccnt(&mut self) -> ACCCNT_W { - ACCCNT_W::new(self, 16) + pub fn acccnt(&mut self) -> AcccntW { + AcccntW::new(self, 16) } #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"] #[inline(always)] #[must_use] - pub fn tsccmp(&mut self) -> TSCCMP_W { - TSCCMP_W::new(self, 20) + pub fn tsccmp(&mut self) -> TsccmpW { + TsccmpW::new(self, 20) } #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"] #[inline(always)] #[must_use] - pub fn tsoext(&mut self) -> TSOEXT_W { - TSOEXT_W::new(self, 21) + pub fn tsoext(&mut self) -> TsoextW { + TsoextW::new(self, 21) } #[doc = "Bit 23 - TS-Counter Auto Reset"] #[inline(always)] #[must_use] - pub fn tsctrr(&mut self) -> TSCTRR_W { - TSCTRR_W::new(self, 23) + pub fn tsctrr(&mut self) -> TsctrrW { + TsctrrW::new(self, 23) } #[doc = "Bit 24 - Saturation of TS-Counter"] #[inline(always)] #[must_use] - pub fn tsctrsat(&mut self) -> TSCTRSAT_W { - TSCTRSAT_W::new(self, 24) + pub fn tsctrsat(&mut self) -> TsctrsatW { + TsctrsatW::new(self, 24) } #[doc = "Bits 25:27 - Number of Touch-Sense Input"] #[inline(always)] #[must_use] - pub fn nr_tsin(&mut self) -> NR_TSIN_W { - NR_TSIN_W::new(self, 25) + pub fn nr_tsin(&mut self) -> NrTsinW { + NrTsinW::new(self, 25) } #[doc = "Bit 28 - Active Level of LED Column"] #[inline(always)] #[must_use] - pub fn collev(&mut self) -> COLLEV_W { - COLLEV_W::new(self, 28) + pub fn collev(&mut self) -> CollevW { + CollevW::new(self, 28) } #[doc = "Bits 29:31 - Number of LED Columns"] #[inline(always)] #[must_use] - pub fn nr_ledcol(&mut self) -> NR_LEDCOL_W { - NR_LEDCOL_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nr_ledcol(&mut self) -> NrLedcolW { + NrLedcolW::new(self, 29) } } #[doc = "Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FNCTL_SPEC; -impl crate::RegisterSpec for FNCTL_SPEC { +pub struct FnctlSpec; +impl crate::RegisterSpec for FnctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`fnctl::R`](R) reader structure"] -impl crate::Readable for FNCTL_SPEC {} +impl crate::Readable for FnctlSpec {} #[doc = "`write(|w| ..)` method takes [`fnctl::W`](W) writer structure"] -impl crate::Writable for FNCTL_SPEC { +impl crate::Writable for FnctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FNCTL to value 0"] -impl crate::Resettable for FNCTL_SPEC { +impl crate::Resettable for FnctlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/globctl.rs b/src/ledts0/globctl.rs index a74714e0..2ba82de4 100644 --- a/src/ledts0/globctl.rs +++ b/src/ledts0/globctl.rs @@ -1,226 +1,226 @@ #[doc = "Register `GLOBCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TS_EN` reader - Touch-Sense Function Enable"] -pub type TS_EN_R = crate::BitReader; +pub type TsEnR = crate::BitReader; #[doc = "Field `TS_EN` writer - Touch-Sense Function Enable"] -pub type TS_EN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TsEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LD_EN` reader - LED Function Enable"] -pub type LD_EN_R = crate::BitReader; +pub type LdEnR = crate::BitReader; #[doc = "Field `LD_EN` writer - LED Function Enable"] -pub type LD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `CMTR` reader - Clock Master Disable"] -pub type CMTR_R = crate::BitReader; +pub type LdEnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Master Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMTR_A { +pub enum Cmtr { #[doc = "0: Kernel generates its own clock for LEDTS-counter based on SFR setting"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: LEDTS-counter takes its clock from another master kernel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMTR_A) -> Self { + fn from(variant: Cmtr) -> Self { variant as u8 != 0 } } -impl CMTR_R { +#[doc = "Field `CMTR` reader - Clock Master Disable"] +pub type CmtrR = crate::BitReader; +impl CmtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMTR_A { + pub const fn variant(&self) -> Cmtr { match self.bits { - false => CMTR_A::VALUE1, - true => CMTR_A::VALUE2, + false => Cmtr::Value1, + true => Cmtr::Value2, } } #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMTR_A::VALUE1 + *self == Cmtr::Value1 } #[doc = "LEDTS-counter takes its clock from another master kernel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMTR_A::VALUE2 + *self == Cmtr::Value2 } } #[doc = "Field `CMTR` writer - Clock Master Disable"] -pub type CMTR_W<'a, REG> = crate::BitWriter<'a, REG, CMTR_A>; -impl<'a, REG> CMTR_W<'a, REG> +pub type CmtrW<'a, REG> = crate::BitWriter<'a, REG, Cmtr>; +impl<'a, REG> CmtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMTR_A::VALUE1) + self.variant(Cmtr::Value1) } #[doc = "LEDTS-counter takes its clock from another master kernel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMTR_A::VALUE2) + self.variant(Cmtr::Value2) } } -#[doc = "Field `ENSYNC` reader - Enable Autoscan Time Period Synchronization"] -pub type ENSYNC_R = crate::BitReader; #[doc = "Enable Autoscan Time Period Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENSYNC_A { +pub enum Ensync { #[doc = "0: No synchronization"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Synchronization enabled on Kernel0 autoscan time period"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENSYNC_A) -> Self { + fn from(variant: Ensync) -> Self { variant as u8 != 0 } } -impl ENSYNC_R { +#[doc = "Field `ENSYNC` reader - Enable Autoscan Time Period Synchronization"] +pub type EnsyncR = crate::BitReader; +impl EnsyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENSYNC_A { + pub const fn variant(&self) -> Ensync { match self.bits { - false => ENSYNC_A::VALUE1, - true => ENSYNC_A::VALUE2, + false => Ensync::Value1, + true => Ensync::Value2, } } #[doc = "No synchronization"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENSYNC_A::VALUE1 + *self == Ensync::Value1 } #[doc = "Synchronization enabled on Kernel0 autoscan time period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENSYNC_A::VALUE2 + *self == Ensync::Value2 } } #[doc = "Field `ENSYNC` writer - Enable Autoscan Time Period Synchronization"] -pub type ENSYNC_W<'a, REG> = crate::BitWriter<'a, REG, ENSYNC_A>; -impl<'a, REG> ENSYNC_W<'a, REG> +pub type EnsyncW<'a, REG> = crate::BitWriter<'a, REG, Ensync>; +impl<'a, REG> EnsyncW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No synchronization"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENSYNC_A::VALUE1) + self.variant(Ensync::Value1) } #[doc = "Synchronization enabled on Kernel0 autoscan time period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENSYNC_A::VALUE2) + self.variant(Ensync::Value2) } } -#[doc = "Field `SUSCFG` reader - Suspend Request Configuration"] -pub type SUSCFG_R = crate::BitReader; #[doc = "Suspend Request Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SUSCFG_A { +pub enum Suscfg { #[doc = "0: Ignore suspend request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable suspend according to request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SUSCFG_A) -> Self { + fn from(variant: Suscfg) -> Self { variant as u8 != 0 } } -impl SUSCFG_R { +#[doc = "Field `SUSCFG` reader - Suspend Request Configuration"] +pub type SuscfgR = crate::BitReader; +impl SuscfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SUSCFG_A { + pub const fn variant(&self) -> Suscfg { match self.bits { - false => SUSCFG_A::VALUE1, - true => SUSCFG_A::VALUE2, + false => Suscfg::Value1, + true => Suscfg::Value2, } } #[doc = "Ignore suspend request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSCFG_A::VALUE1 + *self == Suscfg::Value1 } #[doc = "Enable suspend according to request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUSCFG_A::VALUE2 + *self == Suscfg::Value2 } } #[doc = "Field `SUSCFG` writer - Suspend Request Configuration"] -pub type SUSCFG_W<'a, REG> = crate::BitWriter<'a, REG, SUSCFG_A>; -impl<'a, REG> SUSCFG_W<'a, REG> +pub type SuscfgW<'a, REG> = crate::BitWriter<'a, REG, Suscfg>; +impl<'a, REG> SuscfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore suspend request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE1) + self.variant(Suscfg::Value1) } #[doc = "Enable suspend according to request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUSCFG_A::VALUE2) + self.variant(Suscfg::Value2) } } -#[doc = "Field `MASKVAL` reader - Mask Number of LSB Bits for Event Validation"] -pub type MASKVAL_R = crate::FieldReader; #[doc = "Mask Number of LSB Bits for Event Validation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MASKVAL_A { +pub enum Maskval { #[doc = "0: Mask LSB bit"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Mask 2 LSB bits"] - VALUE2 = 1, + Value2 = 1, #[doc = "7: Mask 8 LSB bits"] - VALUE3 = 7, + Value3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MASKVAL_A) -> Self { + fn from(variant: Maskval) -> Self { variant as _ } } -impl crate::FieldSpec for MASKVAL_A { +impl crate::FieldSpec for Maskval { type Ux = u8; } -impl MASKVAL_R { +#[doc = "Field `MASKVAL` reader - Mask Number of LSB Bits for Event Validation"] +pub type MaskvalR = crate::FieldReader; +impl MaskvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MASKVAL_A::VALUE1), - 1 => Some(MASKVAL_A::VALUE2), - 7 => Some(MASKVAL_A::VALUE3), + 0 => Some(Maskval::Value1), + 1 => Some(Maskval::Value2), + 7 => Some(Maskval::Value3), _ => None, } } #[doc = "Mask LSB bit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MASKVAL_A::VALUE1 + *self == Maskval::Value1 } #[doc = "Mask 2 LSB bits"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MASKVAL_A::VALUE2 + *self == Maskval::Value2 } #[doc = "Mask 8 LSB bits"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MASKVAL_A::VALUE3 + *self == Maskval::Value3 } } #[doc = "Field `MASKVAL` writer - Mask Number of LSB Bits for Event Validation"] -pub type MASKVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MASKVAL_A>; -impl<'a, REG> MASKVAL_W<'a, REG> +pub type MaskvalW<'a, REG> = crate::FieldWriter<'a, REG, 3, Maskval>; +impl<'a, REG> MaskvalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -228,383 +228,374 @@ where #[doc = "Mask LSB bit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MASKVAL_A::VALUE1) + self.variant(Maskval::Value1) } #[doc = "Mask 2 LSB bits"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MASKVAL_A::VALUE2) + self.variant(Maskval::Value2) } #[doc = "Mask 8 LSB bits"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MASKVAL_A::VALUE3) + self.variant(Maskval::Value3) } } -#[doc = "Field `FENVAL` reader - Enable (Extended) Time Frame Validation"] -pub type FENVAL_R = crate::BitReader; #[doc = "Enable (Extended) Time Frame Validation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FENVAL_A { +pub enum Fenval { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FENVAL_A) -> Self { + fn from(variant: Fenval) -> Self { variant as u8 != 0 } } -impl FENVAL_R { +#[doc = "Field `FENVAL` reader - Enable (Extended) Time Frame Validation"] +pub type FenvalR = crate::BitReader; +impl FenvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FENVAL_A { + pub const fn variant(&self) -> Fenval { match self.bits { - false => FENVAL_A::VALUE1, - true => FENVAL_A::VALUE2, + false => Fenval::Value1, + true => Fenval::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FENVAL_A::VALUE1 + *self == Fenval::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FENVAL_A::VALUE2 + *self == Fenval::Value2 } } #[doc = "Field `FENVAL` writer - Enable (Extended) Time Frame Validation"] -pub type FENVAL_W<'a, REG> = crate::BitWriter<'a, REG, FENVAL_A>; -impl<'a, REG> FENVAL_W<'a, REG> +pub type FenvalW<'a, REG> = crate::BitWriter<'a, REG, Fenval>; +impl<'a, REG> FenvalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FENVAL_A::VALUE1) + self.variant(Fenval::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FENVAL_A::VALUE2) + self.variant(Fenval::Value2) } } -#[doc = "Field `ITS_EN` reader - Enable Time Slice Interrupt"] -pub type ITS_EN_R = crate::BitReader; #[doc = "Enable Time Slice Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ITS_EN_A { +pub enum ItsEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ITS_EN_A) -> Self { + fn from(variant: ItsEn) -> Self { variant as u8 != 0 } } -impl ITS_EN_R { +#[doc = "Field `ITS_EN` reader - Enable Time Slice Interrupt"] +pub type ItsEnR = crate::BitReader; +impl ItsEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ITS_EN_A { + pub const fn variant(&self) -> ItsEn { match self.bits { - false => ITS_EN_A::VALUE1, - true => ITS_EN_A::VALUE2, + false => ItsEn::Value1, + true => ItsEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ITS_EN_A::VALUE1 + *self == ItsEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ITS_EN_A::VALUE2 + *self == ItsEn::Value2 } } #[doc = "Field `ITS_EN` writer - Enable Time Slice Interrupt"] -pub type ITS_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITS_EN_A>; -impl<'a, REG> ITS_EN_W<'a, REG> +pub type ItsEnW<'a, REG> = crate::BitWriter<'a, REG, ItsEn>; +impl<'a, REG> ItsEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ITS_EN_A::VALUE1) + self.variant(ItsEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ITS_EN_A::VALUE2) + self.variant(ItsEn::Value2) } } -#[doc = "Field `ITF_EN` reader - Enable (Extended) Time Frame Interrupt"] -pub type ITF_EN_R = crate::BitReader; #[doc = "Enable (Extended) Time Frame Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ITF_EN_A { +pub enum ItfEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ITF_EN_A) -> Self { + fn from(variant: ItfEn) -> Self { variant as u8 != 0 } } -impl ITF_EN_R { +#[doc = "Field `ITF_EN` reader - Enable (Extended) Time Frame Interrupt"] +pub type ItfEnR = crate::BitReader; +impl ItfEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ITF_EN_A { + pub const fn variant(&self) -> ItfEn { match self.bits { - false => ITF_EN_A::VALUE1, - true => ITF_EN_A::VALUE2, + false => ItfEn::Value1, + true => ItfEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ITF_EN_A::VALUE1 + *self == ItfEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ITF_EN_A::VALUE2 + *self == ItfEn::Value2 } } #[doc = "Field `ITF_EN` writer - Enable (Extended) Time Frame Interrupt"] -pub type ITF_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITF_EN_A>; -impl<'a, REG> ITF_EN_W<'a, REG> +pub type ItfEnW<'a, REG> = crate::BitWriter<'a, REG, ItfEn>; +impl<'a, REG> ItfEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ITF_EN_A::VALUE1) + self.variant(ItfEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ITF_EN_A::VALUE2) + self.variant(ItfEn::Value2) } } -#[doc = "Field `ITP_EN` reader - Enable Autoscan Time Period Interrupt"] -pub type ITP_EN_R = crate::BitReader; #[doc = "Enable Autoscan Time Period Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ITP_EN_A { +pub enum ItpEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable (valid only for case of hardware-enabled pad turn control)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ITP_EN_A) -> Self { + fn from(variant: ItpEn) -> Self { variant as u8 != 0 } } -impl ITP_EN_R { +#[doc = "Field `ITP_EN` reader - Enable Autoscan Time Period Interrupt"] +pub type ItpEnR = crate::BitReader; +impl ItpEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ITP_EN_A { + pub const fn variant(&self) -> ItpEn { match self.bits { - false => ITP_EN_A::VALUE1, - true => ITP_EN_A::VALUE2, + false => ItpEn::Value1, + true => ItpEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ITP_EN_A::VALUE1 + *self == ItpEn::Value1 } #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ITP_EN_A::VALUE2 + *self == ItpEn::Value2 } } #[doc = "Field `ITP_EN` writer - Enable Autoscan Time Period Interrupt"] -pub type ITP_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITP_EN_A>; -impl<'a, REG> ITP_EN_W<'a, REG> +pub type ItpEnW<'a, REG> = crate::BitWriter<'a, REG, ItpEn>; +impl<'a, REG> ItpEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ITP_EN_A::VALUE1) + self.variant(ItpEn::Value1) } #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ITP_EN_A::VALUE2) + self.variant(ItpEn::Value2) } } #[doc = "Field `CLK_PS` reader - LEDTS-Counter Clock Pre-Scale Factor"] -pub type CLK_PS_R = crate::FieldReader; +pub type ClkPsR = crate::FieldReader; #[doc = "Field `CLK_PS` writer - LEDTS-Counter Clock Pre-Scale Factor"] -pub type CLK_PS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type ClkPsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bit 0 - Touch-Sense Function Enable"] #[inline(always)] - pub fn ts_en(&self) -> TS_EN_R { - TS_EN_R::new((self.bits & 1) != 0) + pub fn ts_en(&self) -> TsEnR { + TsEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LED Function Enable"] #[inline(always)] - pub fn ld_en(&self) -> LD_EN_R { - LD_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn ld_en(&self) -> LdEnR { + LdEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Master Disable"] #[inline(always)] - pub fn cmtr(&self) -> CMTR_R { - CMTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmtr(&self) -> CmtrR { + CmtrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"] #[inline(always)] - pub fn ensync(&self) -> ENSYNC_R { - ENSYNC_R::new(((self.bits >> 3) & 1) != 0) + pub fn ensync(&self) -> EnsyncR { + EnsyncR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Suspend Request Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SUSCFG_R { - SUSCFG_R::new(((self.bits >> 8) & 1) != 0) + pub fn suscfg(&self) -> SuscfgR { + SuscfgR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"] #[inline(always)] - pub fn maskval(&self) -> MASKVAL_R { - MASKVAL_R::new(((self.bits >> 9) & 7) as u8) + pub fn maskval(&self) -> MaskvalR { + MaskvalR::new(((self.bits >> 9) & 7) as u8) } #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"] #[inline(always)] - pub fn fenval(&self) -> FENVAL_R { - FENVAL_R::new(((self.bits >> 12) & 1) != 0) + pub fn fenval(&self) -> FenvalR { + FenvalR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Time Slice Interrupt"] #[inline(always)] - pub fn its_en(&self) -> ITS_EN_R { - ITS_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn its_en(&self) -> ItsEnR { + ItsEnR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"] #[inline(always)] - pub fn itf_en(&self) -> ITF_EN_R { - ITF_EN_R::new(((self.bits >> 14) & 1) != 0) + pub fn itf_en(&self) -> ItfEnR { + ItfEnR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"] #[inline(always)] - pub fn itp_en(&self) -> ITP_EN_R { - ITP_EN_R::new(((self.bits >> 15) & 1) != 0) + pub fn itp_en(&self) -> ItpEnR { + ItpEnR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"] #[inline(always)] - pub fn clk_ps(&self) -> CLK_PS_R { - CLK_PS_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn clk_ps(&self) -> ClkPsR { + ClkPsR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - Touch-Sense Function Enable"] #[inline(always)] #[must_use] - pub fn ts_en(&mut self) -> TS_EN_W { - TS_EN_W::new(self, 0) + pub fn ts_en(&mut self) -> TsEnW { + TsEnW::new(self, 0) } #[doc = "Bit 1 - LED Function Enable"] #[inline(always)] #[must_use] - pub fn ld_en(&mut self) -> LD_EN_W { - LD_EN_W::new(self, 1) + pub fn ld_en(&mut self) -> LdEnW { + LdEnW::new(self, 1) } #[doc = "Bit 2 - Clock Master Disable"] #[inline(always)] #[must_use] - pub fn cmtr(&mut self) -> CMTR_W { - CMTR_W::new(self, 2) + pub fn cmtr(&mut self) -> CmtrW { + CmtrW::new(self, 2) } #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"] #[inline(always)] #[must_use] - pub fn ensync(&mut self) -> ENSYNC_W { - ENSYNC_W::new(self, 3) + pub fn ensync(&mut self) -> EnsyncW { + EnsyncW::new(self, 3) } #[doc = "Bit 8 - Suspend Request Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SUSCFG_W { - SUSCFG_W::new(self, 8) + pub fn suscfg(&mut self) -> SuscfgW { + SuscfgW::new(self, 8) } #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"] #[inline(always)] #[must_use] - pub fn maskval(&mut self) -> MASKVAL_W { - MASKVAL_W::new(self, 9) + pub fn maskval(&mut self) -> MaskvalW { + MaskvalW::new(self, 9) } #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"] #[inline(always)] #[must_use] - pub fn fenval(&mut self) -> FENVAL_W { - FENVAL_W::new(self, 12) + pub fn fenval(&mut self) -> FenvalW { + FenvalW::new(self, 12) } #[doc = "Bit 13 - Enable Time Slice Interrupt"] #[inline(always)] #[must_use] - pub fn its_en(&mut self) -> ITS_EN_W { - ITS_EN_W::new(self, 13) + pub fn its_en(&mut self) -> ItsEnW { + ItsEnW::new(self, 13) } #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"] #[inline(always)] #[must_use] - pub fn itf_en(&mut self) -> ITF_EN_W { - ITF_EN_W::new(self, 14) + pub fn itf_en(&mut self) -> ItfEnW { + ItfEnW::new(self, 14) } #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"] #[inline(always)] #[must_use] - pub fn itp_en(&mut self) -> ITP_EN_W { - ITP_EN_W::new(self, 15) + pub fn itp_en(&mut self) -> ItpEnW { + ItpEnW::new(self, 15) } #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"] #[inline(always)] #[must_use] - pub fn clk_ps(&mut self) -> CLK_PS_W { - CLK_PS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clk_ps(&mut self) -> ClkPsW { + ClkPsW::new(self, 16) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBCTL_SPEC; -impl crate::RegisterSpec for GLOBCTL_SPEC { +pub struct GlobctlSpec; +impl crate::RegisterSpec for GlobctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`globctl::R`](R) reader structure"] -impl crate::Readable for GLOBCTL_SPEC {} +impl crate::Readable for GlobctlSpec {} #[doc = "`write(|w| ..)` method takes [`globctl::W`](W) writer structure"] -impl crate::Writable for GLOBCTL_SPEC { +impl crate::Writable for GlobctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBCTL to value 0"] -impl crate::Resettable for GLOBCTL_SPEC { +impl crate::Resettable for GlobctlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/id.rs b/src/ledts0/id.rs index 4ea1846e..73439ce1 100644 --- a/src/ledts0/id.rs +++ b/src/ledts0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00ab_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00ab_c000; } diff --git a/src/ledts0/ldcmp0.rs b/src/ledts0/ldcmp0.rs index 634bd808..237fb4dc 100644 --- a/src/ledts0/ldcmp0.rs +++ b/src/ledts0/ldcmp0.rs @@ -1,94 +1,85 @@ #[doc = "Register `LDCMP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LDCMP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_LD0` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD0_R = crate::FieldReader; +pub type CmpLd0R = crate::FieldReader; #[doc = "Field `CMP_LD0` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD1` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD1_R = crate::FieldReader; +pub type CmpLd1R = crate::FieldReader; #[doc = "Field `CMP_LD1` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD2` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD2_R = crate::FieldReader; +pub type CmpLd2R = crate::FieldReader; #[doc = "Field `CMP_LD2` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD3` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD3_R = crate::FieldReader; +pub type CmpLd3R = crate::FieldReader; #[doc = "Field `CMP_LD3` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld0(&self) -> CMP_LD0_R { - CMP_LD0_R::new((self.bits & 0xff) as u8) + pub fn cmp_ld0(&self) -> CmpLd0R { + CmpLd0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld1(&self) -> CMP_LD1_R { - CMP_LD1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ld1(&self) -> CmpLd1R { + CmpLd1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld2(&self) -> CMP_LD2_R { - CMP_LD2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ld2(&self) -> CmpLd2R { + CmpLd2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld3(&self) -> CMP_LD3_R { - CMP_LD3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ld3(&self) -> CmpLd3R { + CmpLd3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld0(&mut self) -> CMP_LD0_W { - CMP_LD0_W::new(self, 0) + pub fn cmp_ld0(&mut self) -> CmpLd0W { + CmpLd0W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld1(&mut self) -> CMP_LD1_W { - CMP_LD1_W::new(self, 8) + pub fn cmp_ld1(&mut self) -> CmpLd1W { + CmpLd1W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld2(&mut self) -> CMP_LD2_W { - CMP_LD2_W::new(self, 16) + pub fn cmp_ld2(&mut self) -> CmpLd2W { + CmpLd2W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld3(&mut self) -> CMP_LD3_W { - CMP_LD3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cmp_ld3(&mut self) -> CmpLd3W { + CmpLd3W::new(self, 24) } } #[doc = "LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LDCMP0_SPEC; -impl crate::RegisterSpec for LDCMP0_SPEC { +pub struct Ldcmp0Spec; +impl crate::RegisterSpec for Ldcmp0Spec { type Ux = u32; } #[doc = "`read()` method returns [`ldcmp0::R`](R) reader structure"] -impl crate::Readable for LDCMP0_SPEC {} +impl crate::Readable for Ldcmp0Spec {} #[doc = "`write(|w| ..)` method takes [`ldcmp0::W`](W) writer structure"] -impl crate::Writable for LDCMP0_SPEC { +impl crate::Writable for Ldcmp0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LDCMP0 to value 0"] -impl crate::Resettable for LDCMP0_SPEC { +impl crate::Resettable for Ldcmp0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/ldcmp1.rs b/src/ledts0/ldcmp1.rs index 628f3891..1c44fdf9 100644 --- a/src/ledts0/ldcmp1.rs +++ b/src/ledts0/ldcmp1.rs @@ -1,94 +1,85 @@ #[doc = "Register `LDCMP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LDCMP1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_LD4` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD4_R = crate::FieldReader; +pub type CmpLd4R = crate::FieldReader; #[doc = "Field `CMP_LD4` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD5` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD5_R = crate::FieldReader; +pub type CmpLd5R = crate::FieldReader; #[doc = "Field `CMP_LD5` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD6` reader - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD6_R = crate::FieldReader; +pub type CmpLd6R = crate::FieldReader; #[doc = "Field `CMP_LD6` writer - Compare Value for LED COL\\[x\\]"] -pub type CMP_LD6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLd6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LDA_TSCOM` reader - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] -pub type CMP_LDA_TSCOM_R = crate::FieldReader; +pub type CmpLdaTscomR = crate::FieldReader; #[doc = "Field `CMP_LDA_TSCOM` writer - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] -pub type CMP_LDA_TSCOM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpLdaTscomW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld4(&self) -> CMP_LD4_R { - CMP_LD4_R::new((self.bits & 0xff) as u8) + pub fn cmp_ld4(&self) -> CmpLd4R { + CmpLd4R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld5(&self) -> CMP_LD5_R { - CMP_LD5_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ld5(&self) -> CmpLd5R { + CmpLd5R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld6(&self) -> CMP_LD6_R { - CMP_LD6_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ld6(&self) -> CmpLd6R { + CmpLd6R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] #[inline(always)] - pub fn cmp_lda_tscom(&self) -> CMP_LDA_TSCOM_R { - CMP_LDA_TSCOM_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_lda_tscom(&self) -> CmpLdaTscomR { + CmpLdaTscomR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld4(&mut self) -> CMP_LD4_W { - CMP_LD4_W::new(self, 0) + pub fn cmp_ld4(&mut self) -> CmpLd4W { + CmpLd4W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld5(&mut self) -> CMP_LD5_W { - CMP_LD5_W::new(self, 8) + pub fn cmp_ld5(&mut self) -> CmpLd5W { + CmpLd5W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld6(&mut self) -> CMP_LD6_W { - CMP_LD6_W::new(self, 16) + pub fn cmp_ld6(&mut self) -> CmpLd6W { + CmpLd6W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] #[inline(always)] #[must_use] - pub fn cmp_lda_tscom(&mut self) -> CMP_LDA_TSCOM_W { - CMP_LDA_TSCOM_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cmp_lda_tscom(&mut self) -> CmpLdaTscomW { + CmpLdaTscomW::new(self, 24) } } #[doc = "LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LDCMP1_SPEC; -impl crate::RegisterSpec for LDCMP1_SPEC { +pub struct Ldcmp1Spec; +impl crate::RegisterSpec for Ldcmp1Spec { type Ux = u32; } #[doc = "`read()` method returns [`ldcmp1::R`](R) reader structure"] -impl crate::Readable for LDCMP1_SPEC {} +impl crate::Readable for Ldcmp1Spec {} #[doc = "`write(|w| ..)` method takes [`ldcmp1::W`](W) writer structure"] -impl crate::Writable for LDCMP1_SPEC { +impl crate::Writable for Ldcmp1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LDCMP1 to value 0"] -impl crate::Resettable for LDCMP1_SPEC { +impl crate::Resettable for Ldcmp1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/line0.rs b/src/ledts0/line0.rs index 84ba5170..977b22e2 100644 --- a/src/ledts0/line0.rs +++ b/src/ledts0/line0.rs @@ -1,94 +1,85 @@ #[doc = "Register `LINE0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LINE0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LINE_0` reader - Output on LINE\\[x\\]"] -pub type LINE_0_R = crate::FieldReader; +pub type Line0R = crate::FieldReader; #[doc = "Field `LINE_0` writer - Output on LINE\\[x\\]"] -pub type LINE_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_1` reader - Output on LINE\\[x\\]"] -pub type LINE_1_R = crate::FieldReader; +pub type Line1R = crate::FieldReader; #[doc = "Field `LINE_1` writer - Output on LINE\\[x\\]"] -pub type LINE_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_2` reader - Output on LINE\\[x\\]"] -pub type LINE_2_R = crate::FieldReader; +pub type Line2R = crate::FieldReader; #[doc = "Field `LINE_2` writer - Output on LINE\\[x\\]"] -pub type LINE_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_3` reader - Output on LINE\\[x\\]"] -pub type LINE_3_R = crate::FieldReader; +pub type Line3R = crate::FieldReader; #[doc = "Field `LINE_3` writer - Output on LINE\\[x\\]"] -pub type LINE_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_0(&self) -> LINE_0_R { - LINE_0_R::new((self.bits & 0xff) as u8) + pub fn line_0(&self) -> Line0R { + Line0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_1(&self) -> LINE_1_R { - LINE_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn line_1(&self) -> Line1R { + Line1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_2(&self) -> LINE_2_R { - LINE_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn line_2(&self) -> Line2R { + Line2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_3(&self) -> LINE_3_R { - LINE_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn line_3(&self) -> Line3R { + Line3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_0(&mut self) -> LINE_0_W { - LINE_0_W::new(self, 0) + pub fn line_0(&mut self) -> Line0W { + Line0W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_1(&mut self) -> LINE_1_W { - LINE_1_W::new(self, 8) + pub fn line_1(&mut self) -> Line1W { + Line1W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_2(&mut self) -> LINE_2_W { - LINE_2_W::new(self, 16) + pub fn line_2(&mut self) -> Line2W { + Line2W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_3(&mut self) -> LINE_3_W { - LINE_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn line_3(&mut self) -> Line3W { + Line3W::new(self, 24) } } #[doc = "Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LINE0_SPEC; -impl crate::RegisterSpec for LINE0_SPEC { +pub struct Line0Spec; +impl crate::RegisterSpec for Line0Spec { type Ux = u32; } #[doc = "`read()` method returns [`line0::R`](R) reader structure"] -impl crate::Readable for LINE0_SPEC {} +impl crate::Readable for Line0Spec {} #[doc = "`write(|w| ..)` method takes [`line0::W`](W) writer structure"] -impl crate::Writable for LINE0_SPEC { +impl crate::Writable for Line0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINE0 to value 0"] -impl crate::Resettable for LINE0_SPEC { +impl crate::Resettable for Line0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/line1.rs b/src/ledts0/line1.rs index 142dc650..ba4e4cb4 100644 --- a/src/ledts0/line1.rs +++ b/src/ledts0/line1.rs @@ -1,94 +1,85 @@ #[doc = "Register `LINE1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LINE1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LINE_4` reader - Output on LINE\\[x\\]"] -pub type LINE_4_R = crate::FieldReader; +pub type Line4R = crate::FieldReader; #[doc = "Field `LINE_4` writer - Output on LINE\\[x\\]"] -pub type LINE_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_5` reader - Output on LINE\\[x\\]"] -pub type LINE_5_R = crate::FieldReader; +pub type Line5R = crate::FieldReader; #[doc = "Field `LINE_5` writer - Output on LINE\\[x\\]"] -pub type LINE_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_6` reader - Output on LINE\\[x\\]"] -pub type LINE_6_R = crate::FieldReader; +pub type Line6R = crate::FieldReader; #[doc = "Field `LINE_6` writer - Output on LINE\\[x\\]"] -pub type LINE_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Line6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_A` reader - Output on LINE\\[x\\]"] -pub type LINE_A_R = crate::FieldReader; +pub type LineAR = crate::FieldReader; #[doc = "Field `LINE_A` writer - Output on LINE\\[x\\]"] -pub type LINE_A_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LineAW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_4(&self) -> LINE_4_R { - LINE_4_R::new((self.bits & 0xff) as u8) + pub fn line_4(&self) -> Line4R { + Line4R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_5(&self) -> LINE_5_R { - LINE_5_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn line_5(&self) -> Line5R { + Line5R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_6(&self) -> LINE_6_R { - LINE_6_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn line_6(&self) -> Line6R { + Line6R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_a(&self) -> LINE_A_R { - LINE_A_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn line_a(&self) -> LineAR { + LineAR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_4(&mut self) -> LINE_4_W { - LINE_4_W::new(self, 0) + pub fn line_4(&mut self) -> Line4W { + Line4W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_5(&mut self) -> LINE_5_W { - LINE_5_W::new(self, 8) + pub fn line_5(&mut self) -> Line5W { + Line5W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_6(&mut self) -> LINE_6_W { - LINE_6_W::new(self, 16) + pub fn line_6(&mut self) -> Line6W { + Line6W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_a(&mut self) -> LINE_A_W { - LINE_A_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn line_a(&mut self) -> LineAW { + LineAW::new(self, 24) } } #[doc = "Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LINE1_SPEC; -impl crate::RegisterSpec for LINE1_SPEC { +pub struct Line1Spec; +impl crate::RegisterSpec for Line1Spec { type Ux = u32; } #[doc = "`read()` method returns [`line1::R`](R) reader structure"] -impl crate::Readable for LINE1_SPEC {} +impl crate::Readable for Line1Spec {} #[doc = "`write(|w| ..)` method takes [`line1::W`](W) writer structure"] -impl crate::Writable for LINE1_SPEC { +impl crate::Writable for Line1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINE1 to value 0"] -impl crate::Resettable for LINE1_SPEC { +impl crate::Resettable for Line1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tscmp0.rs b/src/ledts0/tscmp0.rs index 4f515e5b..a550889b 100644 --- a/src/ledts0/tscmp0.rs +++ b/src/ledts0/tscmp0.rs @@ -1,94 +1,85 @@ #[doc = "Register `TSCMP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSCMP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_TS0` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS0_R = crate::FieldReader; +pub type CmpTs0R = crate::FieldReader; #[doc = "Field `CMP_TS0` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS1` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS1_R = crate::FieldReader; +pub type CmpTs1R = crate::FieldReader; #[doc = "Field `CMP_TS1` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS2` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS2_R = crate::FieldReader; +pub type CmpTs2R = crate::FieldReader; #[doc = "Field `CMP_TS2` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS3` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS3_R = crate::FieldReader; +pub type CmpTs3R = crate::FieldReader; #[doc = "Field `CMP_TS3` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts0(&self) -> CMP_TS0_R { - CMP_TS0_R::new((self.bits & 0xff) as u8) + pub fn cmp_ts0(&self) -> CmpTs0R { + CmpTs0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts1(&self) -> CMP_TS1_R { - CMP_TS1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ts1(&self) -> CmpTs1R { + CmpTs1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts2(&self) -> CMP_TS2_R { - CMP_TS2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ts2(&self) -> CmpTs2R { + CmpTs2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts3(&self) -> CMP_TS3_R { - CMP_TS3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ts3(&self) -> CmpTs3R { + CmpTs3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts0(&mut self) -> CMP_TS0_W { - CMP_TS0_W::new(self, 0) + pub fn cmp_ts0(&mut self) -> CmpTs0W { + CmpTs0W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts1(&mut self) -> CMP_TS1_W { - CMP_TS1_W::new(self, 8) + pub fn cmp_ts1(&mut self) -> CmpTs1W { + CmpTs1W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts2(&mut self) -> CMP_TS2_W { - CMP_TS2_W::new(self, 16) + pub fn cmp_ts2(&mut self) -> CmpTs2W { + CmpTs2W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts3(&mut self) -> CMP_TS3_W { - CMP_TS3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cmp_ts3(&mut self) -> CmpTs3W { + CmpTs3W::new(self, 24) } } #[doc = "Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TSCMP0_SPEC; -impl crate::RegisterSpec for TSCMP0_SPEC { +pub struct Tscmp0Spec; +impl crate::RegisterSpec for Tscmp0Spec { type Ux = u32; } #[doc = "`read()` method returns [`tscmp0::R`](R) reader structure"] -impl crate::Readable for TSCMP0_SPEC {} +impl crate::Readable for Tscmp0Spec {} #[doc = "`write(|w| ..)` method takes [`tscmp0::W`](W) writer structure"] -impl crate::Writable for TSCMP0_SPEC { +impl crate::Writable for Tscmp0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSCMP0 to value 0"] -impl crate::Resettable for TSCMP0_SPEC { +impl crate::Resettable for Tscmp0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tscmp1.rs b/src/ledts0/tscmp1.rs index 70dd7906..7f0e56b9 100644 --- a/src/ledts0/tscmp1.rs +++ b/src/ledts0/tscmp1.rs @@ -1,94 +1,85 @@ #[doc = "Register `TSCMP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSCMP1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_TS4` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS4_R = crate::FieldReader; +pub type CmpTs4R = crate::FieldReader; #[doc = "Field `CMP_TS4` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS5` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS5_R = crate::FieldReader; +pub type CmpTs5R = crate::FieldReader; #[doc = "Field `CMP_TS5` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS6` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS6_R = crate::FieldReader; +pub type CmpTs6R = crate::FieldReader; #[doc = "Field `CMP_TS6` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS7` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS7_R = crate::FieldReader; +pub type CmpTs7R = crate::FieldReader; #[doc = "Field `CMP_TS7` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CMP_TS7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CmpTs7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts4(&self) -> CMP_TS4_R { - CMP_TS4_R::new((self.bits & 0xff) as u8) + pub fn cmp_ts4(&self) -> CmpTs4R { + CmpTs4R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts5(&self) -> CMP_TS5_R { - CMP_TS5_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ts5(&self) -> CmpTs5R { + CmpTs5R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts6(&self) -> CMP_TS6_R { - CMP_TS6_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ts6(&self) -> CmpTs6R { + CmpTs6R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts7(&self) -> CMP_TS7_R { - CMP_TS7_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ts7(&self) -> CmpTs7R { + CmpTs7R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts4(&mut self) -> CMP_TS4_W { - CMP_TS4_W::new(self, 0) + pub fn cmp_ts4(&mut self) -> CmpTs4W { + CmpTs4W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts5(&mut self) -> CMP_TS5_W { - CMP_TS5_W::new(self, 8) + pub fn cmp_ts5(&mut self) -> CmpTs5W { + CmpTs5W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts6(&mut self) -> CMP_TS6_W { - CMP_TS6_W::new(self, 16) + pub fn cmp_ts6(&mut self) -> CmpTs6W { + CmpTs6W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts7(&mut self) -> CMP_TS7_W { - CMP_TS7_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cmp_ts7(&mut self) -> CmpTs7W { + CmpTs7W::new(self, 24) } } #[doc = "Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TSCMP1_SPEC; -impl crate::RegisterSpec for TSCMP1_SPEC { +pub struct Tscmp1Spec; +impl crate::RegisterSpec for Tscmp1Spec { type Ux = u32; } #[doc = "`read()` method returns [`tscmp1::R`](R) reader structure"] -impl crate::Readable for TSCMP1_SPEC {} +impl crate::Readable for Tscmp1Spec {} #[doc = "`write(|w| ..)` method takes [`tscmp1::W`](W) writer structure"] -impl crate::Writable for TSCMP1_SPEC { +impl crate::Writable for Tscmp1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSCMP1 to value 0"] -impl crate::Resettable for TSCMP1_SPEC { +impl crate::Resettable for Tscmp1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tsval.rs b/src/ledts0/tsval.rs index 409e3961..9a9acf7b 100644 --- a/src/ledts0/tsval.rs +++ b/src/ledts0/tsval.rs @@ -1,56 +1,47 @@ #[doc = "Register `TSVAL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSVAL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSCTRVALR` reader - Shadow TS-Counter (Read)"] -pub type TSCTRVALR_R = crate::FieldReader; +pub type TsctrvalrR = crate::FieldReader; #[doc = "Field `TSCTRVAL` reader - TS-Counter Value"] -pub type TSCTRVAL_R = crate::FieldReader; +pub type TsctrvalR = crate::FieldReader; #[doc = "Field `TSCTRVAL` writer - TS-Counter Value"] -pub type TSCTRVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TsctrvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow TS-Counter (Read)"] #[inline(always)] - pub fn tsctrvalr(&self) -> TSCTRVALR_R { - TSCTRVALR_R::new((self.bits & 0xffff) as u16) + pub fn tsctrvalr(&self) -> TsctrvalrR { + TsctrvalrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - TS-Counter Value"] #[inline(always)] - pub fn tsctrval(&self) -> TSCTRVAL_R { - TSCTRVAL_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn tsctrval(&self) -> TsctrvalR { + TsctrvalR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 16:31 - TS-Counter Value"] #[inline(always)] #[must_use] - pub fn tsctrval(&mut self) -> TSCTRVAL_W { - TSCTRVAL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tsctrval(&mut self) -> TsctrvalW { + TsctrvalW::new(self, 16) } } #[doc = "Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TSVAL_SPEC; -impl crate::RegisterSpec for TSVAL_SPEC { +pub struct TsvalSpec; +impl crate::RegisterSpec for TsvalSpec { type Ux = u32; } #[doc = "`read()` method returns [`tsval::R`](R) reader structure"] -impl crate::Readable for TSVAL_SPEC {} +impl crate::Readable for TsvalSpec {} #[doc = "`write(|w| ..)` method takes [`tsval::W`](W) writer structure"] -impl crate::Writable for TSVAL_SPEC { +impl crate::Writable for TsvalSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSVAL to value 0"] -impl crate::Resettable for TSVAL_SPEC { +impl crate::Resettable for TsvalSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/lib.rs b/src/lib.rs index 1aff7bb4..c1f0978e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,5 @@ -#![doc = "Peripheral access API for XMC4800 microcontrollers (generated using svd2rust v0.31.5 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.31.5/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for XMC4800 microcontrollers (generated using svd2rust v0.32.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.32.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -455,11 +455,11 @@ unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { } } #[doc = "Cortex-M4 Private Peripheral Block"] -pub struct PPB { +pub struct Ppb { _marker: PhantomData<*const ()>, } -unsafe impl Send for PPB {} -impl PPB { +unsafe impl Send for Ppb {} +impl Ppb { #[doc = r"Pointer to the register block"] pub const PTR: *const ppb::RegisterBlock = 0xe000_e000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -484,26 +484,26 @@ impl PPB { Self { _marker: PhantomData } } } -impl Deref for PPB { +impl Deref for Ppb { type Target = ppb::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PPB { +impl core::fmt::Debug for Ppb { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PPB").finish() + f.debug_struct("Ppb").finish() } } #[doc = "Cortex-M4 Private Peripheral Block"] pub mod ppb; #[doc = "DMA Line Router"] -pub struct DLR { +pub struct Dlr { _marker: PhantomData<*const ()>, } -unsafe impl Send for DLR {} -impl DLR { +unsafe impl Send for Dlr {} +impl Dlr { #[doc = r"Pointer to the register block"] pub const PTR: *const dlr::RegisterBlock = 0x5000_4900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -528,26 +528,26 @@ impl DLR { Self { _marker: PhantomData } } } -impl Deref for DLR { +impl Deref for Dlr { type Target = dlr::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DLR { +impl core::fmt::Debug for Dlr { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DLR").finish() + f.debug_struct("Dlr").finish() } } #[doc = "DMA Line Router"] pub mod dlr; #[doc = "Event Request Unit 0"] -pub struct ERU0 { +pub struct Eru0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ERU0 {} -impl ERU0 { +unsafe impl Send for Eru0 {} +impl Eru0 { #[doc = r"Pointer to the register block"] pub const PTR: *const eru0::RegisterBlock = 0x5000_4800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -572,26 +572,26 @@ impl ERU0 { Self { _marker: PhantomData } } } -impl Deref for ERU0 { +impl Deref for Eru0 { type Target = eru0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ERU0 { +impl core::fmt::Debug for Eru0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ERU0").finish() + f.debug_struct("Eru0").finish() } } #[doc = "Event Request Unit 0"] pub mod eru0; #[doc = "Event Request Unit 1"] -pub struct ERU1 { +pub struct Eru1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ERU1 {} -impl ERU1 { +unsafe impl Send for Eru1 {} +impl Eru1 { #[doc = r"Pointer to the register block"] pub const PTR: *const eru0::RegisterBlock = 0x4004_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -616,26 +616,26 @@ impl ERU1 { Self { _marker: PhantomData } } } -impl Deref for ERU1 { +impl Deref for Eru1 { type Target = eru0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ERU1 { +impl core::fmt::Debug for Eru1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ERU1").finish() + f.debug_struct("Eru1").finish() } } #[doc = "Event Request Unit 1"] pub use self::eru0 as eru1; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0 { +pub struct Gpdma0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0 {} -impl GPDMA0 { +unsafe impl Send for Gpdma0 {} +impl Gpdma0 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0::RegisterBlock = 0x5001_42c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -660,26 +660,26 @@ impl GPDMA0 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0 { +impl Deref for Gpdma0 { type Target = gpdma0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0 { +impl core::fmt::Debug for Gpdma0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0").finish() + f.debug_struct("Gpdma0").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH0 { +pub struct Gpdma0Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH0 {} -impl GPDMA0_CH0 { +unsafe impl Send for Gpdma0Ch0 {} +impl Gpdma0Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch0::RegisterBlock = 0x5001_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -704,26 +704,26 @@ impl GPDMA0_CH0 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH0 { +impl Deref for Gpdma0Ch0 { type Target = gpdma0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH0 { +impl core::fmt::Debug for Gpdma0Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH0").finish() + f.debug_struct("Gpdma0Ch0").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0_ch0; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH1 { +pub struct Gpdma0Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH1 {} -impl GPDMA0_CH1 { +unsafe impl Send for Gpdma0Ch1 {} +impl Gpdma0Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch0::RegisterBlock = 0x5001_4058 as *const _; #[doc = r"Return the pointer to the register block"] @@ -748,26 +748,26 @@ impl GPDMA0_CH1 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH1 { +impl Deref for Gpdma0Ch1 { type Target = gpdma0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH1 { +impl core::fmt::Debug for Gpdma0Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH1").finish() + f.debug_struct("Gpdma0Ch1").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch0 as gpdma0_ch1; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH2 { +pub struct Gpdma0Ch2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH2 {} -impl GPDMA0_CH2 { +unsafe impl Send for Gpdma0Ch2 {} +impl Gpdma0Ch2 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_40b0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -792,26 +792,26 @@ impl GPDMA0_CH2 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH2 { +impl Deref for Gpdma0Ch2 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH2 { +impl core::fmt::Debug for Gpdma0Ch2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH2").finish() + f.debug_struct("Gpdma0Ch2").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0_ch2; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH3 { +pub struct Gpdma0Ch3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH3 {} -impl GPDMA0_CH3 { +unsafe impl Send for Gpdma0Ch3 {} +impl Gpdma0Ch3 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4108 as *const _; #[doc = r"Return the pointer to the register block"] @@ -836,26 +836,26 @@ impl GPDMA0_CH3 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH3 { +impl Deref for Gpdma0Ch3 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH3 { +impl core::fmt::Debug for Gpdma0Ch3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH3").finish() + f.debug_struct("Gpdma0Ch3").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch3; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH4 { +pub struct Gpdma0Ch4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH4 {} -impl GPDMA0_CH4 { +unsafe impl Send for Gpdma0Ch4 {} +impl Gpdma0Ch4 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4160 as *const _; #[doc = r"Return the pointer to the register block"] @@ -880,26 +880,26 @@ impl GPDMA0_CH4 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH4 { +impl Deref for Gpdma0Ch4 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH4 { +impl core::fmt::Debug for Gpdma0Ch4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH4").finish() + f.debug_struct("Gpdma0Ch4").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch4; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH5 { +pub struct Gpdma0Ch5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH5 {} -impl GPDMA0_CH5 { +unsafe impl Send for Gpdma0Ch5 {} +impl Gpdma0Ch5 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_41b8 as *const _; #[doc = r"Return the pointer to the register block"] @@ -924,26 +924,26 @@ impl GPDMA0_CH5 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH5 { +impl Deref for Gpdma0Ch5 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH5 { +impl core::fmt::Debug for Gpdma0Ch5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH5").finish() + f.debug_struct("Gpdma0Ch5").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch5; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH6 { +pub struct Gpdma0Ch6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH6 {} -impl GPDMA0_CH6 { +unsafe impl Send for Gpdma0Ch6 {} +impl Gpdma0Ch6 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4210 as *const _; #[doc = r"Return the pointer to the register block"] @@ -968,26 +968,26 @@ impl GPDMA0_CH6 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH6 { +impl Deref for Gpdma0Ch6 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH6 { +impl core::fmt::Debug for Gpdma0Ch6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH6").finish() + f.debug_struct("Gpdma0Ch6").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch6; #[doc = "General Purpose DMA Unit 0"] -pub struct GPDMA0_CH7 { +pub struct Gpdma0Ch7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA0_CH7 {} -impl GPDMA0_CH7 { +unsafe impl Send for Gpdma0Ch7 {} +impl Gpdma0Ch7 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4268 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1012,26 +1012,26 @@ impl GPDMA0_CH7 { Self { _marker: PhantomData } } } -impl Deref for GPDMA0_CH7 { +impl Deref for Gpdma0Ch7 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA0_CH7 { +impl core::fmt::Debug for Gpdma0Ch7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA0_CH7").finish() + f.debug_struct("Gpdma0Ch7").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch7; #[doc = "General Purpose DMA Unit 1"] -pub struct GPDMA1 { +pub struct Gpdma1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA1 {} -impl GPDMA1 { +unsafe impl Send for Gpdma1 {} +impl Gpdma1 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma1::RegisterBlock = 0x5001_82c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1056,26 +1056,26 @@ impl GPDMA1 { Self { _marker: PhantomData } } } -impl Deref for GPDMA1 { +impl Deref for Gpdma1 { type Target = gpdma1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA1 { +impl core::fmt::Debug for Gpdma1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA1").finish() + f.debug_struct("Gpdma1").finish() } } #[doc = "General Purpose DMA Unit 1"] pub mod gpdma1; #[doc = "General Purpose DMA Unit 1"] -pub struct GPDMA1_CH0 { +pub struct Gpdma1Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA1_CH0 {} -impl GPDMA1_CH0 { +unsafe impl Send for Gpdma1Ch0 {} +impl Gpdma1Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma1_ch0::RegisterBlock = 0x5001_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1100,26 +1100,26 @@ impl GPDMA1_CH0 { Self { _marker: PhantomData } } } -impl Deref for GPDMA1_CH0 { +impl Deref for Gpdma1Ch0 { type Target = gpdma1_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA1_CH0 { +impl core::fmt::Debug for Gpdma1Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA1_CH0").finish() + f.debug_struct("Gpdma1Ch0").finish() } } #[doc = "General Purpose DMA Unit 1"] pub mod gpdma1_ch0; #[doc = "General Purpose DMA Unit 1"] -pub struct GPDMA1_CH1 { +pub struct Gpdma1Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA1_CH1 {} -impl GPDMA1_CH1 { +unsafe impl Send for Gpdma1Ch1 {} +impl Gpdma1Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma1_ch0::RegisterBlock = 0x5001_8058 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1144,26 +1144,26 @@ impl GPDMA1_CH1 { Self { _marker: PhantomData } } } -impl Deref for GPDMA1_CH1 { +impl Deref for Gpdma1Ch1 { type Target = gpdma1_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA1_CH1 { +impl core::fmt::Debug for Gpdma1Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA1_CH1").finish() + f.debug_struct("Gpdma1Ch1").finish() } } #[doc = "General Purpose DMA Unit 1"] pub use self::gpdma1_ch0 as gpdma1_ch1; #[doc = "General Purpose DMA Unit 1"] -pub struct GPDMA1_CH2 { +pub struct Gpdma1Ch2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA1_CH2 {} -impl GPDMA1_CH2 { +unsafe impl Send for Gpdma1Ch2 {} +impl Gpdma1Ch2 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma1_ch0::RegisterBlock = 0x5001_80b0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1188,26 +1188,26 @@ impl GPDMA1_CH2 { Self { _marker: PhantomData } } } -impl Deref for GPDMA1_CH2 { +impl Deref for Gpdma1Ch2 { type Target = gpdma1_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA1_CH2 { +impl core::fmt::Debug for Gpdma1Ch2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA1_CH2").finish() + f.debug_struct("Gpdma1Ch2").finish() } } #[doc = "General Purpose DMA Unit 1"] pub use self::gpdma1_ch0 as gpdma1_ch2; #[doc = "General Purpose DMA Unit 1"] -pub struct GPDMA1_CH3 { +pub struct Gpdma1Ch3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for GPDMA1_CH3 {} -impl GPDMA1_CH3 { +unsafe impl Send for Gpdma1Ch3 {} +impl Gpdma1Ch3 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma1_ch0::RegisterBlock = 0x5001_8108 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1232,26 +1232,26 @@ impl GPDMA1_CH3 { Self { _marker: PhantomData } } } -impl Deref for GPDMA1_CH3 { +impl Deref for Gpdma1Ch3 { type Target = gpdma1_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for GPDMA1_CH3 { +impl core::fmt::Debug for Gpdma1Ch3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("GPDMA1_CH3").finish() + f.debug_struct("Gpdma1Ch3").finish() } } #[doc = "General Purpose DMA Unit 1"] pub use self::gpdma1_ch0 as gpdma1_ch3; #[doc = "Flexible CRC Engine"] -pub struct FCE { +pub struct Fce { _marker: PhantomData<*const ()>, } -unsafe impl Send for FCE {} -impl FCE { +unsafe impl Send for Fce {} +impl Fce { #[doc = r"Pointer to the register block"] pub const PTR: *const fce::RegisterBlock = 0x5002_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1276,26 +1276,26 @@ impl FCE { Self { _marker: PhantomData } } } -impl Deref for FCE { +impl Deref for Fce { type Target = fce::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FCE { +impl core::fmt::Debug for Fce { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FCE").finish() + f.debug_struct("Fce").finish() } } #[doc = "Flexible CRC Engine"] pub mod fce; #[doc = "Flexible CRC Engine"] -pub struct FCE_KE0 { +pub struct FceKe0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FCE_KE0 {} -impl FCE_KE0 { +unsafe impl Send for FceKe0 {} +impl FceKe0 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0020 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1320,26 +1320,26 @@ impl FCE_KE0 { Self { _marker: PhantomData } } } -impl Deref for FCE_KE0 { +impl Deref for FceKe0 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FCE_KE0 { +impl core::fmt::Debug for FceKe0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FCE_KE0").finish() + f.debug_struct("FceKe0").finish() } } #[doc = "Flexible CRC Engine"] pub mod fce_ke0; #[doc = "Flexible CRC Engine"] -pub struct FCE_KE1 { +pub struct FceKe1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FCE_KE1 {} -impl FCE_KE1 { +unsafe impl Send for FceKe1 {} +impl FceKe1 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0040 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1364,26 +1364,26 @@ impl FCE_KE1 { Self { _marker: PhantomData } } } -impl Deref for FCE_KE1 { +impl Deref for FceKe1 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FCE_KE1 { +impl core::fmt::Debug for FceKe1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FCE_KE1").finish() + f.debug_struct("FceKe1").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke1; #[doc = "Flexible CRC Engine"] -pub struct FCE_KE2 { +pub struct FceKe2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FCE_KE2 {} -impl FCE_KE2 { +unsafe impl Send for FceKe2 {} +impl FceKe2 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0060 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1408,26 +1408,26 @@ impl FCE_KE2 { Self { _marker: PhantomData } } } -impl Deref for FCE_KE2 { +impl Deref for FceKe2 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FCE_KE2 { +impl core::fmt::Debug for FceKe2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FCE_KE2").finish() + f.debug_struct("FceKe2").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke2; #[doc = "Flexible CRC Engine"] -pub struct FCE_KE3 { +pub struct FceKe3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FCE_KE3 {} -impl FCE_KE3 { +unsafe impl Send for FceKe3 {} +impl FceKe3 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0080 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1452,26 +1452,26 @@ impl FCE_KE3 { Self { _marker: PhantomData } } } -impl Deref for FCE_KE3 { +impl Deref for FceKe3 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FCE_KE3 { +impl core::fmt::Debug for FceKe3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FCE_KE3").finish() + f.debug_struct("FceKe3").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke3; #[doc = "Peripheral Bridge AHB 0"] -pub struct PBA0 { +pub struct Pba0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PBA0 {} -impl PBA0 { +unsafe impl Send for Pba0 {} +impl Pba0 { #[doc = r"Pointer to the register block"] pub const PTR: *const pba0::RegisterBlock = 0x4000_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1496,26 +1496,26 @@ impl PBA0 { Self { _marker: PhantomData } } } -impl Deref for PBA0 { +impl Deref for Pba0 { type Target = pba0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PBA0 { +impl core::fmt::Debug for Pba0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PBA0").finish() + f.debug_struct("Pba0").finish() } } #[doc = "Peripheral Bridge AHB 0"] pub mod pba0; #[doc = "Peripheral Bridge AHB 1"] -pub struct PBA1 { +pub struct Pba1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PBA1 {} -impl PBA1 { +unsafe impl Send for Pba1 {} +impl Pba1 { #[doc = r"Pointer to the register block"] pub const PTR: *const pba0::RegisterBlock = 0x4800_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1540,26 +1540,26 @@ impl PBA1 { Self { _marker: PhantomData } } } -impl Deref for PBA1 { +impl Deref for Pba1 { type Target = pba0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PBA1 { +impl core::fmt::Debug for Pba1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PBA1").finish() + f.debug_struct("Pba1").finish() } } #[doc = "Peripheral Bridge AHB 1"] pub use self::pba0 as pba1; #[doc = "Flash Memory Controller"] -pub struct FLASH0 { +pub struct Flash0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FLASH0 {} -impl FLASH0 { +unsafe impl Send for Flash0 {} +impl Flash0 { #[doc = r"Pointer to the register block"] pub const PTR: *const flash0::RegisterBlock = 0x5800_1000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1584,26 +1584,26 @@ impl FLASH0 { Self { _marker: PhantomData } } } -impl Deref for FLASH0 { +impl Deref for Flash0 { type Target = flash0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FLASH0 { +impl core::fmt::Debug for Flash0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FLASH0").finish() + f.debug_struct("Flash0").finish() } } #[doc = "Flash Memory Controller"] pub mod flash0; #[doc = "Prefetch Unit"] -pub struct PREF { +pub struct Pref { _marker: PhantomData<*const ()>, } -unsafe impl Send for PREF {} -impl PREF { +unsafe impl Send for Pref {} +impl Pref { #[doc = r"Pointer to the register block"] pub const PTR: *const pref::RegisterBlock = 0x5800_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1628,26 +1628,26 @@ impl PREF { Self { _marker: PhantomData } } } -impl Deref for PREF { +impl Deref for Pref { type Target = pref::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PREF { +impl core::fmt::Debug for Pref { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PREF").finish() + f.debug_struct("Pref").finish() } } #[doc = "Prefetch Unit"] pub mod pref; #[doc = "Program Management Unit"] -pub struct PMU0 { +pub struct Pmu0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PMU0 {} -impl PMU0 { +unsafe impl Send for Pmu0 {} +impl Pmu0 { #[doc = r"Pointer to the register block"] pub const PTR: *const pmu0::RegisterBlock = 0x5800_0508 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1672,26 +1672,26 @@ impl PMU0 { Self { _marker: PhantomData } } } -impl Deref for PMU0 { +impl Deref for Pmu0 { type Target = pmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PMU0 { +impl core::fmt::Debug for Pmu0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PMU0").finish() + f.debug_struct("Pmu0").finish() } } #[doc = "Program Management Unit"] pub mod pmu0; #[doc = "Watch Dog Timer"] -pub struct WDT { +pub struct Wdt { _marker: PhantomData<*const ()>, } -unsafe impl Send for WDT {} -impl WDT { +unsafe impl Send for Wdt {} +impl Wdt { #[doc = r"Pointer to the register block"] pub const PTR: *const wdt::RegisterBlock = 0x5000_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1716,26 +1716,26 @@ impl WDT { Self { _marker: PhantomData } } } -impl Deref for WDT { +impl Deref for Wdt { type Target = wdt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for WDT { +impl core::fmt::Debug for Wdt { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("WDT").finish() + f.debug_struct("Wdt").finish() } } #[doc = "Watch Dog Timer"] pub mod wdt; #[doc = "Real Time Clock"] -pub struct RTC { +pub struct Rtc { _marker: PhantomData<*const ()>, } -unsafe impl Send for RTC {} -impl RTC { +unsafe impl Send for Rtc {} +impl Rtc { #[doc = r"Pointer to the register block"] pub const PTR: *const rtc::RegisterBlock = 0x5000_4a00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1760,26 +1760,26 @@ impl RTC { Self { _marker: PhantomData } } } -impl Deref for RTC { +impl Deref for Rtc { type Target = rtc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for RTC { +impl core::fmt::Debug for Rtc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("RTC").finish() + f.debug_struct("Rtc").finish() } } #[doc = "Real Time Clock"] pub mod rtc; #[doc = "System Control Unit"] -pub struct SCU_CLK { +pub struct ScuClk { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_CLK {} -impl SCU_CLK { +unsafe impl Send for ScuClk {} +impl ScuClk { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_clk::RegisterBlock = 0x5000_4600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1804,26 +1804,26 @@ impl SCU_CLK { Self { _marker: PhantomData } } } -impl Deref for SCU_CLK { +impl Deref for ScuClk { type Target = scu_clk::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_CLK { +impl core::fmt::Debug for ScuClk { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_CLK").finish() + f.debug_struct("ScuClk").finish() } } #[doc = "System Control Unit"] pub mod scu_clk; #[doc = "System Control Unit"] -pub struct SCU_OSC { +pub struct ScuOsc { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_OSC {} -impl SCU_OSC { +unsafe impl Send for ScuOsc {} +impl ScuOsc { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_osc::RegisterBlock = 0x5000_4700 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1848,26 +1848,26 @@ impl SCU_OSC { Self { _marker: PhantomData } } } -impl Deref for SCU_OSC { +impl Deref for ScuOsc { type Target = scu_osc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_OSC { +impl core::fmt::Debug for ScuOsc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_OSC").finish() + f.debug_struct("ScuOsc").finish() } } #[doc = "System Control Unit"] pub mod scu_osc; #[doc = "System Control Unit"] -pub struct SCU_PLL { +pub struct ScuPll { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_PLL {} -impl SCU_PLL { +unsafe impl Send for ScuPll {} +impl ScuPll { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_pll::RegisterBlock = 0x5000_4710 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1892,26 +1892,26 @@ impl SCU_PLL { Self { _marker: PhantomData } } } -impl Deref for SCU_PLL { +impl Deref for ScuPll { type Target = scu_pll::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_PLL { +impl core::fmt::Debug for ScuPll { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_PLL").finish() + f.debug_struct("ScuPll").finish() } } #[doc = "System Control Unit"] pub mod scu_pll; #[doc = "System Control Unit"] -pub struct SCU_GENERAL { +pub struct ScuGeneral { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_GENERAL {} -impl SCU_GENERAL { +unsafe impl Send for ScuGeneral {} +impl ScuGeneral { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_general::RegisterBlock = 0x5000_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1936,26 +1936,26 @@ impl SCU_GENERAL { Self { _marker: PhantomData } } } -impl Deref for SCU_GENERAL { +impl Deref for ScuGeneral { type Target = scu_general::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_GENERAL { +impl core::fmt::Debug for ScuGeneral { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_GENERAL").finish() + f.debug_struct("ScuGeneral").finish() } } #[doc = "System Control Unit"] pub mod scu_general; #[doc = "System Control Unit"] -pub struct SCU_INTERRUPT { +pub struct ScuInterrupt { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_INTERRUPT {} -impl SCU_INTERRUPT { +unsafe impl Send for ScuInterrupt {} +impl ScuInterrupt { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_interrupt::RegisterBlock = 0x5000_4074 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1980,26 +1980,26 @@ impl SCU_INTERRUPT { Self { _marker: PhantomData } } } -impl Deref for SCU_INTERRUPT { +impl Deref for ScuInterrupt { type Target = scu_interrupt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_INTERRUPT { +impl core::fmt::Debug for ScuInterrupt { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_INTERRUPT").finish() + f.debug_struct("ScuInterrupt").finish() } } #[doc = "System Control Unit"] pub mod scu_interrupt; #[doc = "System Control Unit"] -pub struct SCU_PARITY { +pub struct ScuParity { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_PARITY {} -impl SCU_PARITY { +unsafe impl Send for ScuParity {} +impl ScuParity { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_parity::RegisterBlock = 0x5000_413c as *const _; #[doc = r"Return the pointer to the register block"] @@ -2024,26 +2024,26 @@ impl SCU_PARITY { Self { _marker: PhantomData } } } -impl Deref for SCU_PARITY { +impl Deref for ScuParity { type Target = scu_parity::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_PARITY { +impl core::fmt::Debug for ScuParity { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_PARITY").finish() + f.debug_struct("ScuParity").finish() } } #[doc = "System Control Unit"] pub mod scu_parity; #[doc = "System Control Unit"] -pub struct SCU_TRAP { +pub struct ScuTrap { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_TRAP {} -impl SCU_TRAP { +unsafe impl Send for ScuTrap {} +impl ScuTrap { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_trap::RegisterBlock = 0x5000_4160 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2068,26 +2068,26 @@ impl SCU_TRAP { Self { _marker: PhantomData } } } -impl Deref for SCU_TRAP { +impl Deref for ScuTrap { type Target = scu_trap::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_TRAP { +impl core::fmt::Debug for ScuTrap { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_TRAP").finish() + f.debug_struct("ScuTrap").finish() } } #[doc = "System Control Unit"] pub mod scu_trap; #[doc = "System Control Unit"] -pub struct SCU_HIBERNATE { +pub struct ScuHibernate { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_HIBERNATE {} -impl SCU_HIBERNATE { +unsafe impl Send for ScuHibernate {} +impl ScuHibernate { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_hibernate::RegisterBlock = 0x5000_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2112,26 +2112,26 @@ impl SCU_HIBERNATE { Self { _marker: PhantomData } } } -impl Deref for SCU_HIBERNATE { +impl Deref for ScuHibernate { type Target = scu_hibernate::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_HIBERNATE { +impl core::fmt::Debug for ScuHibernate { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_HIBERNATE").finish() + f.debug_struct("ScuHibernate").finish() } } #[doc = "System Control Unit"] pub mod scu_hibernate; #[doc = "System Control Unit"] -pub struct SCU_POWER { +pub struct ScuPower { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_POWER {} -impl SCU_POWER { +unsafe impl Send for ScuPower {} +impl ScuPower { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_power::RegisterBlock = 0x5000_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2156,26 +2156,26 @@ impl SCU_POWER { Self { _marker: PhantomData } } } -impl Deref for SCU_POWER { +impl Deref for ScuPower { type Target = scu_power::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_POWER { +impl core::fmt::Debug for ScuPower { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_POWER").finish() + f.debug_struct("ScuPower").finish() } } #[doc = "System Control Unit"] pub mod scu_power; #[doc = "System Control Unit"] -pub struct SCU_RESET { +pub struct ScuReset { _marker: PhantomData<*const ()>, } -unsafe impl Send for SCU_RESET {} -impl SCU_RESET { +unsafe impl Send for ScuReset {} +impl ScuReset { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_reset::RegisterBlock = 0x5000_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2200,26 +2200,26 @@ impl SCU_RESET { Self { _marker: PhantomData } } } -impl Deref for SCU_RESET { +impl Deref for ScuReset { type Target = scu_reset::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SCU_RESET { +impl core::fmt::Debug for ScuReset { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SCU_RESET").finish() + f.debug_struct("ScuReset").finish() } } #[doc = "System Control Unit"] pub mod scu_reset; #[doc = "LED and Touch Sense Unit 0"] -pub struct LEDTS0 { +pub struct Ledts0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for LEDTS0 {} -impl LEDTS0 { +unsafe impl Send for Ledts0 {} +impl Ledts0 { #[doc = r"Pointer to the register block"] pub const PTR: *const ledts0::RegisterBlock = 0x4801_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2244,26 +2244,26 @@ impl LEDTS0 { Self { _marker: PhantomData } } } -impl Deref for LEDTS0 { +impl Deref for Ledts0 { type Target = ledts0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for LEDTS0 { +impl core::fmt::Debug for Ledts0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("LEDTS0").finish() + f.debug_struct("Ledts0").finish() } } #[doc = "LED and Touch Sense Unit 0"] pub mod ledts0; #[doc = "SD and Multimediacard Control Register"] -pub struct SDMMC_CON { +pub struct SdmmcCon { _marker: PhantomData<*const ()>, } -unsafe impl Send for SDMMC_CON {} -impl SDMMC_CON { +unsafe impl Send for SdmmcCon {} +impl SdmmcCon { #[doc = r"Pointer to the register block"] pub const PTR: *const sdmmc_con::RegisterBlock = 0x5000_40b4 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2288,26 +2288,26 @@ impl SDMMC_CON { Self { _marker: PhantomData } } } -impl Deref for SDMMC_CON { +impl Deref for SdmmcCon { type Target = sdmmc_con::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SDMMC_CON { +impl core::fmt::Debug for SdmmcCon { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SDMMC_CON").finish() + f.debug_struct("SdmmcCon").finish() } } #[doc = "SD and Multimediacard Control Register"] pub mod sdmmc_con; #[doc = "SD and Multimediacard Interface"] -pub struct SDMMC { +pub struct Sdmmc { _marker: PhantomData<*const ()>, } -unsafe impl Send for SDMMC {} -impl SDMMC { +unsafe impl Send for Sdmmc {} +impl Sdmmc { #[doc = r"Pointer to the register block"] pub const PTR: *const sdmmc::RegisterBlock = 0x4801_c000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2332,26 +2332,26 @@ impl SDMMC { Self { _marker: PhantomData } } } -impl Deref for SDMMC { +impl Deref for Sdmmc { type Target = sdmmc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for SDMMC { +impl core::fmt::Debug for Sdmmc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SDMMC").finish() + f.debug_struct("Sdmmc").finish() } } #[doc = "SD and Multimediacard Interface"] pub mod sdmmc; #[doc = "External Bus Unit"] -pub struct EBU { +pub struct Ebu { _marker: PhantomData<*const ()>, } -unsafe impl Send for EBU {} -impl EBU { +unsafe impl Send for Ebu {} +impl Ebu { #[doc = r"Pointer to the register block"] pub const PTR: *const ebu::RegisterBlock = 0x5800_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2376,26 +2376,26 @@ impl EBU { Self { _marker: PhantomData } } } -impl Deref for EBU { +impl Deref for Ebu { type Target = ebu::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for EBU { +impl core::fmt::Debug for Ebu { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("EBU").finish() + f.debug_struct("Ebu").finish() } } #[doc = "External Bus Unit"] pub mod ebu; #[doc = "Ethernet Control Register"] -pub struct ETH0_CON { +pub struct Eth0Con { _marker: PhantomData<*const ()>, } -unsafe impl Send for ETH0_CON {} -impl ETH0_CON { +unsafe impl Send for Eth0Con {} +impl Eth0Con { #[doc = r"Pointer to the register block"] pub const PTR: *const eth0_con::RegisterBlock = 0x5000_4040 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2420,26 +2420,26 @@ impl ETH0_CON { Self { _marker: PhantomData } } } -impl Deref for ETH0_CON { +impl Deref for Eth0Con { type Target = eth0_con::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ETH0_CON { +impl core::fmt::Debug for Eth0Con { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ETH0_CON").finish() + f.debug_struct("Eth0Con").finish() } } #[doc = "Ethernet Control Register"] pub mod eth0_con; #[doc = "Ethernet Unit 0"] -pub struct ETH0 { +pub struct Eth0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ETH0 {} -impl ETH0 { +unsafe impl Send for Eth0 {} +impl Eth0 { #[doc = r"Pointer to the register block"] pub const PTR: *const eth0::RegisterBlock = 0x5000_c000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2464,26 +2464,26 @@ impl ETH0 { Self { _marker: PhantomData } } } -impl Deref for ETH0 { +impl Deref for Eth0 { type Target = eth0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ETH0 { +impl core::fmt::Debug for Eth0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ETH0").finish() + f.debug_struct("Eth0").finish() } } #[doc = "Ethernet Unit 0"] pub mod eth0; #[doc = "EtherCAT 0 Control Register"] -pub struct ECAT0_CON { +pub struct Ecat0Con { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_CON {} -impl ECAT0_CON { +unsafe impl Send for Ecat0Con {} +impl Ecat0Con { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_con::RegisterBlock = 0x5000_41b0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2508,26 +2508,26 @@ impl ECAT0_CON { Self { _marker: PhantomData } } } -impl Deref for ECAT0_CON { +impl Deref for Ecat0Con { type Target = ecat0_con::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_CON { +impl core::fmt::Debug for Ecat0Con { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_CON").finish() + f.debug_struct("Ecat0Con").finish() } } #[doc = "EtherCAT 0 Control Register"] pub mod ecat0_con; #[doc = "EtherCAT 0"] -pub struct ECAT0 { +pub struct Ecat0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0 {} -impl ECAT0 { +unsafe impl Send for Ecat0 {} +impl Ecat0 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0::RegisterBlock = 0x5401_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2552,26 +2552,26 @@ impl ECAT0 { Self { _marker: PhantomData } } } -impl Deref for ECAT0 { +impl Deref for Ecat0 { type Target = ecat0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0 { +impl core::fmt::Debug for Ecat0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0").finish() + f.debug_struct("Ecat0").finish() } } #[doc = "EtherCAT 0"] pub mod ecat0; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU0 { +pub struct Ecat0Fmmu0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU0 {} -impl ECAT0_FMMU0 { +unsafe impl Send for Ecat0Fmmu0 {} +impl Ecat0Fmmu0 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2596,26 +2596,26 @@ impl ECAT0_FMMU0 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU0 { +impl Deref for Ecat0Fmmu0 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU0 { +impl core::fmt::Debug for Ecat0Fmmu0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU0").finish() + f.debug_struct("Ecat0Fmmu0").finish() } } #[doc = "EtherCAT 0"] pub mod ecat0_fmmu0; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU1 { +pub struct Ecat0Fmmu1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU1 {} -impl ECAT0_FMMU1 { +unsafe impl Send for Ecat0Fmmu1 {} +impl Ecat0Fmmu1 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0610 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2640,26 +2640,26 @@ impl ECAT0_FMMU1 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU1 { +impl Deref for Ecat0Fmmu1 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU1 { +impl core::fmt::Debug for Ecat0Fmmu1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU1").finish() + f.debug_struct("Ecat0Fmmu1").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu1; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU2 { +pub struct Ecat0Fmmu2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU2 {} -impl ECAT0_FMMU2 { +unsafe impl Send for Ecat0Fmmu2 {} +impl Ecat0Fmmu2 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0620 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2684,26 +2684,26 @@ impl ECAT0_FMMU2 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU2 { +impl Deref for Ecat0Fmmu2 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU2 { +impl core::fmt::Debug for Ecat0Fmmu2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU2").finish() + f.debug_struct("Ecat0Fmmu2").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu2; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU3 { +pub struct Ecat0Fmmu3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU3 {} -impl ECAT0_FMMU3 { +unsafe impl Send for Ecat0Fmmu3 {} +impl Ecat0Fmmu3 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0630 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2728,26 +2728,26 @@ impl ECAT0_FMMU3 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU3 { +impl Deref for Ecat0Fmmu3 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU3 { +impl core::fmt::Debug for Ecat0Fmmu3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU3").finish() + f.debug_struct("Ecat0Fmmu3").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu3; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU4 { +pub struct Ecat0Fmmu4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU4 {} -impl ECAT0_FMMU4 { +unsafe impl Send for Ecat0Fmmu4 {} +impl Ecat0Fmmu4 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0640 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2772,26 +2772,26 @@ impl ECAT0_FMMU4 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU4 { +impl Deref for Ecat0Fmmu4 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU4 { +impl core::fmt::Debug for Ecat0Fmmu4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU4").finish() + f.debug_struct("Ecat0Fmmu4").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu4; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU5 { +pub struct Ecat0Fmmu5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU5 {} -impl ECAT0_FMMU5 { +unsafe impl Send for Ecat0Fmmu5 {} +impl Ecat0Fmmu5 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0650 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2816,26 +2816,26 @@ impl ECAT0_FMMU5 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU5 { +impl Deref for Ecat0Fmmu5 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU5 { +impl core::fmt::Debug for Ecat0Fmmu5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU5").finish() + f.debug_struct("Ecat0Fmmu5").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu5; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU6 { +pub struct Ecat0Fmmu6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU6 {} -impl ECAT0_FMMU6 { +unsafe impl Send for Ecat0Fmmu6 {} +impl Ecat0Fmmu6 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0660 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2860,26 +2860,26 @@ impl ECAT0_FMMU6 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU6 { +impl Deref for Ecat0Fmmu6 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU6 { +impl core::fmt::Debug for Ecat0Fmmu6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU6").finish() + f.debug_struct("Ecat0Fmmu6").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu6; #[doc = "EtherCAT 0"] -pub struct ECAT0_FMMU7 { +pub struct Ecat0Fmmu7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_FMMU7 {} -impl ECAT0_FMMU7 { +unsafe impl Send for Ecat0Fmmu7 {} +impl Ecat0Fmmu7 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_fmmu0::RegisterBlock = 0x5401_0670 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2904,26 +2904,26 @@ impl ECAT0_FMMU7 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_FMMU7 { +impl Deref for Ecat0Fmmu7 { type Target = ecat0_fmmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_FMMU7 { +impl core::fmt::Debug for Ecat0Fmmu7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_FMMU7").finish() + f.debug_struct("Ecat0Fmmu7").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_fmmu0 as ecat0_fmmu7; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM0 { +pub struct Ecat0Sm0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM0 {} -impl ECAT0_SM0 { +unsafe impl Send for Ecat0Sm0 {} +impl Ecat0Sm0 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2948,26 +2948,26 @@ impl ECAT0_SM0 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM0 { +impl Deref for Ecat0Sm0 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM0 { +impl core::fmt::Debug for Ecat0Sm0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM0").finish() + f.debug_struct("Ecat0Sm0").finish() } } #[doc = "EtherCAT 0"] pub mod ecat0_sm0; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM1 { +pub struct Ecat0Sm1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM1 {} -impl ECAT0_SM1 { +unsafe impl Send for Ecat0Sm1 {} +impl Ecat0Sm1 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0808 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2992,26 +2992,26 @@ impl ECAT0_SM1 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM1 { +impl Deref for Ecat0Sm1 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM1 { +impl core::fmt::Debug for Ecat0Sm1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM1").finish() + f.debug_struct("Ecat0Sm1").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm1; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM2 { +pub struct Ecat0Sm2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM2 {} -impl ECAT0_SM2 { +unsafe impl Send for Ecat0Sm2 {} +impl Ecat0Sm2 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0810 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3036,26 +3036,26 @@ impl ECAT0_SM2 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM2 { +impl Deref for Ecat0Sm2 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM2 { +impl core::fmt::Debug for Ecat0Sm2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM2").finish() + f.debug_struct("Ecat0Sm2").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm2; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM3 { +pub struct Ecat0Sm3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM3 {} -impl ECAT0_SM3 { +unsafe impl Send for Ecat0Sm3 {} +impl Ecat0Sm3 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0818 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3080,26 +3080,26 @@ impl ECAT0_SM3 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM3 { +impl Deref for Ecat0Sm3 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM3 { +impl core::fmt::Debug for Ecat0Sm3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM3").finish() + f.debug_struct("Ecat0Sm3").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm3; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM4 { +pub struct Ecat0Sm4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM4 {} -impl ECAT0_SM4 { +unsafe impl Send for Ecat0Sm4 {} +impl Ecat0Sm4 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0820 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3124,26 +3124,26 @@ impl ECAT0_SM4 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM4 { +impl Deref for Ecat0Sm4 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM4 { +impl core::fmt::Debug for Ecat0Sm4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM4").finish() + f.debug_struct("Ecat0Sm4").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm4; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM5 { +pub struct Ecat0Sm5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM5 {} -impl ECAT0_SM5 { +unsafe impl Send for Ecat0Sm5 {} +impl Ecat0Sm5 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0828 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3168,26 +3168,26 @@ impl ECAT0_SM5 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM5 { +impl Deref for Ecat0Sm5 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM5 { +impl core::fmt::Debug for Ecat0Sm5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM5").finish() + f.debug_struct("Ecat0Sm5").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm5; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM6 { +pub struct Ecat0Sm6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM6 {} -impl ECAT0_SM6 { +unsafe impl Send for Ecat0Sm6 {} +impl Ecat0Sm6 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0830 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3212,26 +3212,26 @@ impl ECAT0_SM6 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM6 { +impl Deref for Ecat0Sm6 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM6 { +impl core::fmt::Debug for Ecat0Sm6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM6").finish() + f.debug_struct("Ecat0Sm6").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm6; #[doc = "EtherCAT 0"] -pub struct ECAT0_SM7 { +pub struct Ecat0Sm7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for ECAT0_SM7 {} -impl ECAT0_SM7 { +unsafe impl Send for Ecat0Sm7 {} +impl Ecat0Sm7 { #[doc = r"Pointer to the register block"] pub const PTR: *const ecat0_sm0::RegisterBlock = 0x5401_0838 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3256,26 +3256,26 @@ impl ECAT0_SM7 { Self { _marker: PhantomData } } } -impl Deref for ECAT0_SM7 { +impl Deref for Ecat0Sm7 { type Target = ecat0_sm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ECAT0_SM7 { +impl core::fmt::Debug for Ecat0Sm7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ECAT0_SM7").finish() + f.debug_struct("Ecat0Sm7").finish() } } #[doc = "EtherCAT 0"] pub use self::ecat0_sm0 as ecat0_sm7; #[doc = "Universal Serial Bus"] -pub struct USB0 { +pub struct Usb0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0 {} -impl USB0 { +unsafe impl Send for Usb0 {} +impl Usb0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0::RegisterBlock = 0x5004_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3300,26 +3300,26 @@ impl USB0 { Self { _marker: PhantomData } } } -impl Deref for USB0 { +impl Deref for Usb0 { type Target = usb0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0 { +impl core::fmt::Debug for Usb0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0").finish() + f.debug_struct("Usb0").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0; #[doc = "Universal Serial Bus"] -pub struct USB0_EP0 { +pub struct Usb0Ep0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP0 {} -impl USB0_EP0 { +unsafe impl Send for Usb0Ep0 {} +impl Usb0Ep0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep0::RegisterBlock = 0x5004_0900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3344,26 +3344,26 @@ impl USB0_EP0 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP0 { +impl Deref for Usb0Ep0 { type Target = usb0_ep0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP0 { +impl core::fmt::Debug for Usb0Ep0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP0").finish() + f.debug_struct("Usb0Ep0").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0_ep0; #[doc = "Universal Serial Bus"] -pub struct USB0_EP1 { +pub struct Usb0Ep1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP1 {} -impl USB0_EP1 { +unsafe impl Send for Usb0Ep1 {} +impl Usb0Ep1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0920 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3388,26 +3388,26 @@ impl USB0_EP1 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP1 { +impl Deref for Usb0Ep1 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP1 { +impl core::fmt::Debug for Usb0Ep1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP1").finish() + f.debug_struct("Usb0Ep1").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0_ep1; #[doc = "Universal Serial Bus"] -pub struct USB0_EP2 { +pub struct Usb0Ep2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP2 {} -impl USB0_EP2 { +unsafe impl Send for Usb0Ep2 {} +impl Usb0Ep2 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0940 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3432,26 +3432,26 @@ impl USB0_EP2 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP2 { +impl Deref for Usb0Ep2 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP2 { +impl core::fmt::Debug for Usb0Ep2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP2").finish() + f.debug_struct("Usb0Ep2").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep2; #[doc = "Universal Serial Bus"] -pub struct USB0_EP3 { +pub struct Usb0Ep3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP3 {} -impl USB0_EP3 { +unsafe impl Send for Usb0Ep3 {} +impl Usb0Ep3 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0960 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3476,26 +3476,26 @@ impl USB0_EP3 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP3 { +impl Deref for Usb0Ep3 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP3 { +impl core::fmt::Debug for Usb0Ep3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP3").finish() + f.debug_struct("Usb0Ep3").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep3; #[doc = "Universal Serial Bus"] -pub struct USB0_EP4 { +pub struct Usb0Ep4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP4 {} -impl USB0_EP4 { +unsafe impl Send for Usb0Ep4 {} +impl Usb0Ep4 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0980 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3520,26 +3520,26 @@ impl USB0_EP4 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP4 { +impl Deref for Usb0Ep4 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP4 { +impl core::fmt::Debug for Usb0Ep4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP4").finish() + f.debug_struct("Usb0Ep4").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep4; #[doc = "Universal Serial Bus"] -pub struct USB0_EP5 { +pub struct Usb0Ep5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP5 {} -impl USB0_EP5 { +unsafe impl Send for Usb0Ep5 {} +impl Usb0Ep5 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_09a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3564,26 +3564,26 @@ impl USB0_EP5 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP5 { +impl Deref for Usb0Ep5 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP5 { +impl core::fmt::Debug for Usb0Ep5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP5").finish() + f.debug_struct("Usb0Ep5").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep5; #[doc = "Universal Serial Bus"] -pub struct USB0_EP6 { +pub struct Usb0Ep6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_EP6 {} -impl USB0_EP6 { +unsafe impl Send for Usb0Ep6 {} +impl Usb0Ep6 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_09c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3608,26 +3608,26 @@ impl USB0_EP6 { Self { _marker: PhantomData } } } -impl Deref for USB0_EP6 { +impl Deref for Usb0Ep6 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_EP6 { +impl core::fmt::Debug for Usb0Ep6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_EP6").finish() + f.debug_struct("Usb0Ep6").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep6; #[doc = "Universal Serial Bus"] -pub struct USB0_CH0 { +pub struct Usb0Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH0 {} -impl USB0_CH0 { +unsafe impl Send for Usb0Ch0 {} +impl Usb0Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0500 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3652,26 +3652,26 @@ impl USB0_CH0 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH0 { +impl Deref for Usb0Ch0 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH0 { +impl core::fmt::Debug for Usb0Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH0").finish() + f.debug_struct("Usb0Ch0").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0_ch0; #[doc = "Universal Serial Bus"] -pub struct USB0_CH1 { +pub struct Usb0Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH1 {} -impl USB0_CH1 { +unsafe impl Send for Usb0Ch1 {} +impl Usb0Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0520 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3696,26 +3696,26 @@ impl USB0_CH1 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH1 { +impl Deref for Usb0Ch1 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH1 { +impl core::fmt::Debug for Usb0Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH1").finish() + f.debug_struct("Usb0Ch1").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch1; #[doc = "Universal Serial Bus"] -pub struct USB0_CH2 { +pub struct Usb0Ch2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH2 {} -impl USB0_CH2 { +unsafe impl Send for Usb0Ch2 {} +impl Usb0Ch2 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0540 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3740,26 +3740,26 @@ impl USB0_CH2 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH2 { +impl Deref for Usb0Ch2 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH2 { +impl core::fmt::Debug for Usb0Ch2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH2").finish() + f.debug_struct("Usb0Ch2").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch2; #[doc = "Universal Serial Bus"] -pub struct USB0_CH3 { +pub struct Usb0Ch3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH3 {} -impl USB0_CH3 { +unsafe impl Send for Usb0Ch3 {} +impl Usb0Ch3 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0560 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3784,26 +3784,26 @@ impl USB0_CH3 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH3 { +impl Deref for Usb0Ch3 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH3 { +impl core::fmt::Debug for Usb0Ch3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH3").finish() + f.debug_struct("Usb0Ch3").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch3; #[doc = "Universal Serial Bus"] -pub struct USB0_CH4 { +pub struct Usb0Ch4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH4 {} -impl USB0_CH4 { +unsafe impl Send for Usb0Ch4 {} +impl Usb0Ch4 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0580 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3828,26 +3828,26 @@ impl USB0_CH4 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH4 { +impl Deref for Usb0Ch4 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH4 { +impl core::fmt::Debug for Usb0Ch4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH4").finish() + f.debug_struct("Usb0Ch4").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch4; #[doc = "Universal Serial Bus"] -pub struct USB0_CH5 { +pub struct Usb0Ch5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH5 {} -impl USB0_CH5 { +unsafe impl Send for Usb0Ch5 {} +impl Usb0Ch5 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_05a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3872,26 +3872,26 @@ impl USB0_CH5 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH5 { +impl Deref for Usb0Ch5 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH5 { +impl core::fmt::Debug for Usb0Ch5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH5").finish() + f.debug_struct("Usb0Ch5").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch5; #[doc = "Universal Serial Bus"] -pub struct USB0_CH6 { +pub struct Usb0Ch6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH6 {} -impl USB0_CH6 { +unsafe impl Send for Usb0Ch6 {} +impl Usb0Ch6 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_05c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3916,26 +3916,26 @@ impl USB0_CH6 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH6 { +impl Deref for Usb0Ch6 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH6 { +impl core::fmt::Debug for Usb0Ch6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH6").finish() + f.debug_struct("Usb0Ch6").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch6; #[doc = "Universal Serial Bus"] -pub struct USB0_CH7 { +pub struct Usb0Ch7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH7 {} -impl USB0_CH7 { +unsafe impl Send for Usb0Ch7 {} +impl Usb0Ch7 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_05e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3960,26 +3960,26 @@ impl USB0_CH7 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH7 { +impl Deref for Usb0Ch7 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH7 { +impl core::fmt::Debug for Usb0Ch7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH7").finish() + f.debug_struct("Usb0Ch7").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch7; #[doc = "Universal Serial Bus"] -pub struct USB0_CH8 { +pub struct Usb0Ch8 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH8 {} -impl USB0_CH8 { +unsafe impl Send for Usb0Ch8 {} +impl Usb0Ch8 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4004,26 +4004,26 @@ impl USB0_CH8 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH8 { +impl Deref for Usb0Ch8 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH8 { +impl core::fmt::Debug for Usb0Ch8 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH8").finish() + f.debug_struct("Usb0Ch8").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch8; #[doc = "Universal Serial Bus"] -pub struct USB0_CH9 { +pub struct Usb0Ch9 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH9 {} -impl USB0_CH9 { +unsafe impl Send for Usb0Ch9 {} +impl Usb0Ch9 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0620 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4048,26 +4048,26 @@ impl USB0_CH9 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH9 { +impl Deref for Usb0Ch9 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH9 { +impl core::fmt::Debug for Usb0Ch9 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH9").finish() + f.debug_struct("Usb0Ch9").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch9; #[doc = "Universal Serial Bus"] -pub struct USB0_CH10 { +pub struct Usb0Ch10 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH10 {} -impl USB0_CH10 { +unsafe impl Send for Usb0Ch10 {} +impl Usb0Ch10 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0640 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4092,26 +4092,26 @@ impl USB0_CH10 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH10 { +impl Deref for Usb0Ch10 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH10 { +impl core::fmt::Debug for Usb0Ch10 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH10").finish() + f.debug_struct("Usb0Ch10").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch10; #[doc = "Universal Serial Bus"] -pub struct USB0_CH11 { +pub struct Usb0Ch11 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH11 {} -impl USB0_CH11 { +unsafe impl Send for Usb0Ch11 {} +impl Usb0Ch11 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0660 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4136,26 +4136,26 @@ impl USB0_CH11 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH11 { +impl Deref for Usb0Ch11 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH11 { +impl core::fmt::Debug for Usb0Ch11 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH11").finish() + f.debug_struct("Usb0Ch11").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch11; #[doc = "Universal Serial Bus"] -pub struct USB0_CH12 { +pub struct Usb0Ch12 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH12 {} -impl USB0_CH12 { +unsafe impl Send for Usb0Ch12 {} +impl Usb0Ch12 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_0680 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4180,26 +4180,26 @@ impl USB0_CH12 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH12 { +impl Deref for Usb0Ch12 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH12 { +impl core::fmt::Debug for Usb0Ch12 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH12").finish() + f.debug_struct("Usb0Ch12").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch12; #[doc = "Universal Serial Bus"] -pub struct USB0_CH13 { +pub struct Usb0Ch13 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USB0_CH13 {} -impl USB0_CH13 { +unsafe impl Send for Usb0Ch13 {} +impl Usb0Ch13 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ch0::RegisterBlock = 0x5004_06a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4224,26 +4224,26 @@ impl USB0_CH13 { Self { _marker: PhantomData } } } -impl Deref for USB0_CH13 { +impl Deref for Usb0Ch13 { type Target = usb0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USB0_CH13 { +impl core::fmt::Debug for Usb0Ch13 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USB0_CH13").finish() + f.debug_struct("Usb0Ch13").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ch0 as usb0_ch13; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC0 { +pub struct Usic0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC0 {} -impl USIC0 { +unsafe impl Send for Usic0 {} +impl Usic0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0::RegisterBlock = 0x4003_0008 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4268,26 +4268,26 @@ impl USIC0 { Self { _marker: PhantomData } } } -impl Deref for USIC0 { +impl Deref for Usic0 { type Target = usic0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC0 { +impl core::fmt::Debug for Usic0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC0").finish() + f.debug_struct("Usic0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub mod usic0; #[doc = "Universal Serial Interface Controller 1"] -pub struct USIC1 { +pub struct Usic1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC1 {} -impl USIC1 { +unsafe impl Send for Usic1 {} +impl Usic1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0::RegisterBlock = 0x4802_0008 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4312,26 +4312,26 @@ impl USIC1 { Self { _marker: PhantomData } } } -impl Deref for USIC1 { +impl Deref for Usic1 { type Target = usic0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC1 { +impl core::fmt::Debug for Usic1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC1").finish() + f.debug_struct("Usic1").finish() } } #[doc = "Universal Serial Interface Controller 1"] pub use self::usic0 as usic1; #[doc = "Universal Serial Interface Controller 2"] -pub struct USIC2 { +pub struct Usic2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC2 {} -impl USIC2 { +unsafe impl Send for Usic2 {} +impl Usic2 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0::RegisterBlock = 0x4802_4008 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4356,26 +4356,26 @@ impl USIC2 { Self { _marker: PhantomData } } } -impl Deref for USIC2 { +impl Deref for Usic2 { type Target = usic0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC2 { +impl core::fmt::Debug for Usic2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC2").finish() + f.debug_struct("Usic2").finish() } } #[doc = "Universal Serial Interface Controller 2"] pub use self::usic0 as usic2; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC0_CH0 { +pub struct Usic0Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC0_CH0 {} -impl USIC0_CH0 { +unsafe impl Send for Usic0Ch0 {} +impl Usic0Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4003_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4400,26 +4400,26 @@ impl USIC0_CH0 { Self { _marker: PhantomData } } } -impl Deref for USIC0_CH0 { +impl Deref for Usic0Ch0 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC0_CH0 { +impl core::fmt::Debug for Usic0Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC0_CH0").finish() + f.debug_struct("Usic0Ch0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub mod usic0_ch0; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC0_CH1 { +pub struct Usic0Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC0_CH1 {} -impl USIC0_CH1 { +unsafe impl Send for Usic0Ch1 {} +impl Usic0Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4003_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4444,26 +4444,26 @@ impl USIC0_CH1 { Self { _marker: PhantomData } } } -impl Deref for USIC0_CH1 { +impl Deref for Usic0Ch1 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC0_CH1 { +impl core::fmt::Debug for Usic0Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC0_CH1").finish() + f.debug_struct("Usic0Ch1").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic0_ch1; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC1_CH0 { +pub struct Usic1Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC1_CH0 {} -impl USIC1_CH0 { +unsafe impl Send for Usic1Ch0 {} +impl Usic1Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4488,26 +4488,26 @@ impl USIC1_CH0 { Self { _marker: PhantomData } } } -impl Deref for USIC1_CH0 { +impl Deref for Usic1Ch0 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC1_CH0 { +impl core::fmt::Debug for Usic1Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC1_CH0").finish() + f.debug_struct("Usic1Ch0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic1_ch0; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC1_CH1 { +pub struct Usic1Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC1_CH1 {} -impl USIC1_CH1 { +unsafe impl Send for Usic1Ch1 {} +impl Usic1Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4532,26 +4532,26 @@ impl USIC1_CH1 { Self { _marker: PhantomData } } } -impl Deref for USIC1_CH1 { +impl Deref for Usic1Ch1 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC1_CH1 { +impl core::fmt::Debug for Usic1Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC1_CH1").finish() + f.debug_struct("Usic1Ch1").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic1_ch1; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC2_CH0 { +pub struct Usic2Ch0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC2_CH0 {} -impl USIC2_CH0 { +unsafe impl Send for Usic2Ch0 {} +impl Usic2Ch0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4576,26 +4576,26 @@ impl USIC2_CH0 { Self { _marker: PhantomData } } } -impl Deref for USIC2_CH0 { +impl Deref for Usic2Ch0 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC2_CH0 { +impl core::fmt::Debug for Usic2Ch0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC2_CH0").finish() + f.debug_struct("Usic2Ch0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic2_ch0; #[doc = "Universal Serial Interface Controller 0"] -pub struct USIC2_CH1 { +pub struct Usic2Ch1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for USIC2_CH1 {} -impl USIC2_CH1 { +unsafe impl Send for Usic2Ch1 {} +impl Usic2Ch1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4620,26 +4620,26 @@ impl USIC2_CH1 { Self { _marker: PhantomData } } } -impl Deref for USIC2_CH1 { +impl Deref for Usic2Ch1 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for USIC2_CH1 { +impl core::fmt::Debug for Usic2Ch1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("USIC2_CH1").finish() + f.debug_struct("Usic2Ch1").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic2_ch1; #[doc = "Controller Area Networks"] -pub struct CAN { +pub struct Can { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN {} -impl CAN { +unsafe impl Send for Can {} +impl Can { #[doc = r"Pointer to the register block"] pub const PTR: *const can::RegisterBlock = 0x4801_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4664,26 +4664,26 @@ impl CAN { Self { _marker: PhantomData } } } -impl Deref for CAN { +impl Deref for Can { type Target = can::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN { +impl core::fmt::Debug for Can { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN").finish() + f.debug_struct("Can").finish() } } #[doc = "Controller Area Networks"] pub mod can; #[doc = "Controller Area Networks"] -pub struct CAN_NODE0 { +pub struct CanNode0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE0 {} -impl CAN_NODE0 { +unsafe impl Send for CanNode0 {} +impl CanNode0 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4708,26 +4708,26 @@ impl CAN_NODE0 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE0 { +impl Deref for CanNode0 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE0 { +impl core::fmt::Debug for CanNode0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE0").finish() + f.debug_struct("CanNode0").finish() } } #[doc = "Controller Area Networks"] pub mod can_node0; #[doc = "Controller Area Networks"] -pub struct CAN_NODE1 { +pub struct CanNode1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE1 {} -impl CAN_NODE1 { +unsafe impl Send for CanNode1 {} +impl CanNode1 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4752,26 +4752,26 @@ impl CAN_NODE1 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE1 { +impl Deref for CanNode1 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE1 { +impl core::fmt::Debug for CanNode1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE1").finish() + f.debug_struct("CanNode1").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node1; #[doc = "Controller Area Networks"] -pub struct CAN_NODE2 { +pub struct CanNode2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE2 {} -impl CAN_NODE2 { +unsafe impl Send for CanNode2 {} +impl CanNode2 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4796,26 +4796,26 @@ impl CAN_NODE2 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE2 { +impl Deref for CanNode2 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE2 { +impl core::fmt::Debug for CanNode2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE2").finish() + f.debug_struct("CanNode2").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node2; #[doc = "Controller Area Networks"] -pub struct CAN_NODE3 { +pub struct CanNode3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE3 {} -impl CAN_NODE3 { +unsafe impl Send for CanNode3 {} +impl CanNode3 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4500 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4840,26 +4840,26 @@ impl CAN_NODE3 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE3 { +impl Deref for CanNode3 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE3 { +impl core::fmt::Debug for CanNode3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE3").finish() + f.debug_struct("CanNode3").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node3; #[doc = "Controller Area Networks"] -pub struct CAN_NODE4 { +pub struct CanNode4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE4 {} -impl CAN_NODE4 { +unsafe impl Send for CanNode4 {} +impl CanNode4 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4884,26 +4884,26 @@ impl CAN_NODE4 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE4 { +impl Deref for CanNode4 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE4 { +impl core::fmt::Debug for CanNode4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE4").finish() + f.debug_struct("CanNode4").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node4; #[doc = "Controller Area Networks"] -pub struct CAN_NODE5 { +pub struct CanNode5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_NODE5 {} -impl CAN_NODE5 { +unsafe impl Send for CanNode5 {} +impl CanNode5 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4700 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4928,26 +4928,26 @@ impl CAN_NODE5 { Self { _marker: PhantomData } } } -impl Deref for CAN_NODE5 { +impl Deref for CanNode5 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_NODE5 { +impl core::fmt::Debug for CanNode5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_NODE5").finish() + f.debug_struct("CanNode5").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node5; #[doc = "Controller Area Networks"] -pub struct CAN_MO { +pub struct CanMo { _marker: PhantomData<*const ()>, } -unsafe impl Send for CAN_MO {} -impl CAN_MO { +unsafe impl Send for CanMo {} +impl CanMo { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo::RegisterBlock = 0x4801_5000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4972,26 +4972,26 @@ impl CAN_MO { Self { _marker: PhantomData } } } -impl Deref for CAN_MO { +impl Deref for CanMo { type Target = can_mo::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CAN_MO { +impl core::fmt::Debug for CanMo { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CAN_MO").finish() + f.debug_struct("CanMo").finish() } } #[doc = "Controller Area Networks"] pub mod can_mo; #[doc = "Analog to Digital Converter"] -pub struct VADC { +pub struct Vadc { _marker: PhantomData<*const ()>, } -unsafe impl Send for VADC {} -impl VADC { +unsafe impl Send for Vadc {} +impl Vadc { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc::RegisterBlock = 0x4000_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5016,26 +5016,26 @@ impl VADC { Self { _marker: PhantomData } } } -impl Deref for VADC { +impl Deref for Vadc { type Target = vadc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VADC { +impl core::fmt::Debug for Vadc { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VADC").finish() + f.debug_struct("Vadc").finish() } } #[doc = "Analog to Digital Converter"] pub mod vadc; #[doc = "Analog to Digital Converter"] -pub struct VADC_G0 { +pub struct VadcG0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VADC_G0 {} -impl VADC_G0 { +unsafe impl Send for VadcG0 {} +impl VadcG0 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5060,26 +5060,26 @@ impl VADC_G0 { Self { _marker: PhantomData } } } -impl Deref for VADC_G0 { +impl Deref for VadcG0 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VADC_G0 { +impl core::fmt::Debug for VadcG0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VADC_G0").finish() + f.debug_struct("VadcG0").finish() } } #[doc = "Analog to Digital Converter"] pub mod vadc_g0; #[doc = "Analog to Digital Converter"] -pub struct VADC_G1 { +pub struct VadcG1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VADC_G1 {} -impl VADC_G1 { +unsafe impl Send for VadcG1 {} +impl VadcG1 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_4800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5104,26 +5104,26 @@ impl VADC_G1 { Self { _marker: PhantomData } } } -impl Deref for VADC_G1 { +impl Deref for VadcG1 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VADC_G1 { +impl core::fmt::Debug for VadcG1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VADC_G1").finish() + f.debug_struct("VadcG1").finish() } } #[doc = "Analog to Digital Converter"] pub use self::vadc_g0 as vadc_g1; #[doc = "Analog to Digital Converter"] -pub struct VADC_G2 { +pub struct VadcG2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VADC_G2 {} -impl VADC_G2 { +unsafe impl Send for VadcG2 {} +impl VadcG2 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_4c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5148,26 +5148,26 @@ impl VADC_G2 { Self { _marker: PhantomData } } } -impl Deref for VADC_G2 { +impl Deref for VadcG2 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VADC_G2 { +impl core::fmt::Debug for VadcG2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VADC_G2").finish() + f.debug_struct("VadcG2").finish() } } #[doc = "Analog to Digital Converter"] pub use self::vadc_g0 as vadc_g2; #[doc = "Analog to Digital Converter"] -pub struct VADC_G3 { +pub struct VadcG3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VADC_G3 {} -impl VADC_G3 { +unsafe impl Send for VadcG3 {} +impl VadcG3 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_5000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5192,26 +5192,26 @@ impl VADC_G3 { Self { _marker: PhantomData } } } -impl Deref for VADC_G3 { +impl Deref for VadcG3 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VADC_G3 { +impl core::fmt::Debug for VadcG3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VADC_G3").finish() + f.debug_struct("VadcG3").finish() } } #[doc = "Analog to Digital Converter"] pub use self::vadc_g0 as vadc_g3; #[doc = "Delta Sigma Demodulator"] -pub struct DSD { +pub struct Dsd { _marker: PhantomData<*const ()>, } -unsafe impl Send for DSD {} -impl DSD { +unsafe impl Send for Dsd {} +impl Dsd { #[doc = r"Pointer to the register block"] pub const PTR: *const dsd::RegisterBlock = 0x4000_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5236,26 +5236,26 @@ impl DSD { Self { _marker: PhantomData } } } -impl Deref for DSD { +impl Deref for Dsd { type Target = dsd::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DSD { +impl core::fmt::Debug for Dsd { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DSD").finish() + f.debug_struct("Dsd").finish() } } #[doc = "Delta Sigma Demodulator"] pub mod dsd; #[doc = "Delta Sigma Demodulator"] -pub struct DSD_CH0 { +pub struct DsdCh0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DSD_CH0 {} -impl DSD_CH0 { +unsafe impl Send for DsdCh0 {} +impl DsdCh0 { #[doc = r"Pointer to the register block"] pub const PTR: *const dsd_ch0::RegisterBlock = 0x4000_8100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5280,26 +5280,26 @@ impl DSD_CH0 { Self { _marker: PhantomData } } } -impl Deref for DSD_CH0 { +impl Deref for DsdCh0 { type Target = dsd_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DSD_CH0 { +impl core::fmt::Debug for DsdCh0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DSD_CH0").finish() + f.debug_struct("DsdCh0").finish() } } #[doc = "Delta Sigma Demodulator"] pub mod dsd_ch0; #[doc = "Delta Sigma Demodulator"] -pub struct DSD_CH1 { +pub struct DsdCh1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DSD_CH1 {} -impl DSD_CH1 { +unsafe impl Send for DsdCh1 {} +impl DsdCh1 { #[doc = r"Pointer to the register block"] pub const PTR: *const dsd_ch0::RegisterBlock = 0x4000_8200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5324,26 +5324,26 @@ impl DSD_CH1 { Self { _marker: PhantomData } } } -impl Deref for DSD_CH1 { +impl Deref for DsdCh1 { type Target = dsd_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DSD_CH1 { +impl core::fmt::Debug for DsdCh1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DSD_CH1").finish() + f.debug_struct("DsdCh1").finish() } } #[doc = "Delta Sigma Demodulator"] pub use self::dsd_ch0 as dsd_ch1; #[doc = "Delta Sigma Demodulator"] -pub struct DSD_CH2 { +pub struct DsdCh2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DSD_CH2 {} -impl DSD_CH2 { +unsafe impl Send for DsdCh2 {} +impl DsdCh2 { #[doc = r"Pointer to the register block"] pub const PTR: *const dsd_ch0::RegisterBlock = 0x4000_8300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5368,26 +5368,26 @@ impl DSD_CH2 { Self { _marker: PhantomData } } } -impl Deref for DSD_CH2 { +impl Deref for DsdCh2 { type Target = dsd_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DSD_CH2 { +impl core::fmt::Debug for DsdCh2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DSD_CH2").finish() + f.debug_struct("DsdCh2").finish() } } #[doc = "Delta Sigma Demodulator"] pub use self::dsd_ch0 as dsd_ch2; #[doc = "Delta Sigma Demodulator"] -pub struct DSD_CH3 { +pub struct DsdCh3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for DSD_CH3 {} -impl DSD_CH3 { +unsafe impl Send for DsdCh3 {} +impl DsdCh3 { #[doc = r"Pointer to the register block"] pub const PTR: *const dsd_ch0::RegisterBlock = 0x4000_8400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5412,26 +5412,26 @@ impl DSD_CH3 { Self { _marker: PhantomData } } } -impl Deref for DSD_CH3 { +impl Deref for DsdCh3 { type Target = dsd_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DSD_CH3 { +impl core::fmt::Debug for DsdCh3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DSD_CH3").finish() + f.debug_struct("DsdCh3").finish() } } #[doc = "Delta Sigma Demodulator"] pub use self::dsd_ch0 as dsd_ch3; #[doc = "Digital to Analog Converter"] -pub struct DAC { +pub struct Dac { _marker: PhantomData<*const ()>, } -unsafe impl Send for DAC {} -impl DAC { +unsafe impl Send for Dac {} +impl Dac { #[doc = r"Pointer to the register block"] pub const PTR: *const dac::RegisterBlock = 0x4801_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5456,26 +5456,26 @@ impl DAC { Self { _marker: PhantomData } } } -impl Deref for DAC { +impl Deref for Dac { type Target = dac::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for DAC { +impl core::fmt::Debug for Dac { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("DAC").finish() + f.debug_struct("Dac").finish() } } #[doc = "Digital to Analog Converter"] pub mod dac; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct CCU40 { +pub struct Ccu40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU40 {} -impl CCU40 { +unsafe impl Send for Ccu40 {} +impl Ccu40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4000_c000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5500,26 +5500,26 @@ impl CCU40 { Self { _marker: PhantomData } } } -impl Deref for CCU40 { +impl Deref for Ccu40 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU40 { +impl core::fmt::Debug for Ccu40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU40").finish() + f.debug_struct("Ccu40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub mod ccu40; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct CCU41 { +pub struct Ccu41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU41 {} -impl CCU41 { +unsafe impl Send for Ccu41 {} +impl Ccu41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4001_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5544,26 +5544,26 @@ impl CCU41 { Self { _marker: PhantomData } } } -impl Deref for CCU41 { +impl Deref for Ccu41 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU41 { +impl core::fmt::Debug for Ccu41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU41").finish() + f.debug_struct("Ccu41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40 as ccu41; #[doc = "Capture Compare Unit 4 - Unit 2"] -pub struct CCU42 { +pub struct Ccu42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU42 {} -impl CCU42 { +unsafe impl Send for Ccu42 {} +impl Ccu42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4001_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5588,26 +5588,26 @@ impl CCU42 { Self { _marker: PhantomData } } } -impl Deref for CCU42 { +impl Deref for Ccu42 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU42 { +impl core::fmt::Debug for Ccu42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU42").finish() + f.debug_struct("Ccu42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 2"] pub use self::ccu40 as ccu42; #[doc = "Capture Compare Unit 4 - Unit 3"] -pub struct CCU43 { +pub struct Ccu43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU43 {} -impl CCU43 { +unsafe impl Send for Ccu43 {} +impl Ccu43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4800_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5632,26 +5632,26 @@ impl CCU43 { Self { _marker: PhantomData } } } -impl Deref for CCU43 { +impl Deref for Ccu43 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU43 { +impl core::fmt::Debug for Ccu43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU43").finish() + f.debug_struct("Ccu43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 3"] pub use self::ccu40 as ccu43; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct CCU40_CC40 { +pub struct Ccu40Cc40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU40_CC40 {} -impl CCU40_CC40 { +unsafe impl Send for Ccu40Cc40 {} +impl Ccu40Cc40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5676,26 +5676,26 @@ impl CCU40_CC40 { Self { _marker: PhantomData } } } -impl Deref for CCU40_CC40 { +impl Deref for Ccu40Cc40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU40_CC40 { +impl core::fmt::Debug for Ccu40Cc40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU40_CC40").finish() + f.debug_struct("Ccu40Cc40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub mod ccu40_cc40; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct CCU40_CC41 { +pub struct Ccu40Cc41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU40_CC41 {} -impl CCU40_CC41 { +unsafe impl Send for Ccu40Cc41 {} +impl Ccu40Cc41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5720,26 +5720,26 @@ impl CCU40_CC41 { Self { _marker: PhantomData } } } -impl Deref for CCU40_CC41 { +impl Deref for Ccu40Cc41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU40_CC41 { +impl core::fmt::Debug for Ccu40Cc41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU40_CC41").finish() + f.debug_struct("Ccu40Cc41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc41; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct CCU40_CC42 { +pub struct Ccu40Cc42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU40_CC42 {} -impl CCU40_CC42 { +unsafe impl Send for Ccu40Cc42 {} +impl Ccu40Cc42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5764,26 +5764,26 @@ impl CCU40_CC42 { Self { _marker: PhantomData } } } -impl Deref for CCU40_CC42 { +impl Deref for Ccu40Cc42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU40_CC42 { +impl core::fmt::Debug for Ccu40Cc42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU40_CC42").finish() + f.debug_struct("Ccu40Cc42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc42; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct CCU40_CC43 { +pub struct Ccu40Cc43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU40_CC43 {} -impl CCU40_CC43 { +unsafe impl Send for Ccu40Cc43 {} +impl Ccu40Cc43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5808,26 +5808,26 @@ impl CCU40_CC43 { Self { _marker: PhantomData } } } -impl Deref for CCU40_CC43 { +impl Deref for Ccu40Cc43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU40_CC43 { +impl core::fmt::Debug for Ccu40Cc43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU40_CC43").finish() + f.debug_struct("Ccu40Cc43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc43; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct CCU41_CC40 { +pub struct Ccu41Cc40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU41_CC40 {} -impl CCU41_CC40 { +unsafe impl Send for Ccu41Cc40 {} +impl Ccu41Cc40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5852,26 +5852,26 @@ impl CCU41_CC40 { Self { _marker: PhantomData } } } -impl Deref for CCU41_CC40 { +impl Deref for Ccu41Cc40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU41_CC40 { +impl core::fmt::Debug for Ccu41Cc40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU41_CC40").finish() + f.debug_struct("Ccu41Cc40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc40; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct CCU41_CC41 { +pub struct Ccu41Cc41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU41_CC41 {} -impl CCU41_CC41 { +unsafe impl Send for Ccu41Cc41 {} +impl Ccu41Cc41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5896,26 +5896,26 @@ impl CCU41_CC41 { Self { _marker: PhantomData } } } -impl Deref for CCU41_CC41 { +impl Deref for Ccu41Cc41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU41_CC41 { +impl core::fmt::Debug for Ccu41Cc41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU41_CC41").finish() + f.debug_struct("Ccu41Cc41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc41; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct CCU41_CC42 { +pub struct Ccu41Cc42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU41_CC42 {} -impl CCU41_CC42 { +unsafe impl Send for Ccu41Cc42 {} +impl Ccu41Cc42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5940,26 +5940,26 @@ impl CCU41_CC42 { Self { _marker: PhantomData } } } -impl Deref for CCU41_CC42 { +impl Deref for Ccu41Cc42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU41_CC42 { +impl core::fmt::Debug for Ccu41Cc42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU41_CC42").finish() + f.debug_struct("Ccu41Cc42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc42; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct CCU41_CC43 { +pub struct Ccu41Cc43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU41_CC43 {} -impl CCU41_CC43 { +unsafe impl Send for Ccu41Cc43 {} +impl Ccu41Cc43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5984,26 +5984,26 @@ impl CCU41_CC43 { Self { _marker: PhantomData } } } -impl Deref for CCU41_CC43 { +impl Deref for Ccu41Cc43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU41_CC43 { +impl core::fmt::Debug for Ccu41Cc43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU41_CC43").finish() + f.debug_struct("Ccu41Cc43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc43; #[doc = "Capture Compare Unit 4 - Unit 2"] -pub struct CCU42_CC40 { +pub struct Ccu42Cc40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU42_CC40 {} -impl CCU42_CC40 { +unsafe impl Send for Ccu42Cc40 {} +impl Ccu42Cc40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_4100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6028,26 +6028,26 @@ impl CCU42_CC40 { Self { _marker: PhantomData } } } -impl Deref for CCU42_CC40 { +impl Deref for Ccu42Cc40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU42_CC40 { +impl core::fmt::Debug for Ccu42Cc40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU42_CC40").finish() + f.debug_struct("Ccu42Cc40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 2"] pub use self::ccu40_cc40 as ccu42_cc40; #[doc = "Capture Compare Unit 4 - Unit 2"] -pub struct CCU42_CC41 { +pub struct Ccu42Cc41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU42_CC41 {} -impl CCU42_CC41 { +unsafe impl Send for Ccu42Cc41 {} +impl Ccu42Cc41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6072,26 +6072,26 @@ impl CCU42_CC41 { Self { _marker: PhantomData } } } -impl Deref for CCU42_CC41 { +impl Deref for Ccu42Cc41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU42_CC41 { +impl core::fmt::Debug for Ccu42Cc41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU42_CC41").finish() + f.debug_struct("Ccu42Cc41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 2"] pub use self::ccu40_cc40 as ccu42_cc41; #[doc = "Capture Compare Unit 4 - Unit 2"] -pub struct CCU42_CC42 { +pub struct Ccu42Cc42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU42_CC42 {} -impl CCU42_CC42 { +unsafe impl Send for Ccu42Cc42 {} +impl Ccu42Cc42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6116,26 +6116,26 @@ impl CCU42_CC42 { Self { _marker: PhantomData } } } -impl Deref for CCU42_CC42 { +impl Deref for Ccu42Cc42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU42_CC42 { +impl core::fmt::Debug for Ccu42Cc42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU42_CC42").finish() + f.debug_struct("Ccu42Cc42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 2"] pub use self::ccu40_cc40 as ccu42_cc42; #[doc = "Capture Compare Unit 4 - Unit 2"] -pub struct CCU42_CC43 { +pub struct Ccu42Cc43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU42_CC43 {} -impl CCU42_CC43 { +unsafe impl Send for Ccu42Cc43 {} +impl Ccu42Cc43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6160,26 +6160,26 @@ impl CCU42_CC43 { Self { _marker: PhantomData } } } -impl Deref for CCU42_CC43 { +impl Deref for Ccu42Cc43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU42_CC43 { +impl core::fmt::Debug for Ccu42Cc43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU42_CC43").finish() + f.debug_struct("Ccu42Cc43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 2"] pub use self::ccu40_cc40 as ccu42_cc43; #[doc = "Capture Compare Unit 4 - Unit 3"] -pub struct CCU43_CC40 { +pub struct Ccu43Cc40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU43_CC40 {} -impl CCU43_CC40 { +unsafe impl Send for Ccu43Cc40 {} +impl Ccu43Cc40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4800_4100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6204,26 +6204,26 @@ impl CCU43_CC40 { Self { _marker: PhantomData } } } -impl Deref for CCU43_CC40 { +impl Deref for Ccu43Cc40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU43_CC40 { +impl core::fmt::Debug for Ccu43Cc40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU43_CC40").finish() + f.debug_struct("Ccu43Cc40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 3"] pub use self::ccu40_cc40 as ccu43_cc40; #[doc = "Capture Compare Unit 4 - Unit 3"] -pub struct CCU43_CC41 { +pub struct Ccu43Cc41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU43_CC41 {} -impl CCU43_CC41 { +unsafe impl Send for Ccu43Cc41 {} +impl Ccu43Cc41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4800_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6248,26 +6248,26 @@ impl CCU43_CC41 { Self { _marker: PhantomData } } } -impl Deref for CCU43_CC41 { +impl Deref for Ccu43Cc41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU43_CC41 { +impl core::fmt::Debug for Ccu43Cc41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU43_CC41").finish() + f.debug_struct("Ccu43Cc41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 3"] pub use self::ccu40_cc40 as ccu43_cc41; #[doc = "Capture Compare Unit 4 - Unit 3"] -pub struct CCU43_CC42 { +pub struct Ccu43Cc42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU43_CC42 {} -impl CCU43_CC42 { +unsafe impl Send for Ccu43Cc42 {} +impl Ccu43Cc42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4800_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6292,26 +6292,26 @@ impl CCU43_CC42 { Self { _marker: PhantomData } } } -impl Deref for CCU43_CC42 { +impl Deref for Ccu43Cc42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU43_CC42 { +impl core::fmt::Debug for Ccu43Cc42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU43_CC42").finish() + f.debug_struct("Ccu43Cc42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 3"] pub use self::ccu40_cc40 as ccu43_cc42; #[doc = "Capture Compare Unit 4 - Unit 3"] -pub struct CCU43_CC43 { +pub struct Ccu43Cc43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU43_CC43 {} -impl CCU43_CC43 { +unsafe impl Send for Ccu43Cc43 {} +impl Ccu43Cc43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4800_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6336,26 +6336,26 @@ impl CCU43_CC43 { Self { _marker: PhantomData } } } -impl Deref for CCU43_CC43 { +impl Deref for Ccu43Cc43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU43_CC43 { +impl core::fmt::Debug for Ccu43Cc43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU43_CC43").finish() + f.debug_struct("Ccu43Cc43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 3"] pub use self::ccu40_cc40 as ccu43_cc43; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct CCU80 { +pub struct Ccu80 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU80 {} -impl CCU80 { +unsafe impl Send for Ccu80 {} +impl Ccu80 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80::RegisterBlock = 0x4002_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6380,26 +6380,26 @@ impl CCU80 { Self { _marker: PhantomData } } } -impl Deref for CCU80 { +impl Deref for Ccu80 { type Target = ccu80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU80 { +impl core::fmt::Debug for Ccu80 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU80").finish() + f.debug_struct("Ccu80").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub mod ccu80; #[doc = "Capture Compare Unit 8 - Unit 1"] -pub struct CCU81 { +pub struct Ccu81 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU81 {} -impl CCU81 { +unsafe impl Send for Ccu81 {} +impl Ccu81 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80::RegisterBlock = 0x4002_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6424,26 +6424,26 @@ impl CCU81 { Self { _marker: PhantomData } } } -impl Deref for CCU81 { +impl Deref for Ccu81 { type Target = ccu80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU81 { +impl core::fmt::Debug for Ccu81 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU81").finish() + f.debug_struct("Ccu81").finish() } } #[doc = "Capture Compare Unit 8 - Unit 1"] pub use self::ccu80 as ccu81; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct CCU80_CC80 { +pub struct Ccu80Cc80 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU80_CC80 {} -impl CCU80_CC80 { +unsafe impl Send for Ccu80Cc80 {} +impl Ccu80Cc80 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6468,26 +6468,26 @@ impl CCU80_CC80 { Self { _marker: PhantomData } } } -impl Deref for CCU80_CC80 { +impl Deref for Ccu80Cc80 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU80_CC80 { +impl core::fmt::Debug for Ccu80Cc80 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU80_CC80").finish() + f.debug_struct("Ccu80Cc80").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub mod ccu80_cc80; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct CCU80_CC81 { +pub struct Ccu80Cc81 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU80_CC81 {} -impl CCU80_CC81 { +unsafe impl Send for Ccu80Cc81 {} +impl Ccu80Cc81 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6512,26 +6512,26 @@ impl CCU80_CC81 { Self { _marker: PhantomData } } } -impl Deref for CCU80_CC81 { +impl Deref for Ccu80Cc81 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU80_CC81 { +impl core::fmt::Debug for Ccu80Cc81 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU80_CC81").finish() + f.debug_struct("Ccu80Cc81").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc81; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct CCU80_CC82 { +pub struct Ccu80Cc82 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU80_CC82 {} -impl CCU80_CC82 { +unsafe impl Send for Ccu80Cc82 {} +impl Ccu80Cc82 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6556,26 +6556,26 @@ impl CCU80_CC82 { Self { _marker: PhantomData } } } -impl Deref for CCU80_CC82 { +impl Deref for Ccu80Cc82 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU80_CC82 { +impl core::fmt::Debug for Ccu80Cc82 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU80_CC82").finish() + f.debug_struct("Ccu80Cc82").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc82; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct CCU80_CC83 { +pub struct Ccu80Cc83 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU80_CC83 {} -impl CCU80_CC83 { +unsafe impl Send for Ccu80Cc83 {} +impl Ccu80Cc83 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6600,26 +6600,26 @@ impl CCU80_CC83 { Self { _marker: PhantomData } } } -impl Deref for CCU80_CC83 { +impl Deref for Ccu80Cc83 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU80_CC83 { +impl core::fmt::Debug for Ccu80Cc83 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU80_CC83").finish() + f.debug_struct("Ccu80Cc83").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc83; #[doc = "Capture Compare Unit 8 - Unit 1"] -pub struct CCU81_CC80 { +pub struct Ccu81Cc80 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU81_CC80 {} -impl CCU81_CC80 { +unsafe impl Send for Ccu81Cc80 {} +impl Ccu81Cc80 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_4100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6644,26 +6644,26 @@ impl CCU81_CC80 { Self { _marker: PhantomData } } } -impl Deref for CCU81_CC80 { +impl Deref for Ccu81Cc80 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU81_CC80 { +impl core::fmt::Debug for Ccu81Cc80 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU81_CC80").finish() + f.debug_struct("Ccu81Cc80").finish() } } #[doc = "Capture Compare Unit 8 - Unit 1"] pub use self::ccu80_cc80 as ccu81_cc80; #[doc = "Capture Compare Unit 8 - Unit 1"] -pub struct CCU81_CC81 { +pub struct Ccu81Cc81 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU81_CC81 {} -impl CCU81_CC81 { +unsafe impl Send for Ccu81Cc81 {} +impl Ccu81Cc81 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6688,26 +6688,26 @@ impl CCU81_CC81 { Self { _marker: PhantomData } } } -impl Deref for CCU81_CC81 { +impl Deref for Ccu81Cc81 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU81_CC81 { +impl core::fmt::Debug for Ccu81Cc81 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU81_CC81").finish() + f.debug_struct("Ccu81Cc81").finish() } } #[doc = "Capture Compare Unit 8 - Unit 1"] pub use self::ccu80_cc80 as ccu81_cc81; #[doc = "Capture Compare Unit 8 - Unit 1"] -pub struct CCU81_CC82 { +pub struct Ccu81Cc82 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU81_CC82 {} -impl CCU81_CC82 { +unsafe impl Send for Ccu81Cc82 {} +impl Ccu81Cc82 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6732,26 +6732,26 @@ impl CCU81_CC82 { Self { _marker: PhantomData } } } -impl Deref for CCU81_CC82 { +impl Deref for Ccu81Cc82 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU81_CC82 { +impl core::fmt::Debug for Ccu81Cc82 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU81_CC82").finish() + f.debug_struct("Ccu81Cc82").finish() } } #[doc = "Capture Compare Unit 8 - Unit 1"] pub use self::ccu80_cc80 as ccu81_cc82; #[doc = "Capture Compare Unit 8 - Unit 1"] -pub struct CCU81_CC83 { +pub struct Ccu81Cc83 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CCU81_CC83 {} -impl CCU81_CC83 { +unsafe impl Send for Ccu81Cc83 {} +impl Ccu81Cc83 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6776,26 +6776,26 @@ impl CCU81_CC83 { Self { _marker: PhantomData } } } -impl Deref for CCU81_CC83 { +impl Deref for Ccu81Cc83 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CCU81_CC83 { +impl core::fmt::Debug for Ccu81Cc83 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CCU81_CC83").finish() + f.debug_struct("Ccu81Cc83").finish() } } #[doc = "Capture Compare Unit 8 - Unit 1"] pub use self::ccu80_cc80 as ccu81_cc83; #[doc = "Position Interface 0"] -pub struct POSIF0 { +pub struct Posif0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for POSIF0 {} -impl POSIF0 { +unsafe impl Send for Posif0 {} +impl Posif0 { #[doc = r"Pointer to the register block"] pub const PTR: *const posif0::RegisterBlock = 0x4002_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6820,26 +6820,26 @@ impl POSIF0 { Self { _marker: PhantomData } } } -impl Deref for POSIF0 { +impl Deref for Posif0 { type Target = posif0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for POSIF0 { +impl core::fmt::Debug for Posif0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("POSIF0").finish() + f.debug_struct("Posif0").finish() } } #[doc = "Position Interface 0"] pub mod posif0; #[doc = "Position Interface 1"] -pub struct POSIF1 { +pub struct Posif1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for POSIF1 {} -impl POSIF1 { +unsafe impl Send for Posif1 {} +impl Posif1 { #[doc = r"Pointer to the register block"] pub const PTR: *const posif0::RegisterBlock = 0x4002_c000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6864,26 +6864,26 @@ impl POSIF1 { Self { _marker: PhantomData } } } -impl Deref for POSIF1 { +impl Deref for Posif1 { type Target = posif0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for POSIF1 { +impl core::fmt::Debug for Posif1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("POSIF1").finish() + f.debug_struct("Posif1").finish() } } #[doc = "Position Interface 1"] pub use self::posif0 as posif1; #[doc = "Port 0"] -pub struct PORT0 { +pub struct Port0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT0 {} -impl PORT0 { +unsafe impl Send for Port0 {} +impl Port0 { #[doc = r"Pointer to the register block"] pub const PTR: *const port0::RegisterBlock = 0x4802_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6908,26 +6908,26 @@ impl PORT0 { Self { _marker: PhantomData } } } -impl Deref for PORT0 { +impl Deref for Port0 { type Target = port0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT0 { +impl core::fmt::Debug for Port0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT0").finish() + f.debug_struct("Port0").finish() } } #[doc = "Port 0"] pub mod port0; #[doc = "Port 1"] -pub struct PORT1 { +pub struct Port1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT1 {} -impl PORT1 { +unsafe impl Send for Port1 {} +impl Port1 { #[doc = r"Pointer to the register block"] pub const PTR: *const port1::RegisterBlock = 0x4802_8100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6952,26 +6952,26 @@ impl PORT1 { Self { _marker: PhantomData } } } -impl Deref for PORT1 { +impl Deref for Port1 { type Target = port1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT1 { +impl core::fmt::Debug for Port1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT1").finish() + f.debug_struct("Port1").finish() } } #[doc = "Port 1"] pub mod port1; #[doc = "Port 2"] -pub struct PORT2 { +pub struct Port2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT2 {} -impl PORT2 { +unsafe impl Send for Port2 {} +impl Port2 { #[doc = r"Pointer to the register block"] pub const PTR: *const port2::RegisterBlock = 0x4802_8200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6996,26 +6996,26 @@ impl PORT2 { Self { _marker: PhantomData } } } -impl Deref for PORT2 { +impl Deref for Port2 { type Target = port2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT2 { +impl core::fmt::Debug for Port2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT2").finish() + f.debug_struct("Port2").finish() } } #[doc = "Port 2"] pub mod port2; #[doc = "Port 3"] -pub struct PORT3 { +pub struct Port3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT3 {} -impl PORT3 { +unsafe impl Send for Port3 {} +impl Port3 { #[doc = r"Pointer to the register block"] pub const PTR: *const port3::RegisterBlock = 0x4802_8300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7040,26 +7040,26 @@ impl PORT3 { Self { _marker: PhantomData } } } -impl Deref for PORT3 { +impl Deref for Port3 { type Target = port3::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT3 { +impl core::fmt::Debug for Port3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT3").finish() + f.debug_struct("Port3").finish() } } #[doc = "Port 3"] pub mod port3; #[doc = "Port 4"] -pub struct PORT4 { +pub struct Port4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT4 {} -impl PORT4 { +unsafe impl Send for Port4 {} +impl Port4 { #[doc = r"Pointer to the register block"] pub const PTR: *const port4::RegisterBlock = 0x4802_8400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7084,26 +7084,26 @@ impl PORT4 { Self { _marker: PhantomData } } } -impl Deref for PORT4 { +impl Deref for Port4 { type Target = port4::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT4 { +impl core::fmt::Debug for Port4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT4").finish() + f.debug_struct("Port4").finish() } } #[doc = "Port 4"] pub mod port4; #[doc = "Port 5"] -pub struct PORT5 { +pub struct Port5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT5 {} -impl PORT5 { +unsafe impl Send for Port5 {} +impl Port5 { #[doc = r"Pointer to the register block"] pub const PTR: *const port5::RegisterBlock = 0x4802_8500 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7128,26 +7128,26 @@ impl PORT5 { Self { _marker: PhantomData } } } -impl Deref for PORT5 { +impl Deref for Port5 { type Target = port5::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT5 { +impl core::fmt::Debug for Port5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT5").finish() + f.debug_struct("Port5").finish() } } #[doc = "Port 5"] pub mod port5; #[doc = "Port 6"] -pub struct PORT6 { +pub struct Port6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT6 {} -impl PORT6 { +unsafe impl Send for Port6 {} +impl Port6 { #[doc = r"Pointer to the register block"] pub const PTR: *const port6::RegisterBlock = 0x4802_8600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7172,26 +7172,26 @@ impl PORT6 { Self { _marker: PhantomData } } } -impl Deref for PORT6 { +impl Deref for Port6 { type Target = port6::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT6 { +impl core::fmt::Debug for Port6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT6").finish() + f.debug_struct("Port6").finish() } } #[doc = "Port 6"] pub mod port6; #[doc = "Port 7"] -pub struct PORT7 { +pub struct Port7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT7 {} -impl PORT7 { +unsafe impl Send for Port7 {} +impl Port7 { #[doc = r"Pointer to the register block"] pub const PTR: *const port7::RegisterBlock = 0x4802_8700 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7216,26 +7216,26 @@ impl PORT7 { Self { _marker: PhantomData } } } -impl Deref for PORT7 { +impl Deref for Port7 { type Target = port7::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT7 { +impl core::fmt::Debug for Port7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT7").finish() + f.debug_struct("Port7").finish() } } #[doc = "Port 7"] pub mod port7; #[doc = "Port 8"] -pub struct PORT8 { +pub struct Port8 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT8 {} -impl PORT8 { +unsafe impl Send for Port8 {} +impl Port8 { #[doc = r"Pointer to the register block"] pub const PTR: *const port8::RegisterBlock = 0x4802_8800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7260,26 +7260,26 @@ impl PORT8 { Self { _marker: PhantomData } } } -impl Deref for PORT8 { +impl Deref for Port8 { type Target = port8::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT8 { +impl core::fmt::Debug for Port8 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT8").finish() + f.debug_struct("Port8").finish() } } #[doc = "Port 8"] pub mod port8; #[doc = "Port 9"] -pub struct PORT9 { +pub struct Port9 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT9 {} -impl PORT9 { +unsafe impl Send for Port9 {} +impl Port9 { #[doc = r"Pointer to the register block"] pub const PTR: *const port9::RegisterBlock = 0x4802_8900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7304,26 +7304,26 @@ impl PORT9 { Self { _marker: PhantomData } } } -impl Deref for PORT9 { +impl Deref for Port9 { type Target = port9::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT9 { +impl core::fmt::Debug for Port9 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT9").finish() + f.debug_struct("Port9").finish() } } #[doc = "Port 9"] pub mod port9; #[doc = "Port 14"] -pub struct PORT14 { +pub struct Port14 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT14 {} -impl PORT14 { +unsafe impl Send for Port14 {} +impl Port14 { #[doc = r"Pointer to the register block"] pub const PTR: *const port14::RegisterBlock = 0x4802_8e00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7348,26 +7348,26 @@ impl PORT14 { Self { _marker: PhantomData } } } -impl Deref for PORT14 { +impl Deref for Port14 { type Target = port14::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT14 { +impl core::fmt::Debug for Port14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT14").finish() + f.debug_struct("Port14").finish() } } #[doc = "Port 14"] pub mod port14; #[doc = "Port 15"] -pub struct PORT15 { +pub struct Port15 { _marker: PhantomData<*const ()>, } -unsafe impl Send for PORT15 {} -impl PORT15 { +unsafe impl Send for Port15 {} +impl Port15 { #[doc = r"Pointer to the register block"] pub const PTR: *const port15::RegisterBlock = 0x4802_8f00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -7392,16 +7392,16 @@ impl PORT15 { Self { _marker: PhantomData } } } -impl Deref for PORT15 { +impl Deref for Port15 { type Target = port15::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for PORT15 { +impl core::fmt::Debug for Port15 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("PORT15").finish() + f.debug_struct("Port15").finish() } } #[doc = "Port 15"] @@ -7412,321 +7412,321 @@ static mut DEVICE_PERIPHERALS: bool = false; #[allow(non_snake_case)] pub struct Peripherals { #[doc = "PPB"] - pub PPB: PPB, + pub ppb: Ppb, #[doc = "DLR"] - pub DLR: DLR, + pub dlr: Dlr, #[doc = "ERU0"] - pub ERU0: ERU0, + pub eru0: Eru0, #[doc = "ERU1"] - pub ERU1: ERU1, + pub eru1: Eru1, #[doc = "GPDMA0"] - pub GPDMA0: GPDMA0, + pub gpdma0: Gpdma0, #[doc = "GPDMA0_CH0"] - pub GPDMA0_CH0: GPDMA0_CH0, + pub gpdma0_ch0: Gpdma0Ch0, #[doc = "GPDMA0_CH1"] - pub GPDMA0_CH1: GPDMA0_CH1, + pub gpdma0_ch1: Gpdma0Ch1, #[doc = "GPDMA0_CH2"] - pub GPDMA0_CH2: GPDMA0_CH2, + pub gpdma0_ch2: Gpdma0Ch2, #[doc = "GPDMA0_CH3"] - pub GPDMA0_CH3: GPDMA0_CH3, + pub gpdma0_ch3: Gpdma0Ch3, #[doc = "GPDMA0_CH4"] - pub GPDMA0_CH4: GPDMA0_CH4, + pub gpdma0_ch4: Gpdma0Ch4, #[doc = "GPDMA0_CH5"] - pub GPDMA0_CH5: GPDMA0_CH5, + pub gpdma0_ch5: Gpdma0Ch5, #[doc = "GPDMA0_CH6"] - pub GPDMA0_CH6: GPDMA0_CH6, + pub gpdma0_ch6: Gpdma0Ch6, #[doc = "GPDMA0_CH7"] - pub GPDMA0_CH7: GPDMA0_CH7, + pub gpdma0_ch7: Gpdma0Ch7, #[doc = "GPDMA1"] - pub GPDMA1: GPDMA1, + pub gpdma1: Gpdma1, #[doc = "GPDMA1_CH0"] - pub GPDMA1_CH0: GPDMA1_CH0, + pub gpdma1_ch0: Gpdma1Ch0, #[doc = "GPDMA1_CH1"] - pub GPDMA1_CH1: GPDMA1_CH1, + pub gpdma1_ch1: Gpdma1Ch1, #[doc = "GPDMA1_CH2"] - pub GPDMA1_CH2: GPDMA1_CH2, + pub gpdma1_ch2: Gpdma1Ch2, #[doc = "GPDMA1_CH3"] - pub GPDMA1_CH3: GPDMA1_CH3, + pub gpdma1_ch3: Gpdma1Ch3, #[doc = "FCE"] - pub FCE: FCE, + pub fce: Fce, #[doc = "FCE_KE0"] - pub FCE_KE0: FCE_KE0, + pub fce_ke0: FceKe0, #[doc = "FCE_KE1"] - pub FCE_KE1: FCE_KE1, + pub fce_ke1: FceKe1, #[doc = "FCE_KE2"] - pub FCE_KE2: FCE_KE2, + pub fce_ke2: FceKe2, #[doc = "FCE_KE3"] - pub FCE_KE3: FCE_KE3, + pub fce_ke3: FceKe3, #[doc = "PBA0"] - pub PBA0: PBA0, + pub pba0: Pba0, #[doc = "PBA1"] - pub PBA1: PBA1, + pub pba1: Pba1, #[doc = "FLASH0"] - pub FLASH0: FLASH0, + pub flash0: Flash0, #[doc = "PREF"] - pub PREF: PREF, + pub pref: Pref, #[doc = "PMU0"] - pub PMU0: PMU0, + pub pmu0: Pmu0, #[doc = "WDT"] - pub WDT: WDT, + pub wdt: Wdt, #[doc = "RTC"] - pub RTC: RTC, + pub rtc: Rtc, #[doc = "SCU_CLK"] - pub SCU_CLK: SCU_CLK, + pub scu_clk: ScuClk, #[doc = "SCU_OSC"] - pub SCU_OSC: SCU_OSC, + pub scu_osc: ScuOsc, #[doc = "SCU_PLL"] - pub SCU_PLL: SCU_PLL, + pub scu_pll: ScuPll, #[doc = "SCU_GENERAL"] - pub SCU_GENERAL: SCU_GENERAL, + pub scu_general: ScuGeneral, #[doc = "SCU_INTERRUPT"] - pub SCU_INTERRUPT: SCU_INTERRUPT, + pub scu_interrupt: ScuInterrupt, #[doc = "SCU_PARITY"] - pub SCU_PARITY: SCU_PARITY, + pub scu_parity: ScuParity, #[doc = "SCU_TRAP"] - pub SCU_TRAP: SCU_TRAP, + pub scu_trap: ScuTrap, #[doc = "SCU_HIBERNATE"] - pub SCU_HIBERNATE: SCU_HIBERNATE, + pub scu_hibernate: ScuHibernate, #[doc = "SCU_POWER"] - pub SCU_POWER: SCU_POWER, + pub scu_power: ScuPower, #[doc = "SCU_RESET"] - pub SCU_RESET: SCU_RESET, + pub scu_reset: ScuReset, #[doc = "LEDTS0"] - pub LEDTS0: LEDTS0, + pub ledts0: Ledts0, #[doc = "SDMMC_CON"] - pub SDMMC_CON: SDMMC_CON, + pub sdmmc_con: SdmmcCon, #[doc = "SDMMC"] - pub SDMMC: SDMMC, + pub sdmmc: Sdmmc, #[doc = "EBU"] - pub EBU: EBU, + pub ebu: Ebu, #[doc = "ETH0_CON"] - pub ETH0_CON: ETH0_CON, + pub eth0_con: Eth0Con, #[doc = "ETH0"] - pub ETH0: ETH0, + pub eth0: Eth0, #[doc = "ECAT0_CON"] - pub ECAT0_CON: ECAT0_CON, + pub ecat0_con: Ecat0Con, #[doc = "ECAT0"] - pub ECAT0: ECAT0, + pub ecat0: Ecat0, #[doc = "ECAT0_FMMU0"] - pub ECAT0_FMMU0: ECAT0_FMMU0, + pub ecat0_fmmu0: Ecat0Fmmu0, #[doc = "ECAT0_FMMU1"] - pub ECAT0_FMMU1: ECAT0_FMMU1, + pub ecat0_fmmu1: Ecat0Fmmu1, #[doc = "ECAT0_FMMU2"] - pub ECAT0_FMMU2: ECAT0_FMMU2, + pub ecat0_fmmu2: Ecat0Fmmu2, #[doc = "ECAT0_FMMU3"] - pub ECAT0_FMMU3: ECAT0_FMMU3, + pub ecat0_fmmu3: Ecat0Fmmu3, #[doc = "ECAT0_FMMU4"] - pub ECAT0_FMMU4: ECAT0_FMMU4, + pub ecat0_fmmu4: Ecat0Fmmu4, #[doc = "ECAT0_FMMU5"] - pub ECAT0_FMMU5: ECAT0_FMMU5, + pub ecat0_fmmu5: Ecat0Fmmu5, #[doc = "ECAT0_FMMU6"] - pub ECAT0_FMMU6: ECAT0_FMMU6, + pub ecat0_fmmu6: Ecat0Fmmu6, #[doc = "ECAT0_FMMU7"] - pub ECAT0_FMMU7: ECAT0_FMMU7, + pub ecat0_fmmu7: Ecat0Fmmu7, #[doc = "ECAT0_SM0"] - pub ECAT0_SM0: ECAT0_SM0, + pub ecat0_sm0: Ecat0Sm0, #[doc = "ECAT0_SM1"] - pub ECAT0_SM1: ECAT0_SM1, + pub ecat0_sm1: Ecat0Sm1, #[doc = "ECAT0_SM2"] - pub ECAT0_SM2: ECAT0_SM2, + pub ecat0_sm2: Ecat0Sm2, #[doc = "ECAT0_SM3"] - pub ECAT0_SM3: ECAT0_SM3, + pub ecat0_sm3: Ecat0Sm3, #[doc = "ECAT0_SM4"] - pub ECAT0_SM4: ECAT0_SM4, + pub ecat0_sm4: Ecat0Sm4, #[doc = "ECAT0_SM5"] - pub ECAT0_SM5: ECAT0_SM5, + pub ecat0_sm5: Ecat0Sm5, #[doc = "ECAT0_SM6"] - pub ECAT0_SM6: ECAT0_SM6, + pub ecat0_sm6: Ecat0Sm6, #[doc = "ECAT0_SM7"] - pub ECAT0_SM7: ECAT0_SM7, + pub ecat0_sm7: Ecat0Sm7, #[doc = "USB0"] - pub USB0: USB0, + pub usb0: Usb0, #[doc = "USB0_EP0"] - pub USB0_EP0: USB0_EP0, + pub usb0_ep0: Usb0Ep0, #[doc = "USB0_EP1"] - pub USB0_EP1: USB0_EP1, + pub usb0_ep1: Usb0Ep1, #[doc = "USB0_EP2"] - pub USB0_EP2: USB0_EP2, + pub usb0_ep2: Usb0Ep2, #[doc = "USB0_EP3"] - pub USB0_EP3: USB0_EP3, + pub usb0_ep3: Usb0Ep3, #[doc = "USB0_EP4"] - pub USB0_EP4: USB0_EP4, + pub usb0_ep4: Usb0Ep4, #[doc = "USB0_EP5"] - pub USB0_EP5: USB0_EP5, + pub usb0_ep5: Usb0Ep5, #[doc = "USB0_EP6"] - pub USB0_EP6: USB0_EP6, + pub usb0_ep6: Usb0Ep6, #[doc = "USB0_CH0"] - pub USB0_CH0: USB0_CH0, + pub usb0_ch0: Usb0Ch0, #[doc = "USB0_CH1"] - pub USB0_CH1: USB0_CH1, + pub usb0_ch1: Usb0Ch1, #[doc = "USB0_CH2"] - pub USB0_CH2: USB0_CH2, + pub usb0_ch2: Usb0Ch2, #[doc = "USB0_CH3"] - pub USB0_CH3: USB0_CH3, + pub usb0_ch3: Usb0Ch3, #[doc = "USB0_CH4"] - pub USB0_CH4: USB0_CH4, + pub usb0_ch4: Usb0Ch4, #[doc = "USB0_CH5"] - pub USB0_CH5: USB0_CH5, + pub usb0_ch5: Usb0Ch5, #[doc = "USB0_CH6"] - pub USB0_CH6: USB0_CH6, + pub usb0_ch6: Usb0Ch6, #[doc = "USB0_CH7"] - pub USB0_CH7: USB0_CH7, + pub usb0_ch7: Usb0Ch7, #[doc = "USB0_CH8"] - pub USB0_CH8: USB0_CH8, + pub usb0_ch8: Usb0Ch8, #[doc = "USB0_CH9"] - pub USB0_CH9: USB0_CH9, + pub usb0_ch9: Usb0Ch9, #[doc = "USB0_CH10"] - pub USB0_CH10: USB0_CH10, + pub usb0_ch10: Usb0Ch10, #[doc = "USB0_CH11"] - pub USB0_CH11: USB0_CH11, + pub usb0_ch11: Usb0Ch11, #[doc = "USB0_CH12"] - pub USB0_CH12: USB0_CH12, + pub usb0_ch12: Usb0Ch12, #[doc = "USB0_CH13"] - pub USB0_CH13: USB0_CH13, + pub usb0_ch13: Usb0Ch13, #[doc = "USIC0"] - pub USIC0: USIC0, + pub usic0: Usic0, #[doc = "USIC1"] - pub USIC1: USIC1, + pub usic1: Usic1, #[doc = "USIC2"] - pub USIC2: USIC2, + pub usic2: Usic2, #[doc = "USIC0_CH0"] - pub USIC0_CH0: USIC0_CH0, + pub usic0_ch0: Usic0Ch0, #[doc = "USIC0_CH1"] - pub USIC0_CH1: USIC0_CH1, + pub usic0_ch1: Usic0Ch1, #[doc = "USIC1_CH0"] - pub USIC1_CH0: USIC1_CH0, + pub usic1_ch0: Usic1Ch0, #[doc = "USIC1_CH1"] - pub USIC1_CH1: USIC1_CH1, + pub usic1_ch1: Usic1Ch1, #[doc = "USIC2_CH0"] - pub USIC2_CH0: USIC2_CH0, + pub usic2_ch0: Usic2Ch0, #[doc = "USIC2_CH1"] - pub USIC2_CH1: USIC2_CH1, + pub usic2_ch1: Usic2Ch1, #[doc = "CAN"] - pub CAN: CAN, + pub can: Can, #[doc = "CAN_NODE0"] - pub CAN_NODE0: CAN_NODE0, + pub can_node0: CanNode0, #[doc = "CAN_NODE1"] - pub CAN_NODE1: CAN_NODE1, + pub can_node1: CanNode1, #[doc = "CAN_NODE2"] - pub CAN_NODE2: CAN_NODE2, + pub can_node2: CanNode2, #[doc = "CAN_NODE3"] - pub CAN_NODE3: CAN_NODE3, + pub can_node3: CanNode3, #[doc = "CAN_NODE4"] - pub CAN_NODE4: CAN_NODE4, + pub can_node4: CanNode4, #[doc = "CAN_NODE5"] - pub CAN_NODE5: CAN_NODE5, + pub can_node5: CanNode5, #[doc = "CAN_MO"] - pub CAN_MO: CAN_MO, + pub can_mo: CanMo, #[doc = "VADC"] - pub VADC: VADC, + pub vadc: Vadc, #[doc = "VADC_G0"] - pub VADC_G0: VADC_G0, + pub vadc_g0: VadcG0, #[doc = "VADC_G1"] - pub VADC_G1: VADC_G1, + pub vadc_g1: VadcG1, #[doc = "VADC_G2"] - pub VADC_G2: VADC_G2, + pub vadc_g2: VadcG2, #[doc = "VADC_G3"] - pub VADC_G3: VADC_G3, + pub vadc_g3: VadcG3, #[doc = "DSD"] - pub DSD: DSD, + pub dsd: Dsd, #[doc = "DSD_CH0"] - pub DSD_CH0: DSD_CH0, + pub dsd_ch0: DsdCh0, #[doc = "DSD_CH1"] - pub DSD_CH1: DSD_CH1, + pub dsd_ch1: DsdCh1, #[doc = "DSD_CH2"] - pub DSD_CH2: DSD_CH2, + pub dsd_ch2: DsdCh2, #[doc = "DSD_CH3"] - pub DSD_CH3: DSD_CH3, + pub dsd_ch3: DsdCh3, #[doc = "DAC"] - pub DAC: DAC, + pub dac: Dac, #[doc = "CCU40"] - pub CCU40: CCU40, + pub ccu40: Ccu40, #[doc = "CCU41"] - pub CCU41: CCU41, + pub ccu41: Ccu41, #[doc = "CCU42"] - pub CCU42: CCU42, + pub ccu42: Ccu42, #[doc = "CCU43"] - pub CCU43: CCU43, + pub ccu43: Ccu43, #[doc = "CCU40_CC40"] - pub CCU40_CC40: CCU40_CC40, + pub ccu40_cc40: Ccu40Cc40, #[doc = "CCU40_CC41"] - pub CCU40_CC41: CCU40_CC41, + pub ccu40_cc41: Ccu40Cc41, #[doc = "CCU40_CC42"] - pub CCU40_CC42: CCU40_CC42, + pub ccu40_cc42: Ccu40Cc42, #[doc = "CCU40_CC43"] - pub CCU40_CC43: CCU40_CC43, + pub ccu40_cc43: Ccu40Cc43, #[doc = "CCU41_CC40"] - pub CCU41_CC40: CCU41_CC40, + pub ccu41_cc40: Ccu41Cc40, #[doc = "CCU41_CC41"] - pub CCU41_CC41: CCU41_CC41, + pub ccu41_cc41: Ccu41Cc41, #[doc = "CCU41_CC42"] - pub CCU41_CC42: CCU41_CC42, + pub ccu41_cc42: Ccu41Cc42, #[doc = "CCU41_CC43"] - pub CCU41_CC43: CCU41_CC43, + pub ccu41_cc43: Ccu41Cc43, #[doc = "CCU42_CC40"] - pub CCU42_CC40: CCU42_CC40, + pub ccu42_cc40: Ccu42Cc40, #[doc = "CCU42_CC41"] - pub CCU42_CC41: CCU42_CC41, + pub ccu42_cc41: Ccu42Cc41, #[doc = "CCU42_CC42"] - pub CCU42_CC42: CCU42_CC42, + pub ccu42_cc42: Ccu42Cc42, #[doc = "CCU42_CC43"] - pub CCU42_CC43: CCU42_CC43, + pub ccu42_cc43: Ccu42Cc43, #[doc = "CCU43_CC40"] - pub CCU43_CC40: CCU43_CC40, + pub ccu43_cc40: Ccu43Cc40, #[doc = "CCU43_CC41"] - pub CCU43_CC41: CCU43_CC41, + pub ccu43_cc41: Ccu43Cc41, #[doc = "CCU43_CC42"] - pub CCU43_CC42: CCU43_CC42, + pub ccu43_cc42: Ccu43Cc42, #[doc = "CCU43_CC43"] - pub CCU43_CC43: CCU43_CC43, + pub ccu43_cc43: Ccu43Cc43, #[doc = "CCU80"] - pub CCU80: CCU80, + pub ccu80: Ccu80, #[doc = "CCU81"] - pub CCU81: CCU81, + pub ccu81: Ccu81, #[doc = "CCU80_CC80"] - pub CCU80_CC80: CCU80_CC80, + pub ccu80_cc80: Ccu80Cc80, #[doc = "CCU80_CC81"] - pub CCU80_CC81: CCU80_CC81, + pub ccu80_cc81: Ccu80Cc81, #[doc = "CCU80_CC82"] - pub CCU80_CC82: CCU80_CC82, + pub ccu80_cc82: Ccu80Cc82, #[doc = "CCU80_CC83"] - pub CCU80_CC83: CCU80_CC83, + pub ccu80_cc83: Ccu80Cc83, #[doc = "CCU81_CC80"] - pub CCU81_CC80: CCU81_CC80, + pub ccu81_cc80: Ccu81Cc80, #[doc = "CCU81_CC81"] - pub CCU81_CC81: CCU81_CC81, + pub ccu81_cc81: Ccu81Cc81, #[doc = "CCU81_CC82"] - pub CCU81_CC82: CCU81_CC82, + pub ccu81_cc82: Ccu81Cc82, #[doc = "CCU81_CC83"] - pub CCU81_CC83: CCU81_CC83, + pub ccu81_cc83: Ccu81Cc83, #[doc = "POSIF0"] - pub POSIF0: POSIF0, + pub posif0: Posif0, #[doc = "POSIF1"] - pub POSIF1: POSIF1, + pub posif1: Posif1, #[doc = "PORT0"] - pub PORT0: PORT0, + pub port0: Port0, #[doc = "PORT1"] - pub PORT1: PORT1, + pub port1: Port1, #[doc = "PORT2"] - pub PORT2: PORT2, + pub port2: Port2, #[doc = "PORT3"] - pub PORT3: PORT3, + pub port3: Port3, #[doc = "PORT4"] - pub PORT4: PORT4, + pub port4: Port4, #[doc = "PORT5"] - pub PORT5: PORT5, + pub port5: Port5, #[doc = "PORT6"] - pub PORT6: PORT6, + pub port6: Port6, #[doc = "PORT7"] - pub PORT7: PORT7, + pub port7: Port7, #[doc = "PORT8"] - pub PORT8: PORT8, + pub port8: Port8, #[doc = "PORT9"] - pub PORT9: PORT9, + pub port9: Port9, #[doc = "PORT14"] - pub PORT14: PORT14, + pub port14: Port14, #[doc = "PORT15"] - pub PORT15: PORT15, + pub port15: Port15, } impl Peripherals { #[doc = r" Returns all the peripherals *once*."] @@ -7749,164 +7749,164 @@ impl Peripherals { pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { - PPB: PPB { _marker: PhantomData }, - DLR: DLR { _marker: PhantomData }, - ERU0: ERU0 { _marker: PhantomData }, - ERU1: ERU1 { _marker: PhantomData }, - GPDMA0: GPDMA0 { _marker: PhantomData }, - GPDMA0_CH0: GPDMA0_CH0 { _marker: PhantomData }, - GPDMA0_CH1: GPDMA0_CH1 { _marker: PhantomData }, - GPDMA0_CH2: GPDMA0_CH2 { _marker: PhantomData }, - GPDMA0_CH3: GPDMA0_CH3 { _marker: PhantomData }, - GPDMA0_CH4: GPDMA0_CH4 { _marker: PhantomData }, - GPDMA0_CH5: GPDMA0_CH5 { _marker: PhantomData }, - GPDMA0_CH6: GPDMA0_CH6 { _marker: PhantomData }, - GPDMA0_CH7: GPDMA0_CH7 { _marker: PhantomData }, - GPDMA1: GPDMA1 { _marker: PhantomData }, - GPDMA1_CH0: GPDMA1_CH0 { _marker: PhantomData }, - GPDMA1_CH1: GPDMA1_CH1 { _marker: PhantomData }, - GPDMA1_CH2: GPDMA1_CH2 { _marker: PhantomData }, - GPDMA1_CH3: GPDMA1_CH3 { _marker: PhantomData }, - FCE: FCE { _marker: PhantomData }, - FCE_KE0: FCE_KE0 { _marker: PhantomData }, - FCE_KE1: FCE_KE1 { _marker: PhantomData }, - FCE_KE2: FCE_KE2 { _marker: PhantomData }, - FCE_KE3: FCE_KE3 { _marker: PhantomData }, - PBA0: PBA0 { _marker: PhantomData }, - PBA1: PBA1 { _marker: PhantomData }, - FLASH0: FLASH0 { _marker: PhantomData }, - PREF: PREF { _marker: PhantomData }, - PMU0: PMU0 { _marker: PhantomData }, - WDT: WDT { _marker: PhantomData }, - RTC: RTC { _marker: PhantomData }, - SCU_CLK: SCU_CLK { _marker: PhantomData }, - SCU_OSC: SCU_OSC { _marker: PhantomData }, - SCU_PLL: SCU_PLL { _marker: PhantomData }, - SCU_GENERAL: SCU_GENERAL { _marker: PhantomData }, - SCU_INTERRUPT: SCU_INTERRUPT { _marker: PhantomData }, - SCU_PARITY: SCU_PARITY { _marker: PhantomData }, - SCU_TRAP: SCU_TRAP { _marker: PhantomData }, - SCU_HIBERNATE: SCU_HIBERNATE { _marker: PhantomData }, - SCU_POWER: SCU_POWER { _marker: PhantomData }, - SCU_RESET: SCU_RESET { _marker: PhantomData }, - LEDTS0: LEDTS0 { _marker: PhantomData }, - SDMMC_CON: SDMMC_CON { _marker: PhantomData }, - SDMMC: SDMMC { _marker: PhantomData }, - EBU: EBU { _marker: PhantomData }, - ETH0_CON: ETH0_CON { _marker: PhantomData }, - ETH0: ETH0 { _marker: PhantomData }, - ECAT0_CON: ECAT0_CON { _marker: PhantomData }, - ECAT0: ECAT0 { _marker: PhantomData }, - ECAT0_FMMU0: ECAT0_FMMU0 { _marker: PhantomData }, - ECAT0_FMMU1: ECAT0_FMMU1 { _marker: PhantomData }, - ECAT0_FMMU2: ECAT0_FMMU2 { _marker: PhantomData }, - ECAT0_FMMU3: ECAT0_FMMU3 { _marker: PhantomData }, - ECAT0_FMMU4: ECAT0_FMMU4 { _marker: PhantomData }, - ECAT0_FMMU5: ECAT0_FMMU5 { _marker: PhantomData }, - ECAT0_FMMU6: ECAT0_FMMU6 { _marker: PhantomData }, - ECAT0_FMMU7: ECAT0_FMMU7 { _marker: PhantomData }, - ECAT0_SM0: ECAT0_SM0 { _marker: PhantomData }, - ECAT0_SM1: ECAT0_SM1 { _marker: PhantomData }, - ECAT0_SM2: ECAT0_SM2 { _marker: PhantomData }, - ECAT0_SM3: ECAT0_SM3 { _marker: PhantomData }, - ECAT0_SM4: ECAT0_SM4 { _marker: PhantomData }, - ECAT0_SM5: ECAT0_SM5 { _marker: PhantomData }, - ECAT0_SM6: ECAT0_SM6 { _marker: PhantomData }, - ECAT0_SM7: ECAT0_SM7 { _marker: PhantomData }, - USB0: USB0 { _marker: PhantomData }, - USB0_EP0: USB0_EP0 { _marker: PhantomData }, - USB0_EP1: USB0_EP1 { _marker: PhantomData }, - USB0_EP2: USB0_EP2 { _marker: PhantomData }, - USB0_EP3: USB0_EP3 { _marker: PhantomData }, - USB0_EP4: USB0_EP4 { _marker: PhantomData }, - USB0_EP5: USB0_EP5 { _marker: PhantomData }, - USB0_EP6: USB0_EP6 { _marker: PhantomData }, - USB0_CH0: USB0_CH0 { _marker: PhantomData }, - USB0_CH1: USB0_CH1 { _marker: PhantomData }, - USB0_CH2: USB0_CH2 { _marker: PhantomData }, - USB0_CH3: USB0_CH3 { _marker: PhantomData }, - USB0_CH4: USB0_CH4 { _marker: PhantomData }, - USB0_CH5: USB0_CH5 { _marker: PhantomData }, - USB0_CH6: USB0_CH6 { _marker: PhantomData }, - USB0_CH7: USB0_CH7 { _marker: PhantomData }, - USB0_CH8: USB0_CH8 { _marker: PhantomData }, - USB0_CH9: USB0_CH9 { _marker: PhantomData }, - USB0_CH10: USB0_CH10 { _marker: PhantomData }, - USB0_CH11: USB0_CH11 { _marker: PhantomData }, - USB0_CH12: USB0_CH12 { _marker: PhantomData }, - USB0_CH13: USB0_CH13 { _marker: PhantomData }, - USIC0: USIC0 { _marker: PhantomData }, - USIC1: USIC1 { _marker: PhantomData }, - USIC2: USIC2 { _marker: PhantomData }, - USIC0_CH0: USIC0_CH0 { _marker: PhantomData }, - USIC0_CH1: USIC0_CH1 { _marker: PhantomData }, - USIC1_CH0: USIC1_CH0 { _marker: PhantomData }, - USIC1_CH1: USIC1_CH1 { _marker: PhantomData }, - USIC2_CH0: USIC2_CH0 { _marker: PhantomData }, - USIC2_CH1: USIC2_CH1 { _marker: PhantomData }, - CAN: CAN { _marker: PhantomData }, - CAN_NODE0: CAN_NODE0 { _marker: PhantomData }, - CAN_NODE1: CAN_NODE1 { _marker: PhantomData }, - CAN_NODE2: CAN_NODE2 { _marker: PhantomData }, - CAN_NODE3: CAN_NODE3 { _marker: PhantomData }, - CAN_NODE4: CAN_NODE4 { _marker: PhantomData }, - CAN_NODE5: CAN_NODE5 { _marker: PhantomData }, - CAN_MO: CAN_MO { _marker: PhantomData }, - VADC: VADC { _marker: PhantomData }, - VADC_G0: VADC_G0 { _marker: PhantomData }, - VADC_G1: VADC_G1 { _marker: PhantomData }, - VADC_G2: VADC_G2 { _marker: PhantomData }, - VADC_G3: VADC_G3 { _marker: PhantomData }, - DSD: DSD { _marker: PhantomData }, - DSD_CH0: DSD_CH0 { _marker: PhantomData }, - DSD_CH1: DSD_CH1 { _marker: PhantomData }, - DSD_CH2: DSD_CH2 { _marker: PhantomData }, - DSD_CH3: DSD_CH3 { _marker: PhantomData }, - DAC: DAC { _marker: PhantomData }, - CCU40: CCU40 { _marker: PhantomData }, - CCU41: CCU41 { _marker: PhantomData }, - CCU42: CCU42 { _marker: PhantomData }, - CCU43: CCU43 { _marker: PhantomData }, - CCU40_CC40: CCU40_CC40 { _marker: PhantomData }, - CCU40_CC41: CCU40_CC41 { _marker: PhantomData }, - CCU40_CC42: CCU40_CC42 { _marker: PhantomData }, - CCU40_CC43: CCU40_CC43 { _marker: PhantomData }, - CCU41_CC40: CCU41_CC40 { _marker: PhantomData }, - CCU41_CC41: CCU41_CC41 { _marker: PhantomData }, - CCU41_CC42: CCU41_CC42 { _marker: PhantomData }, - CCU41_CC43: CCU41_CC43 { _marker: PhantomData }, - CCU42_CC40: CCU42_CC40 { _marker: PhantomData }, - CCU42_CC41: CCU42_CC41 { _marker: PhantomData }, - CCU42_CC42: CCU42_CC42 { _marker: PhantomData }, - CCU42_CC43: CCU42_CC43 { _marker: PhantomData }, - CCU43_CC40: CCU43_CC40 { _marker: PhantomData }, - CCU43_CC41: CCU43_CC41 { _marker: PhantomData }, - CCU43_CC42: CCU43_CC42 { _marker: PhantomData }, - CCU43_CC43: CCU43_CC43 { _marker: PhantomData }, - CCU80: CCU80 { _marker: PhantomData }, - CCU81: CCU81 { _marker: PhantomData }, - CCU80_CC80: CCU80_CC80 { _marker: PhantomData }, - CCU80_CC81: CCU80_CC81 { _marker: PhantomData }, - CCU80_CC82: CCU80_CC82 { _marker: PhantomData }, - CCU80_CC83: CCU80_CC83 { _marker: PhantomData }, - CCU81_CC80: CCU81_CC80 { _marker: PhantomData }, - CCU81_CC81: CCU81_CC81 { _marker: PhantomData }, - CCU81_CC82: CCU81_CC82 { _marker: PhantomData }, - CCU81_CC83: CCU81_CC83 { _marker: PhantomData }, - POSIF0: POSIF0 { _marker: PhantomData }, - POSIF1: POSIF1 { _marker: PhantomData }, - PORT0: PORT0 { _marker: PhantomData }, - PORT1: PORT1 { _marker: PhantomData }, - PORT2: PORT2 { _marker: PhantomData }, - PORT3: PORT3 { _marker: PhantomData }, - PORT4: PORT4 { _marker: PhantomData }, - PORT5: PORT5 { _marker: PhantomData }, - PORT6: PORT6 { _marker: PhantomData }, - PORT7: PORT7 { _marker: PhantomData }, - PORT8: PORT8 { _marker: PhantomData }, - PORT9: PORT9 { _marker: PhantomData }, - PORT14: PORT14 { _marker: PhantomData }, - PORT15: PORT15 { _marker: PhantomData }, + ppb: Ppb { _marker: PhantomData }, + dlr: Dlr { _marker: PhantomData }, + eru0: Eru0 { _marker: PhantomData }, + eru1: Eru1 { _marker: PhantomData }, + gpdma0: Gpdma0 { _marker: PhantomData }, + gpdma0_ch0: Gpdma0Ch0 { _marker: PhantomData }, + gpdma0_ch1: Gpdma0Ch1 { _marker: PhantomData }, + gpdma0_ch2: Gpdma0Ch2 { _marker: PhantomData }, + gpdma0_ch3: Gpdma0Ch3 { _marker: PhantomData }, + gpdma0_ch4: Gpdma0Ch4 { _marker: PhantomData }, + gpdma0_ch5: Gpdma0Ch5 { _marker: PhantomData }, + gpdma0_ch6: Gpdma0Ch6 { _marker: PhantomData }, + gpdma0_ch7: Gpdma0Ch7 { _marker: PhantomData }, + gpdma1: Gpdma1 { _marker: PhantomData }, + gpdma1_ch0: Gpdma1Ch0 { _marker: PhantomData }, + gpdma1_ch1: Gpdma1Ch1 { _marker: PhantomData }, + gpdma1_ch2: Gpdma1Ch2 { _marker: PhantomData }, + gpdma1_ch3: Gpdma1Ch3 { _marker: PhantomData }, + fce: Fce { _marker: PhantomData }, + fce_ke0: FceKe0 { _marker: PhantomData }, + fce_ke1: FceKe1 { _marker: PhantomData }, + fce_ke2: FceKe2 { _marker: PhantomData }, + fce_ke3: FceKe3 { _marker: PhantomData }, + pba0: Pba0 { _marker: PhantomData }, + pba1: Pba1 { _marker: PhantomData }, + flash0: Flash0 { _marker: PhantomData }, + pref: Pref { _marker: PhantomData }, + pmu0: Pmu0 { _marker: PhantomData }, + wdt: Wdt { _marker: PhantomData }, + rtc: Rtc { _marker: PhantomData }, + scu_clk: ScuClk { _marker: PhantomData }, + scu_osc: ScuOsc { _marker: PhantomData }, + scu_pll: ScuPll { _marker: PhantomData }, + scu_general: ScuGeneral { _marker: PhantomData }, + scu_interrupt: ScuInterrupt { _marker: PhantomData }, + scu_parity: ScuParity { _marker: PhantomData }, + scu_trap: ScuTrap { _marker: PhantomData }, + scu_hibernate: ScuHibernate { _marker: PhantomData }, + scu_power: ScuPower { _marker: PhantomData }, + scu_reset: ScuReset { _marker: PhantomData }, + ledts0: Ledts0 { _marker: PhantomData }, + sdmmc_con: SdmmcCon { _marker: PhantomData }, + sdmmc: Sdmmc { _marker: PhantomData }, + ebu: Ebu { _marker: PhantomData }, + eth0_con: Eth0Con { _marker: PhantomData }, + eth0: Eth0 { _marker: PhantomData }, + ecat0_con: Ecat0Con { _marker: PhantomData }, + ecat0: Ecat0 { _marker: PhantomData }, + ecat0_fmmu0: Ecat0Fmmu0 { _marker: PhantomData }, + ecat0_fmmu1: Ecat0Fmmu1 { _marker: PhantomData }, + ecat0_fmmu2: Ecat0Fmmu2 { _marker: PhantomData }, + ecat0_fmmu3: Ecat0Fmmu3 { _marker: PhantomData }, + ecat0_fmmu4: Ecat0Fmmu4 { _marker: PhantomData }, + ecat0_fmmu5: Ecat0Fmmu5 { _marker: PhantomData }, + ecat0_fmmu6: Ecat0Fmmu6 { _marker: PhantomData }, + ecat0_fmmu7: Ecat0Fmmu7 { _marker: PhantomData }, + ecat0_sm0: Ecat0Sm0 { _marker: PhantomData }, + ecat0_sm1: Ecat0Sm1 { _marker: PhantomData }, + ecat0_sm2: Ecat0Sm2 { _marker: PhantomData }, + ecat0_sm3: Ecat0Sm3 { _marker: PhantomData }, + ecat0_sm4: Ecat0Sm4 { _marker: PhantomData }, + ecat0_sm5: Ecat0Sm5 { _marker: PhantomData }, + ecat0_sm6: Ecat0Sm6 { _marker: PhantomData }, + ecat0_sm7: Ecat0Sm7 { _marker: PhantomData }, + usb0: Usb0 { _marker: PhantomData }, + usb0_ep0: Usb0Ep0 { _marker: PhantomData }, + usb0_ep1: Usb0Ep1 { _marker: PhantomData }, + usb0_ep2: Usb0Ep2 { _marker: PhantomData }, + usb0_ep3: Usb0Ep3 { _marker: PhantomData }, + usb0_ep4: Usb0Ep4 { _marker: PhantomData }, + usb0_ep5: Usb0Ep5 { _marker: PhantomData }, + usb0_ep6: Usb0Ep6 { _marker: PhantomData }, + usb0_ch0: Usb0Ch0 { _marker: PhantomData }, + usb0_ch1: Usb0Ch1 { _marker: PhantomData }, + usb0_ch2: Usb0Ch2 { _marker: PhantomData }, + usb0_ch3: Usb0Ch3 { _marker: PhantomData }, + usb0_ch4: Usb0Ch4 { _marker: PhantomData }, + usb0_ch5: Usb0Ch5 { _marker: PhantomData }, + usb0_ch6: Usb0Ch6 { _marker: PhantomData }, + usb0_ch7: Usb0Ch7 { _marker: PhantomData }, + usb0_ch8: Usb0Ch8 { _marker: PhantomData }, + usb0_ch9: Usb0Ch9 { _marker: PhantomData }, + usb0_ch10: Usb0Ch10 { _marker: PhantomData }, + usb0_ch11: Usb0Ch11 { _marker: PhantomData }, + usb0_ch12: Usb0Ch12 { _marker: PhantomData }, + usb0_ch13: Usb0Ch13 { _marker: PhantomData }, + usic0: Usic0 { _marker: PhantomData }, + usic1: Usic1 { _marker: PhantomData }, + usic2: Usic2 { _marker: PhantomData }, + usic0_ch0: Usic0Ch0 { _marker: PhantomData }, + usic0_ch1: Usic0Ch1 { _marker: PhantomData }, + usic1_ch0: Usic1Ch0 { _marker: PhantomData }, + usic1_ch1: Usic1Ch1 { _marker: PhantomData }, + usic2_ch0: Usic2Ch0 { _marker: PhantomData }, + usic2_ch1: Usic2Ch1 { _marker: PhantomData }, + can: Can { _marker: PhantomData }, + can_node0: CanNode0 { _marker: PhantomData }, + can_node1: CanNode1 { _marker: PhantomData }, + can_node2: CanNode2 { _marker: PhantomData }, + can_node3: CanNode3 { _marker: PhantomData }, + can_node4: CanNode4 { _marker: PhantomData }, + can_node5: CanNode5 { _marker: PhantomData }, + can_mo: CanMo { _marker: PhantomData }, + vadc: Vadc { _marker: PhantomData }, + vadc_g0: VadcG0 { _marker: PhantomData }, + vadc_g1: VadcG1 { _marker: PhantomData }, + vadc_g2: VadcG2 { _marker: PhantomData }, + vadc_g3: VadcG3 { _marker: PhantomData }, + dsd: Dsd { _marker: PhantomData }, + dsd_ch0: DsdCh0 { _marker: PhantomData }, + dsd_ch1: DsdCh1 { _marker: PhantomData }, + dsd_ch2: DsdCh2 { _marker: PhantomData }, + dsd_ch3: DsdCh3 { _marker: PhantomData }, + dac: Dac { _marker: PhantomData }, + ccu40: Ccu40 { _marker: PhantomData }, + ccu41: Ccu41 { _marker: PhantomData }, + ccu42: Ccu42 { _marker: PhantomData }, + ccu43: Ccu43 { _marker: PhantomData }, + ccu40_cc40: Ccu40Cc40 { _marker: PhantomData }, + ccu40_cc41: Ccu40Cc41 { _marker: PhantomData }, + ccu40_cc42: Ccu40Cc42 { _marker: PhantomData }, + ccu40_cc43: Ccu40Cc43 { _marker: PhantomData }, + ccu41_cc40: Ccu41Cc40 { _marker: PhantomData }, + ccu41_cc41: Ccu41Cc41 { _marker: PhantomData }, + ccu41_cc42: Ccu41Cc42 { _marker: PhantomData }, + ccu41_cc43: Ccu41Cc43 { _marker: PhantomData }, + ccu42_cc40: Ccu42Cc40 { _marker: PhantomData }, + ccu42_cc41: Ccu42Cc41 { _marker: PhantomData }, + ccu42_cc42: Ccu42Cc42 { _marker: PhantomData }, + ccu42_cc43: Ccu42Cc43 { _marker: PhantomData }, + ccu43_cc40: Ccu43Cc40 { _marker: PhantomData }, + ccu43_cc41: Ccu43Cc41 { _marker: PhantomData }, + ccu43_cc42: Ccu43Cc42 { _marker: PhantomData }, + ccu43_cc43: Ccu43Cc43 { _marker: PhantomData }, + ccu80: Ccu80 { _marker: PhantomData }, + ccu81: Ccu81 { _marker: PhantomData }, + ccu80_cc80: Ccu80Cc80 { _marker: PhantomData }, + ccu80_cc81: Ccu80Cc81 { _marker: PhantomData }, + ccu80_cc82: Ccu80Cc82 { _marker: PhantomData }, + ccu80_cc83: Ccu80Cc83 { _marker: PhantomData }, + ccu81_cc80: Ccu81Cc80 { _marker: PhantomData }, + ccu81_cc81: Ccu81Cc81 { _marker: PhantomData }, + ccu81_cc82: Ccu81Cc82 { _marker: PhantomData }, + ccu81_cc83: Ccu81Cc83 { _marker: PhantomData }, + posif0: Posif0 { _marker: PhantomData }, + posif1: Posif1 { _marker: PhantomData }, + port0: Port0 { _marker: PhantomData }, + port1: Port1 { _marker: PhantomData }, + port2: Port2 { _marker: PhantomData }, + port3: Port3 { _marker: PhantomData }, + port4: Port4 { _marker: PhantomData }, + port5: Port5 { _marker: PhantomData }, + port6: Port6 { _marker: PhantomData }, + port7: Port7 { _marker: PhantomData }, + port8: Port8 { _marker: PhantomData }, + port9: Port9 { _marker: PhantomData }, + port14: Port14 { _marker: PhantomData }, + port15: Port15 { _marker: PhantomData }, } } } diff --git a/src/pba0.rs b/src/pba0.rs index 132491a2..141f45b0 100644 --- a/src/pba0.rs +++ b/src/pba0.rs @@ -1,28 +1,30 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sts: STS, - waddr: WADDR, + sts: Sts, + waddr: Waddr, } impl RegisterBlock { #[doc = "0x00 - Peripheral Bridge Status Register"] #[inline(always)] - pub const fn sts(&self) -> &STS { + pub const fn sts(&self) -> &Sts { &self.sts } #[doc = "0x04 - PBA Write Error Address Register"] #[inline(always)] - pub const fn waddr(&self) -> &WADDR { + pub const fn waddr(&self) -> &Waddr { &self.waddr } } #[doc = "STS (rw) register accessor: Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] -pub type STS = crate::Reg; +#[doc(alias = "STS")] +pub type Sts = crate::Reg; #[doc = "Peripheral Bridge Status Register"] pub mod sts; #[doc = "WADDR (r) register accessor: PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waddr`] module"] -pub type WADDR = crate::Reg; +#[doc(alias = "WADDR")] +pub type Waddr = crate::Reg; #[doc = "PBA Write Error Address Register"] pub mod waddr; diff --git a/src/pba0/sts.rs b/src/pba0/sts.rs index acf48c3f..eb30c1a4 100644 --- a/src/pba0/sts.rs +++ b/src/pba0/sts.rs @@ -1,98 +1,89 @@ #[doc = "Register `STS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STS` writer"] -pub type W = crate::W; -#[doc = "Field `WERR` reader - Bufferable Write Access Error"] -pub type WERR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Bufferable Write Access Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WERR_A { +pub enum Werr { #[doc = "0: no write error occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: write error occurred, interrupt request is pending."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WERR_A) -> Self { + fn from(variant: Werr) -> Self { variant as u8 != 0 } } -impl WERR_R { +#[doc = "Field `WERR` reader - Bufferable Write Access Error"] +pub type WerrR = crate::BitReader; +impl WerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WERR_A { + pub const fn variant(&self) -> Werr { match self.bits { - false => WERR_A::VALUE1, - true => WERR_A::VALUE2, + false => Werr::Value1, + true => Werr::Value2, } } #[doc = "no write error occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WERR_A::VALUE1 + *self == Werr::Value1 } #[doc = "write error occurred, interrupt request is pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WERR_A::VALUE2 + *self == Werr::Value2 } } #[doc = "Field `WERR` writer - Bufferable Write Access Error"] -pub type WERR_W<'a, REG> = crate::BitWriter<'a, REG, WERR_A>; -impl<'a, REG> WERR_W<'a, REG> +pub type WerrW<'a, REG> = crate::BitWriter<'a, REG, Werr>; +impl<'a, REG> WerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no write error occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WERR_A::VALUE1) + self.variant(Werr::Value1) } #[doc = "write error occurred, interrupt request is pending."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WERR_A::VALUE2) + self.variant(Werr::Value2) } } impl R { #[doc = "Bit 0 - Bufferable Write Access Error"] #[inline(always)] - pub fn werr(&self) -> WERR_R { - WERR_R::new((self.bits & 1) != 0) + pub fn werr(&self) -> WerrR { + WerrR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Bufferable Write Access Error"] #[inline(always)] #[must_use] - pub fn werr(&mut self) -> WERR_W { - WERR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn werr(&mut self) -> WerrW { + WerrW::new(self, 0) } } #[doc = "Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STS_SPEC; -impl crate::RegisterSpec for STS_SPEC { +pub struct StsSpec; +impl crate::RegisterSpec for StsSpec { type Ux = u32; } #[doc = "`read()` method returns [`sts::R`](R) reader structure"] -impl crate::Readable for STS_SPEC {} +impl crate::Readable for StsSpec {} #[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] -impl crate::Writable for STS_SPEC { +impl crate::Writable for StsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0"] -impl crate::Resettable for STS_SPEC { +impl crate::Resettable for StsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/pba0/waddr.rs b/src/pba0/waddr.rs index 58df48e8..10e88e06 100644 --- a/src/pba0/waddr.rs +++ b/src/pba0/waddr.rs @@ -1,22 +1,22 @@ #[doc = "Register `WADDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WADDR` reader - Write Error Address"] -pub type WADDR_R = crate::FieldReader; +pub type WaddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Write Error Address"] #[inline(always)] - pub fn waddr(&self) -> WADDR_R { - WADDR_R::new(self.bits) + pub fn waddr(&self) -> WaddrR { + WaddrR::new(self.bits) } } #[doc = "PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WADDR_SPEC; -impl crate::RegisterSpec for WADDR_SPEC { +pub struct WaddrSpec; +impl crate::RegisterSpec for WaddrSpec { type Ux = u32; } #[doc = "`read()` method returns [`waddr::R`](R) reader structure"] -impl crate::Readable for WADDR_SPEC {} +impl crate::Readable for WaddrSpec {} #[doc = "`reset()` method sets WADDR to value 0"] -impl crate::Resettable for WADDR_SPEC { +impl crate::Resettable for WaddrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/pmu0.rs b/src/pmu0.rs index 953a9903..6b869fab 100644 --- a/src/pmu0.rs +++ b/src/pmu0.rs @@ -1,17 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, + id: Id, } impl RegisterBlock { #[doc = "0x00 - PMU0 Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } } #[doc = "ID (r) register accessor: PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "PMU0 Identification Register"] pub mod id; diff --git a/src/pmu0/id.rs b/src/pmu0/id.rs index e29b6fc5..5ca7aedc 100644 --- a/src/pmu0/id.rs +++ b/src/pmu0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x0091_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x0091_c000; } diff --git a/src/port0.rs b/src/port0.rs index 68a7d4b5..5f44d905 100644 --- a/src/port0.rs +++ b/src/port0.rs @@ -1,143 +1,155 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved9: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved10: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 0 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 0 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 0 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 0 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 0 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 0 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 0 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 0 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 0 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 0 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 0 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 0 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 0 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 0 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 0 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 0 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 0 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 0 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port0/hwsel.rs b/src/port0/hwsel.rs index aa4e6294..25c13e8d 100644 --- a/src/port0/hwsel.rs +++ b/src/port0/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0x0001_4000"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0x0001_4000; } diff --git a/src/port0/in_.rs b/src/port0/in_.rs index 68058636..090a396f 100644 --- a/src/port0/in_.rs +++ b/src/port0/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr0.rs b/src/port0/iocr0.rs index 2fc75d07..a211a7bf 100644 --- a/src/port0/iocr0.rs +++ b/src/port0/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr12.rs b/src/port0/iocr12.rs index 55854cb7..47450e6d 100644 --- a/src/port0/iocr12.rs +++ b/src/port0/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr4.rs b/src/port0/iocr4.rs index 9791d419..b94ce9f0 100644 --- a/src/port0/iocr4.rs +++ b/src/port0/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr8.rs b/src/port0/iocr8.rs index 61705975..afa3bd27 100644 --- a/src/port0/iocr8.rs +++ b/src/port0/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/omr.rs b/src/port0/omr.rs index 734ed58f..5bb947d6 100644 --- a/src/port0/omr.rs +++ b/src/port0/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/out.rs b/src/port0/out.rs index 808f20f6..f11fe817 100644 --- a/src/port0/out.rs +++ b/src/port0/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/pdisc.rs b/src/port0/pdisc.rs index c56f8aa7..685cfa82 100644 --- a/src/port0/pdisc.rs +++ b/src/port0/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/pdr0.rs b/src/port0/pdr0.rs index 0d8c1878..655089dd 100644 --- a/src/port0/pdr0.rs +++ b/src/port0/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,112 +238,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD2_A::SD_SHE), - 1 => Some(PD2_A::SD_MEE), - 2 => Some(PD2_A::SD_SOE), - 4 => Some(PD2_A::MD), - 7 => Some(PD2_A::WD), + 0 => Some(Pd2::SdShe), + 1 => Some(Pd2::SdMee), + 2 => Some(Pd2::SdSoe), + 4 => Some(Pd2::Md), + 7 => Some(Pd2::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD2_A::SD_SHE + *self == Pd2::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD2_A::SD_MEE + *self == Pd2::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -351,97 +351,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SHE) + self.variant(Pd2::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_MEE) + self.variant(Pd2::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -449,97 +449,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD7_A::SD_SHE), - 1 => Some(PD7_A::SD_MEE), - 2 => Some(PD7_A::SD_SOE), - 4 => Some(PD7_A::MD), - 7 => Some(PD7_A::WD), + 0 => Some(Pd7::SdShe), + 1 => Some(Pd7::SdMee), + 2 => Some(Pd7::SdSoe), + 4 => Some(Pd7::Md), + 7 => Some(Pd7::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD7_A::SD_SHE + *self == Pd7::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD7_A::SD_MEE + *self == Pd7::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SHE) + self.variant(Pd7::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_MEE) + self.variant(Pd7::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port0/pdr1.rs b/src/port0/pdr1.rs index e3b04bd5..64617726 100644 --- a/src/port0/pdr1.rs +++ b/src/port0/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,136 +434,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD12_A { + pub const fn variant(&self) -> Pd12 { match self.bits { - 2 => PD12_A::SD_SOE, - 3 => PD12_A::SD_SLE, - 4 => PD12_A::MD, - 7 => PD12_A::WD, - 0 => PD12_A::SD_SOE_ALT, - 1 => PD12_A::SD_SLE_ALT, - 6 => PD12_A::MD_ALT, - 5 => PD12_A::WD_ALT, + 2 => Pd12::SdSoe, + 3 => Pd12::SdSle, + 4 => Pd12::Md, + 7 => Pd12::Wd, + 0 => Pd12::SdSoeAlt, + 1 => Pd12::SdSleAlt, + 6 => Pd12::MdAlt, + 5 => Pd12::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD12_A::SD_SLE + *self == Pd12::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD12_A::SD_SOE_ALT + *self == Pd12::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD12_A::SD_SLE_ALT + *self == Pd12::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD12_A::MD_ALT + *self == Pd12::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD12_A::WD_ALT + *self == Pd12::WdAlt } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -571,136 +571,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SLE) + self.variant(Pd12::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE_ALT) + self.variant(Pd12::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SLE_ALT) + self.variant(Pd12::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD12_A::MD_ALT) + self.variant(Pd12::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD12_A::WD_ALT) + self.variant(Pd12::WdAlt) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD13_A { + pub const fn variant(&self) -> Pd13 { match self.bits { - 2 => PD13_A::SD_SOE, - 3 => PD13_A::SD_SLE, - 4 => PD13_A::MD, - 7 => PD13_A::WD, - 0 => PD13_A::SD_SOE_ALT, - 1 => PD13_A::SD_SLE_ALT, - 6 => PD13_A::MD_ALT, - 5 => PD13_A::WD_ALT, + 2 => Pd13::SdSoe, + 3 => Pd13::SdSle, + 4 => Pd13::Md, + 7 => Pd13::Wd, + 0 => Pd13::SdSoeAlt, + 1 => Pd13::SdSleAlt, + 6 => Pd13::MdAlt, + 5 => Pd13::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD13_A::SD_SLE + *self == Pd13::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD13_A::SD_SOE_ALT + *self == Pd13::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD13_A::SD_SLE_ALT + *self == Pd13::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD13_A::MD_ALT + *self == Pd13::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD13_A::WD_ALT + *self == Pd13::WdAlt } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -708,136 +708,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SLE) + self.variant(Pd13::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE_ALT) + self.variant(Pd13::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SLE_ALT) + self.variant(Pd13::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD13_A::MD_ALT) + self.variant(Pd13::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD13_A::WD_ALT) + self.variant(Pd13::WdAlt) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD14_A { + pub const fn variant(&self) -> Pd14 { match self.bits { - 2 => PD14_A::SD_SOE, - 3 => PD14_A::SD_SLE, - 4 => PD14_A::MD, - 7 => PD14_A::WD, - 0 => PD14_A::SD_SOE_ALT, - 1 => PD14_A::SD_SLE_ALT, - 6 => PD14_A::MD_ALT, - 5 => PD14_A::WD_ALT, + 2 => Pd14::SdSoe, + 3 => Pd14::SdSle, + 4 => Pd14::Md, + 7 => Pd14::Wd, + 0 => Pd14::SdSoeAlt, + 1 => Pd14::SdSleAlt, + 6 => Pd14::MdAlt, + 5 => Pd14::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD14_A::SD_SLE + *self == Pd14::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD14_A::SD_SOE_ALT + *self == Pd14::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD14_A::SD_SLE_ALT + *self == Pd14::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD14_A::MD_ALT + *self == Pd14::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD14_A::WD_ALT + *self == Pd14::WdAlt } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -845,136 +845,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SLE) + self.variant(Pd14::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE_ALT) + self.variant(Pd14::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SLE_ALT) + self.variant(Pd14::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::MD_ALT) + self.variant(Pd14::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::WD_ALT) + self.variant(Pd14::WdAlt) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD15_A { + pub const fn variant(&self) -> Pd15 { match self.bits { - 2 => PD15_A::SD_SOE, - 3 => PD15_A::SD_SLE, - 4 => PD15_A::MD, - 7 => PD15_A::WD, - 0 => PD15_A::SD_SOE_ALT, - 1 => PD15_A::SD_SLE_ALT, - 6 => PD15_A::MD_ALT, - 5 => PD15_A::WD_ALT, + 2 => Pd15::SdSoe, + 3 => Pd15::SdSle, + 4 => Pd15::Md, + 7 => Pd15::Wd, + 0 => Pd15::SdSoeAlt, + 1 => Pd15::SdSleAlt, + 6 => Pd15::MdAlt, + 5 => Pd15::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD15_A::SD_SLE + *self == Pd15::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD15_A::SD_SOE_ALT + *self == Pd15::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD15_A::SD_SLE_ALT + *self == Pd15::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD15_A::MD_ALT + *self == Pd15::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD15_A::WD_ALT + *self == Pd15::WdAlt } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,159 +982,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SLE) + self.variant(Pd15::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE_ALT) + self.variant(Pd15::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SLE_ALT) + self.variant(Pd15::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::MD_ALT) + self.variant(Pd15::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::WD_ALT) + self.variant(Pd15::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port0/pps.rs b/src/port0/pps.rs index 1dac5c6d..e2d13c7a 100644 --- a/src/port0/pps.rs +++ b/src/port0/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1.rs b/src/port1.rs index c942855f..116a6fe8 100644 --- a/src/port1.rs +++ b/src/port1.rs @@ -1,143 +1,155 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved9: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved10: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 1 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 1 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 1 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 1 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 1 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 1 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 1 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 1 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 1 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 1 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 1 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 1 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 1 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 1 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 1 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 1 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 1 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 1 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port1/hwsel.rs b/src/port1/hwsel.rs index 730877f2..9170b22d 100644 --- a/src/port1/hwsel.rs +++ b/src/port1/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/in_.rs b/src/port1/in_.rs index d04688ae..ea1dadc5 100644 --- a/src/port1/in_.rs +++ b/src/port1/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr0.rs b/src/port1/iocr0.rs index 301ac723..3b6dfd9a 100644 --- a/src/port1/iocr0.rs +++ b/src/port1/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr12.rs b/src/port1/iocr12.rs index 344f1232..28458132 100644 --- a/src/port1/iocr12.rs +++ b/src/port1/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr4.rs b/src/port1/iocr4.rs index 461f60ae..80268d76 100644 --- a/src/port1/iocr4.rs +++ b/src/port1/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr8.rs b/src/port1/iocr8.rs index 62326e46..9a1dc896 100644 --- a/src/port1/iocr8.rs +++ b/src/port1/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/omr.rs b/src/port1/omr.rs index c0f02c4e..18af5420 100644 --- a/src/port1/omr.rs +++ b/src/port1/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/out.rs b/src/port1/out.rs index 9cea4950..8fd6c1b3 100644 --- a/src/port1/out.rs +++ b/src/port1/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/pdisc.rs b/src/port1/pdisc.rs index 87dd7758..5166640d 100644 --- a/src/port1/pdisc.rs +++ b/src/port1/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/pdr0.rs b/src/port1/pdr0.rs index bbbffddb..eadecfc6 100644 --- a/src/port1/pdr0.rs +++ b/src/port1/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,112 +238,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD2_A::SD_SHE), - 1 => Some(PD2_A::SD_MEE), - 2 => Some(PD2_A::SD_SOE), - 4 => Some(PD2_A::MD), - 7 => Some(PD2_A::WD), + 0 => Some(Pd2::SdShe), + 1 => Some(Pd2::SdMee), + 2 => Some(Pd2::SdSoe), + 4 => Some(Pd2::Md), + 7 => Some(Pd2::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD2_A::SD_SHE + *self == Pd2::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD2_A::SD_MEE + *self == Pd2::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -351,97 +351,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SHE) + self.variant(Pd2::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_MEE) + self.variant(Pd2::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -449,121 +449,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD4_A { + pub const fn variant(&self) -> Pd4 { match self.bits { - 2 => PD4_A::SD_SOE, - 3 => PD4_A::SD_SLE, - 4 => PD4_A::MD, - 7 => PD4_A::WD, - 0 => PD4_A::SD_SOE_ALT, - 1 => PD4_A::SD_SLE_ALT, - 6 => PD4_A::MD_ALT, - 5 => PD4_A::WD_ALT, + 2 => Pd4::SdSoe, + 3 => Pd4::SdSle, + 4 => Pd4::Md, + 7 => Pd4::Wd, + 0 => Pd4::SdSoeAlt, + 1 => Pd4::SdSleAlt, + 6 => Pd4::MdAlt, + 5 => Pd4::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD4_A::SD_SLE + *self == Pd4::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD4_A::SD_SOE_ALT + *self == Pd4::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD4_A::SD_SLE_ALT + *self == Pd4::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD4_A::MD_ALT + *self == Pd4::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD4_A::WD_ALT + *self == Pd4::WdAlt } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -571,136 +571,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE) + self.variant(Pd4::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE_ALT) + self.variant(Pd4::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE_ALT) + self.variant(Pd4::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::MD_ALT) + self.variant(Pd4::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::WD_ALT) + self.variant(Pd4::WdAlt) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD5_A { + pub const fn variant(&self) -> Pd5 { match self.bits { - 2 => PD5_A::SD_SOE, - 3 => PD5_A::SD_SLE, - 4 => PD5_A::MD, - 7 => PD5_A::WD, - 0 => PD5_A::SD_SOE_ALT, - 1 => PD5_A::SD_SLE_ALT, - 6 => PD5_A::MD_ALT, - 5 => PD5_A::WD_ALT, + 2 => Pd5::SdSoe, + 3 => Pd5::SdSle, + 4 => Pd5::Md, + 7 => Pd5::Wd, + 0 => Pd5::SdSoeAlt, + 1 => Pd5::SdSleAlt, + 6 => Pd5::MdAlt, + 5 => Pd5::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD5_A::SD_SLE + *self == Pd5::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD5_A::SD_SOE_ALT + *self == Pd5::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD5_A::SD_SLE_ALT + *self == Pd5::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD5_A::MD_ALT + *self == Pd5::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD5_A::WD_ALT + *self == Pd5::WdAlt } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -708,112 +708,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SLE) + self.variant(Pd5::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE_ALT) + self.variant(Pd5::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SLE_ALT) + self.variant(Pd5::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::MD_ALT) + self.variant(Pd5::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::WD_ALT) + self.variant(Pd5::WdAlt) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -821,97 +821,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD7_A::SD_SHE), - 1 => Some(PD7_A::SD_MEE), - 2 => Some(PD7_A::SD_SOE), - 4 => Some(PD7_A::MD), - 7 => Some(PD7_A::WD), + 0 => Some(Pd7::SdShe), + 1 => Some(Pd7::SdMee), + 2 => Some(Pd7::SdSoe), + 4 => Some(Pd7::Md), + 7 => Some(Pd7::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD7_A::SD_SHE + *self == Pd7::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD7_A::SD_MEE + *self == Pd7::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -919,144 +919,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SHE) + self.variant(Pd7::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_MEE) + self.variant(Pd7::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port1/pdr1.rs b/src/port1/pdr1.rs index 391b2ec2..7271f783 100644 --- a/src/port1/pdr1.rs +++ b/src/port1/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,112 +434,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port1/pps.rs b/src/port1/pps.rs index 6d078440..24cb868c 100644 --- a/src/port1/pps.rs +++ b/src/port1/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14.rs b/src/port14.rs index 3cf0ed06..f30c3235 100644 --- a/src/port14.rs +++ b/src/port14.rs @@ -1,120 +1,130 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x38], - pdisc: PDISC, + pdisc: Pdisc, _reserved8: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 14 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 14 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 14 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 14 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 14 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 14 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 14 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x60 - Port 14 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 14 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 14 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 14 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 14 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 14 Input Register"] pub mod in_; #[doc = "PDISC (rw) register accessor: Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 14 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 14 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 14 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port14/hwsel.rs b/src/port14/hwsel.rs index 7acddfd9..e2ac5a2b 100644 --- a/src/port14/hwsel.rs +++ b/src/port14/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/in_.rs b/src/port14/in_.rs index b54c66f9..f2dd9254 100644 --- a/src/port14/in_.rs +++ b/src/port14/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr0.rs b/src/port14/iocr0.rs index 303b54b3..b9cb7032 100644 --- a/src/port14/iocr0.rs +++ b/src/port14/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr12.rs b/src/port14/iocr12.rs index 733b081d..51767db0 100644 --- a/src/port14/iocr12.rs +++ b/src/port14/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr4.rs b/src/port14/iocr4.rs index 7197e89b..406d783c 100644 --- a/src/port14/iocr4.rs +++ b/src/port14/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr8.rs b/src/port14/iocr8.rs index d320dcdd..93a1c2cd 100644 --- a/src/port14/iocr8.rs +++ b/src/port14/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/omr.rs b/src/port14/omr.rs index ab2962f4..926bbcc6 100644 --- a/src/port14/omr.rs +++ b/src/port14/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/out.rs b/src/port14/out.rs index 951eebe6..425169f3 100644 --- a/src/port14/out.rs +++ b/src/port14/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/pdisc.rs b/src/port14/pdisc.rs index 027f176e..9e3826a0 100644 --- a/src/port14/pdisc.rs +++ b/src/port14/pdisc.rs @@ -1,930 +1,921 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDISC` writer"] -pub type W = crate::W; -#[doc = "Field `PDIS0` reader - Pad Disable for Port 14 Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Pad Disable for Port 14 Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 analog input 0 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port 14 Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad is disabled, ADC 0 analog input 0 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } #[doc = "Field `PDIS0` writer - Pad Disable for Port 14 Pin 0"] -pub type PDIS0_W<'a, REG> = crate::BitWriter<'a, REG, PDIS0_A>; -impl<'a, REG> PDIS0_W<'a, REG> +pub type Pdis0W<'a, REG> = crate::BitWriter<'a, REG, Pdis0>; +impl<'a, REG> Pdis0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS0_A::VALUE1) + self.variant(Pdis0::Value1) } #[doc = "Pad is disabled, ADC 0 analog input 0 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS0_A::VALUE2) + self.variant(Pdis0::Value2) } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port 14 Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 analog input 1 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port 14 Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad is disabled, ADC 0 analog input 1 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } #[doc = "Field `PDIS1` writer - Pad Disable for Port 14 Pin 1"] -pub type PDIS1_W<'a, REG> = crate::BitWriter<'a, REG, PDIS1_A>; -impl<'a, REG> PDIS1_W<'a, REG> +pub type Pdis1W<'a, REG> = crate::BitWriter<'a, REG, Pdis1>; +impl<'a, REG> Pdis1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS1_A::VALUE1) + self.variant(Pdis1::Value1) } #[doc = "Pad is disabled, ADC 0 analog input 1 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS1_A::VALUE2) + self.variant(Pdis1::Value2) } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port 14 Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 and ADC 1 analog input 2 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port 14 Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad is disabled, ADC 0 and ADC 1 analog input 2 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } #[doc = "Field `PDIS2` writer - Pad Disable for Port 14 Pin 2"] -pub type PDIS2_W<'a, REG> = crate::BitWriter<'a, REG, PDIS2_A>; -impl<'a, REG> PDIS2_W<'a, REG> +pub type Pdis2W<'a, REG> = crate::BitWriter<'a, REG, Pdis2>; +impl<'a, REG> Pdis2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS2_A::VALUE1) + self.variant(Pdis2::Value1) } #[doc = "Pad is disabled, ADC 0 and ADC 1 analog input 2 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS2_A::VALUE2) + self.variant(Pdis2::Value2) } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port 14 Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 and ADC 1 analog input 3 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port 14 Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad is disabled, ADC 0 and ADC 1 analog input 3 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } #[doc = "Field `PDIS3` writer - Pad Disable for Port 14 Pin 3"] -pub type PDIS3_W<'a, REG> = crate::BitWriter<'a, REG, PDIS3_A>; -impl<'a, REG> PDIS3_W<'a, REG> +pub type Pdis3W<'a, REG> = crate::BitWriter<'a, REG, Pdis3>; +impl<'a, REG> Pdis3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS3_A::VALUE1) + self.variant(Pdis3::Value1) } #[doc = "Pad is disabled, ADC 0 and ADC 1 analog input 3 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS3_A::VALUE2) + self.variant(Pdis3::Value2) } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port 14 Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 analog input 4 and ADC 2 analog input 0 and DAC Reference selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port 14 Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad is disabled, ADC 0 analog input 4 and ADC 2 analog input 0 and DAC Reference selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } #[doc = "Field `PDIS4` writer - Pad Disable for Port 14 Pin 4"] -pub type PDIS4_W<'a, REG> = crate::BitWriter<'a, REG, PDIS4_A>; -impl<'a, REG> PDIS4_W<'a, REG> +pub type Pdis4W<'a, REG> = crate::BitWriter<'a, REG, Pdis4>; +impl<'a, REG> Pdis4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS4_A::VALUE1) + self.variant(Pdis4::Value1) } #[doc = "Pad is disabled, ADC 0 analog input 4 and ADC 2 analog input 0 and DAC Reference selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS4_A::VALUE2) + self.variant(Pdis4::Value2) } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port 14 Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 analog input 5 and ADC 2 analog input 1 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port 14 Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad is disabled, ADC 0 analog input 5 and ADC 2 analog input 1 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } #[doc = "Field `PDIS5` writer - Pad Disable for Port 14 Pin 5"] -pub type PDIS5_W<'a, REG> = crate::BitWriter<'a, REG, PDIS5_A>; -impl<'a, REG> PDIS5_W<'a, REG> +pub type Pdis5W<'a, REG> = crate::BitWriter<'a, REG, Pdis5>; +impl<'a, REG> Pdis5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS5_A::VALUE1) + self.variant(Pdis5::Value1) } #[doc = "Pad is disabled, ADC 0 analog input 5 and ADC 2 analog input 1 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS5_A::VALUE2) + self.variant(Pdis5::Value2) } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port 14 Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 0 analog input 6 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port 14 Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad is disabled, ADC 0 analog input 6 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } #[doc = "Field `PDIS6` writer - Pad Disable for Port 14 Pin 6"] -pub type PDIS6_W<'a, REG> = crate::BitWriter<'a, REG, PDIS6_A>; -impl<'a, REG> PDIS6_W<'a, REG> +pub type Pdis6W<'a, REG> = crate::BitWriter<'a, REG, Pdis6>; +impl<'a, REG> Pdis6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS6_A::VALUE1) + self.variant(Pdis6::Value1) } #[doc = "Pad is disabled, ADC 0 analog input 6 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS6_A::VALUE2) + self.variant(Pdis6::Value2) } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port 14 Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC0 analog input 7 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port 14 Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad is disabled, ADC0 analog input 7 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } #[doc = "Field `PDIS7` writer - Pad Disable for Port 14 Pin 7"] -pub type PDIS7_W<'a, REG> = crate::BitWriter<'a, REG, PDIS7_A>; -impl<'a, REG> PDIS7_W<'a, REG> +pub type Pdis7W<'a, REG> = crate::BitWriter<'a, REG, Pdis7>; +impl<'a, REG> Pdis7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS7_A::VALUE1) + self.variant(Pdis7::Value1) } #[doc = "Pad is disabled, ADC0 analog input 7 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS7_A::VALUE2) + self.variant(Pdis7::Value2) } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port 14 Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 0 and ADC 2 analog input 4 and DAC output 0 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port 14 Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 0 and ADC 2 analog input 4 and DAC output 0 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } #[doc = "Field `PDIS8` writer - Pad Disable for Port 14 Pin 8"] -pub type PDIS8_W<'a, REG> = crate::BitWriter<'a, REG, PDIS8_A>; -impl<'a, REG> PDIS8_W<'a, REG> +pub type Pdis8W<'a, REG> = crate::BitWriter<'a, REG, Pdis8>; +impl<'a, REG> Pdis8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS8_A::VALUE1) + self.variant(Pdis8::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 0 and ADC 2 analog input 4 and DAC output 0 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS8_A::VALUE2) + self.variant(Pdis8::Value2) } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port 14 Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 1 and ADC 2 analog input 5 and DAC output 1 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port 14 Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 1 and ADC 2 analog input 5 and DAC output 1 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } #[doc = "Field `PDIS9` writer - Pad Disable for Port 14 Pin 9"] -pub type PDIS9_W<'a, REG> = crate::BitWriter<'a, REG, PDIS9_A>; -impl<'a, REG> PDIS9_W<'a, REG> +pub type Pdis9W<'a, REG> = crate::BitWriter<'a, REG, Pdis9>; +impl<'a, REG> Pdis9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS9_A::VALUE1) + self.variant(Pdis9::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 1 and ADC 2 analog input 5 and DAC output 1 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS9_A::VALUE2) + self.variant(Pdis9::Value2) } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port 14 Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 4 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port 14 Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 4 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } #[doc = "Field `PDIS12` writer - Pad Disable for Port 14 Pin 12"] -pub type PDIS12_W<'a, REG> = crate::BitWriter<'a, REG, PDIS12_A>; -impl<'a, REG> PDIS12_W<'a, REG> +pub type Pdis12W<'a, REG> = crate::BitWriter<'a, REG, Pdis12>; +impl<'a, REG> Pdis12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS12_A::VALUE1) + self.variant(Pdis12::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 4 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS12_A::VALUE2) + self.variant(Pdis12::Value2) } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port 14 Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 5 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port 14 Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 5 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } #[doc = "Field `PDIS13` writer - Pad Disable for Port 14 Pin 13"] -pub type PDIS13_W<'a, REG> = crate::BitWriter<'a, REG, PDIS13_A>; -impl<'a, REG> PDIS13_W<'a, REG> +pub type Pdis13W<'a, REG> = crate::BitWriter<'a, REG, Pdis13>; +impl<'a, REG> Pdis13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS13_A::VALUE1) + self.variant(Pdis13::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 5 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS13_A::VALUE2) + self.variant(Pdis13::Value2) } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port 14 Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 6 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port 14 Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 6 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } #[doc = "Field `PDIS14` writer - Pad Disable for Port 14 Pin 14"] -pub type PDIS14_W<'a, REG> = crate::BitWriter<'a, REG, PDIS14_A>; -impl<'a, REG> PDIS14_W<'a, REG> +pub type Pdis14W<'a, REG> = crate::BitWriter<'a, REG, Pdis14>; +impl<'a, REG> Pdis14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS14_A::VALUE1) + self.variant(Pdis14::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 6 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS14_A::VALUE2) + self.variant(Pdis14::Value2) } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port 14 Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port 14 Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 1 analog input 7 selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port 14 Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad is disabled, ADC 1 analog input 7 selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } #[doc = "Field `PDIS15` writer - Pad Disable for Port 14 Pin 15"] -pub type PDIS15_W<'a, REG> = crate::BitWriter<'a, REG, PDIS15_A>; -impl<'a, REG> PDIS15_W<'a, REG> +pub type Pdis15W<'a, REG> = crate::BitWriter<'a, REG, Pdis15>; +impl<'a, REG> Pdis15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS15_A::VALUE1) + self.variant(Pdis15::Value1) } #[doc = "Pad is disabled, ADC 1 analog input 7 selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS15_A::VALUE2) + self.variant(Pdis15::Value2) } } impl R { #[doc = "Bit 0 - Pad Disable for Port 14 Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port 14 Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port 14 Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port 14 Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port 14 Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port 14 Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port 14 Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port 14 Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port 14 Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port 14 Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port 14 Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port 14 Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port 14 Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port 14 Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Pad Disable for Port 14 Pin 0"] #[inline(always)] #[must_use] - pub fn pdis0(&mut self) -> PDIS0_W { - PDIS0_W::new(self, 0) + pub fn pdis0(&mut self) -> Pdis0W { + Pdis0W::new(self, 0) } #[doc = "Bit 1 - Pad Disable for Port 14 Pin 1"] #[inline(always)] #[must_use] - pub fn pdis1(&mut self) -> PDIS1_W { - PDIS1_W::new(self, 1) + pub fn pdis1(&mut self) -> Pdis1W { + Pdis1W::new(self, 1) } #[doc = "Bit 2 - Pad Disable for Port 14 Pin 2"] #[inline(always)] #[must_use] - pub fn pdis2(&mut self) -> PDIS2_W { - PDIS2_W::new(self, 2) + pub fn pdis2(&mut self) -> Pdis2W { + Pdis2W::new(self, 2) } #[doc = "Bit 3 - Pad Disable for Port 14 Pin 3"] #[inline(always)] #[must_use] - pub fn pdis3(&mut self) -> PDIS3_W { - PDIS3_W::new(self, 3) + pub fn pdis3(&mut self) -> Pdis3W { + Pdis3W::new(self, 3) } #[doc = "Bit 4 - Pad Disable for Port 14 Pin 4"] #[inline(always)] #[must_use] - pub fn pdis4(&mut self) -> PDIS4_W { - PDIS4_W::new(self, 4) + pub fn pdis4(&mut self) -> Pdis4W { + Pdis4W::new(self, 4) } #[doc = "Bit 5 - Pad Disable for Port 14 Pin 5"] #[inline(always)] #[must_use] - pub fn pdis5(&mut self) -> PDIS5_W { - PDIS5_W::new(self, 5) + pub fn pdis5(&mut self) -> Pdis5W { + Pdis5W::new(self, 5) } #[doc = "Bit 6 - Pad Disable for Port 14 Pin 6"] #[inline(always)] #[must_use] - pub fn pdis6(&mut self) -> PDIS6_W { - PDIS6_W::new(self, 6) + pub fn pdis6(&mut self) -> Pdis6W { + Pdis6W::new(self, 6) } #[doc = "Bit 7 - Pad Disable for Port 14 Pin 7"] #[inline(always)] #[must_use] - pub fn pdis7(&mut self) -> PDIS7_W { - PDIS7_W::new(self, 7) + pub fn pdis7(&mut self) -> Pdis7W { + Pdis7W::new(self, 7) } #[doc = "Bit 8 - Pad Disable for Port 14 Pin 8"] #[inline(always)] #[must_use] - pub fn pdis8(&mut self) -> PDIS8_W { - PDIS8_W::new(self, 8) + pub fn pdis8(&mut self) -> Pdis8W { + Pdis8W::new(self, 8) } #[doc = "Bit 9 - Pad Disable for Port 14 Pin 9"] #[inline(always)] #[must_use] - pub fn pdis9(&mut self) -> PDIS9_W { - PDIS9_W::new(self, 9) + pub fn pdis9(&mut self) -> Pdis9W { + Pdis9W::new(self, 9) } #[doc = "Bit 12 - Pad Disable for Port 14 Pin 12"] #[inline(always)] #[must_use] - pub fn pdis12(&mut self) -> PDIS12_W { - PDIS12_W::new(self, 12) + pub fn pdis12(&mut self) -> Pdis12W { + Pdis12W::new(self, 12) } #[doc = "Bit 13 - Pad Disable for Port 14 Pin 13"] #[inline(always)] #[must_use] - pub fn pdis13(&mut self) -> PDIS13_W { - PDIS13_W::new(self, 13) + pub fn pdis13(&mut self) -> Pdis13W { + Pdis13W::new(self, 13) } #[doc = "Bit 14 - Pad Disable for Port 14 Pin 14"] #[inline(always)] #[must_use] - pub fn pdis14(&mut self) -> PDIS14_W { - PDIS14_W::new(self, 14) + pub fn pdis14(&mut self) -> Pdis14W { + Pdis14W::new(self, 14) } #[doc = "Bit 15 - Pad Disable for Port 14 Pin 15"] #[inline(always)] #[must_use] - pub fn pdis15(&mut self) -> PDIS15_W { - PDIS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pdis15(&mut self) -> Pdis15W { + Pdis15W::new(self, 15) } } #[doc = "Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`write(|w| ..)` method takes [`pdisc::W`](W) writer structure"] -impl crate::Writable for PDISC_SPEC { +impl crate::Writable for PdiscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/pps.rs b/src/port14/pps.rs index 2fb649d5..191bfda0 100644 --- a/src/port14/pps.rs +++ b/src/port14/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15.rs b/src/port15.rs index 8fb3c4ff..8bed3273 100644 --- a/src/port15.rs +++ b/src/port15.rs @@ -1,120 +1,130 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x38], - pdisc: PDISC, + pdisc: Pdisc, _reserved8: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 15 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 15 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 15 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 15 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 15 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 15 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 15 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x60 - Port 15 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 15 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 15 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 15 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 15 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 15 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 15 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 15 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 15 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 15 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 15 Input Register"] pub mod in_; #[doc = "PDISC (rw) register accessor: Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 15 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 15 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 15 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 15 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port15/hwsel.rs b/src/port15/hwsel.rs index a0e36fcf..a49695cc 100644 --- a/src/port15/hwsel.rs +++ b/src/port15/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 15 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/in_.rs b/src/port15/in_.rs index 305bc4f9..ffb34aac 100644 --- a/src/port15/in_.rs +++ b/src/port15/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 15 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/iocr0.rs b/src/port15/iocr0.rs index aea31735..b2c24519 100644 --- a/src/port15/iocr0.rs +++ b/src/port15/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 15 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/iocr12.rs b/src/port15/iocr12.rs index 5b92780d..80f7456c 100644 --- a/src/port15/iocr12.rs +++ b/src/port15/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 15 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/iocr4.rs b/src/port15/iocr4.rs index 813a7e78..3f9aaaf4 100644 --- a/src/port15/iocr4.rs +++ b/src/port15/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 15 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/iocr8.rs b/src/port15/iocr8.rs index 40d9f2d9..6b66d3b3 100644 --- a/src/port15/iocr8.rs +++ b/src/port15/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 15 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/omr.rs b/src/port15/omr.rs index 5bdc7b8a..7de5ca20 100644 --- a/src/port15/omr.rs +++ b/src/port15/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 15 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/out.rs b/src/port15/out.rs index 3241325d..bbdd9681 100644 --- a/src/port15/out.rs +++ b/src/port15/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 15 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/pdisc.rs b/src/port15/pdisc.rs index 12851ab6..711c7c0e 100644 --- a/src/port15/pdisc.rs +++ b/src/port15/pdisc.rs @@ -1,802 +1,793 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDISC` writer"] -pub type W = crate::W; -#[doc = "Field `PDIS2` reader - Pad Disable for Port 15 Pin 2"] -pub type PDIS2_R = crate::BitReader; +pub type W = crate::W; #[doc = "Pad Disable for Port 15 Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 2."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port 15 Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } #[doc = "Field `PDIS2` writer - Pad Disable for Port 15 Pin 2"] -pub type PDIS2_W<'a, REG> = crate::BitWriter<'a, REG, PDIS2_A>; -impl<'a, REG> PDIS2_W<'a, REG> +pub type Pdis2W<'a, REG> = crate::BitWriter<'a, REG, Pdis2>; +impl<'a, REG> Pdis2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS2_A::VALUE1) + self.variant(Pdis2::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS2_A::VALUE2) + self.variant(Pdis2::Value2) } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port 15 Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 3."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port 15 Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 3."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } #[doc = "Field `PDIS3` writer - Pad Disable for Port 15 Pin 3"] -pub type PDIS3_W<'a, REG> = crate::BitWriter<'a, REG, PDIS3_A>; -impl<'a, REG> PDIS3_W<'a, REG> +pub type Pdis3W<'a, REG> = crate::BitWriter<'a, REG, Pdis3>; +impl<'a, REG> Pdis3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS3_A::VALUE1) + self.variant(Pdis3::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 3."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS3_A::VALUE2) + self.variant(Pdis3::Value2) } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port 15 Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 4."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port 15 Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 4."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } #[doc = "Field `PDIS4` writer - Pad Disable for Port 15 Pin 4"] -pub type PDIS4_W<'a, REG> = crate::BitWriter<'a, REG, PDIS4_A>; -impl<'a, REG> PDIS4_W<'a, REG> +pub type Pdis4W<'a, REG> = crate::BitWriter<'a, REG, Pdis4>; +impl<'a, REG> Pdis4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS4_A::VALUE1) + self.variant(Pdis4::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 4."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS4_A::VALUE2) + self.variant(Pdis4::Value2) } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port 15 Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 5."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port 15 Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 5."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } #[doc = "Field `PDIS5` writer - Pad Disable for Port 15 Pin 5"] -pub type PDIS5_W<'a, REG> = crate::BitWriter<'a, REG, PDIS5_A>; -impl<'a, REG> PDIS5_W<'a, REG> +pub type Pdis5W<'a, REG> = crate::BitWriter<'a, REG, Pdis5>; +impl<'a, REG> Pdis5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS5_A::VALUE1) + self.variant(Pdis5::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 5."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS5_A::VALUE2) + self.variant(Pdis5::Value2) } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port 15 Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 6."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port 15 Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 6."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } #[doc = "Field `PDIS6` writer - Pad Disable for Port 15 Pin 6"] -pub type PDIS6_W<'a, REG> = crate::BitWriter<'a, REG, PDIS6_A>; -impl<'a, REG> PDIS6_W<'a, REG> +pub type Pdis6W<'a, REG> = crate::BitWriter<'a, REG, Pdis6>; +impl<'a, REG> Pdis6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS6_A::VALUE1) + self.variant(Pdis6::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 6."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS6_A::VALUE2) + self.variant(Pdis6::Value2) } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port 15 Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 2 analog input 7."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port 15 Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad is disabled, ADC 2 analog input 7."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } #[doc = "Field `PDIS7` writer - Pad Disable for Port 15 Pin 7"] -pub type PDIS7_W<'a, REG> = crate::BitWriter<'a, REG, PDIS7_A>; -impl<'a, REG> PDIS7_W<'a, REG> +pub type Pdis7W<'a, REG> = crate::BitWriter<'a, REG, Pdis7>; +impl<'a, REG> Pdis7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS7_A::VALUE1) + self.variant(Pdis7::Value1) } #[doc = "Pad is disabled, ADC 2 analog input 7."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS7_A::VALUE2) + self.variant(Pdis7::Value2) } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port 15 Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port 15 Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } #[doc = "Field `PDIS8` writer - Pad Disable for Port 15 Pin 8"] -pub type PDIS8_W<'a, REG> = crate::BitWriter<'a, REG, PDIS8_A>; -impl<'a, REG> PDIS8_W<'a, REG> +pub type Pdis8W<'a, REG> = crate::BitWriter<'a, REG, Pdis8>; +impl<'a, REG> Pdis8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS8_A::VALUE1) + self.variant(Pdis8::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS8_A::VALUE2) + self.variant(Pdis8::Value2) } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port 15 Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port 15 Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } #[doc = "Field `PDIS9` writer - Pad Disable for Port 15 Pin 9"] -pub type PDIS9_W<'a, REG> = crate::BitWriter<'a, REG, PDIS9_A>; -impl<'a, REG> PDIS9_W<'a, REG> +pub type Pdis9W<'a, REG> = crate::BitWriter<'a, REG, Pdis9>; +impl<'a, REG> Pdis9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS9_A::VALUE1) + self.variant(Pdis9::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS9_A::VALUE2) + self.variant(Pdis9::Value2) } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port 15 Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 4."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port 15 Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 4."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } #[doc = "Field `PDIS12` writer - Pad Disable for Port 15 Pin 12"] -pub type PDIS12_W<'a, REG> = crate::BitWriter<'a, REG, PDIS12_A>; -impl<'a, REG> PDIS12_W<'a, REG> +pub type Pdis12W<'a, REG> = crate::BitWriter<'a, REG, Pdis12>; +impl<'a, REG> Pdis12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS12_A::VALUE1) + self.variant(Pdis12::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 4."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS12_A::VALUE2) + self.variant(Pdis12::Value2) } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port 15 Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 5."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port 15 Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 5."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } #[doc = "Field `PDIS13` writer - Pad Disable for Port 15 Pin 13"] -pub type PDIS13_W<'a, REG> = crate::BitWriter<'a, REG, PDIS13_A>; -impl<'a, REG> PDIS13_W<'a, REG> +pub type Pdis13W<'a, REG> = crate::BitWriter<'a, REG, Pdis13>; +impl<'a, REG> Pdis13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS13_A::VALUE1) + self.variant(Pdis13::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 5."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS13_A::VALUE2) + self.variant(Pdis13::Value2) } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port 15 Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 6."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port 15 Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 6."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } #[doc = "Field `PDIS14` writer - Pad Disable for Port 15 Pin 14"] -pub type PDIS14_W<'a, REG> = crate::BitWriter<'a, REG, PDIS14_A>; -impl<'a, REG> PDIS14_W<'a, REG> +pub type Pdis14W<'a, REG> = crate::BitWriter<'a, REG, Pdis14>; +impl<'a, REG> Pdis14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS14_A::VALUE1) + self.variant(Pdis14::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 6."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS14_A::VALUE2) + self.variant(Pdis14::Value2) } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port 15 Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port 15 Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad is enabled, digital input selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad is disabled, ADC 3 analog input 7."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port 15 Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad is disabled, ADC 3 analog input 7."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } #[doc = "Field `PDIS15` writer - Pad Disable for Port 15 Pin 15"] -pub type PDIS15_W<'a, REG> = crate::BitWriter<'a, REG, PDIS15_A>; -impl<'a, REG> PDIS15_W<'a, REG> +pub type Pdis15W<'a, REG> = crate::BitWriter<'a, REG, Pdis15>; +impl<'a, REG> Pdis15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pad is enabled, digital input selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDIS15_A::VALUE1) + self.variant(Pdis15::Value1) } #[doc = "Pad is disabled, ADC 3 analog input 7."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDIS15_A::VALUE2) + self.variant(Pdis15::Value2) } } impl R { #[doc = "Bit 2 - Pad Disable for Port 15 Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port 15 Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port 15 Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port 15 Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port 15 Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port 15 Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port 15 Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port 15 Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port 15 Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port 15 Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port 15 Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port 15 Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 2 - Pad Disable for Port 15 Pin 2"] #[inline(always)] #[must_use] - pub fn pdis2(&mut self) -> PDIS2_W { - PDIS2_W::new(self, 2) + pub fn pdis2(&mut self) -> Pdis2W { + Pdis2W::new(self, 2) } #[doc = "Bit 3 - Pad Disable for Port 15 Pin 3"] #[inline(always)] #[must_use] - pub fn pdis3(&mut self) -> PDIS3_W { - PDIS3_W::new(self, 3) + pub fn pdis3(&mut self) -> Pdis3W { + Pdis3W::new(self, 3) } #[doc = "Bit 4 - Pad Disable for Port 15 Pin 4"] #[inline(always)] #[must_use] - pub fn pdis4(&mut self) -> PDIS4_W { - PDIS4_W::new(self, 4) + pub fn pdis4(&mut self) -> Pdis4W { + Pdis4W::new(self, 4) } #[doc = "Bit 5 - Pad Disable for Port 15 Pin 5"] #[inline(always)] #[must_use] - pub fn pdis5(&mut self) -> PDIS5_W { - PDIS5_W::new(self, 5) + pub fn pdis5(&mut self) -> Pdis5W { + Pdis5W::new(self, 5) } #[doc = "Bit 6 - Pad Disable for Port 15 Pin 6"] #[inline(always)] #[must_use] - pub fn pdis6(&mut self) -> PDIS6_W { - PDIS6_W::new(self, 6) + pub fn pdis6(&mut self) -> Pdis6W { + Pdis6W::new(self, 6) } #[doc = "Bit 7 - Pad Disable for Port 15 Pin 7"] #[inline(always)] #[must_use] - pub fn pdis7(&mut self) -> PDIS7_W { - PDIS7_W::new(self, 7) + pub fn pdis7(&mut self) -> Pdis7W { + Pdis7W::new(self, 7) } #[doc = "Bit 8 - Pad Disable for Port 15 Pin 8"] #[inline(always)] #[must_use] - pub fn pdis8(&mut self) -> PDIS8_W { - PDIS8_W::new(self, 8) + pub fn pdis8(&mut self) -> Pdis8W { + Pdis8W::new(self, 8) } #[doc = "Bit 9 - Pad Disable for Port 15 Pin 9"] #[inline(always)] #[must_use] - pub fn pdis9(&mut self) -> PDIS9_W { - PDIS9_W::new(self, 9) + pub fn pdis9(&mut self) -> Pdis9W { + Pdis9W::new(self, 9) } #[doc = "Bit 12 - Pad Disable for Port 15 Pin 12"] #[inline(always)] #[must_use] - pub fn pdis12(&mut self) -> PDIS12_W { - PDIS12_W::new(self, 12) + pub fn pdis12(&mut self) -> Pdis12W { + Pdis12W::new(self, 12) } #[doc = "Bit 13 - Pad Disable for Port 15 Pin 13"] #[inline(always)] #[must_use] - pub fn pdis13(&mut self) -> PDIS13_W { - PDIS13_W::new(self, 13) + pub fn pdis13(&mut self) -> Pdis13W { + Pdis13W::new(self, 13) } #[doc = "Bit 14 - Pad Disable for Port 15 Pin 14"] #[inline(always)] #[must_use] - pub fn pdis14(&mut self) -> PDIS14_W { - PDIS14_W::new(self, 14) + pub fn pdis14(&mut self) -> Pdis14W { + Pdis14W::new(self, 14) } #[doc = "Bit 15 - Pad Disable for Port 15 Pin 15"] #[inline(always)] #[must_use] - pub fn pdis15(&mut self) -> PDIS15_W { - PDIS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pdis15(&mut self) -> Pdis15W { + Pdis15W::new(self, 15) } } #[doc = "Port 15 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`write(|w| ..)` method takes [`pdisc::W`](W) writer structure"] -impl crate::Writable for PDISC_SPEC { +impl crate::Writable for PdiscSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port15/pps.rs b/src/port15/pps.rs index 959cf207..da202941 100644 --- a/src/port15/pps.rs +++ b/src/port15/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 15 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2.rs b/src/port2.rs index 69ed69a2..752a56ca 100644 --- a/src/port2.rs +++ b/src/port2.rs @@ -1,143 +1,155 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved9: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved10: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 2 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 2 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 2 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 2 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 2 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 2 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 2 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 2 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 2 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 2 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 2 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 2 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 2 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 2 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 2 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 2 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 2 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 2 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port2/hwsel.rs b/src/port2/hwsel.rs index 7fd67a7c..c9ab7146 100644 --- a/src/port2/hwsel.rs +++ b/src/port2/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0x04"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/port2/in_.rs b/src/port2/in_.rs index 8efeb063..59550897 100644 --- a/src/port2/in_.rs +++ b/src/port2/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr0.rs b/src/port2/iocr0.rs index fc01e7ca..ecf8d767 100644 --- a/src/port2/iocr0.rs +++ b/src/port2/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr12.rs b/src/port2/iocr12.rs index 27286cb4..3b7c32c8 100644 --- a/src/port2/iocr12.rs +++ b/src/port2/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr4.rs b/src/port2/iocr4.rs index 1358d2e0..f3363e1a 100644 --- a/src/port2/iocr4.rs +++ b/src/port2/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr8.rs b/src/port2/iocr8.rs index 14951e9f..d1987079 100644 --- a/src/port2/iocr8.rs +++ b/src/port2/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/omr.rs b/src/port2/omr.rs index f59225ad..ad1c5bdc 100644 --- a/src/port2/omr.rs +++ b/src/port2/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/out.rs b/src/port2/out.rs index dbacd064..13276beb 100644 --- a/src/port2/out.rs +++ b/src/port2/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/pdisc.rs b/src/port2/pdisc.rs index 6ca44d17..7f09428f 100644 --- a/src/port2/pdisc.rs +++ b/src/port2/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/pdr0.rs b/src/port2/pdr0.rs index a79ac5b4..de09ab70 100644 --- a/src/port2/pdr0.rs +++ b/src/port2/pdr0.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD0_A::SD_SHE), - 1 => Some(PD0_A::SD_MEE), - 2 => Some(PD0_A::SD_SOE), - 4 => Some(PD0_A::MD), - 7 => Some(PD0_A::WD), + 0 => Some(Pd0::SdShe), + 1 => Some(Pd0::SdMee), + 2 => Some(Pd0::SdSoe), + 4 => Some(Pd0::Md), + 7 => Some(Pd0::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD0_A::SD_SHE + *self == Pd0::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD0_A::SD_MEE + *self == Pd0::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SHE) + self.variant(Pd0::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_MEE) + self.variant(Pd0::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD1_A::SD_SHE), - 1 => Some(PD1_A::SD_MEE), - 2 => Some(PD1_A::SD_SOE), - 4 => Some(PD1_A::MD), - 7 => Some(PD1_A::WD), + 0 => Some(Pd1::SdShe), + 1 => Some(Pd1::SdMee), + 2 => Some(Pd1::SdSoe), + 4 => Some(Pd1::Md), + 7 => Some(Pd1::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD1_A::SD_SHE + *self == Pd1::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD1_A::SD_MEE + *self == Pd1::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,97 +175,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SHE) + self.variant(Pd1::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_MEE) + self.variant(Pd1::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD2_A::SD_SHE), - 1 => Some(PD2_A::SD_MEE), - 2 => Some(PD2_A::SD_SOE), - 4 => Some(PD2_A::MD), - 7 => Some(PD2_A::WD), + 0 => Some(Pd2::SdShe), + 1 => Some(Pd2::SdMee), + 2 => Some(Pd2::SdSoe), + 4 => Some(Pd2::Md), + 7 => Some(Pd2::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD2_A::SD_SHE + *self == Pd2::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD2_A::SD_MEE + *self == Pd2::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,97 +273,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SHE) + self.variant(Pd2::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_MEE) + self.variant(Pd2::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -371,97 +371,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -469,97 +469,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -567,121 +567,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD6_A { + pub const fn variant(&self) -> Pd6 { match self.bits { - 2 => PD6_A::SD_SOE, - 3 => PD6_A::SD_SLE, - 4 => PD6_A::MD, - 7 => PD6_A::WD, - 0 => PD6_A::SD_SOE_ALT, - 1 => PD6_A::SD_SLE_ALT, - 6 => PD6_A::MD_ALT, - 5 => PD6_A::WD_ALT, + 2 => Pd6::SdSoe, + 3 => Pd6::SdSle, + 4 => Pd6::Md, + 7 => Pd6::Wd, + 0 => Pd6::SdSoeAlt, + 1 => Pd6::SdSleAlt, + 6 => Pd6::MdAlt, + 5 => Pd6::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD6_A::SD_SLE + *self == Pd6::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD6_A::SD_SOE_ALT + *self == Pd6::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD6_A::SD_SLE_ALT + *self == Pd6::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD6_A::MD_ALT + *self == Pd6::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD6_A::WD_ALT + *self == Pd6::WdAlt } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -689,136 +689,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SLE) + self.variant(Pd6::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE_ALT) + self.variant(Pd6::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SLE_ALT) + self.variant(Pd6::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::MD_ALT) + self.variant(Pd6::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::WD_ALT) + self.variant(Pd6::WdAlt) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -826,159 +826,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port2/pdr1.rs b/src/port2/pdr1.rs index 348319e6..72adb42d 100644 --- a/src/port2/pdr1.rs +++ b/src/port2/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,97 +175,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD10_A::SD_SHE), - 1 => Some(PD10_A::SD_MEE), - 2 => Some(PD10_A::SD_SOE), - 4 => Some(PD10_A::MD), - 7 => Some(PD10_A::WD), + 0 => Some(Pd10::SdShe), + 1 => Some(Pd10::SdMee), + 2 => Some(Pd10::SdSoe), + 4 => Some(Pd10::Md), + 7 => Some(Pd10::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD10_A::SD_SHE + *self == Pd10::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD10_A::SD_MEE + *self == Pd10::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,97 +273,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SHE) + self.variant(Pd10::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_MEE) + self.variant(Pd10::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD11_A::SD_SHE), - 1 => Some(PD11_A::SD_MEE), - 2 => Some(PD11_A::SD_SOE), - 4 => Some(PD11_A::MD), - 7 => Some(PD11_A::WD), + 0 => Some(Pd11::SdShe), + 1 => Some(Pd11::SdMee), + 2 => Some(Pd11::SdSoe), + 4 => Some(Pd11::Md), + 7 => Some(Pd11::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD11_A::SD_SHE + *self == Pd11::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD11_A::SD_MEE + *self == Pd11::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -371,97 +371,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SHE) + self.variant(Pd11::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_MEE) + self.variant(Pd11::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -469,97 +469,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -567,97 +567,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -665,97 +665,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -763,144 +763,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port2/pps.rs b/src/port2/pps.rs index 127115f7..0afbdc5d 100644 --- a/src/port2/pps.rs +++ b/src/port2/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3.rs b/src/port3.rs index 73d34f1c..8ca35e46 100644 --- a/src/port3.rs +++ b/src/port3.rs @@ -1,143 +1,155 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, - iocr12: IOCR12, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, + iocr12: Iocr12, _reserved6: [u8; 0x04], - in_: IN, + in_: In, _reserved7: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved9: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved10: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 3 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 3 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 3 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 3 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 3 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x1c - Port 3 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &IOCR12 { + pub const fn iocr12(&self) -> &Iocr12 { &self.iocr12 } #[doc = "0x24 - Port 3 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 3 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 3 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 3 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 3 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 3 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 3 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 3 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 3 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 3 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -pub type IOCR12 = crate::Reg; +#[doc(alias = "IOCR12")] +pub type Iocr12 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 3 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 3 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 3 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 3 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 3 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 3 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 3 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port3/hwsel.rs b/src/port3/hwsel.rs index 1e63efa1..63e2c631 100644 --- a/src/port3/hwsel.rs +++ b/src/port3/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/in_.rs b/src/port3/in_.rs index 1138e173..5fd8a237 100644 --- a/src/port3/in_.rs +++ b/src/port3/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/iocr0.rs b/src/port3/iocr0.rs index 387ce49a..6abfc809 100644 --- a/src/port3/iocr0.rs +++ b/src/port3/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/iocr12.rs b/src/port3/iocr12.rs index 95947293..9cc73bdf 100644 --- a/src/port3/iocr12.rs +++ b/src/port3/iocr12.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; -#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type PC12_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC12_A { +pub enum Pc12 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC12_A) -> Self { + fn from(variant: Pc12) -> Self { variant as _ } } -impl crate::FieldSpec for PC12_A { +impl crate::FieldSpec for Pc12 { type Ux = u8; } -impl PC12_R { +#[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc12R = crate::FieldReader; +impl Pc12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC12_A::VALUE1), - 1 => Some(PC12_A::VALUE2), - 2 => Some(PC12_A::VALUE3), - 3 => Some(PC12_A::VALUE4), - 4 => Some(PC12_A::VALUE5), - 5 => Some(PC12_A::VALUE6), - 6 => Some(PC12_A::VALUE7), - 7 => Some(PC12_A::VALUE8), - 16 => Some(PC12_A::VALUE9), - 17 => Some(PC12_A::VALUE10), - 18 => Some(PC12_A::VALUE11), - 19 => Some(PC12_A::VALUE12), - 20 => Some(PC12_A::VALUE13), - 24 => Some(PC12_A::VALUE14), - 25 => Some(PC12_A::VALUE15), - 26 => Some(PC12_A::VALUE16), - 27 => Some(PC12_A::VALUE17), - 28 => Some(PC12_A::VALUE18), + 0 => Some(Pc12::Value1), + 1 => Some(Pc12::Value2), + 2 => Some(Pc12::Value3), + 3 => Some(Pc12::Value4), + 4 => Some(Pc12::Value5), + 5 => Some(Pc12::Value6), + 6 => Some(Pc12::Value7), + 7 => Some(Pc12::Value8), + 16 => Some(Pc12::Value9), + 17 => Some(Pc12::Value10), + 18 => Some(Pc12::Value11), + 19 => Some(Pc12::Value12), + 20 => Some(Pc12::Value13), + 24 => Some(Pc12::Value14), + 25 => Some(Pc12::Value15), + 26 => Some(Pc12::Value16), + 27 => Some(Pc12::Value17), + 28 => Some(Pc12::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC12_A::VALUE1 + *self == Pc12::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC12_A::VALUE2 + *self == Pc12::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC12_A::VALUE3 + *self == Pc12::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC12_A::VALUE4 + *self == Pc12::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC12_A::VALUE5 + *self == Pc12::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC12_A::VALUE6 + *self == Pc12::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC12_A::VALUE7 + *self == Pc12::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC12_A::VALUE8 + *self == Pc12::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC12_A::VALUE9 + *self == Pc12::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC12_A::VALUE10 + *self == Pc12::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC12_A::VALUE11 + *self == Pc12::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC12_A::VALUE12 + *self == Pc12::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC12_A::VALUE13 + *self == Pc12::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC12_A::VALUE14 + *self == Pc12::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC12_A::VALUE15 + *self == Pc12::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC12_A::VALUE16 + *self == Pc12::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC12_A::VALUE17 + *self == Pc12::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC12_A::VALUE18 + *self == Pc12::Value18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; -impl<'a, REG> PC12_W<'a, REG> +pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; +impl<'a, REG> Pc12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE1) + self.variant(Pc12::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE2) + self.variant(Pc12::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE3) + self.variant(Pc12::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE4) + self.variant(Pc12::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE5) + self.variant(Pc12::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE6) + self.variant(Pc12::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE7) + self.variant(Pc12::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE8) + self.variant(Pc12::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE9) + self.variant(Pc12::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE10) + self.variant(Pc12::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE11) + self.variant(Pc12::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE12) + self.variant(Pc12::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE13) + self.variant(Pc12::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE14) + self.variant(Pc12::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE15) + self.variant(Pc12::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE16) + self.variant(Pc12::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE17) + self.variant(Pc12::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC12_A::VALUE18) + self.variant(Pc12::Value18) } } -#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type PC13_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC13_A { +pub enum Pc13 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC13_A) -> Self { + fn from(variant: Pc13) -> Self { variant as _ } } -impl crate::FieldSpec for PC13_A { +impl crate::FieldSpec for Pc13 { type Ux = u8; } -impl PC13_R { +#[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc13R = crate::FieldReader; +impl Pc13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC13_A::VALUE1), - 1 => Some(PC13_A::VALUE2), - 2 => Some(PC13_A::VALUE3), - 3 => Some(PC13_A::VALUE4), - 4 => Some(PC13_A::VALUE5), - 5 => Some(PC13_A::VALUE6), - 6 => Some(PC13_A::VALUE7), - 7 => Some(PC13_A::VALUE8), - 16 => Some(PC13_A::VALUE9), - 17 => Some(PC13_A::VALUE10), - 18 => Some(PC13_A::VALUE11), - 19 => Some(PC13_A::VALUE12), - 20 => Some(PC13_A::VALUE13), - 24 => Some(PC13_A::VALUE14), - 25 => Some(PC13_A::VALUE15), - 26 => Some(PC13_A::VALUE16), - 27 => Some(PC13_A::VALUE17), - 28 => Some(PC13_A::VALUE18), + 0 => Some(Pc13::Value1), + 1 => Some(Pc13::Value2), + 2 => Some(Pc13::Value3), + 3 => Some(Pc13::Value4), + 4 => Some(Pc13::Value5), + 5 => Some(Pc13::Value6), + 6 => Some(Pc13::Value7), + 7 => Some(Pc13::Value8), + 16 => Some(Pc13::Value9), + 17 => Some(Pc13::Value10), + 18 => Some(Pc13::Value11), + 19 => Some(Pc13::Value12), + 20 => Some(Pc13::Value13), + 24 => Some(Pc13::Value14), + 25 => Some(Pc13::Value15), + 26 => Some(Pc13::Value16), + 27 => Some(Pc13::Value17), + 28 => Some(Pc13::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC13_A::VALUE1 + *self == Pc13::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC13_A::VALUE2 + *self == Pc13::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC13_A::VALUE3 + *self == Pc13::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC13_A::VALUE4 + *self == Pc13::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC13_A::VALUE5 + *self == Pc13::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC13_A::VALUE6 + *self == Pc13::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC13_A::VALUE7 + *self == Pc13::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC13_A::VALUE8 + *self == Pc13::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC13_A::VALUE9 + *self == Pc13::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC13_A::VALUE10 + *self == Pc13::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC13_A::VALUE11 + *self == Pc13::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC13_A::VALUE12 + *self == Pc13::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC13_A::VALUE13 + *self == Pc13::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC13_A::VALUE14 + *self == Pc13::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC13_A::VALUE15 + *self == Pc13::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC13_A::VALUE16 + *self == Pc13::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC13_A::VALUE17 + *self == Pc13::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC13_A::VALUE18 + *self == Pc13::Value18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; -impl<'a, REG> PC13_W<'a, REG> +pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; +impl<'a, REG> Pc13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE1) + self.variant(Pc13::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE2) + self.variant(Pc13::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE3) + self.variant(Pc13::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE4) + self.variant(Pc13::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE5) + self.variant(Pc13::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE6) + self.variant(Pc13::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE7) + self.variant(Pc13::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE8) + self.variant(Pc13::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE9) + self.variant(Pc13::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE10) + self.variant(Pc13::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE11) + self.variant(Pc13::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE12) + self.variant(Pc13::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE13) + self.variant(Pc13::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE14) + self.variant(Pc13::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE15) + self.variant(Pc13::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE16) + self.variant(Pc13::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE17) + self.variant(Pc13::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC13_A::VALUE18) + self.variant(Pc13::Value18) } } -#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type PC14_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC14_A { +pub enum Pc14 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC14_A) -> Self { + fn from(variant: Pc14) -> Self { variant as _ } } -impl crate::FieldSpec for PC14_A { +impl crate::FieldSpec for Pc14 { type Ux = u8; } -impl PC14_R { +#[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc14R = crate::FieldReader; +impl Pc14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC14_A::VALUE1), - 1 => Some(PC14_A::VALUE2), - 2 => Some(PC14_A::VALUE3), - 3 => Some(PC14_A::VALUE4), - 4 => Some(PC14_A::VALUE5), - 5 => Some(PC14_A::VALUE6), - 6 => Some(PC14_A::VALUE7), - 7 => Some(PC14_A::VALUE8), - 16 => Some(PC14_A::VALUE9), - 17 => Some(PC14_A::VALUE10), - 18 => Some(PC14_A::VALUE11), - 19 => Some(PC14_A::VALUE12), - 20 => Some(PC14_A::VALUE13), - 24 => Some(PC14_A::VALUE14), - 25 => Some(PC14_A::VALUE15), - 26 => Some(PC14_A::VALUE16), - 27 => Some(PC14_A::VALUE17), - 28 => Some(PC14_A::VALUE18), + 0 => Some(Pc14::Value1), + 1 => Some(Pc14::Value2), + 2 => Some(Pc14::Value3), + 3 => Some(Pc14::Value4), + 4 => Some(Pc14::Value5), + 5 => Some(Pc14::Value6), + 6 => Some(Pc14::Value7), + 7 => Some(Pc14::Value8), + 16 => Some(Pc14::Value9), + 17 => Some(Pc14::Value10), + 18 => Some(Pc14::Value11), + 19 => Some(Pc14::Value12), + 20 => Some(Pc14::Value13), + 24 => Some(Pc14::Value14), + 25 => Some(Pc14::Value15), + 26 => Some(Pc14::Value16), + 27 => Some(Pc14::Value17), + 28 => Some(Pc14::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC14_A::VALUE1 + *self == Pc14::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC14_A::VALUE2 + *self == Pc14::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC14_A::VALUE3 + *self == Pc14::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC14_A::VALUE4 + *self == Pc14::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC14_A::VALUE5 + *self == Pc14::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC14_A::VALUE6 + *self == Pc14::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC14_A::VALUE7 + *self == Pc14::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC14_A::VALUE8 + *self == Pc14::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC14_A::VALUE9 + *self == Pc14::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC14_A::VALUE10 + *self == Pc14::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC14_A::VALUE11 + *self == Pc14::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC14_A::VALUE12 + *self == Pc14::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC14_A::VALUE13 + *self == Pc14::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC14_A::VALUE14 + *self == Pc14::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC14_A::VALUE15 + *self == Pc14::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC14_A::VALUE16 + *self == Pc14::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC14_A::VALUE17 + *self == Pc14::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC14_A::VALUE18 + *self == Pc14::Value18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; -impl<'a, REG> PC14_W<'a, REG> +pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; +impl<'a, REG> Pc14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE1) + self.variant(Pc14::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE2) + self.variant(Pc14::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE3) + self.variant(Pc14::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE4) + self.variant(Pc14::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE5) + self.variant(Pc14::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE6) + self.variant(Pc14::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE7) + self.variant(Pc14::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE8) + self.variant(Pc14::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE9) + self.variant(Pc14::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE10) + self.variant(Pc14::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE11) + self.variant(Pc14::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE12) + self.variant(Pc14::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE13) + self.variant(Pc14::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE14) + self.variant(Pc14::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE15) + self.variant(Pc14::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE16) + self.variant(Pc14::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE17) + self.variant(Pc14::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC14_A::VALUE18) + self.variant(Pc14::Value18) } } -#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type PC15_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC15_A { +pub enum Pc15 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC15_A) -> Self { + fn from(variant: Pc15) -> Self { variant as _ } } -impl crate::FieldSpec for PC15_A { +impl crate::FieldSpec for Pc15 { type Ux = u8; } -impl PC15_R { +#[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] +pub type Pc15R = crate::FieldReader; +impl Pc15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC15_A::VALUE1), - 1 => Some(PC15_A::VALUE2), - 2 => Some(PC15_A::VALUE3), - 3 => Some(PC15_A::VALUE4), - 4 => Some(PC15_A::VALUE5), - 5 => Some(PC15_A::VALUE6), - 6 => Some(PC15_A::VALUE7), - 7 => Some(PC15_A::VALUE8), - 16 => Some(PC15_A::VALUE9), - 17 => Some(PC15_A::VALUE10), - 18 => Some(PC15_A::VALUE11), - 19 => Some(PC15_A::VALUE12), - 20 => Some(PC15_A::VALUE13), - 24 => Some(PC15_A::VALUE14), - 25 => Some(PC15_A::VALUE15), - 26 => Some(PC15_A::VALUE16), - 27 => Some(PC15_A::VALUE17), - 28 => Some(PC15_A::VALUE18), + 0 => Some(Pc15::Value1), + 1 => Some(Pc15::Value2), + 2 => Some(Pc15::Value3), + 3 => Some(Pc15::Value4), + 4 => Some(Pc15::Value5), + 5 => Some(Pc15::Value6), + 6 => Some(Pc15::Value7), + 7 => Some(Pc15::Value8), + 16 => Some(Pc15::Value9), + 17 => Some(Pc15::Value10), + 18 => Some(Pc15::Value11), + 19 => Some(Pc15::Value12), + 20 => Some(Pc15::Value13), + 24 => Some(Pc15::Value14), + 25 => Some(Pc15::Value15), + 26 => Some(Pc15::Value16), + 27 => Some(Pc15::Value17), + 28 => Some(Pc15::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC15_A::VALUE1 + *self == Pc15::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC15_A::VALUE2 + *self == Pc15::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC15_A::VALUE3 + *self == Pc15::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC15_A::VALUE4 + *self == Pc15::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC15_A::VALUE5 + *self == Pc15::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC15_A::VALUE6 + *self == Pc15::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC15_A::VALUE7 + *self == Pc15::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC15_A::VALUE8 + *self == Pc15::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC15_A::VALUE9 + *self == Pc15::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC15_A::VALUE10 + *self == Pc15::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC15_A::VALUE11 + *self == Pc15::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC15_A::VALUE12 + *self == Pc15::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC15_A::VALUE13 + *self == Pc15::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC15_A::VALUE14 + *self == Pc15::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC15_A::VALUE15 + *self == Pc15::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC15_A::VALUE16 + *self == Pc15::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC15_A::VALUE17 + *self == Pc15::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC15_A::VALUE18 + *self == Pc15::Value18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; -impl<'a, REG> PC15_W<'a, REG> +pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; +impl<'a, REG> Pc15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE1) + self.variant(Pc15::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE2) + self.variant(Pc15::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE3) + self.variant(Pc15::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE4) + self.variant(Pc15::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE5) + self.variant(Pc15::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE6) + self.variant(Pc15::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE7) + self.variant(Pc15::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE8) + self.variant(Pc15::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE9) + self.variant(Pc15::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE10) + self.variant(Pc15::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE11) + self.variant(Pc15::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE12) + self.variant(Pc15::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE13) + self.variant(Pc15::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE14) + self.variant(Pc15::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE15) + self.variant(Pc15::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE16) + self.variant(Pc15::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE17) + self.variant(Pc15::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC15_A::VALUE18) + self.variant(Pc15::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> PC12_R { - PC12_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> Pc12R { + Pc12R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> PC13_R { - PC13_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> Pc13R { + Pc13R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> PC14_R { - PC14_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> Pc14R { + Pc14R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> PC15_R { - PC15_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> Pc15R { + Pc15R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> PC12_W { - PC12_W::new(self, 3) + pub fn pc12(&mut self) -> Pc12W { + Pc12W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> PC13_W { - PC13_W::new(self, 11) + pub fn pc13(&mut self) -> Pc13W { + Pc13W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> PC14_W { - PC14_W::new(self, 19) + pub fn pc14(&mut self) -> Pc14W { + Pc14W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> PC15_W { - PC15_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc15(&mut self) -> Pc15W { + Pc15W::new(self, 27) } } #[doc = "Port 3 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR12_SPEC; -impl crate::RegisterSpec for IOCR12_SPEC { +pub struct Iocr12Spec; +impl crate::RegisterSpec for Iocr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for IOCR12_SPEC {} +impl crate::Readable for Iocr12Spec {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for IOCR12_SPEC { +impl crate::Writable for Iocr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for IOCR12_SPEC { +impl crate::Resettable for Iocr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/iocr4.rs b/src/port3/iocr4.rs index 79f0f26e..8f3b5aba 100644 --- a/src/port3/iocr4.rs +++ b/src/port3/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 3 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/iocr8.rs b/src/port3/iocr8.rs index 47d6beab..aaa1f77e 100644 --- a/src/port3/iocr8.rs +++ b/src/port3/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 3 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/omr.rs b/src/port3/omr.rs index e016369a..cd3dce1b 100644 --- a/src/port3/omr.rs +++ b/src/port3/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/out.rs b/src/port3/out.rs index 5a21a613..e7a887aa 100644 --- a/src/port3/out.rs +++ b/src/port3/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/pdisc.rs b/src/port3/pdisc.rs index d4efb96c..9a3fb51b 100644 --- a/src/port3/pdisc.rs +++ b/src/port3/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/pdr0.rs b/src/port3/pdr0.rs index d019744d..682f0907 100644 --- a/src/port3/pdr0.rs +++ b/src/port3/pdr0.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD0_A::SD_SHE), - 1 => Some(PD0_A::SD_MEE), - 2 => Some(PD0_A::SD_SOE), - 4 => Some(PD0_A::MD), - 7 => Some(PD0_A::WD), + 0 => Some(Pd0::SdShe), + 1 => Some(Pd0::SdMee), + 2 => Some(Pd0::SdSoe), + 4 => Some(Pd0::Md), + 7 => Some(Pd0::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD0_A::SD_SHE + *self == Pd0::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD0_A::SD_MEE + *self == Pd0::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SHE) + self.variant(Pd0::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_MEE) + self.variant(Pd0::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD1_A::SD_SHE), - 1 => Some(PD1_A::SD_MEE), - 2 => Some(PD1_A::SD_SOE), - 4 => Some(PD1_A::MD), - 7 => Some(PD1_A::WD), + 0 => Some(Pd1::SdShe), + 1 => Some(Pd1::SdMee), + 2 => Some(Pd1::SdSoe), + 4 => Some(Pd1::Md), + 7 => Some(Pd1::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD1_A::SD_SHE + *self == Pd1::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD1_A::SD_MEE + *self == Pd1::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,97 +175,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SHE) + self.variant(Pd1::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_MEE) + self.variant(Pd1::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD2_A::SD_SHE), - 1 => Some(PD2_A::SD_MEE), - 2 => Some(PD2_A::SD_SOE), - 4 => Some(PD2_A::MD), - 7 => Some(PD2_A::WD), + 0 => Some(Pd2::SdShe), + 1 => Some(Pd2::SdMee), + 2 => Some(Pd2::SdSoe), + 4 => Some(Pd2::Md), + 7 => Some(Pd2::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD2_A::SD_SHE + *self == Pd2::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD2_A::SD_MEE + *self == Pd2::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,121 +273,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SHE) + self.variant(Pd2::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_MEE) + self.variant(Pd2::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD3_A { + pub const fn variant(&self) -> Pd3 { match self.bits { - 2 => PD3_A::SD_SOE, - 3 => PD3_A::SD_SLE, - 4 => PD3_A::MD, - 7 => PD3_A::WD, - 0 => PD3_A::SD_SOE_ALT, - 1 => PD3_A::SD_SLE_ALT, - 6 => PD3_A::MD_ALT, - 5 => PD3_A::WD_ALT, + 2 => Pd3::SdSoe, + 3 => Pd3::SdSle, + 4 => Pd3::Md, + 7 => Pd3::Wd, + 0 => Pd3::SdSoeAlt, + 1 => Pd3::SdSleAlt, + 6 => Pd3::MdAlt, + 5 => Pd3::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD3_A::SD_SLE + *self == Pd3::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD3_A::SD_SOE_ALT + *self == Pd3::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD3_A::SD_SLE_ALT + *self == Pd3::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD3_A::MD_ALT + *self == Pd3::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD3_A::WD_ALT + *self == Pd3::WdAlt } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -395,136 +395,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE) + self.variant(Pd3::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE_ALT) + self.variant(Pd3::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE_ALT) + self.variant(Pd3::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::MD_ALT) + self.variant(Pd3::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::WD_ALT) + self.variant(Pd3::WdAlt) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD4_A { + pub const fn variant(&self) -> Pd4 { match self.bits { - 2 => PD4_A::SD_SOE, - 3 => PD4_A::SD_SLE, - 4 => PD4_A::MD, - 7 => PD4_A::WD, - 0 => PD4_A::SD_SOE_ALT, - 1 => PD4_A::SD_SLE_ALT, - 6 => PD4_A::MD_ALT, - 5 => PD4_A::WD_ALT, + 2 => Pd4::SdSoe, + 3 => Pd4::SdSle, + 4 => Pd4::Md, + 7 => Pd4::Wd, + 0 => Pd4::SdSoeAlt, + 1 => Pd4::SdSleAlt, + 6 => Pd4::MdAlt, + 5 => Pd4::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD4_A::SD_SLE + *self == Pd4::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD4_A::SD_SOE_ALT + *self == Pd4::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD4_A::SD_SLE_ALT + *self == Pd4::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD4_A::MD_ALT + *self == Pd4::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD4_A::WD_ALT + *self == Pd4::WdAlt } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -532,112 +532,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE) + self.variant(Pd4::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE_ALT) + self.variant(Pd4::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE_ALT) + self.variant(Pd4::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::MD_ALT) + self.variant(Pd4::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::WD_ALT) + self.variant(Pd4::WdAlt) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,121 +743,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,159 +865,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port3/pdr1.rs b/src/port3/pdr1.rs index 53b3dea8..9095b119 100644 --- a/src/port3/pdr1.rs +++ b/src/port3/pdr1.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD8_A { + pub const fn variant(&self) -> Pd8 { match self.bits { - 2 => PD8_A::SD_SOE, - 3 => PD8_A::SD_SLE, - 4 => PD8_A::MD, - 7 => PD8_A::WD, - 0 => PD8_A::SD_SOE_ALT, - 1 => PD8_A::SD_SLE_ALT, - 6 => PD8_A::MD_ALT, - 5 => PD8_A::WD_ALT, + 2 => Pd8::SdSoe, + 3 => Pd8::SdSle, + 4 => Pd8::Md, + 7 => Pd8::Wd, + 0 => Pd8::SdSoeAlt, + 1 => Pd8::SdSleAlt, + 6 => Pd8::MdAlt, + 5 => Pd8::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD8_A::SD_SLE + *self == Pd8::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD8_A::SD_SOE_ALT + *self == Pd8::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD8_A::SD_SLE_ALT + *self == Pd8::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD8_A::MD_ALT + *self == Pd8::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD8_A::WD_ALT + *self == Pd8::WdAlt } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SLE) + self.variant(Pd8::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE_ALT) + self.variant(Pd8::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SLE_ALT) + self.variant(Pd8::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD8_A::MD_ALT) + self.variant(Pd8::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD8_A::WD_ALT) + self.variant(Pd8::WdAlt) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD9_A { + pub const fn variant(&self) -> Pd9 { match self.bits { - 2 => PD9_A::SD_SOE, - 3 => PD9_A::SD_SLE, - 4 => PD9_A::MD, - 7 => PD9_A::WD, - 0 => PD9_A::SD_SOE_ALT, - 1 => PD9_A::SD_SLE_ALT, - 6 => PD9_A::MD_ALT, - 5 => PD9_A::WD_ALT, + 2 => Pd9::SdSoe, + 3 => Pd9::SdSle, + 4 => Pd9::Md, + 7 => Pd9::Wd, + 0 => Pd9::SdSoeAlt, + 1 => Pd9::SdSleAlt, + 6 => Pd9::MdAlt, + 5 => Pd9::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD9_A::SD_SLE + *self == Pd9::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD9_A::SD_SOE_ALT + *self == Pd9::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD9_A::SD_SLE_ALT + *self == Pd9::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD9_A::MD_ALT + *self == Pd9::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD9_A::WD_ALT + *self == Pd9::WdAlt } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,136 +238,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SLE) + self.variant(Pd9::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE_ALT) + self.variant(Pd9::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SLE_ALT) + self.variant(Pd9::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD9_A::MD_ALT) + self.variant(Pd9::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD9_A::WD_ALT) + self.variant(Pd9::WdAlt) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,136 +375,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -512,112 +512,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -625,97 +625,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -723,121 +723,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD14_A { + pub const fn variant(&self) -> Pd14 { match self.bits { - 2 => PD14_A::SD_SOE, - 3 => PD14_A::SD_SLE, - 4 => PD14_A::MD, - 7 => PD14_A::WD, - 0 => PD14_A::SD_SOE_ALT, - 1 => PD14_A::SD_SLE_ALT, - 6 => PD14_A::MD_ALT, - 5 => PD14_A::WD_ALT, + 2 => Pd14::SdSoe, + 3 => Pd14::SdSle, + 4 => Pd14::Md, + 7 => Pd14::Wd, + 0 => Pd14::SdSoeAlt, + 1 => Pd14::SdSleAlt, + 6 => Pd14::MdAlt, + 5 => Pd14::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD14_A::SD_SLE + *self == Pd14::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD14_A::SD_SOE_ALT + *self == Pd14::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD14_A::SD_SLE_ALT + *self == Pd14::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD14_A::MD_ALT + *self == Pd14::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD14_A::WD_ALT + *self == Pd14::WdAlt } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -845,136 +845,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SLE) + self.variant(Pd14::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE_ALT) + self.variant(Pd14::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SLE_ALT) + self.variant(Pd14::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::MD_ALT) + self.variant(Pd14::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD14_A::WD_ALT) + self.variant(Pd14::WdAlt) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD15_A { + pub const fn variant(&self) -> Pd15 { match self.bits { - 2 => PD15_A::SD_SOE, - 3 => PD15_A::SD_SLE, - 4 => PD15_A::MD, - 7 => PD15_A::WD, - 0 => PD15_A::SD_SOE_ALT, - 1 => PD15_A::SD_SLE_ALT, - 6 => PD15_A::MD_ALT, - 5 => PD15_A::WD_ALT, + 2 => Pd15::SdSoe, + 3 => Pd15::SdSle, + 4 => Pd15::Md, + 7 => Pd15::Wd, + 0 => Pd15::SdSoeAlt, + 1 => Pd15::SdSleAlt, + 6 => Pd15::MdAlt, + 5 => Pd15::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD15_A::SD_SLE + *self == Pd15::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD15_A::SD_SOE_ALT + *self == Pd15::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD15_A::SD_SLE_ALT + *self == Pd15::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD15_A::MD_ALT + *self == Pd15::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD15_A::WD_ALT + *self == Pd15::WdAlt } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,159 +982,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SLE) + self.variant(Pd15::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE_ALT) + self.variant(Pd15::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SLE_ALT) + self.variant(Pd15::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::MD_ALT) + self.variant(Pd15::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD15_A::WD_ALT) + self.variant(Pd15::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 3 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port3/pps.rs b/src/port3/pps.rs index 3c33ea79..7ca37963 100644 --- a/src/port3/pps.rs +++ b/src/port3/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4.rs b/src/port4.rs index a3454c76..7cce6868 100644 --- a/src/port4.rs +++ b/src/port4.rs @@ -1,110 +1,119 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, + iocr0: Iocr0, + iocr4: Iocr4, _reserved4: [u8; 0x0c], - in_: IN, + in_: In, _reserved5: [u8; 0x18], - pdr0: PDR0, + pdr0: Pdr0, _reserved6: [u8; 0x1c], - pdisc: PDISC, + pdisc: Pdisc, _reserved7: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 4 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 4 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 4 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 4 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x24 - Port 4 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 4 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x60 - Port 4 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 4 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 4 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 4 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 4 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 4 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 4 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 4 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 4 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 4 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IN (r) register accessor: Port 4 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 4 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 4 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDISC (r) register accessor: Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 4 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 4 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 4 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 4 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port4/hwsel.rs b/src/port4/hwsel.rs index 2df3dabc..6777879a 100644 --- a/src/port4/hwsel.rs +++ b/src/port4/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 4 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/in_.rs b/src/port4/in_.rs index 03f30cc9..48032cc2 100644 --- a/src/port4/in_.rs +++ b/src/port4/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 4 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/iocr0.rs b/src/port4/iocr0.rs index e8658ef3..11ea7732 100644 --- a/src/port4/iocr0.rs +++ b/src/port4/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 4 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/iocr4.rs b/src/port4/iocr4.rs index 5c416b62..cc235dfa 100644 --- a/src/port4/iocr4.rs +++ b/src/port4/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 4 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/omr.rs b/src/port4/omr.rs index 4c14ea36..35e645e9 100644 --- a/src/port4/omr.rs +++ b/src/port4/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 4 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/out.rs b/src/port4/out.rs index d2060451..c18bbdcd 100644 --- a/src/port4/out.rs +++ b/src/port4/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 4 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/pdisc.rs b/src/port4/pdisc.rs index f2eaa138..8ca46a2a 100644 --- a/src/port4/pdisc.rs +++ b/src/port4/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 4 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port4/pdr0.rs b/src/port4/pdr0.rs index c0c455b6..eb6997b7 100644 --- a/src/port4/pdr0.rs +++ b/src/port4/pdr0.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD0_A::SD_SHE), - 1 => Some(PD0_A::SD_MEE), - 2 => Some(PD0_A::SD_SOE), - 4 => Some(PD0_A::MD), - 7 => Some(PD0_A::WD), + 0 => Some(Pd0::SdShe), + 1 => Some(Pd0::SdMee), + 2 => Some(Pd0::SdSoe), + 4 => Some(Pd0::Md), + 7 => Some(Pd0::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD0_A::SD_SHE + *self == Pd0::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD0_A::SD_MEE + *self == Pd0::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SHE) + self.variant(Pd0::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_MEE) + self.variant(Pd0::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD1_A::SD_SHE), - 1 => Some(PD1_A::SD_MEE), - 2 => Some(PD1_A::SD_SOE), - 4 => Some(PD1_A::MD), - 7 => Some(PD1_A::WD), + 0 => Some(Pd1::SdShe), + 1 => Some(Pd1::SdMee), + 2 => Some(Pd1::SdSoe), + 4 => Some(Pd1::Md), + 7 => Some(Pd1::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD1_A::SD_SHE + *self == Pd1::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD1_A::SD_MEE + *self == Pd1::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SHE) + self.variant(Pd1::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_MEE) + self.variant(Pd1::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD2_A { + pub const fn variant(&self) -> Pd2 { match self.bits { - 2 => PD2_A::SD_SOE, - 3 => PD2_A::SD_SLE, - 4 => PD2_A::MD, - 7 => PD2_A::WD, - 0 => PD2_A::SD_SOE_ALT, - 1 => PD2_A::SD_SLE_ALT, - 6 => PD2_A::MD_ALT, - 5 => PD2_A::WD_ALT, + 2 => Pd2::SdSoe, + 3 => Pd2::SdSle, + 4 => Pd2::Md, + 7 => Pd2::Wd, + 0 => Pd2::SdSoeAlt, + 1 => Pd2::SdSleAlt, + 6 => Pd2::MdAlt, + 5 => Pd2::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD2_A::SD_SLE + *self == Pd2::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD2_A::SD_SOE_ALT + *self == Pd2::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD2_A::SD_SLE_ALT + *self == Pd2::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD2_A::MD_ALT + *self == Pd2::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD2_A::WD_ALT + *self == Pd2::WdAlt } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE) + self.variant(Pd2::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE_ALT) + self.variant(Pd2::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE_ALT) + self.variant(Pd2::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::MD_ALT) + self.variant(Pd2::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::WD_ALT) + self.variant(Pd2::WdAlt) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD3_A { + pub const fn variant(&self) -> Pd3 { match self.bits { - 2 => PD3_A::SD_SOE, - 3 => PD3_A::SD_SLE, - 4 => PD3_A::MD, - 7 => PD3_A::WD, - 0 => PD3_A::SD_SOE_ALT, - 1 => PD3_A::SD_SLE_ALT, - 6 => PD3_A::MD_ALT, - 5 => PD3_A::WD_ALT, + 2 => Pd3::SdSoe, + 3 => Pd3::SdSle, + 4 => Pd3::Md, + 7 => Pd3::Wd, + 0 => Pd3::SdSoeAlt, + 1 => Pd3::SdSleAlt, + 6 => Pd3::MdAlt, + 5 => Pd3::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD3_A::SD_SLE + *self == Pd3::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD3_A::SD_SOE_ALT + *self == Pd3::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD3_A::SD_SLE_ALT + *self == Pd3::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD3_A::MD_ALT + *self == Pd3::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD3_A::WD_ALT + *self == Pd3::WdAlt } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,136 +434,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE) + self.variant(Pd3::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE_ALT) + self.variant(Pd3::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE_ALT) + self.variant(Pd3::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::MD_ALT) + self.variant(Pd3::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::WD_ALT) + self.variant(Pd3::WdAlt) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD4_A { + pub const fn variant(&self) -> Pd4 { match self.bits { - 2 => PD4_A::SD_SOE, - 3 => PD4_A::SD_SLE, - 4 => PD4_A::MD, - 7 => PD4_A::WD, - 0 => PD4_A::SD_SOE_ALT, - 1 => PD4_A::SD_SLE_ALT, - 6 => PD4_A::MD_ALT, - 5 => PD4_A::WD_ALT, + 2 => Pd4::SdSoe, + 3 => Pd4::SdSle, + 4 => Pd4::Md, + 7 => Pd4::Wd, + 0 => Pd4::SdSoeAlt, + 1 => Pd4::SdSleAlt, + 6 => Pd4::MdAlt, + 5 => Pd4::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD4_A::SD_SLE + *self == Pd4::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD4_A::SD_SOE_ALT + *self == Pd4::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD4_A::SD_SLE_ALT + *self == Pd4::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD4_A::MD_ALT + *self == Pd4::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD4_A::WD_ALT + *self == Pd4::WdAlt } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -571,136 +571,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE) + self.variant(Pd4::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE_ALT) + self.variant(Pd4::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SLE_ALT) + self.variant(Pd4::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::MD_ALT) + self.variant(Pd4::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD4_A::WD_ALT) + self.variant(Pd4::WdAlt) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD5_A { + pub const fn variant(&self) -> Pd5 { match self.bits { - 2 => PD5_A::SD_SOE, - 3 => PD5_A::SD_SLE, - 4 => PD5_A::MD, - 7 => PD5_A::WD, - 0 => PD5_A::SD_SOE_ALT, - 1 => PD5_A::SD_SLE_ALT, - 6 => PD5_A::MD_ALT, - 5 => PD5_A::WD_ALT, + 2 => Pd5::SdSoe, + 3 => Pd5::SdSle, + 4 => Pd5::Md, + 7 => Pd5::Wd, + 0 => Pd5::SdSoeAlt, + 1 => Pd5::SdSleAlt, + 6 => Pd5::MdAlt, + 5 => Pd5::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD5_A::SD_SLE + *self == Pd5::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD5_A::SD_SOE_ALT + *self == Pd5::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD5_A::SD_SLE_ALT + *self == Pd5::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD5_A::MD_ALT + *self == Pd5::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD5_A::WD_ALT + *self == Pd5::WdAlt } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -708,136 +708,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SLE) + self.variant(Pd5::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE_ALT) + self.variant(Pd5::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SLE_ALT) + self.variant(Pd5::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::MD_ALT) + self.variant(Pd5::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD5_A::WD_ALT) + self.variant(Pd5::WdAlt) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD6_A { + pub const fn variant(&self) -> Pd6 { match self.bits { - 2 => PD6_A::SD_SOE, - 3 => PD6_A::SD_SLE, - 4 => PD6_A::MD, - 7 => PD6_A::WD, - 0 => PD6_A::SD_SOE_ALT, - 1 => PD6_A::SD_SLE_ALT, - 6 => PD6_A::MD_ALT, - 5 => PD6_A::WD_ALT, + 2 => Pd6::SdSoe, + 3 => Pd6::SdSle, + 4 => Pd6::Md, + 7 => Pd6::Wd, + 0 => Pd6::SdSoeAlt, + 1 => Pd6::SdSleAlt, + 6 => Pd6::MdAlt, + 5 => Pd6::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD6_A::SD_SLE + *self == Pd6::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD6_A::SD_SOE_ALT + *self == Pd6::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD6_A::SD_SLE_ALT + *self == Pd6::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD6_A::MD_ALT + *self == Pd6::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD6_A::WD_ALT + *self == Pd6::WdAlt } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -845,136 +845,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SLE) + self.variant(Pd6::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE_ALT) + self.variant(Pd6::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SLE_ALT) + self.variant(Pd6::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::MD_ALT) + self.variant(Pd6::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD6_A::WD_ALT) + self.variant(Pd6::WdAlt) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,159 +982,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 4 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port4/pps.rs b/src/port4/pps.rs index 32937635..24b4f662 100644 --- a/src/port4/pps.rs +++ b/src/port4/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 4 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5.rs b/src/port5.rs index b9e80896..d13f23c3 100644 --- a/src/port5.rs +++ b/src/port5.rs @@ -1,132 +1,143 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, _reserved5: [u8; 0x08], - in_: IN, + in_: In, _reserved6: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved8: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved9: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 5 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 5 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 5 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 5 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 5 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x24 - Port 5 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 5 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 5 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 5 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 5 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 5 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 5 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 5 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 5 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 5 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 5 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IN (r) register accessor: Port 5 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 5 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 5 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 5 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 5 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 5 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 5 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 5 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 5 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port5/hwsel.rs b/src/port5/hwsel.rs index 869d7e70..aa85b9a6 100644 --- a/src/port5/hwsel.rs +++ b/src/port5/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 5 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/in_.rs b/src/port5/in_.rs index e570d53a..4c58f413 100644 --- a/src/port5/in_.rs +++ b/src/port5/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 5 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/iocr0.rs b/src/port5/iocr0.rs index ee70d635..8148d25b 100644 --- a/src/port5/iocr0.rs +++ b/src/port5/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 5 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/iocr4.rs b/src/port5/iocr4.rs index 918a2e62..9dd81006 100644 --- a/src/port5/iocr4.rs +++ b/src/port5/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/iocr8.rs b/src/port5/iocr8.rs index a29253bf..053b8426 100644 --- a/src/port5/iocr8.rs +++ b/src/port5/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 5 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/omr.rs b/src/port5/omr.rs index 6be8c4bb..2ea086d9 100644 --- a/src/port5/omr.rs +++ b/src/port5/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 5 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/out.rs b/src/port5/out.rs index 3c0949a7..3a8c47fa 100644 --- a/src/port5/out.rs +++ b/src/port5/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 5 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/pdisc.rs b/src/port5/pdisc.rs index c045dece..ff680e5c 100644 --- a/src/port5/pdisc.rs +++ b/src/port5/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 5 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port5/pdr0.rs b/src/port5/pdr0.rs index cbf9a82b..c73750d3 100644 --- a/src/port5/pdr0.rs +++ b/src/port5/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,136 +238,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD2_A { + pub const fn variant(&self) -> Pd2 { match self.bits { - 2 => PD2_A::SD_SOE, - 3 => PD2_A::SD_SLE, - 4 => PD2_A::MD, - 7 => PD2_A::WD, - 0 => PD2_A::SD_SOE_ALT, - 1 => PD2_A::SD_SLE_ALT, - 6 => PD2_A::MD_ALT, - 5 => PD2_A::WD_ALT, + 2 => Pd2::SdSoe, + 3 => Pd2::SdSle, + 4 => Pd2::Md, + 7 => Pd2::Wd, + 0 => Pd2::SdSoeAlt, + 1 => Pd2::SdSleAlt, + 6 => Pd2::MdAlt, + 5 => Pd2::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD2_A::SD_SLE + *self == Pd2::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD2_A::SD_SOE_ALT + *self == Pd2::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD2_A::SD_SLE_ALT + *self == Pd2::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD2_A::MD_ALT + *self == Pd2::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD2_A::WD_ALT + *self == Pd2::WdAlt } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,112 +375,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE) + self.variant(Pd2::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE_ALT) + self.variant(Pd2::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE_ALT) + self.variant(Pd2::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::MD_ALT) + self.variant(Pd2::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::WD_ALT) + self.variant(Pd2::WdAlt) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -488,97 +488,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,97 +586,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -684,97 +684,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -782,121 +782,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -904,159 +904,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 5 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port5/pdr1.rs b/src/port5/pdr1.rs index 84ce39d5..658cf9bb 100644 --- a/src/port5/pdr1.rs +++ b/src/port5/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,112 +434,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 5 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port5/pps.rs b/src/port5/pps.rs index ac43ca1e..6d47a397 100644 --- a/src/port5/pps.rs +++ b/src/port5/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 5 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6.rs b/src/port6.rs index 5b1f6321..341e3873 100644 --- a/src/port6.rs +++ b/src/port6.rs @@ -1,110 +1,119 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, + iocr0: Iocr0, + iocr4: Iocr4, _reserved4: [u8; 0x0c], - in_: IN, + in_: In, _reserved5: [u8; 0x18], - pdr0: PDR0, + pdr0: Pdr0, _reserved6: [u8; 0x1c], - pdisc: PDISC, + pdisc: Pdisc, _reserved7: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 6 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 6 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 6 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 6 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x24 - Port 6 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 6 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x60 - Port 6 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 6 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 6 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 6 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 6 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 6 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 6 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 6 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 6 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 6 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 6 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IN (r) register accessor: Port 6 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 6 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 6 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 6 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDISC (r) register accessor: Port 6 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 6 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 6 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 6 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 6 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 6 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port6/hwsel.rs b/src/port6/hwsel.rs index d3ddbc36..9fa6aa3a 100644 --- a/src/port6/hwsel.rs +++ b/src/port6/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 6 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/in_.rs b/src/port6/in_.rs index 3a96e6f8..fcb7a60d 100644 --- a/src/port6/in_.rs +++ b/src/port6/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 6 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/iocr0.rs b/src/port6/iocr0.rs index d8e8788b..54389859 100644 --- a/src/port6/iocr0.rs +++ b/src/port6/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 6 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/iocr4.rs b/src/port6/iocr4.rs index 028cb2ce..5ed70103 100644 --- a/src/port6/iocr4.rs +++ b/src/port6/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 6 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/omr.rs b/src/port6/omr.rs index 9342da6b..c5634f7f 100644 --- a/src/port6/omr.rs +++ b/src/port6/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 6 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/out.rs b/src/port6/out.rs index a7b31dd4..8cf60f9e 100644 --- a/src/port6/out.rs +++ b/src/port6/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 6 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/pdisc.rs b/src/port6/pdisc.rs index 604392af..1a25fd8d 100644 --- a/src/port6/pdisc.rs +++ b/src/port6/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 6 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port6/pdr0.rs b/src/port6/pdr0.rs index cde863c2..71d25261 100644 --- a/src/port6/pdr0.rs +++ b/src/port6/pdr0.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD0_A::SD_SHE), - 1 => Some(PD0_A::SD_MEE), - 2 => Some(PD0_A::SD_SOE), - 4 => Some(PD0_A::MD), - 7 => Some(PD0_A::WD), + 0 => Some(Pd0::SdShe), + 1 => Some(Pd0::SdMee), + 2 => Some(Pd0::SdSoe), + 4 => Some(Pd0::Md), + 7 => Some(Pd0::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD0_A::SD_SHE + *self == Pd0::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD0_A::SD_MEE + *self == Pd0::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SHE) + self.variant(Pd0::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_MEE) + self.variant(Pd0::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD1_A::SD_SHE), - 1 => Some(PD1_A::SD_MEE), - 2 => Some(PD1_A::SD_SOE), - 4 => Some(PD1_A::MD), - 7 => Some(PD1_A::WD), + 0 => Some(Pd1::SdShe), + 1 => Some(Pd1::SdMee), + 2 => Some(Pd1::SdSoe), + 4 => Some(Pd1::Md), + 7 => Some(Pd1::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD1_A::SD_SHE + *self == Pd1::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD1_A::SD_MEE + *self == Pd1::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,97 +175,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SHE) + self.variant(Pd1::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_MEE) + self.variant(Pd1::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD2_A::SD_SHE), - 1 => Some(PD2_A::SD_MEE), - 2 => Some(PD2_A::SD_SOE), - 4 => Some(PD2_A::MD), - 7 => Some(PD2_A::WD), + 0 => Some(Pd2::SdShe), + 1 => Some(Pd2::SdMee), + 2 => Some(Pd2::SdSoe), + 4 => Some(Pd2::Md), + 7 => Some(Pd2::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD2_A::SD_SHE + *self == Pd2::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD2_A::SD_MEE + *self == Pd2::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,121 +273,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SHE) + self.variant(Pd2::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_MEE) + self.variant(Pd2::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD3_A { + pub const fn variant(&self) -> Pd3 { match self.bits { - 2 => PD3_A::SD_SOE, - 3 => PD3_A::SD_SLE, - 4 => PD3_A::MD, - 7 => PD3_A::WD, - 0 => PD3_A::SD_SOE_ALT, - 1 => PD3_A::SD_SLE_ALT, - 6 => PD3_A::MD_ALT, - 5 => PD3_A::WD_ALT, + 2 => Pd3::SdSoe, + 3 => Pd3::SdSle, + 4 => Pd3::Md, + 7 => Pd3::Wd, + 0 => Pd3::SdSoeAlt, + 1 => Pd3::SdSleAlt, + 6 => Pd3::MdAlt, + 5 => Pd3::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD3_A::SD_SLE + *self == Pd3::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD3_A::SD_SOE_ALT + *self == Pd3::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD3_A::SD_SLE_ALT + *self == Pd3::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD3_A::MD_ALT + *self == Pd3::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD3_A::WD_ALT + *self == Pd3::WdAlt } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -395,112 +395,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE) + self.variant(Pd3::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE_ALT) + self.variant(Pd3::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SLE_ALT) + self.variant(Pd3::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::MD_ALT) + self.variant(Pd3::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD3_A::WD_ALT) + self.variant(Pd3::WdAlt) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -508,97 +508,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -606,97 +606,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -704,97 +704,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD7_A::SD_SHE), - 1 => Some(PD7_A::SD_MEE), - 2 => Some(PD7_A::SD_SOE), - 4 => Some(PD7_A::MD), - 7 => Some(PD7_A::WD), + 0 => Some(Pd7::SdShe), + 1 => Some(Pd7::SdMee), + 2 => Some(Pd7::SdSoe), + 4 => Some(Pd7::Md), + 7 => Some(Pd7::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD7_A::SD_SHE + *self == Pd7::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD7_A::SD_MEE + *self == Pd7::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -802,144 +802,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SHE) + self.variant(Pd7::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_MEE) + self.variant(Pd7::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 6 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port6/pps.rs b/src/port6/pps.rs index a7d01d18..dda2a43d 100644 --- a/src/port6/pps.rs +++ b/src/port6/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 6 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7.rs b/src/port7.rs index 65587fcf..fdfc1508 100644 --- a/src/port7.rs +++ b/src/port7.rs @@ -1,132 +1,143 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, _reserved5: [u8; 0x08], - in_: IN, + in_: In, _reserved6: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved8: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved9: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 7 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 7 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 7 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 7 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 7 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x24 - Port 7 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 7 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 7 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 7 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 7 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 7 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 7 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 7 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 7 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 7 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 7 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 7 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 7 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 7 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 7 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 7 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IN (r) register accessor: Port 7 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 7 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 7 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 7 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 7 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 7 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 7 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 7 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 7 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 7 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 7 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 7 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port7/hwsel.rs b/src/port7/hwsel.rs index 99c5f512..9d705d0c 100644 --- a/src/port7/hwsel.rs +++ b/src/port7/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 7 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/in_.rs b/src/port7/in_.rs index 529f3abd..b3702fb3 100644 --- a/src/port7/in_.rs +++ b/src/port7/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 7 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/iocr0.rs b/src/port7/iocr0.rs index e4ba1f53..4bac8c9f 100644 --- a/src/port7/iocr0.rs +++ b/src/port7/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 7 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/iocr4.rs b/src/port7/iocr4.rs index 3938e41b..5b1f3b55 100644 --- a/src/port7/iocr4.rs +++ b/src/port7/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 7 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/iocr8.rs b/src/port7/iocr8.rs index 866e7456..bbbc0ad6 100644 --- a/src/port7/iocr8.rs +++ b/src/port7/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 7 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/omr.rs b/src/port7/omr.rs index eb299322..77f008d1 100644 --- a/src/port7/omr.rs +++ b/src/port7/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 7 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/out.rs b/src/port7/out.rs index edd0af28..6b13ce60 100644 --- a/src/port7/out.rs +++ b/src/port7/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 7 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/pdisc.rs b/src/port7/pdisc.rs index 6103b67e..bfc83d66 100644 --- a/src/port7/pdisc.rs +++ b/src/port7/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 7 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port7/pdr0.rs b/src/port7/pdr0.rs index 7f64ac60..4e6c2c59 100644 --- a/src/port7/pdr0.rs +++ b/src/port7/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,136 +238,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD2_A { + pub const fn variant(&self) -> Pd2 { match self.bits { - 2 => PD2_A::SD_SOE, - 3 => PD2_A::SD_SLE, - 4 => PD2_A::MD, - 7 => PD2_A::WD, - 0 => PD2_A::SD_SOE_ALT, - 1 => PD2_A::SD_SLE_ALT, - 6 => PD2_A::MD_ALT, - 5 => PD2_A::WD_ALT, + 2 => Pd2::SdSoe, + 3 => Pd2::SdSle, + 4 => Pd2::Md, + 7 => Pd2::Wd, + 0 => Pd2::SdSoeAlt, + 1 => Pd2::SdSleAlt, + 6 => Pd2::MdAlt, + 5 => Pd2::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD2_A::SD_SLE + *self == Pd2::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD2_A::SD_SOE_ALT + *self == Pd2::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD2_A::SD_SLE_ALT + *self == Pd2::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD2_A::MD_ALT + *self == Pd2::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD2_A::WD_ALT + *self == Pd2::WdAlt } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,112 +375,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE) + self.variant(Pd2::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE_ALT) + self.variant(Pd2::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE_ALT) + self.variant(Pd2::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::MD_ALT) + self.variant(Pd2::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::WD_ALT) + self.variant(Pd2::WdAlt) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -488,97 +488,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,97 +586,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -684,97 +684,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -782,121 +782,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -904,159 +904,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 7 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port7/pdr1.rs b/src/port7/pdr1.rs index 2e0e108b..3876cbe7 100644 --- a/src/port7/pdr1.rs +++ b/src/port7/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,112 +434,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 7 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port7/pps.rs b/src/port7/pps.rs index 9c6af5be..3c1c7b85 100644 --- a/src/port7/pps.rs +++ b/src/port7/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 7 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8.rs b/src/port8.rs index ee476b52..3131b9d1 100644 --- a/src/port8.rs +++ b/src/port8.rs @@ -1,132 +1,143 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, _reserved5: [u8; 0x08], - in_: IN, + in_: In, _reserved6: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved8: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved9: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 8 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 8 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 8 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 8 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 8 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x24 - Port 8 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 8 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 8 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 8 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 8 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 8 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 8 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 8 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 8 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 8 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 8 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 8 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 8 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 8 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 8 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 8 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IN (r) register accessor: Port 8 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 8 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 8 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 8 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 8 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 8 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 8 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 8 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 8 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 8 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 8 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 8 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port8/hwsel.rs b/src/port8/hwsel.rs index efbd296f..58eaf82a 100644 --- a/src/port8/hwsel.rs +++ b/src/port8/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 8 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/in_.rs b/src/port8/in_.rs index 027b0a56..7980bb41 100644 --- a/src/port8/in_.rs +++ b/src/port8/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 8 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/iocr0.rs b/src/port8/iocr0.rs index f887fe74..b07aa5d2 100644 --- a/src/port8/iocr0.rs +++ b/src/port8/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 8 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/iocr4.rs b/src/port8/iocr4.rs index bc893420..f0ce899e 100644 --- a/src/port8/iocr4.rs +++ b/src/port8/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 8 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/iocr8.rs b/src/port8/iocr8.rs index 378bd079..04b61082 100644 --- a/src/port8/iocr8.rs +++ b/src/port8/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 8 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/omr.rs b/src/port8/omr.rs index a1891540..1306b869 100644 --- a/src/port8/omr.rs +++ b/src/port8/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 8 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/out.rs b/src/port8/out.rs index 8fbf5060..e292a56b 100644 --- a/src/port8/out.rs +++ b/src/port8/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 8 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/pdisc.rs b/src/port8/pdisc.rs index c02fcdf0..8839b6ce 100644 --- a/src/port8/pdisc.rs +++ b/src/port8/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 8 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port8/pdr0.rs b/src/port8/pdr0.rs index 96f5f52b..72e57494 100644 --- a/src/port8/pdr0.rs +++ b/src/port8/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,136 +238,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD2_A { + pub const fn variant(&self) -> Pd2 { match self.bits { - 2 => PD2_A::SD_SOE, - 3 => PD2_A::SD_SLE, - 4 => PD2_A::MD, - 7 => PD2_A::WD, - 0 => PD2_A::SD_SOE_ALT, - 1 => PD2_A::SD_SLE_ALT, - 6 => PD2_A::MD_ALT, - 5 => PD2_A::WD_ALT, + 2 => Pd2::SdSoe, + 3 => Pd2::SdSle, + 4 => Pd2::Md, + 7 => Pd2::Wd, + 0 => Pd2::SdSoeAlt, + 1 => Pd2::SdSleAlt, + 6 => Pd2::MdAlt, + 5 => Pd2::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD2_A::SD_SLE + *self == Pd2::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD2_A::SD_SOE_ALT + *self == Pd2::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD2_A::SD_SLE_ALT + *self == Pd2::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD2_A::MD_ALT + *self == Pd2::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD2_A::WD_ALT + *self == Pd2::WdAlt } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,112 +375,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE) + self.variant(Pd2::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE_ALT) + self.variant(Pd2::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE_ALT) + self.variant(Pd2::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::MD_ALT) + self.variant(Pd2::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::WD_ALT) + self.variant(Pd2::WdAlt) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -488,97 +488,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,97 +586,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -684,97 +684,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -782,121 +782,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -904,159 +904,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 8 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port8/pdr1.rs b/src/port8/pdr1.rs index f574446f..5e869aba 100644 --- a/src/port8/pdr1.rs +++ b/src/port8/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,112 +434,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 8 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port8/pps.rs b/src/port8/pps.rs index d2427973..b7c5a6e6 100644 --- a/src/port8/pps.rs +++ b/src/port8/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 8 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9.rs b/src/port9.rs index 6a773edb..fec19360 100644 --- a/src/port9.rs +++ b/src/port9.rs @@ -1,132 +1,143 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - out: OUT, - omr: OMR, + out: Out, + omr: Omr, _reserved2: [u8; 0x08], - iocr0: IOCR0, - iocr4: IOCR4, - iocr8: IOCR8, + iocr0: Iocr0, + iocr4: Iocr4, + iocr8: Iocr8, _reserved5: [u8; 0x08], - in_: IN, + in_: In, _reserved6: [u8; 0x18], - pdr0: PDR0, - pdr1: PDR1, + pdr0: Pdr0, + pdr1: Pdr1, _reserved8: [u8; 0x18], - pdisc: PDISC, + pdisc: Pdisc, _reserved9: [u8; 0x0c], - pps: PPS, - hwsel: HWSEL, + pps: Pps, + hwsel: Hwsel, } impl RegisterBlock { #[doc = "0x00 - Port 9 Output Register"] #[inline(always)] - pub const fn out(&self) -> &OUT { + pub const fn out(&self) -> &Out { &self.out } #[doc = "0x04 - Port 9 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &OMR { + pub const fn omr(&self) -> &Omr { &self.omr } #[doc = "0x10 - Port 9 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &IOCR0 { + pub const fn iocr0(&self) -> &Iocr0 { &self.iocr0 } #[doc = "0x14 - Port 5 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &IOCR4 { + pub const fn iocr4(&self) -> &Iocr4 { &self.iocr4 } #[doc = "0x18 - Port 9 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &IOCR8 { + pub const fn iocr8(&self) -> &Iocr8 { &self.iocr8 } #[doc = "0x24 - Port 9 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &IN { + pub const fn in_(&self) -> &In { &self.in_ } #[doc = "0x40 - Port 9 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &PDR0 { + pub const fn pdr0(&self) -> &Pdr0 { &self.pdr0 } #[doc = "0x44 - Port 9 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &PDR1 { + pub const fn pdr1(&self) -> &Pdr1 { &self.pdr1 } #[doc = "0x60 - Port 9 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &PDISC { + pub const fn pdisc(&self) -> &Pdisc { &self.pdisc } #[doc = "0x70 - Port 9 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &PPS { + pub const fn pps(&self) -> &Pps { &self.pps } #[doc = "0x74 - Port 9 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &HWSEL { + pub const fn hwsel(&self) -> &Hwsel { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 9 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -pub type OUT = crate::Reg; +#[doc(alias = "OUT")] +pub type Out = crate::Reg; #[doc = "Port 9 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 9 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -pub type OMR = crate::Reg; +#[doc(alias = "OMR")] +pub type Omr = crate::Reg; #[doc = "Port 9 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 9 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -pub type IOCR0 = crate::Reg; +#[doc(alias = "IOCR0")] +pub type Iocr0 = crate::Reg; #[doc = "Port 9 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -pub type IOCR4 = crate::Reg; +#[doc(alias = "IOCR4")] +pub type Iocr4 = crate::Reg; #[doc = "Port 5 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 9 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -pub type IOCR8 = crate::Reg; +#[doc(alias = "IOCR8")] +pub type Iocr8 = crate::Reg; #[doc = "Port 9 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IN (r) register accessor: Port 9 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Port 9 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 9 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -pub type PDR0 = crate::Reg; +#[doc(alias = "PDR0")] +pub type Pdr0 = crate::Reg; #[doc = "Port 9 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 9 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -pub type PDR1 = crate::Reg; +#[doc(alias = "PDR1")] +pub type Pdr1 = crate::Reg; #[doc = "Port 9 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 9 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -pub type PDISC = crate::Reg; +#[doc(alias = "PDISC")] +pub type Pdisc = crate::Reg; #[doc = "Port 9 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 9 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -pub type PPS = crate::Reg; +#[doc(alias = "PPS")] +pub type Pps = crate::Reg; #[doc = "Port 9 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 9 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -pub type HWSEL = crate::Reg; +#[doc(alias = "HWSEL")] +pub type Hwsel = crate::Reg; #[doc = "Port 9 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port9/hwsel.rs b/src/port9/hwsel.rs index ce1d4dbe..035d8903 100644 --- a/src/port9/hwsel.rs +++ b/src/port9/hwsel.rs @@ -1,59 +1,59 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; -#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type HW0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW0_A { +pub enum Hw0 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW0_A) -> Self { + fn from(variant: Hw0) -> Self { variant as _ } } -impl crate::FieldSpec for HW0_A { +impl crate::FieldSpec for Hw0 { type Ux = u8; } -impl HW0_R { +#[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] +pub type Hw0R = crate::FieldReader; +impl Hw0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW0_A::VALUE1), - 1 => Some(HW0_A::VALUE2), - 2 => Some(HW0_A::VALUE3), + 0 => Some(Hw0::Value1), + 1 => Some(Hw0::Value2), + 2 => Some(Hw0::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW0_A::VALUE1 + *self == Hw0::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW0_A::VALUE2 + *self == Hw0::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW0_A::VALUE3 + *self == Hw0::Value3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; -impl<'a, REG> HW0_W<'a, REG> +pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; +impl<'a, REG> Hw0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE1) + self.variant(Hw0::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE2) + self.variant(Hw0::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW0_A::VALUE3) + self.variant(Hw0::Value3) } } -#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type HW1_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW1_A { +pub enum Hw1 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW1_A) -> Self { + fn from(variant: Hw1) -> Self { variant as _ } } -impl crate::FieldSpec for HW1_A { +impl crate::FieldSpec for Hw1 { type Ux = u8; } -impl HW1_R { +#[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] +pub type Hw1R = crate::FieldReader; +impl Hw1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW1_A::VALUE1), - 1 => Some(HW1_A::VALUE2), - 2 => Some(HW1_A::VALUE3), + 0 => Some(Hw1::Value1), + 1 => Some(Hw1::Value2), + 2 => Some(Hw1::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW1_A::VALUE1 + *self == Hw1::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW1_A::VALUE2 + *self == Hw1::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW1_A::VALUE3 + *self == Hw1::Value3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; -impl<'a, REG> HW1_W<'a, REG> +pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; +impl<'a, REG> Hw1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,71 +133,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE1) + self.variant(Hw1::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE2) + self.variant(Hw1::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW1_A::VALUE3) + self.variant(Hw1::Value3) } } -#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type HW2_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW2_A { +pub enum Hw2 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW2_A) -> Self { + fn from(variant: Hw2) -> Self { variant as _ } } -impl crate::FieldSpec for HW2_A { +impl crate::FieldSpec for Hw2 { type Ux = u8; } -impl HW2_R { +#[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] +pub type Hw2R = crate::FieldReader; +impl Hw2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW2_A::VALUE1), - 1 => Some(HW2_A::VALUE2), - 2 => Some(HW2_A::VALUE3), + 0 => Some(Hw2::Value1), + 1 => Some(Hw2::Value2), + 2 => Some(Hw2::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW2_A::VALUE1 + *self == Hw2::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW2_A::VALUE2 + *self == Hw2::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW2_A::VALUE3 + *self == Hw2::Value3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; -impl<'a, REG> HW2_W<'a, REG> +pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; +impl<'a, REG> Hw2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -205,71 +205,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE1) + self.variant(Hw2::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE2) + self.variant(Hw2::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW2_A::VALUE3) + self.variant(Hw2::Value3) } } -#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type HW3_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW3_A { +pub enum Hw3 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW3_A) -> Self { + fn from(variant: Hw3) -> Self { variant as _ } } -impl crate::FieldSpec for HW3_A { +impl crate::FieldSpec for Hw3 { type Ux = u8; } -impl HW3_R { +#[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] +pub type Hw3R = crate::FieldReader; +impl Hw3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW3_A::VALUE1), - 1 => Some(HW3_A::VALUE2), - 2 => Some(HW3_A::VALUE3), + 0 => Some(Hw3::Value1), + 1 => Some(Hw3::Value2), + 2 => Some(Hw3::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW3_A::VALUE1 + *self == Hw3::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW3_A::VALUE2 + *self == Hw3::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW3_A::VALUE3 + *self == Hw3::Value3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; -impl<'a, REG> HW3_W<'a, REG> +pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; +impl<'a, REG> Hw3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,71 +277,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE1) + self.variant(Hw3::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE2) + self.variant(Hw3::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW3_A::VALUE3) + self.variant(Hw3::Value3) } } -#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type HW4_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW4_A { +pub enum Hw4 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW4_A) -> Self { + fn from(variant: Hw4) -> Self { variant as _ } } -impl crate::FieldSpec for HW4_A { +impl crate::FieldSpec for Hw4 { type Ux = u8; } -impl HW4_R { +#[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] +pub type Hw4R = crate::FieldReader; +impl Hw4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW4_A::VALUE1), - 1 => Some(HW4_A::VALUE2), - 2 => Some(HW4_A::VALUE3), + 0 => Some(Hw4::Value1), + 1 => Some(Hw4::Value2), + 2 => Some(Hw4::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW4_A::VALUE1 + *self == Hw4::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW4_A::VALUE2 + *self == Hw4::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW4_A::VALUE3 + *self == Hw4::Value3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; -impl<'a, REG> HW4_W<'a, REG> +pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; +impl<'a, REG> Hw4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,71 +349,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE1) + self.variant(Hw4::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE2) + self.variant(Hw4::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW4_A::VALUE3) + self.variant(Hw4::Value3) } } -#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type HW5_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW5_A { +pub enum Hw5 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW5_A) -> Self { + fn from(variant: Hw5) -> Self { variant as _ } } -impl crate::FieldSpec for HW5_A { +impl crate::FieldSpec for Hw5 { type Ux = u8; } -impl HW5_R { +#[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] +pub type Hw5R = crate::FieldReader; +impl Hw5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW5_A::VALUE1), - 1 => Some(HW5_A::VALUE2), - 2 => Some(HW5_A::VALUE3), + 0 => Some(Hw5::Value1), + 1 => Some(Hw5::Value2), + 2 => Some(Hw5::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW5_A::VALUE1 + *self == Hw5::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW5_A::VALUE2 + *self == Hw5::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW5_A::VALUE3 + *self == Hw5::Value3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; -impl<'a, REG> HW5_W<'a, REG> +pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; +impl<'a, REG> Hw5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,71 +421,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE1) + self.variant(Hw5::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE2) + self.variant(Hw5::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW5_A::VALUE3) + self.variant(Hw5::Value3) } } -#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type HW6_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW6_A { +pub enum Hw6 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW6_A) -> Self { + fn from(variant: Hw6) -> Self { variant as _ } } -impl crate::FieldSpec for HW6_A { +impl crate::FieldSpec for Hw6 { type Ux = u8; } -impl HW6_R { +#[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] +pub type Hw6R = crate::FieldReader; +impl Hw6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW6_A::VALUE1), - 1 => Some(HW6_A::VALUE2), - 2 => Some(HW6_A::VALUE3), + 0 => Some(Hw6::Value1), + 1 => Some(Hw6::Value2), + 2 => Some(Hw6::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW6_A::VALUE1 + *self == Hw6::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW6_A::VALUE2 + *self == Hw6::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW6_A::VALUE3 + *self == Hw6::Value3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; -impl<'a, REG> HW6_W<'a, REG> +pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; +impl<'a, REG> Hw6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -493,71 +493,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE1) + self.variant(Hw6::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE2) + self.variant(Hw6::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW6_A::VALUE3) + self.variant(Hw6::Value3) } } -#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type HW7_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW7_A { +pub enum Hw7 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW7_A) -> Self { + fn from(variant: Hw7) -> Self { variant as _ } } -impl crate::FieldSpec for HW7_A { +impl crate::FieldSpec for Hw7 { type Ux = u8; } -impl HW7_R { +#[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] +pub type Hw7R = crate::FieldReader; +impl Hw7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW7_A::VALUE1), - 1 => Some(HW7_A::VALUE2), - 2 => Some(HW7_A::VALUE3), + 0 => Some(Hw7::Value1), + 1 => Some(Hw7::Value2), + 2 => Some(Hw7::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW7_A::VALUE1 + *self == Hw7::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW7_A::VALUE2 + *self == Hw7::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW7_A::VALUE3 + *self == Hw7::Value3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; -impl<'a, REG> HW7_W<'a, REG> +pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; +impl<'a, REG> Hw7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -565,71 +565,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE1) + self.variant(Hw7::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE2) + self.variant(Hw7::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW7_A::VALUE3) + self.variant(Hw7::Value3) } } -#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type HW8_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW8_A { +pub enum Hw8 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW8_A) -> Self { + fn from(variant: Hw8) -> Self { variant as _ } } -impl crate::FieldSpec for HW8_A { +impl crate::FieldSpec for Hw8 { type Ux = u8; } -impl HW8_R { +#[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] +pub type Hw8R = crate::FieldReader; +impl Hw8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW8_A::VALUE1), - 1 => Some(HW8_A::VALUE2), - 2 => Some(HW8_A::VALUE3), + 0 => Some(Hw8::Value1), + 1 => Some(Hw8::Value2), + 2 => Some(Hw8::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW8_A::VALUE1 + *self == Hw8::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW8_A::VALUE2 + *self == Hw8::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW8_A::VALUE3 + *self == Hw8::Value3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; -impl<'a, REG> HW8_W<'a, REG> +pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; +impl<'a, REG> Hw8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -637,71 +637,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE1) + self.variant(Hw8::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE2) + self.variant(Hw8::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW8_A::VALUE3) + self.variant(Hw8::Value3) } } -#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type HW9_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW9_A { +pub enum Hw9 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW9_A) -> Self { + fn from(variant: Hw9) -> Self { variant as _ } } -impl crate::FieldSpec for HW9_A { +impl crate::FieldSpec for Hw9 { type Ux = u8; } -impl HW9_R { +#[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] +pub type Hw9R = crate::FieldReader; +impl Hw9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW9_A::VALUE1), - 1 => Some(HW9_A::VALUE2), - 2 => Some(HW9_A::VALUE3), + 0 => Some(Hw9::Value1), + 1 => Some(Hw9::Value2), + 2 => Some(Hw9::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW9_A::VALUE1 + *self == Hw9::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW9_A::VALUE2 + *self == Hw9::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW9_A::VALUE3 + *self == Hw9::Value3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; -impl<'a, REG> HW9_W<'a, REG> +pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; +impl<'a, REG> Hw9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -709,71 +709,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE1) + self.variant(Hw9::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE2) + self.variant(Hw9::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW9_A::VALUE3) + self.variant(Hw9::Value3) } } -#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type HW10_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW10_A { +pub enum Hw10 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW10_A) -> Self { + fn from(variant: Hw10) -> Self { variant as _ } } -impl crate::FieldSpec for HW10_A { +impl crate::FieldSpec for Hw10 { type Ux = u8; } -impl HW10_R { +#[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] +pub type Hw10R = crate::FieldReader; +impl Hw10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW10_A::VALUE1), - 1 => Some(HW10_A::VALUE2), - 2 => Some(HW10_A::VALUE3), + 0 => Some(Hw10::Value1), + 1 => Some(Hw10::Value2), + 2 => Some(Hw10::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW10_A::VALUE1 + *self == Hw10::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW10_A::VALUE2 + *self == Hw10::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW10_A::VALUE3 + *self == Hw10::Value3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; -impl<'a, REG> HW10_W<'a, REG> +pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; +impl<'a, REG> Hw10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -781,71 +781,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE1) + self.variant(Hw10::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE2) + self.variant(Hw10::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW10_A::VALUE3) + self.variant(Hw10::Value3) } } -#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type HW11_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW11_A { +pub enum Hw11 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW11_A) -> Self { + fn from(variant: Hw11) -> Self { variant as _ } } -impl crate::FieldSpec for HW11_A { +impl crate::FieldSpec for Hw11 { type Ux = u8; } -impl HW11_R { +#[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] +pub type Hw11R = crate::FieldReader; +impl Hw11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW11_A::VALUE1), - 1 => Some(HW11_A::VALUE2), - 2 => Some(HW11_A::VALUE3), + 0 => Some(Hw11::Value1), + 1 => Some(Hw11::Value2), + 2 => Some(Hw11::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW11_A::VALUE1 + *self == Hw11::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW11_A::VALUE2 + *self == Hw11::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW11_A::VALUE3 + *self == Hw11::Value3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; -impl<'a, REG> HW11_W<'a, REG> +pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; +impl<'a, REG> Hw11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -853,71 +853,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE1) + self.variant(Hw11::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE2) + self.variant(Hw11::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW11_A::VALUE3) + self.variant(Hw11::Value3) } } -#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type HW12_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW12_A { +pub enum Hw12 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW12_A) -> Self { + fn from(variant: Hw12) -> Self { variant as _ } } -impl crate::FieldSpec for HW12_A { +impl crate::FieldSpec for Hw12 { type Ux = u8; } -impl HW12_R { +#[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] +pub type Hw12R = crate::FieldReader; +impl Hw12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW12_A::VALUE1), - 1 => Some(HW12_A::VALUE2), - 2 => Some(HW12_A::VALUE3), + 0 => Some(Hw12::Value1), + 1 => Some(Hw12::Value2), + 2 => Some(Hw12::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW12_A::VALUE1 + *self == Hw12::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW12_A::VALUE2 + *self == Hw12::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW12_A::VALUE3 + *self == Hw12::Value3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; -impl<'a, REG> HW12_W<'a, REG> +pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; +impl<'a, REG> Hw12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -925,71 +925,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE1) + self.variant(Hw12::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE2) + self.variant(Hw12::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW12_A::VALUE3) + self.variant(Hw12::Value3) } } -#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type HW13_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW13_A { +pub enum Hw13 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW13_A) -> Self { + fn from(variant: Hw13) -> Self { variant as _ } } -impl crate::FieldSpec for HW13_A { +impl crate::FieldSpec for Hw13 { type Ux = u8; } -impl HW13_R { +#[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] +pub type Hw13R = crate::FieldReader; +impl Hw13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW13_A::VALUE1), - 1 => Some(HW13_A::VALUE2), - 2 => Some(HW13_A::VALUE3), + 0 => Some(Hw13::Value1), + 1 => Some(Hw13::Value2), + 2 => Some(Hw13::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW13_A::VALUE1 + *self == Hw13::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW13_A::VALUE2 + *self == Hw13::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW13_A::VALUE3 + *self == Hw13::Value3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; -impl<'a, REG> HW13_W<'a, REG> +pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; +impl<'a, REG> Hw13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -997,71 +997,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE1) + self.variant(Hw13::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE2) + self.variant(Hw13::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW13_A::VALUE3) + self.variant(Hw13::Value3) } } -#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type HW14_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW14_A { +pub enum Hw14 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW14_A) -> Self { + fn from(variant: Hw14) -> Self { variant as _ } } -impl crate::FieldSpec for HW14_A { +impl crate::FieldSpec for Hw14 { type Ux = u8; } -impl HW14_R { +#[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] +pub type Hw14R = crate::FieldReader; +impl Hw14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW14_A::VALUE1), - 1 => Some(HW14_A::VALUE2), - 2 => Some(HW14_A::VALUE3), + 0 => Some(Hw14::Value1), + 1 => Some(Hw14::Value2), + 2 => Some(Hw14::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW14_A::VALUE1 + *self == Hw14::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW14_A::VALUE2 + *self == Hw14::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW14_A::VALUE3 + *self == Hw14::Value3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; -impl<'a, REG> HW14_W<'a, REG> +pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; +impl<'a, REG> Hw14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1069,71 +1069,71 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE1) + self.variant(Hw14::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE2) + self.variant(Hw14::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW14_A::VALUE3) + self.variant(Hw14::Value3) } } -#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type HW15_R = crate::FieldReader; #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HW15_A { +pub enum Hw15 { #[doc = "0: Software control only."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HW15_A) -> Self { + fn from(variant: Hw15) -> Self { variant as _ } } -impl crate::FieldSpec for HW15_A { +impl crate::FieldSpec for Hw15 { type Ux = u8; } -impl HW15_R { +#[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] +pub type Hw15R = crate::FieldReader; +impl Hw15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HW15_A::VALUE1), - 1 => Some(HW15_A::VALUE2), - 2 => Some(HW15_A::VALUE3), + 0 => Some(Hw15::Value1), + 1 => Some(Hw15::Value2), + 2 => Some(Hw15::Value3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HW15_A::VALUE1 + *self == Hw15::Value1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HW15_A::VALUE2 + *self == Hw15::Value2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HW15_A::VALUE3 + *self == Hw15::Value3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; -impl<'a, REG> HW15_W<'a, REG> +pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; +impl<'a, REG> Hw15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1141,222 +1141,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE1) + self.variant(Hw15::Value1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE2) + self.variant(Hw15::Value2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HW15_A::VALUE3) + self.variant(Hw15::Value3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> HW0_R { - HW0_R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> Hw0R { + Hw0R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> HW1_R { - HW1_R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> Hw1R { + Hw1R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> HW2_R { - HW2_R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> Hw2R { + Hw2R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> HW3_R { - HW3_R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> Hw3R { + Hw3R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> HW4_R { - HW4_R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> Hw4R { + Hw4R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> HW5_R { - HW5_R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> Hw5R { + Hw5R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> HW6_R { - HW6_R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> Hw6R { + Hw6R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> HW7_R { - HW7_R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> Hw7R { + Hw7R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> HW8_R { - HW8_R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> Hw8R { + Hw8R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> HW9_R { - HW9_R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> Hw9R { + Hw9R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> HW10_R { - HW10_R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> Hw10R { + Hw10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> HW11_R { - HW11_R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> Hw11R { + Hw11R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> HW12_R { - HW12_R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> Hw12R { + Hw12R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> HW13_R { - HW13_R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> Hw13R { + Hw13R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> HW14_R { - HW14_R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> Hw14R { + Hw14R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> HW15_R { - HW15_R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> Hw15R { + Hw15R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> HW0_W { - HW0_W::new(self, 0) + pub fn hw0(&mut self) -> Hw0W { + Hw0W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> HW1_W { - HW1_W::new(self, 2) + pub fn hw1(&mut self) -> Hw1W { + Hw1W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> HW2_W { - HW2_W::new(self, 4) + pub fn hw2(&mut self) -> Hw2W { + Hw2W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> HW3_W { - HW3_W::new(self, 6) + pub fn hw3(&mut self) -> Hw3W { + Hw3W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> HW4_W { - HW4_W::new(self, 8) + pub fn hw4(&mut self) -> Hw4W { + Hw4W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> HW5_W { - HW5_W::new(self, 10) + pub fn hw5(&mut self) -> Hw5W { + Hw5W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> HW6_W { - HW6_W::new(self, 12) + pub fn hw6(&mut self) -> Hw6W { + Hw6W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> HW7_W { - HW7_W::new(self, 14) + pub fn hw7(&mut self) -> Hw7W { + Hw7W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> HW8_W { - HW8_W::new(self, 16) + pub fn hw8(&mut self) -> Hw8W { + Hw8W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> HW9_W { - HW9_W::new(self, 18) + pub fn hw9(&mut self) -> Hw9W { + Hw9W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> HW10_W { - HW10_W::new(self, 20) + pub fn hw10(&mut self) -> Hw10W { + Hw10W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> HW11_W { - HW11_W::new(self, 22) + pub fn hw11(&mut self) -> Hw11W { + Hw11W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> HW12_W { - HW12_W::new(self, 24) + pub fn hw12(&mut self) -> Hw12W { + Hw12W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> HW13_W { - HW13_W::new(self, 26) + pub fn hw13(&mut self) -> Hw13W { + Hw13W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> HW14_W { - HW14_W::new(self, 28) + pub fn hw14(&mut self) -> Hw14W { + Hw14W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> HW15_W { - HW15_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hw15(&mut self) -> Hw15W { + Hw15W::new(self, 30) } } #[doc = "Port 9 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWSEL_SPEC; -impl crate::RegisterSpec for HWSEL_SPEC { +pub struct HwselSpec; +impl crate::RegisterSpec for HwselSpec { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HWSEL_SPEC {} +impl crate::Readable for HwselSpec {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HWSEL_SPEC { +impl crate::Writable for HwselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HWSEL_SPEC { +impl crate::Resettable for HwselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/in_.rs b/src/port9/in_.rs index 06b543d8..4b837b1f 100644 --- a/src/port9/in_.rs +++ b/src/port9/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; -#[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Input Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } -#[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Input Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } -#[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Input Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } -#[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Input Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } -#[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Input Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } -#[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Input Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } -#[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Input Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } -#[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Input Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } -#[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Input Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } -#[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Input Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } -#[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Input Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } -#[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Input Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } -#[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Input Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } -#[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Input Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } -#[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Input Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } -#[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The input level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Input Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 9 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for IN_SPEC {} +impl crate::Readable for InSpec {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/iocr0.rs b/src/port9/iocr0.rs index f178d6f3..77d81c8c 100644 --- a/src/port9/iocr0.rs +++ b/src/port9/iocr0.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; -#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type PC0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC0_A { +pub enum Pc0 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC0_A) -> Self { + fn from(variant: Pc0) -> Self { variant as _ } } -impl crate::FieldSpec for PC0_A { +impl crate::FieldSpec for Pc0 { type Ux = u8; } -impl PC0_R { +#[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc0R = crate::FieldReader; +impl Pc0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC0_A::VALUE1), - 1 => Some(PC0_A::VALUE2), - 2 => Some(PC0_A::VALUE3), - 3 => Some(PC0_A::VALUE4), - 4 => Some(PC0_A::VALUE5), - 5 => Some(PC0_A::VALUE6), - 6 => Some(PC0_A::VALUE7), - 7 => Some(PC0_A::VALUE8), - 16 => Some(PC0_A::VALUE9), - 17 => Some(PC0_A::VALUE10), - 18 => Some(PC0_A::VALUE11), - 19 => Some(PC0_A::VALUE12), - 20 => Some(PC0_A::VALUE13), - 24 => Some(PC0_A::VALUE14), - 25 => Some(PC0_A::VALUE15), - 26 => Some(PC0_A::VALUE16), - 27 => Some(PC0_A::VALUE17), - 28 => Some(PC0_A::VALUE18), + 0 => Some(Pc0::Value1), + 1 => Some(Pc0::Value2), + 2 => Some(Pc0::Value3), + 3 => Some(Pc0::Value4), + 4 => Some(Pc0::Value5), + 5 => Some(Pc0::Value6), + 6 => Some(Pc0::Value7), + 7 => Some(Pc0::Value8), + 16 => Some(Pc0::Value9), + 17 => Some(Pc0::Value10), + 18 => Some(Pc0::Value11), + 19 => Some(Pc0::Value12), + 20 => Some(Pc0::Value13), + 24 => Some(Pc0::Value14), + 25 => Some(Pc0::Value15), + 26 => Some(Pc0::Value16), + 27 => Some(Pc0::Value17), + 28 => Some(Pc0::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC0_A::VALUE1 + *self == Pc0::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC0_A::VALUE2 + *self == Pc0::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC0_A::VALUE3 + *self == Pc0::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC0_A::VALUE4 + *self == Pc0::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC0_A::VALUE5 + *self == Pc0::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC0_A::VALUE6 + *self == Pc0::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC0_A::VALUE7 + *self == Pc0::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC0_A::VALUE8 + *self == Pc0::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC0_A::VALUE9 + *self == Pc0::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC0_A::VALUE10 + *self == Pc0::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC0_A::VALUE11 + *self == Pc0::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC0_A::VALUE12 + *self == Pc0::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC0_A::VALUE13 + *self == Pc0::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC0_A::VALUE14 + *self == Pc0::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC0_A::VALUE15 + *self == Pc0::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC0_A::VALUE16 + *self == Pc0::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC0_A::VALUE17 + *self == Pc0::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC0_A::VALUE18 + *self == Pc0::Value18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; -impl<'a, REG> PC0_W<'a, REG> +pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; +impl<'a, REG> Pc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE1) + self.variant(Pc0::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE2) + self.variant(Pc0::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE3) + self.variant(Pc0::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE4) + self.variant(Pc0::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE5) + self.variant(Pc0::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE6) + self.variant(Pc0::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE7) + self.variant(Pc0::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE8) + self.variant(Pc0::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE9) + self.variant(Pc0::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE10) + self.variant(Pc0::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE11) + self.variant(Pc0::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE12) + self.variant(Pc0::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE13) + self.variant(Pc0::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE14) + self.variant(Pc0::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE15) + self.variant(Pc0::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE16) + self.variant(Pc0::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE17) + self.variant(Pc0::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC0_A::VALUE18) + self.variant(Pc0::Value18) } } -#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type PC1_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC1_A { +pub enum Pc1 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC1_A) -> Self { + fn from(variant: Pc1) -> Self { variant as _ } } -impl crate::FieldSpec for PC1_A { +impl crate::FieldSpec for Pc1 { type Ux = u8; } -impl PC1_R { +#[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc1R = crate::FieldReader; +impl Pc1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC1_A::VALUE1), - 1 => Some(PC1_A::VALUE2), - 2 => Some(PC1_A::VALUE3), - 3 => Some(PC1_A::VALUE4), - 4 => Some(PC1_A::VALUE5), - 5 => Some(PC1_A::VALUE6), - 6 => Some(PC1_A::VALUE7), - 7 => Some(PC1_A::VALUE8), - 16 => Some(PC1_A::VALUE9), - 17 => Some(PC1_A::VALUE10), - 18 => Some(PC1_A::VALUE11), - 19 => Some(PC1_A::VALUE12), - 20 => Some(PC1_A::VALUE13), - 24 => Some(PC1_A::VALUE14), - 25 => Some(PC1_A::VALUE15), - 26 => Some(PC1_A::VALUE16), - 27 => Some(PC1_A::VALUE17), - 28 => Some(PC1_A::VALUE18), + 0 => Some(Pc1::Value1), + 1 => Some(Pc1::Value2), + 2 => Some(Pc1::Value3), + 3 => Some(Pc1::Value4), + 4 => Some(Pc1::Value5), + 5 => Some(Pc1::Value6), + 6 => Some(Pc1::Value7), + 7 => Some(Pc1::Value8), + 16 => Some(Pc1::Value9), + 17 => Some(Pc1::Value10), + 18 => Some(Pc1::Value11), + 19 => Some(Pc1::Value12), + 20 => Some(Pc1::Value13), + 24 => Some(Pc1::Value14), + 25 => Some(Pc1::Value15), + 26 => Some(Pc1::Value16), + 27 => Some(Pc1::Value17), + 28 => Some(Pc1::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC1_A::VALUE1 + *self == Pc1::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC1_A::VALUE2 + *self == Pc1::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC1_A::VALUE3 + *self == Pc1::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC1_A::VALUE4 + *self == Pc1::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC1_A::VALUE5 + *self == Pc1::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC1_A::VALUE6 + *self == Pc1::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC1_A::VALUE7 + *self == Pc1::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC1_A::VALUE8 + *self == Pc1::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC1_A::VALUE9 + *self == Pc1::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC1_A::VALUE10 + *self == Pc1::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC1_A::VALUE11 + *self == Pc1::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC1_A::VALUE12 + *self == Pc1::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC1_A::VALUE13 + *self == Pc1::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC1_A::VALUE14 + *self == Pc1::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC1_A::VALUE15 + *self == Pc1::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC1_A::VALUE16 + *self == Pc1::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC1_A::VALUE17 + *self == Pc1::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC1_A::VALUE18 + *self == Pc1::Value18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; -impl<'a, REG> PC1_W<'a, REG> +pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; +impl<'a, REG> Pc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE1) + self.variant(Pc1::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE2) + self.variant(Pc1::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE3) + self.variant(Pc1::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE4) + self.variant(Pc1::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE5) + self.variant(Pc1::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE6) + self.variant(Pc1::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE7) + self.variant(Pc1::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE8) + self.variant(Pc1::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE9) + self.variant(Pc1::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE10) + self.variant(Pc1::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE11) + self.variant(Pc1::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE12) + self.variant(Pc1::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE13) + self.variant(Pc1::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE14) + self.variant(Pc1::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE15) + self.variant(Pc1::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE16) + self.variant(Pc1::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE17) + self.variant(Pc1::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC1_A::VALUE18) + self.variant(Pc1::Value18) } } -#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type PC2_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC2_A { +pub enum Pc2 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC2_A) -> Self { + fn from(variant: Pc2) -> Self { variant as _ } } -impl crate::FieldSpec for PC2_A { +impl crate::FieldSpec for Pc2 { type Ux = u8; } -impl PC2_R { +#[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc2R = crate::FieldReader; +impl Pc2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC2_A::VALUE1), - 1 => Some(PC2_A::VALUE2), - 2 => Some(PC2_A::VALUE3), - 3 => Some(PC2_A::VALUE4), - 4 => Some(PC2_A::VALUE5), - 5 => Some(PC2_A::VALUE6), - 6 => Some(PC2_A::VALUE7), - 7 => Some(PC2_A::VALUE8), - 16 => Some(PC2_A::VALUE9), - 17 => Some(PC2_A::VALUE10), - 18 => Some(PC2_A::VALUE11), - 19 => Some(PC2_A::VALUE12), - 20 => Some(PC2_A::VALUE13), - 24 => Some(PC2_A::VALUE14), - 25 => Some(PC2_A::VALUE15), - 26 => Some(PC2_A::VALUE16), - 27 => Some(PC2_A::VALUE17), - 28 => Some(PC2_A::VALUE18), + 0 => Some(Pc2::Value1), + 1 => Some(Pc2::Value2), + 2 => Some(Pc2::Value3), + 3 => Some(Pc2::Value4), + 4 => Some(Pc2::Value5), + 5 => Some(Pc2::Value6), + 6 => Some(Pc2::Value7), + 7 => Some(Pc2::Value8), + 16 => Some(Pc2::Value9), + 17 => Some(Pc2::Value10), + 18 => Some(Pc2::Value11), + 19 => Some(Pc2::Value12), + 20 => Some(Pc2::Value13), + 24 => Some(Pc2::Value14), + 25 => Some(Pc2::Value15), + 26 => Some(Pc2::Value16), + 27 => Some(Pc2::Value17), + 28 => Some(Pc2::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC2_A::VALUE1 + *self == Pc2::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC2_A::VALUE2 + *self == Pc2::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC2_A::VALUE3 + *self == Pc2::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC2_A::VALUE4 + *self == Pc2::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC2_A::VALUE5 + *self == Pc2::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC2_A::VALUE6 + *self == Pc2::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC2_A::VALUE7 + *self == Pc2::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC2_A::VALUE8 + *self == Pc2::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC2_A::VALUE9 + *self == Pc2::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC2_A::VALUE10 + *self == Pc2::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC2_A::VALUE11 + *self == Pc2::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC2_A::VALUE12 + *self == Pc2::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC2_A::VALUE13 + *self == Pc2::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC2_A::VALUE14 + *self == Pc2::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC2_A::VALUE15 + *self == Pc2::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC2_A::VALUE16 + *self == Pc2::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC2_A::VALUE17 + *self == Pc2::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC2_A::VALUE18 + *self == Pc2::Value18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; -impl<'a, REG> PC2_W<'a, REG> +pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; +impl<'a, REG> Pc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE1) + self.variant(Pc2::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE2) + self.variant(Pc2::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE3) + self.variant(Pc2::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE4) + self.variant(Pc2::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE5) + self.variant(Pc2::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE6) + self.variant(Pc2::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE7) + self.variant(Pc2::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE8) + self.variant(Pc2::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE9) + self.variant(Pc2::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE10) + self.variant(Pc2::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE11) + self.variant(Pc2::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE12) + self.variant(Pc2::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE13) + self.variant(Pc2::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE14) + self.variant(Pc2::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE15) + self.variant(Pc2::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE16) + self.variant(Pc2::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE17) + self.variant(Pc2::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC2_A::VALUE18) + self.variant(Pc2::Value18) } } -#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type PC3_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC3_A { +pub enum Pc3 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC3_A) -> Self { + fn from(variant: Pc3) -> Self { variant as _ } } -impl crate::FieldSpec for PC3_A { +impl crate::FieldSpec for Pc3 { type Ux = u8; } -impl PC3_R { +#[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] +pub type Pc3R = crate::FieldReader; +impl Pc3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC3_A::VALUE1), - 1 => Some(PC3_A::VALUE2), - 2 => Some(PC3_A::VALUE3), - 3 => Some(PC3_A::VALUE4), - 4 => Some(PC3_A::VALUE5), - 5 => Some(PC3_A::VALUE6), - 6 => Some(PC3_A::VALUE7), - 7 => Some(PC3_A::VALUE8), - 16 => Some(PC3_A::VALUE9), - 17 => Some(PC3_A::VALUE10), - 18 => Some(PC3_A::VALUE11), - 19 => Some(PC3_A::VALUE12), - 20 => Some(PC3_A::VALUE13), - 24 => Some(PC3_A::VALUE14), - 25 => Some(PC3_A::VALUE15), - 26 => Some(PC3_A::VALUE16), - 27 => Some(PC3_A::VALUE17), - 28 => Some(PC3_A::VALUE18), + 0 => Some(Pc3::Value1), + 1 => Some(Pc3::Value2), + 2 => Some(Pc3::Value3), + 3 => Some(Pc3::Value4), + 4 => Some(Pc3::Value5), + 5 => Some(Pc3::Value6), + 6 => Some(Pc3::Value7), + 7 => Some(Pc3::Value8), + 16 => Some(Pc3::Value9), + 17 => Some(Pc3::Value10), + 18 => Some(Pc3::Value11), + 19 => Some(Pc3::Value12), + 20 => Some(Pc3::Value13), + 24 => Some(Pc3::Value14), + 25 => Some(Pc3::Value15), + 26 => Some(Pc3::Value16), + 27 => Some(Pc3::Value17), + 28 => Some(Pc3::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC3_A::VALUE1 + *self == Pc3::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC3_A::VALUE2 + *self == Pc3::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC3_A::VALUE3 + *self == Pc3::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC3_A::VALUE4 + *self == Pc3::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC3_A::VALUE5 + *self == Pc3::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC3_A::VALUE6 + *self == Pc3::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC3_A::VALUE7 + *self == Pc3::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC3_A::VALUE8 + *self == Pc3::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC3_A::VALUE9 + *self == Pc3::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC3_A::VALUE10 + *self == Pc3::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC3_A::VALUE11 + *self == Pc3::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC3_A::VALUE12 + *self == Pc3::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC3_A::VALUE13 + *self == Pc3::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC3_A::VALUE14 + *self == Pc3::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC3_A::VALUE15 + *self == Pc3::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC3_A::VALUE16 + *self == Pc3::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC3_A::VALUE17 + *self == Pc3::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC3_A::VALUE18 + *self == Pc3::Value18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; -impl<'a, REG> PC3_W<'a, REG> +pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; +impl<'a, REG> Pc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE1) + self.variant(Pc3::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE2) + self.variant(Pc3::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE3) + self.variant(Pc3::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE4) + self.variant(Pc3::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE5) + self.variant(Pc3::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE6) + self.variant(Pc3::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE7) + self.variant(Pc3::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE8) + self.variant(Pc3::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE9) + self.variant(Pc3::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE10) + self.variant(Pc3::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE11) + self.variant(Pc3::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE12) + self.variant(Pc3::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE13) + self.variant(Pc3::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE14) + self.variant(Pc3::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE15) + self.variant(Pc3::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE16) + self.variant(Pc3::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE17) + self.variant(Pc3::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC3_A::VALUE18) + self.variant(Pc3::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> PC0_R { - PC0_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> Pc0R { + Pc0R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> PC1_R { - PC1_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> Pc1R { + Pc1R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> PC2_R { - PC2_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> Pc2R { + Pc2R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> PC3_R { - PC3_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> Pc3R { + Pc3R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> PC0_W { - PC0_W::new(self, 3) + pub fn pc0(&mut self) -> Pc0W { + Pc0W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> PC1_W { - PC1_W::new(self, 11) + pub fn pc1(&mut self) -> Pc1W { + Pc1W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> PC2_W { - PC2_W::new(self, 19) + pub fn pc2(&mut self) -> Pc2W { + Pc2W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> PC3_W { - PC3_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc3(&mut self) -> Pc3W { + Pc3W::new(self, 27) } } #[doc = "Port 9 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR0_SPEC; -impl crate::RegisterSpec for IOCR0_SPEC { +pub struct Iocr0Spec; +impl crate::RegisterSpec for Iocr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for IOCR0_SPEC {} +impl crate::Readable for Iocr0Spec {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for IOCR0_SPEC { +impl crate::Writable for Iocr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for IOCR0_SPEC { +impl crate::Resettable for Iocr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/iocr4.rs b/src/port9/iocr4.rs index 918a2e62..9dd81006 100644 --- a/src/port9/iocr4.rs +++ b/src/port9/iocr4.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; -#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type PC4_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC4_A { +pub enum Pc4 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC4_A) -> Self { + fn from(variant: Pc4) -> Self { variant as _ } } -impl crate::FieldSpec for PC4_A { +impl crate::FieldSpec for Pc4 { type Ux = u8; } -impl PC4_R { +#[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc4R = crate::FieldReader; +impl Pc4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC4_A::VALUE1), - 1 => Some(PC4_A::VALUE2), - 2 => Some(PC4_A::VALUE3), - 3 => Some(PC4_A::VALUE4), - 4 => Some(PC4_A::VALUE5), - 5 => Some(PC4_A::VALUE6), - 6 => Some(PC4_A::VALUE7), - 7 => Some(PC4_A::VALUE8), - 16 => Some(PC4_A::VALUE9), - 17 => Some(PC4_A::VALUE10), - 18 => Some(PC4_A::VALUE11), - 19 => Some(PC4_A::VALUE12), - 20 => Some(PC4_A::VALUE13), - 24 => Some(PC4_A::VALUE14), - 25 => Some(PC4_A::VALUE15), - 26 => Some(PC4_A::VALUE16), - 27 => Some(PC4_A::VALUE17), - 28 => Some(PC4_A::VALUE18), + 0 => Some(Pc4::Value1), + 1 => Some(Pc4::Value2), + 2 => Some(Pc4::Value3), + 3 => Some(Pc4::Value4), + 4 => Some(Pc4::Value5), + 5 => Some(Pc4::Value6), + 6 => Some(Pc4::Value7), + 7 => Some(Pc4::Value8), + 16 => Some(Pc4::Value9), + 17 => Some(Pc4::Value10), + 18 => Some(Pc4::Value11), + 19 => Some(Pc4::Value12), + 20 => Some(Pc4::Value13), + 24 => Some(Pc4::Value14), + 25 => Some(Pc4::Value15), + 26 => Some(Pc4::Value16), + 27 => Some(Pc4::Value17), + 28 => Some(Pc4::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC4_A::VALUE1 + *self == Pc4::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC4_A::VALUE2 + *self == Pc4::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC4_A::VALUE3 + *self == Pc4::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC4_A::VALUE4 + *self == Pc4::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC4_A::VALUE5 + *self == Pc4::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC4_A::VALUE6 + *self == Pc4::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC4_A::VALUE7 + *self == Pc4::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC4_A::VALUE8 + *self == Pc4::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC4_A::VALUE9 + *self == Pc4::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC4_A::VALUE10 + *self == Pc4::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC4_A::VALUE11 + *self == Pc4::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC4_A::VALUE12 + *self == Pc4::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC4_A::VALUE13 + *self == Pc4::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC4_A::VALUE14 + *self == Pc4::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC4_A::VALUE15 + *self == Pc4::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC4_A::VALUE16 + *self == Pc4::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC4_A::VALUE17 + *self == Pc4::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC4_A::VALUE18 + *self == Pc4::Value18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; -impl<'a, REG> PC4_W<'a, REG> +pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; +impl<'a, REG> Pc4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE1) + self.variant(Pc4::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE2) + self.variant(Pc4::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE3) + self.variant(Pc4::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE4) + self.variant(Pc4::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE5) + self.variant(Pc4::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE6) + self.variant(Pc4::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE7) + self.variant(Pc4::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE8) + self.variant(Pc4::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE9) + self.variant(Pc4::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE10) + self.variant(Pc4::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE11) + self.variant(Pc4::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE12) + self.variant(Pc4::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE13) + self.variant(Pc4::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE14) + self.variant(Pc4::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE15) + self.variant(Pc4::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE16) + self.variant(Pc4::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE17) + self.variant(Pc4::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC4_A::VALUE18) + self.variant(Pc4::Value18) } } -#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type PC5_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC5_A { +pub enum Pc5 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC5_A) -> Self { + fn from(variant: Pc5) -> Self { variant as _ } } -impl crate::FieldSpec for PC5_A { +impl crate::FieldSpec for Pc5 { type Ux = u8; } -impl PC5_R { +#[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc5R = crate::FieldReader; +impl Pc5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC5_A::VALUE1), - 1 => Some(PC5_A::VALUE2), - 2 => Some(PC5_A::VALUE3), - 3 => Some(PC5_A::VALUE4), - 4 => Some(PC5_A::VALUE5), - 5 => Some(PC5_A::VALUE6), - 6 => Some(PC5_A::VALUE7), - 7 => Some(PC5_A::VALUE8), - 16 => Some(PC5_A::VALUE9), - 17 => Some(PC5_A::VALUE10), - 18 => Some(PC5_A::VALUE11), - 19 => Some(PC5_A::VALUE12), - 20 => Some(PC5_A::VALUE13), - 24 => Some(PC5_A::VALUE14), - 25 => Some(PC5_A::VALUE15), - 26 => Some(PC5_A::VALUE16), - 27 => Some(PC5_A::VALUE17), - 28 => Some(PC5_A::VALUE18), + 0 => Some(Pc5::Value1), + 1 => Some(Pc5::Value2), + 2 => Some(Pc5::Value3), + 3 => Some(Pc5::Value4), + 4 => Some(Pc5::Value5), + 5 => Some(Pc5::Value6), + 6 => Some(Pc5::Value7), + 7 => Some(Pc5::Value8), + 16 => Some(Pc5::Value9), + 17 => Some(Pc5::Value10), + 18 => Some(Pc5::Value11), + 19 => Some(Pc5::Value12), + 20 => Some(Pc5::Value13), + 24 => Some(Pc5::Value14), + 25 => Some(Pc5::Value15), + 26 => Some(Pc5::Value16), + 27 => Some(Pc5::Value17), + 28 => Some(Pc5::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC5_A::VALUE1 + *self == Pc5::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC5_A::VALUE2 + *self == Pc5::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC5_A::VALUE3 + *self == Pc5::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC5_A::VALUE4 + *self == Pc5::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC5_A::VALUE5 + *self == Pc5::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC5_A::VALUE6 + *self == Pc5::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC5_A::VALUE7 + *self == Pc5::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC5_A::VALUE8 + *self == Pc5::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC5_A::VALUE9 + *self == Pc5::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC5_A::VALUE10 + *self == Pc5::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC5_A::VALUE11 + *self == Pc5::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC5_A::VALUE12 + *self == Pc5::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC5_A::VALUE13 + *self == Pc5::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC5_A::VALUE14 + *self == Pc5::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC5_A::VALUE15 + *self == Pc5::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC5_A::VALUE16 + *self == Pc5::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC5_A::VALUE17 + *self == Pc5::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC5_A::VALUE18 + *self == Pc5::Value18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; -impl<'a, REG> PC5_W<'a, REG> +pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; +impl<'a, REG> Pc5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE1) + self.variant(Pc5::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE2) + self.variant(Pc5::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE3) + self.variant(Pc5::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE4) + self.variant(Pc5::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE5) + self.variant(Pc5::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE6) + self.variant(Pc5::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE7) + self.variant(Pc5::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE8) + self.variant(Pc5::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE9) + self.variant(Pc5::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE10) + self.variant(Pc5::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE11) + self.variant(Pc5::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE12) + self.variant(Pc5::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE13) + self.variant(Pc5::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE14) + self.variant(Pc5::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE15) + self.variant(Pc5::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE16) + self.variant(Pc5::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE17) + self.variant(Pc5::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC5_A::VALUE18) + self.variant(Pc5::Value18) } } -#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type PC6_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC6_A { +pub enum Pc6 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC6_A) -> Self { + fn from(variant: Pc6) -> Self { variant as _ } } -impl crate::FieldSpec for PC6_A { +impl crate::FieldSpec for Pc6 { type Ux = u8; } -impl PC6_R { +#[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc6R = crate::FieldReader; +impl Pc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC6_A::VALUE1), - 1 => Some(PC6_A::VALUE2), - 2 => Some(PC6_A::VALUE3), - 3 => Some(PC6_A::VALUE4), - 4 => Some(PC6_A::VALUE5), - 5 => Some(PC6_A::VALUE6), - 6 => Some(PC6_A::VALUE7), - 7 => Some(PC6_A::VALUE8), - 16 => Some(PC6_A::VALUE9), - 17 => Some(PC6_A::VALUE10), - 18 => Some(PC6_A::VALUE11), - 19 => Some(PC6_A::VALUE12), - 20 => Some(PC6_A::VALUE13), - 24 => Some(PC6_A::VALUE14), - 25 => Some(PC6_A::VALUE15), - 26 => Some(PC6_A::VALUE16), - 27 => Some(PC6_A::VALUE17), - 28 => Some(PC6_A::VALUE18), + 0 => Some(Pc6::Value1), + 1 => Some(Pc6::Value2), + 2 => Some(Pc6::Value3), + 3 => Some(Pc6::Value4), + 4 => Some(Pc6::Value5), + 5 => Some(Pc6::Value6), + 6 => Some(Pc6::Value7), + 7 => Some(Pc6::Value8), + 16 => Some(Pc6::Value9), + 17 => Some(Pc6::Value10), + 18 => Some(Pc6::Value11), + 19 => Some(Pc6::Value12), + 20 => Some(Pc6::Value13), + 24 => Some(Pc6::Value14), + 25 => Some(Pc6::Value15), + 26 => Some(Pc6::Value16), + 27 => Some(Pc6::Value17), + 28 => Some(Pc6::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC6_A::VALUE1 + *self == Pc6::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC6_A::VALUE2 + *self == Pc6::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC6_A::VALUE3 + *self == Pc6::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC6_A::VALUE4 + *self == Pc6::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC6_A::VALUE5 + *self == Pc6::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC6_A::VALUE6 + *self == Pc6::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC6_A::VALUE7 + *self == Pc6::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC6_A::VALUE8 + *self == Pc6::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC6_A::VALUE9 + *self == Pc6::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC6_A::VALUE10 + *self == Pc6::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC6_A::VALUE11 + *self == Pc6::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC6_A::VALUE12 + *self == Pc6::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC6_A::VALUE13 + *self == Pc6::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC6_A::VALUE14 + *self == Pc6::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC6_A::VALUE15 + *self == Pc6::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC6_A::VALUE16 + *self == Pc6::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC6_A::VALUE17 + *self == Pc6::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC6_A::VALUE18 + *self == Pc6::Value18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; -impl<'a, REG> PC6_W<'a, REG> +pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; +impl<'a, REG> Pc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE1) + self.variant(Pc6::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE2) + self.variant(Pc6::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE3) + self.variant(Pc6::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE4) + self.variant(Pc6::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE5) + self.variant(Pc6::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE6) + self.variant(Pc6::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE7) + self.variant(Pc6::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE8) + self.variant(Pc6::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE9) + self.variant(Pc6::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE10) + self.variant(Pc6::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE11) + self.variant(Pc6::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE12) + self.variant(Pc6::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE13) + self.variant(Pc6::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE14) + self.variant(Pc6::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE15) + self.variant(Pc6::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE16) + self.variant(Pc6::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE17) + self.variant(Pc6::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC6_A::VALUE18) + self.variant(Pc6::Value18) } } -#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type PC7_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC7_A { +pub enum Pc7 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC7_A) -> Self { + fn from(variant: Pc7) -> Self { variant as _ } } -impl crate::FieldSpec for PC7_A { +impl crate::FieldSpec for Pc7 { type Ux = u8; } -impl PC7_R { +#[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] +pub type Pc7R = crate::FieldReader; +impl Pc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC7_A::VALUE1), - 1 => Some(PC7_A::VALUE2), - 2 => Some(PC7_A::VALUE3), - 3 => Some(PC7_A::VALUE4), - 4 => Some(PC7_A::VALUE5), - 5 => Some(PC7_A::VALUE6), - 6 => Some(PC7_A::VALUE7), - 7 => Some(PC7_A::VALUE8), - 16 => Some(PC7_A::VALUE9), - 17 => Some(PC7_A::VALUE10), - 18 => Some(PC7_A::VALUE11), - 19 => Some(PC7_A::VALUE12), - 20 => Some(PC7_A::VALUE13), - 24 => Some(PC7_A::VALUE14), - 25 => Some(PC7_A::VALUE15), - 26 => Some(PC7_A::VALUE16), - 27 => Some(PC7_A::VALUE17), - 28 => Some(PC7_A::VALUE18), + 0 => Some(Pc7::Value1), + 1 => Some(Pc7::Value2), + 2 => Some(Pc7::Value3), + 3 => Some(Pc7::Value4), + 4 => Some(Pc7::Value5), + 5 => Some(Pc7::Value6), + 6 => Some(Pc7::Value7), + 7 => Some(Pc7::Value8), + 16 => Some(Pc7::Value9), + 17 => Some(Pc7::Value10), + 18 => Some(Pc7::Value11), + 19 => Some(Pc7::Value12), + 20 => Some(Pc7::Value13), + 24 => Some(Pc7::Value14), + 25 => Some(Pc7::Value15), + 26 => Some(Pc7::Value16), + 27 => Some(Pc7::Value17), + 28 => Some(Pc7::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC7_A::VALUE1 + *self == Pc7::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC7_A::VALUE2 + *self == Pc7::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC7_A::VALUE3 + *self == Pc7::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC7_A::VALUE4 + *self == Pc7::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC7_A::VALUE5 + *self == Pc7::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC7_A::VALUE6 + *self == Pc7::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC7_A::VALUE7 + *self == Pc7::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC7_A::VALUE8 + *self == Pc7::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC7_A::VALUE9 + *self == Pc7::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC7_A::VALUE10 + *self == Pc7::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC7_A::VALUE11 + *self == Pc7::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC7_A::VALUE12 + *self == Pc7::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC7_A::VALUE13 + *self == Pc7::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC7_A::VALUE14 + *self == Pc7::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC7_A::VALUE15 + *self == Pc7::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC7_A::VALUE16 + *self == Pc7::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC7_A::VALUE17 + *self == Pc7::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC7_A::VALUE18 + *self == Pc7::Value18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; -impl<'a, REG> PC7_W<'a, REG> +pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; +impl<'a, REG> Pc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE1) + self.variant(Pc7::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE2) + self.variant(Pc7::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE3) + self.variant(Pc7::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE4) + self.variant(Pc7::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE5) + self.variant(Pc7::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE6) + self.variant(Pc7::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE7) + self.variant(Pc7::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE8) + self.variant(Pc7::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE9) + self.variant(Pc7::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE10) + self.variant(Pc7::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE11) + self.variant(Pc7::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE12) + self.variant(Pc7::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE13) + self.variant(Pc7::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE14) + self.variant(Pc7::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE15) + self.variant(Pc7::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE16) + self.variant(Pc7::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE17) + self.variant(Pc7::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC7_A::VALUE18) + self.variant(Pc7::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> PC4_R { - PC4_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> Pc4R { + Pc4R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> PC5_R { - PC5_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> Pc5R { + Pc5R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> PC6_R { - PC6_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> Pc6R { + Pc6R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> PC7_R { - PC7_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> Pc7R { + Pc7R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> PC4_W { - PC4_W::new(self, 3) + pub fn pc4(&mut self) -> Pc4W { + Pc4W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> PC5_W { - PC5_W::new(self, 11) + pub fn pc5(&mut self) -> Pc5W { + Pc5W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> PC6_W { - PC6_W::new(self, 19) + pub fn pc6(&mut self) -> Pc6W { + Pc6W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> PC7_W { - PC7_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc7(&mut self) -> Pc7W { + Pc7W::new(self, 27) } } #[doc = "Port 5 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR4_SPEC; -impl crate::RegisterSpec for IOCR4_SPEC { +pub struct Iocr4Spec; +impl crate::RegisterSpec for Iocr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for IOCR4_SPEC {} +impl crate::Readable for Iocr4Spec {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for IOCR4_SPEC { +impl crate::Writable for Iocr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for IOCR4_SPEC { +impl crate::Resettable for Iocr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/iocr8.rs b/src/port9/iocr8.rs index b692fd21..f5be2abf 100644 --- a/src/port9/iocr8.rs +++ b/src/port9/iocr8.rs @@ -1,179 +1,179 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; -#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type PC8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC8_A { +pub enum Pc8 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC8_A) -> Self { + fn from(variant: Pc8) -> Self { variant as _ } } -impl crate::FieldSpec for PC8_A { +impl crate::FieldSpec for Pc8 { type Ux = u8; } -impl PC8_R { +#[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc8R = crate::FieldReader; +impl Pc8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC8_A::VALUE1), - 1 => Some(PC8_A::VALUE2), - 2 => Some(PC8_A::VALUE3), - 3 => Some(PC8_A::VALUE4), - 4 => Some(PC8_A::VALUE5), - 5 => Some(PC8_A::VALUE6), - 6 => Some(PC8_A::VALUE7), - 7 => Some(PC8_A::VALUE8), - 16 => Some(PC8_A::VALUE9), - 17 => Some(PC8_A::VALUE10), - 18 => Some(PC8_A::VALUE11), - 19 => Some(PC8_A::VALUE12), - 20 => Some(PC8_A::VALUE13), - 24 => Some(PC8_A::VALUE14), - 25 => Some(PC8_A::VALUE15), - 26 => Some(PC8_A::VALUE16), - 27 => Some(PC8_A::VALUE17), - 28 => Some(PC8_A::VALUE18), + 0 => Some(Pc8::Value1), + 1 => Some(Pc8::Value2), + 2 => Some(Pc8::Value3), + 3 => Some(Pc8::Value4), + 4 => Some(Pc8::Value5), + 5 => Some(Pc8::Value6), + 6 => Some(Pc8::Value7), + 7 => Some(Pc8::Value8), + 16 => Some(Pc8::Value9), + 17 => Some(Pc8::Value10), + 18 => Some(Pc8::Value11), + 19 => Some(Pc8::Value12), + 20 => Some(Pc8::Value13), + 24 => Some(Pc8::Value14), + 25 => Some(Pc8::Value15), + 26 => Some(Pc8::Value16), + 27 => Some(Pc8::Value17), + 28 => Some(Pc8::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC8_A::VALUE1 + *self == Pc8::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC8_A::VALUE2 + *self == Pc8::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC8_A::VALUE3 + *self == Pc8::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC8_A::VALUE4 + *self == Pc8::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC8_A::VALUE5 + *self == Pc8::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC8_A::VALUE6 + *self == Pc8::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC8_A::VALUE7 + *self == Pc8::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC8_A::VALUE8 + *self == Pc8::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC8_A::VALUE9 + *self == Pc8::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC8_A::VALUE10 + *self == Pc8::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC8_A::VALUE11 + *self == Pc8::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC8_A::VALUE12 + *self == Pc8::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC8_A::VALUE13 + *self == Pc8::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC8_A::VALUE14 + *self == Pc8::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC8_A::VALUE15 + *self == Pc8::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC8_A::VALUE16 + *self == Pc8::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC8_A::VALUE17 + *self == Pc8::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC8_A::VALUE18 + *self == Pc8::Value18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; -impl<'a, REG> PC8_W<'a, REG> +pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; +impl<'a, REG> Pc8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -181,266 +181,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE1) + self.variant(Pc8::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE2) + self.variant(Pc8::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE3) + self.variant(Pc8::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE4) + self.variant(Pc8::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE5) + self.variant(Pc8::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE6) + self.variant(Pc8::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE7) + self.variant(Pc8::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE8) + self.variant(Pc8::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE9) + self.variant(Pc8::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE10) + self.variant(Pc8::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE11) + self.variant(Pc8::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE12) + self.variant(Pc8::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE13) + self.variant(Pc8::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE14) + self.variant(Pc8::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE15) + self.variant(Pc8::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE16) + self.variant(Pc8::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE17) + self.variant(Pc8::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC8_A::VALUE18) + self.variant(Pc8::Value18) } } -#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type PC9_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC9_A { +pub enum Pc9 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC9_A) -> Self { + fn from(variant: Pc9) -> Self { variant as _ } } -impl crate::FieldSpec for PC9_A { +impl crate::FieldSpec for Pc9 { type Ux = u8; } -impl PC9_R { +#[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc9R = crate::FieldReader; +impl Pc9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC9_A::VALUE1), - 1 => Some(PC9_A::VALUE2), - 2 => Some(PC9_A::VALUE3), - 3 => Some(PC9_A::VALUE4), - 4 => Some(PC9_A::VALUE5), - 5 => Some(PC9_A::VALUE6), - 6 => Some(PC9_A::VALUE7), - 7 => Some(PC9_A::VALUE8), - 16 => Some(PC9_A::VALUE9), - 17 => Some(PC9_A::VALUE10), - 18 => Some(PC9_A::VALUE11), - 19 => Some(PC9_A::VALUE12), - 20 => Some(PC9_A::VALUE13), - 24 => Some(PC9_A::VALUE14), - 25 => Some(PC9_A::VALUE15), - 26 => Some(PC9_A::VALUE16), - 27 => Some(PC9_A::VALUE17), - 28 => Some(PC9_A::VALUE18), + 0 => Some(Pc9::Value1), + 1 => Some(Pc9::Value2), + 2 => Some(Pc9::Value3), + 3 => Some(Pc9::Value4), + 4 => Some(Pc9::Value5), + 5 => Some(Pc9::Value6), + 6 => Some(Pc9::Value7), + 7 => Some(Pc9::Value8), + 16 => Some(Pc9::Value9), + 17 => Some(Pc9::Value10), + 18 => Some(Pc9::Value11), + 19 => Some(Pc9::Value12), + 20 => Some(Pc9::Value13), + 24 => Some(Pc9::Value14), + 25 => Some(Pc9::Value15), + 26 => Some(Pc9::Value16), + 27 => Some(Pc9::Value17), + 28 => Some(Pc9::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC9_A::VALUE1 + *self == Pc9::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC9_A::VALUE2 + *self == Pc9::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC9_A::VALUE3 + *self == Pc9::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC9_A::VALUE4 + *self == Pc9::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC9_A::VALUE5 + *self == Pc9::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC9_A::VALUE6 + *self == Pc9::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC9_A::VALUE7 + *self == Pc9::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC9_A::VALUE8 + *self == Pc9::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC9_A::VALUE9 + *self == Pc9::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC9_A::VALUE10 + *self == Pc9::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC9_A::VALUE11 + *self == Pc9::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC9_A::VALUE12 + *self == Pc9::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC9_A::VALUE13 + *self == Pc9::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC9_A::VALUE14 + *self == Pc9::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC9_A::VALUE15 + *self == Pc9::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC9_A::VALUE16 + *self == Pc9::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC9_A::VALUE17 + *self == Pc9::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC9_A::VALUE18 + *self == Pc9::Value18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; -impl<'a, REG> PC9_W<'a, REG> +pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; +impl<'a, REG> Pc9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -448,266 +448,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE1) + self.variant(Pc9::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE2) + self.variant(Pc9::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE3) + self.variant(Pc9::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE4) + self.variant(Pc9::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE5) + self.variant(Pc9::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE6) + self.variant(Pc9::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE7) + self.variant(Pc9::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE8) + self.variant(Pc9::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE9) + self.variant(Pc9::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE10) + self.variant(Pc9::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE11) + self.variant(Pc9::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE12) + self.variant(Pc9::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE13) + self.variant(Pc9::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE14) + self.variant(Pc9::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE15) + self.variant(Pc9::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE16) + self.variant(Pc9::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE17) + self.variant(Pc9::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC9_A::VALUE18) + self.variant(Pc9::Value18) } } -#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type PC10_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC10_A { +pub enum Pc10 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC10_A) -> Self { + fn from(variant: Pc10) -> Self { variant as _ } } -impl crate::FieldSpec for PC10_A { +impl crate::FieldSpec for Pc10 { type Ux = u8; } -impl PC10_R { +#[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc10R = crate::FieldReader; +impl Pc10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC10_A::VALUE1), - 1 => Some(PC10_A::VALUE2), - 2 => Some(PC10_A::VALUE3), - 3 => Some(PC10_A::VALUE4), - 4 => Some(PC10_A::VALUE5), - 5 => Some(PC10_A::VALUE6), - 6 => Some(PC10_A::VALUE7), - 7 => Some(PC10_A::VALUE8), - 16 => Some(PC10_A::VALUE9), - 17 => Some(PC10_A::VALUE10), - 18 => Some(PC10_A::VALUE11), - 19 => Some(PC10_A::VALUE12), - 20 => Some(PC10_A::VALUE13), - 24 => Some(PC10_A::VALUE14), - 25 => Some(PC10_A::VALUE15), - 26 => Some(PC10_A::VALUE16), - 27 => Some(PC10_A::VALUE17), - 28 => Some(PC10_A::VALUE18), + 0 => Some(Pc10::Value1), + 1 => Some(Pc10::Value2), + 2 => Some(Pc10::Value3), + 3 => Some(Pc10::Value4), + 4 => Some(Pc10::Value5), + 5 => Some(Pc10::Value6), + 6 => Some(Pc10::Value7), + 7 => Some(Pc10::Value8), + 16 => Some(Pc10::Value9), + 17 => Some(Pc10::Value10), + 18 => Some(Pc10::Value11), + 19 => Some(Pc10::Value12), + 20 => Some(Pc10::Value13), + 24 => Some(Pc10::Value14), + 25 => Some(Pc10::Value15), + 26 => Some(Pc10::Value16), + 27 => Some(Pc10::Value17), + 28 => Some(Pc10::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC10_A::VALUE1 + *self == Pc10::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC10_A::VALUE2 + *self == Pc10::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC10_A::VALUE3 + *self == Pc10::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC10_A::VALUE4 + *self == Pc10::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC10_A::VALUE5 + *self == Pc10::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC10_A::VALUE6 + *self == Pc10::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC10_A::VALUE7 + *self == Pc10::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC10_A::VALUE8 + *self == Pc10::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC10_A::VALUE9 + *self == Pc10::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC10_A::VALUE10 + *self == Pc10::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC10_A::VALUE11 + *self == Pc10::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC10_A::VALUE12 + *self == Pc10::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC10_A::VALUE13 + *self == Pc10::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC10_A::VALUE14 + *self == Pc10::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC10_A::VALUE15 + *self == Pc10::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC10_A::VALUE16 + *self == Pc10::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC10_A::VALUE17 + *self == Pc10::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC10_A::VALUE18 + *self == Pc10::Value18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; -impl<'a, REG> PC10_W<'a, REG> +pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; +impl<'a, REG> Pc10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -715,266 +715,266 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE1) + self.variant(Pc10::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE2) + self.variant(Pc10::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE3) + self.variant(Pc10::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE4) + self.variant(Pc10::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE5) + self.variant(Pc10::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE6) + self.variant(Pc10::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE7) + self.variant(Pc10::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE8) + self.variant(Pc10::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE9) + self.variant(Pc10::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE10) + self.variant(Pc10::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE11) + self.variant(Pc10::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE12) + self.variant(Pc10::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE13) + self.variant(Pc10::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE14) + self.variant(Pc10::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE15) + self.variant(Pc10::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE16) + self.variant(Pc10::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE17) + self.variant(Pc10::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC10_A::VALUE18) + self.variant(Pc10::Value18) } } -#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type PC11_R = crate::FieldReader; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PC11_A { +pub enum Pc11 { #[doc = "0: Input - No internal pull device active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input - Internal pull-down device active"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Input - Internal pull-up device active"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - VALUE8 = 7, + Value8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - VALUE9 = 16, + Value9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - VALUE10 = 17, + Value10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - VALUE11 = 18, + Value11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - VALUE12 = 19, + Value12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - VALUE13 = 20, + Value13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - VALUE14 = 24, + Value14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - VALUE15 = 25, + Value15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - VALUE16 = 26, + Value16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - VALUE17 = 27, + Value17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - VALUE18 = 28, + Value18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PC11_A) -> Self { + fn from(variant: Pc11) -> Self { variant as _ } } -impl crate::FieldSpec for PC11_A { +impl crate::FieldSpec for Pc11 { type Ux = u8; } -impl PC11_R { +#[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] +pub type Pc11R = crate::FieldReader; +impl Pc11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PC11_A::VALUE1), - 1 => Some(PC11_A::VALUE2), - 2 => Some(PC11_A::VALUE3), - 3 => Some(PC11_A::VALUE4), - 4 => Some(PC11_A::VALUE5), - 5 => Some(PC11_A::VALUE6), - 6 => Some(PC11_A::VALUE7), - 7 => Some(PC11_A::VALUE8), - 16 => Some(PC11_A::VALUE9), - 17 => Some(PC11_A::VALUE10), - 18 => Some(PC11_A::VALUE11), - 19 => Some(PC11_A::VALUE12), - 20 => Some(PC11_A::VALUE13), - 24 => Some(PC11_A::VALUE14), - 25 => Some(PC11_A::VALUE15), - 26 => Some(PC11_A::VALUE16), - 27 => Some(PC11_A::VALUE17), - 28 => Some(PC11_A::VALUE18), + 0 => Some(Pc11::Value1), + 1 => Some(Pc11::Value2), + 2 => Some(Pc11::Value3), + 3 => Some(Pc11::Value4), + 4 => Some(Pc11::Value5), + 5 => Some(Pc11::Value6), + 6 => Some(Pc11::Value7), + 7 => Some(Pc11::Value8), + 16 => Some(Pc11::Value9), + 17 => Some(Pc11::Value10), + 18 => Some(Pc11::Value11), + 19 => Some(Pc11::Value12), + 20 => Some(Pc11::Value13), + 24 => Some(Pc11::Value14), + 25 => Some(Pc11::Value15), + 26 => Some(Pc11::Value16), + 27 => Some(Pc11::Value17), + 28 => Some(Pc11::Value18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PC11_A::VALUE1 + *self == Pc11::Value1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PC11_A::VALUE2 + *self == Pc11::Value2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PC11_A::VALUE3 + *self == Pc11::Value3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PC11_A::VALUE4 + *self == Pc11::Value4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PC11_A::VALUE5 + *self == Pc11::Value5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == PC11_A::VALUE6 + *self == Pc11::Value6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == PC11_A::VALUE7 + *self == Pc11::Value7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == PC11_A::VALUE8 + *self == Pc11::Value8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == PC11_A::VALUE9 + *self == Pc11::Value9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == PC11_A::VALUE10 + *self == Pc11::Value10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == PC11_A::VALUE11 + *self == Pc11::Value11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == PC11_A::VALUE12 + *self == Pc11::Value12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == PC11_A::VALUE13 + *self == Pc11::Value13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == PC11_A::VALUE14 + *self == Pc11::Value14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == PC11_A::VALUE15 + *self == Pc11::Value15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == PC11_A::VALUE16 + *self == Pc11::Value16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == PC11_A::VALUE17 + *self == Pc11::Value17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == PC11_A::VALUE18 + *self == Pc11::Value18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; -impl<'a, REG> PC11_W<'a, REG> +pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; +impl<'a, REG> Pc11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -982,165 +982,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE1) + self.variant(Pc11::Value1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE2) + self.variant(Pc11::Value2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE3) + self.variant(Pc11::Value3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE4) + self.variant(Pc11::Value4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE5) + self.variant(Pc11::Value5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE6) + self.variant(Pc11::Value6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE7) + self.variant(Pc11::Value7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE8) + self.variant(Pc11::Value8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE9) + self.variant(Pc11::Value9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE10) + self.variant(Pc11::Value10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE11) + self.variant(Pc11::Value11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE12) + self.variant(Pc11::Value12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE13) + self.variant(Pc11::Value13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE14) + self.variant(Pc11::Value14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE15) + self.variant(Pc11::Value15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE16) + self.variant(Pc11::Value16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE17) + self.variant(Pc11::Value17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(PC11_A::VALUE18) + self.variant(Pc11::Value18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> PC8_R { - PC8_R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> Pc8R { + Pc8R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> PC9_R { - PC9_R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> Pc9R { + Pc9R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> PC10_R { - PC10_R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> Pc10R { + Pc10R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> PC11_R { - PC11_R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> Pc11R { + Pc11R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> PC8_W { - PC8_W::new(self, 3) + pub fn pc8(&mut self) -> Pc8W { + Pc8W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> PC9_W { - PC9_W::new(self, 11) + pub fn pc9(&mut self) -> Pc9W { + Pc9W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> PC10_W { - PC10_W::new(self, 19) + pub fn pc10(&mut self) -> Pc10W { + Pc10W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> PC11_W { - PC11_W::new(self, 27) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pc11(&mut self) -> Pc11W { + Pc11W::new(self, 27) } } #[doc = "Port 9 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IOCR8_SPEC; -impl crate::RegisterSpec for IOCR8_SPEC { +pub struct Iocr8Spec; +impl crate::RegisterSpec for Iocr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for IOCR8_SPEC {} +impl crate::Readable for Iocr8Spec {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for IOCR8_SPEC { +impl crate::Writable for Iocr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for IOCR8_SPEC { +impl crate::Resettable for Iocr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/omr.rs b/src/port9/omr.rs index 27d3e03b..b4f0d2aa 100644 --- a/src/port9/omr.rs +++ b/src/port9/omr.rs @@ -1,284 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> PS0_W { - PS0_W::new(self, 0) + pub fn ps0(&mut self) -> Ps0W { + Ps0W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> PS1_W { - PS1_W::new(self, 1) + pub fn ps1(&mut self) -> Ps1W { + Ps1W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> PS2_W { - PS2_W::new(self, 2) + pub fn ps2(&mut self) -> Ps2W { + Ps2W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> PS3_W { - PS3_W::new(self, 3) + pub fn ps3(&mut self) -> Ps3W { + Ps3W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> PS4_W { - PS4_W::new(self, 4) + pub fn ps4(&mut self) -> Ps4W { + Ps4W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> PS5_W { - PS5_W::new(self, 5) + pub fn ps5(&mut self) -> Ps5W { + Ps5W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> PS6_W { - PS6_W::new(self, 6) + pub fn ps6(&mut self) -> Ps6W { + Ps6W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> PS7_W { - PS7_W::new(self, 7) + pub fn ps7(&mut self) -> Ps7W { + Ps7W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> PS8_W { - PS8_W::new(self, 8) + pub fn ps8(&mut self) -> Ps8W { + Ps8W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> PS9_W { - PS9_W::new(self, 9) + pub fn ps9(&mut self) -> Ps9W { + Ps9W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> PS10_W { - PS10_W::new(self, 10) + pub fn ps10(&mut self) -> Ps10W { + Ps10W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> PS11_W { - PS11_W::new(self, 11) + pub fn ps11(&mut self) -> Ps11W { + Ps11W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> PS12_W { - PS12_W::new(self, 12) + pub fn ps12(&mut self) -> Ps12W { + Ps12W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> PS13_W { - PS13_W::new(self, 13) + pub fn ps13(&mut self) -> Ps13W { + Ps13W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> PS14_W { - PS14_W::new(self, 14) + pub fn ps14(&mut self) -> Ps14W { + Ps14W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> PS15_W { - PS15_W::new(self, 15) + pub fn ps15(&mut self) -> Ps15W { + Ps15W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> PR0_W { - PR0_W::new(self, 16) + pub fn pr0(&mut self) -> Pr0W { + Pr0W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> PR1_W { - PR1_W::new(self, 17) + pub fn pr1(&mut self) -> Pr1W { + Pr1W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> PR2_W { - PR2_W::new(self, 18) + pub fn pr2(&mut self) -> Pr2W { + Pr2W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> PR3_W { - PR3_W::new(self, 19) + pub fn pr3(&mut self) -> Pr3W { + Pr3W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> PR4_W { - PR4_W::new(self, 20) + pub fn pr4(&mut self) -> Pr4W { + Pr4W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> PR5_W { - PR5_W::new(self, 21) + pub fn pr5(&mut self) -> Pr5W { + Pr5W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> PR6_W { - PR6_W::new(self, 22) + pub fn pr6(&mut self) -> Pr6W { + Pr6W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> PR7_W { - PR7_W::new(self, 23) + pub fn pr7(&mut self) -> Pr7W { + Pr7W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> PR8_W { - PR8_W::new(self, 24) + pub fn pr8(&mut self) -> Pr8W { + Pr8W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> PR9_W { - PR9_W::new(self, 25) + pub fn pr9(&mut self) -> Pr9W { + Pr9W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> PR10_W { - PR10_W::new(self, 26) + pub fn pr10(&mut self) -> Pr10W { + Pr10W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> PR11_W { - PR11_W::new(self, 27) + pub fn pr11(&mut self) -> Pr11W { + Pr11W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> PR12_W { - PR12_W::new(self, 28) + pub fn pr12(&mut self) -> Pr12W { + Pr12W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> PR13_W { - PR13_W::new(self, 29) + pub fn pr13(&mut self) -> Pr13W { + Pr13W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> PR14_W { - PR14_W::new(self, 30) + pub fn pr14(&mut self) -> Pr14W { + Pr14W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> PR15_W { - PR15_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pr15(&mut self) -> Pr15W { + Pr15W::new(self, 31) } } #[doc = "Port 9 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OMR_SPEC; -impl crate::RegisterSpec for OMR_SPEC { +pub struct OmrSpec; +impl crate::RegisterSpec for OmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OMR_SPEC { +impl crate::Writable for OmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OMR_SPEC { +impl crate::Resettable for OmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/out.rs b/src/port9/out.rs index 353faf32..e791b652 100644 --- a/src/port9/out.rs +++ b/src/port9/out.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; -#[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0_A { +pub enum P0 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0_A) -> Self { + fn from(variant: P0) -> Self { variant as u8 != 0 } } -impl P0_R { +#[doc = "Field `P0` reader - Port n Output Bit 0"] +pub type P0R = crate::BitReader; +impl P0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0_A { + pub const fn variant(&self) -> P0 { match self.bits { - false => P0_A::VALUE1, - true => P0_A::VALUE2, + false => P0::Value1, + true => P0::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0_A::VALUE1 + *self == P0::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0_A::VALUE2 + *self == P0::Value2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; -impl<'a, REG> P0_W<'a, REG> +pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; +impl<'a, REG> P0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE1) + self.variant(P0::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0_A::VALUE2) + self.variant(P0::Value2) } } -#[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1_R = crate::BitReader; #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1_A { +pub enum P1 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1_A) -> Self { + fn from(variant: P1) -> Self { variant as u8 != 0 } } -impl P1_R { +#[doc = "Field `P1` reader - Port n Output Bit 1"] +pub type P1R = crate::BitReader; +impl P1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1_A { + pub const fn variant(&self) -> P1 { match self.bits { - false => P1_A::VALUE1, - true => P1_A::VALUE2, + false => P1::Value1, + true => P1::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1_A::VALUE1 + *self == P1::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1_A::VALUE2 + *self == P1::Value2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; -impl<'a, REG> P1_W<'a, REG> +pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; +impl<'a, REG> P1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE1) + self.variant(P1::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1_A::VALUE2) + self.variant(P1::Value2) } } -#[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2_R = crate::BitReader; #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2_A { +pub enum P2 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2_A) -> Self { + fn from(variant: P2) -> Self { variant as u8 != 0 } } -impl P2_R { +#[doc = "Field `P2` reader - Port n Output Bit 2"] +pub type P2R = crate::BitReader; +impl P2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2_A { + pub const fn variant(&self) -> P2 { match self.bits { - false => P2_A::VALUE1, - true => P2_A::VALUE2, + false => P2::Value1, + true => P2::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2_A::VALUE1 + *self == P2::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2_A::VALUE2 + *self == P2::Value2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; -impl<'a, REG> P2_W<'a, REG> +pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; +impl<'a, REG> P2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE1) + self.variant(P2::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2_A::VALUE2) + self.variant(P2::Value2) } } -#[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3_R = crate::BitReader; #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3_A { +pub enum P3 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3_A) -> Self { + fn from(variant: P3) -> Self { variant as u8 != 0 } } -impl P3_R { +#[doc = "Field `P3` reader - Port n Output Bit 3"] +pub type P3R = crate::BitReader; +impl P3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3_A { + pub const fn variant(&self) -> P3 { match self.bits { - false => P3_A::VALUE1, - true => P3_A::VALUE2, + false => P3::Value1, + true => P3::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3_A::VALUE1 + *self == P3::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3_A::VALUE2 + *self == P3::Value2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; -impl<'a, REG> P3_W<'a, REG> +pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; +impl<'a, REG> P3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE1) + self.variant(P3::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3_A::VALUE2) + self.variant(P3::Value2) } } -#[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4_R = crate::BitReader; #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4_A { +pub enum P4 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4_A) -> Self { + fn from(variant: P4) -> Self { variant as u8 != 0 } } -impl P4_R { +#[doc = "Field `P4` reader - Port n Output Bit 4"] +pub type P4R = crate::BitReader; +impl P4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4_A { + pub const fn variant(&self) -> P4 { match self.bits { - false => P4_A::VALUE1, - true => P4_A::VALUE2, + false => P4::Value1, + true => P4::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4_A::VALUE1 + *self == P4::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4_A::VALUE2 + *self == P4::Value2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; -impl<'a, REG> P4_W<'a, REG> +pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; +impl<'a, REG> P4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE1) + self.variant(P4::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4_A::VALUE2) + self.variant(P4::Value2) } } -#[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5_R = crate::BitReader; #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5_A { +pub enum P5 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5_A) -> Self { + fn from(variant: P5) -> Self { variant as u8 != 0 } } -impl P5_R { +#[doc = "Field `P5` reader - Port n Output Bit 5"] +pub type P5R = crate::BitReader; +impl P5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5_A { + pub const fn variant(&self) -> P5 { match self.bits { - false => P5_A::VALUE1, - true => P5_A::VALUE2, + false => P5::Value1, + true => P5::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5_A::VALUE1 + *self == P5::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5_A::VALUE2 + *self == P5::Value2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; -impl<'a, REG> P5_W<'a, REG> +pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; +impl<'a, REG> P5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE1) + self.variant(P5::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5_A::VALUE2) + self.variant(P5::Value2) } } -#[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6_R = crate::BitReader; #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6_A { +pub enum P6 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6_A) -> Self { + fn from(variant: P6) -> Self { variant as u8 != 0 } } -impl P6_R { +#[doc = "Field `P6` reader - Port n Output Bit 6"] +pub type P6R = crate::BitReader; +impl P6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6_A { + pub const fn variant(&self) -> P6 { match self.bits { - false => P6_A::VALUE1, - true => P6_A::VALUE2, + false => P6::Value1, + true => P6::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6_A::VALUE1 + *self == P6::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6_A::VALUE2 + *self == P6::Value2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; -impl<'a, REG> P6_W<'a, REG> +pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; +impl<'a, REG> P6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE1) + self.variant(P6::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6_A::VALUE2) + self.variant(P6::Value2) } } -#[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7_R = crate::BitReader; #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7_A { +pub enum P7 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7_A) -> Self { + fn from(variant: P7) -> Self { variant as u8 != 0 } } -impl P7_R { +#[doc = "Field `P7` reader - Port n Output Bit 7"] +pub type P7R = crate::BitReader; +impl P7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7_A { + pub const fn variant(&self) -> P7 { match self.bits { - false => P7_A::VALUE1, - true => P7_A::VALUE2, + false => P7::Value1, + true => P7::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7_A::VALUE1 + *self == P7::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7_A::VALUE2 + *self == P7::Value2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; -impl<'a, REG> P7_W<'a, REG> +pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; +impl<'a, REG> P7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE1) + self.variant(P7::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7_A::VALUE2) + self.variant(P7::Value2) } } -#[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8_R = crate::BitReader; #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8_A { +pub enum P8 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8_A) -> Self { + fn from(variant: P8) -> Self { variant as u8 != 0 } } -impl P8_R { +#[doc = "Field `P8` reader - Port n Output Bit 8"] +pub type P8R = crate::BitReader; +impl P8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8_A { + pub const fn variant(&self) -> P8 { match self.bits { - false => P8_A::VALUE1, - true => P8_A::VALUE2, + false => P8::Value1, + true => P8::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8_A::VALUE1 + *self == P8::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8_A::VALUE2 + *self == P8::Value2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; -impl<'a, REG> P8_W<'a, REG> +pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; +impl<'a, REG> P8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE1) + self.variant(P8::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8_A::VALUE2) + self.variant(P8::Value2) } } -#[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9_R = crate::BitReader; #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9_A { +pub enum P9 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9_A) -> Self { + fn from(variant: P9) -> Self { variant as u8 != 0 } } -impl P9_R { +#[doc = "Field `P9` reader - Port n Output Bit 9"] +pub type P9R = crate::BitReader; +impl P9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9_A { + pub const fn variant(&self) -> P9 { match self.bits { - false => P9_A::VALUE1, - true => P9_A::VALUE2, + false => P9::Value1, + true => P9::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9_A::VALUE1 + *self == P9::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9_A::VALUE2 + *self == P9::Value2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; -impl<'a, REG> P9_W<'a, REG> +pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; +impl<'a, REG> P9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE1) + self.variant(P9::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9_A::VALUE2) + self.variant(P9::Value2) } } -#[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10_R = crate::BitReader; #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10_A { +pub enum P10 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10_A) -> Self { + fn from(variant: P10) -> Self { variant as u8 != 0 } } -impl P10_R { +#[doc = "Field `P10` reader - Port n Output Bit 10"] +pub type P10R = crate::BitReader; +impl P10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10_A { + pub const fn variant(&self) -> P10 { match self.bits { - false => P10_A::VALUE1, - true => P10_A::VALUE2, + false => P10::Value1, + true => P10::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10_A::VALUE1 + *self == P10::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10_A::VALUE2 + *self == P10::Value2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; -impl<'a, REG> P10_W<'a, REG> +pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; +impl<'a, REG> P10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE1) + self.variant(P10::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10_A::VALUE2) + self.variant(P10::Value2) } } -#[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11_R = crate::BitReader; #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11_A { +pub enum P11 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11_A) -> Self { + fn from(variant: P11) -> Self { variant as u8 != 0 } } -impl P11_R { +#[doc = "Field `P11` reader - Port n Output Bit 11"] +pub type P11R = crate::BitReader; +impl P11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11_A { + pub const fn variant(&self) -> P11 { match self.bits { - false => P11_A::VALUE1, - true => P11_A::VALUE2, + false => P11::Value1, + true => P11::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11_A::VALUE1 + *self == P11::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11_A::VALUE2 + *self == P11::Value2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; -impl<'a, REG> P11_W<'a, REG> +pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; +impl<'a, REG> P11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE1) + self.variant(P11::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11_A::VALUE2) + self.variant(P11::Value2) } } -#[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12_R = crate::BitReader; #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12_A { +pub enum P12 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12_A) -> Self { + fn from(variant: P12) -> Self { variant as u8 != 0 } } -impl P12_R { +#[doc = "Field `P12` reader - Port n Output Bit 12"] +pub type P12R = crate::BitReader; +impl P12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12_A { + pub const fn variant(&self) -> P12 { match self.bits { - false => P12_A::VALUE1, - true => P12_A::VALUE2, + false => P12::Value1, + true => P12::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12_A::VALUE1 + *self == P12::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12_A::VALUE2 + *self == P12::Value2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; -impl<'a, REG> P12_W<'a, REG> +pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; +impl<'a, REG> P12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE1) + self.variant(P12::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12_A::VALUE2) + self.variant(P12::Value2) } } -#[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13_R = crate::BitReader; #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13_A { +pub enum P13 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13_A) -> Self { + fn from(variant: P13) -> Self { variant as u8 != 0 } } -impl P13_R { +#[doc = "Field `P13` reader - Port n Output Bit 13"] +pub type P13R = crate::BitReader; +impl P13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13_A { + pub const fn variant(&self) -> P13 { match self.bits { - false => P13_A::VALUE1, - true => P13_A::VALUE2, + false => P13::Value1, + true => P13::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13_A::VALUE1 + *self == P13::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13_A::VALUE2 + *self == P13::Value2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; -impl<'a, REG> P13_W<'a, REG> +pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; +impl<'a, REG> P13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE1) + self.variant(P13::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13_A::VALUE2) + self.variant(P13::Value2) } } -#[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14_R = crate::BitReader; #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14_A { +pub enum P14 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14_A) -> Self { + fn from(variant: P14) -> Self { variant as u8 != 0 } } -impl P14_R { +#[doc = "Field `P14` reader - Port n Output Bit 14"] +pub type P14R = crate::BitReader; +impl P14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14_A { + pub const fn variant(&self) -> P14 { match self.bits { - false => P14_A::VALUE1, - true => P14_A::VALUE2, + false => P14::Value1, + true => P14::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14_A::VALUE1 + *self == P14::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14_A::VALUE2 + *self == P14::Value2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; -impl<'a, REG> P14_W<'a, REG> +pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; +impl<'a, REG> P14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE1) + self.variant(P14::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14_A::VALUE2) + self.variant(P14::Value2) } } -#[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15_R = crate::BitReader; #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15_A { +pub enum P15 { #[doc = "0: The output level of Pn.x is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The output level of Pn.x is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15_A) -> Self { + fn from(variant: P15) -> Self { variant as u8 != 0 } } -impl P15_R { +#[doc = "Field `P15` reader - Port n Output Bit 15"] +pub type P15R = crate::BitReader; +impl P15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15_A { + pub const fn variant(&self) -> P15 { match self.bits { - false => P15_A::VALUE1, - true => P15_A::VALUE2, + false => P15::Value1, + true => P15::Value2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15_A::VALUE1 + *self == P15::Value1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15_A::VALUE2 + *self == P15::Value2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; -impl<'a, REG> P15_W<'a, REG> +pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; +impl<'a, REG> P15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE1) + self.variant(P15::Value1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15_A::VALUE2) + self.variant(P15::Value2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0_R { - P0_R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0R { + P0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1_R { - P1_R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1R { + P1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2_R { - P2_R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2R { + P2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3_R { - P3_R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3R { + P3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4_R { - P4_R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4R { + P4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5_R { - P5_R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5R { + P5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6_R { - P6_R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6R { + P6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7_R { - P7_R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7R { + P7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8_R { - P8_R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8R { + P8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9_R { - P9_R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9R { + P9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10_R { - P10_R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10R { + P10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11_R { - P11_R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11R { + P11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12_R { - P12_R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12R { + P12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13_R { - P13_R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13R { + P13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14_R { - P14_R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14R { + P14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15_R { - P15_R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15R { + P15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0_W { - P0_W::new(self, 0) + pub fn p0(&mut self) -> P0W { + P0W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1_W { - P1_W::new(self, 1) + pub fn p1(&mut self) -> P1W { + P1W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2_W { - P2_W::new(self, 2) + pub fn p2(&mut self) -> P2W { + P2W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3_W { - P3_W::new(self, 3) + pub fn p3(&mut self) -> P3W { + P3W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4_W { - P4_W::new(self, 4) + pub fn p4(&mut self) -> P4W { + P4W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5_W { - P5_W::new(self, 5) + pub fn p5(&mut self) -> P5W { + P5W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6_W { - P6_W::new(self, 6) + pub fn p6(&mut self) -> P6W { + P6W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7_W { - P7_W::new(self, 7) + pub fn p7(&mut self) -> P7W { + P7W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8_W { - P8_W::new(self, 8) + pub fn p8(&mut self) -> P8W { + P8W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9_W { - P9_W::new(self, 9) + pub fn p9(&mut self) -> P9W { + P9W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10_W { - P10_W::new(self, 10) + pub fn p10(&mut self) -> P10W { + P10W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11_W { - P11_W::new(self, 11) + pub fn p11(&mut self) -> P11W { + P11W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12_W { - P12_W::new(self, 12) + pub fn p12(&mut self) -> P12W { + P12W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13_W { - P13_W::new(self, 13) + pub fn p13(&mut self) -> P13W { + P13W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14_W { - P14_W::new(self, 14) + pub fn p14(&mut self) -> P14W { + P14W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15_W { - P15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn p15(&mut self) -> P15W { + P15W::new(self, 15) } } #[doc = "Port 9 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUT_SPEC; -impl crate::RegisterSpec for OUT_SPEC { +pub struct OutSpec; +impl crate::RegisterSpec for OutSpec { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OUT_SPEC {} +impl crate::Readable for OutSpec {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OUT_SPEC { +impl crate::Writable for OutSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OUT_SPEC { +impl crate::Resettable for OutSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/pdisc.rs b/src/port9/pdisc.rs index 3b394825..9a4b9bab 100644 --- a/src/port9/pdisc.rs +++ b/src/port9/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; -#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type PDIS0_R = crate::BitReader; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS0_A { +pub enum Pdis0 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS0_A) -> Self { + fn from(variant: Pdis0) -> Self { variant as u8 != 0 } } -impl PDIS0_R { +#[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] +pub type Pdis0R = crate::BitReader; +impl Pdis0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS0_A { + pub const fn variant(&self) -> Pdis0 { match self.bits { - false => PDIS0_A::VALUE1, - true => PDIS0_A::VALUE2, + false => Pdis0::Value1, + true => Pdis0::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS0_A::VALUE1 + *self == Pdis0::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS0_A::VALUE2 + *self == Pdis0::Value2 } } -#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type PDIS1_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS1_A { +pub enum Pdis1 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS1_A) -> Self { + fn from(variant: Pdis1) -> Self { variant as u8 != 0 } } -impl PDIS1_R { +#[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] +pub type Pdis1R = crate::BitReader; +impl Pdis1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS1_A { + pub const fn variant(&self) -> Pdis1 { match self.bits { - false => PDIS1_A::VALUE1, - true => PDIS1_A::VALUE2, + false => Pdis1::Value1, + true => Pdis1::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS1_A::VALUE1 + *self == Pdis1::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS1_A::VALUE2 + *self == Pdis1::Value2 } } -#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type PDIS2_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS2_A { +pub enum Pdis2 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS2_A) -> Self { + fn from(variant: Pdis2) -> Self { variant as u8 != 0 } } -impl PDIS2_R { +#[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] +pub type Pdis2R = crate::BitReader; +impl Pdis2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS2_A { + pub const fn variant(&self) -> Pdis2 { match self.bits { - false => PDIS2_A::VALUE1, - true => PDIS2_A::VALUE2, + false => Pdis2::Value1, + true => Pdis2::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS2_A::VALUE1 + *self == Pdis2::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS2_A::VALUE2 + *self == Pdis2::Value2 } } -#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type PDIS3_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS3_A { +pub enum Pdis3 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS3_A) -> Self { + fn from(variant: Pdis3) -> Self { variant as u8 != 0 } } -impl PDIS3_R { +#[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] +pub type Pdis3R = crate::BitReader; +impl Pdis3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS3_A { + pub const fn variant(&self) -> Pdis3 { match self.bits { - false => PDIS3_A::VALUE1, - true => PDIS3_A::VALUE2, + false => Pdis3::Value1, + true => Pdis3::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS3_A::VALUE1 + *self == Pdis3::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS3_A::VALUE2 + *self == Pdis3::Value2 } } -#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type PDIS4_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS4_A { +pub enum Pdis4 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS4_A) -> Self { + fn from(variant: Pdis4) -> Self { variant as u8 != 0 } } -impl PDIS4_R { +#[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] +pub type Pdis4R = crate::BitReader; +impl Pdis4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS4_A { + pub const fn variant(&self) -> Pdis4 { match self.bits { - false => PDIS4_A::VALUE1, - true => PDIS4_A::VALUE2, + false => Pdis4::Value1, + true => Pdis4::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS4_A::VALUE1 + *self == Pdis4::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS4_A::VALUE2 + *self == Pdis4::Value2 } } -#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type PDIS5_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS5_A { +pub enum Pdis5 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS5_A) -> Self { + fn from(variant: Pdis5) -> Self { variant as u8 != 0 } } -impl PDIS5_R { +#[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] +pub type Pdis5R = crate::BitReader; +impl Pdis5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS5_A { + pub const fn variant(&self) -> Pdis5 { match self.bits { - false => PDIS5_A::VALUE1, - true => PDIS5_A::VALUE2, + false => Pdis5::Value1, + true => Pdis5::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS5_A::VALUE1 + *self == Pdis5::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS5_A::VALUE2 + *self == Pdis5::Value2 } } -#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type PDIS6_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS6_A { +pub enum Pdis6 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS6_A) -> Self { + fn from(variant: Pdis6) -> Self { variant as u8 != 0 } } -impl PDIS6_R { +#[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] +pub type Pdis6R = crate::BitReader; +impl Pdis6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS6_A { + pub const fn variant(&self) -> Pdis6 { match self.bits { - false => PDIS6_A::VALUE1, - true => PDIS6_A::VALUE2, + false => Pdis6::Value1, + true => Pdis6::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS6_A::VALUE1 + *self == Pdis6::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS6_A::VALUE2 + *self == Pdis6::Value2 } } -#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type PDIS7_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS7_A { +pub enum Pdis7 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS7_A) -> Self { + fn from(variant: Pdis7) -> Self { variant as u8 != 0 } } -impl PDIS7_R { +#[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] +pub type Pdis7R = crate::BitReader; +impl Pdis7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS7_A { + pub const fn variant(&self) -> Pdis7 { match self.bits { - false => PDIS7_A::VALUE1, - true => PDIS7_A::VALUE2, + false => Pdis7::Value1, + true => Pdis7::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS7_A::VALUE1 + *self == Pdis7::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS7_A::VALUE2 + *self == Pdis7::Value2 } } -#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type PDIS8_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS8_A { +pub enum Pdis8 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS8_A) -> Self { + fn from(variant: Pdis8) -> Self { variant as u8 != 0 } } -impl PDIS8_R { +#[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] +pub type Pdis8R = crate::BitReader; +impl Pdis8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS8_A { + pub const fn variant(&self) -> Pdis8 { match self.bits { - false => PDIS8_A::VALUE1, - true => PDIS8_A::VALUE2, + false => Pdis8::Value1, + true => Pdis8::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS8_A::VALUE1 + *self == Pdis8::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS8_A::VALUE2 + *self == Pdis8::Value2 } } -#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type PDIS9_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS9_A { +pub enum Pdis9 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS9_A) -> Self { + fn from(variant: Pdis9) -> Self { variant as u8 != 0 } } -impl PDIS9_R { +#[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] +pub type Pdis9R = crate::BitReader; +impl Pdis9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS9_A { + pub const fn variant(&self) -> Pdis9 { match self.bits { - false => PDIS9_A::VALUE1, - true => PDIS9_A::VALUE2, + false => Pdis9::Value1, + true => Pdis9::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS9_A::VALUE1 + *self == Pdis9::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS9_A::VALUE2 + *self == Pdis9::Value2 } } -#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type PDIS10_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS10_A { +pub enum Pdis10 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS10_A) -> Self { + fn from(variant: Pdis10) -> Self { variant as u8 != 0 } } -impl PDIS10_R { +#[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] +pub type Pdis10R = crate::BitReader; +impl Pdis10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS10_A { + pub const fn variant(&self) -> Pdis10 { match self.bits { - false => PDIS10_A::VALUE1, - true => PDIS10_A::VALUE2, + false => Pdis10::Value1, + true => Pdis10::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS10_A::VALUE1 + *self == Pdis10::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS10_A::VALUE2 + *self == Pdis10::Value2 } } -#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type PDIS11_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS11_A { +pub enum Pdis11 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS11_A) -> Self { + fn from(variant: Pdis11) -> Self { variant as u8 != 0 } } -impl PDIS11_R { +#[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] +pub type Pdis11R = crate::BitReader; +impl Pdis11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS11_A { + pub const fn variant(&self) -> Pdis11 { match self.bits { - false => PDIS11_A::VALUE1, - true => PDIS11_A::VALUE2, + false => Pdis11::Value1, + true => Pdis11::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS11_A::VALUE1 + *self == Pdis11::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS11_A::VALUE2 + *self == Pdis11::Value2 } } -#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type PDIS12_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS12_A { +pub enum Pdis12 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS12_A) -> Self { + fn from(variant: Pdis12) -> Self { variant as u8 != 0 } } -impl PDIS12_R { +#[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] +pub type Pdis12R = crate::BitReader; +impl Pdis12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS12_A { + pub const fn variant(&self) -> Pdis12 { match self.bits { - false => PDIS12_A::VALUE1, - true => PDIS12_A::VALUE2, + false => Pdis12::Value1, + true => Pdis12::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS12_A::VALUE1 + *self == Pdis12::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS12_A::VALUE2 + *self == Pdis12::Value2 } } -#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type PDIS13_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS13_A { +pub enum Pdis13 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS13_A) -> Self { + fn from(variant: Pdis13) -> Self { variant as u8 != 0 } } -impl PDIS13_R { +#[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] +pub type Pdis13R = crate::BitReader; +impl Pdis13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS13_A { + pub const fn variant(&self) -> Pdis13 { match self.bits { - false => PDIS13_A::VALUE1, - true => PDIS13_A::VALUE2, + false => Pdis13::Value1, + true => Pdis13::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS13_A::VALUE1 + *self == Pdis13::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS13_A::VALUE2 + *self == Pdis13::Value2 } } -#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type PDIS14_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS14_A { +pub enum Pdis14 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS14_A) -> Self { + fn from(variant: Pdis14) -> Self { variant as u8 != 0 } } -impl PDIS14_R { +#[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] +pub type Pdis14R = crate::BitReader; +impl Pdis14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS14_A { + pub const fn variant(&self) -> Pdis14 { match self.bits { - false => PDIS14_A::VALUE1, - true => PDIS14_A::VALUE2, + false => Pdis14::Value1, + true => Pdis14::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS14_A::VALUE1 + *self == Pdis14::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS14_A::VALUE2 + *self == Pdis14::Value2 } } -#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type PDIS15_R = crate::BitReader; #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDIS15_A { +pub enum Pdis15 { #[doc = "0: Pad Pn.x is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pad Pn.x is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDIS15_A) -> Self { + fn from(variant: Pdis15) -> Self { variant as u8 != 0 } } -impl PDIS15_R { +#[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] +pub type Pdis15R = crate::BitReader; +impl Pdis15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDIS15_A { + pub const fn variant(&self) -> Pdis15 { match self.bits { - false => PDIS15_A::VALUE1, - true => PDIS15_A::VALUE2, + false => Pdis15::Value1, + true => Pdis15::Value2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDIS15_A::VALUE1 + *self == Pdis15::Value1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDIS15_A::VALUE2 + *self == Pdis15::Value2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> PDIS0_R { - PDIS0_R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> Pdis0R { + Pdis0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> PDIS1_R { - PDIS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> Pdis1R { + Pdis1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> PDIS2_R { - PDIS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> Pdis2R { + Pdis2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> PDIS3_R { - PDIS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> Pdis3R { + Pdis3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> PDIS4_R { - PDIS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> Pdis4R { + Pdis4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> PDIS5_R { - PDIS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> Pdis5R { + Pdis5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> PDIS6_R { - PDIS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> Pdis6R { + Pdis6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> PDIS7_R { - PDIS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> Pdis7R { + Pdis7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> PDIS8_R { - PDIS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> Pdis8R { + Pdis8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> PDIS9_R { - PDIS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> Pdis9R { + Pdis9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> PDIS10_R { - PDIS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> Pdis10R { + Pdis10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> PDIS11_R { - PDIS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> Pdis11R { + Pdis11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> PDIS12_R { - PDIS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> Pdis12R { + Pdis12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> PDIS13_R { - PDIS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> Pdis13R { + Pdis13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> PDIS14_R { - PDIS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> Pdis14R { + Pdis14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> PDIS15_R { - PDIS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> Pdis15R { + Pdis15R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 9 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDISC_SPEC; -impl crate::RegisterSpec for PDISC_SPEC { +pub struct PdiscSpec; +impl crate::RegisterSpec for PdiscSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PDISC_SPEC {} +impl crate::Readable for PdiscSpec {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PDISC_SPEC { +impl crate::Resettable for PdiscSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/port9/pdr0.rs b/src/port9/pdr0.rs index d4b815f4..fee2909d 100644 --- a/src/port9/pdr0.rs +++ b/src/port9/pdr0.rs @@ -1,99 +1,99 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; -#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type PD0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD0_A { +pub enum Pd0 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD0_A) -> Self { + fn from(variant: Pd0) -> Self { variant as _ } } -impl crate::FieldSpec for PD0_A { +impl crate::FieldSpec for Pd0 { type Ux = u8; } -impl PD0_R { +#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] +pub type Pd0R = crate::FieldReader; +impl Pd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD0_A { + pub const fn variant(&self) -> Pd0 { match self.bits { - 2 => PD0_A::SD_SOE, - 3 => PD0_A::SD_SLE, - 4 => PD0_A::MD, - 7 => PD0_A::WD, - 0 => PD0_A::SD_SOE_ALT, - 1 => PD0_A::SD_SLE_ALT, - 6 => PD0_A::MD_ALT, - 5 => PD0_A::WD_ALT, + 2 => Pd0::SdSoe, + 3 => Pd0::SdSle, + 4 => Pd0::Md, + 7 => Pd0::Wd, + 0 => Pd0::SdSoeAlt, + 1 => Pd0::SdSleAlt, + 6 => Pd0::MdAlt, + 5 => Pd0::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD0_A::SD_SOE + *self == Pd0::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD0_A::SD_SLE + *self == Pd0::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD0_A::MD + *self == Pd0::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD0_A::WD + *self == Pd0::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD0_A::SD_SOE_ALT + *self == Pd0::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD0_A::SD_SLE_ALT + *self == Pd0::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD0_A::MD_ALT + *self == Pd0::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD0_A::WD_ALT + *self == Pd0::WdAlt } } #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type PD0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD0_A>; -impl<'a, REG> PD0_W<'a, REG> +pub type Pd0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd0>; +impl<'a, REG> Pd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,136 +101,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE) + self.variant(Pd0::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE) + self.variant(Pd0::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD0_A::MD) + self.variant(Pd0::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD0_A::WD) + self.variant(Pd0::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SOE_ALT) + self.variant(Pd0::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::SD_SLE_ALT) + self.variant(Pd0::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::MD_ALT) + self.variant(Pd0::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD0_A::WD_ALT) + self.variant(Pd0::WdAlt) } } -#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type PD1_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD1_A { +pub enum Pd1 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD1_A) -> Self { + fn from(variant: Pd1) -> Self { variant as _ } } -impl crate::FieldSpec for PD1_A { +impl crate::FieldSpec for Pd1 { type Ux = u8; } -impl PD1_R { +#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] +pub type Pd1R = crate::FieldReader; +impl Pd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD1_A { + pub const fn variant(&self) -> Pd1 { match self.bits { - 2 => PD1_A::SD_SOE, - 3 => PD1_A::SD_SLE, - 4 => PD1_A::MD, - 7 => PD1_A::WD, - 0 => PD1_A::SD_SOE_ALT, - 1 => PD1_A::SD_SLE_ALT, - 6 => PD1_A::MD_ALT, - 5 => PD1_A::WD_ALT, + 2 => Pd1::SdSoe, + 3 => Pd1::SdSle, + 4 => Pd1::Md, + 7 => Pd1::Wd, + 0 => Pd1::SdSoeAlt, + 1 => Pd1::SdSleAlt, + 6 => Pd1::MdAlt, + 5 => Pd1::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD1_A::SD_SOE + *self == Pd1::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD1_A::SD_SLE + *self == Pd1::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD1_A::MD + *self == Pd1::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD1_A::WD + *self == Pd1::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD1_A::SD_SOE_ALT + *self == Pd1::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD1_A::SD_SLE_ALT + *self == Pd1::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD1_A::MD_ALT + *self == Pd1::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD1_A::WD_ALT + *self == Pd1::WdAlt } } #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type PD1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD1_A>; -impl<'a, REG> PD1_W<'a, REG> +pub type Pd1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd1>; +impl<'a, REG> Pd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -238,136 +238,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE) + self.variant(Pd1::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE) + self.variant(Pd1::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD1_A::MD) + self.variant(Pd1::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD1_A::WD) + self.variant(Pd1::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SOE_ALT) + self.variant(Pd1::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::SD_SLE_ALT) + self.variant(Pd1::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::MD_ALT) + self.variant(Pd1::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD1_A::WD_ALT) + self.variant(Pd1::WdAlt) } } -#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type PD2_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD2_A { +pub enum Pd2 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD2_A) -> Self { + fn from(variant: Pd2) -> Self { variant as _ } } -impl crate::FieldSpec for PD2_A { +impl crate::FieldSpec for Pd2 { type Ux = u8; } -impl PD2_R { +#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] +pub type Pd2R = crate::FieldReader; +impl Pd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD2_A { + pub const fn variant(&self) -> Pd2 { match self.bits { - 2 => PD2_A::SD_SOE, - 3 => PD2_A::SD_SLE, - 4 => PD2_A::MD, - 7 => PD2_A::WD, - 0 => PD2_A::SD_SOE_ALT, - 1 => PD2_A::SD_SLE_ALT, - 6 => PD2_A::MD_ALT, - 5 => PD2_A::WD_ALT, + 2 => Pd2::SdSoe, + 3 => Pd2::SdSle, + 4 => Pd2::Md, + 7 => Pd2::Wd, + 0 => Pd2::SdSoeAlt, + 1 => Pd2::SdSleAlt, + 6 => Pd2::MdAlt, + 5 => Pd2::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD2_A::SD_SOE + *self == Pd2::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD2_A::SD_SLE + *self == Pd2::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD2_A::MD + *self == Pd2::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD2_A::WD + *self == Pd2::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD2_A::SD_SOE_ALT + *self == Pd2::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD2_A::SD_SLE_ALT + *self == Pd2::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD2_A::MD_ALT + *self == Pd2::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD2_A::WD_ALT + *self == Pd2::WdAlt } } #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type PD2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD2_A>; -impl<'a, REG> PD2_W<'a, REG> +pub type Pd2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd2>; +impl<'a, REG> Pd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,112 +375,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE) + self.variant(Pd2::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE) + self.variant(Pd2::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD2_A::MD) + self.variant(Pd2::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD2_A::WD) + self.variant(Pd2::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SOE_ALT) + self.variant(Pd2::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::SD_SLE_ALT) + self.variant(Pd2::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::MD_ALT) + self.variant(Pd2::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD2_A::WD_ALT) + self.variant(Pd2::WdAlt) } } -#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type PD3_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD3_A { +pub enum Pd3 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD3_A) -> Self { + fn from(variant: Pd3) -> Self { variant as _ } } -impl crate::FieldSpec for PD3_A { +impl crate::FieldSpec for Pd3 { type Ux = u8; } -impl PD3_R { +#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] +pub type Pd3R = crate::FieldReader; +impl Pd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD3_A::SD_SHE), - 1 => Some(PD3_A::SD_MEE), - 2 => Some(PD3_A::SD_SOE), - 4 => Some(PD3_A::MD), - 7 => Some(PD3_A::WD), + 0 => Some(Pd3::SdShe), + 1 => Some(Pd3::SdMee), + 2 => Some(Pd3::SdSoe), + 4 => Some(Pd3::Md), + 7 => Some(Pd3::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD3_A::SD_SHE + *self == Pd3::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD3_A::SD_MEE + *self == Pd3::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD3_A::SD_SOE + *self == Pd3::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD3_A::MD + *self == Pd3::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD3_A::WD + *self == Pd3::Wd } } #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>; -impl<'a, REG> PD3_W<'a, REG> +pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd3>; +impl<'a, REG> Pd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -488,97 +488,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SHE) + self.variant(Pd3::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_MEE) + self.variant(Pd3::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD3_A::SD_SOE) + self.variant(Pd3::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD3_A::MD) + self.variant(Pd3::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD3_A::WD) + self.variant(Pd3::Wd) } } -#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type PD4_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD4_A { +pub enum Pd4 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD4_A) -> Self { + fn from(variant: Pd4) -> Self { variant as _ } } -impl crate::FieldSpec for PD4_A { +impl crate::FieldSpec for Pd4 { type Ux = u8; } -impl PD4_R { +#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] +pub type Pd4R = crate::FieldReader; +impl Pd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD4_A::SD_SHE), - 1 => Some(PD4_A::SD_MEE), - 2 => Some(PD4_A::SD_SOE), - 4 => Some(PD4_A::MD), - 7 => Some(PD4_A::WD), + 0 => Some(Pd4::SdShe), + 1 => Some(Pd4::SdMee), + 2 => Some(Pd4::SdSoe), + 4 => Some(Pd4::Md), + 7 => Some(Pd4::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD4_A::SD_SHE + *self == Pd4::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD4_A::SD_MEE + *self == Pd4::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD4_A::SD_SOE + *self == Pd4::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD4_A::MD + *self == Pd4::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD4_A::WD + *self == Pd4::Wd } } #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>; -impl<'a, REG> PD4_W<'a, REG> +pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd4>; +impl<'a, REG> Pd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,97 +586,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SHE) + self.variant(Pd4::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_MEE) + self.variant(Pd4::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD4_A::SD_SOE) + self.variant(Pd4::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD4_A::MD) + self.variant(Pd4::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD4_A::WD) + self.variant(Pd4::Wd) } } -#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type PD5_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD5_A { +pub enum Pd5 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD5_A) -> Self { + fn from(variant: Pd5) -> Self { variant as _ } } -impl crate::FieldSpec for PD5_A { +impl crate::FieldSpec for Pd5 { type Ux = u8; } -impl PD5_R { +#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] +pub type Pd5R = crate::FieldReader; +impl Pd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD5_A::SD_SHE), - 1 => Some(PD5_A::SD_MEE), - 2 => Some(PD5_A::SD_SOE), - 4 => Some(PD5_A::MD), - 7 => Some(PD5_A::WD), + 0 => Some(Pd5::SdShe), + 1 => Some(Pd5::SdMee), + 2 => Some(Pd5::SdSoe), + 4 => Some(Pd5::Md), + 7 => Some(Pd5::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD5_A::SD_SHE + *self == Pd5::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD5_A::SD_MEE + *self == Pd5::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD5_A::SD_SOE + *self == Pd5::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD5_A::MD + *self == Pd5::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD5_A::WD + *self == Pd5::Wd } } #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>; -impl<'a, REG> PD5_W<'a, REG> +pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd5>; +impl<'a, REG> Pd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -684,97 +684,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SHE) + self.variant(Pd5::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_MEE) + self.variant(Pd5::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD5_A::SD_SOE) + self.variant(Pd5::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD5_A::MD) + self.variant(Pd5::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD5_A::WD) + self.variant(Pd5::Wd) } } -#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type PD6_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD6_A { +pub enum Pd6 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD6_A) -> Self { + fn from(variant: Pd6) -> Self { variant as _ } } -impl crate::FieldSpec for PD6_A { +impl crate::FieldSpec for Pd6 { type Ux = u8; } -impl PD6_R { +#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] +pub type Pd6R = crate::FieldReader; +impl Pd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD6_A::SD_SHE), - 1 => Some(PD6_A::SD_MEE), - 2 => Some(PD6_A::SD_SOE), - 4 => Some(PD6_A::MD), - 7 => Some(PD6_A::WD), + 0 => Some(Pd6::SdShe), + 1 => Some(Pd6::SdMee), + 2 => Some(Pd6::SdSoe), + 4 => Some(Pd6::Md), + 7 => Some(Pd6::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD6_A::SD_SHE + *self == Pd6::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD6_A::SD_MEE + *self == Pd6::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD6_A::SD_SOE + *self == Pd6::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD6_A::MD + *self == Pd6::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD6_A::WD + *self == Pd6::Wd } } #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>; -impl<'a, REG> PD6_W<'a, REG> +pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd6>; +impl<'a, REG> Pd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -782,121 +782,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SHE) + self.variant(Pd6::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_MEE) + self.variant(Pd6::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD6_A::SD_SOE) + self.variant(Pd6::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD6_A::MD) + self.variant(Pd6::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD6_A::WD) + self.variant(Pd6::Wd) } } -#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type PD7_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD7_A { +pub enum Pd7 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD7_A) -> Self { + fn from(variant: Pd7) -> Self { variant as _ } } -impl crate::FieldSpec for PD7_A { +impl crate::FieldSpec for Pd7 { type Ux = u8; } -impl PD7_R { +#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] +pub type Pd7R = crate::FieldReader; +impl Pd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD7_A { + pub const fn variant(&self) -> Pd7 { match self.bits { - 2 => PD7_A::SD_SOE, - 3 => PD7_A::SD_SLE, - 4 => PD7_A::MD, - 7 => PD7_A::WD, - 0 => PD7_A::SD_SOE_ALT, - 1 => PD7_A::SD_SLE_ALT, - 6 => PD7_A::MD_ALT, - 5 => PD7_A::WD_ALT, + 2 => Pd7::SdSoe, + 3 => Pd7::SdSle, + 4 => Pd7::Md, + 7 => Pd7::Wd, + 0 => Pd7::SdSoeAlt, + 1 => Pd7::SdSleAlt, + 6 => Pd7::MdAlt, + 5 => Pd7::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD7_A::SD_SOE + *self == Pd7::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD7_A::SD_SLE + *self == Pd7::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD7_A::MD + *self == Pd7::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD7_A::WD + *self == Pd7::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD7_A::SD_SOE_ALT + *self == Pd7::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD7_A::SD_SLE_ALT + *self == Pd7::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD7_A::MD_ALT + *self == Pd7::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD7_A::WD_ALT + *self == Pd7::WdAlt } } #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type PD7_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD7_A>; -impl<'a, REG> PD7_W<'a, REG> +pub type Pd7W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd7>; +impl<'a, REG> Pd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -904,159 +904,150 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE) + self.variant(Pd7::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE) + self.variant(Pd7::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD7_A::MD) + self.variant(Pd7::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD7_A::WD) + self.variant(Pd7::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SOE_ALT) + self.variant(Pd7::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::SD_SLE_ALT) + self.variant(Pd7::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::MD_ALT) + self.variant(Pd7::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD7_A::WD_ALT) + self.variant(Pd7::WdAlt) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> PD0_R { - PD0_R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> Pd0R { + Pd0R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> PD1_R { - PD1_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> Pd1R { + Pd1R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> PD2_R { - PD2_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> Pd2R { + Pd2R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> PD3_R { - PD3_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> Pd3R { + Pd3R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> PD4_R { - PD4_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> Pd4R { + Pd4R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> PD5_R { - PD5_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> Pd5R { + Pd5R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> PD6_R { - PD6_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> Pd6R { + Pd6R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> PD7_R { - PD7_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> Pd7R { + Pd7R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> PD0_W { - PD0_W::new(self, 0) + pub fn pd0(&mut self) -> Pd0W { + Pd0W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> PD1_W { - PD1_W::new(self, 4) + pub fn pd1(&mut self) -> Pd1W { + Pd1W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> PD2_W { - PD2_W::new(self, 8) + pub fn pd2(&mut self) -> Pd2W { + Pd2W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> PD3_W { - PD3_W::new(self, 12) + pub fn pd3(&mut self) -> Pd3W { + Pd3W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> PD4_W { - PD4_W::new(self, 16) + pub fn pd4(&mut self) -> Pd4W { + Pd4W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> PD5_W { - PD5_W::new(self, 20) + pub fn pd5(&mut self) -> Pd5W { + Pd5W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> PD6_W { - PD6_W::new(self, 24) + pub fn pd6(&mut self) -> Pd6W { + Pd6W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> PD7_W { - PD7_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd7(&mut self) -> Pd7W { + Pd7W::new(self, 28) } } #[doc = "Port 9 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR0_SPEC; -impl crate::RegisterSpec for PDR0_SPEC { +pub struct Pdr0Spec; +impl crate::RegisterSpec for Pdr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for PDR0_SPEC {} +impl crate::Readable for Pdr0Spec {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for PDR0_SPEC { +impl crate::Writable for Pdr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for PDR0_SPEC { +impl crate::Resettable for Pdr0Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port9/pdr1.rs b/src/port9/pdr1.rs index 392fba24..6299ed74 100644 --- a/src/port9/pdr1.rs +++ b/src/port9/pdr1.rs @@ -1,75 +1,75 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; -#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type PD8_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Pad Driver Mode for Pn.8\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD8_A { +pub enum Pd8 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD8_A) -> Self { + fn from(variant: Pd8) -> Self { variant as _ } } -impl crate::FieldSpec for PD8_A { +impl crate::FieldSpec for Pd8 { type Ux = u8; } -impl PD8_R { +#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] +pub type Pd8R = crate::FieldReader; +impl Pd8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD8_A::SD_SHE), - 1 => Some(PD8_A::SD_MEE), - 2 => Some(PD8_A::SD_SOE), - 4 => Some(PD8_A::MD), - 7 => Some(PD8_A::WD), + 0 => Some(Pd8::SdShe), + 1 => Some(Pd8::SdMee), + 2 => Some(Pd8::SdSoe), + 4 => Some(Pd8::Md), + 7 => Some(Pd8::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD8_A::SD_SHE + *self == Pd8::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD8_A::SD_MEE + *self == Pd8::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD8_A::SD_SOE + *self == Pd8::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD8_A::MD + *self == Pd8::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD8_A::WD + *self == Pd8::Wd } } #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD8_A>; -impl<'a, REG> PD8_W<'a, REG> +pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd8>; +impl<'a, REG> Pd8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SHE) + self.variant(Pd8::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_MEE) + self.variant(Pd8::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD8_A::SD_SOE) + self.variant(Pd8::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD8_A::MD) + self.variant(Pd8::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD8_A::WD) + self.variant(Pd8::Wd) } } -#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type PD9_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.9\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD9_A { +pub enum Pd9 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD9_A) -> Self { + fn from(variant: Pd9) -> Self { variant as _ } } -impl crate::FieldSpec for PD9_A { +impl crate::FieldSpec for Pd9 { type Ux = u8; } -impl PD9_R { +#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] +pub type Pd9R = crate::FieldReader; +impl Pd9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD9_A::SD_SHE), - 1 => Some(PD9_A::SD_MEE), - 2 => Some(PD9_A::SD_SOE), - 4 => Some(PD9_A::MD), - 7 => Some(PD9_A::WD), + 0 => Some(Pd9::SdShe), + 1 => Some(Pd9::SdMee), + 2 => Some(Pd9::SdSoe), + 4 => Some(Pd9::Md), + 7 => Some(Pd9::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD9_A::SD_SHE + *self == Pd9::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD9_A::SD_MEE + *self == Pd9::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD9_A::SD_SOE + *self == Pd9::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD9_A::MD + *self == Pd9::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD9_A::WD + *self == Pd9::Wd } } #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD9_A>; -impl<'a, REG> PD9_W<'a, REG> +pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd9>; +impl<'a, REG> Pd9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,121 +175,121 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SHE) + self.variant(Pd9::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_MEE) + self.variant(Pd9::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD9_A::SD_SOE) + self.variant(Pd9::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD9_A::MD) + self.variant(Pd9::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD9_A::WD) + self.variant(Pd9::Wd) } } -#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type PD10_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.10\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD10_A { +pub enum Pd10 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD10_A) -> Self { + fn from(variant: Pd10) -> Self { variant as _ } } -impl crate::FieldSpec for PD10_A { +impl crate::FieldSpec for Pd10 { type Ux = u8; } -impl PD10_R { +#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] +pub type Pd10R = crate::FieldReader; +impl Pd10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD10_A { + pub const fn variant(&self) -> Pd10 { match self.bits { - 2 => PD10_A::SD_SOE, - 3 => PD10_A::SD_SLE, - 4 => PD10_A::MD, - 7 => PD10_A::WD, - 0 => PD10_A::SD_SOE_ALT, - 1 => PD10_A::SD_SLE_ALT, - 6 => PD10_A::MD_ALT, - 5 => PD10_A::WD_ALT, + 2 => Pd10::SdSoe, + 3 => Pd10::SdSle, + 4 => Pd10::Md, + 7 => Pd10::Wd, + 0 => Pd10::SdSoeAlt, + 1 => Pd10::SdSleAlt, + 6 => Pd10::MdAlt, + 5 => Pd10::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD10_A::SD_SOE + *self == Pd10::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD10_A::SD_SLE + *self == Pd10::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD10_A::MD + *self == Pd10::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD10_A::WD + *self == Pd10::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD10_A::SD_SOE_ALT + *self == Pd10::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD10_A::SD_SLE_ALT + *self == Pd10::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD10_A::MD_ALT + *self == Pd10::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD10_A::WD_ALT + *self == Pd10::WdAlt } } #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type PD10_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD10_A>; -impl<'a, REG> PD10_W<'a, REG> +pub type Pd10W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd10>; +impl<'a, REG> Pd10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -297,136 +297,136 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE) + self.variant(Pd10::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE) + self.variant(Pd10::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD10_A::MD) + self.variant(Pd10::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD10_A::WD) + self.variant(Pd10::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SOE_ALT) + self.variant(Pd10::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::SD_SLE_ALT) + self.variant(Pd10::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::MD_ALT) + self.variant(Pd10::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD10_A::WD_ALT) + self.variant(Pd10::WdAlt) } } -#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type PD11_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.11\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD11_A { +pub enum Pd11 { #[doc = "2: A1+ strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "3: A1+ strong driver, slow edge"] - SD_SLE = 3, + SdSle = 3, #[doc = "4: A1+ medium driver"] - MD = 4, + Md = 4, #[doc = "7: A1+ weak driver"] - WD = 7, + Wd = 7, #[doc = "0: A1+ strong driver, soft edge (alternate value)"] - SD_SOE_ALT = 0, + SdSoeAlt = 0, #[doc = "1: A1+ strong driver, slow edge (alternate value)"] - SD_SLE_ALT = 1, + SdSleAlt = 1, #[doc = "6: A1+ medium driver (alternate value)"] - MD_ALT = 6, + MdAlt = 6, #[doc = "5: A1+ weak driver (alternate value)"] - WD_ALT = 5, + WdAlt = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD11_A) -> Self { + fn from(variant: Pd11) -> Self { variant as _ } } -impl crate::FieldSpec for PD11_A { +impl crate::FieldSpec for Pd11 { type Ux = u8; } -impl PD11_R { +#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] +pub type Pd11R = crate::FieldReader; +impl Pd11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PD11_A { + pub const fn variant(&self) -> Pd11 { match self.bits { - 2 => PD11_A::SD_SOE, - 3 => PD11_A::SD_SLE, - 4 => PD11_A::MD, - 7 => PD11_A::WD, - 0 => PD11_A::SD_SOE_ALT, - 1 => PD11_A::SD_SLE_ALT, - 6 => PD11_A::MD_ALT, - 5 => PD11_A::WD_ALT, + 2 => Pd11::SdSoe, + 3 => Pd11::SdSle, + 4 => Pd11::Md, + 7 => Pd11::Wd, + 0 => Pd11::SdSoeAlt, + 1 => Pd11::SdSleAlt, + 6 => Pd11::MdAlt, + 5 => Pd11::WdAlt, _ => unreachable!(), } } #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD11_A::SD_SOE + *self == Pd11::SdSoe } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn is_sd_sle(&self) -> bool { - *self == PD11_A::SD_SLE + *self == Pd11::SdSle } #[doc = "A1+ medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD11_A::MD + *self == Pd11::Md } #[doc = "A1+ weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD11_A::WD + *self == Pd11::Wd } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn is_sd_soe_alt(&self) -> bool { - *self == PD11_A::SD_SOE_ALT + *self == Pd11::SdSoeAlt } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn is_sd_sle_alt(&self) -> bool { - *self == PD11_A::SD_SLE_ALT + *self == Pd11::SdSleAlt } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn is_md_alt(&self) -> bool { - *self == PD11_A::MD_ALT + *self == Pd11::MdAlt } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn is_wd_alt(&self) -> bool { - *self == PD11_A::WD_ALT + *self == Pd11::WdAlt } } #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type PD11_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, PD11_A>; -impl<'a, REG> PD11_W<'a, REG> +pub type Pd11W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Pd11>; +impl<'a, REG> Pd11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,112 +434,112 @@ where #[doc = "A1+ strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE) + self.variant(Pd11::SdSoe) } #[doc = "A1+ strong driver, slow edge"] #[inline(always)] pub fn sd_sle(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE) + self.variant(Pd11::SdSle) } #[doc = "A1+ medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD11_A::MD) + self.variant(Pd11::Md) } #[doc = "A1+ weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD11_A::WD) + self.variant(Pd11::Wd) } #[doc = "A1+ strong driver, soft edge (alternate value)"] #[inline(always)] pub fn sd_soe_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SOE_ALT) + self.variant(Pd11::SdSoeAlt) } #[doc = "A1+ strong driver, slow edge (alternate value)"] #[inline(always)] pub fn sd_sle_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::SD_SLE_ALT) + self.variant(Pd11::SdSleAlt) } #[doc = "A1+ medium driver (alternate value)"] #[inline(always)] pub fn md_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::MD_ALT) + self.variant(Pd11::MdAlt) } #[doc = "A1+ weak driver (alternate value)"] #[inline(always)] pub fn wd_alt(self) -> &'a mut crate::W { - self.variant(PD11_A::WD_ALT) + self.variant(Pd11::WdAlt) } } -#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type PD12_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.12\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD12_A { +pub enum Pd12 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD12_A) -> Self { + fn from(variant: Pd12) -> Self { variant as _ } } -impl crate::FieldSpec for PD12_A { +impl crate::FieldSpec for Pd12 { type Ux = u8; } -impl PD12_R { +#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] +pub type Pd12R = crate::FieldReader; +impl Pd12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD12_A::SD_SHE), - 1 => Some(PD12_A::SD_MEE), - 2 => Some(PD12_A::SD_SOE), - 4 => Some(PD12_A::MD), - 7 => Some(PD12_A::WD), + 0 => Some(Pd12::SdShe), + 1 => Some(Pd12::SdMee), + 2 => Some(Pd12::SdSoe), + 4 => Some(Pd12::Md), + 7 => Some(Pd12::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD12_A::SD_SHE + *self == Pd12::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD12_A::SD_MEE + *self == Pd12::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD12_A::SD_SOE + *self == Pd12::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD12_A::MD + *self == Pd12::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD12_A::WD + *self == Pd12::Wd } } #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD12_A>; -impl<'a, REG> PD12_W<'a, REG> +pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd12>; +impl<'a, REG> Pd12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -547,97 +547,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SHE) + self.variant(Pd12::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_MEE) + self.variant(Pd12::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD12_A::SD_SOE) + self.variant(Pd12::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD12_A::MD) + self.variant(Pd12::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD12_A::WD) + self.variant(Pd12::Wd) } } -#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type PD13_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.13\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD13_A { +pub enum Pd13 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD13_A) -> Self { + fn from(variant: Pd13) -> Self { variant as _ } } -impl crate::FieldSpec for PD13_A { +impl crate::FieldSpec for Pd13 { type Ux = u8; } -impl PD13_R { +#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] +pub type Pd13R = crate::FieldReader; +impl Pd13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD13_A::SD_SHE), - 1 => Some(PD13_A::SD_MEE), - 2 => Some(PD13_A::SD_SOE), - 4 => Some(PD13_A::MD), - 7 => Some(PD13_A::WD), + 0 => Some(Pd13::SdShe), + 1 => Some(Pd13::SdMee), + 2 => Some(Pd13::SdSoe), + 4 => Some(Pd13::Md), + 7 => Some(Pd13::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD13_A::SD_SHE + *self == Pd13::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD13_A::SD_MEE + *self == Pd13::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD13_A::SD_SOE + *self == Pd13::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD13_A::MD + *self == Pd13::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD13_A::WD + *self == Pd13::Wd } } #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD13_A>; -impl<'a, REG> PD13_W<'a, REG> +pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd13>; +impl<'a, REG> Pd13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -645,97 +645,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SHE) + self.variant(Pd13::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_MEE) + self.variant(Pd13::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD13_A::SD_SOE) + self.variant(Pd13::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD13_A::MD) + self.variant(Pd13::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD13_A::WD) + self.variant(Pd13::Wd) } } -#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type PD14_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.14\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD14_A { +pub enum Pd14 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD14_A) -> Self { + fn from(variant: Pd14) -> Self { variant as _ } } -impl crate::FieldSpec for PD14_A { +impl crate::FieldSpec for Pd14 { type Ux = u8; } -impl PD14_R { +#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] +pub type Pd14R = crate::FieldReader; +impl Pd14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD14_A::SD_SHE), - 1 => Some(PD14_A::SD_MEE), - 2 => Some(PD14_A::SD_SOE), - 4 => Some(PD14_A::MD), - 7 => Some(PD14_A::WD), + 0 => Some(Pd14::SdShe), + 1 => Some(Pd14::SdMee), + 2 => Some(Pd14::SdSoe), + 4 => Some(Pd14::Md), + 7 => Some(Pd14::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD14_A::SD_SHE + *self == Pd14::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD14_A::SD_MEE + *self == Pd14::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD14_A::SD_SOE + *self == Pd14::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD14_A::MD + *self == Pd14::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD14_A::WD + *self == Pd14::Wd } } #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD14_A>; -impl<'a, REG> PD14_W<'a, REG> +pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd14>; +impl<'a, REG> Pd14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -743,97 +743,97 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SHE) + self.variant(Pd14::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_MEE) + self.variant(Pd14::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD14_A::SD_SOE) + self.variant(Pd14::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD14_A::MD) + self.variant(Pd14::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD14_A::WD) + self.variant(Pd14::Wd) } } -#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type PD15_R = crate::FieldReader; #[doc = "Pad Driver Mode for Pn.15\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PD15_A { +pub enum Pd15 { #[doc = "0: A2 strong driver, sharp edge"] - SD_SHE = 0, + SdShe = 0, #[doc = "1: A2 strong driver, medium edge"] - SD_MEE = 1, + SdMee = 1, #[doc = "2: A2 strong driver, soft edge"] - SD_SOE = 2, + SdSoe = 2, #[doc = "4: A2 medium driver"] - MD = 4, + Md = 4, #[doc = "7: A2 weak driver"] - WD = 7, + Wd = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PD15_A) -> Self { + fn from(variant: Pd15) -> Self { variant as _ } } -impl crate::FieldSpec for PD15_A { +impl crate::FieldSpec for Pd15 { type Ux = u8; } -impl PD15_R { +#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] +pub type Pd15R = crate::FieldReader; +impl Pd15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PD15_A::SD_SHE), - 1 => Some(PD15_A::SD_MEE), - 2 => Some(PD15_A::SD_SOE), - 4 => Some(PD15_A::MD), - 7 => Some(PD15_A::WD), + 0 => Some(Pd15::SdShe), + 1 => Some(Pd15::SdMee), + 2 => Some(Pd15::SdSoe), + 4 => Some(Pd15::Md), + 7 => Some(Pd15::Wd), _ => None, } } #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn is_sd_she(&self) -> bool { - *self == PD15_A::SD_SHE + *self == Pd15::SdShe } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn is_sd_mee(&self) -> bool { - *self == PD15_A::SD_MEE + *self == Pd15::SdMee } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn is_sd_soe(&self) -> bool { - *self == PD15_A::SD_SOE + *self == Pd15::SdSoe } #[doc = "A2 medium driver"] #[inline(always)] pub fn is_md(&self) -> bool { - *self == PD15_A::MD + *self == Pd15::Md } #[doc = "A2 weak driver"] #[inline(always)] pub fn is_wd(&self) -> bool { - *self == PD15_A::WD + *self == Pd15::Wd } } #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD15_A>; -impl<'a, REG> PD15_W<'a, REG> +pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3, Pd15>; +impl<'a, REG> Pd15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -841,144 +841,135 @@ where #[doc = "A2 strong driver, sharp edge"] #[inline(always)] pub fn sd_she(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SHE) + self.variant(Pd15::SdShe) } #[doc = "A2 strong driver, medium edge"] #[inline(always)] pub fn sd_mee(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_MEE) + self.variant(Pd15::SdMee) } #[doc = "A2 strong driver, soft edge"] #[inline(always)] pub fn sd_soe(self) -> &'a mut crate::W { - self.variant(PD15_A::SD_SOE) + self.variant(Pd15::SdSoe) } #[doc = "A2 medium driver"] #[inline(always)] pub fn md(self) -> &'a mut crate::W { - self.variant(PD15_A::MD) + self.variant(Pd15::Md) } #[doc = "A2 weak driver"] #[inline(always)] pub fn wd(self) -> &'a mut crate::W { - self.variant(PD15_A::WD) + self.variant(Pd15::Wd) } } impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> PD8_R { - PD8_R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> Pd8R { + Pd8R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> PD9_R { - PD9_R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> Pd9R { + Pd9R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> PD10_R { - PD10_R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> Pd10R { + Pd10R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> PD11_R { - PD11_R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> Pd11R { + Pd11R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> PD12_R { - PD12_R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> Pd12R { + Pd12R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> PD13_R { - PD13_R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> Pd13R { + Pd13R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> PD14_R { - PD14_R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> Pd14R { + Pd14R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> PD15_R { - PD15_R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> Pd15R { + Pd15R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> PD8_W { - PD8_W::new(self, 0) + pub fn pd8(&mut self) -> Pd8W { + Pd8W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> PD9_W { - PD9_W::new(self, 4) + pub fn pd9(&mut self) -> Pd9W { + Pd9W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> PD10_W { - PD10_W::new(self, 8) + pub fn pd10(&mut self) -> Pd10W { + Pd10W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> PD11_W { - PD11_W::new(self, 12) + pub fn pd11(&mut self) -> Pd11W { + Pd11W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> PD12_W { - PD12_W::new(self, 16) + pub fn pd12(&mut self) -> Pd12W { + Pd12W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> PD13_W { - PD13_W::new(self, 20) + pub fn pd13(&mut self) -> Pd13W { + Pd13W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> PD14_W { - PD14_W::new(self, 24) + pub fn pd14(&mut self) -> Pd14W { + Pd14W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> PD15_W { - PD15_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pd15(&mut self) -> Pd15W { + Pd15W::new(self, 28) } } #[doc = "Port 9 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDR1_SPEC; -impl crate::RegisterSpec for PDR1_SPEC { +pub struct Pdr1Spec; +impl crate::RegisterSpec for Pdr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for PDR1_SPEC {} +impl crate::Readable for Pdr1Spec {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for PDR1_SPEC { +impl crate::Writable for Pdr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for PDR1_SPEC { +impl crate::Resettable for Pdr1Spec { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port9/pps.rs b/src/port9/pps.rs index f3727e6d..ec358b47 100644 --- a/src/port9/pps.rs +++ b/src/port9/pps.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; -#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type PPS0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS0_A { +pub enum Pps0 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS0_A) -> Self { + fn from(variant: Pps0) -> Self { variant as u8 != 0 } } -impl PPS0_R { +#[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] +pub type Pps0R = crate::BitReader; +impl Pps0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS0_A { + pub const fn variant(&self) -> Pps0 { match self.bits { - false => PPS0_A::VALUE1, - true => PPS0_A::VALUE2, + false => Pps0::Value1, + true => Pps0::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS0_A::VALUE1 + *self == Pps0::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS0_A::VALUE2 + *self == Pps0::Value2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; -impl<'a, REG> PPS0_W<'a, REG> +pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; +impl<'a, REG> Pps0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE1) + self.variant(Pps0::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS0_A::VALUE2) + self.variant(Pps0::Value2) } } -#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type PPS1_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS1_A { +pub enum Pps1 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS1_A) -> Self { + fn from(variant: Pps1) -> Self { variant as u8 != 0 } } -impl PPS1_R { +#[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] +pub type Pps1R = crate::BitReader; +impl Pps1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS1_A { + pub const fn variant(&self) -> Pps1 { match self.bits { - false => PPS1_A::VALUE1, - true => PPS1_A::VALUE2, + false => Pps1::Value1, + true => Pps1::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS1_A::VALUE1 + *self == Pps1::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS1_A::VALUE2 + *self == Pps1::Value2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; -impl<'a, REG> PPS1_W<'a, REG> +pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; +impl<'a, REG> Pps1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE1) + self.variant(Pps1::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS1_A::VALUE2) + self.variant(Pps1::Value2) } } -#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type PPS2_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS2_A { +pub enum Pps2 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS2_A) -> Self { + fn from(variant: Pps2) -> Self { variant as u8 != 0 } } -impl PPS2_R { +#[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] +pub type Pps2R = crate::BitReader; +impl Pps2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS2_A { + pub const fn variant(&self) -> Pps2 { match self.bits { - false => PPS2_A::VALUE1, - true => PPS2_A::VALUE2, + false => Pps2::Value1, + true => Pps2::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS2_A::VALUE1 + *self == Pps2::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS2_A::VALUE2 + *self == Pps2::Value2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; -impl<'a, REG> PPS2_W<'a, REG> +pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; +impl<'a, REG> Pps2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE1) + self.variant(Pps2::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS2_A::VALUE2) + self.variant(Pps2::Value2) } } -#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type PPS3_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS3_A { +pub enum Pps3 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS3_A) -> Self { + fn from(variant: Pps3) -> Self { variant as u8 != 0 } } -impl PPS3_R { +#[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] +pub type Pps3R = crate::BitReader; +impl Pps3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS3_A { + pub const fn variant(&self) -> Pps3 { match self.bits { - false => PPS3_A::VALUE1, - true => PPS3_A::VALUE2, + false => Pps3::Value1, + true => Pps3::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS3_A::VALUE1 + *self == Pps3::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS3_A::VALUE2 + *self == Pps3::Value2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; -impl<'a, REG> PPS3_W<'a, REG> +pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; +impl<'a, REG> Pps3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE1) + self.variant(Pps3::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS3_A::VALUE2) + self.variant(Pps3::Value2) } } -#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type PPS4_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS4_A { +pub enum Pps4 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS4_A) -> Self { + fn from(variant: Pps4) -> Self { variant as u8 != 0 } } -impl PPS4_R { +#[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] +pub type Pps4R = crate::BitReader; +impl Pps4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS4_A { + pub const fn variant(&self) -> Pps4 { match self.bits { - false => PPS4_A::VALUE1, - true => PPS4_A::VALUE2, + false => Pps4::Value1, + true => Pps4::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS4_A::VALUE1 + *self == Pps4::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS4_A::VALUE2 + *self == Pps4::Value2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; -impl<'a, REG> PPS4_W<'a, REG> +pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; +impl<'a, REG> Pps4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE1) + self.variant(Pps4::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS4_A::VALUE2) + self.variant(Pps4::Value2) } } -#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type PPS5_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS5_A { +pub enum Pps5 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS5_A) -> Self { + fn from(variant: Pps5) -> Self { variant as u8 != 0 } } -impl PPS5_R { +#[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] +pub type Pps5R = crate::BitReader; +impl Pps5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS5_A { + pub const fn variant(&self) -> Pps5 { match self.bits { - false => PPS5_A::VALUE1, - true => PPS5_A::VALUE2, + false => Pps5::Value1, + true => Pps5::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS5_A::VALUE1 + *self == Pps5::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS5_A::VALUE2 + *self == Pps5::Value2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; -impl<'a, REG> PPS5_W<'a, REG> +pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; +impl<'a, REG> Pps5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE1) + self.variant(Pps5::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS5_A::VALUE2) + self.variant(Pps5::Value2) } } -#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type PPS6_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS6_A { +pub enum Pps6 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS6_A) -> Self { + fn from(variant: Pps6) -> Self { variant as u8 != 0 } } -impl PPS6_R { +#[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] +pub type Pps6R = crate::BitReader; +impl Pps6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS6_A { + pub const fn variant(&self) -> Pps6 { match self.bits { - false => PPS6_A::VALUE1, - true => PPS6_A::VALUE2, + false => Pps6::Value1, + true => Pps6::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS6_A::VALUE1 + *self == Pps6::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS6_A::VALUE2 + *self == Pps6::Value2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; -impl<'a, REG> PPS6_W<'a, REG> +pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; +impl<'a, REG> Pps6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE1) + self.variant(Pps6::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS6_A::VALUE2) + self.variant(Pps6::Value2) } } -#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type PPS7_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS7_A { +pub enum Pps7 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS7_A) -> Self { + fn from(variant: Pps7) -> Self { variant as u8 != 0 } } -impl PPS7_R { +#[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] +pub type Pps7R = crate::BitReader; +impl Pps7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS7_A { + pub const fn variant(&self) -> Pps7 { match self.bits { - false => PPS7_A::VALUE1, - true => PPS7_A::VALUE2, + false => Pps7::Value1, + true => Pps7::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS7_A::VALUE1 + *self == Pps7::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS7_A::VALUE2 + *self == Pps7::Value2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; -impl<'a, REG> PPS7_W<'a, REG> +pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; +impl<'a, REG> Pps7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE1) + self.variant(Pps7::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS7_A::VALUE2) + self.variant(Pps7::Value2) } } -#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type PPS8_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS8_A { +pub enum Pps8 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS8_A) -> Self { + fn from(variant: Pps8) -> Self { variant as u8 != 0 } } -impl PPS8_R { +#[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] +pub type Pps8R = crate::BitReader; +impl Pps8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS8_A { + pub const fn variant(&self) -> Pps8 { match self.bits { - false => PPS8_A::VALUE1, - true => PPS8_A::VALUE2, + false => Pps8::Value1, + true => Pps8::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS8_A::VALUE1 + *self == Pps8::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS8_A::VALUE2 + *self == Pps8::Value2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; -impl<'a, REG> PPS8_W<'a, REG> +pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; +impl<'a, REG> Pps8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE1) + self.variant(Pps8::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS8_A::VALUE2) + self.variant(Pps8::Value2) } } -#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type PPS9_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS9_A { +pub enum Pps9 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS9_A) -> Self { + fn from(variant: Pps9) -> Self { variant as u8 != 0 } } -impl PPS9_R { +#[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] +pub type Pps9R = crate::BitReader; +impl Pps9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS9_A { + pub const fn variant(&self) -> Pps9 { match self.bits { - false => PPS9_A::VALUE1, - true => PPS9_A::VALUE2, + false => Pps9::Value1, + true => Pps9::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS9_A::VALUE1 + *self == Pps9::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS9_A::VALUE2 + *self == Pps9::Value2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; -impl<'a, REG> PPS9_W<'a, REG> +pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; +impl<'a, REG> Pps9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE1) + self.variant(Pps9::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS9_A::VALUE2) + self.variant(Pps9::Value2) } } -#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type PPS10_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS10_A { +pub enum Pps10 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS10_A) -> Self { + fn from(variant: Pps10) -> Self { variant as u8 != 0 } } -impl PPS10_R { +#[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] +pub type Pps10R = crate::BitReader; +impl Pps10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS10_A { + pub const fn variant(&self) -> Pps10 { match self.bits { - false => PPS10_A::VALUE1, - true => PPS10_A::VALUE2, + false => Pps10::Value1, + true => Pps10::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS10_A::VALUE1 + *self == Pps10::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS10_A::VALUE2 + *self == Pps10::Value2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; -impl<'a, REG> PPS10_W<'a, REG> +pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; +impl<'a, REG> Pps10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE1) + self.variant(Pps10::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS10_A::VALUE2) + self.variant(Pps10::Value2) } } -#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type PPS11_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS11_A { +pub enum Pps11 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS11_A) -> Self { + fn from(variant: Pps11) -> Self { variant as u8 != 0 } } -impl PPS11_R { +#[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] +pub type Pps11R = crate::BitReader; +impl Pps11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS11_A { + pub const fn variant(&self) -> Pps11 { match self.bits { - false => PPS11_A::VALUE1, - true => PPS11_A::VALUE2, + false => Pps11::Value1, + true => Pps11::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS11_A::VALUE1 + *self == Pps11::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS11_A::VALUE2 + *self == Pps11::Value2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; -impl<'a, REG> PPS11_W<'a, REG> +pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; +impl<'a, REG> Pps11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE1) + self.variant(Pps11::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS11_A::VALUE2) + self.variant(Pps11::Value2) } } -#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type PPS12_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS12_A { +pub enum Pps12 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS12_A) -> Self { + fn from(variant: Pps12) -> Self { variant as u8 != 0 } } -impl PPS12_R { +#[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] +pub type Pps12R = crate::BitReader; +impl Pps12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS12_A { + pub const fn variant(&self) -> Pps12 { match self.bits { - false => PPS12_A::VALUE1, - true => PPS12_A::VALUE2, + false => Pps12::Value1, + true => Pps12::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS12_A::VALUE1 + *self == Pps12::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS12_A::VALUE2 + *self == Pps12::Value2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; -impl<'a, REG> PPS12_W<'a, REG> +pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; +impl<'a, REG> Pps12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE1) + self.variant(Pps12::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS12_A::VALUE2) + self.variant(Pps12::Value2) } } -#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type PPS13_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS13_A { +pub enum Pps13 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS13_A) -> Self { + fn from(variant: Pps13) -> Self { variant as u8 != 0 } } -impl PPS13_R { +#[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] +pub type Pps13R = crate::BitReader; +impl Pps13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS13_A { + pub const fn variant(&self) -> Pps13 { match self.bits { - false => PPS13_A::VALUE1, - true => PPS13_A::VALUE2, + false => Pps13::Value1, + true => Pps13::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS13_A::VALUE1 + *self == Pps13::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS13_A::VALUE2 + *self == Pps13::Value2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; -impl<'a, REG> PPS13_W<'a, REG> +pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; +impl<'a, REG> Pps13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE1) + self.variant(Pps13::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS13_A::VALUE2) + self.variant(Pps13::Value2) } } -#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type PPS14_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS14_A { +pub enum Pps14 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS14_A) -> Self { + fn from(variant: Pps14) -> Self { variant as u8 != 0 } } -impl PPS14_R { +#[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] +pub type Pps14R = crate::BitReader; +impl Pps14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS14_A { + pub const fn variant(&self) -> Pps14 { match self.bits { - false => PPS14_A::VALUE1, - true => PPS14_A::VALUE2, + false => Pps14::Value1, + true => Pps14::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS14_A::VALUE1 + *self == Pps14::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS14_A::VALUE2 + *self == Pps14::Value2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; -impl<'a, REG> PPS14_W<'a, REG> +pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; +impl<'a, REG> Pps14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE1) + self.variant(Pps14::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS14_A::VALUE2) + self.variant(Pps14::Value2) } } -#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type PPS15_R = crate::BitReader; #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPS15_A { +pub enum Pps15 { #[doc = "0: Pin Power Save of Pn.x is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPS15_A) -> Self { + fn from(variant: Pps15) -> Self { variant as u8 != 0 } } -impl PPS15_R { +#[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] +pub type Pps15R = crate::BitReader; +impl Pps15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPS15_A { + pub const fn variant(&self) -> Pps15 { match self.bits { - false => PPS15_A::VALUE1, - true => PPS15_A::VALUE2, + false => Pps15::Value1, + true => Pps15::Value2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPS15_A::VALUE1 + *self == Pps15::Value1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPS15_A::VALUE2 + *self == Pps15::Value2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; -impl<'a, REG> PPS15_W<'a, REG> +pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; +impl<'a, REG> Pps15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE1) + self.variant(Pps15::Value1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPS15_A::VALUE2) + self.variant(Pps15::Value2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> PPS0_R { - PPS0_R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> Pps0R { + Pps0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> PPS1_R { - PPS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> Pps1R { + Pps1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> PPS2_R { - PPS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> Pps2R { + Pps2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> PPS3_R { - PPS3_R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> Pps3R { + Pps3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> PPS4_R { - PPS4_R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> Pps4R { + Pps4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> PPS5_R { - PPS5_R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> Pps5R { + Pps5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> PPS6_R { - PPS6_R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> Pps6R { + Pps6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> PPS7_R { - PPS7_R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> Pps7R { + Pps7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> PPS8_R { - PPS8_R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> Pps8R { + Pps8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> PPS9_R { - PPS9_R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> Pps9R { + Pps9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> PPS10_R { - PPS10_R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> Pps10R { + Pps10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> PPS11_R { - PPS11_R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> Pps11R { + Pps11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> PPS12_R { - PPS12_R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> Pps12R { + Pps12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> PPS13_R { - PPS13_R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> Pps13R { + Pps13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> PPS14_R { - PPS14_R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> Pps14R { + Pps14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> PPS15_R { - PPS15_R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> Pps15R { + Pps15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> PPS0_W { - PPS0_W::new(self, 0) + pub fn pps0(&mut self) -> Pps0W { + Pps0W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> PPS1_W { - PPS1_W::new(self, 1) + pub fn pps1(&mut self) -> Pps1W { + Pps1W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> PPS2_W { - PPS2_W::new(self, 2) + pub fn pps2(&mut self) -> Pps2W { + Pps2W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> PPS3_W { - PPS3_W::new(self, 3) + pub fn pps3(&mut self) -> Pps3W { + Pps3W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> PPS4_W { - PPS4_W::new(self, 4) + pub fn pps4(&mut self) -> Pps4W { + Pps4W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> PPS5_W { - PPS5_W::new(self, 5) + pub fn pps5(&mut self) -> Pps5W { + Pps5W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> PPS6_W { - PPS6_W::new(self, 6) + pub fn pps6(&mut self) -> Pps6W { + Pps6W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> PPS7_W { - PPS7_W::new(self, 7) + pub fn pps7(&mut self) -> Pps7W { + Pps7W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> PPS8_W { - PPS8_W::new(self, 8) + pub fn pps8(&mut self) -> Pps8W { + Pps8W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> PPS9_W { - PPS9_W::new(self, 9) + pub fn pps9(&mut self) -> Pps9W { + Pps9W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> PPS10_W { - PPS10_W::new(self, 10) + pub fn pps10(&mut self) -> Pps10W { + Pps10W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> PPS11_W { - PPS11_W::new(self, 11) + pub fn pps11(&mut self) -> Pps11W { + Pps11W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> PPS12_W { - PPS12_W::new(self, 12) + pub fn pps12(&mut self) -> Pps12W { + Pps12W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> PPS13_W { - PPS13_W::new(self, 13) + pub fn pps13(&mut self) -> Pps13W { + Pps13W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> PPS14_W { - PPS14_W::new(self, 14) + pub fn pps14(&mut self) -> Pps14W { + Pps14W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> PPS15_W { - PPS15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pps15(&mut self) -> Pps15W { + Pps15W::new(self, 15) } } #[doc = "Port 9 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PPS_SPEC; -impl crate::RegisterSpec for PPS_SPEC { +pub struct PpsSpec; +impl crate::RegisterSpec for PpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PPS_SPEC {} +impl crate::Readable for PpsSpec {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PPS_SPEC { +impl crate::Writable for PpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PPS_SPEC { +impl crate::Resettable for PpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0.rs b/src/posif0.rs index 986779d9..a71ef88b 100644 --- a/src/posif0.rs +++ b/src/posif0.rs @@ -1,221 +1,240 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - pconf: PCONF, - psus: PSUS, - pruns: PRUNS, - prunc: PRUNC, - prun: PRUN, + pconf: Pconf, + psus: Psus, + pruns: Pruns, + prunc: Prunc, + prun: Prun, _reserved5: [u8; 0x0c], - midr: MIDR, + midr: Midr, _reserved6: [u8; 0x0c], - halp: HALP, - halps: HALPS, + halp: Halp, + halps: Halps, _reserved8: [u8; 0x08], - mcm: MCM, - mcsm: MCSM, - mcms: MCMS, - mcmc: MCMC, - mcmf: MCMF, + mcm: Mcm, + mcsm: Mcsm, + mcms: Mcms, + mcmc: Mcmc, + mcmf: Mcmf, _reserved13: [u8; 0x0c], - qdc: QDC, + qdc: Qdc, _reserved14: [u8; 0x0c], - pflg: PFLG, - pflge: PFLGE, - spflg: SPFLG, - rpflg: RPFLG, + pflg: Pflg, + pflge: Pflge, + spflg: Spflg, + rpflg: Rpflg, _reserved18: [u8; 0x80], - pdbg: PDBG, + pdbg: Pdbg, } impl RegisterBlock { #[doc = "0x00 - POSIF configuration"] #[inline(always)] - pub const fn pconf(&self) -> &PCONF { + pub const fn pconf(&self) -> &Pconf { &self.pconf } #[doc = "0x04 - POSIF Suspend Config"] #[inline(always)] - pub const fn psus(&self) -> &PSUS { + pub const fn psus(&self) -> &Psus { &self.psus } #[doc = "0x08 - POSIF Run Bit Set"] #[inline(always)] - pub const fn pruns(&self) -> &PRUNS { + pub const fn pruns(&self) -> &Pruns { &self.pruns } #[doc = "0x0c - POSIF Run Bit Clear"] #[inline(always)] - pub const fn prunc(&self) -> &PRUNC { + pub const fn prunc(&self) -> &Prunc { &self.prunc } #[doc = "0x10 - POSIF Run Bit Status"] #[inline(always)] - pub const fn prun(&self) -> &PRUN { + pub const fn prun(&self) -> &Prun { &self.prun } #[doc = "0x20 - Module Identification register"] #[inline(always)] - pub const fn midr(&self) -> &MIDR { + pub const fn midr(&self) -> &Midr { &self.midr } #[doc = "0x30 - Hall Sensor Patterns"] #[inline(always)] - pub const fn halp(&self) -> &HALP { + pub const fn halp(&self) -> &Halp { &self.halp } #[doc = "0x34 - Hall Sensor Shadow Patterns"] #[inline(always)] - pub const fn halps(&self) -> &HALPS { + pub const fn halps(&self) -> &Halps { &self.halps } #[doc = "0x40 - Multi-Channel Pattern"] #[inline(always)] - pub const fn mcm(&self) -> &MCM { + pub const fn mcm(&self) -> &Mcm { &self.mcm } #[doc = "0x44 - Multi-Channel Shadow Pattern"] #[inline(always)] - pub const fn mcsm(&self) -> &MCSM { + pub const fn mcsm(&self) -> &Mcsm { &self.mcsm } #[doc = "0x48 - Multi-Channel Pattern Control set"] #[inline(always)] - pub const fn mcms(&self) -> &MCMS { + pub const fn mcms(&self) -> &Mcms { &self.mcms } #[doc = "0x4c - Multi-Channel Pattern Control clear"] #[inline(always)] - pub const fn mcmc(&self) -> &MCMC { + pub const fn mcmc(&self) -> &Mcmc { &self.mcmc } #[doc = "0x50 - Multi-Channel Pattern Control flag"] #[inline(always)] - pub const fn mcmf(&self) -> &MCMF { + pub const fn mcmf(&self) -> &Mcmf { &self.mcmf } #[doc = "0x60 - Quadrature Decoder Control"] #[inline(always)] - pub const fn qdc(&self) -> &QDC { + pub const fn qdc(&self) -> &Qdc { &self.qdc } #[doc = "0x70 - POSIF Interrupt Flags"] #[inline(always)] - pub const fn pflg(&self) -> &PFLG { + pub const fn pflg(&self) -> &Pflg { &self.pflg } #[doc = "0x74 - POSIF Interrupt Enable"] #[inline(always)] - pub const fn pflge(&self) -> &PFLGE { + pub const fn pflge(&self) -> &Pflge { &self.pflge } #[doc = "0x78 - POSIF Interrupt Set"] #[inline(always)] - pub const fn spflg(&self) -> &SPFLG { + pub const fn spflg(&self) -> &Spflg { &self.spflg } #[doc = "0x7c - POSIF Interrupt Clear"] #[inline(always)] - pub const fn rpflg(&self) -> &RPFLG { + pub const fn rpflg(&self) -> &Rpflg { &self.rpflg } #[doc = "0x100 - POSIF Debug register"] #[inline(always)] - pub const fn pdbg(&self) -> &PDBG { + pub const fn pdbg(&self) -> &Pdbg { &self.pdbg } } #[doc = "PCONF (rw) register accessor: POSIF configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pconf`] module"] -pub type PCONF = crate::Reg; +#[doc(alias = "PCONF")] +pub type Pconf = crate::Reg; #[doc = "POSIF configuration"] pub mod pconf; #[doc = "PSUS (rw) register accessor: POSIF Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psus`] module"] -pub type PSUS = crate::Reg; +#[doc(alias = "PSUS")] +pub type Psus = crate::Reg; #[doc = "POSIF Suspend Config"] pub mod psus; #[doc = "PRUNS (w) register accessor: POSIF Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pruns`] module"] -pub type PRUNS = crate::Reg; +#[doc(alias = "PRUNS")] +pub type Pruns = crate::Reg; #[doc = "POSIF Run Bit Set"] pub mod pruns; #[doc = "PRUNC (w) register accessor: POSIF Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prunc`] module"] -pub type PRUNC = crate::Reg; +#[doc(alias = "PRUNC")] +pub type Prunc = crate::Reg; #[doc = "POSIF Run Bit Clear"] pub mod prunc; #[doc = "PRUN (r) register accessor: POSIF Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prun`] module"] -pub type PRUN = crate::Reg; +#[doc(alias = "PRUN")] +pub type Prun = crate::Reg; #[doc = "POSIF Run Bit Status"] pub mod prun; #[doc = "MIDR (r) register accessor: Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -pub type MIDR = crate::Reg; +#[doc(alias = "MIDR")] +pub type Midr = crate::Reg; #[doc = "Module Identification register"] pub mod midr; #[doc = "HALP (r) register accessor: Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halp`] module"] -pub type HALP = crate::Reg; +#[doc(alias = "HALP")] +pub type Halp = crate::Reg; #[doc = "Hall Sensor Patterns"] pub mod halp; #[doc = "HALPS (rw) register accessor: Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halps`] module"] -pub type HALPS = crate::Reg; +#[doc(alias = "HALPS")] +pub type Halps = crate::Reg; #[doc = "Hall Sensor Shadow Patterns"] pub mod halps; #[doc = "MCM (r) register accessor: Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcm`] module"] -pub type MCM = crate::Reg; +#[doc(alias = "MCM")] +pub type Mcm = crate::Reg; #[doc = "Multi-Channel Pattern"] pub mod mcm; #[doc = "MCSM (rw) register accessor: Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcsm`] module"] -pub type MCSM = crate::Reg; +#[doc(alias = "MCSM")] +pub type Mcsm = crate::Reg; #[doc = "Multi-Channel Shadow Pattern"] pub mod mcsm; #[doc = "MCMS (w) register accessor: Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcms`] module"] -pub type MCMS = crate::Reg; +#[doc(alias = "MCMS")] +pub type Mcms = crate::Reg; #[doc = "Multi-Channel Pattern Control set"] pub mod mcms; #[doc = "MCMC (w) register accessor: Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmc`] module"] -pub type MCMC = crate::Reg; +#[doc(alias = "MCMC")] +pub type Mcmc = crate::Reg; #[doc = "Multi-Channel Pattern Control clear"] pub mod mcmc; #[doc = "MCMF (r) register accessor: Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmf`] module"] -pub type MCMF = crate::Reg; +#[doc(alias = "MCMF")] +pub type Mcmf = crate::Reg; #[doc = "Multi-Channel Pattern Control flag"] pub mod mcmf; #[doc = "QDC (rw) register accessor: Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qdc`] module"] -pub type QDC = crate::Reg; +#[doc(alias = "QDC")] +pub type Qdc = crate::Reg; #[doc = "Quadrature Decoder Control"] pub mod qdc; #[doc = "PFLG (r) register accessor: POSIF Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflg`] module"] -pub type PFLG = crate::Reg; +#[doc(alias = "PFLG")] +pub type Pflg = crate::Reg; #[doc = "POSIF Interrupt Flags"] pub mod pflg; #[doc = "PFLGE (rw) register accessor: POSIF Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflge`] module"] -pub type PFLGE = crate::Reg; +#[doc(alias = "PFLGE")] +pub type Pflge = crate::Reg; #[doc = "POSIF Interrupt Enable"] pub mod pflge; #[doc = "SPFLG (w) register accessor: POSIF Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spflg`] module"] -pub type SPFLG = crate::Reg; +#[doc(alias = "SPFLG")] +pub type Spflg = crate::Reg; #[doc = "POSIF Interrupt Set"] pub mod spflg; #[doc = "RPFLG (w) register accessor: POSIF Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rpflg`] module"] -pub type RPFLG = crate::Reg; +#[doc(alias = "RPFLG")] +pub type Rpflg = crate::Reg; #[doc = "POSIF Interrupt Clear"] pub mod rpflg; #[doc = "PDBG (r) register accessor: POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdbg`] module"] -pub type PDBG = crate::Reg; +#[doc(alias = "PDBG")] +pub type Pdbg = crate::Reg; #[doc = "POSIF Debug register"] pub mod pdbg; diff --git a/src/posif0/halp.rs b/src/posif0/halp.rs index 4cb95afd..ce970a8a 100644 --- a/src/posif0/halp.rs +++ b/src/posif0/halp.rs @@ -1,29 +1,29 @@ #[doc = "Register `HALP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `HCP` reader - Hall Current Pattern"] -pub type HCP_R = crate::FieldReader; +pub type HcpR = crate::FieldReader; #[doc = "Field `HEP` reader - Hall Expected Pattern"] -pub type HEP_R = crate::FieldReader; +pub type HepR = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Hall Current Pattern"] #[inline(always)] - pub fn hcp(&self) -> HCP_R { - HCP_R::new((self.bits & 7) as u8) + pub fn hcp(&self) -> HcpR { + HcpR::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Hall Expected Pattern"] #[inline(always)] - pub fn hep(&self) -> HEP_R { - HEP_R::new(((self.bits >> 3) & 7) as u8) + pub fn hep(&self) -> HepR { + HepR::new(((self.bits >> 3) & 7) as u8) } } #[doc = "Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HALP_SPEC; -impl crate::RegisterSpec for HALP_SPEC { +pub struct HalpSpec; +impl crate::RegisterSpec for HalpSpec { type Ux = u32; } #[doc = "`read()` method returns [`halp::R`](R) reader structure"] -impl crate::Readable for HALP_SPEC {} +impl crate::Readable for HalpSpec {} #[doc = "`reset()` method sets HALP to value 0"] -impl crate::Resettable for HALP_SPEC { +impl crate::Resettable for HalpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/halps.rs b/src/posif0/halps.rs index b03128b3..ad09cfb0 100644 --- a/src/posif0/halps.rs +++ b/src/posif0/halps.rs @@ -1,64 +1,55 @@ #[doc = "Register `HALPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HALPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `HCPS` reader - Shadow Hall Current Pattern"] -pub type HCPS_R = crate::FieldReader; +pub type HcpsR = crate::FieldReader; #[doc = "Field `HCPS` writer - Shadow Hall Current Pattern"] -pub type HCPS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type HcpsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `HEPS` reader - Shadow Hall expected Pattern"] -pub type HEPS_R = crate::FieldReader; +pub type HepsR = crate::FieldReader; #[doc = "Field `HEPS` writer - Shadow Hall expected Pattern"] -pub type HEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type HepsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Shadow Hall Current Pattern"] #[inline(always)] - pub fn hcps(&self) -> HCPS_R { - HCPS_R::new((self.bits & 7) as u8) + pub fn hcps(&self) -> HcpsR { + HcpsR::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Shadow Hall expected Pattern"] #[inline(always)] - pub fn heps(&self) -> HEPS_R { - HEPS_R::new(((self.bits >> 3) & 7) as u8) + pub fn heps(&self) -> HepsR { + HepsR::new(((self.bits >> 3) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Shadow Hall Current Pattern"] #[inline(always)] #[must_use] - pub fn hcps(&mut self) -> HCPS_W { - HCPS_W::new(self, 0) + pub fn hcps(&mut self) -> HcpsW { + HcpsW::new(self, 0) } #[doc = "Bits 3:5 - Shadow Hall expected Pattern"] #[inline(always)] #[must_use] - pub fn heps(&mut self) -> HEPS_W { - HEPS_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn heps(&mut self) -> HepsW { + HepsW::new(self, 3) } } #[doc = "Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HALPS_SPEC; -impl crate::RegisterSpec for HALPS_SPEC { +pub struct HalpsSpec; +impl crate::RegisterSpec for HalpsSpec { type Ux = u32; } #[doc = "`read()` method returns [`halps::R`](R) reader structure"] -impl crate::Readable for HALPS_SPEC {} +impl crate::Readable for HalpsSpec {} #[doc = "`write(|w| ..)` method takes [`halps::W`](W) writer structure"] -impl crate::Writable for HALPS_SPEC { +impl crate::Writable for HalpsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HALPS to value 0"] -impl crate::Resettable for HALPS_SPEC { +impl crate::Resettable for HalpsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcm.rs b/src/posif0/mcm.rs index 5c7adf9c..67736a6d 100644 --- a/src/posif0/mcm.rs +++ b/src/posif0/mcm.rs @@ -1,22 +1,22 @@ #[doc = "Register `MCM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MCMP` reader - Multi-Channel Pattern"] -pub type MCMP_R = crate::FieldReader; +pub type McmpR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Multi-Channel Pattern"] #[inline(always)] - pub fn mcmp(&self) -> MCMP_R { - MCMP_R::new((self.bits & 0xffff) as u16) + pub fn mcmp(&self) -> McmpR { + McmpR::new((self.bits & 0xffff) as u16) } } #[doc = "Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCM_SPEC; -impl crate::RegisterSpec for MCM_SPEC { +pub struct McmSpec; +impl crate::RegisterSpec for McmSpec { type Ux = u32; } #[doc = "`read()` method returns [`mcm::R`](R) reader structure"] -impl crate::Readable for MCM_SPEC {} +impl crate::Readable for McmSpec {} #[doc = "`reset()` method sets MCM to value 0"] -impl crate::Resettable for MCM_SPEC { +impl crate::Resettable for McmSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcmc.rs b/src/posif0/mcmc.rs index 5a73cdd7..06ee10cf 100644 --- a/src/posif0/mcmc.rs +++ b/src/posif0/mcmc.rs @@ -1,44 +1,35 @@ #[doc = "Register `MCMC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MNPC` writer - Multi-Channel Pattern Update Enable Clear"] -pub type MNPC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MnpcW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPC` writer - Multi-Channel Pattern clear"] -pub type MPC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Clear"] #[inline(always)] #[must_use] - pub fn mnpc(&mut self) -> MNPC_W { - MNPC_W::new(self, 0) + pub fn mnpc(&mut self) -> MnpcW { + MnpcW::new(self, 0) } #[doc = "Bit 1 - Multi-Channel Pattern clear"] #[inline(always)] #[must_use] - pub fn mpc(&mut self) -> MPC_W { - MPC_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mpc(&mut self) -> MpcW { + MpcW::new(self, 1) } } #[doc = "Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCMC_SPEC; -impl crate::RegisterSpec for MCMC_SPEC { +pub struct McmcSpec; +impl crate::RegisterSpec for McmcSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mcmc::W`](W) writer structure"] -impl crate::Writable for MCMC_SPEC { +impl crate::Writable for McmcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCMC to value 0"] -impl crate::Resettable for MCMC_SPEC { +impl crate::Resettable for McmcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcmf.rs b/src/posif0/mcmf.rs index 432fac07..69641d7d 100644 --- a/src/posif0/mcmf.rs +++ b/src/posif0/mcmf.rs @@ -1,56 +1,56 @@ #[doc = "Register `MCMF` reader"] -pub type R = crate::R; -#[doc = "Field `MSS` reader - Multi-Channel Pattern update status"] -pub type MSS_R = crate::BitReader; +pub type R = crate::R; #[doc = "Multi-Channel Pattern update status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSS_A { +pub enum Mss { #[doc = "0: Update of the Multi-Channel pattern is set"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update of the Multi-Channel pattern is not set"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSS_A) -> Self { + fn from(variant: Mss) -> Self { variant as u8 != 0 } } -impl MSS_R { +#[doc = "Field `MSS` reader - Multi-Channel Pattern update status"] +pub type MssR = crate::BitReader; +impl MssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSS_A { + pub const fn variant(&self) -> Mss { match self.bits { - false => MSS_A::VALUE1, - true => MSS_A::VALUE2, + false => Mss::Value1, + true => Mss::Value2, } } #[doc = "Update of the Multi-Channel pattern is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSS_A::VALUE1 + *self == Mss::Value1 } #[doc = "Update of the Multi-Channel pattern is not set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSS_A::VALUE2 + *self == Mss::Value2 } } impl R { #[doc = "Bit 0 - Multi-Channel Pattern update status"] #[inline(always)] - pub fn mss(&self) -> MSS_R { - MSS_R::new((self.bits & 1) != 0) + pub fn mss(&self) -> MssR { + MssR::new((self.bits & 1) != 0) } } #[doc = "Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCMF_SPEC; -impl crate::RegisterSpec for MCMF_SPEC { +pub struct McmfSpec; +impl crate::RegisterSpec for McmfSpec { type Ux = u32; } #[doc = "`read()` method returns [`mcmf::R`](R) reader structure"] -impl crate::Readable for MCMF_SPEC {} +impl crate::Readable for McmfSpec {} #[doc = "`reset()` method sets MCMF to value 0"] -impl crate::Resettable for MCMF_SPEC { +impl crate::Resettable for McmfSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcms.rs b/src/posif0/mcms.rs index d88ef593..d28f446e 100644 --- a/src/posif0/mcms.rs +++ b/src/posif0/mcms.rs @@ -1,52 +1,43 @@ #[doc = "Register `MCMS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MNPS` writer - Multi-Channel Pattern Update Enable Set"] -pub type MNPS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MnpsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STHR` writer - Hall Pattern Shadow Transfer Request"] -pub type STHR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SthrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STMR` writer - Multi-Channel Shadow Transfer Request"] -pub type STMR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StmrW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Set"] #[inline(always)] #[must_use] - pub fn mnps(&mut self) -> MNPS_W { - MNPS_W::new(self, 0) + pub fn mnps(&mut self) -> MnpsW { + MnpsW::new(self, 0) } #[doc = "Bit 1 - Hall Pattern Shadow Transfer Request"] #[inline(always)] #[must_use] - pub fn sthr(&mut self) -> STHR_W { - STHR_W::new(self, 1) + pub fn sthr(&mut self) -> SthrW { + SthrW::new(self, 1) } #[doc = "Bit 2 - Multi-Channel Shadow Transfer Request"] #[inline(always)] #[must_use] - pub fn stmr(&mut self) -> STMR_W { - STMR_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn stmr(&mut self) -> StmrW { + StmrW::new(self, 2) } } #[doc = "Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCMS_SPEC; -impl crate::RegisterSpec for MCMS_SPEC { +pub struct McmsSpec; +impl crate::RegisterSpec for McmsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mcms::W`](W) writer structure"] -impl crate::Writable for MCMS_SPEC { +impl crate::Writable for McmsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCMS to value 0"] -impl crate::Resettable for MCMS_SPEC { +impl crate::Resettable for McmsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcsm.rs b/src/posif0/mcsm.rs index 50fdc9ae..14eab5e5 100644 --- a/src/posif0/mcsm.rs +++ b/src/posif0/mcsm.rs @@ -1,49 +1,40 @@ #[doc = "Register `MCSM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCSM` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MCMPS` reader - Shadow Multi-Channel Pattern"] -pub type MCMPS_R = crate::FieldReader; +pub type McmpsR = crate::FieldReader; #[doc = "Field `MCMPS` writer - Shadow Multi-Channel Pattern"] -pub type MCMPS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type McmpsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"] #[inline(always)] - pub fn mcmps(&self) -> MCMPS_R { - MCMPS_R::new((self.bits & 0xffff) as u16) + pub fn mcmps(&self) -> McmpsR { + McmpsR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"] #[inline(always)] #[must_use] - pub fn mcmps(&mut self) -> MCMPS_W { - MCMPS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mcmps(&mut self) -> McmpsW { + McmpsW::new(self, 0) } } #[doc = "Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCSM_SPEC; -impl crate::RegisterSpec for MCSM_SPEC { +pub struct McsmSpec; +impl crate::RegisterSpec for McsmSpec { type Ux = u32; } #[doc = "`read()` method returns [`mcsm::R`](R) reader structure"] -impl crate::Readable for MCSM_SPEC {} +impl crate::Readable for McsmSpec {} #[doc = "`write(|w| ..)` method takes [`mcsm::W`](W) writer structure"] -impl crate::Writable for MCSM_SPEC { +impl crate::Writable for McsmSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCSM to value 0"] -impl crate::Resettable for MCSM_SPEC { +impl crate::Resettable for McsmSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/midr.rs b/src/posif0/midr.rs index d2428440..09d08128 100644 --- a/src/posif0/midr.rs +++ b/src/posif0/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type MODR_R = crate::FieldReader; +pub type ModrR = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type MODT_R = crate::FieldReader; +pub type ModtR = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type MODN_R = crate::FieldReader; +pub type ModnR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> MODR_R { - MODR_R::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> ModrR { + ModrR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> MODT_R { - MODT_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> ModtR { + ModtR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> MODN_R { - MODN_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> ModnR { + ModnR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MIDR_SPEC; -impl crate::RegisterSpec for MIDR_SPEC { +pub struct MidrSpec; +impl crate::RegisterSpec for MidrSpec { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MIDR_SPEC {} +impl crate::Readable for MidrSpec {} #[doc = "`reset()` method sets MIDR to value 0x00a8_c000"] -impl crate::Resettable for MIDR_SPEC { +impl crate::Resettable for MidrSpec { const RESET_VALUE: u32 = 0x00a8_c000; } diff --git a/src/posif0/pconf.rs b/src/posif0/pconf.rs index e997656b..1ace3c62 100644 --- a/src/posif0/pconf.rs +++ b/src/posif0/pconf.rs @@ -1,67 +1,67 @@ #[doc = "Register `PCONF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCONF` writer"] -pub type W = crate::W; -#[doc = "Field `FSEL` reader - Function Selector"] -pub type FSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FSEL_A { +pub enum Fsel { #[doc = "0: Hall Sensor Mode enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Decoder Mode enabled"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: stand-alone Multi-Channel Mode enabled"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FSEL_A) -> Self { + fn from(variant: Fsel) -> Self { variant as _ } } -impl crate::FieldSpec for FSEL_A { +impl crate::FieldSpec for Fsel { type Ux = u8; } -impl FSEL_R { +#[doc = "Field `FSEL` reader - Function Selector"] +pub type FselR = crate::FieldReader; +impl FselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FSEL_A { + pub const fn variant(&self) -> Fsel { match self.bits { - 0 => FSEL_A::VALUE1, - 1 => FSEL_A::VALUE2, - 2 => FSEL_A::VALUE3, - 3 => FSEL_A::VALUE4, + 0 => Fsel::Value1, + 1 => Fsel::Value2, + 2 => Fsel::Value3, + 3 => Fsel::Value4, _ => unreachable!(), } } #[doc = "Hall Sensor Mode enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FSEL_A::VALUE1 + *self == Fsel::Value1 } #[doc = "Quadrature Decoder Mode enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FSEL_A::VALUE2 + *self == Fsel::Value2 } #[doc = "stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FSEL_A::VALUE3 + *self == Fsel::Value3 } #[doc = "Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FSEL_A::VALUE4 + *self == Fsel::Value4 } } #[doc = "Field `FSEL` writer - Function Selector"] -pub type FSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FSEL_A>; -impl<'a, REG> FSEL_W<'a, REG> +pub type FselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Fsel>; +impl<'a, REG> FselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,194 +69,194 @@ where #[doc = "Hall Sensor Mode enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FSEL_A::VALUE1) + self.variant(Fsel::Value1) } #[doc = "Quadrature Decoder Mode enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FSEL_A::VALUE2) + self.variant(Fsel::Value2) } #[doc = "stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FSEL_A::VALUE3) + self.variant(Fsel::Value3) } #[doc = "Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FSEL_A::VALUE4) + self.variant(Fsel::Value4) } } -#[doc = "Field `QDCM` reader - Position Decoder Mode selection"] -pub type QDCM_R = crate::BitReader; #[doc = "Position Decoder Mode selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum QDCM_A { +pub enum Qdcm { #[doc = "0: Position encoder is in Quadrature Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Position encoder is in Direction Count Mode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: QDCM_A) -> Self { + fn from(variant: Qdcm) -> Self { variant as u8 != 0 } } -impl QDCM_R { +#[doc = "Field `QDCM` reader - Position Decoder Mode selection"] +pub type QdcmR = crate::BitReader; +impl QdcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> QDCM_A { + pub const fn variant(&self) -> Qdcm { match self.bits { - false => QDCM_A::VALUE1, - true => QDCM_A::VALUE2, + false => Qdcm::Value1, + true => Qdcm::Value2, } } #[doc = "Position encoder is in Quadrature Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == QDCM_A::VALUE1 + *self == Qdcm::Value1 } #[doc = "Position encoder is in Direction Count Mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == QDCM_A::VALUE2 + *self == Qdcm::Value2 } } #[doc = "Field `QDCM` writer - Position Decoder Mode selection"] -pub type QDCM_W<'a, REG> = crate::BitWriter<'a, REG, QDCM_A>; -impl<'a, REG> QDCM_W<'a, REG> +pub type QdcmW<'a, REG> = crate::BitWriter<'a, REG, Qdcm>; +impl<'a, REG> QdcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Position encoder is in Quadrature Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(QDCM_A::VALUE1) + self.variant(Qdcm::Value1) } #[doc = "Position encoder is in Direction Count Mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(QDCM_A::VALUE2) + self.variant(Qdcm::Value2) } } #[doc = "Field `HIDG` reader - Idle generation enable"] -pub type HIDG_R = crate::BitReader; +pub type HidgR = crate::BitReader; #[doc = "Field `HIDG` writer - Idle generation enable"] -pub type HIDG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `MCUE` reader - Multi-Channel Pattern SW update enable"] -pub type MCUE_R = crate::BitReader; +pub type HidgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Multi-Channel Pattern SW update enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCUE_A { +pub enum Mcue { #[doc = "0: Multi-Channel pattern update is controlled via HW"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multi-Channel pattern update is controlled via SW"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCUE_A) -> Self { + fn from(variant: Mcue) -> Self { variant as u8 != 0 } } -impl MCUE_R { +#[doc = "Field `MCUE` reader - Multi-Channel Pattern SW update enable"] +pub type McueR = crate::BitReader; +impl McueR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCUE_A { + pub const fn variant(&self) -> Mcue { match self.bits { - false => MCUE_A::VALUE1, - true => MCUE_A::VALUE2, + false => Mcue::Value1, + true => Mcue::Value2, } } #[doc = "Multi-Channel pattern update is controlled via HW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCUE_A::VALUE1 + *self == Mcue::Value1 } #[doc = "Multi-Channel pattern update is controlled via SW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCUE_A::VALUE2 + *self == Mcue::Value2 } } #[doc = "Field `MCUE` writer - Multi-Channel Pattern SW update enable"] -pub type MCUE_W<'a, REG> = crate::BitWriter<'a, REG, MCUE_A>; -impl<'a, REG> MCUE_W<'a, REG> +pub type McueW<'a, REG> = crate::BitWriter<'a, REG, Mcue>; +impl<'a, REG> McueW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi-Channel pattern update is controlled via HW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCUE_A::VALUE1) + self.variant(Mcue::Value1) } #[doc = "Multi-Channel pattern update is controlled via SW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCUE_A::VALUE2) + self.variant(Mcue::Value2) } } -#[doc = "Field `INSEL0` reader - PhaseA/Hal input 1 selector"] -pub type INSEL0_R = crate::FieldReader; #[doc = "PhaseA/Hal input 1 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL0_A { +pub enum Insel0 { #[doc = "0: POSIFx.IN0A"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.IN0B"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.IN0C"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.IN0D"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL0_A) -> Self { + fn from(variant: Insel0) -> Self { variant as _ } } -impl crate::FieldSpec for INSEL0_A { +impl crate::FieldSpec for Insel0 { type Ux = u8; } -impl INSEL0_R { +#[doc = "Field `INSEL0` reader - PhaseA/Hal input 1 selector"] +pub type Insel0R = crate::FieldReader; +impl Insel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSEL0_A { + pub const fn variant(&self) -> Insel0 { match self.bits { - 0 => INSEL0_A::VALUE1, - 1 => INSEL0_A::VALUE2, - 2 => INSEL0_A::VALUE3, - 3 => INSEL0_A::VALUE4, + 0 => Insel0::Value1, + 1 => Insel0::Value2, + 2 => Insel0::Value3, + 3 => Insel0::Value4, _ => unreachable!(), } } #[doc = "POSIFx.IN0A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSEL0_A::VALUE1 + *self == Insel0::Value1 } #[doc = "POSIFx.IN0B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSEL0_A::VALUE2 + *self == Insel0::Value2 } #[doc = "POSIFx.IN0C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == INSEL0_A::VALUE3 + *self == Insel0::Value3 } #[doc = "POSIFx.IN0D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == INSEL0_A::VALUE4 + *self == Insel0::Value4 } } #[doc = "Field `INSEL0` writer - PhaseA/Hal input 1 selector"] -pub type INSEL0_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, INSEL0_A>; -impl<'a, REG> INSEL0_W<'a, REG> +pub type Insel0W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Insel0>; +impl<'a, REG> Insel0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -264,84 +264,84 @@ where #[doc = "POSIFx.IN0A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSEL0_A::VALUE1) + self.variant(Insel0::Value1) } #[doc = "POSIFx.IN0B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSEL0_A::VALUE2) + self.variant(Insel0::Value2) } #[doc = "POSIFx.IN0C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(INSEL0_A::VALUE3) + self.variant(Insel0::Value3) } #[doc = "POSIFx.IN0D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(INSEL0_A::VALUE4) + self.variant(Insel0::Value4) } } -#[doc = "Field `INSEL1` reader - PhaseB/Hall input 2 selector"] -pub type INSEL1_R = crate::FieldReader; #[doc = "PhaseB/Hall input 2 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL1_A { +pub enum Insel1 { #[doc = "0: POSIFx.IN1A"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.IN1B"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.IN1C"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.IN1D"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL1_A) -> Self { + fn from(variant: Insel1) -> Self { variant as _ } } -impl crate::FieldSpec for INSEL1_A { +impl crate::FieldSpec for Insel1 { type Ux = u8; } -impl INSEL1_R { +#[doc = "Field `INSEL1` reader - PhaseB/Hall input 2 selector"] +pub type Insel1R = crate::FieldReader; +impl Insel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSEL1_A { + pub const fn variant(&self) -> Insel1 { match self.bits { - 0 => INSEL1_A::VALUE1, - 1 => INSEL1_A::VALUE2, - 2 => INSEL1_A::VALUE3, - 3 => INSEL1_A::VALUE4, + 0 => Insel1::Value1, + 1 => Insel1::Value2, + 2 => Insel1::Value3, + 3 => Insel1::Value4, _ => unreachable!(), } } #[doc = "POSIFx.IN1A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSEL1_A::VALUE1 + *self == Insel1::Value1 } #[doc = "POSIFx.IN1B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSEL1_A::VALUE2 + *self == Insel1::Value2 } #[doc = "POSIFx.IN1C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == INSEL1_A::VALUE3 + *self == Insel1::Value3 } #[doc = "POSIFx.IN1D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == INSEL1_A::VALUE4 + *self == Insel1::Value4 } } #[doc = "Field `INSEL1` writer - PhaseB/Hall input 2 selector"] -pub type INSEL1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, INSEL1_A>; -impl<'a, REG> INSEL1_W<'a, REG> +pub type Insel1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Insel1>; +impl<'a, REG> Insel1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -349,84 +349,84 @@ where #[doc = "POSIFx.IN1A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSEL1_A::VALUE1) + self.variant(Insel1::Value1) } #[doc = "POSIFx.IN1B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSEL1_A::VALUE2) + self.variant(Insel1::Value2) } #[doc = "POSIFx.IN1C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(INSEL1_A::VALUE3) + self.variant(Insel1::Value3) } #[doc = "POSIFx.IN1D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(INSEL1_A::VALUE4) + self.variant(Insel1::Value4) } } -#[doc = "Field `INSEL2` reader - Index/Hall input 3 selector"] -pub type INSEL2_R = crate::FieldReader; #[doc = "Index/Hall input 3 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum INSEL2_A { +pub enum Insel2 { #[doc = "0: POSIFx.IN2A"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.IN2B"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.IN2C"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.IN2D"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: INSEL2_A) -> Self { + fn from(variant: Insel2) -> Self { variant as _ } } -impl crate::FieldSpec for INSEL2_A { +impl crate::FieldSpec for Insel2 { type Ux = u8; } -impl INSEL2_R { +#[doc = "Field `INSEL2` reader - Index/Hall input 3 selector"] +pub type Insel2R = crate::FieldReader; +impl Insel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSEL2_A { + pub const fn variant(&self) -> Insel2 { match self.bits { - 0 => INSEL2_A::VALUE1, - 1 => INSEL2_A::VALUE2, - 2 => INSEL2_A::VALUE3, - 3 => INSEL2_A::VALUE4, + 0 => Insel2::Value1, + 1 => Insel2::Value2, + 2 => Insel2::Value3, + 3 => Insel2::Value4, _ => unreachable!(), } } #[doc = "POSIFx.IN2A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSEL2_A::VALUE1 + *self == Insel2::Value1 } #[doc = "POSIFx.IN2B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSEL2_A::VALUE2 + *self == Insel2::Value2 } #[doc = "POSIFx.IN2C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == INSEL2_A::VALUE3 + *self == Insel2::Value3 } #[doc = "POSIFx.IN2D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == INSEL2_A::VALUE4 + *self == Insel2::Value4 } } #[doc = "Field `INSEL2` writer - Index/Hall input 3 selector"] -pub type INSEL2_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, INSEL2_A>; -impl<'a, REG> INSEL2_W<'a, REG> +pub type Insel2W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Insel2>; +impl<'a, REG> Insel2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -434,222 +434,222 @@ where #[doc = "POSIFx.IN2A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSEL2_A::VALUE1) + self.variant(Insel2::Value1) } #[doc = "POSIFx.IN2B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSEL2_A::VALUE2) + self.variant(Insel2::Value2) } #[doc = "POSIFx.IN2C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(INSEL2_A::VALUE3) + self.variant(Insel2::Value3) } #[doc = "POSIFx.IN2D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(INSEL2_A::VALUE4) + self.variant(Insel2::Value4) } } -#[doc = "Field `DSEL` reader - Delay Pin selector"] -pub type DSEL_R = crate::BitReader; #[doc = "Delay Pin selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: POSIFx.HSDA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.HSDB"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as u8 != 0 } } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Delay Pin selector"] +pub type DselR = crate::BitReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - false => DSEL_A::VALUE1, - true => DSEL_A::VALUE2, + false => Dsel::Value1, + true => Dsel::Value2, } } #[doc = "POSIFx.HSDA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "POSIFx.HSDB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } } #[doc = "Field `DSEL` writer - Delay Pin selector"] -pub type DSEL_W<'a, REG> = crate::BitWriter<'a, REG, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::BitWriter<'a, REG, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "POSIFx.HSDA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "POSIFx.HSDB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } } -#[doc = "Field `SPES` reader - Edge selector for the sampling trigger"] -pub type SPES_R = crate::BitReader; #[doc = "Edge selector for the sampling trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SPES_A { +pub enum Spes { #[doc = "0: Rising edge"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Falling edge"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SPES_A) -> Self { + fn from(variant: Spes) -> Self { variant as u8 != 0 } } -impl SPES_R { +#[doc = "Field `SPES` reader - Edge selector for the sampling trigger"] +pub type SpesR = crate::BitReader; +impl SpesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SPES_A { + pub const fn variant(&self) -> Spes { match self.bits { - false => SPES_A::VALUE1, - true => SPES_A::VALUE2, + false => Spes::Value1, + true => Spes::Value2, } } #[doc = "Rising edge"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SPES_A::VALUE1 + *self == Spes::Value1 } #[doc = "Falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SPES_A::VALUE2 + *self == Spes::Value2 } } #[doc = "Field `SPES` writer - Edge selector for the sampling trigger"] -pub type SPES_W<'a, REG> = crate::BitWriter<'a, REG, SPES_A>; -impl<'a, REG> SPES_W<'a, REG> +pub type SpesW<'a, REG> = crate::BitWriter<'a, REG, Spes>; +impl<'a, REG> SpesW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Rising edge"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SPES_A::VALUE1) + self.variant(Spes::Value1) } #[doc = "Falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SPES_A::VALUE2) + self.variant(Spes::Value2) } } -#[doc = "Field `MSETS` reader - Pattern update signal select"] -pub type MSETS_R = crate::FieldReader; #[doc = "Pattern update signal select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MSETS_A { +pub enum Msets { #[doc = "0: POSIFx.MSETA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.MSETB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.MSETC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.MSETD"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: POSIFx.MSETE"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: POSIFx.MSETF"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: POSIFx.MSETG"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: POSIFx.MSETH"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MSETS_A) -> Self { + fn from(variant: Msets) -> Self { variant as _ } } -impl crate::FieldSpec for MSETS_A { +impl crate::FieldSpec for Msets { type Ux = u8; } -impl MSETS_R { +#[doc = "Field `MSETS` reader - Pattern update signal select"] +pub type MsetsR = crate::FieldReader; +impl MsetsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSETS_A { + pub const fn variant(&self) -> Msets { match self.bits { - 0 => MSETS_A::VALUE1, - 1 => MSETS_A::VALUE2, - 2 => MSETS_A::VALUE3, - 3 => MSETS_A::VALUE4, - 4 => MSETS_A::VALUE5, - 5 => MSETS_A::VALUE6, - 6 => MSETS_A::VALUE7, - 7 => MSETS_A::VALUE8, + 0 => Msets::Value1, + 1 => Msets::Value2, + 2 => Msets::Value3, + 3 => Msets::Value4, + 4 => Msets::Value5, + 5 => Msets::Value6, + 6 => Msets::Value7, + 7 => Msets::Value8, _ => unreachable!(), } } #[doc = "POSIFx.MSETA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSETS_A::VALUE1 + *self == Msets::Value1 } #[doc = "POSIFx.MSETB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSETS_A::VALUE2 + *self == Msets::Value2 } #[doc = "POSIFx.MSETC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MSETS_A::VALUE3 + *self == Msets::Value3 } #[doc = "POSIFx.MSETD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MSETS_A::VALUE4 + *self == Msets::Value4 } #[doc = "POSIFx.MSETE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == MSETS_A::VALUE5 + *self == Msets::Value5 } #[doc = "POSIFx.MSETF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == MSETS_A::VALUE6 + *self == Msets::Value6 } #[doc = "POSIFx.MSETG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == MSETS_A::VALUE7 + *self == Msets::Value7 } #[doc = "POSIFx.MSETH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == MSETS_A::VALUE8 + *self == Msets::Value8 } } #[doc = "Field `MSETS` writer - Pattern update signal select"] -pub type MSETS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, MSETS_A>; -impl<'a, REG> MSETS_W<'a, REG> +pub type MsetsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Msets>; +impl<'a, REG> MsetsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -657,157 +657,157 @@ where #[doc = "POSIFx.MSETA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE1) + self.variant(Msets::Value1) } #[doc = "POSIFx.MSETB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE2) + self.variant(Msets::Value2) } #[doc = "POSIFx.MSETC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE3) + self.variant(Msets::Value3) } #[doc = "POSIFx.MSETD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE4) + self.variant(Msets::Value4) } #[doc = "POSIFx.MSETE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE5) + self.variant(Msets::Value5) } #[doc = "POSIFx.MSETF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE6) + self.variant(Msets::Value6) } #[doc = "POSIFx.MSETG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE7) + self.variant(Msets::Value7) } #[doc = "POSIFx.MSETH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(MSETS_A::VALUE8) + self.variant(Msets::Value8) } } -#[doc = "Field `MSES` reader - Multi-Channel pattern update trigger edge"] -pub type MSES_R = crate::BitReader; #[doc = "Multi-Channel pattern update trigger edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSES_A { +pub enum Mses { #[doc = "0: The signal used to enable a pattern update is active on the rising edge"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The signal used to enable a pattern update is active on the falling edge"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSES_A) -> Self { + fn from(variant: Mses) -> Self { variant as u8 != 0 } } -impl MSES_R { +#[doc = "Field `MSES` reader - Multi-Channel pattern update trigger edge"] +pub type MsesR = crate::BitReader; +impl MsesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSES_A { + pub const fn variant(&self) -> Mses { match self.bits { - false => MSES_A::VALUE1, - true => MSES_A::VALUE2, + false => Mses::Value1, + true => Mses::Value2, } } #[doc = "The signal used to enable a pattern update is active on the rising edge"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSES_A::VALUE1 + *self == Mses::Value1 } #[doc = "The signal used to enable a pattern update is active on the falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSES_A::VALUE2 + *self == Mses::Value2 } } #[doc = "Field `MSES` writer - Multi-Channel pattern update trigger edge"] -pub type MSES_W<'a, REG> = crate::BitWriter<'a, REG, MSES_A>; -impl<'a, REG> MSES_W<'a, REG> +pub type MsesW<'a, REG> = crate::BitWriter<'a, REG, Mses>; +impl<'a, REG> MsesW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The signal used to enable a pattern update is active on the rising edge"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSES_A::VALUE1) + self.variant(Mses::Value1) } #[doc = "The signal used to enable a pattern update is active on the falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSES_A::VALUE2) + self.variant(Mses::Value2) } } -#[doc = "Field `MSYNS` reader - PWM synchronization signal selector"] -pub type MSYNS_R = crate::FieldReader; #[doc = "PWM synchronization signal selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MSYNS_A { +pub enum Msyns { #[doc = "0: POSIFx.MSYNCA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.MSYNCB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.MSYNCC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.MSYNCD"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MSYNS_A) -> Self { + fn from(variant: Msyns) -> Self { variant as _ } } -impl crate::FieldSpec for MSYNS_A { +impl crate::FieldSpec for Msyns { type Ux = u8; } -impl MSYNS_R { +#[doc = "Field `MSYNS` reader - PWM synchronization signal selector"] +pub type MsynsR = crate::FieldReader; +impl MsynsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSYNS_A { + pub const fn variant(&self) -> Msyns { match self.bits { - 0 => MSYNS_A::VALUE1, - 1 => MSYNS_A::VALUE2, - 2 => MSYNS_A::VALUE3, - 3 => MSYNS_A::VALUE4, + 0 => Msyns::Value1, + 1 => Msyns::Value2, + 2 => Msyns::Value3, + 3 => Msyns::Value4, _ => unreachable!(), } } #[doc = "POSIFx.MSYNCA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSYNS_A::VALUE1 + *self == Msyns::Value1 } #[doc = "POSIFx.MSYNCB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSYNS_A::VALUE2 + *self == Msyns::Value2 } #[doc = "POSIFx.MSYNCC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MSYNS_A::VALUE3 + *self == Msyns::Value3 } #[doc = "POSIFx.MSYNCD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MSYNS_A::VALUE4 + *self == Msyns::Value4 } } #[doc = "Field `MSYNS` writer - PWM synchronization signal selector"] -pub type MSYNS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MSYNS_A>; -impl<'a, REG> MSYNS_W<'a, REG> +pub type MsynsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Msyns>; +impl<'a, REG> MsynsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -815,84 +815,84 @@ where #[doc = "POSIFx.MSYNCA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSYNS_A::VALUE1) + self.variant(Msyns::Value1) } #[doc = "POSIFx.MSYNCB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSYNS_A::VALUE2) + self.variant(Msyns::Value2) } #[doc = "POSIFx.MSYNCC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MSYNS_A::VALUE3) + self.variant(Msyns::Value3) } #[doc = "POSIFx.MSYNCD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MSYNS_A::VALUE4) + self.variant(Msyns::Value4) } } -#[doc = "Field `EWIS` reader - Wrong Hall Event selection"] -pub type EWIS_R = crate::FieldReader; #[doc = "Wrong Hall Event selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EWIS_A { +pub enum Ewis { #[doc = "0: POSIFx.EWHEA"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.EWHEB"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: POSIFx.EWHEC"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: POSIFx.EWHED"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EWIS_A) -> Self { + fn from(variant: Ewis) -> Self { variant as _ } } -impl crate::FieldSpec for EWIS_A { +impl crate::FieldSpec for Ewis { type Ux = u8; } -impl EWIS_R { +#[doc = "Field `EWIS` reader - Wrong Hall Event selection"] +pub type EwisR = crate::FieldReader; +impl EwisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EWIS_A { + pub const fn variant(&self) -> Ewis { match self.bits { - 0 => EWIS_A::VALUE1, - 1 => EWIS_A::VALUE2, - 2 => EWIS_A::VALUE3, - 3 => EWIS_A::VALUE4, + 0 => Ewis::Value1, + 1 => Ewis::Value2, + 2 => Ewis::Value3, + 3 => Ewis::Value4, _ => unreachable!(), } } #[doc = "POSIFx.EWHEA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EWIS_A::VALUE1 + *self == Ewis::Value1 } #[doc = "POSIFx.EWHEB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EWIS_A::VALUE2 + *self == Ewis::Value2 } #[doc = "POSIFx.EWHEC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EWIS_A::VALUE3 + *self == Ewis::Value3 } #[doc = "POSIFx.EWHED"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EWIS_A::VALUE4 + *self == Ewis::Value4 } } #[doc = "Field `EWIS` writer - Wrong Hall Event selection"] -pub type EWIS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EWIS_A>; -impl<'a, REG> EWIS_W<'a, REG> +pub type EwisW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ewis>; +impl<'a, REG> EwisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -900,120 +900,120 @@ where #[doc = "POSIFx.EWHEA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EWIS_A::VALUE1) + self.variant(Ewis::Value1) } #[doc = "POSIFx.EWHEB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EWIS_A::VALUE2) + self.variant(Ewis::Value2) } #[doc = "POSIFx.EWHEC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EWIS_A::VALUE3) + self.variant(Ewis::Value3) } #[doc = "POSIFx.EWHED"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EWIS_A::VALUE4) + self.variant(Ewis::Value4) } } -#[doc = "Field `EWIE` reader - External Wrong Hall Event enable"] -pub type EWIE_R = crate::BitReader; #[doc = "External Wrong Hall Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EWIE_A { +pub enum Ewie { #[doc = "0: External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EWIE_A) -> Self { + fn from(variant: Ewie) -> Self { variant as u8 != 0 } } -impl EWIE_R { +#[doc = "Field `EWIE` reader - External Wrong Hall Event enable"] +pub type EwieR = crate::BitReader; +impl EwieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EWIE_A { + pub const fn variant(&self) -> Ewie { match self.bits { - false => EWIE_A::VALUE1, - true => EWIE_A::VALUE2, + false => Ewie::Value1, + true => Ewie::Value2, } } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EWIE_A::VALUE1 + *self == Ewie::Value1 } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EWIE_A::VALUE2 + *self == Ewie::Value2 } } #[doc = "Field `EWIE` writer - External Wrong Hall Event enable"] -pub type EWIE_W<'a, REG> = crate::BitWriter<'a, REG, EWIE_A>; -impl<'a, REG> EWIE_W<'a, REG> +pub type EwieW<'a, REG> = crate::BitWriter<'a, REG, Ewie>; +impl<'a, REG> EwieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EWIE_A::VALUE1) + self.variant(Ewie::Value1) } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EWIE_A::VALUE2) + self.variant(Ewie::Value2) } } -#[doc = "Field `EWIL` reader - External Wrong Hall Event active level"] -pub type EWIL_R = crate::BitReader; #[doc = "External Wrong Hall Event active level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EWIL_A { +pub enum Ewil { #[doc = "0: POSIFx.EWHE\\[D...A\\] signal is active HIGH"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: POSIFx.EWHE\\[D...A\\] signal is active LOW"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EWIL_A) -> Self { + fn from(variant: Ewil) -> Self { variant as u8 != 0 } } -impl EWIL_R { +#[doc = "Field `EWIL` reader - External Wrong Hall Event active level"] +pub type EwilR = crate::BitReader; +impl EwilR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EWIL_A { + pub const fn variant(&self) -> Ewil { match self.bits { - false => EWIL_A::VALUE1, - true => EWIL_A::VALUE2, + false => Ewil::Value1, + true => Ewil::Value2, } } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EWIL_A::VALUE1 + *self == Ewil::Value1 } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EWIL_A::VALUE2 + *self == Ewil::Value2 } } #[doc = "Field `EWIL` writer - External Wrong Hall Event active level"] -pub type EWIL_W<'a, REG> = crate::BitWriter<'a, REG, EWIL_A>; -impl<'a, REG> EWIL_W<'a, REG> +pub type EwilW<'a, REG> = crate::BitWriter<'a, REG, Ewil>; +impl<'a, REG> EwilW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -1021,107 +1021,107 @@ where signal is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EWIL_A::VALUE1) + self.variant(Ewil::Value1) } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EWIL_A::VALUE2) + self.variant(Ewil::Value2) } } -#[doc = "Field `LPC` reader - Low Pass Filters Configuration"] -pub type LPC_R = crate::FieldReader; #[doc = "Low Pass Filters Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LPC_A { +pub enum Lpc { #[doc = "0: Low pass filter disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Low pass of 1 clock cycle"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Low pass of 2 clock cycles"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Low pass of 4 clock cycles"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Low pass of 8 clock cycles"] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Low pass of 16 clock cycles"] - VALUE6 = 5, + Value6 = 5, #[doc = "6: Low pass of 32 clock cycles"] - VALUE7 = 6, + Value7 = 6, #[doc = "7: Low pass of 64 clock cycles"] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LPC_A) -> Self { + fn from(variant: Lpc) -> Self { variant as _ } } -impl crate::FieldSpec for LPC_A { +impl crate::FieldSpec for Lpc { type Ux = u8; } -impl LPC_R { +#[doc = "Field `LPC` reader - Low Pass Filters Configuration"] +pub type LpcR = crate::FieldReader; +impl LpcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LPC_A { + pub const fn variant(&self) -> Lpc { match self.bits { - 0 => LPC_A::VALUE1, - 1 => LPC_A::VALUE2, - 2 => LPC_A::VALUE3, - 3 => LPC_A::VALUE4, - 4 => LPC_A::VALUE5, - 5 => LPC_A::VALUE6, - 6 => LPC_A::VALUE7, - 7 => LPC_A::VALUE8, + 0 => Lpc::Value1, + 1 => Lpc::Value2, + 2 => Lpc::Value3, + 3 => Lpc::Value4, + 4 => Lpc::Value5, + 5 => Lpc::Value6, + 6 => Lpc::Value7, + 7 => Lpc::Value8, _ => unreachable!(), } } #[doc = "Low pass filter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LPC_A::VALUE1 + *self == Lpc::Value1 } #[doc = "Low pass of 1 clock cycle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LPC_A::VALUE2 + *self == Lpc::Value2 } #[doc = "Low pass of 2 clock cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LPC_A::VALUE3 + *self == Lpc::Value3 } #[doc = "Low pass of 4 clock cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == LPC_A::VALUE4 + *self == Lpc::Value4 } #[doc = "Low pass of 8 clock cycles"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == LPC_A::VALUE5 + *self == Lpc::Value5 } #[doc = "Low pass of 16 clock cycles"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == LPC_A::VALUE6 + *self == Lpc::Value6 } #[doc = "Low pass of 32 clock cycles"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == LPC_A::VALUE7 + *self == Lpc::Value7 } #[doc = "Low pass of 64 clock cycles"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == LPC_A::VALUE8 + *self == Lpc::Value8 } } #[doc = "Field `LPC` writer - Low Pass Filters Configuration"] -pub type LPC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, LPC_A>; -impl<'a, REG> LPC_W<'a, REG> +pub type LpcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Lpc>; +impl<'a, REG> LpcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1129,247 +1129,238 @@ where #[doc = "Low pass filter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE1) + self.variant(Lpc::Value1) } #[doc = "Low pass of 1 clock cycle"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE2) + self.variant(Lpc::Value2) } #[doc = "Low pass of 2 clock cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE3) + self.variant(Lpc::Value3) } #[doc = "Low pass of 4 clock cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE4) + self.variant(Lpc::Value4) } #[doc = "Low pass of 8 clock cycles"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE5) + self.variant(Lpc::Value5) } #[doc = "Low pass of 16 clock cycles"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE6) + self.variant(Lpc::Value6) } #[doc = "Low pass of 32 clock cycles"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE7) + self.variant(Lpc::Value7) } #[doc = "Low pass of 64 clock cycles"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(LPC_A::VALUE8) + self.variant(Lpc::Value8) } } impl R { #[doc = "Bits 0:1 - Function Selector"] #[inline(always)] - pub fn fsel(&self) -> FSEL_R { - FSEL_R::new((self.bits & 3) as u8) + pub fn fsel(&self) -> FselR { + FselR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Position Decoder Mode selection"] #[inline(always)] - pub fn qdcm(&self) -> QDCM_R { - QDCM_R::new(((self.bits >> 2) & 1) != 0) + pub fn qdcm(&self) -> QdcmR { + QdcmR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Idle generation enable"] #[inline(always)] - pub fn hidg(&self) -> HIDG_R { - HIDG_R::new(((self.bits >> 4) & 1) != 0) + pub fn hidg(&self) -> HidgR { + HidgR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"] #[inline(always)] - pub fn mcue(&self) -> MCUE_R { - MCUE_R::new(((self.bits >> 5) & 1) != 0) + pub fn mcue(&self) -> McueR { + McueR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"] #[inline(always)] - pub fn insel0(&self) -> INSEL0_R { - INSEL0_R::new(((self.bits >> 8) & 3) as u8) + pub fn insel0(&self) -> Insel0R { + Insel0R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"] #[inline(always)] - pub fn insel1(&self) -> INSEL1_R { - INSEL1_R::new(((self.bits >> 10) & 3) as u8) + pub fn insel1(&self) -> Insel1R { + Insel1R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Index/Hall input 3 selector"] #[inline(always)] - pub fn insel2(&self) -> INSEL2_R { - INSEL2_R::new(((self.bits >> 12) & 3) as u8) + pub fn insel2(&self) -> Insel2R { + Insel2R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 16 - Delay Pin selector"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn dsel(&self) -> DselR { + DselR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Edge selector for the sampling trigger"] #[inline(always)] - pub fn spes(&self) -> SPES_R { - SPES_R::new(((self.bits >> 17) & 1) != 0) + pub fn spes(&self) -> SpesR { + SpesR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:20 - Pattern update signal select"] #[inline(always)] - pub fn msets(&self) -> MSETS_R { - MSETS_R::new(((self.bits >> 18) & 7) as u8) + pub fn msets(&self) -> MsetsR { + MsetsR::new(((self.bits >> 18) & 7) as u8) } #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"] #[inline(always)] - pub fn mses(&self) -> MSES_R { - MSES_R::new(((self.bits >> 21) & 1) != 0) + pub fn mses(&self) -> MsesR { + MsesR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:23 - PWM synchronization signal selector"] #[inline(always)] - pub fn msyns(&self) -> MSYNS_R { - MSYNS_R::new(((self.bits >> 22) & 3) as u8) + pub fn msyns(&self) -> MsynsR { + MsynsR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Wrong Hall Event selection"] #[inline(always)] - pub fn ewis(&self) -> EWIS_R { - EWIS_R::new(((self.bits >> 24) & 3) as u8) + pub fn ewis(&self) -> EwisR { + EwisR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - External Wrong Hall Event enable"] #[inline(always)] - pub fn ewie(&self) -> EWIE_R { - EWIE_R::new(((self.bits >> 26) & 1) != 0) + pub fn ewie(&self) -> EwieR { + EwieR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - External Wrong Hall Event active level"] #[inline(always)] - pub fn ewil(&self) -> EWIL_R { - EWIL_R::new(((self.bits >> 27) & 1) != 0) + pub fn ewil(&self) -> EwilR { + EwilR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - Low Pass Filters Configuration"] #[inline(always)] - pub fn lpc(&self) -> LPC_R { - LPC_R::new(((self.bits >> 28) & 7) as u8) + pub fn lpc(&self) -> LpcR { + LpcR::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:1 - Function Selector"] #[inline(always)] #[must_use] - pub fn fsel(&mut self) -> FSEL_W { - FSEL_W::new(self, 0) + pub fn fsel(&mut self) -> FselW { + FselW::new(self, 0) } #[doc = "Bit 2 - Position Decoder Mode selection"] #[inline(always)] #[must_use] - pub fn qdcm(&mut self) -> QDCM_W { - QDCM_W::new(self, 2) + pub fn qdcm(&mut self) -> QdcmW { + QdcmW::new(self, 2) } #[doc = "Bit 4 - Idle generation enable"] #[inline(always)] #[must_use] - pub fn hidg(&mut self) -> HIDG_W { - HIDG_W::new(self, 4) + pub fn hidg(&mut self) -> HidgW { + HidgW::new(self, 4) } #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"] #[inline(always)] #[must_use] - pub fn mcue(&mut self) -> MCUE_W { - MCUE_W::new(self, 5) + pub fn mcue(&mut self) -> McueW { + McueW::new(self, 5) } #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"] #[inline(always)] #[must_use] - pub fn insel0(&mut self) -> INSEL0_W { - INSEL0_W::new(self, 8) + pub fn insel0(&mut self) -> Insel0W { + Insel0W::new(self, 8) } #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"] #[inline(always)] #[must_use] - pub fn insel1(&mut self) -> INSEL1_W { - INSEL1_W::new(self, 10) + pub fn insel1(&mut self) -> Insel1W { + Insel1W::new(self, 10) } #[doc = "Bits 12:13 - Index/Hall input 3 selector"] #[inline(always)] #[must_use] - pub fn insel2(&mut self) -> INSEL2_W { - INSEL2_W::new(self, 12) + pub fn insel2(&mut self) -> Insel2W { + Insel2W::new(self, 12) } #[doc = "Bit 16 - Delay Pin selector"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 16) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 16) } #[doc = "Bit 17 - Edge selector for the sampling trigger"] #[inline(always)] #[must_use] - pub fn spes(&mut self) -> SPES_W { - SPES_W::new(self, 17) + pub fn spes(&mut self) -> SpesW { + SpesW::new(self, 17) } #[doc = "Bits 18:20 - Pattern update signal select"] #[inline(always)] #[must_use] - pub fn msets(&mut self) -> MSETS_W { - MSETS_W::new(self, 18) + pub fn msets(&mut self) -> MsetsW { + MsetsW::new(self, 18) } #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"] #[inline(always)] #[must_use] - pub fn mses(&mut self) -> MSES_W { - MSES_W::new(self, 21) + pub fn mses(&mut self) -> MsesW { + MsesW::new(self, 21) } #[doc = "Bits 22:23 - PWM synchronization signal selector"] #[inline(always)] #[must_use] - pub fn msyns(&mut self) -> MSYNS_W { - MSYNS_W::new(self, 22) + pub fn msyns(&mut self) -> MsynsW { + MsynsW::new(self, 22) } #[doc = "Bits 24:25 - Wrong Hall Event selection"] #[inline(always)] #[must_use] - pub fn ewis(&mut self) -> EWIS_W { - EWIS_W::new(self, 24) + pub fn ewis(&mut self) -> EwisW { + EwisW::new(self, 24) } #[doc = "Bit 26 - External Wrong Hall Event enable"] #[inline(always)] #[must_use] - pub fn ewie(&mut self) -> EWIE_W { - EWIE_W::new(self, 26) + pub fn ewie(&mut self) -> EwieW { + EwieW::new(self, 26) } #[doc = "Bit 27 - External Wrong Hall Event active level"] #[inline(always)] #[must_use] - pub fn ewil(&mut self) -> EWIL_W { - EWIL_W::new(self, 27) + pub fn ewil(&mut self) -> EwilW { + EwilW::new(self, 27) } #[doc = "Bits 28:30 - Low Pass Filters Configuration"] #[inline(always)] #[must_use] - pub fn lpc(&mut self) -> LPC_W { - LPC_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn lpc(&mut self) -> LpcW { + LpcW::new(self, 28) } } #[doc = "POSIF configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCONF_SPEC; -impl crate::RegisterSpec for PCONF_SPEC { +pub struct PconfSpec; +impl crate::RegisterSpec for PconfSpec { type Ux = u32; } #[doc = "`read()` method returns [`pconf::R`](R) reader structure"] -impl crate::Readable for PCONF_SPEC {} +impl crate::Readable for PconfSpec {} #[doc = "`write(|w| ..)` method takes [`pconf::W`](W) writer structure"] -impl crate::Writable for PCONF_SPEC { +impl crate::Writable for PconfSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCONF to value 0"] -impl crate::Resettable for PCONF_SPEC { +impl crate::Resettable for PconfSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pdbg.rs b/src/posif0/pdbg.rs index bd25b8a1..b9863ba9 100644 --- a/src/posif0/pdbg.rs +++ b/src/posif0/pdbg.rs @@ -1,64 +1,64 @@ #[doc = "Register `PDBG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `QCSV` reader - Quadrature Decoder Current state"] -pub type QCSV_R = crate::FieldReader; +pub type QcsvR = crate::FieldReader; #[doc = "Field `QPSV` reader - Quadrature Decoder Previous state"] -pub type QPSV_R = crate::FieldReader; +pub type QpsvR = crate::FieldReader; #[doc = "Field `IVAL` reader - Current Index Value"] -pub type IVAL_R = crate::BitReader; +pub type IvalR = crate::BitReader; #[doc = "Field `HSP` reader - Hall Current Sampled Pattern"] -pub type HSP_R = crate::FieldReader; +pub type HspR = crate::FieldReader; #[doc = "Field `LPP0` reader - Actual count of the Low Pass Filter for POSI0"] -pub type LPP0_R = crate::FieldReader; +pub type Lpp0R = crate::FieldReader; #[doc = "Field `LPP1` reader - Actual count of the Low Pass Filter for POSI1"] -pub type LPP1_R = crate::FieldReader; +pub type Lpp1R = crate::FieldReader; #[doc = "Field `LPP2` reader - Actual count of the Low Pass Filter for POSI2"] -pub type LPP2_R = crate::FieldReader; +pub type Lpp2R = crate::FieldReader; impl R { #[doc = "Bits 0:1 - Quadrature Decoder Current state"] #[inline(always)] - pub fn qcsv(&self) -> QCSV_R { - QCSV_R::new((self.bits & 3) as u8) + pub fn qcsv(&self) -> QcsvR { + QcsvR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Quadrature Decoder Previous state"] #[inline(always)] - pub fn qpsv(&self) -> QPSV_R { - QPSV_R::new(((self.bits >> 2) & 3) as u8) + pub fn qpsv(&self) -> QpsvR { + QpsvR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Current Index Value"] #[inline(always)] - pub fn ival(&self) -> IVAL_R { - IVAL_R::new(((self.bits >> 4) & 1) != 0) + pub fn ival(&self) -> IvalR { + IvalR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Hall Current Sampled Pattern"] #[inline(always)] - pub fn hsp(&self) -> HSP_R { - HSP_R::new(((self.bits >> 5) & 7) as u8) + pub fn hsp(&self) -> HspR { + HspR::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bits 8:13 - Actual count of the Low Pass Filter for POSI0"] #[inline(always)] - pub fn lpp0(&self) -> LPP0_R { - LPP0_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn lpp0(&self) -> Lpp0R { + Lpp0R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:21 - Actual count of the Low Pass Filter for POSI1"] #[inline(always)] - pub fn lpp1(&self) -> LPP1_R { - LPP1_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn lpp1(&self) -> Lpp1R { + Lpp1R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 22:27 - Actual count of the Low Pass Filter for POSI2"] #[inline(always)] - pub fn lpp2(&self) -> LPP2_R { - LPP2_R::new(((self.bits >> 22) & 0x3f) as u8) + pub fn lpp2(&self) -> Lpp2R { + Lpp2R::new(((self.bits >> 22) & 0x3f) as u8) } } #[doc = "POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PDBG_SPEC; -impl crate::RegisterSpec for PDBG_SPEC { +pub struct PdbgSpec; +impl crate::RegisterSpec for PdbgSpec { type Ux = u32; } #[doc = "`read()` method returns [`pdbg::R`](R) reader structure"] -impl crate::Readable for PDBG_SPEC {} +impl crate::Readable for PdbgSpec {} #[doc = "`reset()` method sets PDBG to value 0"] -impl crate::Resettable for PDBG_SPEC { +impl crate::Resettable for PdbgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pflg.rs b/src/posif0/pflg.rs index efda53de..48d409b0 100644 --- a/src/posif0/pflg.rs +++ b/src/posif0/pflg.rs @@ -1,384 +1,384 @@ #[doc = "Register `PFLG` reader"] -pub type R = crate::R; -#[doc = "Field `CHES` reader - Correct Hall Event Status"] -pub type CHES_R = crate::BitReader; +pub type R = crate::R; #[doc = "Correct Hall Event Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHES_A { +pub enum Ches { #[doc = "0: Correct Hall Event not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Correct Hall Event detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHES_A) -> Self { + fn from(variant: Ches) -> Self { variant as u8 != 0 } } -impl CHES_R { +#[doc = "Field `CHES` reader - Correct Hall Event Status"] +pub type ChesR = crate::BitReader; +impl ChesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHES_A { + pub const fn variant(&self) -> Ches { match self.bits { - false => CHES_A::VALUE1, - true => CHES_A::VALUE2, + false => Ches::Value1, + true => Ches::Value2, } } #[doc = "Correct Hall Event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHES_A::VALUE1 + *self == Ches::Value1 } #[doc = "Correct Hall Event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHES_A::VALUE2 + *self == Ches::Value2 } } -#[doc = "Field `WHES` reader - Wrong Hall Event Status"] -pub type WHES_R = crate::BitReader; #[doc = "Wrong Hall Event Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WHES_A { +pub enum Whes { #[doc = "0: Wrong Hall Event not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wrong Hall Event detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WHES_A) -> Self { + fn from(variant: Whes) -> Self { variant as u8 != 0 } } -impl WHES_R { +#[doc = "Field `WHES` reader - Wrong Hall Event Status"] +pub type WhesR = crate::BitReader; +impl WhesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WHES_A { + pub const fn variant(&self) -> Whes { match self.bits { - false => WHES_A::VALUE1, - true => WHES_A::VALUE2, + false => Whes::Value1, + true => Whes::Value2, } } #[doc = "Wrong Hall Event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WHES_A::VALUE1 + *self == Whes::Value1 } #[doc = "Wrong Hall Event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WHES_A::VALUE2 + *self == Whes::Value2 } } -#[doc = "Field `HIES` reader - Hall Inputs Update Status"] -pub type HIES_R = crate::BitReader; #[doc = "Hall Inputs Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIES_A { +pub enum Hies { #[doc = "0: Transition on the Hall Inputs not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transition on the Hall Inputs detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIES_A) -> Self { + fn from(variant: Hies) -> Self { variant as u8 != 0 } } -impl HIES_R { +#[doc = "Field `HIES` reader - Hall Inputs Update Status"] +pub type HiesR = crate::BitReader; +impl HiesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIES_A { + pub const fn variant(&self) -> Hies { match self.bits { - false => HIES_A::VALUE1, - true => HIES_A::VALUE2, + false => Hies::Value1, + true => Hies::Value2, } } #[doc = "Transition on the Hall Inputs not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIES_A::VALUE1 + *self == Hies::Value1 } #[doc = "Transition on the Hall Inputs detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIES_A::VALUE2 + *self == Hies::Value2 } } -#[doc = "Field `MSTS` reader - Multi-Channel pattern shadow transfer status"] -pub type MSTS_R = crate::BitReader; #[doc = "Multi-Channel pattern shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSTS_A { +pub enum Msts { #[doc = "0: Shadow transfer not done"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer done"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSTS_A) -> Self { + fn from(variant: Msts) -> Self { variant as u8 != 0 } } -impl MSTS_R { +#[doc = "Field `MSTS` reader - Multi-Channel pattern shadow transfer status"] +pub type MstsR = crate::BitReader; +impl MstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSTS_A { + pub const fn variant(&self) -> Msts { match self.bits { - false => MSTS_A::VALUE1, - true => MSTS_A::VALUE2, + false => Msts::Value1, + true => Msts::Value2, } } #[doc = "Shadow transfer not done"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSTS_A::VALUE1 + *self == Msts::Value1 } #[doc = "Shadow transfer done"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSTS_A::VALUE2 + *self == Msts::Value2 } } -#[doc = "Field `INDXS` reader - Quadrature Index Status"] -pub type INDXS_R = crate::BitReader; #[doc = "Quadrature Index Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INDXS_A { +pub enum Indxs { #[doc = "0: Index event not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Index event detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INDXS_A) -> Self { + fn from(variant: Indxs) -> Self { variant as u8 != 0 } } -impl INDXS_R { +#[doc = "Field `INDXS` reader - Quadrature Index Status"] +pub type IndxsR = crate::BitReader; +impl IndxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INDXS_A { + pub const fn variant(&self) -> Indxs { match self.bits { - false => INDXS_A::VALUE1, - true => INDXS_A::VALUE2, + false => Indxs::Value1, + true => Indxs::Value2, } } #[doc = "Index event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INDXS_A::VALUE1 + *self == Indxs::Value1 } #[doc = "Index event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INDXS_A::VALUE2 + *self == Indxs::Value2 } } -#[doc = "Field `ERRS` reader - Quadrature Phase Error Status"] -pub type ERRS_R = crate::BitReader; #[doc = "Quadrature Phase Error Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRS_A { +pub enum Errs { #[doc = "0: Phase Error event not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Phase Error event detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRS_A) -> Self { + fn from(variant: Errs) -> Self { variant as u8 != 0 } } -impl ERRS_R { +#[doc = "Field `ERRS` reader - Quadrature Phase Error Status"] +pub type ErrsR = crate::BitReader; +impl ErrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERRS_A { + pub const fn variant(&self) -> Errs { match self.bits { - false => ERRS_A::VALUE1, - true => ERRS_A::VALUE2, + false => Errs::Value1, + true => Errs::Value2, } } #[doc = "Phase Error event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERRS_A::VALUE1 + *self == Errs::Value1 } #[doc = "Phase Error event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERRS_A::VALUE2 + *self == Errs::Value2 } } -#[doc = "Field `CNTS` reader - Quadrature CLK Status"] -pub type CNTS_R = crate::BitReader; #[doc = "Quadrature CLK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTS_A { +pub enum Cnts { #[doc = "0: Quadrature clock not generated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature clock generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTS_A) -> Self { + fn from(variant: Cnts) -> Self { variant as u8 != 0 } } -impl CNTS_R { +#[doc = "Field `CNTS` reader - Quadrature CLK Status"] +pub type CntsR = crate::BitReader; +impl CntsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CNTS_A { + pub const fn variant(&self) -> Cnts { match self.bits { - false => CNTS_A::VALUE1, - true => CNTS_A::VALUE2, + false => Cnts::Value1, + true => Cnts::Value2, } } #[doc = "Quadrature clock not generated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CNTS_A::VALUE1 + *self == Cnts::Value1 } #[doc = "Quadrature clock generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CNTS_A::VALUE2 + *self == Cnts::Value2 } } -#[doc = "Field `DIRS` reader - Quadrature Direction Change"] -pub type DIRS_R = crate::BitReader; #[doc = "Quadrature Direction Change\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIRS_A { +pub enum Dirs { #[doc = "0: Change on direction not detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Change on direction detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIRS_A) -> Self { + fn from(variant: Dirs) -> Self { variant as u8 != 0 } } -impl DIRS_R { +#[doc = "Field `DIRS` reader - Quadrature Direction Change"] +pub type DirsR = crate::BitReader; +impl DirsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIRS_A { + pub const fn variant(&self) -> Dirs { match self.bits { - false => DIRS_A::VALUE1, - true => DIRS_A::VALUE2, + false => Dirs::Value1, + true => Dirs::Value2, } } #[doc = "Change on direction not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIRS_A::VALUE1 + *self == Dirs::Value1 } #[doc = "Change on direction detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIRS_A::VALUE2 + *self == Dirs::Value2 } } -#[doc = "Field `PCLKS` reader - Quadrature Period Clk Status"] -pub type PCLKS_R = crate::BitReader; #[doc = "Quadrature Period Clk Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCLKS_A { +pub enum Pclks { #[doc = "0: Period clock not generated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Period clock generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCLKS_A) -> Self { + fn from(variant: Pclks) -> Self { variant as u8 != 0 } } -impl PCLKS_R { +#[doc = "Field `PCLKS` reader - Quadrature Period Clk Status"] +pub type PclksR = crate::BitReader; +impl PclksR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCLKS_A { + pub const fn variant(&self) -> Pclks { match self.bits { - false => PCLKS_A::VALUE1, - true => PCLKS_A::VALUE2, + false => Pclks::Value1, + true => Pclks::Value2, } } #[doc = "Period clock not generated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCLKS_A::VALUE1 + *self == Pclks::Value1 } #[doc = "Period clock generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCLKS_A::VALUE2 + *self == Pclks::Value2 } } impl R { #[doc = "Bit 0 - Correct Hall Event Status"] #[inline(always)] - pub fn ches(&self) -> CHES_R { - CHES_R::new((self.bits & 1) != 0) + pub fn ches(&self) -> ChesR { + ChesR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong Hall Event Status"] #[inline(always)] - pub fn whes(&self) -> WHES_R { - WHES_R::new(((self.bits >> 1) & 1) != 0) + pub fn whes(&self) -> WhesR { + WhesR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Hall Inputs Update Status"] #[inline(always)] - pub fn hies(&self) -> HIES_R { - HIES_R::new(((self.bits >> 2) & 1) != 0) + pub fn hies(&self) -> HiesR { + HiesR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer status"] #[inline(always)] - pub fn msts(&self) -> MSTS_R { - MSTS_R::new(((self.bits >> 4) & 1) != 0) + pub fn msts(&self) -> MstsR { + MstsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Quadrature Index Status"] #[inline(always)] - pub fn indxs(&self) -> INDXS_R { - INDXS_R::new(((self.bits >> 8) & 1) != 0) + pub fn indxs(&self) -> IndxsR { + IndxsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Quadrature Phase Error Status"] #[inline(always)] - pub fn errs(&self) -> ERRS_R { - ERRS_R::new(((self.bits >> 9) & 1) != 0) + pub fn errs(&self) -> ErrsR { + ErrsR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Quadrature CLK Status"] #[inline(always)] - pub fn cnts(&self) -> CNTS_R { - CNTS_R::new(((self.bits >> 10) & 1) != 0) + pub fn cnts(&self) -> CntsR { + CntsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Quadrature Direction Change"] #[inline(always)] - pub fn dirs(&self) -> DIRS_R { - DIRS_R::new(((self.bits >> 11) & 1) != 0) + pub fn dirs(&self) -> DirsR { + DirsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Quadrature Period Clk Status"] #[inline(always)] - pub fn pclks(&self) -> PCLKS_R { - PCLKS_R::new(((self.bits >> 12) & 1) != 0) + pub fn pclks(&self) -> PclksR { + PclksR::new(((self.bits >> 12) & 1) != 0) } } #[doc = "POSIF Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PFLG_SPEC; -impl crate::RegisterSpec for PFLG_SPEC { +pub struct PflgSpec; +impl crate::RegisterSpec for PflgSpec { type Ux = u32; } #[doc = "`read()` method returns [`pflg::R`](R) reader structure"] -impl crate::Readable for PFLG_SPEC {} +impl crate::Readable for PflgSpec {} #[doc = "`reset()` method sets PFLG to value 0"] -impl crate::Resettable for PFLG_SPEC { +impl crate::Resettable for PflgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pflge.rs b/src/posif0/pflge.rs index 0bfc5869..2648654e 100644 --- a/src/posif0/pflge.rs +++ b/src/posif0/pflge.rs @@ -1,1186 +1,1177 @@ #[doc = "Register `PFLGE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PFLGE` writer"] -pub type W = crate::W; -#[doc = "Field `ECHE` reader - Correct Hall Event Enable"] -pub type ECHE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Correct Hall Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECHE_A { +pub enum Eche { #[doc = "0: Correct Hall Event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Correct Hall Event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECHE_A) -> Self { + fn from(variant: Eche) -> Self { variant as u8 != 0 } } -impl ECHE_R { +#[doc = "Field `ECHE` reader - Correct Hall Event Enable"] +pub type EcheR = crate::BitReader; +impl EcheR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECHE_A { + pub const fn variant(&self) -> Eche { match self.bits { - false => ECHE_A::VALUE1, - true => ECHE_A::VALUE2, + false => Eche::Value1, + true => Eche::Value2, } } #[doc = "Correct Hall Event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECHE_A::VALUE1 + *self == Eche::Value1 } #[doc = "Correct Hall Event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECHE_A::VALUE2 + *self == Eche::Value2 } } #[doc = "Field `ECHE` writer - Correct Hall Event Enable"] -pub type ECHE_W<'a, REG> = crate::BitWriter<'a, REG, ECHE_A>; -impl<'a, REG> ECHE_W<'a, REG> +pub type EcheW<'a, REG> = crate::BitWriter<'a, REG, Eche>; +impl<'a, REG> EcheW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Correct Hall Event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECHE_A::VALUE1) + self.variant(Eche::Value1) } #[doc = "Correct Hall Event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECHE_A::VALUE2) + self.variant(Eche::Value2) } } -#[doc = "Field `EWHE` reader - Wrong Hall Event Enable"] -pub type EWHE_R = crate::BitReader; #[doc = "Wrong Hall Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EWHE_A { +pub enum Ewhe { #[doc = "0: Wrong Hall Event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wrong Hall Event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EWHE_A) -> Self { + fn from(variant: Ewhe) -> Self { variant as u8 != 0 } } -impl EWHE_R { +#[doc = "Field `EWHE` reader - Wrong Hall Event Enable"] +pub type EwheR = crate::BitReader; +impl EwheR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EWHE_A { + pub const fn variant(&self) -> Ewhe { match self.bits { - false => EWHE_A::VALUE1, - true => EWHE_A::VALUE2, + false => Ewhe::Value1, + true => Ewhe::Value2, } } #[doc = "Wrong Hall Event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EWHE_A::VALUE1 + *self == Ewhe::Value1 } #[doc = "Wrong Hall Event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EWHE_A::VALUE2 + *self == Ewhe::Value2 } } #[doc = "Field `EWHE` writer - Wrong Hall Event Enable"] -pub type EWHE_W<'a, REG> = crate::BitWriter<'a, REG, EWHE_A>; -impl<'a, REG> EWHE_W<'a, REG> +pub type EwheW<'a, REG> = crate::BitWriter<'a, REG, Ewhe>; +impl<'a, REG> EwheW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wrong Hall Event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EWHE_A::VALUE1) + self.variant(Ewhe::Value1) } #[doc = "Wrong Hall Event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EWHE_A::VALUE2) + self.variant(Ewhe::Value2) } } -#[doc = "Field `EHIE` reader - Hall Input Update Enable"] -pub type EHIE_R = crate::BitReader; #[doc = "Hall Input Update Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EHIE_A { +pub enum Ehie { #[doc = "0: Update of the Hall Inputs interrupt is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update of the Hall Inputs interrupt is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EHIE_A) -> Self { + fn from(variant: Ehie) -> Self { variant as u8 != 0 } } -impl EHIE_R { +#[doc = "Field `EHIE` reader - Hall Input Update Enable"] +pub type EhieR = crate::BitReader; +impl EhieR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EHIE_A { + pub const fn variant(&self) -> Ehie { match self.bits { - false => EHIE_A::VALUE1, - true => EHIE_A::VALUE2, + false => Ehie::Value1, + true => Ehie::Value2, } } #[doc = "Update of the Hall Inputs interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EHIE_A::VALUE1 + *self == Ehie::Value1 } #[doc = "Update of the Hall Inputs interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EHIE_A::VALUE2 + *self == Ehie::Value2 } } #[doc = "Field `EHIE` writer - Hall Input Update Enable"] -pub type EHIE_W<'a, REG> = crate::BitWriter<'a, REG, EHIE_A>; -impl<'a, REG> EHIE_W<'a, REG> +pub type EhieW<'a, REG> = crate::BitWriter<'a, REG, Ehie>; +impl<'a, REG> EhieW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Update of the Hall Inputs interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EHIE_A::VALUE1) + self.variant(Ehie::Value1) } #[doc = "Update of the Hall Inputs interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EHIE_A::VALUE2) + self.variant(Ehie::Value2) } } -#[doc = "Field `EMST` reader - Multi-Channel pattern shadow transfer enable"] -pub type EMST_R = crate::BitReader; #[doc = "Multi-Channel pattern shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMST_A { +pub enum Emst { #[doc = "0: Shadow transfer event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shadow transfer event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMST_A) -> Self { + fn from(variant: Emst) -> Self { variant as u8 != 0 } } -impl EMST_R { +#[doc = "Field `EMST` reader - Multi-Channel pattern shadow transfer enable"] +pub type EmstR = crate::BitReader; +impl EmstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMST_A { + pub const fn variant(&self) -> Emst { match self.bits { - false => EMST_A::VALUE1, - true => EMST_A::VALUE2, + false => Emst::Value1, + true => Emst::Value2, } } #[doc = "Shadow transfer event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMST_A::VALUE1 + *self == Emst::Value1 } #[doc = "Shadow transfer event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMST_A::VALUE2 + *self == Emst::Value2 } } #[doc = "Field `EMST` writer - Multi-Channel pattern shadow transfer enable"] -pub type EMST_W<'a, REG> = crate::BitWriter<'a, REG, EMST_A>; -impl<'a, REG> EMST_W<'a, REG> +pub type EmstW<'a, REG> = crate::BitWriter<'a, REG, Emst>; +impl<'a, REG> EmstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMST_A::VALUE1) + self.variant(Emst::Value1) } #[doc = "Shadow transfer event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMST_A::VALUE2) + self.variant(Emst::Value2) } } -#[doc = "Field `EINDX` reader - Quadrature Index Event Enable"] -pub type EINDX_R = crate::BitReader; #[doc = "Quadrature Index Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EINDX_A { +pub enum Eindx { #[doc = "0: Index event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Index event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EINDX_A) -> Self { + fn from(variant: Eindx) -> Self { variant as u8 != 0 } } -impl EINDX_R { +#[doc = "Field `EINDX` reader - Quadrature Index Event Enable"] +pub type EindxR = crate::BitReader; +impl EindxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EINDX_A { + pub const fn variant(&self) -> Eindx { match self.bits { - false => EINDX_A::VALUE1, - true => EINDX_A::VALUE2, + false => Eindx::Value1, + true => Eindx::Value2, } } #[doc = "Index event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EINDX_A::VALUE1 + *self == Eindx::Value1 } #[doc = "Index event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EINDX_A::VALUE2 + *self == Eindx::Value2 } } #[doc = "Field `EINDX` writer - Quadrature Index Event Enable"] -pub type EINDX_W<'a, REG> = crate::BitWriter<'a, REG, EINDX_A>; -impl<'a, REG> EINDX_W<'a, REG> +pub type EindxW<'a, REG> = crate::BitWriter<'a, REG, Eindx>; +impl<'a, REG> EindxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Index event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EINDX_A::VALUE1) + self.variant(Eindx::Value1) } #[doc = "Index event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EINDX_A::VALUE2) + self.variant(Eindx::Value2) } } -#[doc = "Field `EERR` reader - Quadrature Phase Error Enable"] -pub type EERR_R = crate::BitReader; #[doc = "Quadrature Phase Error Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EERR_A { +pub enum Eerr { #[doc = "0: Phase error event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Phase error event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EERR_A) -> Self { + fn from(variant: Eerr) -> Self { variant as u8 != 0 } } -impl EERR_R { +#[doc = "Field `EERR` reader - Quadrature Phase Error Enable"] +pub type EerrR = crate::BitReader; +impl EerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EERR_A { + pub const fn variant(&self) -> Eerr { match self.bits { - false => EERR_A::VALUE1, - true => EERR_A::VALUE2, + false => Eerr::Value1, + true => Eerr::Value2, } } #[doc = "Phase error event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EERR_A::VALUE1 + *self == Eerr::Value1 } #[doc = "Phase error event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EERR_A::VALUE2 + *self == Eerr::Value2 } } #[doc = "Field `EERR` writer - Quadrature Phase Error Enable"] -pub type EERR_W<'a, REG> = crate::BitWriter<'a, REG, EERR_A>; -impl<'a, REG> EERR_W<'a, REG> +pub type EerrW<'a, REG> = crate::BitWriter<'a, REG, Eerr>; +impl<'a, REG> EerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase error event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EERR_A::VALUE1) + self.variant(Eerr::Value1) } #[doc = "Phase error event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EERR_A::VALUE2) + self.variant(Eerr::Value2) } } -#[doc = "Field `ECNT` reader - Quadrature CLK interrupt Enable"] -pub type ECNT_R = crate::BitReader; #[doc = "Quadrature CLK interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECNT_A { +pub enum Ecnt { #[doc = "0: Quadrature CLK event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature CLK event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECNT_A) -> Self { + fn from(variant: Ecnt) -> Self { variant as u8 != 0 } } -impl ECNT_R { +#[doc = "Field `ECNT` reader - Quadrature CLK interrupt Enable"] +pub type EcntR = crate::BitReader; +impl EcntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECNT_A { + pub const fn variant(&self) -> Ecnt { match self.bits { - false => ECNT_A::VALUE1, - true => ECNT_A::VALUE2, + false => Ecnt::Value1, + true => Ecnt::Value2, } } #[doc = "Quadrature CLK event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECNT_A::VALUE1 + *self == Ecnt::Value1 } #[doc = "Quadrature CLK event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECNT_A::VALUE2 + *self == Ecnt::Value2 } } #[doc = "Field `ECNT` writer - Quadrature CLK interrupt Enable"] -pub type ECNT_W<'a, REG> = crate::BitWriter<'a, REG, ECNT_A>; -impl<'a, REG> ECNT_W<'a, REG> +pub type EcntW<'a, REG> = crate::BitWriter<'a, REG, Ecnt>; +impl<'a, REG> EcntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature CLK event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECNT_A::VALUE1) + self.variant(Ecnt::Value1) } #[doc = "Quadrature CLK event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECNT_A::VALUE2) + self.variant(Ecnt::Value2) } } -#[doc = "Field `EDIR` reader - Quadrature direction change interrupt Enable"] -pub type EDIR_R = crate::BitReader; #[doc = "Quadrature direction change interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDIR_A { +pub enum Edir { #[doc = "0: Direction change event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Direction change event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDIR_A) -> Self { + fn from(variant: Edir) -> Self { variant as u8 != 0 } } -impl EDIR_R { +#[doc = "Field `EDIR` reader - Quadrature direction change interrupt Enable"] +pub type EdirR = crate::BitReader; +impl EdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EDIR_A { + pub const fn variant(&self) -> Edir { match self.bits { - false => EDIR_A::VALUE1, - true => EDIR_A::VALUE2, + false => Edir::Value1, + true => Edir::Value2, } } #[doc = "Direction change event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EDIR_A::VALUE1 + *self == Edir::Value1 } #[doc = "Direction change event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EDIR_A::VALUE2 + *self == Edir::Value2 } } #[doc = "Field `EDIR` writer - Quadrature direction change interrupt Enable"] -pub type EDIR_W<'a, REG> = crate::BitWriter<'a, REG, EDIR_A>; -impl<'a, REG> EDIR_W<'a, REG> +pub type EdirW<'a, REG> = crate::BitWriter<'a, REG, Edir>; +impl<'a, REG> EdirW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Direction change event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EDIR_A::VALUE1) + self.variant(Edir::Value1) } #[doc = "Direction change event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EDIR_A::VALUE2) + self.variant(Edir::Value2) } } -#[doc = "Field `EPCLK` reader - Quadrature Period CLK interrupt Enable"] -pub type EPCLK_R = crate::BitReader; #[doc = "Quadrature Period CLK interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPCLK_A { +pub enum Epclk { #[doc = "0: Quadrature Period CLK event interrupt disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Period CLK event interrupt enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPCLK_A) -> Self { + fn from(variant: Epclk) -> Self { variant as u8 != 0 } } -impl EPCLK_R { +#[doc = "Field `EPCLK` reader - Quadrature Period CLK interrupt Enable"] +pub type EpclkR = crate::BitReader; +impl EpclkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPCLK_A { + pub const fn variant(&self) -> Epclk { match self.bits { - false => EPCLK_A::VALUE1, - true => EPCLK_A::VALUE2, + false => Epclk::Value1, + true => Epclk::Value2, } } #[doc = "Quadrature Period CLK event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPCLK_A::VALUE1 + *self == Epclk::Value1 } #[doc = "Quadrature Period CLK event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPCLK_A::VALUE2 + *self == Epclk::Value2 } } #[doc = "Field `EPCLK` writer - Quadrature Period CLK interrupt Enable"] -pub type EPCLK_W<'a, REG> = crate::BitWriter<'a, REG, EPCLK_A>; -impl<'a, REG> EPCLK_W<'a, REG> +pub type EpclkW<'a, REG> = crate::BitWriter<'a, REG, Epclk>; +impl<'a, REG> EpclkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Period CLK event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPCLK_A::VALUE1) + self.variant(Epclk::Value1) } #[doc = "Quadrature Period CLK event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPCLK_A::VALUE2) + self.variant(Epclk::Value2) } } -#[doc = "Field `CHESEL` reader - Correct Hall Event Service Request Selector"] -pub type CHESEL_R = crate::BitReader; #[doc = "Correct Hall Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHESEL_A { +pub enum Chesel { #[doc = "0: Correct Hall Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Correct Hall Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHESEL_A) -> Self { + fn from(variant: Chesel) -> Self { variant as u8 != 0 } } -impl CHESEL_R { +#[doc = "Field `CHESEL` reader - Correct Hall Event Service Request Selector"] +pub type CheselR = crate::BitReader; +impl CheselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHESEL_A { + pub const fn variant(&self) -> Chesel { match self.bits { - false => CHESEL_A::VALUE1, - true => CHESEL_A::VALUE2, + false => Chesel::Value1, + true => Chesel::Value2, } } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHESEL_A::VALUE1 + *self == Chesel::Value1 } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHESEL_A::VALUE2 + *self == Chesel::Value2 } } #[doc = "Field `CHESEL` writer - Correct Hall Event Service Request Selector"] -pub type CHESEL_W<'a, REG> = crate::BitWriter<'a, REG, CHESEL_A>; -impl<'a, REG> CHESEL_W<'a, REG> +pub type CheselW<'a, REG> = crate::BitWriter<'a, REG, Chesel>; +impl<'a, REG> CheselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Correct Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHESEL_A::VALUE1) + self.variant(Chesel::Value1) } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHESEL_A::VALUE2) + self.variant(Chesel::Value2) } } -#[doc = "Field `WHESEL` reader - Wrong Hall Event Service Request Selector"] -pub type WHESEL_R = crate::BitReader; #[doc = "Wrong Hall Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WHESEL_A { +pub enum Whesel { #[doc = "0: Wrong Hall Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wrong Hall Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WHESEL_A) -> Self { + fn from(variant: Whesel) -> Self { variant as u8 != 0 } } -impl WHESEL_R { +#[doc = "Field `WHESEL` reader - Wrong Hall Event Service Request Selector"] +pub type WheselR = crate::BitReader; +impl WheselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WHESEL_A { + pub const fn variant(&self) -> Whesel { match self.bits { - false => WHESEL_A::VALUE1, - true => WHESEL_A::VALUE2, + false => Whesel::Value1, + true => Whesel::Value2, } } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WHESEL_A::VALUE1 + *self == Whesel::Value1 } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WHESEL_A::VALUE2 + *self == Whesel::Value2 } } #[doc = "Field `WHESEL` writer - Wrong Hall Event Service Request Selector"] -pub type WHESEL_W<'a, REG> = crate::BitWriter<'a, REG, WHESEL_A>; -impl<'a, REG> WHESEL_W<'a, REG> +pub type WheselW<'a, REG> = crate::BitWriter<'a, REG, Whesel>; +impl<'a, REG> WheselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WHESEL_A::VALUE1) + self.variant(Whesel::Value1) } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WHESEL_A::VALUE2) + self.variant(Whesel::Value2) } } -#[doc = "Field `HIESEL` reader - Hall Inputs Update Event Service Request Selector"] -pub type HIESEL_R = crate::BitReader; #[doc = "Hall Inputs Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIESEL_A { +pub enum Hiesel { #[doc = "0: Hall Inputs Update Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Hall Inputs Update Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIESEL_A) -> Self { + fn from(variant: Hiesel) -> Self { variant as u8 != 0 } } -impl HIESEL_R { +#[doc = "Field `HIESEL` reader - Hall Inputs Update Event Service Request Selector"] +pub type HieselR = crate::BitReader; +impl HieselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIESEL_A { + pub const fn variant(&self) -> Hiesel { match self.bits { - false => HIESEL_A::VALUE1, - true => HIESEL_A::VALUE2, + false => Hiesel::Value1, + true => Hiesel::Value2, } } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIESEL_A::VALUE1 + *self == Hiesel::Value1 } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIESEL_A::VALUE2 + *self == Hiesel::Value2 } } #[doc = "Field `HIESEL` writer - Hall Inputs Update Event Service Request Selector"] -pub type HIESEL_W<'a, REG> = crate::BitWriter<'a, REG, HIESEL_A>; -impl<'a, REG> HIESEL_W<'a, REG> +pub type HieselW<'a, REG> = crate::BitWriter<'a, REG, Hiesel>; +impl<'a, REG> HieselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIESEL_A::VALUE1) + self.variant(Hiesel::Value1) } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIESEL_A::VALUE2) + self.variant(Hiesel::Value2) } } -#[doc = "Field `MSTSEL` reader - Multi-Channel pattern Update Event Service Request Selector"] -pub type MSTSEL_R = crate::BitReader; #[doc = "Multi-Channel pattern Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSTSEL_A { +pub enum Mstsel { #[doc = "0: Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSTSEL_A) -> Self { + fn from(variant: Mstsel) -> Self { variant as u8 != 0 } } -impl MSTSEL_R { +#[doc = "Field `MSTSEL` reader - Multi-Channel pattern Update Event Service Request Selector"] +pub type MstselR = crate::BitReader; +impl MstselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSTSEL_A { + pub const fn variant(&self) -> Mstsel { match self.bits { - false => MSTSEL_A::VALUE1, - true => MSTSEL_A::VALUE2, + false => Mstsel::Value1, + true => Mstsel::Value2, } } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSTSEL_A::VALUE1 + *self == Mstsel::Value1 } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSTSEL_A::VALUE2 + *self == Mstsel::Value2 } } #[doc = "Field `MSTSEL` writer - Multi-Channel pattern Update Event Service Request Selector"] -pub type MSTSEL_W<'a, REG> = crate::BitWriter<'a, REG, MSTSEL_A>; -impl<'a, REG> MSTSEL_W<'a, REG> +pub type MstselW<'a, REG> = crate::BitWriter<'a, REG, Mstsel>; +impl<'a, REG> MstselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSTSEL_A::VALUE1) + self.variant(Mstsel::Value1) } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSTSEL_A::VALUE2) + self.variant(Mstsel::Value2) } } -#[doc = "Field `INDSEL` reader - Quadrature Index Event Service Request Selector"] -pub type INDSEL_R = crate::BitReader; #[doc = "Quadrature Index Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INDSEL_A { +pub enum Indsel { #[doc = "0: Quadrature Index Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Index Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INDSEL_A) -> Self { + fn from(variant: Indsel) -> Self { variant as u8 != 0 } } -impl INDSEL_R { +#[doc = "Field `INDSEL` reader - Quadrature Index Event Service Request Selector"] +pub type IndselR = crate::BitReader; +impl IndselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INDSEL_A { + pub const fn variant(&self) -> Indsel { match self.bits { - false => INDSEL_A::VALUE1, - true => INDSEL_A::VALUE2, + false => Indsel::Value1, + true => Indsel::Value2, } } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INDSEL_A::VALUE1 + *self == Indsel::Value1 } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INDSEL_A::VALUE2 + *self == Indsel::Value2 } } #[doc = "Field `INDSEL` writer - Quadrature Index Event Service Request Selector"] -pub type INDSEL_W<'a, REG> = crate::BitWriter<'a, REG, INDSEL_A>; -impl<'a, REG> INDSEL_W<'a, REG> +pub type IndselW<'a, REG> = crate::BitWriter<'a, REG, Indsel>; +impl<'a, REG> IndselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INDSEL_A::VALUE1) + self.variant(Indsel::Value1) } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INDSEL_A::VALUE2) + self.variant(Indsel::Value2) } } -#[doc = "Field `ERRSEL` reader - Quadrature Phase Error Event Service Request Selector"] -pub type ERRSEL_R = crate::BitReader; #[doc = "Quadrature Phase Error Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRSEL_A { +pub enum Errsel { #[doc = "0: Quadrature Phase error Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Phase error Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRSEL_A) -> Self { + fn from(variant: Errsel) -> Self { variant as u8 != 0 } } -impl ERRSEL_R { +#[doc = "Field `ERRSEL` reader - Quadrature Phase Error Event Service Request Selector"] +pub type ErrselR = crate::BitReader; +impl ErrselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERRSEL_A { + pub const fn variant(&self) -> Errsel { match self.bits { - false => ERRSEL_A::VALUE1, - true => ERRSEL_A::VALUE2, + false => Errsel::Value1, + true => Errsel::Value2, } } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERRSEL_A::VALUE1 + *self == Errsel::Value1 } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERRSEL_A::VALUE2 + *self == Errsel::Value2 } } #[doc = "Field `ERRSEL` writer - Quadrature Phase Error Event Service Request Selector"] -pub type ERRSEL_W<'a, REG> = crate::BitWriter<'a, REG, ERRSEL_A>; -impl<'a, REG> ERRSEL_W<'a, REG> +pub type ErrselW<'a, REG> = crate::BitWriter<'a, REG, Errsel>; +impl<'a, REG> ErrselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERRSEL_A::VALUE1) + self.variant(Errsel::Value1) } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERRSEL_A::VALUE2) + self.variant(Errsel::Value2) } } -#[doc = "Field `CNTSEL` reader - Quadrature Clock Event Service Request Selector"] -pub type CNTSEL_R = crate::BitReader; #[doc = "Quadrature Clock Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CNTSEL_A { +pub enum Cntsel { #[doc = "0: Quadrature Clock Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Clock Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CNTSEL_A) -> Self { + fn from(variant: Cntsel) -> Self { variant as u8 != 0 } } -impl CNTSEL_R { +#[doc = "Field `CNTSEL` reader - Quadrature Clock Event Service Request Selector"] +pub type CntselR = crate::BitReader; +impl CntselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CNTSEL_A { + pub const fn variant(&self) -> Cntsel { match self.bits { - false => CNTSEL_A::VALUE1, - true => CNTSEL_A::VALUE2, + false => Cntsel::Value1, + true => Cntsel::Value2, } } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CNTSEL_A::VALUE1 + *self == Cntsel::Value1 } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CNTSEL_A::VALUE2 + *self == Cntsel::Value2 } } #[doc = "Field `CNTSEL` writer - Quadrature Clock Event Service Request Selector"] -pub type CNTSEL_W<'a, REG> = crate::BitWriter<'a, REG, CNTSEL_A>; -impl<'a, REG> CNTSEL_W<'a, REG> +pub type CntselW<'a, REG> = crate::BitWriter<'a, REG, Cntsel>; +impl<'a, REG> CntselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CNTSEL_A::VALUE1) + self.variant(Cntsel::Value1) } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CNTSEL_A::VALUE2) + self.variant(Cntsel::Value2) } } -#[doc = "Field `DIRSEL` reader - Quadrature Direction Update Event Service Request Selector"] -pub type DIRSEL_R = crate::BitReader; #[doc = "Quadrature Direction Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIRSEL_A { +pub enum Dirsel { #[doc = "0: Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIRSEL_A) -> Self { + fn from(variant: Dirsel) -> Self { variant as u8 != 0 } } -impl DIRSEL_R { +#[doc = "Field `DIRSEL` reader - Quadrature Direction Update Event Service Request Selector"] +pub type DirselR = crate::BitReader; +impl DirselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIRSEL_A { + pub const fn variant(&self) -> Dirsel { match self.bits { - false => DIRSEL_A::VALUE1, - true => DIRSEL_A::VALUE2, + false => Dirsel::Value1, + true => Dirsel::Value2, } } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIRSEL_A::VALUE1 + *self == Dirsel::Value1 } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIRSEL_A::VALUE2 + *self == Dirsel::Value2 } } #[doc = "Field `DIRSEL` writer - Quadrature Direction Update Event Service Request Selector"] -pub type DIRSEL_W<'a, REG> = crate::BitWriter<'a, REG, DIRSEL_A>; -impl<'a, REG> DIRSEL_W<'a, REG> +pub type DirselW<'a, REG> = crate::BitWriter<'a, REG, Dirsel>; +impl<'a, REG> DirselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIRSEL_A::VALUE1) + self.variant(Dirsel::Value1) } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIRSEL_A::VALUE2) + self.variant(Dirsel::Value2) } } -#[doc = "Field `PCLSEL` reader - Quadrature Period clock Event Service Request Selector"] -pub type PCLSEL_R = crate::BitReader; #[doc = "Quadrature Period clock Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCLSEL_A { +pub enum Pclsel { #[doc = "0: Quadrature Period clock Event interrupt forward to POSIFx.SR0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Quadrature Period clock Event interrupt forward to POSIFx.SR1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCLSEL_A) -> Self { + fn from(variant: Pclsel) -> Self { variant as u8 != 0 } } -impl PCLSEL_R { +#[doc = "Field `PCLSEL` reader - Quadrature Period clock Event Service Request Selector"] +pub type PclselR = crate::BitReader; +impl PclselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCLSEL_A { + pub const fn variant(&self) -> Pclsel { match self.bits { - false => PCLSEL_A::VALUE1, - true => PCLSEL_A::VALUE2, + false => Pclsel::Value1, + true => Pclsel::Value2, } } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCLSEL_A::VALUE1 + *self == Pclsel::Value1 } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCLSEL_A::VALUE2 + *self == Pclsel::Value2 } } #[doc = "Field `PCLSEL` writer - Quadrature Period clock Event Service Request Selector"] -pub type PCLSEL_W<'a, REG> = crate::BitWriter<'a, REG, PCLSEL_A>; -impl<'a, REG> PCLSEL_W<'a, REG> +pub type PclselW<'a, REG> = crate::BitWriter<'a, REG, Pclsel>; +impl<'a, REG> PclselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCLSEL_A::VALUE1) + self.variant(Pclsel::Value1) } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCLSEL_A::VALUE2) + self.variant(Pclsel::Value2) } } impl R { #[doc = "Bit 0 - Correct Hall Event Enable"] #[inline(always)] - pub fn eche(&self) -> ECHE_R { - ECHE_R::new((self.bits & 1) != 0) + pub fn eche(&self) -> EcheR { + EcheR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong Hall Event Enable"] #[inline(always)] - pub fn ewhe(&self) -> EWHE_R { - EWHE_R::new(((self.bits >> 1) & 1) != 0) + pub fn ewhe(&self) -> EwheR { + EwheR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Hall Input Update Enable"] #[inline(always)] - pub fn ehie(&self) -> EHIE_R { - EHIE_R::new(((self.bits >> 2) & 1) != 0) + pub fn ehie(&self) -> EhieR { + EhieR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"] #[inline(always)] - pub fn emst(&self) -> EMST_R { - EMST_R::new(((self.bits >> 4) & 1) != 0) + pub fn emst(&self) -> EmstR { + EmstR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Quadrature Index Event Enable"] #[inline(always)] - pub fn eindx(&self) -> EINDX_R { - EINDX_R::new(((self.bits >> 8) & 1) != 0) + pub fn eindx(&self) -> EindxR { + EindxR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Quadrature Phase Error Enable"] #[inline(always)] - pub fn eerr(&self) -> EERR_R { - EERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn eerr(&self) -> EerrR { + EerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Quadrature CLK interrupt Enable"] #[inline(always)] - pub fn ecnt(&self) -> ECNT_R { - ECNT_R::new(((self.bits >> 10) & 1) != 0) + pub fn ecnt(&self) -> EcntR { + EcntR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Quadrature direction change interrupt Enable"] #[inline(always)] - pub fn edir(&self) -> EDIR_R { - EDIR_R::new(((self.bits >> 11) & 1) != 0) + pub fn edir(&self) -> EdirR { + EdirR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"] #[inline(always)] - pub fn epclk(&self) -> EPCLK_R { - EPCLK_R::new(((self.bits >> 12) & 1) != 0) + pub fn epclk(&self) -> EpclkR { + EpclkR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 16 - Correct Hall Event Service Request Selector"] #[inline(always)] - pub fn chesel(&self) -> CHESEL_R { - CHESEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn chesel(&self) -> CheselR { + CheselR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"] #[inline(always)] - pub fn whesel(&self) -> WHESEL_R { - WHESEL_R::new(((self.bits >> 17) & 1) != 0) + pub fn whesel(&self) -> WheselR { + WheselR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"] #[inline(always)] - pub fn hiesel(&self) -> HIESEL_R { - HIESEL_R::new(((self.bits >> 18) & 1) != 0) + pub fn hiesel(&self) -> HieselR { + HieselR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"] #[inline(always)] - pub fn mstsel(&self) -> MSTSEL_R { - MSTSEL_R::new(((self.bits >> 20) & 1) != 0) + pub fn mstsel(&self) -> MstselR { + MstselR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"] #[inline(always)] - pub fn indsel(&self) -> INDSEL_R { - INDSEL_R::new(((self.bits >> 24) & 1) != 0) + pub fn indsel(&self) -> IndselR { + IndselR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"] #[inline(always)] - pub fn errsel(&self) -> ERRSEL_R { - ERRSEL_R::new(((self.bits >> 25) & 1) != 0) + pub fn errsel(&self) -> ErrselR { + ErrselR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"] #[inline(always)] - pub fn cntsel(&self) -> CNTSEL_R { - CNTSEL_R::new(((self.bits >> 26) & 1) != 0) + pub fn cntsel(&self) -> CntselR { + CntselR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"] #[inline(always)] - pub fn dirsel(&self) -> DIRSEL_R { - DIRSEL_R::new(((self.bits >> 27) & 1) != 0) + pub fn dirsel(&self) -> DirselR { + DirselR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"] #[inline(always)] - pub fn pclsel(&self) -> PCLSEL_R { - PCLSEL_R::new(((self.bits >> 28) & 1) != 0) + pub fn pclsel(&self) -> PclselR { + PclselR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Correct Hall Event Enable"] #[inline(always)] #[must_use] - pub fn eche(&mut self) -> ECHE_W { - ECHE_W::new(self, 0) + pub fn eche(&mut self) -> EcheW { + EcheW::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event Enable"] #[inline(always)] #[must_use] - pub fn ewhe(&mut self) -> EWHE_W { - EWHE_W::new(self, 1) + pub fn ewhe(&mut self) -> EwheW { + EwheW::new(self, 1) } #[doc = "Bit 2 - Hall Input Update Enable"] #[inline(always)] #[must_use] - pub fn ehie(&mut self) -> EHIE_W { - EHIE_W::new(self, 2) + pub fn ehie(&mut self) -> EhieW { + EhieW::new(self, 2) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"] #[inline(always)] #[must_use] - pub fn emst(&mut self) -> EMST_W { - EMST_W::new(self, 4) + pub fn emst(&mut self) -> EmstW { + EmstW::new(self, 4) } #[doc = "Bit 8 - Quadrature Index Event Enable"] #[inline(always)] #[must_use] - pub fn eindx(&mut self) -> EINDX_W { - EINDX_W::new(self, 8) + pub fn eindx(&mut self) -> EindxW { + EindxW::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error Enable"] #[inline(always)] #[must_use] - pub fn eerr(&mut self) -> EERR_W { - EERR_W::new(self, 9) + pub fn eerr(&mut self) -> EerrW { + EerrW::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK interrupt Enable"] #[inline(always)] #[must_use] - pub fn ecnt(&mut self) -> ECNT_W { - ECNT_W::new(self, 10) + pub fn ecnt(&mut self) -> EcntW { + EcntW::new(self, 10) } #[doc = "Bit 11 - Quadrature direction change interrupt Enable"] #[inline(always)] #[must_use] - pub fn edir(&mut self) -> EDIR_W { - EDIR_W::new(self, 11) + pub fn edir(&mut self) -> EdirW { + EdirW::new(self, 11) } #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"] #[inline(always)] #[must_use] - pub fn epclk(&mut self) -> EPCLK_W { - EPCLK_W::new(self, 12) + pub fn epclk(&mut self) -> EpclkW { + EpclkW::new(self, 12) } #[doc = "Bit 16 - Correct Hall Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn chesel(&mut self) -> CHESEL_W { - CHESEL_W::new(self, 16) + pub fn chesel(&mut self) -> CheselW { + CheselW::new(self, 16) } #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn whesel(&mut self) -> WHESEL_W { - WHESEL_W::new(self, 17) + pub fn whesel(&mut self) -> WheselW { + WheselW::new(self, 17) } #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn hiesel(&mut self) -> HIESEL_W { - HIESEL_W::new(self, 18) + pub fn hiesel(&mut self) -> HieselW { + HieselW::new(self, 18) } #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn mstsel(&mut self) -> MSTSEL_W { - MSTSEL_W::new(self, 20) + pub fn mstsel(&mut self) -> MstselW { + MstselW::new(self, 20) } #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn indsel(&mut self) -> INDSEL_W { - INDSEL_W::new(self, 24) + pub fn indsel(&mut self) -> IndselW { + IndselW::new(self, 24) } #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn errsel(&mut self) -> ERRSEL_W { - ERRSEL_W::new(self, 25) + pub fn errsel(&mut self) -> ErrselW { + ErrselW::new(self, 25) } #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn cntsel(&mut self) -> CNTSEL_W { - CNTSEL_W::new(self, 26) + pub fn cntsel(&mut self) -> CntselW { + CntselW::new(self, 26) } #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn dirsel(&mut self) -> DIRSEL_W { - DIRSEL_W::new(self, 27) + pub fn dirsel(&mut self) -> DirselW { + DirselW::new(self, 27) } #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn pclsel(&mut self) -> PCLSEL_W { - PCLSEL_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pclsel(&mut self) -> PclselW { + PclselW::new(self, 28) } } #[doc = "POSIF Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PFLGE_SPEC; -impl crate::RegisterSpec for PFLGE_SPEC { +pub struct PflgeSpec; +impl crate::RegisterSpec for PflgeSpec { type Ux = u32; } #[doc = "`read()` method returns [`pflge::R`](R) reader structure"] -impl crate::Readable for PFLGE_SPEC {} +impl crate::Readable for PflgeSpec {} #[doc = "`write(|w| ..)` method takes [`pflge::W`](W) writer structure"] -impl crate::Writable for PFLGE_SPEC { +impl crate::Writable for PflgeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PFLGE to value 0"] -impl crate::Resettable for PFLGE_SPEC { +impl crate::Resettable for PflgeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/prun.rs b/src/posif0/prun.rs index f73ac3df..a00c3681 100644 --- a/src/posif0/prun.rs +++ b/src/posif0/prun.rs @@ -1,56 +1,56 @@ #[doc = "Register `PRUN` reader"] -pub type R = crate::R; -#[doc = "Field `RB` reader - Run Bit"] -pub type RB_R = crate::BitReader; +pub type R = crate::R; #[doc = "Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RB_A { +pub enum Rb { #[doc = "0: IDLE"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Running"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RB_A) -> Self { + fn from(variant: Rb) -> Self { variant as u8 != 0 } } -impl RB_R { +#[doc = "Field `RB` reader - Run Bit"] +pub type RbR = crate::BitReader; +impl RbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RB_A { + pub const fn variant(&self) -> Rb { match self.bits { - false => RB_A::VALUE1, - true => RB_A::VALUE2, + false => Rb::Value1, + true => Rb::Value2, } } #[doc = "IDLE"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RB_A::VALUE1 + *self == Rb::Value1 } #[doc = "Running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RB_A::VALUE2 + *self == Rb::Value2 } } impl R { #[doc = "Bit 0 - Run Bit"] #[inline(always)] - pub fn rb(&self) -> RB_R { - RB_R::new((self.bits & 1) != 0) + pub fn rb(&self) -> RbR { + RbR::new((self.bits & 1) != 0) } } #[doc = "POSIF Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRUN_SPEC; -impl crate::RegisterSpec for PRUN_SPEC { +pub struct PrunSpec; +impl crate::RegisterSpec for PrunSpec { type Ux = u32; } #[doc = "`read()` method returns [`prun::R`](R) reader structure"] -impl crate::Readable for PRUN_SPEC {} +impl crate::Readable for PrunSpec {} #[doc = "`reset()` method sets PRUN to value 0"] -impl crate::Resettable for PRUN_SPEC { +impl crate::Resettable for PrunSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/prunc.rs b/src/posif0/prunc.rs index 7da1f029..fd2e68cc 100644 --- a/src/posif0/prunc.rs +++ b/src/posif0/prunc.rs @@ -1,44 +1,35 @@ #[doc = "Register `PRUNC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRB` writer - Clear Run bit"] -pub type CRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CrbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSM` writer - Clear Current internal status"] -pub type CSM_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CsmW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Run bit"] #[inline(always)] #[must_use] - pub fn crb(&mut self) -> CRB_W { - CRB_W::new(self, 0) + pub fn crb(&mut self) -> CrbW { + CrbW::new(self, 0) } #[doc = "Bit 1 - Clear Current internal status"] #[inline(always)] #[must_use] - pub fn csm(&mut self) -> CSM_W { - CSM_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn csm(&mut self) -> CsmW { + CsmW::new(self, 1) } } #[doc = "POSIF Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRUNC_SPEC; -impl crate::RegisterSpec for PRUNC_SPEC { +pub struct PruncSpec; +impl crate::RegisterSpec for PruncSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prunc::W`](W) writer structure"] -impl crate::Writable for PRUNC_SPEC { +impl crate::Writable for PruncSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRUNC to value 0"] -impl crate::Resettable for PRUNC_SPEC { +impl crate::Resettable for PruncSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pruns.rs b/src/posif0/pruns.rs index 808c0be1..62a9b386 100644 --- a/src/posif0/pruns.rs +++ b/src/posif0/pruns.rs @@ -1,36 +1,27 @@ #[doc = "Register `PRUNS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SRB` writer - Set Run bit"] -pub type SRB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SrbW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Set Run bit"] #[inline(always)] #[must_use] - pub fn srb(&mut self) -> SRB_W { - SRB_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn srb(&mut self) -> SrbW { + SrbW::new(self, 0) } } #[doc = "POSIF Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRUNS_SPEC; -impl crate::RegisterSpec for PRUNS_SPEC { +pub struct PrunsSpec; +impl crate::RegisterSpec for PrunsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pruns::W`](W) writer structure"] -impl crate::Writable for PRUNS_SPEC { +impl crate::Writable for PrunsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRUNS to value 0"] -impl crate::Resettable for PRUNS_SPEC { +impl crate::Resettable for PrunsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/psus.rs b/src/posif0/psus.rs index 987cd047..bb2cb74b 100644 --- a/src/posif0/psus.rs +++ b/src/posif0/psus.rs @@ -1,67 +1,67 @@ #[doc = "Register `PSUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSUS` writer"] -pub type W = crate::W; -#[doc = "Field `QSUS` reader - Quadrature Mode Suspend Config"] -pub type QSUS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Quadrature Mode Suspend Config\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum QSUS_A { +pub enum Qsus { #[doc = "0: Suspend request ignored"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Stop immediately"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Suspend in the next index occurrence"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Suspend in the next phase (PhaseA or PhaseB) occurrence"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: QSUS_A) -> Self { + fn from(variant: Qsus) -> Self { variant as _ } } -impl crate::FieldSpec for QSUS_A { +impl crate::FieldSpec for Qsus { type Ux = u8; } -impl QSUS_R { +#[doc = "Field `QSUS` reader - Quadrature Mode Suspend Config"] +pub type QsusR = crate::FieldReader; +impl QsusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> QSUS_A { + pub const fn variant(&self) -> Qsus { match self.bits { - 0 => QSUS_A::VALUE1, - 1 => QSUS_A::VALUE2, - 2 => QSUS_A::VALUE3, - 3 => QSUS_A::VALUE4, + 0 => Qsus::Value1, + 1 => Qsus::Value2, + 2 => Qsus::Value3, + 3 => Qsus::Value4, _ => unreachable!(), } } #[doc = "Suspend request ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == QSUS_A::VALUE1 + *self == Qsus::Value1 } #[doc = "Stop immediately"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == QSUS_A::VALUE2 + *self == Qsus::Value2 } #[doc = "Suspend in the next index occurrence"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == QSUS_A::VALUE3 + *self == Qsus::Value3 } #[doc = "Suspend in the next phase (PhaseA or PhaseB) occurrence"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == QSUS_A::VALUE4 + *self == Qsus::Value4 } } #[doc = "Field `QSUS` writer - Quadrature Mode Suspend Config"] -pub type QSUS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, QSUS_A>; -impl<'a, REG> QSUS_W<'a, REG> +pub type QsusW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Qsus>; +impl<'a, REG> QsusW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Suspend request ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(QSUS_A::VALUE1) + self.variant(Qsus::Value1) } #[doc = "Stop immediately"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(QSUS_A::VALUE2) + self.variant(Qsus::Value2) } #[doc = "Suspend in the next index occurrence"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(QSUS_A::VALUE3) + self.variant(Qsus::Value3) } #[doc = "Suspend in the next phase (PhaseA or PhaseB) occurrence"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(QSUS_A::VALUE4) + self.variant(Qsus::Value4) } } -#[doc = "Field `MSUS` reader - Multi-Channel Mode Suspend Config"] -pub type MSUS_R = crate::FieldReader; #[doc = "Multi-Channel Mode Suspend Config\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MSUS_A { +pub enum Msus { #[doc = "0: Suspend request ignored"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Stop immediately. Multi-Channel pattern is not set to the reset value."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Stop immediately. Multi-Channel pattern is set to the reset value."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MSUS_A) -> Self { + fn from(variant: Msus) -> Self { variant as _ } } -impl crate::FieldSpec for MSUS_A { +impl crate::FieldSpec for Msus { type Ux = u8; } -impl MSUS_R { +#[doc = "Field `MSUS` reader - Multi-Channel Mode Suspend Config"] +pub type MsusR = crate::FieldReader; +impl MsusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSUS_A { + pub const fn variant(&self) -> Msus { match self.bits { - 0 => MSUS_A::VALUE1, - 1 => MSUS_A::VALUE2, - 2 => MSUS_A::VALUE3, - 3 => MSUS_A::VALUE4, + 0 => Msus::Value1, + 1 => Msus::Value2, + 2 => Msus::Value3, + 3 => Msus::Value4, _ => unreachable!(), } } #[doc = "Suspend request ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSUS_A::VALUE1 + *self == Msus::Value1 } #[doc = "Stop immediately. Multi-Channel pattern is not set to the reset value."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSUS_A::VALUE2 + *self == Msus::Value2 } #[doc = "Stop immediately. Multi-Channel pattern is set to the reset value."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MSUS_A::VALUE3 + *self == Msus::Value3 } #[doc = "Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MSUS_A::VALUE4 + *self == Msus::Value4 } } #[doc = "Field `MSUS` writer - Multi-Channel Mode Suspend Config"] -pub type MSUS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MSUS_A>; -impl<'a, REG> MSUS_W<'a, REG> +pub type MsusW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Msus>; +impl<'a, REG> MsusW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,73 +154,64 @@ where #[doc = "Suspend request ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSUS_A::VALUE1) + self.variant(Msus::Value1) } #[doc = "Stop immediately. Multi-Channel pattern is not set to the reset value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSUS_A::VALUE2) + self.variant(Msus::Value2) } #[doc = "Stop immediately. Multi-Channel pattern is set to the reset value."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MSUS_A::VALUE3) + self.variant(Msus::Value3) } #[doc = "Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MSUS_A::VALUE4) + self.variant(Msus::Value4) } } impl R { #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"] #[inline(always)] - pub fn qsus(&self) -> QSUS_R { - QSUS_R::new((self.bits & 3) as u8) + pub fn qsus(&self) -> QsusR { + QsusR::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"] #[inline(always)] - pub fn msus(&self) -> MSUS_R { - MSUS_R::new(((self.bits >> 2) & 3) as u8) + pub fn msus(&self) -> MsusR { + MsusR::new(((self.bits >> 2) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"] #[inline(always)] #[must_use] - pub fn qsus(&mut self) -> QSUS_W { - QSUS_W::new(self, 0) + pub fn qsus(&mut self) -> QsusW { + QsusW::new(self, 0) } #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"] #[inline(always)] #[must_use] - pub fn msus(&mut self) -> MSUS_W { - MSUS_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn msus(&mut self) -> MsusW { + MsusW::new(self, 2) } } #[doc = "POSIF Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSUS_SPEC; -impl crate::RegisterSpec for PSUS_SPEC { +pub struct PsusSpec; +impl crate::RegisterSpec for PsusSpec { type Ux = u32; } #[doc = "`read()` method returns [`psus::R`](R) reader structure"] -impl crate::Readable for PSUS_SPEC {} +impl crate::Readable for PsusSpec {} #[doc = "`write(|w| ..)` method takes [`psus::W`](W) writer structure"] -impl crate::Writable for PSUS_SPEC { +impl crate::Writable for PsusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSUS to value 0"] -impl crate::Resettable for PSUS_SPEC { +impl crate::Resettable for PsusSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/qdc.rs b/src/posif0/qdc.rs index 206169ae..9f4daa37 100644 --- a/src/posif0/qdc.rs +++ b/src/posif0/qdc.rs @@ -1,218 +1,218 @@ #[doc = "Register `QDC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QDC` writer"] -pub type W = crate::W; -#[doc = "Field `PALS` reader - Phase A Level selector"] -pub type PALS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Phase A Level selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PALS_A { +pub enum Pals { #[doc = "0: Phase A is active HIGH"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Phase A is active LOW"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PALS_A) -> Self { + fn from(variant: Pals) -> Self { variant as u8 != 0 } } -impl PALS_R { +#[doc = "Field `PALS` reader - Phase A Level selector"] +pub type PalsR = crate::BitReader; +impl PalsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PALS_A { + pub const fn variant(&self) -> Pals { match self.bits { - false => PALS_A::VALUE1, - true => PALS_A::VALUE2, + false => Pals::Value1, + true => Pals::Value2, } } #[doc = "Phase A is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PALS_A::VALUE1 + *self == Pals::Value1 } #[doc = "Phase A is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PALS_A::VALUE2 + *self == Pals::Value2 } } #[doc = "Field `PALS` writer - Phase A Level selector"] -pub type PALS_W<'a, REG> = crate::BitWriter<'a, REG, PALS_A>; -impl<'a, REG> PALS_W<'a, REG> +pub type PalsW<'a, REG> = crate::BitWriter<'a, REG, Pals>; +impl<'a, REG> PalsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase A is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PALS_A::VALUE1) + self.variant(Pals::Value1) } #[doc = "Phase A is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PALS_A::VALUE2) + self.variant(Pals::Value2) } } -#[doc = "Field `PBLS` reader - Phase B Level selector"] -pub type PBLS_R = crate::BitReader; #[doc = "Phase B Level selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PBLS_A { +pub enum Pbls { #[doc = "0: Phase B is active HIGH"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Phase B is active LOW"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PBLS_A) -> Self { + fn from(variant: Pbls) -> Self { variant as u8 != 0 } } -impl PBLS_R { +#[doc = "Field `PBLS` reader - Phase B Level selector"] +pub type PblsR = crate::BitReader; +impl PblsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PBLS_A { + pub const fn variant(&self) -> Pbls { match self.bits { - false => PBLS_A::VALUE1, - true => PBLS_A::VALUE2, + false => Pbls::Value1, + true => Pbls::Value2, } } #[doc = "Phase B is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PBLS_A::VALUE1 + *self == Pbls::Value1 } #[doc = "Phase B is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PBLS_A::VALUE2 + *self == Pbls::Value2 } } #[doc = "Field `PBLS` writer - Phase B Level selector"] -pub type PBLS_W<'a, REG> = crate::BitWriter<'a, REG, PBLS_A>; -impl<'a, REG> PBLS_W<'a, REG> +pub type PblsW<'a, REG> = crate::BitWriter<'a, REG, Pbls>; +impl<'a, REG> PblsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase B is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PBLS_A::VALUE1) + self.variant(Pbls::Value1) } #[doc = "Phase B is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PBLS_A::VALUE2) + self.variant(Pbls::Value2) } } -#[doc = "Field `PHS` reader - Phase signals swap"] -pub type PHS_R = crate::BitReader; #[doc = "Phase signals swap\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PHS_A { +pub enum Phs { #[doc = "0: Phase A is the leading signal for clockwise rotation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Phase B is the leading signal for clockwise rotation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PHS_A) -> Self { + fn from(variant: Phs) -> Self { variant as u8 != 0 } } -impl PHS_R { +#[doc = "Field `PHS` reader - Phase signals swap"] +pub type PhsR = crate::BitReader; +impl PhsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PHS_A { + pub const fn variant(&self) -> Phs { match self.bits { - false => PHS_A::VALUE1, - true => PHS_A::VALUE2, + false => Phs::Value1, + true => Phs::Value2, } } #[doc = "Phase A is the leading signal for clockwise rotation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PHS_A::VALUE1 + *self == Phs::Value1 } #[doc = "Phase B is the leading signal for clockwise rotation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PHS_A::VALUE2 + *self == Phs::Value2 } } #[doc = "Field `PHS` writer - Phase signals swap"] -pub type PHS_W<'a, REG> = crate::BitWriter<'a, REG, PHS_A>; -impl<'a, REG> PHS_W<'a, REG> +pub type PhsW<'a, REG> = crate::BitWriter<'a, REG, Phs>; +impl<'a, REG> PhsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase A is the leading signal for clockwise rotation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PHS_A::VALUE1) + self.variant(Phs::Value1) } #[doc = "Phase B is the leading signal for clockwise rotation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PHS_A::VALUE2) + self.variant(Phs::Value2) } } -#[doc = "Field `ICM` reader - Index Marker generations control"] -pub type ICM_R = crate::FieldReader; #[doc = "Index Marker generations control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICM_A { +pub enum Icm { #[doc = "0: No index marker generation on POSIFx.OUT3"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Only first index occurrence generated on POSIFx.OUT3"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: All index occurrences generated on POSIFx.OUT3"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICM_A) -> Self { + fn from(variant: Icm) -> Self { variant as _ } } -impl crate::FieldSpec for ICM_A { +impl crate::FieldSpec for Icm { type Ux = u8; } -impl ICM_R { +#[doc = "Field `ICM` reader - Index Marker generations control"] +pub type IcmR = crate::FieldReader; +impl IcmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ICM_A::VALUE1), - 1 => Some(ICM_A::VALUE2), - 2 => Some(ICM_A::VALUE3), + 0 => Some(Icm::Value1), + 1 => Some(Icm::Value2), + 2 => Some(Icm::Value3), _ => None, } } #[doc = "No index marker generation on POSIFx.OUT3"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ICM_A::VALUE1 + *self == Icm::Value1 } #[doc = "Only first index occurrence generated on POSIFx.OUT3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ICM_A::VALUE2 + *self == Icm::Value2 } #[doc = "All index occurrences generated on POSIFx.OUT3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ICM_A::VALUE3 + *self == Icm::Value3 } } #[doc = "Field `ICM` writer - Index Marker generations control"] -pub type ICM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ICM_A>; -impl<'a, REG> ICM_W<'a, REG> +pub type IcmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icm>; +impl<'a, REG> IcmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -220,131 +220,122 @@ where #[doc = "No index marker generation on POSIFx.OUT3"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ICM_A::VALUE1) + self.variant(Icm::Value1) } #[doc = "Only first index occurrence generated on POSIFx.OUT3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ICM_A::VALUE2) + self.variant(Icm::Value2) } #[doc = "All index occurrences generated on POSIFx.OUT3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ICM_A::VALUE3) + self.variant(Icm::Value3) } } -#[doc = "Field `DVAL` reader - Current rotation direction"] -pub type DVAL_R = crate::BitReader; #[doc = "Current rotation direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DVAL_A { +pub enum Dval { #[doc = "0: Counterclockwise rotation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clockwise rotation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DVAL_A) -> Self { + fn from(variant: Dval) -> Self { variant as u8 != 0 } } -impl DVAL_R { +#[doc = "Field `DVAL` reader - Current rotation direction"] +pub type DvalR = crate::BitReader; +impl DvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DVAL_A { + pub const fn variant(&self) -> Dval { match self.bits { - false => DVAL_A::VALUE1, - true => DVAL_A::VALUE2, + false => Dval::Value1, + true => Dval::Value2, } } #[doc = "Counterclockwise rotation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DVAL_A::VALUE1 + *self == Dval::Value1 } #[doc = "Clockwise rotation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DVAL_A::VALUE2 + *self == Dval::Value2 } } impl R { #[doc = "Bit 0 - Phase A Level selector"] #[inline(always)] - pub fn pals(&self) -> PALS_R { - PALS_R::new((self.bits & 1) != 0) + pub fn pals(&self) -> PalsR { + PalsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Phase B Level selector"] #[inline(always)] - pub fn pbls(&self) -> PBLS_R { - PBLS_R::new(((self.bits >> 1) & 1) != 0) + pub fn pbls(&self) -> PblsR { + PblsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Phase signals swap"] #[inline(always)] - pub fn phs(&self) -> PHS_R { - PHS_R::new(((self.bits >> 2) & 1) != 0) + pub fn phs(&self) -> PhsR { + PhsR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:5 - Index Marker generations control"] #[inline(always)] - pub fn icm(&self) -> ICM_R { - ICM_R::new(((self.bits >> 4) & 3) as u8) + pub fn icm(&self) -> IcmR { + IcmR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 8 - Current rotation direction"] #[inline(always)] - pub fn dval(&self) -> DVAL_R { - DVAL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dval(&self) -> DvalR { + DvalR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Phase A Level selector"] #[inline(always)] #[must_use] - pub fn pals(&mut self) -> PALS_W { - PALS_W::new(self, 0) + pub fn pals(&mut self) -> PalsW { + PalsW::new(self, 0) } #[doc = "Bit 1 - Phase B Level selector"] #[inline(always)] #[must_use] - pub fn pbls(&mut self) -> PBLS_W { - PBLS_W::new(self, 1) + pub fn pbls(&mut self) -> PblsW { + PblsW::new(self, 1) } #[doc = "Bit 2 - Phase signals swap"] #[inline(always)] #[must_use] - pub fn phs(&mut self) -> PHS_W { - PHS_W::new(self, 2) + pub fn phs(&mut self) -> PhsW { + PhsW::new(self, 2) } #[doc = "Bits 4:5 - Index Marker generations control"] #[inline(always)] #[must_use] - pub fn icm(&mut self) -> ICM_W { - ICM_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn icm(&mut self) -> IcmW { + IcmW::new(self, 4) } } #[doc = "Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QDC_SPEC; -impl crate::RegisterSpec for QDC_SPEC { +pub struct QdcSpec; +impl crate::RegisterSpec for QdcSpec { type Ux = u32; } #[doc = "`read()` method returns [`qdc::R`](R) reader structure"] -impl crate::Readable for QDC_SPEC {} +impl crate::Readable for QdcSpec {} #[doc = "`write(|w| ..)` method takes [`qdc::W`](W) writer structure"] -impl crate::Writable for QDC_SPEC { +impl crate::Writable for QdcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QDC to value 0"] -impl crate::Resettable for QDC_SPEC { +impl crate::Resettable for QdcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/rpflg.rs b/src/posif0/rpflg.rs index 3be9290a..fd7d89eb 100644 --- a/src/posif0/rpflg.rs +++ b/src/posif0/rpflg.rs @@ -1,100 +1,91 @@ #[doc = "Register `RPFLG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RCHE` writer - Correct Hall Event flag clear"] -pub type RCHE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RcheW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWHE` writer - Wrong Hall Event flag clear"] -pub type RWHE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RwheW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RHIE` writer - Hall Inputs Update Event flag clear"] -pub type RHIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RhieW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RMST` writer - Multi-Channel Pattern shadow transfer flag clear"] -pub type RMST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RmstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RINDX` writer - Quadrature Index flag clear"] -pub type RINDX_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RindxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RERR` writer - Quadrature Phase Error flag clear"] -pub type RERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCNT` writer - Quadrature CLK flag clear"] -pub type RCNT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RcntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RDIR` writer - Quadrature Direction flag clear"] -pub type RDIR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RdirW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPCLK` writer - Quadrature period clock flag clear"] -pub type RPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpclkW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag clear"] #[inline(always)] #[must_use] - pub fn rche(&mut self) -> RCHE_W { - RCHE_W::new(self, 0) + pub fn rche(&mut self) -> RcheW { + RcheW::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag clear"] #[inline(always)] #[must_use] - pub fn rwhe(&mut self) -> RWHE_W { - RWHE_W::new(self, 1) + pub fn rwhe(&mut self) -> RwheW { + RwheW::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag clear"] #[inline(always)] #[must_use] - pub fn rhie(&mut self) -> RHIE_W { - RHIE_W::new(self, 2) + pub fn rhie(&mut self) -> RhieW { + RhieW::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag clear"] #[inline(always)] #[must_use] - pub fn rmst(&mut self) -> RMST_W { - RMST_W::new(self, 4) + pub fn rmst(&mut self) -> RmstW { + RmstW::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag clear"] #[inline(always)] #[must_use] - pub fn rindx(&mut self) -> RINDX_W { - RINDX_W::new(self, 8) + pub fn rindx(&mut self) -> RindxW { + RindxW::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag clear"] #[inline(always)] #[must_use] - pub fn rerr(&mut self) -> RERR_W { - RERR_W::new(self, 9) + pub fn rerr(&mut self) -> RerrW { + RerrW::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag clear"] #[inline(always)] #[must_use] - pub fn rcnt(&mut self) -> RCNT_W { - RCNT_W::new(self, 10) + pub fn rcnt(&mut self) -> RcntW { + RcntW::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag clear"] #[inline(always)] #[must_use] - pub fn rdir(&mut self) -> RDIR_W { - RDIR_W::new(self, 11) + pub fn rdir(&mut self) -> RdirW { + RdirW::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag clear"] #[inline(always)] #[must_use] - pub fn rpclk(&mut self) -> RPCLK_W { - RPCLK_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rpclk(&mut self) -> RpclkW { + RpclkW::new(self, 12) } } #[doc = "POSIF Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RPFLG_SPEC; -impl crate::RegisterSpec for RPFLG_SPEC { +pub struct RpflgSpec; +impl crate::RegisterSpec for RpflgSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rpflg::W`](W) writer structure"] -impl crate::Writable for RPFLG_SPEC { +impl crate::Writable for RpflgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RPFLG to value 0"] -impl crate::Resettable for RPFLG_SPEC { +impl crate::Resettable for RpflgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/spflg.rs b/src/posif0/spflg.rs index d861716e..7809425d 100644 --- a/src/posif0/spflg.rs +++ b/src/posif0/spflg.rs @@ -1,100 +1,91 @@ #[doc = "Register `SPFLG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SCHE` writer - Correct Hall Event flag set"] -pub type SCHE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ScheW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWHE` writer - Wrong Hall Event flag set"] -pub type SWHE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SwheW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHIE` writer - Hall Inputs Update Event flag set"] -pub type SHIE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ShieW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMST` writer - Multi-Channel Pattern shadow transfer flag set"] -pub type SMST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SmstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINDX` writer - Quadrature Index flag set"] -pub type SINDX_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SindxW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SERR` writer - Quadrature Phase Error flag set"] -pub type SERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SerrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCNT` writer - Quadrature CLK flag set"] -pub type SCNT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ScntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIR` writer - Quadrature Direction flag set"] -pub type SDIR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SdirW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPCLK` writer - Quadrature period clock flag set"] -pub type SPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SpclkW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag set"] #[inline(always)] #[must_use] - pub fn sche(&mut self) -> SCHE_W { - SCHE_W::new(self, 0) + pub fn sche(&mut self) -> ScheW { + ScheW::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag set"] #[inline(always)] #[must_use] - pub fn swhe(&mut self) -> SWHE_W { - SWHE_W::new(self, 1) + pub fn swhe(&mut self) -> SwheW { + SwheW::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag set"] #[inline(always)] #[must_use] - pub fn shie(&mut self) -> SHIE_W { - SHIE_W::new(self, 2) + pub fn shie(&mut self) -> ShieW { + ShieW::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag set"] #[inline(always)] #[must_use] - pub fn smst(&mut self) -> SMST_W { - SMST_W::new(self, 4) + pub fn smst(&mut self) -> SmstW { + SmstW::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag set"] #[inline(always)] #[must_use] - pub fn sindx(&mut self) -> SINDX_W { - SINDX_W::new(self, 8) + pub fn sindx(&mut self) -> SindxW { + SindxW::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag set"] #[inline(always)] #[must_use] - pub fn serr(&mut self) -> SERR_W { - SERR_W::new(self, 9) + pub fn serr(&mut self) -> SerrW { + SerrW::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag set"] #[inline(always)] #[must_use] - pub fn scnt(&mut self) -> SCNT_W { - SCNT_W::new(self, 10) + pub fn scnt(&mut self) -> ScntW { + ScntW::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag set"] #[inline(always)] #[must_use] - pub fn sdir(&mut self) -> SDIR_W { - SDIR_W::new(self, 11) + pub fn sdir(&mut self) -> SdirW { + SdirW::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag set"] #[inline(always)] #[must_use] - pub fn spclk(&mut self) -> SPCLK_W { - SPCLK_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn spclk(&mut self) -> SpclkW { + SpclkW::new(self, 12) } } #[doc = "POSIF Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SPFLG_SPEC; -impl crate::RegisterSpec for SPFLG_SPEC { +pub struct SpflgSpec; +impl crate::RegisterSpec for SpflgSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`spflg::W`](W) writer structure"] -impl crate::Writable for SPFLG_SPEC { +impl crate::Writable for SpflgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SPFLG to value 0"] -impl crate::Resettable for SPFLG_SPEC { +impl crate::Resettable for SpflgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb.rs b/src/ppb.rs index 42465e61..cac6babd 100644 --- a/src/ppb.rs +++ b/src/ppb.rs @@ -1,944 +1,1028 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x08], - actlr: ACTLR, + actlr: Actlr, _reserved1: [u8; 0x04], - syst_csr: SYST_CSR, - syst_rvr: SYST_RVR, - syst_cvr: SYST_CVR, - syst_calib: SYST_CALIB, + syst_csr: SystCsr, + syst_rvr: SystRvr, + syst_cvr: SystCvr, + syst_calib: SystCalib, _reserved5: [u8; 0xe0], - nvic_iser0: NVIC_ISER0, - nvic_iser1: NVIC_ISER1, - nvic_iser2: NVIC_ISER2, - nvic_iser3: NVIC_ISER3, + nvic_iser0: NvicIser0, + nvic_iser1: NvicIser1, + nvic_iser2: NvicIser2, + nvic_iser3: NvicIser3, _reserved9: [u8; 0x70], - nvic_icer0: NVIC_ICER0, - nvic_icer1: NVIC_ICER1, - nvic_icer2: NVIC_ICER2, - nvic_icer3: NVIC_ICER3, + nvic_icer0: NvicIcer0, + nvic_icer1: NvicIcer1, + nvic_icer2: NvicIcer2, + nvic_icer3: NvicIcer3, _reserved13: [u8; 0x70], - nvic_ispr0: NVIC_ISPR0, - nvic_ispr1: NVIC_ISPR1, - nvic_ispr2: NVIC_ISPR2, - nvic_ispr3: NVIC_ISPR3, + nvic_ispr0: NvicIspr0, + nvic_ispr1: NvicIspr1, + nvic_ispr2: NvicIspr2, + nvic_ispr3: NvicIspr3, _reserved17: [u8; 0x70], - nvic_icpr0: NVIC_ICPR0, - nvic_icpr1: NVIC_ICPR1, - nvic_icpr2: NVIC_ICPR2, - nvic_icpr3: NVIC_ICPR3, + nvic_icpr0: NvicIcpr0, + nvic_icpr1: NvicIcpr1, + nvic_icpr2: NvicIcpr2, + nvic_icpr3: NvicIcpr3, _reserved21: [u8; 0x70], - nvic_iabr0: NVIC_IABR0, - nvic_iabr1: NVIC_IABR1, - nvic_iabr2: NVIC_IABR2, - nvic_iabr3: NVIC_IABR3, + nvic_iabr0: NvicIabr0, + nvic_iabr1: NvicIabr1, + nvic_iabr2: NvicIabr2, + nvic_iabr3: NvicIabr3, _reserved25: [u8; 0xf0], - nvic_ipr0: NVIC_IPR0, - nvic_ipr1: NVIC_IPR1, - nvic_ipr2: NVIC_IPR2, - nvic_ipr3: NVIC_IPR3, - nvic_ipr4: NVIC_IPR4, - nvic_ipr5: NVIC_IPR5, - nvic_ipr6: NVIC_IPR6, - nvic_ipr7: NVIC_IPR7, - nvic_ipr8: NVIC_IPR8, - nvic_ipr9: NVIC_IPR9, - nvic_ipr10: NVIC_IPR10, - nvic_ipr11: NVIC_IPR11, - nvic_ipr12: NVIC_IPR12, - nvic_ipr13: NVIC_IPR13, - nvic_ipr14: NVIC_IPR14, - nvic_ipr15: NVIC_IPR15, - nvic_ipr16: NVIC_IPR16, - nvic_ipr17: NVIC_IPR17, - nvic_ipr18: NVIC_IPR18, - nvic_ipr19: NVIC_IPR19, - nvic_ipr20: NVIC_IPR20, - nvic_ipr21: NVIC_IPR21, - nvic_ipr22: NVIC_IPR22, - nvic_ipr23: NVIC_IPR23, - nvic_ipr24: NVIC_IPR24, - nvic_ipr25: NVIC_IPR25, - nvic_ipr26: NVIC_IPR26, - nvic_ipr27: NVIC_IPR27, + nvic_ipr0: NvicIpr0, + nvic_ipr1: NvicIpr1, + nvic_ipr2: NvicIpr2, + nvic_ipr3: NvicIpr3, + nvic_ipr4: NvicIpr4, + nvic_ipr5: NvicIpr5, + nvic_ipr6: NvicIpr6, + nvic_ipr7: NvicIpr7, + nvic_ipr8: NvicIpr8, + nvic_ipr9: NvicIpr9, + nvic_ipr10: NvicIpr10, + nvic_ipr11: NvicIpr11, + nvic_ipr12: NvicIpr12, + nvic_ipr13: NvicIpr13, + nvic_ipr14: NvicIpr14, + nvic_ipr15: NvicIpr15, + nvic_ipr16: NvicIpr16, + nvic_ipr17: NvicIpr17, + nvic_ipr18: NvicIpr18, + nvic_ipr19: NvicIpr19, + nvic_ipr20: NvicIpr20, + nvic_ipr21: NvicIpr21, + nvic_ipr22: NvicIpr22, + nvic_ipr23: NvicIpr23, + nvic_ipr24: NvicIpr24, + nvic_ipr25: NvicIpr25, + nvic_ipr26: NvicIpr26, + nvic_ipr27: NvicIpr27, _reserved53: [u8; 0x0890], - cpuid: CPUID, - icsr: ICSR, - vtor: VTOR, - aircr: AIRCR, - scr: SCR, - ccr: CCR, - shpr1: SHPR1, - shpr2: SHPR2, - shpr3: SHPR3, - shcsr: SHCSR, - cfsr: CFSR, - hfsr: HFSR, + cpuid: Cpuid, + icsr: Icsr, + vtor: Vtor, + aircr: Aircr, + scr: Scr, + ccr: Ccr, + shpr1: Shpr1, + shpr2: Shpr2, + shpr3: Shpr3, + shcsr: Shcsr, + cfsr: Cfsr, + hfsr: Hfsr, _reserved65: [u8; 0x04], - mmfar: MMFAR, - bfar: BFAR, - afsr: AFSR, + mmfar: Mmfar, + bfar: Bfar, + afsr: Afsr, _reserved68: [u8; 0x48], - cpacr: CPACR, + cpacr: Cpacr, _reserved69: [u8; 0x04], - mpu_type: MPU_TYPE, - mpu_ctrl: MPU_CTRL, - mpu_rnr: MPU_RNR, - mpu_rbar: MPU_RBAR, - mpu_rasr: MPU_RASR, - mpu_rbar_a1: MPU_RBAR_A1, - mpu_rasr_a1: MPU_RASR_A1, - mpu_rbar_a2: MPU_RBAR_A2, - mpu_rasr_a2: MPU_RASR_A2, - mpu_rbar_a3: MPU_RBAR_A3, - mpu_rasr_a3: MPU_RASR_A3, + mpu_type: MpuType, + mpu_ctrl: MpuCtrl, + mpu_rnr: MpuRnr, + mpu_rbar: MpuRbar, + mpu_rasr: MpuRasr, + mpu_rbar_a1: MpuRbarA1, + mpu_rasr_a1: MpuRasrA1, + mpu_rbar_a2: MpuRbarA2, + mpu_rasr_a2: MpuRasrA2, + mpu_rbar_a3: MpuRbarA3, + mpu_rasr_a3: MpuRasrA3, _reserved80: [u8; 0x0144], - stir: STIR, + stir: Stir, _reserved81: [u8; 0x30], - fpccr: FPCCR, - fpcar: FPCAR, - fpdscr: FPDSCR, + fpccr: Fpccr, + fpcar: Fpcar, + fpdscr: Fpdscr, } impl RegisterBlock { #[doc = "0x08 - Auxiliary Control Register"] #[inline(always)] - pub const fn actlr(&self) -> &ACTLR { + pub const fn actlr(&self) -> &Actlr { &self.actlr } #[doc = "0x10 - SysTick Control and Status Register"] #[inline(always)] - pub const fn syst_csr(&self) -> &SYST_CSR { + pub const fn syst_csr(&self) -> &SystCsr { &self.syst_csr } #[doc = "0x14 - SysTick Reload Value Register"] #[inline(always)] - pub const fn syst_rvr(&self) -> &SYST_RVR { + pub const fn syst_rvr(&self) -> &SystRvr { &self.syst_rvr } #[doc = "0x18 - SysTick Current Value Register"] #[inline(always)] - pub const fn syst_cvr(&self) -> &SYST_CVR { + pub const fn syst_cvr(&self) -> &SystCvr { &self.syst_cvr } #[doc = "0x1c - SysTick Calibration Value Register r"] #[inline(always)] - pub const fn syst_calib(&self) -> &SYST_CALIB { + pub const fn syst_calib(&self) -> &SystCalib { &self.syst_calib } #[doc = "0x100 - Interrupt Set-enable Register 0"] #[inline(always)] - pub const fn nvic_iser0(&self) -> &NVIC_ISER0 { + pub const fn nvic_iser0(&self) -> &NvicIser0 { &self.nvic_iser0 } #[doc = "0x104 - Interrupt Set-enable Register 1"] #[inline(always)] - pub const fn nvic_iser1(&self) -> &NVIC_ISER1 { + pub const fn nvic_iser1(&self) -> &NvicIser1 { &self.nvic_iser1 } #[doc = "0x108 - Interrupt Set-enable Register 2"] #[inline(always)] - pub const fn nvic_iser2(&self) -> &NVIC_ISER2 { + pub const fn nvic_iser2(&self) -> &NvicIser2 { &self.nvic_iser2 } #[doc = "0x10c - Interrupt Set-enable Register 3"] #[inline(always)] - pub const fn nvic_iser3(&self) -> &NVIC_ISER3 { + pub const fn nvic_iser3(&self) -> &NvicIser3 { &self.nvic_iser3 } #[doc = "0x180 - Interrupt Clear-enable Register 0"] #[inline(always)] - pub const fn nvic_icer0(&self) -> &NVIC_ICER0 { + pub const fn nvic_icer0(&self) -> &NvicIcer0 { &self.nvic_icer0 } #[doc = "0x184 - Interrupt Clear-enable Register 1"] #[inline(always)] - pub const fn nvic_icer1(&self) -> &NVIC_ICER1 { + pub const fn nvic_icer1(&self) -> &NvicIcer1 { &self.nvic_icer1 } #[doc = "0x188 - Interrupt Clear-enable Register 2"] #[inline(always)] - pub const fn nvic_icer2(&self) -> &NVIC_ICER2 { + pub const fn nvic_icer2(&self) -> &NvicIcer2 { &self.nvic_icer2 } #[doc = "0x18c - Interrupt Clear-enable Register 3"] #[inline(always)] - pub const fn nvic_icer3(&self) -> &NVIC_ICER3 { + pub const fn nvic_icer3(&self) -> &NvicIcer3 { &self.nvic_icer3 } #[doc = "0x200 - Interrupt Set-pending Register 0"] #[inline(always)] - pub const fn nvic_ispr0(&self) -> &NVIC_ISPR0 { + pub const fn nvic_ispr0(&self) -> &NvicIspr0 { &self.nvic_ispr0 } #[doc = "0x204 - Interrupt Set-pending Register 1"] #[inline(always)] - pub const fn nvic_ispr1(&self) -> &NVIC_ISPR1 { + pub const fn nvic_ispr1(&self) -> &NvicIspr1 { &self.nvic_ispr1 } #[doc = "0x208 - Interrupt Set-pending Register 2"] #[inline(always)] - pub const fn nvic_ispr2(&self) -> &NVIC_ISPR2 { + pub const fn nvic_ispr2(&self) -> &NvicIspr2 { &self.nvic_ispr2 } #[doc = "0x20c - Interrupt Set-pending Register 3"] #[inline(always)] - pub const fn nvic_ispr3(&self) -> &NVIC_ISPR3 { + pub const fn nvic_ispr3(&self) -> &NvicIspr3 { &self.nvic_ispr3 } #[doc = "0x280 - Interrupt Clear-pending Register 0"] #[inline(always)] - pub const fn nvic_icpr0(&self) -> &NVIC_ICPR0 { + pub const fn nvic_icpr0(&self) -> &NvicIcpr0 { &self.nvic_icpr0 } #[doc = "0x284 - Interrupt Clear-pending Register 1"] #[inline(always)] - pub const fn nvic_icpr1(&self) -> &NVIC_ICPR1 { + pub const fn nvic_icpr1(&self) -> &NvicIcpr1 { &self.nvic_icpr1 } #[doc = "0x288 - Interrupt Clear-pending Register 2"] #[inline(always)] - pub const fn nvic_icpr2(&self) -> &NVIC_ICPR2 { + pub const fn nvic_icpr2(&self) -> &NvicIcpr2 { &self.nvic_icpr2 } #[doc = "0x28c - Interrupt Clear-pending Register 3"] #[inline(always)] - pub const fn nvic_icpr3(&self) -> &NVIC_ICPR3 { + pub const fn nvic_icpr3(&self) -> &NvicIcpr3 { &self.nvic_icpr3 } #[doc = "0x300 - Interrupt Active Bit Register 0"] #[inline(always)] - pub const fn nvic_iabr0(&self) -> &NVIC_IABR0 { + pub const fn nvic_iabr0(&self) -> &NvicIabr0 { &self.nvic_iabr0 } #[doc = "0x304 - Interrupt Active Bit Register 1"] #[inline(always)] - pub const fn nvic_iabr1(&self) -> &NVIC_IABR1 { + pub const fn nvic_iabr1(&self) -> &NvicIabr1 { &self.nvic_iabr1 } #[doc = "0x308 - Interrupt Active Bit Register 2"] #[inline(always)] - pub const fn nvic_iabr2(&self) -> &NVIC_IABR2 { + pub const fn nvic_iabr2(&self) -> &NvicIabr2 { &self.nvic_iabr2 } #[doc = "0x30c - Interrupt Active Bit Register 3"] #[inline(always)] - pub const fn nvic_iabr3(&self) -> &NVIC_IABR3 { + pub const fn nvic_iabr3(&self) -> &NvicIabr3 { &self.nvic_iabr3 } #[doc = "0x400 - Interrupt Priority Register 0"] #[inline(always)] - pub const fn nvic_ipr0(&self) -> &NVIC_IPR0 { + pub const fn nvic_ipr0(&self) -> &NvicIpr0 { &self.nvic_ipr0 } #[doc = "0x404 - Interrupt Priority Register 1"] #[inline(always)] - pub const fn nvic_ipr1(&self) -> &NVIC_IPR1 { + pub const fn nvic_ipr1(&self) -> &NvicIpr1 { &self.nvic_ipr1 } #[doc = "0x408 - Interrupt Priority Register 2"] #[inline(always)] - pub const fn nvic_ipr2(&self) -> &NVIC_IPR2 { + pub const fn nvic_ipr2(&self) -> &NvicIpr2 { &self.nvic_ipr2 } #[doc = "0x40c - Interrupt Priority Register 3"] #[inline(always)] - pub const fn nvic_ipr3(&self) -> &NVIC_IPR3 { + pub const fn nvic_ipr3(&self) -> &NvicIpr3 { &self.nvic_ipr3 } #[doc = "0x410 - Interrupt Priority Register 4"] #[inline(always)] - pub const fn nvic_ipr4(&self) -> &NVIC_IPR4 { + pub const fn nvic_ipr4(&self) -> &NvicIpr4 { &self.nvic_ipr4 } #[doc = "0x414 - Interrupt Priority Register 5"] #[inline(always)] - pub const fn nvic_ipr5(&self) -> &NVIC_IPR5 { + pub const fn nvic_ipr5(&self) -> &NvicIpr5 { &self.nvic_ipr5 } #[doc = "0x418 - Interrupt Priority Register 6"] #[inline(always)] - pub const fn nvic_ipr6(&self) -> &NVIC_IPR6 { + pub const fn nvic_ipr6(&self) -> &NvicIpr6 { &self.nvic_ipr6 } #[doc = "0x41c - Interrupt Priority Register 7"] #[inline(always)] - pub const fn nvic_ipr7(&self) -> &NVIC_IPR7 { + pub const fn nvic_ipr7(&self) -> &NvicIpr7 { &self.nvic_ipr7 } #[doc = "0x420 - Interrupt Priority Register 8"] #[inline(always)] - pub const fn nvic_ipr8(&self) -> &NVIC_IPR8 { + pub const fn nvic_ipr8(&self) -> &NvicIpr8 { &self.nvic_ipr8 } #[doc = "0x424 - Interrupt Priority Register 9"] #[inline(always)] - pub const fn nvic_ipr9(&self) -> &NVIC_IPR9 { + pub const fn nvic_ipr9(&self) -> &NvicIpr9 { &self.nvic_ipr9 } #[doc = "0x428 - Interrupt Priority Register 10"] #[inline(always)] - pub const fn nvic_ipr10(&self) -> &NVIC_IPR10 { + pub const fn nvic_ipr10(&self) -> &NvicIpr10 { &self.nvic_ipr10 } #[doc = "0x42c - Interrupt Priority Register 11"] #[inline(always)] - pub const fn nvic_ipr11(&self) -> &NVIC_IPR11 { + pub const fn nvic_ipr11(&self) -> &NvicIpr11 { &self.nvic_ipr11 } #[doc = "0x430 - Interrupt Priority Register 12"] #[inline(always)] - pub const fn nvic_ipr12(&self) -> &NVIC_IPR12 { + pub const fn nvic_ipr12(&self) -> &NvicIpr12 { &self.nvic_ipr12 } #[doc = "0x434 - Interrupt Priority Register 13"] #[inline(always)] - pub const fn nvic_ipr13(&self) -> &NVIC_IPR13 { + pub const fn nvic_ipr13(&self) -> &NvicIpr13 { &self.nvic_ipr13 } #[doc = "0x438 - Interrupt Priority Register 14"] #[inline(always)] - pub const fn nvic_ipr14(&self) -> &NVIC_IPR14 { + pub const fn nvic_ipr14(&self) -> &NvicIpr14 { &self.nvic_ipr14 } #[doc = "0x43c - Interrupt Priority Register 15"] #[inline(always)] - pub const fn nvic_ipr15(&self) -> &NVIC_IPR15 { + pub const fn nvic_ipr15(&self) -> &NvicIpr15 { &self.nvic_ipr15 } #[doc = "0x440 - Interrupt Priority Register 16"] #[inline(always)] - pub const fn nvic_ipr16(&self) -> &NVIC_IPR16 { + pub const fn nvic_ipr16(&self) -> &NvicIpr16 { &self.nvic_ipr16 } #[doc = "0x444 - Interrupt Priority Register 17"] #[inline(always)] - pub const fn nvic_ipr17(&self) -> &NVIC_IPR17 { + pub const fn nvic_ipr17(&self) -> &NvicIpr17 { &self.nvic_ipr17 } #[doc = "0x448 - Interrupt Priority Register 18"] #[inline(always)] - pub const fn nvic_ipr18(&self) -> &NVIC_IPR18 { + pub const fn nvic_ipr18(&self) -> &NvicIpr18 { &self.nvic_ipr18 } #[doc = "0x44c - Interrupt Priority Register 19"] #[inline(always)] - pub const fn nvic_ipr19(&self) -> &NVIC_IPR19 { + pub const fn nvic_ipr19(&self) -> &NvicIpr19 { &self.nvic_ipr19 } #[doc = "0x450 - Interrupt Priority Register 20"] #[inline(always)] - pub const fn nvic_ipr20(&self) -> &NVIC_IPR20 { + pub const fn nvic_ipr20(&self) -> &NvicIpr20 { &self.nvic_ipr20 } #[doc = "0x454 - Interrupt Priority Register 21"] #[inline(always)] - pub const fn nvic_ipr21(&self) -> &NVIC_IPR21 { + pub const fn nvic_ipr21(&self) -> &NvicIpr21 { &self.nvic_ipr21 } #[doc = "0x458 - Interrupt Priority Register 22"] #[inline(always)] - pub const fn nvic_ipr22(&self) -> &NVIC_IPR22 { + pub const fn nvic_ipr22(&self) -> &NvicIpr22 { &self.nvic_ipr22 } #[doc = "0x45c - Interrupt Priority Register 23"] #[inline(always)] - pub const fn nvic_ipr23(&self) -> &NVIC_IPR23 { + pub const fn nvic_ipr23(&self) -> &NvicIpr23 { &self.nvic_ipr23 } #[doc = "0x460 - Interrupt Priority Register 24"] #[inline(always)] - pub const fn nvic_ipr24(&self) -> &NVIC_IPR24 { + pub const fn nvic_ipr24(&self) -> &NvicIpr24 { &self.nvic_ipr24 } #[doc = "0x464 - Interrupt Priority Register 25"] #[inline(always)] - pub const fn nvic_ipr25(&self) -> &NVIC_IPR25 { + pub const fn nvic_ipr25(&self) -> &NvicIpr25 { &self.nvic_ipr25 } #[doc = "0x468 - Interrupt Priority Register 26"] #[inline(always)] - pub const fn nvic_ipr26(&self) -> &NVIC_IPR26 { + pub const fn nvic_ipr26(&self) -> &NvicIpr26 { &self.nvic_ipr26 } #[doc = "0x46c - Interrupt Priority Register 27"] #[inline(always)] - pub const fn nvic_ipr27(&self) -> &NVIC_IPR27 { + pub const fn nvic_ipr27(&self) -> &NvicIpr27 { &self.nvic_ipr27 } #[doc = "0xd00 - CPUID Base Register"] #[inline(always)] - pub const fn cpuid(&self) -> &CPUID { + pub const fn cpuid(&self) -> &Cpuid { &self.cpuid } #[doc = "0xd04 - Interrupt Control and State Register"] #[inline(always)] - pub const fn icsr(&self) -> &ICSR { + pub const fn icsr(&self) -> &Icsr { &self.icsr } #[doc = "0xd08 - Vector Table Offset Register"] #[inline(always)] - pub const fn vtor(&self) -> &VTOR { + pub const fn vtor(&self) -> &Vtor { &self.vtor } #[doc = "0xd0c - Application Interrupt and Reset Control Register"] #[inline(always)] - pub const fn aircr(&self) -> &AIRCR { + pub const fn aircr(&self) -> &Aircr { &self.aircr } #[doc = "0xd10 - System Control Register"] #[inline(always)] - pub const fn scr(&self) -> &SCR { + pub const fn scr(&self) -> &Scr { &self.scr } #[doc = "0xd14 - Configuration and Control Register"] #[inline(always)] - pub const fn ccr(&self) -> &CCR { + pub const fn ccr(&self) -> &Ccr { &self.ccr } #[doc = "0xd18 - System Handler Priority Register 1"] #[inline(always)] - pub const fn shpr1(&self) -> &SHPR1 { + pub const fn shpr1(&self) -> &Shpr1 { &self.shpr1 } #[doc = "0xd1c - System Handler Priority Register 2"] #[inline(always)] - pub const fn shpr2(&self) -> &SHPR2 { + pub const fn shpr2(&self) -> &Shpr2 { &self.shpr2 } #[doc = "0xd20 - System Handler Priority Register 3"] #[inline(always)] - pub const fn shpr3(&self) -> &SHPR3 { + pub const fn shpr3(&self) -> &Shpr3 { &self.shpr3 } #[doc = "0xd24 - System Handler Control and State Register"] #[inline(always)] - pub const fn shcsr(&self) -> &SHCSR { + pub const fn shcsr(&self) -> &Shcsr { &self.shcsr } #[doc = "0xd28 - Configurable Fault Status Register"] #[inline(always)] - pub const fn cfsr(&self) -> &CFSR { + pub const fn cfsr(&self) -> &Cfsr { &self.cfsr } #[doc = "0xd2c - HardFault Status Register"] #[inline(always)] - pub const fn hfsr(&self) -> &HFSR { + pub const fn hfsr(&self) -> &Hfsr { &self.hfsr } #[doc = "0xd34 - MemManage Fault Address Register"] #[inline(always)] - pub const fn mmfar(&self) -> &MMFAR { + pub const fn mmfar(&self) -> &Mmfar { &self.mmfar } #[doc = "0xd38 - BusFault Address Register"] #[inline(always)] - pub const fn bfar(&self) -> &BFAR { + pub const fn bfar(&self) -> &Bfar { &self.bfar } #[doc = "0xd3c - Auxiliary Fault Status Register"] #[inline(always)] - pub const fn afsr(&self) -> &AFSR { + pub const fn afsr(&self) -> &Afsr { &self.afsr } #[doc = "0xd88 - Coprocessor Access Control Register"] #[inline(always)] - pub const fn cpacr(&self) -> &CPACR { + pub const fn cpacr(&self) -> &Cpacr { &self.cpacr } #[doc = "0xd90 - MPU Type Register"] #[inline(always)] - pub const fn mpu_type(&self) -> &MPU_TYPE { + pub const fn mpu_type(&self) -> &MpuType { &self.mpu_type } #[doc = "0xd94 - MPU Control Register"] #[inline(always)] - pub const fn mpu_ctrl(&self) -> &MPU_CTRL { + pub const fn mpu_ctrl(&self) -> &MpuCtrl { &self.mpu_ctrl } #[doc = "0xd98 - MPU Region Number Register"] #[inline(always)] - pub const fn mpu_rnr(&self) -> &MPU_RNR { + pub const fn mpu_rnr(&self) -> &MpuRnr { &self.mpu_rnr } #[doc = "0xd9c - MPU Region Base Address Register"] #[inline(always)] - pub const fn mpu_rbar(&self) -> &MPU_RBAR { + pub const fn mpu_rbar(&self) -> &MpuRbar { &self.mpu_rbar } #[doc = "0xda0 - MPU Region Attribute and Size Register"] #[inline(always)] - pub const fn mpu_rasr(&self) -> &MPU_RASR { + pub const fn mpu_rasr(&self) -> &MpuRasr { &self.mpu_rasr } #[doc = "0xda4 - MPU Region Base Address Register A1"] #[inline(always)] - pub const fn mpu_rbar_a1(&self) -> &MPU_RBAR_A1 { + pub const fn mpu_rbar_a1(&self) -> &MpuRbarA1 { &self.mpu_rbar_a1 } #[doc = "0xda8 - MPU Region Attribute and Size Register A1"] #[inline(always)] - pub const fn mpu_rasr_a1(&self) -> &MPU_RASR_A1 { + pub const fn mpu_rasr_a1(&self) -> &MpuRasrA1 { &self.mpu_rasr_a1 } #[doc = "0xdac - MPU Region Base Address Register A2"] #[inline(always)] - pub const fn mpu_rbar_a2(&self) -> &MPU_RBAR_A2 { + pub const fn mpu_rbar_a2(&self) -> &MpuRbarA2 { &self.mpu_rbar_a2 } #[doc = "0xdb0 - MPU Region Attribute and Size Register A2"] #[inline(always)] - pub const fn mpu_rasr_a2(&self) -> &MPU_RASR_A2 { + pub const fn mpu_rasr_a2(&self) -> &MpuRasrA2 { &self.mpu_rasr_a2 } #[doc = "0xdb4 - MPU Region Base Address Register A3"] #[inline(always)] - pub const fn mpu_rbar_a3(&self) -> &MPU_RBAR_A3 { + pub const fn mpu_rbar_a3(&self) -> &MpuRbarA3 { &self.mpu_rbar_a3 } #[doc = "0xdb8 - MPU Region Attribute and Size Register A3"] #[inline(always)] - pub const fn mpu_rasr_a3(&self) -> &MPU_RASR_A3 { + pub const fn mpu_rasr_a3(&self) -> &MpuRasrA3 { &self.mpu_rasr_a3 } #[doc = "0xf00 - Software Trigger Interrupt Register"] #[inline(always)] - pub const fn stir(&self) -> &STIR { + pub const fn stir(&self) -> &Stir { &self.stir } #[doc = "0xf34 - Floating-point Context Control Register"] #[inline(always)] - pub const fn fpccr(&self) -> &FPCCR { + pub const fn fpccr(&self) -> &Fpccr { &self.fpccr } #[doc = "0xf38 - Floating-point Context Address Register"] #[inline(always)] - pub const fn fpcar(&self) -> &FPCAR { + pub const fn fpcar(&self) -> &Fpcar { &self.fpcar } #[doc = "0xf3c - Floating-point Default Status Control Register"] #[inline(always)] - pub const fn fpdscr(&self) -> &FPDSCR { + pub const fn fpdscr(&self) -> &Fpdscr { &self.fpdscr } } #[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`] module"] -pub type ACTLR = crate::Reg; +#[doc(alias = "ACTLR")] +pub type Actlr = crate::Reg; #[doc = "Auxiliary Control Register"] pub mod actlr; #[doc = "SYST_CSR (rw) register accessor: SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_csr`] module"] -pub type SYST_CSR = crate::Reg; +#[doc(alias = "SYST_CSR")] +pub type SystCsr = crate::Reg; #[doc = "SysTick Control and Status Register"] pub mod syst_csr; #[doc = "SYST_RVR (rw) register accessor: SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_rvr`] module"] -pub type SYST_RVR = crate::Reg; +#[doc(alias = "SYST_RVR")] +pub type SystRvr = crate::Reg; #[doc = "SysTick Reload Value Register"] pub mod syst_rvr; #[doc = "SYST_CVR (rw) register accessor: SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_cvr`] module"] -pub type SYST_CVR = crate::Reg; +#[doc(alias = "SYST_CVR")] +pub type SystCvr = crate::Reg; #[doc = "SysTick Current Value Register"] pub mod syst_cvr; #[doc = "SYST_CALIB (rw) register accessor: SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_calib`] module"] -pub type SYST_CALIB = crate::Reg; +#[doc(alias = "SYST_CALIB")] +pub type SystCalib = crate::Reg; #[doc = "SysTick Calibration Value Register r"] pub mod syst_calib; #[doc = "NVIC_ISER0 (rw) register accessor: Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser0`] module"] -pub type NVIC_ISER0 = crate::Reg; +#[doc(alias = "NVIC_ISER0")] +pub type NvicIser0 = crate::Reg; #[doc = "Interrupt Set-enable Register 0"] pub mod nvic_iser0; #[doc = "NVIC_ISER1 (rw) register accessor: Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser1`] module"] -pub type NVIC_ISER1 = crate::Reg; +#[doc(alias = "NVIC_ISER1")] +pub type NvicIser1 = crate::Reg; #[doc = "Interrupt Set-enable Register 1"] pub mod nvic_iser1; #[doc = "NVIC_ISER2 (rw) register accessor: Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser2`] module"] -pub type NVIC_ISER2 = crate::Reg; +#[doc(alias = "NVIC_ISER2")] +pub type NvicIser2 = crate::Reg; #[doc = "Interrupt Set-enable Register 2"] pub mod nvic_iser2; #[doc = "NVIC_ISER3 (rw) register accessor: Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser3`] module"] -pub type NVIC_ISER3 = crate::Reg; +#[doc(alias = "NVIC_ISER3")] +pub type NvicIser3 = crate::Reg; #[doc = "Interrupt Set-enable Register 3"] pub mod nvic_iser3; #[doc = "NVIC_ICER0 (rw) register accessor: Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer0`] module"] -pub type NVIC_ICER0 = crate::Reg; +#[doc(alias = "NVIC_ICER0")] +pub type NvicIcer0 = crate::Reg; #[doc = "Interrupt Clear-enable Register 0"] pub mod nvic_icer0; #[doc = "NVIC_ICER1 (rw) register accessor: Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer1`] module"] -pub type NVIC_ICER1 = crate::Reg; +#[doc(alias = "NVIC_ICER1")] +pub type NvicIcer1 = crate::Reg; #[doc = "Interrupt Clear-enable Register 1"] pub mod nvic_icer1; #[doc = "NVIC_ICER2 (rw) register accessor: Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer2`] module"] -pub type NVIC_ICER2 = crate::Reg; +#[doc(alias = "NVIC_ICER2")] +pub type NvicIcer2 = crate::Reg; #[doc = "Interrupt Clear-enable Register 2"] pub mod nvic_icer2; #[doc = "NVIC_ICER3 (rw) register accessor: Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer3`] module"] -pub type NVIC_ICER3 = crate::Reg; +#[doc(alias = "NVIC_ICER3")] +pub type NvicIcer3 = crate::Reg; #[doc = "Interrupt Clear-enable Register 3"] pub mod nvic_icer3; #[doc = "NVIC_ISPR0 (rw) register accessor: Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr0`] module"] -pub type NVIC_ISPR0 = crate::Reg; +#[doc(alias = "NVIC_ISPR0")] +pub type NvicIspr0 = crate::Reg; #[doc = "Interrupt Set-pending Register 0"] pub mod nvic_ispr0; #[doc = "NVIC_ISPR1 (rw) register accessor: Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr1`] module"] -pub type NVIC_ISPR1 = crate::Reg; +#[doc(alias = "NVIC_ISPR1")] +pub type NvicIspr1 = crate::Reg; #[doc = "Interrupt Set-pending Register 1"] pub mod nvic_ispr1; #[doc = "NVIC_ISPR2 (rw) register accessor: Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr2`] module"] -pub type NVIC_ISPR2 = crate::Reg; +#[doc(alias = "NVIC_ISPR2")] +pub type NvicIspr2 = crate::Reg; #[doc = "Interrupt Set-pending Register 2"] pub mod nvic_ispr2; #[doc = "NVIC_ISPR3 (rw) register accessor: Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr3`] module"] -pub type NVIC_ISPR3 = crate::Reg; +#[doc(alias = "NVIC_ISPR3")] +pub type NvicIspr3 = crate::Reg; #[doc = "Interrupt Set-pending Register 3"] pub mod nvic_ispr3; #[doc = "NVIC_ICPR0 (rw) register accessor: Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr0`] module"] -pub type NVIC_ICPR0 = crate::Reg; +#[doc(alias = "NVIC_ICPR0")] +pub type NvicIcpr0 = crate::Reg; #[doc = "Interrupt Clear-pending Register 0"] pub mod nvic_icpr0; #[doc = "NVIC_ICPR1 (rw) register accessor: Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr1`] module"] -pub type NVIC_ICPR1 = crate::Reg; +#[doc(alias = "NVIC_ICPR1")] +pub type NvicIcpr1 = crate::Reg; #[doc = "Interrupt Clear-pending Register 1"] pub mod nvic_icpr1; #[doc = "NVIC_ICPR2 (rw) register accessor: Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr2`] module"] -pub type NVIC_ICPR2 = crate::Reg; +#[doc(alias = "NVIC_ICPR2")] +pub type NvicIcpr2 = crate::Reg; #[doc = "Interrupt Clear-pending Register 2"] pub mod nvic_icpr2; #[doc = "NVIC_ICPR3 (rw) register accessor: Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr3`] module"] -pub type NVIC_ICPR3 = crate::Reg; +#[doc(alias = "NVIC_ICPR3")] +pub type NvicIcpr3 = crate::Reg; #[doc = "Interrupt Clear-pending Register 3"] pub mod nvic_icpr3; #[doc = "NVIC_IABR0 (rw) register accessor: Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr0`] module"] -pub type NVIC_IABR0 = crate::Reg; +#[doc(alias = "NVIC_IABR0")] +pub type NvicIabr0 = crate::Reg; #[doc = "Interrupt Active Bit Register 0"] pub mod nvic_iabr0; #[doc = "NVIC_IABR1 (rw) register accessor: Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr1`] module"] -pub type NVIC_IABR1 = crate::Reg; +#[doc(alias = "NVIC_IABR1")] +pub type NvicIabr1 = crate::Reg; #[doc = "Interrupt Active Bit Register 1"] pub mod nvic_iabr1; #[doc = "NVIC_IABR2 (rw) register accessor: Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr2`] module"] -pub type NVIC_IABR2 = crate::Reg; +#[doc(alias = "NVIC_IABR2")] +pub type NvicIabr2 = crate::Reg; #[doc = "Interrupt Active Bit Register 2"] pub mod nvic_iabr2; #[doc = "NVIC_IABR3 (rw) register accessor: Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr3`] module"] -pub type NVIC_IABR3 = crate::Reg; +#[doc(alias = "NVIC_IABR3")] +pub type NvicIabr3 = crate::Reg; #[doc = "Interrupt Active Bit Register 3"] pub mod nvic_iabr3; #[doc = "NVIC_IPR0 (rw) register accessor: Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr0`] module"] -pub type NVIC_IPR0 = crate::Reg; +#[doc(alias = "NVIC_IPR0")] +pub type NvicIpr0 = crate::Reg; #[doc = "Interrupt Priority Register 0"] pub mod nvic_ipr0; #[doc = "NVIC_IPR1 (rw) register accessor: Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr1`] module"] -pub type NVIC_IPR1 = crate::Reg; +#[doc(alias = "NVIC_IPR1")] +pub type NvicIpr1 = crate::Reg; #[doc = "Interrupt Priority Register 1"] pub mod nvic_ipr1; #[doc = "NVIC_IPR2 (rw) register accessor: Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr2`] module"] -pub type NVIC_IPR2 = crate::Reg; +#[doc(alias = "NVIC_IPR2")] +pub type NvicIpr2 = crate::Reg; #[doc = "Interrupt Priority Register 2"] pub mod nvic_ipr2; #[doc = "NVIC_IPR3 (rw) register accessor: Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr3`] module"] -pub type NVIC_IPR3 = crate::Reg; +#[doc(alias = "NVIC_IPR3")] +pub type NvicIpr3 = crate::Reg; #[doc = "Interrupt Priority Register 3"] pub mod nvic_ipr3; #[doc = "NVIC_IPR4 (rw) register accessor: Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr4`] module"] -pub type NVIC_IPR4 = crate::Reg; +#[doc(alias = "NVIC_IPR4")] +pub type NvicIpr4 = crate::Reg; #[doc = "Interrupt Priority Register 4"] pub mod nvic_ipr4; #[doc = "NVIC_IPR5 (rw) register accessor: Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr5`] module"] -pub type NVIC_IPR5 = crate::Reg; +#[doc(alias = "NVIC_IPR5")] +pub type NvicIpr5 = crate::Reg; #[doc = "Interrupt Priority Register 5"] pub mod nvic_ipr5; #[doc = "NVIC_IPR6 (rw) register accessor: Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr6`] module"] -pub type NVIC_IPR6 = crate::Reg; +#[doc(alias = "NVIC_IPR6")] +pub type NvicIpr6 = crate::Reg; #[doc = "Interrupt Priority Register 6"] pub mod nvic_ipr6; #[doc = "NVIC_IPR7 (rw) register accessor: Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr7`] module"] -pub type NVIC_IPR7 = crate::Reg; +#[doc(alias = "NVIC_IPR7")] +pub type NvicIpr7 = crate::Reg; #[doc = "Interrupt Priority Register 7"] pub mod nvic_ipr7; #[doc = "NVIC_IPR8 (rw) register accessor: Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr8`] module"] -pub type NVIC_IPR8 = crate::Reg; +#[doc(alias = "NVIC_IPR8")] +pub type NvicIpr8 = crate::Reg; #[doc = "Interrupt Priority Register 8"] pub mod nvic_ipr8; #[doc = "NVIC_IPR9 (rw) register accessor: Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr9`] module"] -pub type NVIC_IPR9 = crate::Reg; +#[doc(alias = "NVIC_IPR9")] +pub type NvicIpr9 = crate::Reg; #[doc = "Interrupt Priority Register 9"] pub mod nvic_ipr9; #[doc = "NVIC_IPR10 (rw) register accessor: Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr10`] module"] -pub type NVIC_IPR10 = crate::Reg; +#[doc(alias = "NVIC_IPR10")] +pub type NvicIpr10 = crate::Reg; #[doc = "Interrupt Priority Register 10"] pub mod nvic_ipr10; #[doc = "NVIC_IPR11 (rw) register accessor: Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr11`] module"] -pub type NVIC_IPR11 = crate::Reg; +#[doc(alias = "NVIC_IPR11")] +pub type NvicIpr11 = crate::Reg; #[doc = "Interrupt Priority Register 11"] pub mod nvic_ipr11; #[doc = "NVIC_IPR12 (rw) register accessor: Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr12`] module"] -pub type NVIC_IPR12 = crate::Reg; +#[doc(alias = "NVIC_IPR12")] +pub type NvicIpr12 = crate::Reg; #[doc = "Interrupt Priority Register 12"] pub mod nvic_ipr12; #[doc = "NVIC_IPR13 (rw) register accessor: Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr13`] module"] -pub type NVIC_IPR13 = crate::Reg; +#[doc(alias = "NVIC_IPR13")] +pub type NvicIpr13 = crate::Reg; #[doc = "Interrupt Priority Register 13"] pub mod nvic_ipr13; #[doc = "NVIC_IPR14 (rw) register accessor: Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr14`] module"] -pub type NVIC_IPR14 = crate::Reg; +#[doc(alias = "NVIC_IPR14")] +pub type NvicIpr14 = crate::Reg; #[doc = "Interrupt Priority Register 14"] pub mod nvic_ipr14; #[doc = "NVIC_IPR15 (rw) register accessor: Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr15`] module"] -pub type NVIC_IPR15 = crate::Reg; +#[doc(alias = "NVIC_IPR15")] +pub type NvicIpr15 = crate::Reg; #[doc = "Interrupt Priority Register 15"] pub mod nvic_ipr15; #[doc = "NVIC_IPR16 (rw) register accessor: Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr16`] module"] -pub type NVIC_IPR16 = crate::Reg; +#[doc(alias = "NVIC_IPR16")] +pub type NvicIpr16 = crate::Reg; #[doc = "Interrupt Priority Register 16"] pub mod nvic_ipr16; #[doc = "NVIC_IPR17 (rw) register accessor: Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr17`] module"] -pub type NVIC_IPR17 = crate::Reg; +#[doc(alias = "NVIC_IPR17")] +pub type NvicIpr17 = crate::Reg; #[doc = "Interrupt Priority Register 17"] pub mod nvic_ipr17; #[doc = "NVIC_IPR18 (rw) register accessor: Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr18`] module"] -pub type NVIC_IPR18 = crate::Reg; +#[doc(alias = "NVIC_IPR18")] +pub type NvicIpr18 = crate::Reg; #[doc = "Interrupt Priority Register 18"] pub mod nvic_ipr18; #[doc = "NVIC_IPR19 (rw) register accessor: Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr19`] module"] -pub type NVIC_IPR19 = crate::Reg; +#[doc(alias = "NVIC_IPR19")] +pub type NvicIpr19 = crate::Reg; #[doc = "Interrupt Priority Register 19"] pub mod nvic_ipr19; #[doc = "NVIC_IPR20 (rw) register accessor: Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr20`] module"] -pub type NVIC_IPR20 = crate::Reg; +#[doc(alias = "NVIC_IPR20")] +pub type NvicIpr20 = crate::Reg; #[doc = "Interrupt Priority Register 20"] pub mod nvic_ipr20; #[doc = "NVIC_IPR21 (rw) register accessor: Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr21`] module"] -pub type NVIC_IPR21 = crate::Reg; +#[doc(alias = "NVIC_IPR21")] +pub type NvicIpr21 = crate::Reg; #[doc = "Interrupt Priority Register 21"] pub mod nvic_ipr21; #[doc = "NVIC_IPR22 (rw) register accessor: Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr22`] module"] -pub type NVIC_IPR22 = crate::Reg; +#[doc(alias = "NVIC_IPR22")] +pub type NvicIpr22 = crate::Reg; #[doc = "Interrupt Priority Register 22"] pub mod nvic_ipr22; #[doc = "NVIC_IPR23 (rw) register accessor: Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr23`] module"] -pub type NVIC_IPR23 = crate::Reg; +#[doc(alias = "NVIC_IPR23")] +pub type NvicIpr23 = crate::Reg; #[doc = "Interrupt Priority Register 23"] pub mod nvic_ipr23; #[doc = "NVIC_IPR24 (rw) register accessor: Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr24`] module"] -pub type NVIC_IPR24 = crate::Reg; +#[doc(alias = "NVIC_IPR24")] +pub type NvicIpr24 = crate::Reg; #[doc = "Interrupt Priority Register 24"] pub mod nvic_ipr24; #[doc = "NVIC_IPR25 (rw) register accessor: Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr25`] module"] -pub type NVIC_IPR25 = crate::Reg; +#[doc(alias = "NVIC_IPR25")] +pub type NvicIpr25 = crate::Reg; #[doc = "Interrupt Priority Register 25"] pub mod nvic_ipr25; #[doc = "NVIC_IPR26 (rw) register accessor: Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr26`] module"] -pub type NVIC_IPR26 = crate::Reg; +#[doc(alias = "NVIC_IPR26")] +pub type NvicIpr26 = crate::Reg; #[doc = "Interrupt Priority Register 26"] pub mod nvic_ipr26; #[doc = "NVIC_IPR27 (rw) register accessor: Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr27`] module"] -pub type NVIC_IPR27 = crate::Reg; +#[doc(alias = "NVIC_IPR27")] +pub type NvicIpr27 = crate::Reg; #[doc = "Interrupt Priority Register 27"] pub mod nvic_ipr27; #[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`] module"] -pub type CPUID = crate::Reg; +#[doc(alias = "CPUID")] +pub type Cpuid = crate::Reg; #[doc = "CPUID Base Register"] pub mod cpuid; #[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`] module"] -pub type ICSR = crate::Reg; +#[doc(alias = "ICSR")] +pub type Icsr = crate::Reg; #[doc = "Interrupt Control and State Register"] pub mod icsr; #[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`] module"] -pub type VTOR = crate::Reg; +#[doc(alias = "VTOR")] +pub type Vtor = crate::Reg; #[doc = "Vector Table Offset Register"] pub mod vtor; #[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`] module"] -pub type AIRCR = crate::Reg; +#[doc(alias = "AIRCR")] +pub type Aircr = crate::Reg; #[doc = "Application Interrupt and Reset Control Register"] pub mod aircr; #[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`] module"] -pub type SCR = crate::Reg; +#[doc(alias = "SCR")] +pub type Scr = crate::Reg; #[doc = "System Control Register"] pub mod scr; #[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] -pub type CCR = crate::Reg; +#[doc(alias = "CCR")] +pub type Ccr = crate::Reg; #[doc = "Configuration and Control Register"] pub mod ccr; #[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`] module"] -pub type SHPR1 = crate::Reg; +#[doc(alias = "SHPR1")] +pub type Shpr1 = crate::Reg; #[doc = "System Handler Priority Register 1"] pub mod shpr1; #[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`] module"] -pub type SHPR2 = crate::Reg; +#[doc(alias = "SHPR2")] +pub type Shpr2 = crate::Reg; #[doc = "System Handler Priority Register 2"] pub mod shpr2; #[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`] module"] -pub type SHPR3 = crate::Reg; +#[doc(alias = "SHPR3")] +pub type Shpr3 = crate::Reg; #[doc = "System Handler Priority Register 3"] pub mod shpr3; #[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`] module"] -pub type SHCSR = crate::Reg; +#[doc(alias = "SHCSR")] +pub type Shcsr = crate::Reg; #[doc = "System Handler Control and State Register"] pub mod shcsr; #[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`] module"] -pub type CFSR = crate::Reg; +#[doc(alias = "CFSR")] +pub type Cfsr = crate::Reg; #[doc = "Configurable Fault Status Register"] pub mod cfsr; #[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`] module"] -pub type HFSR = crate::Reg; +#[doc(alias = "HFSR")] +pub type Hfsr = crate::Reg; #[doc = "HardFault Status Register"] pub mod hfsr; #[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`] module"] -pub type MMFAR = crate::Reg; +#[doc(alias = "MMFAR")] +pub type Mmfar = crate::Reg; #[doc = "MemManage Fault Address Register"] pub mod mmfar; #[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`] module"] -pub type BFAR = crate::Reg; +#[doc(alias = "BFAR")] +pub type Bfar = crate::Reg; #[doc = "BusFault Address Register"] pub mod bfar; #[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`] module"] -pub type AFSR = crate::Reg; +#[doc(alias = "AFSR")] +pub type Afsr = crate::Reg; #[doc = "Auxiliary Fault Status Register"] pub mod afsr; #[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`] module"] -pub type CPACR = crate::Reg; +#[doc(alias = "CPACR")] +pub type Cpacr = crate::Reg; #[doc = "Coprocessor Access Control Register"] pub mod cpacr; #[doc = "MPU_TYPE (r) register accessor: MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_type`] module"] -pub type MPU_TYPE = crate::Reg; +#[doc(alias = "MPU_TYPE")] +pub type MpuType = crate::Reg; #[doc = "MPU Type Register"] pub mod mpu_type; #[doc = "MPU_CTRL (rw) register accessor: MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_ctrl`] module"] -pub type MPU_CTRL = crate::Reg; +#[doc(alias = "MPU_CTRL")] +pub type MpuCtrl = crate::Reg; #[doc = "MPU Control Register"] pub mod mpu_ctrl; #[doc = "MPU_RNR (rw) register accessor: MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rnr`] module"] -pub type MPU_RNR = crate::Reg; +#[doc(alias = "MPU_RNR")] +pub type MpuRnr = crate::Reg; #[doc = "MPU Region Number Register"] pub mod mpu_rnr; #[doc = "MPU_RBAR (rw) register accessor: MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar`] module"] -pub type MPU_RBAR = crate::Reg; +#[doc(alias = "MPU_RBAR")] +pub type MpuRbar = crate::Reg; #[doc = "MPU Region Base Address Register"] pub mod mpu_rbar; #[doc = "MPU_RASR (rw) register accessor: MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr`] module"] -pub type MPU_RASR = crate::Reg; +#[doc(alias = "MPU_RASR")] +pub type MpuRasr = crate::Reg; #[doc = "MPU Region Attribute and Size Register"] pub mod mpu_rasr; #[doc = "MPU_RBAR_A1 (rw) register accessor: MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a1`] module"] -pub type MPU_RBAR_A1 = crate::Reg; +#[doc(alias = "MPU_RBAR_A1")] +pub type MpuRbarA1 = crate::Reg; #[doc = "MPU Region Base Address Register A1"] pub mod mpu_rbar_a1; #[doc = "MPU_RASR_A1 (rw) register accessor: MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a1`] module"] -pub type MPU_RASR_A1 = crate::Reg; +#[doc(alias = "MPU_RASR_A1")] +pub type MpuRasrA1 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A1"] pub mod mpu_rasr_a1; #[doc = "MPU_RBAR_A2 (rw) register accessor: MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a2`] module"] -pub type MPU_RBAR_A2 = crate::Reg; +#[doc(alias = "MPU_RBAR_A2")] +pub type MpuRbarA2 = crate::Reg; #[doc = "MPU Region Base Address Register A2"] pub mod mpu_rbar_a2; #[doc = "MPU_RASR_A2 (rw) register accessor: MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a2`] module"] -pub type MPU_RASR_A2 = crate::Reg; +#[doc(alias = "MPU_RASR_A2")] +pub type MpuRasrA2 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A2"] pub mod mpu_rasr_a2; #[doc = "MPU_RBAR_A3 (rw) register accessor: MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a3`] module"] -pub type MPU_RBAR_A3 = crate::Reg; +#[doc(alias = "MPU_RBAR_A3")] +pub type MpuRbarA3 = crate::Reg; #[doc = "MPU Region Base Address Register A3"] pub mod mpu_rbar_a3; #[doc = "MPU_RASR_A3 (rw) register accessor: MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a3`] module"] -pub type MPU_RASR_A3 = crate::Reg; +#[doc(alias = "MPU_RASR_A3")] +pub type MpuRasrA3 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A3"] pub mod mpu_rasr_a3; #[doc = "STIR (w) register accessor: Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stir`] module"] -pub type STIR = crate::Reg; +#[doc(alias = "STIR")] +pub type Stir = crate::Reg; #[doc = "Software Trigger Interrupt Register"] pub mod stir; #[doc = "FPCCR (rw) register accessor: Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpccr`] module"] -pub type FPCCR = crate::Reg; +#[doc(alias = "FPCCR")] +pub type Fpccr = crate::Reg; #[doc = "Floating-point Context Control Register"] pub mod fpccr; #[doc = "FPCAR (rw) register accessor: Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcar`] module"] -pub type FPCAR = crate::Reg; +#[doc(alias = "FPCAR")] +pub type Fpcar = crate::Reg; #[doc = "Floating-point Context Address Register"] pub mod fpcar; #[doc = "FPDSCR (rw) register accessor: Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpdscr`] module"] -pub type FPDSCR = crate::Reg; +#[doc(alias = "FPDSCR")] +pub type Fpdscr = crate::Reg; #[doc = "Floating-point Default Status Control Register"] pub mod fpdscr; diff --git a/src/ppb/actlr.rs b/src/ppb/actlr.rs index ca35be6a..132455ac 100644 --- a/src/ppb/actlr.rs +++ b/src/ppb/actlr.rs @@ -1,109 +1,100 @@ #[doc = "Register `ACTLR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ACTLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISMCYCINT` reader - Disable load/store multiple"] -pub type DISMCYCINT_R = crate::BitReader; +pub type DismcycintR = crate::BitReader; #[doc = "Field `DISMCYCINT` writer - Disable load/store multiple"] -pub type DISMCYCINT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DismcycintW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISDEFWBUF` reader - Disable write buffer"] -pub type DISDEFWBUF_R = crate::BitReader; +pub type DisdefwbufR = crate::BitReader; #[doc = "Field `DISDEFWBUF` writer - Disable write buffer"] -pub type DISDEFWBUF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisdefwbufW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISFOLD` reader - Disable IT folding"] -pub type DISFOLD_R = crate::BitReader; +pub type DisfoldR = crate::BitReader; #[doc = "Field `DISFOLD` writer - Disable IT folding"] -pub type DISFOLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisfoldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISFPCA` reader - Disable FPCA update"] -pub type DISFPCA_R = crate::BitReader; +pub type DisfpcaR = crate::BitReader; #[doc = "Field `DISFPCA` writer - Disable FPCA update"] -pub type DISFPCA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisfpcaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISOOFP` reader - Disable out of order FP execution"] -pub type DISOOFP_R = crate::BitReader; +pub type DisoofpR = crate::BitReader; #[doc = "Field `DISOOFP` writer - Disable out of order FP execution"] -pub type DISOOFP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisoofpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Disable load/store multiple"] #[inline(always)] - pub fn dismcycint(&self) -> DISMCYCINT_R { - DISMCYCINT_R::new((self.bits & 1) != 0) + pub fn dismcycint(&self) -> DismcycintR { + DismcycintR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable write buffer"] #[inline(always)] - pub fn disdefwbuf(&self) -> DISDEFWBUF_R { - DISDEFWBUF_R::new(((self.bits >> 1) & 1) != 0) + pub fn disdefwbuf(&self) -> DisdefwbufR { + DisdefwbufR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Disable IT folding"] #[inline(always)] - pub fn disfold(&self) -> DISFOLD_R { - DISFOLD_R::new(((self.bits >> 2) & 1) != 0) + pub fn disfold(&self) -> DisfoldR { + DisfoldR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Disable FPCA update"] #[inline(always)] - pub fn disfpca(&self) -> DISFPCA_R { - DISFPCA_R::new(((self.bits >> 8) & 1) != 0) + pub fn disfpca(&self) -> DisfpcaR { + DisfpcaR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Disable out of order FP execution"] #[inline(always)] - pub fn disoofp(&self) -> DISOOFP_R { - DISOOFP_R::new(((self.bits >> 9) & 1) != 0) + pub fn disoofp(&self) -> DisoofpR { + DisoofpR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Disable load/store multiple"] #[inline(always)] #[must_use] - pub fn dismcycint(&mut self) -> DISMCYCINT_W { - DISMCYCINT_W::new(self, 0) + pub fn dismcycint(&mut self) -> DismcycintW { + DismcycintW::new(self, 0) } #[doc = "Bit 1 - Disable write buffer"] #[inline(always)] #[must_use] - pub fn disdefwbuf(&mut self) -> DISDEFWBUF_W { - DISDEFWBUF_W::new(self, 1) + pub fn disdefwbuf(&mut self) -> DisdefwbufW { + DisdefwbufW::new(self, 1) } #[doc = "Bit 2 - Disable IT folding"] #[inline(always)] #[must_use] - pub fn disfold(&mut self) -> DISFOLD_W { - DISFOLD_W::new(self, 2) + pub fn disfold(&mut self) -> DisfoldW { + DisfoldW::new(self, 2) } #[doc = "Bit 8 - Disable FPCA update"] #[inline(always)] #[must_use] - pub fn disfpca(&mut self) -> DISFPCA_W { - DISFPCA_W::new(self, 8) + pub fn disfpca(&mut self) -> DisfpcaW { + DisfpcaW::new(self, 8) } #[doc = "Bit 9 - Disable out of order FP execution"] #[inline(always)] #[must_use] - pub fn disoofp(&mut self) -> DISOOFP_W { - DISOOFP_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn disoofp(&mut self) -> DisoofpW { + DisoofpW::new(self, 9) } } #[doc = "Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ACTLR_SPEC; -impl crate::RegisterSpec for ACTLR_SPEC { +pub struct ActlrSpec; +impl crate::RegisterSpec for ActlrSpec { type Ux = u32; } #[doc = "`read()` method returns [`actlr::R`](R) reader structure"] -impl crate::Readable for ACTLR_SPEC {} +impl crate::Readable for ActlrSpec {} #[doc = "`write(|w| ..)` method takes [`actlr::W`](W) writer structure"] -impl crate::Writable for ACTLR_SPEC { +impl crate::Writable for ActlrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACTLR to value 0"] -impl crate::Resettable for ACTLR_SPEC { +impl crate::Resettable for ActlrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/afsr.rs b/src/ppb/afsr.rs index a3cd7258..9e56cd89 100644 --- a/src/ppb/afsr.rs +++ b/src/ppb/afsr.rs @@ -1,49 +1,40 @@ #[doc = "Register `AFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AFSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VALUE` reader - Reserved"] -pub type VALUE_R = crate::FieldReader; +pub type ValueR = crate::FieldReader; #[doc = "Field `VALUE` writer - Reserved"] -pub type VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] - pub fn value(&self) -> VALUE_R { - VALUE_R::new(self.bits) + pub fn value(&self) -> ValueR { + ValueR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] #[must_use] - pub fn value(&mut self) -> VALUE_W { - VALUE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn value(&mut self) -> ValueW { + ValueW::new(self, 0) } } #[doc = "Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AFSR_SPEC; -impl crate::RegisterSpec for AFSR_SPEC { +pub struct AfsrSpec; +impl crate::RegisterSpec for AfsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`afsr::R`](R) reader structure"] -impl crate::Readable for AFSR_SPEC {} +impl crate::Readable for AfsrSpec {} #[doc = "`write(|w| ..)` method takes [`afsr::W`](W) writer structure"] -impl crate::Writable for AFSR_SPEC { +impl crate::Writable for AfsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AFSR to value 0"] -impl crate::Resettable for AFSR_SPEC { +impl crate::Resettable for AfsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/aircr.rs b/src/ppb/aircr.rs index 05d11911..caca2494 100644 --- a/src/ppb/aircr.rs +++ b/src/ppb/aircr.rs @@ -1,158 +1,149 @@ #[doc = "Register `AIRCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AIRCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VECTRESET` writer - Reserved for Debug use."] -pub type VECTRESET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type VectresetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VECTCLRACTIVE` writer - Reserved for Debug use."] -pub type VECTCLRACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type VectclractiveW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "System reset request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSRESETREQ_AW { +pub enum Sysresetreq { #[doc = "0: no system reset request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: asserts a signal to the outer system that requests a reset."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSRESETREQ_AW) -> Self { + fn from(variant: Sysresetreq) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSRESETREQ` writer - System reset request"] -pub type SYSRESETREQ_W<'a, REG> = crate::BitWriter<'a, REG, SYSRESETREQ_AW>; -impl<'a, REG> SYSRESETREQ_W<'a, REG> +pub type SysresetreqW<'a, REG> = crate::BitWriter<'a, REG, Sysresetreq>; +impl<'a, REG> SysresetreqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no system reset request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYSRESETREQ_AW::VALUE1) + self.variant(Sysresetreq::Value1) } #[doc = "asserts a signal to the outer system that requests a reset."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYSRESETREQ_AW::VALUE2) + self.variant(Sysresetreq::Value2) } } #[doc = "Field `PRIGROUP` reader - Interrupt priority grouping field"] -pub type PRIGROUP_R = crate::FieldReader; +pub type PrigroupR = crate::FieldReader; #[doc = "Field `PRIGROUP` writer - Interrupt priority grouping field"] -pub type PRIGROUP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `ENDIANNESS` reader - Data endianness bit"] -pub type ENDIANNESS_R = crate::BitReader; +pub type PrigroupW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Data endianness bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENDIANNESS_A { +pub enum Endianness { #[doc = "0: Little-endian"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Big-endian."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENDIANNESS_A) -> Self { + fn from(variant: Endianness) -> Self { variant as u8 != 0 } } -impl ENDIANNESS_R { +#[doc = "Field `ENDIANNESS` reader - Data endianness bit"] +pub type EndiannessR = crate::BitReader; +impl EndiannessR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENDIANNESS_A { + pub const fn variant(&self) -> Endianness { match self.bits { - false => ENDIANNESS_A::VALUE1, - true => ENDIANNESS_A::VALUE2, + false => Endianness::Value1, + true => Endianness::Value2, } } #[doc = "Little-endian"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDIANNESS_A::VALUE1 + *self == Endianness::Value1 } #[doc = "Big-endian."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDIANNESS_A::VALUE2 + *self == Endianness::Value2 } } #[doc = "Field `VECTKEY` reader - Register key"] -pub type VECTKEY_R = crate::FieldReader; +pub type VectkeyR = crate::FieldReader; #[doc = "Field `VECTKEY` writer - Register key"] -pub type VECTKEY_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type VectkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 8:10 - Interrupt priority grouping field"] #[inline(always)] - pub fn prigroup(&self) -> PRIGROUP_R { - PRIGROUP_R::new(((self.bits >> 8) & 7) as u8) + pub fn prigroup(&self) -> PrigroupR { + PrigroupR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bit 15 - Data endianness bit"] #[inline(always)] - pub fn endianness(&self) -> ENDIANNESS_R { - ENDIANNESS_R::new(((self.bits >> 15) & 1) != 0) + pub fn endianness(&self) -> EndiannessR { + EndiannessR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:31 - Register key"] #[inline(always)] - pub fn vectkey(&self) -> VECTKEY_R { - VECTKEY_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn vectkey(&self) -> VectkeyR { + VectkeyR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - Reserved for Debug use."] #[inline(always)] #[must_use] - pub fn vectreset(&mut self) -> VECTRESET_W { - VECTRESET_W::new(self, 0) + pub fn vectreset(&mut self) -> VectresetW { + VectresetW::new(self, 0) } #[doc = "Bit 1 - Reserved for Debug use."] #[inline(always)] #[must_use] - pub fn vectclractive(&mut self) -> VECTCLRACTIVE_W { - VECTCLRACTIVE_W::new(self, 1) + pub fn vectclractive(&mut self) -> VectclractiveW { + VectclractiveW::new(self, 1) } #[doc = "Bit 2 - System reset request"] #[inline(always)] #[must_use] - pub fn sysresetreq(&mut self) -> SYSRESETREQ_W { - SYSRESETREQ_W::new(self, 2) + pub fn sysresetreq(&mut self) -> SysresetreqW { + SysresetreqW::new(self, 2) } #[doc = "Bits 8:10 - Interrupt priority grouping field"] #[inline(always)] #[must_use] - pub fn prigroup(&mut self) -> PRIGROUP_W { - PRIGROUP_W::new(self, 8) + pub fn prigroup(&mut self) -> PrigroupW { + PrigroupW::new(self, 8) } #[doc = "Bits 16:31 - Register key"] #[inline(always)] #[must_use] - pub fn vectkey(&mut self) -> VECTKEY_W { - VECTKEY_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn vectkey(&mut self) -> VectkeyW { + VectkeyW::new(self, 16) } } #[doc = "Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AIRCR_SPEC; -impl crate::RegisterSpec for AIRCR_SPEC { +pub struct AircrSpec; +impl crate::RegisterSpec for AircrSpec { type Ux = u32; } #[doc = "`read()` method returns [`aircr::R`](R) reader structure"] -impl crate::Readable for AIRCR_SPEC {} +impl crate::Readable for AircrSpec {} #[doc = "`write(|w| ..)` method takes [`aircr::W`](W) writer structure"] -impl crate::Writable for AIRCR_SPEC { +impl crate::Writable for AircrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AIRCR to value 0xfa05_0000"] -impl crate::Resettable for AIRCR_SPEC { +impl crate::Resettable for AircrSpec { const RESET_VALUE: u32 = 0xfa05_0000; } diff --git a/src/ppb/bfar.rs b/src/ppb/bfar.rs index 123bf37e..512dcf44 100644 --- a/src/ppb/bfar.rs +++ b/src/ppb/bfar.rs @@ -1,49 +1,40 @@ #[doc = "Register `BFAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address causing the fault"] -pub type ADDRESS_R = crate::FieldReader; +pub type AddressR = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address causing the fault"] -pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new(self.bits) + pub fn address(&self) -> AddressR { + AddressR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> ADDRESS_W { - ADDRESS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn address(&mut self) -> AddressW { + AddressW::new(self, 0) } } #[doc = "BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BFAR_SPEC; -impl crate::RegisterSpec for BFAR_SPEC { +pub struct BfarSpec; +impl crate::RegisterSpec for BfarSpec { type Ux = u32; } #[doc = "`read()` method returns [`bfar::R`](R) reader structure"] -impl crate::Readable for BFAR_SPEC {} +impl crate::Readable for BfarSpec {} #[doc = "`write(|w| ..)` method takes [`bfar::W`](W) writer structure"] -impl crate::Writable for BFAR_SPEC { +impl crate::Writable for BfarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFAR to value 0"] -impl crate::Resettable for BFAR_SPEC { +impl crate::Resettable for BfarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/ccr.rs b/src/ppb/ccr.rs index a99d60c8..2712c8c6 100644 --- a/src/ppb/ccr.rs +++ b/src/ppb/ccr.rs @@ -1,421 +1,412 @@ #[doc = "Register `CCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCR` writer"] -pub type W = crate::W; -#[doc = "Field `NONBASETHRDENA` reader - Non Base Thread Mode Enable"] -pub type NONBASETHRDENA_R = crate::BitReader; +pub type W = crate::W; #[doc = "Non Base Thread Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NONBASETHRDENA_A { +pub enum Nonbasethrdena { #[doc = "0: processor can enter Thread mode only when no exception is active."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NONBASETHRDENA_A) -> Self { + fn from(variant: Nonbasethrdena) -> Self { variant as u8 != 0 } } -impl NONBASETHRDENA_R { +#[doc = "Field `NONBASETHRDENA` reader - Non Base Thread Mode Enable"] +pub type NonbasethrdenaR = crate::BitReader; +impl NonbasethrdenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NONBASETHRDENA_A { + pub const fn variant(&self) -> Nonbasethrdena { match self.bits { - false => NONBASETHRDENA_A::VALUE1, - true => NONBASETHRDENA_A::VALUE2, + false => Nonbasethrdena::Value1, + true => Nonbasethrdena::Value2, } } #[doc = "processor can enter Thread mode only when no exception is active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NONBASETHRDENA_A::VALUE1 + *self == Nonbasethrdena::Value1 } #[doc = "processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NONBASETHRDENA_A::VALUE2 + *self == Nonbasethrdena::Value2 } } #[doc = "Field `NONBASETHRDENA` writer - Non Base Thread Mode Enable"] -pub type NONBASETHRDENA_W<'a, REG> = crate::BitWriter<'a, REG, NONBASETHRDENA_A>; -impl<'a, REG> NONBASETHRDENA_W<'a, REG> +pub type NonbasethrdenaW<'a, REG> = crate::BitWriter<'a, REG, Nonbasethrdena>; +impl<'a, REG> NonbasethrdenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "processor can enter Thread mode only when no exception is active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NONBASETHRDENA_A::VALUE1) + self.variant(Nonbasethrdena::Value1) } #[doc = "processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NONBASETHRDENA_A::VALUE2) + self.variant(Nonbasethrdena::Value2) } } -#[doc = "Field `USERSETMPEND` reader - User Set Pending Enable"] -pub type USERSETMPEND_R = crate::BitReader; #[doc = "User Set Pending Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USERSETMPEND_A { +pub enum Usersetmpend { #[doc = "0: disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USERSETMPEND_A) -> Self { + fn from(variant: Usersetmpend) -> Self { variant as u8 != 0 } } -impl USERSETMPEND_R { +#[doc = "Field `USERSETMPEND` reader - User Set Pending Enable"] +pub type UsersetmpendR = crate::BitReader; +impl UsersetmpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USERSETMPEND_A { + pub const fn variant(&self) -> Usersetmpend { match self.bits { - false => USERSETMPEND_A::VALUE1, - true => USERSETMPEND_A::VALUE2, + false => Usersetmpend::Value1, + true => Usersetmpend::Value2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USERSETMPEND_A::VALUE1 + *self == Usersetmpend::Value1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USERSETMPEND_A::VALUE2 + *self == Usersetmpend::Value2 } } #[doc = "Field `USERSETMPEND` writer - User Set Pending Enable"] -pub type USERSETMPEND_W<'a, REG> = crate::BitWriter<'a, REG, USERSETMPEND_A>; -impl<'a, REG> USERSETMPEND_W<'a, REG> +pub type UsersetmpendW<'a, REG> = crate::BitWriter<'a, REG, Usersetmpend>; +impl<'a, REG> UsersetmpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USERSETMPEND_A::VALUE1) + self.variant(Usersetmpend::Value1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USERSETMPEND_A::VALUE2) + self.variant(Usersetmpend::Value2) } } -#[doc = "Field `UNALIGN_TRP` reader - Unaligned Access Trap Enable"] -pub type UNALIGN_TRP_R = crate::BitReader; #[doc = "Unaligned Access Trap Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UNALIGN_TRP_A { +pub enum UnalignTrp { #[doc = "0: do not trap unaligned halfword and word accesses"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: trap unaligned halfword and word accesses."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UNALIGN_TRP_A) -> Self { + fn from(variant: UnalignTrp) -> Self { variant as u8 != 0 } } -impl UNALIGN_TRP_R { +#[doc = "Field `UNALIGN_TRP` reader - Unaligned Access Trap Enable"] +pub type UnalignTrpR = crate::BitReader; +impl UnalignTrpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UNALIGN_TRP_A { + pub const fn variant(&self) -> UnalignTrp { match self.bits { - false => UNALIGN_TRP_A::VALUE1, - true => UNALIGN_TRP_A::VALUE2, + false => UnalignTrp::Value1, + true => UnalignTrp::Value2, } } #[doc = "do not trap unaligned halfword and word accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UNALIGN_TRP_A::VALUE1 + *self == UnalignTrp::Value1 } #[doc = "trap unaligned halfword and word accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UNALIGN_TRP_A::VALUE2 + *self == UnalignTrp::Value2 } } #[doc = "Field `UNALIGN_TRP` writer - Unaligned Access Trap Enable"] -pub type UNALIGN_TRP_W<'a, REG> = crate::BitWriter<'a, REG, UNALIGN_TRP_A>; -impl<'a, REG> UNALIGN_TRP_W<'a, REG> +pub type UnalignTrpW<'a, REG> = crate::BitWriter<'a, REG, UnalignTrp>; +impl<'a, REG> UnalignTrpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not trap unaligned halfword and word accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UNALIGN_TRP_A::VALUE1) + self.variant(UnalignTrp::Value1) } #[doc = "trap unaligned halfword and word accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UNALIGN_TRP_A::VALUE2) + self.variant(UnalignTrp::Value2) } } -#[doc = "Field `DIV_0_TRP` reader - Divide by Zero Trap Enable"] -pub type DIV_0_TRP_R = crate::BitReader; #[doc = "Divide by Zero Trap Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIV_0_TRP_A { +pub enum Div0Trp { #[doc = "0: do not trap divide by 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: trap divide by 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIV_0_TRP_A) -> Self { + fn from(variant: Div0Trp) -> Self { variant as u8 != 0 } } -impl DIV_0_TRP_R { +#[doc = "Field `DIV_0_TRP` reader - Divide by Zero Trap Enable"] +pub type Div0TrpR = crate::BitReader; +impl Div0TrpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIV_0_TRP_A { + pub const fn variant(&self) -> Div0Trp { match self.bits { - false => DIV_0_TRP_A::VALUE1, - true => DIV_0_TRP_A::VALUE2, + false => Div0Trp::Value1, + true => Div0Trp::Value2, } } #[doc = "do not trap divide by 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIV_0_TRP_A::VALUE1 + *self == Div0Trp::Value1 } #[doc = "trap divide by 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIV_0_TRP_A::VALUE2 + *self == Div0Trp::Value2 } } #[doc = "Field `DIV_0_TRP` writer - Divide by Zero Trap Enable"] -pub type DIV_0_TRP_W<'a, REG> = crate::BitWriter<'a, REG, DIV_0_TRP_A>; -impl<'a, REG> DIV_0_TRP_W<'a, REG> +pub type Div0TrpW<'a, REG> = crate::BitWriter<'a, REG, Div0Trp>; +impl<'a, REG> Div0TrpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not trap divide by 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIV_0_TRP_A::VALUE1) + self.variant(Div0Trp::Value1) } #[doc = "trap divide by 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIV_0_TRP_A::VALUE2) + self.variant(Div0Trp::Value2) } } -#[doc = "Field `BFHFNMIGN` reader - Bus Fault Hard Fault and NMI Ignore"] -pub type BFHFNMIGN_R = crate::BitReader; #[doc = "Bus Fault Hard Fault and NMI Ignore\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFHFNMIGN_A { +pub enum Bfhfnmign { #[doc = "0: data bus faults caused by load and store instructions cause a lock-up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFHFNMIGN_A) -> Self { + fn from(variant: Bfhfnmign) -> Self { variant as u8 != 0 } } -impl BFHFNMIGN_R { +#[doc = "Field `BFHFNMIGN` reader - Bus Fault Hard Fault and NMI Ignore"] +pub type BfhfnmignR = crate::BitReader; +impl BfhfnmignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFHFNMIGN_A { + pub const fn variant(&self) -> Bfhfnmign { match self.bits { - false => BFHFNMIGN_A::VALUE1, - true => BFHFNMIGN_A::VALUE2, + false => Bfhfnmign::Value1, + true => Bfhfnmign::Value2, } } #[doc = "data bus faults caused by load and store instructions cause a lock-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFHFNMIGN_A::VALUE1 + *self == Bfhfnmign::Value1 } #[doc = "handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFHFNMIGN_A::VALUE2 + *self == Bfhfnmign::Value2 } } #[doc = "Field `BFHFNMIGN` writer - Bus Fault Hard Fault and NMI Ignore"] -pub type BFHFNMIGN_W<'a, REG> = crate::BitWriter<'a, REG, BFHFNMIGN_A>; -impl<'a, REG> BFHFNMIGN_W<'a, REG> +pub type BfhfnmignW<'a, REG> = crate::BitWriter<'a, REG, Bfhfnmign>; +impl<'a, REG> BfhfnmignW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "data bus faults caused by load and store instructions cause a lock-up"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFHFNMIGN_A::VALUE1) + self.variant(Bfhfnmign::Value1) } #[doc = "handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFHFNMIGN_A::VALUE2) + self.variant(Bfhfnmign::Value2) } } -#[doc = "Field `STKALIGN` reader - Stack Alignment"] -pub type STKALIGN_R = crate::BitReader; #[doc = "Stack Alignment\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STKALIGN_A { +pub enum Stkalign { #[doc = "0: 4-byte aligned"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 8-byte aligned."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STKALIGN_A) -> Self { + fn from(variant: Stkalign) -> Self { variant as u8 != 0 } } -impl STKALIGN_R { +#[doc = "Field `STKALIGN` reader - Stack Alignment"] +pub type StkalignR = crate::BitReader; +impl StkalignR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STKALIGN_A { + pub const fn variant(&self) -> Stkalign { match self.bits { - false => STKALIGN_A::VALUE1, - true => STKALIGN_A::VALUE2, + false => Stkalign::Value1, + true => Stkalign::Value2, } } #[doc = "4-byte aligned"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STKALIGN_A::VALUE1 + *self == Stkalign::Value1 } #[doc = "8-byte aligned."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STKALIGN_A::VALUE2 + *self == Stkalign::Value2 } } #[doc = "Field `STKALIGN` writer - Stack Alignment"] -pub type STKALIGN_W<'a, REG> = crate::BitWriter<'a, REG, STKALIGN_A>; -impl<'a, REG> STKALIGN_W<'a, REG> +pub type StkalignW<'a, REG> = crate::BitWriter<'a, REG, Stkalign>; +impl<'a, REG> StkalignW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "4-byte aligned"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STKALIGN_A::VALUE1) + self.variant(Stkalign::Value1) } #[doc = "8-byte aligned."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STKALIGN_A::VALUE2) + self.variant(Stkalign::Value2) } } impl R { #[doc = "Bit 0 - Non Base Thread Mode Enable"] #[inline(always)] - pub fn nonbasethrdena(&self) -> NONBASETHRDENA_R { - NONBASETHRDENA_R::new((self.bits & 1) != 0) + pub fn nonbasethrdena(&self) -> NonbasethrdenaR { + NonbasethrdenaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - User Set Pending Enable"] #[inline(always)] - pub fn usersetmpend(&self) -> USERSETMPEND_R { - USERSETMPEND_R::new(((self.bits >> 1) & 1) != 0) + pub fn usersetmpend(&self) -> UsersetmpendR { + UsersetmpendR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Unaligned Access Trap Enable"] #[inline(always)] - pub fn unalign_trp(&self) -> UNALIGN_TRP_R { - UNALIGN_TRP_R::new(((self.bits >> 3) & 1) != 0) + pub fn unalign_trp(&self) -> UnalignTrpR { + UnalignTrpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Divide by Zero Trap Enable"] #[inline(always)] - pub fn div_0_trp(&self) -> DIV_0_TRP_R { - DIV_0_TRP_R::new(((self.bits >> 4) & 1) != 0) + pub fn div_0_trp(&self) -> Div0TrpR { + Div0TrpR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"] #[inline(always)] - pub fn bfhfnmign(&self) -> BFHFNMIGN_R { - BFHFNMIGN_R::new(((self.bits >> 8) & 1) != 0) + pub fn bfhfnmign(&self) -> BfhfnmignR { + BfhfnmignR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Stack Alignment"] #[inline(always)] - pub fn stkalign(&self) -> STKALIGN_R { - STKALIGN_R::new(((self.bits >> 9) & 1) != 0) + pub fn stkalign(&self) -> StkalignR { + StkalignR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Non Base Thread Mode Enable"] #[inline(always)] #[must_use] - pub fn nonbasethrdena(&mut self) -> NONBASETHRDENA_W { - NONBASETHRDENA_W::new(self, 0) + pub fn nonbasethrdena(&mut self) -> NonbasethrdenaW { + NonbasethrdenaW::new(self, 0) } #[doc = "Bit 1 - User Set Pending Enable"] #[inline(always)] #[must_use] - pub fn usersetmpend(&mut self) -> USERSETMPEND_W { - USERSETMPEND_W::new(self, 1) + pub fn usersetmpend(&mut self) -> UsersetmpendW { + UsersetmpendW::new(self, 1) } #[doc = "Bit 3 - Unaligned Access Trap Enable"] #[inline(always)] #[must_use] - pub fn unalign_trp(&mut self) -> UNALIGN_TRP_W { - UNALIGN_TRP_W::new(self, 3) + pub fn unalign_trp(&mut self) -> UnalignTrpW { + UnalignTrpW::new(self, 3) } #[doc = "Bit 4 - Divide by Zero Trap Enable"] #[inline(always)] #[must_use] - pub fn div_0_trp(&mut self) -> DIV_0_TRP_W { - DIV_0_TRP_W::new(self, 4) + pub fn div_0_trp(&mut self) -> Div0TrpW { + Div0TrpW::new(self, 4) } #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"] #[inline(always)] #[must_use] - pub fn bfhfnmign(&mut self) -> BFHFNMIGN_W { - BFHFNMIGN_W::new(self, 8) + pub fn bfhfnmign(&mut self) -> BfhfnmignW { + BfhfnmignW::new(self, 8) } #[doc = "Bit 9 - Stack Alignment"] #[inline(always)] #[must_use] - pub fn stkalign(&mut self) -> STKALIGN_W { - STKALIGN_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn stkalign(&mut self) -> StkalignW { + StkalignW::new(self, 9) } } #[doc = "Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CCR_SPEC; -impl crate::RegisterSpec for CCR_SPEC { +pub struct CcrSpec; +impl crate::RegisterSpec for CcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ccr::R`](R) reader structure"] -impl crate::Readable for CCR_SPEC {} +impl crate::Readable for CcrSpec {} #[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"] -impl crate::Writable for CCR_SPEC { +impl crate::Writable for CcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCR to value 0x0200"] -impl crate::Resettable for CCR_SPEC { +impl crate::Resettable for CcrSpec { const RESET_VALUE: u32 = 0x0200; } diff --git a/src/ppb/cfsr.rs b/src/ppb/cfsr.rs index dd5b3ba1..3d556f7d 100644 --- a/src/ppb/cfsr.rs +++ b/src/ppb/cfsr.rs @@ -1,1250 +1,1241 @@ #[doc = "Register `CFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFSR` writer"] -pub type W = crate::W; -#[doc = "Field `IACCVIOL` reader - Instruction access violation flag"] -pub type IACCVIOL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Instruction access violation flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IACCVIOL_A { +pub enum Iaccviol { #[doc = "0: no instruction access violation fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor attempted an instruction fetch from a location that does not permit execution."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IACCVIOL_A) -> Self { + fn from(variant: Iaccviol) -> Self { variant as u8 != 0 } } -impl IACCVIOL_R { +#[doc = "Field `IACCVIOL` reader - Instruction access violation flag"] +pub type IaccviolR = crate::BitReader; +impl IaccviolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IACCVIOL_A { + pub const fn variant(&self) -> Iaccviol { match self.bits { - false => IACCVIOL_A::VALUE1, - true => IACCVIOL_A::VALUE2, + false => Iaccviol::Value1, + true => Iaccviol::Value2, } } #[doc = "no instruction access violation fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IACCVIOL_A::VALUE1 + *self == Iaccviol::Value1 } #[doc = "the processor attempted an instruction fetch from a location that does not permit execution."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IACCVIOL_A::VALUE2 + *self == Iaccviol::Value2 } } #[doc = "Field `IACCVIOL` writer - Instruction access violation flag"] -pub type IACCVIOL_W<'a, REG> = crate::BitWriter<'a, REG, IACCVIOL_A>; -impl<'a, REG> IACCVIOL_W<'a, REG> +pub type IaccviolW<'a, REG> = crate::BitWriter<'a, REG, Iaccviol>; +impl<'a, REG> IaccviolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no instruction access violation fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IACCVIOL_A::VALUE1) + self.variant(Iaccviol::Value1) } #[doc = "the processor attempted an instruction fetch from a location that does not permit execution."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IACCVIOL_A::VALUE2) + self.variant(Iaccviol::Value2) } } -#[doc = "Field `DACCVIOL` reader - Data access violation flag"] -pub type DACCVIOL_R = crate::BitReader; #[doc = "Data access violation flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DACCVIOL_A { +pub enum Daccviol { #[doc = "0: no data access violation fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor attempted a load or store at a location that does not permit the operation."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DACCVIOL_A) -> Self { + fn from(variant: Daccviol) -> Self { variant as u8 != 0 } } -impl DACCVIOL_R { +#[doc = "Field `DACCVIOL` reader - Data access violation flag"] +pub type DaccviolR = crate::BitReader; +impl DaccviolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DACCVIOL_A { + pub const fn variant(&self) -> Daccviol { match self.bits { - false => DACCVIOL_A::VALUE1, - true => DACCVIOL_A::VALUE2, + false => Daccviol::Value1, + true => Daccviol::Value2, } } #[doc = "no data access violation fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DACCVIOL_A::VALUE1 + *self == Daccviol::Value1 } #[doc = "the processor attempted a load or store at a location that does not permit the operation."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DACCVIOL_A::VALUE2 + *self == Daccviol::Value2 } } #[doc = "Field `DACCVIOL` writer - Data access violation flag"] -pub type DACCVIOL_W<'a, REG> = crate::BitWriter<'a, REG, DACCVIOL_A>; -impl<'a, REG> DACCVIOL_W<'a, REG> +pub type DaccviolW<'a, REG> = crate::BitWriter<'a, REG, Daccviol>; +impl<'a, REG> DaccviolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no data access violation fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DACCVIOL_A::VALUE1) + self.variant(Daccviol::Value1) } #[doc = "the processor attempted a load or store at a location that does not permit the operation."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DACCVIOL_A::VALUE2) + self.variant(Daccviol::Value2) } } -#[doc = "Field `MUNSTKERR` reader - MemManage fault on unstacking for a return from exception"] -pub type MUNSTKERR_R = crate::BitReader; #[doc = "MemManage fault on unstacking for a return from exception\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MUNSTKERR_A { +pub enum Munstkerr { #[doc = "0: no unstacking fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: unstack for an exception return has caused one or more access violations."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MUNSTKERR_A) -> Self { + fn from(variant: Munstkerr) -> Self { variant as u8 != 0 } } -impl MUNSTKERR_R { +#[doc = "Field `MUNSTKERR` reader - MemManage fault on unstacking for a return from exception"] +pub type MunstkerrR = crate::BitReader; +impl MunstkerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MUNSTKERR_A { + pub const fn variant(&self) -> Munstkerr { match self.bits { - false => MUNSTKERR_A::VALUE1, - true => MUNSTKERR_A::VALUE2, + false => Munstkerr::Value1, + true => Munstkerr::Value2, } } #[doc = "no unstacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MUNSTKERR_A::VALUE1 + *self == Munstkerr::Value1 } #[doc = "unstack for an exception return has caused one or more access violations."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MUNSTKERR_A::VALUE2 + *self == Munstkerr::Value2 } } #[doc = "Field `MUNSTKERR` writer - MemManage fault on unstacking for a return from exception"] -pub type MUNSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, MUNSTKERR_A>; -impl<'a, REG> MUNSTKERR_W<'a, REG> +pub type MunstkerrW<'a, REG> = crate::BitWriter<'a, REG, Munstkerr>; +impl<'a, REG> MunstkerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unstacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MUNSTKERR_A::VALUE1) + self.variant(Munstkerr::Value1) } #[doc = "unstack for an exception return has caused one or more access violations."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MUNSTKERR_A::VALUE2) + self.variant(Munstkerr::Value2) } } -#[doc = "Field `MSTKERR` reader - MemManage fault on stacking for exception entry"] -pub type MSTKERR_R = crate::BitReader; #[doc = "MemManage fault on stacking for exception entry\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSTKERR_A { +pub enum Mstkerr { #[doc = "0: no stacking fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: stacking for an exception entry has caused one or more access violations."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSTKERR_A) -> Self { + fn from(variant: Mstkerr) -> Self { variant as u8 != 0 } } -impl MSTKERR_R { +#[doc = "Field `MSTKERR` reader - MemManage fault on stacking for exception entry"] +pub type MstkerrR = crate::BitReader; +impl MstkerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSTKERR_A { + pub const fn variant(&self) -> Mstkerr { match self.bits { - false => MSTKERR_A::VALUE1, - true => MSTKERR_A::VALUE2, + false => Mstkerr::Value1, + true => Mstkerr::Value2, } } #[doc = "no stacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSTKERR_A::VALUE1 + *self == Mstkerr::Value1 } #[doc = "stacking for an exception entry has caused one or more access violations."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSTKERR_A::VALUE2 + *self == Mstkerr::Value2 } } #[doc = "Field `MSTKERR` writer - MemManage fault on stacking for exception entry"] -pub type MSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, MSTKERR_A>; -impl<'a, REG> MSTKERR_W<'a, REG> +pub type MstkerrW<'a, REG> = crate::BitWriter<'a, REG, Mstkerr>; +impl<'a, REG> MstkerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no stacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSTKERR_A::VALUE1) + self.variant(Mstkerr::Value1) } #[doc = "stacking for an exception entry has caused one or more access violations."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSTKERR_A::VALUE2) + self.variant(Mstkerr::Value2) } } -#[doc = "Field `MLSPERR` reader - MemManage fault during floating point lazy state preservation"] -pub type MLSPERR_R = crate::BitReader; #[doc = "MemManage fault during floating point lazy state preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MLSPERR_A { +pub enum Mlsperr { #[doc = "0: No MemManage fault occurred during floating-point lazy state preservation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A MemManage fault occurred during floating-point lazy state preservation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MLSPERR_A) -> Self { + fn from(variant: Mlsperr) -> Self { variant as u8 != 0 } } -impl MLSPERR_R { +#[doc = "Field `MLSPERR` reader - MemManage fault during floating point lazy state preservation"] +pub type MlsperrR = crate::BitReader; +impl MlsperrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MLSPERR_A { + pub const fn variant(&self) -> Mlsperr { match self.bits { - false => MLSPERR_A::VALUE1, - true => MLSPERR_A::VALUE2, + false => Mlsperr::Value1, + true => Mlsperr::Value2, } } #[doc = "No MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MLSPERR_A::VALUE1 + *self == Mlsperr::Value1 } #[doc = "A MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MLSPERR_A::VALUE2 + *self == Mlsperr::Value2 } } #[doc = "Field `MLSPERR` writer - MemManage fault during floating point lazy state preservation"] -pub type MLSPERR_W<'a, REG> = crate::BitWriter<'a, REG, MLSPERR_A>; -impl<'a, REG> MLSPERR_W<'a, REG> +pub type MlsperrW<'a, REG> = crate::BitWriter<'a, REG, Mlsperr>; +impl<'a, REG> MlsperrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MLSPERR_A::VALUE1) + self.variant(Mlsperr::Value1) } #[doc = "A MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MLSPERR_A::VALUE2) + self.variant(Mlsperr::Value2) } } -#[doc = "Field `MMARVALID` reader - MemManage Fault Address Register (MMFAR) valid flag"] -pub type MMARVALID_R = crate::BitReader; #[doc = "MemManage Fault Address Register (MMFAR) valid flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMARVALID_A { +pub enum Mmarvalid { #[doc = "0: value in MMAR is not a valid fault address"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MMAR holds a valid fault address."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMARVALID_A) -> Self { + fn from(variant: Mmarvalid) -> Self { variant as u8 != 0 } } -impl MMARVALID_R { +#[doc = "Field `MMARVALID` reader - MemManage Fault Address Register (MMFAR) valid flag"] +pub type MmarvalidR = crate::BitReader; +impl MmarvalidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMARVALID_A { + pub const fn variant(&self) -> Mmarvalid { match self.bits { - false => MMARVALID_A::VALUE1, - true => MMARVALID_A::VALUE2, + false => Mmarvalid::Value1, + true => Mmarvalid::Value2, } } #[doc = "value in MMAR is not a valid fault address"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMARVALID_A::VALUE1 + *self == Mmarvalid::Value1 } #[doc = "MMAR holds a valid fault address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMARVALID_A::VALUE2 + *self == Mmarvalid::Value2 } } #[doc = "Field `MMARVALID` writer - MemManage Fault Address Register (MMFAR) valid flag"] -pub type MMARVALID_W<'a, REG> = crate::BitWriter<'a, REG, MMARVALID_A>; -impl<'a, REG> MMARVALID_W<'a, REG> +pub type MmarvalidW<'a, REG> = crate::BitWriter<'a, REG, Mmarvalid>; +impl<'a, REG> MmarvalidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "value in MMAR is not a valid fault address"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMARVALID_A::VALUE1) + self.variant(Mmarvalid::Value1) } #[doc = "MMAR holds a valid fault address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMARVALID_A::VALUE2) + self.variant(Mmarvalid::Value2) } } -#[doc = "Field `IBUSERR` reader - Instruction bus error"] -pub type IBUSERR_R = crate::BitReader; #[doc = "Instruction bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IBUSERR_A { +pub enum Ibuserr { #[doc = "0: no instruction bus error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: instruction bus error."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IBUSERR_A) -> Self { + fn from(variant: Ibuserr) -> Self { variant as u8 != 0 } } -impl IBUSERR_R { +#[doc = "Field `IBUSERR` reader - Instruction bus error"] +pub type IbuserrR = crate::BitReader; +impl IbuserrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IBUSERR_A { + pub const fn variant(&self) -> Ibuserr { match self.bits { - false => IBUSERR_A::VALUE1, - true => IBUSERR_A::VALUE2, + false => Ibuserr::Value1, + true => Ibuserr::Value2, } } #[doc = "no instruction bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IBUSERR_A::VALUE1 + *self == Ibuserr::Value1 } #[doc = "instruction bus error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IBUSERR_A::VALUE2 + *self == Ibuserr::Value2 } } #[doc = "Field `IBUSERR` writer - Instruction bus error"] -pub type IBUSERR_W<'a, REG> = crate::BitWriter<'a, REG, IBUSERR_A>; -impl<'a, REG> IBUSERR_W<'a, REG> +pub type IbuserrW<'a, REG> = crate::BitWriter<'a, REG, Ibuserr>; +impl<'a, REG> IbuserrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no instruction bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IBUSERR_A::VALUE1) + self.variant(Ibuserr::Value1) } #[doc = "instruction bus error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IBUSERR_A::VALUE2) + self.variant(Ibuserr::Value2) } } -#[doc = "Field `PRECISERR` reader - Precise data bus error"] -pub type PRECISERR_R = crate::BitReader; #[doc = "Precise data bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRECISERR_A { +pub enum Preciserr { #[doc = "0: no precise data bus error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRECISERR_A) -> Self { + fn from(variant: Preciserr) -> Self { variant as u8 != 0 } } -impl PRECISERR_R { +#[doc = "Field `PRECISERR` reader - Precise data bus error"] +pub type PreciserrR = crate::BitReader; +impl PreciserrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRECISERR_A { + pub const fn variant(&self) -> Preciserr { match self.bits { - false => PRECISERR_A::VALUE1, - true => PRECISERR_A::VALUE2, + false => Preciserr::Value1, + true => Preciserr::Value2, } } #[doc = "no precise data bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRECISERR_A::VALUE1 + *self == Preciserr::Value1 } #[doc = "a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRECISERR_A::VALUE2 + *self == Preciserr::Value2 } } #[doc = "Field `PRECISERR` writer - Precise data bus error"] -pub type PRECISERR_W<'a, REG> = crate::BitWriter<'a, REG, PRECISERR_A>; -impl<'a, REG> PRECISERR_W<'a, REG> +pub type PreciserrW<'a, REG> = crate::BitWriter<'a, REG, Preciserr>; +impl<'a, REG> PreciserrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no precise data bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRECISERR_A::VALUE1) + self.variant(Preciserr::Value1) } #[doc = "a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRECISERR_A::VALUE2) + self.variant(Preciserr::Value2) } } -#[doc = "Field `IMPRECISERR` reader - Imprecise data bus error"] -pub type IMPRECISERR_R = crate::BitReader; #[doc = "Imprecise data bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IMPRECISERR_A { +pub enum Impreciserr { #[doc = "0: no imprecise data bus error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IMPRECISERR_A) -> Self { + fn from(variant: Impreciserr) -> Self { variant as u8 != 0 } } -impl IMPRECISERR_R { +#[doc = "Field `IMPRECISERR` reader - Imprecise data bus error"] +pub type ImpreciserrR = crate::BitReader; +impl ImpreciserrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IMPRECISERR_A { + pub const fn variant(&self) -> Impreciserr { match self.bits { - false => IMPRECISERR_A::VALUE1, - true => IMPRECISERR_A::VALUE2, + false => Impreciserr::Value1, + true => Impreciserr::Value2, } } #[doc = "no imprecise data bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IMPRECISERR_A::VALUE1 + *self == Impreciserr::Value1 } #[doc = "a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IMPRECISERR_A::VALUE2 + *self == Impreciserr::Value2 } } #[doc = "Field `IMPRECISERR` writer - Imprecise data bus error"] -pub type IMPRECISERR_W<'a, REG> = crate::BitWriter<'a, REG, IMPRECISERR_A>; -impl<'a, REG> IMPRECISERR_W<'a, REG> +pub type ImpreciserrW<'a, REG> = crate::BitWriter<'a, REG, Impreciserr>; +impl<'a, REG> ImpreciserrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no imprecise data bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IMPRECISERR_A::VALUE1) + self.variant(Impreciserr::Value1) } #[doc = "a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IMPRECISERR_A::VALUE2) + self.variant(Impreciserr::Value2) } } -#[doc = "Field `UNSTKERR` reader - BusFault on unstacking for a return from exception"] -pub type UNSTKERR_R = crate::BitReader; #[doc = "BusFault on unstacking for a return from exception\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UNSTKERR_A { +pub enum Unstkerr { #[doc = "0: no unstacking fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: stacking for an exception entry has caused one or more BusFaults."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UNSTKERR_A) -> Self { + fn from(variant: Unstkerr) -> Self { variant as u8 != 0 } } -impl UNSTKERR_R { +#[doc = "Field `UNSTKERR` reader - BusFault on unstacking for a return from exception"] +pub type UnstkerrR = crate::BitReader; +impl UnstkerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UNSTKERR_A { + pub const fn variant(&self) -> Unstkerr { match self.bits { - false => UNSTKERR_A::VALUE1, - true => UNSTKERR_A::VALUE2, + false => Unstkerr::Value1, + true => Unstkerr::Value2, } } #[doc = "no unstacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UNSTKERR_A::VALUE1 + *self == Unstkerr::Value1 } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UNSTKERR_A::VALUE2 + *self == Unstkerr::Value2 } } #[doc = "Field `UNSTKERR` writer - BusFault on unstacking for a return from exception"] -pub type UNSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, UNSTKERR_A>; -impl<'a, REG> UNSTKERR_W<'a, REG> +pub type UnstkerrW<'a, REG> = crate::BitWriter<'a, REG, Unstkerr>; +impl<'a, REG> UnstkerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unstacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UNSTKERR_A::VALUE1) + self.variant(Unstkerr::Value1) } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UNSTKERR_A::VALUE2) + self.variant(Unstkerr::Value2) } } -#[doc = "Field `STKERR` reader - BusFault on stacking for exception entry"] -pub type STKERR_R = crate::BitReader; #[doc = "BusFault on stacking for exception entry\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STKERR_A { +pub enum Stkerr { #[doc = "0: no stacking fault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: stacking for an exception entry has caused one or more BusFaults."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STKERR_A) -> Self { + fn from(variant: Stkerr) -> Self { variant as u8 != 0 } } -impl STKERR_R { +#[doc = "Field `STKERR` reader - BusFault on stacking for exception entry"] +pub type StkerrR = crate::BitReader; +impl StkerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STKERR_A { + pub const fn variant(&self) -> Stkerr { match self.bits { - false => STKERR_A::VALUE1, - true => STKERR_A::VALUE2, + false => Stkerr::Value1, + true => Stkerr::Value2, } } #[doc = "no stacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STKERR_A::VALUE1 + *self == Stkerr::Value1 } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STKERR_A::VALUE2 + *self == Stkerr::Value2 } } #[doc = "Field `STKERR` writer - BusFault on stacking for exception entry"] -pub type STKERR_W<'a, REG> = crate::BitWriter<'a, REG, STKERR_A>; -impl<'a, REG> STKERR_W<'a, REG> +pub type StkerrW<'a, REG> = crate::BitWriter<'a, REG, Stkerr>; +impl<'a, REG> StkerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no stacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STKERR_A::VALUE1) + self.variant(Stkerr::Value1) } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STKERR_A::VALUE2) + self.variant(Stkerr::Value2) } } -#[doc = "Field `LSPERR` reader - BusFault during floating point lazy state preservation"] -pub type LSPERR_R = crate::BitReader; #[doc = "BusFault during floating point lazy state preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LSPERR_A { +pub enum Lsperr { #[doc = "0: No bus fault occurred during floating-point lazy state preservation."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A bus fault occurred during floating-point lazy state preservation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LSPERR_A) -> Self { + fn from(variant: Lsperr) -> Self { variant as u8 != 0 } } -impl LSPERR_R { +#[doc = "Field `LSPERR` reader - BusFault during floating point lazy state preservation"] +pub type LsperrR = crate::BitReader; +impl LsperrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LSPERR_A { + pub const fn variant(&self) -> Lsperr { match self.bits { - false => LSPERR_A::VALUE1, - true => LSPERR_A::VALUE2, + false => Lsperr::Value1, + true => Lsperr::Value2, } } #[doc = "No bus fault occurred during floating-point lazy state preservation."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LSPERR_A::VALUE1 + *self == Lsperr::Value1 } #[doc = "A bus fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LSPERR_A::VALUE2 + *self == Lsperr::Value2 } } #[doc = "Field `LSPERR` writer - BusFault during floating point lazy state preservation"] -pub type LSPERR_W<'a, REG> = crate::BitWriter<'a, REG, LSPERR_A>; -impl<'a, REG> LSPERR_W<'a, REG> +pub type LsperrW<'a, REG> = crate::BitWriter<'a, REG, Lsperr>; +impl<'a, REG> LsperrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No bus fault occurred during floating-point lazy state preservation."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LSPERR_A::VALUE1) + self.variant(Lsperr::Value1) } #[doc = "A bus fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LSPERR_A::VALUE2) + self.variant(Lsperr::Value2) } } -#[doc = "Field `BFARVALID` reader - BusFault Address Register (BFAR) valid flag"] -pub type BFARVALID_R = crate::BitReader; #[doc = "BusFault Address Register (BFAR) valid flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFARVALID_A { +pub enum Bfarvalid { #[doc = "0: value in BFAR is not a valid fault address"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: BFAR holds a valid fault address."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFARVALID_A) -> Self { + fn from(variant: Bfarvalid) -> Self { variant as u8 != 0 } } -impl BFARVALID_R { +#[doc = "Field `BFARVALID` reader - BusFault Address Register (BFAR) valid flag"] +pub type BfarvalidR = crate::BitReader; +impl BfarvalidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFARVALID_A { + pub const fn variant(&self) -> Bfarvalid { match self.bits { - false => BFARVALID_A::VALUE1, - true => BFARVALID_A::VALUE2, + false => Bfarvalid::Value1, + true => Bfarvalid::Value2, } } #[doc = "value in BFAR is not a valid fault address"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFARVALID_A::VALUE1 + *self == Bfarvalid::Value1 } #[doc = "BFAR holds a valid fault address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFARVALID_A::VALUE2 + *self == Bfarvalid::Value2 } } #[doc = "Field `BFARVALID` writer - BusFault Address Register (BFAR) valid flag"] -pub type BFARVALID_W<'a, REG> = crate::BitWriter<'a, REG, BFARVALID_A>; -impl<'a, REG> BFARVALID_W<'a, REG> +pub type BfarvalidW<'a, REG> = crate::BitWriter<'a, REG, Bfarvalid>; +impl<'a, REG> BfarvalidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "value in BFAR is not a valid fault address"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFARVALID_A::VALUE1) + self.variant(Bfarvalid::Value1) } #[doc = "BFAR holds a valid fault address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFARVALID_A::VALUE2) + self.variant(Bfarvalid::Value2) } } -#[doc = "Field `UNDEFINSTR` reader - Undefined instruction UsageFault"] -pub type UNDEFINSTR_R = crate::BitReader; #[doc = "Undefined instruction UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UNDEFINSTR_A { +pub enum Undefinstr { #[doc = "0: no undefined instruction UsageFault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has attempted to execute an undefined instruction."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UNDEFINSTR_A) -> Self { + fn from(variant: Undefinstr) -> Self { variant as u8 != 0 } } -impl UNDEFINSTR_R { +#[doc = "Field `UNDEFINSTR` reader - Undefined instruction UsageFault"] +pub type UndefinstrR = crate::BitReader; +impl UndefinstrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UNDEFINSTR_A { + pub const fn variant(&self) -> Undefinstr { match self.bits { - false => UNDEFINSTR_A::VALUE1, - true => UNDEFINSTR_A::VALUE2, + false => Undefinstr::Value1, + true => Undefinstr::Value2, } } #[doc = "no undefined instruction UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UNDEFINSTR_A::VALUE1 + *self == Undefinstr::Value1 } #[doc = "the processor has attempted to execute an undefined instruction."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UNDEFINSTR_A::VALUE2 + *self == Undefinstr::Value2 } } #[doc = "Field `UNDEFINSTR` writer - Undefined instruction UsageFault"] -pub type UNDEFINSTR_W<'a, REG> = crate::BitWriter<'a, REG, UNDEFINSTR_A>; -impl<'a, REG> UNDEFINSTR_W<'a, REG> +pub type UndefinstrW<'a, REG> = crate::BitWriter<'a, REG, Undefinstr>; +impl<'a, REG> UndefinstrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no undefined instruction UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UNDEFINSTR_A::VALUE1) + self.variant(Undefinstr::Value1) } #[doc = "the processor has attempted to execute an undefined instruction."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UNDEFINSTR_A::VALUE2) + self.variant(Undefinstr::Value2) } } -#[doc = "Field `INVSTATE` reader - Invalid state UsageFault"] -pub type INVSTATE_R = crate::BitReader; #[doc = "Invalid state UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INVSTATE_A { +pub enum Invstate { #[doc = "0: no invalid state UsageFault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has attempted to execute an instruction that makes illegal use of the EPSR."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INVSTATE_A) -> Self { + fn from(variant: Invstate) -> Self { variant as u8 != 0 } } -impl INVSTATE_R { +#[doc = "Field `INVSTATE` reader - Invalid state UsageFault"] +pub type InvstateR = crate::BitReader; +impl InvstateR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INVSTATE_A { + pub const fn variant(&self) -> Invstate { match self.bits { - false => INVSTATE_A::VALUE1, - true => INVSTATE_A::VALUE2, + false => Invstate::Value1, + true => Invstate::Value2, } } #[doc = "no invalid state UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INVSTATE_A::VALUE1 + *self == Invstate::Value1 } #[doc = "the processor has attempted to execute an instruction that makes illegal use of the EPSR."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INVSTATE_A::VALUE2 + *self == Invstate::Value2 } } #[doc = "Field `INVSTATE` writer - Invalid state UsageFault"] -pub type INVSTATE_W<'a, REG> = crate::BitWriter<'a, REG, INVSTATE_A>; -impl<'a, REG> INVSTATE_W<'a, REG> +pub type InvstateW<'a, REG> = crate::BitWriter<'a, REG, Invstate>; +impl<'a, REG> InvstateW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no invalid state UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INVSTATE_A::VALUE1) + self.variant(Invstate::Value1) } #[doc = "the processor has attempted to execute an instruction that makes illegal use of the EPSR."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INVSTATE_A::VALUE2) + self.variant(Invstate::Value2) } } -#[doc = "Field `INVPC` reader - Invalid PC load UsageFault"] -pub type INVPC_R = crate::BitReader; #[doc = "Invalid PC load UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INVPC_A { +pub enum Invpc { #[doc = "0: no invalid PC load UsageFault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INVPC_A) -> Self { + fn from(variant: Invpc) -> Self { variant as u8 != 0 } } -impl INVPC_R { +#[doc = "Field `INVPC` reader - Invalid PC load UsageFault"] +pub type InvpcR = crate::BitReader; +impl InvpcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INVPC_A { + pub const fn variant(&self) -> Invpc { match self.bits { - false => INVPC_A::VALUE1, - true => INVPC_A::VALUE2, + false => Invpc::Value1, + true => Invpc::Value2, } } #[doc = "no invalid PC load UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INVPC_A::VALUE1 + *self == Invpc::Value1 } #[doc = "the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INVPC_A::VALUE2 + *self == Invpc::Value2 } } #[doc = "Field `INVPC` writer - Invalid PC load UsageFault"] -pub type INVPC_W<'a, REG> = crate::BitWriter<'a, REG, INVPC_A>; -impl<'a, REG> INVPC_W<'a, REG> +pub type InvpcW<'a, REG> = crate::BitWriter<'a, REG, Invpc>; +impl<'a, REG> InvpcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no invalid PC load UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INVPC_A::VALUE1) + self.variant(Invpc::Value1) } #[doc = "the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INVPC_A::VALUE2) + self.variant(Invpc::Value2) } } -#[doc = "Field `NOCP` reader - No coprocessor UsageFault"] -pub type NOCP_R = crate::BitReader; #[doc = "No coprocessor UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOCP_A { +pub enum Nocp { #[doc = "0: no UsageFault caused by attempting to access a coprocessor"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has attempted to access a coprocessor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOCP_A) -> Self { + fn from(variant: Nocp) -> Self { variant as u8 != 0 } } -impl NOCP_R { +#[doc = "Field `NOCP` reader - No coprocessor UsageFault"] +pub type NocpR = crate::BitReader; +impl NocpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NOCP_A { + pub const fn variant(&self) -> Nocp { match self.bits { - false => NOCP_A::VALUE1, - true => NOCP_A::VALUE2, + false => Nocp::Value1, + true => Nocp::Value2, } } #[doc = "no UsageFault caused by attempting to access a coprocessor"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NOCP_A::VALUE1 + *self == Nocp::Value1 } #[doc = "the processor has attempted to access a coprocessor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NOCP_A::VALUE2 + *self == Nocp::Value2 } } #[doc = "Field `NOCP` writer - No coprocessor UsageFault"] -pub type NOCP_W<'a, REG> = crate::BitWriter<'a, REG, NOCP_A>; -impl<'a, REG> NOCP_W<'a, REG> +pub type NocpW<'a, REG> = crate::BitWriter<'a, REG, Nocp>; +impl<'a, REG> NocpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no UsageFault caused by attempting to access a coprocessor"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NOCP_A::VALUE1) + self.variant(Nocp::Value1) } #[doc = "the processor has attempted to access a coprocessor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NOCP_A::VALUE2) + self.variant(Nocp::Value2) } } -#[doc = "Field `UNALIGNED` reader - Unaligned access UsageFault"] -pub type UNALIGNED_R = crate::BitReader; #[doc = "Unaligned access UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UNALIGNED_A { +pub enum Unaligned { #[doc = "0: no unaligned access fault, or unaligned access trapping not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has made an unaligned memory access."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UNALIGNED_A) -> Self { + fn from(variant: Unaligned) -> Self { variant as u8 != 0 } } -impl UNALIGNED_R { +#[doc = "Field `UNALIGNED` reader - Unaligned access UsageFault"] +pub type UnalignedR = crate::BitReader; +impl UnalignedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UNALIGNED_A { + pub const fn variant(&self) -> Unaligned { match self.bits { - false => UNALIGNED_A::VALUE1, - true => UNALIGNED_A::VALUE2, + false => Unaligned::Value1, + true => Unaligned::Value2, } } #[doc = "no unaligned access fault, or unaligned access trapping not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UNALIGNED_A::VALUE1 + *self == Unaligned::Value1 } #[doc = "the processor has made an unaligned memory access."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UNALIGNED_A::VALUE2 + *self == Unaligned::Value2 } } #[doc = "Field `UNALIGNED` writer - Unaligned access UsageFault"] -pub type UNALIGNED_W<'a, REG> = crate::BitWriter<'a, REG, UNALIGNED_A>; -impl<'a, REG> UNALIGNED_W<'a, REG> +pub type UnalignedW<'a, REG> = crate::BitWriter<'a, REG, Unaligned>; +impl<'a, REG> UnalignedW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unaligned access fault, or unaligned access trapping not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UNALIGNED_A::VALUE1) + self.variant(Unaligned::Value1) } #[doc = "the processor has made an unaligned memory access."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UNALIGNED_A::VALUE2) + self.variant(Unaligned::Value2) } } -#[doc = "Field `DIVBYZERO` reader - Divide by zero UsageFault"] -pub type DIVBYZERO_R = crate::BitReader; #[doc = "Divide by zero UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIVBYZERO_A { +pub enum Divbyzero { #[doc = "0: no divide by zero fault, or divide by zero trapping not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor has executed an SDIV or UDIV instruction with a divisor of 0"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIVBYZERO_A) -> Self { + fn from(variant: Divbyzero) -> Self { variant as u8 != 0 } } -impl DIVBYZERO_R { +#[doc = "Field `DIVBYZERO` reader - Divide by zero UsageFault"] +pub type DivbyzeroR = crate::BitReader; +impl DivbyzeroR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIVBYZERO_A { + pub const fn variant(&self) -> Divbyzero { match self.bits { - false => DIVBYZERO_A::VALUE1, - true => DIVBYZERO_A::VALUE2, + false => Divbyzero::Value1, + true => Divbyzero::Value2, } } #[doc = "no divide by zero fault, or divide by zero trapping not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIVBYZERO_A::VALUE1 + *self == Divbyzero::Value1 } #[doc = "the processor has executed an SDIV or UDIV instruction with a divisor of 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIVBYZERO_A::VALUE2 + *self == Divbyzero::Value2 } } #[doc = "Field `DIVBYZERO` writer - Divide by zero UsageFault"] -pub type DIVBYZERO_W<'a, REG> = crate::BitWriter<'a, REG, DIVBYZERO_A>; -impl<'a, REG> DIVBYZERO_W<'a, REG> +pub type DivbyzeroW<'a, REG> = crate::BitWriter<'a, REG, Divbyzero>; +impl<'a, REG> DivbyzeroW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no divide by zero fault, or divide by zero trapping not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVBYZERO_A::VALUE1) + self.variant(Divbyzero::Value1) } #[doc = "the processor has executed an SDIV or UDIV instruction with a divisor of 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVBYZERO_A::VALUE2) + self.variant(Divbyzero::Value2) } } impl R { #[doc = "Bit 0 - Instruction access violation flag"] #[inline(always)] - pub fn iaccviol(&self) -> IACCVIOL_R { - IACCVIOL_R::new((self.bits & 1) != 0) + pub fn iaccviol(&self) -> IaccviolR { + IaccviolR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Data access violation flag"] #[inline(always)] - pub fn daccviol(&self) -> DACCVIOL_R { - DACCVIOL_R::new(((self.bits >> 1) & 1) != 0) + pub fn daccviol(&self) -> DaccviolR { + DaccviolR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"] #[inline(always)] - pub fn munstkerr(&self) -> MUNSTKERR_R { - MUNSTKERR_R::new(((self.bits >> 3) & 1) != 0) + pub fn munstkerr(&self) -> MunstkerrR { + MunstkerrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MemManage fault on stacking for exception entry"] #[inline(always)] - pub fn mstkerr(&self) -> MSTKERR_R { - MSTKERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn mstkerr(&self) -> MstkerrR { + MstkerrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"] #[inline(always)] - pub fn mlsperr(&self) -> MLSPERR_R { - MLSPERR_R::new(((self.bits >> 5) & 1) != 0) + pub fn mlsperr(&self) -> MlsperrR { + MlsperrR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"] #[inline(always)] - pub fn mmarvalid(&self) -> MMARVALID_R { - MMARVALID_R::new(((self.bits >> 7) & 1) != 0) + pub fn mmarvalid(&self) -> MmarvalidR { + MmarvalidR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Instruction bus error"] #[inline(always)] - pub fn ibuserr(&self) -> IBUSERR_R { - IBUSERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn ibuserr(&self) -> IbuserrR { + IbuserrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Precise data bus error"] #[inline(always)] - pub fn preciserr(&self) -> PRECISERR_R { - PRECISERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn preciserr(&self) -> PreciserrR { + PreciserrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Imprecise data bus error"] #[inline(always)] - pub fn impreciserr(&self) -> IMPRECISERR_R { - IMPRECISERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn impreciserr(&self) -> ImpreciserrR { + ImpreciserrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - BusFault on unstacking for a return from exception"] #[inline(always)] - pub fn unstkerr(&self) -> UNSTKERR_R { - UNSTKERR_R::new(((self.bits >> 11) & 1) != 0) + pub fn unstkerr(&self) -> UnstkerrR { + UnstkerrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BusFault on stacking for exception entry"] #[inline(always)] - pub fn stkerr(&self) -> STKERR_R { - STKERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn stkerr(&self) -> StkerrR { + StkerrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - BusFault during floating point lazy state preservation"] #[inline(always)] - pub fn lsperr(&self) -> LSPERR_R { - LSPERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn lsperr(&self) -> LsperrR { + LsperrR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"] #[inline(always)] - pub fn bfarvalid(&self) -> BFARVALID_R { - BFARVALID_R::new(((self.bits >> 15) & 1) != 0) + pub fn bfarvalid(&self) -> BfarvalidR { + BfarvalidR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Undefined instruction UsageFault"] #[inline(always)] - pub fn undefinstr(&self) -> UNDEFINSTR_R { - UNDEFINSTR_R::new(((self.bits >> 16) & 1) != 0) + pub fn undefinstr(&self) -> UndefinstrR { + UndefinstrR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Invalid state UsageFault"] #[inline(always)] - pub fn invstate(&self) -> INVSTATE_R { - INVSTATE_R::new(((self.bits >> 17) & 1) != 0) + pub fn invstate(&self) -> InvstateR { + InvstateR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Invalid PC load UsageFault"] #[inline(always)] - pub fn invpc(&self) -> INVPC_R { - INVPC_R::new(((self.bits >> 18) & 1) != 0) + pub fn invpc(&self) -> InvpcR { + InvpcR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - No coprocessor UsageFault"] #[inline(always)] - pub fn nocp(&self) -> NOCP_R { - NOCP_R::new(((self.bits >> 19) & 1) != 0) + pub fn nocp(&self) -> NocpR { + NocpR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Unaligned access UsageFault"] #[inline(always)] - pub fn unaligned(&self) -> UNALIGNED_R { - UNALIGNED_R::new(((self.bits >> 24) & 1) != 0) + pub fn unaligned(&self) -> UnalignedR { + UnalignedR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Divide by zero UsageFault"] #[inline(always)] - pub fn divbyzero(&self) -> DIVBYZERO_R { - DIVBYZERO_R::new(((self.bits >> 25) & 1) != 0) + pub fn divbyzero(&self) -> DivbyzeroR { + DivbyzeroR::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - Instruction access violation flag"] #[inline(always)] #[must_use] - pub fn iaccviol(&mut self) -> IACCVIOL_W { - IACCVIOL_W::new(self, 0) + pub fn iaccviol(&mut self) -> IaccviolW { + IaccviolW::new(self, 0) } #[doc = "Bit 1 - Data access violation flag"] #[inline(always)] #[must_use] - pub fn daccviol(&mut self) -> DACCVIOL_W { - DACCVIOL_W::new(self, 1) + pub fn daccviol(&mut self) -> DaccviolW { + DaccviolW::new(self, 1) } #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"] #[inline(always)] #[must_use] - pub fn munstkerr(&mut self) -> MUNSTKERR_W { - MUNSTKERR_W::new(self, 3) + pub fn munstkerr(&mut self) -> MunstkerrW { + MunstkerrW::new(self, 3) } #[doc = "Bit 4 - MemManage fault on stacking for exception entry"] #[inline(always)] #[must_use] - pub fn mstkerr(&mut self) -> MSTKERR_W { - MSTKERR_W::new(self, 4) + pub fn mstkerr(&mut self) -> MstkerrW { + MstkerrW::new(self, 4) } #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"] #[inline(always)] #[must_use] - pub fn mlsperr(&mut self) -> MLSPERR_W { - MLSPERR_W::new(self, 5) + pub fn mlsperr(&mut self) -> MlsperrW { + MlsperrW::new(self, 5) } #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"] #[inline(always)] #[must_use] - pub fn mmarvalid(&mut self) -> MMARVALID_W { - MMARVALID_W::new(self, 7) + pub fn mmarvalid(&mut self) -> MmarvalidW { + MmarvalidW::new(self, 7) } #[doc = "Bit 8 - Instruction bus error"] #[inline(always)] #[must_use] - pub fn ibuserr(&mut self) -> IBUSERR_W { - IBUSERR_W::new(self, 8) + pub fn ibuserr(&mut self) -> IbuserrW { + IbuserrW::new(self, 8) } #[doc = "Bit 9 - Precise data bus error"] #[inline(always)] #[must_use] - pub fn preciserr(&mut self) -> PRECISERR_W { - PRECISERR_W::new(self, 9) + pub fn preciserr(&mut self) -> PreciserrW { + PreciserrW::new(self, 9) } #[doc = "Bit 10 - Imprecise data bus error"] #[inline(always)] #[must_use] - pub fn impreciserr(&mut self) -> IMPRECISERR_W { - IMPRECISERR_W::new(self, 10) + pub fn impreciserr(&mut self) -> ImpreciserrW { + ImpreciserrW::new(self, 10) } #[doc = "Bit 11 - BusFault on unstacking for a return from exception"] #[inline(always)] #[must_use] - pub fn unstkerr(&mut self) -> UNSTKERR_W { - UNSTKERR_W::new(self, 11) + pub fn unstkerr(&mut self) -> UnstkerrW { + UnstkerrW::new(self, 11) } #[doc = "Bit 12 - BusFault on stacking for exception entry"] #[inline(always)] #[must_use] - pub fn stkerr(&mut self) -> STKERR_W { - STKERR_W::new(self, 12) + pub fn stkerr(&mut self) -> StkerrW { + StkerrW::new(self, 12) } #[doc = "Bit 13 - BusFault during floating point lazy state preservation"] #[inline(always)] #[must_use] - pub fn lsperr(&mut self) -> LSPERR_W { - LSPERR_W::new(self, 13) + pub fn lsperr(&mut self) -> LsperrW { + LsperrW::new(self, 13) } #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"] #[inline(always)] #[must_use] - pub fn bfarvalid(&mut self) -> BFARVALID_W { - BFARVALID_W::new(self, 15) + pub fn bfarvalid(&mut self) -> BfarvalidW { + BfarvalidW::new(self, 15) } #[doc = "Bit 16 - Undefined instruction UsageFault"] #[inline(always)] #[must_use] - pub fn undefinstr(&mut self) -> UNDEFINSTR_W { - UNDEFINSTR_W::new(self, 16) + pub fn undefinstr(&mut self) -> UndefinstrW { + UndefinstrW::new(self, 16) } #[doc = "Bit 17 - Invalid state UsageFault"] #[inline(always)] #[must_use] - pub fn invstate(&mut self) -> INVSTATE_W { - INVSTATE_W::new(self, 17) + pub fn invstate(&mut self) -> InvstateW { + InvstateW::new(self, 17) } #[doc = "Bit 18 - Invalid PC load UsageFault"] #[inline(always)] #[must_use] - pub fn invpc(&mut self) -> INVPC_W { - INVPC_W::new(self, 18) + pub fn invpc(&mut self) -> InvpcW { + InvpcW::new(self, 18) } #[doc = "Bit 19 - No coprocessor UsageFault"] #[inline(always)] #[must_use] - pub fn nocp(&mut self) -> NOCP_W { - NOCP_W::new(self, 19) + pub fn nocp(&mut self) -> NocpW { + NocpW::new(self, 19) } #[doc = "Bit 24 - Unaligned access UsageFault"] #[inline(always)] #[must_use] - pub fn unaligned(&mut self) -> UNALIGNED_W { - UNALIGNED_W::new(self, 24) + pub fn unaligned(&mut self) -> UnalignedW { + UnalignedW::new(self, 24) } #[doc = "Bit 25 - Divide by zero UsageFault"] #[inline(always)] #[must_use] - pub fn divbyzero(&mut self) -> DIVBYZERO_W { - DIVBYZERO_W::new(self, 25) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn divbyzero(&mut self) -> DivbyzeroW { + DivbyzeroW::new(self, 25) } } #[doc = "Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CFSR_SPEC; -impl crate::RegisterSpec for CFSR_SPEC { +pub struct CfsrSpec; +impl crate::RegisterSpec for CfsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`cfsr::R`](R) reader structure"] -impl crate::Readable for CFSR_SPEC {} +impl crate::Readable for CfsrSpec {} #[doc = "`write(|w| ..)` method takes [`cfsr::W`](W) writer structure"] -impl crate::Writable for CFSR_SPEC { +impl crate::Writable for CfsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFSR to value 0"] -impl crate::Resettable for CFSR_SPEC { +impl crate::Resettable for CfsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/cpacr.rs b/src/ppb/cpacr.rs index e8b74010..5000724d 100644 --- a/src/ppb/cpacr.rs +++ b/src/ppb/cpacr.rs @@ -1,59 +1,59 @@ #[doc = "Register `CPACR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CPACR` writer"] -pub type W = crate::W; -#[doc = "Field `CP10` reader - Access privileges for coprocessor 10"] -pub type CP10_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Access privileges for coprocessor 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CP10_A { +pub enum Cp10 { #[doc = "0: Access denied. Any attempted access generates a NOCP UsageFault."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Privileged access only. An unprivileged access generates a NOCP fault."] - VALUE2 = 1, + Value2 = 1, #[doc = "3: Full access."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CP10_A) -> Self { + fn from(variant: Cp10) -> Self { variant as _ } } -impl crate::FieldSpec for CP10_A { +impl crate::FieldSpec for Cp10 { type Ux = u8; } -impl CP10_R { +#[doc = "Field `CP10` reader - Access privileges for coprocessor 10"] +pub type Cp10R = crate::FieldReader; +impl Cp10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CP10_A::VALUE1), - 1 => Some(CP10_A::VALUE2), - 3 => Some(CP10_A::VALUE4), + 0 => Some(Cp10::Value1), + 1 => Some(Cp10::Value2), + 3 => Some(Cp10::Value4), _ => None, } } #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CP10_A::VALUE1 + *self == Cp10::Value1 } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CP10_A::VALUE2 + *self == Cp10::Value2 } #[doc = "Full access."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CP10_A::VALUE4 + *self == Cp10::Value4 } } #[doc = "Field `CP10` writer - Access privileges for coprocessor 10"] -pub type CP10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CP10_A>; -impl<'a, REG> CP10_W<'a, REG> +pub type Cp10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Cp10>; +impl<'a, REG> Cp10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,71 +61,71 @@ where #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CP10_A::VALUE1) + self.variant(Cp10::Value1) } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CP10_A::VALUE2) + self.variant(Cp10::Value2) } #[doc = "Full access."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CP10_A::VALUE4) + self.variant(Cp10::Value4) } } -#[doc = "Field `CP11` reader - Access privileges for coprocessor 11"] -pub type CP11_R = crate::FieldReader; #[doc = "Access privileges for coprocessor 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CP11_A { +pub enum Cp11 { #[doc = "0: Access denied. Any attempted access generates a NOCP UsageFault."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Privileged access only. An unprivileged access generates a NOCP fault."] - VALUE2 = 1, + Value2 = 1, #[doc = "3: Full access."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CP11_A) -> Self { + fn from(variant: Cp11) -> Self { variant as _ } } -impl crate::FieldSpec for CP11_A { +impl crate::FieldSpec for Cp11 { type Ux = u8; } -impl CP11_R { +#[doc = "Field `CP11` reader - Access privileges for coprocessor 11"] +pub type Cp11R = crate::FieldReader; +impl Cp11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CP11_A::VALUE1), - 1 => Some(CP11_A::VALUE2), - 3 => Some(CP11_A::VALUE4), + 0 => Some(Cp11::Value1), + 1 => Some(Cp11::Value2), + 3 => Some(Cp11::Value4), _ => None, } } #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CP11_A::VALUE1 + *self == Cp11::Value1 } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CP11_A::VALUE2 + *self == Cp11::Value2 } #[doc = "Full access."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CP11_A::VALUE4 + *self == Cp11::Value4 } } #[doc = "Field `CP11` writer - Access privileges for coprocessor 11"] -pub type CP11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CP11_A>; -impl<'a, REG> CP11_W<'a, REG> +pub type Cp11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Cp11>; +impl<'a, REG> Cp11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -133,68 +133,59 @@ where #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CP11_A::VALUE1) + self.variant(Cp11::Value1) } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CP11_A::VALUE2) + self.variant(Cp11::Value2) } #[doc = "Full access."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CP11_A::VALUE4) + self.variant(Cp11::Value4) } } impl R { #[doc = "Bits 20:21 - Access privileges for coprocessor 10"] #[inline(always)] - pub fn cp10(&self) -> CP10_R { - CP10_R::new(((self.bits >> 20) & 3) as u8) + pub fn cp10(&self) -> Cp10R { + Cp10R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Access privileges for coprocessor 11"] #[inline(always)] - pub fn cp11(&self) -> CP11_R { - CP11_R::new(((self.bits >> 22) & 3) as u8) + pub fn cp11(&self) -> Cp11R { + Cp11R::new(((self.bits >> 22) & 3) as u8) } } impl W { #[doc = "Bits 20:21 - Access privileges for coprocessor 10"] #[inline(always)] #[must_use] - pub fn cp10(&mut self) -> CP10_W { - CP10_W::new(self, 20) + pub fn cp10(&mut self) -> Cp10W { + Cp10W::new(self, 20) } #[doc = "Bits 22:23 - Access privileges for coprocessor 11"] #[inline(always)] #[must_use] - pub fn cp11(&mut self) -> CP11_W { - CP11_W::new(self, 22) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cp11(&mut self) -> Cp11W { + Cp11W::new(self, 22) } } #[doc = "Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CPACR_SPEC; -impl crate::RegisterSpec for CPACR_SPEC { +pub struct CpacrSpec; +impl crate::RegisterSpec for CpacrSpec { type Ux = u32; } #[doc = "`read()` method returns [`cpacr::R`](R) reader structure"] -impl crate::Readable for CPACR_SPEC {} +impl crate::Readable for CpacrSpec {} #[doc = "`write(|w| ..)` method takes [`cpacr::W`](W) writer structure"] -impl crate::Writable for CPACR_SPEC { +impl crate::Writable for CpacrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CPACR to value 0"] -impl crate::Resettable for CPACR_SPEC { +impl crate::Resettable for CpacrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/cpuid.rs b/src/ppb/cpuid.rs index ac2d176b..9ac0d1e0 100644 --- a/src/ppb/cpuid.rs +++ b/src/ppb/cpuid.rs @@ -1,174 +1,174 @@ #[doc = "Register `CPUID` reader"] -pub type R = crate::R; -#[doc = "Field `Revision` reader - Revision number"] -pub type REVISION_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Revision number\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REVISION_A { +pub enum Revision { #[doc = "1: Patch 1"] - VALUE1 = 1, + Value1 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REVISION_A) -> Self { + fn from(variant: Revision) -> Self { variant as _ } } -impl crate::FieldSpec for REVISION_A { +impl crate::FieldSpec for Revision { type Ux = u8; } -impl REVISION_R { +#[doc = "Field `Revision` reader - Revision number"] +pub type RevisionR = crate::FieldReader; +impl RevisionR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(REVISION_A::VALUE1), + 1 => Some(Revision::Value1), _ => None, } } #[doc = "Patch 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REVISION_A::VALUE1 + *self == Revision::Value1 } } -#[doc = "Field `PartNo` reader - Part number of the processor"] -pub type PART_NO_R = crate::FieldReader; #[doc = "Part number of the processor\n\nValue on reset: 3108"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PART_NO_A { +pub enum PartNo { #[doc = "3108: Cortex-M4"] - VALUE1 = 3108, + Value1 = 3108, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PART_NO_A) -> Self { + fn from(variant: PartNo) -> Self { variant as _ } } -impl crate::FieldSpec for PART_NO_A { +impl crate::FieldSpec for PartNo { type Ux = u16; } -impl PART_NO_R { +#[doc = "Field `PartNo` reader - Part number of the processor"] +pub type PartNoR = crate::FieldReader; +impl PartNoR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3108 => Some(PART_NO_A::VALUE1), + 3108 => Some(PartNo::Value1), _ => None, } } #[doc = "Cortex-M4"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PART_NO_A::VALUE1 + *self == PartNo::Value1 } } #[doc = "Field `Constant` reader - Reads as 0xF"] -pub type CONSTANT_R = crate::FieldReader; -#[doc = "Field `Variant` reader - Variant number"] -pub type VARIANT_R = crate::FieldReader; +pub type ConstantR = crate::FieldReader; #[doc = "Variant number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VARIANT_A { +pub enum Variant { #[doc = "0: Revision 0"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VARIANT_A) -> Self { + fn from(variant: Variant) -> Self { variant as _ } } -impl crate::FieldSpec for VARIANT_A { +impl crate::FieldSpec for Variant { type Ux = u8; } -impl VARIANT_R { +#[doc = "Field `Variant` reader - Variant number"] +pub type VariantR = crate::FieldReader; +impl VariantR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(VARIANT_A::VALUE1), + 0 => Some(Variant::Value1), _ => None, } } #[doc = "Revision 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VARIANT_A::VALUE1 + *self == Variant::Value1 } } -#[doc = "Field `Implementer` reader - Implementer code"] -pub type IMPLEMENTER_R = crate::FieldReader; #[doc = "Implementer code\n\nValue on reset: 65"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum IMPLEMENTER_A { +pub enum Implementer { #[doc = "65: ARM"] - VALUE1 = 65, + Value1 = 65, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: IMPLEMENTER_A) -> Self { + fn from(variant: Implementer) -> Self { variant as _ } } -impl crate::FieldSpec for IMPLEMENTER_A { +impl crate::FieldSpec for Implementer { type Ux = u8; } -impl IMPLEMENTER_R { +#[doc = "Field `Implementer` reader - Implementer code"] +pub type ImplementerR = crate::FieldReader; +impl ImplementerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 65 => Some(IMPLEMENTER_A::VALUE1), + 65 => Some(Implementer::Value1), _ => None, } } #[doc = "ARM"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IMPLEMENTER_A::VALUE1 + *self == Implementer::Value1 } } impl R { #[doc = "Bits 0:3 - Revision number"] #[inline(always)] - pub fn revision(&self) -> REVISION_R { - REVISION_R::new((self.bits & 0x0f) as u8) + pub fn revision(&self) -> RevisionR { + RevisionR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:15 - Part number of the processor"] #[inline(always)] - pub fn part_no(&self) -> PART_NO_R { - PART_NO_R::new(((self.bits >> 4) & 0x0fff) as u16) + pub fn part_no(&self) -> PartNoR { + PartNoR::new(((self.bits >> 4) & 0x0fff) as u16) } #[doc = "Bits 16:19 - Reads as 0xF"] #[inline(always)] - pub fn constant(&self) -> CONSTANT_R { - CONSTANT_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn constant(&self) -> ConstantR { + ConstantR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Variant number"] #[inline(always)] - pub fn variant(&self) -> VARIANT_R { - VARIANT_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn variant(&self) -> VariantR { + VariantR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:31 - Implementer code"] #[inline(always)] - pub fn implementer(&self) -> IMPLEMENTER_R { - IMPLEMENTER_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn implementer(&self) -> ImplementerR { + ImplementerR::new(((self.bits >> 24) & 0xff) as u8) } } #[doc = "CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CPUID_SPEC; -impl crate::RegisterSpec for CPUID_SPEC { +pub struct CpuidSpec; +impl crate::RegisterSpec for CpuidSpec { type Ux = u32; } #[doc = "`read()` method returns [`cpuid::R`](R) reader structure"] -impl crate::Readable for CPUID_SPEC {} +impl crate::Readable for CpuidSpec {} #[doc = "`reset()` method sets CPUID to value 0x410f_c241"] -impl crate::Resettable for CPUID_SPEC { +impl crate::Resettable for CpuidSpec { const RESET_VALUE: u32 = 0x410f_c241; } diff --git a/src/ppb/fpcar.rs b/src/ppb/fpcar.rs index c065f38a..f44020d2 100644 --- a/src/ppb/fpcar.rs +++ b/src/ppb/fpcar.rs @@ -1,49 +1,40 @@ #[doc = "Register `FPCAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address"] -pub type ADDRESS_R = crate::FieldReader; +pub type AddressR = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address"] -pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; impl R { #[doc = "Bits 3:31 - Address"] #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new((self.bits >> 3) & 0x1fff_ffff) + pub fn address(&self) -> AddressR { + AddressR::new((self.bits >> 3) & 0x1fff_ffff) } } impl W { #[doc = "Bits 3:31 - Address"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> ADDRESS_W { - ADDRESS_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn address(&mut self) -> AddressW { + AddressW::new(self, 3) } } #[doc = "Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPCAR_SPEC; -impl crate::RegisterSpec for FPCAR_SPEC { +pub struct FpcarSpec; +impl crate::RegisterSpec for FpcarSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpcar::R`](R) reader structure"] -impl crate::Readable for FPCAR_SPEC {} +impl crate::Readable for FpcarSpec {} #[doc = "`write(|w| ..)` method takes [`fpcar::W`](W) writer structure"] -impl crate::Writable for FPCAR_SPEC { +impl crate::Writable for FpcarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCAR to value 0"] -impl crate::Resettable for FPCAR_SPEC { +impl crate::Resettable for FpcarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/fpccr.rs b/src/ppb/fpccr.rs index f41c5557..397bbb8c 100644 --- a/src/ppb/fpccr.rs +++ b/src/ppb/fpccr.rs @@ -1,610 +1,601 @@ #[doc = "Register `FPCCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCCR` writer"] -pub type W = crate::W; -#[doc = "Field `LSPACT` reader - Lazy State Preservation Active"] -pub type LSPACT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Lazy State Preservation Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LSPACT_A { +pub enum Lspact { #[doc = "0: Lazy state preservation is not active."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LSPACT_A) -> Self { + fn from(variant: Lspact) -> Self { variant as u8 != 0 } } -impl LSPACT_R { +#[doc = "Field `LSPACT` reader - Lazy State Preservation Active"] +pub type LspactR = crate::BitReader; +impl LspactR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LSPACT_A { + pub const fn variant(&self) -> Lspact { match self.bits { - false => LSPACT_A::VALUE1, - true => LSPACT_A::VALUE2, + false => Lspact::Value1, + true => Lspact::Value2, } } #[doc = "Lazy state preservation is not active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LSPACT_A::VALUE1 + *self == Lspact::Value1 } #[doc = "Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LSPACT_A::VALUE2 + *self == Lspact::Value2 } } #[doc = "Field `LSPACT` writer - Lazy State Preservation Active"] -pub type LSPACT_W<'a, REG> = crate::BitWriter<'a, REG, LSPACT_A>; -impl<'a, REG> LSPACT_W<'a, REG> +pub type LspactW<'a, REG> = crate::BitWriter<'a, REG, Lspact>; +impl<'a, REG> LspactW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Lazy state preservation is not active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LSPACT_A::VALUE1) + self.variant(Lspact::Value1) } #[doc = "Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LSPACT_A::VALUE2) + self.variant(Lspact::Value2) } } -#[doc = "Field `USER` reader - User allocated Stack Frame"] -pub type USER_R = crate::BitReader; #[doc = "User allocated Stack Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USER_A { +pub enum User { #[doc = "0: Privilege level was not user when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Privilege level was user when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USER_A) -> Self { + fn from(variant: User) -> Self { variant as u8 != 0 } } -impl USER_R { +#[doc = "Field `USER` reader - User allocated Stack Frame"] +pub type UserR = crate::BitReader; +impl UserR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USER_A { + pub const fn variant(&self) -> User { match self.bits { - false => USER_A::VALUE1, - true => USER_A::VALUE2, + false => User::Value1, + true => User::Value2, } } #[doc = "Privilege level was not user when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USER_A::VALUE1 + *self == User::Value1 } #[doc = "Privilege level was user when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USER_A::VALUE2 + *self == User::Value2 } } #[doc = "Field `USER` writer - User allocated Stack Frame"] -pub type USER_W<'a, REG> = crate::BitWriter<'a, REG, USER_A>; -impl<'a, REG> USER_W<'a, REG> +pub type UserW<'a, REG> = crate::BitWriter<'a, REG, User>; +impl<'a, REG> UserW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Privilege level was not user when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USER_A::VALUE1) + self.variant(User::Value1) } #[doc = "Privilege level was user when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USER_A::VALUE2) + self.variant(User::Value2) } } -#[doc = "Field `THREAD` reader - Thread Mode allocated Stack Frame"] -pub type THREAD_R = crate::BitReader; #[doc = "Thread Mode allocated Stack Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum THREAD_A { +pub enum Thread { #[doc = "0: Mode was not Thread Mode when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Mode was Thread Mode when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: THREAD_A) -> Self { + fn from(variant: Thread) -> Self { variant as u8 != 0 } } -impl THREAD_R { +#[doc = "Field `THREAD` reader - Thread Mode allocated Stack Frame"] +pub type ThreadR = crate::BitReader; +impl ThreadR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> THREAD_A { + pub const fn variant(&self) -> Thread { match self.bits { - false => THREAD_A::VALUE1, - true => THREAD_A::VALUE2, + false => Thread::Value1, + true => Thread::Value2, } } #[doc = "Mode was not Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == THREAD_A::VALUE1 + *self == Thread::Value1 } #[doc = "Mode was Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == THREAD_A::VALUE2 + *self == Thread::Value2 } } #[doc = "Field `THREAD` writer - Thread Mode allocated Stack Frame"] -pub type THREAD_W<'a, REG> = crate::BitWriter<'a, REG, THREAD_A>; -impl<'a, REG> THREAD_W<'a, REG> +pub type ThreadW<'a, REG> = crate::BitWriter<'a, REG, Thread>; +impl<'a, REG> ThreadW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Mode was not Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(THREAD_A::VALUE1) + self.variant(Thread::Value1) } #[doc = "Mode was Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(THREAD_A::VALUE2) + self.variant(Thread::Value2) } } -#[doc = "Field `HFRDY` reader - HardFault Ready"] -pub type HFRDY_R = crate::BitReader; #[doc = "HardFault Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HFRDY_A { +pub enum Hfrdy { #[doc = "0: Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HFRDY_A) -> Self { + fn from(variant: Hfrdy) -> Self { variant as u8 != 0 } } -impl HFRDY_R { +#[doc = "Field `HFRDY` reader - HardFault Ready"] +pub type HfrdyR = crate::BitReader; +impl HfrdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HFRDY_A { + pub const fn variant(&self) -> Hfrdy { match self.bits { - false => HFRDY_A::VALUE1, - true => HFRDY_A::VALUE2, + false => Hfrdy::Value1, + true => Hfrdy::Value2, } } #[doc = "Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HFRDY_A::VALUE1 + *self == Hfrdy::Value1 } #[doc = "Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HFRDY_A::VALUE2 + *self == Hfrdy::Value2 } } #[doc = "Field `HFRDY` writer - HardFault Ready"] -pub type HFRDY_W<'a, REG> = crate::BitWriter<'a, REG, HFRDY_A>; -impl<'a, REG> HFRDY_W<'a, REG> +pub type HfrdyW<'a, REG> = crate::BitWriter<'a, REG, Hfrdy>; +impl<'a, REG> HfrdyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HFRDY_A::VALUE1) + self.variant(Hfrdy::Value1) } #[doc = "Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HFRDY_A::VALUE2) + self.variant(Hfrdy::Value2) } } -#[doc = "Field `MMRDY` reader - MemManage Ready"] -pub type MMRDY_R = crate::BitReader; #[doc = "MemManage Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMRDY_A { +pub enum Mmrdy { #[doc = "0: MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMRDY_A) -> Self { + fn from(variant: Mmrdy) -> Self { variant as u8 != 0 } } -impl MMRDY_R { +#[doc = "Field `MMRDY` reader - MemManage Ready"] +pub type MmrdyR = crate::BitReader; +impl MmrdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMRDY_A { + pub const fn variant(&self) -> Mmrdy { match self.bits { - false => MMRDY_A::VALUE1, - true => MMRDY_A::VALUE2, + false => Mmrdy::Value1, + true => Mmrdy::Value2, } } #[doc = "MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMRDY_A::VALUE1 + *self == Mmrdy::Value1 } #[doc = "MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMRDY_A::VALUE2 + *self == Mmrdy::Value2 } } #[doc = "Field `MMRDY` writer - MemManage Ready"] -pub type MMRDY_W<'a, REG> = crate::BitWriter<'a, REG, MMRDY_A>; -impl<'a, REG> MMRDY_W<'a, REG> +pub type MmrdyW<'a, REG> = crate::BitWriter<'a, REG, Mmrdy>; +impl<'a, REG> MmrdyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMRDY_A::VALUE1) + self.variant(Mmrdy::Value1) } #[doc = "MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMRDY_A::VALUE2) + self.variant(Mmrdy::Value2) } } -#[doc = "Field `BFRDY` reader - BusFault Ready"] -pub type BFRDY_R = crate::BitReader; #[doc = "BusFault Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFRDY_A { +pub enum Bfrdy { #[doc = "0: BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFRDY_A) -> Self { + fn from(variant: Bfrdy) -> Self { variant as u8 != 0 } } -impl BFRDY_R { +#[doc = "Field `BFRDY` reader - BusFault Ready"] +pub type BfrdyR = crate::BitReader; +impl BfrdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFRDY_A { + pub const fn variant(&self) -> Bfrdy { match self.bits { - false => BFRDY_A::VALUE1, - true => BFRDY_A::VALUE2, + false => Bfrdy::Value1, + true => Bfrdy::Value2, } } #[doc = "BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFRDY_A::VALUE1 + *self == Bfrdy::Value1 } #[doc = "BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFRDY_A::VALUE2 + *self == Bfrdy::Value2 } } #[doc = "Field `BFRDY` writer - BusFault Ready"] -pub type BFRDY_W<'a, REG> = crate::BitWriter<'a, REG, BFRDY_A>; -impl<'a, REG> BFRDY_W<'a, REG> +pub type BfrdyW<'a, REG> = crate::BitWriter<'a, REG, Bfrdy>; +impl<'a, REG> BfrdyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFRDY_A::VALUE1) + self.variant(Bfrdy::Value1) } #[doc = "BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFRDY_A::VALUE2) + self.variant(Bfrdy::Value2) } } -#[doc = "Field `MONRDY` reader - Monitor Ready"] -pub type MONRDY_R = crate::BitReader; #[doc = "Monitor Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MONRDY_A { +pub enum Monrdy { #[doc = "0: Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MONRDY_A) -> Self { + fn from(variant: Monrdy) -> Self { variant as u8 != 0 } } -impl MONRDY_R { +#[doc = "Field `MONRDY` reader - Monitor Ready"] +pub type MonrdyR = crate::BitReader; +impl MonrdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MONRDY_A { + pub const fn variant(&self) -> Monrdy { match self.bits { - false => MONRDY_A::VALUE1, - true => MONRDY_A::VALUE2, + false => Monrdy::Value1, + true => Monrdy::Value2, } } #[doc = "Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MONRDY_A::VALUE1 + *self == Monrdy::Value1 } #[doc = "Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MONRDY_A::VALUE2 + *self == Monrdy::Value2 } } #[doc = "Field `MONRDY` writer - Monitor Ready"] -pub type MONRDY_W<'a, REG> = crate::BitWriter<'a, REG, MONRDY_A>; -impl<'a, REG> MONRDY_W<'a, REG> +pub type MonrdyW<'a, REG> = crate::BitWriter<'a, REG, Monrdy>; +impl<'a, REG> MonrdyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MONRDY_A::VALUE1) + self.variant(Monrdy::Value1) } #[doc = "Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MONRDY_A::VALUE2) + self.variant(Monrdy::Value2) } } -#[doc = "Field `LSPEN` reader - Lazy State Preservation Enabled"] -pub type LSPEN_R = crate::BitReader; #[doc = "Lazy State Preservation Enabled\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LSPEN_A { +pub enum Lspen { #[doc = "0: Disable automatic lazy state preservation for floating-point context."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable automatic lazy state preservation for floating-point context."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LSPEN_A) -> Self { + fn from(variant: Lspen) -> Self { variant as u8 != 0 } } -impl LSPEN_R { +#[doc = "Field `LSPEN` reader - Lazy State Preservation Enabled"] +pub type LspenR = crate::BitReader; +impl LspenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LSPEN_A { + pub const fn variant(&self) -> Lspen { match self.bits { - false => LSPEN_A::VALUE1, - true => LSPEN_A::VALUE2, + false => Lspen::Value1, + true => Lspen::Value2, } } #[doc = "Disable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LSPEN_A::VALUE1 + *self == Lspen::Value1 } #[doc = "Enable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LSPEN_A::VALUE2 + *self == Lspen::Value2 } } #[doc = "Field `LSPEN` writer - Lazy State Preservation Enabled"] -pub type LSPEN_W<'a, REG> = crate::BitWriter<'a, REG, LSPEN_A>; -impl<'a, REG> LSPEN_W<'a, REG> +pub type LspenW<'a, REG> = crate::BitWriter<'a, REG, Lspen>; +impl<'a, REG> LspenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LSPEN_A::VALUE1) + self.variant(Lspen::Value1) } #[doc = "Enable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LSPEN_A::VALUE2) + self.variant(Lspen::Value2) } } -#[doc = "Field `ASPEN` reader - Automatic State Preservation"] -pub type ASPEN_R = crate::BitReader; #[doc = "Automatic State Preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASPEN_A { +pub enum Aspen { #[doc = "0: Disable CONTROL setting on execution of a floating-point instruction."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable CONTROL setting on execution of a floating-point instruction."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASPEN_A) -> Self { + fn from(variant: Aspen) -> Self { variant as u8 != 0 } } -impl ASPEN_R { +#[doc = "Field `ASPEN` reader - Automatic State Preservation"] +pub type AspenR = crate::BitReader; +impl AspenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASPEN_A { + pub const fn variant(&self) -> Aspen { match self.bits { - false => ASPEN_A::VALUE1, - true => ASPEN_A::VALUE2, + false => Aspen::Value1, + true => Aspen::Value2, } } #[doc = "Disable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASPEN_A::VALUE1 + *self == Aspen::Value1 } #[doc = "Enable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASPEN_A::VALUE2 + *self == Aspen::Value2 } } #[doc = "Field `ASPEN` writer - Automatic State Preservation"] -pub type ASPEN_W<'a, REG> = crate::BitWriter<'a, REG, ASPEN_A>; -impl<'a, REG> ASPEN_W<'a, REG> +pub type AspenW<'a, REG> = crate::BitWriter<'a, REG, Aspen>; +impl<'a, REG> AspenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASPEN_A::VALUE1) + self.variant(Aspen::Value1) } #[doc = "Enable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASPEN_A::VALUE2) + self.variant(Aspen::Value2) } } impl R { #[doc = "Bit 0 - Lazy State Preservation Active"] #[inline(always)] - pub fn lspact(&self) -> LSPACT_R { - LSPACT_R::new((self.bits & 1) != 0) + pub fn lspact(&self) -> LspactR { + LspactR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - User allocated Stack Frame"] #[inline(always)] - pub fn user(&self) -> USER_R { - USER_R::new(((self.bits >> 1) & 1) != 0) + pub fn user(&self) -> UserR { + UserR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Thread Mode allocated Stack Frame"] #[inline(always)] - pub fn thread(&self) -> THREAD_R { - THREAD_R::new(((self.bits >> 3) & 1) != 0) + pub fn thread(&self) -> ThreadR { + ThreadR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - HardFault Ready"] #[inline(always)] - pub fn hfrdy(&self) -> HFRDY_R { - HFRDY_R::new(((self.bits >> 4) & 1) != 0) + pub fn hfrdy(&self) -> HfrdyR { + HfrdyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MemManage Ready"] #[inline(always)] - pub fn mmrdy(&self) -> MMRDY_R { - MMRDY_R::new(((self.bits >> 5) & 1) != 0) + pub fn mmrdy(&self) -> MmrdyR { + MmrdyR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - BusFault Ready"] #[inline(always)] - pub fn bfrdy(&self) -> BFRDY_R { - BFRDY_R::new(((self.bits >> 6) & 1) != 0) + pub fn bfrdy(&self) -> BfrdyR { + BfrdyR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Monitor Ready"] #[inline(always)] - pub fn monrdy(&self) -> MONRDY_R { - MONRDY_R::new(((self.bits >> 8) & 1) != 0) + pub fn monrdy(&self) -> MonrdyR { + MonrdyR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 30 - Lazy State Preservation Enabled"] #[inline(always)] - pub fn lspen(&self) -> LSPEN_R { - LSPEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn lspen(&self) -> LspenR { + LspenR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Automatic State Preservation"] #[inline(always)] - pub fn aspen(&self) -> ASPEN_R { - ASPEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn aspen(&self) -> AspenR { + AspenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Lazy State Preservation Active"] #[inline(always)] #[must_use] - pub fn lspact(&mut self) -> LSPACT_W { - LSPACT_W::new(self, 0) + pub fn lspact(&mut self) -> LspactW { + LspactW::new(self, 0) } #[doc = "Bit 1 - User allocated Stack Frame"] #[inline(always)] #[must_use] - pub fn user(&mut self) -> USER_W { - USER_W::new(self, 1) + pub fn user(&mut self) -> UserW { + UserW::new(self, 1) } #[doc = "Bit 3 - Thread Mode allocated Stack Frame"] #[inline(always)] #[must_use] - pub fn thread(&mut self) -> THREAD_W { - THREAD_W::new(self, 3) + pub fn thread(&mut self) -> ThreadW { + ThreadW::new(self, 3) } #[doc = "Bit 4 - HardFault Ready"] #[inline(always)] #[must_use] - pub fn hfrdy(&mut self) -> HFRDY_W { - HFRDY_W::new(self, 4) + pub fn hfrdy(&mut self) -> HfrdyW { + HfrdyW::new(self, 4) } #[doc = "Bit 5 - MemManage Ready"] #[inline(always)] #[must_use] - pub fn mmrdy(&mut self) -> MMRDY_W { - MMRDY_W::new(self, 5) + pub fn mmrdy(&mut self) -> MmrdyW { + MmrdyW::new(self, 5) } #[doc = "Bit 6 - BusFault Ready"] #[inline(always)] #[must_use] - pub fn bfrdy(&mut self) -> BFRDY_W { - BFRDY_W::new(self, 6) + pub fn bfrdy(&mut self) -> BfrdyW { + BfrdyW::new(self, 6) } #[doc = "Bit 8 - Monitor Ready"] #[inline(always)] #[must_use] - pub fn monrdy(&mut self) -> MONRDY_W { - MONRDY_W::new(self, 8) + pub fn monrdy(&mut self) -> MonrdyW { + MonrdyW::new(self, 8) } #[doc = "Bit 30 - Lazy State Preservation Enabled"] #[inline(always)] #[must_use] - pub fn lspen(&mut self) -> LSPEN_W { - LSPEN_W::new(self, 30) + pub fn lspen(&mut self) -> LspenW { + LspenW::new(self, 30) } #[doc = "Bit 31 - Automatic State Preservation"] #[inline(always)] #[must_use] - pub fn aspen(&mut self) -> ASPEN_W { - ASPEN_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn aspen(&mut self) -> AspenW { + AspenW::new(self, 31) } } #[doc = "Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPCCR_SPEC; -impl crate::RegisterSpec for FPCCR_SPEC { +pub struct FpccrSpec; +impl crate::RegisterSpec for FpccrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpccr::R`](R) reader structure"] -impl crate::Readable for FPCCR_SPEC {} +impl crate::Readable for FpccrSpec {} #[doc = "`write(|w| ..)` method takes [`fpccr::W`](W) writer structure"] -impl crate::Writable for FPCCR_SPEC { +impl crate::Writable for FpccrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCCR to value 0"] -impl crate::Resettable for FPCCR_SPEC { +impl crate::Resettable for FpccrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/fpdscr.rs b/src/ppb/fpdscr.rs index a3e82c18..5bc79315 100644 --- a/src/ppb/fpdscr.rs +++ b/src/ppb/fpdscr.rs @@ -1,94 +1,85 @@ #[doc = "Register `FPDSCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPDSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RMode` reader - Default value for FPSCR.RMode"] -pub type RMODE_R = crate::FieldReader; +pub type RmodeR = crate::FieldReader; #[doc = "Field `RMode` writer - Default value for FPSCR.RMode"] -pub type RMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type RmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FZ` reader - Default value for FPSCR.FZ"] -pub type FZ_R = crate::BitReader; +pub type FzR = crate::BitReader; #[doc = "Field `FZ` writer - Default value for FPSCR.FZ"] -pub type FZ_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FzW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DN` reader - Default value for FPSCR.DN"] -pub type DN_R = crate::BitReader; +pub type DnR = crate::BitReader; #[doc = "Field `DN` writer - Default value for FPSCR.DN"] -pub type DN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DnW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHP` reader - Default value for FPSCR.AHP"] -pub type AHP_R = crate::BitReader; +pub type AhpR = crate::BitReader; #[doc = "Field `AHP` writer - Default value for FPSCR.AHP"] -pub type AHP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 22:23 - Default value for FPSCR.RMode"] #[inline(always)] - pub fn rmode(&self) -> RMODE_R { - RMODE_R::new(((self.bits >> 22) & 3) as u8) + pub fn rmode(&self) -> RmodeR { + RmodeR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Default value for FPSCR.FZ"] #[inline(always)] - pub fn fz(&self) -> FZ_R { - FZ_R::new(((self.bits >> 24) & 1) != 0) + pub fn fz(&self) -> FzR { + FzR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Default value for FPSCR.DN"] #[inline(always)] - pub fn dn(&self) -> DN_R { - DN_R::new(((self.bits >> 25) & 1) != 0) + pub fn dn(&self) -> DnR { + DnR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Default value for FPSCR.AHP"] #[inline(always)] - pub fn ahp(&self) -> AHP_R { - AHP_R::new(((self.bits >> 26) & 1) != 0) + pub fn ahp(&self) -> AhpR { + AhpR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 22:23 - Default value for FPSCR.RMode"] #[inline(always)] #[must_use] - pub fn rmode(&mut self) -> RMODE_W { - RMODE_W::new(self, 22) + pub fn rmode(&mut self) -> RmodeW { + RmodeW::new(self, 22) } #[doc = "Bit 24 - Default value for FPSCR.FZ"] #[inline(always)] #[must_use] - pub fn fz(&mut self) -> FZ_W { - FZ_W::new(self, 24) + pub fn fz(&mut self) -> FzW { + FzW::new(self, 24) } #[doc = "Bit 25 - Default value for FPSCR.DN"] #[inline(always)] #[must_use] - pub fn dn(&mut self) -> DN_W { - DN_W::new(self, 25) + pub fn dn(&mut self) -> DnW { + DnW::new(self, 25) } #[doc = "Bit 26 - Default value for FPSCR.AHP"] #[inline(always)] #[must_use] - pub fn ahp(&mut self) -> AHP_W { - AHP_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ahp(&mut self) -> AhpW { + AhpW::new(self, 26) } } #[doc = "Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FPDSCR_SPEC; -impl crate::RegisterSpec for FPDSCR_SPEC { +pub struct FpdscrSpec; +impl crate::RegisterSpec for FpdscrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fpdscr::R`](R) reader structure"] -impl crate::Readable for FPDSCR_SPEC {} +impl crate::Readable for FpdscrSpec {} #[doc = "`write(|w| ..)` method takes [`fpdscr::W`](W) writer structure"] -impl crate::Writable for FPDSCR_SPEC { +impl crate::Writable for FpdscrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPDSCR to value 0"] -impl crate::Resettable for FPDSCR_SPEC { +impl crate::Resettable for FpdscrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/hfsr.rs b/src/ppb/hfsr.rs index 2f003556..2a5023ce 100644 --- a/src/ppb/hfsr.rs +++ b/src/ppb/hfsr.rs @@ -1,177 +1,168 @@ #[doc = "Register `HFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HFSR` writer"] -pub type W = crate::W; -#[doc = "Field `VECTTBL` reader - BusFault on vector table read"] -pub type VECTTBL_R = crate::BitReader; +pub type W = crate::W; #[doc = "BusFault on vector table read\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VECTTBL_A { +pub enum Vecttbl { #[doc = "0: no BusFault on vector table read"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: BusFault on vector table read"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VECTTBL_A) -> Self { + fn from(variant: Vecttbl) -> Self { variant as u8 != 0 } } -impl VECTTBL_R { +#[doc = "Field `VECTTBL` reader - BusFault on vector table read"] +pub type VecttblR = crate::BitReader; +impl VecttblR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VECTTBL_A { + pub const fn variant(&self) -> Vecttbl { match self.bits { - false => VECTTBL_A::VALUE1, - true => VECTTBL_A::VALUE2, + false => Vecttbl::Value1, + true => Vecttbl::Value2, } } #[doc = "no BusFault on vector table read"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VECTTBL_A::VALUE1 + *self == Vecttbl::Value1 } #[doc = "BusFault on vector table read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VECTTBL_A::VALUE2 + *self == Vecttbl::Value2 } } #[doc = "Field `VECTTBL` writer - BusFault on vector table read"] -pub type VECTTBL_W<'a, REG> = crate::BitWriter<'a, REG, VECTTBL_A>; -impl<'a, REG> VECTTBL_W<'a, REG> +pub type VecttblW<'a, REG> = crate::BitWriter<'a, REG, Vecttbl>; +impl<'a, REG> VecttblW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no BusFault on vector table read"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VECTTBL_A::VALUE1) + self.variant(Vecttbl::Value1) } #[doc = "BusFault on vector table read"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VECTTBL_A::VALUE2) + self.variant(Vecttbl::Value2) } } -#[doc = "Field `FORCED` reader - Forced HardFault"] -pub type FORCED_R = crate::BitReader; #[doc = "Forced HardFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCED_A { +pub enum Forced { #[doc = "0: no forced HardFault"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: forced HardFault."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCED_A) -> Self { + fn from(variant: Forced) -> Self { variant as u8 != 0 } } -impl FORCED_R { +#[doc = "Field `FORCED` reader - Forced HardFault"] +pub type ForcedR = crate::BitReader; +impl ForcedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FORCED_A { + pub const fn variant(&self) -> Forced { match self.bits { - false => FORCED_A::VALUE1, - true => FORCED_A::VALUE2, + false => Forced::Value1, + true => Forced::Value2, } } #[doc = "no forced HardFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FORCED_A::VALUE1 + *self == Forced::Value1 } #[doc = "forced HardFault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FORCED_A::VALUE2 + *self == Forced::Value2 } } #[doc = "Field `FORCED` writer - Forced HardFault"] -pub type FORCED_W<'a, REG> = crate::BitWriter<'a, REG, FORCED_A>; -impl<'a, REG> FORCED_W<'a, REG> +pub type ForcedW<'a, REG> = crate::BitWriter<'a, REG, Forced>; +impl<'a, REG> ForcedW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no forced HardFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FORCED_A::VALUE1) + self.variant(Forced::Value1) } #[doc = "forced HardFault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FORCED_A::VALUE2) + self.variant(Forced::Value2) } } #[doc = "Field `DEBUGEVT` reader - Reserved for Debug use"] -pub type DEBUGEVT_R = crate::BitReader; +pub type DebugevtR = crate::BitReader; #[doc = "Field `DEBUGEVT` writer - Reserved for Debug use"] -pub type DEBUGEVT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DebugevtW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - BusFault on vector table read"] #[inline(always)] - pub fn vecttbl(&self) -> VECTTBL_R { - VECTTBL_R::new(((self.bits >> 1) & 1) != 0) + pub fn vecttbl(&self) -> VecttblR { + VecttblR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 30 - Forced HardFault"] #[inline(always)] - pub fn forced(&self) -> FORCED_R { - FORCED_R::new(((self.bits >> 30) & 1) != 0) + pub fn forced(&self) -> ForcedR { + ForcedR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Reserved for Debug use"] #[inline(always)] - pub fn debugevt(&self) -> DEBUGEVT_R { - DEBUGEVT_R::new(((self.bits >> 31) & 1) != 0) + pub fn debugevt(&self) -> DebugevtR { + DebugevtR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - BusFault on vector table read"] #[inline(always)] #[must_use] - pub fn vecttbl(&mut self) -> VECTTBL_W { - VECTTBL_W::new(self, 1) + pub fn vecttbl(&mut self) -> VecttblW { + VecttblW::new(self, 1) } #[doc = "Bit 30 - Forced HardFault"] #[inline(always)] #[must_use] - pub fn forced(&mut self) -> FORCED_W { - FORCED_W::new(self, 30) + pub fn forced(&mut self) -> ForcedW { + ForcedW::new(self, 30) } #[doc = "Bit 31 - Reserved for Debug use"] #[inline(always)] #[must_use] - pub fn debugevt(&mut self) -> DEBUGEVT_W { - DEBUGEVT_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn debugevt(&mut self) -> DebugevtW { + DebugevtW::new(self, 31) } } #[doc = "HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HFSR_SPEC; -impl crate::RegisterSpec for HFSR_SPEC { +pub struct HfsrSpec; +impl crate::RegisterSpec for HfsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`hfsr::R`](R) reader structure"] -impl crate::Readable for HFSR_SPEC {} +impl crate::Readable for HfsrSpec {} #[doc = "`write(|w| ..)` method takes [`hfsr::W`](W) writer structure"] -impl crate::Writable for HFSR_SPEC { +impl crate::Writable for HfsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HFSR to value 0"] -impl crate::Resettable for HFSR_SPEC { +impl crate::Resettable for HfsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/icsr.rs b/src/ppb/icsr.rs index 0eadeaab..957ad798 100644 --- a/src/ppb/icsr.rs +++ b/src/ppb/icsr.rs @@ -1,360 +1,351 @@ #[doc = "Register `ICSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ICSR` writer"] -pub type W = crate::W; -#[doc = "Field `VECTACTIVE` reader - Active exception number"] -pub type VECTACTIVE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Active exception number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum VECTACTIVE_A { +pub enum Vectactive { #[doc = "0: Thread mode"] - VALUE1 = 0, + Value1 = 0, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: VECTACTIVE_A) -> Self { + fn from(variant: Vectactive) -> Self { variant as _ } } -impl crate::FieldSpec for VECTACTIVE_A { +impl crate::FieldSpec for Vectactive { type Ux = u16; } -impl VECTACTIVE_R { +#[doc = "Field `VECTACTIVE` reader - Active exception number"] +pub type VectactiveR = crate::FieldReader; +impl VectactiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(VECTACTIVE_A::VALUE1), + 0 => Some(Vectactive::Value1), _ => None, } } #[doc = "Thread mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VECTACTIVE_A::VALUE1 + *self == Vectactive::Value1 } } -#[doc = "Field `RETTOBASE` reader - Return to Base"] -pub type RETTOBASE_R = crate::BitReader; #[doc = "Return to Base\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RETTOBASE_A { +pub enum Rettobase { #[doc = "0: there are preempted active exceptions to execute"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: there are no active exceptions, or the currently-executing exception is the only active exception."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RETTOBASE_A) -> Self { + fn from(variant: Rettobase) -> Self { variant as u8 != 0 } } -impl RETTOBASE_R { +#[doc = "Field `RETTOBASE` reader - Return to Base"] +pub type RettobaseR = crate::BitReader; +impl RettobaseR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RETTOBASE_A { + pub const fn variant(&self) -> Rettobase { match self.bits { - false => RETTOBASE_A::VALUE1, - true => RETTOBASE_A::VALUE2, + false => Rettobase::Value1, + true => Rettobase::Value2, } } #[doc = "there are preempted active exceptions to execute"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RETTOBASE_A::VALUE1 + *self == Rettobase::Value1 } #[doc = "there are no active exceptions, or the currently-executing exception is the only active exception."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RETTOBASE_A::VALUE2 + *self == Rettobase::Value2 } } -#[doc = "Field `VECTPENDING` reader - Vector Pending"] -pub type VECTPENDING_R = crate::FieldReader; #[doc = "Vector Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum VECTPENDING_A { +pub enum Vectpending { #[doc = "0: no pending exceptions"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: VECTPENDING_A) -> Self { + fn from(variant: Vectpending) -> Self { variant as _ } } -impl crate::FieldSpec for VECTPENDING_A { +impl crate::FieldSpec for Vectpending { type Ux = u8; } -impl VECTPENDING_R { +#[doc = "Field `VECTPENDING` reader - Vector Pending"] +pub type VectpendingR = crate::FieldReader; +impl VectpendingR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(VECTPENDING_A::VALUE1), + 0 => Some(Vectpending::Value1), _ => None, } } #[doc = "no pending exceptions"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VECTPENDING_A::VALUE1 + *self == Vectpending::Value1 } } -#[doc = "Field `ISRPENDING` reader - Interrupt pending flag"] -pub type ISRPENDING_R = crate::BitReader; #[doc = "Interrupt pending flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ISRPENDING_A { +pub enum Isrpending { #[doc = "0: interrupt not pending"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: interrupt pending."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ISRPENDING_A) -> Self { + fn from(variant: Isrpending) -> Self { variant as u8 != 0 } } -impl ISRPENDING_R { +#[doc = "Field `ISRPENDING` reader - Interrupt pending flag"] +pub type IsrpendingR = crate::BitReader; +impl IsrpendingR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ISRPENDING_A { + pub const fn variant(&self) -> Isrpending { match self.bits { - false => ISRPENDING_A::VALUE1, - true => ISRPENDING_A::VALUE2, + false => Isrpending::Value1, + true => Isrpending::Value2, } } #[doc = "interrupt not pending"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ISRPENDING_A::VALUE1 + *self == Isrpending::Value1 } #[doc = "interrupt pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ISRPENDING_A::VALUE2 + *self == Isrpending::Value2 } } #[doc = "SysTick exception clear-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PENDSTCLR_AW { +pub enum Pendstclr { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: removes the pending state from the SysTick exception."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PENDSTCLR_AW) -> Self { + fn from(variant: Pendstclr) -> Self { variant as u8 != 0 } } #[doc = "Field `PENDSTCLR` writer - SysTick exception clear-pending bit"] -pub type PENDSTCLR_W<'a, REG> = crate::BitWriter<'a, REG, PENDSTCLR_AW>; -impl<'a, REG> PENDSTCLR_W<'a, REG> +pub type PendstclrW<'a, REG> = crate::BitWriter<'a, REG, Pendstclr>; +impl<'a, REG> PendstclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PENDSTCLR_AW::VALUE1) + self.variant(Pendstclr::Value1) } #[doc = "removes the pending state from the SysTick exception."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PENDSTCLR_AW::VALUE2) + self.variant(Pendstclr::Value2) } } -#[doc = "Field `PENDSTSET` reader - SysTick exception set-pending bit"] -pub type PENDSTSET_R = crate::BitReader; #[doc = "SysTick exception set-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PENDSTSET_A { +pub enum Pendstset { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: changes SysTick exception state to pending."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PENDSTSET_A) -> Self { + fn from(variant: Pendstset) -> Self { variant as u8 != 0 } } -impl PENDSTSET_R { +#[doc = "Field `PENDSTSET` reader - SysTick exception set-pending bit"] +pub type PendstsetR = crate::BitReader; +impl PendstsetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PENDSTSET_A { + pub const fn variant(&self) -> Pendstset { match self.bits { - false => PENDSTSET_A::VALUE1, - true => PENDSTSET_A::VALUE2, + false => Pendstset::Value1, + true => Pendstset::Value2, } } #[doc = "no effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PENDSTSET_A::VALUE1 + *self == Pendstset::Value1 } #[doc = "changes SysTick exception state to pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PENDSTSET_A::VALUE2 + *self == Pendstset::Value2 } } #[doc = "Field `PENDSTSET` writer - SysTick exception set-pending bit"] -pub type PENDSTSET_W<'a, REG> = crate::BitWriter<'a, REG, PENDSTSET_A>; -impl<'a, REG> PENDSTSET_W<'a, REG> +pub type PendstsetW<'a, REG> = crate::BitWriter<'a, REG, Pendstset>; +impl<'a, REG> PendstsetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PENDSTSET_A::VALUE1) + self.variant(Pendstset::Value1) } #[doc = "changes SysTick exception state to pending."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PENDSTSET_A::VALUE2) + self.variant(Pendstset::Value2) } } #[doc = "PendSV clear-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PENDSVCLR_AW { +pub enum Pendsvclr { #[doc = "0: no effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: removes the pending state from the PendSV exception."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PENDSVCLR_AW) -> Self { + fn from(variant: Pendsvclr) -> Self { variant as u8 != 0 } } #[doc = "Field `PENDSVCLR` writer - PendSV clear-pending bit"] -pub type PENDSVCLR_W<'a, REG> = crate::BitWriter<'a, REG, PENDSVCLR_AW>; -impl<'a, REG> PENDSVCLR_W<'a, REG> +pub type PendsvclrW<'a, REG> = crate::BitWriter<'a, REG, Pendsvclr>; +impl<'a, REG> PendsvclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PENDSVCLR_AW::VALUE1) + self.variant(Pendsvclr::Value1) } #[doc = "removes the pending state from the PendSV exception."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PENDSVCLR_AW::VALUE2) + self.variant(Pendsvclr::Value2) } } #[doc = "Field `PENDSVSET` reader - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] -pub type PENDSVSET_R = crate::BitReader; +pub type PendsvsetR = crate::BitReader; #[doc = "Field `PENDSVSET` writer - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] -pub type PENDSVSET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PendsvsetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NMIPENDSET` reader - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] -pub type NMIPENDSET_R = crate::BitReader; +pub type NmipendsetR = crate::BitReader; #[doc = "Field `NMIPENDSET` writer - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] -pub type NMIPENDSET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NmipendsetW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:8 - Active exception number"] #[inline(always)] - pub fn vectactive(&self) -> VECTACTIVE_R { - VECTACTIVE_R::new((self.bits & 0x01ff) as u16) + pub fn vectactive(&self) -> VectactiveR { + VectactiveR::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 11 - Return to Base"] #[inline(always)] - pub fn rettobase(&self) -> RETTOBASE_R { - RETTOBASE_R::new(((self.bits >> 11) & 1) != 0) + pub fn rettobase(&self) -> RettobaseR { + RettobaseR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:17 - Vector Pending"] #[inline(always)] - pub fn vectpending(&self) -> VECTPENDING_R { - VECTPENDING_R::new(((self.bits >> 12) & 0x3f) as u8) + pub fn vectpending(&self) -> VectpendingR { + VectpendingR::new(((self.bits >> 12) & 0x3f) as u8) } #[doc = "Bit 22 - Interrupt pending flag"] #[inline(always)] - pub fn isrpending(&self) -> ISRPENDING_R { - ISRPENDING_R::new(((self.bits >> 22) & 1) != 0) + pub fn isrpending(&self) -> IsrpendingR { + IsrpendingR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 26 - SysTick exception set-pending bit"] #[inline(always)] - pub fn pendstset(&self) -> PENDSTSET_R { - PENDSTSET_R::new(((self.bits >> 26) & 1) != 0) + pub fn pendstset(&self) -> PendstsetR { + PendstsetR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] #[inline(always)] - pub fn pendsvset(&self) -> PENDSVSET_R { - PENDSVSET_R::new(((self.bits >> 28) & 1) != 0) + pub fn pendsvset(&self) -> PendsvsetR { + PendsvsetR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] #[inline(always)] - pub fn nmipendset(&self) -> NMIPENDSET_R { - NMIPENDSET_R::new(((self.bits >> 31) & 1) != 0) + pub fn nmipendset(&self) -> NmipendsetR { + NmipendsetR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 25 - SysTick exception clear-pending bit"] #[inline(always)] #[must_use] - pub fn pendstclr(&mut self) -> PENDSTCLR_W { - PENDSTCLR_W::new(self, 25) + pub fn pendstclr(&mut self) -> PendstclrW { + PendstclrW::new(self, 25) } #[doc = "Bit 26 - SysTick exception set-pending bit"] #[inline(always)] #[must_use] - pub fn pendstset(&mut self) -> PENDSTSET_W { - PENDSTSET_W::new(self, 26) + pub fn pendstset(&mut self) -> PendstsetW { + PendstsetW::new(self, 26) } #[doc = "Bit 27 - PendSV clear-pending bit"] #[inline(always)] #[must_use] - pub fn pendsvclr(&mut self) -> PENDSVCLR_W { - PENDSVCLR_W::new(self, 27) + pub fn pendsvclr(&mut self) -> PendsvclrW { + PendsvclrW::new(self, 27) } #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] #[inline(always)] #[must_use] - pub fn pendsvset(&mut self) -> PENDSVSET_W { - PENDSVSET_W::new(self, 28) + pub fn pendsvset(&mut self) -> PendsvsetW { + PendsvsetW::new(self, 28) } #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] #[inline(always)] #[must_use] - pub fn nmipendset(&mut self) -> NMIPENDSET_W { - NMIPENDSET_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nmipendset(&mut self) -> NmipendsetW { + NmipendsetW::new(self, 31) } } #[doc = "Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ICSR_SPEC; -impl crate::RegisterSpec for ICSR_SPEC { +pub struct IcsrSpec; +impl crate::RegisterSpec for IcsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`icsr::R`](R) reader structure"] -impl crate::Readable for ICSR_SPEC {} +impl crate::Readable for IcsrSpec {} #[doc = "`write(|w| ..)` method takes [`icsr::W`](W) writer structure"] -impl crate::Writable for ICSR_SPEC { +impl crate::Writable for IcsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICSR to value 0"] -impl crate::Resettable for ICSR_SPEC { +impl crate::Resettable for IcsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mmfar.rs b/src/ppb/mmfar.rs index 833a2aaa..262303d6 100644 --- a/src/ppb/mmfar.rs +++ b/src/ppb/mmfar.rs @@ -1,49 +1,40 @@ #[doc = "Register `MMFAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMFAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address causing the fault"] -pub type ADDRESS_R = crate::FieldReader; +pub type AddressR = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address causing the fault"] -pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - pub fn address(&self) -> ADDRESS_R { - ADDRESS_R::new(self.bits) + pub fn address(&self) -> AddressR { + AddressR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> ADDRESS_W { - ADDRESS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn address(&mut self) -> AddressW { + AddressW::new(self, 0) } } #[doc = "MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MMFAR_SPEC; -impl crate::RegisterSpec for MMFAR_SPEC { +pub struct MmfarSpec; +impl crate::RegisterSpec for MmfarSpec { type Ux = u32; } #[doc = "`read()` method returns [`mmfar::R`](R) reader structure"] -impl crate::Readable for MMFAR_SPEC {} +impl crate::Readable for MmfarSpec {} #[doc = "`write(|w| ..)` method takes [`mmfar::W`](W) writer structure"] -impl crate::Writable for MMFAR_SPEC { +impl crate::Writable for MmfarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMFAR to value 0"] -impl crate::Resettable for MMFAR_SPEC { +impl crate::Resettable for MmfarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_ctrl.rs b/src/ppb/mpu_ctrl.rs index 7a50edd9..dc617eb0 100644 --- a/src/ppb/mpu_ctrl.rs +++ b/src/ppb/mpu_ctrl.rs @@ -1,226 +1,217 @@ #[doc = "Register `MPU_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `ENABLE` reader - Enable MPU"] -pub type ENABLE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable MPU\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENABLE_A { +pub enum Enable { #[doc = "0: MPU disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MPU enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENABLE_A) -> Self { + fn from(variant: Enable) -> Self { variant as u8 != 0 } } -impl ENABLE_R { +#[doc = "Field `ENABLE` reader - Enable MPU"] +pub type EnableR = crate::BitReader; +impl EnableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENABLE_A { + pub const fn variant(&self) -> Enable { match self.bits { - false => ENABLE_A::VALUE1, - true => ENABLE_A::VALUE2, + false => Enable::Value1, + true => Enable::Value2, } } #[doc = "MPU disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENABLE_A::VALUE1 + *self == Enable::Value1 } #[doc = "MPU enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENABLE_A::VALUE2 + *self == Enable::Value2 } } #[doc = "Field `ENABLE` writer - Enable MPU"] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, ENABLE_A>; -impl<'a, REG> ENABLE_W<'a, REG> +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>; +impl<'a, REG> EnableW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENABLE_A::VALUE1) + self.variant(Enable::Value1) } #[doc = "MPU enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENABLE_A::VALUE2) + self.variant(Enable::Value2) } } -#[doc = "Field `HFNMIENA` reader - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] -pub type HFNMIENA_R = crate::BitReader; #[doc = "Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HFNMIENA_A { +pub enum Hfnmiena { #[doc = "0: MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HFNMIENA_A) -> Self { + fn from(variant: Hfnmiena) -> Self { variant as u8 != 0 } } -impl HFNMIENA_R { +#[doc = "Field `HFNMIENA` reader - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] +pub type HfnmienaR = crate::BitReader; +impl HfnmienaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HFNMIENA_A { + pub const fn variant(&self) -> Hfnmiena { match self.bits { - false => HFNMIENA_A::VALUE1, - true => HFNMIENA_A::VALUE2, + false => Hfnmiena::Value1, + true => Hfnmiena::Value2, } } #[doc = "MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HFNMIENA_A::VALUE1 + *self == Hfnmiena::Value1 } #[doc = "the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HFNMIENA_A::VALUE2 + *self == Hfnmiena::Value2 } } #[doc = "Field `HFNMIENA` writer - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] -pub type HFNMIENA_W<'a, REG> = crate::BitWriter<'a, REG, HFNMIENA_A>; -impl<'a, REG> HFNMIENA_W<'a, REG> +pub type HfnmienaW<'a, REG> = crate::BitWriter<'a, REG, Hfnmiena>; +impl<'a, REG> HfnmienaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HFNMIENA_A::VALUE1) + self.variant(Hfnmiena::Value1) } #[doc = "the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HFNMIENA_A::VALUE2) + self.variant(Hfnmiena::Value2) } } -#[doc = "Field `PRIVDEFENA` reader - Enables privileged software access to the default memory map"] -pub type PRIVDEFENA_R = crate::BitReader; #[doc = "Enables privileged software access to the default memory map\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRIVDEFENA_A { +pub enum Privdefena { #[doc = "0: If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRIVDEFENA_A) -> Self { + fn from(variant: Privdefena) -> Self { variant as u8 != 0 } } -impl PRIVDEFENA_R { +#[doc = "Field `PRIVDEFENA` reader - Enables privileged software access to the default memory map"] +pub type PrivdefenaR = crate::BitReader; +impl PrivdefenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRIVDEFENA_A { + pub const fn variant(&self) -> Privdefena { match self.bits { - false => PRIVDEFENA_A::VALUE1, - true => PRIVDEFENA_A::VALUE2, + false => Privdefena::Value1, + true => Privdefena::Value2, } } #[doc = "If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRIVDEFENA_A::VALUE1 + *self == Privdefena::Value1 } #[doc = "If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRIVDEFENA_A::VALUE2 + *self == Privdefena::Value2 } } #[doc = "Field `PRIVDEFENA` writer - Enables privileged software access to the default memory map"] -pub type PRIVDEFENA_W<'a, REG> = crate::BitWriter<'a, REG, PRIVDEFENA_A>; -impl<'a, REG> PRIVDEFENA_W<'a, REG> +pub type PrivdefenaW<'a, REG> = crate::BitWriter<'a, REG, Privdefena>; +impl<'a, REG> PrivdefenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRIVDEFENA_A::VALUE1) + self.variant(Privdefena::Value1) } #[doc = "If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRIVDEFENA_A::VALUE2) + self.variant(Privdefena::Value2) } } impl R { #[doc = "Bit 0 - Enable MPU"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] #[inline(always)] - pub fn hfnmiena(&self) -> HFNMIENA_R { - HFNMIENA_R::new(((self.bits >> 1) & 1) != 0) + pub fn hfnmiena(&self) -> HfnmienaR { + HfnmienaR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Enables privileged software access to the default memory map"] #[inline(always)] - pub fn privdefena(&self) -> PRIVDEFENA_R { - PRIVDEFENA_R::new(((self.bits >> 2) & 1) != 0) + pub fn privdefena(&self) -> PrivdefenaR { + PrivdefenaR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable MPU"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] #[inline(always)] #[must_use] - pub fn hfnmiena(&mut self) -> HFNMIENA_W { - HFNMIENA_W::new(self, 1) + pub fn hfnmiena(&mut self) -> HfnmienaW { + HfnmienaW::new(self, 1) } #[doc = "Bit 2 - Enables privileged software access to the default memory map"] #[inline(always)] #[must_use] - pub fn privdefena(&mut self) -> PRIVDEFENA_W { - PRIVDEFENA_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn privdefena(&mut self) -> PrivdefenaW { + PrivdefenaW::new(self, 2) } } #[doc = "MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_CTRL_SPEC; -impl crate::RegisterSpec for MPU_CTRL_SPEC { +pub struct MpuCtrlSpec; +impl crate::RegisterSpec for MpuCtrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_ctrl::R`](R) reader structure"] -impl crate::Readable for MPU_CTRL_SPEC {} +impl crate::Readable for MpuCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`mpu_ctrl::W`](W) writer structure"] -impl crate::Writable for MPU_CTRL_SPEC { +impl crate::Writable for MpuCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_CTRL to value 0"] -impl crate::Resettable for MPU_CTRL_SPEC { +impl crate::Resettable for MpuCtrlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr.rs b/src/ppb/mpu_rasr.rs index 62aeb2c2..72c75879 100644 --- a/src/ppb/mpu_rasr.rs +++ b/src/ppb/mpu_rasr.rs @@ -1,59 +1,59 @@ #[doc = "Register `MPU_RASR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type ENABLE_R = crate::BitReader; +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SIZE_R = crate::FieldReader; +pub type SizeR = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SRD_R = crate::FieldReader; +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRD_A { +pub enum Srd { #[doc = "0: corresponding sub-region is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: corresponding sub-region is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRD_A) -> Self { + fn from(variant: Srd) -> Self { variant as _ } } -impl crate::FieldSpec for SRD_A { +impl crate::FieldSpec for Srd { type Ux = u8; } -impl SRD_R { +#[doc = "Field `SRD` reader - Subregion disable bits"] +pub type SrdR = crate::FieldReader; +impl SrdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRD_A::VALUE1), - 1 => Some(SRD_A::VALUE2), + 0 => Some(Srd::Value1), + 1 => Some(Srd::Value2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRD_A::VALUE1 + *self == Srd::Value1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRD_A::VALUE2 + *self == Srd::Value2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; -impl<'a, REG> SRD_W<'a, REG> +pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; +impl<'a, REG> SrdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,213 +61,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE1) + self.variant(Srd::Value1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE2) + self.variant(Srd::Value2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type B_R = crate::BitReader; +pub type BR = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type C_R = crate::BitReader; +pub type CR = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type S_R = crate::BitReader; +pub type SR = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TEX_R = crate::FieldReader; +pub type TexR = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type AP_R = crate::FieldReader; +pub type ApR = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XN_R = crate::BitReader; +pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XN_A { +pub enum Xn { #[doc = "0: instruction fetches enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: instruction fetches disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XN_A) -> Self { + fn from(variant: Xn) -> Self { variant as u8 != 0 } } -impl XN_R { +#[doc = "Field `XN` reader - Instruction access disable bit"] +pub type XnR = crate::BitReader; +impl XnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XN_A { + pub const fn variant(&self) -> Xn { match self.bits { - false => XN_A::VALUE1, - true => XN_A::VALUE2, + false => Xn::Value1, + true => Xn::Value2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XN_A::VALUE1 + *self == Xn::Value1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XN_A::VALUE2 + *self == Xn::Value2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; -impl<'a, REG> XN_W<'a, REG> +pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; +impl<'a, REG> XnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE1) + self.variant(Xn::Value1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE2) + self.variant(Xn::Value2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SRD_R { - SRD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SrdR { + SrdR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> B_R { - B_R::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> BR { + BR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> C_R { - C_R::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> CR { + CR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> S_R { - S_R::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> SR { + SR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TEX_R { - TEX_R::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TexR { + TexR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> AP_R { - AP_R::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> ApR { + ApR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XN_R { - XN_R::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XnR { + XnR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 1) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SRD_W { - SRD_W::new(self, 8) + pub fn srd(&mut self) -> SrdW { + SrdW::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> B_W { - B_W::new(self, 16) + pub fn b(&mut self) -> BW { + BW::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> C_W { - C_W::new(self, 17) + pub fn c(&mut self) -> CW { + CW::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> S_W { - S_W::new(self, 18) + pub fn s(&mut self) -> SW { + SW::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TEX_W { - TEX_W::new(self, 19) + pub fn tex(&mut self) -> TexW { + TexW::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> AP_W { - AP_W::new(self, 24) + pub fn ap(&mut self) -> ApW { + ApW::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XN_W { - XN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xn(&mut self) -> XnW { + XnW::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RASR_SPEC; -impl crate::RegisterSpec for MPU_RASR_SPEC { +pub struct MpuRasrSpec; +impl crate::RegisterSpec for MpuRasrSpec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr::R`](R) reader structure"] -impl crate::Readable for MPU_RASR_SPEC {} +impl crate::Readable for MpuRasrSpec {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr::W`](W) writer structure"] -impl crate::Writable for MPU_RASR_SPEC { +impl crate::Writable for MpuRasrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR to value 0"] -impl crate::Resettable for MPU_RASR_SPEC { +impl crate::Resettable for MpuRasrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a1.rs b/src/ppb/mpu_rasr_a1.rs index 14936ca8..22d7edc1 100644 --- a/src/ppb/mpu_rasr_a1.rs +++ b/src/ppb/mpu_rasr_a1.rs @@ -1,59 +1,59 @@ #[doc = "Register `MPU_RASR_A1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type ENABLE_R = crate::BitReader; +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SIZE_R = crate::FieldReader; +pub type SizeR = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SRD_R = crate::FieldReader; +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRD_A { +pub enum Srd { #[doc = "0: corresponding sub-region is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: corresponding sub-region is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRD_A) -> Self { + fn from(variant: Srd) -> Self { variant as _ } } -impl crate::FieldSpec for SRD_A { +impl crate::FieldSpec for Srd { type Ux = u8; } -impl SRD_R { +#[doc = "Field `SRD` reader - Subregion disable bits"] +pub type SrdR = crate::FieldReader; +impl SrdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRD_A::VALUE1), - 1 => Some(SRD_A::VALUE2), + 0 => Some(Srd::Value1), + 1 => Some(Srd::Value2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRD_A::VALUE1 + *self == Srd::Value1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRD_A::VALUE2 + *self == Srd::Value2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; -impl<'a, REG> SRD_W<'a, REG> +pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; +impl<'a, REG> SrdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,213 +61,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE1) + self.variant(Srd::Value1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE2) + self.variant(Srd::Value2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type B_R = crate::BitReader; +pub type BR = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type C_R = crate::BitReader; +pub type CR = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type S_R = crate::BitReader; +pub type SR = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TEX_R = crate::FieldReader; +pub type TexR = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type AP_R = crate::FieldReader; +pub type ApR = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XN_R = crate::BitReader; +pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XN_A { +pub enum Xn { #[doc = "0: instruction fetches enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: instruction fetches disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XN_A) -> Self { + fn from(variant: Xn) -> Self { variant as u8 != 0 } } -impl XN_R { +#[doc = "Field `XN` reader - Instruction access disable bit"] +pub type XnR = crate::BitReader; +impl XnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XN_A { + pub const fn variant(&self) -> Xn { match self.bits { - false => XN_A::VALUE1, - true => XN_A::VALUE2, + false => Xn::Value1, + true => Xn::Value2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XN_A::VALUE1 + *self == Xn::Value1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XN_A::VALUE2 + *self == Xn::Value2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; -impl<'a, REG> XN_W<'a, REG> +pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; +impl<'a, REG> XnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE1) + self.variant(Xn::Value1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE2) + self.variant(Xn::Value2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SRD_R { - SRD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SrdR { + SrdR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> B_R { - B_R::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> BR { + BR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> C_R { - C_R::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> CR { + CR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> S_R { - S_R::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> SR { + SR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TEX_R { - TEX_R::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TexR { + TexR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> AP_R { - AP_R::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> ApR { + ApR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XN_R { - XN_R::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XnR { + XnR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 1) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SRD_W { - SRD_W::new(self, 8) + pub fn srd(&mut self) -> SrdW { + SrdW::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> B_W { - B_W::new(self, 16) + pub fn b(&mut self) -> BW { + BW::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> C_W { - C_W::new(self, 17) + pub fn c(&mut self) -> CW { + CW::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> S_W { - S_W::new(self, 18) + pub fn s(&mut self) -> SW { + SW::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TEX_W { - TEX_W::new(self, 19) + pub fn tex(&mut self) -> TexW { + TexW::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> AP_W { - AP_W::new(self, 24) + pub fn ap(&mut self) -> ApW { + ApW::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XN_W { - XN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xn(&mut self) -> XnW { + XnW::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RASR_A1_SPEC; -impl crate::RegisterSpec for MPU_RASR_A1_SPEC { +pub struct MpuRasrA1Spec; +impl crate::RegisterSpec for MpuRasrA1Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a1::R`](R) reader structure"] -impl crate::Readable for MPU_RASR_A1_SPEC {} +impl crate::Readable for MpuRasrA1Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a1::W`](W) writer structure"] -impl crate::Writable for MPU_RASR_A1_SPEC { +impl crate::Writable for MpuRasrA1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A1 to value 0"] -impl crate::Resettable for MPU_RASR_A1_SPEC { +impl crate::Resettable for MpuRasrA1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a2.rs b/src/ppb/mpu_rasr_a2.rs index c9f9386a..25a59010 100644 --- a/src/ppb/mpu_rasr_a2.rs +++ b/src/ppb/mpu_rasr_a2.rs @@ -1,59 +1,59 @@ #[doc = "Register `MPU_RASR_A2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type ENABLE_R = crate::BitReader; +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SIZE_R = crate::FieldReader; +pub type SizeR = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SRD_R = crate::FieldReader; +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRD_A { +pub enum Srd { #[doc = "0: corresponding sub-region is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: corresponding sub-region is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRD_A) -> Self { + fn from(variant: Srd) -> Self { variant as _ } } -impl crate::FieldSpec for SRD_A { +impl crate::FieldSpec for Srd { type Ux = u8; } -impl SRD_R { +#[doc = "Field `SRD` reader - Subregion disable bits"] +pub type SrdR = crate::FieldReader; +impl SrdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRD_A::VALUE1), - 1 => Some(SRD_A::VALUE2), + 0 => Some(Srd::Value1), + 1 => Some(Srd::Value2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRD_A::VALUE1 + *self == Srd::Value1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRD_A::VALUE2 + *self == Srd::Value2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; -impl<'a, REG> SRD_W<'a, REG> +pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; +impl<'a, REG> SrdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,213 +61,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE1) + self.variant(Srd::Value1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE2) + self.variant(Srd::Value2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type B_R = crate::BitReader; +pub type BR = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type C_R = crate::BitReader; +pub type CR = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type S_R = crate::BitReader; +pub type SR = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TEX_R = crate::FieldReader; +pub type TexR = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type AP_R = crate::FieldReader; +pub type ApR = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XN_R = crate::BitReader; +pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XN_A { +pub enum Xn { #[doc = "0: instruction fetches enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: instruction fetches disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XN_A) -> Self { + fn from(variant: Xn) -> Self { variant as u8 != 0 } } -impl XN_R { +#[doc = "Field `XN` reader - Instruction access disable bit"] +pub type XnR = crate::BitReader; +impl XnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XN_A { + pub const fn variant(&self) -> Xn { match self.bits { - false => XN_A::VALUE1, - true => XN_A::VALUE2, + false => Xn::Value1, + true => Xn::Value2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XN_A::VALUE1 + *self == Xn::Value1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XN_A::VALUE2 + *self == Xn::Value2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; -impl<'a, REG> XN_W<'a, REG> +pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; +impl<'a, REG> XnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE1) + self.variant(Xn::Value1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE2) + self.variant(Xn::Value2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SRD_R { - SRD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SrdR { + SrdR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> B_R { - B_R::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> BR { + BR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> C_R { - C_R::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> CR { + CR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> S_R { - S_R::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> SR { + SR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TEX_R { - TEX_R::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TexR { + TexR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> AP_R { - AP_R::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> ApR { + ApR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XN_R { - XN_R::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XnR { + XnR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 1) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SRD_W { - SRD_W::new(self, 8) + pub fn srd(&mut self) -> SrdW { + SrdW::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> B_W { - B_W::new(self, 16) + pub fn b(&mut self) -> BW { + BW::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> C_W { - C_W::new(self, 17) + pub fn c(&mut self) -> CW { + CW::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> S_W { - S_W::new(self, 18) + pub fn s(&mut self) -> SW { + SW::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TEX_W { - TEX_W::new(self, 19) + pub fn tex(&mut self) -> TexW { + TexW::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> AP_W { - AP_W::new(self, 24) + pub fn ap(&mut self) -> ApW { + ApW::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XN_W { - XN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xn(&mut self) -> XnW { + XnW::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RASR_A2_SPEC; -impl crate::RegisterSpec for MPU_RASR_A2_SPEC { +pub struct MpuRasrA2Spec; +impl crate::RegisterSpec for MpuRasrA2Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a2::R`](R) reader structure"] -impl crate::Readable for MPU_RASR_A2_SPEC {} +impl crate::Readable for MpuRasrA2Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a2::W`](W) writer structure"] -impl crate::Writable for MPU_RASR_A2_SPEC { +impl crate::Writable for MpuRasrA2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A2 to value 0"] -impl crate::Resettable for MPU_RASR_A2_SPEC { +impl crate::Resettable for MpuRasrA2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a3.rs b/src/ppb/mpu_rasr_a3.rs index 61c9f9a9..0add69e4 100644 --- a/src/ppb/mpu_rasr_a3.rs +++ b/src/ppb/mpu_rasr_a3.rs @@ -1,59 +1,59 @@ #[doc = "Register `MPU_RASR_A3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type ENABLE_R = crate::BitReader; +pub type EnableR = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SIZE_R = crate::FieldReader; +pub type SizeR = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SRD_R = crate::FieldReader; +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRD_A { +pub enum Srd { #[doc = "0: corresponding sub-region is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: corresponding sub-region is disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRD_A) -> Self { + fn from(variant: Srd) -> Self { variant as _ } } -impl crate::FieldSpec for SRD_A { +impl crate::FieldSpec for Srd { type Ux = u8; } -impl SRD_R { +#[doc = "Field `SRD` reader - Subregion disable bits"] +pub type SrdR = crate::FieldReader; +impl SrdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRD_A::VALUE1), - 1 => Some(SRD_A::VALUE2), + 0 => Some(Srd::Value1), + 1 => Some(Srd::Value2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRD_A::VALUE1 + *self == Srd::Value1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRD_A::VALUE2 + *self == Srd::Value2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; -impl<'a, REG> SRD_W<'a, REG> +pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; +impl<'a, REG> SrdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,213 +61,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE1) + self.variant(Srd::Value1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRD_A::VALUE2) + self.variant(Srd::Value2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type B_R = crate::BitReader; +pub type BR = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type C_R = crate::BitReader; +pub type CR = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type S_R = crate::BitReader; +pub type SR = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TEX_R = crate::FieldReader; +pub type TexR = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type AP_R = crate::FieldReader; +pub type ApR = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XN_R = crate::BitReader; +pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XN_A { +pub enum Xn { #[doc = "0: instruction fetches enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: instruction fetches disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XN_A) -> Self { + fn from(variant: Xn) -> Self { variant as u8 != 0 } } -impl XN_R { +#[doc = "Field `XN` reader - Instruction access disable bit"] +pub type XnR = crate::BitReader; +impl XnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XN_A { + pub const fn variant(&self) -> Xn { match self.bits { - false => XN_A::VALUE1, - true => XN_A::VALUE2, + false => Xn::Value1, + true => Xn::Value2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XN_A::VALUE1 + *self == Xn::Value1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XN_A::VALUE2 + *self == Xn::Value2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; -impl<'a, REG> XN_W<'a, REG> +pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; +impl<'a, REG> XnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE1) + self.variant(Xn::Value1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XN_A::VALUE2) + self.variant(Xn::Value2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SRD_R { - SRD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SrdR { + SrdR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> B_R { - B_R::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> BR { + BR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> C_R { - C_R::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> CR { + CR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> S_R { - S_R::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> SR { + SR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TEX_R { - TEX_R::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TexR { + TexR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> AP_R { - AP_R::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> ApR { + ApR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XN_R { - XN_R::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XnR { + XnR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 1) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SRD_W { - SRD_W::new(self, 8) + pub fn srd(&mut self) -> SrdW { + SrdW::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> B_W { - B_W::new(self, 16) + pub fn b(&mut self) -> BW { + BW::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> C_W { - C_W::new(self, 17) + pub fn c(&mut self) -> CW { + CW::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> S_W { - S_W::new(self, 18) + pub fn s(&mut self) -> SW { + SW::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TEX_W { - TEX_W::new(self, 19) + pub fn tex(&mut self) -> TexW { + TexW::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> AP_W { - AP_W::new(self, 24) + pub fn ap(&mut self) -> ApW { + ApW::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XN_W { - XN_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn xn(&mut self) -> XnW { + XnW::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RASR_A3_SPEC; -impl crate::RegisterSpec for MPU_RASR_A3_SPEC { +pub struct MpuRasrA3Spec; +impl crate::RegisterSpec for MpuRasrA3Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a3::R`](R) reader structure"] -impl crate::Readable for MPU_RASR_A3_SPEC {} +impl crate::Readable for MpuRasrA3Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a3::W`](W) writer structure"] -impl crate::Writable for MPU_RASR_A3_SPEC { +impl crate::Writable for MpuRasrA3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A3 to value 0"] -impl crate::Resettable for MPU_RASR_A3_SPEC { +impl crate::Resettable for MpuRasrA3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar.rs b/src/ppb/mpu_rbar.rs index ae45fbd0..0266b225 100644 --- a/src/ppb/mpu_rbar.rs +++ b/src/ppb/mpu_rbar.rs @@ -1,128 +1,119 @@ #[doc = "Register `MPU_RBAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type REGION_R = crate::FieldReader; +pub type RegionR = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type VALID_R = crate::BitReader; +pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VALID_A { +pub enum Valid { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VALID_A) -> Self { + fn from(variant: Valid) -> Self { variant as u8 != 0 } } -impl VALID_R { +#[doc = "Field `VALID` reader - MPU Region Number valid bit"] +pub type ValidR = crate::BitReader; +impl ValidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VALID_A { + pub const fn variant(&self) -> Valid { match self.bits { - false => VALID_A::VALUE1, - true => VALID_A::VALUE2, + false => Valid::Value1, + true => Valid::Value2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VALID_A::VALUE1 + *self == Valid::Value1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VALID_A::VALUE2 + *self == Valid::Value2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; -impl<'a, REG> VALID_W<'a, REG> +pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; +impl<'a, REG> ValidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE1) + self.variant(Valid::Value1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE2) + self.variant(Valid::Value2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> REGION_R { - REGION_R::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> RegionR { + RegionR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> VALID_R { - VALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> ValidR { + ValidR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> REGION_W { - REGION_W::new(self, 0) + pub fn region(&mut self) -> RegionW { + RegionW::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> VALID_W { - VALID_W::new(self, 4) + pub fn valid(&mut self) -> ValidW { + ValidW::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 9) } } #[doc = "MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RBAR_SPEC; -impl crate::RegisterSpec for MPU_RBAR_SPEC { +pub struct MpuRbarSpec; +impl crate::RegisterSpec for MpuRbarSpec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar::R`](R) reader structure"] -impl crate::Readable for MPU_RBAR_SPEC {} +impl crate::Readable for MpuRbarSpec {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar::W`](W) writer structure"] -impl crate::Writable for MPU_RBAR_SPEC { +impl crate::Writable for MpuRbarSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR to value 0"] -impl crate::Resettable for MPU_RBAR_SPEC { +impl crate::Resettable for MpuRbarSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a1.rs b/src/ppb/mpu_rbar_a1.rs index f270e847..e287fd7c 100644 --- a/src/ppb/mpu_rbar_a1.rs +++ b/src/ppb/mpu_rbar_a1.rs @@ -1,128 +1,119 @@ #[doc = "Register `MPU_RBAR_A1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type REGION_R = crate::FieldReader; +pub type RegionR = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type VALID_R = crate::BitReader; +pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VALID_A { +pub enum Valid { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VALID_A) -> Self { + fn from(variant: Valid) -> Self { variant as u8 != 0 } } -impl VALID_R { +#[doc = "Field `VALID` reader - MPU Region Number valid bit"] +pub type ValidR = crate::BitReader; +impl ValidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VALID_A { + pub const fn variant(&self) -> Valid { match self.bits { - false => VALID_A::VALUE1, - true => VALID_A::VALUE2, + false => Valid::Value1, + true => Valid::Value2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VALID_A::VALUE1 + *self == Valid::Value1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VALID_A::VALUE2 + *self == Valid::Value2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; -impl<'a, REG> VALID_W<'a, REG> +pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; +impl<'a, REG> ValidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE1) + self.variant(Valid::Value1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE2) + self.variant(Valid::Value2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> REGION_R { - REGION_R::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> RegionR { + RegionR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> VALID_R { - VALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> ValidR { + ValidR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> REGION_W { - REGION_W::new(self, 0) + pub fn region(&mut self) -> RegionW { + RegionW::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> VALID_W { - VALID_W::new(self, 4) + pub fn valid(&mut self) -> ValidW { + ValidW::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 9) } } #[doc = "MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RBAR_A1_SPEC; -impl crate::RegisterSpec for MPU_RBAR_A1_SPEC { +pub struct MpuRbarA1Spec; +impl crate::RegisterSpec for MpuRbarA1Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a1::R`](R) reader structure"] -impl crate::Readable for MPU_RBAR_A1_SPEC {} +impl crate::Readable for MpuRbarA1Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a1::W`](W) writer structure"] -impl crate::Writable for MPU_RBAR_A1_SPEC { +impl crate::Writable for MpuRbarA1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A1 to value 0"] -impl crate::Resettable for MPU_RBAR_A1_SPEC { +impl crate::Resettable for MpuRbarA1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a2.rs b/src/ppb/mpu_rbar_a2.rs index 0f99e542..1d03a6be 100644 --- a/src/ppb/mpu_rbar_a2.rs +++ b/src/ppb/mpu_rbar_a2.rs @@ -1,128 +1,119 @@ #[doc = "Register `MPU_RBAR_A2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type REGION_R = crate::FieldReader; +pub type RegionR = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type VALID_R = crate::BitReader; +pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VALID_A { +pub enum Valid { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VALID_A) -> Self { + fn from(variant: Valid) -> Self { variant as u8 != 0 } } -impl VALID_R { +#[doc = "Field `VALID` reader - MPU Region Number valid bit"] +pub type ValidR = crate::BitReader; +impl ValidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VALID_A { + pub const fn variant(&self) -> Valid { match self.bits { - false => VALID_A::VALUE1, - true => VALID_A::VALUE2, + false => Valid::Value1, + true => Valid::Value2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VALID_A::VALUE1 + *self == Valid::Value1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VALID_A::VALUE2 + *self == Valid::Value2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; -impl<'a, REG> VALID_W<'a, REG> +pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; +impl<'a, REG> ValidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE1) + self.variant(Valid::Value1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE2) + self.variant(Valid::Value2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> REGION_R { - REGION_R::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> RegionR { + RegionR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> VALID_R { - VALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> ValidR { + ValidR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> REGION_W { - REGION_W::new(self, 0) + pub fn region(&mut self) -> RegionW { + RegionW::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> VALID_W { - VALID_W::new(self, 4) + pub fn valid(&mut self) -> ValidW { + ValidW::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 9) } } #[doc = "MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RBAR_A2_SPEC; -impl crate::RegisterSpec for MPU_RBAR_A2_SPEC { +pub struct MpuRbarA2Spec; +impl crate::RegisterSpec for MpuRbarA2Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a2::R`](R) reader structure"] -impl crate::Readable for MPU_RBAR_A2_SPEC {} +impl crate::Readable for MpuRbarA2Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a2::W`](W) writer structure"] -impl crate::Writable for MPU_RBAR_A2_SPEC { +impl crate::Writable for MpuRbarA2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A2 to value 0"] -impl crate::Resettable for MPU_RBAR_A2_SPEC { +impl crate::Resettable for MpuRbarA2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a3.rs b/src/ppb/mpu_rbar_a3.rs index ca5f413c..3711d22e 100644 --- a/src/ppb/mpu_rbar_a3.rs +++ b/src/ppb/mpu_rbar_a3.rs @@ -1,128 +1,119 @@ #[doc = "Register `MPU_RBAR_A3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type REGION_R = crate::FieldReader; +pub type RegionR = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type VALID_R = crate::BitReader; +pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VALID_A { +pub enum Valid { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VALID_A) -> Self { + fn from(variant: Valid) -> Self { variant as u8 != 0 } } -impl VALID_R { +#[doc = "Field `VALID` reader - MPU Region Number valid bit"] +pub type ValidR = crate::BitReader; +impl ValidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VALID_A { + pub const fn variant(&self) -> Valid { match self.bits { - false => VALID_A::VALUE1, - true => VALID_A::VALUE2, + false => Valid::Value1, + true => Valid::Value2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VALID_A::VALUE1 + *self == Valid::Value1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VALID_A::VALUE2 + *self == Valid::Value2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; -impl<'a, REG> VALID_W<'a, REG> +pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; +impl<'a, REG> ValidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE1) + self.variant(Valid::Value1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VALID_A::VALUE2) + self.variant(Valid::Value2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> REGION_R { - REGION_R::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> RegionR { + RegionR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> VALID_R { - VALID_R::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> ValidR { + ValidR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> AddrR { + AddrR::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> REGION_W { - REGION_W::new(self, 0) + pub fn region(&mut self) -> RegionW { + RegionW::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> VALID_W { - VALID_W::new(self, 4) + pub fn valid(&mut self) -> ValidW { + ValidW::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 9) } } #[doc = "MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RBAR_A3_SPEC; -impl crate::RegisterSpec for MPU_RBAR_A3_SPEC { +pub struct MpuRbarA3Spec; +impl crate::RegisterSpec for MpuRbarA3Spec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a3::R`](R) reader structure"] -impl crate::Readable for MPU_RBAR_A3_SPEC {} +impl crate::Readable for MpuRbarA3Spec {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a3::W`](W) writer structure"] -impl crate::Writable for MPU_RBAR_A3_SPEC { +impl crate::Writable for MpuRbarA3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A3 to value 0"] -impl crate::Resettable for MPU_RBAR_A3_SPEC { +impl crate::Resettable for MpuRbarA3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rnr.rs b/src/ppb/mpu_rnr.rs index 13f81fcf..5df15e71 100644 --- a/src/ppb/mpu_rnr.rs +++ b/src/ppb/mpu_rnr.rs @@ -1,49 +1,40 @@ #[doc = "Register `MPU_RNR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RNR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - Region"] -pub type REGION_R = crate::FieldReader; +pub type RegionR = crate::FieldReader; #[doc = "Field `REGION` writer - Region"] -pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Region"] #[inline(always)] - pub fn region(&self) -> REGION_R { - REGION_R::new((self.bits & 0xff) as u8) + pub fn region(&self) -> RegionR { + RegionR::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Region"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> REGION_W { - REGION_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn region(&mut self) -> RegionW { + RegionW::new(self, 0) } } #[doc = "MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_RNR_SPEC; -impl crate::RegisterSpec for MPU_RNR_SPEC { +pub struct MpuRnrSpec; +impl crate::RegisterSpec for MpuRnrSpec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rnr::R`](R) reader structure"] -impl crate::Readable for MPU_RNR_SPEC {} +impl crate::Readable for MpuRnrSpec {} #[doc = "`write(|w| ..)` method takes [`mpu_rnr::W`](W) writer structure"] -impl crate::Writable for MPU_RNR_SPEC { +impl crate::Writable for MpuRnrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RNR to value 0"] -impl crate::Resettable for MPU_RNR_SPEC { +impl crate::Resettable for MpuRnrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_type.rs b/src/ppb/mpu_type.rs index 78279dc0..0dac1791 100644 --- a/src/ppb/mpu_type.rs +++ b/src/ppb/mpu_type.rs @@ -1,36 +1,36 @@ #[doc = "Register `MPU_TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SEPARATE` reader - Support for unified or separate instruction and date memory maps"] -pub type SEPARATE_R = crate::BitReader; +pub type SeparateR = crate::BitReader; #[doc = "Field `DREGION` reader - Number of supported MPU data regions"] -pub type DREGION_R = crate::FieldReader; +pub type DregionR = crate::FieldReader; #[doc = "Field `IREGION` reader - Number of supported MPU instruction regions"] -pub type IREGION_R = crate::FieldReader; +pub type IregionR = crate::FieldReader; impl R { #[doc = "Bit 0 - Support for unified or separate instruction and date memory maps"] #[inline(always)] - pub fn separate(&self) -> SEPARATE_R { - SEPARATE_R::new((self.bits & 1) != 0) + pub fn separate(&self) -> SeparateR { + SeparateR::new((self.bits & 1) != 0) } #[doc = "Bits 8:15 - Number of supported MPU data regions"] #[inline(always)] - pub fn dregion(&self) -> DREGION_R { - DREGION_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn dregion(&self) -> DregionR { + DregionR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Number of supported MPU instruction regions"] #[inline(always)] - pub fn iregion(&self) -> IREGION_R { - IREGION_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn iregion(&self) -> IregionR { + IregionR::new(((self.bits >> 16) & 0xff) as u8) } } #[doc = "MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MPU_TYPE_SPEC; -impl crate::RegisterSpec for MPU_TYPE_SPEC { +pub struct MpuTypeSpec; +impl crate::RegisterSpec for MpuTypeSpec { type Ux = u32; } #[doc = "`read()` method returns [`mpu_type::R`](R) reader structure"] -impl crate::Readable for MPU_TYPE_SPEC {} +impl crate::Readable for MpuTypeSpec {} #[doc = "`reset()` method sets MPU_TYPE to value 0x0800"] -impl crate::Resettable for MPU_TYPE_SPEC { +impl crate::Resettable for MpuTypeSpec { const RESET_VALUE: u32 = 0x0800; } diff --git a/src/ppb/nvic_iabr0.rs b/src/ppb/nvic_iabr0.rs index 1ad12c20..9d636101 100644 --- a/src/ppb/nvic_iabr0.rs +++ b/src/ppb/nvic_iabr0.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_IABR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR0` writer"] -pub type W = crate::W; -#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ACTIVE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum ACTIVE_A { +pub enum Active { #[doc = "0: interrupt not active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: interrupt active"] - VALUE2 = 1, + Value2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: ACTIVE_A) -> Self { + fn from(variant: Active) -> Self { variant as _ } } -impl crate::FieldSpec for ACTIVE_A { +impl crate::FieldSpec for Active { type Ux = u32; } -impl ACTIVE_R { +#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] +pub type ActiveR = crate::FieldReader; +impl ActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACTIVE_A::VALUE1), - 1 => Some(ACTIVE_A::VALUE2), + 0 => Some(Active::Value1), + 1 => Some(Active::Value2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACTIVE_A::VALUE1 + *self == Active::Value1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACTIVE_A::VALUE2 + *self == Active::Value2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; -impl<'a, REG> ACTIVE_W<'a, REG> +pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; +impl<'a, REG> ActiveW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE1) + self.variant(Active::Value1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE2) + self.variant(Active::Value2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ACTIVE_R { - ACTIVE_R::new(self.bits) + pub fn active(&self) -> ActiveR { + ActiveR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ACTIVE_W { - ACTIVE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn active(&mut self) -> ActiveW { + ActiveW::new(self, 0) } } #[doc = "Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IABR0_SPEC; -impl crate::RegisterSpec for NVIC_IABR0_SPEC { +pub struct NvicIabr0Spec; +impl crate::RegisterSpec for NvicIabr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr0::R`](R) reader structure"] -impl crate::Readable for NVIC_IABR0_SPEC {} +impl crate::Readable for NvicIabr0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr0::W`](W) writer structure"] -impl crate::Writable for NVIC_IABR0_SPEC { +impl crate::Writable for NvicIabr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR0 to value 0"] -impl crate::Resettable for NVIC_IABR0_SPEC { +impl crate::Resettable for NvicIabr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr1.rs b/src/ppb/nvic_iabr1.rs index 0680510d..408a5081 100644 --- a/src/ppb/nvic_iabr1.rs +++ b/src/ppb/nvic_iabr1.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_IABR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR1` writer"] -pub type W = crate::W; -#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ACTIVE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum ACTIVE_A { +pub enum Active { #[doc = "0: interrupt not active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: interrupt active"] - VALUE2 = 1, + Value2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: ACTIVE_A) -> Self { + fn from(variant: Active) -> Self { variant as _ } } -impl crate::FieldSpec for ACTIVE_A { +impl crate::FieldSpec for Active { type Ux = u32; } -impl ACTIVE_R { +#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] +pub type ActiveR = crate::FieldReader; +impl ActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACTIVE_A::VALUE1), - 1 => Some(ACTIVE_A::VALUE2), + 0 => Some(Active::Value1), + 1 => Some(Active::Value2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACTIVE_A::VALUE1 + *self == Active::Value1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACTIVE_A::VALUE2 + *self == Active::Value2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; -impl<'a, REG> ACTIVE_W<'a, REG> +pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; +impl<'a, REG> ActiveW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE1) + self.variant(Active::Value1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE2) + self.variant(Active::Value2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ACTIVE_R { - ACTIVE_R::new(self.bits) + pub fn active(&self) -> ActiveR { + ActiveR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ACTIVE_W { - ACTIVE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn active(&mut self) -> ActiveW { + ActiveW::new(self, 0) } } #[doc = "Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IABR1_SPEC; -impl crate::RegisterSpec for NVIC_IABR1_SPEC { +pub struct NvicIabr1Spec; +impl crate::RegisterSpec for NvicIabr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr1::R`](R) reader structure"] -impl crate::Readable for NVIC_IABR1_SPEC {} +impl crate::Readable for NvicIabr1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr1::W`](W) writer structure"] -impl crate::Writable for NVIC_IABR1_SPEC { +impl crate::Writable for NvicIabr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR1 to value 0"] -impl crate::Resettable for NVIC_IABR1_SPEC { +impl crate::Resettable for NvicIabr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr2.rs b/src/ppb/nvic_iabr2.rs index 644a8d23..ae7bb071 100644 --- a/src/ppb/nvic_iabr2.rs +++ b/src/ppb/nvic_iabr2.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_IABR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR2` writer"] -pub type W = crate::W; -#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ACTIVE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum ACTIVE_A { +pub enum Active { #[doc = "0: interrupt not active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: interrupt active"] - VALUE2 = 1, + Value2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: ACTIVE_A) -> Self { + fn from(variant: Active) -> Self { variant as _ } } -impl crate::FieldSpec for ACTIVE_A { +impl crate::FieldSpec for Active { type Ux = u32; } -impl ACTIVE_R { +#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] +pub type ActiveR = crate::FieldReader; +impl ActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACTIVE_A::VALUE1), - 1 => Some(ACTIVE_A::VALUE2), + 0 => Some(Active::Value1), + 1 => Some(Active::Value2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACTIVE_A::VALUE1 + *self == Active::Value1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACTIVE_A::VALUE2 + *self == Active::Value2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; -impl<'a, REG> ACTIVE_W<'a, REG> +pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; +impl<'a, REG> ActiveW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE1) + self.variant(Active::Value1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE2) + self.variant(Active::Value2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ACTIVE_R { - ACTIVE_R::new(self.bits) + pub fn active(&self) -> ActiveR { + ActiveR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ACTIVE_W { - ACTIVE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn active(&mut self) -> ActiveW { + ActiveW::new(self, 0) } } #[doc = "Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IABR2_SPEC; -impl crate::RegisterSpec for NVIC_IABR2_SPEC { +pub struct NvicIabr2Spec; +impl crate::RegisterSpec for NvicIabr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr2::R`](R) reader structure"] -impl crate::Readable for NVIC_IABR2_SPEC {} +impl crate::Readable for NvicIabr2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr2::W`](W) writer structure"] -impl crate::Writable for NVIC_IABR2_SPEC { +impl crate::Writable for NvicIabr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR2 to value 0"] -impl crate::Resettable for NVIC_IABR2_SPEC { +impl crate::Resettable for NvicIabr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr3.rs b/src/ppb/nvic_iabr3.rs index d1c6f582..1ccce3b4 100644 --- a/src/ppb/nvic_iabr3.rs +++ b/src/ppb/nvic_iabr3.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_IABR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR3` writer"] -pub type W = crate::W; -#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ACTIVE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum ACTIVE_A { +pub enum Active { #[doc = "0: interrupt not active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: interrupt active"] - VALUE2 = 1, + Value2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: ACTIVE_A) -> Self { + fn from(variant: Active) -> Self { variant as _ } } -impl crate::FieldSpec for ACTIVE_A { +impl crate::FieldSpec for Active { type Ux = u32; } -impl ACTIVE_R { +#[doc = "Field `ACTIVE` reader - Interrupt active flags:"] +pub type ActiveR = crate::FieldReader; +impl ActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACTIVE_A::VALUE1), - 1 => Some(ACTIVE_A::VALUE2), + 0 => Some(Active::Value1), + 1 => Some(Active::Value2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACTIVE_A::VALUE1 + *self == Active::Value1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACTIVE_A::VALUE2 + *self == Active::Value2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; -impl<'a, REG> ACTIVE_W<'a, REG> +pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; +impl<'a, REG> ActiveW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE1) + self.variant(Active::Value1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACTIVE_A::VALUE2) + self.variant(Active::Value2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ACTIVE_R { - ACTIVE_R::new(self.bits) + pub fn active(&self) -> ActiveR { + ActiveR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ACTIVE_W { - ACTIVE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn active(&mut self) -> ActiveW { + ActiveW::new(self, 0) } } #[doc = "Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IABR3_SPEC; -impl crate::RegisterSpec for NVIC_IABR3_SPEC { +pub struct NvicIabr3Spec; +impl crate::RegisterSpec for NvicIabr3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr3::R`](R) reader structure"] -impl crate::Readable for NVIC_IABR3_SPEC {} +impl crate::Readable for NvicIabr3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr3::W`](W) writer structure"] -impl crate::Writable for NVIC_IABR3_SPEC { +impl crate::Writable for NvicIabr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR3 to value 0"] -impl crate::Resettable for NVIC_IABR3_SPEC { +impl crate::Resettable for NvicIabr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer0.rs b/src/ppb/nvic_icer0.rs index abefe9e2..8353d3a1 100644 --- a/src/ppb/nvic_icer0.rs +++ b/src/ppb/nvic_icer0.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICER0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER0` writer"] -pub type W = crate::W; -#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type CLRENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRENA_A { +pub enum Clrena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRENA_A) -> Self { + fn from(variant: Clrena) -> Self { variant as _ } } -impl crate::FieldSpec for CLRENA_A { +impl crate::FieldSpec for Clrena { type Ux = u32; } -impl CLRENA_R { +#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] +pub type ClrenaR = crate::FieldReader; +impl ClrenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRENA_A::VALUE3), - 1 => Some(CLRENA_A::VALUE4), + 0 => Some(Clrena::Value3), + 1 => Some(Clrena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRENA_A::VALUE3 + *self == Clrena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRENA_A::VALUE4 + *self == Clrena::Value4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; -impl<'a, REG> CLRENA_W<'a, REG> +pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; +impl<'a, REG> ClrenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE3) + self.variant(Clrena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE4) + self.variant(Clrena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> CLRENA_R { - CLRENA_R::new(self.bits) + pub fn clrena(&self) -> ClrenaR { + ClrenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> CLRENA_W { - CLRENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrena(&mut self) -> ClrenaW { + ClrenaW::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICER0_SPEC; -impl crate::RegisterSpec for NVIC_ICER0_SPEC { +pub struct NvicIcer0Spec; +impl crate::RegisterSpec for NvicIcer0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer0::R`](R) reader structure"] -impl crate::Readable for NVIC_ICER0_SPEC {} +impl crate::Readable for NvicIcer0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icer0::W`](W) writer structure"] -impl crate::Writable for NVIC_ICER0_SPEC { +impl crate::Writable for NvicIcer0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER0 to value 0"] -impl crate::Resettable for NVIC_ICER0_SPEC { +impl crate::Resettable for NvicIcer0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer1.rs b/src/ppb/nvic_icer1.rs index 8e9e2063..2c28272d 100644 --- a/src/ppb/nvic_icer1.rs +++ b/src/ppb/nvic_icer1.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICER1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER1` writer"] -pub type W = crate::W; -#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type CLRENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRENA_A { +pub enum Clrena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRENA_A) -> Self { + fn from(variant: Clrena) -> Self { variant as _ } } -impl crate::FieldSpec for CLRENA_A { +impl crate::FieldSpec for Clrena { type Ux = u32; } -impl CLRENA_R { +#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] +pub type ClrenaR = crate::FieldReader; +impl ClrenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRENA_A::VALUE3), - 1 => Some(CLRENA_A::VALUE4), + 0 => Some(Clrena::Value3), + 1 => Some(Clrena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRENA_A::VALUE3 + *self == Clrena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRENA_A::VALUE4 + *self == Clrena::Value4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; -impl<'a, REG> CLRENA_W<'a, REG> +pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; +impl<'a, REG> ClrenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE3) + self.variant(Clrena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE4) + self.variant(Clrena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> CLRENA_R { - CLRENA_R::new(self.bits) + pub fn clrena(&self) -> ClrenaR { + ClrenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> CLRENA_W { - CLRENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrena(&mut self) -> ClrenaW { + ClrenaW::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICER1_SPEC; -impl crate::RegisterSpec for NVIC_ICER1_SPEC { +pub struct NvicIcer1Spec; +impl crate::RegisterSpec for NvicIcer1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer1::R`](R) reader structure"] -impl crate::Readable for NVIC_ICER1_SPEC {} +impl crate::Readable for NvicIcer1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icer1::W`](W) writer structure"] -impl crate::Writable for NVIC_ICER1_SPEC { +impl crate::Writable for NvicIcer1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER1 to value 0"] -impl crate::Resettable for NVIC_ICER1_SPEC { +impl crate::Resettable for NvicIcer1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer2.rs b/src/ppb/nvic_icer2.rs index 9c847fdd..59d9b974 100644 --- a/src/ppb/nvic_icer2.rs +++ b/src/ppb/nvic_icer2.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICER2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER2` writer"] -pub type W = crate::W; -#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type CLRENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRENA_A { +pub enum Clrena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRENA_A) -> Self { + fn from(variant: Clrena) -> Self { variant as _ } } -impl crate::FieldSpec for CLRENA_A { +impl crate::FieldSpec for Clrena { type Ux = u32; } -impl CLRENA_R { +#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] +pub type ClrenaR = crate::FieldReader; +impl ClrenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRENA_A::VALUE3), - 1 => Some(CLRENA_A::VALUE4), + 0 => Some(Clrena::Value3), + 1 => Some(Clrena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRENA_A::VALUE3 + *self == Clrena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRENA_A::VALUE4 + *self == Clrena::Value4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; -impl<'a, REG> CLRENA_W<'a, REG> +pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; +impl<'a, REG> ClrenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE3) + self.variant(Clrena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE4) + self.variant(Clrena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> CLRENA_R { - CLRENA_R::new(self.bits) + pub fn clrena(&self) -> ClrenaR { + ClrenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> CLRENA_W { - CLRENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrena(&mut self) -> ClrenaW { + ClrenaW::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICER2_SPEC; -impl crate::RegisterSpec for NVIC_ICER2_SPEC { +pub struct NvicIcer2Spec; +impl crate::RegisterSpec for NvicIcer2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer2::R`](R) reader structure"] -impl crate::Readable for NVIC_ICER2_SPEC {} +impl crate::Readable for NvicIcer2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icer2::W`](W) writer structure"] -impl crate::Writable for NVIC_ICER2_SPEC { +impl crate::Writable for NvicIcer2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER2 to value 0"] -impl crate::Resettable for NVIC_ICER2_SPEC { +impl crate::Resettable for NvicIcer2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer3.rs b/src/ppb/nvic_icer3.rs index d60ac0cd..8eb2bc20 100644 --- a/src/ppb/nvic_icer3.rs +++ b/src/ppb/nvic_icer3.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICER3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER3` writer"] -pub type W = crate::W; -#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type CLRENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRENA_A { +pub enum Clrena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRENA_A) -> Self { + fn from(variant: Clrena) -> Self { variant as _ } } -impl crate::FieldSpec for CLRENA_A { +impl crate::FieldSpec for Clrena { type Ux = u32; } -impl CLRENA_R { +#[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] +pub type ClrenaR = crate::FieldReader; +impl ClrenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRENA_A::VALUE3), - 1 => Some(CLRENA_A::VALUE4), + 0 => Some(Clrena::Value3), + 1 => Some(Clrena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRENA_A::VALUE3 + *self == Clrena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRENA_A::VALUE4 + *self == Clrena::Value4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; -impl<'a, REG> CLRENA_W<'a, REG> +pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; +impl<'a, REG> ClrenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE3) + self.variant(Clrena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRENA_A::VALUE4) + self.variant(Clrena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> CLRENA_R { - CLRENA_R::new(self.bits) + pub fn clrena(&self) -> ClrenaR { + ClrenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> CLRENA_W { - CLRENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrena(&mut self) -> ClrenaW { + ClrenaW::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICER3_SPEC; -impl crate::RegisterSpec for NVIC_ICER3_SPEC { +pub struct NvicIcer3Spec; +impl crate::RegisterSpec for NvicIcer3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer3::R`](R) reader structure"] -impl crate::Readable for NVIC_ICER3_SPEC {} +impl crate::Readable for NvicIcer3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icer3::W`](W) writer structure"] -impl crate::Writable for NVIC_ICER3_SPEC { +impl crate::Writable for NvicIcer3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER3 to value 0"] -impl crate::Resettable for NVIC_ICER3_SPEC { +impl crate::Resettable for NvicIcer3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr0.rs b/src/ppb/nvic_icpr0.rs index 53dc3625..a7fe3066 100644 --- a/src/ppb/nvic_icpr0.rs +++ b/src/ppb/nvic_icpr0.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR0` writer"] -pub type W = crate::W; -#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type CLRPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRPEND_A { +pub enum Clrpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRPEND_A) -> Self { + fn from(variant: Clrpend) -> Self { variant as _ } } -impl crate::FieldSpec for CLRPEND_A { +impl crate::FieldSpec for Clrpend { type Ux = u32; } -impl CLRPEND_R { +#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] +pub type ClrpendR = crate::FieldReader; +impl ClrpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRPEND_A::VALUE3), - 1 => Some(CLRPEND_A::VALUE4), + 0 => Some(Clrpend::Value3), + 1 => Some(Clrpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRPEND_A::VALUE3 + *self == Clrpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRPEND_A::VALUE4 + *self == Clrpend::Value4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; -impl<'a, REG> CLRPEND_W<'a, REG> +pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; +impl<'a, REG> ClrpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE3) + self.variant(Clrpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE4) + self.variant(Clrpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> CLRPEND_R { - CLRPEND_R::new(self.bits) + pub fn clrpend(&self) -> ClrpendR { + ClrpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> CLRPEND_W { - CLRPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrpend(&mut self) -> ClrpendW { + ClrpendW::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICPR0_SPEC; -impl crate::RegisterSpec for NVIC_ICPR0_SPEC { +pub struct NvicIcpr0Spec; +impl crate::RegisterSpec for NvicIcpr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr0::R`](R) reader structure"] -impl crate::Readable for NVIC_ICPR0_SPEC {} +impl crate::Readable for NvicIcpr0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr0::W`](W) writer structure"] -impl crate::Writable for NVIC_ICPR0_SPEC { +impl crate::Writable for NvicIcpr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR0 to value 0"] -impl crate::Resettable for NVIC_ICPR0_SPEC { +impl crate::Resettable for NvicIcpr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr1.rs b/src/ppb/nvic_icpr1.rs index 5ff630c7..7bbf3092 100644 --- a/src/ppb/nvic_icpr1.rs +++ b/src/ppb/nvic_icpr1.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR1` writer"] -pub type W = crate::W; -#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type CLRPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRPEND_A { +pub enum Clrpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRPEND_A) -> Self { + fn from(variant: Clrpend) -> Self { variant as _ } } -impl crate::FieldSpec for CLRPEND_A { +impl crate::FieldSpec for Clrpend { type Ux = u32; } -impl CLRPEND_R { +#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] +pub type ClrpendR = crate::FieldReader; +impl ClrpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRPEND_A::VALUE3), - 1 => Some(CLRPEND_A::VALUE4), + 0 => Some(Clrpend::Value3), + 1 => Some(Clrpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRPEND_A::VALUE3 + *self == Clrpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRPEND_A::VALUE4 + *self == Clrpend::Value4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; -impl<'a, REG> CLRPEND_W<'a, REG> +pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; +impl<'a, REG> ClrpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE3) + self.variant(Clrpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE4) + self.variant(Clrpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> CLRPEND_R { - CLRPEND_R::new(self.bits) + pub fn clrpend(&self) -> ClrpendR { + ClrpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> CLRPEND_W { - CLRPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrpend(&mut self) -> ClrpendW { + ClrpendW::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICPR1_SPEC; -impl crate::RegisterSpec for NVIC_ICPR1_SPEC { +pub struct NvicIcpr1Spec; +impl crate::RegisterSpec for NvicIcpr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr1::R`](R) reader structure"] -impl crate::Readable for NVIC_ICPR1_SPEC {} +impl crate::Readable for NvicIcpr1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr1::W`](W) writer structure"] -impl crate::Writable for NVIC_ICPR1_SPEC { +impl crate::Writable for NvicIcpr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR1 to value 0"] -impl crate::Resettable for NVIC_ICPR1_SPEC { +impl crate::Resettable for NvicIcpr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr2.rs b/src/ppb/nvic_icpr2.rs index ddc61f67..9f12d77b 100644 --- a/src/ppb/nvic_icpr2.rs +++ b/src/ppb/nvic_icpr2.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR2` writer"] -pub type W = crate::W; -#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type CLRPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRPEND_A { +pub enum Clrpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRPEND_A) -> Self { + fn from(variant: Clrpend) -> Self { variant as _ } } -impl crate::FieldSpec for CLRPEND_A { +impl crate::FieldSpec for Clrpend { type Ux = u32; } -impl CLRPEND_R { +#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] +pub type ClrpendR = crate::FieldReader; +impl ClrpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRPEND_A::VALUE3), - 1 => Some(CLRPEND_A::VALUE4), + 0 => Some(Clrpend::Value3), + 1 => Some(Clrpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRPEND_A::VALUE3 + *self == Clrpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRPEND_A::VALUE4 + *self == Clrpend::Value4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; -impl<'a, REG> CLRPEND_W<'a, REG> +pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; +impl<'a, REG> ClrpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE3) + self.variant(Clrpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE4) + self.variant(Clrpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> CLRPEND_R { - CLRPEND_R::new(self.bits) + pub fn clrpend(&self) -> ClrpendR { + ClrpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> CLRPEND_W { - CLRPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrpend(&mut self) -> ClrpendW { + ClrpendW::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICPR2_SPEC; -impl crate::RegisterSpec for NVIC_ICPR2_SPEC { +pub struct NvicIcpr2Spec; +impl crate::RegisterSpec for NvicIcpr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr2::R`](R) reader structure"] -impl crate::Readable for NVIC_ICPR2_SPEC {} +impl crate::Readable for NvicIcpr2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr2::W`](W) writer structure"] -impl crate::Writable for NVIC_ICPR2_SPEC { +impl crate::Writable for NvicIcpr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR2 to value 0"] -impl crate::Resettable for NVIC_ICPR2_SPEC { +impl crate::Resettable for NvicIcpr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr3.rs b/src/ppb/nvic_icpr3.rs index fb2f752b..f0d5b43a 100644 --- a/src/ppb/nvic_icpr3.rs +++ b/src/ppb/nvic_icpr3.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ICPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR3` writer"] -pub type W = crate::W; -#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type CLRPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum CLRPEND_A { +pub enum Clrpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: CLRPEND_A) -> Self { + fn from(variant: Clrpend) -> Self { variant as _ } } -impl crate::FieldSpec for CLRPEND_A { +impl crate::FieldSpec for Clrpend { type Ux = u32; } -impl CLRPEND_R { +#[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] +pub type ClrpendR = crate::FieldReader; +impl ClrpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLRPEND_A::VALUE3), - 1 => Some(CLRPEND_A::VALUE4), + 0 => Some(Clrpend::Value3), + 1 => Some(Clrpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLRPEND_A::VALUE3 + *self == Clrpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLRPEND_A::VALUE4 + *self == Clrpend::Value4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; -impl<'a, REG> CLRPEND_W<'a, REG> +pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; +impl<'a, REG> ClrpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE3) + self.variant(Clrpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLRPEND_A::VALUE4) + self.variant(Clrpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> CLRPEND_R { - CLRPEND_R::new(self.bits) + pub fn clrpend(&self) -> ClrpendR { + ClrpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> CLRPEND_W { - CLRPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn clrpend(&mut self) -> ClrpendW { + ClrpendW::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ICPR3_SPEC; -impl crate::RegisterSpec for NVIC_ICPR3_SPEC { +pub struct NvicIcpr3Spec; +impl crate::RegisterSpec for NvicIcpr3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr3::R`](R) reader structure"] -impl crate::Readable for NVIC_ICPR3_SPEC {} +impl crate::Readable for NvicIcpr3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr3::W`](W) writer structure"] -impl crate::Writable for NVIC_ICPR3_SPEC { +impl crate::Writable for NvicIcpr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR3 to value 0"] -impl crate::Resettable for NVIC_ICPR3_SPEC { +impl crate::Resettable for NvicIcpr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr0.rs b/src/ppb/nvic_ipr0.rs index 40339cfa..ba971de3 100644 --- a/src/ppb/nvic_ipr0.rs +++ b/src/ppb/nvic_ipr0.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR0_SPEC; -impl crate::RegisterSpec for NVIC_IPR0_SPEC { +pub struct NvicIpr0Spec; +impl crate::RegisterSpec for NvicIpr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr0::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR0_SPEC {} +impl crate::Readable for NvicIpr0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr0::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR0_SPEC { +impl crate::Writable for NvicIpr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR0 to value 0"] -impl crate::Resettable for NVIC_IPR0_SPEC { +impl crate::Resettable for NvicIpr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr1.rs b/src/ppb/nvic_ipr1.rs index 9ad54e99..b125454a 100644 --- a/src/ppb/nvic_ipr1.rs +++ b/src/ppb/nvic_ipr1.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR1_SPEC; -impl crate::RegisterSpec for NVIC_IPR1_SPEC { +pub struct NvicIpr1Spec; +impl crate::RegisterSpec for NvicIpr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr1::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR1_SPEC {} +impl crate::Readable for NvicIpr1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr1::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR1_SPEC { +impl crate::Writable for NvicIpr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR1 to value 0"] -impl crate::Resettable for NVIC_IPR1_SPEC { +impl crate::Resettable for NvicIpr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr10.rs b/src/ppb/nvic_ipr10.rs index 1d25038b..027cd742 100644 --- a/src/ppb/nvic_ipr10.rs +++ b/src/ppb/nvic_ipr10.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR10` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR10` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR10_SPEC; -impl crate::RegisterSpec for NVIC_IPR10_SPEC { +pub struct NvicIpr10Spec; +impl crate::RegisterSpec for NvicIpr10Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr10::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR10_SPEC {} +impl crate::Readable for NvicIpr10Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr10::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR10_SPEC { +impl crate::Writable for NvicIpr10Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR10 to value 0"] -impl crate::Resettable for NVIC_IPR10_SPEC { +impl crate::Resettable for NvicIpr10Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr11.rs b/src/ppb/nvic_ipr11.rs index a3b4958c..8a52e864 100644 --- a/src/ppb/nvic_ipr11.rs +++ b/src/ppb/nvic_ipr11.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR11` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR11` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR11_SPEC; -impl crate::RegisterSpec for NVIC_IPR11_SPEC { +pub struct NvicIpr11Spec; +impl crate::RegisterSpec for NvicIpr11Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr11::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR11_SPEC {} +impl crate::Readable for NvicIpr11Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr11::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR11_SPEC { +impl crate::Writable for NvicIpr11Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR11 to value 0"] -impl crate::Resettable for NVIC_IPR11_SPEC { +impl crate::Resettable for NvicIpr11Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr12.rs b/src/ppb/nvic_ipr12.rs index 322d1761..759994cb 100644 --- a/src/ppb/nvic_ipr12.rs +++ b/src/ppb/nvic_ipr12.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR12` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR12_SPEC; -impl crate::RegisterSpec for NVIC_IPR12_SPEC { +pub struct NvicIpr12Spec; +impl crate::RegisterSpec for NvicIpr12Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr12::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR12_SPEC {} +impl crate::Readable for NvicIpr12Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr12::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR12_SPEC { +impl crate::Writable for NvicIpr12Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR12 to value 0"] -impl crate::Resettable for NVIC_IPR12_SPEC { +impl crate::Resettable for NvicIpr12Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr13.rs b/src/ppb/nvic_ipr13.rs index 98088554..30da8186 100644 --- a/src/ppb/nvic_ipr13.rs +++ b/src/ppb/nvic_ipr13.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR13` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR13` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR13_SPEC; -impl crate::RegisterSpec for NVIC_IPR13_SPEC { +pub struct NvicIpr13Spec; +impl crate::RegisterSpec for NvicIpr13Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr13::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR13_SPEC {} +impl crate::Readable for NvicIpr13Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr13::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR13_SPEC { +impl crate::Writable for NvicIpr13Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR13 to value 0"] -impl crate::Resettable for NVIC_IPR13_SPEC { +impl crate::Resettable for NvicIpr13Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr14.rs b/src/ppb/nvic_ipr14.rs index e74c0ce3..54cee235 100644 --- a/src/ppb/nvic_ipr14.rs +++ b/src/ppb/nvic_ipr14.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR14` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR14` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR14_SPEC; -impl crate::RegisterSpec for NVIC_IPR14_SPEC { +pub struct NvicIpr14Spec; +impl crate::RegisterSpec for NvicIpr14Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr14::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR14_SPEC {} +impl crate::Readable for NvicIpr14Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr14::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR14_SPEC { +impl crate::Writable for NvicIpr14Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR14 to value 0"] -impl crate::Resettable for NVIC_IPR14_SPEC { +impl crate::Resettable for NvicIpr14Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr15.rs b/src/ppb/nvic_ipr15.rs index 85a0b059..59692b17 100644 --- a/src/ppb/nvic_ipr15.rs +++ b/src/ppb/nvic_ipr15.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR15` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR15` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR15_SPEC; -impl crate::RegisterSpec for NVIC_IPR15_SPEC { +pub struct NvicIpr15Spec; +impl crate::RegisterSpec for NvicIpr15Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr15::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR15_SPEC {} +impl crate::Readable for NvicIpr15Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr15::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR15_SPEC { +impl crate::Writable for NvicIpr15Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR15 to value 0"] -impl crate::Resettable for NVIC_IPR15_SPEC { +impl crate::Resettable for NvicIpr15Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr16.rs b/src/ppb/nvic_ipr16.rs index 3e711f0c..0b9c02a2 100644 --- a/src/ppb/nvic_ipr16.rs +++ b/src/ppb/nvic_ipr16.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR16` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR16` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR16_SPEC; -impl crate::RegisterSpec for NVIC_IPR16_SPEC { +pub struct NvicIpr16Spec; +impl crate::RegisterSpec for NvicIpr16Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr16::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR16_SPEC {} +impl crate::Readable for NvicIpr16Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr16::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR16_SPEC { +impl crate::Writable for NvicIpr16Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR16 to value 0"] -impl crate::Resettable for NVIC_IPR16_SPEC { +impl crate::Resettable for NvicIpr16Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr17.rs b/src/ppb/nvic_ipr17.rs index 0e15a483..e49d63f5 100644 --- a/src/ppb/nvic_ipr17.rs +++ b/src/ppb/nvic_ipr17.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR17` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR17` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR17_SPEC; -impl crate::RegisterSpec for NVIC_IPR17_SPEC { +pub struct NvicIpr17Spec; +impl crate::RegisterSpec for NvicIpr17Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr17::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR17_SPEC {} +impl crate::Readable for NvicIpr17Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr17::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR17_SPEC { +impl crate::Writable for NvicIpr17Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR17 to value 0"] -impl crate::Resettable for NVIC_IPR17_SPEC { +impl crate::Resettable for NvicIpr17Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr18.rs b/src/ppb/nvic_ipr18.rs index 22107377..8d6e7942 100644 --- a/src/ppb/nvic_ipr18.rs +++ b/src/ppb/nvic_ipr18.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR18` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR18` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR18_SPEC; -impl crate::RegisterSpec for NVIC_IPR18_SPEC { +pub struct NvicIpr18Spec; +impl crate::RegisterSpec for NvicIpr18Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr18::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR18_SPEC {} +impl crate::Readable for NvicIpr18Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr18::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR18_SPEC { +impl crate::Writable for NvicIpr18Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR18 to value 0"] -impl crate::Resettable for NVIC_IPR18_SPEC { +impl crate::Resettable for NvicIpr18Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr19.rs b/src/ppb/nvic_ipr19.rs index 8c3779d6..8d0b7b65 100644 --- a/src/ppb/nvic_ipr19.rs +++ b/src/ppb/nvic_ipr19.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR19` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR19` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR19_SPEC; -impl crate::RegisterSpec for NVIC_IPR19_SPEC { +pub struct NvicIpr19Spec; +impl crate::RegisterSpec for NvicIpr19Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr19::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR19_SPEC {} +impl crate::Readable for NvicIpr19Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr19::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR19_SPEC { +impl crate::Writable for NvicIpr19Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR19 to value 0"] -impl crate::Resettable for NVIC_IPR19_SPEC { +impl crate::Resettable for NvicIpr19Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr2.rs b/src/ppb/nvic_ipr2.rs index cb1ed45e..809d900a 100644 --- a/src/ppb/nvic_ipr2.rs +++ b/src/ppb/nvic_ipr2.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR2_SPEC; -impl crate::RegisterSpec for NVIC_IPR2_SPEC { +pub struct NvicIpr2Spec; +impl crate::RegisterSpec for NvicIpr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr2::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR2_SPEC {} +impl crate::Readable for NvicIpr2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr2::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR2_SPEC { +impl crate::Writable for NvicIpr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR2 to value 0"] -impl crate::Resettable for NVIC_IPR2_SPEC { +impl crate::Resettable for NvicIpr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr20.rs b/src/ppb/nvic_ipr20.rs index afd09752..9b2eb86b 100644 --- a/src/ppb/nvic_ipr20.rs +++ b/src/ppb/nvic_ipr20.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR20` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR20` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR20_SPEC; -impl crate::RegisterSpec for NVIC_IPR20_SPEC { +pub struct NvicIpr20Spec; +impl crate::RegisterSpec for NvicIpr20Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr20::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR20_SPEC {} +impl crate::Readable for NvicIpr20Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr20::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR20_SPEC { +impl crate::Writable for NvicIpr20Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR20 to value 0"] -impl crate::Resettable for NVIC_IPR20_SPEC { +impl crate::Resettable for NvicIpr20Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr21.rs b/src/ppb/nvic_ipr21.rs index 53149f9b..d3050b90 100644 --- a/src/ppb/nvic_ipr21.rs +++ b/src/ppb/nvic_ipr21.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR21` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR21` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR21_SPEC; -impl crate::RegisterSpec for NVIC_IPR21_SPEC { +pub struct NvicIpr21Spec; +impl crate::RegisterSpec for NvicIpr21Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr21::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR21_SPEC {} +impl crate::Readable for NvicIpr21Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr21::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR21_SPEC { +impl crate::Writable for NvicIpr21Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR21 to value 0"] -impl crate::Resettable for NVIC_IPR21_SPEC { +impl crate::Resettable for NvicIpr21Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr22.rs b/src/ppb/nvic_ipr22.rs index 7f558dca..6619732c 100644 --- a/src/ppb/nvic_ipr22.rs +++ b/src/ppb/nvic_ipr22.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR22` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR22` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR22_SPEC; -impl crate::RegisterSpec for NVIC_IPR22_SPEC { +pub struct NvicIpr22Spec; +impl crate::RegisterSpec for NvicIpr22Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr22::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR22_SPEC {} +impl crate::Readable for NvicIpr22Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr22::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR22_SPEC { +impl crate::Writable for NvicIpr22Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR22 to value 0"] -impl crate::Resettable for NVIC_IPR22_SPEC { +impl crate::Resettable for NvicIpr22Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr23.rs b/src/ppb/nvic_ipr23.rs index 19b0c1a3..5d3dc06a 100644 --- a/src/ppb/nvic_ipr23.rs +++ b/src/ppb/nvic_ipr23.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR23` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR23` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR23_SPEC; -impl crate::RegisterSpec for NVIC_IPR23_SPEC { +pub struct NvicIpr23Spec; +impl crate::RegisterSpec for NvicIpr23Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr23::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR23_SPEC {} +impl crate::Readable for NvicIpr23Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr23::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR23_SPEC { +impl crate::Writable for NvicIpr23Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR23 to value 0"] -impl crate::Resettable for NVIC_IPR23_SPEC { +impl crate::Resettable for NvicIpr23Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr24.rs b/src/ppb/nvic_ipr24.rs index 7b251761..8c39da34 100644 --- a/src/ppb/nvic_ipr24.rs +++ b/src/ppb/nvic_ipr24.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR24` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR24` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR24_SPEC; -impl crate::RegisterSpec for NVIC_IPR24_SPEC { +pub struct NvicIpr24Spec; +impl crate::RegisterSpec for NvicIpr24Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr24::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR24_SPEC {} +impl crate::Readable for NvicIpr24Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr24::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR24_SPEC { +impl crate::Writable for NvicIpr24Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR24 to value 0"] -impl crate::Resettable for NVIC_IPR24_SPEC { +impl crate::Resettable for NvicIpr24Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr25.rs b/src/ppb/nvic_ipr25.rs index 825b3302..9f0c9bda 100644 --- a/src/ppb/nvic_ipr25.rs +++ b/src/ppb/nvic_ipr25.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR25` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR25` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR25_SPEC; -impl crate::RegisterSpec for NVIC_IPR25_SPEC { +pub struct NvicIpr25Spec; +impl crate::RegisterSpec for NvicIpr25Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr25::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR25_SPEC {} +impl crate::Readable for NvicIpr25Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr25::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR25_SPEC { +impl crate::Writable for NvicIpr25Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR25 to value 0"] -impl crate::Resettable for NVIC_IPR25_SPEC { +impl crate::Resettable for NvicIpr25Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr26.rs b/src/ppb/nvic_ipr26.rs index b54eb779..7c9f900a 100644 --- a/src/ppb/nvic_ipr26.rs +++ b/src/ppb/nvic_ipr26.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR26` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR26` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR26_SPEC; -impl crate::RegisterSpec for NVIC_IPR26_SPEC { +pub struct NvicIpr26Spec; +impl crate::RegisterSpec for NvicIpr26Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr26::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR26_SPEC {} +impl crate::Readable for NvicIpr26Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr26::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR26_SPEC { +impl crate::Writable for NvicIpr26Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR26 to value 0"] -impl crate::Resettable for NVIC_IPR26_SPEC { +impl crate::Resettable for NvicIpr26Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr27.rs b/src/ppb/nvic_ipr27.rs index 9840fbe8..3761d07c 100644 --- a/src/ppb/nvic_ipr27.rs +++ b/src/ppb/nvic_ipr27.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR27` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR27` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR27_SPEC; -impl crate::RegisterSpec for NVIC_IPR27_SPEC { +pub struct NvicIpr27Spec; +impl crate::RegisterSpec for NvicIpr27Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr27::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR27_SPEC {} +impl crate::Readable for NvicIpr27Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr27::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR27_SPEC { +impl crate::Writable for NvicIpr27Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR27 to value 0"] -impl crate::Resettable for NVIC_IPR27_SPEC { +impl crate::Resettable for NvicIpr27Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr3.rs b/src/ppb/nvic_ipr3.rs index 8ccb326b..528ec08c 100644 --- a/src/ppb/nvic_ipr3.rs +++ b/src/ppb/nvic_ipr3.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR3_SPEC; -impl crate::RegisterSpec for NVIC_IPR3_SPEC { +pub struct NvicIpr3Spec; +impl crate::RegisterSpec for NvicIpr3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr3::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR3_SPEC {} +impl crate::Readable for NvicIpr3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr3::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR3_SPEC { +impl crate::Writable for NvicIpr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR3 to value 0"] -impl crate::Resettable for NVIC_IPR3_SPEC { +impl crate::Resettable for NvicIpr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr4.rs b/src/ppb/nvic_ipr4.rs index 46e10f86..363d664e 100644 --- a/src/ppb/nvic_ipr4.rs +++ b/src/ppb/nvic_ipr4.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR4_SPEC; -impl crate::RegisterSpec for NVIC_IPR4_SPEC { +pub struct NvicIpr4Spec; +impl crate::RegisterSpec for NvicIpr4Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr4::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR4_SPEC {} +impl crate::Readable for NvicIpr4Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr4::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR4_SPEC { +impl crate::Writable for NvicIpr4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR4 to value 0"] -impl crate::Resettable for NVIC_IPR4_SPEC { +impl crate::Resettable for NvicIpr4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr5.rs b/src/ppb/nvic_ipr5.rs index ecc5180f..f01df3c7 100644 --- a/src/ppb/nvic_ipr5.rs +++ b/src/ppb/nvic_ipr5.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR5` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR5` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR5_SPEC; -impl crate::RegisterSpec for NVIC_IPR5_SPEC { +pub struct NvicIpr5Spec; +impl crate::RegisterSpec for NvicIpr5Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr5::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR5_SPEC {} +impl crate::Readable for NvicIpr5Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr5::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR5_SPEC { +impl crate::Writable for NvicIpr5Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR5 to value 0"] -impl crate::Resettable for NVIC_IPR5_SPEC { +impl crate::Resettable for NvicIpr5Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr6.rs b/src/ppb/nvic_ipr6.rs index 5ddc6b23..547054cc 100644 --- a/src/ppb/nvic_ipr6.rs +++ b/src/ppb/nvic_ipr6.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR6` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR6` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR6_SPEC; -impl crate::RegisterSpec for NVIC_IPR6_SPEC { +pub struct NvicIpr6Spec; +impl crate::RegisterSpec for NvicIpr6Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr6::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR6_SPEC {} +impl crate::Readable for NvicIpr6Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr6::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR6_SPEC { +impl crate::Writable for NvicIpr6Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR6 to value 0"] -impl crate::Resettable for NVIC_IPR6_SPEC { +impl crate::Resettable for NvicIpr6Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr7.rs b/src/ppb/nvic_ipr7.rs index d40e8357..02d25665 100644 --- a/src/ppb/nvic_ipr7.rs +++ b/src/ppb/nvic_ipr7.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR7` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR7` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR7_SPEC; -impl crate::RegisterSpec for NVIC_IPR7_SPEC { +pub struct NvicIpr7Spec; +impl crate::RegisterSpec for NvicIpr7Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr7::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR7_SPEC {} +impl crate::Readable for NvicIpr7Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr7::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR7_SPEC { +impl crate::Writable for NvicIpr7Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR7 to value 0"] -impl crate::Resettable for NVIC_IPR7_SPEC { +impl crate::Resettable for NvicIpr7Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr8.rs b/src/ppb/nvic_ipr8.rs index 3db437d4..b30ee8fb 100644 --- a/src/ppb/nvic_ipr8.rs +++ b/src/ppb/nvic_ipr8.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR8_SPEC; -impl crate::RegisterSpec for NVIC_IPR8_SPEC { +pub struct NvicIpr8Spec; +impl crate::RegisterSpec for NvicIpr8Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr8::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR8_SPEC {} +impl crate::Readable for NvicIpr8Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr8::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR8_SPEC { +impl crate::Writable for NvicIpr8Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR8 to value 0"] -impl crate::Resettable for NVIC_IPR8_SPEC { +impl crate::Resettable for NvicIpr8Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr9.rs b/src/ppb/nvic_ipr9.rs index b7070642..0601831a 100644 --- a/src/ppb/nvic_ipr9.rs +++ b/src/ppb/nvic_ipr9.rs @@ -1,94 +1,85 @@ #[doc = "Register `NVIC_IPR9` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR9` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type PRI_0_R = crate::FieldReader; +pub type Pri0R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type PRI_1_R = crate::FieldReader; +pub type Pri1R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type PRI_2_R = crate::FieldReader; +pub type Pri2R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type PRI_3_R = crate::FieldReader; +pub type Pri3R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> PRI_0_R { - PRI_0_R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> Pri0R { + Pri0R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> PRI_1_R { - PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> Pri1R { + Pri1R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> PRI_2_R { - PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> Pri2R { + Pri2R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> PRI_3_R { - PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> Pri3R { + Pri3R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> PRI_0_W { - PRI_0_W::new(self, 0) + pub fn pri_0(&mut self) -> Pri0W { + Pri0W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> PRI_1_W { - PRI_1_W::new(self, 8) + pub fn pri_1(&mut self) -> Pri1W { + Pri1W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> PRI_2_W { - PRI_2_W::new(self, 16) + pub fn pri_2(&mut self) -> Pri2W { + Pri2W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> PRI_3_W { - PRI_3_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_3(&mut self) -> Pri3W { + Pri3W::new(self, 24) } } #[doc = "Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_IPR9_SPEC; -impl crate::RegisterSpec for NVIC_IPR9_SPEC { +pub struct NvicIpr9Spec; +impl crate::RegisterSpec for NvicIpr9Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr9::R`](R) reader structure"] -impl crate::Readable for NVIC_IPR9_SPEC {} +impl crate::Readable for NvicIpr9Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr9::W`](W) writer structure"] -impl crate::Writable for NVIC_IPR9_SPEC { +impl crate::Writable for NvicIpr9Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR9 to value 0"] -impl crate::Resettable for NVIC_IPR9_SPEC { +impl crate::Resettable for NvicIpr9Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser0.rs b/src/ppb/nvic_iser0.rs index f8eda5be..80856c3e 100644 --- a/src/ppb/nvic_iser0.rs +++ b/src/ppb/nvic_iser0.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISER0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER0` writer"] -pub type W = crate::W; -#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SETENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETENA_A { +pub enum Setena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETENA_A) -> Self { + fn from(variant: Setena) -> Self { variant as _ } } -impl crate::FieldSpec for SETENA_A { +impl crate::FieldSpec for Setena { type Ux = u32; } -impl SETENA_R { +#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] +pub type SetenaR = crate::FieldReader; +impl SetenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETENA_A::VALUE3), - 1 => Some(SETENA_A::VALUE4), + 0 => Some(Setena::Value3), + 1 => Some(Setena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETENA_A::VALUE3 + *self == Setena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETENA_A::VALUE4 + *self == Setena::Value4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; -impl<'a, REG> SETENA_W<'a, REG> +pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; +impl<'a, REG> SetenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE3) + self.variant(Setena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE4) + self.variant(Setena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SETENA_R { - SETENA_R::new(self.bits) + pub fn setena(&self) -> SetenaR { + SetenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SETENA_W { - SETENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setena(&mut self) -> SetenaW { + SetenaW::new(self, 0) } } #[doc = "Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISER0_SPEC; -impl crate::RegisterSpec for NVIC_ISER0_SPEC { +pub struct NvicIser0Spec; +impl crate::RegisterSpec for NvicIser0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser0::R`](R) reader structure"] -impl crate::Readable for NVIC_ISER0_SPEC {} +impl crate::Readable for NvicIser0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iser0::W`](W) writer structure"] -impl crate::Writable for NVIC_ISER0_SPEC { +impl crate::Writable for NvicIser0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER0 to value 0"] -impl crate::Resettable for NVIC_ISER0_SPEC { +impl crate::Resettable for NvicIser0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser1.rs b/src/ppb/nvic_iser1.rs index f2f78363..3ab13cee 100644 --- a/src/ppb/nvic_iser1.rs +++ b/src/ppb/nvic_iser1.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISER1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER1` writer"] -pub type W = crate::W; -#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SETENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETENA_A { +pub enum Setena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETENA_A) -> Self { + fn from(variant: Setena) -> Self { variant as _ } } -impl crate::FieldSpec for SETENA_A { +impl crate::FieldSpec for Setena { type Ux = u32; } -impl SETENA_R { +#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] +pub type SetenaR = crate::FieldReader; +impl SetenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETENA_A::VALUE3), - 1 => Some(SETENA_A::VALUE4), + 0 => Some(Setena::Value3), + 1 => Some(Setena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETENA_A::VALUE3 + *self == Setena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETENA_A::VALUE4 + *self == Setena::Value4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; -impl<'a, REG> SETENA_W<'a, REG> +pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; +impl<'a, REG> SetenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE3) + self.variant(Setena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE4) + self.variant(Setena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SETENA_R { - SETENA_R::new(self.bits) + pub fn setena(&self) -> SetenaR { + SetenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SETENA_W { - SETENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setena(&mut self) -> SetenaW { + SetenaW::new(self, 0) } } #[doc = "Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISER1_SPEC; -impl crate::RegisterSpec for NVIC_ISER1_SPEC { +pub struct NvicIser1Spec; +impl crate::RegisterSpec for NvicIser1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser1::R`](R) reader structure"] -impl crate::Readable for NVIC_ISER1_SPEC {} +impl crate::Readable for NvicIser1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iser1::W`](W) writer structure"] -impl crate::Writable for NVIC_ISER1_SPEC { +impl crate::Writable for NvicIser1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER1 to value 0"] -impl crate::Resettable for NVIC_ISER1_SPEC { +impl crate::Resettable for NvicIser1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser2.rs b/src/ppb/nvic_iser2.rs index 00c5b78f..3f4a1e24 100644 --- a/src/ppb/nvic_iser2.rs +++ b/src/ppb/nvic_iser2.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISER2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER2` writer"] -pub type W = crate::W; -#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SETENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETENA_A { +pub enum Setena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETENA_A) -> Self { + fn from(variant: Setena) -> Self { variant as _ } } -impl crate::FieldSpec for SETENA_A { +impl crate::FieldSpec for Setena { type Ux = u32; } -impl SETENA_R { +#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] +pub type SetenaR = crate::FieldReader; +impl SetenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETENA_A::VALUE3), - 1 => Some(SETENA_A::VALUE4), + 0 => Some(Setena::Value3), + 1 => Some(Setena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETENA_A::VALUE3 + *self == Setena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETENA_A::VALUE4 + *self == Setena::Value4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; -impl<'a, REG> SETENA_W<'a, REG> +pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; +impl<'a, REG> SetenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE3) + self.variant(Setena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE4) + self.variant(Setena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SETENA_R { - SETENA_R::new(self.bits) + pub fn setena(&self) -> SetenaR { + SetenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SETENA_W { - SETENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setena(&mut self) -> SetenaW { + SetenaW::new(self, 0) } } #[doc = "Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISER2_SPEC; -impl crate::RegisterSpec for NVIC_ISER2_SPEC { +pub struct NvicIser2Spec; +impl crate::RegisterSpec for NvicIser2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser2::R`](R) reader structure"] -impl crate::Readable for NVIC_ISER2_SPEC {} +impl crate::Readable for NvicIser2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iser2::W`](W) writer structure"] -impl crate::Writable for NVIC_ISER2_SPEC { +impl crate::Writable for NvicIser2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER2 to value 0"] -impl crate::Resettable for NVIC_ISER2_SPEC { +impl crate::Resettable for NvicIser2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser3.rs b/src/ppb/nvic_iser3.rs index 96d6d338..65426615 100644 --- a/src/ppb/nvic_iser3.rs +++ b/src/ppb/nvic_iser3.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISER3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER3` writer"] -pub type W = crate::W; -#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SETENA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETENA_A { +pub enum Setena { #[doc = "0: interrupt disabled"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt enabled."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETENA_A) -> Self { + fn from(variant: Setena) -> Self { variant as _ } } -impl crate::FieldSpec for SETENA_A { +impl crate::FieldSpec for Setena { type Ux = u32; } -impl SETENA_R { +#[doc = "Field `SETENA` reader - Interrupt set-enable bits"] +pub type SetenaR = crate::FieldReader; +impl SetenaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETENA_A::VALUE3), - 1 => Some(SETENA_A::VALUE4), + 0 => Some(Setena::Value3), + 1 => Some(Setena::Value4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETENA_A::VALUE3 + *self == Setena::Value3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETENA_A::VALUE4 + *self == Setena::Value4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; -impl<'a, REG> SETENA_W<'a, REG> +pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; +impl<'a, REG> SetenaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE3) + self.variant(Setena::Value3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETENA_A::VALUE4) + self.variant(Setena::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SETENA_R { - SETENA_R::new(self.bits) + pub fn setena(&self) -> SetenaR { + SetenaR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SETENA_W { - SETENA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setena(&mut self) -> SetenaW { + SetenaW::new(self, 0) } } #[doc = "Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISER3_SPEC; -impl crate::RegisterSpec for NVIC_ISER3_SPEC { +pub struct NvicIser3Spec; +impl crate::RegisterSpec for NvicIser3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser3::R`](R) reader structure"] -impl crate::Readable for NVIC_ISER3_SPEC {} +impl crate::Readable for NvicIser3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_iser3::W`](W) writer structure"] -impl crate::Writable for NVIC_ISER3_SPEC { +impl crate::Writable for NvicIser3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER3 to value 0"] -impl crate::Resettable for NVIC_ISER3_SPEC { +impl crate::Resettable for NvicIser3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr0.rs b/src/ppb/nvic_ispr0.rs index 7742f320..0c7efc09 100644 --- a/src/ppb/nvic_ispr0.rs +++ b/src/ppb/nvic_ispr0.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR0` writer"] -pub type W = crate::W; -#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SETPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETPEND_A { +pub enum Setpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETPEND_A) -> Self { + fn from(variant: Setpend) -> Self { variant as _ } } -impl crate::FieldSpec for SETPEND_A { +impl crate::FieldSpec for Setpend { type Ux = u32; } -impl SETPEND_R { +#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] +pub type SetpendR = crate::FieldReader; +impl SetpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETPEND_A::VALUE3), - 1 => Some(SETPEND_A::VALUE4), + 0 => Some(Setpend::Value3), + 1 => Some(Setpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETPEND_A::VALUE3 + *self == Setpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETPEND_A::VALUE4 + *self == Setpend::Value4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; -impl<'a, REG> SETPEND_W<'a, REG> +pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; +impl<'a, REG> SetpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE3) + self.variant(Setpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE4) + self.variant(Setpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SETPEND_R { - SETPEND_R::new(self.bits) + pub fn setpend(&self) -> SetpendR { + SetpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SETPEND_W { - SETPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setpend(&mut self) -> SetpendW { + SetpendW::new(self, 0) } } #[doc = "Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISPR0_SPEC; -impl crate::RegisterSpec for NVIC_ISPR0_SPEC { +pub struct NvicIspr0Spec; +impl crate::RegisterSpec for NvicIspr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr0::R`](R) reader structure"] -impl crate::Readable for NVIC_ISPR0_SPEC {} +impl crate::Readable for NvicIspr0Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr0::W`](W) writer structure"] -impl crate::Writable for NVIC_ISPR0_SPEC { +impl crate::Writable for NvicIspr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR0 to value 0"] -impl crate::Resettable for NVIC_ISPR0_SPEC { +impl crate::Resettable for NvicIspr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr1.rs b/src/ppb/nvic_ispr1.rs index 1aa254f0..9280fea2 100644 --- a/src/ppb/nvic_ispr1.rs +++ b/src/ppb/nvic_ispr1.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR1` writer"] -pub type W = crate::W; -#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SETPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETPEND_A { +pub enum Setpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETPEND_A) -> Self { + fn from(variant: Setpend) -> Self { variant as _ } } -impl crate::FieldSpec for SETPEND_A { +impl crate::FieldSpec for Setpend { type Ux = u32; } -impl SETPEND_R { +#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] +pub type SetpendR = crate::FieldReader; +impl SetpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETPEND_A::VALUE3), - 1 => Some(SETPEND_A::VALUE4), + 0 => Some(Setpend::Value3), + 1 => Some(Setpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETPEND_A::VALUE3 + *self == Setpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETPEND_A::VALUE4 + *self == Setpend::Value4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; -impl<'a, REG> SETPEND_W<'a, REG> +pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; +impl<'a, REG> SetpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE3) + self.variant(Setpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE4) + self.variant(Setpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SETPEND_R { - SETPEND_R::new(self.bits) + pub fn setpend(&self) -> SetpendR { + SetpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SETPEND_W { - SETPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setpend(&mut self) -> SetpendW { + SetpendW::new(self, 0) } } #[doc = "Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISPR1_SPEC; -impl crate::RegisterSpec for NVIC_ISPR1_SPEC { +pub struct NvicIspr1Spec; +impl crate::RegisterSpec for NvicIspr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr1::R`](R) reader structure"] -impl crate::Readable for NVIC_ISPR1_SPEC {} +impl crate::Readable for NvicIspr1Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr1::W`](W) writer structure"] -impl crate::Writable for NVIC_ISPR1_SPEC { +impl crate::Writable for NvicIspr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR1 to value 0"] -impl crate::Resettable for NVIC_ISPR1_SPEC { +impl crate::Resettable for NvicIspr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr2.rs b/src/ppb/nvic_ispr2.rs index 7d8946fa..f549eb41 100644 --- a/src/ppb/nvic_ispr2.rs +++ b/src/ppb/nvic_ispr2.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR2` writer"] -pub type W = crate::W; -#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SETPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETPEND_A { +pub enum Setpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETPEND_A) -> Self { + fn from(variant: Setpend) -> Self { variant as _ } } -impl crate::FieldSpec for SETPEND_A { +impl crate::FieldSpec for Setpend { type Ux = u32; } -impl SETPEND_R { +#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] +pub type SetpendR = crate::FieldReader; +impl SetpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETPEND_A::VALUE3), - 1 => Some(SETPEND_A::VALUE4), + 0 => Some(Setpend::Value3), + 1 => Some(Setpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETPEND_A::VALUE3 + *self == Setpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETPEND_A::VALUE4 + *self == Setpend::Value4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; -impl<'a, REG> SETPEND_W<'a, REG> +pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; +impl<'a, REG> SetpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE3) + self.variant(Setpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE4) + self.variant(Setpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SETPEND_R { - SETPEND_R::new(self.bits) + pub fn setpend(&self) -> SetpendR { + SetpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SETPEND_W { - SETPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setpend(&mut self) -> SetpendW { + SetpendW::new(self, 0) } } #[doc = "Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISPR2_SPEC; -impl crate::RegisterSpec for NVIC_ISPR2_SPEC { +pub struct NvicIspr2Spec; +impl crate::RegisterSpec for NvicIspr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr2::R`](R) reader structure"] -impl crate::Readable for NVIC_ISPR2_SPEC {} +impl crate::Readable for NvicIspr2Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr2::W`](W) writer structure"] -impl crate::Writable for NVIC_ISPR2_SPEC { +impl crate::Writable for NvicIspr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR2 to value 0"] -impl crate::Resettable for NVIC_ISPR2_SPEC { +impl crate::Resettable for NvicIspr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr3.rs b/src/ppb/nvic_ispr3.rs index df3c58c6..d8835e46 100644 --- a/src/ppb/nvic_ispr3.rs +++ b/src/ppb/nvic_ispr3.rs @@ -1,51 +1,51 @@ #[doc = "Register `NVIC_ISPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR3` writer"] -pub type W = crate::W; -#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SETPEND_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum SETPEND_A { +pub enum Setpend { #[doc = "0: interrupt is not pending"] - VALUE3 = 0, + Value3 = 0, #[doc = "1: interrupt is pending."] - VALUE4 = 1, + Value4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: SETPEND_A) -> Self { + fn from(variant: Setpend) -> Self { variant as _ } } -impl crate::FieldSpec for SETPEND_A { +impl crate::FieldSpec for Setpend { type Ux = u32; } -impl SETPEND_R { +#[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] +pub type SetpendR = crate::FieldReader; +impl SetpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SETPEND_A::VALUE3), - 1 => Some(SETPEND_A::VALUE4), + 0 => Some(Setpend::Value3), + 1 => Some(Setpend::Value4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SETPEND_A::VALUE3 + *self == Setpend::Value3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SETPEND_A::VALUE4 + *self == Setpend::Value4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; -impl<'a, REG> SETPEND_W<'a, REG> +pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; +impl<'a, REG> SetpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,52 +53,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE3) + self.variant(Setpend::Value3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SETPEND_A::VALUE4) + self.variant(Setpend::Value4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SETPEND_R { - SETPEND_R::new(self.bits) + pub fn setpend(&self) -> SetpendR { + SetpendR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SETPEND_W { - SETPEND_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn setpend(&mut self) -> SetpendW { + SetpendW::new(self, 0) } } #[doc = "Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NVIC_ISPR3_SPEC; -impl crate::RegisterSpec for NVIC_ISPR3_SPEC { +pub struct NvicIspr3Spec; +impl crate::RegisterSpec for NvicIspr3Spec { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr3::R`](R) reader structure"] -impl crate::Readable for NVIC_ISPR3_SPEC {} +impl crate::Readable for NvicIspr3Spec {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr3::W`](W) writer structure"] -impl crate::Writable for NVIC_ISPR3_SPEC { +impl crate::Writable for NvicIspr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR3 to value 0"] -impl crate::Resettable for NVIC_ISPR3_SPEC { +impl crate::Resettable for NvicIspr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/scr.rs b/src/ppb/scr.rs index 3e6b6bd7..a2a02833 100644 --- a/src/ppb/scr.rs +++ b/src/ppb/scr.rs @@ -1,226 +1,217 @@ #[doc = "Register `SCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCR` writer"] -pub type W = crate::W; -#[doc = "Field `SLEEPONEXIT` reader - Sleep on Exit"] -pub type SLEEPONEXIT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Sleep on Exit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLEEPONEXIT_A { +pub enum Sleeponexit { #[doc = "0: do not sleep when returning to Thread mode."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enter sleep, or deep sleep, on return from an ISR."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLEEPONEXIT_A) -> Self { + fn from(variant: Sleeponexit) -> Self { variant as u8 != 0 } } -impl SLEEPONEXIT_R { +#[doc = "Field `SLEEPONEXIT` reader - Sleep on Exit"] +pub type SleeponexitR = crate::BitReader; +impl SleeponexitR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLEEPONEXIT_A { + pub const fn variant(&self) -> Sleeponexit { match self.bits { - false => SLEEPONEXIT_A::VALUE1, - true => SLEEPONEXIT_A::VALUE2, + false => Sleeponexit::Value1, + true => Sleeponexit::Value2, } } #[doc = "do not sleep when returning to Thread mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLEEPONEXIT_A::VALUE1 + *self == Sleeponexit::Value1 } #[doc = "enter sleep, or deep sleep, on return from an ISR."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLEEPONEXIT_A::VALUE2 + *self == Sleeponexit::Value2 } } #[doc = "Field `SLEEPONEXIT` writer - Sleep on Exit"] -pub type SLEEPONEXIT_W<'a, REG> = crate::BitWriter<'a, REG, SLEEPONEXIT_A>; -impl<'a, REG> SLEEPONEXIT_W<'a, REG> +pub type SleeponexitW<'a, REG> = crate::BitWriter<'a, REG, Sleeponexit>; +impl<'a, REG> SleeponexitW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not sleep when returning to Thread mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SLEEPONEXIT_A::VALUE1) + self.variant(Sleeponexit::Value1) } #[doc = "enter sleep, or deep sleep, on return from an ISR."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SLEEPONEXIT_A::VALUE2) + self.variant(Sleeponexit::Value2) } } -#[doc = "Field `SLEEPDEEP` reader - Sleep or Deep Sleep"] -pub type SLEEPDEEP_R = crate::BitReader; #[doc = "Sleep or Deep Sleep\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLEEPDEEP_A { +pub enum Sleepdeep { #[doc = "0: sleep"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: deep sleep"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLEEPDEEP_A) -> Self { + fn from(variant: Sleepdeep) -> Self { variant as u8 != 0 } } -impl SLEEPDEEP_R { +#[doc = "Field `SLEEPDEEP` reader - Sleep or Deep Sleep"] +pub type SleepdeepR = crate::BitReader; +impl SleepdeepR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLEEPDEEP_A { + pub const fn variant(&self) -> Sleepdeep { match self.bits { - false => SLEEPDEEP_A::VALUE1, - true => SLEEPDEEP_A::VALUE2, + false => Sleepdeep::Value1, + true => Sleepdeep::Value2, } } #[doc = "sleep"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLEEPDEEP_A::VALUE1 + *self == Sleepdeep::Value1 } #[doc = "deep sleep"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLEEPDEEP_A::VALUE2 + *self == Sleepdeep::Value2 } } #[doc = "Field `SLEEPDEEP` writer - Sleep or Deep Sleep"] -pub type SLEEPDEEP_W<'a, REG> = crate::BitWriter<'a, REG, SLEEPDEEP_A>; -impl<'a, REG> SLEEPDEEP_W<'a, REG> +pub type SleepdeepW<'a, REG> = crate::BitWriter<'a, REG, Sleepdeep>; +impl<'a, REG> SleepdeepW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "sleep"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SLEEPDEEP_A::VALUE1) + self.variant(Sleepdeep::Value1) } #[doc = "deep sleep"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SLEEPDEEP_A::VALUE2) + self.variant(Sleepdeep::Value2) } } -#[doc = "Field `SEVONPEND` reader - Send Event on Pending bit:"] -pub type SEVONPEND_R = crate::BitReader; #[doc = "Send Event on Pending bit:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEVONPEND_A { +pub enum Sevonpend { #[doc = "0: only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEVONPEND_A) -> Self { + fn from(variant: Sevonpend) -> Self { variant as u8 != 0 } } -impl SEVONPEND_R { +#[doc = "Field `SEVONPEND` reader - Send Event on Pending bit:"] +pub type SevonpendR = crate::BitReader; +impl SevonpendR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SEVONPEND_A { + pub const fn variant(&self) -> Sevonpend { match self.bits { - false => SEVONPEND_A::VALUE1, - true => SEVONPEND_A::VALUE2, + false => Sevonpend::Value1, + true => Sevonpend::Value2, } } #[doc = "only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEVONPEND_A::VALUE1 + *self == Sevonpend::Value1 } #[doc = "enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEVONPEND_A::VALUE2 + *self == Sevonpend::Value2 } } #[doc = "Field `SEVONPEND` writer - Send Event on Pending bit:"] -pub type SEVONPEND_W<'a, REG> = crate::BitWriter<'a, REG, SEVONPEND_A>; -impl<'a, REG> SEVONPEND_W<'a, REG> +pub type SevonpendW<'a, REG> = crate::BitWriter<'a, REG, Sevonpend>; +impl<'a, REG> SevonpendW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEVONPEND_A::VALUE1) + self.variant(Sevonpend::Value1) } #[doc = "enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEVONPEND_A::VALUE2) + self.variant(Sevonpend::Value2) } } impl R { #[doc = "Bit 1 - Sleep on Exit"] #[inline(always)] - pub fn sleeponexit(&self) -> SLEEPONEXIT_R { - SLEEPONEXIT_R::new(((self.bits >> 1) & 1) != 0) + pub fn sleeponexit(&self) -> SleeponexitR { + SleeponexitR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sleep or Deep Sleep"] #[inline(always)] - pub fn sleepdeep(&self) -> SLEEPDEEP_R { - SLEEPDEEP_R::new(((self.bits >> 2) & 1) != 0) + pub fn sleepdeep(&self) -> SleepdeepR { + SleepdeepR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Send Event on Pending bit:"] #[inline(always)] - pub fn sevonpend(&self) -> SEVONPEND_R { - SEVONPEND_R::new(((self.bits >> 4) & 1) != 0) + pub fn sevonpend(&self) -> SevonpendR { + SevonpendR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 1 - Sleep on Exit"] #[inline(always)] #[must_use] - pub fn sleeponexit(&mut self) -> SLEEPONEXIT_W { - SLEEPONEXIT_W::new(self, 1) + pub fn sleeponexit(&mut self) -> SleeponexitW { + SleeponexitW::new(self, 1) } #[doc = "Bit 2 - Sleep or Deep Sleep"] #[inline(always)] #[must_use] - pub fn sleepdeep(&mut self) -> SLEEPDEEP_W { - SLEEPDEEP_W::new(self, 2) + pub fn sleepdeep(&mut self) -> SleepdeepW { + SleepdeepW::new(self, 2) } #[doc = "Bit 4 - Send Event on Pending bit:"] #[inline(always)] #[must_use] - pub fn sevonpend(&mut self) -> SEVONPEND_W { - SEVONPEND_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sevonpend(&mut self) -> SevonpendW { + SevonpendW::new(self, 4) } } #[doc = "System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SCR_SPEC; -impl crate::RegisterSpec for SCR_SPEC { +pub struct ScrSpec; +impl crate::RegisterSpec for ScrSpec { type Ux = u32; } #[doc = "`read()` method returns [`scr::R`](R) reader structure"] -impl crate::Readable for SCR_SPEC {} +impl crate::Readable for ScrSpec {} #[doc = "`write(|w| ..)` method takes [`scr::W`](W) writer structure"] -impl crate::Writable for SCR_SPEC { +impl crate::Writable for ScrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCR to value 0"] -impl crate::Resettable for SCR_SPEC { +impl crate::Resettable for ScrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shcsr.rs b/src/ppb/shcsr.rs index aeed8d44..994a708b 100644 --- a/src/ppb/shcsr.rs +++ b/src/ppb/shcsr.rs @@ -1,244 +1,235 @@ #[doc = "Register `SHCSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHCSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MEMFAULTACT` reader - MemManage exception active bit"] -pub type MEMFAULTACT_R = crate::BitReader; +pub type MemfaultactR = crate::BitReader; #[doc = "Field `MEMFAULTACT` writer - MemManage exception active bit"] -pub type MEMFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MemfaultactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTACT` reader - BusFault exception active bit"] -pub type BUSFAULTACT_R = crate::BitReader; +pub type BusfaultactR = crate::BitReader; #[doc = "Field `BUSFAULTACT` writer - BusFault exception active bit"] -pub type BUSFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BusfaultactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTACT` reader - UsageFault exception active bit"] -pub type USGFAULTACT_R = crate::BitReader; +pub type UsgfaultactR = crate::BitReader; #[doc = "Field `USGFAULTACT` writer - UsageFault exception active bit"] -pub type USGFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsgfaultactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SVCALLACT` reader - SVCall active bit"] -pub type SVCALLACT_R = crate::BitReader; +pub type SvcallactR = crate::BitReader; #[doc = "Field `SVCALLACT` writer - SVCall active bit"] -pub type SVCALLACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SvcallactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MONITORACT` reader - Debug monitor active bit"] -pub type MONITORACT_R = crate::BitReader; +pub type MonitoractR = crate::BitReader; #[doc = "Field `MONITORACT` writer - Debug monitor active bit"] -pub type MONITORACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MonitoractW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENDSVACT` reader - PendSV exception active bit"] -pub type PENDSVACT_R = crate::BitReader; +pub type PendsvactR = crate::BitReader; #[doc = "Field `PENDSVACT` writer - PendSV exception active bit"] -pub type PENDSVACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PendsvactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSTICKACT` reader - SysTick exception active bit"] -pub type SYSTICKACT_R = crate::BitReader; +pub type SystickactR = crate::BitReader; #[doc = "Field `SYSTICKACT` writer - SysTick exception active bit"] -pub type SYSTICKACT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SystickactW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTPENDED` reader - UsageFault exception pending bit"] -pub type USGFAULTPENDED_R = crate::BitReader; +pub type UsgfaultpendedR = crate::BitReader; #[doc = "Field `USGFAULTPENDED` writer - UsageFault exception pending bit"] -pub type USGFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsgfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MEMFAULTPENDED` reader - MemManage exception pending bit"] -pub type MEMFAULTPENDED_R = crate::BitReader; +pub type MemfaultpendedR = crate::BitReader; #[doc = "Field `MEMFAULTPENDED` writer - MemManage exception pending bit"] -pub type MEMFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MemfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTPENDED` reader - BusFault exception pending bit"] -pub type BUSFAULTPENDED_R = crate::BitReader; +pub type BusfaultpendedR = crate::BitReader; #[doc = "Field `BUSFAULTPENDED` writer - BusFault exception pending bit"] -pub type BUSFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BusfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SVCALLPENDED` reader - SVCall pending bit"] -pub type SVCALLPENDED_R = crate::BitReader; +pub type SvcallpendedR = crate::BitReader; #[doc = "Field `SVCALLPENDED` writer - SVCall pending bit"] -pub type SVCALLPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SvcallpendedW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MEMFAULTENA` reader - MemManage enable bit"] -pub type MEMFAULTENA_R = crate::BitReader; +pub type MemfaultenaR = crate::BitReader; #[doc = "Field `MEMFAULTENA` writer - MemManage enable bit"] -pub type MEMFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MemfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTENA` reader - BusFault enable bit"] -pub type BUSFAULTENA_R = crate::BitReader; +pub type BusfaultenaR = crate::BitReader; #[doc = "Field `BUSFAULTENA` writer - BusFault enable bit"] -pub type BUSFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BusfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTENA` reader - UsageFault enable bit"] -pub type USGFAULTENA_R = crate::BitReader; +pub type UsgfaultenaR = crate::BitReader; #[doc = "Field `USGFAULTENA` writer - UsageFault enable bit"] -pub type USGFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsgfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - MemManage exception active bit"] #[inline(always)] - pub fn memfaultact(&self) -> MEMFAULTACT_R { - MEMFAULTACT_R::new((self.bits & 1) != 0) + pub fn memfaultact(&self) -> MemfaultactR { + MemfaultactR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - BusFault exception active bit"] #[inline(always)] - pub fn busfaultact(&self) -> BUSFAULTACT_R { - BUSFAULTACT_R::new(((self.bits >> 1) & 1) != 0) + pub fn busfaultact(&self) -> BusfaultactR { + BusfaultactR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - UsageFault exception active bit"] #[inline(always)] - pub fn usgfaultact(&self) -> USGFAULTACT_R { - USGFAULTACT_R::new(((self.bits >> 3) & 1) != 0) + pub fn usgfaultact(&self) -> UsgfaultactR { + UsgfaultactR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - SVCall active bit"] #[inline(always)] - pub fn svcallact(&self) -> SVCALLACT_R { - SVCALLACT_R::new(((self.bits >> 7) & 1) != 0) + pub fn svcallact(&self) -> SvcallactR { + SvcallactR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Debug monitor active bit"] #[inline(always)] - pub fn monitoract(&self) -> MONITORACT_R { - MONITORACT_R::new(((self.bits >> 8) & 1) != 0) + pub fn monitoract(&self) -> MonitoractR { + MonitoractR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - PendSV exception active bit"] #[inline(always)] - pub fn pendsvact(&self) -> PENDSVACT_R { - PENDSVACT_R::new(((self.bits >> 10) & 1) != 0) + pub fn pendsvact(&self) -> PendsvactR { + PendsvactR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SysTick exception active bit"] #[inline(always)] - pub fn systickact(&self) -> SYSTICKACT_R { - SYSTICKACT_R::new(((self.bits >> 11) & 1) != 0) + pub fn systickact(&self) -> SystickactR { + SystickactR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - UsageFault exception pending bit"] #[inline(always)] - pub fn usgfaultpended(&self) -> USGFAULTPENDED_R { - USGFAULTPENDED_R::new(((self.bits >> 12) & 1) != 0) + pub fn usgfaultpended(&self) -> UsgfaultpendedR { + UsgfaultpendedR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MemManage exception pending bit"] #[inline(always)] - pub fn memfaultpended(&self) -> MEMFAULTPENDED_R { - MEMFAULTPENDED_R::new(((self.bits >> 13) & 1) != 0) + pub fn memfaultpended(&self) -> MemfaultpendedR { + MemfaultpendedR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - BusFault exception pending bit"] #[inline(always)] - pub fn busfaultpended(&self) -> BUSFAULTPENDED_R { - BUSFAULTPENDED_R::new(((self.bits >> 14) & 1) != 0) + pub fn busfaultpended(&self) -> BusfaultpendedR { + BusfaultpendedR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SVCall pending bit"] #[inline(always)] - pub fn svcallpended(&self) -> SVCALLPENDED_R { - SVCALLPENDED_R::new(((self.bits >> 15) & 1) != 0) + pub fn svcallpended(&self) -> SvcallpendedR { + SvcallpendedR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MemManage enable bit"] #[inline(always)] - pub fn memfaultena(&self) -> MEMFAULTENA_R { - MEMFAULTENA_R::new(((self.bits >> 16) & 1) != 0) + pub fn memfaultena(&self) -> MemfaultenaR { + MemfaultenaR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BusFault enable bit"] #[inline(always)] - pub fn busfaultena(&self) -> BUSFAULTENA_R { - BUSFAULTENA_R::new(((self.bits >> 17) & 1) != 0) + pub fn busfaultena(&self) -> BusfaultenaR { + BusfaultenaR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - UsageFault enable bit"] #[inline(always)] - pub fn usgfaultena(&self) -> USGFAULTENA_R { - USGFAULTENA_R::new(((self.bits >> 18) & 1) != 0) + pub fn usgfaultena(&self) -> UsgfaultenaR { + UsgfaultenaR::new(((self.bits >> 18) & 1) != 0) } } impl W { #[doc = "Bit 0 - MemManage exception active bit"] #[inline(always)] #[must_use] - pub fn memfaultact(&mut self) -> MEMFAULTACT_W { - MEMFAULTACT_W::new(self, 0) + pub fn memfaultact(&mut self) -> MemfaultactW { + MemfaultactW::new(self, 0) } #[doc = "Bit 1 - BusFault exception active bit"] #[inline(always)] #[must_use] - pub fn busfaultact(&mut self) -> BUSFAULTACT_W { - BUSFAULTACT_W::new(self, 1) + pub fn busfaultact(&mut self) -> BusfaultactW { + BusfaultactW::new(self, 1) } #[doc = "Bit 3 - UsageFault exception active bit"] #[inline(always)] #[must_use] - pub fn usgfaultact(&mut self) -> USGFAULTACT_W { - USGFAULTACT_W::new(self, 3) + pub fn usgfaultact(&mut self) -> UsgfaultactW { + UsgfaultactW::new(self, 3) } #[doc = "Bit 7 - SVCall active bit"] #[inline(always)] #[must_use] - pub fn svcallact(&mut self) -> SVCALLACT_W { - SVCALLACT_W::new(self, 7) + pub fn svcallact(&mut self) -> SvcallactW { + SvcallactW::new(self, 7) } #[doc = "Bit 8 - Debug monitor active bit"] #[inline(always)] #[must_use] - pub fn monitoract(&mut self) -> MONITORACT_W { - MONITORACT_W::new(self, 8) + pub fn monitoract(&mut self) -> MonitoractW { + MonitoractW::new(self, 8) } #[doc = "Bit 10 - PendSV exception active bit"] #[inline(always)] #[must_use] - pub fn pendsvact(&mut self) -> PENDSVACT_W { - PENDSVACT_W::new(self, 10) + pub fn pendsvact(&mut self) -> PendsvactW { + PendsvactW::new(self, 10) } #[doc = "Bit 11 - SysTick exception active bit"] #[inline(always)] #[must_use] - pub fn systickact(&mut self) -> SYSTICKACT_W { - SYSTICKACT_W::new(self, 11) + pub fn systickact(&mut self) -> SystickactW { + SystickactW::new(self, 11) } #[doc = "Bit 12 - UsageFault exception pending bit"] #[inline(always)] #[must_use] - pub fn usgfaultpended(&mut self) -> USGFAULTPENDED_W { - USGFAULTPENDED_W::new(self, 12) + pub fn usgfaultpended(&mut self) -> UsgfaultpendedW { + UsgfaultpendedW::new(self, 12) } #[doc = "Bit 13 - MemManage exception pending bit"] #[inline(always)] #[must_use] - pub fn memfaultpended(&mut self) -> MEMFAULTPENDED_W { - MEMFAULTPENDED_W::new(self, 13) + pub fn memfaultpended(&mut self) -> MemfaultpendedW { + MemfaultpendedW::new(self, 13) } #[doc = "Bit 14 - BusFault exception pending bit"] #[inline(always)] #[must_use] - pub fn busfaultpended(&mut self) -> BUSFAULTPENDED_W { - BUSFAULTPENDED_W::new(self, 14) + pub fn busfaultpended(&mut self) -> BusfaultpendedW { + BusfaultpendedW::new(self, 14) } #[doc = "Bit 15 - SVCall pending bit"] #[inline(always)] #[must_use] - pub fn svcallpended(&mut self) -> SVCALLPENDED_W { - SVCALLPENDED_W::new(self, 15) + pub fn svcallpended(&mut self) -> SvcallpendedW { + SvcallpendedW::new(self, 15) } #[doc = "Bit 16 - MemManage enable bit"] #[inline(always)] #[must_use] - pub fn memfaultena(&mut self) -> MEMFAULTENA_W { - MEMFAULTENA_W::new(self, 16) + pub fn memfaultena(&mut self) -> MemfaultenaW { + MemfaultenaW::new(self, 16) } #[doc = "Bit 17 - BusFault enable bit"] #[inline(always)] #[must_use] - pub fn busfaultena(&mut self) -> BUSFAULTENA_W { - BUSFAULTENA_W::new(self, 17) + pub fn busfaultena(&mut self) -> BusfaultenaW { + BusfaultenaW::new(self, 17) } #[doc = "Bit 18 - UsageFault enable bit"] #[inline(always)] #[must_use] - pub fn usgfaultena(&mut self) -> USGFAULTENA_W { - USGFAULTENA_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn usgfaultena(&mut self) -> UsgfaultenaW { + UsgfaultenaW::new(self, 18) } } #[doc = "System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SHCSR_SPEC; -impl crate::RegisterSpec for SHCSR_SPEC { +pub struct ShcsrSpec; +impl crate::RegisterSpec for ShcsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`shcsr::R`](R) reader structure"] -impl crate::Readable for SHCSR_SPEC {} +impl crate::Readable for ShcsrSpec {} #[doc = "`write(|w| ..)` method takes [`shcsr::W`](W) writer structure"] -impl crate::Writable for SHCSR_SPEC { +impl crate::Writable for ShcsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHCSR to value 0"] -impl crate::Resettable for SHCSR_SPEC { +impl crate::Resettable for ShcsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr1.rs b/src/ppb/shpr1.rs index c22a3ea5..218cb241 100644 --- a/src/ppb/shpr1.rs +++ b/src/ppb/shpr1.rs @@ -1,79 +1,70 @@ #[doc = "Register `SHPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_4` reader - Priority of system handler 4, MemManage"] -pub type PRI_4_R = crate::FieldReader; +pub type Pri4R = crate::FieldReader; #[doc = "Field `PRI_4` writer - Priority of system handler 4, MemManage"] -pub type PRI_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_5` reader - Priority of system handler 5, BusFault"] -pub type PRI_5_R = crate::FieldReader; +pub type Pri5R = crate::FieldReader; #[doc = "Field `PRI_5` writer - Priority of system handler 5, BusFault"] -pub type PRI_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_6` reader - Priority of system handler 6, UsageFault"] -pub type PRI_6_R = crate::FieldReader; +pub type Pri6R = crate::FieldReader; #[doc = "Field `PRI_6` writer - Priority of system handler 6, UsageFault"] -pub type PRI_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"] #[inline(always)] - pub fn pri_4(&self) -> PRI_4_R { - PRI_4_R::new((self.bits & 0xff) as u8) + pub fn pri_4(&self) -> Pri4R { + Pri4R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"] #[inline(always)] - pub fn pri_5(&self) -> PRI_5_R { - PRI_5_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_5(&self) -> Pri5R { + Pri5R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"] #[inline(always)] - pub fn pri_6(&self) -> PRI_6_R { - PRI_6_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_6(&self) -> Pri6R { + Pri6R::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"] #[inline(always)] #[must_use] - pub fn pri_4(&mut self) -> PRI_4_W { - PRI_4_W::new(self, 0) + pub fn pri_4(&mut self) -> Pri4W { + Pri4W::new(self, 0) } #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"] #[inline(always)] #[must_use] - pub fn pri_5(&mut self) -> PRI_5_W { - PRI_5_W::new(self, 8) + pub fn pri_5(&mut self) -> Pri5W { + Pri5W::new(self, 8) } #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"] #[inline(always)] #[must_use] - pub fn pri_6(&mut self) -> PRI_6_W { - PRI_6_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_6(&mut self) -> Pri6W { + Pri6W::new(self, 16) } } #[doc = "System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SHPR1_SPEC; -impl crate::RegisterSpec for SHPR1_SPEC { +pub struct Shpr1Spec; +impl crate::RegisterSpec for Shpr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`shpr1::R`](R) reader structure"] -impl crate::Readable for SHPR1_SPEC {} +impl crate::Readable for Shpr1Spec {} #[doc = "`write(|w| ..)` method takes [`shpr1::W`](W) writer structure"] -impl crate::Writable for SHPR1_SPEC { +impl crate::Writable for Shpr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR1 to value 0"] -impl crate::Resettable for SHPR1_SPEC { +impl crate::Resettable for Shpr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr2.rs b/src/ppb/shpr2.rs index 51dbe02f..9df98516 100644 --- a/src/ppb/shpr2.rs +++ b/src/ppb/shpr2.rs @@ -1,49 +1,40 @@ #[doc = "Register `SHPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_11` reader - Priority of system handler 11, SVCall"] -pub type PRI_11_R = crate::FieldReader; +pub type Pri11R = crate::FieldReader; #[doc = "Field `PRI_11` writer - Priority of system handler 11, SVCall"] -pub type PRI_11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri11W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"] #[inline(always)] - pub fn pri_11(&self) -> PRI_11_R { - PRI_11_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_11(&self) -> Pri11R { + Pri11R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"] #[inline(always)] #[must_use] - pub fn pri_11(&mut self) -> PRI_11_W { - PRI_11_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_11(&mut self) -> Pri11W { + Pri11W::new(self, 24) } } #[doc = "System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SHPR2_SPEC; -impl crate::RegisterSpec for SHPR2_SPEC { +pub struct Shpr2Spec; +impl crate::RegisterSpec for Shpr2Spec { type Ux = u32; } #[doc = "`read()` method returns [`shpr2::R`](R) reader structure"] -impl crate::Readable for SHPR2_SPEC {} +impl crate::Readable for Shpr2Spec {} #[doc = "`write(|w| ..)` method takes [`shpr2::W`](W) writer structure"] -impl crate::Writable for SHPR2_SPEC { +impl crate::Writable for Shpr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR2 to value 0"] -impl crate::Resettable for SHPR2_SPEC { +impl crate::Resettable for Shpr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr3.rs b/src/ppb/shpr3.rs index 5e1bb90e..e1faf7cd 100644 --- a/src/ppb/shpr3.rs +++ b/src/ppb/shpr3.rs @@ -1,64 +1,55 @@ #[doc = "Register `SHPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_14` reader - Priority of system handler 14"] -pub type PRI_14_R = crate::FieldReader; +pub type Pri14R = crate::FieldReader; #[doc = "Field `PRI_14` writer - Priority of system handler 14"] -pub type PRI_14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri14W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_15` reader - Priority of system handler 15"] -pub type PRI_15_R = crate::FieldReader; +pub type Pri15R = crate::FieldReader; #[doc = "Field `PRI_15` writer - Priority of system handler 15"] -pub type PRI_15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type Pri15W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 16:23 - Priority of system handler 14"] #[inline(always)] - pub fn pri_14(&self) -> PRI_14_R { - PRI_14_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_14(&self) -> Pri14R { + Pri14R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority of system handler 15"] #[inline(always)] - pub fn pri_15(&self) -> PRI_15_R { - PRI_15_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_15(&self) -> Pri15R { + Pri15R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 16:23 - Priority of system handler 14"] #[inline(always)] #[must_use] - pub fn pri_14(&mut self) -> PRI_14_W { - PRI_14_W::new(self, 16) + pub fn pri_14(&mut self) -> Pri14W { + Pri14W::new(self, 16) } #[doc = "Bits 24:31 - Priority of system handler 15"] #[inline(always)] #[must_use] - pub fn pri_15(&mut self) -> PRI_15_W { - PRI_15_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pri_15(&mut self) -> Pri15W { + Pri15W::new(self, 24) } } #[doc = "System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SHPR3_SPEC; -impl crate::RegisterSpec for SHPR3_SPEC { +pub struct Shpr3Spec; +impl crate::RegisterSpec for Shpr3Spec { type Ux = u32; } #[doc = "`read()` method returns [`shpr3::R`](R) reader structure"] -impl crate::Readable for SHPR3_SPEC {} +impl crate::Readable for Shpr3Spec {} #[doc = "`write(|w| ..)` method takes [`shpr3::W`](W) writer structure"] -impl crate::Writable for SHPR3_SPEC { +impl crate::Writable for Shpr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR3 to value 0"] -impl crate::Resettable for SHPR3_SPEC { +impl crate::Resettable for Shpr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/stir.rs b/src/ppb/stir.rs index 79e36ed1..21115520 100644 --- a/src/ppb/stir.rs +++ b/src/ppb/stir.rs @@ -1,36 +1,27 @@ #[doc = "Register `STIR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INTID` writer - Interrupt ID of the interrupt to trigger"] -pub type INTID_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +pub type IntidW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl W { #[doc = "Bits 0:8 - Interrupt ID of the interrupt to trigger"] #[inline(always)] #[must_use] - pub fn intid(&mut self) -> INTID_W { - INTID_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn intid(&mut self) -> IntidW { + IntidW::new(self, 0) } } #[doc = "Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STIR_SPEC; -impl crate::RegisterSpec for STIR_SPEC { +pub struct StirSpec; +impl crate::RegisterSpec for StirSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`stir::W`](W) writer structure"] -impl crate::Writable for STIR_SPEC { +impl crate::Writable for StirSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STIR to value 0"] -impl crate::Resettable for STIR_SPEC { +impl crate::Resettable for StirSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/syst_calib.rs b/src/ppb/syst_calib.rs index fc2b480a..087972d7 100644 --- a/src/ppb/syst_calib.rs +++ b/src/ppb/syst_calib.rs @@ -1,177 +1,168 @@ #[doc = "Register `SYST_CALIB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CALIB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TENMS` reader - Ten Milliseconds Reload Value"] -pub type TENMS_R = crate::FieldReader; +pub type TenmsR = crate::FieldReader; #[doc = "Field `TENMS` writer - Ten Milliseconds Reload Value"] -pub type TENMS_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; -#[doc = "Field `SKEW` reader - Ten Milliseconds Skewed"] -pub type SKEW_R = crate::BitReader; +pub type TenmsW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; #[doc = "Ten Milliseconds Skewed\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SKEW_A { +pub enum Skew { #[doc = "0: TENMS value is exact"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TENMS value is inexact, or not given."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SKEW_A) -> Self { + fn from(variant: Skew) -> Self { variant as u8 != 0 } } -impl SKEW_R { +#[doc = "Field `SKEW` reader - Ten Milliseconds Skewed"] +pub type SkewR = crate::BitReader; +impl SkewR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SKEW_A { + pub const fn variant(&self) -> Skew { match self.bits { - false => SKEW_A::VALUE1, - true => SKEW_A::VALUE2, + false => Skew::Value1, + true => Skew::Value2, } } #[doc = "TENMS value is exact"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SKEW_A::VALUE1 + *self == Skew::Value1 } #[doc = "TENMS value is inexact, or not given."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SKEW_A::VALUE2 + *self == Skew::Value2 } } #[doc = "Field `SKEW` writer - Ten Milliseconds Skewed"] -pub type SKEW_W<'a, REG> = crate::BitWriter<'a, REG, SKEW_A>; -impl<'a, REG> SKEW_W<'a, REG> +pub type SkewW<'a, REG> = crate::BitWriter<'a, REG, Skew>; +impl<'a, REG> SkewW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TENMS value is exact"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SKEW_A::VALUE1) + self.variant(Skew::Value1) } #[doc = "TENMS value is inexact, or not given."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SKEW_A::VALUE2) + self.variant(Skew::Value2) } } -#[doc = "Field `NOREF` reader - No Reference Clock"] -pub type NOREF_R = crate::BitReader; #[doc = "No Reference Clock\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NOREF_A { +pub enum Noref { #[doc = "0: reference clock provided"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: no reference clock provided."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NOREF_A) -> Self { + fn from(variant: Noref) -> Self { variant as u8 != 0 } } -impl NOREF_R { +#[doc = "Field `NOREF` reader - No Reference Clock"] +pub type NorefR = crate::BitReader; +impl NorefR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NOREF_A { + pub const fn variant(&self) -> Noref { match self.bits { - false => NOREF_A::VALUE1, - true => NOREF_A::VALUE2, + false => Noref::Value1, + true => Noref::Value2, } } #[doc = "reference clock provided"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NOREF_A::VALUE1 + *self == Noref::Value1 } #[doc = "no reference clock provided."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NOREF_A::VALUE2 + *self == Noref::Value2 } } #[doc = "Field `NOREF` writer - No Reference Clock"] -pub type NOREF_W<'a, REG> = crate::BitWriter<'a, REG, NOREF_A>; -impl<'a, REG> NOREF_W<'a, REG> +pub type NorefW<'a, REG> = crate::BitWriter<'a, REG, Noref>; +impl<'a, REG> NorefW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "reference clock provided"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NOREF_A::VALUE1) + self.variant(Noref::Value1) } #[doc = "no reference clock provided."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NOREF_A::VALUE2) + self.variant(Noref::Value2) } } impl R { #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"] #[inline(always)] - pub fn tenms(&self) -> TENMS_R { - TENMS_R::new(self.bits & 0x00ff_ffff) + pub fn tenms(&self) -> TenmsR { + TenmsR::new(self.bits & 0x00ff_ffff) } #[doc = "Bit 30 - Ten Milliseconds Skewed"] #[inline(always)] - pub fn skew(&self) -> SKEW_R { - SKEW_R::new(((self.bits >> 30) & 1) != 0) + pub fn skew(&self) -> SkewR { + SkewR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - No Reference Clock"] #[inline(always)] - pub fn noref(&self) -> NOREF_R { - NOREF_R::new(((self.bits >> 31) & 1) != 0) + pub fn noref(&self) -> NorefR { + NorefR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"] #[inline(always)] #[must_use] - pub fn tenms(&mut self) -> TENMS_W { - TENMS_W::new(self, 0) + pub fn tenms(&mut self) -> TenmsW { + TenmsW::new(self, 0) } #[doc = "Bit 30 - Ten Milliseconds Skewed"] #[inline(always)] #[must_use] - pub fn skew(&mut self) -> SKEW_W { - SKEW_W::new(self, 30) + pub fn skew(&mut self) -> SkewW { + SkewW::new(self, 30) } #[doc = "Bit 31 - No Reference Clock"] #[inline(always)] #[must_use] - pub fn noref(&mut self) -> NOREF_W { - NOREF_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn noref(&mut self) -> NorefW { + NorefW::new(self, 31) } } #[doc = "SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYST_CALIB_SPEC; -impl crate::RegisterSpec for SYST_CALIB_SPEC { +pub struct SystCalibSpec; +impl crate::RegisterSpec for SystCalibSpec { type Ux = u32; } #[doc = "`read()` method returns [`syst_calib::R`](R) reader structure"] -impl crate::Readable for SYST_CALIB_SPEC {} +impl crate::Readable for SystCalibSpec {} #[doc = "`write(|w| ..)` method takes [`syst_calib::W`](W) writer structure"] -impl crate::Writable for SYST_CALIB_SPEC { +impl crate::Writable for SystCalibSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CALIB to value 0xc000_0000"] -impl crate::Resettable for SYST_CALIB_SPEC { +impl crate::Resettable for SystCalibSpec { const RESET_VALUE: u32 = 0xc000_0000; } diff --git a/src/ppb/syst_csr.rs b/src/ppb/syst_csr.rs index 28556f36..a2d70674 100644 --- a/src/ppb/syst_csr.rs +++ b/src/ppb/syst_csr.rs @@ -1,241 +1,232 @@ #[doc = "Register `SYST_CSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CSR` writer"] -pub type W = crate::W; -#[doc = "Field `ENABLE` reader - Enable"] -pub type ENABLE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENABLE_A { +pub enum Enable { #[doc = "0: counter disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: counter enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENABLE_A) -> Self { + fn from(variant: Enable) -> Self { variant as u8 != 0 } } -impl ENABLE_R { +#[doc = "Field `ENABLE` reader - Enable"] +pub type EnableR = crate::BitReader; +impl EnableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENABLE_A { + pub const fn variant(&self) -> Enable { match self.bits { - false => ENABLE_A::VALUE1, - true => ENABLE_A::VALUE2, + false => Enable::Value1, + true => Enable::Value2, } } #[doc = "counter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENABLE_A::VALUE1 + *self == Enable::Value1 } #[doc = "counter enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENABLE_A::VALUE2 + *self == Enable::Value2 } } #[doc = "Field `ENABLE` writer - Enable"] -pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, ENABLE_A>; -impl<'a, REG> ENABLE_W<'a, REG> +pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>; +impl<'a, REG> EnableW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "counter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENABLE_A::VALUE1) + self.variant(Enable::Value1) } #[doc = "counter enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENABLE_A::VALUE2) + self.variant(Enable::Value2) } } -#[doc = "Field `TICKINT` reader - Tick Interrupt Enable"] -pub type TICKINT_R = crate::BitReader; #[doc = "Tick Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TICKINT_A { +pub enum Tickint { #[doc = "0: counting down to zero does not assert the SysTick exception request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: counting down to zero to asserts the SysTick exception request."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TICKINT_A) -> Self { + fn from(variant: Tickint) -> Self { variant as u8 != 0 } } -impl TICKINT_R { +#[doc = "Field `TICKINT` reader - Tick Interrupt Enable"] +pub type TickintR = crate::BitReader; +impl TickintR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TICKINT_A { + pub const fn variant(&self) -> Tickint { match self.bits { - false => TICKINT_A::VALUE1, - true => TICKINT_A::VALUE2, + false => Tickint::Value1, + true => Tickint::Value2, } } #[doc = "counting down to zero does not assert the SysTick exception request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TICKINT_A::VALUE1 + *self == Tickint::Value1 } #[doc = "counting down to zero to asserts the SysTick exception request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TICKINT_A::VALUE2 + *self == Tickint::Value2 } } #[doc = "Field `TICKINT` writer - Tick Interrupt Enable"] -pub type TICKINT_W<'a, REG> = crate::BitWriter<'a, REG, TICKINT_A>; -impl<'a, REG> TICKINT_W<'a, REG> +pub type TickintW<'a, REG> = crate::BitWriter<'a, REG, Tickint>; +impl<'a, REG> TickintW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "counting down to zero does not assert the SysTick exception request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TICKINT_A::VALUE1) + self.variant(Tickint::Value1) } #[doc = "counting down to zero to asserts the SysTick exception request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TICKINT_A::VALUE2) + self.variant(Tickint::Value2) } } -#[doc = "Field `CLKSOURCE` reader - Indicates the clock source:"] -pub type CLKSOURCE_R = crate::BitReader; #[doc = "Indicates the clock source:\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLKSOURCE_A { +pub enum Clksource { #[doc = "0: external clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: processor clock."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLKSOURCE_A) -> Self { + fn from(variant: Clksource) -> Self { variant as u8 != 0 } } -impl CLKSOURCE_R { +#[doc = "Field `CLKSOURCE` reader - Indicates the clock source:"] +pub type ClksourceR = crate::BitReader; +impl ClksourceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CLKSOURCE_A { + pub const fn variant(&self) -> Clksource { match self.bits { - false => CLKSOURCE_A::VALUE1, - true => CLKSOURCE_A::VALUE2, + false => Clksource::Value1, + true => Clksource::Value2, } } #[doc = "external clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKSOURCE_A::VALUE1 + *self == Clksource::Value1 } #[doc = "processor clock."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CLKSOURCE_A::VALUE2 + *self == Clksource::Value2 } } #[doc = "Field `CLKSOURCE` writer - Indicates the clock source:"] -pub type CLKSOURCE_W<'a, REG> = crate::BitWriter<'a, REG, CLKSOURCE_A>; -impl<'a, REG> CLKSOURCE_W<'a, REG> +pub type ClksourceW<'a, REG> = crate::BitWriter<'a, REG, Clksource>; +impl<'a, REG> ClksourceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "external clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLKSOURCE_A::VALUE1) + self.variant(Clksource::Value1) } #[doc = "processor clock."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLKSOURCE_A::VALUE2) + self.variant(Clksource::Value2) } } #[doc = "Field `COUNTFLAG` reader - Counter Flag"] -pub type COUNTFLAG_R = crate::BitReader; +pub type CountflagR = crate::BitReader; #[doc = "Field `COUNTFLAG` writer - Counter Flag"] -pub type COUNTFLAG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CountflagW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new((self.bits & 1) != 0) + pub fn enable(&self) -> EnableR { + EnableR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Tick Interrupt Enable"] #[inline(always)] - pub fn tickint(&self) -> TICKINT_R { - TICKINT_R::new(((self.bits >> 1) & 1) != 0) + pub fn tickint(&self) -> TickintR { + TickintR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Indicates the clock source:"] #[inline(always)] - pub fn clksource(&self) -> CLKSOURCE_R { - CLKSOURCE_R::new(((self.bits >> 2) & 1) != 0) + pub fn clksource(&self) -> ClksourceR { + ClksourceR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Counter Flag"] #[inline(always)] - pub fn countflag(&self) -> COUNTFLAG_R { - COUNTFLAG_R::new(((self.bits >> 16) & 1) != 0) + pub fn countflag(&self) -> CountflagR { + CountflagR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W::new(self, 0) + pub fn enable(&mut self) -> EnableW { + EnableW::new(self, 0) } #[doc = "Bit 1 - Tick Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tickint(&mut self) -> TICKINT_W { - TICKINT_W::new(self, 1) + pub fn tickint(&mut self) -> TickintW { + TickintW::new(self, 1) } #[doc = "Bit 2 - Indicates the clock source:"] #[inline(always)] #[must_use] - pub fn clksource(&mut self) -> CLKSOURCE_W { - CLKSOURCE_W::new(self, 2) + pub fn clksource(&mut self) -> ClksourceW { + ClksourceW::new(self, 2) } #[doc = "Bit 16 - Counter Flag"] #[inline(always)] #[must_use] - pub fn countflag(&mut self) -> COUNTFLAG_W { - COUNTFLAG_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn countflag(&mut self) -> CountflagW { + CountflagW::new(self, 16) } } #[doc = "SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYST_CSR_SPEC; -impl crate::RegisterSpec for SYST_CSR_SPEC { +pub struct SystCsrSpec; +impl crate::RegisterSpec for SystCsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`syst_csr::R`](R) reader structure"] -impl crate::Readable for SYST_CSR_SPEC {} +impl crate::Readable for SystCsrSpec {} #[doc = "`write(|w| ..)` method takes [`syst_csr::W`](W) writer structure"] -impl crate::Writable for SYST_CSR_SPEC { +impl crate::Writable for SystCsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CSR to value 0x04"] -impl crate::Resettable for SYST_CSR_SPEC { +impl crate::Resettable for SystCsrSpec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/ppb/syst_cvr.rs b/src/ppb/syst_cvr.rs index 6031e19a..2f3ac473 100644 --- a/src/ppb/syst_cvr.rs +++ b/src/ppb/syst_cvr.rs @@ -1,49 +1,40 @@ #[doc = "Register `SYST_CVR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CVR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CURRENT` reader - Current Value"] -pub type CURRENT_R = crate::FieldReader; +pub type CurrentR = crate::FieldReader; #[doc = "Field `CURRENT` writer - Current Value"] -pub type CURRENT_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; +pub type CurrentW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Current Value"] #[inline(always)] - pub fn current(&self) -> CURRENT_R { - CURRENT_R::new(self.bits & 0x00ff_ffff) + pub fn current(&self) -> CurrentR { + CurrentR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Current Value"] #[inline(always)] #[must_use] - pub fn current(&mut self) -> CURRENT_W { - CURRENT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn current(&mut self) -> CurrentW { + CurrentW::new(self, 0) } } #[doc = "SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYST_CVR_SPEC; -impl crate::RegisterSpec for SYST_CVR_SPEC { +pub struct SystCvrSpec; +impl crate::RegisterSpec for SystCvrSpec { type Ux = u32; } #[doc = "`read()` method returns [`syst_cvr::R`](R) reader structure"] -impl crate::Readable for SYST_CVR_SPEC {} +impl crate::Readable for SystCvrSpec {} #[doc = "`write(|w| ..)` method takes [`syst_cvr::W`](W) writer structure"] -impl crate::Writable for SYST_CVR_SPEC { +impl crate::Writable for SystCvrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CVR to value 0"] -impl crate::Resettable for SYST_CVR_SPEC { +impl crate::Resettable for SystCvrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/syst_rvr.rs b/src/ppb/syst_rvr.rs index a7a39206..07b2cb80 100644 --- a/src/ppb/syst_rvr.rs +++ b/src/ppb/syst_rvr.rs @@ -1,49 +1,40 @@ #[doc = "Register `SYST_RVR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_RVR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RELOAD` reader - Reload Value"] -pub type RELOAD_R = crate::FieldReader; +pub type ReloadR = crate::FieldReader; #[doc = "Field `RELOAD` writer - Reload Value"] -pub type RELOAD_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; +pub type ReloadW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Reload Value"] #[inline(always)] - pub fn reload(&self) -> RELOAD_R { - RELOAD_R::new(self.bits & 0x00ff_ffff) + pub fn reload(&self) -> ReloadR { + ReloadR::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Reload Value"] #[inline(always)] #[must_use] - pub fn reload(&mut self) -> RELOAD_W { - RELOAD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn reload(&mut self) -> ReloadW { + ReloadW::new(self, 0) } } #[doc = "SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYST_RVR_SPEC; -impl crate::RegisterSpec for SYST_RVR_SPEC { +pub struct SystRvrSpec; +impl crate::RegisterSpec for SystRvrSpec { type Ux = u32; } #[doc = "`read()` method returns [`syst_rvr::R`](R) reader structure"] -impl crate::Readable for SYST_RVR_SPEC {} +impl crate::Readable for SystRvrSpec {} #[doc = "`write(|w| ..)` method takes [`syst_rvr::W`](W) writer structure"] -impl crate::Writable for SYST_RVR_SPEC { +impl crate::Writable for SystRvrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_RVR to value 0"] -impl crate::Resettable for SYST_RVR_SPEC { +impl crate::Resettable for SystRvrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/vtor.rs b/src/ppb/vtor.rs index 6d18fc18..ec4eb64b 100644 --- a/src/ppb/vtor.rs +++ b/src/ppb/vtor.rs @@ -1,49 +1,40 @@ #[doc = "Register `VTOR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `VTOR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TBLOFF` reader - Vector table base offset field"] -pub type TBLOFF_R = crate::FieldReader; +pub type TbloffR = crate::FieldReader; #[doc = "Field `TBLOFF` writer - Vector table base offset field"] -pub type TBLOFF_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +pub type TbloffW<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { #[doc = "Bits 10:31 - Vector table base offset field"] #[inline(always)] - pub fn tbloff(&self) -> TBLOFF_R { - TBLOFF_R::new((self.bits >> 10) & 0x003f_ffff) + pub fn tbloff(&self) -> TbloffR { + TbloffR::new((self.bits >> 10) & 0x003f_ffff) } } impl W { #[doc = "Bits 10:31 - Vector table base offset field"] #[inline(always)] #[must_use] - pub fn tbloff(&mut self) -> TBLOFF_W { - TBLOFF_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tbloff(&mut self) -> TbloffW { + TbloffW::new(self, 10) } } #[doc = "Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VTOR_SPEC; -impl crate::RegisterSpec for VTOR_SPEC { +pub struct VtorSpec; +impl crate::RegisterSpec for VtorSpec { type Ux = u32; } #[doc = "`read()` method returns [`vtor::R`](R) reader structure"] -impl crate::Readable for VTOR_SPEC {} +impl crate::Readable for VtorSpec {} #[doc = "`write(|w| ..)` method takes [`vtor::W`](W) writer structure"] -impl crate::Writable for VTOR_SPEC { +impl crate::Writable for VtorSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VTOR to value 0"] -impl crate::Resettable for VTOR_SPEC { +impl crate::Resettable for VtorSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/pref.rs b/src/pref.rs index 0793aca6..e64d0c24 100644 --- a/src/pref.rs +++ b/src/pref.rs @@ -1,17 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - pcon: PCON, + pcon: Pcon, } impl RegisterBlock { #[doc = "0x00 - Prefetch Configuration Register"] #[inline(always)] - pub const fn pcon(&self) -> &PCON { + pub const fn pcon(&self) -> &Pcon { &self.pcon } } #[doc = "PCON (rw) register accessor: Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcon`] module"] -pub type PCON = crate::Reg; +#[doc(alias = "PCON")] +pub type Pcon = crate::Reg; #[doc = "Prefetch Configuration Register"] pub mod pcon; diff --git a/src/pref/pcon.rs b/src/pref/pcon.rs index 186f425e..5fadf3e9 100644 --- a/src/pref/pcon.rs +++ b/src/pref/pcon.rs @@ -1,199 +1,190 @@ #[doc = "Register `PCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCON` writer"] -pub type W = crate::W; -#[doc = "Field `IBYP` reader - Instruction Prefetch Buffer Bypass"] -pub type IBYP_R = crate::BitReader; +pub type W = crate::W; #[doc = "Instruction Prefetch Buffer Bypass\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IBYP_A { +pub enum Ibyp { #[doc = "0: Instruction prefetch buffer not bypassed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Instruction prefetch buffer bypassed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IBYP_A) -> Self { + fn from(variant: Ibyp) -> Self { variant as u8 != 0 } } -impl IBYP_R { +#[doc = "Field `IBYP` reader - Instruction Prefetch Buffer Bypass"] +pub type IbypR = crate::BitReader; +impl IbypR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IBYP_A { + pub const fn variant(&self) -> Ibyp { match self.bits { - false => IBYP_A::VALUE1, - true => IBYP_A::VALUE2, + false => Ibyp::Value1, + true => Ibyp::Value2, } } #[doc = "Instruction prefetch buffer not bypassed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IBYP_A::VALUE1 + *self == Ibyp::Value1 } #[doc = "Instruction prefetch buffer bypassed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IBYP_A::VALUE2 + *self == Ibyp::Value2 } } #[doc = "Field `IBYP` writer - Instruction Prefetch Buffer Bypass"] -pub type IBYP_W<'a, REG> = crate::BitWriter<'a, REG, IBYP_A>; -impl<'a, REG> IBYP_W<'a, REG> +pub type IbypW<'a, REG> = crate::BitWriter<'a, REG, Ibyp>; +impl<'a, REG> IbypW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Instruction prefetch buffer not bypassed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IBYP_A::VALUE1) + self.variant(Ibyp::Value1) } #[doc = "Instruction prefetch buffer bypassed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IBYP_A::VALUE2) + self.variant(Ibyp::Value2) } } #[doc = "Instruction Prefetch Buffer Invalidate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IINV_AW { +pub enum Iinv { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Initiate invalidation of entire instruction cache."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IINV_AW) -> Self { + fn from(variant: Iinv) -> Self { variant as u8 != 0 } } #[doc = "Field `IINV` writer - Instruction Prefetch Buffer Invalidate"] -pub type IINV_W<'a, REG> = crate::BitWriter<'a, REG, IINV_AW>; -impl<'a, REG> IINV_W<'a, REG> +pub type IinvW<'a, REG> = crate::BitWriter<'a, REG, Iinv>; +impl<'a, REG> IinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IINV_AW::VALUE1) + self.variant(Iinv::Value1) } #[doc = "Initiate invalidation of entire instruction cache."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IINV_AW::VALUE2) + self.variant(Iinv::Value2) } } -#[doc = "Field `DBYP` reader - Data Buffer Bypass"] -pub type DBYP_R = crate::BitReader; #[doc = "Data Buffer Bypass\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBYP_A { +pub enum Dbyp { #[doc = "0: Prefetch Data buffer not bypassed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prefetch Data buffer bypassed."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBYP_A) -> Self { + fn from(variant: Dbyp) -> Self { variant as u8 != 0 } } -impl DBYP_R { +#[doc = "Field `DBYP` reader - Data Buffer Bypass"] +pub type DbypR = crate::BitReader; +impl DbypR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBYP_A { + pub const fn variant(&self) -> Dbyp { match self.bits { - false => DBYP_A::VALUE1, - true => DBYP_A::VALUE2, + false => Dbyp::Value1, + true => Dbyp::Value2, } } #[doc = "Prefetch Data buffer not bypassed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBYP_A::VALUE1 + *self == Dbyp::Value1 } #[doc = "Prefetch Data buffer bypassed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBYP_A::VALUE2 + *self == Dbyp::Value2 } } #[doc = "Field `DBYP` writer - Data Buffer Bypass"] -pub type DBYP_W<'a, REG> = crate::BitWriter<'a, REG, DBYP_A>; -impl<'a, REG> DBYP_W<'a, REG> +pub type DbypW<'a, REG> = crate::BitWriter<'a, REG, Dbyp>; +impl<'a, REG> DbypW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Prefetch Data buffer not bypassed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DBYP_A::VALUE1) + self.variant(Dbyp::Value1) } #[doc = "Prefetch Data buffer bypassed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DBYP_A::VALUE2) + self.variant(Dbyp::Value2) } } impl R { #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"] #[inline(always)] - pub fn ibyp(&self) -> IBYP_R { - IBYP_R::new((self.bits & 1) != 0) + pub fn ibyp(&self) -> IbypR { + IbypR::new((self.bits & 1) != 0) } #[doc = "Bit 4 - Data Buffer Bypass"] #[inline(always)] - pub fn dbyp(&self) -> DBYP_R { - DBYP_R::new(((self.bits >> 4) & 1) != 0) + pub fn dbyp(&self) -> DbypR { + DbypR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"] #[inline(always)] #[must_use] - pub fn ibyp(&mut self) -> IBYP_W { - IBYP_W::new(self, 0) + pub fn ibyp(&mut self) -> IbypW { + IbypW::new(self, 0) } #[doc = "Bit 1 - Instruction Prefetch Buffer Invalidate"] #[inline(always)] #[must_use] - pub fn iinv(&mut self) -> IINV_W { - IINV_W::new(self, 1) + pub fn iinv(&mut self) -> IinvW { + IinvW::new(self, 1) } #[doc = "Bit 4 - Data Buffer Bypass"] #[inline(always)] #[must_use] - pub fn dbyp(&mut self) -> DBYP_W { - DBYP_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dbyp(&mut self) -> DbypW { + DbypW::new(self, 4) } } #[doc = "Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCON_SPEC; -impl crate::RegisterSpec for PCON_SPEC { +pub struct PconSpec; +impl crate::RegisterSpec for PconSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcon::R`](R) reader structure"] -impl crate::Readable for PCON_SPEC {} +impl crate::Readable for PconSpec {} #[doc = "`write(|w| ..)` method takes [`pcon::W`](W) writer structure"] -impl crate::Writable for PCON_SPEC { +impl crate::Writable for PconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCON to value 0"] -impl crate::Resettable for PCON_SPEC { +impl crate::Resettable for PconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc.rs b/src/rtc.rs index 2ab363da..115c82bc 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -1,116 +1,126 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, - ctr: CTR, - rawstat: RAWSTAT, - stssr: STSSR, - msksr: MSKSR, - clrsr: CLRSR, - atim0: ATIM0, - atim1: ATIM1, - tim0: TIM0, - tim1: TIM1, + id: Id, + ctr: Ctr, + rawstat: Rawstat, + stssr: Stssr, + msksr: Msksr, + clrsr: Clrsr, + atim0: Atim0, + atim1: Atim1, + tim0: Tim0, + tim1: Tim1, } impl RegisterBlock { #[doc = "0x00 - RTC ID Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x04 - RTC Control Register"] #[inline(always)] - pub const fn ctr(&self) -> &CTR { + pub const fn ctr(&self) -> &Ctr { &self.ctr } #[doc = "0x08 - RTC Raw Service Request Register"] #[inline(always)] - pub const fn rawstat(&self) -> &RAWSTAT { + pub const fn rawstat(&self) -> &Rawstat { &self.rawstat } #[doc = "0x0c - RTC Service Request Status Register"] #[inline(always)] - pub const fn stssr(&self) -> &STSSR { + pub const fn stssr(&self) -> &Stssr { &self.stssr } #[doc = "0x10 - RTC Service Request Mask Register"] #[inline(always)] - pub const fn msksr(&self) -> &MSKSR { + pub const fn msksr(&self) -> &Msksr { &self.msksr } #[doc = "0x14 - RTC Clear Service Request Register"] #[inline(always)] - pub const fn clrsr(&self) -> &CLRSR { + pub const fn clrsr(&self) -> &Clrsr { &self.clrsr } #[doc = "0x18 - RTC Alarm Time Register 0"] #[inline(always)] - pub const fn atim0(&self) -> &ATIM0 { + pub const fn atim0(&self) -> &Atim0 { &self.atim0 } #[doc = "0x1c - RTC Alarm Time Register 1"] #[inline(always)] - pub const fn atim1(&self) -> &ATIM1 { + pub const fn atim1(&self) -> &Atim1 { &self.atim1 } #[doc = "0x20 - RTC Time Register 0"] #[inline(always)] - pub const fn tim0(&self) -> &TIM0 { + pub const fn tim0(&self) -> &Tim0 { &self.tim0 } #[doc = "0x24 - RTC Time Register 1"] #[inline(always)] - pub const fn tim1(&self) -> &TIM1 { + pub const fn tim1(&self) -> &Tim1 { &self.tim1 } } #[doc = "ID (r) register accessor: RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "RTC ID Register"] pub mod id; #[doc = "CTR (rw) register accessor: RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -pub type CTR = crate::Reg; +#[doc(alias = "CTR")] +pub type Ctr = crate::Reg; #[doc = "RTC Control Register"] pub mod ctr; #[doc = "RAWSTAT (r) register accessor: RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawstat`] module"] -pub type RAWSTAT = crate::Reg; +#[doc(alias = "RAWSTAT")] +pub type Rawstat = crate::Reg; #[doc = "RTC Raw Service Request Register"] pub mod rawstat; #[doc = "STSSR (r) register accessor: RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stssr`] module"] -pub type STSSR = crate::Reg; +#[doc(alias = "STSSR")] +pub type Stssr = crate::Reg; #[doc = "RTC Service Request Status Register"] pub mod stssr; #[doc = "MSKSR (rw) register accessor: RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msksr`] module"] -pub type MSKSR = crate::Reg; +#[doc(alias = "MSKSR")] +pub type Msksr = crate::Reg; #[doc = "RTC Service Request Mask Register"] pub mod msksr; #[doc = "CLRSR (w) register accessor: RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clrsr`] module"] -pub type CLRSR = crate::Reg; +#[doc(alias = "CLRSR")] +pub type Clrsr = crate::Reg; #[doc = "RTC Clear Service Request Register"] pub mod clrsr; #[doc = "ATIM0 (rw) register accessor: RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim0`] module"] -pub type ATIM0 = crate::Reg; +#[doc(alias = "ATIM0")] +pub type Atim0 = crate::Reg; #[doc = "RTC Alarm Time Register 0"] pub mod atim0; #[doc = "ATIM1 (rw) register accessor: RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim1`] module"] -pub type ATIM1 = crate::Reg; +#[doc(alias = "ATIM1")] +pub type Atim1 = crate::Reg; #[doc = "RTC Alarm Time Register 1"] pub mod atim1; #[doc = "TIM0 (rw) register accessor: RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim0`] module"] -pub type TIM0 = crate::Reg; +#[doc(alias = "TIM0")] +pub type Tim0 = crate::Reg; #[doc = "RTC Time Register 0"] pub mod tim0; #[doc = "TIM1 (rw) register accessor: RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim1`] module"] -pub type TIM1 = crate::Reg; +#[doc(alias = "TIM1")] +pub type Tim1 = crate::Reg; #[doc = "RTC Time Register 1"] pub mod tim1; diff --git a/src/rtc/atim0.rs b/src/rtc/atim0.rs index 6ab6f629..05beee25 100644 --- a/src/rtc/atim0.rs +++ b/src/rtc/atim0.rs @@ -1,94 +1,85 @@ #[doc = "Register `ATIM0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ATIM0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ASE` reader - Alarm Seconds Compare Value"] -pub type ASE_R = crate::FieldReader; +pub type AseR = crate::FieldReader; #[doc = "Field `ASE` writer - Alarm Seconds Compare Value"] -pub type ASE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type AseW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `AMI` reader - Alarm Minutes Compare Value"] -pub type AMI_R = crate::FieldReader; +pub type AmiR = crate::FieldReader; #[doc = "Field `AMI` writer - Alarm Minutes Compare Value"] -pub type AMI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type AmiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `AHO` reader - Alarm Hours Compare Value"] -pub type AHO_R = crate::FieldReader; +pub type AhoR = crate::FieldReader; #[doc = "Field `AHO` writer - Alarm Hours Compare Value"] -pub type AHO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type AhoW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `ADA` reader - Alarm Days Compare Value"] -pub type ADA_R = crate::FieldReader; +pub type AdaR = crate::FieldReader; #[doc = "Field `ADA` writer - Alarm Days Compare Value"] -pub type ADA_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type AdaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:5 - Alarm Seconds Compare Value"] #[inline(always)] - pub fn ase(&self) -> ASE_R { - ASE_R::new((self.bits & 0x3f) as u8) + pub fn ase(&self) -> AseR { + AseR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Alarm Minutes Compare Value"] #[inline(always)] - pub fn ami(&self) -> AMI_R { - AMI_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn ami(&self) -> AmiR { + AmiR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:20 - Alarm Hours Compare Value"] #[inline(always)] - pub fn aho(&self) -> AHO_R { - AHO_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn aho(&self) -> AhoR { + AhoR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Alarm Days Compare Value"] #[inline(always)] - pub fn ada(&self) -> ADA_R { - ADA_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn ada(&self) -> AdaR { + AdaR::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:5 - Alarm Seconds Compare Value"] #[inline(always)] #[must_use] - pub fn ase(&mut self) -> ASE_W { - ASE_W::new(self, 0) + pub fn ase(&mut self) -> AseW { + AseW::new(self, 0) } #[doc = "Bits 8:13 - Alarm Minutes Compare Value"] #[inline(always)] #[must_use] - pub fn ami(&mut self) -> AMI_W { - AMI_W::new(self, 8) + pub fn ami(&mut self) -> AmiW { + AmiW::new(self, 8) } #[doc = "Bits 16:20 - Alarm Hours Compare Value"] #[inline(always)] #[must_use] - pub fn aho(&mut self) -> AHO_W { - AHO_W::new(self, 16) + pub fn aho(&mut self) -> AhoW { + AhoW::new(self, 16) } #[doc = "Bits 24:28 - Alarm Days Compare Value"] #[inline(always)] #[must_use] - pub fn ada(&mut self) -> ADA_W { - ADA_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ada(&mut self) -> AdaW { + AdaW::new(self, 24) } } #[doc = "RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ATIM0_SPEC; -impl crate::RegisterSpec for ATIM0_SPEC { +pub struct Atim0Spec; +impl crate::RegisterSpec for Atim0Spec { type Ux = u32; } #[doc = "`read()` method returns [`atim0::R`](R) reader structure"] -impl crate::Readable for ATIM0_SPEC {} +impl crate::Readable for Atim0Spec {} #[doc = "`write(|w| ..)` method takes [`atim0::W`](W) writer structure"] -impl crate::Writable for ATIM0_SPEC { +impl crate::Writable for Atim0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ATIM0 to value 0"] -impl crate::Resettable for ATIM0_SPEC { +impl crate::Resettable for Atim0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/atim1.rs b/src/rtc/atim1.rs index ebd9dbde..f17a238f 100644 --- a/src/rtc/atim1.rs +++ b/src/rtc/atim1.rs @@ -1,64 +1,55 @@ #[doc = "Register `ATIM1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ATIM1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AMO` reader - Alarm Month Compare Value"] -pub type AMO_R = crate::FieldReader; +pub type AmoR = crate::FieldReader; #[doc = "Field `AMO` writer - Alarm Month Compare Value"] -pub type AMO_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AmoW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `AYE` reader - Alarm Year Compare Value"] -pub type AYE_R = crate::FieldReader; +pub type AyeR = crate::FieldReader; #[doc = "Field `AYE` writer - Alarm Year Compare Value"] -pub type AYE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AyeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 8:11 - Alarm Month Compare Value"] #[inline(always)] - pub fn amo(&self) -> AMO_R { - AMO_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn amo(&self) -> AmoR { + AmoR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:31 - Alarm Year Compare Value"] #[inline(always)] - pub fn aye(&self) -> AYE_R { - AYE_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn aye(&self) -> AyeR { + AyeR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 8:11 - Alarm Month Compare Value"] #[inline(always)] #[must_use] - pub fn amo(&mut self) -> AMO_W { - AMO_W::new(self, 8) + pub fn amo(&mut self) -> AmoW { + AmoW::new(self, 8) } #[doc = "Bits 16:31 - Alarm Year Compare Value"] #[inline(always)] #[must_use] - pub fn aye(&mut self) -> AYE_W { - AYE_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn aye(&mut self) -> AyeW { + AyeW::new(self, 16) } } #[doc = "RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ATIM1_SPEC; -impl crate::RegisterSpec for ATIM1_SPEC { +pub struct Atim1Spec; +impl crate::RegisterSpec for Atim1Spec { type Ux = u32; } #[doc = "`read()` method returns [`atim1::R`](R) reader structure"] -impl crate::Readable for ATIM1_SPEC {} +impl crate::Readable for Atim1Spec {} #[doc = "`write(|w| ..)` method takes [`atim1::W`](W) writer structure"] -impl crate::Writable for ATIM1_SPEC { +impl crate::Writable for Atim1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ATIM1 to value 0"] -impl crate::Resettable for ATIM1_SPEC { +impl crate::Resettable for Atim1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/clrsr.rs b/src/rtc/clrsr.rs index c73eebe8..e10ddcad 100644 --- a/src/rtc/clrsr.rs +++ b/src/rtc/clrsr.rs @@ -1,84 +1,75 @@ #[doc = "Register `CLRSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPSE` writer - Periodic Seconds Interrupt Clear"] -pub type RPSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPMI` writer - Periodic Minutes Interrupt Clear"] -pub type RPMI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpmiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPHO` writer - Periodic Hours Interrupt Clear"] -pub type RPHO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RphoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPDA` writer - Periodic Days Interrupt Clear"] -pub type RPDA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpdaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPMO` writer - Periodic Months Interrupt Clear"] -pub type RPMO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpmoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPYE` writer - Periodic Years Interrupt Clear"] -pub type RPYE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RpyeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAI` writer - Alarm Interrupt Clear"] -pub type RAI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RaiW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpse(&mut self) -> RPSE_W { - RPSE_W::new(self, 0) + pub fn rpse(&mut self) -> RpseW { + RpseW::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpmi(&mut self) -> RPMI_W { - RPMI_W::new(self, 1) + pub fn rpmi(&mut self) -> RpmiW { + RpmiW::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpho(&mut self) -> RPHO_W { - RPHO_W::new(self, 2) + pub fn rpho(&mut self) -> RphoW { + RphoW::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpda(&mut self) -> RPDA_W { - RPDA_W::new(self, 3) + pub fn rpda(&mut self) -> RpdaW { + RpdaW::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpmo(&mut self) -> RPMO_W { - RPMO_W::new(self, 5) + pub fn rpmo(&mut self) -> RpmoW { + RpmoW::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpye(&mut self) -> RPYE_W { - RPYE_W::new(self, 6) + pub fn rpye(&mut self) -> RpyeW { + RpyeW::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rai(&mut self) -> RAI_W { - RAI_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rai(&mut self) -> RaiW { + RaiW::new(self, 8) } } #[doc = "RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLRSR_SPEC; -impl crate::RegisterSpec for CLRSR_SPEC { +pub struct ClrsrSpec; +impl crate::RegisterSpec for ClrsrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clrsr::W`](W) writer structure"] -impl crate::Writable for CLRSR_SPEC { +impl crate::Writable for ClrsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLRSR to value 0"] -impl crate::Resettable for CLRSR_SPEC { +impl crate::Resettable for ClrsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/ctr.rs b/src/rtc/ctr.rs index bc7fb16f..4fce9e2b 100644 --- a/src/rtc/ctr.rs +++ b/src/rtc/ctr.rs @@ -1,169 +1,160 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENB` reader - RTC Module Enable"] -pub type ENB_R = crate::BitReader; +pub type EnbR = crate::BitReader; #[doc = "Field `ENB` writer - RTC Module Enable"] -pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TAE` reader - Timer Alarm Enable for Hibernation Wake-up"] -pub type TAE_R = crate::BitReader; +pub type TaeR = crate::BitReader; #[doc = "Field `TAE` writer - Timer Alarm Enable for Hibernation Wake-up"] -pub type TAE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TaeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESEC` reader - Enable Seconds Comparison for Hibernation Wake-up"] -pub type ESEC_R = crate::BitReader; +pub type EsecR = crate::BitReader; #[doc = "Field `ESEC` writer - Enable Seconds Comparison for Hibernation Wake-up"] -pub type ESEC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EsecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMIC` reader - Enable Minutes Comparison for Hibernation Wake-up"] -pub type EMIC_R = crate::BitReader; +pub type EmicR = crate::BitReader; #[doc = "Field `EMIC` writer - Enable Minutes Comparison for Hibernation Wake-up"] -pub type EMIC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EmicW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EHOC` reader - Enable Hours Comparison for Hibernation Wake-up"] -pub type EHOC_R = crate::BitReader; +pub type EhocR = crate::BitReader; #[doc = "Field `EHOC` writer - Enable Hours Comparison for Hibernation Wake-up"] -pub type EHOC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EhocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EDAC` reader - Enable Days Comparison for Hibernation Wake-up"] -pub type EDAC_R = crate::BitReader; +pub type EdacR = crate::BitReader; #[doc = "Field `EDAC` writer - Enable Days Comparison for Hibernation Wake-up"] -pub type EDAC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EdacW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMOC` reader - Enable Months Comparison for Hibernation Wake-up"] -pub type EMOC_R = crate::BitReader; +pub type EmocR = crate::BitReader; #[doc = "Field `EMOC` writer - Enable Months Comparison for Hibernation Wake-up"] -pub type EMOC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EmocW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EYEC` reader - Enable Years Comparison for Hibernation Wake-up"] -pub type EYEC_R = crate::BitReader; +pub type EyecR = crate::BitReader; #[doc = "Field `EYEC` writer - Enable Years Comparison for Hibernation Wake-up"] -pub type EYEC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EyecW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIV` reader - RTC Clock Divider Value"] -pub type DIV_R = crate::FieldReader; +pub type DivR = crate::FieldReader; #[doc = "Field `DIV` writer - RTC Clock Divider Value"] -pub type DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bit 0 - RTC Module Enable"] #[inline(always)] - pub fn enb(&self) -> ENB_R { - ENB_R::new((self.bits & 1) != 0) + pub fn enb(&self) -> EnbR { + EnbR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"] #[inline(always)] - pub fn tae(&self) -> TAE_R { - TAE_R::new(((self.bits >> 2) & 1) != 0) + pub fn tae(&self) -> TaeR { + TaeR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn esec(&self) -> ESEC_R { - ESEC_R::new(((self.bits >> 8) & 1) != 0) + pub fn esec(&self) -> EsecR { + EsecR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn emic(&self) -> EMIC_R { - EMIC_R::new(((self.bits >> 9) & 1) != 0) + pub fn emic(&self) -> EmicR { + EmicR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn ehoc(&self) -> EHOC_R { - EHOC_R::new(((self.bits >> 10) & 1) != 0) + pub fn ehoc(&self) -> EhocR { + EhocR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn edac(&self) -> EDAC_R { - EDAC_R::new(((self.bits >> 11) & 1) != 0) + pub fn edac(&self) -> EdacR { + EdacR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn emoc(&self) -> EMOC_R { - EMOC_R::new(((self.bits >> 13) & 1) != 0) + pub fn emoc(&self) -> EmocR { + EmocR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn eyec(&self) -> EYEC_R { - EYEC_R::new(((self.bits >> 14) & 1) != 0) + pub fn eyec(&self) -> EyecR { + EyecR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:31 - RTC Clock Divider Value"] #[inline(always)] - pub fn div(&self) -> DIV_R { - DIV_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn div(&self) -> DivR { + DivR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - RTC Module Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> ENB_W { - ENB_W::new(self, 0) + pub fn enb(&mut self) -> EnbW { + EnbW::new(self, 0) } #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn tae(&mut self) -> TAE_W { - TAE_W::new(self, 2) + pub fn tae(&mut self) -> TaeW { + TaeW::new(self, 2) } #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn esec(&mut self) -> ESEC_W { - ESEC_W::new(self, 8) + pub fn esec(&mut self) -> EsecW { + EsecW::new(self, 8) } #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn emic(&mut self) -> EMIC_W { - EMIC_W::new(self, 9) + pub fn emic(&mut self) -> EmicW { + EmicW::new(self, 9) } #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn ehoc(&mut self) -> EHOC_W { - EHOC_W::new(self, 10) + pub fn ehoc(&mut self) -> EhocW { + EhocW::new(self, 10) } #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn edac(&mut self) -> EDAC_W { - EDAC_W::new(self, 11) + pub fn edac(&mut self) -> EdacW { + EdacW::new(self, 11) } #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn emoc(&mut self) -> EMOC_W { - EMOC_W::new(self, 13) + pub fn emoc(&mut self) -> EmocW { + EmocW::new(self, 13) } #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn eyec(&mut self) -> EYEC_W { - EYEC_W::new(self, 14) + pub fn eyec(&mut self) -> EyecW { + EyecW::new(self, 14) } #[doc = "Bits 16:31 - RTC Clock Divider Value"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DIV_W { - DIV_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn div(&mut self) -> DivW { + DivW::new(self, 16) } } #[doc = "RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTR_SPEC; -impl crate::RegisterSpec for CTR_SPEC { +pub struct CtrSpec; +impl crate::RegisterSpec for CtrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CTR_SPEC {} +impl crate::Readable for CtrSpec {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CTR_SPEC { +impl crate::Writable for CtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0x7fff_0000"] -impl crate::Resettable for CTR_SPEC { +impl crate::Resettable for CtrSpec { const RESET_VALUE: u32 = 0x7fff_0000; } diff --git a/src/rtc/id.rs b/src/rtc/id.rs index 4e46c792..4c639521 100644 --- a/src/rtc/id.rs +++ b/src/rtc/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00a3_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00a3_c000; } diff --git a/src/rtc/msksr.rs b/src/rtc/msksr.rs index 9f4b81cc..4227ee27 100644 --- a/src/rtc/msksr.rs +++ b/src/rtc/msksr.rs @@ -1,139 +1,130 @@ #[doc = "Register `MSKSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSKSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPSE` reader - Periodic Seconds Interrupt Mask"] -pub type MPSE_R = crate::BitReader; +pub type MpseR = crate::BitReader; #[doc = "Field `MPSE` writer - Periodic Seconds Interrupt Mask"] -pub type MPSE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpseW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPMI` reader - Periodic Minutes Interrupt Mask"] -pub type MPMI_R = crate::BitReader; +pub type MpmiR = crate::BitReader; #[doc = "Field `MPMI` writer - Periodic Minutes Interrupt Mask"] -pub type MPMI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpmiW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPHO` reader - Periodic Hours Interrupt Mask"] -pub type MPHO_R = crate::BitReader; +pub type MphoR = crate::BitReader; #[doc = "Field `MPHO` writer - Periodic Hours Interrupt Mask"] -pub type MPHO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MphoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPDA` reader - Periodic Days Interrupt Mask"] -pub type MPDA_R = crate::BitReader; +pub type MpdaR = crate::BitReader; #[doc = "Field `MPDA` writer - Periodic Days Interrupt Mask"] -pub type MPDA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpdaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPMO` reader - Periodic Months Interrupt Mask"] -pub type MPMO_R = crate::BitReader; +pub type MpmoR = crate::BitReader; #[doc = "Field `MPMO` writer - Periodic Months Interrupt Mask"] -pub type MPMO_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpmoW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPYE` reader - Periodic Years Interrupt Mask"] -pub type MPYE_R = crate::BitReader; +pub type MpyeR = crate::BitReader; #[doc = "Field `MPYE` writer - Periodic Years Interrupt Mask"] -pub type MPYE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MpyeW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAI` reader - Alarm Interrupt Mask"] -pub type MAI_R = crate::BitReader; +pub type MaiR = crate::BitReader; #[doc = "Field `MAI` writer - Alarm Interrupt Mask"] -pub type MAI_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type MaiW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"] #[inline(always)] - pub fn mpse(&self) -> MPSE_R { - MPSE_R::new((self.bits & 1) != 0) + pub fn mpse(&self) -> MpseR { + MpseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"] #[inline(always)] - pub fn mpmi(&self) -> MPMI_R { - MPMI_R::new(((self.bits >> 1) & 1) != 0) + pub fn mpmi(&self) -> MpmiR { + MpmiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Periodic Hours Interrupt Mask"] #[inline(always)] - pub fn mpho(&self) -> MPHO_R { - MPHO_R::new(((self.bits >> 2) & 1) != 0) + pub fn mpho(&self) -> MphoR { + MphoR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Periodic Days Interrupt Mask"] #[inline(always)] - pub fn mpda(&self) -> MPDA_R { - MPDA_R::new(((self.bits >> 3) & 1) != 0) + pub fn mpda(&self) -> MpdaR { + MpdaR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Periodic Months Interrupt Mask"] #[inline(always)] - pub fn mpmo(&self) -> MPMO_R { - MPMO_R::new(((self.bits >> 5) & 1) != 0) + pub fn mpmo(&self) -> MpmoR { + MpmoR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Periodic Years Interrupt Mask"] #[inline(always)] - pub fn mpye(&self) -> MPYE_R { - MPYE_R::new(((self.bits >> 6) & 1) != 0) + pub fn mpye(&self) -> MpyeR { + MpyeR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Alarm Interrupt Mask"] #[inline(always)] - pub fn mai(&self) -> MAI_R { - MAI_R::new(((self.bits >> 8) & 1) != 0) + pub fn mai(&self) -> MaiR { + MaiR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpse(&mut self) -> MPSE_W { - MPSE_W::new(self, 0) + pub fn mpse(&mut self) -> MpseW { + MpseW::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpmi(&mut self) -> MPMI_W { - MPMI_W::new(self, 1) + pub fn mpmi(&mut self) -> MpmiW { + MpmiW::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpho(&mut self) -> MPHO_W { - MPHO_W::new(self, 2) + pub fn mpho(&mut self) -> MphoW { + MphoW::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpda(&mut self) -> MPDA_W { - MPDA_W::new(self, 3) + pub fn mpda(&mut self) -> MpdaW { + MpdaW::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpmo(&mut self) -> MPMO_W { - MPMO_W::new(self, 5) + pub fn mpmo(&mut self) -> MpmoW { + MpmoW::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpye(&mut self) -> MPYE_W { - MPYE_W::new(self, 6) + pub fn mpye(&mut self) -> MpyeW { + MpyeW::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mai(&mut self) -> MAI_W { - MAI_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mai(&mut self) -> MaiW { + MaiW::new(self, 8) } } #[doc = "RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MSKSR_SPEC; -impl crate::RegisterSpec for MSKSR_SPEC { +pub struct MsksrSpec; +impl crate::RegisterSpec for MsksrSpec { type Ux = u32; } #[doc = "`read()` method returns [`msksr::R`](R) reader structure"] -impl crate::Readable for MSKSR_SPEC {} +impl crate::Readable for MsksrSpec {} #[doc = "`write(|w| ..)` method takes [`msksr::W`](W) writer structure"] -impl crate::Writable for MSKSR_SPEC { +impl crate::Writable for MsksrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSKSR to value 0"] -impl crate::Resettable for MSKSR_SPEC { +impl crate::Resettable for MsksrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/rawstat.rs b/src/rtc/rawstat.rs index 1d473d74..533ff466 100644 --- a/src/rtc/rawstat.rs +++ b/src/rtc/rawstat.rs @@ -1,64 +1,64 @@ #[doc = "Register `RAWSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RPSE` reader - Raw Periodic Seconds Service Request"] -pub type RPSE_R = crate::BitReader; +pub type RpseR = crate::BitReader; #[doc = "Field `RPMI` reader - Raw Periodic Minutes Service Request"] -pub type RPMI_R = crate::BitReader; +pub type RpmiR = crate::BitReader; #[doc = "Field `RPHO` reader - Raw Periodic Hours Service Request"] -pub type RPHO_R = crate::BitReader; +pub type RphoR = crate::BitReader; #[doc = "Field `RPDA` reader - Raw Periodic Days Service Request"] -pub type RPDA_R = crate::BitReader; +pub type RpdaR = crate::BitReader; #[doc = "Field `RPMO` reader - Raw Periodic Months Service Request"] -pub type RPMO_R = crate::BitReader; +pub type RpmoR = crate::BitReader; #[doc = "Field `RPYE` reader - Raw Periodic Years Service Request"] -pub type RPYE_R = crate::BitReader; +pub type RpyeR = crate::BitReader; #[doc = "Field `RAI` reader - Raw Alarm Service Request"] -pub type RAI_R = crate::BitReader; +pub type RaiR = crate::BitReader; impl R { #[doc = "Bit 0 - Raw Periodic Seconds Service Request"] #[inline(always)] - pub fn rpse(&self) -> RPSE_R { - RPSE_R::new((self.bits & 1) != 0) + pub fn rpse(&self) -> RpseR { + RpseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Periodic Minutes Service Request"] #[inline(always)] - pub fn rpmi(&self) -> RPMI_R { - RPMI_R::new(((self.bits >> 1) & 1) != 0) + pub fn rpmi(&self) -> RpmiR { + RpmiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Periodic Hours Service Request"] #[inline(always)] - pub fn rpho(&self) -> RPHO_R { - RPHO_R::new(((self.bits >> 2) & 1) != 0) + pub fn rpho(&self) -> RphoR { + RphoR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Periodic Days Service Request"] #[inline(always)] - pub fn rpda(&self) -> RPDA_R { - RPDA_R::new(((self.bits >> 3) & 1) != 0) + pub fn rpda(&self) -> RpdaR { + RpdaR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Raw Periodic Months Service Request"] #[inline(always)] - pub fn rpmo(&self) -> RPMO_R { - RPMO_R::new(((self.bits >> 5) & 1) != 0) + pub fn rpmo(&self) -> RpmoR { + RpmoR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Periodic Years Service Request"] #[inline(always)] - pub fn rpye(&self) -> RPYE_R { - RPYE_R::new(((self.bits >> 6) & 1) != 0) + pub fn rpye(&self) -> RpyeR { + RpyeR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Raw Alarm Service Request"] #[inline(always)] - pub fn rai(&self) -> RAI_R { - RAI_R::new(((self.bits >> 8) & 1) != 0) + pub fn rai(&self) -> RaiR { + RaiR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RAWSTAT_SPEC; -impl crate::RegisterSpec for RAWSTAT_SPEC { +pub struct RawstatSpec; +impl crate::RegisterSpec for RawstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`rawstat::R`](R) reader structure"] -impl crate::Readable for RAWSTAT_SPEC {} +impl crate::Readable for RawstatSpec {} #[doc = "`reset()` method sets RAWSTAT to value 0"] -impl crate::Resettable for RAWSTAT_SPEC { +impl crate::Resettable for RawstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/stssr.rs b/src/rtc/stssr.rs index 78e32ac1..10781881 100644 --- a/src/rtc/stssr.rs +++ b/src/rtc/stssr.rs @@ -1,64 +1,64 @@ #[doc = "Register `STSSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SPSE` reader - Periodic Seconds Service Request Status after Masking"] -pub type SPSE_R = crate::BitReader; +pub type SpseR = crate::BitReader; #[doc = "Field `SPMI` reader - Periodic Minutes Service Request Status after Masking"] -pub type SPMI_R = crate::BitReader; +pub type SpmiR = crate::BitReader; #[doc = "Field `SPHO` reader - Periodic Hours Service Request Status after Masking"] -pub type SPHO_R = crate::BitReader; +pub type SphoR = crate::BitReader; #[doc = "Field `SPDA` reader - Periodic Days Service Request Status after Masking"] -pub type SPDA_R = crate::BitReader; +pub type SpdaR = crate::BitReader; #[doc = "Field `SPMO` reader - Periodic Months Service Request Status after Masking"] -pub type SPMO_R = crate::BitReader; +pub type SpmoR = crate::BitReader; #[doc = "Field `SPYE` reader - Periodic Years Service Request Status after Masking"] -pub type SPYE_R = crate::BitReader; +pub type SpyeR = crate::BitReader; #[doc = "Field `SAI` reader - Alarm Service Request Status after Masking"] -pub type SAI_R = crate::BitReader; +pub type SaiR = crate::BitReader; impl R { #[doc = "Bit 0 - Periodic Seconds Service Request Status after Masking"] #[inline(always)] - pub fn spse(&self) -> SPSE_R { - SPSE_R::new((self.bits & 1) != 0) + pub fn spse(&self) -> SpseR { + SpseR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Periodic Minutes Service Request Status after Masking"] #[inline(always)] - pub fn spmi(&self) -> SPMI_R { - SPMI_R::new(((self.bits >> 1) & 1) != 0) + pub fn spmi(&self) -> SpmiR { + SpmiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Periodic Hours Service Request Status after Masking"] #[inline(always)] - pub fn spho(&self) -> SPHO_R { - SPHO_R::new(((self.bits >> 2) & 1) != 0) + pub fn spho(&self) -> SphoR { + SphoR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Periodic Days Service Request Status after Masking"] #[inline(always)] - pub fn spda(&self) -> SPDA_R { - SPDA_R::new(((self.bits >> 3) & 1) != 0) + pub fn spda(&self) -> SpdaR { + SpdaR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Periodic Months Service Request Status after Masking"] #[inline(always)] - pub fn spmo(&self) -> SPMO_R { - SPMO_R::new(((self.bits >> 5) & 1) != 0) + pub fn spmo(&self) -> SpmoR { + SpmoR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Periodic Years Service Request Status after Masking"] #[inline(always)] - pub fn spye(&self) -> SPYE_R { - SPYE_R::new(((self.bits >> 6) & 1) != 0) + pub fn spye(&self) -> SpyeR { + SpyeR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Alarm Service Request Status after Masking"] #[inline(always)] - pub fn sai(&self) -> SAI_R { - SAI_R::new(((self.bits >> 8) & 1) != 0) + pub fn sai(&self) -> SaiR { + SaiR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STSSR_SPEC; -impl crate::RegisterSpec for STSSR_SPEC { +pub struct StssrSpec; +impl crate::RegisterSpec for StssrSpec { type Ux = u32; } #[doc = "`read()` method returns [`stssr::R`](R) reader structure"] -impl crate::Readable for STSSR_SPEC {} +impl crate::Readable for StssrSpec {} #[doc = "`reset()` method sets STSSR to value 0"] -impl crate::Resettable for STSSR_SPEC { +impl crate::Resettable for StssrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/tim0.rs b/src/rtc/tim0.rs index 3ad784b5..41bc63a7 100644 --- a/src/rtc/tim0.rs +++ b/src/rtc/tim0.rs @@ -1,94 +1,85 @@ #[doc = "Register `TIM0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIM0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SE` reader - Seconds Time Value"] -pub type SE_R = crate::FieldReader; +pub type SeR = crate::FieldReader; #[doc = "Field `SE` writer - Seconds Time Value"] -pub type SE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type SeW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MI` reader - Minutes Time Value"] -pub type MI_R = crate::FieldReader; +pub type MiR = crate::FieldReader; #[doc = "Field `MI` writer - Minutes Time Value"] -pub type MI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type MiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `HO` reader - Hours Time Value"] -pub type HO_R = crate::FieldReader; +pub type HoR = crate::FieldReader; #[doc = "Field `HO` writer - Hours Time Value"] -pub type HO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type HoW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `DA` reader - Days Time Value"] -pub type DA_R = crate::FieldReader; +pub type DaR = crate::FieldReader; #[doc = "Field `DA` writer - Days Time Value"] -pub type DA_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:5 - Seconds Time Value"] #[inline(always)] - pub fn se(&self) -> SE_R { - SE_R::new((self.bits & 0x3f) as u8) + pub fn se(&self) -> SeR { + SeR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Minutes Time Value"] #[inline(always)] - pub fn mi(&self) -> MI_R { - MI_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn mi(&self) -> MiR { + MiR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:20 - Hours Time Value"] #[inline(always)] - pub fn ho(&self) -> HO_R { - HO_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn ho(&self) -> HoR { + HoR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Days Time Value"] #[inline(always)] - pub fn da(&self) -> DA_R { - DA_R::new(((self.bits >> 24) & 0x1f) as u8) + pub fn da(&self) -> DaR { + DaR::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:5 - Seconds Time Value"] #[inline(always)] #[must_use] - pub fn se(&mut self) -> SE_W { - SE_W::new(self, 0) + pub fn se(&mut self) -> SeW { + SeW::new(self, 0) } #[doc = "Bits 8:13 - Minutes Time Value"] #[inline(always)] #[must_use] - pub fn mi(&mut self) -> MI_W { - MI_W::new(self, 8) + pub fn mi(&mut self) -> MiW { + MiW::new(self, 8) } #[doc = "Bits 16:20 - Hours Time Value"] #[inline(always)] #[must_use] - pub fn ho(&mut self) -> HO_W { - HO_W::new(self, 16) + pub fn ho(&mut self) -> HoW { + HoW::new(self, 16) } #[doc = "Bits 24:28 - Days Time Value"] #[inline(always)] #[must_use] - pub fn da(&mut self) -> DA_W { - DA_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn da(&mut self) -> DaW { + DaW::new(self, 24) } } #[doc = "RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIM0_SPEC; -impl crate::RegisterSpec for TIM0_SPEC { +pub struct Tim0Spec; +impl crate::RegisterSpec for Tim0Spec { type Ux = u32; } #[doc = "`read()` method returns [`tim0::R`](R) reader structure"] -impl crate::Readable for TIM0_SPEC {} +impl crate::Readable for Tim0Spec {} #[doc = "`write(|w| ..)` method takes [`tim0::W`](W) writer structure"] -impl crate::Writable for TIM0_SPEC { +impl crate::Writable for Tim0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM0 to value 0"] -impl crate::Resettable for TIM0_SPEC { +impl crate::Resettable for Tim0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/tim1.rs b/src/rtc/tim1.rs index edfdb20a..3a8a5628 100644 --- a/src/rtc/tim1.rs +++ b/src/rtc/tim1.rs @@ -1,79 +1,70 @@ #[doc = "Register `TIM1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIM1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAWE` reader - Days of Week Time Value"] -pub type DAWE_R = crate::FieldReader; +pub type DaweR = crate::FieldReader; #[doc = "Field `DAWE` writer - Days of Week Time Value"] -pub type DAWE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DaweW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `MO` reader - Month Time Value"] -pub type MO_R = crate::FieldReader; +pub type MoR = crate::FieldReader; #[doc = "Field `MO` writer - Month Time Value"] -pub type MO_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type MoW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `YE` reader - Year Time Value"] -pub type YE_R = crate::FieldReader; +pub type YeR = crate::FieldReader; #[doc = "Field `YE` writer - Year Time Value"] -pub type YE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type YeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:2 - Days of Week Time Value"] #[inline(always)] - pub fn dawe(&self) -> DAWE_R { - DAWE_R::new((self.bits & 7) as u8) + pub fn dawe(&self) -> DaweR { + DaweR::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Month Time Value"] #[inline(always)] - pub fn mo(&self) -> MO_R { - MO_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mo(&self) -> MoR { + MoR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:31 - Year Time Value"] #[inline(always)] - pub fn ye(&self) -> YE_R { - YE_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn ye(&self) -> YeR { + YeR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:2 - Days of Week Time Value"] #[inline(always)] #[must_use] - pub fn dawe(&mut self) -> DAWE_W { - DAWE_W::new(self, 0) + pub fn dawe(&mut self) -> DaweW { + DaweW::new(self, 0) } #[doc = "Bits 8:11 - Month Time Value"] #[inline(always)] #[must_use] - pub fn mo(&mut self) -> MO_W { - MO_W::new(self, 8) + pub fn mo(&mut self) -> MoW { + MoW::new(self, 8) } #[doc = "Bits 16:31 - Year Time Value"] #[inline(always)] #[must_use] - pub fn ye(&mut self) -> YE_W { - YE_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ye(&mut self) -> YeW { + YeW::new(self, 16) } } #[doc = "RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIM1_SPEC; -impl crate::RegisterSpec for TIM1_SPEC { +pub struct Tim1Spec; +impl crate::RegisterSpec for Tim1Spec { type Ux = u32; } #[doc = "`read()` method returns [`tim1::R`](R) reader structure"] -impl crate::Readable for TIM1_SPEC {} +impl crate::Readable for Tim1Spec {} #[doc = "`write(|w| ..)` method takes [`tim1::W`](W) writer structure"] -impl crate::Writable for TIM1_SPEC { +impl crate::Writable for Tim1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM1 to value 0"] -impl crate::Resettable for TIM1_SPEC { +impl crate::Resettable for Tim1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk.rs b/src/scu_clk.rs index d061683a..b8d0cb43 100644 --- a/src/scu_clk.rs +++ b/src/scu_clk.rs @@ -1,304 +1,331 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clkstat: CLKSTAT, - clkset: CLKSET, - clkclr: CLKCLR, - sysclkcr: SYSCLKCR, - cpuclkcr: CPUCLKCR, - pbclkcr: PBCLKCR, - usbclkcr: USBCLKCR, - ebuclkcr: EBUCLKCR, - ccuclkcr: CCUCLKCR, - wdtclkcr: WDTCLKCR, - extclkcr: EXTCLKCR, - mlinkclkcr: MLINKCLKCR, - sleepcr: SLEEPCR, - dsleepcr: DSLEEPCR, - ecatclkcr: ECATCLKCR, + clkstat: Clkstat, + clkset: Clkset, + clkclr: Clkclr, + sysclkcr: Sysclkcr, + cpuclkcr: Cpuclkcr, + pbclkcr: Pbclkcr, + usbclkcr: Usbclkcr, + ebuclkcr: Ebuclkcr, + ccuclkcr: Ccuclkcr, + wdtclkcr: Wdtclkcr, + extclkcr: Extclkcr, + mlinkclkcr: Mlinkclkcr, + sleepcr: Sleepcr, + dsleepcr: Dsleepcr, + ecatclkcr: Ecatclkcr, _reserved15: [u8; 0x04], - cgatstat0: CGATSTAT0, - cgatset0: CGATSET0, - cgatclr0: CGATCLR0, - cgatstat1: CGATSTAT1, - cgatset1: CGATSET1, - cgatclr1: CGATCLR1, - cgatstat2: CGATSTAT2, - cgatset2: CGATSET2, - cgatclr2: CGATCLR2, - cgatstat3: CGATSTAT3, - cgatset3: CGATSET3, - cgatclr3: CGATCLR3, + cgatstat0: Cgatstat0, + cgatset0: Cgatset0, + cgatclr0: Cgatclr0, + cgatstat1: Cgatstat1, + cgatset1: Cgatset1, + cgatclr1: Cgatclr1, + cgatstat2: Cgatstat2, + cgatset2: Cgatset2, + cgatclr2: Cgatclr2, + cgatstat3: Cgatstat3, + cgatset3: Cgatset3, + cgatclr3: Cgatclr3, } impl RegisterBlock { #[doc = "0x00 - Clock Status Register"] #[inline(always)] - pub const fn clkstat(&self) -> &CLKSTAT { + pub const fn clkstat(&self) -> &Clkstat { &self.clkstat } #[doc = "0x04 - CLK Set Register"] #[inline(always)] - pub const fn clkset(&self) -> &CLKSET { + pub const fn clkset(&self) -> &Clkset { &self.clkset } #[doc = "0x08 - CLK Clear Register"] #[inline(always)] - pub const fn clkclr(&self) -> &CLKCLR { + pub const fn clkclr(&self) -> &Clkclr { &self.clkclr } #[doc = "0x0c - System Clock Control Register"] #[inline(always)] - pub const fn sysclkcr(&self) -> &SYSCLKCR { + pub const fn sysclkcr(&self) -> &Sysclkcr { &self.sysclkcr } #[doc = "0x10 - CPU Clock Control Register"] #[inline(always)] - pub const fn cpuclkcr(&self) -> &CPUCLKCR { + pub const fn cpuclkcr(&self) -> &Cpuclkcr { &self.cpuclkcr } #[doc = "0x14 - Peripheral Bus Clock Control Register"] #[inline(always)] - pub const fn pbclkcr(&self) -> &PBCLKCR { + pub const fn pbclkcr(&self) -> &Pbclkcr { &self.pbclkcr } #[doc = "0x18 - USB Clock Control Register"] #[inline(always)] - pub const fn usbclkcr(&self) -> &USBCLKCR { + pub const fn usbclkcr(&self) -> &Usbclkcr { &self.usbclkcr } #[doc = "0x1c - EBU Clock Control Register"] #[inline(always)] - pub const fn ebuclkcr(&self) -> &EBUCLKCR { + pub const fn ebuclkcr(&self) -> &Ebuclkcr { &self.ebuclkcr } #[doc = "0x20 - CCU Clock Control Register"] #[inline(always)] - pub const fn ccuclkcr(&self) -> &CCUCLKCR { + pub const fn ccuclkcr(&self) -> &Ccuclkcr { &self.ccuclkcr } #[doc = "0x24 - WDT Clock Control Register"] #[inline(always)] - pub const fn wdtclkcr(&self) -> &WDTCLKCR { + pub const fn wdtclkcr(&self) -> &Wdtclkcr { &self.wdtclkcr } #[doc = "0x28 - External Clock Control"] #[inline(always)] - pub const fn extclkcr(&self) -> &EXTCLKCR { + pub const fn extclkcr(&self) -> &Extclkcr { &self.extclkcr } #[doc = "0x2c - Multi-Link Clock Control"] #[inline(always)] - pub const fn mlinkclkcr(&self) -> &MLINKCLKCR { + pub const fn mlinkclkcr(&self) -> &Mlinkclkcr { &self.mlinkclkcr } #[doc = "0x30 - Sleep Control Register"] #[inline(always)] - pub const fn sleepcr(&self) -> &SLEEPCR { + pub const fn sleepcr(&self) -> &Sleepcr { &self.sleepcr } #[doc = "0x34 - Deep Sleep Control Register"] #[inline(always)] - pub const fn dsleepcr(&self) -> &DSLEEPCR { + pub const fn dsleepcr(&self) -> &Dsleepcr { &self.dsleepcr } #[doc = "0x38 - EtherCAT Clock Control Register"] #[inline(always)] - pub const fn ecatclkcr(&self) -> &ECATCLKCR { + pub const fn ecatclkcr(&self) -> &Ecatclkcr { &self.ecatclkcr } #[doc = "0x40 - Peripheral 0 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat0(&self) -> &CGATSTAT0 { + pub const fn cgatstat0(&self) -> &Cgatstat0 { &self.cgatstat0 } #[doc = "0x44 - Peripheral 0 Clock Gating Set"] #[inline(always)] - pub const fn cgatset0(&self) -> &CGATSET0 { + pub const fn cgatset0(&self) -> &Cgatset0 { &self.cgatset0 } #[doc = "0x48 - Peripheral 0 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr0(&self) -> &CGATCLR0 { + pub const fn cgatclr0(&self) -> &Cgatclr0 { &self.cgatclr0 } #[doc = "0x4c - Peripheral 1 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat1(&self) -> &CGATSTAT1 { + pub const fn cgatstat1(&self) -> &Cgatstat1 { &self.cgatstat1 } #[doc = "0x50 - Peripheral 1 Clock Gating Set"] #[inline(always)] - pub const fn cgatset1(&self) -> &CGATSET1 { + pub const fn cgatset1(&self) -> &Cgatset1 { &self.cgatset1 } #[doc = "0x54 - Peripheral 1 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr1(&self) -> &CGATCLR1 { + pub const fn cgatclr1(&self) -> &Cgatclr1 { &self.cgatclr1 } #[doc = "0x58 - Peripheral 2 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat2(&self) -> &CGATSTAT2 { + pub const fn cgatstat2(&self) -> &Cgatstat2 { &self.cgatstat2 } #[doc = "0x5c - Peripheral 2 Clock Gating Set"] #[inline(always)] - pub const fn cgatset2(&self) -> &CGATSET2 { + pub const fn cgatset2(&self) -> &Cgatset2 { &self.cgatset2 } #[doc = "0x60 - Peripheral 2 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr2(&self) -> &CGATCLR2 { + pub const fn cgatclr2(&self) -> &Cgatclr2 { &self.cgatclr2 } #[doc = "0x64 - Peripheral 3 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat3(&self) -> &CGATSTAT3 { + pub const fn cgatstat3(&self) -> &Cgatstat3 { &self.cgatstat3 } #[doc = "0x68 - Peripheral 3 Clock Gating Set"] #[inline(always)] - pub const fn cgatset3(&self) -> &CGATSET3 { + pub const fn cgatset3(&self) -> &Cgatset3 { &self.cgatset3 } #[doc = "0x6c - Peripheral 3 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr3(&self) -> &CGATCLR3 { + pub const fn cgatclr3(&self) -> &Cgatclr3 { &self.cgatclr3 } } #[doc = "CLKSTAT (r) register accessor: Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkstat`] module"] -pub type CLKSTAT = crate::Reg; +#[doc(alias = "CLKSTAT")] +pub type Clkstat = crate::Reg; #[doc = "Clock Status Register"] pub mod clkstat; #[doc = "CLKSET (w) register accessor: CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkset`] module"] -pub type CLKSET = crate::Reg; +#[doc(alias = "CLKSET")] +pub type Clkset = crate::Reg; #[doc = "CLK Set Register"] pub mod clkset; #[doc = "CLKCLR (w) register accessor: CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkclr`] module"] -pub type CLKCLR = crate::Reg; +#[doc(alias = "CLKCLR")] +pub type Clkclr = crate::Reg; #[doc = "CLK Clear Register"] pub mod clkclr; #[doc = "SYSCLKCR (rw) register accessor: System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkcr`] module"] -pub type SYSCLKCR = crate::Reg; +#[doc(alias = "SYSCLKCR")] +pub type Sysclkcr = crate::Reg; #[doc = "System Clock Control Register"] pub mod sysclkcr; #[doc = "CPUCLKCR (rw) register accessor: CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuclkcr`] module"] -pub type CPUCLKCR = crate::Reg; +#[doc(alias = "CPUCLKCR")] +pub type Cpuclkcr = crate::Reg; #[doc = "CPU Clock Control Register"] pub mod cpuclkcr; #[doc = "PBCLKCR (rw) register accessor: Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pbclkcr`] module"] -pub type PBCLKCR = crate::Reg; +#[doc(alias = "PBCLKCR")] +pub type Pbclkcr = crate::Reg; #[doc = "Peripheral Bus Clock Control Register"] pub mod pbclkcr; #[doc = "USBCLKCR (rw) register accessor: USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkcr`] module"] -pub type USBCLKCR = crate::Reg; +#[doc(alias = "USBCLKCR")] +pub type Usbclkcr = crate::Reg; #[doc = "USB Clock Control Register"] pub mod usbclkcr; #[doc = "EBUCLKCR (rw) register accessor: EBU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ebuclkcr`] module"] -pub type EBUCLKCR = crate::Reg; +#[doc(alias = "EBUCLKCR")] +pub type Ebuclkcr = crate::Reg; #[doc = "EBU Clock Control Register"] pub mod ebuclkcr; #[doc = "CCUCLKCR (rw) register accessor: CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccuclkcr`] module"] -pub type CCUCLKCR = crate::Reg; +#[doc(alias = "CCUCLKCR")] +pub type Ccuclkcr = crate::Reg; #[doc = "CCU Clock Control Register"] pub mod ccuclkcr; #[doc = "WDTCLKCR (rw) register accessor: WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclkcr`] module"] -pub type WDTCLKCR = crate::Reg; +#[doc(alias = "WDTCLKCR")] +pub type Wdtclkcr = crate::Reg; #[doc = "WDT Clock Control Register"] pub mod wdtclkcr; #[doc = "EXTCLKCR (rw) register accessor: External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extclkcr`] module"] -pub type EXTCLKCR = crate::Reg; +#[doc(alias = "EXTCLKCR")] +pub type Extclkcr = crate::Reg; #[doc = "External Clock Control"] pub mod extclkcr; #[doc = "MLINKCLKCR (rw) register accessor: Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mlinkclkcr`] module"] -pub type MLINKCLKCR = crate::Reg; +#[doc(alias = "MLINKCLKCR")] +pub type Mlinkclkcr = crate::Reg; #[doc = "Multi-Link Clock Control"] pub mod mlinkclkcr; #[doc = "SLEEPCR (rw) register accessor: Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleepcr`] module"] -pub type SLEEPCR = crate::Reg; +#[doc(alias = "SLEEPCR")] +pub type Sleepcr = crate::Reg; #[doc = "Sleep Control Register"] pub mod sleepcr; #[doc = "DSLEEPCR (rw) register accessor: Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsleepcr`] module"] -pub type DSLEEPCR = crate::Reg; +#[doc(alias = "DSLEEPCR")] +pub type Dsleepcr = crate::Reg; #[doc = "Deep Sleep Control Register"] pub mod dsleepcr; #[doc = "ECATCLKCR (rw) register accessor: EtherCAT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecatclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ecatclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecatclkcr`] module"] -pub type ECATCLKCR = crate::Reg; +#[doc(alias = "ECATCLKCR")] +pub type Ecatclkcr = crate::Reg; #[doc = "EtherCAT Clock Control Register"] pub mod ecatclkcr; #[doc = "CGATSTAT0 (r) register accessor: Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat0`] module"] -pub type CGATSTAT0 = crate::Reg; +#[doc(alias = "CGATSTAT0")] +pub type Cgatstat0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Status"] pub mod cgatstat0; #[doc = "CGATSET0 (w) register accessor: Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset0`] module"] -pub type CGATSET0 = crate::Reg; +#[doc(alias = "CGATSET0")] +pub type Cgatset0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Set"] pub mod cgatset0; #[doc = "CGATCLR0 (w) register accessor: Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr0`] module"] -pub type CGATCLR0 = crate::Reg; +#[doc(alias = "CGATCLR0")] +pub type Cgatclr0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Clear"] pub mod cgatclr0; #[doc = "CGATSTAT1 (r) register accessor: Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat1`] module"] -pub type CGATSTAT1 = crate::Reg; +#[doc(alias = "CGATSTAT1")] +pub type Cgatstat1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Status"] pub mod cgatstat1; #[doc = "CGATSET1 (w) register accessor: Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset1`] module"] -pub type CGATSET1 = crate::Reg; +#[doc(alias = "CGATSET1")] +pub type Cgatset1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Set"] pub mod cgatset1; #[doc = "CGATCLR1 (w) register accessor: Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr1`] module"] -pub type CGATCLR1 = crate::Reg; +#[doc(alias = "CGATCLR1")] +pub type Cgatclr1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Clear"] pub mod cgatclr1; #[doc = "CGATSTAT2 (r) register accessor: Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat2`] module"] -pub type CGATSTAT2 = crate::Reg; +#[doc(alias = "CGATSTAT2")] +pub type Cgatstat2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Status"] pub mod cgatstat2; #[doc = "CGATSET2 (w) register accessor: Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset2`] module"] -pub type CGATSET2 = crate::Reg; +#[doc(alias = "CGATSET2")] +pub type Cgatset2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Set"] pub mod cgatset2; #[doc = "CGATCLR2 (w) register accessor: Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr2`] module"] -pub type CGATCLR2 = crate::Reg; +#[doc(alias = "CGATCLR2")] +pub type Cgatclr2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Clear"] pub mod cgatclr2; #[doc = "CGATSTAT3 (r) register accessor: Peripheral 3 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat3`] module"] -pub type CGATSTAT3 = crate::Reg; +#[doc(alias = "CGATSTAT3")] +pub type Cgatstat3 = crate::Reg; #[doc = "Peripheral 3 Clock Gating Status"] pub mod cgatstat3; #[doc = "CGATSET3 (w) register accessor: Peripheral 3 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset3`] module"] -pub type CGATSET3 = crate::Reg; +#[doc(alias = "CGATSET3")] +pub type Cgatset3 = crate::Reg; #[doc = "Peripheral 3 Clock Gating Set"] pub mod cgatset3; #[doc = "CGATCLR3 (w) register accessor: Peripheral 3 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr3`] module"] -pub type CGATCLR3 = crate::Reg; +#[doc(alias = "CGATCLR3")] +pub type Cgatclr3 = crate::Reg; #[doc = "Peripheral 3 Clock Gating Clear"] pub mod cgatclr3; diff --git a/src/scu_clk/ccuclkcr.rs b/src/scu_clk/ccuclkcr.rs index 44e86816..89eee678 100644 --- a/src/scu_clk/ccuclkcr.rs +++ b/src/scu_clk/ccuclkcr.rs @@ -1,98 +1,89 @@ #[doc = "Register `CCUCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCUCLKCR` writer"] -pub type W = crate::W; -#[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] -pub type CCUDIV_R = crate::BitReader; +pub type W = crate::W; #[doc = "CCU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUDIV_A { +pub enum Ccudiv { #[doc = "0: fCCU = fSYS"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCCU = fSYS / 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUDIV_A) -> Self { + fn from(variant: Ccudiv) -> Self { variant as u8 != 0 } } -impl CCUDIV_R { +#[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] +pub type CcudivR = crate::BitReader; +impl CcudivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCUDIV_A { + pub const fn variant(&self) -> Ccudiv { match self.bits { - false => CCUDIV_A::VALUE1, - true => CCUDIV_A::VALUE2, + false => Ccudiv::Value1, + true => Ccudiv::Value2, } } #[doc = "fCCU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCUDIV_A::VALUE1 + *self == Ccudiv::Value1 } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCUDIV_A::VALUE2 + *self == Ccudiv::Value2 } } #[doc = "Field `CCUDIV` writer - CCU Clock Divider Enable"] -pub type CCUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CCUDIV_A>; -impl<'a, REG> CCUDIV_W<'a, REG> +pub type CcudivW<'a, REG> = crate::BitWriter<'a, REG, Ccudiv>; +impl<'a, REG> CcudivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCCU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUDIV_A::VALUE1) + self.variant(Ccudiv::Value1) } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUDIV_A::VALUE2) + self.variant(Ccudiv::Value2) } } impl R { #[doc = "Bit 0 - CCU Clock Divider Enable"] #[inline(always)] - pub fn ccudiv(&self) -> CCUDIV_R { - CCUDIV_R::new((self.bits & 1) != 0) + pub fn ccudiv(&self) -> CcudivR { + CcudivR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CCU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn ccudiv(&mut self) -> CCUDIV_W { - CCUDIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ccudiv(&mut self) -> CcudivW { + CcudivW::new(self, 0) } } #[doc = "CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CCUCLKCR_SPEC; -impl crate::RegisterSpec for CCUCLKCR_SPEC { +pub struct CcuclkcrSpec; +impl crate::RegisterSpec for CcuclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ccuclkcr::R`](R) reader structure"] -impl crate::Readable for CCUCLKCR_SPEC {} +impl crate::Readable for CcuclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`ccuclkcr::W`](W) writer structure"] -impl crate::Writable for CCUCLKCR_SPEC { +impl crate::Writable for CcuclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCUCLKCR to value 0"] -impl crate::Resettable for CCUCLKCR_SPEC { +impl crate::Resettable for CcuclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr0.rs b/src/scu_clk/cgatclr0.rs index e61362bd..f386b99d 100644 --- a/src/scu_clk/cgatclr0.rs +++ b/src/scu_clk/cgatclr0.rs @@ -1,435 +1,426 @@ #[doc = "Register `CGATCLR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADC_AW { +pub enum Vadc { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADC_AW) -> Self { + fn from(variant: Vadc) -> Self { variant as u8 != 0 } } #[doc = "Field `VADC` writer - VADC Gating Clear"] -pub type VADC_W<'a, REG> = crate::BitWriter<'a, REG, VADC_AW>; -impl<'a, REG> VADC_W<'a, REG> +pub type VadcW<'a, REG> = crate::BitWriter<'a, REG, Vadc>; +impl<'a, REG> VadcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VADC_AW::VALUE1) + self.variant(Vadc::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VADC_AW::VALUE2) + self.variant(Vadc::Value2) } } #[doc = "DSD Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSD_AW { +pub enum Dsd { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSD_AW) -> Self { + fn from(variant: Dsd) -> Self { variant as u8 != 0 } } #[doc = "Field `DSD` writer - DSD Gating Clear"] -pub type DSD_W<'a, REG> = crate::BitWriter<'a, REG, DSD_AW>; -impl<'a, REG> DSD_W<'a, REG> +pub type DsdW<'a, REG> = crate::BitWriter<'a, REG, Dsd>; +impl<'a, REG> DsdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSD_AW::VALUE1) + self.variant(Dsd::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSD_AW::VALUE2) + self.variant(Dsd::Value2) } } #[doc = "CCU40 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40_AW { +pub enum Ccu40 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40_AW) -> Self { + fn from(variant: Ccu40) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40` writer - CCU40 Gating Clear"] -pub type CCU40_W<'a, REG> = crate::BitWriter<'a, REG, CCU40_AW>; -impl<'a, REG> CCU40_W<'a, REG> +pub type Ccu40W<'a, REG> = crate::BitWriter<'a, REG, Ccu40>; +impl<'a, REG> Ccu40W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU40_AW::VALUE1) + self.variant(Ccu40::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU40_AW::VALUE2) + self.variant(Ccu40::Value2) } } #[doc = "CCU41 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41_AW { +pub enum Ccu41 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41_AW) -> Self { + fn from(variant: Ccu41) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41` writer - CCU41 Gating Clear"] -pub type CCU41_W<'a, REG> = crate::BitWriter<'a, REG, CCU41_AW>; -impl<'a, REG> CCU41_W<'a, REG> +pub type Ccu41W<'a, REG> = crate::BitWriter<'a, REG, Ccu41>; +impl<'a, REG> Ccu41W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU41_AW::VALUE1) + self.variant(Ccu41::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU41_AW::VALUE2) + self.variant(Ccu41::Value2) } } #[doc = "CCU42 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42_AW { +pub enum Ccu42 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42_AW) -> Self { + fn from(variant: Ccu42) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU42` writer - CCU42 Gating Clear"] -pub type CCU42_W<'a, REG> = crate::BitWriter<'a, REG, CCU42_AW>; -impl<'a, REG> CCU42_W<'a, REG> +pub type Ccu42W<'a, REG> = crate::BitWriter<'a, REG, Ccu42>; +impl<'a, REG> Ccu42W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU42_AW::VALUE1) + self.variant(Ccu42::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU42_AW::VALUE2) + self.variant(Ccu42::Value2) } } #[doc = "CCU80 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80_AW { +pub enum Ccu80 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80_AW) -> Self { + fn from(variant: Ccu80) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80` writer - CCU80 Gating Clear"] -pub type CCU80_W<'a, REG> = crate::BitWriter<'a, REG, CCU80_AW>; -impl<'a, REG> CCU80_W<'a, REG> +pub type Ccu80W<'a, REG> = crate::BitWriter<'a, REG, Ccu80>; +impl<'a, REG> Ccu80W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU80_AW::VALUE1) + self.variant(Ccu80::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU80_AW::VALUE2) + self.variant(Ccu80::Value2) } } #[doc = "CCU81 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81_AW { +pub enum Ccu81 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81_AW) -> Self { + fn from(variant: Ccu81) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU81` writer - CCU81 Gating Clear"] -pub type CCU81_W<'a, REG> = crate::BitWriter<'a, REG, CCU81_AW>; -impl<'a, REG> CCU81_W<'a, REG> +pub type Ccu81W<'a, REG> = crate::BitWriter<'a, REG, Ccu81>; +impl<'a, REG> Ccu81W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU81_AW::VALUE1) + self.variant(Ccu81::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU81_AW::VALUE2) + self.variant(Ccu81::Value2) } } #[doc = "POSIF0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0_AW { +pub enum Posif0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0_AW) -> Self { + fn from(variant: Posif0) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0` writer - POSIF0 Gating Clear"] -pub type POSIF0_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0_AW>; -impl<'a, REG> POSIF0_W<'a, REG> +pub type Posif0W<'a, REG> = crate::BitWriter<'a, REG, Posif0>; +impl<'a, REG> Posif0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF0_AW::VALUE1) + self.variant(Posif0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF0_AW::VALUE2) + self.variant(Posif0::Value2) } } #[doc = "POSIF1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1_AW { +pub enum Posif1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1_AW) -> Self { + fn from(variant: Posif1) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF1` writer - POSIF1 Gating Clear"] -pub type POSIF1_W<'a, REG> = crate::BitWriter<'a, REG, POSIF1_AW>; -impl<'a, REG> POSIF1_W<'a, REG> +pub type Posif1W<'a, REG> = crate::BitWriter<'a, REG, Posif1>; +impl<'a, REG> Posif1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF1_AW::VALUE1) + self.variant(Posif1::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF1_AW::VALUE2) + self.variant(Posif1::Value2) } } #[doc = "USIC0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0_AW { +pub enum Usic0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0_AW) -> Self { + fn from(variant: Usic0) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0` writer - USIC0 Gating Clear"] -pub type USIC0_W<'a, REG> = crate::BitWriter<'a, REG, USIC0_AW>; -impl<'a, REG> USIC0_W<'a, REG> +pub type Usic0W<'a, REG> = crate::BitWriter<'a, REG, Usic0>; +impl<'a, REG> Usic0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC0_AW::VALUE1) + self.variant(Usic0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC0_AW::VALUE2) + self.variant(Usic0::Value2) } } #[doc = "ERU1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1_AW { +pub enum Eru1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1_AW) -> Self { + fn from(variant: Eru1) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1` writer - ERU1 Gating Clear"] -pub type ERU1_W<'a, REG> = crate::BitWriter<'a, REG, ERU1_AW>; -impl<'a, REG> ERU1_W<'a, REG> +pub type Eru1W<'a, REG> = crate::BitWriter<'a, REG, Eru1>; +impl<'a, REG> Eru1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU1_AW::VALUE1) + self.variant(Eru1::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU1_AW::VALUE2) + self.variant(Eru1::Value2) } } impl W { #[doc = "Bit 0 - VADC Gating Clear"] #[inline(always)] #[must_use] - pub fn vadc(&mut self) -> VADC_W { - VADC_W::new(self, 0) + pub fn vadc(&mut self) -> VadcW { + VadcW::new(self, 0) } #[doc = "Bit 1 - DSD Gating Clear"] #[inline(always)] #[must_use] - pub fn dsd(&mut self) -> DSD_W { - DSD_W::new(self, 1) + pub fn dsd(&mut self) -> DsdW { + DsdW::new(self, 1) } #[doc = "Bit 2 - CCU40 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu40(&mut self) -> CCU40_W { - CCU40_W::new(self, 2) + pub fn ccu40(&mut self) -> Ccu40W { + Ccu40W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu41(&mut self) -> CCU41_W { - CCU41_W::new(self, 3) + pub fn ccu41(&mut self) -> Ccu41W { + Ccu41W::new(self, 3) } #[doc = "Bit 4 - CCU42 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu42(&mut self) -> CCU42_W { - CCU42_W::new(self, 4) + pub fn ccu42(&mut self) -> Ccu42W { + Ccu42W::new(self, 4) } #[doc = "Bit 7 - CCU80 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu80(&mut self) -> CCU80_W { - CCU80_W::new(self, 7) + pub fn ccu80(&mut self) -> Ccu80W { + Ccu80W::new(self, 7) } #[doc = "Bit 8 - CCU81 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu81(&mut self) -> CCU81_W { - CCU81_W::new(self, 8) + pub fn ccu81(&mut self) -> Ccu81W { + Ccu81W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Gating Clear"] #[inline(always)] #[must_use] - pub fn posif0(&mut self) -> POSIF0_W { - POSIF0_W::new(self, 9) + pub fn posif0(&mut self) -> Posif0W { + Posif0W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Gating Clear"] #[inline(always)] #[must_use] - pub fn posif1(&mut self) -> POSIF1_W { - POSIF1_W::new(self, 10) + pub fn posif1(&mut self) -> Posif1W { + Posif1W::new(self, 10) } #[doc = "Bit 11 - USIC0 Gating Clear"] #[inline(always)] #[must_use] - pub fn usic0(&mut self) -> USIC0_W { - USIC0_W::new(self, 11) + pub fn usic0(&mut self) -> Usic0W { + Usic0W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Clear"] #[inline(always)] #[must_use] - pub fn eru1(&mut self) -> ERU1_W { - ERU1_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eru1(&mut self) -> Eru1W { + Eru1W::new(self, 16) } } #[doc = "Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATCLR0_SPEC; -impl crate::RegisterSpec for CGATCLR0_SPEC { +pub struct Cgatclr0Spec; +impl crate::RegisterSpec for Cgatclr0Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr0::W`](W) writer structure"] -impl crate::Writable for CGATCLR0_SPEC { +impl crate::Writable for Cgatclr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR0 to value 0"] -impl crate::Resettable for CGATCLR0_SPEC { +impl crate::Resettable for Cgatclr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr1.rs b/src/scu_clk/cgatclr1.rs index 7d2aa98b..9b46d2bb 100644 --- a/src/scu_clk/cgatclr1.rs +++ b/src/scu_clk/cgatclr1.rs @@ -1,324 +1,315 @@ #[doc = "Register `CGATCLR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CCU43 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43_AW { +pub enum Ccu43 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43_AW) -> Self { + fn from(variant: Ccu43) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU43` writer - CCU43 Gating Clear"] -pub type CCU43_W<'a, REG> = crate::BitWriter<'a, REG, CCU43_AW>; -impl<'a, REG> CCU43_W<'a, REG> +pub type Ccu43W<'a, REG> = crate::BitWriter<'a, REG, Ccu43>; +impl<'a, REG> Ccu43W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU43_AW::VALUE1) + self.variant(Ccu43::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU43_AW::VALUE2) + self.variant(Ccu43::Value2) } } #[doc = "LEDTS Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0_AW { +pub enum Ledtscu0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0_AW) -> Self { + fn from(variant: Ledtscu0) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0` writer - LEDTS Gating Clear"] -pub type LEDTSCU0_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0_AW>; -impl<'a, REG> LEDTSCU0_W<'a, REG> +pub type Ledtscu0W<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0>; +impl<'a, REG> Ledtscu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LEDTSCU0_AW::VALUE1) + self.variant(Ledtscu0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LEDTSCU0_AW::VALUE2) + self.variant(Ledtscu0::Value2) } } #[doc = "MultiCAN Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0_AW { +pub enum Mcan0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0_AW) -> Self { + fn from(variant: Mcan0) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0` writer - MultiCAN Gating Clear"] -pub type MCAN0_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0_AW>; -impl<'a, REG> MCAN0_W<'a, REG> +pub type Mcan0W<'a, REG> = crate::BitWriter<'a, REG, Mcan0>; +impl<'a, REG> Mcan0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCAN0_AW::VALUE1) + self.variant(Mcan0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCAN0_AW::VALUE2) + self.variant(Mcan0::Value2) } } #[doc = "DAC Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DAC_AW { +pub enum Dac { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DAC_AW) -> Self { + fn from(variant: Dac) -> Self { variant as u8 != 0 } } #[doc = "Field `DAC` writer - DAC Gating Clear"] -pub type DAC_W<'a, REG> = crate::BitWriter<'a, REG, DAC_AW>; -impl<'a, REG> DAC_W<'a, REG> +pub type DacW<'a, REG> = crate::BitWriter<'a, REG, Dac>; +impl<'a, REG> DacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DAC_AW::VALUE1) + self.variant(Dac::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DAC_AW::VALUE2) + self.variant(Dac::Value2) } } #[doc = "MMC Interface Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCI_AW { +pub enum Mmci { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCI_AW) -> Self { + fn from(variant: Mmci) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCI` writer - MMC Interface Gating Clear"] -pub type MMCI_W<'a, REG> = crate::BitWriter<'a, REG, MMCI_AW>; -impl<'a, REG> MMCI_W<'a, REG> +pub type MmciW<'a, REG> = crate::BitWriter<'a, REG, Mmci>; +impl<'a, REG> MmciW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCI_AW::VALUE1) + self.variant(Mmci::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCI_AW::VALUE2) + self.variant(Mmci::Value2) } } #[doc = "USIC1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1_AW { +pub enum Usic1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1_AW) -> Self { + fn from(variant: Usic1) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1` writer - USIC1 Gating Clear"] -pub type USIC1_W<'a, REG> = crate::BitWriter<'a, REG, USIC1_AW>; -impl<'a, REG> USIC1_W<'a, REG> +pub type Usic1W<'a, REG> = crate::BitWriter<'a, REG, Usic1>; +impl<'a, REG> Usic1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC1_AW::VALUE1) + self.variant(Usic1::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC1_AW::VALUE2) + self.variant(Usic1::Value2) } } #[doc = "USIC2 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2_AW { +pub enum Usic2 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2_AW) -> Self { + fn from(variant: Usic2) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC2` writer - USIC2 Gating Clear"] -pub type USIC2_W<'a, REG> = crate::BitWriter<'a, REG, USIC2_AW>; -impl<'a, REG> USIC2_W<'a, REG> +pub type Usic2W<'a, REG> = crate::BitWriter<'a, REG, Usic2>; +impl<'a, REG> Usic2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC2_AW::VALUE1) + self.variant(Usic2::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC2_AW::VALUE2) + self.variant(Usic2::Value2) } } #[doc = "PORTS Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTS_AW { +pub enum Pports { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTS_AW) -> Self { + fn from(variant: Pports) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTS` writer - PORTS Gating Clear"] -pub type PPORTS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTS_AW>; -impl<'a, REG> PPORTS_W<'a, REG> +pub type PportsW<'a, REG> = crate::BitWriter<'a, REG, Pports>; +impl<'a, REG> PportsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPORTS_AW::VALUE1) + self.variant(Pports::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPORTS_AW::VALUE2) + self.variant(Pports::Value2) } } impl W { #[doc = "Bit 0 - CCU43 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu43(&mut self) -> CCU43_W { - CCU43_W::new(self, 0) + pub fn ccu43(&mut self) -> Ccu43W { + Ccu43W::new(self, 0) } #[doc = "Bit 3 - LEDTS Gating Clear"] #[inline(always)] #[must_use] - pub fn ledtscu0(&mut self) -> LEDTSCU0_W { - LEDTSCU0_W::new(self, 3) + pub fn ledtscu0(&mut self) -> Ledtscu0W { + Ledtscu0W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Clear"] #[inline(always)] #[must_use] - pub fn mcan0(&mut self) -> MCAN0_W { - MCAN0_W::new(self, 4) + pub fn mcan0(&mut self) -> Mcan0W { + Mcan0W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Clear"] #[inline(always)] #[must_use] - pub fn dac(&mut self) -> DAC_W { - DAC_W::new(self, 5) + pub fn dac(&mut self) -> DacW { + DacW::new(self, 5) } #[doc = "Bit 6 - MMC Interface Gating Clear"] #[inline(always)] #[must_use] - pub fn mmci(&mut self) -> MMCI_W { - MMCI_W::new(self, 6) + pub fn mmci(&mut self) -> MmciW { + MmciW::new(self, 6) } #[doc = "Bit 7 - USIC1 Gating Clear"] #[inline(always)] #[must_use] - pub fn usic1(&mut self) -> USIC1_W { - USIC1_W::new(self, 7) + pub fn usic1(&mut self) -> Usic1W { + Usic1W::new(self, 7) } #[doc = "Bit 8 - USIC2 Gating Clear"] #[inline(always)] #[must_use] - pub fn usic2(&mut self) -> USIC2_W { - USIC2_W::new(self, 8) + pub fn usic2(&mut self) -> Usic2W { + Usic2W::new(self, 8) } #[doc = "Bit 9 - PORTS Gating Clear"] #[inline(always)] #[must_use] - pub fn pports(&mut self) -> PPORTS_W { - PPORTS_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pports(&mut self) -> PportsW { + PportsW::new(self, 9) } } #[doc = "Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATCLR1_SPEC; -impl crate::RegisterSpec for CGATCLR1_SPEC { +pub struct Cgatclr1Spec; +impl crate::RegisterSpec for Cgatclr1Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr1::W`](W) writer structure"] -impl crate::Writable for CGATCLR1_SPEC { +impl crate::Writable for Cgatclr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR1 to value 0"] -impl crate::Resettable for CGATCLR1_SPEC { +impl crate::Resettable for Cgatclr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr2.rs b/src/scu_clk/cgatclr2.rs index c3d9e7a9..5067e631 100644 --- a/src/scu_clk/cgatclr2.rs +++ b/src/scu_clk/cgatclr2.rs @@ -1,287 +1,278 @@ #[doc = "Register `CGATCLR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDT_AW { +pub enum Wdt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDT_AW) -> Self { + fn from(variant: Wdt) -> Self { variant as u8 != 0 } } #[doc = "Field `WDT` writer - WDT Gating Clear"] -pub type WDT_W<'a, REG> = crate::BitWriter<'a, REG, WDT_AW>; -impl<'a, REG> WDT_W<'a, REG> +pub type WdtW<'a, REG> = crate::BitWriter<'a, REG, Wdt>; +impl<'a, REG> WdtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDT_AW::VALUE1) + self.variant(Wdt::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDT_AW::VALUE2) + self.variant(Wdt::Value2) } } #[doc = "ETH0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0_AW { +pub enum Eth0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0_AW) -> Self { + fn from(variant: Eth0) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0` writer - ETH0 Gating Clear"] -pub type ETH0_W<'a, REG> = crate::BitWriter<'a, REG, ETH0_AW>; -impl<'a, REG> ETH0_W<'a, REG> +pub type Eth0W<'a, REG> = crate::BitWriter<'a, REG, Eth0>; +impl<'a, REG> Eth0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0_AW::VALUE1) + self.variant(Eth0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0_AW::VALUE2) + self.variant(Eth0::Value2) } } #[doc = "DMA0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0_AW { +pub enum Dma0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0_AW) -> Self { + fn from(variant: Dma0) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0` writer - DMA0 Gating Clear"] -pub type DMA0_W<'a, REG> = crate::BitWriter<'a, REG, DMA0_AW>; -impl<'a, REG> DMA0_W<'a, REG> +pub type Dma0W<'a, REG> = crate::BitWriter<'a, REG, Dma0>; +impl<'a, REG> Dma0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA0_AW::VALUE1) + self.variant(Dma0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA0_AW::VALUE2) + self.variant(Dma0::Value2) } } #[doc = "DMA1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1_AW { +pub enum Dma1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1_AW) -> Self { + fn from(variant: Dma1) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA1` writer - DMA1 Gating Clear"] -pub type DMA1_W<'a, REG> = crate::BitWriter<'a, REG, DMA1_AW>; -impl<'a, REG> DMA1_W<'a, REG> +pub type Dma1W<'a, REG> = crate::BitWriter<'a, REG, Dma1>; +impl<'a, REG> Dma1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA1_AW::VALUE1) + self.variant(Dma1::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA1_AW::VALUE2) + self.variant(Dma1::Value2) } } #[doc = "FCE Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCE_AW { +pub enum Fce { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCE_AW) -> Self { + fn from(variant: Fce) -> Self { variant as u8 != 0 } } #[doc = "Field `FCE` writer - FCE Gating Clear"] -pub type FCE_W<'a, REG> = crate::BitWriter<'a, REG, FCE_AW>; -impl<'a, REG> FCE_W<'a, REG> +pub type FceW<'a, REG> = crate::BitWriter<'a, REG, Fce>; +impl<'a, REG> FceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCE_AW::VALUE1) + self.variant(Fce::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCE_AW::VALUE2) + self.variant(Fce::Value2) } } #[doc = "USB Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USB_AW { +pub enum Usb { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USB_AW) -> Self { + fn from(variant: Usb) -> Self { variant as u8 != 0 } } #[doc = "Field `USB` writer - USB Gating Clear"] -pub type USB_W<'a, REG> = crate::BitWriter<'a, REG, USB_AW>; -impl<'a, REG> USB_W<'a, REG> +pub type UsbW<'a, REG> = crate::BitWriter<'a, REG, Usb>; +impl<'a, REG> UsbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USB_AW::VALUE1) + self.variant(Usb::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USB_AW::VALUE2) + self.variant(Usb::Value2) } } #[doc = "ECAT0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0_AW { +pub enum Ecat0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0_AW) -> Self { + fn from(variant: Ecat0) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0` writer - ECAT0 Gating Clear"] -pub type ECAT0_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0_AW>; -impl<'a, REG> ECAT0_W<'a, REG> +pub type Ecat0W<'a, REG> = crate::BitWriter<'a, REG, Ecat0>; +impl<'a, REG> Ecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0_AW::VALUE1) + self.variant(Ecat0::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0_AW::VALUE2) + self.variant(Ecat0::Value2) } } impl W { #[doc = "Bit 1 - WDT Gating Clear"] #[inline(always)] #[must_use] - pub fn wdt(&mut self) -> WDT_W { - WDT_W::new(self, 1) + pub fn wdt(&mut self) -> WdtW { + WdtW::new(self, 1) } #[doc = "Bit 2 - ETH0 Gating Clear"] #[inline(always)] #[must_use] - pub fn eth0(&mut self) -> ETH0_W { - ETH0_W::new(self, 2) + pub fn eth0(&mut self) -> Eth0W { + Eth0W::new(self, 2) } #[doc = "Bit 4 - DMA0 Gating Clear"] #[inline(always)] #[must_use] - pub fn dma0(&mut self) -> DMA0_W { - DMA0_W::new(self, 4) + pub fn dma0(&mut self) -> Dma0W { + Dma0W::new(self, 4) } #[doc = "Bit 5 - DMA1 Gating Clear"] #[inline(always)] #[must_use] - pub fn dma1(&mut self) -> DMA1_W { - DMA1_W::new(self, 5) + pub fn dma1(&mut self) -> Dma1W { + Dma1W::new(self, 5) } #[doc = "Bit 6 - FCE Gating Clear"] #[inline(always)] #[must_use] - pub fn fce(&mut self) -> FCE_W { - FCE_W::new(self, 6) + pub fn fce(&mut self) -> FceW { + FceW::new(self, 6) } #[doc = "Bit 7 - USB Gating Clear"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self, 7) + pub fn usb(&mut self) -> UsbW { + UsbW::new(self, 7) } #[doc = "Bit 10 - ECAT0 Gating Clear"] #[inline(always)] #[must_use] - pub fn ecat0(&mut self) -> ECAT0_W { - ECAT0_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0(&mut self) -> Ecat0W { + Ecat0W::new(self, 10) } } #[doc = "Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATCLR2_SPEC; -impl crate::RegisterSpec for CGATCLR2_SPEC { +pub struct Cgatclr2Spec; +impl crate::RegisterSpec for Cgatclr2Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr2::W`](W) writer structure"] -impl crate::Writable for CGATCLR2_SPEC { +impl crate::Writable for Cgatclr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR2 to value 0"] -impl crate::Resettable for CGATCLR2_SPEC { +impl crate::Resettable for Cgatclr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr3.rs b/src/scu_clk/cgatclr3.rs index 0bfaafb7..61741c1c 100644 --- a/src/scu_clk/cgatclr3.rs +++ b/src/scu_clk/cgatclr3.rs @@ -1,65 +1,56 @@ #[doc = "Register `CGATCLR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "EBU Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBU_AW { +pub enum Ebu { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBU_AW) -> Self { + fn from(variant: Ebu) -> Self { variant as u8 != 0 } } #[doc = "Field `EBU` writer - EBU Gating Clear"] -pub type EBU_W<'a, REG> = crate::BitWriter<'a, REG, EBU_AW>; -impl<'a, REG> EBU_W<'a, REG> +pub type EbuW<'a, REG> = crate::BitWriter<'a, REG, Ebu>; +impl<'a, REG> EbuW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBU_AW::VALUE1) + self.variant(Ebu::Value1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBU_AW::VALUE2) + self.variant(Ebu::Value2) } } impl W { #[doc = "Bit 2 - EBU Gating Clear"] #[inline(always)] #[must_use] - pub fn ebu(&mut self) -> EBU_W { - EBU_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ebu(&mut self) -> EbuW { + EbuW::new(self, 2) } } #[doc = "Peripheral 3 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr3::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATCLR3_SPEC; -impl crate::RegisterSpec for CGATCLR3_SPEC { +pub struct Cgatclr3Spec; +impl crate::RegisterSpec for Cgatclr3Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr3::W`](W) writer structure"] -impl crate::Writable for CGATCLR3_SPEC { +impl crate::Writable for Cgatclr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR3 to value 0"] -impl crate::Resettable for CGATCLR3_SPEC { +impl crate::Resettable for Cgatclr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset0.rs b/src/scu_clk/cgatset0.rs index ac797ebc..6b88ed34 100644 --- a/src/scu_clk/cgatset0.rs +++ b/src/scu_clk/cgatset0.rs @@ -1,435 +1,426 @@ #[doc = "Register `CGATSET0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADC_AW { +pub enum Vadc { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADC_AW) -> Self { + fn from(variant: Vadc) -> Self { variant as u8 != 0 } } #[doc = "Field `VADC` writer - VADC Gating Set"] -pub type VADC_W<'a, REG> = crate::BitWriter<'a, REG, VADC_AW>; -impl<'a, REG> VADC_W<'a, REG> +pub type VadcW<'a, REG> = crate::BitWriter<'a, REG, Vadc>; +impl<'a, REG> VadcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VADC_AW::VALUE1) + self.variant(Vadc::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VADC_AW::VALUE2) + self.variant(Vadc::Value2) } } #[doc = "DSD Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSD_AW { +pub enum Dsd { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSD_AW) -> Self { + fn from(variant: Dsd) -> Self { variant as u8 != 0 } } #[doc = "Field `DSD` writer - DSD Gating Set"] -pub type DSD_W<'a, REG> = crate::BitWriter<'a, REG, DSD_AW>; -impl<'a, REG> DSD_W<'a, REG> +pub type DsdW<'a, REG> = crate::BitWriter<'a, REG, Dsd>; +impl<'a, REG> DsdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSD_AW::VALUE1) + self.variant(Dsd::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSD_AW::VALUE2) + self.variant(Dsd::Value2) } } #[doc = "CCU40 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40_AW { +pub enum Ccu40 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40_AW) -> Self { + fn from(variant: Ccu40) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40` writer - CCU40 Gating Set"] -pub type CCU40_W<'a, REG> = crate::BitWriter<'a, REG, CCU40_AW>; -impl<'a, REG> CCU40_W<'a, REG> +pub type Ccu40W<'a, REG> = crate::BitWriter<'a, REG, Ccu40>; +impl<'a, REG> Ccu40W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU40_AW::VALUE1) + self.variant(Ccu40::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU40_AW::VALUE2) + self.variant(Ccu40::Value2) } } #[doc = "CCU41 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41_AW { +pub enum Ccu41 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41_AW) -> Self { + fn from(variant: Ccu41) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41` writer - CCU41 Gating Set"] -pub type CCU41_W<'a, REG> = crate::BitWriter<'a, REG, CCU41_AW>; -impl<'a, REG> CCU41_W<'a, REG> +pub type Ccu41W<'a, REG> = crate::BitWriter<'a, REG, Ccu41>; +impl<'a, REG> Ccu41W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU41_AW::VALUE1) + self.variant(Ccu41::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU41_AW::VALUE2) + self.variant(Ccu41::Value2) } } #[doc = "CCU42 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42_AW { +pub enum Ccu42 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42_AW) -> Self { + fn from(variant: Ccu42) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU42` writer - CCU42 Gating Set"] -pub type CCU42_W<'a, REG> = crate::BitWriter<'a, REG, CCU42_AW>; -impl<'a, REG> CCU42_W<'a, REG> +pub type Ccu42W<'a, REG> = crate::BitWriter<'a, REG, Ccu42>; +impl<'a, REG> Ccu42W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU42_AW::VALUE1) + self.variant(Ccu42::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU42_AW::VALUE2) + self.variant(Ccu42::Value2) } } #[doc = "CCU80 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80_AW { +pub enum Ccu80 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80_AW) -> Self { + fn from(variant: Ccu80) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80` writer - CCU80 Gating Set"] -pub type CCU80_W<'a, REG> = crate::BitWriter<'a, REG, CCU80_AW>; -impl<'a, REG> CCU80_W<'a, REG> +pub type Ccu80W<'a, REG> = crate::BitWriter<'a, REG, Ccu80>; +impl<'a, REG> Ccu80W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU80_AW::VALUE1) + self.variant(Ccu80::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU80_AW::VALUE2) + self.variant(Ccu80::Value2) } } #[doc = "CCU81 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81_AW { +pub enum Ccu81 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81_AW) -> Self { + fn from(variant: Ccu81) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU81` writer - CCU81 Gating Set"] -pub type CCU81_W<'a, REG> = crate::BitWriter<'a, REG, CCU81_AW>; -impl<'a, REG> CCU81_W<'a, REG> +pub type Ccu81W<'a, REG> = crate::BitWriter<'a, REG, Ccu81>; +impl<'a, REG> Ccu81W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU81_AW::VALUE1) + self.variant(Ccu81::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU81_AW::VALUE2) + self.variant(Ccu81::Value2) } } #[doc = "POSIF0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0_AW { +pub enum Posif0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0_AW) -> Self { + fn from(variant: Posif0) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0` writer - POSIF0 Gating Set"] -pub type POSIF0_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0_AW>; -impl<'a, REG> POSIF0_W<'a, REG> +pub type Posif0W<'a, REG> = crate::BitWriter<'a, REG, Posif0>; +impl<'a, REG> Posif0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF0_AW::VALUE1) + self.variant(Posif0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF0_AW::VALUE2) + self.variant(Posif0::Value2) } } #[doc = "POSIF1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1_AW { +pub enum Posif1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1_AW) -> Self { + fn from(variant: Posif1) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF1` writer - POSIF1 Gating Set"] -pub type POSIF1_W<'a, REG> = crate::BitWriter<'a, REG, POSIF1_AW>; -impl<'a, REG> POSIF1_W<'a, REG> +pub type Posif1W<'a, REG> = crate::BitWriter<'a, REG, Posif1>; +impl<'a, REG> Posif1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF1_AW::VALUE1) + self.variant(Posif1::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF1_AW::VALUE2) + self.variant(Posif1::Value2) } } #[doc = "USIC0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0_AW { +pub enum Usic0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0_AW) -> Self { + fn from(variant: Usic0) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0` writer - USIC0 Gating Set"] -pub type USIC0_W<'a, REG> = crate::BitWriter<'a, REG, USIC0_AW>; -impl<'a, REG> USIC0_W<'a, REG> +pub type Usic0W<'a, REG> = crate::BitWriter<'a, REG, Usic0>; +impl<'a, REG> Usic0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC0_AW::VALUE1) + self.variant(Usic0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC0_AW::VALUE2) + self.variant(Usic0::Value2) } } #[doc = "ERU1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1_AW { +pub enum Eru1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1_AW) -> Self { + fn from(variant: Eru1) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1` writer - ERU1 Gating Set"] -pub type ERU1_W<'a, REG> = crate::BitWriter<'a, REG, ERU1_AW>; -impl<'a, REG> ERU1_W<'a, REG> +pub type Eru1W<'a, REG> = crate::BitWriter<'a, REG, Eru1>; +impl<'a, REG> Eru1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU1_AW::VALUE1) + self.variant(Eru1::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU1_AW::VALUE2) + self.variant(Eru1::Value2) } } impl W { #[doc = "Bit 0 - VADC Gating Set"] #[inline(always)] #[must_use] - pub fn vadc(&mut self) -> VADC_W { - VADC_W::new(self, 0) + pub fn vadc(&mut self) -> VadcW { + VadcW::new(self, 0) } #[doc = "Bit 1 - DSD Gating Set"] #[inline(always)] #[must_use] - pub fn dsd(&mut self) -> DSD_W { - DSD_W::new(self, 1) + pub fn dsd(&mut self) -> DsdW { + DsdW::new(self, 1) } #[doc = "Bit 2 - CCU40 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu40(&mut self) -> CCU40_W { - CCU40_W::new(self, 2) + pub fn ccu40(&mut self) -> Ccu40W { + Ccu40W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu41(&mut self) -> CCU41_W { - CCU41_W::new(self, 3) + pub fn ccu41(&mut self) -> Ccu41W { + Ccu41W::new(self, 3) } #[doc = "Bit 4 - CCU42 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu42(&mut self) -> CCU42_W { - CCU42_W::new(self, 4) + pub fn ccu42(&mut self) -> Ccu42W { + Ccu42W::new(self, 4) } #[doc = "Bit 7 - CCU80 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu80(&mut self) -> CCU80_W { - CCU80_W::new(self, 7) + pub fn ccu80(&mut self) -> Ccu80W { + Ccu80W::new(self, 7) } #[doc = "Bit 8 - CCU81 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu81(&mut self) -> CCU81_W { - CCU81_W::new(self, 8) + pub fn ccu81(&mut self) -> Ccu81W { + Ccu81W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Gating Set"] #[inline(always)] #[must_use] - pub fn posif0(&mut self) -> POSIF0_W { - POSIF0_W::new(self, 9) + pub fn posif0(&mut self) -> Posif0W { + Posif0W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Gating Set"] #[inline(always)] #[must_use] - pub fn posif1(&mut self) -> POSIF1_W { - POSIF1_W::new(self, 10) + pub fn posif1(&mut self) -> Posif1W { + Posif1W::new(self, 10) } #[doc = "Bit 11 - USIC0 Gating Set"] #[inline(always)] #[must_use] - pub fn usic0(&mut self) -> USIC0_W { - USIC0_W::new(self, 11) + pub fn usic0(&mut self) -> Usic0W { + Usic0W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Set"] #[inline(always)] #[must_use] - pub fn eru1(&mut self) -> ERU1_W { - ERU1_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eru1(&mut self) -> Eru1W { + Eru1W::new(self, 16) } } #[doc = "Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSET0_SPEC; -impl crate::RegisterSpec for CGATSET0_SPEC { +pub struct Cgatset0Spec; +impl crate::RegisterSpec for Cgatset0Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset0::W`](W) writer structure"] -impl crate::Writable for CGATSET0_SPEC { +impl crate::Writable for Cgatset0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET0 to value 0"] -impl crate::Resettable for CGATSET0_SPEC { +impl crate::Resettable for Cgatset0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset1.rs b/src/scu_clk/cgatset1.rs index 271d50b8..3dfedcec 100644 --- a/src/scu_clk/cgatset1.rs +++ b/src/scu_clk/cgatset1.rs @@ -1,324 +1,315 @@ #[doc = "Register `CGATSET1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CCU43 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43_AW { +pub enum Ccu43 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43_AW) -> Self { + fn from(variant: Ccu43) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU43` writer - CCU43 Gating Set"] -pub type CCU43_W<'a, REG> = crate::BitWriter<'a, REG, CCU43_AW>; -impl<'a, REG> CCU43_W<'a, REG> +pub type Ccu43W<'a, REG> = crate::BitWriter<'a, REG, Ccu43>; +impl<'a, REG> Ccu43W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU43_AW::VALUE1) + self.variant(Ccu43::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU43_AW::VALUE2) + self.variant(Ccu43::Value2) } } #[doc = "LEDTS Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0_AW { +pub enum Ledtscu0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0_AW) -> Self { + fn from(variant: Ledtscu0) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0` writer - LEDTS Gating Set"] -pub type LEDTSCU0_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0_AW>; -impl<'a, REG> LEDTSCU0_W<'a, REG> +pub type Ledtscu0W<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0>; +impl<'a, REG> Ledtscu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LEDTSCU0_AW::VALUE1) + self.variant(Ledtscu0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LEDTSCU0_AW::VALUE2) + self.variant(Ledtscu0::Value2) } } #[doc = "MultiCAN Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0_AW { +pub enum Mcan0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0_AW) -> Self { + fn from(variant: Mcan0) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0` writer - MultiCAN Gating Set"] -pub type MCAN0_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0_AW>; -impl<'a, REG> MCAN0_W<'a, REG> +pub type Mcan0W<'a, REG> = crate::BitWriter<'a, REG, Mcan0>; +impl<'a, REG> Mcan0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCAN0_AW::VALUE1) + self.variant(Mcan0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCAN0_AW::VALUE2) + self.variant(Mcan0::Value2) } } #[doc = "DAC Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DAC_AW { +pub enum Dac { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DAC_AW) -> Self { + fn from(variant: Dac) -> Self { variant as u8 != 0 } } #[doc = "Field `DAC` writer - DAC Gating Set"] -pub type DAC_W<'a, REG> = crate::BitWriter<'a, REG, DAC_AW>; -impl<'a, REG> DAC_W<'a, REG> +pub type DacW<'a, REG> = crate::BitWriter<'a, REG, Dac>; +impl<'a, REG> DacW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DAC_AW::VALUE1) + self.variant(Dac::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DAC_AW::VALUE2) + self.variant(Dac::Value2) } } #[doc = "MMC Interface Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCI_AW { +pub enum Mmci { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCI_AW) -> Self { + fn from(variant: Mmci) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCI` writer - MMC Interface Gating Set"] -pub type MMCI_W<'a, REG> = crate::BitWriter<'a, REG, MMCI_AW>; -impl<'a, REG> MMCI_W<'a, REG> +pub type MmciW<'a, REG> = crate::BitWriter<'a, REG, Mmci>; +impl<'a, REG> MmciW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCI_AW::VALUE1) + self.variant(Mmci::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCI_AW::VALUE2) + self.variant(Mmci::Value2) } } #[doc = "USIC1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1_AW { +pub enum Usic1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1_AW) -> Self { + fn from(variant: Usic1) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1` writer - USIC1 Gating Set"] -pub type USIC1_W<'a, REG> = crate::BitWriter<'a, REG, USIC1_AW>; -impl<'a, REG> USIC1_W<'a, REG> +pub type Usic1W<'a, REG> = crate::BitWriter<'a, REG, Usic1>; +impl<'a, REG> Usic1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC1_AW::VALUE1) + self.variant(Usic1::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC1_AW::VALUE2) + self.variant(Usic1::Value2) } } #[doc = "USIC2 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2_AW { +pub enum Usic2 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2_AW) -> Self { + fn from(variant: Usic2) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC2` writer - USIC2 Gating Set"] -pub type USIC2_W<'a, REG> = crate::BitWriter<'a, REG, USIC2_AW>; -impl<'a, REG> USIC2_W<'a, REG> +pub type Usic2W<'a, REG> = crate::BitWriter<'a, REG, Usic2>; +impl<'a, REG> Usic2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC2_AW::VALUE1) + self.variant(Usic2::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC2_AW::VALUE2) + self.variant(Usic2::Value2) } } #[doc = "PORTS Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTS_AW { +pub enum Pports { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTS_AW) -> Self { + fn from(variant: Pports) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTS` writer - PORTS Gating Set"] -pub type PPORTS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTS_AW>; -impl<'a, REG> PPORTS_W<'a, REG> +pub type PportsW<'a, REG> = crate::BitWriter<'a, REG, Pports>; +impl<'a, REG> PportsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPORTS_AW::VALUE1) + self.variant(Pports::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPORTS_AW::VALUE2) + self.variant(Pports::Value2) } } impl W { #[doc = "Bit 0 - CCU43 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu43(&mut self) -> CCU43_W { - CCU43_W::new(self, 0) + pub fn ccu43(&mut self) -> Ccu43W { + Ccu43W::new(self, 0) } #[doc = "Bit 3 - LEDTS Gating Set"] #[inline(always)] #[must_use] - pub fn ledtscu0(&mut self) -> LEDTSCU0_W { - LEDTSCU0_W::new(self, 3) + pub fn ledtscu0(&mut self) -> Ledtscu0W { + Ledtscu0W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Set"] #[inline(always)] #[must_use] - pub fn mcan0(&mut self) -> MCAN0_W { - MCAN0_W::new(self, 4) + pub fn mcan0(&mut self) -> Mcan0W { + Mcan0W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Set"] #[inline(always)] #[must_use] - pub fn dac(&mut self) -> DAC_W { - DAC_W::new(self, 5) + pub fn dac(&mut self) -> DacW { + DacW::new(self, 5) } #[doc = "Bit 6 - MMC Interface Gating Set"] #[inline(always)] #[must_use] - pub fn mmci(&mut self) -> MMCI_W { - MMCI_W::new(self, 6) + pub fn mmci(&mut self) -> MmciW { + MmciW::new(self, 6) } #[doc = "Bit 7 - USIC1 Gating Set"] #[inline(always)] #[must_use] - pub fn usic1(&mut self) -> USIC1_W { - USIC1_W::new(self, 7) + pub fn usic1(&mut self) -> Usic1W { + Usic1W::new(self, 7) } #[doc = "Bit 8 - USIC2 Gating Set"] #[inline(always)] #[must_use] - pub fn usic2(&mut self) -> USIC2_W { - USIC2_W::new(self, 8) + pub fn usic2(&mut self) -> Usic2W { + Usic2W::new(self, 8) } #[doc = "Bit 9 - PORTS Gating Set"] #[inline(always)] #[must_use] - pub fn pports(&mut self) -> PPORTS_W { - PPORTS_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pports(&mut self) -> PportsW { + PportsW::new(self, 9) } } #[doc = "Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSET1_SPEC; -impl crate::RegisterSpec for CGATSET1_SPEC { +pub struct Cgatset1Spec; +impl crate::RegisterSpec for Cgatset1Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset1::W`](W) writer structure"] -impl crate::Writable for CGATSET1_SPEC { +impl crate::Writable for Cgatset1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET1 to value 0"] -impl crate::Resettable for CGATSET1_SPEC { +impl crate::Resettable for Cgatset1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset2.rs b/src/scu_clk/cgatset2.rs index e7a54e37..935cd03e 100644 --- a/src/scu_clk/cgatset2.rs +++ b/src/scu_clk/cgatset2.rs @@ -1,287 +1,278 @@ #[doc = "Register `CGATSET2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDT_AW { +pub enum Wdt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDT_AW) -> Self { + fn from(variant: Wdt) -> Self { variant as u8 != 0 } } #[doc = "Field `WDT` writer - WDT Gating Set"] -pub type WDT_W<'a, REG> = crate::BitWriter<'a, REG, WDT_AW>; -impl<'a, REG> WDT_W<'a, REG> +pub type WdtW<'a, REG> = crate::BitWriter<'a, REG, Wdt>; +impl<'a, REG> WdtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDT_AW::VALUE1) + self.variant(Wdt::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDT_AW::VALUE2) + self.variant(Wdt::Value2) } } #[doc = "ETH0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0_AW { +pub enum Eth0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0_AW) -> Self { + fn from(variant: Eth0) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0` writer - ETH0 Gating Set"] -pub type ETH0_W<'a, REG> = crate::BitWriter<'a, REG, ETH0_AW>; -impl<'a, REG> ETH0_W<'a, REG> +pub type Eth0W<'a, REG> = crate::BitWriter<'a, REG, Eth0>; +impl<'a, REG> Eth0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0_AW::VALUE1) + self.variant(Eth0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0_AW::VALUE2) + self.variant(Eth0::Value2) } } #[doc = "DMA0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0_AW { +pub enum Dma0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0_AW) -> Self { + fn from(variant: Dma0) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0` writer - DMA0 Gating Set"] -pub type DMA0_W<'a, REG> = crate::BitWriter<'a, REG, DMA0_AW>; -impl<'a, REG> DMA0_W<'a, REG> +pub type Dma0W<'a, REG> = crate::BitWriter<'a, REG, Dma0>; +impl<'a, REG> Dma0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA0_AW::VALUE1) + self.variant(Dma0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA0_AW::VALUE2) + self.variant(Dma0::Value2) } } #[doc = "DMA1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1_AW { +pub enum Dma1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1_AW) -> Self { + fn from(variant: Dma1) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA1` writer - DMA1 Gating Set"] -pub type DMA1_W<'a, REG> = crate::BitWriter<'a, REG, DMA1_AW>; -impl<'a, REG> DMA1_W<'a, REG> +pub type Dma1W<'a, REG> = crate::BitWriter<'a, REG, Dma1>; +impl<'a, REG> Dma1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA1_AW::VALUE1) + self.variant(Dma1::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA1_AW::VALUE2) + self.variant(Dma1::Value2) } } #[doc = "FCE Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCE_AW { +pub enum Fce { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCE_AW) -> Self { + fn from(variant: Fce) -> Self { variant as u8 != 0 } } #[doc = "Field `FCE` writer - FCE Gating Set"] -pub type FCE_W<'a, REG> = crate::BitWriter<'a, REG, FCE_AW>; -impl<'a, REG> FCE_W<'a, REG> +pub type FceW<'a, REG> = crate::BitWriter<'a, REG, Fce>; +impl<'a, REG> FceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCE_AW::VALUE1) + self.variant(Fce::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCE_AW::VALUE2) + self.variant(Fce::Value2) } } #[doc = "USB Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USB_AW { +pub enum Usb { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USB_AW) -> Self { + fn from(variant: Usb) -> Self { variant as u8 != 0 } } #[doc = "Field `USB` writer - USB Gating Set"] -pub type USB_W<'a, REG> = crate::BitWriter<'a, REG, USB_AW>; -impl<'a, REG> USB_W<'a, REG> +pub type UsbW<'a, REG> = crate::BitWriter<'a, REG, Usb>; +impl<'a, REG> UsbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USB_AW::VALUE1) + self.variant(Usb::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USB_AW::VALUE2) + self.variant(Usb::Value2) } } #[doc = "ECAT0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0_AW { +pub enum Ecat0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0_AW) -> Self { + fn from(variant: Ecat0) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0` writer - ECAT0 Gating Set"] -pub type ECAT0_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0_AW>; -impl<'a, REG> ECAT0_W<'a, REG> +pub type Ecat0W<'a, REG> = crate::BitWriter<'a, REG, Ecat0>; +impl<'a, REG> Ecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0_AW::VALUE1) + self.variant(Ecat0::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0_AW::VALUE2) + self.variant(Ecat0::Value2) } } impl W { #[doc = "Bit 1 - WDT Gating Set"] #[inline(always)] #[must_use] - pub fn wdt(&mut self) -> WDT_W { - WDT_W::new(self, 1) + pub fn wdt(&mut self) -> WdtW { + WdtW::new(self, 1) } #[doc = "Bit 2 - ETH0 Gating Set"] #[inline(always)] #[must_use] - pub fn eth0(&mut self) -> ETH0_W { - ETH0_W::new(self, 2) + pub fn eth0(&mut self) -> Eth0W { + Eth0W::new(self, 2) } #[doc = "Bit 4 - DMA0 Gating Set"] #[inline(always)] #[must_use] - pub fn dma0(&mut self) -> DMA0_W { - DMA0_W::new(self, 4) + pub fn dma0(&mut self) -> Dma0W { + Dma0W::new(self, 4) } #[doc = "Bit 5 - DMA1 Gating Set"] #[inline(always)] #[must_use] - pub fn dma1(&mut self) -> DMA1_W { - DMA1_W::new(self, 5) + pub fn dma1(&mut self) -> Dma1W { + Dma1W::new(self, 5) } #[doc = "Bit 6 - FCE Gating Set"] #[inline(always)] #[must_use] - pub fn fce(&mut self) -> FCE_W { - FCE_W::new(self, 6) + pub fn fce(&mut self) -> FceW { + FceW::new(self, 6) } #[doc = "Bit 7 - USB Gating Set"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> USB_W { - USB_W::new(self, 7) + pub fn usb(&mut self) -> UsbW { + UsbW::new(self, 7) } #[doc = "Bit 10 - ECAT0 Gating Set"] #[inline(always)] #[must_use] - pub fn ecat0(&mut self) -> ECAT0_W { - ECAT0_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0(&mut self) -> Ecat0W { + Ecat0W::new(self, 10) } } #[doc = "Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSET2_SPEC; -impl crate::RegisterSpec for CGATSET2_SPEC { +pub struct Cgatset2Spec; +impl crate::RegisterSpec for Cgatset2Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset2::W`](W) writer structure"] -impl crate::Writable for CGATSET2_SPEC { +impl crate::Writable for Cgatset2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET2 to value 0"] -impl crate::Resettable for CGATSET2_SPEC { +impl crate::Resettable for Cgatset2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset3.rs b/src/scu_clk/cgatset3.rs index 063fcdd4..c476910a 100644 --- a/src/scu_clk/cgatset3.rs +++ b/src/scu_clk/cgatset3.rs @@ -1,65 +1,56 @@ #[doc = "Register `CGATSET3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "EBU Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBU_AW { +pub enum Ebu { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable gating"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBU_AW) -> Self { + fn from(variant: Ebu) -> Self { variant as u8 != 0 } } #[doc = "Field `EBU` writer - EBU Gating Set"] -pub type EBU_W<'a, REG> = crate::BitWriter<'a, REG, EBU_AW>; -impl<'a, REG> EBU_W<'a, REG> +pub type EbuW<'a, REG> = crate::BitWriter<'a, REG, Ebu>; +impl<'a, REG> EbuW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBU_AW::VALUE1) + self.variant(Ebu::Value1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBU_AW::VALUE2) + self.variant(Ebu::Value2) } } impl W { #[doc = "Bit 2 - EBU Gating Set"] #[inline(always)] #[must_use] - pub fn ebu(&mut self) -> EBU_W { - EBU_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ebu(&mut self) -> EbuW { + EbuW::new(self, 2) } } #[doc = "Peripheral 3 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset3::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSET3_SPEC; -impl crate::RegisterSpec for CGATSET3_SPEC { +pub struct Cgatset3Spec; +impl crate::RegisterSpec for Cgatset3Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset3::W`](W) writer structure"] -impl crate::Writable for CGATSET3_SPEC { +impl crate::Writable for Cgatset3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET3 to value 0"] -impl crate::Resettable for CGATSET3_SPEC { +impl crate::Resettable for Cgatset3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat0.rs b/src/scu_clk/cgatstat0.rs index 3e45182c..bffdcb8b 100644 --- a/src/scu_clk/cgatstat0.rs +++ b/src/scu_clk/cgatstat0.rs @@ -1,466 +1,466 @@ #[doc = "Register `CGATSTAT0` reader"] -pub type R = crate::R; -#[doc = "Field `VADC` reader - VADC Gating Status"] -pub type VADC_R = crate::BitReader; +pub type R = crate::R; #[doc = "VADC Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADC_A { +pub enum Vadc { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADC_A) -> Self { + fn from(variant: Vadc) -> Self { variant as u8 != 0 } } -impl VADC_R { +#[doc = "Field `VADC` reader - VADC Gating Status"] +pub type VadcR = crate::BitReader; +impl VadcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VADC_A { + pub const fn variant(&self) -> Vadc { match self.bits { - false => VADC_A::VALUE1, - true => VADC_A::VALUE2, + false => Vadc::Value1, + true => Vadc::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VADC_A::VALUE1 + *self == Vadc::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VADC_A::VALUE2 + *self == Vadc::Value2 } } -#[doc = "Field `DSD` reader - DSD Gating Status"] -pub type DSD_R = crate::BitReader; #[doc = "DSD Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSD_A { +pub enum Dsd { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSD_A) -> Self { + fn from(variant: Dsd) -> Self { variant as u8 != 0 } } -impl DSD_R { +#[doc = "Field `DSD` reader - DSD Gating Status"] +pub type DsdR = crate::BitReader; +impl DsdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSD_A { + pub const fn variant(&self) -> Dsd { match self.bits { - false => DSD_A::VALUE1, - true => DSD_A::VALUE2, + false => Dsd::Value1, + true => Dsd::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSD_A::VALUE1 + *self == Dsd::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSD_A::VALUE2 + *self == Dsd::Value2 } } -#[doc = "Field `CCU40` reader - CCU40 Gating Status"] -pub type CCU40_R = crate::BitReader; #[doc = "CCU40 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40_A { +pub enum Ccu40 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40_A) -> Self { + fn from(variant: Ccu40) -> Self { variant as u8 != 0 } } -impl CCU40_R { +#[doc = "Field `CCU40` reader - CCU40 Gating Status"] +pub type Ccu40R = crate::BitReader; +impl Ccu40R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU40_A { + pub const fn variant(&self) -> Ccu40 { match self.bits { - false => CCU40_A::VALUE1, - true => CCU40_A::VALUE2, + false => Ccu40::Value1, + true => Ccu40::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU40_A::VALUE1 + *self == Ccu40::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU40_A::VALUE2 + *self == Ccu40::Value2 } } -#[doc = "Field `CCU41` reader - CCU41 Gating Status"] -pub type CCU41_R = crate::BitReader; #[doc = "CCU41 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41_A { +pub enum Ccu41 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41_A) -> Self { + fn from(variant: Ccu41) -> Self { variant as u8 != 0 } } -impl CCU41_R { +#[doc = "Field `CCU41` reader - CCU41 Gating Status"] +pub type Ccu41R = crate::BitReader; +impl Ccu41R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU41_A { + pub const fn variant(&self) -> Ccu41 { match self.bits { - false => CCU41_A::VALUE1, - true => CCU41_A::VALUE2, + false => Ccu41::Value1, + true => Ccu41::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU41_A::VALUE1 + *self == Ccu41::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU41_A::VALUE2 + *self == Ccu41::Value2 } } -#[doc = "Field `CCU42` reader - CCU42 Gating Status"] -pub type CCU42_R = crate::BitReader; #[doc = "CCU42 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42_A { +pub enum Ccu42 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42_A) -> Self { + fn from(variant: Ccu42) -> Self { variant as u8 != 0 } } -impl CCU42_R { +#[doc = "Field `CCU42` reader - CCU42 Gating Status"] +pub type Ccu42R = crate::BitReader; +impl Ccu42R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU42_A { + pub const fn variant(&self) -> Ccu42 { match self.bits { - false => CCU42_A::VALUE1, - true => CCU42_A::VALUE2, + false => Ccu42::Value1, + true => Ccu42::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU42_A::VALUE1 + *self == Ccu42::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU42_A::VALUE2 + *self == Ccu42::Value2 } } -#[doc = "Field `CCU80` reader - CCU80 Gating Status"] -pub type CCU80_R = crate::BitReader; #[doc = "CCU80 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80_A { +pub enum Ccu80 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80_A) -> Self { + fn from(variant: Ccu80) -> Self { variant as u8 != 0 } } -impl CCU80_R { +#[doc = "Field `CCU80` reader - CCU80 Gating Status"] +pub type Ccu80R = crate::BitReader; +impl Ccu80R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU80_A { + pub const fn variant(&self) -> Ccu80 { match self.bits { - false => CCU80_A::VALUE1, - true => CCU80_A::VALUE2, + false => Ccu80::Value1, + true => Ccu80::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU80_A::VALUE1 + *self == Ccu80::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU80_A::VALUE2 + *self == Ccu80::Value2 } } -#[doc = "Field `CCU81` reader - CCU81 Gating Status"] -pub type CCU81_R = crate::BitReader; #[doc = "CCU81 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81_A { +pub enum Ccu81 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81_A) -> Self { + fn from(variant: Ccu81) -> Self { variant as u8 != 0 } } -impl CCU81_R { +#[doc = "Field `CCU81` reader - CCU81 Gating Status"] +pub type Ccu81R = crate::BitReader; +impl Ccu81R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU81_A { + pub const fn variant(&self) -> Ccu81 { match self.bits { - false => CCU81_A::VALUE1, - true => CCU81_A::VALUE2, + false => Ccu81::Value1, + true => Ccu81::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU81_A::VALUE1 + *self == Ccu81::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU81_A::VALUE2 + *self == Ccu81::Value2 } } -#[doc = "Field `POSIF0` reader - POSIF0 Gating Status"] -pub type POSIF0_R = crate::BitReader; #[doc = "POSIF0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0_A { +pub enum Posif0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0_A) -> Self { + fn from(variant: Posif0) -> Self { variant as u8 != 0 } } -impl POSIF0_R { +#[doc = "Field `POSIF0` reader - POSIF0 Gating Status"] +pub type Posif0R = crate::BitReader; +impl Posif0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSIF0_A { + pub const fn variant(&self) -> Posif0 { match self.bits { - false => POSIF0_A::VALUE1, - true => POSIF0_A::VALUE2, + false => Posif0::Value1, + true => Posif0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSIF0_A::VALUE1 + *self == Posif0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSIF0_A::VALUE2 + *self == Posif0::Value2 } } -#[doc = "Field `POSIF1` reader - POSIF1 Gating Status"] -pub type POSIF1_R = crate::BitReader; #[doc = "POSIF1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1_A { +pub enum Posif1 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1_A) -> Self { + fn from(variant: Posif1) -> Self { variant as u8 != 0 } } -impl POSIF1_R { +#[doc = "Field `POSIF1` reader - POSIF1 Gating Status"] +pub type Posif1R = crate::BitReader; +impl Posif1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSIF1_A { + pub const fn variant(&self) -> Posif1 { match self.bits { - false => POSIF1_A::VALUE1, - true => POSIF1_A::VALUE2, + false => Posif1::Value1, + true => Posif1::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSIF1_A::VALUE1 + *self == Posif1::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSIF1_A::VALUE2 + *self == Posif1::Value2 } } -#[doc = "Field `USIC0` reader - USIC0 Gating Status"] -pub type USIC0_R = crate::BitReader; #[doc = "USIC0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0_A { +pub enum Usic0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0_A) -> Self { + fn from(variant: Usic0) -> Self { variant as u8 != 0 } } -impl USIC0_R { +#[doc = "Field `USIC0` reader - USIC0 Gating Status"] +pub type Usic0R = crate::BitReader; +impl Usic0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC0_A { + pub const fn variant(&self) -> Usic0 { match self.bits { - false => USIC0_A::VALUE1, - true => USIC0_A::VALUE2, + false => Usic0::Value1, + true => Usic0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC0_A::VALUE1 + *self == Usic0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC0_A::VALUE2 + *self == Usic0::Value2 } } -#[doc = "Field `ERU1` reader - ERU1 Gating Status"] -pub type ERU1_R = crate::BitReader; #[doc = "ERU1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1_A { +pub enum Eru1 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1_A) -> Self { + fn from(variant: Eru1) -> Self { variant as u8 != 0 } } -impl ERU1_R { +#[doc = "Field `ERU1` reader - ERU1 Gating Status"] +pub type Eru1R = crate::BitReader; +impl Eru1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU1_A { + pub const fn variant(&self) -> Eru1 { match self.bits { - false => ERU1_A::VALUE1, - true => ERU1_A::VALUE2, + false => Eru1::Value1, + true => Eru1::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU1_A::VALUE1 + *self == Eru1::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU1_A::VALUE2 + *self == Eru1::Value2 } } impl R { #[doc = "Bit 0 - VADC Gating Status"] #[inline(always)] - pub fn vadc(&self) -> VADC_R { - VADC_R::new((self.bits & 1) != 0) + pub fn vadc(&self) -> VadcR { + VadcR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DSD Gating Status"] #[inline(always)] - pub fn dsd(&self) -> DSD_R { - DSD_R::new(((self.bits >> 1) & 1) != 0) + pub fn dsd(&self) -> DsdR { + DsdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CCU40 Gating Status"] #[inline(always)] - pub fn ccu40(&self) -> CCU40_R { - CCU40_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccu40(&self) -> Ccu40R { + Ccu40R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CCU41 Gating Status"] #[inline(always)] - pub fn ccu41(&self) -> CCU41_R { - CCU41_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccu41(&self) -> Ccu41R { + Ccu41R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CCU42 Gating Status"] #[inline(always)] - pub fn ccu42(&self) -> CCU42_R { - CCU42_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccu42(&self) -> Ccu42R { + Ccu42R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - CCU80 Gating Status"] #[inline(always)] - pub fn ccu80(&self) -> CCU80_R { - CCU80_R::new(((self.bits >> 7) & 1) != 0) + pub fn ccu80(&self) -> Ccu80R { + Ccu80R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - CCU81 Gating Status"] #[inline(always)] - pub fn ccu81(&self) -> CCU81_R { - CCU81_R::new(((self.bits >> 8) & 1) != 0) + pub fn ccu81(&self) -> Ccu81R { + Ccu81R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - POSIF0 Gating Status"] #[inline(always)] - pub fn posif0(&self) -> POSIF0_R { - POSIF0_R::new(((self.bits >> 9) & 1) != 0) + pub fn posif0(&self) -> Posif0R { + Posif0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - POSIF1 Gating Status"] #[inline(always)] - pub fn posif1(&self) -> POSIF1_R { - POSIF1_R::new(((self.bits >> 10) & 1) != 0) + pub fn posif1(&self) -> Posif1R { + Posif1R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USIC0 Gating Status"] #[inline(always)] - pub fn usic0(&self) -> USIC0_R { - USIC0_R::new(((self.bits >> 11) & 1) != 0) + pub fn usic0(&self) -> Usic0R { + Usic0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - ERU1 Gating Status"] #[inline(always)] - pub fn eru1(&self) -> ERU1_R { - ERU1_R::new(((self.bits >> 16) & 1) != 0) + pub fn eru1(&self) -> Eru1R { + Eru1R::new(((self.bits >> 16) & 1) != 0) } } #[doc = "Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSTAT0_SPEC; -impl crate::RegisterSpec for CGATSTAT0_SPEC { +pub struct Cgatstat0Spec; +impl crate::RegisterSpec for Cgatstat0Spec { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat0::R`](R) reader structure"] -impl crate::Readable for CGATSTAT0_SPEC {} +impl crate::Readable for Cgatstat0Spec {} #[doc = "`reset()` method sets CGATSTAT0 to value 0"] -impl crate::Resettable for CGATSTAT0_SPEC { +impl crate::Resettable for Cgatstat0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat1.rs b/src/scu_clk/cgatstat1.rs index 5abf532d..036f9dc9 100644 --- a/src/scu_clk/cgatstat1.rs +++ b/src/scu_clk/cgatstat1.rs @@ -1,343 +1,343 @@ #[doc = "Register `CGATSTAT1` reader"] -pub type R = crate::R; -#[doc = "Field `CCU43` reader - CCU43 Gating Status"] -pub type CCU43_R = crate::BitReader; +pub type R = crate::R; #[doc = "CCU43 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43_A { +pub enum Ccu43 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43_A) -> Self { + fn from(variant: Ccu43) -> Self { variant as u8 != 0 } } -impl CCU43_R { +#[doc = "Field `CCU43` reader - CCU43 Gating Status"] +pub type Ccu43R = crate::BitReader; +impl Ccu43R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU43_A { + pub const fn variant(&self) -> Ccu43 { match self.bits { - false => CCU43_A::VALUE1, - true => CCU43_A::VALUE2, + false => Ccu43::Value1, + true => Ccu43::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU43_A::VALUE1 + *self == Ccu43::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU43_A::VALUE2 + *self == Ccu43::Value2 } } -#[doc = "Field `LEDTSCU0` reader - LEDTS Gating Status"] -pub type LEDTSCU0_R = crate::BitReader; #[doc = "LEDTS Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0_A { +pub enum Ledtscu0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0_A) -> Self { + fn from(variant: Ledtscu0) -> Self { variant as u8 != 0 } } -impl LEDTSCU0_R { +#[doc = "Field `LEDTSCU0` reader - LEDTS Gating Status"] +pub type Ledtscu0R = crate::BitReader; +impl Ledtscu0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LEDTSCU0_A { + pub const fn variant(&self) -> Ledtscu0 { match self.bits { - false => LEDTSCU0_A::VALUE1, - true => LEDTSCU0_A::VALUE2, + false => Ledtscu0::Value1, + true => Ledtscu0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LEDTSCU0_A::VALUE1 + *self == Ledtscu0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LEDTSCU0_A::VALUE2 + *self == Ledtscu0::Value2 } } -#[doc = "Field `MCAN0` reader - MultiCAN Gating Status"] -pub type MCAN0_R = crate::BitReader; #[doc = "MultiCAN Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0_A { +pub enum Mcan0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0_A) -> Self { + fn from(variant: Mcan0) -> Self { variant as u8 != 0 } } -impl MCAN0_R { +#[doc = "Field `MCAN0` reader - MultiCAN Gating Status"] +pub type Mcan0R = crate::BitReader; +impl Mcan0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCAN0_A { + pub const fn variant(&self) -> Mcan0 { match self.bits { - false => MCAN0_A::VALUE1, - true => MCAN0_A::VALUE2, + false => Mcan0::Value1, + true => Mcan0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCAN0_A::VALUE1 + *self == Mcan0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCAN0_A::VALUE2 + *self == Mcan0::Value2 } } -#[doc = "Field `DAC` reader - DAC Gating Status"] -pub type DAC_R = crate::BitReader; #[doc = "DAC Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DAC_A { +pub enum Dac { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DAC_A) -> Self { + fn from(variant: Dac) -> Self { variant as u8 != 0 } } -impl DAC_R { +#[doc = "Field `DAC` reader - DAC Gating Status"] +pub type DacR = crate::BitReader; +impl DacR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DAC_A { + pub const fn variant(&self) -> Dac { match self.bits { - false => DAC_A::VALUE1, - true => DAC_A::VALUE2, + false => Dac::Value1, + true => Dac::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DAC_A::VALUE1 + *self == Dac::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DAC_A::VALUE2 + *self == Dac::Value2 } } -#[doc = "Field `MMCI` reader - MMC Interface Gating Status"] -pub type MMCI_R = crate::BitReader; #[doc = "MMC Interface Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCI_A { +pub enum Mmci { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCI_A) -> Self { + fn from(variant: Mmci) -> Self { variant as u8 != 0 } } -impl MMCI_R { +#[doc = "Field `MMCI` reader - MMC Interface Gating Status"] +pub type MmciR = crate::BitReader; +impl MmciR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMCI_A { + pub const fn variant(&self) -> Mmci { match self.bits { - false => MMCI_A::VALUE1, - true => MMCI_A::VALUE2, + false => Mmci::Value1, + true => Mmci::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMCI_A::VALUE1 + *self == Mmci::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMCI_A::VALUE2 + *self == Mmci::Value2 } } -#[doc = "Field `USIC1` reader - USIC1 Gating Status"] -pub type USIC1_R = crate::BitReader; #[doc = "USIC1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1_A { +pub enum Usic1 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1_A) -> Self { + fn from(variant: Usic1) -> Self { variant as u8 != 0 } } -impl USIC1_R { +#[doc = "Field `USIC1` reader - USIC1 Gating Status"] +pub type Usic1R = crate::BitReader; +impl Usic1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC1_A { + pub const fn variant(&self) -> Usic1 { match self.bits { - false => USIC1_A::VALUE1, - true => USIC1_A::VALUE2, + false => Usic1::Value1, + true => Usic1::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC1_A::VALUE1 + *self == Usic1::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC1_A::VALUE2 + *self == Usic1::Value2 } } -#[doc = "Field `USIC2` reader - USIC2 Gating Status"] -pub type USIC2_R = crate::BitReader; #[doc = "USIC2 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2_A { +pub enum Usic2 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2_A) -> Self { + fn from(variant: Usic2) -> Self { variant as u8 != 0 } } -impl USIC2_R { +#[doc = "Field `USIC2` reader - USIC2 Gating Status"] +pub type Usic2R = crate::BitReader; +impl Usic2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC2_A { + pub const fn variant(&self) -> Usic2 { match self.bits { - false => USIC2_A::VALUE1, - true => USIC2_A::VALUE2, + false => Usic2::Value1, + true => Usic2::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC2_A::VALUE1 + *self == Usic2::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC2_A::VALUE2 + *self == Usic2::Value2 } } -#[doc = "Field `PPORTS` reader - PORTS Gating Status"] -pub type PPORTS_R = crate::BitReader; #[doc = "PORTS Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTS_A { +pub enum Pports { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTS_A) -> Self { + fn from(variant: Pports) -> Self { variant as u8 != 0 } } -impl PPORTS_R { +#[doc = "Field `PPORTS` reader - PORTS Gating Status"] +pub type PportsR = crate::BitReader; +impl PportsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPORTS_A { + pub const fn variant(&self) -> Pports { match self.bits { - false => PPORTS_A::VALUE1, - true => PPORTS_A::VALUE2, + false => Pports::Value1, + true => Pports::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPORTS_A::VALUE1 + *self == Pports::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPORTS_A::VALUE2 + *self == Pports::Value2 } } impl R { #[doc = "Bit 0 - CCU43 Gating Status"] #[inline(always)] - pub fn ccu43(&self) -> CCU43_R { - CCU43_R::new((self.bits & 1) != 0) + pub fn ccu43(&self) -> Ccu43R { + Ccu43R::new((self.bits & 1) != 0) } #[doc = "Bit 3 - LEDTS Gating Status"] #[inline(always)] - pub fn ledtscu0(&self) -> LEDTSCU0_R { - LEDTSCU0_R::new(((self.bits >> 3) & 1) != 0) + pub fn ledtscu0(&self) -> Ledtscu0R { + Ledtscu0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MultiCAN Gating Status"] #[inline(always)] - pub fn mcan0(&self) -> MCAN0_R { - MCAN0_R::new(((self.bits >> 4) & 1) != 0) + pub fn mcan0(&self) -> Mcan0R { + Mcan0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DAC Gating Status"] #[inline(always)] - pub fn dac(&self) -> DAC_R { - DAC_R::new(((self.bits >> 5) & 1) != 0) + pub fn dac(&self) -> DacR { + DacR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Interface Gating Status"] #[inline(always)] - pub fn mmci(&self) -> MMCI_R { - MMCI_R::new(((self.bits >> 6) & 1) != 0) + pub fn mmci(&self) -> MmciR { + MmciR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USIC1 Gating Status"] #[inline(always)] - pub fn usic1(&self) -> USIC1_R { - USIC1_R::new(((self.bits >> 7) & 1) != 0) + pub fn usic1(&self) -> Usic1R { + Usic1R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - USIC2 Gating Status"] #[inline(always)] - pub fn usic2(&self) -> USIC2_R { - USIC2_R::new(((self.bits >> 8) & 1) != 0) + pub fn usic2(&self) -> Usic2R { + Usic2R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PORTS Gating Status"] #[inline(always)] - pub fn pports(&self) -> PPORTS_R { - PPORTS_R::new(((self.bits >> 9) & 1) != 0) + pub fn pports(&self) -> PportsR { + PportsR::new(((self.bits >> 9) & 1) != 0) } } #[doc = "Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSTAT1_SPEC; -impl crate::RegisterSpec for CGATSTAT1_SPEC { +pub struct Cgatstat1Spec; +impl crate::RegisterSpec for Cgatstat1Spec { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat1::R`](R) reader structure"] -impl crate::Readable for CGATSTAT1_SPEC {} +impl crate::Readable for Cgatstat1Spec {} #[doc = "`reset()` method sets CGATSTAT1 to value 0"] -impl crate::Resettable for CGATSTAT1_SPEC { +impl crate::Resettable for Cgatstat1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat2.rs b/src/scu_clk/cgatstat2.rs index ac4ef14e..2c730abf 100644 --- a/src/scu_clk/cgatstat2.rs +++ b/src/scu_clk/cgatstat2.rs @@ -1,302 +1,302 @@ #[doc = "Register `CGATSTAT2` reader"] -pub type R = crate::R; -#[doc = "Field `WDT` reader - WDT Gating Status"] -pub type WDT_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDT Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDT_A { +pub enum Wdt { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDT_A) -> Self { + fn from(variant: Wdt) -> Self { variant as u8 != 0 } } -impl WDT_R { +#[doc = "Field `WDT` reader - WDT Gating Status"] +pub type WdtR = crate::BitReader; +impl WdtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WDT_A { + pub const fn variant(&self) -> Wdt { match self.bits { - false => WDT_A::VALUE1, - true => WDT_A::VALUE2, + false => Wdt::Value1, + true => Wdt::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDT_A::VALUE1 + *self == Wdt::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDT_A::VALUE2 + *self == Wdt::Value2 } } -#[doc = "Field `ETH0` reader - ETH0 Gating Status"] -pub type ETH0_R = crate::BitReader; #[doc = "ETH0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0_A { +pub enum Eth0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0_A) -> Self { + fn from(variant: Eth0) -> Self { variant as u8 != 0 } } -impl ETH0_R { +#[doc = "Field `ETH0` reader - ETH0 Gating Status"] +pub type Eth0R = crate::BitReader; +impl Eth0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ETH0_A { + pub const fn variant(&self) -> Eth0 { match self.bits { - false => ETH0_A::VALUE1, - true => ETH0_A::VALUE2, + false => Eth0::Value1, + true => Eth0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ETH0_A::VALUE1 + *self == Eth0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ETH0_A::VALUE2 + *self == Eth0::Value2 } } -#[doc = "Field `DMA0` reader - DMA0 Gating Status"] -pub type DMA0_R = crate::BitReader; #[doc = "DMA0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0_A { +pub enum Dma0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0_A) -> Self { + fn from(variant: Dma0) -> Self { variant as u8 != 0 } } -impl DMA0_R { +#[doc = "Field `DMA0` reader - DMA0 Gating Status"] +pub type Dma0R = crate::BitReader; +impl Dma0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA0_A { + pub const fn variant(&self) -> Dma0 { match self.bits { - false => DMA0_A::VALUE1, - true => DMA0_A::VALUE2, + false => Dma0::Value1, + true => Dma0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA0_A::VALUE1 + *self == Dma0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA0_A::VALUE2 + *self == Dma0::Value2 } } -#[doc = "Field `DMA1` reader - DMA1 Gating Status"] -pub type DMA1_R = crate::BitReader; #[doc = "DMA1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1_A { +pub enum Dma1 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1_A) -> Self { + fn from(variant: Dma1) -> Self { variant as u8 != 0 } } -impl DMA1_R { +#[doc = "Field `DMA1` reader - DMA1 Gating Status"] +pub type Dma1R = crate::BitReader; +impl Dma1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA1_A { + pub const fn variant(&self) -> Dma1 { match self.bits { - false => DMA1_A::VALUE1, - true => DMA1_A::VALUE2, + false => Dma1::Value1, + true => Dma1::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA1_A::VALUE1 + *self == Dma1::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA1_A::VALUE2 + *self == Dma1::Value2 } } -#[doc = "Field `FCE` reader - FCE Gating Status"] -pub type FCE_R = crate::BitReader; #[doc = "FCE Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCE_A { +pub enum Fce { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCE_A) -> Self { + fn from(variant: Fce) -> Self { variant as u8 != 0 } } -impl FCE_R { +#[doc = "Field `FCE` reader - FCE Gating Status"] +pub type FceR = crate::BitReader; +impl FceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCE_A { + pub const fn variant(&self) -> Fce { match self.bits { - false => FCE_A::VALUE1, - true => FCE_A::VALUE2, + false => Fce::Value1, + true => Fce::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCE_A::VALUE1 + *self == Fce::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCE_A::VALUE2 + *self == Fce::Value2 } } -#[doc = "Field `USB` reader - USB Gating Status"] -pub type USB_R = crate::BitReader; #[doc = "USB Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USB_A { +pub enum Usb { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USB_A) -> Self { + fn from(variant: Usb) -> Self { variant as u8 != 0 } } -impl USB_R { +#[doc = "Field `USB` reader - USB Gating Status"] +pub type UsbR = crate::BitReader; +impl UsbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USB_A { + pub const fn variant(&self) -> Usb { match self.bits { - false => USB_A::VALUE1, - true => USB_A::VALUE2, + false => Usb::Value1, + true => Usb::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USB_A::VALUE1 + *self == Usb::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USB_A::VALUE2 + *self == Usb::Value2 } } -#[doc = "Field `ECAT0` reader - ECAT0 Gating Status"] -pub type ECAT0_R = crate::BitReader; #[doc = "ECAT0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0_A { +pub enum Ecat0 { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0_A) -> Self { + fn from(variant: Ecat0) -> Self { variant as u8 != 0 } } -impl ECAT0_R { +#[doc = "Field `ECAT0` reader - ECAT0 Gating Status"] +pub type Ecat0R = crate::BitReader; +impl Ecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0_A { + pub const fn variant(&self) -> Ecat0 { match self.bits { - false => ECAT0_A::VALUE1, - true => ECAT0_A::VALUE2, + false => Ecat0::Value1, + true => Ecat0::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0_A::VALUE1 + *self == Ecat0::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0_A::VALUE2 + *self == Ecat0::Value2 } } impl R { #[doc = "Bit 1 - WDT Gating Status"] #[inline(always)] - pub fn wdt(&self) -> WDT_R { - WDT_R::new(((self.bits >> 1) & 1) != 0) + pub fn wdt(&self) -> WdtR { + WdtR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ETH0 Gating Status"] #[inline(always)] - pub fn eth0(&self) -> ETH0_R { - ETH0_R::new(((self.bits >> 2) & 1) != 0) + pub fn eth0(&self) -> Eth0R { + Eth0R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - DMA0 Gating Status"] #[inline(always)] - pub fn dma0(&self) -> DMA0_R { - DMA0_R::new(((self.bits >> 4) & 1) != 0) + pub fn dma0(&self) -> Dma0R { + Dma0R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA1 Gating Status"] #[inline(always)] - pub fn dma1(&self) -> DMA1_R { - DMA1_R::new(((self.bits >> 5) & 1) != 0) + pub fn dma1(&self) -> Dma1R { + Dma1R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - FCE Gating Status"] #[inline(always)] - pub fn fce(&self) -> FCE_R { - FCE_R::new(((self.bits >> 6) & 1) != 0) + pub fn fce(&self) -> FceR { + FceR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USB Gating Status"] #[inline(always)] - pub fn usb(&self) -> USB_R { - USB_R::new(((self.bits >> 7) & 1) != 0) + pub fn usb(&self) -> UsbR { + UsbR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - ECAT0 Gating Status"] #[inline(always)] - pub fn ecat0(&self) -> ECAT0_R { - ECAT0_R::new(((self.bits >> 10) & 1) != 0) + pub fn ecat0(&self) -> Ecat0R { + Ecat0R::new(((self.bits >> 10) & 1) != 0) } } #[doc = "Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSTAT2_SPEC; -impl crate::RegisterSpec for CGATSTAT2_SPEC { +pub struct Cgatstat2Spec; +impl crate::RegisterSpec for Cgatstat2Spec { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat2::R`](R) reader structure"] -impl crate::Readable for CGATSTAT2_SPEC {} +impl crate::Readable for Cgatstat2Spec {} #[doc = "`reset()` method sets CGATSTAT2 to value 0"] -impl crate::Resettable for CGATSTAT2_SPEC { +impl crate::Resettable for Cgatstat2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat3.rs b/src/scu_clk/cgatstat3.rs index 1912bed5..77859486 100644 --- a/src/scu_clk/cgatstat3.rs +++ b/src/scu_clk/cgatstat3.rs @@ -1,56 +1,56 @@ #[doc = "Register `CGATSTAT3` reader"] -pub type R = crate::R; -#[doc = "Field `EBU` reader - EBU Gating Status"] -pub type EBU_R = crate::BitReader; +pub type R = crate::R; #[doc = "EBU Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBU_A { +pub enum Ebu { #[doc = "0: Gating de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Gating asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBU_A) -> Self { + fn from(variant: Ebu) -> Self { variant as u8 != 0 } } -impl EBU_R { +#[doc = "Field `EBU` reader - EBU Gating Status"] +pub type EbuR = crate::BitReader; +impl EbuR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBU_A { + pub const fn variant(&self) -> Ebu { match self.bits { - false => EBU_A::VALUE1, - true => EBU_A::VALUE2, + false => Ebu::Value1, + true => Ebu::Value2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBU_A::VALUE1 + *self == Ebu::Value1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBU_A::VALUE2 + *self == Ebu::Value2 } } impl R { #[doc = "Bit 2 - EBU Gating Status"] #[inline(always)] - pub fn ebu(&self) -> EBU_R { - EBU_R::new(((self.bits >> 2) & 1) != 0) + pub fn ebu(&self) -> EbuR { + EbuR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "Peripheral 3 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CGATSTAT3_SPEC; -impl crate::RegisterSpec for CGATSTAT3_SPEC { +pub struct Cgatstat3Spec; +impl crate::RegisterSpec for Cgatstat3Spec { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat3::R`](R) reader structure"] -impl crate::Readable for CGATSTAT3_SPEC {} +impl crate::Readable for Cgatstat3Spec {} #[doc = "`reset()` method sets CGATSTAT3 to value 0"] -impl crate::Resettable for CGATSTAT3_SPEC { +impl crate::Resettable for Cgatstat3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkclr.rs b/src/scu_clk/clkclr.rs index 6ed62861..1b9c9496 100644 --- a/src/scu_clk/clkclr.rs +++ b/src/scu_clk/clkclr.rs @@ -1,250 +1,241 @@ #[doc = "Register `CLKCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "USB Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBCDI_AW { +pub enum Usbcdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBCDI_AW) -> Self { + fn from(variant: Usbcdi) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCDI` writer - USB Clock Disable"] -pub type USBCDI_W<'a, REG> = crate::BitWriter<'a, REG, USBCDI_AW>; -impl<'a, REG> USBCDI_W<'a, REG> +pub type UsbcdiW<'a, REG> = crate::BitWriter<'a, REG, Usbcdi>; +impl<'a, REG> UsbcdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBCDI_AW::VALUE1) + self.variant(Usbcdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBCDI_AW::VALUE2) + self.variant(Usbcdi::Value2) } } #[doc = "MMC Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCCDI_AW { +pub enum Mmccdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCCDI_AW) -> Self { + fn from(variant: Mmccdi) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCCDI` writer - MMC Clock Disable"] -pub type MMCCDI_W<'a, REG> = crate::BitWriter<'a, REG, MMCCDI_AW>; -impl<'a, REG> MMCCDI_W<'a, REG> +pub type MmccdiW<'a, REG> = crate::BitWriter<'a, REG, Mmccdi>; +impl<'a, REG> MmccdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCCDI_AW::VALUE1) + self.variant(Mmccdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCCDI_AW::VALUE2) + self.variant(Mmccdi::Value2) } } #[doc = "Ethernet Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0CDI_AW { +pub enum Eth0cdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0CDI_AW) -> Self { + fn from(variant: Eth0cdi) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0CDI` writer - Ethernet Clock Disable"] -pub type ETH0CDI_W<'a, REG> = crate::BitWriter<'a, REG, ETH0CDI_AW>; -impl<'a, REG> ETH0CDI_W<'a, REG> +pub type Eth0cdiW<'a, REG> = crate::BitWriter<'a, REG, Eth0cdi>; +impl<'a, REG> Eth0cdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0CDI_AW::VALUE1) + self.variant(Eth0cdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0CDI_AW::VALUE2) + self.variant(Eth0cdi::Value2) } } #[doc = "EBU Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBUCDI_AW { +pub enum Ebucdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBUCDI_AW) -> Self { + fn from(variant: Ebucdi) -> Self { variant as u8 != 0 } } #[doc = "Field `EBUCDI` writer - EBU Clock Disable"] -pub type EBUCDI_W<'a, REG> = crate::BitWriter<'a, REG, EBUCDI_AW>; -impl<'a, REG> EBUCDI_W<'a, REG> +pub type EbucdiW<'a, REG> = crate::BitWriter<'a, REG, Ebucdi>; +impl<'a, REG> EbucdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBUCDI_AW::VALUE1) + self.variant(Ebucdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBUCDI_AW::VALUE2) + self.variant(Ebucdi::Value2) } } #[doc = "CCU Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUCDI_AW { +pub enum Ccucdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUCDI_AW) -> Self { + fn from(variant: Ccucdi) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCDI` writer - CCU Clock Disable"] -pub type CCUCDI_W<'a, REG> = crate::BitWriter<'a, REG, CCUCDI_AW>; -impl<'a, REG> CCUCDI_W<'a, REG> +pub type CcucdiW<'a, REG> = crate::BitWriter<'a, REG, Ccucdi>; +impl<'a, REG> CcucdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUCDI_AW::VALUE1) + self.variant(Ccucdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUCDI_AW::VALUE2) + self.variant(Ccucdi::Value2) } } #[doc = "WDT Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTCDI_AW { +pub enum Wdtcdi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTCDI_AW) -> Self { + fn from(variant: Wdtcdi) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCDI` writer - WDT Clock Disable"] -pub type WDTCDI_W<'a, REG> = crate::BitWriter<'a, REG, WDTCDI_AW>; -impl<'a, REG> WDTCDI_W<'a, REG> +pub type WdtcdiW<'a, REG> = crate::BitWriter<'a, REG, Wdtcdi>; +impl<'a, REG> WdtcdiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTCDI_AW::VALUE1) + self.variant(Wdtcdi::Value1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTCDI_AW::VALUE2) + self.variant(Wdtcdi::Value2) } } impl W { #[doc = "Bit 0 - USB Clock Disable"] #[inline(always)] #[must_use] - pub fn usbcdi(&mut self) -> USBCDI_W { - USBCDI_W::new(self, 0) + pub fn usbcdi(&mut self) -> UsbcdiW { + UsbcdiW::new(self, 0) } #[doc = "Bit 1 - MMC Clock Disable"] #[inline(always)] #[must_use] - pub fn mmccdi(&mut self) -> MMCCDI_W { - MMCCDI_W::new(self, 1) + pub fn mmccdi(&mut self) -> MmccdiW { + MmccdiW::new(self, 1) } #[doc = "Bit 2 - Ethernet Clock Disable"] #[inline(always)] #[must_use] - pub fn eth0cdi(&mut self) -> ETH0CDI_W { - ETH0CDI_W::new(self, 2) + pub fn eth0cdi(&mut self) -> Eth0cdiW { + Eth0cdiW::new(self, 2) } #[doc = "Bit 3 - EBU Clock Disable"] #[inline(always)] #[must_use] - pub fn ebucdi(&mut self) -> EBUCDI_W { - EBUCDI_W::new(self, 3) + pub fn ebucdi(&mut self) -> EbucdiW { + EbucdiW::new(self, 3) } #[doc = "Bit 4 - CCU Clock Disable"] #[inline(always)] #[must_use] - pub fn ccucdi(&mut self) -> CCUCDI_W { - CCUCDI_W::new(self, 4) + pub fn ccucdi(&mut self) -> CcucdiW { + CcucdiW::new(self, 4) } #[doc = "Bit 5 - WDT Clock Disable"] #[inline(always)] #[must_use] - pub fn wdtcdi(&mut self) -> WDTCDI_W { - WDTCDI_W::new(self, 5) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wdtcdi(&mut self) -> WdtcdiW { + WdtcdiW::new(self, 5) } } #[doc = "CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKCLR_SPEC; -impl crate::RegisterSpec for CLKCLR_SPEC { +pub struct ClkclrSpec; +impl crate::RegisterSpec for ClkclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clkclr::W`](W) writer structure"] -impl crate::Writable for CLKCLR_SPEC { +impl crate::Writable for ClkclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKCLR to value 0"] -impl crate::Resettable for CLKCLR_SPEC { +impl crate::Resettable for ClkclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkset.rs b/src/scu_clk/clkset.rs index 3e8a889a..9ab69e82 100644 --- a/src/scu_clk/clkset.rs +++ b/src/scu_clk/clkset.rs @@ -1,250 +1,241 @@ #[doc = "Register `CLKSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "USB Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBCEN_AW { +pub enum Usbcen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBCEN_AW) -> Self { + fn from(variant: Usbcen) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCEN` writer - USB Clock Enable"] -pub type USBCEN_W<'a, REG> = crate::BitWriter<'a, REG, USBCEN_AW>; -impl<'a, REG> USBCEN_W<'a, REG> +pub type UsbcenW<'a, REG> = crate::BitWriter<'a, REG, Usbcen>; +impl<'a, REG> UsbcenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBCEN_AW::VALUE1) + self.variant(Usbcen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBCEN_AW::VALUE2) + self.variant(Usbcen::Value2) } } #[doc = "MMC Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCCEN_AW { +pub enum Mmccen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCCEN_AW) -> Self { + fn from(variant: Mmccen) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCCEN` writer - MMC Clock Enable"] -pub type MMCCEN_W<'a, REG> = crate::BitWriter<'a, REG, MMCCEN_AW>; -impl<'a, REG> MMCCEN_W<'a, REG> +pub type MmccenW<'a, REG> = crate::BitWriter<'a, REG, Mmccen>; +impl<'a, REG> MmccenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCCEN_AW::VALUE1) + self.variant(Mmccen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCCEN_AW::VALUE2) + self.variant(Mmccen::Value2) } } #[doc = "Ethernet Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0CEN_AW { +pub enum Eth0cen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0CEN_AW) -> Self { + fn from(variant: Eth0cen) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0CEN` writer - Ethernet Clock Enable"] -pub type ETH0CEN_W<'a, REG> = crate::BitWriter<'a, REG, ETH0CEN_AW>; -impl<'a, REG> ETH0CEN_W<'a, REG> +pub type Eth0cenW<'a, REG> = crate::BitWriter<'a, REG, Eth0cen>; +impl<'a, REG> Eth0cenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0CEN_AW::VALUE1) + self.variant(Eth0cen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0CEN_AW::VALUE2) + self.variant(Eth0cen::Value2) } } #[doc = "EBU Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBUCEN_AW { +pub enum Ebucen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBUCEN_AW) -> Self { + fn from(variant: Ebucen) -> Self { variant as u8 != 0 } } #[doc = "Field `EBUCEN` writer - EBU Clock Enable"] -pub type EBUCEN_W<'a, REG> = crate::BitWriter<'a, REG, EBUCEN_AW>; -impl<'a, REG> EBUCEN_W<'a, REG> +pub type EbucenW<'a, REG> = crate::BitWriter<'a, REG, Ebucen>; +impl<'a, REG> EbucenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBUCEN_AW::VALUE1) + self.variant(Ebucen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBUCEN_AW::VALUE2) + self.variant(Ebucen::Value2) } } #[doc = "CCU Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUCEN_AW { +pub enum Ccucen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUCEN_AW) -> Self { + fn from(variant: Ccucen) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCEN` writer - CCU Clock Enable"] -pub type CCUCEN_W<'a, REG> = crate::BitWriter<'a, REG, CCUCEN_AW>; -impl<'a, REG> CCUCEN_W<'a, REG> +pub type CcucenW<'a, REG> = crate::BitWriter<'a, REG, Ccucen>; +impl<'a, REG> CcucenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUCEN_AW::VALUE1) + self.variant(Ccucen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUCEN_AW::VALUE2) + self.variant(Ccucen::Value2) } } #[doc = "WDT Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTCEN_AW { +pub enum Wdtcen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTCEN_AW) -> Self { + fn from(variant: Wdtcen) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCEN` writer - WDT Clock Enable"] -pub type WDTCEN_W<'a, REG> = crate::BitWriter<'a, REG, WDTCEN_AW>; -impl<'a, REG> WDTCEN_W<'a, REG> +pub type WdtcenW<'a, REG> = crate::BitWriter<'a, REG, Wdtcen>; +impl<'a, REG> WdtcenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTCEN_AW::VALUE1) + self.variant(Wdtcen::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTCEN_AW::VALUE2) + self.variant(Wdtcen::Value2) } } impl W { #[doc = "Bit 0 - USB Clock Enable"] #[inline(always)] #[must_use] - pub fn usbcen(&mut self) -> USBCEN_W { - USBCEN_W::new(self, 0) + pub fn usbcen(&mut self) -> UsbcenW { + UsbcenW::new(self, 0) } #[doc = "Bit 1 - MMC Clock Enable"] #[inline(always)] #[must_use] - pub fn mmccen(&mut self) -> MMCCEN_W { - MMCCEN_W::new(self, 1) + pub fn mmccen(&mut self) -> MmccenW { + MmccenW::new(self, 1) } #[doc = "Bit 2 - Ethernet Clock Enable"] #[inline(always)] #[must_use] - pub fn eth0cen(&mut self) -> ETH0CEN_W { - ETH0CEN_W::new(self, 2) + pub fn eth0cen(&mut self) -> Eth0cenW { + Eth0cenW::new(self, 2) } #[doc = "Bit 3 - EBU Clock Enable"] #[inline(always)] #[must_use] - pub fn ebucen(&mut self) -> EBUCEN_W { - EBUCEN_W::new(self, 3) + pub fn ebucen(&mut self) -> EbucenW { + EbucenW::new(self, 3) } #[doc = "Bit 4 - CCU Clock Enable"] #[inline(always)] #[must_use] - pub fn ccucen(&mut self) -> CCUCEN_W { - CCUCEN_W::new(self, 4) + pub fn ccucen(&mut self) -> CcucenW { + CcucenW::new(self, 4) } #[doc = "Bit 5 - WDT Clock Enable"] #[inline(always)] #[must_use] - pub fn wdtcen(&mut self) -> WDTCEN_W { - WDTCEN_W::new(self, 5) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wdtcen(&mut self) -> WdtcenW { + WdtcenW::new(self, 5) } } #[doc = "CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKSET_SPEC; -impl crate::RegisterSpec for CLKSET_SPEC { +pub struct ClksetSpec; +impl crate::RegisterSpec for ClksetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clkset::W`](W) writer structure"] -impl crate::Writable for CLKSET_SPEC { +impl crate::Writable for ClksetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSET to value 0"] -impl crate::Resettable for CLKSET_SPEC { +impl crate::Resettable for ClksetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkstat.rs b/src/scu_clk/clkstat.rs index 22d35a37..37d6fbeb 100644 --- a/src/scu_clk/clkstat.rs +++ b/src/scu_clk/clkstat.rs @@ -1,261 +1,261 @@ #[doc = "Register `CLKSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `USBCST` reader - USB Clock Status"] -pub type USBCST_R = crate::BitReader; +pub type R = crate::R; #[doc = "USB Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBCST_A { +pub enum Usbcst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBCST_A) -> Self { + fn from(variant: Usbcst) -> Self { variant as u8 != 0 } } -impl USBCST_R { +#[doc = "Field `USBCST` reader - USB Clock Status"] +pub type UsbcstR = crate::BitReader; +impl UsbcstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBCST_A { + pub const fn variant(&self) -> Usbcst { match self.bits { - false => USBCST_A::VALUE1, - true => USBCST_A::VALUE2, + false => Usbcst::Value1, + true => Usbcst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBCST_A::VALUE1 + *self == Usbcst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBCST_A::VALUE2 + *self == Usbcst::Value2 } } -#[doc = "Field `MMCCST` reader - MMC Clock Status"] -pub type MMCCST_R = crate::BitReader; #[doc = "MMC Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCCST_A { +pub enum Mmccst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCCST_A) -> Self { + fn from(variant: Mmccst) -> Self { variant as u8 != 0 } } -impl MMCCST_R { +#[doc = "Field `MMCCST` reader - MMC Clock Status"] +pub type MmccstR = crate::BitReader; +impl MmccstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMCCST_A { + pub const fn variant(&self) -> Mmccst { match self.bits { - false => MMCCST_A::VALUE1, - true => MMCCST_A::VALUE2, + false => Mmccst::Value1, + true => Mmccst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMCCST_A::VALUE1 + *self == Mmccst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMCCST_A::VALUE2 + *self == Mmccst::Value2 } } -#[doc = "Field `ETH0CST` reader - Ethernet Clock Status"] -pub type ETH0CST_R = crate::BitReader; #[doc = "Ethernet Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0CST_A { +pub enum Eth0cst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0CST_A) -> Self { + fn from(variant: Eth0cst) -> Self { variant as u8 != 0 } } -impl ETH0CST_R { +#[doc = "Field `ETH0CST` reader - Ethernet Clock Status"] +pub type Eth0cstR = crate::BitReader; +impl Eth0cstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ETH0CST_A { + pub const fn variant(&self) -> Eth0cst { match self.bits { - false => ETH0CST_A::VALUE1, - true => ETH0CST_A::VALUE2, + false => Eth0cst::Value1, + true => Eth0cst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ETH0CST_A::VALUE1 + *self == Eth0cst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ETH0CST_A::VALUE2 + *self == Eth0cst::Value2 } } -#[doc = "Field `EBUCST` reader - EBU Clock Status"] -pub type EBUCST_R = crate::BitReader; #[doc = "EBU Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBUCST_A { +pub enum Ebucst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBUCST_A) -> Self { + fn from(variant: Ebucst) -> Self { variant as u8 != 0 } } -impl EBUCST_R { +#[doc = "Field `EBUCST` reader - EBU Clock Status"] +pub type EbucstR = crate::BitReader; +impl EbucstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBUCST_A { + pub const fn variant(&self) -> Ebucst { match self.bits { - false => EBUCST_A::VALUE1, - true => EBUCST_A::VALUE2, + false => Ebucst::Value1, + true => Ebucst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBUCST_A::VALUE1 + *self == Ebucst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBUCST_A::VALUE2 + *self == Ebucst::Value2 } } -#[doc = "Field `CCUCST` reader - CCU Clock Status"] -pub type CCUCST_R = crate::BitReader; #[doc = "CCU Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUCST_A { +pub enum Ccucst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUCST_A) -> Self { + fn from(variant: Ccucst) -> Self { variant as u8 != 0 } } -impl CCUCST_R { +#[doc = "Field `CCUCST` reader - CCU Clock Status"] +pub type CcucstR = crate::BitReader; +impl CcucstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCUCST_A { + pub const fn variant(&self) -> Ccucst { match self.bits { - false => CCUCST_A::VALUE1, - true => CCUCST_A::VALUE2, + false => Ccucst::Value1, + true => Ccucst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCUCST_A::VALUE1 + *self == Ccucst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCUCST_A::VALUE2 + *self == Ccucst::Value2 } } -#[doc = "Field `WDTCST` reader - WDT Clock Status"] -pub type WDTCST_R = crate::BitReader; #[doc = "WDT Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTCST_A { +pub enum Wdtcst { #[doc = "0: Clock disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clock enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTCST_A) -> Self { + fn from(variant: Wdtcst) -> Self { variant as u8 != 0 } } -impl WDTCST_R { +#[doc = "Field `WDTCST` reader - WDT Clock Status"] +pub type WdtcstR = crate::BitReader; +impl WdtcstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WDTCST_A { + pub const fn variant(&self) -> Wdtcst { match self.bits { - false => WDTCST_A::VALUE1, - true => WDTCST_A::VALUE2, + false => Wdtcst::Value1, + true => Wdtcst::Value2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTCST_A::VALUE1 + *self == Wdtcst::Value1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTCST_A::VALUE2 + *self == Wdtcst::Value2 } } impl R { #[doc = "Bit 0 - USB Clock Status"] #[inline(always)] - pub fn usbcst(&self) -> USBCST_R { - USBCST_R::new((self.bits & 1) != 0) + pub fn usbcst(&self) -> UsbcstR { + UsbcstR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - MMC Clock Status"] #[inline(always)] - pub fn mmccst(&self) -> MMCCST_R { - MMCCST_R::new(((self.bits >> 1) & 1) != 0) + pub fn mmccst(&self) -> MmccstR { + MmccstR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Ethernet Clock Status"] #[inline(always)] - pub fn eth0cst(&self) -> ETH0CST_R { - ETH0CST_R::new(((self.bits >> 2) & 1) != 0) + pub fn eth0cst(&self) -> Eth0cstR { + Eth0cstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - EBU Clock Status"] #[inline(always)] - pub fn ebucst(&self) -> EBUCST_R { - EBUCST_R::new(((self.bits >> 3) & 1) != 0) + pub fn ebucst(&self) -> EbucstR { + EbucstR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CCU Clock Status"] #[inline(always)] - pub fn ccucst(&self) -> CCUCST_R { - CCUCST_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccucst(&self) -> CcucstR { + CcucstR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WDT Clock Status"] #[inline(always)] - pub fn wdtcst(&self) -> WDTCST_R { - WDTCST_R::new(((self.bits >> 5) & 1) != 0) + pub fn wdtcst(&self) -> WdtcstR { + WdtcstR::new(((self.bits >> 5) & 1) != 0) } } #[doc = "Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKSTAT_SPEC; -impl crate::RegisterSpec for CLKSTAT_SPEC { +pub struct ClkstatSpec; +impl crate::RegisterSpec for ClkstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`clkstat::R`](R) reader structure"] -impl crate::Readable for CLKSTAT_SPEC {} +impl crate::Readable for ClkstatSpec {} #[doc = "`reset()` method sets CLKSTAT to value 0"] -impl crate::Resettable for CLKSTAT_SPEC { +impl crate::Resettable for ClkstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cpuclkcr.rs b/src/scu_clk/cpuclkcr.rs index 3994ad60..d39d959c 100644 --- a/src/scu_clk/cpuclkcr.rs +++ b/src/scu_clk/cpuclkcr.rs @@ -1,98 +1,89 @@ #[doc = "Register `CPUCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CPUCLKCR` writer"] -pub type W = crate::W; -#[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] -pub type CPUDIV_R = crate::BitReader; +pub type W = crate::W; #[doc = "CPU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CPUDIV_A { +pub enum Cpudiv { #[doc = "0: fCPU = fSYS"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCPU = fSYS / 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CPUDIV_A) -> Self { + fn from(variant: Cpudiv) -> Self { variant as u8 != 0 } } -impl CPUDIV_R { +#[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] +pub type CpudivR = crate::BitReader; +impl CpudivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CPUDIV_A { + pub const fn variant(&self) -> Cpudiv { match self.bits { - false => CPUDIV_A::VALUE1, - true => CPUDIV_A::VALUE2, + false => Cpudiv::Value1, + true => Cpudiv::Value2, } } #[doc = "fCPU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CPUDIV_A::VALUE1 + *self == Cpudiv::Value1 } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CPUDIV_A::VALUE2 + *self == Cpudiv::Value2 } } #[doc = "Field `CPUDIV` writer - CPU Clock Divider Enable"] -pub type CPUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CPUDIV_A>; -impl<'a, REG> CPUDIV_W<'a, REG> +pub type CpudivW<'a, REG> = crate::BitWriter<'a, REG, Cpudiv>; +impl<'a, REG> CpudivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCPU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CPUDIV_A::VALUE1) + self.variant(Cpudiv::Value1) } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CPUDIV_A::VALUE2) + self.variant(Cpudiv::Value2) } } impl R { #[doc = "Bit 0 - CPU Clock Divider Enable"] #[inline(always)] - pub fn cpudiv(&self) -> CPUDIV_R { - CPUDIV_R::new((self.bits & 1) != 0) + pub fn cpudiv(&self) -> CpudivR { + CpudivR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CPU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn cpudiv(&mut self) -> CPUDIV_W { - CPUDIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cpudiv(&mut self) -> CpudivW { + CpudivW::new(self, 0) } } #[doc = "CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CPUCLKCR_SPEC; -impl crate::RegisterSpec for CPUCLKCR_SPEC { +pub struct CpuclkcrSpec; +impl crate::RegisterSpec for CpuclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`cpuclkcr::R`](R) reader structure"] -impl crate::Readable for CPUCLKCR_SPEC {} +impl crate::Readable for CpuclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`cpuclkcr::W`](W) writer structure"] -impl crate::Writable for CPUCLKCR_SPEC { +impl crate::Writable for CpuclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CPUCLKCR to value 0"] -impl crate::Resettable for CPUCLKCR_SPEC { +impl crate::Resettable for CpuclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/dsleepcr.rs b/src/scu_clk/dsleepcr.rs index fbdca6ef..1ec6e727 100644 --- a/src/scu_clk/dsleepcr.rs +++ b/src/scu_clk/dsleepcr.rs @@ -1,51 +1,51 @@ #[doc = "Register `DSLEEPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSLEEPCR` writer"] -pub type W = crate::W; -#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SYSSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYSSEL_A { +pub enum Syssel { #[doc = "0: fOFI clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPLL clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYSSEL_A) -> Self { + fn from(variant: Syssel) -> Self { variant as _ } } -impl crate::FieldSpec for SYSSEL_A { +impl crate::FieldSpec for Syssel { type Ux = u8; } -impl SYSSEL_R { +#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] +pub type SysselR = crate::FieldReader; +impl SysselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SYSSEL_A::VALUE1), - 1 => Some(SYSSEL_A::VALUE2), + 0 => Some(Syssel::Value1), + 1 => Some(Syssel::Value2), _ => None, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSSEL_A::VALUE1 + *self == Syssel::Value1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYSSEL_A::VALUE2 + *self == Syssel::Value2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SYSSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SYSSEL_A>; -impl<'a, REG> SYSSEL_W<'a, REG> +pub type SysselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Syssel>; +impl<'a, REG> SysselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,628 +53,619 @@ where #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE1) + self.variant(Syssel::Value1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE2) + self.variant(Syssel::Value2) } } -#[doc = "Field `FPDN` reader - Flash Power Down"] -pub type FPDN_R = crate::BitReader; #[doc = "Flash Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FPDN_A { +pub enum Fpdn { #[doc = "1: Flash power down module"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: No effect"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FPDN_A) -> Self { + fn from(variant: Fpdn) -> Self { variant as u8 != 0 } } -impl FPDN_R { +#[doc = "Field `FPDN` reader - Flash Power Down"] +pub type FpdnR = crate::BitReader; +impl FpdnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FPDN_A { + pub const fn variant(&self) -> Fpdn { match self.bits { - true => FPDN_A::VALUE1, - false => FPDN_A::VALUE2, + true => Fpdn::Value1, + false => Fpdn::Value2, } } #[doc = "Flash power down module"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FPDN_A::VALUE1 + *self == Fpdn::Value1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FPDN_A::VALUE2 + *self == Fpdn::Value2 } } #[doc = "Field `FPDN` writer - Flash Power Down"] -pub type FPDN_W<'a, REG> = crate::BitWriter<'a, REG, FPDN_A>; -impl<'a, REG> FPDN_W<'a, REG> +pub type FpdnW<'a, REG> = crate::BitWriter<'a, REG, Fpdn>; +impl<'a, REG> FpdnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flash power down module"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FPDN_A::VALUE1) + self.variant(Fpdn::Value1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FPDN_A::VALUE2) + self.variant(Fpdn::Value2) } } -#[doc = "Field `PLLPDN` reader - PLL Power Down"] -pub type PLLPDN_R = crate::BitReader; #[doc = "PLL Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLPDN_A { +pub enum Pllpdn { #[doc = "1: Switch off main PLL"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: No effect"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLPDN_A) -> Self { + fn from(variant: Pllpdn) -> Self { variant as u8 != 0 } } -impl PLLPDN_R { +#[doc = "Field `PLLPDN` reader - PLL Power Down"] +pub type PllpdnR = crate::BitReader; +impl PllpdnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLPDN_A { + pub const fn variant(&self) -> Pllpdn { match self.bits { - true => PLLPDN_A::VALUE1, - false => PLLPDN_A::VALUE2, + true => Pllpdn::Value1, + false => Pllpdn::Value2, } } #[doc = "Switch off main PLL"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLPDN_A::VALUE1 + *self == Pllpdn::Value1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLPDN_A::VALUE2 + *self == Pllpdn::Value2 } } #[doc = "Field `PLLPDN` writer - PLL Power Down"] -pub type PLLPDN_W<'a, REG> = crate::BitWriter<'a, REG, PLLPDN_A>; -impl<'a, REG> PLLPDN_W<'a, REG> +pub type PllpdnW<'a, REG> = crate::BitWriter<'a, REG, Pllpdn>; +impl<'a, REG> PllpdnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Switch off main PLL"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PLLPDN_A::VALUE1) + self.variant(Pllpdn::Value1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PLLPDN_A::VALUE2) + self.variant(Pllpdn::Value2) } } -#[doc = "Field `VCOPDN` reader - VCO Power Down"] -pub type VCOPDN_R = crate::BitReader; #[doc = "VCO Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOPDN_A { +pub enum Vcopdn { #[doc = "1: Switch off VCO of main PLL"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: No effect"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOPDN_A) -> Self { + fn from(variant: Vcopdn) -> Self { variant as u8 != 0 } } -impl VCOPDN_R { +#[doc = "Field `VCOPDN` reader - VCO Power Down"] +pub type VcopdnR = crate::BitReader; +impl VcopdnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOPDN_A { + pub const fn variant(&self) -> Vcopdn { match self.bits { - true => VCOPDN_A::VALUE1, - false => VCOPDN_A::VALUE2, + true => Vcopdn::Value1, + false => Vcopdn::Value2, } } #[doc = "Switch off VCO of main PLL"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOPDN_A::VALUE1 + *self == Vcopdn::Value1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOPDN_A::VALUE2 + *self == Vcopdn::Value2 } } #[doc = "Field `VCOPDN` writer - VCO Power Down"] -pub type VCOPDN_W<'a, REG> = crate::BitWriter<'a, REG, VCOPDN_A>; -impl<'a, REG> VCOPDN_W<'a, REG> +pub type VcopdnW<'a, REG> = crate::BitWriter<'a, REG, Vcopdn>; +impl<'a, REG> VcopdnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Switch off VCO of main PLL"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOPDN_A::VALUE1) + self.variant(Vcopdn::Value1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOPDN_A::VALUE2) + self.variant(Vcopdn::Value2) } } -#[doc = "Field `USBCR` reader - USB Clock Control"] -pub type USBCR_R = crate::BitReader; #[doc = "USB Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBCR_A { +pub enum Usbcr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBCR_A) -> Self { + fn from(variant: Usbcr) -> Self { variant as u8 != 0 } } -impl USBCR_R { +#[doc = "Field `USBCR` reader - USB Clock Control"] +pub type UsbcrR = crate::BitReader; +impl UsbcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBCR_A { + pub const fn variant(&self) -> Usbcr { match self.bits { - false => USBCR_A::VALUE1, - true => USBCR_A::VALUE2, + false => Usbcr::Value1, + true => Usbcr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBCR_A::VALUE1 + *self == Usbcr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBCR_A::VALUE2 + *self == Usbcr::Value2 } } #[doc = "Field `USBCR` writer - USB Clock Control"] -pub type USBCR_W<'a, REG> = crate::BitWriter<'a, REG, USBCR_A>; -impl<'a, REG> USBCR_W<'a, REG> +pub type UsbcrW<'a, REG> = crate::BitWriter<'a, REG, Usbcr>; +impl<'a, REG> UsbcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBCR_A::VALUE1) + self.variant(Usbcr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBCR_A::VALUE2) + self.variant(Usbcr::Value2) } } -#[doc = "Field `MMCCR` reader - MMC Clock Control"] -pub type MMCCR_R = crate::BitReader; #[doc = "MMC Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCCR_A { +pub enum Mmccr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCCR_A) -> Self { + fn from(variant: Mmccr) -> Self { variant as u8 != 0 } } -impl MMCCR_R { +#[doc = "Field `MMCCR` reader - MMC Clock Control"] +pub type MmccrR = crate::BitReader; +impl MmccrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMCCR_A { + pub const fn variant(&self) -> Mmccr { match self.bits { - false => MMCCR_A::VALUE1, - true => MMCCR_A::VALUE2, + false => Mmccr::Value1, + true => Mmccr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMCCR_A::VALUE1 + *self == Mmccr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMCCR_A::VALUE2 + *self == Mmccr::Value2 } } #[doc = "Field `MMCCR` writer - MMC Clock Control"] -pub type MMCCR_W<'a, REG> = crate::BitWriter<'a, REG, MMCCR_A>; -impl<'a, REG> MMCCR_W<'a, REG> +pub type MmccrW<'a, REG> = crate::BitWriter<'a, REG, Mmccr>; +impl<'a, REG> MmccrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCCR_A::VALUE1) + self.variant(Mmccr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCCR_A::VALUE2) + self.variant(Mmccr::Value2) } } -#[doc = "Field `ETH0CR` reader - Ethernet Clock Control"] -pub type ETH0CR_R = crate::BitReader; #[doc = "Ethernet Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0CR_A { +pub enum Eth0cr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0CR_A) -> Self { + fn from(variant: Eth0cr) -> Self { variant as u8 != 0 } } -impl ETH0CR_R { +#[doc = "Field `ETH0CR` reader - Ethernet Clock Control"] +pub type Eth0crR = crate::BitReader; +impl Eth0crR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ETH0CR_A { + pub const fn variant(&self) -> Eth0cr { match self.bits { - false => ETH0CR_A::VALUE1, - true => ETH0CR_A::VALUE2, + false => Eth0cr::Value1, + true => Eth0cr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ETH0CR_A::VALUE1 + *self == Eth0cr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ETH0CR_A::VALUE2 + *self == Eth0cr::Value2 } } #[doc = "Field `ETH0CR` writer - Ethernet Clock Control"] -pub type ETH0CR_W<'a, REG> = crate::BitWriter<'a, REG, ETH0CR_A>; -impl<'a, REG> ETH0CR_W<'a, REG> +pub type Eth0crW<'a, REG> = crate::BitWriter<'a, REG, Eth0cr>; +impl<'a, REG> Eth0crW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0CR_A::VALUE1) + self.variant(Eth0cr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0CR_A::VALUE2) + self.variant(Eth0cr::Value2) } } -#[doc = "Field `EBUCR` reader - EBU Clock Control"] -pub type EBUCR_R = crate::BitReader; #[doc = "EBU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBUCR_A { +pub enum Ebucr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBUCR_A) -> Self { + fn from(variant: Ebucr) -> Self { variant as u8 != 0 } } -impl EBUCR_R { +#[doc = "Field `EBUCR` reader - EBU Clock Control"] +pub type EbucrR = crate::BitReader; +impl EbucrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBUCR_A { + pub const fn variant(&self) -> Ebucr { match self.bits { - false => EBUCR_A::VALUE1, - true => EBUCR_A::VALUE2, + false => Ebucr::Value1, + true => Ebucr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBUCR_A::VALUE1 + *self == Ebucr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBUCR_A::VALUE2 + *self == Ebucr::Value2 } } #[doc = "Field `EBUCR` writer - EBU Clock Control"] -pub type EBUCR_W<'a, REG> = crate::BitWriter<'a, REG, EBUCR_A>; -impl<'a, REG> EBUCR_W<'a, REG> +pub type EbucrW<'a, REG> = crate::BitWriter<'a, REG, Ebucr>; +impl<'a, REG> EbucrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBUCR_A::VALUE1) + self.variant(Ebucr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBUCR_A::VALUE2) + self.variant(Ebucr::Value2) } } -#[doc = "Field `CCUCR` reader - CCU Clock Control"] -pub type CCUCR_R = crate::BitReader; #[doc = "CCU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUCR_A { +pub enum Ccucr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUCR_A) -> Self { + fn from(variant: Ccucr) -> Self { variant as u8 != 0 } } -impl CCUCR_R { +#[doc = "Field `CCUCR` reader - CCU Clock Control"] +pub type CcucrR = crate::BitReader; +impl CcucrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCUCR_A { + pub const fn variant(&self) -> Ccucr { match self.bits { - false => CCUCR_A::VALUE1, - true => CCUCR_A::VALUE2, + false => Ccucr::Value1, + true => Ccucr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCUCR_A::VALUE1 + *self == Ccucr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCUCR_A::VALUE2 + *self == Ccucr::Value2 } } #[doc = "Field `CCUCR` writer - CCU Clock Control"] -pub type CCUCR_W<'a, REG> = crate::BitWriter<'a, REG, CCUCR_A>; -impl<'a, REG> CCUCR_W<'a, REG> +pub type CcucrW<'a, REG> = crate::BitWriter<'a, REG, Ccucr>; +impl<'a, REG> CcucrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUCR_A::VALUE1) + self.variant(Ccucr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUCR_A::VALUE2) + self.variant(Ccucr::Value2) } } -#[doc = "Field `WDTCR` reader - WDT Clock Control"] -pub type WDTCR_R = crate::BitReader; #[doc = "WDT Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTCR_A { +pub enum Wdtcr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTCR_A) -> Self { + fn from(variant: Wdtcr) -> Self { variant as u8 != 0 } } -impl WDTCR_R { +#[doc = "Field `WDTCR` reader - WDT Clock Control"] +pub type WdtcrR = crate::BitReader; +impl WdtcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WDTCR_A { + pub const fn variant(&self) -> Wdtcr { match self.bits { - false => WDTCR_A::VALUE1, - true => WDTCR_A::VALUE2, + false => Wdtcr::Value1, + true => Wdtcr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTCR_A::VALUE1 + *self == Wdtcr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTCR_A::VALUE2 + *self == Wdtcr::Value2 } } #[doc = "Field `WDTCR` writer - WDT Clock Control"] -pub type WDTCR_W<'a, REG> = crate::BitWriter<'a, REG, WDTCR_A>; -impl<'a, REG> WDTCR_W<'a, REG> +pub type WdtcrW<'a, REG> = crate::BitWriter<'a, REG, Wdtcr>; +impl<'a, REG> WdtcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTCR_A::VALUE1) + self.variant(Wdtcr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTCR_A::VALUE2) + self.variant(Wdtcr::Value2) } } impl R { #[doc = "Bits 0:1 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SYSSEL_R { - SYSSEL_R::new((self.bits & 3) as u8) + pub fn syssel(&self) -> SysselR { + SysselR::new((self.bits & 3) as u8) } #[doc = "Bit 11 - Flash Power Down"] #[inline(always)] - pub fn fpdn(&self) -> FPDN_R { - FPDN_R::new(((self.bits >> 11) & 1) != 0) + pub fn fpdn(&self) -> FpdnR { + FpdnR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - PLL Power Down"] #[inline(always)] - pub fn pllpdn(&self) -> PLLPDN_R { - PLLPDN_R::new(((self.bits >> 12) & 1) != 0) + pub fn pllpdn(&self) -> PllpdnR { + PllpdnR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - VCO Power Down"] #[inline(always)] - pub fn vcopdn(&self) -> VCOPDN_R { - VCOPDN_R::new(((self.bits >> 13) & 1) != 0) + pub fn vcopdn(&self) -> VcopdnR { + VcopdnR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - pub fn usbcr(&self) -> USBCR_R { - USBCR_R::new(((self.bits >> 16) & 1) != 0) + pub fn usbcr(&self) -> UsbcrR { + UsbcrR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] - pub fn mmccr(&self) -> MMCCR_R { - MMCCR_R::new(((self.bits >> 17) & 1) != 0) + pub fn mmccr(&self) -> MmccrR { + MmccrR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] - pub fn eth0cr(&self) -> ETH0CR_R { - ETH0CR_R::new(((self.bits >> 18) & 1) != 0) + pub fn eth0cr(&self) -> Eth0crR { + Eth0crR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] - pub fn ebucr(&self) -> EBUCR_R { - EBUCR_R::new(((self.bits >> 19) & 1) != 0) + pub fn ebucr(&self) -> EbucrR { + EbucrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - pub fn ccucr(&self) -> CCUCR_R { - CCUCR_R::new(((self.bits >> 20) & 1) != 0) + pub fn ccucr(&self) -> CcucrR { + CcucrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - pub fn wdtcr(&self) -> WDTCR_R { - WDTCR_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdtcr(&self) -> WdtcrR { + WdtcrR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SYSSEL_W { - SYSSEL_W::new(self, 0) + pub fn syssel(&mut self) -> SysselW { + SysselW::new(self, 0) } #[doc = "Bit 11 - Flash Power Down"] #[inline(always)] #[must_use] - pub fn fpdn(&mut self) -> FPDN_W { - FPDN_W::new(self, 11) + pub fn fpdn(&mut self) -> FpdnW { + FpdnW::new(self, 11) } #[doc = "Bit 12 - PLL Power Down"] #[inline(always)] #[must_use] - pub fn pllpdn(&mut self) -> PLLPDN_W { - PLLPDN_W::new(self, 12) + pub fn pllpdn(&mut self) -> PllpdnW { + PllpdnW::new(self, 12) } #[doc = "Bit 13 - VCO Power Down"] #[inline(always)] #[must_use] - pub fn vcopdn(&mut self) -> VCOPDN_W { - VCOPDN_W::new(self, 13) + pub fn vcopdn(&mut self) -> VcopdnW { + VcopdnW::new(self, 13) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] #[must_use] - pub fn usbcr(&mut self) -> USBCR_W { - USBCR_W::new(self, 16) + pub fn usbcr(&mut self) -> UsbcrW { + UsbcrW::new(self, 16) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] #[must_use] - pub fn mmccr(&mut self) -> MMCCR_W { - MMCCR_W::new(self, 17) + pub fn mmccr(&mut self) -> MmccrW { + MmccrW::new(self, 17) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] #[must_use] - pub fn eth0cr(&mut self) -> ETH0CR_W { - ETH0CR_W::new(self, 18) + pub fn eth0cr(&mut self) -> Eth0crW { + Eth0crW::new(self, 18) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] #[must_use] - pub fn ebucr(&mut self) -> EBUCR_W { - EBUCR_W::new(self, 19) + pub fn ebucr(&mut self) -> EbucrW { + EbucrW::new(self, 19) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] #[must_use] - pub fn ccucr(&mut self) -> CCUCR_W { - CCUCR_W::new(self, 20) + pub fn ccucr(&mut self) -> CcucrW { + CcucrW::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] #[must_use] - pub fn wdtcr(&mut self) -> WDTCR_W { - WDTCR_W::new(self, 21) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wdtcr(&mut self) -> WdtcrW { + WdtcrW::new(self, 21) } } #[doc = "Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DSLEEPCR_SPEC; -impl crate::RegisterSpec for DSLEEPCR_SPEC { +pub struct DsleepcrSpec; +impl crate::RegisterSpec for DsleepcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`dsleepcr::R`](R) reader structure"] -impl crate::Readable for DSLEEPCR_SPEC {} +impl crate::Readable for DsleepcrSpec {} #[doc = "`write(|w| ..)` method takes [`dsleepcr::W`](W) writer structure"] -impl crate::Writable for DSLEEPCR_SPEC { +impl crate::Writable for DsleepcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSLEEPCR to value 0"] -impl crate::Resettable for DSLEEPCR_SPEC { +impl crate::Resettable for DsleepcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/ebuclkcr.rs b/src/scu_clk/ebuclkcr.rs index 80b49819..e7c98ee1 100644 --- a/src/scu_clk/ebuclkcr.rs +++ b/src/scu_clk/ebuclkcr.rs @@ -1,49 +1,40 @@ #[doc = "Register `EBUCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EBUCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EBUDIV` reader - EBU Clock Divider Value"] -pub type EBUDIV_R = crate::FieldReader; +pub type EbudivR = crate::FieldReader; #[doc = "Field `EBUDIV` writer - EBU Clock Divider Value"] -pub type EBUDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type EbudivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - EBU Clock Divider Value"] #[inline(always)] - pub fn ebudiv(&self) -> EBUDIV_R { - EBUDIV_R::new((self.bits & 0x3f) as u8) + pub fn ebudiv(&self) -> EbudivR { + EbudivR::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - EBU Clock Divider Value"] #[inline(always)] #[must_use] - pub fn ebudiv(&mut self) -> EBUDIV_W { - EBUDIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ebudiv(&mut self) -> EbudivW { + EbudivW::new(self, 0) } } #[doc = "EBU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ebuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ebuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EBUCLKCR_SPEC; -impl crate::RegisterSpec for EBUCLKCR_SPEC { +pub struct EbuclkcrSpec; +impl crate::RegisterSpec for EbuclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ebuclkcr::R`](R) reader structure"] -impl crate::Readable for EBUCLKCR_SPEC {} +impl crate::Readable for EbuclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`ebuclkcr::W`](W) writer structure"] -impl crate::Writable for EBUCLKCR_SPEC { +impl crate::Writable for EbuclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EBUCLKCR to value 0"] -impl crate::Resettable for EBUCLKCR_SPEC { +impl crate::Resettable for EbuclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/ecatclkcr.rs b/src/scu_clk/ecatclkcr.rs index dade1698..2066d240 100644 --- a/src/scu_clk/ecatclkcr.rs +++ b/src/scu_clk/ecatclkcr.rs @@ -1,113 +1,104 @@ #[doc = "Register `ECATCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ECATCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ECADIV` reader - EtherCAT Clock Divider Value"] -pub type ECADIV_R = crate::FieldReader; +pub type EcadivR = crate::FieldReader; #[doc = "Field `ECADIV` writer - EtherCAT Clock Divider Value"] -pub type ECADIV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `ECATSEL` reader - EtherCAT Clock Selection Value"] -pub type ECATSEL_R = crate::BitReader; +pub type EcadivW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "EtherCAT Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECATSEL_A { +pub enum Ecatsel { #[doc = "0: fPLLUSBclock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPLLclock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECATSEL_A) -> Self { + fn from(variant: Ecatsel) -> Self { variant as u8 != 0 } } -impl ECATSEL_R { +#[doc = "Field `ECATSEL` reader - EtherCAT Clock Selection Value"] +pub type EcatselR = crate::BitReader; +impl EcatselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECATSEL_A { + pub const fn variant(&self) -> Ecatsel { match self.bits { - false => ECATSEL_A::VALUE1, - true => ECATSEL_A::VALUE2, + false => Ecatsel::Value1, + true => Ecatsel::Value2, } } #[doc = "fPLLUSBclock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECATSEL_A::VALUE1 + *self == Ecatsel::Value1 } #[doc = "fPLLclock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECATSEL_A::VALUE2 + *self == Ecatsel::Value2 } } #[doc = "Field `ECATSEL` writer - EtherCAT Clock Selection Value"] -pub type ECATSEL_W<'a, REG> = crate::BitWriter<'a, REG, ECATSEL_A>; -impl<'a, REG> ECATSEL_W<'a, REG> +pub type EcatselW<'a, REG> = crate::BitWriter<'a, REG, Ecatsel>; +impl<'a, REG> EcatselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fPLLUSBclock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECATSEL_A::VALUE1) + self.variant(Ecatsel::Value1) } #[doc = "fPLLclock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECATSEL_A::VALUE2) + self.variant(Ecatsel::Value2) } } impl R { #[doc = "Bits 0:1 - EtherCAT Clock Divider Value"] #[inline(always)] - pub fn ecadiv(&self) -> ECADIV_R { - ECADIV_R::new((self.bits & 3) as u8) + pub fn ecadiv(&self) -> EcadivR { + EcadivR::new((self.bits & 3) as u8) } #[doc = "Bit 16 - EtherCAT Clock Selection Value"] #[inline(always)] - pub fn ecatsel(&self) -> ECATSEL_R { - ECATSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecatsel(&self) -> EcatselR { + EcatselR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - EtherCAT Clock Divider Value"] #[inline(always)] #[must_use] - pub fn ecadiv(&mut self) -> ECADIV_W { - ECADIV_W::new(self, 0) + pub fn ecadiv(&mut self) -> EcadivW { + EcadivW::new(self, 0) } #[doc = "Bit 16 - EtherCAT Clock Selection Value"] #[inline(always)] #[must_use] - pub fn ecatsel(&mut self) -> ECATSEL_W { - ECATSEL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecatsel(&mut self) -> EcatselW { + EcatselW::new(self, 16) } } #[doc = "EtherCAT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecatclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ecatclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ECATCLKCR_SPEC; -impl crate::RegisterSpec for ECATCLKCR_SPEC { +pub struct EcatclkcrSpec; +impl crate::RegisterSpec for EcatclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ecatclkcr::R`](R) reader structure"] -impl crate::Readable for ECATCLKCR_SPEC {} +impl crate::Readable for EcatclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`ecatclkcr::W`](W) writer structure"] -impl crate::Writable for ECATCLKCR_SPEC { +impl crate::Writable for EcatclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ECATCLKCR to value 0"] -impl crate::Resettable for ECATCLKCR_SPEC { +impl crate::Resettable for EcatclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/extclkcr.rs b/src/scu_clk/extclkcr.rs index 6f2359e9..63408575 100644 --- a/src/scu_clk/extclkcr.rs +++ b/src/scu_clk/extclkcr.rs @@ -1,59 +1,59 @@ #[doc = "Register `EXTCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXTCLKCR` writer"] -pub type W = crate::W; -#[doc = "Field `ECKSEL` reader - External Clock Selection Value"] -pub type ECKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "External Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ECKSEL_A { +pub enum Ecksel { #[doc = "0: fSYS clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: fUSB clock"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: fPLL clock divided according to ECKDIV bit field configuration"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ECKSEL_A) -> Self { + fn from(variant: Ecksel) -> Self { variant as _ } } -impl crate::FieldSpec for ECKSEL_A { +impl crate::FieldSpec for Ecksel { type Ux = u8; } -impl ECKSEL_R { +#[doc = "Field `ECKSEL` reader - External Clock Selection Value"] +pub type EckselR = crate::FieldReader; +impl EckselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ECKSEL_A::VALUE1), - 2 => Some(ECKSEL_A::VALUE3), - 3 => Some(ECKSEL_A::VALUE4), + 0 => Some(Ecksel::Value1), + 2 => Some(Ecksel::Value3), + 3 => Some(Ecksel::Value4), _ => None, } } #[doc = "fSYS clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECKSEL_A::VALUE1 + *self == Ecksel::Value1 } #[doc = "fUSB clock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ECKSEL_A::VALUE3 + *self == Ecksel::Value3 } #[doc = "fPLL clock divided according to ECKDIV bit field configuration"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ECKSEL_A::VALUE4 + *self == Ecksel::Value4 } } #[doc = "Field `ECKSEL` writer - External Clock Selection Value"] -pub type ECKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ECKSEL_A>; -impl<'a, REG> ECKSEL_W<'a, REG> +pub type EckselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ecksel>; +impl<'a, REG> EckselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,72 +61,63 @@ where #[doc = "fSYS clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECKSEL_A::VALUE1) + self.variant(Ecksel::Value1) } #[doc = "fUSB clock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ECKSEL_A::VALUE3) + self.variant(Ecksel::Value3) } #[doc = "fPLL clock divided according to ECKDIV bit field configuration"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ECKSEL_A::VALUE4) + self.variant(Ecksel::Value4) } } #[doc = "Field `ECKDIV` reader - External Clock Divider Value"] -pub type ECKDIV_R = crate::FieldReader; +pub type EckdivR = crate::FieldReader; #[doc = "Field `ECKDIV` writer - External Clock Divider Value"] -pub type ECKDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +pub type EckdivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:1 - External Clock Selection Value"] #[inline(always)] - pub fn ecksel(&self) -> ECKSEL_R { - ECKSEL_R::new((self.bits & 3) as u8) + pub fn ecksel(&self) -> EckselR { + EckselR::new((self.bits & 3) as u8) } #[doc = "Bits 16:24 - External Clock Divider Value"] #[inline(always)] - pub fn eckdiv(&self) -> ECKDIV_R { - ECKDIV_R::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn eckdiv(&self) -> EckdivR { + EckdivR::new(((self.bits >> 16) & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:1 - External Clock Selection Value"] #[inline(always)] #[must_use] - pub fn ecksel(&mut self) -> ECKSEL_W { - ECKSEL_W::new(self, 0) + pub fn ecksel(&mut self) -> EckselW { + EckselW::new(self, 0) } #[doc = "Bits 16:24 - External Clock Divider Value"] #[inline(always)] #[must_use] - pub fn eckdiv(&mut self) -> ECKDIV_W { - ECKDIV_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eckdiv(&mut self) -> EckdivW { + EckdivW::new(self, 16) } } #[doc = "External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EXTCLKCR_SPEC; -impl crate::RegisterSpec for EXTCLKCR_SPEC { +pub struct ExtclkcrSpec; +impl crate::RegisterSpec for ExtclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`extclkcr::R`](R) reader structure"] -impl crate::Readable for EXTCLKCR_SPEC {} +impl crate::Readable for ExtclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`extclkcr::W`](W) writer structure"] -impl crate::Writable for EXTCLKCR_SPEC { +impl crate::Writable for ExtclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTCLKCR to value 0"] -impl crate::Resettable for EXTCLKCR_SPEC { +impl crate::Resettable for ExtclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/mlinkclkcr.rs b/src/scu_clk/mlinkclkcr.rs index 9a3a81d5..dbb6ebeb 100644 --- a/src/scu_clk/mlinkclkcr.rs +++ b/src/scu_clk/mlinkclkcr.rs @@ -1,279 +1,279 @@ #[doc = "Register `MLINKCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MLINKCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SYSDIV` reader - System Clock Division Value"] -pub type SYSDIV_R = crate::FieldReader; +pub type SysdivR = crate::FieldReader; #[doc = "Field `SYSDIV` writer - System Clock Division Value"] -pub type SYSDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SYSSEL_R = crate::BitReader; +pub type SysdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSSEL_A { +pub enum Syssel { #[doc = "0: fOFIclock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPLLclock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSSEL_A) -> Self { + fn from(variant: Syssel) -> Self { variant as u8 != 0 } } -impl SYSSEL_R { +#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] +pub type SysselR = crate::BitReader; +impl SysselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYSSEL_A { + pub const fn variant(&self) -> Syssel { match self.bits { - false => SYSSEL_A::VALUE1, - true => SYSSEL_A::VALUE2, + false => Syssel::Value1, + true => Syssel::Value2, } } #[doc = "fOFIclock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSSEL_A::VALUE1 + *self == Syssel::Value1 } #[doc = "fPLLclock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYSSEL_A::VALUE2 + *self == Syssel::Value2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; -impl<'a, REG> SYSSEL_W<'a, REG> +pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; +impl<'a, REG> SysselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFIclock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE1) + self.variant(Syssel::Value1) } #[doc = "fPLLclock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE2) + self.variant(Syssel::Value2) } } -#[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] -pub type CPUDIV_R = crate::BitReader; #[doc = "CPU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CPUDIV_A { +pub enum Cpudiv { #[doc = "0: fCPU=fSYS"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCPU=fSYS/ 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CPUDIV_A) -> Self { + fn from(variant: Cpudiv) -> Self { variant as u8 != 0 } } -impl CPUDIV_R { +#[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] +pub type CpudivR = crate::BitReader; +impl CpudivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CPUDIV_A { + pub const fn variant(&self) -> Cpudiv { match self.bits { - false => CPUDIV_A::VALUE1, - true => CPUDIV_A::VALUE2, + false => Cpudiv::Value1, + true => Cpudiv::Value2, } } #[doc = "fCPU=fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CPUDIV_A::VALUE1 + *self == Cpudiv::Value1 } #[doc = "fCPU=fSYS/ 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CPUDIV_A::VALUE2 + *self == Cpudiv::Value2 } } #[doc = "Field `CPUDIV` writer - CPU Clock Divider Enable"] -pub type CPUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CPUDIV_A>; -impl<'a, REG> CPUDIV_W<'a, REG> +pub type CpudivW<'a, REG> = crate::BitWriter<'a, REG, Cpudiv>; +impl<'a, REG> CpudivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCPU=fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CPUDIV_A::VALUE1) + self.variant(Cpudiv::Value1) } #[doc = "fCPU=fSYS/ 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CPUDIV_A::VALUE2) + self.variant(Cpudiv::Value2) } } -#[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] -pub type PBDIV_R = crate::BitReader; #[doc = "PB Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PBDIV_A { +pub enum Pbdiv { #[doc = "0: fPERIPH=fCPU"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPERIPH=fCPU/ 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PBDIV_A) -> Self { + fn from(variant: Pbdiv) -> Self { variant as u8 != 0 } } -impl PBDIV_R { +#[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] +pub type PbdivR = crate::BitReader; +impl PbdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PBDIV_A { + pub const fn variant(&self) -> Pbdiv { match self.bits { - false => PBDIV_A::VALUE1, - true => PBDIV_A::VALUE2, + false => Pbdiv::Value1, + true => Pbdiv::Value2, } } #[doc = "fPERIPH=fCPU"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PBDIV_A::VALUE1 + *self == Pbdiv::Value1 } #[doc = "fPERIPH=fCPU/ 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PBDIV_A::VALUE2 + *self == Pbdiv::Value2 } } #[doc = "Field `PBDIV` writer - PB Clock Divider Enable"] -pub type PBDIV_W<'a, REG> = crate::BitWriter<'a, REG, PBDIV_A>; -impl<'a, REG> PBDIV_W<'a, REG> +pub type PbdivW<'a, REG> = crate::BitWriter<'a, REG, Pbdiv>; +impl<'a, REG> PbdivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fPERIPH=fCPU"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PBDIV_A::VALUE1) + self.variant(Pbdiv::Value1) } #[doc = "fPERIPH=fCPU/ 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PBDIV_A::VALUE2) + self.variant(Pbdiv::Value2) } } -#[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] -pub type CCUDIV_R = crate::BitReader; #[doc = "CCU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUDIV_A { +pub enum Ccudiv { #[doc = "0: fCCU=fSYS"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCCU=fSYS/ 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUDIV_A) -> Self { + fn from(variant: Ccudiv) -> Self { variant as u8 != 0 } } -impl CCUDIV_R { +#[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] +pub type CcudivR = crate::BitReader; +impl CcudivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCUDIV_A { + pub const fn variant(&self) -> Ccudiv { match self.bits { - false => CCUDIV_A::VALUE1, - true => CCUDIV_A::VALUE2, + false => Ccudiv::Value1, + true => Ccudiv::Value2, } } #[doc = "fCCU=fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCUDIV_A::VALUE1 + *self == Ccudiv::Value1 } #[doc = "fCCU=fSYS/ 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCUDIV_A::VALUE2 + *self == Ccudiv::Value2 } } #[doc = "Field `CCUDIV` writer - CCU Clock Divider Enable"] -pub type CCUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CCUDIV_A>; -impl<'a, REG> CCUDIV_W<'a, REG> +pub type CcudivW<'a, REG> = crate::BitWriter<'a, REG, Ccudiv>; +impl<'a, REG> CcudivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCCU=fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUDIV_A::VALUE1) + self.variant(Ccudiv::Value1) } #[doc = "fCCU=fSYS/ 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUDIV_A::VALUE2) + self.variant(Ccudiv::Value2) } } #[doc = "Field `WDTDIV` reader - WDT Clock Divider Value"] -pub type WDTDIV_R = crate::FieldReader; +pub type WdtdivR = crate::FieldReader; #[doc = "Field `WDTDIV` writer - WDT Clock Divider Value"] -pub type WDTDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] -pub type WDTSEL_R = crate::FieldReader; +pub type WdtdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "WDT Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WDTSEL_A { +pub enum Wdtsel { #[doc = "0: fOFIclock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fSTDBYclock"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fPLLclock"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WDTSEL_A) -> Self { + fn from(variant: Wdtsel) -> Self { variant as _ } } -impl crate::FieldSpec for WDTSEL_A { +impl crate::FieldSpec for Wdtsel { type Ux = u8; } -impl WDTSEL_R { +#[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] +pub type WdtselR = crate::FieldReader; +impl WdtselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WDTSEL_A::VALUE1), - 1 => Some(WDTSEL_A::VALUE2), - 2 => Some(WDTSEL_A::VALUE3), + 0 => Some(Wdtsel::Value1), + 1 => Some(Wdtsel::Value2), + 2 => Some(Wdtsel::Value3), _ => None, } } #[doc = "fOFIclock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTSEL_A::VALUE1 + *self == Wdtsel::Value1 } #[doc = "fSTDBYclock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTSEL_A::VALUE2 + *self == Wdtsel::Value2 } #[doc = "fPLLclock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WDTSEL_A::VALUE3 + *self == Wdtsel::Value3 } } #[doc = "Field `WDTSEL` writer - WDT Clock Selection Value"] -pub type WDTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WDTSEL_A>; -impl<'a, REG> WDTSEL_W<'a, REG> +pub type WdtselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Wdtsel>; +impl<'a, REG> WdtselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,138 +281,129 @@ where #[doc = "fOFIclock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE1) + self.variant(Wdtsel::Value1) } #[doc = "fSTDBYclock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE2) + self.variant(Wdtsel::Value2) } #[doc = "fPLLclock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE3) + self.variant(Wdtsel::Value3) } } #[doc = "Field `EBUDIV` reader - EBU Clock Divider Value"] -pub type EBUDIV_R = crate::FieldReader; +pub type EbudivR = crate::FieldReader; #[doc = "Field `EBUDIV` writer - EBU Clock Divider Value"] -pub type EBUDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type EbudivW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - pub fn sysdiv(&self) -> SYSDIV_R { - SYSDIV_R::new((self.bits & 0xff) as u8) + pub fn sysdiv(&self) -> SysdivR { + SysdivR::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SYSSEL_R { - SYSSEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn syssel(&self) -> SysselR { + SysselR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - CPU Clock Divider Enable"] #[inline(always)] - pub fn cpudiv(&self) -> CPUDIV_R { - CPUDIV_R::new(((self.bits >> 10) & 1) != 0) + pub fn cpudiv(&self) -> CpudivR { + CpudivR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - PB Clock Divider Enable"] #[inline(always)] - pub fn pbdiv(&self) -> PBDIV_R { - PBDIV_R::new(((self.bits >> 12) & 1) != 0) + pub fn pbdiv(&self) -> PbdivR { + PbdivR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - CCU Clock Divider Enable"] #[inline(always)] - pub fn ccudiv(&self) -> CCUDIV_R { - CCUDIV_R::new(((self.bits >> 14) & 1) != 0) + pub fn ccudiv(&self) -> CcudivR { + CcudivR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:23 - WDT Clock Divider Value"] #[inline(always)] - pub fn wdtdiv(&self) -> WDTDIV_R { - WDTDIV_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn wdtdiv(&self) -> WdtdivR { + WdtdivR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:25 - WDT Clock Selection Value"] #[inline(always)] - pub fn wdtsel(&self) -> WDTSEL_R { - WDTSEL_R::new(((self.bits >> 24) & 3) as u8) + pub fn wdtsel(&self) -> WdtselR { + WdtselR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:31 - EBU Clock Divider Value"] #[inline(always)] - pub fn ebudiv(&self) -> EBUDIV_R { - EBUDIV_R::new(((self.bits >> 26) & 0x3f) as u8) + pub fn ebudiv(&self) -> EbudivR { + EbudivR::new(((self.bits >> 26) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] #[must_use] - pub fn sysdiv(&mut self) -> SYSDIV_W { - SYSDIV_W::new(self, 0) + pub fn sysdiv(&mut self) -> SysdivW { + SysdivW::new(self, 0) } #[doc = "Bit 8 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SYSSEL_W { - SYSSEL_W::new(self, 8) + pub fn syssel(&mut self) -> SysselW { + SysselW::new(self, 8) } #[doc = "Bit 10 - CPU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn cpudiv(&mut self) -> CPUDIV_W { - CPUDIV_W::new(self, 10) + pub fn cpudiv(&mut self) -> CpudivW { + CpudivW::new(self, 10) } #[doc = "Bit 12 - PB Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn pbdiv(&mut self) -> PBDIV_W { - PBDIV_W::new(self, 12) + pub fn pbdiv(&mut self) -> PbdivW { + PbdivW::new(self, 12) } #[doc = "Bit 14 - CCU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn ccudiv(&mut self) -> CCUDIV_W { - CCUDIV_W::new(self, 14) + pub fn ccudiv(&mut self) -> CcudivW { + CcudivW::new(self, 14) } #[doc = "Bits 16:23 - WDT Clock Divider Value"] #[inline(always)] #[must_use] - pub fn wdtdiv(&mut self) -> WDTDIV_W { - WDTDIV_W::new(self, 16) + pub fn wdtdiv(&mut self) -> WdtdivW { + WdtdivW::new(self, 16) } #[doc = "Bits 24:25 - WDT Clock Selection Value"] #[inline(always)] #[must_use] - pub fn wdtsel(&mut self) -> WDTSEL_W { - WDTSEL_W::new(self, 24) + pub fn wdtsel(&mut self) -> WdtselW { + WdtselW::new(self, 24) } #[doc = "Bits 26:31 - EBU Clock Divider Value"] #[inline(always)] #[must_use] - pub fn ebudiv(&mut self) -> EBUDIV_W { - EBUDIV_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ebudiv(&mut self) -> EbudivW { + EbudivW::new(self, 26) } } #[doc = "Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MLINKCLKCR_SPEC; -impl crate::RegisterSpec for MLINKCLKCR_SPEC { +pub struct MlinkclkcrSpec; +impl crate::RegisterSpec for MlinkclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`mlinkclkcr::R`](R) reader structure"] -impl crate::Readable for MLINKCLKCR_SPEC {} +impl crate::Readable for MlinkclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`mlinkclkcr::W`](W) writer structure"] -impl crate::Writable for MLINKCLKCR_SPEC { +impl crate::Writable for MlinkclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MLINKCLKCR to value 0"] -impl crate::Resettable for MLINKCLKCR_SPEC { +impl crate::Resettable for MlinkclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/pbclkcr.rs b/src/scu_clk/pbclkcr.rs index b7aafeee..32ce9f7a 100644 --- a/src/scu_clk/pbclkcr.rs +++ b/src/scu_clk/pbclkcr.rs @@ -1,98 +1,89 @@ #[doc = "Register `PBCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PBCLKCR` writer"] -pub type W = crate::W; -#[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] -pub type PBDIV_R = crate::BitReader; +pub type W = crate::W; #[doc = "PB Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PBDIV_A { +pub enum Pbdiv { #[doc = "0: fPERIPH = fCPU"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPERIPH = fCPU / 2"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PBDIV_A) -> Self { + fn from(variant: Pbdiv) -> Self { variant as u8 != 0 } } -impl PBDIV_R { +#[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] +pub type PbdivR = crate::BitReader; +impl PbdivR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PBDIV_A { + pub const fn variant(&self) -> Pbdiv { match self.bits { - false => PBDIV_A::VALUE1, - true => PBDIV_A::VALUE2, + false => Pbdiv::Value1, + true => Pbdiv::Value2, } } #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PBDIV_A::VALUE1 + *self == Pbdiv::Value1 } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PBDIV_A::VALUE2 + *self == Pbdiv::Value2 } } #[doc = "Field `PBDIV` writer - PB Clock Divider Enable"] -pub type PBDIV_W<'a, REG> = crate::BitWriter<'a, REG, PBDIV_A>; -impl<'a, REG> PBDIV_W<'a, REG> +pub type PbdivW<'a, REG> = crate::BitWriter<'a, REG, Pbdiv>; +impl<'a, REG> PbdivW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PBDIV_A::VALUE1) + self.variant(Pbdiv::Value1) } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PBDIV_A::VALUE2) + self.variant(Pbdiv::Value2) } } impl R { #[doc = "Bit 0 - PB Clock Divider Enable"] #[inline(always)] - pub fn pbdiv(&self) -> PBDIV_R { - PBDIV_R::new((self.bits & 1) != 0) + pub fn pbdiv(&self) -> PbdivR { + PbdivR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - PB Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn pbdiv(&mut self) -> PBDIV_W { - PBDIV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pbdiv(&mut self) -> PbdivW { + PbdivW::new(self, 0) } } #[doc = "Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PBCLKCR_SPEC; -impl crate::RegisterSpec for PBCLKCR_SPEC { +pub struct PbclkcrSpec; +impl crate::RegisterSpec for PbclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`pbclkcr::R`](R) reader structure"] -impl crate::Readable for PBCLKCR_SPEC {} +impl crate::Readable for PbclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`pbclkcr::W`](W) writer structure"] -impl crate::Writable for PBCLKCR_SPEC { +impl crate::Writable for PbclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PBCLKCR to value 0"] -impl crate::Resettable for PBCLKCR_SPEC { +impl crate::Resettable for PbclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/sleepcr.rs b/src/scu_clk/sleepcr.rs index 38fdcebc..cf5c9da2 100644 --- a/src/scu_clk/sleepcr.rs +++ b/src/scu_clk/sleepcr.rs @@ -1,482 +1,473 @@ #[doc = "Register `SLEEPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SLEEPCR` writer"] -pub type W = crate::W; -#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SYSSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSSEL_A { +pub enum Syssel { #[doc = "0: fOFI clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPLL clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSSEL_A) -> Self { + fn from(variant: Syssel) -> Self { variant as u8 != 0 } } -impl SYSSEL_R { +#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] +pub type SysselR = crate::BitReader; +impl SysselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYSSEL_A { + pub const fn variant(&self) -> Syssel { match self.bits { - false => SYSSEL_A::VALUE1, - true => SYSSEL_A::VALUE2, + false => Syssel::Value1, + true => Syssel::Value2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSSEL_A::VALUE1 + *self == Syssel::Value1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYSSEL_A::VALUE2 + *self == Syssel::Value2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; -impl<'a, REG> SYSSEL_W<'a, REG> +pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; +impl<'a, REG> SysselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE1) + self.variant(Syssel::Value1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE2) + self.variant(Syssel::Value2) } } -#[doc = "Field `USBCR` reader - USB Clock Control"] -pub type USBCR_R = crate::BitReader; #[doc = "USB Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBCR_A { +pub enum Usbcr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBCR_A) -> Self { + fn from(variant: Usbcr) -> Self { variant as u8 != 0 } } -impl USBCR_R { +#[doc = "Field `USBCR` reader - USB Clock Control"] +pub type UsbcrR = crate::BitReader; +impl UsbcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBCR_A { + pub const fn variant(&self) -> Usbcr { match self.bits { - false => USBCR_A::VALUE1, - true => USBCR_A::VALUE2, + false => Usbcr::Value1, + true => Usbcr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBCR_A::VALUE1 + *self == Usbcr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBCR_A::VALUE2 + *self == Usbcr::Value2 } } #[doc = "Field `USBCR` writer - USB Clock Control"] -pub type USBCR_W<'a, REG> = crate::BitWriter<'a, REG, USBCR_A>; -impl<'a, REG> USBCR_W<'a, REG> +pub type UsbcrW<'a, REG> = crate::BitWriter<'a, REG, Usbcr>; +impl<'a, REG> UsbcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBCR_A::VALUE1) + self.variant(Usbcr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBCR_A::VALUE2) + self.variant(Usbcr::Value2) } } -#[doc = "Field `MMCCR` reader - MMC Clock Control"] -pub type MMCCR_R = crate::BitReader; #[doc = "MMC Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCCR_A { +pub enum Mmccr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCCR_A) -> Self { + fn from(variant: Mmccr) -> Self { variant as u8 != 0 } } -impl MMCCR_R { +#[doc = "Field `MMCCR` reader - MMC Clock Control"] +pub type MmccrR = crate::BitReader; +impl MmccrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMCCR_A { + pub const fn variant(&self) -> Mmccr { match self.bits { - false => MMCCR_A::VALUE1, - true => MMCCR_A::VALUE2, + false => Mmccr::Value1, + true => Mmccr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMCCR_A::VALUE1 + *self == Mmccr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMCCR_A::VALUE2 + *self == Mmccr::Value2 } } #[doc = "Field `MMCCR` writer - MMC Clock Control"] -pub type MMCCR_W<'a, REG> = crate::BitWriter<'a, REG, MMCCR_A>; -impl<'a, REG> MMCCR_W<'a, REG> +pub type MmccrW<'a, REG> = crate::BitWriter<'a, REG, Mmccr>; +impl<'a, REG> MmccrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCCR_A::VALUE1) + self.variant(Mmccr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCCR_A::VALUE2) + self.variant(Mmccr::Value2) } } -#[doc = "Field `ETH0CR` reader - Ethernet Clock Control"] -pub type ETH0CR_R = crate::BitReader; #[doc = "Ethernet Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0CR_A { +pub enum Eth0cr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0CR_A) -> Self { + fn from(variant: Eth0cr) -> Self { variant as u8 != 0 } } -impl ETH0CR_R { +#[doc = "Field `ETH0CR` reader - Ethernet Clock Control"] +pub type Eth0crR = crate::BitReader; +impl Eth0crR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ETH0CR_A { + pub const fn variant(&self) -> Eth0cr { match self.bits { - false => ETH0CR_A::VALUE1, - true => ETH0CR_A::VALUE2, + false => Eth0cr::Value1, + true => Eth0cr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ETH0CR_A::VALUE1 + *self == Eth0cr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ETH0CR_A::VALUE2 + *self == Eth0cr::Value2 } } #[doc = "Field `ETH0CR` writer - Ethernet Clock Control"] -pub type ETH0CR_W<'a, REG> = crate::BitWriter<'a, REG, ETH0CR_A>; -impl<'a, REG> ETH0CR_W<'a, REG> +pub type Eth0crW<'a, REG> = crate::BitWriter<'a, REG, Eth0cr>; +impl<'a, REG> Eth0crW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0CR_A::VALUE1) + self.variant(Eth0cr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0CR_A::VALUE2) + self.variant(Eth0cr::Value2) } } -#[doc = "Field `EBUCR` reader - EBU Clock Control"] -pub type EBUCR_R = crate::BitReader; #[doc = "EBU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBUCR_A { +pub enum Ebucr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBUCR_A) -> Self { + fn from(variant: Ebucr) -> Self { variant as u8 != 0 } } -impl EBUCR_R { +#[doc = "Field `EBUCR` reader - EBU Clock Control"] +pub type EbucrR = crate::BitReader; +impl EbucrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBUCR_A { + pub const fn variant(&self) -> Ebucr { match self.bits { - false => EBUCR_A::VALUE1, - true => EBUCR_A::VALUE2, + false => Ebucr::Value1, + true => Ebucr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBUCR_A::VALUE1 + *self == Ebucr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBUCR_A::VALUE2 + *self == Ebucr::Value2 } } #[doc = "Field `EBUCR` writer - EBU Clock Control"] -pub type EBUCR_W<'a, REG> = crate::BitWriter<'a, REG, EBUCR_A>; -impl<'a, REG> EBUCR_W<'a, REG> +pub type EbucrW<'a, REG> = crate::BitWriter<'a, REG, Ebucr>; +impl<'a, REG> EbucrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBUCR_A::VALUE1) + self.variant(Ebucr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBUCR_A::VALUE2) + self.variant(Ebucr::Value2) } } -#[doc = "Field `CCUCR` reader - CCU Clock Control"] -pub type CCUCR_R = crate::BitReader; #[doc = "CCU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCUCR_A { +pub enum Ccucr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCUCR_A) -> Self { + fn from(variant: Ccucr) -> Self { variant as u8 != 0 } } -impl CCUCR_R { +#[doc = "Field `CCUCR` reader - CCU Clock Control"] +pub type CcucrR = crate::BitReader; +impl CcucrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCUCR_A { + pub const fn variant(&self) -> Ccucr { match self.bits { - false => CCUCR_A::VALUE1, - true => CCUCR_A::VALUE2, + false => Ccucr::Value1, + true => Ccucr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCUCR_A::VALUE1 + *self == Ccucr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCUCR_A::VALUE2 + *self == Ccucr::Value2 } } #[doc = "Field `CCUCR` writer - CCU Clock Control"] -pub type CCUCR_W<'a, REG> = crate::BitWriter<'a, REG, CCUCR_A>; -impl<'a, REG> CCUCR_W<'a, REG> +pub type CcucrW<'a, REG> = crate::BitWriter<'a, REG, Ccucr>; +impl<'a, REG> CcucrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCUCR_A::VALUE1) + self.variant(Ccucr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCUCR_A::VALUE2) + self.variant(Ccucr::Value2) } } -#[doc = "Field `WDTCR` reader - WDT Clock Control"] -pub type WDTCR_R = crate::BitReader; #[doc = "WDT Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTCR_A { +pub enum Wdtcr { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTCR_A) -> Self { + fn from(variant: Wdtcr) -> Self { variant as u8 != 0 } } -impl WDTCR_R { +#[doc = "Field `WDTCR` reader - WDT Clock Control"] +pub type WdtcrR = crate::BitReader; +impl WdtcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WDTCR_A { + pub const fn variant(&self) -> Wdtcr { match self.bits { - false => WDTCR_A::VALUE1, - true => WDTCR_A::VALUE2, + false => Wdtcr::Value1, + true => Wdtcr::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTCR_A::VALUE1 + *self == Wdtcr::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTCR_A::VALUE2 + *self == Wdtcr::Value2 } } #[doc = "Field `WDTCR` writer - WDT Clock Control"] -pub type WDTCR_W<'a, REG> = crate::BitWriter<'a, REG, WDTCR_A>; -impl<'a, REG> WDTCR_W<'a, REG> +pub type WdtcrW<'a, REG> = crate::BitWriter<'a, REG, Wdtcr>; +impl<'a, REG> WdtcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTCR_A::VALUE1) + self.variant(Wdtcr::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTCR_A::VALUE2) + self.variant(Wdtcr::Value2) } } impl R { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SYSSEL_R { - SYSSEL_R::new((self.bits & 1) != 0) + pub fn syssel(&self) -> SysselR { + SysselR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - pub fn usbcr(&self) -> USBCR_R { - USBCR_R::new(((self.bits >> 16) & 1) != 0) + pub fn usbcr(&self) -> UsbcrR { + UsbcrR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] - pub fn mmccr(&self) -> MMCCR_R { - MMCCR_R::new(((self.bits >> 17) & 1) != 0) + pub fn mmccr(&self) -> MmccrR { + MmccrR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] - pub fn eth0cr(&self) -> ETH0CR_R { - ETH0CR_R::new(((self.bits >> 18) & 1) != 0) + pub fn eth0cr(&self) -> Eth0crR { + Eth0crR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] - pub fn ebucr(&self) -> EBUCR_R { - EBUCR_R::new(((self.bits >> 19) & 1) != 0) + pub fn ebucr(&self) -> EbucrR { + EbucrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - pub fn ccucr(&self) -> CCUCR_R { - CCUCR_R::new(((self.bits >> 20) & 1) != 0) + pub fn ccucr(&self) -> CcucrR { + CcucrR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - pub fn wdtcr(&self) -> WDTCR_R { - WDTCR_R::new(((self.bits >> 21) & 1) != 0) + pub fn wdtcr(&self) -> WdtcrR { + WdtcrR::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SYSSEL_W { - SYSSEL_W::new(self, 0) + pub fn syssel(&mut self) -> SysselW { + SysselW::new(self, 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] #[must_use] - pub fn usbcr(&mut self) -> USBCR_W { - USBCR_W::new(self, 16) + pub fn usbcr(&mut self) -> UsbcrW { + UsbcrW::new(self, 16) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] #[must_use] - pub fn mmccr(&mut self) -> MMCCR_W { - MMCCR_W::new(self, 17) + pub fn mmccr(&mut self) -> MmccrW { + MmccrW::new(self, 17) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] #[must_use] - pub fn eth0cr(&mut self) -> ETH0CR_W { - ETH0CR_W::new(self, 18) + pub fn eth0cr(&mut self) -> Eth0crW { + Eth0crW::new(self, 18) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] #[must_use] - pub fn ebucr(&mut self) -> EBUCR_W { - EBUCR_W::new(self, 19) + pub fn ebucr(&mut self) -> EbucrW { + EbucrW::new(self, 19) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] #[must_use] - pub fn ccucr(&mut self) -> CCUCR_W { - CCUCR_W::new(self, 20) + pub fn ccucr(&mut self) -> CcucrW { + CcucrW::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] #[must_use] - pub fn wdtcr(&mut self) -> WDTCR_W { - WDTCR_W::new(self, 21) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wdtcr(&mut self) -> WdtcrW { + WdtcrW::new(self, 21) } } #[doc = "Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SLEEPCR_SPEC; -impl crate::RegisterSpec for SLEEPCR_SPEC { +pub struct SleepcrSpec; +impl crate::RegisterSpec for SleepcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`sleepcr::R`](R) reader structure"] -impl crate::Readable for SLEEPCR_SPEC {} +impl crate::Readable for SleepcrSpec {} #[doc = "`write(|w| ..)` method takes [`sleepcr::W`](W) writer structure"] -impl crate::Writable for SLEEPCR_SPEC { +impl crate::Writable for SleepcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SLEEPCR to value 0"] -impl crate::Resettable for SLEEPCR_SPEC { +impl crate::Resettable for SleepcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/sysclkcr.rs b/src/scu_clk/sysclkcr.rs index 11647c89..10418fbe 100644 --- a/src/scu_clk/sysclkcr.rs +++ b/src/scu_clk/sysclkcr.rs @@ -1,113 +1,104 @@ #[doc = "Register `SYSCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYSCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SYSDIV` reader - System Clock Division Value"] -pub type SYSDIV_R = crate::FieldReader; +pub type SysdivR = crate::FieldReader; #[doc = "Field `SYSDIV` writer - System Clock Division Value"] -pub type SYSDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SYSSEL_R = crate::BitReader; +pub type SysdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSSEL_A { +pub enum Syssel { #[doc = "0: fOFI clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fPLL clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSSEL_A) -> Self { + fn from(variant: Syssel) -> Self { variant as u8 != 0 } } -impl SYSSEL_R { +#[doc = "Field `SYSSEL` reader - System Clock Selection Value"] +pub type SysselR = crate::BitReader; +impl SysselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYSSEL_A { + pub const fn variant(&self) -> Syssel { match self.bits { - false => SYSSEL_A::VALUE1, - true => SYSSEL_A::VALUE2, + false => Syssel::Value1, + true => Syssel::Value2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSSEL_A::VALUE1 + *self == Syssel::Value1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYSSEL_A::VALUE2 + *self == Syssel::Value2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; -impl<'a, REG> SYSSEL_W<'a, REG> +pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; +impl<'a, REG> SysselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE1) + self.variant(Syssel::Value1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYSSEL_A::VALUE2) + self.variant(Syssel::Value2) } } impl R { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - pub fn sysdiv(&self) -> SYSDIV_R { - SYSDIV_R::new((self.bits & 0xff) as u8) + pub fn sysdiv(&self) -> SysdivR { + SysdivR::new((self.bits & 0xff) as u8) } #[doc = "Bit 16 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SYSSEL_R { - SYSSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn syssel(&self) -> SysselR { + SysselR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] #[must_use] - pub fn sysdiv(&mut self) -> SYSDIV_W { - SYSDIV_W::new(self, 0) + pub fn sysdiv(&mut self) -> SysdivW { + SysdivW::new(self, 0) } #[doc = "Bit 16 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SYSSEL_W { - SYSSEL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn syssel(&mut self) -> SysselW { + SysselW::new(self, 16) } } #[doc = "System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYSCLKCR_SPEC; -impl crate::RegisterSpec for SYSCLKCR_SPEC { +pub struct SysclkcrSpec; +impl crate::RegisterSpec for SysclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`sysclkcr::R`](R) reader structure"] -impl crate::Readable for SYSCLKCR_SPEC {} +impl crate::Readable for SysclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`sysclkcr::W`](W) writer structure"] -impl crate::Writable for SYSCLKCR_SPEC { +impl crate::Writable for SysclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSCLKCR to value 0"] -impl crate::Resettable for SYSCLKCR_SPEC { +impl crate::Resettable for SysclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/usbclkcr.rs b/src/scu_clk/usbclkcr.rs index 53c0d3a1..d3465726 100644 --- a/src/scu_clk/usbclkcr.rs +++ b/src/scu_clk/usbclkcr.rs @@ -1,113 +1,104 @@ #[doc = "Register `USBCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `USBCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `USBDIV` reader - USB Clock Divider Value"] -pub type USBDIV_R = crate::FieldReader; +pub type UsbdivR = crate::FieldReader; #[doc = "Field `USBDIV` writer - USB Clock Divider Value"] -pub type USBDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `USBSEL` reader - USB Clock Selection Value"] -pub type USBSEL_R = crate::BitReader; +pub type UsbdivW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "USB Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBSEL_A { +pub enum Usbsel { #[doc = "0: USB PLL Clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PLL Clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBSEL_A) -> Self { + fn from(variant: Usbsel) -> Self { variant as u8 != 0 } } -impl USBSEL_R { +#[doc = "Field `USBSEL` reader - USB Clock Selection Value"] +pub type UsbselR = crate::BitReader; +impl UsbselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBSEL_A { + pub const fn variant(&self) -> Usbsel { match self.bits { - false => USBSEL_A::VALUE1, - true => USBSEL_A::VALUE2, + false => Usbsel::Value1, + true => Usbsel::Value2, } } #[doc = "USB PLL Clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBSEL_A::VALUE1 + *self == Usbsel::Value1 } #[doc = "PLL Clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBSEL_A::VALUE2 + *self == Usbsel::Value2 } } #[doc = "Field `USBSEL` writer - USB Clock Selection Value"] -pub type USBSEL_W<'a, REG> = crate::BitWriter<'a, REG, USBSEL_A>; -impl<'a, REG> USBSEL_W<'a, REG> +pub type UsbselW<'a, REG> = crate::BitWriter<'a, REG, Usbsel>; +impl<'a, REG> UsbselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "USB PLL Clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBSEL_A::VALUE1) + self.variant(Usbsel::Value1) } #[doc = "PLL Clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBSEL_A::VALUE2) + self.variant(Usbsel::Value2) } } impl R { #[doc = "Bits 0:2 - USB Clock Divider Value"] #[inline(always)] - pub fn usbdiv(&self) -> USBDIV_R { - USBDIV_R::new((self.bits & 7) as u8) + pub fn usbdiv(&self) -> UsbdivR { + UsbdivR::new((self.bits & 7) as u8) } #[doc = "Bit 16 - USB Clock Selection Value"] #[inline(always)] - pub fn usbsel(&self) -> USBSEL_R { - USBSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn usbsel(&self) -> UsbselR { + UsbselR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - USB Clock Divider Value"] #[inline(always)] #[must_use] - pub fn usbdiv(&mut self) -> USBDIV_W { - USBDIV_W::new(self, 0) + pub fn usbdiv(&mut self) -> UsbdivW { + UsbdivW::new(self, 0) } #[doc = "Bit 16 - USB Clock Selection Value"] #[inline(always)] #[must_use] - pub fn usbsel(&mut self) -> USBSEL_W { - USBSEL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn usbsel(&mut self) -> UsbselW { + UsbselW::new(self, 16) } } #[doc = "USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct USBCLKCR_SPEC; -impl crate::RegisterSpec for USBCLKCR_SPEC { +pub struct UsbclkcrSpec; +impl crate::RegisterSpec for UsbclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`usbclkcr::R`](R) reader structure"] -impl crate::Readable for USBCLKCR_SPEC {} +impl crate::Readable for UsbclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`usbclkcr::W`](W) writer structure"] -impl crate::Writable for USBCLKCR_SPEC { +impl crate::Writable for UsbclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USBCLKCR to value 0"] -impl crate::Resettable for USBCLKCR_SPEC { +impl crate::Resettable for UsbclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/wdtclkcr.rs b/src/scu_clk/wdtclkcr.rs index 294edf01..4f3f75bc 100644 --- a/src/scu_clk/wdtclkcr.rs +++ b/src/scu_clk/wdtclkcr.rs @@ -1,63 +1,63 @@ #[doc = "Register `WDTCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WDTCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WDTDIV` reader - WDT Clock Divider Value"] -pub type WDTDIV_R = crate::FieldReader; +pub type WdtdivR = crate::FieldReader; #[doc = "Field `WDTDIV` writer - WDT Clock Divider Value"] -pub type WDTDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] -pub type WDTSEL_R = crate::FieldReader; +pub type WdtdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "WDT Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WDTSEL_A { +pub enum Wdtsel { #[doc = "0: fOFI clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fSTDBY clock"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fPLL clock"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WDTSEL_A) -> Self { + fn from(variant: Wdtsel) -> Self { variant as _ } } -impl crate::FieldSpec for WDTSEL_A { +impl crate::FieldSpec for Wdtsel { type Ux = u8; } -impl WDTSEL_R { +#[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] +pub type WdtselR = crate::FieldReader; +impl WdtselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WDTSEL_A::VALUE1), - 1 => Some(WDTSEL_A::VALUE2), - 2 => Some(WDTSEL_A::VALUE3), + 0 => Some(Wdtsel::Value1), + 1 => Some(Wdtsel::Value2), + 2 => Some(Wdtsel::Value3), _ => None, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTSEL_A::VALUE1 + *self == Wdtsel::Value1 } #[doc = "fSTDBY clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTSEL_A::VALUE2 + *self == Wdtsel::Value2 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WDTSEL_A::VALUE3 + *self == Wdtsel::Value3 } } #[doc = "Field `WDTSEL` writer - WDT Clock Selection Value"] -pub type WDTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WDTSEL_A>; -impl<'a, REG> WDTSEL_W<'a, REG> +pub type WdtselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Wdtsel>; +impl<'a, REG> WdtselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -65,68 +65,59 @@ where #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE1) + self.variant(Wdtsel::Value1) } #[doc = "fSTDBY clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE2) + self.variant(Wdtsel::Value2) } #[doc = "fPLL clock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WDTSEL_A::VALUE3) + self.variant(Wdtsel::Value3) } } impl R { #[doc = "Bits 0:7 - WDT Clock Divider Value"] #[inline(always)] - pub fn wdtdiv(&self) -> WDTDIV_R { - WDTDIV_R::new((self.bits & 0xff) as u8) + pub fn wdtdiv(&self) -> WdtdivR { + WdtdivR::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:17 - WDT Clock Selection Value"] #[inline(always)] - pub fn wdtsel(&self) -> WDTSEL_R { - WDTSEL_R::new(((self.bits >> 16) & 3) as u8) + pub fn wdtsel(&self) -> WdtselR { + WdtselR::new(((self.bits >> 16) & 3) as u8) } } impl W { #[doc = "Bits 0:7 - WDT Clock Divider Value"] #[inline(always)] #[must_use] - pub fn wdtdiv(&mut self) -> WDTDIV_W { - WDTDIV_W::new(self, 0) + pub fn wdtdiv(&mut self) -> WdtdivW { + WdtdivW::new(self, 0) } #[doc = "Bits 16:17 - WDT Clock Selection Value"] #[inline(always)] #[must_use] - pub fn wdtsel(&mut self) -> WDTSEL_W { - WDTSEL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wdtsel(&mut self) -> WdtselW { + WdtselW::new(self, 16) } } #[doc = "WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WDTCLKCR_SPEC; -impl crate::RegisterSpec for WDTCLKCR_SPEC { +pub struct WdtclkcrSpec; +impl crate::RegisterSpec for WdtclkcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`wdtclkcr::R`](R) reader structure"] -impl crate::Readable for WDTCLKCR_SPEC {} +impl crate::Readable for WdtclkcrSpec {} #[doc = "`write(|w| ..)` method takes [`wdtclkcr::W`](W) writer structure"] -impl crate::Writable for WDTCLKCR_SPEC { +impl crate::Writable for WdtclkcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDTCLKCR to value 0"] -impl crate::Resettable for WDTCLKCR_SPEC { +impl crate::Resettable for WdtclkcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general.rs b/src/scu_general.rs index 587d5359..095a6fe1 100644 --- a/src/scu_general.rs +++ b/src/scu_general.rs @@ -1,177 +1,192 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, - idchip: IDCHIP, - idmanuf: IDMANUF, + id: Id, + idchip: Idchip, + idmanuf: Idmanuf, _reserved3: [u8; 0x04], - stcon: STCON, + stcon: Stcon, _reserved4: [u8; 0x18], - gpr0: GPR0, - gpr1: GPR1, + gpr0: Gpr0, + gpr1: Gpr1, _reserved6: [u8; 0x18], - ccucon: CCUCON, + ccucon: Ccucon, _reserved7: [u8; 0x3c], - dtscon: DTSCON, - dtsstat: DTSSTAT, + dtscon: Dtscon, + dtsstat: Dtsstat, _reserved9: [u8; 0x08], - sdmmcdel: SDMMCDEL, - g0orcen: G0ORCEN, - g1orcen: G1ORCEN, + sdmmcdel: Sdmmcdel, + g0orcen: G0orcen, + g1orcen: G1orcen, _reserved12: [u8; 0x1c], - mirrsts: MIRRSTS, - rmacr: RMACR, - rmdata: RMDATA, + mirrsts: Mirrsts, + rmacr: Rmacr, + rmdata: Rmdata, } impl RegisterBlock { #[doc = "0x00 - SCU Module ID Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x04 - Chip ID Register"] #[inline(always)] - pub const fn idchip(&self) -> &IDCHIP { + pub const fn idchip(&self) -> &Idchip { &self.idchip } #[doc = "0x08 - Manufactory ID Register"] #[inline(always)] - pub const fn idmanuf(&self) -> &IDMANUF { + pub const fn idmanuf(&self) -> &Idmanuf { &self.idmanuf } #[doc = "0x10 - Startup Configuration Register"] #[inline(always)] - pub const fn stcon(&self) -> &STCON { + pub const fn stcon(&self) -> &Stcon { &self.stcon } #[doc = "0x2c - General Purpose Register 0"] #[inline(always)] - pub const fn gpr0(&self) -> &GPR0 { + pub const fn gpr0(&self) -> &Gpr0 { &self.gpr0 } #[doc = "0x30 - General Purpose Register 1"] #[inline(always)] - pub const fn gpr1(&self) -> &GPR1 { + pub const fn gpr1(&self) -> &Gpr1 { &self.gpr1 } #[doc = "0x4c - CCU Control Register"] #[inline(always)] - pub const fn ccucon(&self) -> &CCUCON { + pub const fn ccucon(&self) -> &Ccucon { &self.ccucon } #[doc = "0x8c - Die Temperature Sensor Control Register"] #[inline(always)] - pub const fn dtscon(&self) -> &DTSCON { + pub const fn dtscon(&self) -> &Dtscon { &self.dtscon } #[doc = "0x90 - Die Temperature Sensor Status Register"] #[inline(always)] - pub const fn dtsstat(&self) -> &DTSSTAT { + pub const fn dtsstat(&self) -> &Dtsstat { &self.dtsstat } #[doc = "0x9c - SD-MMC Delay Control Register"] #[inline(always)] - pub const fn sdmmcdel(&self) -> &SDMMCDEL { + pub const fn sdmmcdel(&self) -> &Sdmmcdel { &self.sdmmcdel } #[doc = "0xa0 - Out of Range Comparator Enable Register 0"] #[inline(always)] - pub const fn g0orcen(&self) -> &G0ORCEN { + pub const fn g0orcen(&self) -> &G0orcen { &self.g0orcen } #[doc = "0xa4 - Out of Range Comparator Enable Register 1"] #[inline(always)] - pub const fn g1orcen(&self) -> &G1ORCEN { + pub const fn g1orcen(&self) -> &G1orcen { &self.g1orcen } #[doc = "0xc4 - Mirror Write Status Register"] #[inline(always)] - pub const fn mirrsts(&self) -> &MIRRSTS { + pub const fn mirrsts(&self) -> &Mirrsts { &self.mirrsts } #[doc = "0xc8 - Retention Memory Access Control Register"] #[inline(always)] - pub const fn rmacr(&self) -> &RMACR { + pub const fn rmacr(&self) -> &Rmacr { &self.rmacr } #[doc = "0xcc - Retention Memory Access Data Register"] #[inline(always)] - pub const fn rmdata(&self) -> &RMDATA { + pub const fn rmdata(&self) -> &Rmdata { &self.rmdata } } #[doc = "ID (r) register accessor: SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "SCU Module ID Register"] pub mod id; #[doc = "IDCHIP (r) register accessor: Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idchip`] module"] -pub type IDCHIP = crate::Reg; +#[doc(alias = "IDCHIP")] +pub type Idchip = crate::Reg; #[doc = "Chip ID Register"] pub mod idchip; #[doc = "IDMANUF (r) register accessor: Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idmanuf`] module"] -pub type IDMANUF = crate::Reg; +#[doc(alias = "IDMANUF")] +pub type Idmanuf = crate::Reg; #[doc = "Manufactory ID Register"] pub mod idmanuf; #[doc = "STCON (rw) register accessor: Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcon`] module"] -pub type STCON = crate::Reg; +#[doc(alias = "STCON")] +pub type Stcon = crate::Reg; #[doc = "Startup Configuration Register"] pub mod stcon; #[doc = "GPR0 (rw) register accessor: General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr0`] module"] -pub type GPR0 = crate::Reg; +#[doc(alias = "GPR0")] +pub type Gpr0 = crate::Reg; #[doc = "General Purpose Register 0"] pub mod gpr0; #[doc = "GPR1 (rw) register accessor: General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr1`] module"] -pub type GPR1 = crate::Reg; +#[doc(alias = "GPR1")] +pub type Gpr1 = crate::Reg; #[doc = "General Purpose Register 1"] pub mod gpr1; #[doc = "CCUCON (rw) register accessor: CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccucon`] module"] -pub type CCUCON = crate::Reg; +#[doc(alias = "CCUCON")] +pub type Ccucon = crate::Reg; #[doc = "CCU Control Register"] pub mod ccucon; #[doc = "DTSCON (rw) register accessor: Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtscon`] module"] -pub type DTSCON = crate::Reg; +#[doc(alias = "DTSCON")] +pub type Dtscon = crate::Reg; #[doc = "Die Temperature Sensor Control Register"] pub mod dtscon; #[doc = "DTSSTAT (r) register accessor: Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtsstat`] module"] -pub type DTSSTAT = crate::Reg; +#[doc(alias = "DTSSTAT")] +pub type Dtsstat = crate::Reg; #[doc = "Die Temperature Sensor Status Register"] pub mod dtsstat; #[doc = "SDMMCDEL (rw) register accessor: SD-MMC Delay Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdmmcdel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdmmcdel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdmmcdel`] module"] -pub type SDMMCDEL = crate::Reg; +#[doc(alias = "SDMMCDEL")] +pub type Sdmmcdel = crate::Reg; #[doc = "SD-MMC Delay Control Register"] pub mod sdmmcdel; #[doc = "G0ORCEN (rw) register accessor: Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g0orcen`] module"] -pub type G0ORCEN = crate::Reg; +#[doc(alias = "G0ORCEN")] +pub type G0orcen = crate::Reg; #[doc = "Out of Range Comparator Enable Register 0"] pub mod g0orcen; #[doc = "G1ORCEN (rw) register accessor: Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g1orcen`] module"] -pub type G1ORCEN = crate::Reg; +#[doc(alias = "G1ORCEN")] +pub type G1orcen = crate::Reg; #[doc = "Out of Range Comparator Enable Register 1"] pub mod g1orcen; #[doc = "MIRRSTS (r) register accessor: Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrsts`] module"] -pub type MIRRSTS = crate::Reg; +#[doc(alias = "MIRRSTS")] +pub type Mirrsts = crate::Reg; #[doc = "Mirror Write Status Register"] pub mod mirrsts; #[doc = "RMACR (rw) register accessor: Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmacr`] module"] -pub type RMACR = crate::Reg; +#[doc(alias = "RMACR")] +pub type Rmacr = crate::Reg; #[doc = "Retention Memory Access Control Register"] pub mod rmacr; #[doc = "RMDATA (rw) register accessor: Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmdata`] module"] -pub type RMDATA = crate::Reg; +#[doc(alias = "RMDATA")] +pub type Rmdata = crate::Reg; #[doc = "Retention Memory Access Data Register"] pub mod rmdata; diff --git a/src/scu_general/ccucon.rs b/src/scu_general/ccucon.rs index 60b5a7e7..da0e1df6 100644 --- a/src/scu_general/ccucon.rs +++ b/src/scu_general/ccucon.rs @@ -1,418 +1,409 @@ #[doc = "Register `CCUCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCUCON` writer"] -pub type W = crate::W; -#[doc = "Field `GSC40` reader - Global Start Control CCU40"] -pub type GSC40_R = crate::BitReader; +pub type W = crate::W; #[doc = "Global Start Control CCU40\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC40_A { +pub enum Gsc40 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC40_A) -> Self { + fn from(variant: Gsc40) -> Self { variant as u8 != 0 } } -impl GSC40_R { +#[doc = "Field `GSC40` reader - Global Start Control CCU40"] +pub type Gsc40R = crate::BitReader; +impl Gsc40R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC40_A { + pub const fn variant(&self) -> Gsc40 { match self.bits { - false => GSC40_A::VALUE1, - true => GSC40_A::VALUE2, + false => Gsc40::Value1, + true => Gsc40::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC40_A::VALUE1 + *self == Gsc40::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC40_A::VALUE2 + *self == Gsc40::Value2 } } #[doc = "Field `GSC40` writer - Global Start Control CCU40"] -pub type GSC40_W<'a, REG> = crate::BitWriter<'a, REG, GSC40_A>; -impl<'a, REG> GSC40_W<'a, REG> +pub type Gsc40W<'a, REG> = crate::BitWriter<'a, REG, Gsc40>; +impl<'a, REG> Gsc40W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC40_A::VALUE1) + self.variant(Gsc40::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC40_A::VALUE2) + self.variant(Gsc40::Value2) } } -#[doc = "Field `GSC41` reader - Global Start Control CCU41"] -pub type GSC41_R = crate::BitReader; #[doc = "Global Start Control CCU41\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC41_A { +pub enum Gsc41 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC41_A) -> Self { + fn from(variant: Gsc41) -> Self { variant as u8 != 0 } } -impl GSC41_R { +#[doc = "Field `GSC41` reader - Global Start Control CCU41"] +pub type Gsc41R = crate::BitReader; +impl Gsc41R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC41_A { + pub const fn variant(&self) -> Gsc41 { match self.bits { - false => GSC41_A::VALUE1, - true => GSC41_A::VALUE2, + false => Gsc41::Value1, + true => Gsc41::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC41_A::VALUE1 + *self == Gsc41::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC41_A::VALUE2 + *self == Gsc41::Value2 } } #[doc = "Field `GSC41` writer - Global Start Control CCU41"] -pub type GSC41_W<'a, REG> = crate::BitWriter<'a, REG, GSC41_A>; -impl<'a, REG> GSC41_W<'a, REG> +pub type Gsc41W<'a, REG> = crate::BitWriter<'a, REG, Gsc41>; +impl<'a, REG> Gsc41W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC41_A::VALUE1) + self.variant(Gsc41::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC41_A::VALUE2) + self.variant(Gsc41::Value2) } } -#[doc = "Field `GSC42` reader - Global Start Control CCU42"] -pub type GSC42_R = crate::BitReader; #[doc = "Global Start Control CCU42\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC42_A { +pub enum Gsc42 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC42_A) -> Self { + fn from(variant: Gsc42) -> Self { variant as u8 != 0 } } -impl GSC42_R { +#[doc = "Field `GSC42` reader - Global Start Control CCU42"] +pub type Gsc42R = crate::BitReader; +impl Gsc42R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC42_A { + pub const fn variant(&self) -> Gsc42 { match self.bits { - false => GSC42_A::VALUE1, - true => GSC42_A::VALUE2, + false => Gsc42::Value1, + true => Gsc42::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC42_A::VALUE1 + *self == Gsc42::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC42_A::VALUE2 + *self == Gsc42::Value2 } } #[doc = "Field `GSC42` writer - Global Start Control CCU42"] -pub type GSC42_W<'a, REG> = crate::BitWriter<'a, REG, GSC42_A>; -impl<'a, REG> GSC42_W<'a, REG> +pub type Gsc42W<'a, REG> = crate::BitWriter<'a, REG, Gsc42>; +impl<'a, REG> Gsc42W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC42_A::VALUE1) + self.variant(Gsc42::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC42_A::VALUE2) + self.variant(Gsc42::Value2) } } -#[doc = "Field `GSC43` reader - Global Start Control CCU43"] -pub type GSC43_R = crate::BitReader; #[doc = "Global Start Control CCU43\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC43_A { +pub enum Gsc43 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC43_A) -> Self { + fn from(variant: Gsc43) -> Self { variant as u8 != 0 } } -impl GSC43_R { +#[doc = "Field `GSC43` reader - Global Start Control CCU43"] +pub type Gsc43R = crate::BitReader; +impl Gsc43R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC43_A { + pub const fn variant(&self) -> Gsc43 { match self.bits { - false => GSC43_A::VALUE1, - true => GSC43_A::VALUE2, + false => Gsc43::Value1, + true => Gsc43::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC43_A::VALUE1 + *self == Gsc43::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC43_A::VALUE2 + *self == Gsc43::Value2 } } #[doc = "Field `GSC43` writer - Global Start Control CCU43"] -pub type GSC43_W<'a, REG> = crate::BitWriter<'a, REG, GSC43_A>; -impl<'a, REG> GSC43_W<'a, REG> +pub type Gsc43W<'a, REG> = crate::BitWriter<'a, REG, Gsc43>; +impl<'a, REG> Gsc43W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC43_A::VALUE1) + self.variant(Gsc43::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC43_A::VALUE2) + self.variant(Gsc43::Value2) } } -#[doc = "Field `GSC80` reader - Global Start Control CCU80"] -pub type GSC80_R = crate::BitReader; #[doc = "Global Start Control CCU80\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC80_A { +pub enum Gsc80 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC80_A) -> Self { + fn from(variant: Gsc80) -> Self { variant as u8 != 0 } } -impl GSC80_R { +#[doc = "Field `GSC80` reader - Global Start Control CCU80"] +pub type Gsc80R = crate::BitReader; +impl Gsc80R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC80_A { + pub const fn variant(&self) -> Gsc80 { match self.bits { - false => GSC80_A::VALUE1, - true => GSC80_A::VALUE2, + false => Gsc80::Value1, + true => Gsc80::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC80_A::VALUE1 + *self == Gsc80::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC80_A::VALUE2 + *self == Gsc80::Value2 } } #[doc = "Field `GSC80` writer - Global Start Control CCU80"] -pub type GSC80_W<'a, REG> = crate::BitWriter<'a, REG, GSC80_A>; -impl<'a, REG> GSC80_W<'a, REG> +pub type Gsc80W<'a, REG> = crate::BitWriter<'a, REG, Gsc80>; +impl<'a, REG> Gsc80W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC80_A::VALUE1) + self.variant(Gsc80::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC80_A::VALUE2) + self.variant(Gsc80::Value2) } } -#[doc = "Field `GSC81` reader - Global Start Control CCU81"] -pub type GSC81_R = crate::BitReader; #[doc = "Global Start Control CCU81\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GSC81_A { +pub enum Gsc81 { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GSC81_A) -> Self { + fn from(variant: Gsc81) -> Self { variant as u8 != 0 } } -impl GSC81_R { +#[doc = "Field `GSC81` reader - Global Start Control CCU81"] +pub type Gsc81R = crate::BitReader; +impl Gsc81R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GSC81_A { + pub const fn variant(&self) -> Gsc81 { match self.bits { - false => GSC81_A::VALUE1, - true => GSC81_A::VALUE2, + false => Gsc81::Value1, + true => Gsc81::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GSC81_A::VALUE1 + *self == Gsc81::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GSC81_A::VALUE2 + *self == Gsc81::Value2 } } #[doc = "Field `GSC81` writer - Global Start Control CCU81"] -pub type GSC81_W<'a, REG> = crate::BitWriter<'a, REG, GSC81_A>; -impl<'a, REG> GSC81_W<'a, REG> +pub type Gsc81W<'a, REG> = crate::BitWriter<'a, REG, Gsc81>; +impl<'a, REG> Gsc81W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GSC81_A::VALUE1) + self.variant(Gsc81::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GSC81_A::VALUE2) + self.variant(Gsc81::Value2) } } impl R { #[doc = "Bit 0 - Global Start Control CCU40"] #[inline(always)] - pub fn gsc40(&self) -> GSC40_R { - GSC40_R::new((self.bits & 1) != 0) + pub fn gsc40(&self) -> Gsc40R { + Gsc40R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Global Start Control CCU41"] #[inline(always)] - pub fn gsc41(&self) -> GSC41_R { - GSC41_R::new(((self.bits >> 1) & 1) != 0) + pub fn gsc41(&self) -> Gsc41R { + Gsc41R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Global Start Control CCU42"] #[inline(always)] - pub fn gsc42(&self) -> GSC42_R { - GSC42_R::new(((self.bits >> 2) & 1) != 0) + pub fn gsc42(&self) -> Gsc42R { + Gsc42R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Global Start Control CCU43"] #[inline(always)] - pub fn gsc43(&self) -> GSC43_R { - GSC43_R::new(((self.bits >> 3) & 1) != 0) + pub fn gsc43(&self) -> Gsc43R { + Gsc43R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Global Start Control CCU80"] #[inline(always)] - pub fn gsc80(&self) -> GSC80_R { - GSC80_R::new(((self.bits >> 8) & 1) != 0) + pub fn gsc80(&self) -> Gsc80R { + Gsc80R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Global Start Control CCU81"] #[inline(always)] - pub fn gsc81(&self) -> GSC81_R { - GSC81_R::new(((self.bits >> 9) & 1) != 0) + pub fn gsc81(&self) -> Gsc81R { + Gsc81R::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Global Start Control CCU40"] #[inline(always)] #[must_use] - pub fn gsc40(&mut self) -> GSC40_W { - GSC40_W::new(self, 0) + pub fn gsc40(&mut self) -> Gsc40W { + Gsc40W::new(self, 0) } #[doc = "Bit 1 - Global Start Control CCU41"] #[inline(always)] #[must_use] - pub fn gsc41(&mut self) -> GSC41_W { - GSC41_W::new(self, 1) + pub fn gsc41(&mut self) -> Gsc41W { + Gsc41W::new(self, 1) } #[doc = "Bit 2 - Global Start Control CCU42"] #[inline(always)] #[must_use] - pub fn gsc42(&mut self) -> GSC42_W { - GSC42_W::new(self, 2) + pub fn gsc42(&mut self) -> Gsc42W { + Gsc42W::new(self, 2) } #[doc = "Bit 3 - Global Start Control CCU43"] #[inline(always)] #[must_use] - pub fn gsc43(&mut self) -> GSC43_W { - GSC43_W::new(self, 3) + pub fn gsc43(&mut self) -> Gsc43W { + Gsc43W::new(self, 3) } #[doc = "Bit 8 - Global Start Control CCU80"] #[inline(always)] #[must_use] - pub fn gsc80(&mut self) -> GSC80_W { - GSC80_W::new(self, 8) + pub fn gsc80(&mut self) -> Gsc80W { + Gsc80W::new(self, 8) } #[doc = "Bit 9 - Global Start Control CCU81"] #[inline(always)] #[must_use] - pub fn gsc81(&mut self) -> GSC81_W { - GSC81_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn gsc81(&mut self) -> Gsc81W { + Gsc81W::new(self, 9) } } #[doc = "CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CCUCON_SPEC; -impl crate::RegisterSpec for CCUCON_SPEC { +pub struct CcuconSpec; +impl crate::RegisterSpec for CcuconSpec { type Ux = u32; } #[doc = "`read()` method returns [`ccucon::R`](R) reader structure"] -impl crate::Readable for CCUCON_SPEC {} +impl crate::Readable for CcuconSpec {} #[doc = "`write(|w| ..)` method takes [`ccucon::W`](W) writer structure"] -impl crate::Writable for CCUCON_SPEC { +impl crate::Writable for CcuconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCUCON to value 0"] -impl crate::Resettable for CCUCON_SPEC { +impl crate::Resettable for CcuconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/dtscon.rs b/src/scu_general/dtscon.rs index d989c863..9827b54a 100644 --- a/src/scu_general/dtscon.rs +++ b/src/scu_general/dtscon.rs @@ -1,195 +1,186 @@ #[doc = "Register `DTSCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DTSCON` writer"] -pub type W = crate::W; -#[doc = "Field `PWD` reader - Sensor Power Down"] -pub type PWD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Sensor Power Down\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PWD_A { +pub enum Pwd { #[doc = "0: The DTS is powered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The DTS is not powered"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PWD_A) -> Self { + fn from(variant: Pwd) -> Self { variant as u8 != 0 } } -impl PWD_R { +#[doc = "Field `PWD` reader - Sensor Power Down"] +pub type PwdR = crate::BitReader; +impl PwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PWD_A { + pub const fn variant(&self) -> Pwd { match self.bits { - false => PWD_A::VALUE1, - true => PWD_A::VALUE2, + false => Pwd::Value1, + true => Pwd::Value2, } } #[doc = "The DTS is powered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PWD_A::VALUE1 + *self == Pwd::Value1 } #[doc = "The DTS is not powered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PWD_A::VALUE2 + *self == Pwd::Value2 } } #[doc = "Field `PWD` writer - Sensor Power Down"] -pub type PWD_W<'a, REG> = crate::BitWriter<'a, REG, PWD_A>; -impl<'a, REG> PWD_W<'a, REG> +pub type PwdW<'a, REG> = crate::BitWriter<'a, REG, Pwd>; +impl<'a, REG> PwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DTS is powered"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PWD_A::VALUE1) + self.variant(Pwd::Value1) } #[doc = "The DTS is not powered"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PWD_A::VALUE2) + self.variant(Pwd::Value2) } } #[doc = "Sensor Measurement Start\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum START_AW { +pub enum Start { #[doc = "0: No DTS measurement is started"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A DTS measurement is started"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: START_AW) -> Self { + fn from(variant: Start) -> Self { variant as u8 != 0 } } #[doc = "Field `START` writer - Sensor Measurement Start"] -pub type START_W<'a, REG> = crate::BitWriter<'a, REG, START_AW>; -impl<'a, REG> START_W<'a, REG> +pub type StartW<'a, REG> = crate::BitWriter<'a, REG, Start>; +impl<'a, REG> StartW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No DTS measurement is started"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(START_AW::VALUE1) + self.variant(Start::Value1) } #[doc = "A DTS measurement is started"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(START_AW::VALUE2) + self.variant(Start::Value2) } } #[doc = "Field `OFFSET` reader - Offset Calibration Value"] -pub type OFFSET_R = crate::FieldReader; +pub type OffsetR = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset Calibration Value"] -pub type OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `GAIN` reader - Gain Calibration Value"] -pub type GAIN_R = crate::FieldReader; +pub type GainR = crate::FieldReader; #[doc = "Field `GAIN` writer - Gain Calibration Value"] -pub type GAIN_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type GainW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `REFTRIM` reader - Reference Trim Calibration Value"] -pub type REFTRIM_R = crate::FieldReader; +pub type ReftrimR = crate::FieldReader; #[doc = "Field `REFTRIM` writer - Reference Trim Calibration Value"] -pub type REFTRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type ReftrimW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `BGTRIM` reader - Bandgap Trim Calibration Value"] -pub type BGTRIM_R = crate::FieldReader; +pub type BgtrimR = crate::FieldReader; #[doc = "Field `BGTRIM` writer - Bandgap Trim Calibration Value"] -pub type BGTRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type BgtrimW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Sensor Power Down"] #[inline(always)] - pub fn pwd(&self) -> PWD_R { - PWD_R::new((self.bits & 1) != 0) + pub fn pwd(&self) -> PwdR { + PwdR::new((self.bits & 1) != 0) } #[doc = "Bits 4:10 - Offset Calibration Value"] #[inline(always)] - pub fn offset(&self) -> OFFSET_R { - OFFSET_R::new(((self.bits >> 4) & 0x7f) as u8) + pub fn offset(&self) -> OffsetR { + OffsetR::new(((self.bits >> 4) & 0x7f) as u8) } #[doc = "Bits 11:16 - Gain Calibration Value"] #[inline(always)] - pub fn gain(&self) -> GAIN_R { - GAIN_R::new(((self.bits >> 11) & 0x3f) as u8) + pub fn gain(&self) -> GainR { + GainR::new(((self.bits >> 11) & 0x3f) as u8) } #[doc = "Bits 17:19 - Reference Trim Calibration Value"] #[inline(always)] - pub fn reftrim(&self) -> REFTRIM_R { - REFTRIM_R::new(((self.bits >> 17) & 7) as u8) + pub fn reftrim(&self) -> ReftrimR { + ReftrimR::new(((self.bits >> 17) & 7) as u8) } #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"] #[inline(always)] - pub fn bgtrim(&self) -> BGTRIM_R { - BGTRIM_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn bgtrim(&self) -> BgtrimR { + BgtrimR::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Sensor Power Down"] #[inline(always)] #[must_use] - pub fn pwd(&mut self) -> PWD_W { - PWD_W::new(self, 0) + pub fn pwd(&mut self) -> PwdW { + PwdW::new(self, 0) } #[doc = "Bit 1 - Sensor Measurement Start"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> START_W { - START_W::new(self, 1) + pub fn start(&mut self) -> StartW { + StartW::new(self, 1) } #[doc = "Bits 4:10 - Offset Calibration Value"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OFFSET_W { - OFFSET_W::new(self, 4) + pub fn offset(&mut self) -> OffsetW { + OffsetW::new(self, 4) } #[doc = "Bits 11:16 - Gain Calibration Value"] #[inline(always)] #[must_use] - pub fn gain(&mut self) -> GAIN_W { - GAIN_W::new(self, 11) + pub fn gain(&mut self) -> GainW { + GainW::new(self, 11) } #[doc = "Bits 17:19 - Reference Trim Calibration Value"] #[inline(always)] #[must_use] - pub fn reftrim(&mut self) -> REFTRIM_W { - REFTRIM_W::new(self, 17) + pub fn reftrim(&mut self) -> ReftrimW { + ReftrimW::new(self, 17) } #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"] #[inline(always)] #[must_use] - pub fn bgtrim(&mut self) -> BGTRIM_W { - BGTRIM_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bgtrim(&mut self) -> BgtrimW { + BgtrimW::new(self, 20) } } #[doc = "Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DTSCON_SPEC; -impl crate::RegisterSpec for DTSCON_SPEC { +pub struct DtsconSpec; +impl crate::RegisterSpec for DtsconSpec { type Ux = u32; } #[doc = "`read()` method returns [`dtscon::R`](R) reader structure"] -impl crate::Readable for DTSCON_SPEC {} +impl crate::Readable for DtsconSpec {} #[doc = "`write(|w| ..)` method takes [`dtscon::W`](W) writer structure"] -impl crate::Writable for DTSCON_SPEC { +impl crate::Writable for DtsconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTSCON to value 0x01"] -impl crate::Resettable for DTSCON_SPEC { +impl crate::Resettable for DtsconSpec { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_general/dtsstat.rs b/src/scu_general/dtsstat.rs index 176b1853..a51d1cb5 100644 --- a/src/scu_general/dtsstat.rs +++ b/src/scu_general/dtsstat.rs @@ -1,104 +1,104 @@ #[doc = "Register `DTSSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of the DTS Measurement"] -pub type RESULT_R = crate::FieldReader; -#[doc = "Field `RDY` reader - Sensor Ready Status"] -pub type RDY_R = crate::BitReader; +pub type ResultR = crate::FieldReader; #[doc = "Sensor Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDY_A { +pub enum Rdy { #[doc = "0: The DTS is not ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The DTS is ready"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDY_A) -> Self { + fn from(variant: Rdy) -> Self { variant as u8 != 0 } } -impl RDY_R { +#[doc = "Field `RDY` reader - Sensor Ready Status"] +pub type RdyR = crate::BitReader; +impl RdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDY_A { + pub const fn variant(&self) -> Rdy { match self.bits { - false => RDY_A::VALUE1, - true => RDY_A::VALUE2, + false => Rdy::Value1, + true => Rdy::Value2, } } #[doc = "The DTS is not ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDY_A::VALUE1 + *self == Rdy::Value1 } #[doc = "The DTS is ready"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDY_A::VALUE2 + *self == Rdy::Value2 } } -#[doc = "Field `BUSY` reader - Sensor Busy Status"] -pub type BUSY_R = crate::BitReader; #[doc = "Sensor Busy Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: not busy"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Sensor Busy Status"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "not busy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } impl R { #[doc = "Bits 0:9 - Result of the DTS Measurement"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0x03ff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0x03ff) as u16) } #[doc = "Bit 14 - Sensor Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RDY_R { - RDY_R::new(((self.bits >> 14) & 1) != 0) + pub fn rdy(&self) -> RdyR { + RdyR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Sensor Busy Status"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 15) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DTSSTAT_SPEC; -impl crate::RegisterSpec for DTSSTAT_SPEC { +pub struct DtsstatSpec; +impl crate::RegisterSpec for DtsstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`dtsstat::R`](R) reader structure"] -impl crate::Readable for DTSSTAT_SPEC {} +impl crate::Readable for DtsstatSpec {} #[doc = "`reset()` method sets DTSSTAT to value 0"] -impl crate::Resettable for DTSSTAT_SPEC { +impl crate::Resettable for DtsstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/g0orcen.rs b/src/scu_general/g0orcen.rs index 21a3d1a9..69392206 100644 --- a/src/scu_general/g0orcen.rs +++ b/src/scu_general/g0orcen.rs @@ -1,162 +1,153 @@ #[doc = "Register `G0ORCEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `G0ORCEN` writer"] -pub type W = crate::W; -#[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] -pub type ENORC6_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable Out of Range Comparator, Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENORC6_A { +pub enum Enorc6 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENORC6_A) -> Self { + fn from(variant: Enorc6) -> Self { variant as u8 != 0 } } -impl ENORC6_R { +#[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] +pub type Enorc6R = crate::BitReader; +impl Enorc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENORC6_A { + pub const fn variant(&self) -> Enorc6 { match self.bits { - false => ENORC6_A::VALUE1, - true => ENORC6_A::VALUE2, + false => Enorc6::Value1, + true => Enorc6::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENORC6_A::VALUE1 + *self == Enorc6::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENORC6_A::VALUE2 + *self == Enorc6::Value2 } } #[doc = "Field `ENORC6` writer - Enable Out of Range Comparator, Channel 6"] -pub type ENORC6_W<'a, REG> = crate::BitWriter<'a, REG, ENORC6_A>; -impl<'a, REG> ENORC6_W<'a, REG> +pub type Enorc6W<'a, REG> = crate::BitWriter<'a, REG, Enorc6>; +impl<'a, REG> Enorc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENORC6_A::VALUE1) + self.variant(Enorc6::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENORC6_A::VALUE2) + self.variant(Enorc6::Value2) } } -#[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] -pub type ENORC7_R = crate::BitReader; #[doc = "Enable Out of Range Comparator, Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENORC7_A { +pub enum Enorc7 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENORC7_A) -> Self { + fn from(variant: Enorc7) -> Self { variant as u8 != 0 } } -impl ENORC7_R { +#[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] +pub type Enorc7R = crate::BitReader; +impl Enorc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENORC7_A { + pub const fn variant(&self) -> Enorc7 { match self.bits { - false => ENORC7_A::VALUE1, - true => ENORC7_A::VALUE2, + false => Enorc7::Value1, + true => Enorc7::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENORC7_A::VALUE1 + *self == Enorc7::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENORC7_A::VALUE2 + *self == Enorc7::Value2 } } #[doc = "Field `ENORC7` writer - Enable Out of Range Comparator, Channel 7"] -pub type ENORC7_W<'a, REG> = crate::BitWriter<'a, REG, ENORC7_A>; -impl<'a, REG> ENORC7_W<'a, REG> +pub type Enorc7W<'a, REG> = crate::BitWriter<'a, REG, Enorc7>; +impl<'a, REG> Enorc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENORC7_A::VALUE1) + self.variant(Enorc7::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENORC7_A::VALUE2) + self.variant(Enorc7::Value2) } } impl R { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - pub fn enorc6(&self) -> ENORC6_R { - ENORC6_R::new(((self.bits >> 6) & 1) != 0) + pub fn enorc6(&self) -> Enorc6R { + Enorc6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - pub fn enorc7(&self) -> ENORC7_R { - ENORC7_R::new(((self.bits >> 7) & 1) != 0) + pub fn enorc7(&self) -> Enorc7R { + Enorc7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] #[must_use] - pub fn enorc6(&mut self) -> ENORC6_W { - ENORC6_W::new(self, 6) + pub fn enorc6(&mut self) -> Enorc6W { + Enorc6W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] #[must_use] - pub fn enorc7(&mut self) -> ENORC7_W { - ENORC7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn enorc7(&mut self) -> Enorc7W { + Enorc7W::new(self, 7) } } #[doc = "Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct G0ORCEN_SPEC; -impl crate::RegisterSpec for G0ORCEN_SPEC { +pub struct G0orcenSpec; +impl crate::RegisterSpec for G0orcenSpec { type Ux = u32; } #[doc = "`read()` method returns [`g0orcen::R`](R) reader structure"] -impl crate::Readable for G0ORCEN_SPEC {} +impl crate::Readable for G0orcenSpec {} #[doc = "`write(|w| ..)` method takes [`g0orcen::W`](W) writer structure"] -impl crate::Writable for G0ORCEN_SPEC { +impl crate::Writable for G0orcenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets G0ORCEN to value 0"] -impl crate::Resettable for G0ORCEN_SPEC { +impl crate::Resettable for G0orcenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/g1orcen.rs b/src/scu_general/g1orcen.rs index 3e5c6c44..0eb72cab 100644 --- a/src/scu_general/g1orcen.rs +++ b/src/scu_general/g1orcen.rs @@ -1,162 +1,153 @@ #[doc = "Register `G1ORCEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `G1ORCEN` writer"] -pub type W = crate::W; -#[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] -pub type ENORC6_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable Out of Range Comparator, Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENORC6_A { +pub enum Enorc6 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENORC6_A) -> Self { + fn from(variant: Enorc6) -> Self { variant as u8 != 0 } } -impl ENORC6_R { +#[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] +pub type Enorc6R = crate::BitReader; +impl Enorc6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENORC6_A { + pub const fn variant(&self) -> Enorc6 { match self.bits { - false => ENORC6_A::VALUE1, - true => ENORC6_A::VALUE2, + false => Enorc6::Value1, + true => Enorc6::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENORC6_A::VALUE1 + *self == Enorc6::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENORC6_A::VALUE2 + *self == Enorc6::Value2 } } #[doc = "Field `ENORC6` writer - Enable Out of Range Comparator, Channel 6"] -pub type ENORC6_W<'a, REG> = crate::BitWriter<'a, REG, ENORC6_A>; -impl<'a, REG> ENORC6_W<'a, REG> +pub type Enorc6W<'a, REG> = crate::BitWriter<'a, REG, Enorc6>; +impl<'a, REG> Enorc6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENORC6_A::VALUE1) + self.variant(Enorc6::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENORC6_A::VALUE2) + self.variant(Enorc6::Value2) } } -#[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] -pub type ENORC7_R = crate::BitReader; #[doc = "Enable Out of Range Comparator, Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENORC7_A { +pub enum Enorc7 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENORC7_A) -> Self { + fn from(variant: Enorc7) -> Self { variant as u8 != 0 } } -impl ENORC7_R { +#[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] +pub type Enorc7R = crate::BitReader; +impl Enorc7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENORC7_A { + pub const fn variant(&self) -> Enorc7 { match self.bits { - false => ENORC7_A::VALUE1, - true => ENORC7_A::VALUE2, + false => Enorc7::Value1, + true => Enorc7::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENORC7_A::VALUE1 + *self == Enorc7::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENORC7_A::VALUE2 + *self == Enorc7::Value2 } } #[doc = "Field `ENORC7` writer - Enable Out of Range Comparator, Channel 7"] -pub type ENORC7_W<'a, REG> = crate::BitWriter<'a, REG, ENORC7_A>; -impl<'a, REG> ENORC7_W<'a, REG> +pub type Enorc7W<'a, REG> = crate::BitWriter<'a, REG, Enorc7>; +impl<'a, REG> Enorc7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENORC7_A::VALUE1) + self.variant(Enorc7::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENORC7_A::VALUE2) + self.variant(Enorc7::Value2) } } impl R { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - pub fn enorc6(&self) -> ENORC6_R { - ENORC6_R::new(((self.bits >> 6) & 1) != 0) + pub fn enorc6(&self) -> Enorc6R { + Enorc6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - pub fn enorc7(&self) -> ENORC7_R { - ENORC7_R::new(((self.bits >> 7) & 1) != 0) + pub fn enorc7(&self) -> Enorc7R { + Enorc7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] #[must_use] - pub fn enorc6(&mut self) -> ENORC6_W { - ENORC6_W::new(self, 6) + pub fn enorc6(&mut self) -> Enorc6W { + Enorc6W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] #[must_use] - pub fn enorc7(&mut self) -> ENORC7_W { - ENORC7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn enorc7(&mut self) -> Enorc7W { + Enorc7W::new(self, 7) } } #[doc = "Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct G1ORCEN_SPEC; -impl crate::RegisterSpec for G1ORCEN_SPEC { +pub struct G1orcenSpec; +impl crate::RegisterSpec for G1orcenSpec { type Ux = u32; } #[doc = "`read()` method returns [`g1orcen::R`](R) reader structure"] -impl crate::Readable for G1ORCEN_SPEC {} +impl crate::Readable for G1orcenSpec {} #[doc = "`write(|w| ..)` method takes [`g1orcen::W`](W) writer structure"] -impl crate::Writable for G1ORCEN_SPEC { +impl crate::Writable for G1orcenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets G1ORCEN to value 0"] -impl crate::Resettable for G1ORCEN_SPEC { +impl crate::Resettable for G1orcenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/gpr0.rs b/src/scu_general/gpr0.rs index e6596867..b8d593a9 100644 --- a/src/scu_general/gpr0.rs +++ b/src/scu_general/gpr0.rs @@ -1,49 +1,40 @@ #[doc = "Register `GPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAT` reader - User Data"] -pub type DAT_R = crate::FieldReader; +pub type DatR = crate::FieldReader; #[doc = "Field `DAT` writer - User Data"] -pub type DAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - pub fn dat(&self) -> DAT_R { - DAT_R::new(self.bits) + pub fn dat(&self) -> DatR { + DatR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] #[must_use] - pub fn dat(&mut self) -> DAT_W { - DAT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dat(&mut self) -> DatW { + DatW::new(self, 0) } } #[doc = "General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPR0_SPEC; -impl crate::RegisterSpec for GPR0_SPEC { +pub struct Gpr0Spec; +impl crate::RegisterSpec for Gpr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`gpr0::R`](R) reader structure"] -impl crate::Readable for GPR0_SPEC {} +impl crate::Readable for Gpr0Spec {} #[doc = "`write(|w| ..)` method takes [`gpr0::W`](W) writer structure"] -impl crate::Writable for GPR0_SPEC { +impl crate::Writable for Gpr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPR0 to value 0"] -impl crate::Resettable for GPR0_SPEC { +impl crate::Resettable for Gpr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/gpr1.rs b/src/scu_general/gpr1.rs index b631741f..5daf62bb 100644 --- a/src/scu_general/gpr1.rs +++ b/src/scu_general/gpr1.rs @@ -1,49 +1,40 @@ #[doc = "Register `GPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAT` reader - User Data"] -pub type DAT_R = crate::FieldReader; +pub type DatR = crate::FieldReader; #[doc = "Field `DAT` writer - User Data"] -pub type DAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - pub fn dat(&self) -> DAT_R { - DAT_R::new(self.bits) + pub fn dat(&self) -> DatR { + DatR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] #[must_use] - pub fn dat(&mut self) -> DAT_W { - DAT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dat(&mut self) -> DatW { + DatW::new(self, 0) } } #[doc = "General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GPR1_SPEC; -impl crate::RegisterSpec for GPR1_SPEC { +pub struct Gpr1Spec; +impl crate::RegisterSpec for Gpr1Spec { type Ux = u32; } #[doc = "`read()` method returns [`gpr1::R`](R) reader structure"] -impl crate::Readable for GPR1_SPEC {} +impl crate::Readable for Gpr1Spec {} #[doc = "`write(|w| ..)` method takes [`gpr1::W`](W) writer structure"] -impl crate::Writable for GPR1_SPEC { +impl crate::Writable for Gpr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPR1 to value 0"] -impl crate::Resettable for GPR1_SPEC { +impl crate::Resettable for Gpr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/id.rs b/src/scu_general/id.rs index 09b3113a..ac3d1b88 100644 --- a/src/scu_general/id.rs +++ b/src/scu_general/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x0090_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x0090_c000; } diff --git a/src/scu_general/idchip.rs b/src/scu_general/idchip.rs index 1ce6b30c..529663bd 100644 --- a/src/scu_general/idchip.rs +++ b/src/scu_general/idchip.rs @@ -1,22 +1,22 @@ #[doc = "Register `IDCHIP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `IDCHIP` reader - Chip ID"] -pub type IDCHIP_R = crate::FieldReader; +pub type IdchipR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Chip ID"] #[inline(always)] - pub fn idchip(&self) -> IDCHIP_R { - IDCHIP_R::new(self.bits) + pub fn idchip(&self) -> IdchipR { + IdchipR::new(self.bits) } } #[doc = "Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IDCHIP_SPEC; -impl crate::RegisterSpec for IDCHIP_SPEC { +pub struct IdchipSpec; +impl crate::RegisterSpec for IdchipSpec { type Ux = u32; } #[doc = "`read()` method returns [`idchip::R`](R) reader structure"] -impl crate::Readable for IDCHIP_SPEC {} +impl crate::Readable for IdchipSpec {} #[doc = "`reset()` method sets IDCHIP to value 0"] -impl crate::Resettable for IDCHIP_SPEC { +impl crate::Resettable for IdchipSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/idmanuf.rs b/src/scu_general/idmanuf.rs index 9ce0d588..41ea4fc2 100644 --- a/src/scu_general/idmanuf.rs +++ b/src/scu_general/idmanuf.rs @@ -1,29 +1,29 @@ #[doc = "Register `IDMANUF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DEPT` reader - Department Identification Number"] -pub type DEPT_R = crate::FieldReader; +pub type DeptR = crate::FieldReader; #[doc = "Field `MANUF` reader - Manufacturer Identification Number"] -pub type MANUF_R = crate::FieldReader; +pub type ManufR = crate::FieldReader; impl R { #[doc = "Bits 0:4 - Department Identification Number"] #[inline(always)] - pub fn dept(&self) -> DEPT_R { - DEPT_R::new((self.bits & 0x1f) as u8) + pub fn dept(&self) -> DeptR { + DeptR::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:15 - Manufacturer Identification Number"] #[inline(always)] - pub fn manuf(&self) -> MANUF_R { - MANUF_R::new(((self.bits >> 5) & 0x07ff) as u16) + pub fn manuf(&self) -> ManufR { + ManufR::new(((self.bits >> 5) & 0x07ff) as u16) } } #[doc = "Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IDMANUF_SPEC; -impl crate::RegisterSpec for IDMANUF_SPEC { +pub struct IdmanufSpec; +impl crate::RegisterSpec for IdmanufSpec { type Ux = u32; } #[doc = "`read()` method returns [`idmanuf::R`](R) reader structure"] -impl crate::Readable for IDMANUF_SPEC {} +impl crate::Readable for IdmanufSpec {} #[doc = "`reset()` method sets IDMANUF to value 0x1820"] -impl crate::Resettable for IDMANUF_SPEC { +impl crate::Resettable for IdmanufSpec { const RESET_VALUE: u32 = 0x1820; } diff --git a/src/scu_general/mirrsts.rs b/src/scu_general/mirrsts.rs index 41d505c5..5b82905c 100644 --- a/src/scu_general/mirrsts.rs +++ b/src/scu_general/mirrsts.rs @@ -1,548 +1,548 @@ #[doc = "Register `MIRRSTS` reader"] -pub type R = crate::R; -#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Write Status"] -pub type HDCLR_R = crate::BitReader; +pub type R = crate::R; #[doc = "HDCLR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCLR_A { +pub enum Hdclr { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCLR_A) -> Self { + fn from(variant: Hdclr) -> Self { variant as u8 != 0 } } -impl HDCLR_R { +#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Write Status"] +pub type HdclrR = crate::BitReader; +impl HdclrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCLR_A { + pub const fn variant(&self) -> Hdclr { match self.bits { - false => HDCLR_A::VALUE1, - true => HDCLR_A::VALUE2, + false => Hdclr::Value1, + true => Hdclr::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCLR_A::VALUE1 + *self == Hdclr::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCLR_A::VALUE2 + *self == Hdclr::Value2 } } -#[doc = "Field `HDSET` reader - HDSET Mirror Register Write Status"] -pub type HDSET_R = crate::BitReader; #[doc = "HDSET Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDSET_A { +pub enum Hdset { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDSET_A) -> Self { + fn from(variant: Hdset) -> Self { variant as u8 != 0 } } -impl HDSET_R { +#[doc = "Field `HDSET` reader - HDSET Mirror Register Write Status"] +pub type HdsetR = crate::BitReader; +impl HdsetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDSET_A { + pub const fn variant(&self) -> Hdset { match self.bits { - false => HDSET_A::VALUE1, - true => HDSET_A::VALUE2, + false => Hdset::Value1, + true => Hdset::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDSET_A::VALUE1 + *self == Hdset::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDSET_A::VALUE2 + *self == Hdset::Value2 } } -#[doc = "Field `HDCR` reader - HDCR Mirror Register Write Status"] -pub type HDCR_R = crate::BitReader; #[doc = "HDCR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_A { +pub enum Hdcr { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_A) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } -impl HDCR_R { +#[doc = "Field `HDCR` reader - HDCR Mirror Register Write Status"] +pub type HdcrR = crate::BitReader; +impl HdcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCR_A { + pub const fn variant(&self) -> Hdcr { match self.bits { - false => HDCR_A::VALUE1, - true => HDCR_A::VALUE2, + false => Hdcr::Value1, + true => Hdcr::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCR_A::VALUE1 + *self == Hdcr::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCR_A::VALUE2 + *self == Hdcr::Value2 } } -#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Write Status"] -pub type OSCSICTRL_R = crate::BitReader; #[doc = "OSCSICTRL Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_A { +pub enum Oscsictrl { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_A) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } -impl OSCSICTRL_R { +#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Write Status"] +pub type OscsictrlR = crate::BitReader; +impl OscsictrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCSICTRL_A { + pub const fn variant(&self) -> Oscsictrl { match self.bits { - false => OSCSICTRL_A::VALUE1, - true => OSCSICTRL_A::VALUE2, + false => Oscsictrl::Value1, + true => Oscsictrl::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCSICTRL_A::VALUE1 + *self == Oscsictrl::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCSICTRL_A::VALUE2 + *self == Oscsictrl::Value2 } } -#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Write Status"] -pub type OSCULCTRL_R = crate::BitReader; #[doc = "OSCULCTRL Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_A { +pub enum Osculctrl { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_A) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } -impl OSCULCTRL_R { +#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Write Status"] +pub type OsculctrlR = crate::BitReader; +impl OsculctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCULCTRL_A { + pub const fn variant(&self) -> Osculctrl { match self.bits { - false => OSCULCTRL_A::VALUE1, - true => OSCULCTRL_A::VALUE2, + false => Osculctrl::Value1, + true => Osculctrl::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCULCTRL_A::VALUE1 + *self == Osculctrl::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCULCTRL_A::VALUE2 + *self == Osculctrl::Value2 } } -#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Write Status"] -pub type RTC_CTR_R = crate::BitReader; #[doc = "RTC CTR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_A { +pub enum RtcCtr { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_A) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } -impl RTC_CTR_R { +#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Write Status"] +pub type RtcCtrR = crate::BitReader; +impl RtcCtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_CTR_A { + pub const fn variant(&self) -> RtcCtr { match self.bits { - false => RTC_CTR_A::VALUE1, - true => RTC_CTR_A::VALUE2, + false => RtcCtr::Value1, + true => RtcCtr::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_CTR_A::VALUE1 + *self == RtcCtr::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_CTR_A::VALUE2 + *self == RtcCtr::Value2 } } -#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Write Status"] -pub type RTC_ATIM0_R = crate::BitReader; #[doc = "RTC ATIM0 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_A { +pub enum RtcAtim0 { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_A) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } -impl RTC_ATIM0_R { +#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Write Status"] +pub type RtcAtim0R = crate::BitReader; +impl RtcAtim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM0_A { + pub const fn variant(&self) -> RtcAtim0 { match self.bits { - false => RTC_ATIM0_A::VALUE1, - true => RTC_ATIM0_A::VALUE2, + false => RtcAtim0::Value1, + true => RtcAtim0::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM0_A::VALUE1 + *self == RtcAtim0::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM0_A::VALUE2 + *self == RtcAtim0::Value2 } } -#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Write Status"] -pub type RTC_ATIM1_R = crate::BitReader; #[doc = "RTC ATIM1 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_A { +pub enum RtcAtim1 { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_A) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } -impl RTC_ATIM1_R { +#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Write Status"] +pub type RtcAtim1R = crate::BitReader; +impl RtcAtim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM1_A { + pub const fn variant(&self) -> RtcAtim1 { match self.bits { - false => RTC_ATIM1_A::VALUE1, - true => RTC_ATIM1_A::VALUE2, + false => RtcAtim1::Value1, + true => RtcAtim1::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM1_A::VALUE1 + *self == RtcAtim1::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM1_A::VALUE2 + *self == RtcAtim1::Value2 } } -#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Write Status"] -pub type RTC_TIM0_R = crate::BitReader; #[doc = "RTC TIM0 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_A { +pub enum RtcTim0 { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_A) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } -impl RTC_TIM0_R { +#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Write Status"] +pub type RtcTim0R = crate::BitReader; +impl RtcTim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM0_A { + pub const fn variant(&self) -> RtcTim0 { match self.bits { - false => RTC_TIM0_A::VALUE1, - true => RTC_TIM0_A::VALUE2, + false => RtcTim0::Value1, + true => RtcTim0::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM0_A::VALUE1 + *self == RtcTim0::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM0_A::VALUE2 + *self == RtcTim0::Value2 } } -#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Write Status"] -pub type RTC_TIM1_R = crate::BitReader; #[doc = "RTC TIM1 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_A { +pub enum RtcTim1 { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_A) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } -impl RTC_TIM1_R { +#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Write Status"] +pub type RtcTim1R = crate::BitReader; +impl RtcTim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM1_A { + pub const fn variant(&self) -> RtcTim1 { match self.bits { - false => RTC_TIM1_A::VALUE1, - true => RTC_TIM1_A::VALUE2, + false => RtcTim1::Value1, + true => RtcTim1::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM1_A::VALUE1 + *self == RtcTim1::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM1_A::VALUE2 + *self == RtcTim1::Value2 } } -#[doc = "Field `RMX` reader - Retention Memory Access Register Update Status"] -pub type RMX_R = crate::BitReader; #[doc = "Retention Memory Access Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_A { +pub enum Rmx { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_A) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } -impl RMX_R { +#[doc = "Field `RMX` reader - Retention Memory Access Register Update Status"] +pub type RmxR = crate::BitReader; +impl RmxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RMX_A { + pub const fn variant(&self) -> Rmx { match self.bits { - false => RMX_A::VALUE1, - true => RMX_A::VALUE2, + false => Rmx::Value1, + true => Rmx::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RMX_A::VALUE1 + *self == Rmx::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RMX_A::VALUE2 + *self == Rmx::Value2 } } -#[doc = "Field `RTC_MSKSR` reader - RTC MSKSSR Mirror Register Write Status"] -pub type RTC_MSKSR_R = crate::BitReader; #[doc = "RTC MSKSSR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_MSKSR_A { +pub enum RtcMsksr { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_MSKSR_A) -> Self { + fn from(variant: RtcMsksr) -> Self { variant as u8 != 0 } } -impl RTC_MSKSR_R { +#[doc = "Field `RTC_MSKSR` reader - RTC MSKSSR Mirror Register Write Status"] +pub type RtcMsksrR = crate::BitReader; +impl RtcMsksrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_MSKSR_A { + pub const fn variant(&self) -> RtcMsksr { match self.bits { - false => RTC_MSKSR_A::VALUE1, - true => RTC_MSKSR_A::VALUE2, + false => RtcMsksr::Value1, + true => RtcMsksr::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_MSKSR_A::VALUE1 + *self == RtcMsksr::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_MSKSR_A::VALUE2 + *self == RtcMsksr::Value2 } } -#[doc = "Field `RTC_CLRSR` reader - RTC CLRSR Mirror Register Write Status"] -pub type RTC_CLRSR_R = crate::BitReader; #[doc = "RTC CLRSR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CLRSR_A { +pub enum RtcClrsr { #[doc = "0: Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Busy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CLRSR_A) -> Self { + fn from(variant: RtcClrsr) -> Self { variant as u8 != 0 } } -impl RTC_CLRSR_R { +#[doc = "Field `RTC_CLRSR` reader - RTC CLRSR Mirror Register Write Status"] +pub type RtcClrsrR = crate::BitReader; +impl RtcClrsrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_CLRSR_A { + pub const fn variant(&self) -> RtcClrsr { match self.bits { - false => RTC_CLRSR_A::VALUE1, - true => RTC_CLRSR_A::VALUE2, + false => RtcClrsr::Value1, + true => RtcClrsr::Value2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_CLRSR_A::VALUE1 + *self == RtcClrsr::Value1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_CLRSR_A::VALUE2 + *self == RtcClrsr::Value2 } } impl R { #[doc = "Bit 1 - HDCLR Mirror Register Write Status"] #[inline(always)] - pub fn hdclr(&self) -> HDCLR_R { - HDCLR_R::new(((self.bits >> 1) & 1) != 0) + pub fn hdclr(&self) -> HdclrR { + HdclrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - HDSET Mirror Register Write Status"] #[inline(always)] - pub fn hdset(&self) -> HDSET_R { - HDSET_R::new(((self.bits >> 2) & 1) != 0) + pub fn hdset(&self) -> HdsetR { + HdsetR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HDCR Mirror Register Write Status"] #[inline(always)] - pub fn hdcr(&self) -> HDCR_R { - HDCR_R::new(((self.bits >> 3) & 1) != 0) + pub fn hdcr(&self) -> HdcrR { + HdcrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - OSCSICTRL Mirror Register Write Status"] #[inline(always)] - pub fn oscsictrl(&self) -> OSCSICTRL_R { - OSCSICTRL_R::new(((self.bits >> 5) & 1) != 0) + pub fn oscsictrl(&self) -> OscsictrlR { + OscsictrlR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - OSCULCTRL Mirror Register Write Status"] #[inline(always)] - pub fn osculctrl(&self) -> OSCULCTRL_R { - OSCULCTRL_R::new(((self.bits >> 7) & 1) != 0) + pub fn osculctrl(&self) -> OsculctrlR { + OsculctrlR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RTC CTR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_ctr(&self) -> RTC_CTR_R { - RTC_CTR_R::new(((self.bits >> 8) & 1) != 0) + pub fn rtc_ctr(&self) -> RtcCtrR { + RtcCtrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RTC ATIM0 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_atim0(&self) -> RTC_ATIM0_R { - RTC_ATIM0_R::new(((self.bits >> 9) & 1) != 0) + pub fn rtc_atim0(&self) -> RtcAtim0R { + RtcAtim0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - RTC ATIM1 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_atim1(&self) -> RTC_ATIM1_R { - RTC_ATIM1_R::new(((self.bits >> 10) & 1) != 0) + pub fn rtc_atim1(&self) -> RtcAtim1R { + RtcAtim1R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - RTC TIM0 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RTC_TIM0_R { - RTC_TIM0_R::new(((self.bits >> 11) & 1) != 0) + pub fn rtc_tim0(&self) -> RtcTim0R { + RtcTim0R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - RTC TIM1 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_tim1(&self) -> RTC_TIM1_R { - RTC_TIM1_R::new(((self.bits >> 12) & 1) != 0) + pub fn rtc_tim1(&self) -> RtcTim1R { + RtcTim1R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Retention Memory Access Register Update Status"] #[inline(always)] - pub fn rmx(&self) -> RMX_R { - RMX_R::new(((self.bits >> 13) & 1) != 0) + pub fn rmx(&self) -> RmxR { + RmxR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - RTC MSKSSR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_msksr(&self) -> RTC_MSKSR_R { - RTC_MSKSR_R::new(((self.bits >> 14) & 1) != 0) + pub fn rtc_msksr(&self) -> RtcMsksrR { + RtcMsksrR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - RTC CLRSR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_clrsr(&self) -> RTC_CLRSR_R { - RTC_CLRSR_R::new(((self.bits >> 15) & 1) != 0) + pub fn rtc_clrsr(&self) -> RtcClrsrR { + RtcClrsrR::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MIRRSTS_SPEC; -impl crate::RegisterSpec for MIRRSTS_SPEC { +pub struct MirrstsSpec; +impl crate::RegisterSpec for MirrstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`mirrsts::R`](R) reader structure"] -impl crate::Readable for MIRRSTS_SPEC {} +impl crate::Readable for MirrstsSpec {} #[doc = "`reset()` method sets MIRRSTS to value 0"] -impl crate::Resettable for MIRRSTS_SPEC { +impl crate::Resettable for MirrstsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/rmacr.rs b/src/scu_general/rmacr.rs index 3107645b..614d866f 100644 --- a/src/scu_general/rmacr.rs +++ b/src/scu_general/rmacr.rs @@ -1,113 +1,104 @@ #[doc = "Register `RMACR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RMACR` writer"] -pub type W = crate::W; -#[doc = "Field `RDWR` reader - Hibernate Retention Memory Register Update Control"] -pub type RDWR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Hibernate Retention Memory Register Update Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDWR_A { +pub enum Rdwr { #[doc = "0: transfer data from Retention Memory in Hibernate domain to RMDATA register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: transfer data from RMDATA into Retention Memory in Hibernate domain"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDWR_A) -> Self { + fn from(variant: Rdwr) -> Self { variant as u8 != 0 } } -impl RDWR_R { +#[doc = "Field `RDWR` reader - Hibernate Retention Memory Register Update Control"] +pub type RdwrR = crate::BitReader; +impl RdwrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDWR_A { + pub const fn variant(&self) -> Rdwr { match self.bits { - false => RDWR_A::VALUE1, - true => RDWR_A::VALUE2, + false => Rdwr::Value1, + true => Rdwr::Value2, } } #[doc = "transfer data from Retention Memory in Hibernate domain to RMDATA register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDWR_A::VALUE1 + *self == Rdwr::Value1 } #[doc = "transfer data from RMDATA into Retention Memory in Hibernate domain"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDWR_A::VALUE2 + *self == Rdwr::Value2 } } #[doc = "Field `RDWR` writer - Hibernate Retention Memory Register Update Control"] -pub type RDWR_W<'a, REG> = crate::BitWriter<'a, REG, RDWR_A>; -impl<'a, REG> RDWR_W<'a, REG> +pub type RdwrW<'a, REG> = crate::BitWriter<'a, REG, Rdwr>; +impl<'a, REG> RdwrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "transfer data from Retention Memory in Hibernate domain to RMDATA register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RDWR_A::VALUE1) + self.variant(Rdwr::Value1) } #[doc = "transfer data from RMDATA into Retention Memory in Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RDWR_A::VALUE2) + self.variant(Rdwr::Value2) } } #[doc = "Field `ADDR` reader - Hibernate Retention Memory Register Address Select"] -pub type ADDR_R = crate::FieldReader; +pub type AddrR = crate::FieldReader; #[doc = "Field `ADDR` writer - Hibernate Retention Memory Register Address Select"] -pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"] #[inline(always)] - pub fn rdwr(&self) -> RDWR_R { - RDWR_R::new((self.bits & 1) != 0) + pub fn rdwr(&self) -> RdwrR { + RdwrR::new((self.bits & 1) != 0) } #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"] #[inline(always)] - pub fn addr(&self) -> ADDR_R { - ADDR_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn addr(&self) -> AddrR { + AddrR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"] #[inline(always)] #[must_use] - pub fn rdwr(&mut self) -> RDWR_W { - RDWR_W::new(self, 0) + pub fn rdwr(&mut self) -> RdwrW { + RdwrW::new(self, 0) } #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> ADDR_W { - ADDR_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn addr(&mut self) -> AddrW { + AddrW::new(self, 16) } } #[doc = "Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RMACR_SPEC; -impl crate::RegisterSpec for RMACR_SPEC { +pub struct RmacrSpec; +impl crate::RegisterSpec for RmacrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rmacr::R`](R) reader structure"] -impl crate::Readable for RMACR_SPEC {} +impl crate::Readable for RmacrSpec {} #[doc = "`write(|w| ..)` method takes [`rmacr::W`](W) writer structure"] -impl crate::Writable for RMACR_SPEC { +impl crate::Writable for RmacrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RMACR to value 0"] -impl crate::Resettable for RMACR_SPEC { +impl crate::Resettable for RmacrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/rmdata.rs b/src/scu_general/rmdata.rs index de9fa71e..cb58cd1e 100644 --- a/src/scu_general/rmdata.rs +++ b/src/scu_general/rmdata.rs @@ -1,49 +1,40 @@ #[doc = "Register `RMDATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RMDATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA` reader - Hibernate Retention Memory Data"] -pub type DATA_R = crate::FieldReader; +pub type DataR = crate::FieldReader; #[doc = "Field `DATA` writer - Hibernate Retention Memory Data"] -pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Hibernate Retention Memory Data"] #[inline(always)] - pub fn data(&self) -> DATA_R { - DATA_R::new(self.bits) + pub fn data(&self) -> DataR { + DataR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Hibernate Retention Memory Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DATA_W { - DATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn data(&mut self) -> DataW { + DataW::new(self, 0) } } #[doc = "Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RMDATA_SPEC; -impl crate::RegisterSpec for RMDATA_SPEC { +pub struct RmdataSpec; +impl crate::RegisterSpec for RmdataSpec { type Ux = u32; } #[doc = "`read()` method returns [`rmdata::R`](R) reader structure"] -impl crate::Readable for RMDATA_SPEC {} +impl crate::Readable for RmdataSpec {} #[doc = "`write(|w| ..)` method takes [`rmdata::W`](W) writer structure"] -impl crate::Writable for RMDATA_SPEC { +impl crate::Writable for RmdataSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RMDATA to value 0"] -impl crate::Resettable for RMDATA_SPEC { +impl crate::Resettable for RmdataSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/sdmmcdel.rs b/src/scu_general/sdmmcdel.rs index 58ea113c..f06b1dcf 100644 --- a/src/scu_general/sdmmcdel.rs +++ b/src/scu_general/sdmmcdel.rs @@ -1,113 +1,104 @@ #[doc = "Register `SDMMCDEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDMMCDEL` writer"] -pub type W = crate::W; -#[doc = "Field `TAPEN` reader - Enable delay on the CMD/DAT out lines"] -pub type TAPEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Enable delay on the CMD/DAT out lines\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TAPEN_A { +pub enum Tapen { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TAPEN_A) -> Self { + fn from(variant: Tapen) -> Self { variant as u8 != 0 } } -impl TAPEN_R { +#[doc = "Field `TAPEN` reader - Enable delay on the CMD/DAT out lines"] +pub type TapenR = crate::BitReader; +impl TapenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TAPEN_A { + pub const fn variant(&self) -> Tapen { match self.bits { - false => TAPEN_A::VALUE1, - true => TAPEN_A::VALUE2, + false => Tapen::Value1, + true => Tapen::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TAPEN_A::VALUE1 + *self == Tapen::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TAPEN_A::VALUE2 + *self == Tapen::Value2 } } #[doc = "Field `TAPEN` writer - Enable delay on the CMD/DAT out lines"] -pub type TAPEN_W<'a, REG> = crate::BitWriter<'a, REG, TAPEN_A>; -impl<'a, REG> TAPEN_W<'a, REG> +pub type TapenW<'a, REG> = crate::BitWriter<'a, REG, Tapen>; +impl<'a, REG> TapenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TAPEN_A::VALUE1) + self.variant(Tapen::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TAPEN_A::VALUE2) + self.variant(Tapen::Value2) } } #[doc = "Field `TAPDEL` reader - Number of Delay Elements Select"] -pub type TAPDEL_R = crate::FieldReader; +pub type TapdelR = crate::FieldReader; #[doc = "Field `TAPDEL` writer - Number of Delay Elements Select"] -pub type TAPDEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TapdelW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Enable delay on the CMD/DAT out lines"] #[inline(always)] - pub fn tapen(&self) -> TAPEN_R { - TAPEN_R::new((self.bits & 1) != 0) + pub fn tapen(&self) -> TapenR { + TapenR::new((self.bits & 1) != 0) } #[doc = "Bits 4:7 - Number of Delay Elements Select"] #[inline(always)] - pub fn tapdel(&self) -> TAPDEL_R { - TAPDEL_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn tapdel(&self) -> TapdelR { + TapdelR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Enable delay on the CMD/DAT out lines"] #[inline(always)] #[must_use] - pub fn tapen(&mut self) -> TAPEN_W { - TAPEN_W::new(self, 0) + pub fn tapen(&mut self) -> TapenW { + TapenW::new(self, 0) } #[doc = "Bits 4:7 - Number of Delay Elements Select"] #[inline(always)] #[must_use] - pub fn tapdel(&mut self) -> TAPDEL_W { - TAPDEL_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tapdel(&mut self) -> TapdelW { + TapdelW::new(self, 4) } } #[doc = "SD-MMC Delay Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdmmcdel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdmmcdel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDMMCDEL_SPEC; -impl crate::RegisterSpec for SDMMCDEL_SPEC { +pub struct SdmmcdelSpec; +impl crate::RegisterSpec for SdmmcdelSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdmmcdel::R`](R) reader structure"] -impl crate::Readable for SDMMCDEL_SPEC {} +impl crate::Readable for SdmmcdelSpec {} #[doc = "`write(|w| ..)` method takes [`sdmmcdel::W`](W) writer structure"] -impl crate::Writable for SDMMCDEL_SPEC { +impl crate::Writable for SdmmcdelSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDMMCDEL to value 0"] -impl crate::Resettable for SDMMCDEL_SPEC { +impl crate::Resettable for SdmmcdelSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/stcon.rs b/src/scu_general/stcon.rs index e0cfa5d2..fdde3a2a 100644 --- a/src/scu_general/stcon.rs +++ b/src/scu_general/stcon.rs @@ -1,156 +1,156 @@ #[doc = "Register `STCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STCON` writer"] -pub type W = crate::W; -#[doc = "Field `HWCON` reader - HW Configuration"] -pub type HWCON_R = crate::FieldReader; +pub type W = crate::W; #[doc = "HW Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HWCON_A { +pub enum Hwcon { #[doc = "0: Normal mode, JTAG"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ASC BSL enabled"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: BMI customized boot enabled"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CAN BSL enabled"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HWCON_A) -> Self { + fn from(variant: Hwcon) -> Self { variant as _ } } -impl crate::FieldSpec for HWCON_A { +impl crate::FieldSpec for Hwcon { type Ux = u8; } -impl HWCON_R { +#[doc = "Field `HWCON` reader - HW Configuration"] +pub type HwconR = crate::FieldReader; +impl HwconR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HWCON_A { + pub const fn variant(&self) -> Hwcon { match self.bits { - 0 => HWCON_A::VALUE1, - 1 => HWCON_A::VALUE2, - 2 => HWCON_A::VALUE3, - 3 => HWCON_A::VALUE4, + 0 => Hwcon::Value1, + 1 => Hwcon::Value2, + 2 => Hwcon::Value3, + 3 => Hwcon::Value4, _ => unreachable!(), } } #[doc = "Normal mode, JTAG"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HWCON_A::VALUE1 + *self == Hwcon::Value1 } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HWCON_A::VALUE2 + *self == Hwcon::Value2 } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HWCON_A::VALUE3 + *self == Hwcon::Value3 } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HWCON_A::VALUE4 + *self == Hwcon::Value4 } } -#[doc = "Field `SWCON` reader - SW Configuration"] -pub type SWCON_R = crate::FieldReader; #[doc = "SW Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SWCON_A { +pub enum Swcon { #[doc = "0: Normal mode, boot from Boot ROM"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: ASC BSL enabled"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: BMI customized boot enabled"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: CAN BSL enabled"] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Boot from Code SRAM"] - VALUE5 = 4, + Value5 = 4, #[doc = "8: Boot from alternate Flash Address 0"] - VALUE6 = 8, + Value6 = 8, #[doc = "12: Boot from alternate Flash Address 1"] - VALUE7 = 12, + Value7 = 12, #[doc = "14: Enable fallback Alternate Boot Mode (ABM)"] - VALUE8 = 14, + Value8 = 14, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SWCON_A) -> Self { + fn from(variant: Swcon) -> Self { variant as _ } } -impl crate::FieldSpec for SWCON_A { +impl crate::FieldSpec for Swcon { type Ux = u8; } -impl SWCON_R { +#[doc = "Field `SWCON` reader - SW Configuration"] +pub type SwconR = crate::FieldReader; +impl SwconR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SWCON_A::VALUE1), - 1 => Some(SWCON_A::VALUE2), - 2 => Some(SWCON_A::VALUE3), - 3 => Some(SWCON_A::VALUE4), - 4 => Some(SWCON_A::VALUE5), - 8 => Some(SWCON_A::VALUE6), - 12 => Some(SWCON_A::VALUE7), - 14 => Some(SWCON_A::VALUE8), + 0 => Some(Swcon::Value1), + 1 => Some(Swcon::Value2), + 2 => Some(Swcon::Value3), + 3 => Some(Swcon::Value4), + 4 => Some(Swcon::Value5), + 8 => Some(Swcon::Value6), + 12 => Some(Swcon::Value7), + 14 => Some(Swcon::Value8), _ => None, } } #[doc = "Normal mode, boot from Boot ROM"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SWCON_A::VALUE1 + *self == Swcon::Value1 } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SWCON_A::VALUE2 + *self == Swcon::Value2 } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SWCON_A::VALUE3 + *self == Swcon::Value3 } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SWCON_A::VALUE4 + *self == Swcon::Value4 } #[doc = "Boot from Code SRAM"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SWCON_A::VALUE5 + *self == Swcon::Value5 } #[doc = "Boot from alternate Flash Address 0"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SWCON_A::VALUE6 + *self == Swcon::Value6 } #[doc = "Boot from alternate Flash Address 1"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SWCON_A::VALUE7 + *self == Swcon::Value7 } #[doc = "Enable fallback Alternate Boot Mode (ABM)"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == SWCON_A::VALUE8 + *self == Swcon::Value8 } } #[doc = "Field `SWCON` writer - SW Configuration"] -pub type SWCON_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SWCON_A>; -impl<'a, REG> SWCON_W<'a, REG> +pub type SwconW<'a, REG> = crate::FieldWriter<'a, REG, 4, Swcon>; +impl<'a, REG> SwconW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -158,87 +158,78 @@ where #[doc = "Normal mode, boot from Boot ROM"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE1) + self.variant(Swcon::Value1) } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE2) + self.variant(Swcon::Value2) } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE3) + self.variant(Swcon::Value3) } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE4) + self.variant(Swcon::Value4) } #[doc = "Boot from Code SRAM"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE5) + self.variant(Swcon::Value5) } #[doc = "Boot from alternate Flash Address 0"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE6) + self.variant(Swcon::Value6) } #[doc = "Boot from alternate Flash Address 1"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE7) + self.variant(Swcon::Value7) } #[doc = "Enable fallback Alternate Boot Mode (ABM)"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(SWCON_A::VALUE8) + self.variant(Swcon::Value8) } } impl R { #[doc = "Bits 0:1 - HW Configuration"] #[inline(always)] - pub fn hwcon(&self) -> HWCON_R { - HWCON_R::new((self.bits & 3) as u8) + pub fn hwcon(&self) -> HwconR { + HwconR::new((self.bits & 3) as u8) } #[doc = "Bits 8:11 - SW Configuration"] #[inline(always)] - pub fn swcon(&self) -> SWCON_R { - SWCON_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn swcon(&self) -> SwconR { + SwconR::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - SW Configuration"] #[inline(always)] #[must_use] - pub fn swcon(&mut self) -> SWCON_W { - SWCON_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn swcon(&mut self) -> SwconW { + SwconW::new(self, 8) } } #[doc = "Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct STCON_SPEC; -impl crate::RegisterSpec for STCON_SPEC { +pub struct StconSpec; +impl crate::RegisterSpec for StconSpec { type Ux = u32; } #[doc = "`read()` method returns [`stcon::R`](R) reader structure"] -impl crate::Readable for STCON_SPEC {} +impl crate::Readable for StconSpec {} #[doc = "`write(|w| ..)` method takes [`stcon::W`](W) writer structure"] -impl crate::Writable for STCON_SPEC { +impl crate::Writable for StconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STCON to value 0"] -impl crate::Resettable for STCON_SPEC { +impl crate::Resettable for StconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate.rs b/src/scu_hibernate.rs index 6cf959eb..c0303b78 100644 --- a/src/scu_hibernate.rs +++ b/src/scu_hibernate.rs @@ -1,84 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - hdstat: HDSTAT, - hdclr: HDCLR, - hdset: HDSET, - hdcr: HDCR, + hdstat: Hdstat, + hdclr: Hdclr, + hdset: Hdset, + hdcr: Hdcr, _reserved4: [u8; 0x04], - oscsictrl: OSCSICTRL, - osculstat: OSCULSTAT, - osculctrl: OSCULCTRL, + oscsictrl: Oscsictrl, + osculstat: Osculstat, + osculctrl: Osculctrl, } impl RegisterBlock { #[doc = "0x00 - Hibernate Domain Status Register"] #[inline(always)] - pub const fn hdstat(&self) -> &HDSTAT { + pub const fn hdstat(&self) -> &Hdstat { &self.hdstat } #[doc = "0x04 - Hibernate Domain Status Clear Register"] #[inline(always)] - pub const fn hdclr(&self) -> &HDCLR { + pub const fn hdclr(&self) -> &Hdclr { &self.hdclr } #[doc = "0x08 - Hibernate Domain Status Set Register"] #[inline(always)] - pub const fn hdset(&self) -> &HDSET { + pub const fn hdset(&self) -> &Hdset { &self.hdset } #[doc = "0x0c - Hibernate Domain Control Register"] #[inline(always)] - pub const fn hdcr(&self) -> &HDCR { + pub const fn hdcr(&self) -> &Hdcr { &self.hdcr } #[doc = "0x14 - fOSI Control Register"] #[inline(always)] - pub const fn oscsictrl(&self) -> &OSCSICTRL { + pub const fn oscsictrl(&self) -> &Oscsictrl { &self.oscsictrl } #[doc = "0x18 - OSC_ULP Status Register"] #[inline(always)] - pub const fn osculstat(&self) -> &OSCULSTAT { + pub const fn osculstat(&self) -> &Osculstat { &self.osculstat } #[doc = "0x1c - OSC_ULP Control Register"] #[inline(always)] - pub const fn osculctrl(&self) -> &OSCULCTRL { + pub const fn osculctrl(&self) -> &Osculctrl { &self.osculctrl } } #[doc = "HDSTAT (r) register accessor: Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdstat`] module"] -pub type HDSTAT = crate::Reg; +#[doc(alias = "HDSTAT")] +pub type Hdstat = crate::Reg; #[doc = "Hibernate Domain Status Register"] pub mod hdstat; #[doc = "HDCLR (w) register accessor: Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdclr`] module"] -pub type HDCLR = crate::Reg; +#[doc(alias = "HDCLR")] +pub type Hdclr = crate::Reg; #[doc = "Hibernate Domain Status Clear Register"] pub mod hdclr; #[doc = "HDSET (w) register accessor: Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdset`] module"] -pub type HDSET = crate::Reg; +#[doc(alias = "HDSET")] +pub type Hdset = crate::Reg; #[doc = "Hibernate Domain Status Set Register"] pub mod hdset; #[doc = "HDCR (rw) register accessor: Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdcr`] module"] -pub type HDCR = crate::Reg; +#[doc(alias = "HDCR")] +pub type Hdcr = crate::Reg; #[doc = "Hibernate Domain Control Register"] pub mod hdcr; #[doc = "OSCSICTRL (rw) register accessor: fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oscsictrl`] module"] -pub type OSCSICTRL = crate::Reg; +#[doc(alias = "OSCSICTRL")] +pub type Oscsictrl = crate::Reg; #[doc = "fOSI Control Register"] pub mod oscsictrl; #[doc = "OSCULSTAT (r) register accessor: OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculstat`] module"] -pub type OSCULSTAT = crate::Reg; +#[doc(alias = "OSCULSTAT")] +pub type Osculstat = crate::Reg; #[doc = "OSC_ULP Status Register"] pub mod osculstat; #[doc = "OSCULCTRL (rw) register accessor: OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculctrl`] module"] -pub type OSCULCTRL = crate::Reg; +#[doc(alias = "OSCULCTRL")] +pub type Osculctrl = crate::Reg; #[doc = "OSC_ULP Control Register"] pub mod osculctrl; diff --git a/src/scu_hibernate/hdclr.rs b/src/scu_hibernate/hdclr.rs index a07df9de..a7b8cb68 100644 --- a/src/scu_hibernate/hdclr.rs +++ b/src/scu_hibernate/hdclr.rs @@ -1,176 +1,167 @@ #[doc = "Register `HDCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wake-up Pin Event Positive Edge Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPEV_AW { +pub enum Epev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPEV_AW) -> Self { + fn from(variant: Epev) -> Self { variant as u8 != 0 } } #[doc = "Field `EPEV` writer - Wake-up Pin Event Positive Edge Clear"] -pub type EPEV_W<'a, REG> = crate::BitWriter<'a, REG, EPEV_AW>; -impl<'a, REG> EPEV_W<'a, REG> +pub type EpevW<'a, REG> = crate::BitWriter<'a, REG, Epev>; +impl<'a, REG> EpevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPEV_AW::VALUE1) + self.variant(Epev::Value1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPEV_AW::VALUE2) + self.variant(Epev::Value2) } } #[doc = "Wake-up Pin Event Negative Edge Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENEV_AW { +pub enum Enev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENEV_AW) -> Self { + fn from(variant: Enev) -> Self { variant as u8 != 0 } } #[doc = "Field `ENEV` writer - Wake-up Pin Event Negative Edge Clear"] -pub type ENEV_W<'a, REG> = crate::BitWriter<'a, REG, ENEV_AW>; -impl<'a, REG> ENEV_W<'a, REG> +pub type EnevW<'a, REG> = crate::BitWriter<'a, REG, Enev>; +impl<'a, REG> EnevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENEV_AW::VALUE1) + self.variant(Enev::Value1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENEV_AW::VALUE2) + self.variant(Enev::Value2) } } #[doc = "RTC Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTCEV_AW { +pub enum Rtcev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTCEV_AW) -> Self { + fn from(variant: Rtcev) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCEV` writer - RTC Event Clear"] -pub type RTCEV_W<'a, REG> = crate::BitWriter<'a, REG, RTCEV_AW>; -impl<'a, REG> RTCEV_W<'a, REG> +pub type RtcevW<'a, REG> = crate::BitWriter<'a, REG, Rtcev>; +impl<'a, REG> RtcevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTCEV_AW::VALUE1) + self.variant(Rtcev::Value1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTCEV_AW::VALUE2) + self.variant(Rtcev::Value2) } } #[doc = "ULP WDG Alarm Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDG_AW { +pub enum Ulpwdg { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear watchdog alarm"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDG_AW) -> Self { + fn from(variant: Ulpwdg) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDG` writer - ULP WDG Alarm Clear"] -pub type ULPWDG_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDG_AW>; -impl<'a, REG> ULPWDG_W<'a, REG> +pub type UlpwdgW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdg>; +impl<'a, REG> UlpwdgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDG_AW::VALUE1) + self.variant(Ulpwdg::Value1) } #[doc = "Clear watchdog alarm"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDG_AW::VALUE2) + self.variant(Ulpwdg::Value2) } } impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Clear"] #[inline(always)] #[must_use] - pub fn epev(&mut self) -> EPEV_W { - EPEV_W::new(self, 0) + pub fn epev(&mut self) -> EpevW { + EpevW::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Clear"] #[inline(always)] #[must_use] - pub fn enev(&mut self) -> ENEV_W { - ENEV_W::new(self, 1) + pub fn enev(&mut self) -> EnevW { + EnevW::new(self, 1) } #[doc = "Bit 2 - RTC Event Clear"] #[inline(always)] #[must_use] - pub fn rtcev(&mut self) -> RTCEV_W { - RTCEV_W::new(self, 2) + pub fn rtcev(&mut self) -> RtcevW { + RtcevW::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Clear"] #[inline(always)] #[must_use] - pub fn ulpwdg(&mut self) -> ULPWDG_W { - ULPWDG_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ulpwdg(&mut self) -> UlpwdgW { + UlpwdgW::new(self, 3) } } #[doc = "Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HDCLR_SPEC; -impl crate::RegisterSpec for HDCLR_SPEC { +pub struct HdclrSpec; +impl crate::RegisterSpec for HdclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hdclr::W`](W) writer structure"] -impl crate::Writable for HDCLR_SPEC { +impl crate::Writable for HdclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDCLR to value 0"] -impl crate::Resettable for HDCLR_SPEC { +impl crate::Resettable for HdclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hdcr.rs b/src/scu_hibernate/hdcr.rs index d2560777..6a3a7b31 100644 --- a/src/scu_hibernate/hdcr.rs +++ b/src/scu_hibernate/hdcr.rs @@ -1,698 +1,698 @@ #[doc = "Register `HDCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HDCR` writer"] -pub type W = crate::W; -#[doc = "Field `WKPEP` reader - Wake-Up on Pin Event Positive Edge Enable"] -pub type WKPEP_R = crate::BitReader; +pub type W = crate::W; #[doc = "Wake-Up on Pin Event Positive Edge Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WKPEP_A { +pub enum Wkpep { #[doc = "0: Wake-up event disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up event enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WKPEP_A) -> Self { + fn from(variant: Wkpep) -> Self { variant as u8 != 0 } } -impl WKPEP_R { +#[doc = "Field `WKPEP` reader - Wake-Up on Pin Event Positive Edge Enable"] +pub type WkpepR = crate::BitReader; +impl WkpepR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WKPEP_A { + pub const fn variant(&self) -> Wkpep { match self.bits { - false => WKPEP_A::VALUE1, - true => WKPEP_A::VALUE2, + false => Wkpep::Value1, + true => Wkpep::Value2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WKPEP_A::VALUE1 + *self == Wkpep::Value1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WKPEP_A::VALUE2 + *self == Wkpep::Value2 } } #[doc = "Field `WKPEP` writer - Wake-Up on Pin Event Positive Edge Enable"] -pub type WKPEP_W<'a, REG> = crate::BitWriter<'a, REG, WKPEP_A>; -impl<'a, REG> WKPEP_W<'a, REG> +pub type WkpepW<'a, REG> = crate::BitWriter<'a, REG, Wkpep>; +impl<'a, REG> WkpepW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WKPEP_A::VALUE1) + self.variant(Wkpep::Value1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WKPEP_A::VALUE2) + self.variant(Wkpep::Value2) } } -#[doc = "Field `WKPEN` reader - Wake-up on Pin Event Negative Edge Enable"] -pub type WKPEN_R = crate::BitReader; #[doc = "Wake-up on Pin Event Negative Edge Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WKPEN_A { +pub enum Wkpen { #[doc = "0: Wake-up event disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up event enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WKPEN_A) -> Self { + fn from(variant: Wkpen) -> Self { variant as u8 != 0 } } -impl WKPEN_R { +#[doc = "Field `WKPEN` reader - Wake-up on Pin Event Negative Edge Enable"] +pub type WkpenR = crate::BitReader; +impl WkpenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WKPEN_A { + pub const fn variant(&self) -> Wkpen { match self.bits { - false => WKPEN_A::VALUE1, - true => WKPEN_A::VALUE2, + false => Wkpen::Value1, + true => Wkpen::Value2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WKPEN_A::VALUE1 + *self == Wkpen::Value1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WKPEN_A::VALUE2 + *self == Wkpen::Value2 } } #[doc = "Field `WKPEN` writer - Wake-up on Pin Event Negative Edge Enable"] -pub type WKPEN_W<'a, REG> = crate::BitWriter<'a, REG, WKPEN_A>; -impl<'a, REG> WKPEN_W<'a, REG> +pub type WkpenW<'a, REG> = crate::BitWriter<'a, REG, Wkpen>; +impl<'a, REG> WkpenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WKPEN_A::VALUE1) + self.variant(Wkpen::Value1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WKPEN_A::VALUE2) + self.variant(Wkpen::Value2) } } -#[doc = "Field `RTCE` reader - Wake-up on RTC Event Enable"] -pub type RTCE_R = crate::BitReader; #[doc = "Wake-up on RTC Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTCE_A { +pub enum Rtce { #[doc = "0: Wake-up event disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up event enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTCE_A) -> Self { + fn from(variant: Rtce) -> Self { variant as u8 != 0 } } -impl RTCE_R { +#[doc = "Field `RTCE` reader - Wake-up on RTC Event Enable"] +pub type RtceR = crate::BitReader; +impl RtceR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTCE_A { + pub const fn variant(&self) -> Rtce { match self.bits { - false => RTCE_A::VALUE1, - true => RTCE_A::VALUE2, + false => Rtce::Value1, + true => Rtce::Value2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTCE_A::VALUE1 + *self == Rtce::Value1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTCE_A::VALUE2 + *self == Rtce::Value2 } } #[doc = "Field `RTCE` writer - Wake-up on RTC Event Enable"] -pub type RTCE_W<'a, REG> = crate::BitWriter<'a, REG, RTCE_A>; -impl<'a, REG> RTCE_W<'a, REG> +pub type RtceW<'a, REG> = crate::BitWriter<'a, REG, Rtce>; +impl<'a, REG> RtceW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTCE_A::VALUE1) + self.variant(Rtce::Value1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTCE_A::VALUE2) + self.variant(Rtce::Value2) } } -#[doc = "Field `ULPWDGEN` reader - ULP WDG Alarm Enable"] -pub type ULPWDGEN_R = crate::BitReader; #[doc = "ULP WDG Alarm Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDGEN_A { +pub enum Ulpwdgen { #[doc = "0: Wake-up event disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up event enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDGEN_A) -> Self { + fn from(variant: Ulpwdgen) -> Self { variant as u8 != 0 } } -impl ULPWDGEN_R { +#[doc = "Field `ULPWDGEN` reader - ULP WDG Alarm Enable"] +pub type UlpwdgenR = crate::BitReader; +impl UlpwdgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ULPWDGEN_A { + pub const fn variant(&self) -> Ulpwdgen { match self.bits { - false => ULPWDGEN_A::VALUE1, - true => ULPWDGEN_A::VALUE2, + false => Ulpwdgen::Value1, + true => Ulpwdgen::Value2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ULPWDGEN_A::VALUE1 + *self == Ulpwdgen::Value1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ULPWDGEN_A::VALUE2 + *self == Ulpwdgen::Value2 } } #[doc = "Field `ULPWDGEN` writer - ULP WDG Alarm Enable"] -pub type ULPWDGEN_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGEN_A>; -impl<'a, REG> ULPWDGEN_W<'a, REG> +pub type UlpwdgenW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgen>; +impl<'a, REG> UlpwdgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDGEN_A::VALUE1) + self.variant(Ulpwdgen::Value1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDGEN_A::VALUE2) + self.variant(Ulpwdgen::Value2) } } -#[doc = "Field `HIB` reader - Hibernate Request Value Set"] -pub type HIB_R = crate::BitReader; #[doc = "Hibernate Request Value Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIB_A { +pub enum Hib { #[doc = "0: External hibernate request inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: External hibernate request active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIB_A) -> Self { + fn from(variant: Hib) -> Self { variant as u8 != 0 } } -impl HIB_R { +#[doc = "Field `HIB` reader - Hibernate Request Value Set"] +pub type HibR = crate::BitReader; +impl HibR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIB_A { + pub const fn variant(&self) -> Hib { match self.bits { - false => HIB_A::VALUE1, - true => HIB_A::VALUE2, + false => Hib::Value1, + true => Hib::Value2, } } #[doc = "External hibernate request inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIB_A::VALUE1 + *self == Hib::Value1 } #[doc = "External hibernate request active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIB_A::VALUE2 + *self == Hib::Value2 } } #[doc = "Field `HIB` writer - Hibernate Request Value Set"] -pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_A>; -impl<'a, REG> HIB_W<'a, REG> +pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; +impl<'a, REG> HibW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External hibernate request inactive"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIB_A::VALUE1) + self.variant(Hib::Value1) } #[doc = "External hibernate request active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIB_A::VALUE2) + self.variant(Hib::Value2) } } -#[doc = "Field `RCS` reader - fRTC Clock Selection"] -pub type RCS_R = crate::BitReader; #[doc = "fRTC Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RCS_A { +pub enum Rcs { #[doc = "0: fOSI selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fULP selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RCS_A) -> Self { + fn from(variant: Rcs) -> Self { variant as u8 != 0 } } -impl RCS_R { +#[doc = "Field `RCS` reader - fRTC Clock Selection"] +pub type RcsR = crate::BitReader; +impl RcsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RCS_A { + pub const fn variant(&self) -> Rcs { match self.bits { - false => RCS_A::VALUE1, - true => RCS_A::VALUE2, + false => Rcs::Value1, + true => Rcs::Value2, } } #[doc = "fOSI selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RCS_A::VALUE1 + *self == Rcs::Value1 } #[doc = "fULP selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RCS_A::VALUE2 + *self == Rcs::Value2 } } #[doc = "Field `RCS` writer - fRTC Clock Selection"] -pub type RCS_W<'a, REG> = crate::BitWriter<'a, REG, RCS_A>; -impl<'a, REG> RCS_W<'a, REG> +pub type RcsW<'a, REG> = crate::BitWriter<'a, REG, Rcs>; +impl<'a, REG> RcsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOSI selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RCS_A::VALUE1) + self.variant(Rcs::Value1) } #[doc = "fULP selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RCS_A::VALUE2) + self.variant(Rcs::Value2) } } -#[doc = "Field `STDBYSEL` reader - fSTDBY Clock Selection"] -pub type STDBYSEL_R = crate::BitReader; #[doc = "fSTDBY Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STDBYSEL_A { +pub enum Stdbysel { #[doc = "0: fOSI selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fULP selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STDBYSEL_A) -> Self { + fn from(variant: Stdbysel) -> Self { variant as u8 != 0 } } -impl STDBYSEL_R { +#[doc = "Field `STDBYSEL` reader - fSTDBY Clock Selection"] +pub type StdbyselR = crate::BitReader; +impl StdbyselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STDBYSEL_A { + pub const fn variant(&self) -> Stdbysel { match self.bits { - false => STDBYSEL_A::VALUE1, - true => STDBYSEL_A::VALUE2, + false => Stdbysel::Value1, + true => Stdbysel::Value2, } } #[doc = "fOSI selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STDBYSEL_A::VALUE1 + *self == Stdbysel::Value1 } #[doc = "fULP selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STDBYSEL_A::VALUE2 + *self == Stdbysel::Value2 } } #[doc = "Field `STDBYSEL` writer - fSTDBY Clock Selection"] -pub type STDBYSEL_W<'a, REG> = crate::BitWriter<'a, REG, STDBYSEL_A>; -impl<'a, REG> STDBYSEL_W<'a, REG> +pub type StdbyselW<'a, REG> = crate::BitWriter<'a, REG, Stdbysel>; +impl<'a, REG> StdbyselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOSI selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STDBYSEL_A::VALUE1) + self.variant(Stdbysel::Value1) } #[doc = "fULP selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STDBYSEL_A::VALUE2) + self.variant(Stdbysel::Value2) } } -#[doc = "Field `WKUPSEL` reader - Wake-Up from Hibernate Trigger Input Selection"] -pub type WKUPSEL_R = crate::BitReader; #[doc = "Wake-Up from Hibernate Trigger Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WKUPSEL_A { +pub enum Wkupsel { #[doc = "0: HIB_IO_1 pin selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HIB_IO_0 pin selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WKUPSEL_A) -> Self { + fn from(variant: Wkupsel) -> Self { variant as u8 != 0 } } -impl WKUPSEL_R { +#[doc = "Field `WKUPSEL` reader - Wake-Up from Hibernate Trigger Input Selection"] +pub type WkupselR = crate::BitReader; +impl WkupselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WKUPSEL_A { + pub const fn variant(&self) -> Wkupsel { match self.bits { - false => WKUPSEL_A::VALUE1, - true => WKUPSEL_A::VALUE2, + false => Wkupsel::Value1, + true => Wkupsel::Value2, } } #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WKUPSEL_A::VALUE1 + *self == Wkupsel::Value1 } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WKUPSEL_A::VALUE2 + *self == Wkupsel::Value2 } } #[doc = "Field `WKUPSEL` writer - Wake-Up from Hibernate Trigger Input Selection"] -pub type WKUPSEL_W<'a, REG> = crate::BitWriter<'a, REG, WKUPSEL_A>; -impl<'a, REG> WKUPSEL_W<'a, REG> +pub type WkupselW<'a, REG> = crate::BitWriter<'a, REG, Wkupsel>; +impl<'a, REG> WkupselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WKUPSEL_A::VALUE1) + self.variant(Wkupsel::Value1) } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WKUPSEL_A::VALUE2) + self.variant(Wkupsel::Value2) } } -#[doc = "Field `GPI0SEL` reader - General Purpose Input 0 Selection"] -pub type GPI0SEL_R = crate::BitReader; #[doc = "General Purpose Input 0 Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GPI0SEL_A { +pub enum Gpi0sel { #[doc = "0: HIB_IO_1 pin selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HIB_IO_0 pin selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GPI0SEL_A) -> Self { + fn from(variant: Gpi0sel) -> Self { variant as u8 != 0 } } -impl GPI0SEL_R { +#[doc = "Field `GPI0SEL` reader - General Purpose Input 0 Selection"] +pub type Gpi0selR = crate::BitReader; +impl Gpi0selR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GPI0SEL_A { + pub const fn variant(&self) -> Gpi0sel { match self.bits { - false => GPI0SEL_A::VALUE1, - true => GPI0SEL_A::VALUE2, + false => Gpi0sel::Value1, + true => Gpi0sel::Value2, } } #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GPI0SEL_A::VALUE1 + *self == Gpi0sel::Value1 } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GPI0SEL_A::VALUE2 + *self == Gpi0sel::Value2 } } #[doc = "Field `GPI0SEL` writer - General Purpose Input 0 Selection"] -pub type GPI0SEL_W<'a, REG> = crate::BitWriter<'a, REG, GPI0SEL_A>; -impl<'a, REG> GPI0SEL_W<'a, REG> +pub type Gpi0selW<'a, REG> = crate::BitWriter<'a, REG, Gpi0sel>; +impl<'a, REG> Gpi0selW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GPI0SEL_A::VALUE1) + self.variant(Gpi0sel::Value1) } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GPI0SEL_A::VALUE2) + self.variant(Gpi0sel::Value2) } } -#[doc = "Field `HIBIO0POL` reader - HIBIO0 Polarity Set"] -pub type HIBIO0POL_R = crate::BitReader; #[doc = "HIBIO0 Polarity Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBIO0POL_A { +pub enum Hibio0pol { #[doc = "0: Direct value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Inverted value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBIO0POL_A) -> Self { + fn from(variant: Hibio0pol) -> Self { variant as u8 != 0 } } -impl HIBIO0POL_R { +#[doc = "Field `HIBIO0POL` reader - HIBIO0 Polarity Set"] +pub type Hibio0polR = crate::BitReader; +impl Hibio0polR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBIO0POL_A { + pub const fn variant(&self) -> Hibio0pol { match self.bits { - false => HIBIO0POL_A::VALUE1, - true => HIBIO0POL_A::VALUE2, + false => Hibio0pol::Value1, + true => Hibio0pol::Value2, } } #[doc = "Direct value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBIO0POL_A::VALUE1 + *self == Hibio0pol::Value1 } #[doc = "Inverted value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBIO0POL_A::VALUE2 + *self == Hibio0pol::Value2 } } #[doc = "Field `HIBIO0POL` writer - HIBIO0 Polarity Set"] -pub type HIBIO0POL_W<'a, REG> = crate::BitWriter<'a, REG, HIBIO0POL_A>; -impl<'a, REG> HIBIO0POL_W<'a, REG> +pub type Hibio0polW<'a, REG> = crate::BitWriter<'a, REG, Hibio0pol>; +impl<'a, REG> Hibio0polW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Direct value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBIO0POL_A::VALUE1) + self.variant(Hibio0pol::Value1) } #[doc = "Inverted value"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBIO0POL_A::VALUE2) + self.variant(Hibio0pol::Value2) } } -#[doc = "Field `HIBIO1POL` reader - HIBIO1 Polarity Set"] -pub type HIBIO1POL_R = crate::BitReader; #[doc = "HIBIO1 Polarity Set\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBIO1POL_A { +pub enum Hibio1pol { #[doc = "0: Direct value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Inverted value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBIO1POL_A) -> Self { + fn from(variant: Hibio1pol) -> Self { variant as u8 != 0 } } -impl HIBIO1POL_R { +#[doc = "Field `HIBIO1POL` reader - HIBIO1 Polarity Set"] +pub type Hibio1polR = crate::BitReader; +impl Hibio1polR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBIO1POL_A { + pub const fn variant(&self) -> Hibio1pol { match self.bits { - false => HIBIO1POL_A::VALUE1, - true => HIBIO1POL_A::VALUE2, + false => Hibio1pol::Value1, + true => Hibio1pol::Value2, } } #[doc = "Direct value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBIO1POL_A::VALUE1 + *self == Hibio1pol::Value1 } #[doc = "Inverted value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBIO1POL_A::VALUE2 + *self == Hibio1pol::Value2 } } #[doc = "Field `HIBIO1POL` writer - HIBIO1 Polarity Set"] -pub type HIBIO1POL_W<'a, REG> = crate::BitWriter<'a, REG, HIBIO1POL_A>; -impl<'a, REG> HIBIO1POL_W<'a, REG> +pub type Hibio1polW<'a, REG> = crate::BitWriter<'a, REG, Hibio1pol>; +impl<'a, REG> Hibio1polW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Direct value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBIO1POL_A::VALUE1) + self.variant(Hibio1pol::Value1) } #[doc = "Inverted value"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBIO1POL_A::VALUE2) + self.variant(Hibio1pol::Value2) } } -#[doc = "Field `HIBIO0SEL` reader - HIB_IO_0 Pin I/O Control (default HIBOUT)"] -pub type HIBIO0SEL_R = crate::FieldReader; #[doc = "HIB_IO_0 Pin I/O Control (default HIBOUT)\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HIBIO0SEL_A { +pub enum Hibio0sel { #[doc = "0: Direct input, No input pull device connected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Direct input, Input pull-down device connected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Direct input, Input pull-up device connected"] - VALUE3 = 2, + Value3 = 2, #[doc = "8: Push-pull HIB Control output"] - VALUE4 = 8, + Value4 = 8, #[doc = "9: Push-pull WDT service output"] - VALUE5 = 9, + Value5 = 9, #[doc = "10: Push-pull GPIO output"] - VALUE6 = 10, + Value6 = 10, #[doc = "12: Open-drain HIB Control output"] - VALUE7 = 12, + Value7 = 12, #[doc = "13: Open-drain WDT service output"] - VALUE8 = 13, + Value8 = 13, #[doc = "14: Open-drain GPIO output"] - VALUE9 = 14, + Value9 = 14, #[doc = "15: Analog input"] - VALUE10 = 15, + Value10 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HIBIO0SEL_A) -> Self { + fn from(variant: Hibio0sel) -> Self { variant as _ } } -impl crate::FieldSpec for HIBIO0SEL_A { +impl crate::FieldSpec for Hibio0sel { type Ux = u8; } -impl HIBIO0SEL_R { +#[doc = "Field `HIBIO0SEL` reader - HIB_IO_0 Pin I/O Control (default HIBOUT)"] +pub type Hibio0selR = crate::FieldReader; +impl Hibio0selR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HIBIO0SEL_A::VALUE1), - 1 => Some(HIBIO0SEL_A::VALUE2), - 2 => Some(HIBIO0SEL_A::VALUE3), - 8 => Some(HIBIO0SEL_A::VALUE4), - 9 => Some(HIBIO0SEL_A::VALUE5), - 10 => Some(HIBIO0SEL_A::VALUE6), - 12 => Some(HIBIO0SEL_A::VALUE7), - 13 => Some(HIBIO0SEL_A::VALUE8), - 14 => Some(HIBIO0SEL_A::VALUE9), - 15 => Some(HIBIO0SEL_A::VALUE10), + 0 => Some(Hibio0sel::Value1), + 1 => Some(Hibio0sel::Value2), + 2 => Some(Hibio0sel::Value3), + 8 => Some(Hibio0sel::Value4), + 9 => Some(Hibio0sel::Value5), + 10 => Some(Hibio0sel::Value6), + 12 => Some(Hibio0sel::Value7), + 13 => Some(Hibio0sel::Value8), + 14 => Some(Hibio0sel::Value9), + 15 => Some(Hibio0sel::Value10), _ => None, } } #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBIO0SEL_A::VALUE1 + *self == Hibio0sel::Value1 } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBIO0SEL_A::VALUE2 + *self == Hibio0sel::Value2 } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HIBIO0SEL_A::VALUE3 + *self == Hibio0sel::Value3 } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HIBIO0SEL_A::VALUE4 + *self == Hibio0sel::Value4 } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == HIBIO0SEL_A::VALUE5 + *self == Hibio0sel::Value5 } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == HIBIO0SEL_A::VALUE6 + *self == Hibio0sel::Value6 } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == HIBIO0SEL_A::VALUE7 + *self == Hibio0sel::Value7 } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == HIBIO0SEL_A::VALUE8 + *self == Hibio0sel::Value8 } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == HIBIO0SEL_A::VALUE9 + *self == Hibio0sel::Value9 } #[doc = "Analog input"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == HIBIO0SEL_A::VALUE10 + *self == Hibio0sel::Value10 } } #[doc = "Field `HIBIO0SEL` writer - HIB_IO_0 Pin I/O Control (default HIBOUT)"] -pub type HIBIO0SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, HIBIO0SEL_A>; -impl<'a, REG> HIBIO0SEL_W<'a, REG> +pub type Hibio0selW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hibio0sel>; +impl<'a, REG> Hibio0selW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -700,162 +700,162 @@ where #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE1) + self.variant(Hibio0sel::Value1) } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE2) + self.variant(Hibio0sel::Value2) } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE3) + self.variant(Hibio0sel::Value3) } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE4) + self.variant(Hibio0sel::Value4) } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE5) + self.variant(Hibio0sel::Value5) } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE6) + self.variant(Hibio0sel::Value6) } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE7) + self.variant(Hibio0sel::Value7) } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE8) + self.variant(Hibio0sel::Value8) } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE9) + self.variant(Hibio0sel::Value9) } #[doc = "Analog input"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(HIBIO0SEL_A::VALUE10) + self.variant(Hibio0sel::Value10) } } -#[doc = "Field `HIBIO1SEL` reader - HIB_IO_1 Pin I/O Control (Default WKUP)"] -pub type HIBIO1SEL_R = crate::FieldReader; #[doc = "HIB_IO_1 Pin I/O Control (Default WKUP)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HIBIO1SEL_A { +pub enum Hibio1sel { #[doc = "0: Direct input, No input pull device connected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Direct input, Input pull-down device connected"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Direct input, Input pull-up device connected"] - VALUE3 = 2, + Value3 = 2, #[doc = "8: Push-pull HIB Control output"] - VALUE4 = 8, + Value4 = 8, #[doc = "9: Push-pull WDT service output"] - VALUE5 = 9, + Value5 = 9, #[doc = "10: Push-pull GPIO output"] - VALUE6 = 10, + Value6 = 10, #[doc = "12: Open-drain HIB Control output"] - VALUE7 = 12, + Value7 = 12, #[doc = "13: Open-drain WDT service output"] - VALUE8 = 13, + Value8 = 13, #[doc = "14: Open-drain GPIO output"] - VALUE9 = 14, + Value9 = 14, #[doc = "15: Analog input"] - VALUE10 = 15, + Value10 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HIBIO1SEL_A) -> Self { + fn from(variant: Hibio1sel) -> Self { variant as _ } } -impl crate::FieldSpec for HIBIO1SEL_A { +impl crate::FieldSpec for Hibio1sel { type Ux = u8; } -impl HIBIO1SEL_R { +#[doc = "Field `HIBIO1SEL` reader - HIB_IO_1 Pin I/O Control (Default WKUP)"] +pub type Hibio1selR = crate::FieldReader; +impl Hibio1selR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HIBIO1SEL_A::VALUE1), - 1 => Some(HIBIO1SEL_A::VALUE2), - 2 => Some(HIBIO1SEL_A::VALUE3), - 8 => Some(HIBIO1SEL_A::VALUE4), - 9 => Some(HIBIO1SEL_A::VALUE5), - 10 => Some(HIBIO1SEL_A::VALUE6), - 12 => Some(HIBIO1SEL_A::VALUE7), - 13 => Some(HIBIO1SEL_A::VALUE8), - 14 => Some(HIBIO1SEL_A::VALUE9), - 15 => Some(HIBIO1SEL_A::VALUE10), + 0 => Some(Hibio1sel::Value1), + 1 => Some(Hibio1sel::Value2), + 2 => Some(Hibio1sel::Value3), + 8 => Some(Hibio1sel::Value4), + 9 => Some(Hibio1sel::Value5), + 10 => Some(Hibio1sel::Value6), + 12 => Some(Hibio1sel::Value7), + 13 => Some(Hibio1sel::Value8), + 14 => Some(Hibio1sel::Value9), + 15 => Some(Hibio1sel::Value10), _ => None, } } #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBIO1SEL_A::VALUE1 + *self == Hibio1sel::Value1 } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBIO1SEL_A::VALUE2 + *self == Hibio1sel::Value2 } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HIBIO1SEL_A::VALUE3 + *self == Hibio1sel::Value3 } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HIBIO1SEL_A::VALUE4 + *self == Hibio1sel::Value4 } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == HIBIO1SEL_A::VALUE5 + *self == Hibio1sel::Value5 } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == HIBIO1SEL_A::VALUE6 + *self == Hibio1sel::Value6 } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == HIBIO1SEL_A::VALUE7 + *self == Hibio1sel::Value7 } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == HIBIO1SEL_A::VALUE8 + *self == Hibio1sel::Value8 } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == HIBIO1SEL_A::VALUE9 + *self == Hibio1sel::Value9 } #[doc = "Analog input"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == HIBIO1SEL_A::VALUE10 + *self == Hibio1sel::Value10 } } #[doc = "Field `HIBIO1SEL` writer - HIB_IO_1 Pin I/O Control (Default WKUP)"] -pub type HIBIO1SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, HIBIO1SEL_A>; -impl<'a, REG> HIBIO1SEL_W<'a, REG> +pub type Hibio1selW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hibio1sel>; +impl<'a, REG> Hibio1selW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -863,224 +863,215 @@ where #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE1) + self.variant(Hibio1sel::Value1) } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE2) + self.variant(Hibio1sel::Value2) } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE3) + self.variant(Hibio1sel::Value3) } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE4) + self.variant(Hibio1sel::Value4) } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE5) + self.variant(Hibio1sel::Value5) } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE6) + self.variant(Hibio1sel::Value6) } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE7) + self.variant(Hibio1sel::Value7) } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE8) + self.variant(Hibio1sel::Value8) } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE9) + self.variant(Hibio1sel::Value9) } #[doc = "Analog input"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(HIBIO1SEL_A::VALUE10) + self.variant(Hibio1sel::Value10) } } impl R { #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"] #[inline(always)] - pub fn wkpep(&self) -> WKPEP_R { - WKPEP_R::new((self.bits & 1) != 0) + pub fn wkpep(&self) -> WkpepR { + WkpepR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"] #[inline(always)] - pub fn wkpen(&self) -> WKPEN_R { - WKPEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn wkpen(&self) -> WkpenR { + WkpenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Wake-up on RTC Event Enable"] #[inline(always)] - pub fn rtce(&self) -> RTCE_R { - RTCE_R::new(((self.bits >> 2) & 1) != 0) + pub fn rtce(&self) -> RtceR { + RtceR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ULP WDG Alarm Enable"] #[inline(always)] - pub fn ulpwdgen(&self) -> ULPWDGEN_R { - ULPWDGEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn ulpwdgen(&self) -> UlpwdgenR { + UlpwdgenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hibernate Request Value Set"] #[inline(always)] - pub fn hib(&self) -> HIB_R { - HIB_R::new(((self.bits >> 4) & 1) != 0) + pub fn hib(&self) -> HibR { + HibR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - fRTC Clock Selection"] #[inline(always)] - pub fn rcs(&self) -> RCS_R { - RCS_R::new(((self.bits >> 6) & 1) != 0) + pub fn rcs(&self) -> RcsR { + RcsR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - fSTDBY Clock Selection"] #[inline(always)] - pub fn stdbysel(&self) -> STDBYSEL_R { - STDBYSEL_R::new(((self.bits >> 7) & 1) != 0) + pub fn stdbysel(&self) -> StdbyselR { + StdbyselR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"] #[inline(always)] - pub fn wkupsel(&self) -> WKUPSEL_R { - WKUPSEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn wkupsel(&self) -> WkupselR { + WkupselR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - General Purpose Input 0 Selection"] #[inline(always)] - pub fn gpi0sel(&self) -> GPI0SEL_R { - GPI0SEL_R::new(((self.bits >> 10) & 1) != 0) + pub fn gpi0sel(&self) -> Gpi0selR { + Gpi0selR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - HIBIO0 Polarity Set"] #[inline(always)] - pub fn hibio0pol(&self) -> HIBIO0POL_R { - HIBIO0POL_R::new(((self.bits >> 12) & 1) != 0) + pub fn hibio0pol(&self) -> Hibio0polR { + Hibio0polR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HIBIO1 Polarity Set"] #[inline(always)] - pub fn hibio1pol(&self) -> HIBIO1POL_R { - HIBIO1POL_R::new(((self.bits >> 13) & 1) != 0) + pub fn hibio1pol(&self) -> Hibio1polR { + Hibio1polR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"] #[inline(always)] - pub fn hibio0sel(&self) -> HIBIO0SEL_R { - HIBIO0SEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn hibio0sel(&self) -> Hibio0selR { + Hibio0selR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - HIB_IO_1 Pin I/O Control (Default WKUP)"] #[inline(always)] - pub fn hibio1sel(&self) -> HIBIO1SEL_R { - HIBIO1SEL_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn hibio1sel(&self) -> Hibio1selR { + Hibio1selR::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"] #[inline(always)] #[must_use] - pub fn wkpep(&mut self) -> WKPEP_W { - WKPEP_W::new(self, 0) + pub fn wkpep(&mut self) -> WkpepW { + WkpepW::new(self, 0) } #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"] #[inline(always)] #[must_use] - pub fn wkpen(&mut self) -> WKPEN_W { - WKPEN_W::new(self, 1) + pub fn wkpen(&mut self) -> WkpenW { + WkpenW::new(self, 1) } #[doc = "Bit 2 - Wake-up on RTC Event Enable"] #[inline(always)] #[must_use] - pub fn rtce(&mut self) -> RTCE_W { - RTCE_W::new(self, 2) + pub fn rtce(&mut self) -> RtceW { + RtceW::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Enable"] #[inline(always)] #[must_use] - pub fn ulpwdgen(&mut self) -> ULPWDGEN_W { - ULPWDGEN_W::new(self, 3) + pub fn ulpwdgen(&mut self) -> UlpwdgenW { + UlpwdgenW::new(self, 3) } #[doc = "Bit 4 - Hibernate Request Value Set"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HIB_W { - HIB_W::new(self, 4) + pub fn hib(&mut self) -> HibW { + HibW::new(self, 4) } #[doc = "Bit 6 - fRTC Clock Selection"] #[inline(always)] #[must_use] - pub fn rcs(&mut self) -> RCS_W { - RCS_W::new(self, 6) + pub fn rcs(&mut self) -> RcsW { + RcsW::new(self, 6) } #[doc = "Bit 7 - fSTDBY Clock Selection"] #[inline(always)] #[must_use] - pub fn stdbysel(&mut self) -> STDBYSEL_W { - STDBYSEL_W::new(self, 7) + pub fn stdbysel(&mut self) -> StdbyselW { + StdbyselW::new(self, 7) } #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn wkupsel(&mut self) -> WKUPSEL_W { - WKUPSEL_W::new(self, 8) + pub fn wkupsel(&mut self) -> WkupselW { + WkupselW::new(self, 8) } #[doc = "Bit 10 - General Purpose Input 0 Selection"] #[inline(always)] #[must_use] - pub fn gpi0sel(&mut self) -> GPI0SEL_W { - GPI0SEL_W::new(self, 10) + pub fn gpi0sel(&mut self) -> Gpi0selW { + Gpi0selW::new(self, 10) } #[doc = "Bit 12 - HIBIO0 Polarity Set"] #[inline(always)] #[must_use] - pub fn hibio0pol(&mut self) -> HIBIO0POL_W { - HIBIO0POL_W::new(self, 12) + pub fn hibio0pol(&mut self) -> Hibio0polW { + Hibio0polW::new(self, 12) } #[doc = "Bit 13 - HIBIO1 Polarity Set"] #[inline(always)] #[must_use] - pub fn hibio1pol(&mut self) -> HIBIO1POL_W { - HIBIO1POL_W::new(self, 13) + pub fn hibio1pol(&mut self) -> Hibio1polW { + Hibio1polW::new(self, 13) } #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"] #[inline(always)] #[must_use] - pub fn hibio0sel(&mut self) -> HIBIO0SEL_W { - HIBIO0SEL_W::new(self, 16) + pub fn hibio0sel(&mut self) -> Hibio0selW { + Hibio0selW::new(self, 16) } #[doc = "Bits 20:23 - HIB_IO_1 Pin I/O Control (Default WKUP)"] #[inline(always)] #[must_use] - pub fn hibio1sel(&mut self) -> HIBIO1SEL_W { - HIBIO1SEL_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hibio1sel(&mut self) -> Hibio1selW { + Hibio1selW::new(self, 20) } } #[doc = "Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HDCR_SPEC; -impl crate::RegisterSpec for HDCR_SPEC { +pub struct HdcrSpec; +impl crate::RegisterSpec for HdcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`hdcr::R`](R) reader structure"] -impl crate::Readable for HDCR_SPEC {} +impl crate::Readable for HdcrSpec {} #[doc = "`write(|w| ..)` method takes [`hdcr::W`](W) writer structure"] -impl crate::Writable for HDCR_SPEC { +impl crate::Writable for HdcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDCR to value 0x000c_2000"] -impl crate::Resettable for HDCR_SPEC { +impl crate::Resettable for HdcrSpec { const RESET_VALUE: u32 = 0x000c_2000; } diff --git a/src/scu_hibernate/hdset.rs b/src/scu_hibernate/hdset.rs index 1e0bc0d7..c86d98a9 100644 --- a/src/scu_hibernate/hdset.rs +++ b/src/scu_hibernate/hdset.rs @@ -1,176 +1,167 @@ #[doc = "Register `HDSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wake-up Pin Event Positive Edge Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPEV_AW { +pub enum Epev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPEV_AW) -> Self { + fn from(variant: Epev) -> Self { variant as u8 != 0 } } #[doc = "Field `EPEV` writer - Wake-up Pin Event Positive Edge Set"] -pub type EPEV_W<'a, REG> = crate::BitWriter<'a, REG, EPEV_AW>; -impl<'a, REG> EPEV_W<'a, REG> +pub type EpevW<'a, REG> = crate::BitWriter<'a, REG, Epev>; +impl<'a, REG> EpevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPEV_AW::VALUE1) + self.variant(Epev::Value1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPEV_AW::VALUE2) + self.variant(Epev::Value2) } } #[doc = "Wake-up Pin Event Negative Edge Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENEV_AW { +pub enum Enev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENEV_AW) -> Self { + fn from(variant: Enev) -> Self { variant as u8 != 0 } } #[doc = "Field `ENEV` writer - Wake-up Pin Event Negative Edge Set"] -pub type ENEV_W<'a, REG> = crate::BitWriter<'a, REG, ENEV_AW>; -impl<'a, REG> ENEV_W<'a, REG> +pub type EnevW<'a, REG> = crate::BitWriter<'a, REG, Enev>; +impl<'a, REG> EnevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENEV_AW::VALUE1) + self.variant(Enev::Value1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENEV_AW::VALUE2) + self.variant(Enev::Value2) } } #[doc = "RTC Event Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTCEV_AW { +pub enum Rtcev { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTCEV_AW) -> Self { + fn from(variant: Rtcev) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCEV` writer - RTC Event Set"] -pub type RTCEV_W<'a, REG> = crate::BitWriter<'a, REG, RTCEV_AW>; -impl<'a, REG> RTCEV_W<'a, REG> +pub type RtcevW<'a, REG> = crate::BitWriter<'a, REG, Rtcev>; +impl<'a, REG> RtcevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTCEV_AW::VALUE1) + self.variant(Rtcev::Value1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTCEV_AW::VALUE2) + self.variant(Rtcev::Value2) } } #[doc = "ULP WDG Alarm Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDG_AW { +pub enum Ulpwdg { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set watchdog alarm"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDG_AW) -> Self { + fn from(variant: Ulpwdg) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDG` writer - ULP WDG Alarm Set"] -pub type ULPWDG_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDG_AW>; -impl<'a, REG> ULPWDG_W<'a, REG> +pub type UlpwdgW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdg>; +impl<'a, REG> UlpwdgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDG_AW::VALUE1) + self.variant(Ulpwdg::Value1) } #[doc = "Set watchdog alarm"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDG_AW::VALUE2) + self.variant(Ulpwdg::Value2) } } impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Set"] #[inline(always)] #[must_use] - pub fn epev(&mut self) -> EPEV_W { - EPEV_W::new(self, 0) + pub fn epev(&mut self) -> EpevW { + EpevW::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Set"] #[inline(always)] #[must_use] - pub fn enev(&mut self) -> ENEV_W { - ENEV_W::new(self, 1) + pub fn enev(&mut self) -> EnevW { + EnevW::new(self, 1) } #[doc = "Bit 2 - RTC Event Set"] #[inline(always)] #[must_use] - pub fn rtcev(&mut self) -> RTCEV_W { - RTCEV_W::new(self, 2) + pub fn rtcev(&mut self) -> RtcevW { + RtcevW::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Set"] #[inline(always)] #[must_use] - pub fn ulpwdg(&mut self) -> ULPWDG_W { - ULPWDG_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ulpwdg(&mut self) -> UlpwdgW { + UlpwdgW::new(self, 3) } } #[doc = "Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HDSET_SPEC; -impl crate::RegisterSpec for HDSET_SPEC { +pub struct HdsetSpec; +impl crate::RegisterSpec for HdsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hdset::W`](W) writer structure"] -impl crate::Writable for HDSET_SPEC { +impl crate::Writable for HdsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDSET to value 0"] -impl crate::Resettable for HDSET_SPEC { +impl crate::Resettable for HdsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hdstat.rs b/src/scu_hibernate/hdstat.rs index 0b28091e..849e44c6 100644 --- a/src/scu_hibernate/hdstat.rs +++ b/src/scu_hibernate/hdstat.rs @@ -1,220 +1,220 @@ #[doc = "Register `HDSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `EPEV` reader - Wake-up Pin Event Positive Edge"] -pub type EPEV_R = crate::BitReader; +pub type R = crate::R; #[doc = "Wake-up Pin Event Positive Edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPEV_A { +pub enum Epev { #[doc = "0: Wake-up on positive edge pin event inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up on positive edge pin event active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPEV_A) -> Self { + fn from(variant: Epev) -> Self { variant as u8 != 0 } } -impl EPEV_R { +#[doc = "Field `EPEV` reader - Wake-up Pin Event Positive Edge"] +pub type EpevR = crate::BitReader; +impl EpevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPEV_A { + pub const fn variant(&self) -> Epev { match self.bits { - false => EPEV_A::VALUE1, - true => EPEV_A::VALUE2, + false => Epev::Value1, + true => Epev::Value2, } } #[doc = "Wake-up on positive edge pin event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPEV_A::VALUE1 + *self == Epev::Value1 } #[doc = "Wake-up on positive edge pin event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPEV_A::VALUE2 + *self == Epev::Value2 } } -#[doc = "Field `ENEV` reader - Wake-up Pin Event Negative Edge"] -pub type ENEV_R = crate::BitReader; #[doc = "Wake-up Pin Event Negative Edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENEV_A { +pub enum Enev { #[doc = "0: Wake-up on negative edge pin event inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up on negative edge pin event active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENEV_A) -> Self { + fn from(variant: Enev) -> Self { variant as u8 != 0 } } -impl ENEV_R { +#[doc = "Field `ENEV` reader - Wake-up Pin Event Negative Edge"] +pub type EnevR = crate::BitReader; +impl EnevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENEV_A { + pub const fn variant(&self) -> Enev { match self.bits { - false => ENEV_A::VALUE1, - true => ENEV_A::VALUE2, + false => Enev::Value1, + true => Enev::Value2, } } #[doc = "Wake-up on negative edge pin event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENEV_A::VALUE1 + *self == Enev::Value1 } #[doc = "Wake-up on negative edge pin event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENEV_A::VALUE2 + *self == Enev::Value2 } } -#[doc = "Field `RTCEV` reader - RTC Event"] -pub type RTCEV_R = crate::BitReader; #[doc = "RTC Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTCEV_A { +pub enum Rtcev { #[doc = "0: Wake-up on RTC event inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up on RTC event active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTCEV_A) -> Self { + fn from(variant: Rtcev) -> Self { variant as u8 != 0 } } -impl RTCEV_R { +#[doc = "Field `RTCEV` reader - RTC Event"] +pub type RtcevR = crate::BitReader; +impl RtcevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTCEV_A { + pub const fn variant(&self) -> Rtcev { match self.bits { - false => RTCEV_A::VALUE1, - true => RTCEV_A::VALUE2, + false => Rtcev::Value1, + true => Rtcev::Value2, } } #[doc = "Wake-up on RTC event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTCEV_A::VALUE1 + *self == Rtcev::Value1 } #[doc = "Wake-up on RTC event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTCEV_A::VALUE2 + *self == Rtcev::Value2 } } -#[doc = "Field `ULPWDG` reader - ULP WDG Alarm Status"] -pub type ULPWDG_R = crate::BitReader; #[doc = "ULP WDG Alarm Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDG_A { +pub enum Ulpwdg { #[doc = "0: Watchdog alarm did not occur"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Watchdog alarm occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDG_A) -> Self { + fn from(variant: Ulpwdg) -> Self { variant as u8 != 0 } } -impl ULPWDG_R { +#[doc = "Field `ULPWDG` reader - ULP WDG Alarm Status"] +pub type UlpwdgR = crate::BitReader; +impl UlpwdgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ULPWDG_A { + pub const fn variant(&self) -> Ulpwdg { match self.bits { - false => ULPWDG_A::VALUE1, - true => ULPWDG_A::VALUE2, + false => Ulpwdg::Value1, + true => Ulpwdg::Value2, } } #[doc = "Watchdog alarm did not occur"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ULPWDG_A::VALUE1 + *self == Ulpwdg::Value1 } #[doc = "Watchdog alarm occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ULPWDG_A::VALUE2 + *self == Ulpwdg::Value2 } } -#[doc = "Field `HIBNOUT` reader - Hibernate Control Status"] -pub type HIBNOUT_R = crate::BitReader; #[doc = "Hibernate Control Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBNOUT_A { +pub enum Hibnout { #[doc = "0: Hibernate not driven active to pads"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Hibernate driven active to pads"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBNOUT_A) -> Self { + fn from(variant: Hibnout) -> Self { variant as u8 != 0 } } -impl HIBNOUT_R { +#[doc = "Field `HIBNOUT` reader - Hibernate Control Status"] +pub type HibnoutR = crate::BitReader; +impl HibnoutR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBNOUT_A { + pub const fn variant(&self) -> Hibnout { match self.bits { - false => HIBNOUT_A::VALUE1, - true => HIBNOUT_A::VALUE2, + false => Hibnout::Value1, + true => Hibnout::Value2, } } #[doc = "Hibernate not driven active to pads"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBNOUT_A::VALUE1 + *self == Hibnout::Value1 } #[doc = "Hibernate driven active to pads"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBNOUT_A::VALUE2 + *self == Hibnout::Value2 } } impl R { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge"] #[inline(always)] - pub fn epev(&self) -> EPEV_R { - EPEV_R::new((self.bits & 1) != 0) + pub fn epev(&self) -> EpevR { + EpevR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge"] #[inline(always)] - pub fn enev(&self) -> ENEV_R { - ENEV_R::new(((self.bits >> 1) & 1) != 0) + pub fn enev(&self) -> EnevR { + EnevR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Event"] #[inline(always)] - pub fn rtcev(&self) -> RTCEV_R { - RTCEV_R::new(((self.bits >> 2) & 1) != 0) + pub fn rtcev(&self) -> RtcevR { + RtcevR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ULP WDG Alarm Status"] #[inline(always)] - pub fn ulpwdg(&self) -> ULPWDG_R { - ULPWDG_R::new(((self.bits >> 3) & 1) != 0) + pub fn ulpwdg(&self) -> UlpwdgR { + UlpwdgR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hibernate Control Status"] #[inline(always)] - pub fn hibnout(&self) -> HIBNOUT_R { - HIBNOUT_R::new(((self.bits >> 4) & 1) != 0) + pub fn hibnout(&self) -> HibnoutR { + HibnoutR::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HDSTAT_SPEC; -impl crate::RegisterSpec for HDSTAT_SPEC { +pub struct HdstatSpec; +impl crate::RegisterSpec for HdstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`hdstat::R`](R) reader structure"] -impl crate::Readable for HDSTAT_SPEC {} +impl crate::Readable for HdstatSpec {} #[doc = "`reset()` method sets HDSTAT to value 0"] -impl crate::Resettable for HDSTAT_SPEC { +impl crate::Resettable for HdstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/oscsictrl.rs b/src/scu_hibernate/oscsictrl.rs index 05cfa29a..bdd80315 100644 --- a/src/scu_hibernate/oscsictrl.rs +++ b/src/scu_hibernate/oscsictrl.rs @@ -1,98 +1,89 @@ #[doc = "Register `OSCSICTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCSICTRL` writer"] -pub type W = crate::W; -#[doc = "Field `PWD` reader - Turn OFF the fOSI Clock Source"] -pub type PWD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Turn OFF the fOSI Clock Source\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PWD_A { +pub enum Pwd { #[doc = "0: Enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PWD_A) -> Self { + fn from(variant: Pwd) -> Self { variant as u8 != 0 } } -impl PWD_R { +#[doc = "Field `PWD` reader - Turn OFF the fOSI Clock Source"] +pub type PwdR = crate::BitReader; +impl PwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PWD_A { + pub const fn variant(&self) -> Pwd { match self.bits { - false => PWD_A::VALUE1, - true => PWD_A::VALUE2, + false => Pwd::Value1, + true => Pwd::Value2, } } #[doc = "Enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PWD_A::VALUE1 + *self == Pwd::Value1 } #[doc = "Disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PWD_A::VALUE2 + *self == Pwd::Value2 } } #[doc = "Field `PWD` writer - Turn OFF the fOSI Clock Source"] -pub type PWD_W<'a, REG> = crate::BitWriter<'a, REG, PWD_A>; -impl<'a, REG> PWD_W<'a, REG> +pub type PwdW<'a, REG> = crate::BitWriter<'a, REG, Pwd>; +impl<'a, REG> PwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PWD_A::VALUE1) + self.variant(Pwd::Value1) } #[doc = "Disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PWD_A::VALUE2) + self.variant(Pwd::Value2) } } impl R { #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"] #[inline(always)] - pub fn pwd(&self) -> PWD_R { - PWD_R::new((self.bits & 1) != 0) + pub fn pwd(&self) -> PwdR { + PwdR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"] #[inline(always)] #[must_use] - pub fn pwd(&mut self) -> PWD_W { - PWD_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pwd(&mut self) -> PwdW { + PwdW::new(self, 0) } } #[doc = "fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OSCSICTRL_SPEC; -impl crate::RegisterSpec for OSCSICTRL_SPEC { +pub struct OscsictrlSpec; +impl crate::RegisterSpec for OscsictrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`oscsictrl::R`](R) reader structure"] -impl crate::Readable for OSCSICTRL_SPEC {} +impl crate::Readable for OscsictrlSpec {} #[doc = "`write(|w| ..)` method takes [`oscsictrl::W`](W) writer structure"] -impl crate::Writable for OSCSICTRL_SPEC { +impl crate::Writable for OscsictrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCSICTRL to value 0x01"] -impl crate::Resettable for OSCSICTRL_SPEC { +impl crate::Resettable for OscsictrlSpec { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_hibernate/osculctrl.rs b/src/scu_hibernate/osculctrl.rs index 1a7f7774..11478286 100644 --- a/src/scu_hibernate/osculctrl.rs +++ b/src/scu_hibernate/osculctrl.rs @@ -1,120 +1,120 @@ #[doc = "Register `OSCULCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCULCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `X1DEN` reader - XTAL1 Data General Purpose Input Enable"] -pub type X1DEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "XTAL1 Data General Purpose Input Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum X1DEN_A { +pub enum X1den { #[doc = "0: Data input inactivated, power down"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data input active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: X1DEN_A) -> Self { + fn from(variant: X1den) -> Self { variant as u8 != 0 } } -impl X1DEN_R { +#[doc = "Field `X1DEN` reader - XTAL1 Data General Purpose Input Enable"] +pub type X1denR = crate::BitReader; +impl X1denR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> X1DEN_A { + pub const fn variant(&self) -> X1den { match self.bits { - false => X1DEN_A::VALUE1, - true => X1DEN_A::VALUE2, + false => X1den::Value1, + true => X1den::Value2, } } #[doc = "Data input inactivated, power down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == X1DEN_A::VALUE1 + *self == X1den::Value1 } #[doc = "Data input active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == X1DEN_A::VALUE2 + *self == X1den::Value2 } } #[doc = "Field `X1DEN` writer - XTAL1 Data General Purpose Input Enable"] -pub type X1DEN_W<'a, REG> = crate::BitWriter<'a, REG, X1DEN_A>; -impl<'a, REG> X1DEN_W<'a, REG> +pub type X1denW<'a, REG> = crate::BitWriter<'a, REG, X1den>; +impl<'a, REG> X1denW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data input inactivated, power down"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(X1DEN_A::VALUE1) + self.variant(X1den::Value1) } #[doc = "Data input active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(X1DEN_A::VALUE2) + self.variant(X1den::Value2) } } -#[doc = "Field `MODE` reader - Oscillator Mode"] -pub type MODE_R = crate::FieldReader; #[doc = "Oscillator Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: Oscillator is enabled, in operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Oscillator is enabled, in bypass mode"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Oscillator in power down"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Oscillator in power down, can be used as GPI"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl crate::FieldSpec for MODE_A { +impl crate::FieldSpec for Mode { type Ux = u8; } -impl MODE_R { +#[doc = "Field `MODE` reader - Oscillator Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::VALUE1, - 1 => MODE_A::VALUE2, - 2 => MODE_A::VALUE3, - 3 => MODE_A::VALUE4, + 0 => Mode::Value1, + 1 => Mode::Value2, + 2 => Mode::Value3, + 3 => Mode::Value4, _ => unreachable!(), } } #[doc = "Oscillator is enabled, in operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODE_A::VALUE1 + *self == Mode::Value1 } #[doc = "Oscillator is enabled, in bypass mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODE_A::VALUE2 + *self == Mode::Value2 } #[doc = "Oscillator in power down"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MODE_A::VALUE3 + *self == Mode::Value3 } #[doc = "Oscillator in power down, can be used as GPI"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MODE_A::VALUE4 + *self == Mode::Value4 } } #[doc = "Field `MODE` writer - Oscillator Mode"] -pub type MODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MODE_A>; -impl<'a, REG> MODE_W<'a, REG> +pub type ModeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -122,73 +122,64 @@ where #[doc = "Oscillator is enabled, in operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE1) + self.variant(Mode::Value1) } #[doc = "Oscillator is enabled, in bypass mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE2) + self.variant(Mode::Value2) } #[doc = "Oscillator in power down"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE3) + self.variant(Mode::Value3) } #[doc = "Oscillator in power down, can be used as GPI"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE4) + self.variant(Mode::Value4) } } impl R { #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"] #[inline(always)] - pub fn x1den(&self) -> X1DEN_R { - X1DEN_R::new((self.bits & 1) != 0) + pub fn x1den(&self) -> X1denR { + X1denR::new((self.bits & 1) != 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 4) & 3) as u8) } } impl W { #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"] #[inline(always)] #[must_use] - pub fn x1den(&mut self) -> X1DEN_W { - X1DEN_W::new(self, 0) + pub fn x1den(&mut self) -> X1denW { + X1denW::new(self, 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W { - MODE_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 4) } } #[doc = "OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OSCULCTRL_SPEC; -impl crate::RegisterSpec for OSCULCTRL_SPEC { +pub struct OsculctrlSpec; +impl crate::RegisterSpec for OsculctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`osculctrl::R`](R) reader structure"] -impl crate::Readable for OSCULCTRL_SPEC {} +impl crate::Readable for OsculctrlSpec {} #[doc = "`write(|w| ..)` method takes [`osculctrl::W`](W) writer structure"] -impl crate::Writable for OSCULCTRL_SPEC { +impl crate::Writable for OsculctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCULCTRL to value 0x20"] -impl crate::Resettable for OSCULCTRL_SPEC { +impl crate::Resettable for OsculctrlSpec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/scu_hibernate/osculstat.rs b/src/scu_hibernate/osculstat.rs index 6cb65935..d260c2b1 100644 --- a/src/scu_hibernate/osculstat.rs +++ b/src/scu_hibernate/osculstat.rs @@ -1,22 +1,22 @@ #[doc = "Register `OSCULSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `X1D` reader - XTAL1 Data Value"] -pub type X1D_R = crate::BitReader; +pub type X1dR = crate::BitReader; impl R { #[doc = "Bit 0 - XTAL1 Data Value"] #[inline(always)] - pub fn x1d(&self) -> X1D_R { - X1D_R::new((self.bits & 1) != 0) + pub fn x1d(&self) -> X1dR { + X1dR::new((self.bits & 1) != 0) } } #[doc = "OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OSCULSTAT_SPEC; -impl crate::RegisterSpec for OSCULSTAT_SPEC { +pub struct OsculstatSpec; +impl crate::RegisterSpec for OsculstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`osculstat::R`](R) reader structure"] -impl crate::Readable for OSCULSTAT_SPEC {} +impl crate::Readable for OsculstatSpec {} #[doc = "`reset()` method sets OSCULSTAT to value 0"] -impl crate::Resettable for OSCULSTAT_SPEC { +impl crate::Resettable for OsculstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt.rs b/src/scu_interrupt.rs index 16ee1304..d1160d43 100644 --- a/src/scu_interrupt.rs +++ b/src/scu_interrupt.rs @@ -1,72 +1,78 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - srstat: SRSTAT, - srraw: SRRAW, - srmsk: SRMSK, - srclr: SRCLR, - srset: SRSET, - nmireqen: NMIREQEN, + srstat: Srstat, + srraw: Srraw, + srmsk: Srmsk, + srclr: Srclr, + srset: Srset, + nmireqen: Nmireqen, } impl RegisterBlock { #[doc = "0x00 - SCU Service Request Status"] #[inline(always)] - pub const fn srstat(&self) -> &SRSTAT { + pub const fn srstat(&self) -> &Srstat { &self.srstat } #[doc = "0x04 - SCU Raw Service Request Status"] #[inline(always)] - pub const fn srraw(&self) -> &SRRAW { + pub const fn srraw(&self) -> &Srraw { &self.srraw } #[doc = "0x08 - SCU Service Request Mask"] #[inline(always)] - pub const fn srmsk(&self) -> &SRMSK { + pub const fn srmsk(&self) -> &Srmsk { &self.srmsk } #[doc = "0x0c - SCU Service Request Clear"] #[inline(always)] - pub const fn srclr(&self) -> &SRCLR { + pub const fn srclr(&self) -> &Srclr { &self.srclr } #[doc = "0x10 - SCU Service Request Set"] #[inline(always)] - pub const fn srset(&self) -> &SRSET { + pub const fn srset(&self) -> &Srset { &self.srset } #[doc = "0x14 - SCU Service Request Mask"] #[inline(always)] - pub const fn nmireqen(&self) -> &NMIREQEN { + pub const fn nmireqen(&self) -> &Nmireqen { &self.nmireqen } } #[doc = "SRSTAT (r) register accessor: SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srstat`] module"] -pub type SRSTAT = crate::Reg; +#[doc(alias = "SRSTAT")] +pub type Srstat = crate::Reg; #[doc = "SCU Service Request Status"] pub mod srstat; #[doc = "SRRAW (r) register accessor: SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srraw`] module"] -pub type SRRAW = crate::Reg; +#[doc(alias = "SRRAW")] +pub type Srraw = crate::Reg; #[doc = "SCU Raw Service Request Status"] pub mod srraw; #[doc = "SRMSK (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srmsk`] module"] -pub type SRMSK = crate::Reg; +#[doc(alias = "SRMSK")] +pub type Srmsk = crate::Reg; #[doc = "SCU Service Request Mask"] pub mod srmsk; #[doc = "SRCLR (w) register accessor: SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srclr`] module"] -pub type SRCLR = crate::Reg; +#[doc(alias = "SRCLR")] +pub type Srclr = crate::Reg; #[doc = "SCU Service Request Clear"] pub mod srclr; #[doc = "SRSET (w) register accessor: SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srset`] module"] -pub type SRSET = crate::Reg; +#[doc(alias = "SRSET")] +pub type Srset = crate::Reg; #[doc = "SCU Service Request Set"] pub mod srset; #[doc = "NMIREQEN (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nmireqen`] module"] -pub type NMIREQEN = crate::Reg; +#[doc(alias = "NMIREQEN")] +pub type Nmireqen = crate::Reg; #[doc = "SCU Service Request Mask"] pub mod nmireqen; diff --git a/src/scu_interrupt/nmireqen.rs b/src/scu_interrupt/nmireqen.rs index 7f636c28..0dfa90ef 100644 --- a/src/scu_interrupt/nmireqen.rs +++ b/src/scu_interrupt/nmireqen.rs @@ -1,482 +1,473 @@ #[doc = "Register `NMIREQEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NMIREQEN` writer"] -pub type W = crate::W; -#[doc = "Field `PRWARN` reader - Promote Pre-Warning Interrupt Request to NMI Request"] -pub type PRWARN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Promote Pre-Warning Interrupt Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_A { +pub enum Prwarn { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_A) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } -impl PRWARN_R { +#[doc = "Field `PRWARN` reader - Promote Pre-Warning Interrupt Request to NMI Request"] +pub type PrwarnR = crate::BitReader; +impl PrwarnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRWARN_A { + pub const fn variant(&self) -> Prwarn { match self.bits { - false => PRWARN_A::VALUE1, - true => PRWARN_A::VALUE2, + false => Prwarn::Value1, + true => Prwarn::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRWARN_A::VALUE1 + *self == Prwarn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRWARN_A::VALUE2 + *self == Prwarn::Value2 } } #[doc = "Field `PRWARN` writer - Promote Pre-Warning Interrupt Request to NMI Request"] -pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; -impl<'a, REG> PRWARN_W<'a, REG> +pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; +impl<'a, REG> PrwarnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRWARN_A::VALUE1) + self.variant(Prwarn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRWARN_A::VALUE2) + self.variant(Prwarn::Value2) } } -#[doc = "Field `PI` reader - Promote RTC Periodic Interrupt request to NMI Request"] -pub type PI_R = crate::BitReader; #[doc = "Promote RTC Periodic Interrupt request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PI_A { +pub enum Pi { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PI_A) -> Self { + fn from(variant: Pi) -> Self { variant as u8 != 0 } } -impl PI_R { +#[doc = "Field `PI` reader - Promote RTC Periodic Interrupt request to NMI Request"] +pub type PiR = crate::BitReader; +impl PiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PI_A { + pub const fn variant(&self) -> Pi { match self.bits { - false => PI_A::VALUE1, - true => PI_A::VALUE2, + false => Pi::Value1, + true => Pi::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PI_A::VALUE1 + *self == Pi::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PI_A::VALUE2 + *self == Pi::Value2 } } #[doc = "Field `PI` writer - Promote RTC Periodic Interrupt request to NMI Request"] -pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; -impl<'a, REG> PI_W<'a, REG> +pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; +impl<'a, REG> PiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PI_A::VALUE1) + self.variant(Pi::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PI_A::VALUE2) + self.variant(Pi::Value2) } } -#[doc = "Field `AI` reader - Promote RTC Alarm Interrupt Request to NMI Request"] -pub type AI_R = crate::BitReader; #[doc = "Promote RTC Alarm Interrupt Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AI_A { +pub enum Ai { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AI_A) -> Self { + fn from(variant: Ai) -> Self { variant as u8 != 0 } } -impl AI_R { +#[doc = "Field `AI` reader - Promote RTC Alarm Interrupt Request to NMI Request"] +pub type AiR = crate::BitReader; +impl AiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AI_A { + pub const fn variant(&self) -> Ai { match self.bits { - false => AI_A::VALUE1, - true => AI_A::VALUE2, + false => Ai::Value1, + true => Ai::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AI_A::VALUE1 + *self == Ai::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AI_A::VALUE2 + *self == Ai::Value2 } } #[doc = "Field `AI` writer - Promote RTC Alarm Interrupt Request to NMI Request"] -pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; -impl<'a, REG> AI_W<'a, REG> +pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; +impl<'a, REG> AiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AI_A::VALUE1) + self.variant(Ai::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AI_A::VALUE2) + self.variant(Ai::Value2) } } -#[doc = "Field `ERU00` reader - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] -pub type ERU00_R = crate::BitReader; #[doc = "Promote Channel 0 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU00_A { +pub enum Eru00 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU00_A) -> Self { + fn from(variant: Eru00) -> Self { variant as u8 != 0 } } -impl ERU00_R { +#[doc = "Field `ERU00` reader - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] +pub type Eru00R = crate::BitReader; +impl Eru00R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU00_A { + pub const fn variant(&self) -> Eru00 { match self.bits { - false => ERU00_A::VALUE1, - true => ERU00_A::VALUE2, + false => Eru00::Value1, + true => Eru00::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU00_A::VALUE1 + *self == Eru00::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU00_A::VALUE2 + *self == Eru00::Value2 } } #[doc = "Field `ERU00` writer - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] -pub type ERU00_W<'a, REG> = crate::BitWriter<'a, REG, ERU00_A>; -impl<'a, REG> ERU00_W<'a, REG> +pub type Eru00W<'a, REG> = crate::BitWriter<'a, REG, Eru00>; +impl<'a, REG> Eru00W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU00_A::VALUE1) + self.variant(Eru00::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU00_A::VALUE2) + self.variant(Eru00::Value2) } } -#[doc = "Field `ERU01` reader - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] -pub type ERU01_R = crate::BitReader; #[doc = "Promote Channel 1 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU01_A { +pub enum Eru01 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU01_A) -> Self { + fn from(variant: Eru01) -> Self { variant as u8 != 0 } } -impl ERU01_R { +#[doc = "Field `ERU01` reader - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] +pub type Eru01R = crate::BitReader; +impl Eru01R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU01_A { + pub const fn variant(&self) -> Eru01 { match self.bits { - false => ERU01_A::VALUE1, - true => ERU01_A::VALUE2, + false => Eru01::Value1, + true => Eru01::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU01_A::VALUE1 + *self == Eru01::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU01_A::VALUE2 + *self == Eru01::Value2 } } #[doc = "Field `ERU01` writer - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] -pub type ERU01_W<'a, REG> = crate::BitWriter<'a, REG, ERU01_A>; -impl<'a, REG> ERU01_W<'a, REG> +pub type Eru01W<'a, REG> = crate::BitWriter<'a, REG, Eru01>; +impl<'a, REG> Eru01W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU01_A::VALUE1) + self.variant(Eru01::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU01_A::VALUE2) + self.variant(Eru01::Value2) } } -#[doc = "Field `ERU02` reader - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] -pub type ERU02_R = crate::BitReader; #[doc = "Promote Channel 2 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU02_A { +pub enum Eru02 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU02_A) -> Self { + fn from(variant: Eru02) -> Self { variant as u8 != 0 } } -impl ERU02_R { +#[doc = "Field `ERU02` reader - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] +pub type Eru02R = crate::BitReader; +impl Eru02R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU02_A { + pub const fn variant(&self) -> Eru02 { match self.bits { - false => ERU02_A::VALUE1, - true => ERU02_A::VALUE2, + false => Eru02::Value1, + true => Eru02::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU02_A::VALUE1 + *self == Eru02::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU02_A::VALUE2 + *self == Eru02::Value2 } } #[doc = "Field `ERU02` writer - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] -pub type ERU02_W<'a, REG> = crate::BitWriter<'a, REG, ERU02_A>; -impl<'a, REG> ERU02_W<'a, REG> +pub type Eru02W<'a, REG> = crate::BitWriter<'a, REG, Eru02>; +impl<'a, REG> Eru02W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU02_A::VALUE1) + self.variant(Eru02::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU02_A::VALUE2) + self.variant(Eru02::Value2) } } -#[doc = "Field `ERU03` reader - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] -pub type ERU03_R = crate::BitReader; #[doc = "Promote Channel 3 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU03_A { +pub enum Eru03 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU03_A) -> Self { + fn from(variant: Eru03) -> Self { variant as u8 != 0 } } -impl ERU03_R { +#[doc = "Field `ERU03` reader - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] +pub type Eru03R = crate::BitReader; +impl Eru03R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU03_A { + pub const fn variant(&self) -> Eru03 { match self.bits { - false => ERU03_A::VALUE1, - true => ERU03_A::VALUE2, + false => Eru03::Value1, + true => Eru03::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU03_A::VALUE1 + *self == Eru03::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU03_A::VALUE2 + *self == Eru03::Value2 } } #[doc = "Field `ERU03` writer - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] -pub type ERU03_W<'a, REG> = crate::BitWriter<'a, REG, ERU03_A>; -impl<'a, REG> ERU03_W<'a, REG> +pub type Eru03W<'a, REG> = crate::BitWriter<'a, REG, Eru03>; +impl<'a, REG> Eru03W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU03_A::VALUE1) + self.variant(Eru03::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU03_A::VALUE2) + self.variant(Eru03::Value2) } } impl R { #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"] #[inline(always)] - pub fn prwarn(&self) -> PRWARN_R { - PRWARN_R::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PrwarnR { + PrwarnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"] #[inline(always)] - pub fn pi(&self) -> PI_R { - PI_R::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PiR { + PiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"] #[inline(always)] - pub fn ai(&self) -> AI_R { - AI_R::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AiR { + AiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru00(&self) -> ERU00_R { - ERU00_R::new(((self.bits >> 16) & 1) != 0) + pub fn eru00(&self) -> Eru00R { + Eru00R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru01(&self) -> ERU01_R { - ERU01_R::new(((self.bits >> 17) & 1) != 0) + pub fn eru01(&self) -> Eru01R { + Eru01R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru02(&self) -> ERU02_R { - ERU02_R::new(((self.bits >> 18) & 1) != 0) + pub fn eru02(&self) -> Eru02R { + Eru02R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru03(&self) -> ERU03_R { - ERU03_R::new(((self.bits >> 19) & 1) != 0) + pub fn eru03(&self) -> Eru03R { + Eru03R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PRWARN_W { - PRWARN_W::new(self, 0) + pub fn prwarn(&mut self) -> PrwarnW { + PrwarnW::new(self, 0) } #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PI_W { - PI_W::new(self, 1) + pub fn pi(&mut self) -> PiW { + PiW::new(self, 1) } #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AI_W { - AI_W::new(self, 2) + pub fn ai(&mut self) -> AiW { + AiW::new(self, 2) } #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru00(&mut self) -> ERU00_W { - ERU00_W::new(self, 16) + pub fn eru00(&mut self) -> Eru00W { + Eru00W::new(self, 16) } #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru01(&mut self) -> ERU01_W { - ERU01_W::new(self, 17) + pub fn eru01(&mut self) -> Eru01W { + Eru01W::new(self, 17) } #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru02(&mut self) -> ERU02_W { - ERU02_W::new(self, 18) + pub fn eru02(&mut self) -> Eru02W { + Eru02W::new(self, 18) } #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru03(&mut self) -> ERU03_W { - ERU03_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eru03(&mut self) -> Eru03W { + Eru03W::new(self, 19) } } #[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NMIREQEN_SPEC; -impl crate::RegisterSpec for NMIREQEN_SPEC { +pub struct NmireqenSpec; +impl crate::RegisterSpec for NmireqenSpec { type Ux = u32; } #[doc = "`read()` method returns [`nmireqen::R`](R) reader structure"] -impl crate::Readable for NMIREQEN_SPEC {} +impl crate::Readable for NmireqenSpec {} #[doc = "`write(|w| ..)` method takes [`nmireqen::W`](W) writer structure"] -impl crate::Writable for NMIREQEN_SPEC { +impl crate::Writable for NmireqenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NMIREQEN to value 0"] -impl crate::Resettable for NMIREQEN_SPEC { +impl crate::Resettable for NmireqenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srclr.rs b/src/scu_interrupt/srclr.rs index e075893e..a650dd45 100644 --- a/src/scu_interrupt/srclr.rs +++ b/src/scu_interrupt/srclr.rs @@ -1,583 +1,574 @@ #[doc = "Register `SRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_AW { +pub enum Prwarn { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_AW) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Clear"] -pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_AW>; -impl<'a, REG> PRWARN_W<'a, REG> +pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; +impl<'a, REG> PrwarnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRWARN_AW::VALUE1) + self.variant(Prwarn::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRWARN_AW::VALUE2) + self.variant(Prwarn::Value2) } } #[doc = "RTC Periodic Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PI_AW { +pub enum Pi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PI_AW) -> Self { + fn from(variant: Pi) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Clear"] -pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_AW>; -impl<'a, REG> PI_W<'a, REG> +pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; +impl<'a, REG> PiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PI_AW::VALUE1) + self.variant(Pi::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PI_AW::VALUE2) + self.variant(Pi::Value2) } } #[doc = "RTC Alarm Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AI_AW { +pub enum Ai { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AI_AW) -> Self { + fn from(variant: Ai) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Clear"] -pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_AW>; -impl<'a, REG> AI_W<'a, REG> +pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; +impl<'a, REG> AiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AI_AW::VALUE1) + self.variant(Ai::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AI_AW::VALUE2) + self.variant(Ai::Value2) } } #[doc = "DLR Request Overrun Interrupt clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLROVR_AW { +pub enum Dlrovr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLROVR_AW) -> Self { + fn from(variant: Dlrovr) -> Self { variant as u8 != 0 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt clear"] -pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_AW>; -impl<'a, REG> DLROVR_W<'a, REG> +pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; +impl<'a, REG> DlrovrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLROVR_AW::VALUE1) + self.variant(Dlrovr::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLROVR_AW::VALUE2) + self.variant(Dlrovr::Value2) } } #[doc = "HDCLR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCLR_AW { +pub enum Hdclr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCLR_AW) -> Self { + fn from(variant: Hdclr) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` writer - HDCLR Mirror Register Update Clear"] -pub type HDCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCLR_AW>; -impl<'a, REG> HDCLR_W<'a, REG> +pub type HdclrW<'a, REG> = crate::BitWriter<'a, REG, Hdclr>; +impl<'a, REG> HdclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCLR_AW::VALUE1) + self.variant(Hdclr::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCLR_AW::VALUE2) + self.variant(Hdclr::Value2) } } #[doc = "HDSET Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDSET_AW { +pub enum Hdset { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDSET_AW) -> Self { + fn from(variant: Hdset) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` writer - HDSET Mirror Register Update Clear"] -pub type HDSET_W<'a, REG> = crate::BitWriter<'a, REG, HDSET_AW>; -impl<'a, REG> HDSET_W<'a, REG> +pub type HdsetW<'a, REG> = crate::BitWriter<'a, REG, Hdset>; +impl<'a, REG> HdsetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDSET_AW::VALUE1) + self.variant(Hdset::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDSET_AW::VALUE2) + self.variant(Hdset::Value2) } } #[doc = "HDCR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_AW { +pub enum Hdcr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_AW) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Clear"] -pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_AW>; -impl<'a, REG> HDCR_W<'a, REG> +pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; +impl<'a, REG> HdcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCR_AW::VALUE1) + self.variant(Hdcr::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCR_AW::VALUE2) + self.variant(Hdcr::Value2) } } #[doc = "OSCSICTRL Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_AW { +pub enum Oscsictrl { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_AW) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Clear"] -pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_AW>; -impl<'a, REG> OSCSICTRL_W<'a, REG> +pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; +impl<'a, REG> OscsictrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_AW::VALUE1) + self.variant(Oscsictrl::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_AW::VALUE2) + self.variant(Oscsictrl::Value2) } } #[doc = "OSCULCTRL Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_AW { +pub enum Osculctrl { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_AW) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Clear"] -pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_AW>; -impl<'a, REG> OSCULCTRL_W<'a, REG> +pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; +impl<'a, REG> OsculctrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_AW::VALUE1) + self.variant(Osculctrl::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_AW::VALUE2) + self.variant(Osculctrl::Value2) } } #[doc = "RTC CTR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_AW { +pub enum RtcCtr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_AW) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Clear"] -pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_AW>; -impl<'a, REG> RTC_CTR_W<'a, REG> +pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; +impl<'a, REG> RtcCtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_CTR_AW::VALUE1) + self.variant(RtcCtr::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_CTR_AW::VALUE2) + self.variant(RtcCtr::Value2) } } #[doc = "RTC ATIM0 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_AW { +pub enum RtcAtim0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_AW) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Clear"] -pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_AW>; -impl<'a, REG> RTC_ATIM0_W<'a, REG> +pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; +impl<'a, REG> RtcAtim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_AW::VALUE1) + self.variant(RtcAtim0::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_AW::VALUE2) + self.variant(RtcAtim0::Value2) } } #[doc = "RTC ATIM1 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_AW { +pub enum RtcAtim1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_AW) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Clear"] -pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_AW>; -impl<'a, REG> RTC_ATIM1_W<'a, REG> +pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; +impl<'a, REG> RtcAtim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_AW::VALUE1) + self.variant(RtcAtim1::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_AW::VALUE2) + self.variant(RtcAtim1::Value2) } } #[doc = "RTC TIM0 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_AW { +pub enum RtcTim0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_AW) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Clear"] -pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_AW>; -impl<'a, REG> RTC_TIM0_W<'a, REG> +pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; +impl<'a, REG> RtcTim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_AW::VALUE1) + self.variant(RtcTim0::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_AW::VALUE2) + self.variant(RtcTim0::Value2) } } #[doc = "RTC TIM1 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_AW { +pub enum RtcTim1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_AW) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Clear"] -pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_AW>; -impl<'a, REG> RTC_TIM1_W<'a, REG> +pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; +impl<'a, REG> RtcTim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_AW::VALUE1) + self.variant(RtcTim1::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_AW::VALUE2) + self.variant(RtcTim1::Value2) } } #[doc = "Retention Memory Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_AW { +pub enum Rmx { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_AW) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Clear"] -pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_AW>; -impl<'a, REG> RMX_W<'a, REG> +pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; +impl<'a, REG> RmxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RMX_AW::VALUE1) + self.variant(Rmx::Value1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RMX_AW::VALUE2) + self.variant(Rmx::Value2) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Clear"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PRWARN_W { - PRWARN_W::new(self, 0) + pub fn prwarn(&mut self) -> PrwarnW { + PrwarnW::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Clear"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PI_W { - PI_W::new(self, 1) + pub fn pi(&mut self) -> PiW { + PiW::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Clear"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AI_W { - AI_W::new(self, 2) + pub fn ai(&mut self) -> AiW { + AiW::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt clear"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DLROVR_W { - DLROVR_W::new(self, 3) + pub fn dlrovr(&mut self) -> DlrovrW { + DlrovrW::new(self, 3) } #[doc = "Bit 17 - HDCLR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdclr(&mut self) -> HDCLR_W { - HDCLR_W::new(self, 17) + pub fn hdclr(&mut self) -> HdclrW { + HdclrW::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdset(&mut self) -> HDSET_W { - HDSET_W::new(self, 18) + pub fn hdset(&mut self) -> HdsetW { + HdsetW::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HDCR_W { - HDCR_W::new(self, 19) + pub fn hdcr(&mut self) -> HdcrW { + HdcrW::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OSCSICTRL_W { - OSCSICTRL_W::new(self, 21) + pub fn oscsictrl(&mut self) -> OscsictrlW { + OscsictrlW::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OSCULCTRL_W { - OSCULCTRL_W::new(self, 23) + pub fn osculctrl(&mut self) -> OsculctrlW { + OsculctrlW::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RTC_CTR_W { - RTC_CTR_W::new(self, 24) + pub fn rtc_ctr(&mut self) -> RtcCtrW { + RtcCtrW::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { - RTC_ATIM0_W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RtcAtim0W { + RtcAtim0W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { - RTC_ATIM1_W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RtcAtim1W { + RtcAtim1W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { - RTC_TIM0_W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RtcTim0W { + RtcTim0W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { - RTC_TIM1_W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RtcTim1W { + RtcTim1W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RMX_W { - RMX_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rmx(&mut self) -> RmxW { + RmxW::new(self, 29) } } #[doc = "SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRCLR_SPEC; -impl crate::RegisterSpec for SRCLR_SPEC { +pub struct SrclrSpec; +impl crate::RegisterSpec for SrclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srclr::W`](W) writer structure"] -impl crate::Writable for SRCLR_SPEC { +impl crate::Writable for SrclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRCLR to value 0"] -impl crate::Resettable for SRCLR_SPEC { +impl crate::Resettable for SrclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srmsk.rs b/src/scu_interrupt/srmsk.rs index 7d447d3d..447f28f6 100644 --- a/src/scu_interrupt/srmsk.rs +++ b/src/scu_interrupt/srmsk.rs @@ -1,994 +1,985 @@ #[doc = "Register `SRMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRMSK` writer"] -pub type W = crate::W; -#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Mask"] -pub type PRWARN_R = crate::BitReader; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_A { +pub enum Prwarn { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_A) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } -impl PRWARN_R { +#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Mask"] +pub type PrwarnR = crate::BitReader; +impl PrwarnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRWARN_A { + pub const fn variant(&self) -> Prwarn { match self.bits { - false => PRWARN_A::VALUE1, - true => PRWARN_A::VALUE2, + false => Prwarn::Value1, + true => Prwarn::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRWARN_A::VALUE1 + *self == Prwarn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRWARN_A::VALUE2 + *self == Prwarn::Value2 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Mask"] -pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; -impl<'a, REG> PRWARN_W<'a, REG> +pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; +impl<'a, REG> PrwarnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRWARN_A::VALUE1) + self.variant(Prwarn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRWARN_A::VALUE2) + self.variant(Prwarn::Value2) } } -#[doc = "Field `PI` reader - RTC Periodic Interrupt Mask"] -pub type PI_R = crate::BitReader; #[doc = "RTC Periodic Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PI_A { +pub enum Pi { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PI_A) -> Self { + fn from(variant: Pi) -> Self { variant as u8 != 0 } } -impl PI_R { +#[doc = "Field `PI` reader - RTC Periodic Interrupt Mask"] +pub type PiR = crate::BitReader; +impl PiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PI_A { + pub const fn variant(&self) -> Pi { match self.bits { - false => PI_A::VALUE1, - true => PI_A::VALUE2, + false => Pi::Value1, + true => Pi::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PI_A::VALUE1 + *self == Pi::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PI_A::VALUE2 + *self == Pi::Value2 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Mask"] -pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; -impl<'a, REG> PI_W<'a, REG> +pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; +impl<'a, REG> PiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PI_A::VALUE1) + self.variant(Pi::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PI_A::VALUE2) + self.variant(Pi::Value2) } } -#[doc = "Field `AI` reader - RTC Alarm Interrupt Mask"] -pub type AI_R = crate::BitReader; #[doc = "RTC Alarm Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AI_A { +pub enum Ai { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AI_A) -> Self { + fn from(variant: Ai) -> Self { variant as u8 != 0 } } -impl AI_R { +#[doc = "Field `AI` reader - RTC Alarm Interrupt Mask"] +pub type AiR = crate::BitReader; +impl AiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AI_A { + pub const fn variant(&self) -> Ai { match self.bits { - false => AI_A::VALUE1, - true => AI_A::VALUE2, + false => Ai::Value1, + true => Ai::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AI_A::VALUE1 + *self == Ai::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AI_A::VALUE2 + *self == Ai::Value2 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Mask"] -pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; -impl<'a, REG> AI_W<'a, REG> +pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; +impl<'a, REG> AiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AI_A::VALUE1) + self.variant(Ai::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AI_A::VALUE2) + self.variant(Ai::Value2) } } -#[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Mask"] -pub type DLROVR_R = crate::BitReader; #[doc = "DLR Request Overrun Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLROVR_A { +pub enum Dlrovr { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLROVR_A) -> Self { + fn from(variant: Dlrovr) -> Self { variant as u8 != 0 } } -impl DLROVR_R { +#[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Mask"] +pub type DlrovrR = crate::BitReader; +impl DlrovrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLROVR_A { + pub const fn variant(&self) -> Dlrovr { match self.bits { - false => DLROVR_A::VALUE1, - true => DLROVR_A::VALUE2, + false => Dlrovr::Value1, + true => Dlrovr::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLROVR_A::VALUE1 + *self == Dlrovr::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLROVR_A::VALUE2 + *self == Dlrovr::Value2 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt Mask"] -pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_A>; -impl<'a, REG> DLROVR_W<'a, REG> +pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; +impl<'a, REG> DlrovrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLROVR_A::VALUE1) + self.variant(Dlrovr::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLROVR_A::VALUE2) + self.variant(Dlrovr::Value2) } } -#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Mask"] -pub type HDCLR_R = crate::BitReader; #[doc = "HDCLR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCLR_A { +pub enum Hdclr { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCLR_A) -> Self { + fn from(variant: Hdclr) -> Self { variant as u8 != 0 } } -impl HDCLR_R { +#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Mask"] +pub type HdclrR = crate::BitReader; +impl HdclrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCLR_A { + pub const fn variant(&self) -> Hdclr { match self.bits { - false => HDCLR_A::VALUE1, - true => HDCLR_A::VALUE2, + false => Hdclr::Value1, + true => Hdclr::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCLR_A::VALUE1 + *self == Hdclr::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCLR_A::VALUE2 + *self == Hdclr::Value2 } } #[doc = "Field `HDCLR` writer - HDCLR Mirror Register Update Mask"] -pub type HDCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCLR_A>; -impl<'a, REG> HDCLR_W<'a, REG> +pub type HdclrW<'a, REG> = crate::BitWriter<'a, REG, Hdclr>; +impl<'a, REG> HdclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCLR_A::VALUE1) + self.variant(Hdclr::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCLR_A::VALUE2) + self.variant(Hdclr::Value2) } } -#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Mask"] -pub type HDSET_R = crate::BitReader; #[doc = "HDSET Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDSET_A { +pub enum Hdset { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDSET_A) -> Self { + fn from(variant: Hdset) -> Self { variant as u8 != 0 } } -impl HDSET_R { +#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Mask"] +pub type HdsetR = crate::BitReader; +impl HdsetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDSET_A { + pub const fn variant(&self) -> Hdset { match self.bits { - false => HDSET_A::VALUE1, - true => HDSET_A::VALUE2, + false => Hdset::Value1, + true => Hdset::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDSET_A::VALUE1 + *self == Hdset::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDSET_A::VALUE2 + *self == Hdset::Value2 } } #[doc = "Field `HDSET` writer - HDSET Mirror Register Update Mask"] -pub type HDSET_W<'a, REG> = crate::BitWriter<'a, REG, HDSET_A>; -impl<'a, REG> HDSET_W<'a, REG> +pub type HdsetW<'a, REG> = crate::BitWriter<'a, REG, Hdset>; +impl<'a, REG> HdsetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDSET_A::VALUE1) + self.variant(Hdset::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDSET_A::VALUE2) + self.variant(Hdset::Value2) } } -#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Mask"] -pub type HDCR_R = crate::BitReader; #[doc = "HDCR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_A { +pub enum Hdcr { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_A) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } -impl HDCR_R { +#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Mask"] +pub type HdcrR = crate::BitReader; +impl HdcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCR_A { + pub const fn variant(&self) -> Hdcr { match self.bits { - false => HDCR_A::VALUE1, - true => HDCR_A::VALUE2, + false => Hdcr::Value1, + true => Hdcr::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCR_A::VALUE1 + *self == Hdcr::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCR_A::VALUE2 + *self == Hdcr::Value2 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Mask"] -pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_A>; -impl<'a, REG> HDCR_W<'a, REG> +pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; +impl<'a, REG> HdcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCR_A::VALUE1) + self.variant(Hdcr::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCR_A::VALUE2) + self.variant(Hdcr::Value2) } } -#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Mask"] -pub type OSCSICTRL_R = crate::BitReader; #[doc = "OSCSICTRL Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_A { +pub enum Oscsictrl { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_A) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } -impl OSCSICTRL_R { +#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Mask"] +pub type OscsictrlR = crate::BitReader; +impl OscsictrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCSICTRL_A { + pub const fn variant(&self) -> Oscsictrl { match self.bits { - false => OSCSICTRL_A::VALUE1, - true => OSCSICTRL_A::VALUE2, + false => Oscsictrl::Value1, + true => Oscsictrl::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCSICTRL_A::VALUE1 + *self == Oscsictrl::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCSICTRL_A::VALUE2 + *self == Oscsictrl::Value2 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Mask"] -pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_A>; -impl<'a, REG> OSCSICTRL_W<'a, REG> +pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; +impl<'a, REG> OscsictrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_A::VALUE1) + self.variant(Oscsictrl::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_A::VALUE2) + self.variant(Oscsictrl::Value2) } } -#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Mask"] -pub type OSCULCTRL_R = crate::BitReader; #[doc = "OSCULCTRL Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_A { +pub enum Osculctrl { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_A) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } -impl OSCULCTRL_R { +#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Mask"] +pub type OsculctrlR = crate::BitReader; +impl OsculctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCULCTRL_A { + pub const fn variant(&self) -> Osculctrl { match self.bits { - false => OSCULCTRL_A::VALUE1, - true => OSCULCTRL_A::VALUE2, + false => Osculctrl::Value1, + true => Osculctrl::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCULCTRL_A::VALUE1 + *self == Osculctrl::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCULCTRL_A::VALUE2 + *self == Osculctrl::Value2 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Mask"] -pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_A>; -impl<'a, REG> OSCULCTRL_W<'a, REG> +pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; +impl<'a, REG> OsculctrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_A::VALUE1) + self.variant(Osculctrl::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_A::VALUE2) + self.variant(Osculctrl::Value2) } } -#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Mask"] -pub type RTC_CTR_R = crate::BitReader; #[doc = "RTC CTR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_A { +pub enum RtcCtr { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_A) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } -impl RTC_CTR_R { +#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Mask"] +pub type RtcCtrR = crate::BitReader; +impl RtcCtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_CTR_A { + pub const fn variant(&self) -> RtcCtr { match self.bits { - false => RTC_CTR_A::VALUE1, - true => RTC_CTR_A::VALUE2, + false => RtcCtr::Value1, + true => RtcCtr::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_CTR_A::VALUE1 + *self == RtcCtr::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_CTR_A::VALUE2 + *self == RtcCtr::Value2 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Mask"] -pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_A>; -impl<'a, REG> RTC_CTR_W<'a, REG> +pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; +impl<'a, REG> RtcCtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_CTR_A::VALUE1) + self.variant(RtcCtr::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_CTR_A::VALUE2) + self.variant(RtcCtr::Value2) } } -#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Mask"] -pub type RTC_ATIM0_R = crate::BitReader; #[doc = "RTC ATIM0 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_A { +pub enum RtcAtim0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_A) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } -impl RTC_ATIM0_R { +#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Mask"] +pub type RtcAtim0R = crate::BitReader; +impl RtcAtim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM0_A { + pub const fn variant(&self) -> RtcAtim0 { match self.bits { - false => RTC_ATIM0_A::VALUE1, - true => RTC_ATIM0_A::VALUE2, + false => RtcAtim0::Value1, + true => RtcAtim0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM0_A::VALUE1 + *self == RtcAtim0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM0_A::VALUE2 + *self == RtcAtim0::Value2 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Mask"] -pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_A>; -impl<'a, REG> RTC_ATIM0_W<'a, REG> +pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; +impl<'a, REG> RtcAtim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_A::VALUE1) + self.variant(RtcAtim0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_A::VALUE2) + self.variant(RtcAtim0::Value2) } } -#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Mask"] -pub type RTC_ATIM1_R = crate::BitReader; #[doc = "RTC ATIM1 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_A { +pub enum RtcAtim1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_A) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } -impl RTC_ATIM1_R { +#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Mask"] +pub type RtcAtim1R = crate::BitReader; +impl RtcAtim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM1_A { + pub const fn variant(&self) -> RtcAtim1 { match self.bits { - false => RTC_ATIM1_A::VALUE1, - true => RTC_ATIM1_A::VALUE2, + false => RtcAtim1::Value1, + true => RtcAtim1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM1_A::VALUE1 + *self == RtcAtim1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM1_A::VALUE2 + *self == RtcAtim1::Value2 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Mask"] -pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_A>; -impl<'a, REG> RTC_ATIM1_W<'a, REG> +pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; +impl<'a, REG> RtcAtim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_A::VALUE1) + self.variant(RtcAtim1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_A::VALUE2) + self.variant(RtcAtim1::Value2) } } -#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Mask"] -pub type RTC_TIM0_R = crate::BitReader; #[doc = "RTC TIM0 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_A { +pub enum RtcTim0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_A) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } -impl RTC_TIM0_R { +#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Mask"] +pub type RtcTim0R = crate::BitReader; +impl RtcTim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM0_A { + pub const fn variant(&self) -> RtcTim0 { match self.bits { - false => RTC_TIM0_A::VALUE1, - true => RTC_TIM0_A::VALUE2, + false => RtcTim0::Value1, + true => RtcTim0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM0_A::VALUE1 + *self == RtcTim0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM0_A::VALUE2 + *self == RtcTim0::Value2 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Mask"] -pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_A>; -impl<'a, REG> RTC_TIM0_W<'a, REG> +pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; +impl<'a, REG> RtcTim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_A::VALUE1) + self.variant(RtcTim0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_A::VALUE2) + self.variant(RtcTim0::Value2) } } -#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Mask"] -pub type RTC_TIM1_R = crate::BitReader; #[doc = "RTC TIM1 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_A { +pub enum RtcTim1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_A) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } -impl RTC_TIM1_R { +#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Mask"] +pub type RtcTim1R = crate::BitReader; +impl RtcTim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM1_A { + pub const fn variant(&self) -> RtcTim1 { match self.bits { - false => RTC_TIM1_A::VALUE1, - true => RTC_TIM1_A::VALUE2, + false => RtcTim1::Value1, + true => RtcTim1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM1_A::VALUE1 + *self == RtcTim1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM1_A::VALUE2 + *self == RtcTim1::Value2 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Mask"] -pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_A>; -impl<'a, REG> RTC_TIM1_W<'a, REG> +pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; +impl<'a, REG> RtcTim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_A::VALUE1) + self.variant(RtcTim1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_A::VALUE2) + self.variant(RtcTim1::Value2) } } -#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Mask"] -pub type RMX_R = crate::BitReader; #[doc = "Retention Memory Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_A { +pub enum Rmx { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_A) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } -impl RMX_R { +#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Mask"] +pub type RmxR = crate::BitReader; +impl RmxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RMX_A { + pub const fn variant(&self) -> Rmx { match self.bits { - false => RMX_A::VALUE1, - true => RMX_A::VALUE2, + false => Rmx::Value1, + true => Rmx::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RMX_A::VALUE1 + *self == Rmx::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RMX_A::VALUE2 + *self == Rmx::Value2 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Mask"] -pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_A>; -impl<'a, REG> RMX_W<'a, REG> +pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; +impl<'a, REG> RmxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RMX_A::VALUE1) + self.variant(Rmx::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RMX_A::VALUE2) + self.variant(Rmx::Value2) } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"] #[inline(always)] - pub fn prwarn(&self) -> PRWARN_R { - PRWARN_R::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PrwarnR { + PrwarnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Mask"] #[inline(always)] - pub fn pi(&self) -> PI_R { - PI_R::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PiR { + PiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Alarm Interrupt Mask"] #[inline(always)] - pub fn ai(&self) -> AI_R { - AI_R::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AiR { + AiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"] #[inline(always)] - pub fn dlrovr(&self) -> DLROVR_R { - DLROVR_R::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DlrovrR { + DlrovrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"] #[inline(always)] - pub fn hdclr(&self) -> HDCLR_R { - HDCLR_R::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HdclrR { + HdclrR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Mask"] #[inline(always)] - pub fn hdset(&self) -> HDSET_R { - HDSET_R::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HdsetR { + HdsetR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Mask"] #[inline(always)] - pub fn hdcr(&self) -> HDCR_R { - HDCR_R::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HdcrR { + HdcrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"] #[inline(always)] - pub fn oscsictrl(&self) -> OSCSICTRL_R { - OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OscsictrlR { + OscsictrlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"] #[inline(always)] - pub fn osculctrl(&self) -> OSCULCTRL_R { - OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OsculctrlR { + OsculctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_ctr(&self) -> RTC_CTR_R { - RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RtcCtrR { + RtcCtrR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_atim0(&self) -> RTC_ATIM0_R { - RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RtcAtim0R { + RtcAtim0R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_atim1(&self) -> RTC_ATIM1_R { - RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RtcAtim1R { + RtcAtim1R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_tim0(&self) -> RTC_TIM0_R { - RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RtcTim0R { + RtcTim0R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_tim1(&self) -> RTC_TIM1_R { - RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RtcTim1R { + RtcTim1R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"] #[inline(always)] - pub fn rmx(&self) -> RMX_R { - RMX_R::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RmxR { + RmxR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PRWARN_W { - PRWARN_W::new(self, 0) + pub fn prwarn(&mut self) -> PrwarnW { + PrwarnW::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PI_W { - PI_W::new(self, 1) + pub fn pi(&mut self) -> PiW { + PiW::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Mask"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AI_W { - AI_W::new(self, 2) + pub fn ai(&mut self) -> AiW { + AiW::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DLROVR_W { - DLROVR_W::new(self, 3) + pub fn dlrovr(&mut self) -> DlrovrW { + DlrovrW::new(self, 3) } #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdclr(&mut self) -> HDCLR_W { - HDCLR_W::new(self, 17) + pub fn hdclr(&mut self) -> HdclrW { + HdclrW::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdset(&mut self) -> HDSET_W { - HDSET_W::new(self, 18) + pub fn hdset(&mut self) -> HdsetW { + HdsetW::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HDCR_W { - HDCR_W::new(self, 19) + pub fn hdcr(&mut self) -> HdcrW { + HdcrW::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OSCSICTRL_W { - OSCSICTRL_W::new(self, 21) + pub fn oscsictrl(&mut self) -> OscsictrlW { + OscsictrlW::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OSCULCTRL_W { - OSCULCTRL_W::new(self, 23) + pub fn osculctrl(&mut self) -> OsculctrlW { + OsculctrlW::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RTC_CTR_W { - RTC_CTR_W::new(self, 24) + pub fn rtc_ctr(&mut self) -> RtcCtrW { + RtcCtrW::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { - RTC_ATIM0_W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RtcAtim0W { + RtcAtim0W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { - RTC_ATIM1_W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RtcAtim1W { + RtcAtim1W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { - RTC_TIM0_W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RtcTim0W { + RtcTim0W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { - RTC_TIM1_W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RtcTim1W { + RtcTim1W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RMX_W { - RMX_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rmx(&mut self) -> RmxW { + RmxW::new(self, 29) } } #[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRMSK_SPEC; -impl crate::RegisterSpec for SRMSK_SPEC { +pub struct SrmskSpec; +impl crate::RegisterSpec for SrmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`srmsk::R`](R) reader structure"] -impl crate::Readable for SRMSK_SPEC {} +impl crate::Readable for SrmskSpec {} #[doc = "`write(|w| ..)` method takes [`srmsk::W`](W) writer structure"] -impl crate::Writable for SRMSK_SPEC { +impl crate::Writable for SrmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRMSK to value 0"] -impl crate::Resettable for SRMSK_SPEC { +impl crate::Resettable for SrmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srraw.rs b/src/scu_interrupt/srraw.rs index 947770af..c67950c1 100644 --- a/src/scu_interrupt/srraw.rs +++ b/src/scu_interrupt/srraw.rs @@ -1,528 +1,528 @@ #[doc = "Register `SRRAW` reader"] -pub type R = crate::R; -#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status Before Masking"] -pub type PRWARN_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDT pre-warning Interrupt Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_A { +pub enum Prwarn { #[doc = "0: Inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_A) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } -impl PRWARN_R { +#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status Before Masking"] +pub type PrwarnR = crate::BitReader; +impl PrwarnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRWARN_A { + pub const fn variant(&self) -> Prwarn { match self.bits { - false => PRWARN_A::VALUE1, - true => PRWARN_A::VALUE2, + false => Prwarn::Value1, + true => Prwarn::Value2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRWARN_A::VALUE1 + *self == Prwarn::Value1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRWARN_A::VALUE2 + *self == Prwarn::Value2 } } #[doc = "Field `PI` reader - RTC Raw Periodic Interrupt Status Before Masking"] -pub type PI_R = crate::BitReader; +pub type PiR = crate::BitReader; #[doc = "Field `AI` reader - RTC Raw Alarm Interrupt Status Before Masking"] -pub type AI_R = crate::BitReader; +pub type AiR = crate::BitReader; #[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Status Before Masking"] -pub type DLROVR_R = crate::BitReader; -#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status Before Masking"] -pub type HDCLR_R = crate::BitReader; +pub type DlrovrR = crate::BitReader; #[doc = "HDCLR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCLR_A { +pub enum Hdclr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCLR_A) -> Self { + fn from(variant: Hdclr) -> Self { variant as u8 != 0 } } -impl HDCLR_R { +#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status Before Masking"] +pub type HdclrR = crate::BitReader; +impl HdclrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCLR_A { + pub const fn variant(&self) -> Hdclr { match self.bits { - false => HDCLR_A::VALUE1, - true => HDCLR_A::VALUE2, + false => Hdclr::Value1, + true => Hdclr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCLR_A::VALUE1 + *self == Hdclr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCLR_A::VALUE2 + *self == Hdclr::Value2 } } -#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status Before Masking"] -pub type HDSET_R = crate::BitReader; #[doc = "HDSET Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDSET_A { +pub enum Hdset { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDSET_A) -> Self { + fn from(variant: Hdset) -> Self { variant as u8 != 0 } } -impl HDSET_R { +#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status Before Masking"] +pub type HdsetR = crate::BitReader; +impl HdsetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDSET_A { + pub const fn variant(&self) -> Hdset { match self.bits { - false => HDSET_A::VALUE1, - true => HDSET_A::VALUE2, + false => Hdset::Value1, + true => Hdset::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDSET_A::VALUE1 + *self == Hdset::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDSET_A::VALUE2 + *self == Hdset::Value2 } } -#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status Before Masking"] -pub type HDCR_R = crate::BitReader; #[doc = "HDCR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_A { +pub enum Hdcr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_A) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } -impl HDCR_R { +#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status Before Masking"] +pub type HdcrR = crate::BitReader; +impl HdcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCR_A { + pub const fn variant(&self) -> Hdcr { match self.bits { - false => HDCR_A::VALUE1, - true => HDCR_A::VALUE2, + false => Hdcr::Value1, + true => Hdcr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCR_A::VALUE1 + *self == Hdcr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCR_A::VALUE2 + *self == Hdcr::Value2 } } -#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status Before Masking"] -pub type OSCSICTRL_R = crate::BitReader; #[doc = "OSCSICTRL Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_A { +pub enum Oscsictrl { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_A) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } -impl OSCSICTRL_R { +#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status Before Masking"] +pub type OscsictrlR = crate::BitReader; +impl OscsictrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCSICTRL_A { + pub const fn variant(&self) -> Oscsictrl { match self.bits { - false => OSCSICTRL_A::VALUE1, - true => OSCSICTRL_A::VALUE2, + false => Oscsictrl::Value1, + true => Oscsictrl::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCSICTRL_A::VALUE1 + *self == Oscsictrl::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCSICTRL_A::VALUE2 + *self == Oscsictrl::Value2 } } -#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status Before Masking"] -pub type OSCULCTRL_R = crate::BitReader; #[doc = "OSCULCTRL Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_A { +pub enum Osculctrl { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_A) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } -impl OSCULCTRL_R { +#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status Before Masking"] +pub type OsculctrlR = crate::BitReader; +impl OsculctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCULCTRL_A { + pub const fn variant(&self) -> Osculctrl { match self.bits { - false => OSCULCTRL_A::VALUE1, - true => OSCULCTRL_A::VALUE2, + false => Osculctrl::Value1, + true => Osculctrl::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCULCTRL_A::VALUE1 + *self == Osculctrl::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCULCTRL_A::VALUE2 + *self == Osculctrl::Value2 } } -#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status Before Masking"] -pub type RTC_CTR_R = crate::BitReader; #[doc = "RTC CTR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_A { +pub enum RtcCtr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_A) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } -impl RTC_CTR_R { +#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status Before Masking"] +pub type RtcCtrR = crate::BitReader; +impl RtcCtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_CTR_A { + pub const fn variant(&self) -> RtcCtr { match self.bits { - false => RTC_CTR_A::VALUE1, - true => RTC_CTR_A::VALUE2, + false => RtcCtr::Value1, + true => RtcCtr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_CTR_A::VALUE1 + *self == RtcCtr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_CTR_A::VALUE2 + *self == RtcCtr::Value2 } } -#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status Before Masking"] -pub type RTC_ATIM0_R = crate::BitReader; #[doc = "RTC ATIM0 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_A { +pub enum RtcAtim0 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_A) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } -impl RTC_ATIM0_R { +#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status Before Masking"] +pub type RtcAtim0R = crate::BitReader; +impl RtcAtim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM0_A { + pub const fn variant(&self) -> RtcAtim0 { match self.bits { - false => RTC_ATIM0_A::VALUE1, - true => RTC_ATIM0_A::VALUE2, + false => RtcAtim0::Value1, + true => RtcAtim0::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM0_A::VALUE1 + *self == RtcAtim0::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM0_A::VALUE2 + *self == RtcAtim0::Value2 } } -#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status Before Masking"] -pub type RTC_ATIM1_R = crate::BitReader; #[doc = "RTC ATIM1 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_A { +pub enum RtcAtim1 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_A) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } -impl RTC_ATIM1_R { +#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status Before Masking"] +pub type RtcAtim1R = crate::BitReader; +impl RtcAtim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM1_A { + pub const fn variant(&self) -> RtcAtim1 { match self.bits { - false => RTC_ATIM1_A::VALUE1, - true => RTC_ATIM1_A::VALUE2, + false => RtcAtim1::Value1, + true => RtcAtim1::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM1_A::VALUE1 + *self == RtcAtim1::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM1_A::VALUE2 + *self == RtcAtim1::Value2 } } -#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Before Masking Status"] -pub type RTC_TIM0_R = crate::BitReader; #[doc = "RTC TIM0 Mirror Register Update Before Masking Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_A { +pub enum RtcTim0 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_A) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } -impl RTC_TIM0_R { +#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Before Masking Status"] +pub type RtcTim0R = crate::BitReader; +impl RtcTim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM0_A { + pub const fn variant(&self) -> RtcTim0 { match self.bits { - false => RTC_TIM0_A::VALUE1, - true => RTC_TIM0_A::VALUE2, + false => RtcTim0::Value1, + true => RtcTim0::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM0_A::VALUE1 + *self == RtcTim0::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM0_A::VALUE2 + *self == RtcTim0::Value2 } } -#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status Before Masking"] -pub type RTC_TIM1_R = crate::BitReader; #[doc = "RTC TIM1 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_A { +pub enum RtcTim1 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_A) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } -impl RTC_TIM1_R { +#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status Before Masking"] +pub type RtcTim1R = crate::BitReader; +impl RtcTim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM1_A { + pub const fn variant(&self) -> RtcTim1 { match self.bits { - false => RTC_TIM1_A::VALUE1, - true => RTC_TIM1_A::VALUE2, + false => RtcTim1::Value1, + true => RtcTim1::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM1_A::VALUE1 + *self == RtcTim1::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM1_A::VALUE2 + *self == RtcTim1::Value2 } } -#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status Before Masking"] -pub type RMX_R = crate::BitReader; #[doc = "Retention Memory Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_A { +pub enum Rmx { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_A) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } -impl RMX_R { +#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status Before Masking"] +pub type RmxR = crate::BitReader; +impl RmxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RMX_A { + pub const fn variant(&self) -> Rmx { match self.bits { - false => RMX_A::VALUE1, - true => RMX_A::VALUE2, + false => Rmx::Value1, + true => Rmx::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RMX_A::VALUE1 + *self == Rmx::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RMX_A::VALUE2 + *self == Rmx::Value2 } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Status Before Masking"] #[inline(always)] - pub fn prwarn(&self) -> PRWARN_R { - PRWARN_R::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PrwarnR { + PrwarnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Raw Periodic Interrupt Status Before Masking"] #[inline(always)] - pub fn pi(&self) -> PI_R { - PI_R::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PiR { + PiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Raw Alarm Interrupt Status Before Masking"] #[inline(always)] - pub fn ai(&self) -> AI_R { - AI_R::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AiR { + AiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Status Before Masking"] #[inline(always)] - pub fn dlrovr(&self) -> DLROVR_R { - DLROVR_R::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DlrovrR { + DlrovrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdclr(&self) -> HDCLR_R { - HDCLR_R::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HdclrR { + HdclrR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdset(&self) -> HDSET_R { - HDSET_R::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HdsetR { + HdsetR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdcr(&self) -> HDCR_R { - HDCR_R::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HdcrR { + HdcrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn oscsictrl(&self) -> OSCSICTRL_R { - OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OscsictrlR { + OscsictrlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn osculctrl(&self) -> OSCULCTRL_R { - OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OsculctrlR { + OsculctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_ctr(&self) -> RTC_CTR_R { - RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RtcCtrR { + RtcCtrR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_atim0(&self) -> RTC_ATIM0_R { - RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RtcAtim0R { + RtcAtim0R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_atim1(&self) -> RTC_ATIM1_R { - RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RtcAtim1R { + RtcAtim1R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Before Masking Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RTC_TIM0_R { - RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RtcTim0R { + RtcTim0R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_tim1(&self) -> RTC_TIM1_R { - RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RtcTim1R { + RtcTim1R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rmx(&self) -> RMX_R { - RMX_R::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RmxR { + RmxR::new(((self.bits >> 29) & 1) != 0) } } #[doc = "SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRRAW_SPEC; -impl crate::RegisterSpec for SRRAW_SPEC { +pub struct SrrawSpec; +impl crate::RegisterSpec for SrrawSpec { type Ux = u32; } #[doc = "`read()` method returns [`srraw::R`](R) reader structure"] -impl crate::Readable for SRRAW_SPEC {} +impl crate::Readable for SrrawSpec {} #[doc = "`reset()` method sets SRRAW to value 0"] -impl crate::Resettable for SRRAW_SPEC { +impl crate::Resettable for SrrawSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srset.rs b/src/scu_interrupt/srset.rs index a021b5d6..92d3feba 100644 --- a/src/scu_interrupt/srset.rs +++ b/src/scu_interrupt/srset.rs @@ -1,583 +1,574 @@ #[doc = "Register `SRSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_AW { +pub enum Prwarn { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_AW) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Set"] -pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_AW>; -impl<'a, REG> PRWARN_W<'a, REG> +pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; +impl<'a, REG> PrwarnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRWARN_AW::VALUE1) + self.variant(Prwarn::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRWARN_AW::VALUE2) + self.variant(Prwarn::Value2) } } #[doc = "RTC Periodic Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PI_AW { +pub enum Pi { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PI_AW) -> Self { + fn from(variant: Pi) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Set"] -pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_AW>; -impl<'a, REG> PI_W<'a, REG> +pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; +impl<'a, REG> PiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PI_AW::VALUE1) + self.variant(Pi::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PI_AW::VALUE2) + self.variant(Pi::Value2) } } #[doc = "RTC Alarm Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AI_AW { +pub enum Ai { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AI_AW) -> Self { + fn from(variant: Ai) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Set"] -pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_AW>; -impl<'a, REG> AI_W<'a, REG> +pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; +impl<'a, REG> AiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AI_AW::VALUE1) + self.variant(Ai::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AI_AW::VALUE2) + self.variant(Ai::Value2) } } #[doc = "DLR Request Overrun Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLROVR_AW { +pub enum Dlrovr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLROVR_AW) -> Self { + fn from(variant: Dlrovr) -> Self { variant as u8 != 0 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt Set"] -pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_AW>; -impl<'a, REG> DLROVR_W<'a, REG> +pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; +impl<'a, REG> DlrovrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLROVR_AW::VALUE1) + self.variant(Dlrovr::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLROVR_AW::VALUE2) + self.variant(Dlrovr::Value2) } } #[doc = "HDCRCLR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCRCLR_AW { +pub enum Hdcrclr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCRCLR_AW) -> Self { + fn from(variant: Hdcrclr) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCRCLR` writer - HDCRCLR Mirror Register Update Set"] -pub type HDCRCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCRCLR_AW>; -impl<'a, REG> HDCRCLR_W<'a, REG> +pub type HdcrclrW<'a, REG> = crate::BitWriter<'a, REG, Hdcrclr>; +impl<'a, REG> HdcrclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCRCLR_AW::VALUE1) + self.variant(Hdcrclr::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCRCLR_AW::VALUE2) + self.variant(Hdcrclr::Value2) } } #[doc = "HDCRSET Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCRSET_AW { +pub enum Hdcrset { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCRSET_AW) -> Self { + fn from(variant: Hdcrset) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCRSET` writer - HDCRSET Mirror Register Update Set"] -pub type HDCRSET_W<'a, REG> = crate::BitWriter<'a, REG, HDCRSET_AW>; -impl<'a, REG> HDCRSET_W<'a, REG> +pub type HdcrsetW<'a, REG> = crate::BitWriter<'a, REG, Hdcrset>; +impl<'a, REG> HdcrsetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCRSET_AW::VALUE1) + self.variant(Hdcrset::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCRSET_AW::VALUE2) + self.variant(Hdcrset::Value2) } } #[doc = "HDCR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_AW { +pub enum Hdcr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_AW) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Set"] -pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_AW>; -impl<'a, REG> HDCR_W<'a, REG> +pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; +impl<'a, REG> HdcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HDCR_AW::VALUE1) + self.variant(Hdcr::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HDCR_AW::VALUE2) + self.variant(Hdcr::Value2) } } #[doc = "OSCSICTRL Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_AW { +pub enum Oscsictrl { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_AW) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Set"] -pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_AW>; -impl<'a, REG> OSCSICTRL_W<'a, REG> +pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; +impl<'a, REG> OscsictrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_AW::VALUE1) + self.variant(Oscsictrl::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCSICTRL_AW::VALUE2) + self.variant(Oscsictrl::Value2) } } #[doc = "OSCULCTRL Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_AW { +pub enum Osculctrl { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_AW) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Set"] -pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_AW>; -impl<'a, REG> OSCULCTRL_W<'a, REG> +pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; +impl<'a, REG> OsculctrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_AW::VALUE1) + self.variant(Osculctrl::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCULCTRL_AW::VALUE2) + self.variant(Osculctrl::Value2) } } #[doc = "RTC CTR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_AW { +pub enum RtcCtr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_AW) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Set"] -pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_AW>; -impl<'a, REG> RTC_CTR_W<'a, REG> +pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; +impl<'a, REG> RtcCtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_CTR_AW::VALUE1) + self.variant(RtcCtr::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_CTR_AW::VALUE2) + self.variant(RtcCtr::Value2) } } #[doc = "RTC ATIM0 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_AW { +pub enum RtcAtim0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_AW) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Set"] -pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_AW>; -impl<'a, REG> RTC_ATIM0_W<'a, REG> +pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; +impl<'a, REG> RtcAtim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_AW::VALUE1) + self.variant(RtcAtim0::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM0_AW::VALUE2) + self.variant(RtcAtim0::Value2) } } #[doc = "RTC ATIM1 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_AW { +pub enum RtcAtim1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_AW) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Set"] -pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_AW>; -impl<'a, REG> RTC_ATIM1_W<'a, REG> +pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; +impl<'a, REG> RtcAtim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_AW::VALUE1) + self.variant(RtcAtim1::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_ATIM1_AW::VALUE2) + self.variant(RtcAtim1::Value2) } } #[doc = "RTC TIM0 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_AW { +pub enum RtcTim0 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_AW) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Set"] -pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_AW>; -impl<'a, REG> RTC_TIM0_W<'a, REG> +pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; +impl<'a, REG> RtcTim0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_AW::VALUE1) + self.variant(RtcTim0::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM0_AW::VALUE2) + self.variant(RtcTim0::Value2) } } #[doc = "RTC TIM1 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_AW { +pub enum RtcTim1 { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_AW) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Set"] -pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_AW>; -impl<'a, REG> RTC_TIM1_W<'a, REG> +pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; +impl<'a, REG> RtcTim1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_AW::VALUE1) + self.variant(RtcTim1::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RTC_TIM1_AW::VALUE2) + self.variant(RtcTim1::Value2) } } #[doc = "Retention Memory Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_AW { +pub enum Rmx { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: set the status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_AW) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Set"] -pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_AW>; -impl<'a, REG> RMX_W<'a, REG> +pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; +impl<'a, REG> RmxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RMX_AW::VALUE1) + self.variant(Rmx::Value1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RMX_AW::VALUE2) + self.variant(Rmx::Value2) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Set"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PRWARN_W { - PRWARN_W::new(self, 0) + pub fn prwarn(&mut self) -> PrwarnW { + PrwarnW::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Set"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PI_W { - PI_W::new(self, 1) + pub fn pi(&mut self) -> PiW { + PiW::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Set"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AI_W { - AI_W::new(self, 2) + pub fn ai(&mut self) -> AiW { + AiW::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Set"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DLROVR_W { - DLROVR_W::new(self, 3) + pub fn dlrovr(&mut self) -> DlrovrW { + DlrovrW::new(self, 3) } #[doc = "Bit 17 - HDCRCLR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcrclr(&mut self) -> HDCRCLR_W { - HDCRCLR_W::new(self, 17) + pub fn hdcrclr(&mut self) -> HdcrclrW { + HdcrclrW::new(self, 17) } #[doc = "Bit 18 - HDCRSET Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcrset(&mut self) -> HDCRSET_W { - HDCRSET_W::new(self, 18) + pub fn hdcrset(&mut self) -> HdcrsetW { + HdcrsetW::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HDCR_W { - HDCR_W::new(self, 19) + pub fn hdcr(&mut self) -> HdcrW { + HdcrW::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OSCSICTRL_W { - OSCSICTRL_W::new(self, 21) + pub fn oscsictrl(&mut self) -> OscsictrlW { + OscsictrlW::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OSCULCTRL_W { - OSCULCTRL_W::new(self, 23) + pub fn osculctrl(&mut self) -> OsculctrlW { + OsculctrlW::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RTC_CTR_W { - RTC_CTR_W::new(self, 24) + pub fn rtc_ctr(&mut self) -> RtcCtrW { + RtcCtrW::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { - RTC_ATIM0_W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RtcAtim0W { + RtcAtim0W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { - RTC_ATIM1_W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RtcAtim1W { + RtcAtim1W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { - RTC_TIM0_W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RtcTim0W { + RtcTim0W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { - RTC_TIM1_W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RtcTim1W { + RtcTim1W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RMX_W { - RMX_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rmx(&mut self) -> RmxW { + RmxW::new(self, 29) } } #[doc = "SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRSET_SPEC; -impl crate::RegisterSpec for SRSET_SPEC { +pub struct SrsetSpec; +impl crate::RegisterSpec for SrsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srset::W`](W) writer structure"] -impl crate::Writable for SRSET_SPEC { +impl crate::Writable for SrsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRSET to value 0"] -impl crate::Resettable for SRSET_SPEC { +impl crate::Resettable for SrsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srstat.rs b/src/scu_interrupt/srstat.rs index 232348af..61d0340e 100644 --- a/src/scu_interrupt/srstat.rs +++ b/src/scu_interrupt/srstat.rs @@ -1,528 +1,528 @@ #[doc = "Register `SRSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status"] -pub type PRWARN_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDT pre-warning Interrupt Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRWARN_A { +pub enum Prwarn { #[doc = "0: Inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRWARN_A) -> Self { + fn from(variant: Prwarn) -> Self { variant as u8 != 0 } } -impl PRWARN_R { +#[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status"] +pub type PrwarnR = crate::BitReader; +impl PrwarnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRWARN_A { + pub const fn variant(&self) -> Prwarn { match self.bits { - false => PRWARN_A::VALUE1, - true => PRWARN_A::VALUE2, + false => Prwarn::Value1, + true => Prwarn::Value2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRWARN_A::VALUE1 + *self == Prwarn::Value1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRWARN_A::VALUE2 + *self == Prwarn::Value2 } } #[doc = "Field `PI` reader - RTC Periodic Interrupt Status"] -pub type PI_R = crate::BitReader; +pub type PiR = crate::BitReader; #[doc = "Field `AI` reader - Alarm Interrupt Status"] -pub type AI_R = crate::BitReader; +pub type AiR = crate::BitReader; #[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Status"] -pub type DLROVR_R = crate::BitReader; -#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status"] -pub type HDCLR_R = crate::BitReader; +pub type DlrovrR = crate::BitReader; #[doc = "HDCLR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCLR_A { +pub enum Hdclr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCLR_A) -> Self { + fn from(variant: Hdclr) -> Self { variant as u8 != 0 } } -impl HDCLR_R { +#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status"] +pub type HdclrR = crate::BitReader; +impl HdclrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCLR_A { + pub const fn variant(&self) -> Hdclr { match self.bits { - false => HDCLR_A::VALUE1, - true => HDCLR_A::VALUE2, + false => Hdclr::Value1, + true => Hdclr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCLR_A::VALUE1 + *self == Hdclr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCLR_A::VALUE2 + *self == Hdclr::Value2 } } -#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status"] -pub type HDSET_R = crate::BitReader; #[doc = "HDSET Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDSET_A { +pub enum Hdset { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDSET_A) -> Self { + fn from(variant: Hdset) -> Self { variant as u8 != 0 } } -impl HDSET_R { +#[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status"] +pub type HdsetR = crate::BitReader; +impl HdsetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDSET_A { + pub const fn variant(&self) -> Hdset { match self.bits { - false => HDSET_A::VALUE1, - true => HDSET_A::VALUE2, + false => Hdset::Value1, + true => Hdset::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDSET_A::VALUE1 + *self == Hdset::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDSET_A::VALUE2 + *self == Hdset::Value2 } } -#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status"] -pub type HDCR_R = crate::BitReader; #[doc = "HDCR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HDCR_A { +pub enum Hdcr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HDCR_A) -> Self { + fn from(variant: Hdcr) -> Self { variant as u8 != 0 } } -impl HDCR_R { +#[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status"] +pub type HdcrR = crate::BitReader; +impl HdcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HDCR_A { + pub const fn variant(&self) -> Hdcr { match self.bits { - false => HDCR_A::VALUE1, - true => HDCR_A::VALUE2, + false => Hdcr::Value1, + true => Hdcr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HDCR_A::VALUE1 + *self == Hdcr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HDCR_A::VALUE2 + *self == Hdcr::Value2 } } -#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status"] -pub type OSCSICTRL_R = crate::BitReader; #[doc = "OSCSICTRL Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCSICTRL_A { +pub enum Oscsictrl { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCSICTRL_A) -> Self { + fn from(variant: Oscsictrl) -> Self { variant as u8 != 0 } } -impl OSCSICTRL_R { +#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status"] +pub type OscsictrlR = crate::BitReader; +impl OscsictrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCSICTRL_A { + pub const fn variant(&self) -> Oscsictrl { match self.bits { - false => OSCSICTRL_A::VALUE1, - true => OSCSICTRL_A::VALUE2, + false => Oscsictrl::Value1, + true => Oscsictrl::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCSICTRL_A::VALUE1 + *self == Oscsictrl::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCSICTRL_A::VALUE2 + *self == Oscsictrl::Value2 } } -#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status"] -pub type OSCULCTRL_R = crate::BitReader; #[doc = "OSCULCTRL Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCULCTRL_A { +pub enum Osculctrl { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCULCTRL_A) -> Self { + fn from(variant: Osculctrl) -> Self { variant as u8 != 0 } } -impl OSCULCTRL_R { +#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status"] +pub type OsculctrlR = crate::BitReader; +impl OsculctrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCULCTRL_A { + pub const fn variant(&self) -> Osculctrl { match self.bits { - false => OSCULCTRL_A::VALUE1, - true => OSCULCTRL_A::VALUE2, + false => Osculctrl::Value1, + true => Osculctrl::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCULCTRL_A::VALUE1 + *self == Osculctrl::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCULCTRL_A::VALUE2 + *self == Osculctrl::Value2 } } -#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status"] -pub type RTC_CTR_R = crate::BitReader; #[doc = "RTC CTR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_CTR_A { +pub enum RtcCtr { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_CTR_A) -> Self { + fn from(variant: RtcCtr) -> Self { variant as u8 != 0 } } -impl RTC_CTR_R { +#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status"] +pub type RtcCtrR = crate::BitReader; +impl RtcCtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_CTR_A { + pub const fn variant(&self) -> RtcCtr { match self.bits { - false => RTC_CTR_A::VALUE1, - true => RTC_CTR_A::VALUE2, + false => RtcCtr::Value1, + true => RtcCtr::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_CTR_A::VALUE1 + *self == RtcCtr::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_CTR_A::VALUE2 + *self == RtcCtr::Value2 } } -#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status"] -pub type RTC_ATIM0_R = crate::BitReader; #[doc = "RTC ATIM0 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM0_A { +pub enum RtcAtim0 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM0_A) -> Self { + fn from(variant: RtcAtim0) -> Self { variant as u8 != 0 } } -impl RTC_ATIM0_R { +#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status"] +pub type RtcAtim0R = crate::BitReader; +impl RtcAtim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM0_A { + pub const fn variant(&self) -> RtcAtim0 { match self.bits { - false => RTC_ATIM0_A::VALUE1, - true => RTC_ATIM0_A::VALUE2, + false => RtcAtim0::Value1, + true => RtcAtim0::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM0_A::VALUE1 + *self == RtcAtim0::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM0_A::VALUE2 + *self == RtcAtim0::Value2 } } -#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status"] -pub type RTC_ATIM1_R = crate::BitReader; #[doc = "RTC ATIM1 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_ATIM1_A { +pub enum RtcAtim1 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_ATIM1_A) -> Self { + fn from(variant: RtcAtim1) -> Self { variant as u8 != 0 } } -impl RTC_ATIM1_R { +#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status"] +pub type RtcAtim1R = crate::BitReader; +impl RtcAtim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_ATIM1_A { + pub const fn variant(&self) -> RtcAtim1 { match self.bits { - false => RTC_ATIM1_A::VALUE1, - true => RTC_ATIM1_A::VALUE2, + false => RtcAtim1::Value1, + true => RtcAtim1::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_ATIM1_A::VALUE1 + *self == RtcAtim1::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_ATIM1_A::VALUE2 + *self == RtcAtim1::Value2 } } -#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Status"] -pub type RTC_TIM0_R = crate::BitReader; #[doc = "RTC TIM0 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM0_A { +pub enum RtcTim0 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM0_A) -> Self { + fn from(variant: RtcTim0) -> Self { variant as u8 != 0 } } -impl RTC_TIM0_R { +#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Status"] +pub type RtcTim0R = crate::BitReader; +impl RtcTim0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM0_A { + pub const fn variant(&self) -> RtcTim0 { match self.bits { - false => RTC_TIM0_A::VALUE1, - true => RTC_TIM0_A::VALUE2, + false => RtcTim0::Value1, + true => RtcTim0::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM0_A::VALUE1 + *self == RtcTim0::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM0_A::VALUE2 + *self == RtcTim0::Value2 } } -#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status"] -pub type RTC_TIM1_R = crate::BitReader; #[doc = "RTC TIM1 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RTC_TIM1_A { +pub enum RtcTim1 { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RTC_TIM1_A) -> Self { + fn from(variant: RtcTim1) -> Self { variant as u8 != 0 } } -impl RTC_TIM1_R { +#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status"] +pub type RtcTim1R = crate::BitReader; +impl RtcTim1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RTC_TIM1_A { + pub const fn variant(&self) -> RtcTim1 { match self.bits { - false => RTC_TIM1_A::VALUE1, - true => RTC_TIM1_A::VALUE2, + false => RtcTim1::Value1, + true => RtcTim1::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RTC_TIM1_A::VALUE1 + *self == RtcTim1::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RTC_TIM1_A::VALUE2 + *self == RtcTim1::Value2 } } -#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status"] -pub type RMX_R = crate::BitReader; #[doc = "Retention Memory Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RMX_A { +pub enum Rmx { #[doc = "0: Not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Update completed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RMX_A) -> Self { + fn from(variant: Rmx) -> Self { variant as u8 != 0 } } -impl RMX_R { +#[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status"] +pub type RmxR = crate::BitReader; +impl RmxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RMX_A { + pub const fn variant(&self) -> Rmx { match self.bits { - false => RMX_A::VALUE1, - true => RMX_A::VALUE2, + false => Rmx::Value1, + true => Rmx::Value2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RMX_A::VALUE1 + *self == Rmx::Value1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RMX_A::VALUE2 + *self == Rmx::Value2 } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Status"] #[inline(always)] - pub fn prwarn(&self) -> PRWARN_R { - PRWARN_R::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PrwarnR { + PrwarnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Status"] #[inline(always)] - pub fn pi(&self) -> PI_R { - PI_R::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PiR { + PiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Alarm Interrupt Status"] #[inline(always)] - pub fn ai(&self) -> AI_R { - AI_R::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AiR { + AiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Status"] #[inline(always)] - pub fn dlrovr(&self) -> DLROVR_R { - DLROVR_R::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DlrovrR { + DlrovrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Status"] #[inline(always)] - pub fn hdclr(&self) -> HDCLR_R { - HDCLR_R::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HdclrR { + HdclrR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Status"] #[inline(always)] - pub fn hdset(&self) -> HDSET_R { - HDSET_R::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HdsetR { + HdsetR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Status"] #[inline(always)] - pub fn hdcr(&self) -> HDCR_R { - HDCR_R::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HdcrR { + HdcrR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Status"] #[inline(always)] - pub fn oscsictrl(&self) -> OSCSICTRL_R { - OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OscsictrlR { + OscsictrlR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Status"] #[inline(always)] - pub fn osculctrl(&self) -> OSCULCTRL_R { - OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OsculctrlR { + OsculctrlR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Status"] #[inline(always)] - pub fn rtc_ctr(&self) -> RTC_CTR_R { - RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RtcCtrR { + RtcCtrR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_atim0(&self) -> RTC_ATIM0_R { - RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RtcAtim0R { + RtcAtim0R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_atim1(&self) -> RTC_ATIM1_R { - RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RtcAtim1R { + RtcAtim1R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RTC_TIM0_R { - RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RtcTim0R { + RtcTim0R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_tim1(&self) -> RTC_TIM1_R { - RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RtcTim1R { + RtcTim1R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Status"] #[inline(always)] - pub fn rmx(&self) -> RMX_R { - RMX_R::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RmxR { + RmxR::new(((self.bits >> 29) & 1) != 0) } } #[doc = "SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRSTAT_SPEC; -impl crate::RegisterSpec for SRSTAT_SPEC { +pub struct SrstatSpec; +impl crate::RegisterSpec for SrstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`srstat::R`](R) reader structure"] -impl crate::Readable for SRSTAT_SPEC {} +impl crate::Readable for SrstatSpec {} #[doc = "`reset()` method sets SRSTAT to value 0"] -impl crate::Resettable for SRSTAT_SPEC { +impl crate::Resettable for SrstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_osc.rs b/src/scu_osc.rs index 297ee1e9..db54af4c 100644 --- a/src/scu_osc.rs +++ b/src/scu_osc.rs @@ -1,40 +1,43 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - oschpstat: OSCHPSTAT, - oschpctrl: OSCHPCTRL, + oschpstat: Oschpstat, + oschpctrl: Oschpctrl, _reserved2: [u8; 0x04], - clkcalconst: CLKCALCONST, + clkcalconst: Clkcalconst, } impl RegisterBlock { #[doc = "0x00 - OSC_HP Status Register"] #[inline(always)] - pub const fn oschpstat(&self) -> &OSCHPSTAT { + pub const fn oschpstat(&self) -> &Oschpstat { &self.oschpstat } #[doc = "0x04 - OSC_HP Control Register"] #[inline(always)] - pub const fn oschpctrl(&self) -> &OSCHPCTRL { + pub const fn oschpctrl(&self) -> &Oschpctrl { &self.oschpctrl } #[doc = "0x0c - Clock Calibration Constant Register"] #[inline(always)] - pub const fn clkcalconst(&self) -> &CLKCALCONST { + pub const fn clkcalconst(&self) -> &Clkcalconst { &self.clkcalconst } } #[doc = "OSCHPSTAT (r) register accessor: OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpstat`] module"] -pub type OSCHPSTAT = crate::Reg; +#[doc(alias = "OSCHPSTAT")] +pub type Oschpstat = crate::Reg; #[doc = "OSC_HP Status Register"] pub mod oschpstat; #[doc = "OSCHPCTRL (rw) register accessor: OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpctrl`] module"] -pub type OSCHPCTRL = crate::Reg; +#[doc(alias = "OSCHPCTRL")] +pub type Oschpctrl = crate::Reg; #[doc = "OSC_HP Control Register"] pub mod oschpctrl; #[doc = "CLKCALCONST (rw) register accessor: Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkcalconst`] module"] -pub type CLKCALCONST = crate::Reg; +#[doc(alias = "CLKCALCONST")] +pub type Clkcalconst = crate::Reg; #[doc = "Clock Calibration Constant Register"] pub mod clkcalconst; diff --git a/src/scu_osc/clkcalconst.rs b/src/scu_osc/clkcalconst.rs index 8f6d3588..75e330f5 100644 --- a/src/scu_osc/clkcalconst.rs +++ b/src/scu_osc/clkcalconst.rs @@ -1,49 +1,40 @@ #[doc = "Register `CLKCALCONST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLKCALCONST` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CALIBCONST` reader - Clock Calibration Constant Value"] -pub type CALIBCONST_R = crate::FieldReader; +pub type CalibconstR = crate::FieldReader; #[doc = "Field `CALIBCONST` writer - Clock Calibration Constant Value"] -pub type CALIBCONST_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CalibconstW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Clock Calibration Constant Value"] #[inline(always)] - pub fn calibconst(&self) -> CALIBCONST_R { - CALIBCONST_R::new((self.bits & 0x0f) as u8) + pub fn calibconst(&self) -> CalibconstR { + CalibconstR::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Clock Calibration Constant Value"] #[inline(always)] #[must_use] - pub fn calibconst(&mut self) -> CALIBCONST_W { - CALIBCONST_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn calibconst(&mut self) -> CalibconstW { + CalibconstW::new(self, 0) } } #[doc = "Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKCALCONST_SPEC; -impl crate::RegisterSpec for CLKCALCONST_SPEC { +pub struct ClkcalconstSpec; +impl crate::RegisterSpec for ClkcalconstSpec { type Ux = u32; } #[doc = "`read()` method returns [`clkcalconst::R`](R) reader structure"] -impl crate::Readable for CLKCALCONST_SPEC {} +impl crate::Readable for ClkcalconstSpec {} #[doc = "`write(|w| ..)` method takes [`clkcalconst::W`](W) writer structure"] -impl crate::Writable for CLKCALCONST_SPEC { +impl crate::Writable for ClkcalconstSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKCALCONST to value 0"] -impl crate::Resettable for CLKCALCONST_SPEC { +impl crate::Resettable for ClkcalconstSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_osc/oschpctrl.rs b/src/scu_osc/oschpctrl.rs index 6ce53e7d..545e334b 100644 --- a/src/scu_osc/oschpctrl.rs +++ b/src/scu_osc/oschpctrl.rs @@ -1,173 +1,173 @@ #[doc = "Register `OSCHPCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCHPCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `X1DEN` reader - XTAL1 Data Enable"] -pub type X1DEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "XTAL1 Data Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum X1DEN_A { +pub enum X1den { #[doc = "0: Bit X1D is not updated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit X1D can be updated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: X1DEN_A) -> Self { + fn from(variant: X1den) -> Self { variant as u8 != 0 } } -impl X1DEN_R { +#[doc = "Field `X1DEN` reader - XTAL1 Data Enable"] +pub type X1denR = crate::BitReader; +impl X1denR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> X1DEN_A { + pub const fn variant(&self) -> X1den { match self.bits { - false => X1DEN_A::VALUE1, - true => X1DEN_A::VALUE2, + false => X1den::Value1, + true => X1den::Value2, } } #[doc = "Bit X1D is not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == X1DEN_A::VALUE1 + *self == X1den::Value1 } #[doc = "Bit X1D can be updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == X1DEN_A::VALUE2 + *self == X1den::Value2 } } #[doc = "Field `X1DEN` writer - XTAL1 Data Enable"] -pub type X1DEN_W<'a, REG> = crate::BitWriter<'a, REG, X1DEN_A>; -impl<'a, REG> X1DEN_W<'a, REG> +pub type X1denW<'a, REG> = crate::BitWriter<'a, REG, X1den>; +impl<'a, REG> X1denW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit X1D is not updated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(X1DEN_A::VALUE1) + self.variant(X1den::Value1) } #[doc = "Bit X1D can be updated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(X1DEN_A::VALUE2) + self.variant(X1den::Value2) } } -#[doc = "Field `SHBY` reader - Shaper Bypass"] -pub type SHBY_R = crate::BitReader; #[doc = "Shaper Bypass\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SHBY_A { +pub enum Shby { #[doc = "0: The shaper is not bypassed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The shaper is bypassed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SHBY_A) -> Self { + fn from(variant: Shby) -> Self { variant as u8 != 0 } } -impl SHBY_R { +#[doc = "Field `SHBY` reader - Shaper Bypass"] +pub type ShbyR = crate::BitReader; +impl ShbyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SHBY_A { + pub const fn variant(&self) -> Shby { match self.bits { - false => SHBY_A::VALUE1, - true => SHBY_A::VALUE2, + false => Shby::Value1, + true => Shby::Value2, } } #[doc = "The shaper is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SHBY_A::VALUE1 + *self == Shby::Value1 } #[doc = "The shaper is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SHBY_A::VALUE2 + *self == Shby::Value2 } } #[doc = "Field `SHBY` writer - Shaper Bypass"] -pub type SHBY_W<'a, REG> = crate::BitWriter<'a, REG, SHBY_A>; -impl<'a, REG> SHBY_W<'a, REG> +pub type ShbyW<'a, REG> = crate::BitWriter<'a, REG, Shby>; +impl<'a, REG> ShbyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The shaper is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SHBY_A::VALUE1) + self.variant(Shby::Value1) } #[doc = "The shaper is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SHBY_A::VALUE2) + self.variant(Shby::Value2) } } -#[doc = "Field `GAINSEL` reader - Oscillator Gain Selection"] -pub type GAINSEL_R = crate::FieldReader; #[doc = "Oscillator Gain Selection\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum GAINSEL_A { +pub enum Gainsel { #[doc = "0: The gain control is configured for frequencies from 4 MHz to 8 MHz"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The gain control is configured for frequencies from 4 MHz to 16 MHz"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The gain control is configured for frequencies from 4 MHz to 20 MHz"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The gain control is configured for frequencies from 4 MHz to 25 MHz"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: GAINSEL_A) -> Self { + fn from(variant: Gainsel) -> Self { variant as _ } } -impl crate::FieldSpec for GAINSEL_A { +impl crate::FieldSpec for Gainsel { type Ux = u8; } -impl GAINSEL_R { +#[doc = "Field `GAINSEL` reader - Oscillator Gain Selection"] +pub type GainselR = crate::FieldReader; +impl GainselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GAINSEL_A { + pub const fn variant(&self) -> Gainsel { match self.bits { - 0 => GAINSEL_A::VALUE1, - 1 => GAINSEL_A::VALUE2, - 2 => GAINSEL_A::VALUE3, - 3 => GAINSEL_A::VALUE4, + 0 => Gainsel::Value1, + 1 => Gainsel::Value2, + 2 => Gainsel::Value3, + 3 => Gainsel::Value4, _ => unreachable!(), } } #[doc = "The gain control is configured for frequencies from 4 MHz to 8 MHz"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GAINSEL_A::VALUE1 + *self == Gainsel::Value1 } #[doc = "The gain control is configured for frequencies from 4 MHz to 16 MHz"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GAINSEL_A::VALUE2 + *self == Gainsel::Value2 } #[doc = "The gain control is configured for frequencies from 4 MHz to 20 MHz"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == GAINSEL_A::VALUE3 + *self == Gainsel::Value3 } #[doc = "The gain control is configured for frequencies from 4 MHz to 25 MHz"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == GAINSEL_A::VALUE4 + *self == Gainsel::Value4 } } #[doc = "Field `GAINSEL` writer - Oscillator Gain Selection"] -pub type GAINSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, GAINSEL_A>; -impl<'a, REG> GAINSEL_W<'a, REG> +pub type GainselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Gainsel>; +impl<'a, REG> GainselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,84 +175,84 @@ where #[doc = "The gain control is configured for frequencies from 4 MHz to 8 MHz"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GAINSEL_A::VALUE1) + self.variant(Gainsel::Value1) } #[doc = "The gain control is configured for frequencies from 4 MHz to 16 MHz"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GAINSEL_A::VALUE2) + self.variant(Gainsel::Value2) } #[doc = "The gain control is configured for frequencies from 4 MHz to 20 MHz"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(GAINSEL_A::VALUE3) + self.variant(Gainsel::Value3) } #[doc = "The gain control is configured for frequencies from 4 MHz to 25 MHz"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(GAINSEL_A::VALUE4) + self.variant(Gainsel::Value4) } } -#[doc = "Field `MODE` reader - Oscillator Mode"] -pub type MODE_R = crate::FieldReader; #[doc = "Oscillator Mode\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: OSC is disabled. The oscillator Power-Saving Mode is not entered."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: External Input Clock Mode and the oscillator Power-Saving Mode is entered"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: OSC is disabled. The oscillator Power-Saving Mode is entered."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl crate::FieldSpec for MODE_A { +impl crate::FieldSpec for Mode { type Ux = u8; } -impl MODE_R { +#[doc = "Field `MODE` reader - Oscillator Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MODE_A { + pub const fn variant(&self) -> Mode { match self.bits { - 0 => MODE_A::VALUE1, - 1 => MODE_A::VALUE2, - 2 => MODE_A::VALUE3, - 3 => MODE_A::VALUE4, + 0 => Mode::Value1, + 1 => Mode::Value2, + 2 => Mode::Value3, + 3 => Mode::Value4, _ => unreachable!(), } } #[doc = "External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODE_A::VALUE1 + *self == Mode::Value1 } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODE_A::VALUE2 + *self == Mode::Value2 } #[doc = "External Input Clock Mode and the oscillator Power-Saving Mode is entered"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MODE_A::VALUE3 + *self == Mode::Value3 } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is entered."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MODE_A::VALUE4 + *self == Mode::Value4 } } #[doc = "Field `MODE` writer - Oscillator Mode"] -pub type MODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MODE_A>; -impl<'a, REG> MODE_W<'a, REG> +pub type ModeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Mode>; +impl<'a, REG> ModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,110 +260,101 @@ where #[doc = "External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE1) + self.variant(Mode::Value1) } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE2) + self.variant(Mode::Value2) } #[doc = "External Input Clock Mode and the oscillator Power-Saving Mode is entered"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE3) + self.variant(Mode::Value3) } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is entered."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE4) + self.variant(Mode::Value4) } } #[doc = "Field `OSCVAL` reader - OSC Frequency Value"] -pub type OSCVAL_R = crate::FieldReader; +pub type OscvalR = crate::FieldReader; #[doc = "Field `OSCVAL` writer - OSC Frequency Value"] -pub type OSCVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type OscvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - XTAL1 Data Enable"] #[inline(always)] - pub fn x1den(&self) -> X1DEN_R { - X1DEN_R::new((self.bits & 1) != 0) + pub fn x1den(&self) -> X1denR { + X1denR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Shaper Bypass"] #[inline(always)] - pub fn shby(&self) -> SHBY_R { - SHBY_R::new(((self.bits >> 1) & 1) != 0) + pub fn shby(&self) -> ShbyR { + ShbyR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:3 - Oscillator Gain Selection"] #[inline(always)] - pub fn gainsel(&self) -> GAINSEL_R { - GAINSEL_R::new(((self.bits >> 2) & 3) as u8) + pub fn gainsel(&self) -> GainselR { + GainselR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 16:19 - OSC Frequency Value"] #[inline(always)] - pub fn oscval(&self) -> OSCVAL_R { - OSCVAL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn oscval(&self) -> OscvalR { + OscvalR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - XTAL1 Data Enable"] #[inline(always)] #[must_use] - pub fn x1den(&mut self) -> X1DEN_W { - X1DEN_W::new(self, 0) + pub fn x1den(&mut self) -> X1denW { + X1denW::new(self, 0) } #[doc = "Bit 1 - Shaper Bypass"] #[inline(always)] #[must_use] - pub fn shby(&mut self) -> SHBY_W { - SHBY_W::new(self, 1) + pub fn shby(&mut self) -> ShbyW { + ShbyW::new(self, 1) } #[doc = "Bits 2:3 - Oscillator Gain Selection"] #[inline(always)] #[must_use] - pub fn gainsel(&mut self) -> GAINSEL_W { - GAINSEL_W::new(self, 2) + pub fn gainsel(&mut self) -> GainselW { + GainselW::new(self, 2) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W { - MODE_W::new(self, 4) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 4) } #[doc = "Bits 16:19 - OSC Frequency Value"] #[inline(always)] #[must_use] - pub fn oscval(&mut self) -> OSCVAL_W { - OSCVAL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn oscval(&mut self) -> OscvalW { + OscvalW::new(self, 16) } } #[doc = "OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OSCHPCTRL_SPEC; -impl crate::RegisterSpec for OSCHPCTRL_SPEC { +pub struct OschpctrlSpec; +impl crate::RegisterSpec for OschpctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`oschpctrl::R`](R) reader structure"] -impl crate::Readable for OSCHPCTRL_SPEC {} +impl crate::Readable for OschpctrlSpec {} #[doc = "`write(|w| ..)` method takes [`oschpctrl::W`](W) writer structure"] -impl crate::Writable for OSCHPCTRL_SPEC { +impl crate::Writable for OschpctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCHPCTRL to value 0x3c"] -impl crate::Resettable for OSCHPCTRL_SPEC { +impl crate::Resettable for OschpctrlSpec { const RESET_VALUE: u32 = 0x3c; } diff --git a/src/scu_osc/oschpstat.rs b/src/scu_osc/oschpstat.rs index 62d71bc0..bf605cf6 100644 --- a/src/scu_osc/oschpstat.rs +++ b/src/scu_osc/oschpstat.rs @@ -1,22 +1,22 @@ #[doc = "Register `OSCHPSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `X1D` reader - XTAL1 Data Value"] -pub type X1D_R = crate::BitReader; +pub type X1dR = crate::BitReader; impl R { #[doc = "Bit 0 - XTAL1 Data Value"] #[inline(always)] - pub fn x1d(&self) -> X1D_R { - X1D_R::new((self.bits & 1) != 0) + pub fn x1d(&self) -> X1dR { + X1dR::new((self.bits & 1) != 0) } } #[doc = "OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OSCHPSTAT_SPEC; -impl crate::RegisterSpec for OSCHPSTAT_SPEC { +pub struct OschpstatSpec; +impl crate::RegisterSpec for OschpstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`oschpstat::R`](R) reader structure"] -impl crate::Readable for OSCHPSTAT_SPEC {} +impl crate::Readable for OschpstatSpec {} #[doc = "`reset()` method sets OSCHPSTAT to value 0"] -impl crate::Resettable for OSCHPSTAT_SPEC { +impl crate::Resettable for OschpstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity.rs b/src/scu_parity.rs index 23dc920e..aaa7e7c9 100644 --- a/src/scu_parity.rs +++ b/src/scu_parity.rs @@ -1,84 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - peen: PEEN, - mchkcon: MCHKCON, - pete: PETE, - persten: PERSTEN, + peen: Peen, + mchkcon: Mchkcon, + pete: Pete, + persten: Persten, _reserved4: [u8; 0x04], - peflag: PEFLAG, - pmtpr: PMTPR, - pmtsr: PMTSR, + peflag: Peflag, + pmtpr: Pmtpr, + pmtsr: Pmtsr, } impl RegisterBlock { #[doc = "0x00 - Parity Error Enable Register"] #[inline(always)] - pub const fn peen(&self) -> &PEEN { + pub const fn peen(&self) -> &Peen { &self.peen } #[doc = "0x04 - Memory Checking Control Register"] #[inline(always)] - pub const fn mchkcon(&self) -> &MCHKCON { + pub const fn mchkcon(&self) -> &Mchkcon { &self.mchkcon } #[doc = "0x08 - Parity Error Trap Enable Register"] #[inline(always)] - pub const fn pete(&self) -> &PETE { + pub const fn pete(&self) -> &Pete { &self.pete } #[doc = "0x0c - Parity Error Reset Enable Register"] #[inline(always)] - pub const fn persten(&self) -> &PERSTEN { + pub const fn persten(&self) -> &Persten { &self.persten } #[doc = "0x14 - Parity Error Flag Register"] #[inline(always)] - pub const fn peflag(&self) -> &PEFLAG { + pub const fn peflag(&self) -> &Peflag { &self.peflag } #[doc = "0x18 - Parity Memory Test Pattern Register"] #[inline(always)] - pub const fn pmtpr(&self) -> &PMTPR { + pub const fn pmtpr(&self) -> &Pmtpr { &self.pmtpr } #[doc = "0x1c - Parity Memory Test Select Register"] #[inline(always)] - pub const fn pmtsr(&self) -> &PMTSR { + pub const fn pmtsr(&self) -> &Pmtsr { &self.pmtsr } } #[doc = "PEEN (rw) register accessor: Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peen`] module"] -pub type PEEN = crate::Reg; +#[doc(alias = "PEEN")] +pub type Peen = crate::Reg; #[doc = "Parity Error Enable Register"] pub mod peen; #[doc = "MCHKCON (rw) register accessor: Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mchkcon`] module"] -pub type MCHKCON = crate::Reg; +#[doc(alias = "MCHKCON")] +pub type Mchkcon = crate::Reg; #[doc = "Memory Checking Control Register"] pub mod mchkcon; #[doc = "PETE (rw) register accessor: Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pete`] module"] -pub type PETE = crate::Reg; +#[doc(alias = "PETE")] +pub type Pete = crate::Reg; #[doc = "Parity Error Trap Enable Register"] pub mod pete; #[doc = "PERSTEN (rw) register accessor: Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@persten`] module"] -pub type PERSTEN = crate::Reg; +#[doc(alias = "PERSTEN")] +pub type Persten = crate::Reg; #[doc = "Parity Error Reset Enable Register"] pub mod persten; #[doc = "PEFLAG (rw) register accessor: Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peflag`] module"] -pub type PEFLAG = crate::Reg; +#[doc(alias = "PEFLAG")] +pub type Peflag = crate::Reg; #[doc = "Parity Error Flag Register"] pub mod peflag; #[doc = "PMTPR (rw) register accessor: Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtpr`] module"] -pub type PMTPR = crate::Reg; +#[doc(alias = "PMTPR")] +pub type Pmtpr = crate::Reg; #[doc = "Parity Memory Test Pattern Register"] pub mod pmtpr; #[doc = "PMTSR (rw) register accessor: Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtsr`] module"] -pub type PMTSR = crate::Reg; +#[doc(alias = "PMTSR")] +pub type Pmtsr = crate::Reg; #[doc = "Parity Memory Test Select Register"] pub mod pmtsr; diff --git a/src/scu_parity/mchkcon.rs b/src/scu_parity/mchkcon.rs index 67b3e75b..4a6c346b 100644 --- a/src/scu_parity/mchkcon.rs +++ b/src/scu_parity/mchkcon.rs @@ -1,930 +1,921 @@ #[doc = "Register `MCHKCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCHKCON` writer"] -pub type W = crate::W; -#[doc = "Field `SELPS` reader - Select Memory Check for PSRAM"] -pub type SELPS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Select Memory Check for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELPS_A { +pub enum Selps { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELPS_A) -> Self { + fn from(variant: Selps) -> Self { variant as u8 != 0 } } -impl SELPS_R { +#[doc = "Field `SELPS` reader - Select Memory Check for PSRAM"] +pub type SelpsR = crate::BitReader; +impl SelpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELPS_A { + pub const fn variant(&self) -> Selps { match self.bits { - false => SELPS_A::VALUE1, - true => SELPS_A::VALUE2, + false => Selps::Value1, + true => Selps::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELPS_A::VALUE1 + *self == Selps::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELPS_A::VALUE2 + *self == Selps::Value2 } } #[doc = "Field `SELPS` writer - Select Memory Check for PSRAM"] -pub type SELPS_W<'a, REG> = crate::BitWriter<'a, REG, SELPS_A>; -impl<'a, REG> SELPS_W<'a, REG> +pub type SelpsW<'a, REG> = crate::BitWriter<'a, REG, Selps>; +impl<'a, REG> SelpsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELPS_A::VALUE1) + self.variant(Selps::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELPS_A::VALUE2) + self.variant(Selps::Value2) } } -#[doc = "Field `SELDS1` reader - Select Memory Check for DSRAM1"] -pub type SELDS1_R = crate::BitReader; #[doc = "Select Memory Check for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELDS1_A { +pub enum Selds1 { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELDS1_A) -> Self { + fn from(variant: Selds1) -> Self { variant as u8 != 0 } } -impl SELDS1_R { +#[doc = "Field `SELDS1` reader - Select Memory Check for DSRAM1"] +pub type Selds1R = crate::BitReader; +impl Selds1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELDS1_A { + pub const fn variant(&self) -> Selds1 { match self.bits { - false => SELDS1_A::VALUE1, - true => SELDS1_A::VALUE2, + false => Selds1::Value1, + true => Selds1::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELDS1_A::VALUE1 + *self == Selds1::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELDS1_A::VALUE2 + *self == Selds1::Value2 } } #[doc = "Field `SELDS1` writer - Select Memory Check for DSRAM1"] -pub type SELDS1_W<'a, REG> = crate::BitWriter<'a, REG, SELDS1_A>; -impl<'a, REG> SELDS1_W<'a, REG> +pub type Selds1W<'a, REG> = crate::BitWriter<'a, REG, Selds1>; +impl<'a, REG> Selds1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELDS1_A::VALUE1) + self.variant(Selds1::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELDS1_A::VALUE2) + self.variant(Selds1::Value2) } } -#[doc = "Field `SELDS2` reader - Select Memory Check for DSRAM2"] -pub type SELDS2_R = crate::BitReader; #[doc = "Select Memory Check for DSRAM2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELDS2_A { +pub enum Selds2 { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELDS2_A) -> Self { + fn from(variant: Selds2) -> Self { variant as u8 != 0 } } -impl SELDS2_R { +#[doc = "Field `SELDS2` reader - Select Memory Check for DSRAM2"] +pub type Selds2R = crate::BitReader; +impl Selds2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELDS2_A { + pub const fn variant(&self) -> Selds2 { match self.bits { - false => SELDS2_A::VALUE1, - true => SELDS2_A::VALUE2, + false => Selds2::Value1, + true => Selds2::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELDS2_A::VALUE1 + *self == Selds2::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELDS2_A::VALUE2 + *self == Selds2::Value2 } } #[doc = "Field `SELDS2` writer - Select Memory Check for DSRAM2"] -pub type SELDS2_W<'a, REG> = crate::BitWriter<'a, REG, SELDS2_A>; -impl<'a, REG> SELDS2_W<'a, REG> +pub type Selds2W<'a, REG> = crate::BitWriter<'a, REG, Selds2>; +impl<'a, REG> Selds2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELDS2_A::VALUE1) + self.variant(Selds2::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELDS2_A::VALUE2) + self.variant(Selds2::Value2) } } -#[doc = "Field `USIC0DRA` reader - Select Memory Check for USIC0"] -pub type USIC0DRA_R = crate::BitReader; #[doc = "Select Memory Check for USIC0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0DRA_A { +pub enum Usic0dra { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0DRA_A) -> Self { + fn from(variant: Usic0dra) -> Self { variant as u8 != 0 } } -impl USIC0DRA_R { +#[doc = "Field `USIC0DRA` reader - Select Memory Check for USIC0"] +pub type Usic0draR = crate::BitReader; +impl Usic0draR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC0DRA_A { + pub const fn variant(&self) -> Usic0dra { match self.bits { - false => USIC0DRA_A::VALUE1, - true => USIC0DRA_A::VALUE2, + false => Usic0dra::Value1, + true => Usic0dra::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC0DRA_A::VALUE1 + *self == Usic0dra::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC0DRA_A::VALUE2 + *self == Usic0dra::Value2 } } #[doc = "Field `USIC0DRA` writer - Select Memory Check for USIC0"] -pub type USIC0DRA_W<'a, REG> = crate::BitWriter<'a, REG, USIC0DRA_A>; -impl<'a, REG> USIC0DRA_W<'a, REG> +pub type Usic0draW<'a, REG> = crate::BitWriter<'a, REG, Usic0dra>; +impl<'a, REG> Usic0draW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC0DRA_A::VALUE1) + self.variant(Usic0dra::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC0DRA_A::VALUE2) + self.variant(Usic0dra::Value2) } } -#[doc = "Field `USIC1DRA` reader - Select Memory Check for USIC1"] -pub type USIC1DRA_R = crate::BitReader; #[doc = "Select Memory Check for USIC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1DRA_A { +pub enum Usic1dra { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1DRA_A) -> Self { + fn from(variant: Usic1dra) -> Self { variant as u8 != 0 } } -impl USIC1DRA_R { +#[doc = "Field `USIC1DRA` reader - Select Memory Check for USIC1"] +pub type Usic1draR = crate::BitReader; +impl Usic1draR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC1DRA_A { + pub const fn variant(&self) -> Usic1dra { match self.bits { - false => USIC1DRA_A::VALUE1, - true => USIC1DRA_A::VALUE2, + false => Usic1dra::Value1, + true => Usic1dra::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC1DRA_A::VALUE1 + *self == Usic1dra::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC1DRA_A::VALUE2 + *self == Usic1dra::Value2 } } #[doc = "Field `USIC1DRA` writer - Select Memory Check for USIC1"] -pub type USIC1DRA_W<'a, REG> = crate::BitWriter<'a, REG, USIC1DRA_A>; -impl<'a, REG> USIC1DRA_W<'a, REG> +pub type Usic1draW<'a, REG> = crate::BitWriter<'a, REG, Usic1dra>; +impl<'a, REG> Usic1draW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC1DRA_A::VALUE1) + self.variant(Usic1dra::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC1DRA_A::VALUE2) + self.variant(Usic1dra::Value2) } } -#[doc = "Field `USIC2DRA` reader - Select Memory Check for USIC2"] -pub type USIC2DRA_R = crate::BitReader; #[doc = "Select Memory Check for USIC2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2DRA_A { +pub enum Usic2dra { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2DRA_A) -> Self { + fn from(variant: Usic2dra) -> Self { variant as u8 != 0 } } -impl USIC2DRA_R { +#[doc = "Field `USIC2DRA` reader - Select Memory Check for USIC2"] +pub type Usic2draR = crate::BitReader; +impl Usic2draR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC2DRA_A { + pub const fn variant(&self) -> Usic2dra { match self.bits { - false => USIC2DRA_A::VALUE1, - true => USIC2DRA_A::VALUE2, + false => Usic2dra::Value1, + true => Usic2dra::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC2DRA_A::VALUE1 + *self == Usic2dra::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC2DRA_A::VALUE2 + *self == Usic2dra::Value2 } } #[doc = "Field `USIC2DRA` writer - Select Memory Check for USIC2"] -pub type USIC2DRA_W<'a, REG> = crate::BitWriter<'a, REG, USIC2DRA_A>; -impl<'a, REG> USIC2DRA_W<'a, REG> +pub type Usic2draW<'a, REG> = crate::BitWriter<'a, REG, Usic2dra>; +impl<'a, REG> Usic2draW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC2DRA_A::VALUE1) + self.variant(Usic2dra::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC2DRA_A::VALUE2) + self.variant(Usic2dra::Value2) } } -#[doc = "Field `MCANDRA` reader - Select Memory Check for MultiCAN"] -pub type MCANDRA_R = crate::BitReader; #[doc = "Select Memory Check for MultiCAN\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCANDRA_A { +pub enum Mcandra { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCANDRA_A) -> Self { + fn from(variant: Mcandra) -> Self { variant as u8 != 0 } } -impl MCANDRA_R { +#[doc = "Field `MCANDRA` reader - Select Memory Check for MultiCAN"] +pub type McandraR = crate::BitReader; +impl McandraR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCANDRA_A { + pub const fn variant(&self) -> Mcandra { match self.bits { - false => MCANDRA_A::VALUE1, - true => MCANDRA_A::VALUE2, + false => Mcandra::Value1, + true => Mcandra::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCANDRA_A::VALUE1 + *self == Mcandra::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCANDRA_A::VALUE2 + *self == Mcandra::Value2 } } #[doc = "Field `MCANDRA` writer - Select Memory Check for MultiCAN"] -pub type MCANDRA_W<'a, REG> = crate::BitWriter<'a, REG, MCANDRA_A>; -impl<'a, REG> MCANDRA_W<'a, REG> +pub type McandraW<'a, REG> = crate::BitWriter<'a, REG, Mcandra>; +impl<'a, REG> McandraW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCANDRA_A::VALUE1) + self.variant(Mcandra::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCANDRA_A::VALUE2) + self.variant(Mcandra::Value2) } } -#[doc = "Field `PPRFDRA` reader - Select Memory Check for PMU"] -pub type PPRFDRA_R = crate::BitReader; #[doc = "Select Memory Check for PMU\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPRFDRA_A { +pub enum Pprfdra { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPRFDRA_A) -> Self { + fn from(variant: Pprfdra) -> Self { variant as u8 != 0 } } -impl PPRFDRA_R { +#[doc = "Field `PPRFDRA` reader - Select Memory Check for PMU"] +pub type PprfdraR = crate::BitReader; +impl PprfdraR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPRFDRA_A { + pub const fn variant(&self) -> Pprfdra { match self.bits { - false => PPRFDRA_A::VALUE1, - true => PPRFDRA_A::VALUE2, + false => Pprfdra::Value1, + true => Pprfdra::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPRFDRA_A::VALUE1 + *self == Pprfdra::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPRFDRA_A::VALUE2 + *self == Pprfdra::Value2 } } #[doc = "Field `PPRFDRA` writer - Select Memory Check for PMU"] -pub type PPRFDRA_W<'a, REG> = crate::BitWriter<'a, REG, PPRFDRA_A>; -impl<'a, REG> PPRFDRA_W<'a, REG> +pub type PprfdraW<'a, REG> = crate::BitWriter<'a, REG, Pprfdra>; +impl<'a, REG> PprfdraW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPRFDRA_A::VALUE1) + self.variant(Pprfdra::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPRFDRA_A::VALUE2) + self.variant(Pprfdra::Value2) } } -#[doc = "Field `SELUSB` reader - Select Memory Check for USB SRAM"] -pub type SELUSB_R = crate::BitReader; #[doc = "Select Memory Check for USB SRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELUSB_A { +pub enum Selusb { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELUSB_A) -> Self { + fn from(variant: Selusb) -> Self { variant as u8 != 0 } } -impl SELUSB_R { +#[doc = "Field `SELUSB` reader - Select Memory Check for USB SRAM"] +pub type SelusbR = crate::BitReader; +impl SelusbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELUSB_A { + pub const fn variant(&self) -> Selusb { match self.bits { - false => SELUSB_A::VALUE1, - true => SELUSB_A::VALUE2, + false => Selusb::Value1, + true => Selusb::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELUSB_A::VALUE1 + *self == Selusb::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELUSB_A::VALUE2 + *self == Selusb::Value2 } } #[doc = "Field `SELUSB` writer - Select Memory Check for USB SRAM"] -pub type SELUSB_W<'a, REG> = crate::BitWriter<'a, REG, SELUSB_A>; -impl<'a, REG> SELUSB_W<'a, REG> +pub type SelusbW<'a, REG> = crate::BitWriter<'a, REG, Selusb>; +impl<'a, REG> SelusbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELUSB_A::VALUE1) + self.variant(Selusb::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELUSB_A::VALUE2) + self.variant(Selusb::Value2) } } -#[doc = "Field `SELETH0TX` reader - Select Memory Check for ETH0 TX SRAM"] -pub type SELETH0TX_R = crate::BitReader; #[doc = "Select Memory Check for ETH0 TX SRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELETH0TX_A { +pub enum Seleth0tx { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELETH0TX_A) -> Self { + fn from(variant: Seleth0tx) -> Self { variant as u8 != 0 } } -impl SELETH0TX_R { +#[doc = "Field `SELETH0TX` reader - Select Memory Check for ETH0 TX SRAM"] +pub type Seleth0txR = crate::BitReader; +impl Seleth0txR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELETH0TX_A { + pub const fn variant(&self) -> Seleth0tx { match self.bits { - false => SELETH0TX_A::VALUE1, - true => SELETH0TX_A::VALUE2, + false => Seleth0tx::Value1, + true => Seleth0tx::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELETH0TX_A::VALUE1 + *self == Seleth0tx::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELETH0TX_A::VALUE2 + *self == Seleth0tx::Value2 } } #[doc = "Field `SELETH0TX` writer - Select Memory Check for ETH0 TX SRAM"] -pub type SELETH0TX_W<'a, REG> = crate::BitWriter<'a, REG, SELETH0TX_A>; -impl<'a, REG> SELETH0TX_W<'a, REG> +pub type Seleth0txW<'a, REG> = crate::BitWriter<'a, REG, Seleth0tx>; +impl<'a, REG> Seleth0txW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELETH0TX_A::VALUE1) + self.variant(Seleth0tx::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELETH0TX_A::VALUE2) + self.variant(Seleth0tx::Value2) } } -#[doc = "Field `SELETH0RX` reader - Select Memory Check for ETH0 RX SRAM"] -pub type SELETH0RX_R = crate::BitReader; #[doc = "Select Memory Check for ETH0 RX SRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELETH0RX_A { +pub enum Seleth0rx { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELETH0RX_A) -> Self { + fn from(variant: Seleth0rx) -> Self { variant as u8 != 0 } } -impl SELETH0RX_R { +#[doc = "Field `SELETH0RX` reader - Select Memory Check for ETH0 RX SRAM"] +pub type Seleth0rxR = crate::BitReader; +impl Seleth0rxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELETH0RX_A { + pub const fn variant(&self) -> Seleth0rx { match self.bits { - false => SELETH0RX_A::VALUE1, - true => SELETH0RX_A::VALUE2, + false => Seleth0rx::Value1, + true => Seleth0rx::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELETH0RX_A::VALUE1 + *self == Seleth0rx::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELETH0RX_A::VALUE2 + *self == Seleth0rx::Value2 } } #[doc = "Field `SELETH0RX` writer - Select Memory Check for ETH0 RX SRAM"] -pub type SELETH0RX_W<'a, REG> = crate::BitWriter<'a, REG, SELETH0RX_A>; -impl<'a, REG> SELETH0RX_W<'a, REG> +pub type Seleth0rxW<'a, REG> = crate::BitWriter<'a, REG, Seleth0rx>; +impl<'a, REG> Seleth0rxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELETH0RX_A::VALUE1) + self.variant(Seleth0rx::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELETH0RX_A::VALUE2) + self.variant(Seleth0rx::Value2) } } -#[doc = "Field `SELSD0` reader - Select Memory Check for SDMMC SRAM 0"] -pub type SELSD0_R = crate::BitReader; #[doc = "Select Memory Check for SDMMC SRAM 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELSD0_A { +pub enum Selsd0 { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELSD0_A) -> Self { + fn from(variant: Selsd0) -> Self { variant as u8 != 0 } } -impl SELSD0_R { +#[doc = "Field `SELSD0` reader - Select Memory Check for SDMMC SRAM 0"] +pub type Selsd0R = crate::BitReader; +impl Selsd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELSD0_A { + pub const fn variant(&self) -> Selsd0 { match self.bits { - false => SELSD0_A::VALUE1, - true => SELSD0_A::VALUE2, + false => Selsd0::Value1, + true => Selsd0::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELSD0_A::VALUE1 + *self == Selsd0::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELSD0_A::VALUE2 + *self == Selsd0::Value2 } } #[doc = "Field `SELSD0` writer - Select Memory Check for SDMMC SRAM 0"] -pub type SELSD0_W<'a, REG> = crate::BitWriter<'a, REG, SELSD0_A>; -impl<'a, REG> SELSD0_W<'a, REG> +pub type Selsd0W<'a, REG> = crate::BitWriter<'a, REG, Selsd0>; +impl<'a, REG> Selsd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELSD0_A::VALUE1) + self.variant(Selsd0::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELSD0_A::VALUE2) + self.variant(Selsd0::Value2) } } -#[doc = "Field `SELSD1` reader - Select Memory Check for SDMMC SRAM 1"] -pub type SELSD1_R = crate::BitReader; #[doc = "Select Memory Check for SDMMC SRAM 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELSD1_A { +pub enum Selsd1 { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELSD1_A) -> Self { + fn from(variant: Selsd1) -> Self { variant as u8 != 0 } } -impl SELSD1_R { +#[doc = "Field `SELSD1` reader - Select Memory Check for SDMMC SRAM 1"] +pub type Selsd1R = crate::BitReader; +impl Selsd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELSD1_A { + pub const fn variant(&self) -> Selsd1 { match self.bits { - false => SELSD1_A::VALUE1, - true => SELSD1_A::VALUE2, + false => Selsd1::Value1, + true => Selsd1::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELSD1_A::VALUE1 + *self == Selsd1::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELSD1_A::VALUE2 + *self == Selsd1::Value2 } } #[doc = "Field `SELSD1` writer - Select Memory Check for SDMMC SRAM 1"] -pub type SELSD1_W<'a, REG> = crate::BitWriter<'a, REG, SELSD1_A>; -impl<'a, REG> SELSD1_W<'a, REG> +pub type Selsd1W<'a, REG> = crate::BitWriter<'a, REG, Selsd1>; +impl<'a, REG> Selsd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELSD1_A::VALUE1) + self.variant(Selsd1::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELSD1_A::VALUE2) + self.variant(Selsd1::Value2) } } -#[doc = "Field `SELECAT0` reader - Select Memory Check for ECAT0 SRAM 1"] -pub type SELECAT0_R = crate::BitReader; #[doc = "Select Memory Check for ECAT0 SRAM 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELECAT0_A { +pub enum Selecat0 { #[doc = "0: Not selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELECAT0_A) -> Self { + fn from(variant: Selecat0) -> Self { variant as u8 != 0 } } -impl SELECAT0_R { +#[doc = "Field `SELECAT0` reader - Select Memory Check for ECAT0 SRAM 1"] +pub type Selecat0R = crate::BitReader; +impl Selecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELECAT0_A { + pub const fn variant(&self) -> Selecat0 { match self.bits { - false => SELECAT0_A::VALUE1, - true => SELECAT0_A::VALUE2, + false => Selecat0::Value1, + true => Selecat0::Value2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELECAT0_A::VALUE1 + *self == Selecat0::Value1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELECAT0_A::VALUE2 + *self == Selecat0::Value2 } } #[doc = "Field `SELECAT0` writer - Select Memory Check for ECAT0 SRAM 1"] -pub type SELECAT0_W<'a, REG> = crate::BitWriter<'a, REG, SELECAT0_A>; -impl<'a, REG> SELECAT0_W<'a, REG> +pub type Selecat0W<'a, REG> = crate::BitWriter<'a, REG, Selecat0>; +impl<'a, REG> Selecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELECAT0_A::VALUE1) + self.variant(Selecat0::Value1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELECAT0_A::VALUE2) + self.variant(Selecat0::Value2) } } impl R { #[doc = "Bit 0 - Select Memory Check for PSRAM"] #[inline(always)] - pub fn selps(&self) -> SELPS_R { - SELPS_R::new((self.bits & 1) != 0) + pub fn selps(&self) -> SelpsR { + SelpsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Memory Check for DSRAM1"] #[inline(always)] - pub fn selds1(&self) -> SELDS1_R { - SELDS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn selds1(&self) -> Selds1R { + Selds1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Select Memory Check for DSRAM2"] #[inline(always)] - pub fn selds2(&self) -> SELDS2_R { - SELDS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn selds2(&self) -> Selds2R { + Selds2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Select Memory Check for USIC0"] #[inline(always)] - pub fn usic0dra(&self) -> USIC0DRA_R { - USIC0DRA_R::new(((self.bits >> 8) & 1) != 0) + pub fn usic0dra(&self) -> Usic0draR { + Usic0draR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Select Memory Check for USIC1"] #[inline(always)] - pub fn usic1dra(&self) -> USIC1DRA_R { - USIC1DRA_R::new(((self.bits >> 9) & 1) != 0) + pub fn usic1dra(&self) -> Usic1draR { + Usic1draR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Select Memory Check for USIC2"] #[inline(always)] - pub fn usic2dra(&self) -> USIC2DRA_R { - USIC2DRA_R::new(((self.bits >> 10) & 1) != 0) + pub fn usic2dra(&self) -> Usic2draR { + Usic2draR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Select Memory Check for MultiCAN"] #[inline(always)] - pub fn mcandra(&self) -> MCANDRA_R { - MCANDRA_R::new(((self.bits >> 12) & 1) != 0) + pub fn mcandra(&self) -> McandraR { + McandraR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Select Memory Check for PMU"] #[inline(always)] - pub fn pprfdra(&self) -> PPRFDRA_R { - PPRFDRA_R::new(((self.bits >> 13) & 1) != 0) + pub fn pprfdra(&self) -> PprfdraR { + PprfdraR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Select Memory Check for USB SRAM"] #[inline(always)] - pub fn selusb(&self) -> SELUSB_R { - SELUSB_R::new(((self.bits >> 16) & 1) != 0) + pub fn selusb(&self) -> SelusbR { + SelusbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Select Memory Check for ETH0 TX SRAM"] #[inline(always)] - pub fn seleth0tx(&self) -> SELETH0TX_R { - SELETH0TX_R::new(((self.bits >> 17) & 1) != 0) + pub fn seleth0tx(&self) -> Seleth0txR { + Seleth0txR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Select Memory Check for ETH0 RX SRAM"] #[inline(always)] - pub fn seleth0rx(&self) -> SELETH0RX_R { - SELETH0RX_R::new(((self.bits >> 18) & 1) != 0) + pub fn seleth0rx(&self) -> Seleth0rxR { + Seleth0rxR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Select Memory Check for SDMMC SRAM 0"] #[inline(always)] - pub fn selsd0(&self) -> SELSD0_R { - SELSD0_R::new(((self.bits >> 19) & 1) != 0) + pub fn selsd0(&self) -> Selsd0R { + Selsd0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Select Memory Check for SDMMC SRAM 1"] #[inline(always)] - pub fn selsd1(&self) -> SELSD1_R { - SELSD1_R::new(((self.bits >> 20) & 1) != 0) + pub fn selsd1(&self) -> Selsd1R { + Selsd1R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Select Memory Check for ECAT0 SRAM 1"] #[inline(always)] - pub fn selecat0(&self) -> SELECAT0_R { - SELECAT0_R::new(((self.bits >> 24) & 1) != 0) + pub fn selecat0(&self) -> Selecat0R { + Selecat0R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Select Memory Check for PSRAM"] #[inline(always)] #[must_use] - pub fn selps(&mut self) -> SELPS_W { - SELPS_W::new(self, 0) + pub fn selps(&mut self) -> SelpsW { + SelpsW::new(self, 0) } #[doc = "Bit 1 - Select Memory Check for DSRAM1"] #[inline(always)] #[must_use] - pub fn selds1(&mut self) -> SELDS1_W { - SELDS1_W::new(self, 1) + pub fn selds1(&mut self) -> Selds1W { + Selds1W::new(self, 1) } #[doc = "Bit 2 - Select Memory Check for DSRAM2"] #[inline(always)] #[must_use] - pub fn selds2(&mut self) -> SELDS2_W { - SELDS2_W::new(self, 2) + pub fn selds2(&mut self) -> Selds2W { + Selds2W::new(self, 2) } #[doc = "Bit 8 - Select Memory Check for USIC0"] #[inline(always)] #[must_use] - pub fn usic0dra(&mut self) -> USIC0DRA_W { - USIC0DRA_W::new(self, 8) + pub fn usic0dra(&mut self) -> Usic0draW { + Usic0draW::new(self, 8) } #[doc = "Bit 9 - Select Memory Check for USIC1"] #[inline(always)] #[must_use] - pub fn usic1dra(&mut self) -> USIC1DRA_W { - USIC1DRA_W::new(self, 9) + pub fn usic1dra(&mut self) -> Usic1draW { + Usic1draW::new(self, 9) } #[doc = "Bit 10 - Select Memory Check for USIC2"] #[inline(always)] #[must_use] - pub fn usic2dra(&mut self) -> USIC2DRA_W { - USIC2DRA_W::new(self, 10) + pub fn usic2dra(&mut self) -> Usic2draW { + Usic2draW::new(self, 10) } #[doc = "Bit 12 - Select Memory Check for MultiCAN"] #[inline(always)] #[must_use] - pub fn mcandra(&mut self) -> MCANDRA_W { - MCANDRA_W::new(self, 12) + pub fn mcandra(&mut self) -> McandraW { + McandraW::new(self, 12) } #[doc = "Bit 13 - Select Memory Check for PMU"] #[inline(always)] #[must_use] - pub fn pprfdra(&mut self) -> PPRFDRA_W { - PPRFDRA_W::new(self, 13) + pub fn pprfdra(&mut self) -> PprfdraW { + PprfdraW::new(self, 13) } #[doc = "Bit 16 - Select Memory Check for USB SRAM"] #[inline(always)] #[must_use] - pub fn selusb(&mut self) -> SELUSB_W { - SELUSB_W::new(self, 16) + pub fn selusb(&mut self) -> SelusbW { + SelusbW::new(self, 16) } #[doc = "Bit 17 - Select Memory Check for ETH0 TX SRAM"] #[inline(always)] #[must_use] - pub fn seleth0tx(&mut self) -> SELETH0TX_W { - SELETH0TX_W::new(self, 17) + pub fn seleth0tx(&mut self) -> Seleth0txW { + Seleth0txW::new(self, 17) } #[doc = "Bit 18 - Select Memory Check for ETH0 RX SRAM"] #[inline(always)] #[must_use] - pub fn seleth0rx(&mut self) -> SELETH0RX_W { - SELETH0RX_W::new(self, 18) + pub fn seleth0rx(&mut self) -> Seleth0rxW { + Seleth0rxW::new(self, 18) } #[doc = "Bit 19 - Select Memory Check for SDMMC SRAM 0"] #[inline(always)] #[must_use] - pub fn selsd0(&mut self) -> SELSD0_W { - SELSD0_W::new(self, 19) + pub fn selsd0(&mut self) -> Selsd0W { + Selsd0W::new(self, 19) } #[doc = "Bit 20 - Select Memory Check for SDMMC SRAM 1"] #[inline(always)] #[must_use] - pub fn selsd1(&mut self) -> SELSD1_W { - SELSD1_W::new(self, 20) + pub fn selsd1(&mut self) -> Selsd1W { + Selsd1W::new(self, 20) } #[doc = "Bit 24 - Select Memory Check for ECAT0 SRAM 1"] #[inline(always)] #[must_use] - pub fn selecat0(&mut self) -> SELECAT0_W { - SELECAT0_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn selecat0(&mut self) -> Selecat0W { + Selecat0W::new(self, 24) } } #[doc = "Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MCHKCON_SPEC; -impl crate::RegisterSpec for MCHKCON_SPEC { +pub struct MchkconSpec; +impl crate::RegisterSpec for MchkconSpec { type Ux = u32; } #[doc = "`read()` method returns [`mchkcon::R`](R) reader structure"] -impl crate::Readable for MCHKCON_SPEC {} +impl crate::Readable for MchkconSpec {} #[doc = "`write(|w| ..)` method takes [`mchkcon::W`](W) writer structure"] -impl crate::Writable for MCHKCON_SPEC { +impl crate::Writable for MchkconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCHKCON to value 0"] -impl crate::Resettable for MCHKCON_SPEC { +impl crate::Resettable for MchkconSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/peen.rs b/src/scu_parity/peen.rs index 4f517a13..6aaeb7d0 100644 --- a/src/scu_parity/peen.rs +++ b/src/scu_parity/peen.rs @@ -1,930 +1,921 @@ #[doc = "Register `PEEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PEEN` writer"] -pub type W = crate::W; -#[doc = "Field `PEENPS` reader - Parity Error Enable for PSRAM"] -pub type PEENPS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Parity Error Enable for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENPS_A { +pub enum Peenps { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENPS_A) -> Self { + fn from(variant: Peenps) -> Self { variant as u8 != 0 } } -impl PEENPS_R { +#[doc = "Field `PEENPS` reader - Parity Error Enable for PSRAM"] +pub type PeenpsR = crate::BitReader; +impl PeenpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENPS_A { + pub const fn variant(&self) -> Peenps { match self.bits { - false => PEENPS_A::VALUE1, - true => PEENPS_A::VALUE2, + false => Peenps::Value1, + true => Peenps::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENPS_A::VALUE1 + *self == Peenps::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENPS_A::VALUE2 + *self == Peenps::Value2 } } #[doc = "Field `PEENPS` writer - Parity Error Enable for PSRAM"] -pub type PEENPS_W<'a, REG> = crate::BitWriter<'a, REG, PEENPS_A>; -impl<'a, REG> PEENPS_W<'a, REG> +pub type PeenpsW<'a, REG> = crate::BitWriter<'a, REG, Peenps>; +impl<'a, REG> PeenpsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENPS_A::VALUE1) + self.variant(Peenps::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENPS_A::VALUE2) + self.variant(Peenps::Value2) } } -#[doc = "Field `PEENDS1` reader - Parity Error Enable for DSRAM1"] -pub type PEENDS1_R = crate::BitReader; #[doc = "Parity Error Enable for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENDS1_A { +pub enum Peends1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENDS1_A) -> Self { + fn from(variant: Peends1) -> Self { variant as u8 != 0 } } -impl PEENDS1_R { +#[doc = "Field `PEENDS1` reader - Parity Error Enable for DSRAM1"] +pub type Peends1R = crate::BitReader; +impl Peends1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENDS1_A { + pub const fn variant(&self) -> Peends1 { match self.bits { - false => PEENDS1_A::VALUE1, - true => PEENDS1_A::VALUE2, + false => Peends1::Value1, + true => Peends1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENDS1_A::VALUE1 + *self == Peends1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENDS1_A::VALUE2 + *self == Peends1::Value2 } } #[doc = "Field `PEENDS1` writer - Parity Error Enable for DSRAM1"] -pub type PEENDS1_W<'a, REG> = crate::BitWriter<'a, REG, PEENDS1_A>; -impl<'a, REG> PEENDS1_W<'a, REG> +pub type Peends1W<'a, REG> = crate::BitWriter<'a, REG, Peends1>; +impl<'a, REG> Peends1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENDS1_A::VALUE1) + self.variant(Peends1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENDS1_A::VALUE2) + self.variant(Peends1::Value2) } } -#[doc = "Field `PEENDS2` reader - Parity Error Enable for DSRAM2"] -pub type PEENDS2_R = crate::BitReader; #[doc = "Parity Error Enable for DSRAM2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENDS2_A { +pub enum Peends2 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENDS2_A) -> Self { + fn from(variant: Peends2) -> Self { variant as u8 != 0 } } -impl PEENDS2_R { +#[doc = "Field `PEENDS2` reader - Parity Error Enable for DSRAM2"] +pub type Peends2R = crate::BitReader; +impl Peends2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENDS2_A { + pub const fn variant(&self) -> Peends2 { match self.bits { - false => PEENDS2_A::VALUE1, - true => PEENDS2_A::VALUE2, + false => Peends2::Value1, + true => Peends2::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENDS2_A::VALUE1 + *self == Peends2::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENDS2_A::VALUE2 + *self == Peends2::Value2 } } #[doc = "Field `PEENDS2` writer - Parity Error Enable for DSRAM2"] -pub type PEENDS2_W<'a, REG> = crate::BitWriter<'a, REG, PEENDS2_A>; -impl<'a, REG> PEENDS2_W<'a, REG> +pub type Peends2W<'a, REG> = crate::BitWriter<'a, REG, Peends2>; +impl<'a, REG> Peends2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENDS2_A::VALUE1) + self.variant(Peends2::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENDS2_A::VALUE2) + self.variant(Peends2::Value2) } } -#[doc = "Field `PEENU0` reader - Parity Error Enable for USIC0 Memory"] -pub type PEENU0_R = crate::BitReader; #[doc = "Parity Error Enable for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENU0_A { +pub enum Peenu0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENU0_A) -> Self { + fn from(variant: Peenu0) -> Self { variant as u8 != 0 } } -impl PEENU0_R { +#[doc = "Field `PEENU0` reader - Parity Error Enable for USIC0 Memory"] +pub type Peenu0R = crate::BitReader; +impl Peenu0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENU0_A { + pub const fn variant(&self) -> Peenu0 { match self.bits { - false => PEENU0_A::VALUE1, - true => PEENU0_A::VALUE2, + false => Peenu0::Value1, + true => Peenu0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENU0_A::VALUE1 + *self == Peenu0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENU0_A::VALUE2 + *self == Peenu0::Value2 } } #[doc = "Field `PEENU0` writer - Parity Error Enable for USIC0 Memory"] -pub type PEENU0_W<'a, REG> = crate::BitWriter<'a, REG, PEENU0_A>; -impl<'a, REG> PEENU0_W<'a, REG> +pub type Peenu0W<'a, REG> = crate::BitWriter<'a, REG, Peenu0>; +impl<'a, REG> Peenu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENU0_A::VALUE1) + self.variant(Peenu0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENU0_A::VALUE2) + self.variant(Peenu0::Value2) } } -#[doc = "Field `PEENU1` reader - Parity Error Enable for USIC1 Memory"] -pub type PEENU1_R = crate::BitReader; #[doc = "Parity Error Enable for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENU1_A { +pub enum Peenu1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENU1_A) -> Self { + fn from(variant: Peenu1) -> Self { variant as u8 != 0 } } -impl PEENU1_R { +#[doc = "Field `PEENU1` reader - Parity Error Enable for USIC1 Memory"] +pub type Peenu1R = crate::BitReader; +impl Peenu1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENU1_A { + pub const fn variant(&self) -> Peenu1 { match self.bits { - false => PEENU1_A::VALUE1, - true => PEENU1_A::VALUE2, + false => Peenu1::Value1, + true => Peenu1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENU1_A::VALUE1 + *self == Peenu1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENU1_A::VALUE2 + *self == Peenu1::Value2 } } #[doc = "Field `PEENU1` writer - Parity Error Enable for USIC1 Memory"] -pub type PEENU1_W<'a, REG> = crate::BitWriter<'a, REG, PEENU1_A>; -impl<'a, REG> PEENU1_W<'a, REG> +pub type Peenu1W<'a, REG> = crate::BitWriter<'a, REG, Peenu1>; +impl<'a, REG> Peenu1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENU1_A::VALUE1) + self.variant(Peenu1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENU1_A::VALUE2) + self.variant(Peenu1::Value2) } } -#[doc = "Field `PEENU2` reader - Parity Error Enable for USIC2 Memory"] -pub type PEENU2_R = crate::BitReader; #[doc = "Parity Error Enable for USIC2 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENU2_A { +pub enum Peenu2 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENU2_A) -> Self { + fn from(variant: Peenu2) -> Self { variant as u8 != 0 } } -impl PEENU2_R { +#[doc = "Field `PEENU2` reader - Parity Error Enable for USIC2 Memory"] +pub type Peenu2R = crate::BitReader; +impl Peenu2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENU2_A { + pub const fn variant(&self) -> Peenu2 { match self.bits { - false => PEENU2_A::VALUE1, - true => PEENU2_A::VALUE2, + false => Peenu2::Value1, + true => Peenu2::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENU2_A::VALUE1 + *self == Peenu2::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENU2_A::VALUE2 + *self == Peenu2::Value2 } } #[doc = "Field `PEENU2` writer - Parity Error Enable for USIC2 Memory"] -pub type PEENU2_W<'a, REG> = crate::BitWriter<'a, REG, PEENU2_A>; -impl<'a, REG> PEENU2_W<'a, REG> +pub type Peenu2W<'a, REG> = crate::BitWriter<'a, REG, Peenu2>; +impl<'a, REG> Peenu2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENU2_A::VALUE1) + self.variant(Peenu2::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENU2_A::VALUE2) + self.variant(Peenu2::Value2) } } -#[doc = "Field `PEENMC` reader - Parity Error Enable for MultiCAN Memory"] -pub type PEENMC_R = crate::BitReader; #[doc = "Parity Error Enable for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENMC_A { +pub enum Peenmc { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENMC_A) -> Self { + fn from(variant: Peenmc) -> Self { variant as u8 != 0 } } -impl PEENMC_R { +#[doc = "Field `PEENMC` reader - Parity Error Enable for MultiCAN Memory"] +pub type PeenmcR = crate::BitReader; +impl PeenmcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENMC_A { + pub const fn variant(&self) -> Peenmc { match self.bits { - false => PEENMC_A::VALUE1, - true => PEENMC_A::VALUE2, + false => Peenmc::Value1, + true => Peenmc::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENMC_A::VALUE1 + *self == Peenmc::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENMC_A::VALUE2 + *self == Peenmc::Value2 } } #[doc = "Field `PEENMC` writer - Parity Error Enable for MultiCAN Memory"] -pub type PEENMC_W<'a, REG> = crate::BitWriter<'a, REG, PEENMC_A>; -impl<'a, REG> PEENMC_W<'a, REG> +pub type PeenmcW<'a, REG> = crate::BitWriter<'a, REG, Peenmc>; +impl<'a, REG> PeenmcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENMC_A::VALUE1) + self.variant(Peenmc::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENMC_A::VALUE2) + self.variant(Peenmc::Value2) } } -#[doc = "Field `PEENPPRF` reader - Parity Error Enable for PMU Prefetch Memory"] -pub type PEENPPRF_R = crate::BitReader; #[doc = "Parity Error Enable for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENPPRF_A { +pub enum Peenpprf { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENPPRF_A) -> Self { + fn from(variant: Peenpprf) -> Self { variant as u8 != 0 } } -impl PEENPPRF_R { +#[doc = "Field `PEENPPRF` reader - Parity Error Enable for PMU Prefetch Memory"] +pub type PeenpprfR = crate::BitReader; +impl PeenpprfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENPPRF_A { + pub const fn variant(&self) -> Peenpprf { match self.bits { - false => PEENPPRF_A::VALUE1, - true => PEENPPRF_A::VALUE2, + false => Peenpprf::Value1, + true => Peenpprf::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENPPRF_A::VALUE1 + *self == Peenpprf::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENPPRF_A::VALUE2 + *self == Peenpprf::Value2 } } #[doc = "Field `PEENPPRF` writer - Parity Error Enable for PMU Prefetch Memory"] -pub type PEENPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PEENPPRF_A>; -impl<'a, REG> PEENPPRF_W<'a, REG> +pub type PeenpprfW<'a, REG> = crate::BitWriter<'a, REG, Peenpprf>; +impl<'a, REG> PeenpprfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENPPRF_A::VALUE1) + self.variant(Peenpprf::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENPPRF_A::VALUE2) + self.variant(Peenpprf::Value2) } } -#[doc = "Field `PEENUSB` reader - Parity Error Enable for USB Memory"] -pub type PEENUSB_R = crate::BitReader; #[doc = "Parity Error Enable for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENUSB_A { +pub enum Peenusb { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENUSB_A) -> Self { + fn from(variant: Peenusb) -> Self { variant as u8 != 0 } } -impl PEENUSB_R { +#[doc = "Field `PEENUSB` reader - Parity Error Enable for USB Memory"] +pub type PeenusbR = crate::BitReader; +impl PeenusbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENUSB_A { + pub const fn variant(&self) -> Peenusb { match self.bits { - false => PEENUSB_A::VALUE1, - true => PEENUSB_A::VALUE2, + false => Peenusb::Value1, + true => Peenusb::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENUSB_A::VALUE1 + *self == Peenusb::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENUSB_A::VALUE2 + *self == Peenusb::Value2 } } #[doc = "Field `PEENUSB` writer - Parity Error Enable for USB Memory"] -pub type PEENUSB_W<'a, REG> = crate::BitWriter<'a, REG, PEENUSB_A>; -impl<'a, REG> PEENUSB_W<'a, REG> +pub type PeenusbW<'a, REG> = crate::BitWriter<'a, REG, Peenusb>; +impl<'a, REG> PeenusbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENUSB_A::VALUE1) + self.variant(Peenusb::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENUSB_A::VALUE2) + self.variant(Peenusb::Value2) } } -#[doc = "Field `PEENETH0TX` reader - Parity Error Enable for ETH TX Memory"] -pub type PEENETH0TX_R = crate::BitReader; #[doc = "Parity Error Enable for ETH TX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENETH0TX_A { +pub enum Peeneth0tx { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENETH0TX_A) -> Self { + fn from(variant: Peeneth0tx) -> Self { variant as u8 != 0 } } -impl PEENETH0TX_R { +#[doc = "Field `PEENETH0TX` reader - Parity Error Enable for ETH TX Memory"] +pub type Peeneth0txR = crate::BitReader; +impl Peeneth0txR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENETH0TX_A { + pub const fn variant(&self) -> Peeneth0tx { match self.bits { - false => PEENETH0TX_A::VALUE1, - true => PEENETH0TX_A::VALUE2, + false => Peeneth0tx::Value1, + true => Peeneth0tx::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENETH0TX_A::VALUE1 + *self == Peeneth0tx::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENETH0TX_A::VALUE2 + *self == Peeneth0tx::Value2 } } #[doc = "Field `PEENETH0TX` writer - Parity Error Enable for ETH TX Memory"] -pub type PEENETH0TX_W<'a, REG> = crate::BitWriter<'a, REG, PEENETH0TX_A>; -impl<'a, REG> PEENETH0TX_W<'a, REG> +pub type Peeneth0txW<'a, REG> = crate::BitWriter<'a, REG, Peeneth0tx>; +impl<'a, REG> Peeneth0txW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENETH0TX_A::VALUE1) + self.variant(Peeneth0tx::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENETH0TX_A::VALUE2) + self.variant(Peeneth0tx::Value2) } } -#[doc = "Field `PEENETH0RX` reader - Parity Error Enable for ETH RX Memory"] -pub type PEENETH0RX_R = crate::BitReader; #[doc = "Parity Error Enable for ETH RX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENETH0RX_A { +pub enum Peeneth0rx { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENETH0RX_A) -> Self { + fn from(variant: Peeneth0rx) -> Self { variant as u8 != 0 } } -impl PEENETH0RX_R { +#[doc = "Field `PEENETH0RX` reader - Parity Error Enable for ETH RX Memory"] +pub type Peeneth0rxR = crate::BitReader; +impl Peeneth0rxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENETH0RX_A { + pub const fn variant(&self) -> Peeneth0rx { match self.bits { - false => PEENETH0RX_A::VALUE1, - true => PEENETH0RX_A::VALUE2, + false => Peeneth0rx::Value1, + true => Peeneth0rx::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENETH0RX_A::VALUE1 + *self == Peeneth0rx::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENETH0RX_A::VALUE2 + *self == Peeneth0rx::Value2 } } #[doc = "Field `PEENETH0RX` writer - Parity Error Enable for ETH RX Memory"] -pub type PEENETH0RX_W<'a, REG> = crate::BitWriter<'a, REG, PEENETH0RX_A>; -impl<'a, REG> PEENETH0RX_W<'a, REG> +pub type Peeneth0rxW<'a, REG> = crate::BitWriter<'a, REG, Peeneth0rx>; +impl<'a, REG> Peeneth0rxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENETH0RX_A::VALUE1) + self.variant(Peeneth0rx::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENETH0RX_A::VALUE2) + self.variant(Peeneth0rx::Value2) } } -#[doc = "Field `PEENSD0` reader - Parity Error Enable for SDMMC Memory 0"] -pub type PEENSD0_R = crate::BitReader; #[doc = "Parity Error Enable for SDMMC Memory 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENSD0_A { +pub enum Peensd0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENSD0_A) -> Self { + fn from(variant: Peensd0) -> Self { variant as u8 != 0 } } -impl PEENSD0_R { +#[doc = "Field `PEENSD0` reader - Parity Error Enable for SDMMC Memory 0"] +pub type Peensd0R = crate::BitReader; +impl Peensd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENSD0_A { + pub const fn variant(&self) -> Peensd0 { match self.bits { - false => PEENSD0_A::VALUE1, - true => PEENSD0_A::VALUE2, + false => Peensd0::Value1, + true => Peensd0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENSD0_A::VALUE1 + *self == Peensd0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENSD0_A::VALUE2 + *self == Peensd0::Value2 } } #[doc = "Field `PEENSD0` writer - Parity Error Enable for SDMMC Memory 0"] -pub type PEENSD0_W<'a, REG> = crate::BitWriter<'a, REG, PEENSD0_A>; -impl<'a, REG> PEENSD0_W<'a, REG> +pub type Peensd0W<'a, REG> = crate::BitWriter<'a, REG, Peensd0>; +impl<'a, REG> Peensd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENSD0_A::VALUE1) + self.variant(Peensd0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENSD0_A::VALUE2) + self.variant(Peensd0::Value2) } } -#[doc = "Field `PEENSD1` reader - Parity Error Enable for SDMMC Memory 1"] -pub type PEENSD1_R = crate::BitReader; #[doc = "Parity Error Enable for SDMMC Memory 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENSD1_A { +pub enum Peensd1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENSD1_A) -> Self { + fn from(variant: Peensd1) -> Self { variant as u8 != 0 } } -impl PEENSD1_R { +#[doc = "Field `PEENSD1` reader - Parity Error Enable for SDMMC Memory 1"] +pub type Peensd1R = crate::BitReader; +impl Peensd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENSD1_A { + pub const fn variant(&self) -> Peensd1 { match self.bits { - false => PEENSD1_A::VALUE1, - true => PEENSD1_A::VALUE2, + false => Peensd1::Value1, + true => Peensd1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENSD1_A::VALUE1 + *self == Peensd1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENSD1_A::VALUE2 + *self == Peensd1::Value2 } } #[doc = "Field `PEENSD1` writer - Parity Error Enable for SDMMC Memory 1"] -pub type PEENSD1_W<'a, REG> = crate::BitWriter<'a, REG, PEENSD1_A>; -impl<'a, REG> PEENSD1_W<'a, REG> +pub type Peensd1W<'a, REG> = crate::BitWriter<'a, REG, Peensd1>; +impl<'a, REG> Peensd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENSD1_A::VALUE1) + self.variant(Peensd1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENSD1_A::VALUE2) + self.variant(Peensd1::Value2) } } -#[doc = "Field `PEENECAT0` reader - Parity Error Enable for ECAT0 Memory"] -pub type PEENECAT0_R = crate::BitReader; #[doc = "Parity Error Enable for ECAT0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEENECAT0_A { +pub enum Peenecat0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEENECAT0_A) -> Self { + fn from(variant: Peenecat0) -> Self { variant as u8 != 0 } } -impl PEENECAT0_R { +#[doc = "Field `PEENECAT0` reader - Parity Error Enable for ECAT0 Memory"] +pub type Peenecat0R = crate::BitReader; +impl Peenecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEENECAT0_A { + pub const fn variant(&self) -> Peenecat0 { match self.bits { - false => PEENECAT0_A::VALUE1, - true => PEENECAT0_A::VALUE2, + false => Peenecat0::Value1, + true => Peenecat0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEENECAT0_A::VALUE1 + *self == Peenecat0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEENECAT0_A::VALUE2 + *self == Peenecat0::Value2 } } #[doc = "Field `PEENECAT0` writer - Parity Error Enable for ECAT0 Memory"] -pub type PEENECAT0_W<'a, REG> = crate::BitWriter<'a, REG, PEENECAT0_A>; -impl<'a, REG> PEENECAT0_W<'a, REG> +pub type Peenecat0W<'a, REG> = crate::BitWriter<'a, REG, Peenecat0>; +impl<'a, REG> Peenecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEENECAT0_A::VALUE1) + self.variant(Peenecat0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEENECAT0_A::VALUE2) + self.variant(Peenecat0::Value2) } } impl R { #[doc = "Bit 0 - Parity Error Enable for PSRAM"] #[inline(always)] - pub fn peenps(&self) -> PEENPS_R { - PEENPS_R::new((self.bits & 1) != 0) + pub fn peenps(&self) -> PeenpsR { + PeenpsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Enable for DSRAM1"] #[inline(always)] - pub fn peends1(&self) -> PEENDS1_R { - PEENDS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn peends1(&self) -> Peends1R { + Peends1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Parity Error Enable for DSRAM2"] #[inline(always)] - pub fn peends2(&self) -> PEENDS2_R { - PEENDS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn peends2(&self) -> Peends2R { + Peends2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"] #[inline(always)] - pub fn peenu0(&self) -> PEENU0_R { - PEENU0_R::new(((self.bits >> 8) & 1) != 0) + pub fn peenu0(&self) -> Peenu0R { + Peenu0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"] #[inline(always)] - pub fn peenu1(&self) -> PEENU1_R { - PEENU1_R::new(((self.bits >> 9) & 1) != 0) + pub fn peenu1(&self) -> Peenu1R { + Peenu1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Parity Error Enable for USIC2 Memory"] #[inline(always)] - pub fn peenu2(&self) -> PEENU2_R { - PEENU2_R::new(((self.bits >> 10) & 1) != 0) + pub fn peenu2(&self) -> Peenu2R { + Peenu2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"] #[inline(always)] - pub fn peenmc(&self) -> PEENMC_R { - PEENMC_R::new(((self.bits >> 12) & 1) != 0) + pub fn peenmc(&self) -> PeenmcR { + PeenmcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"] #[inline(always)] - pub fn peenpprf(&self) -> PEENPPRF_R { - PEENPPRF_R::new(((self.bits >> 13) & 1) != 0) + pub fn peenpprf(&self) -> PeenpprfR { + PeenpprfR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Enable for USB Memory"] #[inline(always)] - pub fn peenusb(&self) -> PEENUSB_R { - PEENUSB_R::new(((self.bits >> 16) & 1) != 0) + pub fn peenusb(&self) -> PeenusbR { + PeenusbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Parity Error Enable for ETH TX Memory"] #[inline(always)] - pub fn peeneth0tx(&self) -> PEENETH0TX_R { - PEENETH0TX_R::new(((self.bits >> 17) & 1) != 0) + pub fn peeneth0tx(&self) -> Peeneth0txR { + Peeneth0txR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Parity Error Enable for ETH RX Memory"] #[inline(always)] - pub fn peeneth0rx(&self) -> PEENETH0RX_R { - PEENETH0RX_R::new(((self.bits >> 18) & 1) != 0) + pub fn peeneth0rx(&self) -> Peeneth0rxR { + Peeneth0rxR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Parity Error Enable for SDMMC Memory 0"] #[inline(always)] - pub fn peensd0(&self) -> PEENSD0_R { - PEENSD0_R::new(((self.bits >> 19) & 1) != 0) + pub fn peensd0(&self) -> Peensd0R { + Peensd0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Parity Error Enable for SDMMC Memory 1"] #[inline(always)] - pub fn peensd1(&self) -> PEENSD1_R { - PEENSD1_R::new(((self.bits >> 20) & 1) != 0) + pub fn peensd1(&self) -> Peensd1R { + Peensd1R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Parity Error Enable for ECAT0 Memory"] #[inline(always)] - pub fn peenecat0(&self) -> PEENECAT0_R { - PEENECAT0_R::new(((self.bits >> 24) & 1) != 0) + pub fn peenecat0(&self) -> Peenecat0R { + Peenecat0R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Enable for PSRAM"] #[inline(always)] #[must_use] - pub fn peenps(&mut self) -> PEENPS_W { - PEENPS_W::new(self, 0) + pub fn peenps(&mut self) -> PeenpsW { + PeenpsW::new(self, 0) } #[doc = "Bit 1 - Parity Error Enable for DSRAM1"] #[inline(always)] #[must_use] - pub fn peends1(&mut self) -> PEENDS1_W { - PEENDS1_W::new(self, 1) + pub fn peends1(&mut self) -> Peends1W { + Peends1W::new(self, 1) } #[doc = "Bit 2 - Parity Error Enable for DSRAM2"] #[inline(always)] #[must_use] - pub fn peends2(&mut self) -> PEENDS2_W { - PEENDS2_W::new(self, 2) + pub fn peends2(&mut self) -> Peends2W { + Peends2W::new(self, 2) } #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn peenu0(&mut self) -> PEENU0_W { - PEENU0_W::new(self, 8) + pub fn peenu0(&mut self) -> Peenu0W { + Peenu0W::new(self, 8) } #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn peenu1(&mut self) -> PEENU1_W { - PEENU1_W::new(self, 9) + pub fn peenu1(&mut self) -> Peenu1W { + Peenu1W::new(self, 9) } #[doc = "Bit 10 - Parity Error Enable for USIC2 Memory"] #[inline(always)] #[must_use] - pub fn peenu2(&mut self) -> PEENU2_W { - PEENU2_W::new(self, 10) + pub fn peenu2(&mut self) -> Peenu2W { + Peenu2W::new(self, 10) } #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn peenmc(&mut self) -> PEENMC_W { - PEENMC_W::new(self, 12) + pub fn peenmc(&mut self) -> PeenmcW { + PeenmcW::new(self, 12) } #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn peenpprf(&mut self) -> PEENPPRF_W { - PEENPPRF_W::new(self, 13) + pub fn peenpprf(&mut self) -> PeenpprfW { + PeenpprfW::new(self, 13) } #[doc = "Bit 16 - Parity Error Enable for USB Memory"] #[inline(always)] #[must_use] - pub fn peenusb(&mut self) -> PEENUSB_W { - PEENUSB_W::new(self, 16) + pub fn peenusb(&mut self) -> PeenusbW { + PeenusbW::new(self, 16) } #[doc = "Bit 17 - Parity Error Enable for ETH TX Memory"] #[inline(always)] #[must_use] - pub fn peeneth0tx(&mut self) -> PEENETH0TX_W { - PEENETH0TX_W::new(self, 17) + pub fn peeneth0tx(&mut self) -> Peeneth0txW { + Peeneth0txW::new(self, 17) } #[doc = "Bit 18 - Parity Error Enable for ETH RX Memory"] #[inline(always)] #[must_use] - pub fn peeneth0rx(&mut self) -> PEENETH0RX_W { - PEENETH0RX_W::new(self, 18) + pub fn peeneth0rx(&mut self) -> Peeneth0rxW { + Peeneth0rxW::new(self, 18) } #[doc = "Bit 19 - Parity Error Enable for SDMMC Memory 0"] #[inline(always)] #[must_use] - pub fn peensd0(&mut self) -> PEENSD0_W { - PEENSD0_W::new(self, 19) + pub fn peensd0(&mut self) -> Peensd0W { + Peensd0W::new(self, 19) } #[doc = "Bit 20 - Parity Error Enable for SDMMC Memory 1"] #[inline(always)] #[must_use] - pub fn peensd1(&mut self) -> PEENSD1_W { - PEENSD1_W::new(self, 20) + pub fn peensd1(&mut self) -> Peensd1W { + Peensd1W::new(self, 20) } #[doc = "Bit 24 - Parity Error Enable for ECAT0 Memory"] #[inline(always)] #[must_use] - pub fn peenecat0(&mut self) -> PEENECAT0_W { - PEENECAT0_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn peenecat0(&mut self) -> Peenecat0W { + Peenecat0W::new(self, 24) } } #[doc = "Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PEEN_SPEC; -impl crate::RegisterSpec for PEEN_SPEC { +pub struct PeenSpec; +impl crate::RegisterSpec for PeenSpec { type Ux = u32; } #[doc = "`read()` method returns [`peen::R`](R) reader structure"] -impl crate::Readable for PEEN_SPEC {} +impl crate::Readable for PeenSpec {} #[doc = "`write(|w| ..)` method takes [`peen::W`](W) writer structure"] -impl crate::Writable for PEEN_SPEC { +impl crate::Writable for PeenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PEEN to value 0"] -impl crate::Resettable for PEEN_SPEC { +impl crate::Resettable for PeenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/peflag.rs b/src/scu_parity/peflag.rs index e0a1cbe0..c17b9db2 100644 --- a/src/scu_parity/peflag.rs +++ b/src/scu_parity/peflag.rs @@ -1,930 +1,921 @@ #[doc = "Register `PEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PEFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `PEFPS` reader - Parity Error Flag for PSRAM"] -pub type PEFPS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Parity Error Flag for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFPS_A { +pub enum Pefps { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFPS_A) -> Self { + fn from(variant: Pefps) -> Self { variant as u8 != 0 } } -impl PEFPS_R { +#[doc = "Field `PEFPS` reader - Parity Error Flag for PSRAM"] +pub type PefpsR = crate::BitReader; +impl PefpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFPS_A { + pub const fn variant(&self) -> Pefps { match self.bits { - false => PEFPS_A::VALUE1, - true => PEFPS_A::VALUE2, + false => Pefps::Value1, + true => Pefps::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFPS_A::VALUE1 + *self == Pefps::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFPS_A::VALUE2 + *self == Pefps::Value2 } } #[doc = "Field `PEFPS` writer - Parity Error Flag for PSRAM"] -pub type PEFPS_W<'a, REG> = crate::BitWriter<'a, REG, PEFPS_A>; -impl<'a, REG> PEFPS_W<'a, REG> +pub type PefpsW<'a, REG> = crate::BitWriter<'a, REG, Pefps>; +impl<'a, REG> PefpsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFPS_A::VALUE1) + self.variant(Pefps::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFPS_A::VALUE2) + self.variant(Pefps::Value2) } } -#[doc = "Field `PEFDS1` reader - Parity Error Flag for DSRAM1"] -pub type PEFDS1_R = crate::BitReader; #[doc = "Parity Error Flag for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFDS1_A { +pub enum Pefds1 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFDS1_A) -> Self { + fn from(variant: Pefds1) -> Self { variant as u8 != 0 } } -impl PEFDS1_R { +#[doc = "Field `PEFDS1` reader - Parity Error Flag for DSRAM1"] +pub type Pefds1R = crate::BitReader; +impl Pefds1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFDS1_A { + pub const fn variant(&self) -> Pefds1 { match self.bits { - false => PEFDS1_A::VALUE1, - true => PEFDS1_A::VALUE2, + false => Pefds1::Value1, + true => Pefds1::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFDS1_A::VALUE1 + *self == Pefds1::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFDS1_A::VALUE2 + *self == Pefds1::Value2 } } #[doc = "Field `PEFDS1` writer - Parity Error Flag for DSRAM1"] -pub type PEFDS1_W<'a, REG> = crate::BitWriter<'a, REG, PEFDS1_A>; -impl<'a, REG> PEFDS1_W<'a, REG> +pub type Pefds1W<'a, REG> = crate::BitWriter<'a, REG, Pefds1>; +impl<'a, REG> Pefds1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFDS1_A::VALUE1) + self.variant(Pefds1::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFDS1_A::VALUE2) + self.variant(Pefds1::Value2) } } -#[doc = "Field `PEFDS2` reader - Parity Error Flag for DSRAM2"] -pub type PEFDS2_R = crate::BitReader; #[doc = "Parity Error Flag for DSRAM2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFDS2_A { +pub enum Pefds2 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFDS2_A) -> Self { + fn from(variant: Pefds2) -> Self { variant as u8 != 0 } } -impl PEFDS2_R { +#[doc = "Field `PEFDS2` reader - Parity Error Flag for DSRAM2"] +pub type Pefds2R = crate::BitReader; +impl Pefds2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFDS2_A { + pub const fn variant(&self) -> Pefds2 { match self.bits { - false => PEFDS2_A::VALUE1, - true => PEFDS2_A::VALUE2, + false => Pefds2::Value1, + true => Pefds2::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFDS2_A::VALUE1 + *self == Pefds2::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFDS2_A::VALUE2 + *self == Pefds2::Value2 } } #[doc = "Field `PEFDS2` writer - Parity Error Flag for DSRAM2"] -pub type PEFDS2_W<'a, REG> = crate::BitWriter<'a, REG, PEFDS2_A>; -impl<'a, REG> PEFDS2_W<'a, REG> +pub type Pefds2W<'a, REG> = crate::BitWriter<'a, REG, Pefds2>; +impl<'a, REG> Pefds2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFDS2_A::VALUE1) + self.variant(Pefds2::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFDS2_A::VALUE2) + self.variant(Pefds2::Value2) } } -#[doc = "Field `PEFU0` reader - Parity Error Flag for USIC0 Memory"] -pub type PEFU0_R = crate::BitReader; #[doc = "Parity Error Flag for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFU0_A { +pub enum Pefu0 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFU0_A) -> Self { + fn from(variant: Pefu0) -> Self { variant as u8 != 0 } } -impl PEFU0_R { +#[doc = "Field `PEFU0` reader - Parity Error Flag for USIC0 Memory"] +pub type Pefu0R = crate::BitReader; +impl Pefu0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFU0_A { + pub const fn variant(&self) -> Pefu0 { match self.bits { - false => PEFU0_A::VALUE1, - true => PEFU0_A::VALUE2, + false => Pefu0::Value1, + true => Pefu0::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFU0_A::VALUE1 + *self == Pefu0::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFU0_A::VALUE2 + *self == Pefu0::Value2 } } #[doc = "Field `PEFU0` writer - Parity Error Flag for USIC0 Memory"] -pub type PEFU0_W<'a, REG> = crate::BitWriter<'a, REG, PEFU0_A>; -impl<'a, REG> PEFU0_W<'a, REG> +pub type Pefu0W<'a, REG> = crate::BitWriter<'a, REG, Pefu0>; +impl<'a, REG> Pefu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFU0_A::VALUE1) + self.variant(Pefu0::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFU0_A::VALUE2) + self.variant(Pefu0::Value2) } } -#[doc = "Field `PEFU1` reader - Parity Error Flag for USIC1 Memory"] -pub type PEFU1_R = crate::BitReader; #[doc = "Parity Error Flag for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFU1_A { +pub enum Pefu1 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFU1_A) -> Self { + fn from(variant: Pefu1) -> Self { variant as u8 != 0 } } -impl PEFU1_R { +#[doc = "Field `PEFU1` reader - Parity Error Flag for USIC1 Memory"] +pub type Pefu1R = crate::BitReader; +impl Pefu1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFU1_A { + pub const fn variant(&self) -> Pefu1 { match self.bits { - false => PEFU1_A::VALUE1, - true => PEFU1_A::VALUE2, + false => Pefu1::Value1, + true => Pefu1::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFU1_A::VALUE1 + *self == Pefu1::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFU1_A::VALUE2 + *self == Pefu1::Value2 } } #[doc = "Field `PEFU1` writer - Parity Error Flag for USIC1 Memory"] -pub type PEFU1_W<'a, REG> = crate::BitWriter<'a, REG, PEFU1_A>; -impl<'a, REG> PEFU1_W<'a, REG> +pub type Pefu1W<'a, REG> = crate::BitWriter<'a, REG, Pefu1>; +impl<'a, REG> Pefu1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFU1_A::VALUE1) + self.variant(Pefu1::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFU1_A::VALUE2) + self.variant(Pefu1::Value2) } } -#[doc = "Field `PEFU2` reader - Parity Error Flag for USIC2 Memory"] -pub type PEFU2_R = crate::BitReader; #[doc = "Parity Error Flag for USIC2 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFU2_A { +pub enum Pefu2 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFU2_A) -> Self { + fn from(variant: Pefu2) -> Self { variant as u8 != 0 } } -impl PEFU2_R { +#[doc = "Field `PEFU2` reader - Parity Error Flag for USIC2 Memory"] +pub type Pefu2R = crate::BitReader; +impl Pefu2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFU2_A { + pub const fn variant(&self) -> Pefu2 { match self.bits { - false => PEFU2_A::VALUE1, - true => PEFU2_A::VALUE2, + false => Pefu2::Value1, + true => Pefu2::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFU2_A::VALUE1 + *self == Pefu2::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFU2_A::VALUE2 + *self == Pefu2::Value2 } } #[doc = "Field `PEFU2` writer - Parity Error Flag for USIC2 Memory"] -pub type PEFU2_W<'a, REG> = crate::BitWriter<'a, REG, PEFU2_A>; -impl<'a, REG> PEFU2_W<'a, REG> +pub type Pefu2W<'a, REG> = crate::BitWriter<'a, REG, Pefu2>; +impl<'a, REG> Pefu2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFU2_A::VALUE1) + self.variant(Pefu2::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFU2_A::VALUE2) + self.variant(Pefu2::Value2) } } -#[doc = "Field `PEFMC` reader - Parity Error Flag for MultiCAN Memory"] -pub type PEFMC_R = crate::BitReader; #[doc = "Parity Error Flag for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFMC_A { +pub enum Pefmc { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFMC_A) -> Self { + fn from(variant: Pefmc) -> Self { variant as u8 != 0 } } -impl PEFMC_R { +#[doc = "Field `PEFMC` reader - Parity Error Flag for MultiCAN Memory"] +pub type PefmcR = crate::BitReader; +impl PefmcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFMC_A { + pub const fn variant(&self) -> Pefmc { match self.bits { - false => PEFMC_A::VALUE1, - true => PEFMC_A::VALUE2, + false => Pefmc::Value1, + true => Pefmc::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFMC_A::VALUE1 + *self == Pefmc::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFMC_A::VALUE2 + *self == Pefmc::Value2 } } #[doc = "Field `PEFMC` writer - Parity Error Flag for MultiCAN Memory"] -pub type PEFMC_W<'a, REG> = crate::BitWriter<'a, REG, PEFMC_A>; -impl<'a, REG> PEFMC_W<'a, REG> +pub type PefmcW<'a, REG> = crate::BitWriter<'a, REG, Pefmc>; +impl<'a, REG> PefmcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFMC_A::VALUE1) + self.variant(Pefmc::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFMC_A::VALUE2) + self.variant(Pefmc::Value2) } } -#[doc = "Field `PEFPPRF` reader - Parity Error Flag for PMU Prefetch Memory"] -pub type PEFPPRF_R = crate::BitReader; #[doc = "Parity Error Flag for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEFPPRF_A { +pub enum Pefpprf { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEFPPRF_A) -> Self { + fn from(variant: Pefpprf) -> Self { variant as u8 != 0 } } -impl PEFPPRF_R { +#[doc = "Field `PEFPPRF` reader - Parity Error Flag for PMU Prefetch Memory"] +pub type PefpprfR = crate::BitReader; +impl PefpprfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEFPPRF_A { + pub const fn variant(&self) -> Pefpprf { match self.bits { - false => PEFPPRF_A::VALUE1, - true => PEFPPRF_A::VALUE2, + false => Pefpprf::Value1, + true => Pefpprf::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEFPPRF_A::VALUE1 + *self == Pefpprf::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEFPPRF_A::VALUE2 + *self == Pefpprf::Value2 } } #[doc = "Field `PEFPPRF` writer - Parity Error Flag for PMU Prefetch Memory"] -pub type PEFPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PEFPPRF_A>; -impl<'a, REG> PEFPPRF_W<'a, REG> +pub type PefpprfW<'a, REG> = crate::BitWriter<'a, REG, Pefpprf>; +impl<'a, REG> PefpprfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEFPPRF_A::VALUE1) + self.variant(Pefpprf::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEFPPRF_A::VALUE2) + self.variant(Pefpprf::Value2) } } -#[doc = "Field `PEUSB` reader - Parity Error Flag for USB Memory"] -pub type PEUSB_R = crate::BitReader; #[doc = "Parity Error Flag for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEUSB_A { +pub enum Peusb { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEUSB_A) -> Self { + fn from(variant: Peusb) -> Self { variant as u8 != 0 } } -impl PEUSB_R { +#[doc = "Field `PEUSB` reader - Parity Error Flag for USB Memory"] +pub type PeusbR = crate::BitReader; +impl PeusbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEUSB_A { + pub const fn variant(&self) -> Peusb { match self.bits { - false => PEUSB_A::VALUE1, - true => PEUSB_A::VALUE2, + false => Peusb::Value1, + true => Peusb::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEUSB_A::VALUE1 + *self == Peusb::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEUSB_A::VALUE2 + *self == Peusb::Value2 } } #[doc = "Field `PEUSB` writer - Parity Error Flag for USB Memory"] -pub type PEUSB_W<'a, REG> = crate::BitWriter<'a, REG, PEUSB_A>; -impl<'a, REG> PEUSB_W<'a, REG> +pub type PeusbW<'a, REG> = crate::BitWriter<'a, REG, Peusb>; +impl<'a, REG> PeusbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEUSB_A::VALUE1) + self.variant(Peusb::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEUSB_A::VALUE2) + self.variant(Peusb::Value2) } } -#[doc = "Field `PEETH0TX` reader - Parity Error Flag for ETH TX Memory"] -pub type PEETH0TX_R = crate::BitReader; #[doc = "Parity Error Flag for ETH TX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEETH0TX_A { +pub enum Peeth0tx { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEETH0TX_A) -> Self { + fn from(variant: Peeth0tx) -> Self { variant as u8 != 0 } } -impl PEETH0TX_R { +#[doc = "Field `PEETH0TX` reader - Parity Error Flag for ETH TX Memory"] +pub type Peeth0txR = crate::BitReader; +impl Peeth0txR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEETH0TX_A { + pub const fn variant(&self) -> Peeth0tx { match self.bits { - false => PEETH0TX_A::VALUE1, - true => PEETH0TX_A::VALUE2, + false => Peeth0tx::Value1, + true => Peeth0tx::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEETH0TX_A::VALUE1 + *self == Peeth0tx::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEETH0TX_A::VALUE2 + *self == Peeth0tx::Value2 } } #[doc = "Field `PEETH0TX` writer - Parity Error Flag for ETH TX Memory"] -pub type PEETH0TX_W<'a, REG> = crate::BitWriter<'a, REG, PEETH0TX_A>; -impl<'a, REG> PEETH0TX_W<'a, REG> +pub type Peeth0txW<'a, REG> = crate::BitWriter<'a, REG, Peeth0tx>; +impl<'a, REG> Peeth0txW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEETH0TX_A::VALUE1) + self.variant(Peeth0tx::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEETH0TX_A::VALUE2) + self.variant(Peeth0tx::Value2) } } -#[doc = "Field `PEETH0RX` reader - Parity Error Flag for ETH RX Memory"] -pub type PEETH0RX_R = crate::BitReader; #[doc = "Parity Error Flag for ETH RX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEETH0RX_A { +pub enum Peeth0rx { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEETH0RX_A) -> Self { + fn from(variant: Peeth0rx) -> Self { variant as u8 != 0 } } -impl PEETH0RX_R { +#[doc = "Field `PEETH0RX` reader - Parity Error Flag for ETH RX Memory"] +pub type Peeth0rxR = crate::BitReader; +impl Peeth0rxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEETH0RX_A { + pub const fn variant(&self) -> Peeth0rx { match self.bits { - false => PEETH0RX_A::VALUE1, - true => PEETH0RX_A::VALUE2, + false => Peeth0rx::Value1, + true => Peeth0rx::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEETH0RX_A::VALUE1 + *self == Peeth0rx::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEETH0RX_A::VALUE2 + *self == Peeth0rx::Value2 } } #[doc = "Field `PEETH0RX` writer - Parity Error Flag for ETH RX Memory"] -pub type PEETH0RX_W<'a, REG> = crate::BitWriter<'a, REG, PEETH0RX_A>; -impl<'a, REG> PEETH0RX_W<'a, REG> +pub type Peeth0rxW<'a, REG> = crate::BitWriter<'a, REG, Peeth0rx>; +impl<'a, REG> Peeth0rxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEETH0RX_A::VALUE1) + self.variant(Peeth0rx::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEETH0RX_A::VALUE2) + self.variant(Peeth0rx::Value2) } } -#[doc = "Field `PESD0` reader - Parity Error Flag for SDMMC Memory 0"] -pub type PESD0_R = crate::BitReader; #[doc = "Parity Error Flag for SDMMC Memory 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PESD0_A { +pub enum Pesd0 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PESD0_A) -> Self { + fn from(variant: Pesd0) -> Self { variant as u8 != 0 } } -impl PESD0_R { +#[doc = "Field `PESD0` reader - Parity Error Flag for SDMMC Memory 0"] +pub type Pesd0R = crate::BitReader; +impl Pesd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PESD0_A { + pub const fn variant(&self) -> Pesd0 { match self.bits { - false => PESD0_A::VALUE1, - true => PESD0_A::VALUE2, + false => Pesd0::Value1, + true => Pesd0::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PESD0_A::VALUE1 + *self == Pesd0::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PESD0_A::VALUE2 + *self == Pesd0::Value2 } } #[doc = "Field `PESD0` writer - Parity Error Flag for SDMMC Memory 0"] -pub type PESD0_W<'a, REG> = crate::BitWriter<'a, REG, PESD0_A>; -impl<'a, REG> PESD0_W<'a, REG> +pub type Pesd0W<'a, REG> = crate::BitWriter<'a, REG, Pesd0>; +impl<'a, REG> Pesd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PESD0_A::VALUE1) + self.variant(Pesd0::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PESD0_A::VALUE2) + self.variant(Pesd0::Value2) } } -#[doc = "Field `PESD1` reader - Parity Error Flag for SDMMC Memory 1"] -pub type PESD1_R = crate::BitReader; #[doc = "Parity Error Flag for SDMMC Memory 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PESD1_A { +pub enum Pesd1 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PESD1_A) -> Self { + fn from(variant: Pesd1) -> Self { variant as u8 != 0 } } -impl PESD1_R { +#[doc = "Field `PESD1` reader - Parity Error Flag for SDMMC Memory 1"] +pub type Pesd1R = crate::BitReader; +impl Pesd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PESD1_A { + pub const fn variant(&self) -> Pesd1 { match self.bits { - false => PESD1_A::VALUE1, - true => PESD1_A::VALUE2, + false => Pesd1::Value1, + true => Pesd1::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PESD1_A::VALUE1 + *self == Pesd1::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PESD1_A::VALUE2 + *self == Pesd1::Value2 } } #[doc = "Field `PESD1` writer - Parity Error Flag for SDMMC Memory 1"] -pub type PESD1_W<'a, REG> = crate::BitWriter<'a, REG, PESD1_A>; -impl<'a, REG> PESD1_W<'a, REG> +pub type Pesd1W<'a, REG> = crate::BitWriter<'a, REG, Pesd1>; +impl<'a, REG> Pesd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PESD1_A::VALUE1) + self.variant(Pesd1::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PESD1_A::VALUE2) + self.variant(Pesd1::Value2) } } -#[doc = "Field `PEECAT0` reader - Parity Error Flag for ECAT0 Memory"] -pub type PEECAT0_R = crate::BitReader; #[doc = "Parity Error Flag for ECAT0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PEECAT0_A { +pub enum Peecat0 { #[doc = "0: No parity error detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity error detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PEECAT0_A) -> Self { + fn from(variant: Peecat0) -> Self { variant as u8 != 0 } } -impl PEECAT0_R { +#[doc = "Field `PEECAT0` reader - Parity Error Flag for ECAT0 Memory"] +pub type Peecat0R = crate::BitReader; +impl Peecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PEECAT0_A { + pub const fn variant(&self) -> Peecat0 { match self.bits { - false => PEECAT0_A::VALUE1, - true => PEECAT0_A::VALUE2, + false => Peecat0::Value1, + true => Peecat0::Value2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PEECAT0_A::VALUE1 + *self == Peecat0::Value1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PEECAT0_A::VALUE2 + *self == Peecat0::Value2 } } #[doc = "Field `PEECAT0` writer - Parity Error Flag for ECAT0 Memory"] -pub type PEECAT0_W<'a, REG> = crate::BitWriter<'a, REG, PEECAT0_A>; -impl<'a, REG> PEECAT0_W<'a, REG> +pub type Peecat0W<'a, REG> = crate::BitWriter<'a, REG, Peecat0>; +impl<'a, REG> Peecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PEECAT0_A::VALUE1) + self.variant(Peecat0::Value1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PEECAT0_A::VALUE2) + self.variant(Peecat0::Value2) } } impl R { #[doc = "Bit 0 - Parity Error Flag for PSRAM"] #[inline(always)] - pub fn pefps(&self) -> PEFPS_R { - PEFPS_R::new((self.bits & 1) != 0) + pub fn pefps(&self) -> PefpsR { + PefpsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Flag for DSRAM1"] #[inline(always)] - pub fn pefds1(&self) -> PEFDS1_R { - PEFDS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn pefds1(&self) -> Pefds1R { + Pefds1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Parity Error Flag for DSRAM2"] #[inline(always)] - pub fn pefds2(&self) -> PEFDS2_R { - PEFDS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn pefds2(&self) -> Pefds2R { + Pefds2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"] #[inline(always)] - pub fn pefu0(&self) -> PEFU0_R { - PEFU0_R::new(((self.bits >> 8) & 1) != 0) + pub fn pefu0(&self) -> Pefu0R { + Pefu0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"] #[inline(always)] - pub fn pefu1(&self) -> PEFU1_R { - PEFU1_R::new(((self.bits >> 9) & 1) != 0) + pub fn pefu1(&self) -> Pefu1R { + Pefu1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Parity Error Flag for USIC2 Memory"] #[inline(always)] - pub fn pefu2(&self) -> PEFU2_R { - PEFU2_R::new(((self.bits >> 10) & 1) != 0) + pub fn pefu2(&self) -> Pefu2R { + Pefu2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"] #[inline(always)] - pub fn pefmc(&self) -> PEFMC_R { - PEFMC_R::new(((self.bits >> 12) & 1) != 0) + pub fn pefmc(&self) -> PefmcR { + PefmcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"] #[inline(always)] - pub fn pefpprf(&self) -> PEFPPRF_R { - PEFPPRF_R::new(((self.bits >> 13) & 1) != 0) + pub fn pefpprf(&self) -> PefpprfR { + PefpprfR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Flag for USB Memory"] #[inline(always)] - pub fn peusb(&self) -> PEUSB_R { - PEUSB_R::new(((self.bits >> 16) & 1) != 0) + pub fn peusb(&self) -> PeusbR { + PeusbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Parity Error Flag for ETH TX Memory"] #[inline(always)] - pub fn peeth0tx(&self) -> PEETH0TX_R { - PEETH0TX_R::new(((self.bits >> 17) & 1) != 0) + pub fn peeth0tx(&self) -> Peeth0txR { + Peeth0txR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Parity Error Flag for ETH RX Memory"] #[inline(always)] - pub fn peeth0rx(&self) -> PEETH0RX_R { - PEETH0RX_R::new(((self.bits >> 18) & 1) != 0) + pub fn peeth0rx(&self) -> Peeth0rxR { + Peeth0rxR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Parity Error Flag for SDMMC Memory 0"] #[inline(always)] - pub fn pesd0(&self) -> PESD0_R { - PESD0_R::new(((self.bits >> 19) & 1) != 0) + pub fn pesd0(&self) -> Pesd0R { + Pesd0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Parity Error Flag for SDMMC Memory 1"] #[inline(always)] - pub fn pesd1(&self) -> PESD1_R { - PESD1_R::new(((self.bits >> 20) & 1) != 0) + pub fn pesd1(&self) -> Pesd1R { + Pesd1R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Parity Error Flag for ECAT0 Memory"] #[inline(always)] - pub fn peecat0(&self) -> PEECAT0_R { - PEECAT0_R::new(((self.bits >> 24) & 1) != 0) + pub fn peecat0(&self) -> Peecat0R { + Peecat0R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Flag for PSRAM"] #[inline(always)] #[must_use] - pub fn pefps(&mut self) -> PEFPS_W { - PEFPS_W::new(self, 0) + pub fn pefps(&mut self) -> PefpsW { + PefpsW::new(self, 0) } #[doc = "Bit 1 - Parity Error Flag for DSRAM1"] #[inline(always)] #[must_use] - pub fn pefds1(&mut self) -> PEFDS1_W { - PEFDS1_W::new(self, 1) + pub fn pefds1(&mut self) -> Pefds1W { + Pefds1W::new(self, 1) } #[doc = "Bit 2 - Parity Error Flag for DSRAM2"] #[inline(always)] #[must_use] - pub fn pefds2(&mut self) -> PEFDS2_W { - PEFDS2_W::new(self, 2) + pub fn pefds2(&mut self) -> Pefds2W { + Pefds2W::new(self, 2) } #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn pefu0(&mut self) -> PEFU0_W { - PEFU0_W::new(self, 8) + pub fn pefu0(&mut self) -> Pefu0W { + Pefu0W::new(self, 8) } #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn pefu1(&mut self) -> PEFU1_W { - PEFU1_W::new(self, 9) + pub fn pefu1(&mut self) -> Pefu1W { + Pefu1W::new(self, 9) } #[doc = "Bit 10 - Parity Error Flag for USIC2 Memory"] #[inline(always)] #[must_use] - pub fn pefu2(&mut self) -> PEFU2_W { - PEFU2_W::new(self, 10) + pub fn pefu2(&mut self) -> Pefu2W { + Pefu2W::new(self, 10) } #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn pefmc(&mut self) -> PEFMC_W { - PEFMC_W::new(self, 12) + pub fn pefmc(&mut self) -> PefmcW { + PefmcW::new(self, 12) } #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn pefpprf(&mut self) -> PEFPPRF_W { - PEFPPRF_W::new(self, 13) + pub fn pefpprf(&mut self) -> PefpprfW { + PefpprfW::new(self, 13) } #[doc = "Bit 16 - Parity Error Flag for USB Memory"] #[inline(always)] #[must_use] - pub fn peusb(&mut self) -> PEUSB_W { - PEUSB_W::new(self, 16) + pub fn peusb(&mut self) -> PeusbW { + PeusbW::new(self, 16) } #[doc = "Bit 17 - Parity Error Flag for ETH TX Memory"] #[inline(always)] #[must_use] - pub fn peeth0tx(&mut self) -> PEETH0TX_W { - PEETH0TX_W::new(self, 17) + pub fn peeth0tx(&mut self) -> Peeth0txW { + Peeth0txW::new(self, 17) } #[doc = "Bit 18 - Parity Error Flag for ETH RX Memory"] #[inline(always)] #[must_use] - pub fn peeth0rx(&mut self) -> PEETH0RX_W { - PEETH0RX_W::new(self, 18) + pub fn peeth0rx(&mut self) -> Peeth0rxW { + Peeth0rxW::new(self, 18) } #[doc = "Bit 19 - Parity Error Flag for SDMMC Memory 0"] #[inline(always)] #[must_use] - pub fn pesd0(&mut self) -> PESD0_W { - PESD0_W::new(self, 19) + pub fn pesd0(&mut self) -> Pesd0W { + Pesd0W::new(self, 19) } #[doc = "Bit 20 - Parity Error Flag for SDMMC Memory 1"] #[inline(always)] #[must_use] - pub fn pesd1(&mut self) -> PESD1_W { - PESD1_W::new(self, 20) + pub fn pesd1(&mut self) -> Pesd1W { + Pesd1W::new(self, 20) } #[doc = "Bit 24 - Parity Error Flag for ECAT0 Memory"] #[inline(always)] #[must_use] - pub fn peecat0(&mut self) -> PEECAT0_W { - PEECAT0_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn peecat0(&mut self) -> Peecat0W { + Peecat0W::new(self, 24) } } #[doc = "Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PEFLAG_SPEC; -impl crate::RegisterSpec for PEFLAG_SPEC { +pub struct PeflagSpec; +impl crate::RegisterSpec for PeflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`peflag::R`](R) reader structure"] -impl crate::Readable for PEFLAG_SPEC {} +impl crate::Readable for PeflagSpec {} #[doc = "`write(|w| ..)` method takes [`peflag::W`](W) writer structure"] -impl crate::Writable for PEFLAG_SPEC { +impl crate::Writable for PeflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PEFLAG to value 0"] -impl crate::Resettable for PEFLAG_SPEC { +impl crate::Resettable for PeflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/persten.rs b/src/scu_parity/persten.rs index 43543104..7160d027 100644 --- a/src/scu_parity/persten.rs +++ b/src/scu_parity/persten.rs @@ -1,98 +1,89 @@ #[doc = "Register `PERSTEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PERSTEN` writer"] -pub type W = crate::W; -#[doc = "Field `RSEN` reader - System Reset Enable upon Parity Error Trap"] -pub type RSEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "System Reset Enable upon Parity Error Trap\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSEN_A { +pub enum Rsen { #[doc = "0: Reset request disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset request enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSEN_A) -> Self { + fn from(variant: Rsen) -> Self { variant as u8 != 0 } } -impl RSEN_R { +#[doc = "Field `RSEN` reader - System Reset Enable upon Parity Error Trap"] +pub type RsenR = crate::BitReader; +impl RsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSEN_A { + pub const fn variant(&self) -> Rsen { match self.bits { - false => RSEN_A::VALUE1, - true => RSEN_A::VALUE2, + false => Rsen::Value1, + true => Rsen::Value2, } } #[doc = "Reset request disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSEN_A::VALUE1 + *self == Rsen::Value1 } #[doc = "Reset request enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSEN_A::VALUE2 + *self == Rsen::Value2 } } #[doc = "Field `RSEN` writer - System Reset Enable upon Parity Error Trap"] -pub type RSEN_W<'a, REG> = crate::BitWriter<'a, REG, RSEN_A>; -impl<'a, REG> RSEN_W<'a, REG> +pub type RsenW<'a, REG> = crate::BitWriter<'a, REG, Rsen>; +impl<'a, REG> RsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Reset request disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSEN_A::VALUE1) + self.variant(Rsen::Value1) } #[doc = "Reset request enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSEN_A::VALUE2) + self.variant(Rsen::Value2) } } impl R { #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"] #[inline(always)] - pub fn rsen(&self) -> RSEN_R { - RSEN_R::new((self.bits & 1) != 0) + pub fn rsen(&self) -> RsenR { + RsenR::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"] #[inline(always)] #[must_use] - pub fn rsen(&mut self) -> RSEN_W { - RSEN_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rsen(&mut self) -> RsenW { + RsenW::new(self, 0) } } #[doc = "Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PERSTEN_SPEC; -impl crate::RegisterSpec for PERSTEN_SPEC { +pub struct PerstenSpec; +impl crate::RegisterSpec for PerstenSpec { type Ux = u32; } #[doc = "`read()` method returns [`persten::R`](R) reader structure"] -impl crate::Readable for PERSTEN_SPEC {} +impl crate::Readable for PerstenSpec {} #[doc = "`write(|w| ..)` method takes [`persten::W`](W) writer structure"] -impl crate::Writable for PERSTEN_SPEC { +impl crate::Writable for PerstenSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERSTEN to value 0"] -impl crate::Resettable for PERSTEN_SPEC { +impl crate::Resettable for PerstenSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pete.rs b/src/scu_parity/pete.rs index 04bd7b59..8fb82bd9 100644 --- a/src/scu_parity/pete.rs +++ b/src/scu_parity/pete.rs @@ -1,930 +1,921 @@ #[doc = "Register `PETE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PETE` writer"] -pub type W = crate::W; -#[doc = "Field `PETEPS` reader - Parity Error Trap Enable for PSRAM"] -pub type PETEPS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Parity Error Trap Enable for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEPS_A { +pub enum Peteps { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEPS_A) -> Self { + fn from(variant: Peteps) -> Self { variant as u8 != 0 } } -impl PETEPS_R { +#[doc = "Field `PETEPS` reader - Parity Error Trap Enable for PSRAM"] +pub type PetepsR = crate::BitReader; +impl PetepsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEPS_A { + pub const fn variant(&self) -> Peteps { match self.bits { - false => PETEPS_A::VALUE1, - true => PETEPS_A::VALUE2, + false => Peteps::Value1, + true => Peteps::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEPS_A::VALUE1 + *self == Peteps::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEPS_A::VALUE2 + *self == Peteps::Value2 } } #[doc = "Field `PETEPS` writer - Parity Error Trap Enable for PSRAM"] -pub type PETEPS_W<'a, REG> = crate::BitWriter<'a, REG, PETEPS_A>; -impl<'a, REG> PETEPS_W<'a, REG> +pub type PetepsW<'a, REG> = crate::BitWriter<'a, REG, Peteps>; +impl<'a, REG> PetepsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEPS_A::VALUE1) + self.variant(Peteps::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEPS_A::VALUE2) + self.variant(Peteps::Value2) } } -#[doc = "Field `PETEDS1` reader - Parity Error Trap Enable for DSRAM1"] -pub type PETEDS1_R = crate::BitReader; #[doc = "Parity Error Trap Enable for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEDS1_A { +pub enum Peteds1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEDS1_A) -> Self { + fn from(variant: Peteds1) -> Self { variant as u8 != 0 } } -impl PETEDS1_R { +#[doc = "Field `PETEDS1` reader - Parity Error Trap Enable for DSRAM1"] +pub type Peteds1R = crate::BitReader; +impl Peteds1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEDS1_A { + pub const fn variant(&self) -> Peteds1 { match self.bits { - false => PETEDS1_A::VALUE1, - true => PETEDS1_A::VALUE2, + false => Peteds1::Value1, + true => Peteds1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEDS1_A::VALUE1 + *self == Peteds1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEDS1_A::VALUE2 + *self == Peteds1::Value2 } } #[doc = "Field `PETEDS1` writer - Parity Error Trap Enable for DSRAM1"] -pub type PETEDS1_W<'a, REG> = crate::BitWriter<'a, REG, PETEDS1_A>; -impl<'a, REG> PETEDS1_W<'a, REG> +pub type Peteds1W<'a, REG> = crate::BitWriter<'a, REG, Peteds1>; +impl<'a, REG> Peteds1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEDS1_A::VALUE1) + self.variant(Peteds1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEDS1_A::VALUE2) + self.variant(Peteds1::Value2) } } -#[doc = "Field `PETEDS2` reader - Parity Error Trap Enable for DSRAM2"] -pub type PETEDS2_R = crate::BitReader; #[doc = "Parity Error Trap Enable for DSRAM2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEDS2_A { +pub enum Peteds2 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEDS2_A) -> Self { + fn from(variant: Peteds2) -> Self { variant as u8 != 0 } } -impl PETEDS2_R { +#[doc = "Field `PETEDS2` reader - Parity Error Trap Enable for DSRAM2"] +pub type Peteds2R = crate::BitReader; +impl Peteds2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEDS2_A { + pub const fn variant(&self) -> Peteds2 { match self.bits { - false => PETEDS2_A::VALUE1, - true => PETEDS2_A::VALUE2, + false => Peteds2::Value1, + true => Peteds2::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEDS2_A::VALUE1 + *self == Peteds2::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEDS2_A::VALUE2 + *self == Peteds2::Value2 } } #[doc = "Field `PETEDS2` writer - Parity Error Trap Enable for DSRAM2"] -pub type PETEDS2_W<'a, REG> = crate::BitWriter<'a, REG, PETEDS2_A>; -impl<'a, REG> PETEDS2_W<'a, REG> +pub type Peteds2W<'a, REG> = crate::BitWriter<'a, REG, Peteds2>; +impl<'a, REG> Peteds2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEDS2_A::VALUE1) + self.variant(Peteds2::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEDS2_A::VALUE2) + self.variant(Peteds2::Value2) } } -#[doc = "Field `PETEU0` reader - Parity Error Trap Enable for USIC0 Memory"] -pub type PETEU0_R = crate::BitReader; #[doc = "Parity Error Trap Enable for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEU0_A { +pub enum Peteu0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEU0_A) -> Self { + fn from(variant: Peteu0) -> Self { variant as u8 != 0 } } -impl PETEU0_R { +#[doc = "Field `PETEU0` reader - Parity Error Trap Enable for USIC0 Memory"] +pub type Peteu0R = crate::BitReader; +impl Peteu0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEU0_A { + pub const fn variant(&self) -> Peteu0 { match self.bits { - false => PETEU0_A::VALUE1, - true => PETEU0_A::VALUE2, + false => Peteu0::Value1, + true => Peteu0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEU0_A::VALUE1 + *self == Peteu0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEU0_A::VALUE2 + *self == Peteu0::Value2 } } #[doc = "Field `PETEU0` writer - Parity Error Trap Enable for USIC0 Memory"] -pub type PETEU0_W<'a, REG> = crate::BitWriter<'a, REG, PETEU0_A>; -impl<'a, REG> PETEU0_W<'a, REG> +pub type Peteu0W<'a, REG> = crate::BitWriter<'a, REG, Peteu0>; +impl<'a, REG> Peteu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEU0_A::VALUE1) + self.variant(Peteu0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEU0_A::VALUE2) + self.variant(Peteu0::Value2) } } -#[doc = "Field `PETEU1` reader - Parity Error Trap Enable for USIC1 Memory"] -pub type PETEU1_R = crate::BitReader; #[doc = "Parity Error Trap Enable for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEU1_A { +pub enum Peteu1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEU1_A) -> Self { + fn from(variant: Peteu1) -> Self { variant as u8 != 0 } } -impl PETEU1_R { +#[doc = "Field `PETEU1` reader - Parity Error Trap Enable for USIC1 Memory"] +pub type Peteu1R = crate::BitReader; +impl Peteu1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEU1_A { + pub const fn variant(&self) -> Peteu1 { match self.bits { - false => PETEU1_A::VALUE1, - true => PETEU1_A::VALUE2, + false => Peteu1::Value1, + true => Peteu1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEU1_A::VALUE1 + *self == Peteu1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEU1_A::VALUE2 + *self == Peteu1::Value2 } } #[doc = "Field `PETEU1` writer - Parity Error Trap Enable for USIC1 Memory"] -pub type PETEU1_W<'a, REG> = crate::BitWriter<'a, REG, PETEU1_A>; -impl<'a, REG> PETEU1_W<'a, REG> +pub type Peteu1W<'a, REG> = crate::BitWriter<'a, REG, Peteu1>; +impl<'a, REG> Peteu1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEU1_A::VALUE1) + self.variant(Peteu1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEU1_A::VALUE2) + self.variant(Peteu1::Value2) } } -#[doc = "Field `PETEU2` reader - Parity Error Trap Enable for USIC2 Memory"] -pub type PETEU2_R = crate::BitReader; #[doc = "Parity Error Trap Enable for USIC2 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEU2_A { +pub enum Peteu2 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEU2_A) -> Self { + fn from(variant: Peteu2) -> Self { variant as u8 != 0 } } -impl PETEU2_R { +#[doc = "Field `PETEU2` reader - Parity Error Trap Enable for USIC2 Memory"] +pub type Peteu2R = crate::BitReader; +impl Peteu2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEU2_A { + pub const fn variant(&self) -> Peteu2 { match self.bits { - false => PETEU2_A::VALUE1, - true => PETEU2_A::VALUE2, + false => Peteu2::Value1, + true => Peteu2::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEU2_A::VALUE1 + *self == Peteu2::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEU2_A::VALUE2 + *self == Peteu2::Value2 } } #[doc = "Field `PETEU2` writer - Parity Error Trap Enable for USIC2 Memory"] -pub type PETEU2_W<'a, REG> = crate::BitWriter<'a, REG, PETEU2_A>; -impl<'a, REG> PETEU2_W<'a, REG> +pub type Peteu2W<'a, REG> = crate::BitWriter<'a, REG, Peteu2>; +impl<'a, REG> Peteu2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEU2_A::VALUE1) + self.variant(Peteu2::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEU2_A::VALUE2) + self.variant(Peteu2::Value2) } } -#[doc = "Field `PETEMC` reader - Parity Error Trap Enable for MultiCAN Memory"] -pub type PETEMC_R = crate::BitReader; #[doc = "Parity Error Trap Enable for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEMC_A { +pub enum Petemc { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEMC_A) -> Self { + fn from(variant: Petemc) -> Self { variant as u8 != 0 } } -impl PETEMC_R { +#[doc = "Field `PETEMC` reader - Parity Error Trap Enable for MultiCAN Memory"] +pub type PetemcR = crate::BitReader; +impl PetemcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEMC_A { + pub const fn variant(&self) -> Petemc { match self.bits { - false => PETEMC_A::VALUE1, - true => PETEMC_A::VALUE2, + false => Petemc::Value1, + true => Petemc::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEMC_A::VALUE1 + *self == Petemc::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEMC_A::VALUE2 + *self == Petemc::Value2 } } #[doc = "Field `PETEMC` writer - Parity Error Trap Enable for MultiCAN Memory"] -pub type PETEMC_W<'a, REG> = crate::BitWriter<'a, REG, PETEMC_A>; -impl<'a, REG> PETEMC_W<'a, REG> +pub type PetemcW<'a, REG> = crate::BitWriter<'a, REG, Petemc>; +impl<'a, REG> PetemcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEMC_A::VALUE1) + self.variant(Petemc::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEMC_A::VALUE2) + self.variant(Petemc::Value2) } } -#[doc = "Field `PETEPPRF` reader - Parity Error Trap Enable for PMU Prefetch Memory"] -pub type PETEPPRF_R = crate::BitReader; #[doc = "Parity Error Trap Enable for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEPPRF_A { +pub enum Petepprf { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEPPRF_A) -> Self { + fn from(variant: Petepprf) -> Self { variant as u8 != 0 } } -impl PETEPPRF_R { +#[doc = "Field `PETEPPRF` reader - Parity Error Trap Enable for PMU Prefetch Memory"] +pub type PetepprfR = crate::BitReader; +impl PetepprfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEPPRF_A { + pub const fn variant(&self) -> Petepprf { match self.bits { - false => PETEPPRF_A::VALUE1, - true => PETEPPRF_A::VALUE2, + false => Petepprf::Value1, + true => Petepprf::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEPPRF_A::VALUE1 + *self == Petepprf::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEPPRF_A::VALUE2 + *self == Petepprf::Value2 } } #[doc = "Field `PETEPPRF` writer - Parity Error Trap Enable for PMU Prefetch Memory"] -pub type PETEPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PETEPPRF_A>; -impl<'a, REG> PETEPPRF_W<'a, REG> +pub type PetepprfW<'a, REG> = crate::BitWriter<'a, REG, Petepprf>; +impl<'a, REG> PetepprfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEPPRF_A::VALUE1) + self.variant(Petepprf::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEPPRF_A::VALUE2) + self.variant(Petepprf::Value2) } } -#[doc = "Field `PETEUSB` reader - Parity Error Trap Enable for USB Memory"] -pub type PETEUSB_R = crate::BitReader; #[doc = "Parity Error Trap Enable for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEUSB_A { +pub enum Peteusb { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEUSB_A) -> Self { + fn from(variant: Peteusb) -> Self { variant as u8 != 0 } } -impl PETEUSB_R { +#[doc = "Field `PETEUSB` reader - Parity Error Trap Enable for USB Memory"] +pub type PeteusbR = crate::BitReader; +impl PeteusbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEUSB_A { + pub const fn variant(&self) -> Peteusb { match self.bits { - false => PETEUSB_A::VALUE1, - true => PETEUSB_A::VALUE2, + false => Peteusb::Value1, + true => Peteusb::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEUSB_A::VALUE1 + *self == Peteusb::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEUSB_A::VALUE2 + *self == Peteusb::Value2 } } #[doc = "Field `PETEUSB` writer - Parity Error Trap Enable for USB Memory"] -pub type PETEUSB_W<'a, REG> = crate::BitWriter<'a, REG, PETEUSB_A>; -impl<'a, REG> PETEUSB_W<'a, REG> +pub type PeteusbW<'a, REG> = crate::BitWriter<'a, REG, Peteusb>; +impl<'a, REG> PeteusbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEUSB_A::VALUE1) + self.variant(Peteusb::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEUSB_A::VALUE2) + self.variant(Peteusb::Value2) } } -#[doc = "Field `PETEETH0TX` reader - Parity Error Trap Enable for ETH 0TX Memory"] -pub type PETEETH0TX_R = crate::BitReader; #[doc = "Parity Error Trap Enable for ETH 0TX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEETH0TX_A { +pub enum Peteeth0tx { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEETH0TX_A) -> Self { + fn from(variant: Peteeth0tx) -> Self { variant as u8 != 0 } } -impl PETEETH0TX_R { +#[doc = "Field `PETEETH0TX` reader - Parity Error Trap Enable for ETH 0TX Memory"] +pub type Peteeth0txR = crate::BitReader; +impl Peteeth0txR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEETH0TX_A { + pub const fn variant(&self) -> Peteeth0tx { match self.bits { - false => PETEETH0TX_A::VALUE1, - true => PETEETH0TX_A::VALUE2, + false => Peteeth0tx::Value1, + true => Peteeth0tx::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEETH0TX_A::VALUE1 + *self == Peteeth0tx::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEETH0TX_A::VALUE2 + *self == Peteeth0tx::Value2 } } #[doc = "Field `PETEETH0TX` writer - Parity Error Trap Enable for ETH 0TX Memory"] -pub type PETEETH0TX_W<'a, REG> = crate::BitWriter<'a, REG, PETEETH0TX_A>; -impl<'a, REG> PETEETH0TX_W<'a, REG> +pub type Peteeth0txW<'a, REG> = crate::BitWriter<'a, REG, Peteeth0tx>; +impl<'a, REG> Peteeth0txW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEETH0TX_A::VALUE1) + self.variant(Peteeth0tx::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEETH0TX_A::VALUE2) + self.variant(Peteeth0tx::Value2) } } -#[doc = "Field `PETEETH0RX` reader - Parity Error Trap Enable for ETH0 RX Memory"] -pub type PETEETH0RX_R = crate::BitReader; #[doc = "Parity Error Trap Enable for ETH0 RX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEETH0RX_A { +pub enum Peteeth0rx { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEETH0RX_A) -> Self { + fn from(variant: Peteeth0rx) -> Self { variant as u8 != 0 } } -impl PETEETH0RX_R { +#[doc = "Field `PETEETH0RX` reader - Parity Error Trap Enable for ETH0 RX Memory"] +pub type Peteeth0rxR = crate::BitReader; +impl Peteeth0rxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEETH0RX_A { + pub const fn variant(&self) -> Peteeth0rx { match self.bits { - false => PETEETH0RX_A::VALUE1, - true => PETEETH0RX_A::VALUE2, + false => Peteeth0rx::Value1, + true => Peteeth0rx::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEETH0RX_A::VALUE1 + *self == Peteeth0rx::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEETH0RX_A::VALUE2 + *self == Peteeth0rx::Value2 } } #[doc = "Field `PETEETH0RX` writer - Parity Error Trap Enable for ETH0 RX Memory"] -pub type PETEETH0RX_W<'a, REG> = crate::BitWriter<'a, REG, PETEETH0RX_A>; -impl<'a, REG> PETEETH0RX_W<'a, REG> +pub type Peteeth0rxW<'a, REG> = crate::BitWriter<'a, REG, Peteeth0rx>; +impl<'a, REG> Peteeth0rxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEETH0RX_A::VALUE1) + self.variant(Peteeth0rx::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEETH0RX_A::VALUE2) + self.variant(Peteeth0rx::Value2) } } -#[doc = "Field `PETESD0` reader - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] -pub type PETESD0_R = crate::BitReader; #[doc = "Parity Error Trap Enable for SDMMC SRAM 0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETESD0_A { +pub enum Petesd0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETESD0_A) -> Self { + fn from(variant: Petesd0) -> Self { variant as u8 != 0 } } -impl PETESD0_R { +#[doc = "Field `PETESD0` reader - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] +pub type Petesd0R = crate::BitReader; +impl Petesd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETESD0_A { + pub const fn variant(&self) -> Petesd0 { match self.bits { - false => PETESD0_A::VALUE1, - true => PETESD0_A::VALUE2, + false => Petesd0::Value1, + true => Petesd0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETESD0_A::VALUE1 + *self == Petesd0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETESD0_A::VALUE2 + *self == Petesd0::Value2 } } #[doc = "Field `PETESD0` writer - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] -pub type PETESD0_W<'a, REG> = crate::BitWriter<'a, REG, PETESD0_A>; -impl<'a, REG> PETESD0_W<'a, REG> +pub type Petesd0W<'a, REG> = crate::BitWriter<'a, REG, Petesd0>; +impl<'a, REG> Petesd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETESD0_A::VALUE1) + self.variant(Petesd0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETESD0_A::VALUE2) + self.variant(Petesd0::Value2) } } -#[doc = "Field `PETESD1` reader - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] -pub type PETESD1_R = crate::BitReader; #[doc = "Parity Error Trap Enable for SDMMC SRAM 1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETESD1_A { +pub enum Petesd1 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETESD1_A) -> Self { + fn from(variant: Petesd1) -> Self { variant as u8 != 0 } } -impl PETESD1_R { +#[doc = "Field `PETESD1` reader - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] +pub type Petesd1R = crate::BitReader; +impl Petesd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETESD1_A { + pub const fn variant(&self) -> Petesd1 { match self.bits { - false => PETESD1_A::VALUE1, - true => PETESD1_A::VALUE2, + false => Petesd1::Value1, + true => Petesd1::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETESD1_A::VALUE1 + *self == Petesd1::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETESD1_A::VALUE2 + *self == Petesd1::Value2 } } #[doc = "Field `PETESD1` writer - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] -pub type PETESD1_W<'a, REG> = crate::BitWriter<'a, REG, PETESD1_A>; -impl<'a, REG> PETESD1_W<'a, REG> +pub type Petesd1W<'a, REG> = crate::BitWriter<'a, REG, Petesd1>; +impl<'a, REG> Petesd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETESD1_A::VALUE1) + self.variant(Petesd1::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETESD1_A::VALUE2) + self.variant(Petesd1::Value2) } } -#[doc = "Field `PETEECAT0` reader - Parity Error Trap Enable for ECAT0 SRAM Memory"] -pub type PETEECAT0_R = crate::BitReader; #[doc = "Parity Error Trap Enable for ECAT0 SRAM Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PETEECAT0_A { +pub enum Peteecat0 { #[doc = "0: Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PETEECAT0_A) -> Self { + fn from(variant: Peteecat0) -> Self { variant as u8 != 0 } } -impl PETEECAT0_R { +#[doc = "Field `PETEECAT0` reader - Parity Error Trap Enable for ECAT0 SRAM Memory"] +pub type Peteecat0R = crate::BitReader; +impl Peteecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PETEECAT0_A { + pub const fn variant(&self) -> Peteecat0 { match self.bits { - false => PETEECAT0_A::VALUE1, - true => PETEECAT0_A::VALUE2, + false => Peteecat0::Value1, + true => Peteecat0::Value2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PETEECAT0_A::VALUE1 + *self == Peteecat0::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PETEECAT0_A::VALUE2 + *self == Peteecat0::Value2 } } #[doc = "Field `PETEECAT0` writer - Parity Error Trap Enable for ECAT0 SRAM Memory"] -pub type PETEECAT0_W<'a, REG> = crate::BitWriter<'a, REG, PETEECAT0_A>; -impl<'a, REG> PETEECAT0_W<'a, REG> +pub type Peteecat0W<'a, REG> = crate::BitWriter<'a, REG, Peteecat0>; +impl<'a, REG> Peteecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PETEECAT0_A::VALUE1) + self.variant(Peteecat0::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PETEECAT0_A::VALUE2) + self.variant(Peteecat0::Value2) } } impl R { #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"] #[inline(always)] - pub fn peteps(&self) -> PETEPS_R { - PETEPS_R::new((self.bits & 1) != 0) + pub fn peteps(&self) -> PetepsR { + PetepsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"] #[inline(always)] - pub fn peteds1(&self) -> PETEDS1_R { - PETEDS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn peteds1(&self) -> Peteds1R { + Peteds1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Parity Error Trap Enable for DSRAM2"] #[inline(always)] - pub fn peteds2(&self) -> PETEDS2_R { - PETEDS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn peteds2(&self) -> Peteds2R { + Peteds2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"] #[inline(always)] - pub fn peteu0(&self) -> PETEU0_R { - PETEU0_R::new(((self.bits >> 8) & 1) != 0) + pub fn peteu0(&self) -> Peteu0R { + Peteu0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"] #[inline(always)] - pub fn peteu1(&self) -> PETEU1_R { - PETEU1_R::new(((self.bits >> 9) & 1) != 0) + pub fn peteu1(&self) -> Peteu1R { + Peteu1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Parity Error Trap Enable for USIC2 Memory"] #[inline(always)] - pub fn peteu2(&self) -> PETEU2_R { - PETEU2_R::new(((self.bits >> 10) & 1) != 0) + pub fn peteu2(&self) -> Peteu2R { + Peteu2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"] #[inline(always)] - pub fn petemc(&self) -> PETEMC_R { - PETEMC_R::new(((self.bits >> 12) & 1) != 0) + pub fn petemc(&self) -> PetemcR { + PetemcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"] #[inline(always)] - pub fn petepprf(&self) -> PETEPPRF_R { - PETEPPRF_R::new(((self.bits >> 13) & 1) != 0) + pub fn petepprf(&self) -> PetepprfR { + PetepprfR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"] #[inline(always)] - pub fn peteusb(&self) -> PETEUSB_R { - PETEUSB_R::new(((self.bits >> 16) & 1) != 0) + pub fn peteusb(&self) -> PeteusbR { + PeteusbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Parity Error Trap Enable for ETH 0TX Memory"] #[inline(always)] - pub fn peteeth0tx(&self) -> PETEETH0TX_R { - PETEETH0TX_R::new(((self.bits >> 17) & 1) != 0) + pub fn peteeth0tx(&self) -> Peteeth0txR { + Peteeth0txR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Parity Error Trap Enable for ETH0 RX Memory"] #[inline(always)] - pub fn peteeth0rx(&self) -> PETEETH0RX_R { - PETEETH0RX_R::new(((self.bits >> 18) & 1) != 0) + pub fn peteeth0rx(&self) -> Peteeth0rxR { + Peteeth0rxR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] #[inline(always)] - pub fn petesd0(&self) -> PETESD0_R { - PETESD0_R::new(((self.bits >> 19) & 1) != 0) + pub fn petesd0(&self) -> Petesd0R { + Petesd0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] #[inline(always)] - pub fn petesd1(&self) -> PETESD1_R { - PETESD1_R::new(((self.bits >> 20) & 1) != 0) + pub fn petesd1(&self) -> Petesd1R { + Petesd1R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Parity Error Trap Enable for ECAT0 SRAM Memory"] #[inline(always)] - pub fn peteecat0(&self) -> PETEECAT0_R { - PETEECAT0_R::new(((self.bits >> 24) & 1) != 0) + pub fn peteecat0(&self) -> Peteecat0R { + Peteecat0R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"] #[inline(always)] #[must_use] - pub fn peteps(&mut self) -> PETEPS_W { - PETEPS_W::new(self, 0) + pub fn peteps(&mut self) -> PetepsW { + PetepsW::new(self, 0) } #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"] #[inline(always)] #[must_use] - pub fn peteds1(&mut self) -> PETEDS1_W { - PETEDS1_W::new(self, 1) + pub fn peteds1(&mut self) -> Peteds1W { + Peteds1W::new(self, 1) } #[doc = "Bit 2 - Parity Error Trap Enable for DSRAM2"] #[inline(always)] #[must_use] - pub fn peteds2(&mut self) -> PETEDS2_W { - PETEDS2_W::new(self, 2) + pub fn peteds2(&mut self) -> Peteds2W { + Peteds2W::new(self, 2) } #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn peteu0(&mut self) -> PETEU0_W { - PETEU0_W::new(self, 8) + pub fn peteu0(&mut self) -> Peteu0W { + Peteu0W::new(self, 8) } #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn peteu1(&mut self) -> PETEU1_W { - PETEU1_W::new(self, 9) + pub fn peteu1(&mut self) -> Peteu1W { + Peteu1W::new(self, 9) } #[doc = "Bit 10 - Parity Error Trap Enable for USIC2 Memory"] #[inline(always)] #[must_use] - pub fn peteu2(&mut self) -> PETEU2_W { - PETEU2_W::new(self, 10) + pub fn peteu2(&mut self) -> Peteu2W { + Peteu2W::new(self, 10) } #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn petemc(&mut self) -> PETEMC_W { - PETEMC_W::new(self, 12) + pub fn petemc(&mut self) -> PetemcW { + PetemcW::new(self, 12) } #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn petepprf(&mut self) -> PETEPPRF_W { - PETEPPRF_W::new(self, 13) + pub fn petepprf(&mut self) -> PetepprfW { + PetepprfW::new(self, 13) } #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"] #[inline(always)] #[must_use] - pub fn peteusb(&mut self) -> PETEUSB_W { - PETEUSB_W::new(self, 16) + pub fn peteusb(&mut self) -> PeteusbW { + PeteusbW::new(self, 16) } #[doc = "Bit 17 - Parity Error Trap Enable for ETH 0TX Memory"] #[inline(always)] #[must_use] - pub fn peteeth0tx(&mut self) -> PETEETH0TX_W { - PETEETH0TX_W::new(self, 17) + pub fn peteeth0tx(&mut self) -> Peteeth0txW { + Peteeth0txW::new(self, 17) } #[doc = "Bit 18 - Parity Error Trap Enable for ETH0 RX Memory"] #[inline(always)] #[must_use] - pub fn peteeth0rx(&mut self) -> PETEETH0RX_W { - PETEETH0RX_W::new(self, 18) + pub fn peteeth0rx(&mut self) -> Peteeth0rxW { + Peteeth0rxW::new(self, 18) } #[doc = "Bit 19 - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] #[inline(always)] #[must_use] - pub fn petesd0(&mut self) -> PETESD0_W { - PETESD0_W::new(self, 19) + pub fn petesd0(&mut self) -> Petesd0W { + Petesd0W::new(self, 19) } #[doc = "Bit 20 - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] #[inline(always)] #[must_use] - pub fn petesd1(&mut self) -> PETESD1_W { - PETESD1_W::new(self, 20) + pub fn petesd1(&mut self) -> Petesd1W { + Petesd1W::new(self, 20) } #[doc = "Bit 24 - Parity Error Trap Enable for ECAT0 SRAM Memory"] #[inline(always)] #[must_use] - pub fn peteecat0(&mut self) -> PETEECAT0_W { - PETEECAT0_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn peteecat0(&mut self) -> Peteecat0W { + Peteecat0W::new(self, 24) } } #[doc = "Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PETE_SPEC; -impl crate::RegisterSpec for PETE_SPEC { +pub struct PeteSpec; +impl crate::RegisterSpec for PeteSpec { type Ux = u32; } #[doc = "`read()` method returns [`pete::R`](R) reader structure"] -impl crate::Readable for PETE_SPEC {} +impl crate::Readable for PeteSpec {} #[doc = "`write(|w| ..)` method takes [`pete::W`](W) writer structure"] -impl crate::Writable for PETE_SPEC { +impl crate::Writable for PeteSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PETE to value 0"] -impl crate::Resettable for PETE_SPEC { +impl crate::Resettable for PeteSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pmtpr.rs b/src/scu_parity/pmtpr.rs index 994ff13a..567eacd6 100644 --- a/src/scu_parity/pmtpr.rs +++ b/src/scu_parity/pmtpr.rs @@ -1,56 +1,47 @@ #[doc = "Register `PMTPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PMTPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PWR` reader - Parity Write Values for Memory Test"] -pub type PWR_R = crate::FieldReader; +pub type PwrR = crate::FieldReader; #[doc = "Field `PWR` writer - Parity Write Values for Memory Test"] -pub type PWR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PwrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRD` reader - Parity Read Values for Memory Test"] -pub type PRD_R = crate::FieldReader; +pub type PrdR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Parity Write Values for Memory Test"] #[inline(always)] - pub fn pwr(&self) -> PWR_R { - PWR_R::new((self.bits & 0xff) as u8) + pub fn pwr(&self) -> PwrR { + PwrR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Parity Read Values for Memory Test"] #[inline(always)] - pub fn prd(&self) -> PRD_R { - PRD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn prd(&self) -> PrdR { + PrdR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Parity Write Values for Memory Test"] #[inline(always)] #[must_use] - pub fn pwr(&mut self) -> PWR_W { - PWR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pwr(&mut self) -> PwrW { + PwrW::new(self, 0) } } #[doc = "Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PMTPR_SPEC; -impl crate::RegisterSpec for PMTPR_SPEC { +pub struct PmtprSpec; +impl crate::RegisterSpec for PmtprSpec { type Ux = u32; } #[doc = "`read()` method returns [`pmtpr::R`](R) reader structure"] -impl crate::Readable for PMTPR_SPEC {} +impl crate::Readable for PmtprSpec {} #[doc = "`write(|w| ..)` method takes [`pmtpr::W`](W) writer structure"] -impl crate::Writable for PMTPR_SPEC { +impl crate::Writable for PmtprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMTPR to value 0"] -impl crate::Resettable for PMTPR_SPEC { +impl crate::Resettable for PmtprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pmtsr.rs b/src/scu_parity/pmtsr.rs index ca3d4213..7593e830 100644 --- a/src/scu_parity/pmtsr.rs +++ b/src/scu_parity/pmtsr.rs @@ -1,930 +1,921 @@ #[doc = "Register `PMTSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PMTSR` writer"] -pub type W = crate::W; -#[doc = "Field `MTENPS` reader - Test Enable Control for PSRAM"] -pub type MTENPS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Test Enable Control for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTENPS_A { +pub enum Mtenps { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTENPS_A) -> Self { + fn from(variant: Mtenps) -> Self { variant as u8 != 0 } } -impl MTENPS_R { +#[doc = "Field `MTENPS` reader - Test Enable Control for PSRAM"] +pub type MtenpsR = crate::BitReader; +impl MtenpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTENPS_A { + pub const fn variant(&self) -> Mtenps { match self.bits { - false => MTENPS_A::VALUE1, - true => MTENPS_A::VALUE2, + false => Mtenps::Value1, + true => Mtenps::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTENPS_A::VALUE1 + *self == Mtenps::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTENPS_A::VALUE2 + *self == Mtenps::Value2 } } #[doc = "Field `MTENPS` writer - Test Enable Control for PSRAM"] -pub type MTENPS_W<'a, REG> = crate::BitWriter<'a, REG, MTENPS_A>; -impl<'a, REG> MTENPS_W<'a, REG> +pub type MtenpsW<'a, REG> = crate::BitWriter<'a, REG, Mtenps>; +impl<'a, REG> MtenpsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTENPS_A::VALUE1) + self.variant(Mtenps::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTENPS_A::VALUE2) + self.variant(Mtenps::Value2) } } -#[doc = "Field `MTENDS1` reader - Test Enable Control for DSRAM1"] -pub type MTENDS1_R = crate::BitReader; #[doc = "Test Enable Control for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTENDS1_A { +pub enum Mtends1 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTENDS1_A) -> Self { + fn from(variant: Mtends1) -> Self { variant as u8 != 0 } } -impl MTENDS1_R { +#[doc = "Field `MTENDS1` reader - Test Enable Control for DSRAM1"] +pub type Mtends1R = crate::BitReader; +impl Mtends1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTENDS1_A { + pub const fn variant(&self) -> Mtends1 { match self.bits { - false => MTENDS1_A::VALUE1, - true => MTENDS1_A::VALUE2, + false => Mtends1::Value1, + true => Mtends1::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTENDS1_A::VALUE1 + *self == Mtends1::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTENDS1_A::VALUE2 + *self == Mtends1::Value2 } } #[doc = "Field `MTENDS1` writer - Test Enable Control for DSRAM1"] -pub type MTENDS1_W<'a, REG> = crate::BitWriter<'a, REG, MTENDS1_A>; -impl<'a, REG> MTENDS1_W<'a, REG> +pub type Mtends1W<'a, REG> = crate::BitWriter<'a, REG, Mtends1>; +impl<'a, REG> Mtends1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTENDS1_A::VALUE1) + self.variant(Mtends1::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTENDS1_A::VALUE2) + self.variant(Mtends1::Value2) } } -#[doc = "Field `MTENDS2` reader - Test Enable Control for DSRAM2"] -pub type MTENDS2_R = crate::BitReader; #[doc = "Test Enable Control for DSRAM2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTENDS2_A { +pub enum Mtends2 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTENDS2_A) -> Self { + fn from(variant: Mtends2) -> Self { variant as u8 != 0 } } -impl MTENDS2_R { +#[doc = "Field `MTENDS2` reader - Test Enable Control for DSRAM2"] +pub type Mtends2R = crate::BitReader; +impl Mtends2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTENDS2_A { + pub const fn variant(&self) -> Mtends2 { match self.bits { - false => MTENDS2_A::VALUE1, - true => MTENDS2_A::VALUE2, + false => Mtends2::Value1, + true => Mtends2::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTENDS2_A::VALUE1 + *self == Mtends2::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTENDS2_A::VALUE2 + *self == Mtends2::Value2 } } #[doc = "Field `MTENDS2` writer - Test Enable Control for DSRAM2"] -pub type MTENDS2_W<'a, REG> = crate::BitWriter<'a, REG, MTENDS2_A>; -impl<'a, REG> MTENDS2_W<'a, REG> +pub type Mtends2W<'a, REG> = crate::BitWriter<'a, REG, Mtends2>; +impl<'a, REG> Mtends2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTENDS2_A::VALUE1) + self.variant(Mtends2::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTENDS2_A::VALUE2) + self.variant(Mtends2::Value2) } } -#[doc = "Field `MTEU0` reader - Test Enable Control for USIC0 Memory"] -pub type MTEU0_R = crate::BitReader; #[doc = "Test Enable Control for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTEU0_A { +pub enum Mteu0 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTEU0_A) -> Self { + fn from(variant: Mteu0) -> Self { variant as u8 != 0 } } -impl MTEU0_R { +#[doc = "Field `MTEU0` reader - Test Enable Control for USIC0 Memory"] +pub type Mteu0R = crate::BitReader; +impl Mteu0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTEU0_A { + pub const fn variant(&self) -> Mteu0 { match self.bits { - false => MTEU0_A::VALUE1, - true => MTEU0_A::VALUE2, + false => Mteu0::Value1, + true => Mteu0::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTEU0_A::VALUE1 + *self == Mteu0::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTEU0_A::VALUE2 + *self == Mteu0::Value2 } } #[doc = "Field `MTEU0` writer - Test Enable Control for USIC0 Memory"] -pub type MTEU0_W<'a, REG> = crate::BitWriter<'a, REG, MTEU0_A>; -impl<'a, REG> MTEU0_W<'a, REG> +pub type Mteu0W<'a, REG> = crate::BitWriter<'a, REG, Mteu0>; +impl<'a, REG> Mteu0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTEU0_A::VALUE1) + self.variant(Mteu0::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTEU0_A::VALUE2) + self.variant(Mteu0::Value2) } } -#[doc = "Field `MTEU1` reader - Test Enable Control for USIC1 Memory"] -pub type MTEU1_R = crate::BitReader; #[doc = "Test Enable Control for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTEU1_A { +pub enum Mteu1 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTEU1_A) -> Self { + fn from(variant: Mteu1) -> Self { variant as u8 != 0 } } -impl MTEU1_R { +#[doc = "Field `MTEU1` reader - Test Enable Control for USIC1 Memory"] +pub type Mteu1R = crate::BitReader; +impl Mteu1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTEU1_A { + pub const fn variant(&self) -> Mteu1 { match self.bits { - false => MTEU1_A::VALUE1, - true => MTEU1_A::VALUE2, + false => Mteu1::Value1, + true => Mteu1::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTEU1_A::VALUE1 + *self == Mteu1::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTEU1_A::VALUE2 + *self == Mteu1::Value2 } } #[doc = "Field `MTEU1` writer - Test Enable Control for USIC1 Memory"] -pub type MTEU1_W<'a, REG> = crate::BitWriter<'a, REG, MTEU1_A>; -impl<'a, REG> MTEU1_W<'a, REG> +pub type Mteu1W<'a, REG> = crate::BitWriter<'a, REG, Mteu1>; +impl<'a, REG> Mteu1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTEU1_A::VALUE1) + self.variant(Mteu1::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTEU1_A::VALUE2) + self.variant(Mteu1::Value2) } } -#[doc = "Field `MTEU2` reader - Test Enable Control for USIC2 Memory"] -pub type MTEU2_R = crate::BitReader; #[doc = "Test Enable Control for USIC2 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTEU2_A { +pub enum Mteu2 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTEU2_A) -> Self { + fn from(variant: Mteu2) -> Self { variant as u8 != 0 } } -impl MTEU2_R { +#[doc = "Field `MTEU2` reader - Test Enable Control for USIC2 Memory"] +pub type Mteu2R = crate::BitReader; +impl Mteu2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTEU2_A { + pub const fn variant(&self) -> Mteu2 { match self.bits { - false => MTEU2_A::VALUE1, - true => MTEU2_A::VALUE2, + false => Mteu2::Value1, + true => Mteu2::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTEU2_A::VALUE1 + *self == Mteu2::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTEU2_A::VALUE2 + *self == Mteu2::Value2 } } #[doc = "Field `MTEU2` writer - Test Enable Control for USIC2 Memory"] -pub type MTEU2_W<'a, REG> = crate::BitWriter<'a, REG, MTEU2_A>; -impl<'a, REG> MTEU2_W<'a, REG> +pub type Mteu2W<'a, REG> = crate::BitWriter<'a, REG, Mteu2>; +impl<'a, REG> Mteu2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTEU2_A::VALUE1) + self.variant(Mteu2::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTEU2_A::VALUE2) + self.variant(Mteu2::Value2) } } -#[doc = "Field `MTEMC` reader - Test Enable Control for MultiCAN Memory"] -pub type MTEMC_R = crate::BitReader; #[doc = "Test Enable Control for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTEMC_A { +pub enum Mtemc { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTEMC_A) -> Self { + fn from(variant: Mtemc) -> Self { variant as u8 != 0 } } -impl MTEMC_R { +#[doc = "Field `MTEMC` reader - Test Enable Control for MultiCAN Memory"] +pub type MtemcR = crate::BitReader; +impl MtemcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTEMC_A { + pub const fn variant(&self) -> Mtemc { match self.bits { - false => MTEMC_A::VALUE1, - true => MTEMC_A::VALUE2, + false => Mtemc::Value1, + true => Mtemc::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTEMC_A::VALUE1 + *self == Mtemc::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTEMC_A::VALUE2 + *self == Mtemc::Value2 } } #[doc = "Field `MTEMC` writer - Test Enable Control for MultiCAN Memory"] -pub type MTEMC_W<'a, REG> = crate::BitWriter<'a, REG, MTEMC_A>; -impl<'a, REG> MTEMC_W<'a, REG> +pub type MtemcW<'a, REG> = crate::BitWriter<'a, REG, Mtemc>; +impl<'a, REG> MtemcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTEMC_A::VALUE1) + self.variant(Mtemc::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTEMC_A::VALUE2) + self.variant(Mtemc::Value2) } } -#[doc = "Field `MTEPPRF` reader - Test Enable Control for PMU Prefetch Memory"] -pub type MTEPPRF_R = crate::BitReader; #[doc = "Test Enable Control for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTEPPRF_A { +pub enum Mtepprf { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTEPPRF_A) -> Self { + fn from(variant: Mtepprf) -> Self { variant as u8 != 0 } } -impl MTEPPRF_R { +#[doc = "Field `MTEPPRF` reader - Test Enable Control for PMU Prefetch Memory"] +pub type MtepprfR = crate::BitReader; +impl MtepprfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTEPPRF_A { + pub const fn variant(&self) -> Mtepprf { match self.bits { - false => MTEPPRF_A::VALUE1, - true => MTEPPRF_A::VALUE2, + false => Mtepprf::Value1, + true => Mtepprf::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTEPPRF_A::VALUE1 + *self == Mtepprf::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTEPPRF_A::VALUE2 + *self == Mtepprf::Value2 } } #[doc = "Field `MTEPPRF` writer - Test Enable Control for PMU Prefetch Memory"] -pub type MTEPPRF_W<'a, REG> = crate::BitWriter<'a, REG, MTEPPRF_A>; -impl<'a, REG> MTEPPRF_W<'a, REG> +pub type MtepprfW<'a, REG> = crate::BitWriter<'a, REG, Mtepprf>; +impl<'a, REG> MtepprfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTEPPRF_A::VALUE1) + self.variant(Mtepprf::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTEPPRF_A::VALUE2) + self.variant(Mtepprf::Value2) } } -#[doc = "Field `MTUSB` reader - Test Enable Control for USB Memory"] -pub type MTUSB_R = crate::BitReader; #[doc = "Test Enable Control for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTUSB_A { +pub enum Mtusb { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTUSB_A) -> Self { + fn from(variant: Mtusb) -> Self { variant as u8 != 0 } } -impl MTUSB_R { +#[doc = "Field `MTUSB` reader - Test Enable Control for USB Memory"] +pub type MtusbR = crate::BitReader; +impl MtusbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTUSB_A { + pub const fn variant(&self) -> Mtusb { match self.bits { - false => MTUSB_A::VALUE1, - true => MTUSB_A::VALUE2, + false => Mtusb::Value1, + true => Mtusb::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTUSB_A::VALUE1 + *self == Mtusb::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTUSB_A::VALUE2 + *self == Mtusb::Value2 } } #[doc = "Field `MTUSB` writer - Test Enable Control for USB Memory"] -pub type MTUSB_W<'a, REG> = crate::BitWriter<'a, REG, MTUSB_A>; -impl<'a, REG> MTUSB_W<'a, REG> +pub type MtusbW<'a, REG> = crate::BitWriter<'a, REG, Mtusb>; +impl<'a, REG> MtusbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTUSB_A::VALUE1) + self.variant(Mtusb::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTUSB_A::VALUE2) + self.variant(Mtusb::Value2) } } -#[doc = "Field `MTETH0TX` reader - Test Enable Control for ETH TX Memory"] -pub type MTETH0TX_R = crate::BitReader; #[doc = "Test Enable Control for ETH TX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTETH0TX_A { +pub enum Mteth0tx { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTETH0TX_A) -> Self { + fn from(variant: Mteth0tx) -> Self { variant as u8 != 0 } } -impl MTETH0TX_R { +#[doc = "Field `MTETH0TX` reader - Test Enable Control for ETH TX Memory"] +pub type Mteth0txR = crate::BitReader; +impl Mteth0txR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTETH0TX_A { + pub const fn variant(&self) -> Mteth0tx { match self.bits { - false => MTETH0TX_A::VALUE1, - true => MTETH0TX_A::VALUE2, + false => Mteth0tx::Value1, + true => Mteth0tx::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTETH0TX_A::VALUE1 + *self == Mteth0tx::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTETH0TX_A::VALUE2 + *self == Mteth0tx::Value2 } } #[doc = "Field `MTETH0TX` writer - Test Enable Control for ETH TX Memory"] -pub type MTETH0TX_W<'a, REG> = crate::BitWriter<'a, REG, MTETH0TX_A>; -impl<'a, REG> MTETH0TX_W<'a, REG> +pub type Mteth0txW<'a, REG> = crate::BitWriter<'a, REG, Mteth0tx>; +impl<'a, REG> Mteth0txW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTETH0TX_A::VALUE1) + self.variant(Mteth0tx::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTETH0TX_A::VALUE2) + self.variant(Mteth0tx::Value2) } } -#[doc = "Field `MTETH0RX` reader - Test Enable Control for ETH RX Memory"] -pub type MTETH0RX_R = crate::BitReader; #[doc = "Test Enable Control for ETH RX Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTETH0RX_A { +pub enum Mteth0rx { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTETH0RX_A) -> Self { + fn from(variant: Mteth0rx) -> Self { variant as u8 != 0 } } -impl MTETH0RX_R { +#[doc = "Field `MTETH0RX` reader - Test Enable Control for ETH RX Memory"] +pub type Mteth0rxR = crate::BitReader; +impl Mteth0rxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTETH0RX_A { + pub const fn variant(&self) -> Mteth0rx { match self.bits { - false => MTETH0RX_A::VALUE1, - true => MTETH0RX_A::VALUE2, + false => Mteth0rx::Value1, + true => Mteth0rx::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTETH0RX_A::VALUE1 + *self == Mteth0rx::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTETH0RX_A::VALUE2 + *self == Mteth0rx::Value2 } } #[doc = "Field `MTETH0RX` writer - Test Enable Control for ETH RX Memory"] -pub type MTETH0RX_W<'a, REG> = crate::BitWriter<'a, REG, MTETH0RX_A>; -impl<'a, REG> MTETH0RX_W<'a, REG> +pub type Mteth0rxW<'a, REG> = crate::BitWriter<'a, REG, Mteth0rx>; +impl<'a, REG> Mteth0rxW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTETH0RX_A::VALUE1) + self.variant(Mteth0rx::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTETH0RX_A::VALUE2) + self.variant(Mteth0rx::Value2) } } -#[doc = "Field `MTSD0` reader - Test Enable Control for SDMMC Memory 0"] -pub type MTSD0_R = crate::BitReader; #[doc = "Test Enable Control for SDMMC Memory 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTSD0_A { +pub enum Mtsd0 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTSD0_A) -> Self { + fn from(variant: Mtsd0) -> Self { variant as u8 != 0 } } -impl MTSD0_R { +#[doc = "Field `MTSD0` reader - Test Enable Control for SDMMC Memory 0"] +pub type Mtsd0R = crate::BitReader; +impl Mtsd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTSD0_A { + pub const fn variant(&self) -> Mtsd0 { match self.bits { - false => MTSD0_A::VALUE1, - true => MTSD0_A::VALUE2, + false => Mtsd0::Value1, + true => Mtsd0::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTSD0_A::VALUE1 + *self == Mtsd0::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTSD0_A::VALUE2 + *self == Mtsd0::Value2 } } #[doc = "Field `MTSD0` writer - Test Enable Control for SDMMC Memory 0"] -pub type MTSD0_W<'a, REG> = crate::BitWriter<'a, REG, MTSD0_A>; -impl<'a, REG> MTSD0_W<'a, REG> +pub type Mtsd0W<'a, REG> = crate::BitWriter<'a, REG, Mtsd0>; +impl<'a, REG> Mtsd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTSD0_A::VALUE1) + self.variant(Mtsd0::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTSD0_A::VALUE2) + self.variant(Mtsd0::Value2) } } -#[doc = "Field `MTSD1` reader - Test Enable Control for SDMMC Memory 1"] -pub type MTSD1_R = crate::BitReader; #[doc = "Test Enable Control for SDMMC Memory 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTSD1_A { +pub enum Mtsd1 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTSD1_A) -> Self { + fn from(variant: Mtsd1) -> Self { variant as u8 != 0 } } -impl MTSD1_R { +#[doc = "Field `MTSD1` reader - Test Enable Control for SDMMC Memory 1"] +pub type Mtsd1R = crate::BitReader; +impl Mtsd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTSD1_A { + pub const fn variant(&self) -> Mtsd1 { match self.bits { - false => MTSD1_A::VALUE1, - true => MTSD1_A::VALUE2, + false => Mtsd1::Value1, + true => Mtsd1::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTSD1_A::VALUE1 + *self == Mtsd1::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTSD1_A::VALUE2 + *self == Mtsd1::Value2 } } #[doc = "Field `MTSD1` writer - Test Enable Control for SDMMC Memory 1"] -pub type MTSD1_W<'a, REG> = crate::BitWriter<'a, REG, MTSD1_A>; -impl<'a, REG> MTSD1_W<'a, REG> +pub type Mtsd1W<'a, REG> = crate::BitWriter<'a, REG, Mtsd1>; +impl<'a, REG> Mtsd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTSD1_A::VALUE1) + self.variant(Mtsd1::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTSD1_A::VALUE2) + self.variant(Mtsd1::Value2) } } -#[doc = "Field `MTECAT0` reader - Test Enable Control for ECAT0 Memory"] -pub type MTECAT0_R = crate::BitReader; #[doc = "Test Enable Control for ECAT0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MTECAT0_A { +pub enum Mtecat0 { #[doc = "0: Standard operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Parity bits under test"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MTECAT0_A) -> Self { + fn from(variant: Mtecat0) -> Self { variant as u8 != 0 } } -impl MTECAT0_R { +#[doc = "Field `MTECAT0` reader - Test Enable Control for ECAT0 Memory"] +pub type Mtecat0R = crate::BitReader; +impl Mtecat0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MTECAT0_A { + pub const fn variant(&self) -> Mtecat0 { match self.bits { - false => MTECAT0_A::VALUE1, - true => MTECAT0_A::VALUE2, + false => Mtecat0::Value1, + true => Mtecat0::Value2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MTECAT0_A::VALUE1 + *self == Mtecat0::Value1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MTECAT0_A::VALUE2 + *self == Mtecat0::Value2 } } #[doc = "Field `MTECAT0` writer - Test Enable Control for ECAT0 Memory"] -pub type MTECAT0_W<'a, REG> = crate::BitWriter<'a, REG, MTECAT0_A>; -impl<'a, REG> MTECAT0_W<'a, REG> +pub type Mtecat0W<'a, REG> = crate::BitWriter<'a, REG, Mtecat0>; +impl<'a, REG> Mtecat0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTECAT0_A::VALUE1) + self.variant(Mtecat0::Value1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTECAT0_A::VALUE2) + self.variant(Mtecat0::Value2) } } impl R { #[doc = "Bit 0 - Test Enable Control for PSRAM"] #[inline(always)] - pub fn mtenps(&self) -> MTENPS_R { - MTENPS_R::new((self.bits & 1) != 0) + pub fn mtenps(&self) -> MtenpsR { + MtenpsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Test Enable Control for DSRAM1"] #[inline(always)] - pub fn mtends1(&self) -> MTENDS1_R { - MTENDS1_R::new(((self.bits >> 1) & 1) != 0) + pub fn mtends1(&self) -> Mtends1R { + Mtends1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Test Enable Control for DSRAM2"] #[inline(always)] - pub fn mtends2(&self) -> MTENDS2_R { - MTENDS2_R::new(((self.bits >> 2) & 1) != 0) + pub fn mtends2(&self) -> Mtends2R { + Mtends2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"] #[inline(always)] - pub fn mteu0(&self) -> MTEU0_R { - MTEU0_R::new(((self.bits >> 8) & 1) != 0) + pub fn mteu0(&self) -> Mteu0R { + Mteu0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"] #[inline(always)] - pub fn mteu1(&self) -> MTEU1_R { - MTEU1_R::new(((self.bits >> 9) & 1) != 0) + pub fn mteu1(&self) -> Mteu1R { + Mteu1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Test Enable Control for USIC2 Memory"] #[inline(always)] - pub fn mteu2(&self) -> MTEU2_R { - MTEU2_R::new(((self.bits >> 10) & 1) != 0) + pub fn mteu2(&self) -> Mteu2R { + Mteu2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"] #[inline(always)] - pub fn mtemc(&self) -> MTEMC_R { - MTEMC_R::new(((self.bits >> 12) & 1) != 0) + pub fn mtemc(&self) -> MtemcR { + MtemcR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"] #[inline(always)] - pub fn mtepprf(&self) -> MTEPPRF_R { - MTEPPRF_R::new(((self.bits >> 13) & 1) != 0) + pub fn mtepprf(&self) -> MtepprfR { + MtepprfR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Test Enable Control for USB Memory"] #[inline(always)] - pub fn mtusb(&self) -> MTUSB_R { - MTUSB_R::new(((self.bits >> 16) & 1) != 0) + pub fn mtusb(&self) -> MtusbR { + MtusbR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Test Enable Control for ETH TX Memory"] #[inline(always)] - pub fn mteth0tx(&self) -> MTETH0TX_R { - MTETH0TX_R::new(((self.bits >> 17) & 1) != 0) + pub fn mteth0tx(&self) -> Mteth0txR { + Mteth0txR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Test Enable Control for ETH RX Memory"] #[inline(always)] - pub fn mteth0rx(&self) -> MTETH0RX_R { - MTETH0RX_R::new(((self.bits >> 18) & 1) != 0) + pub fn mteth0rx(&self) -> Mteth0rxR { + Mteth0rxR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Test Enable Control for SDMMC Memory 0"] #[inline(always)] - pub fn mtsd0(&self) -> MTSD0_R { - MTSD0_R::new(((self.bits >> 19) & 1) != 0) + pub fn mtsd0(&self) -> Mtsd0R { + Mtsd0R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Test Enable Control for SDMMC Memory 1"] #[inline(always)] - pub fn mtsd1(&self) -> MTSD1_R { - MTSD1_R::new(((self.bits >> 20) & 1) != 0) + pub fn mtsd1(&self) -> Mtsd1R { + Mtsd1R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Test Enable Control for ECAT0 Memory"] #[inline(always)] - pub fn mtecat0(&self) -> MTECAT0_R { - MTECAT0_R::new(((self.bits >> 24) & 1) != 0) + pub fn mtecat0(&self) -> Mtecat0R { + Mtecat0R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Test Enable Control for PSRAM"] #[inline(always)] #[must_use] - pub fn mtenps(&mut self) -> MTENPS_W { - MTENPS_W::new(self, 0) + pub fn mtenps(&mut self) -> MtenpsW { + MtenpsW::new(self, 0) } #[doc = "Bit 1 - Test Enable Control for DSRAM1"] #[inline(always)] #[must_use] - pub fn mtends1(&mut self) -> MTENDS1_W { - MTENDS1_W::new(self, 1) + pub fn mtends1(&mut self) -> Mtends1W { + Mtends1W::new(self, 1) } #[doc = "Bit 2 - Test Enable Control for DSRAM2"] #[inline(always)] #[must_use] - pub fn mtends2(&mut self) -> MTENDS2_W { - MTENDS2_W::new(self, 2) + pub fn mtends2(&mut self) -> Mtends2W { + Mtends2W::new(self, 2) } #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn mteu0(&mut self) -> MTEU0_W { - MTEU0_W::new(self, 8) + pub fn mteu0(&mut self) -> Mteu0W { + Mteu0W::new(self, 8) } #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn mteu1(&mut self) -> MTEU1_W { - MTEU1_W::new(self, 9) + pub fn mteu1(&mut self) -> Mteu1W { + Mteu1W::new(self, 9) } #[doc = "Bit 10 - Test Enable Control for USIC2 Memory"] #[inline(always)] #[must_use] - pub fn mteu2(&mut self) -> MTEU2_W { - MTEU2_W::new(self, 10) + pub fn mteu2(&mut self) -> Mteu2W { + Mteu2W::new(self, 10) } #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn mtemc(&mut self) -> MTEMC_W { - MTEMC_W::new(self, 12) + pub fn mtemc(&mut self) -> MtemcW { + MtemcW::new(self, 12) } #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn mtepprf(&mut self) -> MTEPPRF_W { - MTEPPRF_W::new(self, 13) + pub fn mtepprf(&mut self) -> MtepprfW { + MtepprfW::new(self, 13) } #[doc = "Bit 16 - Test Enable Control for USB Memory"] #[inline(always)] #[must_use] - pub fn mtusb(&mut self) -> MTUSB_W { - MTUSB_W::new(self, 16) + pub fn mtusb(&mut self) -> MtusbW { + MtusbW::new(self, 16) } #[doc = "Bit 17 - Test Enable Control for ETH TX Memory"] #[inline(always)] #[must_use] - pub fn mteth0tx(&mut self) -> MTETH0TX_W { - MTETH0TX_W::new(self, 17) + pub fn mteth0tx(&mut self) -> Mteth0txW { + Mteth0txW::new(self, 17) } #[doc = "Bit 18 - Test Enable Control for ETH RX Memory"] #[inline(always)] #[must_use] - pub fn mteth0rx(&mut self) -> MTETH0RX_W { - MTETH0RX_W::new(self, 18) + pub fn mteth0rx(&mut self) -> Mteth0rxW { + Mteth0rxW::new(self, 18) } #[doc = "Bit 19 - Test Enable Control for SDMMC Memory 0"] #[inline(always)] #[must_use] - pub fn mtsd0(&mut self) -> MTSD0_W { - MTSD0_W::new(self, 19) + pub fn mtsd0(&mut self) -> Mtsd0W { + Mtsd0W::new(self, 19) } #[doc = "Bit 20 - Test Enable Control for SDMMC Memory 1"] #[inline(always)] #[must_use] - pub fn mtsd1(&mut self) -> MTSD1_W { - MTSD1_W::new(self, 20) + pub fn mtsd1(&mut self) -> Mtsd1W { + Mtsd1W::new(self, 20) } #[doc = "Bit 24 - Test Enable Control for ECAT0 Memory"] #[inline(always)] #[must_use] - pub fn mtecat0(&mut self) -> MTECAT0_W { - MTECAT0_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mtecat0(&mut self) -> Mtecat0W { + Mtecat0W::new(self, 24) } } #[doc = "Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PMTSR_SPEC; -impl crate::RegisterSpec for PMTSR_SPEC { +pub struct PmtsrSpec; +impl crate::RegisterSpec for PmtsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`pmtsr::R`](R) reader structure"] -impl crate::Readable for PMTSR_SPEC {} +impl crate::Readable for PmtsrSpec {} #[doc = "`write(|w| ..)` method takes [`pmtsr::W`](W) writer structure"] -impl crate::Writable for PMTSR_SPEC { +impl crate::Writable for PmtsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMTSR to value 0"] -impl crate::Resettable for PMTSR_SPEC { +impl crate::Resettable for PmtsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll.rs b/src/scu_pll.rs index 01bd6ee0..1b33bf26 100644 --- a/src/scu_pll.rs +++ b/src/scu_pll.rs @@ -1,84 +1,91 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - pllstat: PLLSTAT, - pllcon0: PLLCON0, - pllcon1: PLLCON1, - pllcon2: PLLCON2, - usbpllstat: USBPLLSTAT, - usbpllcon: USBPLLCON, + pllstat: Pllstat, + pllcon0: Pllcon0, + pllcon1: Pllcon1, + pllcon2: Pllcon2, + usbpllstat: Usbpllstat, + usbpllcon: Usbpllcon, _reserved6: [u8; 0x10], - clkmxstat: CLKMXSTAT, + clkmxstat: Clkmxstat, } impl RegisterBlock { #[doc = "0x00 - PLL Status Register"] #[inline(always)] - pub const fn pllstat(&self) -> &PLLSTAT { + pub const fn pllstat(&self) -> &Pllstat { &self.pllstat } #[doc = "0x04 - PLL Configuration 0 Register"] #[inline(always)] - pub const fn pllcon0(&self) -> &PLLCON0 { + pub const fn pllcon0(&self) -> &Pllcon0 { &self.pllcon0 } #[doc = "0x08 - PLL Configuration 1 Register"] #[inline(always)] - pub const fn pllcon1(&self) -> &PLLCON1 { + pub const fn pllcon1(&self) -> &Pllcon1 { &self.pllcon1 } #[doc = "0x0c - PLL Configuration 2 Register"] #[inline(always)] - pub const fn pllcon2(&self) -> &PLLCON2 { + pub const fn pllcon2(&self) -> &Pllcon2 { &self.pllcon2 } #[doc = "0x10 - USB PLL Status Register"] #[inline(always)] - pub const fn usbpllstat(&self) -> &USBPLLSTAT { + pub const fn usbpllstat(&self) -> &Usbpllstat { &self.usbpllstat } #[doc = "0x14 - USB PLL Configuration Register"] #[inline(always)] - pub const fn usbpllcon(&self) -> &USBPLLCON { + pub const fn usbpllcon(&self) -> &Usbpllcon { &self.usbpllcon } #[doc = "0x28 - Clock Multiplexing Status Register"] #[inline(always)] - pub const fn clkmxstat(&self) -> &CLKMXSTAT { + pub const fn clkmxstat(&self) -> &Clkmxstat { &self.clkmxstat } } #[doc = "PLLSTAT (r) register accessor: PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllstat`] module"] -pub type PLLSTAT = crate::Reg; +#[doc(alias = "PLLSTAT")] +pub type Pllstat = crate::Reg; #[doc = "PLL Status Register"] pub mod pllstat; #[doc = "PLLCON0 (rw) register accessor: PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon0`] module"] -pub type PLLCON0 = crate::Reg; +#[doc(alias = "PLLCON0")] +pub type Pllcon0 = crate::Reg; #[doc = "PLL Configuration 0 Register"] pub mod pllcon0; #[doc = "PLLCON1 (rw) register accessor: PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon1`] module"] -pub type PLLCON1 = crate::Reg; +#[doc(alias = "PLLCON1")] +pub type Pllcon1 = crate::Reg; #[doc = "PLL Configuration 1 Register"] pub mod pllcon1; #[doc = "PLLCON2 (rw) register accessor: PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon2`] module"] -pub type PLLCON2 = crate::Reg; +#[doc(alias = "PLLCON2")] +pub type Pllcon2 = crate::Reg; #[doc = "PLL Configuration 2 Register"] pub mod pllcon2; #[doc = "USBPLLSTAT (r) register accessor: USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllstat`] module"] -pub type USBPLLSTAT = crate::Reg; +#[doc(alias = "USBPLLSTAT")] +pub type Usbpllstat = crate::Reg; #[doc = "USB PLL Status Register"] pub mod usbpllstat; #[doc = "USBPLLCON (rw) register accessor: USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllcon`] module"] -pub type USBPLLCON = crate::Reg; +#[doc(alias = "USBPLLCON")] +pub type Usbpllcon = crate::Reg; #[doc = "USB PLL Configuration Register"] pub mod usbpllcon; #[doc = "CLKMXSTAT (r) register accessor: Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkmxstat`] module"] -pub type CLKMXSTAT = crate::Reg; +#[doc(alias = "CLKMXSTAT")] +pub type Clkmxstat = crate::Reg; #[doc = "Clock Multiplexing Status Register"] pub mod clkmxstat; diff --git a/src/scu_pll/clkmxstat.rs b/src/scu_pll/clkmxstat.rs index a4d84b30..f8cb1fb7 100644 --- a/src/scu_pll/clkmxstat.rs +++ b/src/scu_pll/clkmxstat.rs @@ -1,61 +1,61 @@ #[doc = "Register `CLKMXSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `SYSCLKMUX` reader - Status of System Clock Multiplexing Upon Source Switching"] -pub type SYSCLKMUX_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Status of System Clock Multiplexing Upon Source Switching\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SYSCLKMUX_A { +pub enum Sysclkmux { #[doc = "1: fOFI clock active"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: fPLL clock active"] - VALUE2 = 2, + Value2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SYSCLKMUX_A) -> Self { + fn from(variant: Sysclkmux) -> Self { variant as _ } } -impl crate::FieldSpec for SYSCLKMUX_A { +impl crate::FieldSpec for Sysclkmux { type Ux = u8; } -impl SYSCLKMUX_R { +#[doc = "Field `SYSCLKMUX` reader - Status of System Clock Multiplexing Upon Source Switching"] +pub type SysclkmuxR = crate::FieldReader; +impl SysclkmuxR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(SYSCLKMUX_A::VALUE1), - 2 => Some(SYSCLKMUX_A::VALUE2), + 1 => Some(Sysclkmux::Value1), + 2 => Some(Sysclkmux::Value2), _ => None, } } #[doc = "fOFI clock active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSCLKMUX_A::VALUE1 + *self == Sysclkmux::Value1 } #[doc = "fPLL clock active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYSCLKMUX_A::VALUE2 + *self == Sysclkmux::Value2 } } impl R { #[doc = "Bits 0:1 - Status of System Clock Multiplexing Upon Source Switching"] #[inline(always)] - pub fn sysclkmux(&self) -> SYSCLKMUX_R { - SYSCLKMUX_R::new((self.bits & 3) as u8) + pub fn sysclkmux(&self) -> SysclkmuxR { + SysclkmuxR::new((self.bits & 3) as u8) } } #[doc = "Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKMXSTAT_SPEC; -impl crate::RegisterSpec for CLKMXSTAT_SPEC { +pub struct ClkmxstatSpec; +impl crate::RegisterSpec for ClkmxstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`clkmxstat::R`](R) reader structure"] -impl crate::Readable for CLKMXSTAT_SPEC {} +impl crate::Readable for ClkmxstatSpec {} #[doc = "`reset()` method sets CLKMXSTAT to value 0"] -impl crate::Resettable for CLKMXSTAT_SPEC { +impl crate::Resettable for ClkmxstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll/pllcon0.rs b/src/scu_pll/pllcon0.rs index c0cfa9c7..4d527058 100644 --- a/src/scu_pll/pllcon0.rs +++ b/src/scu_pll/pllcon0.rs @@ -1,618 +1,609 @@ #[doc = "Register `PLLCON0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON0` writer"] -pub type W = crate::W; -#[doc = "Field `VCOBYP` reader - VCO Bypass"] -pub type VCOBYP_R = crate::BitReader; +pub type W = crate::W; #[doc = "VCO Bypass\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOBYP_A { +pub enum Vcobyp { #[doc = "0: Normal operation, VCO is not bypassed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler Mode, VCO is bypassed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOBYP_A) -> Self { + fn from(variant: Vcobyp) -> Self { variant as u8 != 0 } } -impl VCOBYP_R { +#[doc = "Field `VCOBYP` reader - VCO Bypass"] +pub type VcobypR = crate::BitReader; +impl VcobypR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOBYP_A { + pub const fn variant(&self) -> Vcobyp { match self.bits { - false => VCOBYP_A::VALUE1, - true => VCOBYP_A::VALUE2, + false => Vcobyp::Value1, + true => Vcobyp::Value2, } } #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOBYP_A::VALUE1 + *self == Vcobyp::Value1 } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOBYP_A::VALUE2 + *self == Vcobyp::Value2 } } #[doc = "Field `VCOBYP` writer - VCO Bypass"] -pub type VCOBYP_W<'a, REG> = crate::BitWriter<'a, REG, VCOBYP_A>; -impl<'a, REG> VCOBYP_W<'a, REG> +pub type VcobypW<'a, REG> = crate::BitWriter<'a, REG, Vcobyp>; +impl<'a, REG> VcobypW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOBYP_A::VALUE1) + self.variant(Vcobyp::Value1) } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOBYP_A::VALUE2) + self.variant(Vcobyp::Value2) } } -#[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] -pub type VCOPWD_R = crate::BitReader; #[doc = "VCO Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOPWD_A { +pub enum Vcopwd { #[doc = "0: Normal behavior"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOPWD_A) -> Self { + fn from(variant: Vcopwd) -> Self { variant as u8 != 0 } } -impl VCOPWD_R { +#[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] +pub type VcopwdR = crate::BitReader; +impl VcopwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOPWD_A { + pub const fn variant(&self) -> Vcopwd { match self.bits { - false => VCOPWD_A::VALUE1, - true => VCOPWD_A::VALUE2, + false => Vcopwd::Value1, + true => Vcopwd::Value2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOPWD_A::VALUE1 + *self == Vcopwd::Value1 } #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOPWD_A::VALUE2 + *self == Vcopwd::Value2 } } #[doc = "Field `VCOPWD` writer - VCO Power Saving Mode"] -pub type VCOPWD_W<'a, REG> = crate::BitWriter<'a, REG, VCOPWD_A>; -impl<'a, REG> VCOPWD_W<'a, REG> +pub type VcopwdW<'a, REG> = crate::BitWriter<'a, REG, Vcopwd>; +impl<'a, REG> VcopwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOPWD_A::VALUE1) + self.variant(Vcopwd::Value1) } #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOPWD_A::VALUE2) + self.variant(Vcopwd::Value2) } } -#[doc = "Field `VCOTR` reader - VCO Trim Control"] -pub type VCOTR_R = crate::BitReader; #[doc = "VCO Trim Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOTR_A { +pub enum Vcotr { #[doc = "0: VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOTR_A) -> Self { + fn from(variant: Vcotr) -> Self { variant as u8 != 0 } } -impl VCOTR_R { +#[doc = "Field `VCOTR` reader - VCO Trim Control"] +pub type VcotrR = crate::BitReader; +impl VcotrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOTR_A { + pub const fn variant(&self) -> Vcotr { match self.bits { - false => VCOTR_A::VALUE1, - true => VCOTR_A::VALUE2, + false => Vcotr::Value1, + true => Vcotr::Value2, } } #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOTR_A::VALUE1 + *self == Vcotr::Value1 } #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOTR_A::VALUE2 + *self == Vcotr::Value2 } } #[doc = "Field `VCOTR` writer - VCO Trim Control"] -pub type VCOTR_W<'a, REG> = crate::BitWriter<'a, REG, VCOTR_A>; -impl<'a, REG> VCOTR_W<'a, REG> +pub type VcotrW<'a, REG> = crate::BitWriter<'a, REG, Vcotr>; +impl<'a, REG> VcotrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOTR_A::VALUE1) + self.variant(Vcotr::Value1) } #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOTR_A::VALUE2) + self.variant(Vcotr::Value2) } } -#[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] -pub type FINDIS_R = crate::BitReader; #[doc = "Disconnect Oscillator from VCO\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FINDIS_A { +pub enum Findis { #[doc = "0: connect oscillator to the VCO part"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: disconnect oscillator from the VCO part."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FINDIS_A) -> Self { + fn from(variant: Findis) -> Self { variant as u8 != 0 } } -impl FINDIS_R { +#[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] +pub type FindisR = crate::BitReader; +impl FindisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FINDIS_A { + pub const fn variant(&self) -> Findis { match self.bits { - false => FINDIS_A::VALUE1, - true => FINDIS_A::VALUE2, + false => Findis::Value1, + true => Findis::Value2, } } #[doc = "connect oscillator to the VCO part"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FINDIS_A::VALUE1 + *self == Findis::Value1 } #[doc = "disconnect oscillator from the VCO part."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FINDIS_A::VALUE2 + *self == Findis::Value2 } } #[doc = "Field `FINDIS` writer - Disconnect Oscillator from VCO"] -pub type FINDIS_W<'a, REG> = crate::BitWriter<'a, REG, FINDIS_A>; -impl<'a, REG> FINDIS_W<'a, REG> +pub type FindisW<'a, REG> = crate::BitWriter<'a, REG, Findis>; +impl<'a, REG> FindisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "connect oscillator to the VCO part"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FINDIS_A::VALUE1) + self.variant(Findis::Value1) } #[doc = "disconnect oscillator from the VCO part."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FINDIS_A::VALUE2) + self.variant(Findis::Value2) } } -#[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] -pub type OSCDISCDIS_R = crate::BitReader; #[doc = "Oscillator Disconnect Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCDISCDIS_A { +pub enum Oscdiscdis { #[doc = "0: In case of a PLL loss-of-lock bit FINDIS is set"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: In case of a PLL loss-of-lock bit FINDIS is cleared"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCDISCDIS_A) -> Self { + fn from(variant: Oscdiscdis) -> Self { variant as u8 != 0 } } -impl OSCDISCDIS_R { +#[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] +pub type OscdiscdisR = crate::BitReader; +impl OscdiscdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCDISCDIS_A { + pub const fn variant(&self) -> Oscdiscdis { match self.bits { - false => OSCDISCDIS_A::VALUE1, - true => OSCDISCDIS_A::VALUE2, + false => Oscdiscdis::Value1, + true => Oscdiscdis::Value2, } } #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCDISCDIS_A::VALUE1 + *self == Oscdiscdis::Value1 } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCDISCDIS_A::VALUE2 + *self == Oscdiscdis::Value2 } } #[doc = "Field `OSCDISCDIS` writer - Oscillator Disconnect Disable"] -pub type OSCDISCDIS_W<'a, REG> = crate::BitWriter<'a, REG, OSCDISCDIS_A>; -impl<'a, REG> OSCDISCDIS_W<'a, REG> +pub type OscdiscdisW<'a, REG> = crate::BitWriter<'a, REG, Oscdiscdis>; +impl<'a, REG> OscdiscdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCDISCDIS_A::VALUE1) + self.variant(Oscdiscdis::Value1) } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCDISCDIS_A::VALUE2) + self.variant(Oscdiscdis::Value2) } } -#[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] -pub type PLLPWD_R = crate::BitReader; #[doc = "PLL Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLPWD_A { +pub enum Pllpwd { #[doc = "0: Normal behavior"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLPWD_A) -> Self { + fn from(variant: Pllpwd) -> Self { variant as u8 != 0 } } -impl PLLPWD_R { +#[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] +pub type PllpwdR = crate::BitReader; +impl PllpwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLPWD_A { + pub const fn variant(&self) -> Pllpwd { match self.bits { - false => PLLPWD_A::VALUE1, - true => PLLPWD_A::VALUE2, + false => Pllpwd::Value1, + true => Pllpwd::Value2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLPWD_A::VALUE1 + *self == Pllpwd::Value1 } #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLPWD_A::VALUE2 + *self == Pllpwd::Value2 } } #[doc = "Field `PLLPWD` writer - PLL Power Saving Mode"] -pub type PLLPWD_W<'a, REG> = crate::BitWriter<'a, REG, PLLPWD_A>; -impl<'a, REG> PLLPWD_W<'a, REG> +pub type PllpwdW<'a, REG> = crate::BitWriter<'a, REG, Pllpwd>; +impl<'a, REG> PllpwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PLLPWD_A::VALUE1) + self.variant(Pllpwd::Value1) } #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PLLPWD_A::VALUE2) + self.variant(Pllpwd::Value2) } } -#[doc = "Field `OSCRES` reader - Oscillator Watchdog Reset"] -pub type OSCRES_R = crate::BitReader; #[doc = "Oscillator Watchdog Reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCRES_A { +pub enum Oscres { #[doc = "0: The Oscillator Watchdog of the PLL is not cleared and remains active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The Oscillator Watchdog of the PLL is cleared and restarted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCRES_A) -> Self { + fn from(variant: Oscres) -> Self { variant as u8 != 0 } } -impl OSCRES_R { +#[doc = "Field `OSCRES` reader - Oscillator Watchdog Reset"] +pub type OscresR = crate::BitReader; +impl OscresR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCRES_A { + pub const fn variant(&self) -> Oscres { match self.bits { - false => OSCRES_A::VALUE1, - true => OSCRES_A::VALUE2, + false => Oscres::Value1, + true => Oscres::Value2, } } #[doc = "The Oscillator Watchdog of the PLL is not cleared and remains active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCRES_A::VALUE1 + *self == Oscres::Value1 } #[doc = "The Oscillator Watchdog of the PLL is cleared and restarted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCRES_A::VALUE2 + *self == Oscres::Value2 } } #[doc = "Field `OSCRES` writer - Oscillator Watchdog Reset"] -pub type OSCRES_W<'a, REG> = crate::BitWriter<'a, REG, OSCRES_A>; -impl<'a, REG> OSCRES_W<'a, REG> +pub type OscresW<'a, REG> = crate::BitWriter<'a, REG, Oscres>; +impl<'a, REG> OscresW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The Oscillator Watchdog of the PLL is not cleared and remains active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCRES_A::VALUE1) + self.variant(Oscres::Value1) } #[doc = "The Oscillator Watchdog of the PLL is cleared and restarted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCRES_A::VALUE2) + self.variant(Oscres::Value2) } } #[doc = "Field `RESLD` writer - Restart VCO Lock Detection"] -pub type RESLD_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `AOTREN` reader - Automatic Oscillator Calibration Enable"] -pub type AOTREN_R = crate::BitReader; +pub type ResldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Automatic Oscillator Calibration Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AOTREN_A { +pub enum Aotren { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AOTREN_A) -> Self { + fn from(variant: Aotren) -> Self { variant as u8 != 0 } } -impl AOTREN_R { +#[doc = "Field `AOTREN` reader - Automatic Oscillator Calibration Enable"] +pub type AotrenR = crate::BitReader; +impl AotrenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AOTREN_A { + pub const fn variant(&self) -> Aotren { match self.bits { - false => AOTREN_A::VALUE1, - true => AOTREN_A::VALUE2, + false => Aotren::Value1, + true => Aotren::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AOTREN_A::VALUE1 + *self == Aotren::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AOTREN_A::VALUE2 + *self == Aotren::Value2 } } #[doc = "Field `AOTREN` writer - Automatic Oscillator Calibration Enable"] -pub type AOTREN_W<'a, REG> = crate::BitWriter<'a, REG, AOTREN_A>; -impl<'a, REG> AOTREN_W<'a, REG> +pub type AotrenW<'a, REG> = crate::BitWriter<'a, REG, Aotren>; +impl<'a, REG> AotrenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AOTREN_A::VALUE1) + self.variant(Aotren::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AOTREN_A::VALUE2) + self.variant(Aotren::Value2) } } -#[doc = "Field `FOTR` reader - Factory Oscillator Calibration"] -pub type FOTR_R = crate::BitReader; #[doc = "Factory Oscillator Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FOTR_A { +pub enum Fotr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Force fixed-value trimming"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FOTR_A) -> Self { + fn from(variant: Fotr) -> Self { variant as u8 != 0 } } -impl FOTR_R { +#[doc = "Field `FOTR` reader - Factory Oscillator Calibration"] +pub type FotrR = crate::BitReader; +impl FotrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FOTR_A { + pub const fn variant(&self) -> Fotr { match self.bits { - false => FOTR_A::VALUE1, - true => FOTR_A::VALUE2, + false => Fotr::Value1, + true => Fotr::Value2, } } #[doc = "No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FOTR_A::VALUE1 + *self == Fotr::Value1 } #[doc = "Force fixed-value trimming"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FOTR_A::VALUE2 + *self == Fotr::Value2 } } #[doc = "Field `FOTR` writer - Factory Oscillator Calibration"] -pub type FOTR_W<'a, REG> = crate::BitWriter<'a, REG, FOTR_A>; -impl<'a, REG> FOTR_W<'a, REG> +pub type FotrW<'a, REG> = crate::BitWriter<'a, REG, Fotr>; +impl<'a, REG> FotrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FOTR_A::VALUE1) + self.variant(Fotr::Value1) } #[doc = "Force fixed-value trimming"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FOTR_A::VALUE2) + self.variant(Fotr::Value2) } } impl R { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - pub fn vcobyp(&self) -> VCOBYP_R { - VCOBYP_R::new((self.bits & 1) != 0) + pub fn vcobyp(&self) -> VcobypR { + VcobypR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - pub fn vcopwd(&self) -> VCOPWD_R { - VCOPWD_R::new(((self.bits >> 1) & 1) != 0) + pub fn vcopwd(&self) -> VcopwdR { + VcopwdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - pub fn vcotr(&self) -> VCOTR_R { - VCOTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn vcotr(&self) -> VcotrR { + VcotrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - pub fn findis(&self) -> FINDIS_R { - FINDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn findis(&self) -> FindisR { + FindisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - pub fn oscdiscdis(&self) -> OSCDISCDIS_R { - OSCDISCDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn oscdiscdis(&self) -> OscdiscdisR { + OscdiscdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - pub fn pllpwd(&self) -> PLLPWD_R { - PLLPWD_R::new(((self.bits >> 16) & 1) != 0) + pub fn pllpwd(&self) -> PllpwdR { + PllpwdR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Oscillator Watchdog Reset"] #[inline(always)] - pub fn oscres(&self) -> OSCRES_R { - OSCRES_R::new(((self.bits >> 17) & 1) != 0) + pub fn oscres(&self) -> OscresR { + OscresR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"] #[inline(always)] - pub fn aotren(&self) -> AOTREN_R { - AOTREN_R::new(((self.bits >> 19) & 1) != 0) + pub fn aotren(&self) -> AotrenR { + AotrenR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Factory Oscillator Calibration"] #[inline(always)] - pub fn fotr(&self) -> FOTR_R { - FOTR_R::new(((self.bits >> 20) & 1) != 0) + pub fn fotr(&self) -> FotrR { + FotrR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] #[must_use] - pub fn vcobyp(&mut self) -> VCOBYP_W { - VCOBYP_W::new(self, 0) + pub fn vcobyp(&mut self) -> VcobypW { + VcobypW::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] #[must_use] - pub fn vcopwd(&mut self) -> VCOPWD_W { - VCOPWD_W::new(self, 1) + pub fn vcopwd(&mut self) -> VcopwdW { + VcopwdW::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] #[must_use] - pub fn vcotr(&mut self) -> VCOTR_W { - VCOTR_W::new(self, 2) + pub fn vcotr(&mut self) -> VcotrW { + VcotrW::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] #[must_use] - pub fn findis(&mut self) -> FINDIS_W { - FINDIS_W::new(self, 4) + pub fn findis(&mut self) -> FindisW { + FindisW::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] #[must_use] - pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { - OSCDISCDIS_W::new(self, 6) + pub fn oscdiscdis(&mut self) -> OscdiscdisW { + OscdiscdisW::new(self, 6) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] #[must_use] - pub fn pllpwd(&mut self) -> PLLPWD_W { - PLLPWD_W::new(self, 16) + pub fn pllpwd(&mut self) -> PllpwdW { + PllpwdW::new(self, 16) } #[doc = "Bit 17 - Oscillator Watchdog Reset"] #[inline(always)] #[must_use] - pub fn oscres(&mut self) -> OSCRES_W { - OSCRES_W::new(self, 17) + pub fn oscres(&mut self) -> OscresW { + OscresW::new(self, 17) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] #[must_use] - pub fn resld(&mut self) -> RESLD_W { - RESLD_W::new(self, 18) + pub fn resld(&mut self) -> ResldW { + ResldW::new(self, 18) } #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"] #[inline(always)] #[must_use] - pub fn aotren(&mut self) -> AOTREN_W { - AOTREN_W::new(self, 19) + pub fn aotren(&mut self) -> AotrenW { + AotrenW::new(self, 19) } #[doc = "Bit 20 - Factory Oscillator Calibration"] #[inline(always)] #[must_use] - pub fn fotr(&mut self) -> FOTR_W { - FOTR_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn fotr(&mut self) -> FotrW { + FotrW::new(self, 20) } } #[doc = "PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PLLCON0_SPEC; -impl crate::RegisterSpec for PLLCON0_SPEC { +pub struct Pllcon0Spec; +impl crate::RegisterSpec for Pllcon0Spec { type Ux = u32; } #[doc = "`read()` method returns [`pllcon0::R`](R) reader structure"] -impl crate::Readable for PLLCON0_SPEC {} +impl crate::Readable for Pllcon0Spec {} #[doc = "`write(|w| ..)` method takes [`pllcon0::W`](W) writer structure"] -impl crate::Writable for PLLCON0_SPEC { +impl crate::Writable for Pllcon0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON0 to value 0x0003_0003"] -impl crate::Resettable for PLLCON0_SPEC { +impl crate::Resettable for Pllcon0Spec { const RESET_VALUE: u32 = 0x0003_0003; } diff --git a/src/scu_pll/pllcon1.rs b/src/scu_pll/pllcon1.rs index 10547a80..a2aecb06 100644 --- a/src/scu_pll/pllcon1.rs +++ b/src/scu_pll/pllcon1.rs @@ -1,94 +1,85 @@ #[doc = "Register `PLLCON1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `K1DIV` reader - K1-Divider Value"] -pub type K1DIV_R = crate::FieldReader; +pub type K1divR = crate::FieldReader; #[doc = "Field `K1DIV` writer - K1-Divider Value"] -pub type K1DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type K1divW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `NDIV` reader - N-Divider Value"] -pub type NDIV_R = crate::FieldReader; +pub type NdivR = crate::FieldReader; #[doc = "Field `NDIV` writer - N-Divider Value"] -pub type NDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type NdivW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `K2DIV` reader - K2-Divider Value"] -pub type K2DIV_R = crate::FieldReader; +pub type K2divR = crate::FieldReader; #[doc = "Field `K2DIV` writer - K2-Divider Value"] -pub type K2DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type K2divW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PDIV` reader - P-Divider Value"] -pub type PDIV_R = crate::FieldReader; +pub type PdivR = crate::FieldReader; #[doc = "Field `PDIV` writer - P-Divider Value"] -pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - K1-Divider Value"] #[inline(always)] - pub fn k1div(&self) -> K1DIV_R { - K1DIV_R::new((self.bits & 0x7f) as u8) + pub fn k1div(&self) -> K1divR { + K1divR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - pub fn ndiv(&self) -> NDIV_R { - NDIV_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn ndiv(&self) -> NdivR { + NdivR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:22 - K2-Divider Value"] #[inline(always)] - pub fn k2div(&self) -> K2DIV_R { - K2DIV_R::new(((self.bits >> 16) & 0x7f) as u8) + pub fn k2div(&self) -> K2divR { + K2divR::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - pub fn pdiv(&self) -> PDIV_R { - PDIV_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pdiv(&self) -> PdivR { + PdivR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - K1-Divider Value"] #[inline(always)] #[must_use] - pub fn k1div(&mut self) -> K1DIV_W { - K1DIV_W::new(self, 0) + pub fn k1div(&mut self) -> K1divW { + K1divW::new(self, 0) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] #[must_use] - pub fn ndiv(&mut self) -> NDIV_W { - NDIV_W::new(self, 8) + pub fn ndiv(&mut self) -> NdivW { + NdivW::new(self, 8) } #[doc = "Bits 16:22 - K2-Divider Value"] #[inline(always)] #[must_use] - pub fn k2div(&mut self) -> K2DIV_W { - K2DIV_W::new(self, 16) + pub fn k2div(&mut self) -> K2divW { + K2divW::new(self, 16) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PDIV_W { - PDIV_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pdiv(&mut self) -> PdivW { + PdivW::new(self, 24) } } #[doc = "PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PLLCON1_SPEC; -impl crate::RegisterSpec for PLLCON1_SPEC { +pub struct Pllcon1Spec; +impl crate::RegisterSpec for Pllcon1Spec { type Ux = u32; } #[doc = "`read()` method returns [`pllcon1::R`](R) reader structure"] -impl crate::Readable for PLLCON1_SPEC {} +impl crate::Readable for Pllcon1Spec {} #[doc = "`write(|w| ..)` method takes [`pllcon1::W`](W) writer structure"] -impl crate::Writable for PLLCON1_SPEC { +impl crate::Writable for Pllcon1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON1 to value 0"] -impl crate::Resettable for PLLCON1_SPEC { +impl crate::Resettable for Pllcon1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll/pllcon2.rs b/src/scu_pll/pllcon2.rs index 4b2bd96f..3a449e05 100644 --- a/src/scu_pll/pllcon2.rs +++ b/src/scu_pll/pllcon2.rs @@ -1,162 +1,153 @@ #[doc = "Register `PLLCON2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON2` writer"] -pub type W = crate::W; -#[doc = "Field `PINSEL` reader - P-Divider Input Selection"] -pub type PINSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "P-Divider Input Selection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PINSEL_A { +pub enum Pinsel { #[doc = "0: PLL external oscillator selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Backup clock fofi selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PINSEL_A) -> Self { + fn from(variant: Pinsel) -> Self { variant as u8 != 0 } } -impl PINSEL_R { +#[doc = "Field `PINSEL` reader - P-Divider Input Selection"] +pub type PinselR = crate::BitReader; +impl PinselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PINSEL_A { + pub const fn variant(&self) -> Pinsel { match self.bits { - false => PINSEL_A::VALUE1, - true => PINSEL_A::VALUE2, + false => Pinsel::Value1, + true => Pinsel::Value2, } } #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PINSEL_A::VALUE1 + *self == Pinsel::Value1 } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PINSEL_A::VALUE2 + *self == Pinsel::Value2 } } #[doc = "Field `PINSEL` writer - P-Divider Input Selection"] -pub type PINSEL_W<'a, REG> = crate::BitWriter<'a, REG, PINSEL_A>; -impl<'a, REG> PINSEL_W<'a, REG> +pub type PinselW<'a, REG> = crate::BitWriter<'a, REG, Pinsel>; +impl<'a, REG> PinselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PINSEL_A::VALUE1) + self.variant(Pinsel::Value1) } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PINSEL_A::VALUE2) + self.variant(Pinsel::Value2) } } -#[doc = "Field `K1INSEL` reader - K1-Divider Input Selection"] -pub type K1INSEL_R = crate::BitReader; #[doc = "K1-Divider Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K1INSEL_A { +pub enum K1insel { #[doc = "0: PLL external oscillator selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Backup clock fofi selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K1INSEL_A) -> Self { + fn from(variant: K1insel) -> Self { variant as u8 != 0 } } -impl K1INSEL_R { +#[doc = "Field `K1INSEL` reader - K1-Divider Input Selection"] +pub type K1inselR = crate::BitReader; +impl K1inselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K1INSEL_A { + pub const fn variant(&self) -> K1insel { match self.bits { - false => K1INSEL_A::VALUE1, - true => K1INSEL_A::VALUE2, + false => K1insel::Value1, + true => K1insel::Value2, } } #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K1INSEL_A::VALUE1 + *self == K1insel::Value1 } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K1INSEL_A::VALUE2 + *self == K1insel::Value2 } } #[doc = "Field `K1INSEL` writer - K1-Divider Input Selection"] -pub type K1INSEL_W<'a, REG> = crate::BitWriter<'a, REG, K1INSEL_A>; -impl<'a, REG> K1INSEL_W<'a, REG> +pub type K1inselW<'a, REG> = crate::BitWriter<'a, REG, K1insel>; +impl<'a, REG> K1inselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(K1INSEL_A::VALUE1) + self.variant(K1insel::Value1) } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(K1INSEL_A::VALUE2) + self.variant(K1insel::Value2) } } impl R { #[doc = "Bit 0 - P-Divider Input Selection"] #[inline(always)] - pub fn pinsel(&self) -> PINSEL_R { - PINSEL_R::new((self.bits & 1) != 0) + pub fn pinsel(&self) -> PinselR { + PinselR::new((self.bits & 1) != 0) } #[doc = "Bit 8 - K1-Divider Input Selection"] #[inline(always)] - pub fn k1insel(&self) -> K1INSEL_R { - K1INSEL_R::new(((self.bits >> 8) & 1) != 0) + pub fn k1insel(&self) -> K1inselR { + K1inselR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - P-Divider Input Selection"] #[inline(always)] #[must_use] - pub fn pinsel(&mut self) -> PINSEL_W { - PINSEL_W::new(self, 0) + pub fn pinsel(&mut self) -> PinselW { + PinselW::new(self, 0) } #[doc = "Bit 8 - K1-Divider Input Selection"] #[inline(always)] #[must_use] - pub fn k1insel(&mut self) -> K1INSEL_W { - K1INSEL_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn k1insel(&mut self) -> K1inselW { + K1inselW::new(self, 8) } } #[doc = "PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PLLCON2_SPEC; -impl crate::RegisterSpec for PLLCON2_SPEC { +pub struct Pllcon2Spec; +impl crate::RegisterSpec for Pllcon2Spec { type Ux = u32; } #[doc = "`read()` method returns [`pllcon2::R`](R) reader structure"] -impl crate::Readable for PLLCON2_SPEC {} +impl crate::Readable for Pllcon2Spec {} #[doc = "`write(|w| ..)` method takes [`pllcon2::W`](W) writer structure"] -impl crate::Writable for PLLCON2_SPEC { +impl crate::Writable for Pllcon2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON2 to value 0x01"] -impl crate::Resettable for PLLCON2_SPEC { +impl crate::Resettable for Pllcon2Spec { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_pll/pllstat.rs b/src/scu_pll/pllstat.rs index a7738e65..dd1c4090 100644 --- a/src/scu_pll/pllstat.rs +++ b/src/scu_pll/pllstat.rs @@ -1,384 +1,384 @@ #[doc = "Register `PLLSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `VCOBYST` reader - VCO Bypass Status"] -pub type VCOBYST_R = crate::BitReader; +pub type R = crate::R; #[doc = "VCO Bypass Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOBYST_A { +pub enum Vcobyst { #[doc = "0: Free-running / Normal Mode is entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler Mode is entered"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOBYST_A) -> Self { + fn from(variant: Vcobyst) -> Self { variant as u8 != 0 } } -impl VCOBYST_R { +#[doc = "Field `VCOBYST` reader - VCO Bypass Status"] +pub type VcobystR = crate::BitReader; +impl VcobystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOBYST_A { + pub const fn variant(&self) -> Vcobyst { match self.bits { - false => VCOBYST_A::VALUE1, - true => VCOBYST_A::VALUE2, + false => Vcobyst::Value1, + true => Vcobyst::Value2, } } #[doc = "Free-running / Normal Mode is entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOBYST_A::VALUE1 + *self == Vcobyst::Value1 } #[doc = "Prescaler Mode is entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOBYST_A::VALUE2 + *self == Vcobyst::Value2 } } -#[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] -pub type PWDSTAT_R = crate::BitReader; #[doc = "PLL Power-saving Mode Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PWDSTAT_A { +pub enum Pwdstat { #[doc = "0: PLL Power-saving Mode was not entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PLL Power-saving Mode was entered"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PWDSTAT_A) -> Self { + fn from(variant: Pwdstat) -> Self { variant as u8 != 0 } } -impl PWDSTAT_R { +#[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] +pub type PwdstatR = crate::BitReader; +impl PwdstatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PWDSTAT_A { + pub const fn variant(&self) -> Pwdstat { match self.bits { - false => PWDSTAT_A::VALUE1, - true => PWDSTAT_A::VALUE2, + false => Pwdstat::Value1, + true => Pwdstat::Value2, } } #[doc = "PLL Power-saving Mode was not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PWDSTAT_A::VALUE1 + *self == Pwdstat::Value1 } #[doc = "PLL Power-saving Mode was entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PWDSTAT_A::VALUE2 + *self == Pwdstat::Value2 } } -#[doc = "Field `VCOLOCK` reader - PLL LOCK Status"] -pub type VCOLOCK_R = crate::BitReader; #[doc = "PLL LOCK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOLOCK_A { +pub enum Vcolock { #[doc = "0: PLL not locked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PLL locked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOLOCK_A) -> Self { + fn from(variant: Vcolock) -> Self { variant as u8 != 0 } } -impl VCOLOCK_R { +#[doc = "Field `VCOLOCK` reader - PLL LOCK Status"] +pub type VcolockR = crate::BitReader; +impl VcolockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOLOCK_A { + pub const fn variant(&self) -> Vcolock { match self.bits { - false => VCOLOCK_A::VALUE1, - true => VCOLOCK_A::VALUE2, + false => Vcolock::Value1, + true => Vcolock::Value2, } } #[doc = "PLL not locked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOLOCK_A::VALUE1 + *self == Vcolock::Value1 } #[doc = "PLL locked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOLOCK_A::VALUE2 + *self == Vcolock::Value2 } } -#[doc = "Field `K1RDY` reader - K1 Divider Ready Status"] -pub type K1RDY_R = crate::BitReader; #[doc = "K1 Divider Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K1RDY_A { +pub enum K1rdy { #[doc = "0: K1-Divider does not operate with the new value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: K1-Divider operate with the new value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K1RDY_A) -> Self { + fn from(variant: K1rdy) -> Self { variant as u8 != 0 } } -impl K1RDY_R { +#[doc = "Field `K1RDY` reader - K1 Divider Ready Status"] +pub type K1rdyR = crate::BitReader; +impl K1rdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K1RDY_A { + pub const fn variant(&self) -> K1rdy { match self.bits { - false => K1RDY_A::VALUE1, - true => K1RDY_A::VALUE2, + false => K1rdy::Value1, + true => K1rdy::Value2, } } #[doc = "K1-Divider does not operate with the new value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K1RDY_A::VALUE1 + *self == K1rdy::Value1 } #[doc = "K1-Divider operate with the new value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K1RDY_A::VALUE2 + *self == K1rdy::Value2 } } -#[doc = "Field `K2RDY` reader - K2 Divider Ready Status"] -pub type K2RDY_R = crate::BitReader; #[doc = "K2 Divider Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K2RDY_A { +pub enum K2rdy { #[doc = "0: K2-Divider does not operate with the new value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: K2-Divider operate with the new value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K2RDY_A) -> Self { + fn from(variant: K2rdy) -> Self { variant as u8 != 0 } } -impl K2RDY_R { +#[doc = "Field `K2RDY` reader - K2 Divider Ready Status"] +pub type K2rdyR = crate::BitReader; +impl K2rdyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K2RDY_A { + pub const fn variant(&self) -> K2rdy { match self.bits { - false => K2RDY_A::VALUE1, - true => K2RDY_A::VALUE2, + false => K2rdy::Value1, + true => K2rdy::Value2, } } #[doc = "K2-Divider does not operate with the new value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K2RDY_A::VALUE1 + *self == K2rdy::Value1 } #[doc = "K2-Divider operate with the new value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K2RDY_A::VALUE2 + *self == K2rdy::Value2 } } -#[doc = "Field `BY` reader - Bypass Mode Status"] -pub type BY_R = crate::BitReader; #[doc = "Bypass Mode Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BY_A { +pub enum By { #[doc = "0: Bypass Mode is not entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bypass Mode is entered. Input fOSC is selected as output fPLL."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BY_A) -> Self { + fn from(variant: By) -> Self { variant as u8 != 0 } } -impl BY_R { +#[doc = "Field `BY` reader - Bypass Mode Status"] +pub type ByR = crate::BitReader; +impl ByR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BY_A { + pub const fn variant(&self) -> By { match self.bits { - false => BY_A::VALUE1, - true => BY_A::VALUE2, + false => By::Value1, + true => By::Value2, } } #[doc = "Bypass Mode is not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BY_A::VALUE1 + *self == By::Value1 } #[doc = "Bypass Mode is entered. Input fOSC is selected as output fPLL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BY_A::VALUE2 + *self == By::Value2 } } -#[doc = "Field `PLLLV` reader - Oscillator for PLL Valid Low Status Bit"] -pub type PLLLV_R = crate::BitReader; #[doc = "Oscillator for PLL Valid Low Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLLV_A { +pub enum Plllv { #[doc = "0: The OSC frequency is not usable. Frequency fREF is too low."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The OSC frequency is usable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLLV_A) -> Self { + fn from(variant: Plllv) -> Self { variant as u8 != 0 } } -impl PLLLV_R { +#[doc = "Field `PLLLV` reader - Oscillator for PLL Valid Low Status Bit"] +pub type PlllvR = crate::BitReader; +impl PlllvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLLV_A { + pub const fn variant(&self) -> Plllv { match self.bits { - false => PLLLV_A::VALUE1, - true => PLLLV_A::VALUE2, + false => Plllv::Value1, + true => Plllv::Value2, } } #[doc = "The OSC frequency is not usable. Frequency fREF is too low."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLLV_A::VALUE1 + *self == Plllv::Value1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLLV_A::VALUE2 + *self == Plllv::Value2 } } -#[doc = "Field `PLLHV` reader - Oscillator for PLL Valid High Status Bit"] -pub type PLLHV_R = crate::BitReader; #[doc = "Oscillator for PLL Valid High Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLHV_A { +pub enum Pllhv { #[doc = "0: The OSC frequency is not usable. Frequency fOSC is too high."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The OSC frequency is usable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLHV_A) -> Self { + fn from(variant: Pllhv) -> Self { variant as u8 != 0 } } -impl PLLHV_R { +#[doc = "Field `PLLHV` reader - Oscillator for PLL Valid High Status Bit"] +pub type PllhvR = crate::BitReader; +impl PllhvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLHV_A { + pub const fn variant(&self) -> Pllhv { match self.bits { - false => PLLHV_A::VALUE1, - true => PLLHV_A::VALUE2, + false => Pllhv::Value1, + true => Pllhv::Value2, } } #[doc = "The OSC frequency is not usable. Frequency fOSC is too high."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLHV_A::VALUE1 + *self == Pllhv::Value1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLHV_A::VALUE2 + *self == Pllhv::Value2 } } -#[doc = "Field `PLLSP` reader - Oscillator for PLL Valid Spike Status Bit"] -pub type PLLSP_R = crate::BitReader; #[doc = "Oscillator for PLL Valid Spike Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLSP_A { +pub enum Pllsp { #[doc = "0: The OSC frequency is not usable. Spikes are detected that disturb a locked operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The OSC frequency is usable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLSP_A) -> Self { + fn from(variant: Pllsp) -> Self { variant as u8 != 0 } } -impl PLLSP_R { +#[doc = "Field `PLLSP` reader - Oscillator for PLL Valid Spike Status Bit"] +pub type PllspR = crate::BitReader; +impl PllspR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLSP_A { + pub const fn variant(&self) -> Pllsp { match self.bits { - false => PLLSP_A::VALUE1, - true => PLLSP_A::VALUE2, + false => Pllsp::Value1, + true => Pllsp::Value2, } } #[doc = "The OSC frequency is not usable. Spikes are detected that disturb a locked operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLSP_A::VALUE1 + *self == Pllsp::Value1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLSP_A::VALUE2 + *self == Pllsp::Value2 } } impl R { #[doc = "Bit 0 - VCO Bypass Status"] #[inline(always)] - pub fn vcobyst(&self) -> VCOBYST_R { - VCOBYST_R::new((self.bits & 1) != 0) + pub fn vcobyst(&self) -> VcobystR { + VcobystR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - PLL Power-saving Mode Status"] #[inline(always)] - pub fn pwdstat(&self) -> PWDSTAT_R { - PWDSTAT_R::new(((self.bits >> 1) & 1) != 0) + pub fn pwdstat(&self) -> PwdstatR { + PwdstatR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PLL LOCK Status"] #[inline(always)] - pub fn vcolock(&self) -> VCOLOCK_R { - VCOLOCK_R::new(((self.bits >> 2) & 1) != 0) + pub fn vcolock(&self) -> VcolockR { + VcolockR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - K1 Divider Ready Status"] #[inline(always)] - pub fn k1rdy(&self) -> K1RDY_R { - K1RDY_R::new(((self.bits >> 4) & 1) != 0) + pub fn k1rdy(&self) -> K1rdyR { + K1rdyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - K2 Divider Ready Status"] #[inline(always)] - pub fn k2rdy(&self) -> K2RDY_R { - K2RDY_R::new(((self.bits >> 5) & 1) != 0) + pub fn k2rdy(&self) -> K2rdyR { + K2rdyR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Bypass Mode Status"] #[inline(always)] - pub fn by(&self) -> BY_R { - BY_R::new(((self.bits >> 6) & 1) != 0) + pub fn by(&self) -> ByR { + ByR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Oscillator for PLL Valid Low Status Bit"] #[inline(always)] - pub fn plllv(&self) -> PLLLV_R { - PLLLV_R::new(((self.bits >> 7) & 1) != 0) + pub fn plllv(&self) -> PlllvR { + PlllvR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Oscillator for PLL Valid High Status Bit"] #[inline(always)] - pub fn pllhv(&self) -> PLLHV_R { - PLLHV_R::new(((self.bits >> 8) & 1) != 0) + pub fn pllhv(&self) -> PllhvR { + PllhvR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Oscillator for PLL Valid Spike Status Bit"] #[inline(always)] - pub fn pllsp(&self) -> PLLSP_R { - PLLSP_R::new(((self.bits >> 9) & 1) != 0) + pub fn pllsp(&self) -> PllspR { + PllspR::new(((self.bits >> 9) & 1) != 0) } } #[doc = "PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PLLSTAT_SPEC; -impl crate::RegisterSpec for PLLSTAT_SPEC { +pub struct PllstatSpec; +impl crate::RegisterSpec for PllstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`pllstat::R`](R) reader structure"] -impl crate::Readable for PLLSTAT_SPEC {} +impl crate::Readable for PllstatSpec {} #[doc = "`reset()` method sets PLLSTAT to value 0x02"] -impl crate::Resettable for PLLSTAT_SPEC { +impl crate::Resettable for PllstatSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/scu_pll/usbpllcon.rs b/src/scu_pll/usbpllcon.rs index 83d7916e..434b03a7 100644 --- a/src/scu_pll/usbpllcon.rs +++ b/src/scu_pll/usbpllcon.rs @@ -1,456 +1,447 @@ #[doc = "Register `USBPLLCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `USBPLLCON` writer"] -pub type W = crate::W; -#[doc = "Field `VCOBYP` reader - VCO Bypass"] -pub type VCOBYP_R = crate::BitReader; +pub type W = crate::W; #[doc = "VCO Bypass\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOBYP_A { +pub enum Vcobyp { #[doc = "0: Normal operation, VCO is not bypassed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler Mode, VCO is bypassed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOBYP_A) -> Self { + fn from(variant: Vcobyp) -> Self { variant as u8 != 0 } } -impl VCOBYP_R { +#[doc = "Field `VCOBYP` reader - VCO Bypass"] +pub type VcobypR = crate::BitReader; +impl VcobypR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOBYP_A { + pub const fn variant(&self) -> Vcobyp { match self.bits { - false => VCOBYP_A::VALUE1, - true => VCOBYP_A::VALUE2, + false => Vcobyp::Value1, + true => Vcobyp::Value2, } } #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOBYP_A::VALUE1 + *self == Vcobyp::Value1 } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOBYP_A::VALUE2 + *self == Vcobyp::Value2 } } #[doc = "Field `VCOBYP` writer - VCO Bypass"] -pub type VCOBYP_W<'a, REG> = crate::BitWriter<'a, REG, VCOBYP_A>; -impl<'a, REG> VCOBYP_W<'a, REG> +pub type VcobypW<'a, REG> = crate::BitWriter<'a, REG, Vcobyp>; +impl<'a, REG> VcobypW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOBYP_A::VALUE1) + self.variant(Vcobyp::Value1) } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOBYP_A::VALUE2) + self.variant(Vcobyp::Value2) } } -#[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] -pub type VCOPWD_R = crate::BitReader; #[doc = "VCO Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOPWD_A { +pub enum Vcopwd { #[doc = "0: Normal behavior"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The VCO is put into a Power Saving Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOPWD_A) -> Self { + fn from(variant: Vcopwd) -> Self { variant as u8 != 0 } } -impl VCOPWD_R { +#[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] +pub type VcopwdR = crate::BitReader; +impl VcopwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOPWD_A { + pub const fn variant(&self) -> Vcopwd { match self.bits { - false => VCOPWD_A::VALUE1, - true => VCOPWD_A::VALUE2, + false => Vcopwd::Value1, + true => Vcopwd::Value2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOPWD_A::VALUE1 + *self == Vcopwd::Value1 } #[doc = "The VCO is put into a Power Saving Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOPWD_A::VALUE2 + *self == Vcopwd::Value2 } } #[doc = "Field `VCOPWD` writer - VCO Power Saving Mode"] -pub type VCOPWD_W<'a, REG> = crate::BitWriter<'a, REG, VCOPWD_A>; -impl<'a, REG> VCOPWD_W<'a, REG> +pub type VcopwdW<'a, REG> = crate::BitWriter<'a, REG, Vcopwd>; +impl<'a, REG> VcopwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOPWD_A::VALUE1) + self.variant(Vcopwd::Value1) } #[doc = "The VCO is put into a Power Saving Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOPWD_A::VALUE2) + self.variant(Vcopwd::Value2) } } -#[doc = "Field `VCOTR` reader - VCO Trim Control"] -pub type VCOTR_R = crate::BitReader; #[doc = "VCO Trim Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOTR_A { +pub enum Vcotr { #[doc = "0: VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOTR_A) -> Self { + fn from(variant: Vcotr) -> Self { variant as u8 != 0 } } -impl VCOTR_R { +#[doc = "Field `VCOTR` reader - VCO Trim Control"] +pub type VcotrR = crate::BitReader; +impl VcotrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOTR_A { + pub const fn variant(&self) -> Vcotr { match self.bits { - false => VCOTR_A::VALUE1, - true => VCOTR_A::VALUE2, + false => Vcotr::Value1, + true => Vcotr::Value2, } } #[doc = "VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOTR_A::VALUE1 + *self == Vcotr::Value1 } #[doc = "VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOTR_A::VALUE2 + *self == Vcotr::Value2 } } #[doc = "Field `VCOTR` writer - VCO Trim Control"] -pub type VCOTR_W<'a, REG> = crate::BitWriter<'a, REG, VCOTR_A>; -impl<'a, REG> VCOTR_W<'a, REG> +pub type VcotrW<'a, REG> = crate::BitWriter<'a, REG, Vcotr>; +impl<'a, REG> VcotrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VCOTR_A::VALUE1) + self.variant(Vcotr::Value1) } #[doc = "VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VCOTR_A::VALUE2) + self.variant(Vcotr::Value2) } } -#[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] -pub type FINDIS_R = crate::BitReader; #[doc = "Disconnect Oscillator from VCO\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FINDIS_A { +pub enum Findis { #[doc = "0: Connect oscillator to the VCO part"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disconnect oscillator from the VCO part."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FINDIS_A) -> Self { + fn from(variant: Findis) -> Self { variant as u8 != 0 } } -impl FINDIS_R { +#[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] +pub type FindisR = crate::BitReader; +impl FindisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FINDIS_A { + pub const fn variant(&self) -> Findis { match self.bits { - false => FINDIS_A::VALUE1, - true => FINDIS_A::VALUE2, + false => Findis::Value1, + true => Findis::Value2, } } #[doc = "Connect oscillator to the VCO part"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FINDIS_A::VALUE1 + *self == Findis::Value1 } #[doc = "Disconnect oscillator from the VCO part."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FINDIS_A::VALUE2 + *self == Findis::Value2 } } #[doc = "Field `FINDIS` writer - Disconnect Oscillator from VCO"] -pub type FINDIS_W<'a, REG> = crate::BitWriter<'a, REG, FINDIS_A>; -impl<'a, REG> FINDIS_W<'a, REG> +pub type FindisW<'a, REG> = crate::BitWriter<'a, REG, Findis>; +impl<'a, REG> FindisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Connect oscillator to the VCO part"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FINDIS_A::VALUE1) + self.variant(Findis::Value1) } #[doc = "Disconnect oscillator from the VCO part."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FINDIS_A::VALUE2) + self.variant(Findis::Value2) } } -#[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] -pub type OSCDISCDIS_R = crate::BitReader; #[doc = "Oscillator Disconnect Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OSCDISCDIS_A { +pub enum Oscdiscdis { #[doc = "0: In case of a PLL loss-of-lock bit FINDIS is set"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: In case of a PLL loss-of-lock bit FINDIS is cleared"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OSCDISCDIS_A) -> Self { + fn from(variant: Oscdiscdis) -> Self { variant as u8 != 0 } } -impl OSCDISCDIS_R { +#[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] +pub type OscdiscdisR = crate::BitReader; +impl OscdiscdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OSCDISCDIS_A { + pub const fn variant(&self) -> Oscdiscdis { match self.bits { - false => OSCDISCDIS_A::VALUE1, - true => OSCDISCDIS_A::VALUE2, + false => Oscdiscdis::Value1, + true => Oscdiscdis::Value2, } } #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OSCDISCDIS_A::VALUE1 + *self == Oscdiscdis::Value1 } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OSCDISCDIS_A::VALUE2 + *self == Oscdiscdis::Value2 } } #[doc = "Field `OSCDISCDIS` writer - Oscillator Disconnect Disable"] -pub type OSCDISCDIS_W<'a, REG> = crate::BitWriter<'a, REG, OSCDISCDIS_A>; -impl<'a, REG> OSCDISCDIS_W<'a, REG> +pub type OscdiscdisW<'a, REG> = crate::BitWriter<'a, REG, Oscdiscdis>; +impl<'a, REG> OscdiscdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OSCDISCDIS_A::VALUE1) + self.variant(Oscdiscdis::Value1) } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OSCDISCDIS_A::VALUE2) + self.variant(Oscdiscdis::Value2) } } #[doc = "Field `NDIV` reader - N-Divider Value"] -pub type NDIV_R = crate::FieldReader; +pub type NdivR = crate::FieldReader; #[doc = "Field `NDIV` writer - N-Divider Value"] -pub type NDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; -#[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] -pub type PLLPWD_R = crate::BitReader; +pub type NdivW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "PLL Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PLLPWD_A { +pub enum Pllpwd { #[doc = "0: Normal behavior"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PLLPWD_A) -> Self { + fn from(variant: Pllpwd) -> Self { variant as u8 != 0 } } -impl PLLPWD_R { +#[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] +pub type PllpwdR = crate::BitReader; +impl PllpwdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PLLPWD_A { + pub const fn variant(&self) -> Pllpwd { match self.bits { - false => PLLPWD_A::VALUE1, - true => PLLPWD_A::VALUE2, + false => Pllpwd::Value1, + true => Pllpwd::Value2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PLLPWD_A::VALUE1 + *self == Pllpwd::Value1 } #[doc = "The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PLLPWD_A::VALUE2 + *self == Pllpwd::Value2 } } #[doc = "Field `PLLPWD` writer - PLL Power Saving Mode"] -pub type PLLPWD_W<'a, REG> = crate::BitWriter<'a, REG, PLLPWD_A>; -impl<'a, REG> PLLPWD_W<'a, REG> +pub type PllpwdW<'a, REG> = crate::BitWriter<'a, REG, Pllpwd>; +impl<'a, REG> PllpwdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PLLPWD_A::VALUE1) + self.variant(Pllpwd::Value1) } #[doc = "The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PLLPWD_A::VALUE2) + self.variant(Pllpwd::Value2) } } #[doc = "Field `RESLD` writer - Restart VCO Lock Detection"] -pub type RESLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ResldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PDIV` reader - P-Divider Value"] -pub type PDIV_R = crate::FieldReader; +pub type PdivR = crate::FieldReader; #[doc = "Field `PDIV` writer - P-Divider Value"] -pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - pub fn vcobyp(&self) -> VCOBYP_R { - VCOBYP_R::new((self.bits & 1) != 0) + pub fn vcobyp(&self) -> VcobypR { + VcobypR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - pub fn vcopwd(&self) -> VCOPWD_R { - VCOPWD_R::new(((self.bits >> 1) & 1) != 0) + pub fn vcopwd(&self) -> VcopwdR { + VcopwdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - pub fn vcotr(&self) -> VCOTR_R { - VCOTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn vcotr(&self) -> VcotrR { + VcotrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - pub fn findis(&self) -> FINDIS_R { - FINDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn findis(&self) -> FindisR { + FindisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - pub fn oscdiscdis(&self) -> OSCDISCDIS_R { - OSCDISCDIS_R::new(((self.bits >> 6) & 1) != 0) + pub fn oscdiscdis(&self) -> OscdiscdisR { + OscdiscdisR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - pub fn ndiv(&self) -> NDIV_R { - NDIV_R::new(((self.bits >> 8) & 0x7f) as u8) + pub fn ndiv(&self) -> NdivR { + NdivR::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - pub fn pllpwd(&self) -> PLLPWD_R { - PLLPWD_R::new(((self.bits >> 16) & 1) != 0) + pub fn pllpwd(&self) -> PllpwdR { + PllpwdR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - pub fn pdiv(&self) -> PDIV_R { - PDIV_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pdiv(&self) -> PdivR { + PdivR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] #[must_use] - pub fn vcobyp(&mut self) -> VCOBYP_W { - VCOBYP_W::new(self, 0) + pub fn vcobyp(&mut self) -> VcobypW { + VcobypW::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] #[must_use] - pub fn vcopwd(&mut self) -> VCOPWD_W { - VCOPWD_W::new(self, 1) + pub fn vcopwd(&mut self) -> VcopwdW { + VcopwdW::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] #[must_use] - pub fn vcotr(&mut self) -> VCOTR_W { - VCOTR_W::new(self, 2) + pub fn vcotr(&mut self) -> VcotrW { + VcotrW::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] #[must_use] - pub fn findis(&mut self) -> FINDIS_W { - FINDIS_W::new(self, 4) + pub fn findis(&mut self) -> FindisW { + FindisW::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] #[must_use] - pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { - OSCDISCDIS_W::new(self, 6) + pub fn oscdiscdis(&mut self) -> OscdiscdisW { + OscdiscdisW::new(self, 6) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] #[must_use] - pub fn ndiv(&mut self) -> NDIV_W { - NDIV_W::new(self, 8) + pub fn ndiv(&mut self) -> NdivW { + NdivW::new(self, 8) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] #[must_use] - pub fn pllpwd(&mut self) -> PLLPWD_W { - PLLPWD_W::new(self, 16) + pub fn pllpwd(&mut self) -> PllpwdW { + PllpwdW::new(self, 16) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] #[must_use] - pub fn resld(&mut self) -> RESLD_W { - RESLD_W::new(self, 18) + pub fn resld(&mut self) -> ResldW { + ResldW::new(self, 18) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PDIV_W { - PDIV_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pdiv(&mut self) -> PdivW { + PdivW::new(self, 24) } } #[doc = "USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct USBPLLCON_SPEC; -impl crate::RegisterSpec for USBPLLCON_SPEC { +pub struct UsbpllconSpec; +impl crate::RegisterSpec for UsbpllconSpec { type Ux = u32; } #[doc = "`read()` method returns [`usbpllcon::R`](R) reader structure"] -impl crate::Readable for USBPLLCON_SPEC {} +impl crate::Readable for UsbpllconSpec {} #[doc = "`write(|w| ..)` method takes [`usbpllcon::W`](W) writer structure"] -impl crate::Writable for USBPLLCON_SPEC { +impl crate::Writable for UsbpllconSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USBPLLCON to value 0x0001_0003"] -impl crate::Resettable for USBPLLCON_SPEC { +impl crate::Resettable for UsbpllconSpec { const RESET_VALUE: u32 = 0x0001_0003; } diff --git a/src/scu_pll/usbpllstat.rs b/src/scu_pll/usbpllstat.rs index 1541c04a..7ffca5ff 100644 --- a/src/scu_pll/usbpllstat.rs +++ b/src/scu_pll/usbpllstat.rs @@ -1,220 +1,220 @@ #[doc = "Register `USBPLLSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `VCOBYST` reader - VCO Bypass Status"] -pub type VCOBYST_R = crate::BitReader; +pub type R = crate::R; #[doc = "VCO Bypass Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOBYST_A { +pub enum Vcobyst { #[doc = "0: Normal Mode is entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Prescaler Mode is entered"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOBYST_A) -> Self { + fn from(variant: Vcobyst) -> Self { variant as u8 != 0 } } -impl VCOBYST_R { +#[doc = "Field `VCOBYST` reader - VCO Bypass Status"] +pub type VcobystR = crate::BitReader; +impl VcobystR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOBYST_A { + pub const fn variant(&self) -> Vcobyst { match self.bits { - false => VCOBYST_A::VALUE1, - true => VCOBYST_A::VALUE2, + false => Vcobyst::Value1, + true => Vcobyst::Value2, } } #[doc = "Normal Mode is entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOBYST_A::VALUE1 + *self == Vcobyst::Value1 } #[doc = "Prescaler Mode is entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOBYST_A::VALUE2 + *self == Vcobyst::Value2 } } -#[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] -pub type PWDSTAT_R = crate::BitReader; #[doc = "PLL Power-saving Mode Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PWDSTAT_A { +pub enum Pwdstat { #[doc = "0: PLL Power-saving Mode was not entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PLL Power-saving Mode was entered"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PWDSTAT_A) -> Self { + fn from(variant: Pwdstat) -> Self { variant as u8 != 0 } } -impl PWDSTAT_R { +#[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] +pub type PwdstatR = crate::BitReader; +impl PwdstatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PWDSTAT_A { + pub const fn variant(&self) -> Pwdstat { match self.bits { - false => PWDSTAT_A::VALUE1, - true => PWDSTAT_A::VALUE2, + false => Pwdstat::Value1, + true => Pwdstat::Value2, } } #[doc = "PLL Power-saving Mode was not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PWDSTAT_A::VALUE1 + *self == Pwdstat::Value1 } #[doc = "PLL Power-saving Mode was entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PWDSTAT_A::VALUE2 + *self == Pwdstat::Value2 } } -#[doc = "Field `VCOLOCK` reader - PLL VCO Lock Status"] -pub type VCOLOCK_R = crate::BitReader; #[doc = "PLL VCO Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOLOCK_A { +pub enum Vcolock { #[doc = "0: The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOLOCK_A) -> Self { + fn from(variant: Vcolock) -> Self { variant as u8 != 0 } } -impl VCOLOCK_R { +#[doc = "Field `VCOLOCK` reader - PLL VCO Lock Status"] +pub type VcolockR = crate::BitReader; +impl VcolockR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOLOCK_A { + pub const fn variant(&self) -> Vcolock { match self.bits { - false => VCOLOCK_A::VALUE1, - true => VCOLOCK_A::VALUE2, + false => Vcolock::Value1, + true => Vcolock::Value2, } } #[doc = "The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOLOCK_A::VALUE1 + *self == Vcolock::Value1 } #[doc = "The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOLOCK_A::VALUE2 + *self == Vcolock::Value2 } } -#[doc = "Field `BY` reader - Bypass Mode Status"] -pub type BY_R = crate::BitReader; #[doc = "Bypass Mode Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BY_A { +pub enum By { #[doc = "0: Bypass Mode is not entered"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bypass Mode is entered. Input fOSC is selected as output fPLL."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BY_A) -> Self { + fn from(variant: By) -> Self { variant as u8 != 0 } } -impl BY_R { +#[doc = "Field `BY` reader - Bypass Mode Status"] +pub type ByR = crate::BitReader; +impl ByR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BY_A { + pub const fn variant(&self) -> By { match self.bits { - false => BY_A::VALUE1, - true => BY_A::VALUE2, + false => By::Value1, + true => By::Value2, } } #[doc = "Bypass Mode is not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BY_A::VALUE1 + *self == By::Value1 } #[doc = "Bypass Mode is entered. Input fOSC is selected as output fPLL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BY_A::VALUE2 + *self == By::Value2 } } -#[doc = "Field `VCOLOCKED` reader - PLL LOCK Status"] -pub type VCOLOCKED_R = crate::BitReader; #[doc = "PLL LOCK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VCOLOCKED_A { +pub enum Vcolocked { #[doc = "0: PLL not locked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: PLL locked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VCOLOCKED_A) -> Self { + fn from(variant: Vcolocked) -> Self { variant as u8 != 0 } } -impl VCOLOCKED_R { +#[doc = "Field `VCOLOCKED` reader - PLL LOCK Status"] +pub type VcolockedR = crate::BitReader; +impl VcolockedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VCOLOCKED_A { + pub const fn variant(&self) -> Vcolocked { match self.bits { - false => VCOLOCKED_A::VALUE1, - true => VCOLOCKED_A::VALUE2, + false => Vcolocked::Value1, + true => Vcolocked::Value2, } } #[doc = "PLL not locked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VCOLOCKED_A::VALUE1 + *self == Vcolocked::Value1 } #[doc = "PLL locked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VCOLOCKED_A::VALUE2 + *self == Vcolocked::Value2 } } impl R { #[doc = "Bit 0 - VCO Bypass Status"] #[inline(always)] - pub fn vcobyst(&self) -> VCOBYST_R { - VCOBYST_R::new((self.bits & 1) != 0) + pub fn vcobyst(&self) -> VcobystR { + VcobystR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - PLL Power-saving Mode Status"] #[inline(always)] - pub fn pwdstat(&self) -> PWDSTAT_R { - PWDSTAT_R::new(((self.bits >> 1) & 1) != 0) + pub fn pwdstat(&self) -> PwdstatR { + PwdstatR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PLL VCO Lock Status"] #[inline(always)] - pub fn vcolock(&self) -> VCOLOCK_R { - VCOLOCK_R::new(((self.bits >> 2) & 1) != 0) + pub fn vcolock(&self) -> VcolockR { + VcolockR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 6 - Bypass Mode Status"] #[inline(always)] - pub fn by(&self) -> BY_R { - BY_R::new(((self.bits >> 6) & 1) != 0) + pub fn by(&self) -> ByR { + ByR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - PLL LOCK Status"] #[inline(always)] - pub fn vcolocked(&self) -> VCOLOCKED_R { - VCOLOCKED_R::new(((self.bits >> 7) & 1) != 0) + pub fn vcolocked(&self) -> VcolockedR { + VcolockedR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct USBPLLSTAT_SPEC; -impl crate::RegisterSpec for USBPLLSTAT_SPEC { +pub struct UsbpllstatSpec; +impl crate::RegisterSpec for UsbpllstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`usbpllstat::R`](R) reader structure"] -impl crate::Readable for USBPLLSTAT_SPEC {} +impl crate::Readable for UsbpllstatSpec {} #[doc = "`reset()` method sets USBPLLSTAT to value 0x02"] -impl crate::Resettable for USBPLLSTAT_SPEC { +impl crate::Resettable for UsbpllstatSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/scu_power.rs b/src/scu_power.rs index 2bdf06e8..fac3d873 100644 --- a/src/scu_power.rs +++ b/src/scu_power.rs @@ -1,74 +1,80 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - pwrstat: PWRSTAT, - pwrset: PWRSET, - pwrclr: PWRCLR, + pwrstat: Pwrstat, + pwrset: Pwrset, + pwrclr: Pwrclr, _reserved3: [u8; 0x04], - evrstat: EVRSTAT, - evrvadcstat: EVRVADCSTAT, + evrstat: Evrstat, + evrvadcstat: Evrvadcstat, _reserved5: [u8; 0x14], - pwrmon: PWRMON, + pwrmon: Pwrmon, } impl RegisterBlock { #[doc = "0x00 - PCU Status Register"] #[inline(always)] - pub const fn pwrstat(&self) -> &PWRSTAT { + pub const fn pwrstat(&self) -> &Pwrstat { &self.pwrstat } #[doc = "0x04 - PCU Set Control Register"] #[inline(always)] - pub const fn pwrset(&self) -> &PWRSET { + pub const fn pwrset(&self) -> &Pwrset { &self.pwrset } #[doc = "0x08 - PCU Clear Control Register"] #[inline(always)] - pub const fn pwrclr(&self) -> &PWRCLR { + pub const fn pwrclr(&self) -> &Pwrclr { &self.pwrclr } #[doc = "0x10 - EVR Status Register"] #[inline(always)] - pub const fn evrstat(&self) -> &EVRSTAT { + pub const fn evrstat(&self) -> &Evrstat { &self.evrstat } #[doc = "0x14 - EVR VADC Status Register"] #[inline(always)] - pub const fn evrvadcstat(&self) -> &EVRVADCSTAT { + pub const fn evrvadcstat(&self) -> &Evrvadcstat { &self.evrvadcstat } #[doc = "0x2c - Power Monitor Control"] #[inline(always)] - pub const fn pwrmon(&self) -> &PWRMON { + pub const fn pwrmon(&self) -> &Pwrmon { &self.pwrmon } } #[doc = "PWRSTAT (r) register accessor: PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrstat`] module"] -pub type PWRSTAT = crate::Reg; +#[doc(alias = "PWRSTAT")] +pub type Pwrstat = crate::Reg; #[doc = "PCU Status Register"] pub mod pwrstat; #[doc = "PWRSET (w) register accessor: PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrset`] module"] -pub type PWRSET = crate::Reg; +#[doc(alias = "PWRSET")] +pub type Pwrset = crate::Reg; #[doc = "PCU Set Control Register"] pub mod pwrset; #[doc = "PWRCLR (w) register accessor: PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrclr`] module"] -pub type PWRCLR = crate::Reg; +#[doc(alias = "PWRCLR")] +pub type Pwrclr = crate::Reg; #[doc = "PCU Clear Control Register"] pub mod pwrclr; #[doc = "EVRSTAT (r) register accessor: EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrstat`] module"] -pub type EVRSTAT = crate::Reg; +#[doc(alias = "EVRSTAT")] +pub type Evrstat = crate::Reg; #[doc = "EVR Status Register"] pub mod evrstat; #[doc = "EVRVADCSTAT (r) register accessor: EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrvadcstat`] module"] -pub type EVRVADCSTAT = crate::Reg; +#[doc(alias = "EVRVADCSTAT")] +pub type Evrvadcstat = crate::Reg; #[doc = "EVR VADC Status Register"] pub mod evrvadcstat; #[doc = "PWRMON (rw) register accessor: Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrmon`] module"] -pub type PWRMON = crate::Reg; +#[doc(alias = "PWRMON")] +pub type Pwrmon = crate::Reg; #[doc = "Power Monitor Control"] pub mod pwrmon; diff --git a/src/scu_power/evrstat.rs b/src/scu_power/evrstat.rs index 26589d68..0c108b49 100644 --- a/src/scu_power/evrstat.rs +++ b/src/scu_power/evrstat.rs @@ -1,56 +1,56 @@ #[doc = "Register `EVRSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `OV13` reader - Regulator Overvoltage for 1.3 V"] -pub type OV13_R = crate::BitReader; +pub type R = crate::R; #[doc = "Regulator Overvoltage for 1.3 V\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OV13_A { +pub enum Ov13 { #[doc = "0: No overvoltage condition"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Regulator is in overvoltage"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OV13_A) -> Self { + fn from(variant: Ov13) -> Self { variant as u8 != 0 } } -impl OV13_R { +#[doc = "Field `OV13` reader - Regulator Overvoltage for 1.3 V"] +pub type Ov13R = crate::BitReader; +impl Ov13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OV13_A { + pub const fn variant(&self) -> Ov13 { match self.bits { - false => OV13_A::VALUE1, - true => OV13_A::VALUE2, + false => Ov13::Value1, + true => Ov13::Value2, } } #[doc = "No overvoltage condition"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OV13_A::VALUE1 + *self == Ov13::Value1 } #[doc = "Regulator is in overvoltage"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OV13_A::VALUE2 + *self == Ov13::Value2 } } impl R { #[doc = "Bit 1 - Regulator Overvoltage for 1.3 V"] #[inline(always)] - pub fn ov13(&self) -> OV13_R { - OV13_R::new(((self.bits >> 1) & 1) != 0) + pub fn ov13(&self) -> Ov13R { + Ov13R::new(((self.bits >> 1) & 1) != 0) } } #[doc = "EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVRSTAT_SPEC; -impl crate::RegisterSpec for EVRSTAT_SPEC { +pub struct EvrstatSpec; +impl crate::RegisterSpec for EvrstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`evrstat::R`](R) reader structure"] -impl crate::Readable for EVRSTAT_SPEC {} +impl crate::Readable for EvrstatSpec {} #[doc = "`reset()` method sets EVRSTAT to value 0"] -impl crate::Resettable for EVRSTAT_SPEC { +impl crate::Resettable for EvrstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/evrvadcstat.rs b/src/scu_power/evrvadcstat.rs index 15ae2e09..77cc8eca 100644 --- a/src/scu_power/evrvadcstat.rs +++ b/src/scu_power/evrvadcstat.rs @@ -1,29 +1,29 @@ #[doc = "Register `EVRVADCSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VADC13V` reader - VADC 1.3 V Conversion Result"] -pub type VADC13V_R = crate::FieldReader; +pub type Vadc13vR = crate::FieldReader; #[doc = "Field `VADC33V` reader - VADC 3.3 V Conversion Result"] -pub type VADC33V_R = crate::FieldReader; +pub type Vadc33vR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - VADC 1.3 V Conversion Result"] #[inline(always)] - pub fn vadc13v(&self) -> VADC13V_R { - VADC13V_R::new((self.bits & 0xff) as u8) + pub fn vadc13v(&self) -> Vadc13vR { + Vadc13vR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - VADC 3.3 V Conversion Result"] #[inline(always)] - pub fn vadc33v(&self) -> VADC33V_R { - VADC33V_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn vadc33v(&self) -> Vadc33vR { + Vadc33vR::new(((self.bits >> 8) & 0xff) as u8) } } #[doc = "EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EVRVADCSTAT_SPEC; -impl crate::RegisterSpec for EVRVADCSTAT_SPEC { +pub struct EvrvadcstatSpec; +impl crate::RegisterSpec for EvrvadcstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`evrvadcstat::R`](R) reader structure"] -impl crate::Readable for EVRVADCSTAT_SPEC {} +impl crate::Readable for EvrvadcstatSpec {} #[doc = "`reset()` method sets EVRVADCSTAT to value 0"] -impl crate::Resettable for EVRVADCSTAT_SPEC { +impl crate::Resettable for EvrvadcstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrclr.rs b/src/scu_power/pwrclr.rs index 24cafff0..12f2c162 100644 --- a/src/scu_power/pwrclr.rs +++ b/src/scu_power/pwrclr.rs @@ -1,176 +1,167 @@ #[doc = "Register `PWRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Disable Hibernate Domain\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIB_AW { +pub enum Hib { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable Hibernate domain"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIB_AW) -> Self { + fn from(variant: Hib) -> Self { variant as u8 != 0 } } #[doc = "Field `HIB` writer - Clear Disable Hibernate Domain"] -pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_AW>; -impl<'a, REG> HIB_W<'a, REG> +pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; +impl<'a, REG> HibW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIB_AW::VALUE1) + self.variant(Hib::Value1) } #[doc = "Disable Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIB_AW::VALUE2) + self.variant(Hib::Value2) } } #[doc = "Clear USB PHY Transceiver Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPHYPDQ_AW { +pub enum Usbphypdq { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power-down"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPHYPDQ_AW) -> Self { + fn from(variant: Usbphypdq) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPHYPDQ` writer - Clear USB PHY Transceiver Disable"] -pub type USBPHYPDQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPHYPDQ_AW>; -impl<'a, REG> USBPHYPDQ_W<'a, REG> +pub type UsbphypdqW<'a, REG> = crate::BitWriter<'a, REG, Usbphypdq>; +impl<'a, REG> UsbphypdqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBPHYPDQ_AW::VALUE1) + self.variant(Usbphypdq::Value1) } #[doc = "Power-down"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBPHYPDQ_AW::VALUE2) + self.variant(Usbphypdq::Value2) } } #[doc = "Clear USB On-The-Go Comparators Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBOTGEN_AW { +pub enum Usbotgen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power-down"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBOTGEN_AW) -> Self { + fn from(variant: Usbotgen) -> Self { variant as u8 != 0 } } #[doc = "Field `USBOTGEN` writer - Clear USB On-The-Go Comparators Enable"] -pub type USBOTGEN_W<'a, REG> = crate::BitWriter<'a, REG, USBOTGEN_AW>; -impl<'a, REG> USBOTGEN_W<'a, REG> +pub type UsbotgenW<'a, REG> = crate::BitWriter<'a, REG, Usbotgen>; +impl<'a, REG> UsbotgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBOTGEN_AW::VALUE1) + self.variant(Usbotgen::Value1) } #[doc = "Power-down"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBOTGEN_AW::VALUE2) + self.variant(Usbotgen::Value2) } } #[doc = "Clear USB Weak Pull-Up at PADN Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPUWQ_AW { +pub enum Usbpuwq { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pull-up active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPUWQ_AW) -> Self { + fn from(variant: Usbpuwq) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPUWQ` writer - Clear USB Weak Pull-Up at PADN Enable"] -pub type USBPUWQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPUWQ_AW>; -impl<'a, REG> USBPUWQ_W<'a, REG> +pub type UsbpuwqW<'a, REG> = crate::BitWriter<'a, REG, Usbpuwq>; +impl<'a, REG> UsbpuwqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBPUWQ_AW::VALUE1) + self.variant(Usbpuwq::Value1) } #[doc = "Pull-up active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBPUWQ_AW::VALUE2) + self.variant(Usbpuwq::Value2) } } impl W { #[doc = "Bit 0 - Clear Disable Hibernate Domain"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HIB_W { - HIB_W::new(self, 0) + pub fn hib(&mut self) -> HibW { + HibW::new(self, 0) } #[doc = "Bit 16 - Clear USB PHY Transceiver Disable"] #[inline(always)] #[must_use] - pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { - USBPHYPDQ_W::new(self, 16) + pub fn usbphypdq(&mut self) -> UsbphypdqW { + UsbphypdqW::new(self, 16) } #[doc = "Bit 17 - Clear USB On-The-Go Comparators Enable"] #[inline(always)] #[must_use] - pub fn usbotgen(&mut self) -> USBOTGEN_W { - USBOTGEN_W::new(self, 17) + pub fn usbotgen(&mut self) -> UsbotgenW { + UsbotgenW::new(self, 17) } #[doc = "Bit 18 - Clear USB Weak Pull-Up at PADN Enable"] #[inline(always)] #[must_use] - pub fn usbpuwq(&mut self) -> USBPUWQ_W { - USBPUWQ_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn usbpuwq(&mut self) -> UsbpuwqW { + UsbpuwqW::new(self, 18) } } #[doc = "PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PWRCLR_SPEC; -impl crate::RegisterSpec for PWRCLR_SPEC { +pub struct PwrclrSpec; +impl crate::RegisterSpec for PwrclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pwrclr::W`](W) writer structure"] -impl crate::Writable for PWRCLR_SPEC { +impl crate::Writable for PwrclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRCLR to value 0"] -impl crate::Resettable for PWRCLR_SPEC { +impl crate::Resettable for PwrclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrmon.rs b/src/scu_power/pwrmon.rs index 3b36c6c2..b4cfe761 100644 --- a/src/scu_power/pwrmon.rs +++ b/src/scu_power/pwrmon.rs @@ -1,79 +1,70 @@ #[doc = "Register `PWRMON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PWRMON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `THRS` reader - Threshold"] -pub type THRS_R = crate::FieldReader; +pub type ThrsR = crate::FieldReader; #[doc = "Field `THRS` writer - Threshold"] -pub type THRS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type ThrsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INTV` reader - Interval"] -pub type INTV_R = crate::FieldReader; +pub type IntvR = crate::FieldReader; #[doc = "Field `INTV` writer - Interval"] -pub type INTV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type IntvW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ENB` reader - Enable"] -pub type ENB_R = crate::BitReader; +pub type EnbR = crate::BitReader; #[doc = "Field `ENB` writer - Enable"] -pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Threshold"] #[inline(always)] - pub fn thrs(&self) -> THRS_R { - THRS_R::new((self.bits & 0xff) as u8) + pub fn thrs(&self) -> ThrsR { + ThrsR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Interval"] #[inline(always)] - pub fn intv(&self) -> INTV_R { - INTV_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn intv(&self) -> IntvR { + IntvR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Enable"] #[inline(always)] - pub fn enb(&self) -> ENB_R { - ENB_R::new(((self.bits >> 16) & 1) != 0) + pub fn enb(&self) -> EnbR { + EnbR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Threshold"] #[inline(always)] #[must_use] - pub fn thrs(&mut self) -> THRS_W { - THRS_W::new(self, 0) + pub fn thrs(&mut self) -> ThrsW { + ThrsW::new(self, 0) } #[doc = "Bits 8:15 - Interval"] #[inline(always)] #[must_use] - pub fn intv(&mut self) -> INTV_W { - INTV_W::new(self, 8) + pub fn intv(&mut self) -> IntvW { + IntvW::new(self, 8) } #[doc = "Bit 16 - Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> ENB_W { - ENB_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn enb(&mut self) -> EnbW { + EnbW::new(self, 16) } } #[doc = "Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PWRMON_SPEC; -impl crate::RegisterSpec for PWRMON_SPEC { +pub struct PwrmonSpec; +impl crate::RegisterSpec for PwrmonSpec { type Ux = u32; } #[doc = "`read()` method returns [`pwrmon::R`](R) reader structure"] -impl crate::Readable for PWRMON_SPEC {} +impl crate::Readable for PwrmonSpec {} #[doc = "`write(|w| ..)` method takes [`pwrmon::W`](W) writer structure"] -impl crate::Writable for PWRMON_SPEC { +impl crate::Writable for PwrmonSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRMON to value 0"] -impl crate::Resettable for PWRMON_SPEC { +impl crate::Resettable for PwrmonSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrset.rs b/src/scu_power/pwrset.rs index 5040c621..6f68cdc2 100644 --- a/src/scu_power/pwrset.rs +++ b/src/scu_power/pwrset.rs @@ -1,176 +1,167 @@ #[doc = "Register `PWRSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Set Hibernate Domain Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIB_AW { +pub enum Hib { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable Hibernate domain"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIB_AW) -> Self { + fn from(variant: Hib) -> Self { variant as u8 != 0 } } #[doc = "Field `HIB` writer - Set Hibernate Domain Enable"] -pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_AW>; -impl<'a, REG> HIB_W<'a, REG> +pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; +impl<'a, REG> HibW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIB_AW::VALUE1) + self.variant(Hib::Value1) } #[doc = "Enable Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIB_AW::VALUE2) + self.variant(Hib::Value2) } } #[doc = "Set USB PHY Transceiver Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPHYPDQ_AW { +pub enum Usbphypdq { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPHYPDQ_AW) -> Self { + fn from(variant: Usbphypdq) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPHYPDQ` writer - Set USB PHY Transceiver Disable"] -pub type USBPHYPDQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPHYPDQ_AW>; -impl<'a, REG> USBPHYPDQ_W<'a, REG> +pub type UsbphypdqW<'a, REG> = crate::BitWriter<'a, REG, Usbphypdq>; +impl<'a, REG> UsbphypdqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBPHYPDQ_AW::VALUE1) + self.variant(Usbphypdq::Value1) } #[doc = "Active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBPHYPDQ_AW::VALUE2) + self.variant(Usbphypdq::Value2) } } #[doc = "Set USB On-The-Go Comparators Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBOTGEN_AW { +pub enum Usbotgen { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBOTGEN_AW) -> Self { + fn from(variant: Usbotgen) -> Self { variant as u8 != 0 } } #[doc = "Field `USBOTGEN` writer - Set USB On-The-Go Comparators Enable"] -pub type USBOTGEN_W<'a, REG> = crate::BitWriter<'a, REG, USBOTGEN_AW>; -impl<'a, REG> USBOTGEN_W<'a, REG> +pub type UsbotgenW<'a, REG> = crate::BitWriter<'a, REG, Usbotgen>; +impl<'a, REG> UsbotgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBOTGEN_AW::VALUE1) + self.variant(Usbotgen::Value1) } #[doc = "Active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBOTGEN_AW::VALUE2) + self.variant(Usbotgen::Value2) } } #[doc = "Set USB Weak Pull-Up at PADN Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPUWQ_AW { +pub enum Usbpuwq { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pull-up not active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPUWQ_AW) -> Self { + fn from(variant: Usbpuwq) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPUWQ` writer - Set USB Weak Pull-Up at PADN Enable"] -pub type USBPUWQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPUWQ_AW>; -impl<'a, REG> USBPUWQ_W<'a, REG> +pub type UsbpuwqW<'a, REG> = crate::BitWriter<'a, REG, Usbpuwq>; +impl<'a, REG> UsbpuwqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBPUWQ_AW::VALUE1) + self.variant(Usbpuwq::Value1) } #[doc = "Pull-up not active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBPUWQ_AW::VALUE2) + self.variant(Usbpuwq::Value2) } } impl W { #[doc = "Bit 0 - Set Hibernate Domain Enable"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HIB_W { - HIB_W::new(self, 0) + pub fn hib(&mut self) -> HibW { + HibW::new(self, 0) } #[doc = "Bit 16 - Set USB PHY Transceiver Disable"] #[inline(always)] #[must_use] - pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { - USBPHYPDQ_W::new(self, 16) + pub fn usbphypdq(&mut self) -> UsbphypdqW { + UsbphypdqW::new(self, 16) } #[doc = "Bit 17 - Set USB On-The-Go Comparators Enable"] #[inline(always)] #[must_use] - pub fn usbotgen(&mut self) -> USBOTGEN_W { - USBOTGEN_W::new(self, 17) + pub fn usbotgen(&mut self) -> UsbotgenW { + UsbotgenW::new(self, 17) } #[doc = "Bit 18 - Set USB Weak Pull-Up at PADN Enable"] #[inline(always)] #[must_use] - pub fn usbpuwq(&mut self) -> USBPUWQ_W { - USBPUWQ_W::new(self, 18) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn usbpuwq(&mut self) -> UsbpuwqW { + UsbpuwqW::new(self, 18) } } #[doc = "PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PWRSET_SPEC; -impl crate::RegisterSpec for PWRSET_SPEC { +pub struct PwrsetSpec; +impl crate::RegisterSpec for PwrsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pwrset::W`](W) writer structure"] -impl crate::Writable for PWRSET_SPEC { +impl crate::Writable for PwrsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRSET to value 0"] -impl crate::Resettable for PWRSET_SPEC { +impl crate::Resettable for PwrsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrstat.rs b/src/scu_power/pwrstat.rs index 2980004f..1b785543 100644 --- a/src/scu_power/pwrstat.rs +++ b/src/scu_power/pwrstat.rs @@ -1,179 +1,179 @@ #[doc = "Register `PWRSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `HIBEN` reader - Hibernate Domain Enable Status"] -pub type HIBEN_R = crate::BitReader; +pub type R = crate::R; #[doc = "Hibernate Domain Enable Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBEN_A { +pub enum Hiben { #[doc = "0: Inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBEN_A) -> Self { + fn from(variant: Hiben) -> Self { variant as u8 != 0 } } -impl HIBEN_R { +#[doc = "Field `HIBEN` reader - Hibernate Domain Enable Status"] +pub type HibenR = crate::BitReader; +impl HibenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBEN_A { + pub const fn variant(&self) -> Hiben { match self.bits { - false => HIBEN_A::VALUE1, - true => HIBEN_A::VALUE2, + false => Hiben::Value1, + true => Hiben::Value2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBEN_A::VALUE1 + *self == Hiben::Value1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBEN_A::VALUE2 + *self == Hiben::Value2 } } -#[doc = "Field `USBPHYPDQ` reader - USB PHY Transceiver State"] -pub type USBPHYPDQ_R = crate::BitReader; #[doc = "USB PHY Transceiver State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPHYPDQ_A { +pub enum Usbphypdq { #[doc = "0: Power-down"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPHYPDQ_A) -> Self { + fn from(variant: Usbphypdq) -> Self { variant as u8 != 0 } } -impl USBPHYPDQ_R { +#[doc = "Field `USBPHYPDQ` reader - USB PHY Transceiver State"] +pub type UsbphypdqR = crate::BitReader; +impl UsbphypdqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBPHYPDQ_A { + pub const fn variant(&self) -> Usbphypdq { match self.bits { - false => USBPHYPDQ_A::VALUE1, - true => USBPHYPDQ_A::VALUE2, + false => Usbphypdq::Value1, + true => Usbphypdq::Value2, } } #[doc = "Power-down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBPHYPDQ_A::VALUE1 + *self == Usbphypdq::Value1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBPHYPDQ_A::VALUE2 + *self == Usbphypdq::Value2 } } -#[doc = "Field `USBOTGEN` reader - USB On-The-Go Comparators State"] -pub type USBOTGEN_R = crate::BitReader; #[doc = "USB On-The-Go Comparators State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBOTGEN_A { +pub enum Usbotgen { #[doc = "0: Power-down"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBOTGEN_A) -> Self { + fn from(variant: Usbotgen) -> Self { variant as u8 != 0 } } -impl USBOTGEN_R { +#[doc = "Field `USBOTGEN` reader - USB On-The-Go Comparators State"] +pub type UsbotgenR = crate::BitReader; +impl UsbotgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBOTGEN_A { + pub const fn variant(&self) -> Usbotgen { match self.bits { - false => USBOTGEN_A::VALUE1, - true => USBOTGEN_A::VALUE2, + false => Usbotgen::Value1, + true => Usbotgen::Value2, } } #[doc = "Power-down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBOTGEN_A::VALUE1 + *self == Usbotgen::Value1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBOTGEN_A::VALUE2 + *self == Usbotgen::Value2 } } -#[doc = "Field `USBPUWQ` reader - USB Weak Pull-Up at PADN State"] -pub type USBPUWQ_R = crate::BitReader; #[doc = "USB Weak Pull-Up at PADN State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBPUWQ_A { +pub enum Usbpuwq { #[doc = "0: Pull-up active"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pull-up not active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBPUWQ_A) -> Self { + fn from(variant: Usbpuwq) -> Self { variant as u8 != 0 } } -impl USBPUWQ_R { +#[doc = "Field `USBPUWQ` reader - USB Weak Pull-Up at PADN State"] +pub type UsbpuwqR = crate::BitReader; +impl UsbpuwqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBPUWQ_A { + pub const fn variant(&self) -> Usbpuwq { match self.bits { - false => USBPUWQ_A::VALUE1, - true => USBPUWQ_A::VALUE2, + false => Usbpuwq::Value1, + true => Usbpuwq::Value2, } } #[doc = "Pull-up active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBPUWQ_A::VALUE1 + *self == Usbpuwq::Value1 } #[doc = "Pull-up not active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBPUWQ_A::VALUE2 + *self == Usbpuwq::Value2 } } impl R { #[doc = "Bit 0 - Hibernate Domain Enable Status"] #[inline(always)] - pub fn hiben(&self) -> HIBEN_R { - HIBEN_R::new((self.bits & 1) != 0) + pub fn hiben(&self) -> HibenR { + HibenR::new((self.bits & 1) != 0) } #[doc = "Bit 16 - USB PHY Transceiver State"] #[inline(always)] - pub fn usbphypdq(&self) -> USBPHYPDQ_R { - USBPHYPDQ_R::new(((self.bits >> 16) & 1) != 0) + pub fn usbphypdq(&self) -> UsbphypdqR { + UsbphypdqR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - USB On-The-Go Comparators State"] #[inline(always)] - pub fn usbotgen(&self) -> USBOTGEN_R { - USBOTGEN_R::new(((self.bits >> 17) & 1) != 0) + pub fn usbotgen(&self) -> UsbotgenR { + UsbotgenR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - USB Weak Pull-Up at PADN State"] #[inline(always)] - pub fn usbpuwq(&self) -> USBPUWQ_R { - USBPUWQ_R::new(((self.bits >> 18) & 1) != 0) + pub fn usbpuwq(&self) -> UsbpuwqR { + UsbpuwqR::new(((self.bits >> 18) & 1) != 0) } } #[doc = "PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PWRSTAT_SPEC; -impl crate::RegisterSpec for PWRSTAT_SPEC { +pub struct PwrstatSpec; +impl crate::RegisterSpec for PwrstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`pwrstat::R`](R) reader structure"] -impl crate::Readable for PWRSTAT_SPEC {} +impl crate::Readable for PwrstatSpec {} #[doc = "`reset()` method sets PWRSTAT to value 0"] -impl crate::Resettable for PWRSTAT_SPEC { +impl crate::Resettable for PwrstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset.rs b/src/scu_reset.rs index 2f239ee9..b65d23d9 100644 --- a/src/scu_reset.rs +++ b/src/scu_reset.rs @@ -1,171 +1,186 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - rststat: RSTSTAT, - rstset: RSTSET, - rstclr: RSTCLR, - prstat0: PRSTAT0, - prset0: PRSET0, - prclr0: PRCLR0, - prstat1: PRSTAT1, - prset1: PRSET1, - prclr1: PRCLR1, - prstat2: PRSTAT2, - prset2: PRSET2, - prclr2: PRCLR2, - prstat3: PRSTAT3, - prset3: PRSET3, - prclr3: PRCLR3, + rststat: Rststat, + rstset: Rstset, + rstclr: Rstclr, + prstat0: Prstat0, + prset0: Prset0, + prclr0: Prclr0, + prstat1: Prstat1, + prset1: Prset1, + prclr1: Prclr1, + prstat2: Prstat2, + prset2: Prset2, + prclr2: Prclr2, + prstat3: Prstat3, + prset3: Prset3, + prclr3: Prclr3, } impl RegisterBlock { #[doc = "0x00 - RCU Reset Status"] #[inline(always)] - pub const fn rststat(&self) -> &RSTSTAT { + pub const fn rststat(&self) -> &Rststat { &self.rststat } #[doc = "0x04 - RCU Reset Set Register"] #[inline(always)] - pub const fn rstset(&self) -> &RSTSET { + pub const fn rstset(&self) -> &Rstset { &self.rstset } #[doc = "0x08 - RCU Reset Clear Register"] #[inline(always)] - pub const fn rstclr(&self) -> &RSTCLR { + pub const fn rstclr(&self) -> &Rstclr { &self.rstclr } #[doc = "0x0c - RCU Peripheral 0 Reset Status"] #[inline(always)] - pub const fn prstat0(&self) -> &PRSTAT0 { + pub const fn prstat0(&self) -> &Prstat0 { &self.prstat0 } #[doc = "0x10 - RCU Peripheral 0 Reset Set"] #[inline(always)] - pub const fn prset0(&self) -> &PRSET0 { + pub const fn prset0(&self) -> &Prset0 { &self.prset0 } #[doc = "0x14 - RCU Peripheral 0 Reset Clear"] #[inline(always)] - pub const fn prclr0(&self) -> &PRCLR0 { + pub const fn prclr0(&self) -> &Prclr0 { &self.prclr0 } #[doc = "0x18 - RCU Peripheral 1 Reset Status"] #[inline(always)] - pub const fn prstat1(&self) -> &PRSTAT1 { + pub const fn prstat1(&self) -> &Prstat1 { &self.prstat1 } #[doc = "0x1c - RCU Peripheral 1 Reset Set"] #[inline(always)] - pub const fn prset1(&self) -> &PRSET1 { + pub const fn prset1(&self) -> &Prset1 { &self.prset1 } #[doc = "0x20 - RCU Peripheral 1 Reset Clear"] #[inline(always)] - pub const fn prclr1(&self) -> &PRCLR1 { + pub const fn prclr1(&self) -> &Prclr1 { &self.prclr1 } #[doc = "0x24 - RCU Peripheral 2 Reset Status"] #[inline(always)] - pub const fn prstat2(&self) -> &PRSTAT2 { + pub const fn prstat2(&self) -> &Prstat2 { &self.prstat2 } #[doc = "0x28 - RCU Peripheral 2 Reset Set"] #[inline(always)] - pub const fn prset2(&self) -> &PRSET2 { + pub const fn prset2(&self) -> &Prset2 { &self.prset2 } #[doc = "0x2c - RCU Peripheral 2 Reset Clear"] #[inline(always)] - pub const fn prclr2(&self) -> &PRCLR2 { + pub const fn prclr2(&self) -> &Prclr2 { &self.prclr2 } #[doc = "0x30 - RCU Peripheral 3 Reset Status"] #[inline(always)] - pub const fn prstat3(&self) -> &PRSTAT3 { + pub const fn prstat3(&self) -> &Prstat3 { &self.prstat3 } #[doc = "0x34 - RCU Peripheral 3 Reset Set"] #[inline(always)] - pub const fn prset3(&self) -> &PRSET3 { + pub const fn prset3(&self) -> &Prset3 { &self.prset3 } #[doc = "0x38 - RCU Peripheral 3 Reset Clear"] #[inline(always)] - pub const fn prclr3(&self) -> &PRCLR3 { + pub const fn prclr3(&self) -> &Prclr3 { &self.prclr3 } } #[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`] module"] -pub type RSTSTAT = crate::Reg; +#[doc(alias = "RSTSTAT")] +pub type Rststat = crate::Reg; #[doc = "RCU Reset Status"] pub mod rststat; #[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`] module"] -pub type RSTSET = crate::Reg; +#[doc(alias = "RSTSET")] +pub type Rstset = crate::Reg; #[doc = "RCU Reset Set Register"] pub mod rstset; #[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`] module"] -pub type RSTCLR = crate::Reg; +#[doc(alias = "RSTCLR")] +pub type Rstclr = crate::Reg; #[doc = "RCU Reset Clear Register"] pub mod rstclr; #[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`] module"] -pub type PRSTAT0 = crate::Reg; +#[doc(alias = "PRSTAT0")] +pub type Prstat0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Status"] pub mod prstat0; #[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`] module"] -pub type PRSET0 = crate::Reg; +#[doc(alias = "PRSET0")] +pub type Prset0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Set"] pub mod prset0; #[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`] module"] -pub type PRCLR0 = crate::Reg; +#[doc(alias = "PRCLR0")] +pub type Prclr0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Clear"] pub mod prclr0; #[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`] module"] -pub type PRSTAT1 = crate::Reg; +#[doc(alias = "PRSTAT1")] +pub type Prstat1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Status"] pub mod prstat1; #[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`] module"] -pub type PRSET1 = crate::Reg; +#[doc(alias = "PRSET1")] +pub type Prset1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Set"] pub mod prset1; #[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`] module"] -pub type PRCLR1 = crate::Reg; +#[doc(alias = "PRCLR1")] +pub type Prclr1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Clear"] pub mod prclr1; #[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`] module"] -pub type PRSTAT2 = crate::Reg; +#[doc(alias = "PRSTAT2")] +pub type Prstat2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Status"] pub mod prstat2; #[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`] module"] -pub type PRSET2 = crate::Reg; +#[doc(alias = "PRSET2")] +pub type Prset2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Set"] pub mod prset2; #[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`] module"] -pub type PRCLR2 = crate::Reg; +#[doc(alias = "PRCLR2")] +pub type Prclr2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Clear"] pub mod prclr2; #[doc = "PRSTAT3 (r) register accessor: RCU Peripheral 3 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat3`] module"] -pub type PRSTAT3 = crate::Reg; +#[doc(alias = "PRSTAT3")] +pub type Prstat3 = crate::Reg; #[doc = "RCU Peripheral 3 Reset Status"] pub mod prstat3; #[doc = "PRSET3 (w) register accessor: RCU Peripheral 3 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset3`] module"] -pub type PRSET3 = crate::Reg; +#[doc(alias = "PRSET3")] +pub type Prset3 = crate::Reg; #[doc = "RCU Peripheral 3 Reset Set"] pub mod prset3; #[doc = "PRCLR3 (w) register accessor: RCU Peripheral 3 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr3`] module"] -pub type PRCLR3 = crate::Reg; +#[doc(alias = "PRCLR3")] +pub type Prclr3 = crate::Reg; #[doc = "RCU Peripheral 3 Reset Clear"] pub mod prclr3; diff --git a/src/scu_reset/prclr0.rs b/src/scu_reset/prclr0.rs index 125a3d21..bf064c6d 100644 --- a/src/scu_reset/prclr0.rs +++ b/src/scu_reset/prclr0.rs @@ -1,435 +1,426 @@ #[doc = "Register `PRCLR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADCRS_AW { +pub enum Vadcrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADCRS_AW) -> Self { + fn from(variant: Vadcrs) -> Self { variant as u8 != 0 } } #[doc = "Field `VADCRS` writer - VADC Reset Clear"] -pub type VADCRS_W<'a, REG> = crate::BitWriter<'a, REG, VADCRS_AW>; -impl<'a, REG> VADCRS_W<'a, REG> +pub type VadcrsW<'a, REG> = crate::BitWriter<'a, REG, Vadcrs>; +impl<'a, REG> VadcrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VADCRS_AW::VALUE1) + self.variant(Vadcrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VADCRS_AW::VALUE2) + self.variant(Vadcrs::Value2) } } #[doc = "DSD Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSDRS_AW { +pub enum Dsdrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSDRS_AW) -> Self { + fn from(variant: Dsdrs) -> Self { variant as u8 != 0 } } #[doc = "Field `DSDRS` writer - DSD Reset Clear"] -pub type DSDRS_W<'a, REG> = crate::BitWriter<'a, REG, DSDRS_AW>; -impl<'a, REG> DSDRS_W<'a, REG> +pub type DsdrsW<'a, REG> = crate::BitWriter<'a, REG, Dsdrs>; +impl<'a, REG> DsdrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSDRS_AW::VALUE1) + self.variant(Dsdrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSDRS_AW::VALUE2) + self.variant(Dsdrs::Value2) } } #[doc = "CCU40 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40RS_AW { +pub enum Ccu40rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40RS_AW) -> Self { + fn from(variant: Ccu40rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40RS` writer - CCU40 Reset Clear"] -pub type CCU40RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU40RS_AW>; -impl<'a, REG> CCU40RS_W<'a, REG> +pub type Ccu40rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu40rs>; +impl<'a, REG> Ccu40rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU40RS_AW::VALUE1) + self.variant(Ccu40rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU40RS_AW::VALUE2) + self.variant(Ccu40rs::Value2) } } #[doc = "CCU41 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41RS_AW { +pub enum Ccu41rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41RS_AW) -> Self { + fn from(variant: Ccu41rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41RS` writer - CCU41 Reset Clear"] -pub type CCU41RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU41RS_AW>; -impl<'a, REG> CCU41RS_W<'a, REG> +pub type Ccu41rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu41rs>; +impl<'a, REG> Ccu41rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU41RS_AW::VALUE1) + self.variant(Ccu41rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU41RS_AW::VALUE2) + self.variant(Ccu41rs::Value2) } } #[doc = "CCU42 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42RS_AW { +pub enum Ccu42rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42RS_AW) -> Self { + fn from(variant: Ccu42rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU42RS` writer - CCU42 Reset Clear"] -pub type CCU42RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU42RS_AW>; -impl<'a, REG> CCU42RS_W<'a, REG> +pub type Ccu42rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu42rs>; +impl<'a, REG> Ccu42rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU42RS_AW::VALUE1) + self.variant(Ccu42rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU42RS_AW::VALUE2) + self.variant(Ccu42rs::Value2) } } #[doc = "CCU80 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80RS_AW { +pub enum Ccu80rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80RS_AW) -> Self { + fn from(variant: Ccu80rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80RS` writer - CCU80 Reset Clear"] -pub type CCU80RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU80RS_AW>; -impl<'a, REG> CCU80RS_W<'a, REG> +pub type Ccu80rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu80rs>; +impl<'a, REG> Ccu80rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU80RS_AW::VALUE1) + self.variant(Ccu80rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU80RS_AW::VALUE2) + self.variant(Ccu80rs::Value2) } } #[doc = "CCU81 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81RS_AW { +pub enum Ccu81rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81RS_AW) -> Self { + fn from(variant: Ccu81rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU81RS` writer - CCU81 Reset Clear"] -pub type CCU81RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU81RS_AW>; -impl<'a, REG> CCU81RS_W<'a, REG> +pub type Ccu81rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu81rs>; +impl<'a, REG> Ccu81rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU81RS_AW::VALUE1) + self.variant(Ccu81rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU81RS_AW::VALUE2) + self.variant(Ccu81rs::Value2) } } #[doc = "POSIF0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0RS_AW { +pub enum Posif0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0RS_AW) -> Self { + fn from(variant: Posif0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0RS` writer - POSIF0 Reset Clear"] -pub type POSIF0RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0RS_AW>; -impl<'a, REG> POSIF0RS_W<'a, REG> +pub type Posif0rsW<'a, REG> = crate::BitWriter<'a, REG, Posif0rs>; +impl<'a, REG> Posif0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF0RS_AW::VALUE1) + self.variant(Posif0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF0RS_AW::VALUE2) + self.variant(Posif0rs::Value2) } } #[doc = "POSIF1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1RS_AW { +pub enum Posif1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1RS_AW) -> Self { + fn from(variant: Posif1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF1RS` writer - POSIF1 Reset Clear"] -pub type POSIF1RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF1RS_AW>; -impl<'a, REG> POSIF1RS_W<'a, REG> +pub type Posif1rsW<'a, REG> = crate::BitWriter<'a, REG, Posif1rs>; +impl<'a, REG> Posif1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF1RS_AW::VALUE1) + self.variant(Posif1rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF1RS_AW::VALUE2) + self.variant(Posif1rs::Value2) } } #[doc = "USIC0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0RS_AW { +pub enum Usic0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0RS_AW) -> Self { + fn from(variant: Usic0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0RS` writer - USIC0 Reset Clear"] -pub type USIC0RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC0RS_AW>; -impl<'a, REG> USIC0RS_W<'a, REG> +pub type Usic0rsW<'a, REG> = crate::BitWriter<'a, REG, Usic0rs>; +impl<'a, REG> Usic0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC0RS_AW::VALUE1) + self.variant(Usic0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC0RS_AW::VALUE2) + self.variant(Usic0rs::Value2) } } #[doc = "ERU1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1RS_AW { +pub enum Eru1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1RS_AW) -> Self { + fn from(variant: Eru1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1RS` writer - ERU1 Reset Clear"] -pub type ERU1RS_W<'a, REG> = crate::BitWriter<'a, REG, ERU1RS_AW>; -impl<'a, REG> ERU1RS_W<'a, REG> +pub type Eru1rsW<'a, REG> = crate::BitWriter<'a, REG, Eru1rs>; +impl<'a, REG> Eru1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU1RS_AW::VALUE1) + self.variant(Eru1rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU1RS_AW::VALUE2) + self.variant(Eru1rs::Value2) } } impl W { #[doc = "Bit 0 - VADC Reset Clear"] #[inline(always)] #[must_use] - pub fn vadcrs(&mut self) -> VADCRS_W { - VADCRS_W::new(self, 0) + pub fn vadcrs(&mut self) -> VadcrsW { + VadcrsW::new(self, 0) } #[doc = "Bit 1 - DSD Reset Clear"] #[inline(always)] #[must_use] - pub fn dsdrs(&mut self) -> DSDRS_W { - DSDRS_W::new(self, 1) + pub fn dsdrs(&mut self) -> DsdrsW { + DsdrsW::new(self, 1) } #[doc = "Bit 2 - CCU40 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu40rs(&mut self) -> CCU40RS_W { - CCU40RS_W::new(self, 2) + pub fn ccu40rs(&mut self) -> Ccu40rsW { + Ccu40rsW::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu41rs(&mut self) -> CCU41RS_W { - CCU41RS_W::new(self, 3) + pub fn ccu41rs(&mut self) -> Ccu41rsW { + Ccu41rsW::new(self, 3) } #[doc = "Bit 4 - CCU42 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu42rs(&mut self) -> CCU42RS_W { - CCU42RS_W::new(self, 4) + pub fn ccu42rs(&mut self) -> Ccu42rsW { + Ccu42rsW::new(self, 4) } #[doc = "Bit 7 - CCU80 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu80rs(&mut self) -> CCU80RS_W { - CCU80RS_W::new(self, 7) + pub fn ccu80rs(&mut self) -> Ccu80rsW { + Ccu80rsW::new(self, 7) } #[doc = "Bit 8 - CCU81 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu81rs(&mut self) -> CCU81RS_W { - CCU81RS_W::new(self, 8) + pub fn ccu81rs(&mut self) -> Ccu81rsW { + Ccu81rsW::new(self, 8) } #[doc = "Bit 9 - POSIF0 Reset Clear"] #[inline(always)] #[must_use] - pub fn posif0rs(&mut self) -> POSIF0RS_W { - POSIF0RS_W::new(self, 9) + pub fn posif0rs(&mut self) -> Posif0rsW { + Posif0rsW::new(self, 9) } #[doc = "Bit 10 - POSIF1 Reset Clear"] #[inline(always)] #[must_use] - pub fn posif1rs(&mut self) -> POSIF1RS_W { - POSIF1RS_W::new(self, 10) + pub fn posif1rs(&mut self) -> Posif1rsW { + Posif1rsW::new(self, 10) } #[doc = "Bit 11 - USIC0 Reset Clear"] #[inline(always)] #[must_use] - pub fn usic0rs(&mut self) -> USIC0RS_W { - USIC0RS_W::new(self, 11) + pub fn usic0rs(&mut self) -> Usic0rsW { + Usic0rsW::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Clear"] #[inline(always)] #[must_use] - pub fn eru1rs(&mut self) -> ERU1RS_W { - ERU1RS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eru1rs(&mut self) -> Eru1rsW { + Eru1rsW::new(self, 16) } } #[doc = "RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRCLR0_SPEC; -impl crate::RegisterSpec for PRCLR0_SPEC { +pub struct Prclr0Spec; +impl crate::RegisterSpec for Prclr0Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr0::W`](W) writer structure"] -impl crate::Writable for PRCLR0_SPEC { +impl crate::Writable for Prclr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR0 to value 0"] -impl crate::Resettable for PRCLR0_SPEC { +impl crate::Resettable for Prclr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prclr1.rs b/src/scu_reset/prclr1.rs index 46c96252..d2b6d1cb 100644 --- a/src/scu_reset/prclr1.rs +++ b/src/scu_reset/prclr1.rs @@ -1,324 +1,315 @@ #[doc = "Register `PRCLR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CCU43 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43RS_AW { +pub enum Ccu43rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43RS_AW) -> Self { + fn from(variant: Ccu43rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU43RS` writer - CCU43 Reset Clear"] -pub type CCU43RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU43RS_AW>; -impl<'a, REG> CCU43RS_W<'a, REG> +pub type Ccu43rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu43rs>; +impl<'a, REG> Ccu43rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU43RS_AW::VALUE1) + self.variant(Ccu43rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU43RS_AW::VALUE2) + self.variant(Ccu43rs::Value2) } } #[doc = "LEDTS Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0RS_AW { +pub enum Ledtscu0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0RS_AW) -> Self { + fn from(variant: Ledtscu0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0RS` writer - LEDTS Reset Clear"] -pub type LEDTSCU0RS_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0RS_AW>; -impl<'a, REG> LEDTSCU0RS_W<'a, REG> +pub type Ledtscu0rsW<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0rs>; +impl<'a, REG> Ledtscu0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LEDTSCU0RS_AW::VALUE1) + self.variant(Ledtscu0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LEDTSCU0RS_AW::VALUE2) + self.variant(Ledtscu0rs::Value2) } } #[doc = "MultiCAN Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0RS_AW { +pub enum Mcan0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0RS_AW) -> Self { + fn from(variant: Mcan0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0RS` writer - MultiCAN Reset Clear"] -pub type MCAN0RS_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0RS_AW>; -impl<'a, REG> MCAN0RS_W<'a, REG> +pub type Mcan0rsW<'a, REG> = crate::BitWriter<'a, REG, Mcan0rs>; +impl<'a, REG> Mcan0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCAN0RS_AW::VALUE1) + self.variant(Mcan0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCAN0RS_AW::VALUE2) + self.variant(Mcan0rs::Value2) } } #[doc = "DAC Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DACRS_AW { +pub enum Dacrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DACRS_AW) -> Self { + fn from(variant: Dacrs) -> Self { variant as u8 != 0 } } #[doc = "Field `DACRS` writer - DAC Reset Clear"] -pub type DACRS_W<'a, REG> = crate::BitWriter<'a, REG, DACRS_AW>; -impl<'a, REG> DACRS_W<'a, REG> +pub type DacrsW<'a, REG> = crate::BitWriter<'a, REG, Dacrs>; +impl<'a, REG> DacrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DACRS_AW::VALUE1) + self.variant(Dacrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DACRS_AW::VALUE2) + self.variant(Dacrs::Value2) } } #[doc = "MMC Interface Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCIRS_AW { +pub enum Mmcirs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCIRS_AW) -> Self { + fn from(variant: Mmcirs) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCIRS` writer - MMC Interface Reset Clear"] -pub type MMCIRS_W<'a, REG> = crate::BitWriter<'a, REG, MMCIRS_AW>; -impl<'a, REG> MMCIRS_W<'a, REG> +pub type MmcirsW<'a, REG> = crate::BitWriter<'a, REG, Mmcirs>; +impl<'a, REG> MmcirsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCIRS_AW::VALUE1) + self.variant(Mmcirs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCIRS_AW::VALUE2) + self.variant(Mmcirs::Value2) } } #[doc = "USIC1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1RS_AW { +pub enum Usic1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1RS_AW) -> Self { + fn from(variant: Usic1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1RS` writer - USIC1 Reset Clear"] -pub type USIC1RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC1RS_AW>; -impl<'a, REG> USIC1RS_W<'a, REG> +pub type Usic1rsW<'a, REG> = crate::BitWriter<'a, REG, Usic1rs>; +impl<'a, REG> Usic1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC1RS_AW::VALUE1) + self.variant(Usic1rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC1RS_AW::VALUE2) + self.variant(Usic1rs::Value2) } } #[doc = "USIC2 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2RS_AW { +pub enum Usic2rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2RS_AW) -> Self { + fn from(variant: Usic2rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC2RS` writer - USIC2 Reset Clear"] -pub type USIC2RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC2RS_AW>; -impl<'a, REG> USIC2RS_W<'a, REG> +pub type Usic2rsW<'a, REG> = crate::BitWriter<'a, REG, Usic2rs>; +impl<'a, REG> Usic2rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC2RS_AW::VALUE1) + self.variant(Usic2rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC2RS_AW::VALUE2) + self.variant(Usic2rs::Value2) } } #[doc = "PORTS Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTSRS_AW { +pub enum Pportsrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTSRS_AW) -> Self { + fn from(variant: Pportsrs) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTSRS` writer - PORTS Reset Clear"] -pub type PPORTSRS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTSRS_AW>; -impl<'a, REG> PPORTSRS_W<'a, REG> +pub type PportsrsW<'a, REG> = crate::BitWriter<'a, REG, Pportsrs>; +impl<'a, REG> PportsrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPORTSRS_AW::VALUE1) + self.variant(Pportsrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPORTSRS_AW::VALUE2) + self.variant(Pportsrs::Value2) } } impl W { #[doc = "Bit 0 - CCU43 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu43rs(&mut self) -> CCU43RS_W { - CCU43RS_W::new(self, 0) + pub fn ccu43rs(&mut self) -> Ccu43rsW { + Ccu43rsW::new(self, 0) } #[doc = "Bit 3 - LEDTS Reset Clear"] #[inline(always)] #[must_use] - pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { - LEDTSCU0RS_W::new(self, 3) + pub fn ledtscu0rs(&mut self) -> Ledtscu0rsW { + Ledtscu0rsW::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Clear"] #[inline(always)] #[must_use] - pub fn mcan0rs(&mut self) -> MCAN0RS_W { - MCAN0RS_W::new(self, 4) + pub fn mcan0rs(&mut self) -> Mcan0rsW { + Mcan0rsW::new(self, 4) } #[doc = "Bit 5 - DAC Reset Clear"] #[inline(always)] #[must_use] - pub fn dacrs(&mut self) -> DACRS_W { - DACRS_W::new(self, 5) + pub fn dacrs(&mut self) -> DacrsW { + DacrsW::new(self, 5) } #[doc = "Bit 6 - MMC Interface Reset Clear"] #[inline(always)] #[must_use] - pub fn mmcirs(&mut self) -> MMCIRS_W { - MMCIRS_W::new(self, 6) + pub fn mmcirs(&mut self) -> MmcirsW { + MmcirsW::new(self, 6) } #[doc = "Bit 7 - USIC1 Reset Clear"] #[inline(always)] #[must_use] - pub fn usic1rs(&mut self) -> USIC1RS_W { - USIC1RS_W::new(self, 7) + pub fn usic1rs(&mut self) -> Usic1rsW { + Usic1rsW::new(self, 7) } #[doc = "Bit 8 - USIC2 Reset Clear"] #[inline(always)] #[must_use] - pub fn usic2rs(&mut self) -> USIC2RS_W { - USIC2RS_W::new(self, 8) + pub fn usic2rs(&mut self) -> Usic2rsW { + Usic2rsW::new(self, 8) } #[doc = "Bit 9 - PORTS Reset Clear"] #[inline(always)] #[must_use] - pub fn pportsrs(&mut self) -> PPORTSRS_W { - PPORTSRS_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pportsrs(&mut self) -> PportsrsW { + PportsrsW::new(self, 9) } } #[doc = "RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRCLR1_SPEC; -impl crate::RegisterSpec for PRCLR1_SPEC { +pub struct Prclr1Spec; +impl crate::RegisterSpec for Prclr1Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr1::W`](W) writer structure"] -impl crate::Writable for PRCLR1_SPEC { +impl crate::Writable for Prclr1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR1 to value 0"] -impl crate::Resettable for PRCLR1_SPEC { +impl crate::Resettable for Prclr1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prclr2.rs b/src/scu_reset/prclr2.rs index a10aa306..aae5ad41 100644 --- a/src/scu_reset/prclr2.rs +++ b/src/scu_reset/prclr2.rs @@ -1,287 +1,278 @@ #[doc = "Register `PRCLR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTRS_AW { +pub enum Wdtrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTRS_AW) -> Self { + fn from(variant: Wdtrs) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTRS` writer - WDT Reset Clear"] -pub type WDTRS_W<'a, REG> = crate::BitWriter<'a, REG, WDTRS_AW>; -impl<'a, REG> WDTRS_W<'a, REG> +pub type WdtrsW<'a, REG> = crate::BitWriter<'a, REG, Wdtrs>; +impl<'a, REG> WdtrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTRS_AW::VALUE1) + self.variant(Wdtrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTRS_AW::VALUE2) + self.variant(Wdtrs::Value2) } } #[doc = "ETH0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0RS_AW { +pub enum Eth0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0RS_AW) -> Self { + fn from(variant: Eth0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0RS` writer - ETH0 Reset Clear"] -pub type ETH0RS_W<'a, REG> = crate::BitWriter<'a, REG, ETH0RS_AW>; -impl<'a, REG> ETH0RS_W<'a, REG> +pub type Eth0rsW<'a, REG> = crate::BitWriter<'a, REG, Eth0rs>; +impl<'a, REG> Eth0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0RS_AW::VALUE1) + self.variant(Eth0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0RS_AW::VALUE2) + self.variant(Eth0rs::Value2) } } #[doc = "DMA0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0RS_AW { +pub enum Dma0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0RS_AW) -> Self { + fn from(variant: Dma0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0RS` writer - DMA0 Reset Clear"] -pub type DMA0RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA0RS_AW>; -impl<'a, REG> DMA0RS_W<'a, REG> +pub type Dma0rsW<'a, REG> = crate::BitWriter<'a, REG, Dma0rs>; +impl<'a, REG> Dma0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA0RS_AW::VALUE1) + self.variant(Dma0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA0RS_AW::VALUE2) + self.variant(Dma0rs::Value2) } } #[doc = "DMA1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1RS_AW { +pub enum Dma1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1RS_AW) -> Self { + fn from(variant: Dma1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA1RS` writer - DMA1 Reset Clear"] -pub type DMA1RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA1RS_AW>; -impl<'a, REG> DMA1RS_W<'a, REG> +pub type Dma1rsW<'a, REG> = crate::BitWriter<'a, REG, Dma1rs>; +impl<'a, REG> Dma1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA1RS_AW::VALUE1) + self.variant(Dma1rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA1RS_AW::VALUE2) + self.variant(Dma1rs::Value2) } } #[doc = "FCE Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCERS_AW { +pub enum Fcers { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCERS_AW) -> Self { + fn from(variant: Fcers) -> Self { variant as u8 != 0 } } #[doc = "Field `FCERS` writer - FCE Reset Clear"] -pub type FCERS_W<'a, REG> = crate::BitWriter<'a, REG, FCERS_AW>; -impl<'a, REG> FCERS_W<'a, REG> +pub type FcersW<'a, REG> = crate::BitWriter<'a, REG, Fcers>; +impl<'a, REG> FcersW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCERS_AW::VALUE1) + self.variant(Fcers::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCERS_AW::VALUE2) + self.variant(Fcers::Value2) } } #[doc = "USB Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBRS_AW { +pub enum Usbrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBRS_AW) -> Self { + fn from(variant: Usbrs) -> Self { variant as u8 != 0 } } #[doc = "Field `USBRS` writer - USB Reset Clear"] -pub type USBRS_W<'a, REG> = crate::BitWriter<'a, REG, USBRS_AW>; -impl<'a, REG> USBRS_W<'a, REG> +pub type UsbrsW<'a, REG> = crate::BitWriter<'a, REG, Usbrs>; +impl<'a, REG> UsbrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBRS_AW::VALUE1) + self.variant(Usbrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBRS_AW::VALUE2) + self.variant(Usbrs::Value2) } } #[doc = "ECAT0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_AW { +pub enum Ecat0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_AW) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RS` writer - ECAT0 Reset Clear"] -pub type ECAT0RS_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RS_AW>; -impl<'a, REG> ECAT0RS_W<'a, REG> +pub type Ecat0rsW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rs>; +impl<'a, REG> Ecat0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE1) + self.variant(Ecat0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE2) + self.variant(Ecat0rs::Value2) } } impl W { #[doc = "Bit 1 - WDT Reset Clear"] #[inline(always)] #[must_use] - pub fn wdtrs(&mut self) -> WDTRS_W { - WDTRS_W::new(self, 1) + pub fn wdtrs(&mut self) -> WdtrsW { + WdtrsW::new(self, 1) } #[doc = "Bit 2 - ETH0 Reset Clear"] #[inline(always)] #[must_use] - pub fn eth0rs(&mut self) -> ETH0RS_W { - ETH0RS_W::new(self, 2) + pub fn eth0rs(&mut self) -> Eth0rsW { + Eth0rsW::new(self, 2) } #[doc = "Bit 4 - DMA0 Reset Clear"] #[inline(always)] #[must_use] - pub fn dma0rs(&mut self) -> DMA0RS_W { - DMA0RS_W::new(self, 4) + pub fn dma0rs(&mut self) -> Dma0rsW { + Dma0rsW::new(self, 4) } #[doc = "Bit 5 - DMA1 Reset Clear"] #[inline(always)] #[must_use] - pub fn dma1rs(&mut self) -> DMA1RS_W { - DMA1RS_W::new(self, 5) + pub fn dma1rs(&mut self) -> Dma1rsW { + Dma1rsW::new(self, 5) } #[doc = "Bit 6 - FCE Reset Clear"] #[inline(always)] #[must_use] - pub fn fcers(&mut self) -> FCERS_W { - FCERS_W::new(self, 6) + pub fn fcers(&mut self) -> FcersW { + FcersW::new(self, 6) } #[doc = "Bit 7 - USB Reset Clear"] #[inline(always)] #[must_use] - pub fn usbrs(&mut self) -> USBRS_W { - USBRS_W::new(self, 7) + pub fn usbrs(&mut self) -> UsbrsW { + UsbrsW::new(self, 7) } #[doc = "Bit 10 - ECAT0 Reset Clear"] #[inline(always)] #[must_use] - pub fn ecat0rs(&mut self) -> ECAT0RS_W { - ECAT0RS_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rs(&mut self) -> Ecat0rsW { + Ecat0rsW::new(self, 10) } } #[doc = "RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRCLR2_SPEC; -impl crate::RegisterSpec for PRCLR2_SPEC { +pub struct Prclr2Spec; +impl crate::RegisterSpec for Prclr2Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr2::W`](W) writer structure"] -impl crate::Writable for PRCLR2_SPEC { +impl crate::Writable for Prclr2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR2 to value 0"] -impl crate::Resettable for PRCLR2_SPEC { +impl crate::Resettable for Prclr2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prclr3.rs b/src/scu_reset/prclr3.rs index 70475bfa..5c2fb92d 100644 --- a/src/scu_reset/prclr3.rs +++ b/src/scu_reset/prclr3.rs @@ -1,65 +1,56 @@ #[doc = "Register `PRCLR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "EBU Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBURS_AW { +pub enum Eburs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBURS_AW) -> Self { + fn from(variant: Eburs) -> Self { variant as u8 != 0 } } #[doc = "Field `EBURS` writer - EBU Reset Assert"] -pub type EBURS_W<'a, REG> = crate::BitWriter<'a, REG, EBURS_AW>; -impl<'a, REG> EBURS_W<'a, REG> +pub type EbursW<'a, REG> = crate::BitWriter<'a, REG, Eburs>; +impl<'a, REG> EbursW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBURS_AW::VALUE1) + self.variant(Eburs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBURS_AW::VALUE2) + self.variant(Eburs::Value2) } } impl W { #[doc = "Bit 2 - EBU Reset Assert"] #[inline(always)] #[must_use] - pub fn eburs(&mut self) -> EBURS_W { - EBURS_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eburs(&mut self) -> EbursW { + EbursW::new(self, 2) } } #[doc = "RCU Peripheral 3 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr3::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRCLR3_SPEC; -impl crate::RegisterSpec for PRCLR3_SPEC { +pub struct Prclr3Spec; +impl crate::RegisterSpec for Prclr3Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr3::W`](W) writer structure"] -impl crate::Writable for PRCLR3_SPEC { +impl crate::Writable for Prclr3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR3 to value 0"] -impl crate::Resettable for PRCLR3_SPEC { +impl crate::Resettable for Prclr3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset0.rs b/src/scu_reset/prset0.rs index d6e019b6..09edad33 100644 --- a/src/scu_reset/prset0.rs +++ b/src/scu_reset/prset0.rs @@ -1,435 +1,426 @@ #[doc = "Register `PRSET0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADCRS_AW { +pub enum Vadcrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADCRS_AW) -> Self { + fn from(variant: Vadcrs) -> Self { variant as u8 != 0 } } #[doc = "Field `VADCRS` writer - VADC Reset Assert"] -pub type VADCRS_W<'a, REG> = crate::BitWriter<'a, REG, VADCRS_AW>; -impl<'a, REG> VADCRS_W<'a, REG> +pub type VadcrsW<'a, REG> = crate::BitWriter<'a, REG, Vadcrs>; +impl<'a, REG> VadcrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VADCRS_AW::VALUE1) + self.variant(Vadcrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VADCRS_AW::VALUE2) + self.variant(Vadcrs::Value2) } } #[doc = "DSD Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSDRS_AW { +pub enum Dsdrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSDRS_AW) -> Self { + fn from(variant: Dsdrs) -> Self { variant as u8 != 0 } } #[doc = "Field `DSDRS` writer - DSD Reset Assert"] -pub type DSDRS_W<'a, REG> = crate::BitWriter<'a, REG, DSDRS_AW>; -impl<'a, REG> DSDRS_W<'a, REG> +pub type DsdrsW<'a, REG> = crate::BitWriter<'a, REG, Dsdrs>; +impl<'a, REG> DsdrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSDRS_AW::VALUE1) + self.variant(Dsdrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSDRS_AW::VALUE2) + self.variant(Dsdrs::Value2) } } #[doc = "CCU40 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40RS_AW { +pub enum Ccu40rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40RS_AW) -> Self { + fn from(variant: Ccu40rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40RS` writer - CCU40 Reset Assert"] -pub type CCU40RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU40RS_AW>; -impl<'a, REG> CCU40RS_W<'a, REG> +pub type Ccu40rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu40rs>; +impl<'a, REG> Ccu40rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU40RS_AW::VALUE1) + self.variant(Ccu40rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU40RS_AW::VALUE2) + self.variant(Ccu40rs::Value2) } } #[doc = "CCU41 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41RS_AW { +pub enum Ccu41rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41RS_AW) -> Self { + fn from(variant: Ccu41rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41RS` writer - CCU41 Reset Assert"] -pub type CCU41RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU41RS_AW>; -impl<'a, REG> CCU41RS_W<'a, REG> +pub type Ccu41rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu41rs>; +impl<'a, REG> Ccu41rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU41RS_AW::VALUE1) + self.variant(Ccu41rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU41RS_AW::VALUE2) + self.variant(Ccu41rs::Value2) } } #[doc = "CCU42 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42RS_AW { +pub enum Ccu42rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42RS_AW) -> Self { + fn from(variant: Ccu42rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU42RS` writer - CCU42 Reset Assert"] -pub type CCU42RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU42RS_AW>; -impl<'a, REG> CCU42RS_W<'a, REG> +pub type Ccu42rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu42rs>; +impl<'a, REG> Ccu42rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU42RS_AW::VALUE1) + self.variant(Ccu42rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU42RS_AW::VALUE2) + self.variant(Ccu42rs::Value2) } } #[doc = "CCU80 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80RS_AW { +pub enum Ccu80rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80RS_AW) -> Self { + fn from(variant: Ccu80rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80RS` writer - CCU80 Reset Assert"] -pub type CCU80RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU80RS_AW>; -impl<'a, REG> CCU80RS_W<'a, REG> +pub type Ccu80rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu80rs>; +impl<'a, REG> Ccu80rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU80RS_AW::VALUE1) + self.variant(Ccu80rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU80RS_AW::VALUE2) + self.variant(Ccu80rs::Value2) } } #[doc = "CCU81 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81RS_AW { +pub enum Ccu81rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81RS_AW) -> Self { + fn from(variant: Ccu81rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU81RS` writer - CCU81 Reset Assert"] -pub type CCU81RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU81RS_AW>; -impl<'a, REG> CCU81RS_W<'a, REG> +pub type Ccu81rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu81rs>; +impl<'a, REG> Ccu81rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU81RS_AW::VALUE1) + self.variant(Ccu81rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU81RS_AW::VALUE2) + self.variant(Ccu81rs::Value2) } } #[doc = "POSIF0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0RS_AW { +pub enum Posif0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0RS_AW) -> Self { + fn from(variant: Posif0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0RS` writer - POSIF0 Reset Assert"] -pub type POSIF0RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0RS_AW>; -impl<'a, REG> POSIF0RS_W<'a, REG> +pub type Posif0rsW<'a, REG> = crate::BitWriter<'a, REG, Posif0rs>; +impl<'a, REG> Posif0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF0RS_AW::VALUE1) + self.variant(Posif0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF0RS_AW::VALUE2) + self.variant(Posif0rs::Value2) } } #[doc = "POSIF1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1RS_AW { +pub enum Posif1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1RS_AW) -> Self { + fn from(variant: Posif1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF1RS` writer - POSIF1 Reset Assert"] -pub type POSIF1RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF1RS_AW>; -impl<'a, REG> POSIF1RS_W<'a, REG> +pub type Posif1rsW<'a, REG> = crate::BitWriter<'a, REG, Posif1rs>; +impl<'a, REG> Posif1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(POSIF1RS_AW::VALUE1) + self.variant(Posif1rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(POSIF1RS_AW::VALUE2) + self.variant(Posif1rs::Value2) } } #[doc = "USIC0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0RS_AW { +pub enum Usic0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0RS_AW) -> Self { + fn from(variant: Usic0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0RS` writer - USIC0 Reset Assert"] -pub type USIC0RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC0RS_AW>; -impl<'a, REG> USIC0RS_W<'a, REG> +pub type Usic0rsW<'a, REG> = crate::BitWriter<'a, REG, Usic0rs>; +impl<'a, REG> Usic0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC0RS_AW::VALUE1) + self.variant(Usic0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC0RS_AW::VALUE2) + self.variant(Usic0rs::Value2) } } #[doc = "ERU1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1RS_AW { +pub enum Eru1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1RS_AW) -> Self { + fn from(variant: Eru1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1RS` writer - ERU1 Reset Assert"] -pub type ERU1RS_W<'a, REG> = crate::BitWriter<'a, REG, ERU1RS_AW>; -impl<'a, REG> ERU1RS_W<'a, REG> +pub type Eru1rsW<'a, REG> = crate::BitWriter<'a, REG, Eru1rs>; +impl<'a, REG> Eru1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERU1RS_AW::VALUE1) + self.variant(Eru1rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERU1RS_AW::VALUE2) + self.variant(Eru1rs::Value2) } } impl W { #[doc = "Bit 0 - VADC Reset Assert"] #[inline(always)] #[must_use] - pub fn vadcrs(&mut self) -> VADCRS_W { - VADCRS_W::new(self, 0) + pub fn vadcrs(&mut self) -> VadcrsW { + VadcrsW::new(self, 0) } #[doc = "Bit 1 - DSD Reset Assert"] #[inline(always)] #[must_use] - pub fn dsdrs(&mut self) -> DSDRS_W { - DSDRS_W::new(self, 1) + pub fn dsdrs(&mut self) -> DsdrsW { + DsdrsW::new(self, 1) } #[doc = "Bit 2 - CCU40 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu40rs(&mut self) -> CCU40RS_W { - CCU40RS_W::new(self, 2) + pub fn ccu40rs(&mut self) -> Ccu40rsW { + Ccu40rsW::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu41rs(&mut self) -> CCU41RS_W { - CCU41RS_W::new(self, 3) + pub fn ccu41rs(&mut self) -> Ccu41rsW { + Ccu41rsW::new(self, 3) } #[doc = "Bit 4 - CCU42 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu42rs(&mut self) -> CCU42RS_W { - CCU42RS_W::new(self, 4) + pub fn ccu42rs(&mut self) -> Ccu42rsW { + Ccu42rsW::new(self, 4) } #[doc = "Bit 7 - CCU80 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu80rs(&mut self) -> CCU80RS_W { - CCU80RS_W::new(self, 7) + pub fn ccu80rs(&mut self) -> Ccu80rsW { + Ccu80rsW::new(self, 7) } #[doc = "Bit 8 - CCU81 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu81rs(&mut self) -> CCU81RS_W { - CCU81RS_W::new(self, 8) + pub fn ccu81rs(&mut self) -> Ccu81rsW { + Ccu81rsW::new(self, 8) } #[doc = "Bit 9 - POSIF0 Reset Assert"] #[inline(always)] #[must_use] - pub fn posif0rs(&mut self) -> POSIF0RS_W { - POSIF0RS_W::new(self, 9) + pub fn posif0rs(&mut self) -> Posif0rsW { + Posif0rsW::new(self, 9) } #[doc = "Bit 10 - POSIF1 Reset Assert"] #[inline(always)] #[must_use] - pub fn posif1rs(&mut self) -> POSIF1RS_W { - POSIF1RS_W::new(self, 10) + pub fn posif1rs(&mut self) -> Posif1rsW { + Posif1rsW::new(self, 10) } #[doc = "Bit 11 - USIC0 Reset Assert"] #[inline(always)] #[must_use] - pub fn usic0rs(&mut self) -> USIC0RS_W { - USIC0RS_W::new(self, 11) + pub fn usic0rs(&mut self) -> Usic0rsW { + Usic0rsW::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Assert"] #[inline(always)] #[must_use] - pub fn eru1rs(&mut self) -> ERU1RS_W { - ERU1RS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eru1rs(&mut self) -> Eru1rsW { + Eru1rsW::new(self, 16) } } #[doc = "RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSET0_SPEC; -impl crate::RegisterSpec for PRSET0_SPEC { +pub struct Prset0Spec; +impl crate::RegisterSpec for Prset0Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset0::W`](W) writer structure"] -impl crate::Writable for PRSET0_SPEC { +impl crate::Writable for Prset0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET0 to value 0"] -impl crate::Resettable for PRSET0_SPEC { +impl crate::Resettable for Prset0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset1.rs b/src/scu_reset/prset1.rs index f53cf759..8d3bde0d 100644 --- a/src/scu_reset/prset1.rs +++ b/src/scu_reset/prset1.rs @@ -1,324 +1,315 @@ #[doc = "Register `PRSET1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CCU43 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43RS_AW { +pub enum Ccu43rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43RS_AW) -> Self { + fn from(variant: Ccu43rs) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU43RS` writer - CCU43 Reset Assert"] -pub type CCU43RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU43RS_AW>; -impl<'a, REG> CCU43RS_W<'a, REG> +pub type Ccu43rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu43rs>; +impl<'a, REG> Ccu43rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CCU43RS_AW::VALUE1) + self.variant(Ccu43rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CCU43RS_AW::VALUE2) + self.variant(Ccu43rs::Value2) } } #[doc = "LEDTS Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0RS_AW { +pub enum Ledtscu0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0RS_AW) -> Self { + fn from(variant: Ledtscu0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0RS` writer - LEDTS Reset Assert"] -pub type LEDTSCU0RS_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0RS_AW>; -impl<'a, REG> LEDTSCU0RS_W<'a, REG> +pub type Ledtscu0rsW<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0rs>; +impl<'a, REG> Ledtscu0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LEDTSCU0RS_AW::VALUE1) + self.variant(Ledtscu0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LEDTSCU0RS_AW::VALUE2) + self.variant(Ledtscu0rs::Value2) } } #[doc = "MultiCAN Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0RS_AW { +pub enum Mcan0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0RS_AW) -> Self { + fn from(variant: Mcan0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0RS` writer - MultiCAN Reset Assert"] -pub type MCAN0RS_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0RS_AW>; -impl<'a, REG> MCAN0RS_W<'a, REG> +pub type Mcan0rsW<'a, REG> = crate::BitWriter<'a, REG, Mcan0rs>; +impl<'a, REG> Mcan0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCAN0RS_AW::VALUE1) + self.variant(Mcan0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCAN0RS_AW::VALUE2) + self.variant(Mcan0rs::Value2) } } #[doc = "DAC Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DACRS_AW { +pub enum Dacrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DACRS_AW) -> Self { + fn from(variant: Dacrs) -> Self { variant as u8 != 0 } } #[doc = "Field `DACRS` writer - DAC Reset Assert"] -pub type DACRS_W<'a, REG> = crate::BitWriter<'a, REG, DACRS_AW>; -impl<'a, REG> DACRS_W<'a, REG> +pub type DacrsW<'a, REG> = crate::BitWriter<'a, REG, Dacrs>; +impl<'a, REG> DacrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DACRS_AW::VALUE1) + self.variant(Dacrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DACRS_AW::VALUE2) + self.variant(Dacrs::Value2) } } #[doc = "MMC Interface Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCIRS_AW { +pub enum Mmcirs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCIRS_AW) -> Self { + fn from(variant: Mmcirs) -> Self { variant as u8 != 0 } } #[doc = "Field `MMCIRS` writer - MMC Interface Reset Assert"] -pub type MMCIRS_W<'a, REG> = crate::BitWriter<'a, REG, MMCIRS_AW>; -impl<'a, REG> MMCIRS_W<'a, REG> +pub type MmcirsW<'a, REG> = crate::BitWriter<'a, REG, Mmcirs>; +impl<'a, REG> MmcirsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MMCIRS_AW::VALUE1) + self.variant(Mmcirs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MMCIRS_AW::VALUE2) + self.variant(Mmcirs::Value2) } } #[doc = "USIC1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1RS_AW { +pub enum Usic1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1RS_AW) -> Self { + fn from(variant: Usic1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1RS` writer - USIC1 Reset Assert"] -pub type USIC1RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC1RS_AW>; -impl<'a, REG> USIC1RS_W<'a, REG> +pub type Usic1rsW<'a, REG> = crate::BitWriter<'a, REG, Usic1rs>; +impl<'a, REG> Usic1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC1RS_AW::VALUE1) + self.variant(Usic1rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC1RS_AW::VALUE2) + self.variant(Usic1rs::Value2) } } #[doc = "USIC2 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2RS_AW { +pub enum Usic2rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2RS_AW) -> Self { + fn from(variant: Usic2rs) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC2RS` writer - USIC2 Reset Assert"] -pub type USIC2RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC2RS_AW>; -impl<'a, REG> USIC2RS_W<'a, REG> +pub type Usic2rsW<'a, REG> = crate::BitWriter<'a, REG, Usic2rs>; +impl<'a, REG> Usic2rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USIC2RS_AW::VALUE1) + self.variant(Usic2rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USIC2RS_AW::VALUE2) + self.variant(Usic2rs::Value2) } } #[doc = "PORTS Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTSRS_AW { +pub enum Pportsrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTSRS_AW) -> Self { + fn from(variant: Pportsrs) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTSRS` writer - PORTS Reset Assert"] -pub type PPORTSRS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTSRS_AW>; -impl<'a, REG> PPORTSRS_W<'a, REG> +pub type PportsrsW<'a, REG> = crate::BitWriter<'a, REG, Pportsrs>; +impl<'a, REG> PportsrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPORTSRS_AW::VALUE1) + self.variant(Pportsrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPORTSRS_AW::VALUE2) + self.variant(Pportsrs::Value2) } } impl W { #[doc = "Bit 0 - CCU43 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu43rs(&mut self) -> CCU43RS_W { - CCU43RS_W::new(self, 0) + pub fn ccu43rs(&mut self) -> Ccu43rsW { + Ccu43rsW::new(self, 0) } #[doc = "Bit 3 - LEDTS Reset Assert"] #[inline(always)] #[must_use] - pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { - LEDTSCU0RS_W::new(self, 3) + pub fn ledtscu0rs(&mut self) -> Ledtscu0rsW { + Ledtscu0rsW::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Assert"] #[inline(always)] #[must_use] - pub fn mcan0rs(&mut self) -> MCAN0RS_W { - MCAN0RS_W::new(self, 4) + pub fn mcan0rs(&mut self) -> Mcan0rsW { + Mcan0rsW::new(self, 4) } #[doc = "Bit 5 - DAC Reset Assert"] #[inline(always)] #[must_use] - pub fn dacrs(&mut self) -> DACRS_W { - DACRS_W::new(self, 5) + pub fn dacrs(&mut self) -> DacrsW { + DacrsW::new(self, 5) } #[doc = "Bit 6 - MMC Interface Reset Assert"] #[inline(always)] #[must_use] - pub fn mmcirs(&mut self) -> MMCIRS_W { - MMCIRS_W::new(self, 6) + pub fn mmcirs(&mut self) -> MmcirsW { + MmcirsW::new(self, 6) } #[doc = "Bit 7 - USIC1 Reset Assert"] #[inline(always)] #[must_use] - pub fn usic1rs(&mut self) -> USIC1RS_W { - USIC1RS_W::new(self, 7) + pub fn usic1rs(&mut self) -> Usic1rsW { + Usic1rsW::new(self, 7) } #[doc = "Bit 8 - USIC2 Reset Assert"] #[inline(always)] #[must_use] - pub fn usic2rs(&mut self) -> USIC2RS_W { - USIC2RS_W::new(self, 8) + pub fn usic2rs(&mut self) -> Usic2rsW { + Usic2rsW::new(self, 8) } #[doc = "Bit 9 - PORTS Reset Assert"] #[inline(always)] #[must_use] - pub fn pportsrs(&mut self) -> PPORTSRS_W { - PPORTSRS_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pportsrs(&mut self) -> PportsrsW { + PportsrsW::new(self, 9) } } #[doc = "RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSET1_SPEC; -impl crate::RegisterSpec for PRSET1_SPEC { +pub struct Prset1Spec; +impl crate::RegisterSpec for Prset1Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset1::W`](W) writer structure"] -impl crate::Writable for PRSET1_SPEC { +impl crate::Writable for Prset1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET1 to value 0"] -impl crate::Resettable for PRSET1_SPEC { +impl crate::Resettable for Prset1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset2.rs b/src/scu_reset/prset2.rs index c87a4462..7110ea72 100644 --- a/src/scu_reset/prset2.rs +++ b/src/scu_reset/prset2.rs @@ -1,287 +1,278 @@ #[doc = "Register `PRSET2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTRS_AW { +pub enum Wdtrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTRS_AW) -> Self { + fn from(variant: Wdtrs) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTRS` writer - WDT Reset Assert"] -pub type WDTRS_W<'a, REG> = crate::BitWriter<'a, REG, WDTRS_AW>; -impl<'a, REG> WDTRS_W<'a, REG> +pub type WdtrsW<'a, REG> = crate::BitWriter<'a, REG, Wdtrs>; +impl<'a, REG> WdtrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WDTRS_AW::VALUE1) + self.variant(Wdtrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WDTRS_AW::VALUE2) + self.variant(Wdtrs::Value2) } } #[doc = "ETH0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0RS_AW { +pub enum Eth0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0RS_AW) -> Self { + fn from(variant: Eth0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ETH0RS` writer - ETH0 Reset Assert"] -pub type ETH0RS_W<'a, REG> = crate::BitWriter<'a, REG, ETH0RS_AW>; -impl<'a, REG> ETH0RS_W<'a, REG> +pub type Eth0rsW<'a, REG> = crate::BitWriter<'a, REG, Eth0rs>; +impl<'a, REG> Eth0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ETH0RS_AW::VALUE1) + self.variant(Eth0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ETH0RS_AW::VALUE2) + self.variant(Eth0rs::Value2) } } #[doc = "DMA0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0RS_AW { +pub enum Dma0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0RS_AW) -> Self { + fn from(variant: Dma0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0RS` writer - DMA0 Reset Assert"] -pub type DMA0RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA0RS_AW>; -impl<'a, REG> DMA0RS_W<'a, REG> +pub type Dma0rsW<'a, REG> = crate::BitWriter<'a, REG, Dma0rs>; +impl<'a, REG> Dma0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA0RS_AW::VALUE1) + self.variant(Dma0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA0RS_AW::VALUE2) + self.variant(Dma0rs::Value2) } } #[doc = "DMA1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1RS_AW { +pub enum Dma1rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1RS_AW) -> Self { + fn from(variant: Dma1rs) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA1RS` writer - DMA1 Reset Assert"] -pub type DMA1RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA1RS_AW>; -impl<'a, REG> DMA1RS_W<'a, REG> +pub type Dma1rsW<'a, REG> = crate::BitWriter<'a, REG, Dma1rs>; +impl<'a, REG> Dma1rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMA1RS_AW::VALUE1) + self.variant(Dma1rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMA1RS_AW::VALUE2) + self.variant(Dma1rs::Value2) } } #[doc = "FCE Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCERS_AW { +pub enum Fcers { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCERS_AW) -> Self { + fn from(variant: Fcers) -> Self { variant as u8 != 0 } } #[doc = "Field `FCERS` writer - FCE Reset Assert"] -pub type FCERS_W<'a, REG> = crate::BitWriter<'a, REG, FCERS_AW>; -impl<'a, REG> FCERS_W<'a, REG> +pub type FcersW<'a, REG> = crate::BitWriter<'a, REG, Fcers>; +impl<'a, REG> FcersW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FCERS_AW::VALUE1) + self.variant(Fcers::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FCERS_AW::VALUE2) + self.variant(Fcers::Value2) } } #[doc = "USB Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBRS_AW { +pub enum Usbrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBRS_AW) -> Self { + fn from(variant: Usbrs) -> Self { variant as u8 != 0 } } #[doc = "Field `USBRS` writer - USB Reset Assert"] -pub type USBRS_W<'a, REG> = crate::BitWriter<'a, REG, USBRS_AW>; -impl<'a, REG> USBRS_W<'a, REG> +pub type UsbrsW<'a, REG> = crate::BitWriter<'a, REG, Usbrs>; +impl<'a, REG> UsbrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(USBRS_AW::VALUE1) + self.variant(Usbrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(USBRS_AW::VALUE2) + self.variant(Usbrs::Value2) } } #[doc = "ECAT0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_AW { +pub enum Ecat0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_AW) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RS` writer - ECAT0 Reset Assert"] -pub type ECAT0RS_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RS_AW>; -impl<'a, REG> ECAT0RS_W<'a, REG> +pub type Ecat0rsW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rs>; +impl<'a, REG> Ecat0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE1) + self.variant(Ecat0rs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE2) + self.variant(Ecat0rs::Value2) } } impl W { #[doc = "Bit 1 - WDT Reset Assert"] #[inline(always)] #[must_use] - pub fn wdtrs(&mut self) -> WDTRS_W { - WDTRS_W::new(self, 1) + pub fn wdtrs(&mut self) -> WdtrsW { + WdtrsW::new(self, 1) } #[doc = "Bit 2 - ETH0 Reset Assert"] #[inline(always)] #[must_use] - pub fn eth0rs(&mut self) -> ETH0RS_W { - ETH0RS_W::new(self, 2) + pub fn eth0rs(&mut self) -> Eth0rsW { + Eth0rsW::new(self, 2) } #[doc = "Bit 4 - DMA0 Reset Assert"] #[inline(always)] #[must_use] - pub fn dma0rs(&mut self) -> DMA0RS_W { - DMA0RS_W::new(self, 4) + pub fn dma0rs(&mut self) -> Dma0rsW { + Dma0rsW::new(self, 4) } #[doc = "Bit 5 - DMA1 Reset Assert"] #[inline(always)] #[must_use] - pub fn dma1rs(&mut self) -> DMA1RS_W { - DMA1RS_W::new(self, 5) + pub fn dma1rs(&mut self) -> Dma1rsW { + Dma1rsW::new(self, 5) } #[doc = "Bit 6 - FCE Reset Assert"] #[inline(always)] #[must_use] - pub fn fcers(&mut self) -> FCERS_W { - FCERS_W::new(self, 6) + pub fn fcers(&mut self) -> FcersW { + FcersW::new(self, 6) } #[doc = "Bit 7 - USB Reset Assert"] #[inline(always)] #[must_use] - pub fn usbrs(&mut self) -> USBRS_W { - USBRS_W::new(self, 7) + pub fn usbrs(&mut self) -> UsbrsW { + UsbrsW::new(self, 7) } #[doc = "Bit 10 - ECAT0 Reset Assert"] #[inline(always)] #[must_use] - pub fn ecat0rs(&mut self) -> ECAT0RS_W { - ECAT0RS_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rs(&mut self) -> Ecat0rsW { + Ecat0rsW::new(self, 10) } } #[doc = "RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSET2_SPEC; -impl crate::RegisterSpec for PRSET2_SPEC { +pub struct Prset2Spec; +impl crate::RegisterSpec for Prset2Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset2::W`](W) writer structure"] -impl crate::Writable for PRSET2_SPEC { +impl crate::Writable for Prset2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET2 to value 0"] -impl crate::Resettable for PRSET2_SPEC { +impl crate::Resettable for Prset2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset3.rs b/src/scu_reset/prset3.rs index f8830095..457a3794 100644 --- a/src/scu_reset/prset3.rs +++ b/src/scu_reset/prset3.rs @@ -1,65 +1,56 @@ #[doc = "Register `PRSET3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "EBU Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBURS_AW { +pub enum Eburs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBURS_AW) -> Self { + fn from(variant: Eburs) -> Self { variant as u8 != 0 } } #[doc = "Field `EBURS` writer - EBU Reset Assert"] -pub type EBURS_W<'a, REG> = crate::BitWriter<'a, REG, EBURS_AW>; -impl<'a, REG> EBURS_W<'a, REG> +pub type EbursW<'a, REG> = crate::BitWriter<'a, REG, Eburs>; +impl<'a, REG> EbursW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EBURS_AW::VALUE1) + self.variant(Eburs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EBURS_AW::VALUE2) + self.variant(Eburs::Value2) } } impl W { #[doc = "Bit 2 - EBU Reset Assert"] #[inline(always)] #[must_use] - pub fn eburs(&mut self) -> EBURS_W { - EBURS_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn eburs(&mut self) -> EbursW { + EbursW::new(self, 2) } } #[doc = "RCU Peripheral 3 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset3::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSET3_SPEC; -impl crate::RegisterSpec for PRSET3_SPEC { +pub struct Prset3Spec; +impl crate::RegisterSpec for Prset3Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset3::W`](W) writer structure"] -impl crate::Writable for PRSET3_SPEC { +impl crate::Writable for Prset3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET3 to value 0"] -impl crate::Resettable for PRSET3_SPEC { +impl crate::Resettable for Prset3Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prstat0.rs b/src/scu_reset/prstat0.rs index 5d07d968..e3fbf4db 100644 --- a/src/scu_reset/prstat0.rs +++ b/src/scu_reset/prstat0.rs @@ -1,466 +1,466 @@ #[doc = "Register `PRSTAT0` reader"] -pub type R = crate::R; -#[doc = "Field `VADCRS` reader - VADC Reset Status"] -pub type VADCRS_R = crate::BitReader; +pub type R = crate::R; #[doc = "VADC Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VADCRS_A { +pub enum Vadcrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VADCRS_A) -> Self { + fn from(variant: Vadcrs) -> Self { variant as u8 != 0 } } -impl VADCRS_R { +#[doc = "Field `VADCRS` reader - VADC Reset Status"] +pub type VadcrsR = crate::BitReader; +impl VadcrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VADCRS_A { + pub const fn variant(&self) -> Vadcrs { match self.bits { - false => VADCRS_A::VALUE1, - true => VADCRS_A::VALUE2, + false => Vadcrs::Value1, + true => Vadcrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VADCRS_A::VALUE1 + *self == Vadcrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VADCRS_A::VALUE2 + *self == Vadcrs::Value2 } } -#[doc = "Field `DSDRS` reader - DSD Reset Status"] -pub type DSDRS_R = crate::BitReader; #[doc = "DSD Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSDRS_A { +pub enum Dsdrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSDRS_A) -> Self { + fn from(variant: Dsdrs) -> Self { variant as u8 != 0 } } -impl DSDRS_R { +#[doc = "Field `DSDRS` reader - DSD Reset Status"] +pub type DsdrsR = crate::BitReader; +impl DsdrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSDRS_A { + pub const fn variant(&self) -> Dsdrs { match self.bits { - false => DSDRS_A::VALUE1, - true => DSDRS_A::VALUE2, + false => Dsdrs::Value1, + true => Dsdrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSDRS_A::VALUE1 + *self == Dsdrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSDRS_A::VALUE2 + *self == Dsdrs::Value2 } } -#[doc = "Field `CCU40RS` reader - CCU40 Reset Status"] -pub type CCU40RS_R = crate::BitReader; #[doc = "CCU40 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU40RS_A { +pub enum Ccu40rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU40RS_A) -> Self { + fn from(variant: Ccu40rs) -> Self { variant as u8 != 0 } } -impl CCU40RS_R { +#[doc = "Field `CCU40RS` reader - CCU40 Reset Status"] +pub type Ccu40rsR = crate::BitReader; +impl Ccu40rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU40RS_A { + pub const fn variant(&self) -> Ccu40rs { match self.bits { - false => CCU40RS_A::VALUE1, - true => CCU40RS_A::VALUE2, + false => Ccu40rs::Value1, + true => Ccu40rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU40RS_A::VALUE1 + *self == Ccu40rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU40RS_A::VALUE2 + *self == Ccu40rs::Value2 } } -#[doc = "Field `CCU41RS` reader - CCU41 Reset Status"] -pub type CCU41RS_R = crate::BitReader; #[doc = "CCU41 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU41RS_A { +pub enum Ccu41rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU41RS_A) -> Self { + fn from(variant: Ccu41rs) -> Self { variant as u8 != 0 } } -impl CCU41RS_R { +#[doc = "Field `CCU41RS` reader - CCU41 Reset Status"] +pub type Ccu41rsR = crate::BitReader; +impl Ccu41rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU41RS_A { + pub const fn variant(&self) -> Ccu41rs { match self.bits { - false => CCU41RS_A::VALUE1, - true => CCU41RS_A::VALUE2, + false => Ccu41rs::Value1, + true => Ccu41rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU41RS_A::VALUE1 + *self == Ccu41rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU41RS_A::VALUE2 + *self == Ccu41rs::Value2 } } -#[doc = "Field `CCU42RS` reader - CCU42 Reset Status"] -pub type CCU42RS_R = crate::BitReader; #[doc = "CCU42 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU42RS_A { +pub enum Ccu42rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU42RS_A) -> Self { + fn from(variant: Ccu42rs) -> Self { variant as u8 != 0 } } -impl CCU42RS_R { +#[doc = "Field `CCU42RS` reader - CCU42 Reset Status"] +pub type Ccu42rsR = crate::BitReader; +impl Ccu42rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU42RS_A { + pub const fn variant(&self) -> Ccu42rs { match self.bits { - false => CCU42RS_A::VALUE1, - true => CCU42RS_A::VALUE2, + false => Ccu42rs::Value1, + true => Ccu42rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU42RS_A::VALUE1 + *self == Ccu42rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU42RS_A::VALUE2 + *self == Ccu42rs::Value2 } } -#[doc = "Field `CCU80RS` reader - CCU80 Reset Status"] -pub type CCU80RS_R = crate::BitReader; #[doc = "CCU80 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU80RS_A { +pub enum Ccu80rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU80RS_A) -> Self { + fn from(variant: Ccu80rs) -> Self { variant as u8 != 0 } } -impl CCU80RS_R { +#[doc = "Field `CCU80RS` reader - CCU80 Reset Status"] +pub type Ccu80rsR = crate::BitReader; +impl Ccu80rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU80RS_A { + pub const fn variant(&self) -> Ccu80rs { match self.bits { - false => CCU80RS_A::VALUE1, - true => CCU80RS_A::VALUE2, + false => Ccu80rs::Value1, + true => Ccu80rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU80RS_A::VALUE1 + *self == Ccu80rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU80RS_A::VALUE2 + *self == Ccu80rs::Value2 } } -#[doc = "Field `CCU81RS` reader - CCU81 Reset Status"] -pub type CCU81RS_R = crate::BitReader; #[doc = "CCU81 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU81RS_A { +pub enum Ccu81rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU81RS_A) -> Self { + fn from(variant: Ccu81rs) -> Self { variant as u8 != 0 } } -impl CCU81RS_R { +#[doc = "Field `CCU81RS` reader - CCU81 Reset Status"] +pub type Ccu81rsR = crate::BitReader; +impl Ccu81rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU81RS_A { + pub const fn variant(&self) -> Ccu81rs { match self.bits { - false => CCU81RS_A::VALUE1, - true => CCU81RS_A::VALUE2, + false => Ccu81rs::Value1, + true => Ccu81rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU81RS_A::VALUE1 + *self == Ccu81rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU81RS_A::VALUE2 + *self == Ccu81rs::Value2 } } -#[doc = "Field `POSIF0RS` reader - POSIF0 Reset Status"] -pub type POSIF0RS_R = crate::BitReader; #[doc = "POSIF0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF0RS_A { +pub enum Posif0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF0RS_A) -> Self { + fn from(variant: Posif0rs) -> Self { variant as u8 != 0 } } -impl POSIF0RS_R { +#[doc = "Field `POSIF0RS` reader - POSIF0 Reset Status"] +pub type Posif0rsR = crate::BitReader; +impl Posif0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSIF0RS_A { + pub const fn variant(&self) -> Posif0rs { match self.bits { - false => POSIF0RS_A::VALUE1, - true => POSIF0RS_A::VALUE2, + false => Posif0rs::Value1, + true => Posif0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSIF0RS_A::VALUE1 + *self == Posif0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSIF0RS_A::VALUE2 + *self == Posif0rs::Value2 } } -#[doc = "Field `POSIF1RS` reader - POSIF1 Reset Status"] -pub type POSIF1RS_R = crate::BitReader; #[doc = "POSIF1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum POSIF1RS_A { +pub enum Posif1rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: POSIF1RS_A) -> Self { + fn from(variant: Posif1rs) -> Self { variant as u8 != 0 } } -impl POSIF1RS_R { +#[doc = "Field `POSIF1RS` reader - POSIF1 Reset Status"] +pub type Posif1rsR = crate::BitReader; +impl Posif1rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> POSIF1RS_A { + pub const fn variant(&self) -> Posif1rs { match self.bits { - false => POSIF1RS_A::VALUE1, - true => POSIF1RS_A::VALUE2, + false => Posif1rs::Value1, + true => Posif1rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == POSIF1RS_A::VALUE1 + *self == Posif1rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == POSIF1RS_A::VALUE2 + *self == Posif1rs::Value2 } } -#[doc = "Field `USIC0RS` reader - USIC0 Reset Status"] -pub type USIC0RS_R = crate::BitReader; #[doc = "USIC0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC0RS_A { +pub enum Usic0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC0RS_A) -> Self { + fn from(variant: Usic0rs) -> Self { variant as u8 != 0 } } -impl USIC0RS_R { +#[doc = "Field `USIC0RS` reader - USIC0 Reset Status"] +pub type Usic0rsR = crate::BitReader; +impl Usic0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC0RS_A { + pub const fn variant(&self) -> Usic0rs { match self.bits { - false => USIC0RS_A::VALUE1, - true => USIC0RS_A::VALUE2, + false => Usic0rs::Value1, + true => Usic0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC0RS_A::VALUE1 + *self == Usic0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC0RS_A::VALUE2 + *self == Usic0rs::Value2 } } -#[doc = "Field `ERU1RS` reader - ERU1 Reset Status"] -pub type ERU1RS_R = crate::BitReader; #[doc = "ERU1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERU1RS_A { +pub enum Eru1rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERU1RS_A) -> Self { + fn from(variant: Eru1rs) -> Self { variant as u8 != 0 } } -impl ERU1RS_R { +#[doc = "Field `ERU1RS` reader - ERU1 Reset Status"] +pub type Eru1rsR = crate::BitReader; +impl Eru1rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERU1RS_A { + pub const fn variant(&self) -> Eru1rs { match self.bits { - false => ERU1RS_A::VALUE1, - true => ERU1RS_A::VALUE2, + false => Eru1rs::Value1, + true => Eru1rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERU1RS_A::VALUE1 + *self == Eru1rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERU1RS_A::VALUE2 + *self == Eru1rs::Value2 } } impl R { #[doc = "Bit 0 - VADC Reset Status"] #[inline(always)] - pub fn vadcrs(&self) -> VADCRS_R { - VADCRS_R::new((self.bits & 1) != 0) + pub fn vadcrs(&self) -> VadcrsR { + VadcrsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DSD Reset Status"] #[inline(always)] - pub fn dsdrs(&self) -> DSDRS_R { - DSDRS_R::new(((self.bits >> 1) & 1) != 0) + pub fn dsdrs(&self) -> DsdrsR { + DsdrsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CCU40 Reset Status"] #[inline(always)] - pub fn ccu40rs(&self) -> CCU40RS_R { - CCU40RS_R::new(((self.bits >> 2) & 1) != 0) + pub fn ccu40rs(&self) -> Ccu40rsR { + Ccu40rsR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CCU41 Reset Status"] #[inline(always)] - pub fn ccu41rs(&self) -> CCU41RS_R { - CCU41RS_R::new(((self.bits >> 3) & 1) != 0) + pub fn ccu41rs(&self) -> Ccu41rsR { + Ccu41rsR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CCU42 Reset Status"] #[inline(always)] - pub fn ccu42rs(&self) -> CCU42RS_R { - CCU42RS_R::new(((self.bits >> 4) & 1) != 0) + pub fn ccu42rs(&self) -> Ccu42rsR { + Ccu42rsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - CCU80 Reset Status"] #[inline(always)] - pub fn ccu80rs(&self) -> CCU80RS_R { - CCU80RS_R::new(((self.bits >> 7) & 1) != 0) + pub fn ccu80rs(&self) -> Ccu80rsR { + Ccu80rsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - CCU81 Reset Status"] #[inline(always)] - pub fn ccu81rs(&self) -> CCU81RS_R { - CCU81RS_R::new(((self.bits >> 8) & 1) != 0) + pub fn ccu81rs(&self) -> Ccu81rsR { + Ccu81rsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - POSIF0 Reset Status"] #[inline(always)] - pub fn posif0rs(&self) -> POSIF0RS_R { - POSIF0RS_R::new(((self.bits >> 9) & 1) != 0) + pub fn posif0rs(&self) -> Posif0rsR { + Posif0rsR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - POSIF1 Reset Status"] #[inline(always)] - pub fn posif1rs(&self) -> POSIF1RS_R { - POSIF1RS_R::new(((self.bits >> 10) & 1) != 0) + pub fn posif1rs(&self) -> Posif1rsR { + Posif1rsR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USIC0 Reset Status"] #[inline(always)] - pub fn usic0rs(&self) -> USIC0RS_R { - USIC0RS_R::new(((self.bits >> 11) & 1) != 0) + pub fn usic0rs(&self) -> Usic0rsR { + Usic0rsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - ERU1 Reset Status"] #[inline(always)] - pub fn eru1rs(&self) -> ERU1RS_R { - ERU1RS_R::new(((self.bits >> 16) & 1) != 0) + pub fn eru1rs(&self) -> Eru1rsR { + Eru1rsR::new(((self.bits >> 16) & 1) != 0) } } #[doc = "RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSTAT0_SPEC; -impl crate::RegisterSpec for PRSTAT0_SPEC { +pub struct Prstat0Spec; +impl crate::RegisterSpec for Prstat0Spec { type Ux = u32; } #[doc = "`read()` method returns [`prstat0::R`](R) reader structure"] -impl crate::Readable for PRSTAT0_SPEC {} +impl crate::Readable for Prstat0Spec {} #[doc = "`reset()` method sets PRSTAT0 to value 0x0001_0f9f"] -impl crate::Resettable for PRSTAT0_SPEC { +impl crate::Resettable for Prstat0Spec { const RESET_VALUE: u32 = 0x0001_0f9f; } diff --git a/src/scu_reset/prstat1.rs b/src/scu_reset/prstat1.rs index 3f0ce794..e01dff51 100644 --- a/src/scu_reset/prstat1.rs +++ b/src/scu_reset/prstat1.rs @@ -1,343 +1,343 @@ #[doc = "Register `PRSTAT1` reader"] -pub type R = crate::R; -#[doc = "Field `CCU43RS` reader - CCU43 Reset Status"] -pub type CCU43RS_R = crate::BitReader; +pub type R = crate::R; #[doc = "CCU43 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CCU43RS_A { +pub enum Ccu43rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CCU43RS_A) -> Self { + fn from(variant: Ccu43rs) -> Self { variant as u8 != 0 } } -impl CCU43RS_R { +#[doc = "Field `CCU43RS` reader - CCU43 Reset Status"] +pub type Ccu43rsR = crate::BitReader; +impl Ccu43rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CCU43RS_A { + pub const fn variant(&self) -> Ccu43rs { match self.bits { - false => CCU43RS_A::VALUE1, - true => CCU43RS_A::VALUE2, + false => Ccu43rs::Value1, + true => Ccu43rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CCU43RS_A::VALUE1 + *self == Ccu43rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CCU43RS_A::VALUE2 + *self == Ccu43rs::Value2 } } -#[doc = "Field `LEDTSCU0RS` reader - LEDTS Reset Status"] -pub type LEDTSCU0RS_R = crate::BitReader; #[doc = "LEDTS Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LEDTSCU0RS_A { +pub enum Ledtscu0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LEDTSCU0RS_A) -> Self { + fn from(variant: Ledtscu0rs) -> Self { variant as u8 != 0 } } -impl LEDTSCU0RS_R { +#[doc = "Field `LEDTSCU0RS` reader - LEDTS Reset Status"] +pub type Ledtscu0rsR = crate::BitReader; +impl Ledtscu0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LEDTSCU0RS_A { + pub const fn variant(&self) -> Ledtscu0rs { match self.bits { - false => LEDTSCU0RS_A::VALUE1, - true => LEDTSCU0RS_A::VALUE2, + false => Ledtscu0rs::Value1, + true => Ledtscu0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LEDTSCU0RS_A::VALUE1 + *self == Ledtscu0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LEDTSCU0RS_A::VALUE2 + *self == Ledtscu0rs::Value2 } } -#[doc = "Field `MCAN0RS` reader - MultiCAN Reset Status"] -pub type MCAN0RS_R = crate::BitReader; #[doc = "MultiCAN Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCAN0RS_A { +pub enum Mcan0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCAN0RS_A) -> Self { + fn from(variant: Mcan0rs) -> Self { variant as u8 != 0 } } -impl MCAN0RS_R { +#[doc = "Field `MCAN0RS` reader - MultiCAN Reset Status"] +pub type Mcan0rsR = crate::BitReader; +impl Mcan0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCAN0RS_A { + pub const fn variant(&self) -> Mcan0rs { match self.bits { - false => MCAN0RS_A::VALUE1, - true => MCAN0RS_A::VALUE2, + false => Mcan0rs::Value1, + true => Mcan0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCAN0RS_A::VALUE1 + *self == Mcan0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCAN0RS_A::VALUE2 + *self == Mcan0rs::Value2 } } -#[doc = "Field `DACRS` reader - DAC Reset Status"] -pub type DACRS_R = crate::BitReader; #[doc = "DAC Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DACRS_A { +pub enum Dacrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DACRS_A) -> Self { + fn from(variant: Dacrs) -> Self { variant as u8 != 0 } } -impl DACRS_R { +#[doc = "Field `DACRS` reader - DAC Reset Status"] +pub type DacrsR = crate::BitReader; +impl DacrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DACRS_A { + pub const fn variant(&self) -> Dacrs { match self.bits { - false => DACRS_A::VALUE1, - true => DACRS_A::VALUE2, + false => Dacrs::Value1, + true => Dacrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DACRS_A::VALUE1 + *self == Dacrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DACRS_A::VALUE2 + *self == Dacrs::Value2 } } -#[doc = "Field `MMCIRS` reader - MMC Interface Reset Status"] -pub type MMCIRS_R = crate::BitReader; #[doc = "MMC Interface Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MMCIRS_A { +pub enum Mmcirs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MMCIRS_A) -> Self { + fn from(variant: Mmcirs) -> Self { variant as u8 != 0 } } -impl MMCIRS_R { +#[doc = "Field `MMCIRS` reader - MMC Interface Reset Status"] +pub type MmcirsR = crate::BitReader; +impl MmcirsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MMCIRS_A { + pub const fn variant(&self) -> Mmcirs { match self.bits { - false => MMCIRS_A::VALUE1, - true => MMCIRS_A::VALUE2, + false => Mmcirs::Value1, + true => Mmcirs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MMCIRS_A::VALUE1 + *self == Mmcirs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MMCIRS_A::VALUE2 + *self == Mmcirs::Value2 } } -#[doc = "Field `USIC1RS` reader - USIC1 Reset Status"] -pub type USIC1RS_R = crate::BitReader; #[doc = "USIC1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC1RS_A { +pub enum Usic1rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC1RS_A) -> Self { + fn from(variant: Usic1rs) -> Self { variant as u8 != 0 } } -impl USIC1RS_R { +#[doc = "Field `USIC1RS` reader - USIC1 Reset Status"] +pub type Usic1rsR = crate::BitReader; +impl Usic1rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC1RS_A { + pub const fn variant(&self) -> Usic1rs { match self.bits { - false => USIC1RS_A::VALUE1, - true => USIC1RS_A::VALUE2, + false => Usic1rs::Value1, + true => Usic1rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC1RS_A::VALUE1 + *self == Usic1rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC1RS_A::VALUE2 + *self == Usic1rs::Value2 } } -#[doc = "Field `USIC2RS` reader - USIC2 Reset Status"] -pub type USIC2RS_R = crate::BitReader; #[doc = "USIC2 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USIC2RS_A { +pub enum Usic2rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USIC2RS_A) -> Self { + fn from(variant: Usic2rs) -> Self { variant as u8 != 0 } } -impl USIC2RS_R { +#[doc = "Field `USIC2RS` reader - USIC2 Reset Status"] +pub type Usic2rsR = crate::BitReader; +impl Usic2rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USIC2RS_A { + pub const fn variant(&self) -> Usic2rs { match self.bits { - false => USIC2RS_A::VALUE1, - true => USIC2RS_A::VALUE2, + false => Usic2rs::Value1, + true => Usic2rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USIC2RS_A::VALUE1 + *self == Usic2rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USIC2RS_A::VALUE2 + *self == Usic2rs::Value2 } } -#[doc = "Field `PPORTSRS` reader - PORTS Reset Status"] -pub type PPORTSRS_R = crate::BitReader; #[doc = "PORTS Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPORTSRS_A { +pub enum Pportsrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPORTSRS_A) -> Self { + fn from(variant: Pportsrs) -> Self { variant as u8 != 0 } } -impl PPORTSRS_R { +#[doc = "Field `PPORTSRS` reader - PORTS Reset Status"] +pub type PportsrsR = crate::BitReader; +impl PportsrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPORTSRS_A { + pub const fn variant(&self) -> Pportsrs { match self.bits { - false => PPORTSRS_A::VALUE1, - true => PPORTSRS_A::VALUE2, + false => Pportsrs::Value1, + true => Pportsrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPORTSRS_A::VALUE1 + *self == Pportsrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPORTSRS_A::VALUE2 + *self == Pportsrs::Value2 } } impl R { #[doc = "Bit 0 - CCU43 Reset Status"] #[inline(always)] - pub fn ccu43rs(&self) -> CCU43RS_R { - CCU43RS_R::new((self.bits & 1) != 0) + pub fn ccu43rs(&self) -> Ccu43rsR { + Ccu43rsR::new((self.bits & 1) != 0) } #[doc = "Bit 3 - LEDTS Reset Status"] #[inline(always)] - pub fn ledtscu0rs(&self) -> LEDTSCU0RS_R { - LEDTSCU0RS_R::new(((self.bits >> 3) & 1) != 0) + pub fn ledtscu0rs(&self) -> Ledtscu0rsR { + Ledtscu0rsR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MultiCAN Reset Status"] #[inline(always)] - pub fn mcan0rs(&self) -> MCAN0RS_R { - MCAN0RS_R::new(((self.bits >> 4) & 1) != 0) + pub fn mcan0rs(&self) -> Mcan0rsR { + Mcan0rsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DAC Reset Status"] #[inline(always)] - pub fn dacrs(&self) -> DACRS_R { - DACRS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dacrs(&self) -> DacrsR { + DacrsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - MMC Interface Reset Status"] #[inline(always)] - pub fn mmcirs(&self) -> MMCIRS_R { - MMCIRS_R::new(((self.bits >> 6) & 1) != 0) + pub fn mmcirs(&self) -> MmcirsR { + MmcirsR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USIC1 Reset Status"] #[inline(always)] - pub fn usic1rs(&self) -> USIC1RS_R { - USIC1RS_R::new(((self.bits >> 7) & 1) != 0) + pub fn usic1rs(&self) -> Usic1rsR { + Usic1rsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - USIC2 Reset Status"] #[inline(always)] - pub fn usic2rs(&self) -> USIC2RS_R { - USIC2RS_R::new(((self.bits >> 8) & 1) != 0) + pub fn usic2rs(&self) -> Usic2rsR { + Usic2rsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - PORTS Reset Status"] #[inline(always)] - pub fn pportsrs(&self) -> PPORTSRS_R { - PPORTSRS_R::new(((self.bits >> 9) & 1) != 0) + pub fn pportsrs(&self) -> PportsrsR { + PportsrsR::new(((self.bits >> 9) & 1) != 0) } } #[doc = "RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSTAT1_SPEC; -impl crate::RegisterSpec for PRSTAT1_SPEC { +pub struct Prstat1Spec; +impl crate::RegisterSpec for Prstat1Spec { type Ux = u32; } #[doc = "`read()` method returns [`prstat1::R`](R) reader structure"] -impl crate::Readable for PRSTAT1_SPEC {} +impl crate::Readable for Prstat1Spec {} #[doc = "`reset()` method sets PRSTAT1 to value 0x01f9"] -impl crate::Resettable for PRSTAT1_SPEC { +impl crate::Resettable for Prstat1Spec { const RESET_VALUE: u32 = 0x01f9; } diff --git a/src/scu_reset/prstat2.rs b/src/scu_reset/prstat2.rs index 389b376c..d00d301a 100644 --- a/src/scu_reset/prstat2.rs +++ b/src/scu_reset/prstat2.rs @@ -1,302 +1,302 @@ #[doc = "Register `PRSTAT2` reader"] -pub type R = crate::R; -#[doc = "Field `WDTRS` reader - WDT Reset Status"] -pub type WDTRS_R = crate::BitReader; +pub type R = crate::R; #[doc = "WDT Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WDTRS_A { +pub enum Wdtrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WDTRS_A) -> Self { + fn from(variant: Wdtrs) -> Self { variant as u8 != 0 } } -impl WDTRS_R { +#[doc = "Field `WDTRS` reader - WDT Reset Status"] +pub type WdtrsR = crate::BitReader; +impl WdtrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WDTRS_A { + pub const fn variant(&self) -> Wdtrs { match self.bits { - false => WDTRS_A::VALUE1, - true => WDTRS_A::VALUE2, + false => Wdtrs::Value1, + true => Wdtrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WDTRS_A::VALUE1 + *self == Wdtrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WDTRS_A::VALUE2 + *self == Wdtrs::Value2 } } -#[doc = "Field `ETH0RS` reader - ETH0 Reset Status"] -pub type ETH0RS_R = crate::BitReader; #[doc = "ETH0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ETH0RS_A { +pub enum Eth0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ETH0RS_A) -> Self { + fn from(variant: Eth0rs) -> Self { variant as u8 != 0 } } -impl ETH0RS_R { +#[doc = "Field `ETH0RS` reader - ETH0 Reset Status"] +pub type Eth0rsR = crate::BitReader; +impl Eth0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ETH0RS_A { + pub const fn variant(&self) -> Eth0rs { match self.bits { - false => ETH0RS_A::VALUE1, - true => ETH0RS_A::VALUE2, + false => Eth0rs::Value1, + true => Eth0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ETH0RS_A::VALUE1 + *self == Eth0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ETH0RS_A::VALUE2 + *self == Eth0rs::Value2 } } -#[doc = "Field `DMA0RS` reader - DMA0 Reset Status"] -pub type DMA0RS_R = crate::BitReader; #[doc = "DMA0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA0RS_A { +pub enum Dma0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA0RS_A) -> Self { + fn from(variant: Dma0rs) -> Self { variant as u8 != 0 } } -impl DMA0RS_R { +#[doc = "Field `DMA0RS` reader - DMA0 Reset Status"] +pub type Dma0rsR = crate::BitReader; +impl Dma0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA0RS_A { + pub const fn variant(&self) -> Dma0rs { match self.bits { - false => DMA0RS_A::VALUE1, - true => DMA0RS_A::VALUE2, + false => Dma0rs::Value1, + true => Dma0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA0RS_A::VALUE1 + *self == Dma0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA0RS_A::VALUE2 + *self == Dma0rs::Value2 } } -#[doc = "Field `DMA1RS` reader - DMA1 Reset Status"] -pub type DMA1RS_R = crate::BitReader; #[doc = "DMA1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMA1RS_A { +pub enum Dma1rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMA1RS_A) -> Self { + fn from(variant: Dma1rs) -> Self { variant as u8 != 0 } } -impl DMA1RS_R { +#[doc = "Field `DMA1RS` reader - DMA1 Reset Status"] +pub type Dma1rsR = crate::BitReader; +impl Dma1rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMA1RS_A { + pub const fn variant(&self) -> Dma1rs { match self.bits { - false => DMA1RS_A::VALUE1, - true => DMA1RS_A::VALUE2, + false => Dma1rs::Value1, + true => Dma1rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMA1RS_A::VALUE1 + *self == Dma1rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMA1RS_A::VALUE2 + *self == Dma1rs::Value2 } } -#[doc = "Field `FCERS` reader - FCE Reset Status"] -pub type FCERS_R = crate::BitReader; #[doc = "FCE Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCERS_A { +pub enum Fcers { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCERS_A) -> Self { + fn from(variant: Fcers) -> Self { variant as u8 != 0 } } -impl FCERS_R { +#[doc = "Field `FCERS` reader - FCE Reset Status"] +pub type FcersR = crate::BitReader; +impl FcersR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCERS_A { + pub const fn variant(&self) -> Fcers { match self.bits { - false => FCERS_A::VALUE1, - true => FCERS_A::VALUE2, + false => Fcers::Value1, + true => Fcers::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCERS_A::VALUE1 + *self == Fcers::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCERS_A::VALUE2 + *self == Fcers::Value2 } } -#[doc = "Field `USBRS` reader - USB Reset Status"] -pub type USBRS_R = crate::BitReader; #[doc = "USB Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USBRS_A { +pub enum Usbrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USBRS_A) -> Self { + fn from(variant: Usbrs) -> Self { variant as u8 != 0 } } -impl USBRS_R { +#[doc = "Field `USBRS` reader - USB Reset Status"] +pub type UsbrsR = crate::BitReader; +impl UsbrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> USBRS_A { + pub const fn variant(&self) -> Usbrs { match self.bits { - false => USBRS_A::VALUE1, - true => USBRS_A::VALUE2, + false => Usbrs::Value1, + true => Usbrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USBRS_A::VALUE1 + *self == Usbrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == USBRS_A::VALUE2 + *self == Usbrs::Value2 } } -#[doc = "Field `ECAT0RS` reader - ECAT0 Reset Status"] -pub type ECAT0RS_R = crate::BitReader; #[doc = "ECAT0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_A { +pub enum Ecat0rs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_A) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } -impl ECAT0RS_R { +#[doc = "Field `ECAT0RS` reader - ECAT0 Reset Status"] +pub type Ecat0rsR = crate::BitReader; +impl Ecat0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0RS_A { + pub const fn variant(&self) -> Ecat0rs { match self.bits { - false => ECAT0RS_A::VALUE1, - true => ECAT0RS_A::VALUE2, + false => Ecat0rs::Value1, + true => Ecat0rs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0RS_A::VALUE1 + *self == Ecat0rs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0RS_A::VALUE2 + *self == Ecat0rs::Value2 } } impl R { #[doc = "Bit 1 - WDT Reset Status"] #[inline(always)] - pub fn wdtrs(&self) -> WDTRS_R { - WDTRS_R::new(((self.bits >> 1) & 1) != 0) + pub fn wdtrs(&self) -> WdtrsR { + WdtrsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - ETH0 Reset Status"] #[inline(always)] - pub fn eth0rs(&self) -> ETH0RS_R { - ETH0RS_R::new(((self.bits >> 2) & 1) != 0) + pub fn eth0rs(&self) -> Eth0rsR { + Eth0rsR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - DMA0 Reset Status"] #[inline(always)] - pub fn dma0rs(&self) -> DMA0RS_R { - DMA0RS_R::new(((self.bits >> 4) & 1) != 0) + pub fn dma0rs(&self) -> Dma0rsR { + Dma0rsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DMA1 Reset Status"] #[inline(always)] - pub fn dma1rs(&self) -> DMA1RS_R { - DMA1RS_R::new(((self.bits >> 5) & 1) != 0) + pub fn dma1rs(&self) -> Dma1rsR { + Dma1rsR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - FCE Reset Status"] #[inline(always)] - pub fn fcers(&self) -> FCERS_R { - FCERS_R::new(((self.bits >> 6) & 1) != 0) + pub fn fcers(&self) -> FcersR { + FcersR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USB Reset Status"] #[inline(always)] - pub fn usbrs(&self) -> USBRS_R { - USBRS_R::new(((self.bits >> 7) & 1) != 0) + pub fn usbrs(&self) -> UsbrsR { + UsbrsR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - ECAT0 Reset Status"] #[inline(always)] - pub fn ecat0rs(&self) -> ECAT0RS_R { - ECAT0RS_R::new(((self.bits >> 10) & 1) != 0) + pub fn ecat0rs(&self) -> Ecat0rsR { + Ecat0rsR::new(((self.bits >> 10) & 1) != 0) } } #[doc = "RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSTAT2_SPEC; -impl crate::RegisterSpec for PRSTAT2_SPEC { +pub struct Prstat2Spec; +impl crate::RegisterSpec for Prstat2Spec { type Ux = u32; } #[doc = "`read()` method returns [`prstat2::R`](R) reader structure"] -impl crate::Readable for PRSTAT2_SPEC {} +impl crate::Readable for Prstat2Spec {} #[doc = "`reset()` method sets PRSTAT2 to value 0x04f6"] -impl crate::Resettable for PRSTAT2_SPEC { +impl crate::Resettable for Prstat2Spec { const RESET_VALUE: u32 = 0x04f6; } diff --git a/src/scu_reset/prstat3.rs b/src/scu_reset/prstat3.rs index 4bd0163e..8b545aaa 100644 --- a/src/scu_reset/prstat3.rs +++ b/src/scu_reset/prstat3.rs @@ -1,56 +1,56 @@ #[doc = "Register `PRSTAT3` reader"] -pub type R = crate::R; -#[doc = "Field `EBURS` reader - EBU Reset Status"] -pub type EBURS_R = crate::BitReader; +pub type R = crate::R; #[doc = "EBU Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EBURS_A { +pub enum Eburs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EBURS_A) -> Self { + fn from(variant: Eburs) -> Self { variant as u8 != 0 } } -impl EBURS_R { +#[doc = "Field `EBURS` reader - EBU Reset Status"] +pub type EbursR = crate::BitReader; +impl EbursR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EBURS_A { + pub const fn variant(&self) -> Eburs { match self.bits { - false => EBURS_A::VALUE1, - true => EBURS_A::VALUE2, + false => Eburs::Value1, + true => Eburs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EBURS_A::VALUE1 + *self == Eburs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EBURS_A::VALUE2 + *self == Eburs::Value2 } } impl R { #[doc = "Bit 2 - EBU Reset Status"] #[inline(always)] - pub fn eburs(&self) -> EBURS_R { - EBURS_R::new(((self.bits >> 2) & 1) != 0) + pub fn eburs(&self) -> EbursR { + EbursR::new(((self.bits >> 2) & 1) != 0) } } #[doc = "RCU Peripheral 3 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRSTAT3_SPEC; -impl crate::RegisterSpec for PRSTAT3_SPEC { +pub struct Prstat3Spec; +impl crate::RegisterSpec for Prstat3Spec { type Ux = u32; } #[doc = "`read()` method returns [`prstat3::R`](R) reader structure"] -impl crate::Readable for PRSTAT3_SPEC {} +impl crate::Readable for Prstat3Spec {} #[doc = "`reset()` method sets PRSTAT3 to value 0x04"] -impl crate::Resettable for PRSTAT3_SPEC { +impl crate::Resettable for Prstat3Spec { const RESET_VALUE: u32 = 0x04; } diff --git a/src/scu_reset/rstclr.rs b/src/scu_reset/rstclr.rs index f761091c..68254737 100644 --- a/src/scu_reset/rstclr.rs +++ b/src/scu_reset/rstclr.rs @@ -1,213 +1,204 @@ #[doc = "Register `RSTCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSCLR_AW { +pub enum Rsclr { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clears field RSTSTAT.RSTSTAT"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSCLR_AW) -> Self { + fn from(variant: Rsclr) -> Self { variant as u8 != 0 } } #[doc = "Field `RSCLR` writer - Clear Reset Status"] -pub type RSCLR_W<'a, REG> = crate::BitWriter<'a, REG, RSCLR_AW>; -impl<'a, REG> RSCLR_W<'a, REG> +pub type RsclrW<'a, REG> = crate::BitWriter<'a, REG, Rsclr>; +impl<'a, REG> RsclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSCLR_AW::VALUE1) + self.variant(Rsclr::Value1) } #[doc = "Clears field RSTSTAT.RSTSTAT"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSCLR_AW::VALUE2) + self.variant(Rsclr::Value2) } } #[doc = "Clear Hibernate Wake-up Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBWK_AW { +pub enum Hibwk { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBWK_AW) -> Self { + fn from(variant: Hibwk) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBWK` writer - Clear Hibernate Wake-up Reset Status"] -pub type HIBWK_W<'a, REG> = crate::BitWriter<'a, REG, HIBWK_AW>; -impl<'a, REG> HIBWK_W<'a, REG> +pub type HibwkW<'a, REG> = crate::BitWriter<'a, REG, Hibwk>; +impl<'a, REG> HibwkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBWK_AW::VALUE1) + self.variant(Hibwk::Value1) } #[doc = "De-assert reset status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBWK_AW::VALUE2) + self.variant(Hibwk::Value2) } } #[doc = "Clear Hibernate Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBRS_AW { +pub enum Hibrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBRS_AW) -> Self { + fn from(variant: Hibrs) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBRS` writer - Clear Hibernate Reset"] -pub type HIBRS_W<'a, REG> = crate::BitWriter<'a, REG, HIBRS_AW>; -impl<'a, REG> HIBRS_W<'a, REG> +pub type HibrsW<'a, REG> = crate::BitWriter<'a, REG, Hibrs>; +impl<'a, REG> HibrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBRS_AW::VALUE1) + self.variant(Hibrs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBRS_AW::VALUE2) + self.variant(Hibrs::Value2) } } #[doc = "Enable Lockup Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCKEN_AW { +pub enum Lcken { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Disable reset when Lockup gets asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCKEN_AW) -> Self { + fn from(variant: Lcken) -> Self { variant as u8 != 0 } } #[doc = "Field `LCKEN` writer - Enable Lockup Reset"] -pub type LCKEN_W<'a, REG> = crate::BitWriter<'a, REG, LCKEN_AW>; -impl<'a, REG> LCKEN_W<'a, REG> +pub type LckenW<'a, REG> = crate::BitWriter<'a, REG, Lcken>; +impl<'a, REG> LckenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LCKEN_AW::VALUE1) + self.variant(Lcken::Value1) } #[doc = "Disable reset when Lockup gets asserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LCKEN_AW::VALUE2) + self.variant(Lcken::Value2) } } #[doc = "ECAT0 Reset Status Information\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_AW { +pub enum Ecat0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: De-assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_AW) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RS` writer - ECAT0 Reset Status Information"] -pub type ECAT0RS_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RS_AW>; -impl<'a, REG> ECAT0RS_W<'a, REG> +pub type Ecat0rsW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rs>; +impl<'a, REG> Ecat0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE1) + self.variant(Ecat0rs::Value1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE2) + self.variant(Ecat0rs::Value2) } } impl W { #[doc = "Bit 0 - Clear Reset Status"] #[inline(always)] #[must_use] - pub fn rsclr(&mut self) -> RSCLR_W { - RSCLR_W::new(self, 0) + pub fn rsclr(&mut self) -> RsclrW { + RsclrW::new(self, 0) } #[doc = "Bit 8 - Clear Hibernate Wake-up Reset Status"] #[inline(always)] #[must_use] - pub fn hibwk(&mut self) -> HIBWK_W { - HIBWK_W::new(self, 8) + pub fn hibwk(&mut self) -> HibwkW { + HibwkW::new(self, 8) } #[doc = "Bit 9 - Clear Hibernate Reset"] #[inline(always)] #[must_use] - pub fn hibrs(&mut self) -> HIBRS_W { - HIBRS_W::new(self, 9) + pub fn hibrs(&mut self) -> HibrsW { + HibrsW::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] #[must_use] - pub fn lcken(&mut self) -> LCKEN_W { - LCKEN_W::new(self, 10) + pub fn lcken(&mut self) -> LckenW { + LckenW::new(self, 10) } #[doc = "Bit 12 - ECAT0 Reset Status Information"] #[inline(always)] #[must_use] - pub fn ecat0rs(&mut self) -> ECAT0RS_W { - ECAT0RS_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rs(&mut self) -> Ecat0rsW { + Ecat0rsW::new(self, 12) } } #[doc = "RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RSTCLR_SPEC; -impl crate::RegisterSpec for RSTCLR_SPEC { +pub struct RstclrSpec; +impl crate::RegisterSpec for RstclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rstclr::W`](W) writer structure"] -impl crate::Writable for RSTCLR_SPEC { +impl crate::Writable for RstclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTCLR to value 0"] -impl crate::Resettable for RSTCLR_SPEC { +impl crate::Resettable for RstclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/rstset.rs b/src/scu_reset/rstset.rs index 88f7381d..d457aaa9 100644 --- a/src/scu_reset/rstset.rs +++ b/src/scu_reset/rstset.rs @@ -1,176 +1,167 @@ #[doc = "Register `RSTSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Set Hibernate Wake-up Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBWK_AW { +pub enum Hibwk { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBWK_AW) -> Self { + fn from(variant: Hibwk) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBWK` writer - Set Hibernate Wake-up Reset Status"] -pub type HIBWK_W<'a, REG> = crate::BitWriter<'a, REG, HIBWK_AW>; -impl<'a, REG> HIBWK_W<'a, REG> +pub type HibwkW<'a, REG> = crate::BitWriter<'a, REG, Hibwk>; +impl<'a, REG> HibwkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBWK_AW::VALUE1) + self.variant(Hibwk::Value1) } #[doc = "Assert reset status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBWK_AW::VALUE2) + self.variant(Hibwk::Value2) } } #[doc = "Set Hibernate Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBRS_AW { +pub enum Hibrs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBRS_AW) -> Self { + fn from(variant: Hibrs) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBRS` writer - Set Hibernate Reset"] -pub type HIBRS_W<'a, REG> = crate::BitWriter<'a, REG, HIBRS_AW>; -impl<'a, REG> HIBRS_W<'a, REG> +pub type HibrsW<'a, REG> = crate::BitWriter<'a, REG, Hibrs>; +impl<'a, REG> HibrsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIBRS_AW::VALUE1) + self.variant(Hibrs::Value1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIBRS_AW::VALUE2) + self.variant(Hibrs::Value2) } } #[doc = "Enable Lockup Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCKEN_AW { +pub enum Lcken { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable reset when Lockup gets asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCKEN_AW) -> Self { + fn from(variant: Lcken) -> Self { variant as u8 != 0 } } #[doc = "Field `LCKEN` writer - Enable Lockup Reset"] -pub type LCKEN_W<'a, REG> = crate::BitWriter<'a, REG, LCKEN_AW>; -impl<'a, REG> LCKEN_W<'a, REG> +pub type LckenW<'a, REG> = crate::BitWriter<'a, REG, Lcken>; +impl<'a, REG> LckenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LCKEN_AW::VALUE1) + self.variant(Lcken::Value1) } #[doc = "Enable reset when Lockup gets asserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LCKEN_AW::VALUE2) + self.variant(Lcken::Value2) } } #[doc = "ECAT0 Reset Status Information\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_AW { +pub enum Ecat0rs { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Assert reset status bit"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_AW) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RS` writer - ECAT0 Reset Status Information"] -pub type ECAT0RS_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RS_AW>; -impl<'a, REG> ECAT0RS_W<'a, REG> +pub type Ecat0rsW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rs>; +impl<'a, REG> Ecat0rsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE1) + self.variant(Ecat0rs::Value1) } #[doc = "Assert reset status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RS_AW::VALUE2) + self.variant(Ecat0rs::Value2) } } impl W { #[doc = "Bit 8 - Set Hibernate Wake-up Reset Status"] #[inline(always)] #[must_use] - pub fn hibwk(&mut self) -> HIBWK_W { - HIBWK_W::new(self, 8) + pub fn hibwk(&mut self) -> HibwkW { + HibwkW::new(self, 8) } #[doc = "Bit 9 - Set Hibernate Reset"] #[inline(always)] #[must_use] - pub fn hibrs(&mut self) -> HIBRS_W { - HIBRS_W::new(self, 9) + pub fn hibrs(&mut self) -> HibrsW { + HibrsW::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] #[must_use] - pub fn lcken(&mut self) -> LCKEN_W { - LCKEN_W::new(self, 10) + pub fn lcken(&mut self) -> LckenW { + LckenW::new(self, 10) } #[doc = "Bit 12 - ECAT0 Reset Status Information"] #[inline(always)] #[must_use] - pub fn ecat0rs(&mut self) -> ECAT0RS_W { - ECAT0RS_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rs(&mut self) -> Ecat0rsW { + Ecat0rsW::new(self, 12) } } #[doc = "RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RSTSET_SPEC; -impl crate::RegisterSpec for RSTSET_SPEC { +pub struct RstsetSpec; +impl crate::RegisterSpec for RstsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rstset::W`](W) writer structure"] -impl crate::Writable for RSTSET_SPEC { +impl crate::Writable for RstsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTSET to value 0"] -impl crate::Resettable for RSTSET_SPEC { +impl crate::Resettable for RstsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/rststat.rs b/src/scu_reset/rststat.rs index 095b8e25..9f11fc00 100644 --- a/src/scu_reset/rststat.rs +++ b/src/scu_reset/rststat.rs @@ -1,265 +1,265 @@ #[doc = "Register `RSTSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `RSTSTAT` reader - Reset Status Information"] -pub type RSTSTAT_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Reset Status Information\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RSTSTAT_A { +pub enum Rststat { #[doc = "1: PORST reset"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: SWD reset"] - VALUE2 = 2, + Value2 = 2, #[doc = "4: PV reset"] - VALUE3 = 4, + Value3 = 4, #[doc = "8: CPU system reset"] - VALUE4 = 8, + Value4 = 8, #[doc = "16: CPU lockup reset"] - VALUE5 = 16, + Value5 = 16, #[doc = "32: WDT reset"] - VALUE6 = 32, + Value6 = 32, #[doc = "128: Parity Error reset"] - VALUE8 = 128, + Value8 = 128, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RSTSTAT_A) -> Self { + fn from(variant: Rststat) -> Self { variant as _ } } -impl crate::FieldSpec for RSTSTAT_A { +impl crate::FieldSpec for Rststat { type Ux = u8; } -impl RSTSTAT_R { +#[doc = "Field `RSTSTAT` reader - Reset Status Information"] +pub type RststatR = crate::FieldReader; +impl RststatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(RSTSTAT_A::VALUE1), - 2 => Some(RSTSTAT_A::VALUE2), - 4 => Some(RSTSTAT_A::VALUE3), - 8 => Some(RSTSTAT_A::VALUE4), - 16 => Some(RSTSTAT_A::VALUE5), - 32 => Some(RSTSTAT_A::VALUE6), - 128 => Some(RSTSTAT_A::VALUE8), + 1 => Some(Rststat::Value1), + 2 => Some(Rststat::Value2), + 4 => Some(Rststat::Value3), + 8 => Some(Rststat::Value4), + 16 => Some(Rststat::Value5), + 32 => Some(Rststat::Value6), + 128 => Some(Rststat::Value8), _ => None, } } #[doc = "PORST reset"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSTSTAT_A::VALUE1 + *self == Rststat::Value1 } #[doc = "SWD reset"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSTSTAT_A::VALUE2 + *self == Rststat::Value2 } #[doc = "PV reset"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RSTSTAT_A::VALUE3 + *self == Rststat::Value3 } #[doc = "CPU system reset"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RSTSTAT_A::VALUE4 + *self == Rststat::Value4 } #[doc = "CPU lockup reset"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == RSTSTAT_A::VALUE5 + *self == Rststat::Value5 } #[doc = "WDT reset"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == RSTSTAT_A::VALUE6 + *self == Rststat::Value6 } #[doc = "Parity Error reset"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == RSTSTAT_A::VALUE8 + *self == Rststat::Value8 } } -#[doc = "Field `HIBWK` reader - Hibernate Wake-up Status"] -pub type HIBWK_R = crate::BitReader; #[doc = "Hibernate Wake-up Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBWK_A { +pub enum Hibwk { #[doc = "0: No Wake-up"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wake-up event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBWK_A) -> Self { + fn from(variant: Hibwk) -> Self { variant as u8 != 0 } } -impl HIBWK_R { +#[doc = "Field `HIBWK` reader - Hibernate Wake-up Status"] +pub type HibwkR = crate::BitReader; +impl HibwkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBWK_A { + pub const fn variant(&self) -> Hibwk { match self.bits { - false => HIBWK_A::VALUE1, - true => HIBWK_A::VALUE2, + false => Hibwk::Value1, + true => Hibwk::Value2, } } #[doc = "No Wake-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBWK_A::VALUE1 + *self == Hibwk::Value1 } #[doc = "Wake-up event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBWK_A::VALUE2 + *self == Hibwk::Value2 } } -#[doc = "Field `HIBRS` reader - Hibernate Reset Status"] -pub type HIBRS_R = crate::BitReader; #[doc = "Hibernate Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIBRS_A { +pub enum Hibrs { #[doc = "0: Reset de-asserted"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset asserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIBRS_A) -> Self { + fn from(variant: Hibrs) -> Self { variant as u8 != 0 } } -impl HIBRS_R { +#[doc = "Field `HIBRS` reader - Hibernate Reset Status"] +pub type HibrsR = crate::BitReader; +impl HibrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIBRS_A { + pub const fn variant(&self) -> Hibrs { match self.bits { - false => HIBRS_A::VALUE1, - true => HIBRS_A::VALUE2, + false => Hibrs::Value1, + true => Hibrs::Value2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIBRS_A::VALUE1 + *self == Hibrs::Value1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIBRS_A::VALUE2 + *self == Hibrs::Value2 } } -#[doc = "Field `LCKEN` reader - Enable Lockup Status"] -pub type LCKEN_R = crate::BitReader; #[doc = "Enable Lockup Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LCKEN_A { +pub enum Lcken { #[doc = "0: Reset by Lockup disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset by Lockup enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LCKEN_A) -> Self { + fn from(variant: Lcken) -> Self { variant as u8 != 0 } } -impl LCKEN_R { +#[doc = "Field `LCKEN` reader - Enable Lockup Status"] +pub type LckenR = crate::BitReader; +impl LckenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LCKEN_A { + pub const fn variant(&self) -> Lcken { match self.bits { - false => LCKEN_A::VALUE1, - true => LCKEN_A::VALUE2, + false => Lcken::Value1, + true => Lcken::Value2, } } #[doc = "Reset by Lockup disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LCKEN_A::VALUE1 + *self == Lcken::Value1 } #[doc = "Reset by Lockup enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LCKEN_A::VALUE2 + *self == Lcken::Value2 } } -#[doc = "Field `ECAT0RS` reader - ECAT0 Reset Status Information"] -pub type ECAT0RS_R = crate::BitReader; #[doc = "ECAT0 Reset Status Information\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RS_A { +pub enum Ecat0rs { #[doc = "0: Reset did not occur"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RS_A) -> Self { + fn from(variant: Ecat0rs) -> Self { variant as u8 != 0 } } -impl ECAT0RS_R { +#[doc = "Field `ECAT0RS` reader - ECAT0 Reset Status Information"] +pub type Ecat0rsR = crate::BitReader; +impl Ecat0rsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0RS_A { + pub const fn variant(&self) -> Ecat0rs { match self.bits { - false => ECAT0RS_A::VALUE1, - true => ECAT0RS_A::VALUE2, + false => Ecat0rs::Value1, + true => Ecat0rs::Value2, } } #[doc = "Reset did not occur"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0RS_A::VALUE1 + *self == Ecat0rs::Value1 } #[doc = "Reset occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0RS_A::VALUE2 + *self == Ecat0rs::Value2 } } impl R { #[doc = "Bits 0:7 - Reset Status Information"] #[inline(always)] - pub fn rststat(&self) -> RSTSTAT_R { - RSTSTAT_R::new((self.bits & 0xff) as u8) + pub fn rststat(&self) -> RststatR { + RststatR::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - Hibernate Wake-up Status"] #[inline(always)] - pub fn hibwk(&self) -> HIBWK_R { - HIBWK_R::new(((self.bits >> 8) & 1) != 0) + pub fn hibwk(&self) -> HibwkR { + HibwkR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Hibernate Reset Status"] #[inline(always)] - pub fn hibrs(&self) -> HIBRS_R { - HIBRS_R::new(((self.bits >> 9) & 1) != 0) + pub fn hibrs(&self) -> HibrsR { + HibrsR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Lockup Status"] #[inline(always)] - pub fn lcken(&self) -> LCKEN_R { - LCKEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn lcken(&self) -> LckenR { + LckenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - ECAT0 Reset Status Information"] #[inline(always)] - pub fn ecat0rs(&self) -> ECAT0RS_R { - ECAT0RS_R::new(((self.bits >> 12) & 1) != 0) + pub fn ecat0rs(&self) -> Ecat0rsR { + Ecat0rsR::new(((self.bits >> 12) & 1) != 0) } } #[doc = "RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RSTSTAT_SPEC; -impl crate::RegisterSpec for RSTSTAT_SPEC { +pub struct RststatSpec; +impl crate::RegisterSpec for RststatSpec { type Ux = u32; } #[doc = "`read()` method returns [`rststat::R`](R) reader structure"] -impl crate::Readable for RSTSTAT_SPEC {} +impl crate::Readable for RststatSpec {} #[doc = "`reset()` method sets RSTSTAT to value 0"] -impl crate::Resettable for RSTSTAT_SPEC { +impl crate::Resettable for RststatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap.rs b/src/scu_trap.rs index e24ac816..b3c3761f 100644 --- a/src/scu_trap.rs +++ b/src/scu_trap.rs @@ -1,61 +1,66 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - trapstat: TRAPSTAT, - trapraw: TRAPRAW, - trapdis: TRAPDIS, - trapclr: TRAPCLR, - trapset: TRAPSET, + trapstat: Trapstat, + trapraw: Trapraw, + trapdis: Trapdis, + trapclr: Trapclr, + trapset: Trapset, } impl RegisterBlock { #[doc = "0x00 - Trap Status Register"] #[inline(always)] - pub const fn trapstat(&self) -> &TRAPSTAT { + pub const fn trapstat(&self) -> &Trapstat { &self.trapstat } #[doc = "0x04 - Trap Raw Status Register"] #[inline(always)] - pub const fn trapraw(&self) -> &TRAPRAW { + pub const fn trapraw(&self) -> &Trapraw { &self.trapraw } #[doc = "0x08 - Trap Disable Register"] #[inline(always)] - pub const fn trapdis(&self) -> &TRAPDIS { + pub const fn trapdis(&self) -> &Trapdis { &self.trapdis } #[doc = "0x0c - Trap Clear Register"] #[inline(always)] - pub const fn trapclr(&self) -> &TRAPCLR { + pub const fn trapclr(&self) -> &Trapclr { &self.trapclr } #[doc = "0x10 - Trap Set Register"] #[inline(always)] - pub const fn trapset(&self) -> &TRAPSET { + pub const fn trapset(&self) -> &Trapset { &self.trapset } } #[doc = "TRAPSTAT (r) register accessor: Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapstat`] module"] -pub type TRAPSTAT = crate::Reg; +#[doc(alias = "TRAPSTAT")] +pub type Trapstat = crate::Reg; #[doc = "Trap Status Register"] pub mod trapstat; #[doc = "TRAPRAW (r) register accessor: Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapraw`] module"] -pub type TRAPRAW = crate::Reg; +#[doc(alias = "TRAPRAW")] +pub type Trapraw = crate::Reg; #[doc = "Trap Raw Status Register"] pub mod trapraw; #[doc = "TRAPDIS (rw) register accessor: Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapdis`] module"] -pub type TRAPDIS = crate::Reg; +#[doc(alias = "TRAPDIS")] +pub type Trapdis = crate::Reg; #[doc = "Trap Disable Register"] pub mod trapdis; #[doc = "TRAPCLR (w) register accessor: Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapclr`] module"] -pub type TRAPCLR = crate::Reg; +#[doc(alias = "TRAPCLR")] +pub type Trapclr = crate::Reg; #[doc = "Trap Clear Register"] pub mod trapclr; #[doc = "TRAPSET (w) register accessor: Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapset`] module"] -pub type TRAPSET = crate::Reg; +#[doc(alias = "TRAPSET")] +pub type Trapset = crate::Reg; #[doc = "Trap Set Register"] pub mod trapset; diff --git a/src/scu_trap/trapclr.rs b/src/scu_trap/trapclr.rs index 90d97e57..9fef3777 100644 --- a/src/scu_trap/trapclr.rs +++ b/src/scu_trap/trapclr.rs @@ -1,361 +1,352 @@ #[doc = "Register `TRAPCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "OSC_HP Oscillator Watchdog Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOSCWDGT_AW { +pub enum Soscwdgt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOSCWDGT_AW) -> Self { + fn from(variant: Soscwdgt) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` writer - OSC_HP Oscillator Watchdog Trap Clear"] -pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_AW>; -impl<'a, REG> SOSCWDGT_W<'a, REG> +pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; +impl<'a, REG> SoscwdgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_AW::VALUE1) + self.variant(Soscwdgt::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_AW::VALUE2) + self.variant(Soscwdgt::Value2) } } #[doc = "System VCO Lock Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SVCOLCKT_AW { +pub enum Svcolckt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SVCOLCKT_AW) -> Self { + fn from(variant: Svcolckt) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Clear"] -pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_AW>; -impl<'a, REG> SVCOLCKT_W<'a, REG> +pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; +impl<'a, REG> SvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_AW::VALUE1) + self.variant(Svcolckt::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_AW::VALUE2) + self.variant(Svcolckt::Value2) } } #[doc = "USB VCO Lock Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UVCOLCKT_AW { +pub enum Uvcolckt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UVCOLCKT_AW) -> Self { + fn from(variant: Uvcolckt) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Clear"] -pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_AW>; -impl<'a, REG> UVCOLCKT_W<'a, REG> +pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; +impl<'a, REG> UvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_AW::VALUE1) + self.variant(Uvcolckt::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_AW::VALUE2) + self.variant(Uvcolckt::Value2) } } #[doc = "Parity Error Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PET_AW { +pub enum Pet { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PET_AW) -> Self { + fn from(variant: Pet) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` writer - Parity Error Trap Clear"] -pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_AW>; -impl<'a, REG> PET_W<'a, REG> +pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; +impl<'a, REG> PetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PET_AW::VALUE1) + self.variant(Pet::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PET_AW::VALUE2) + self.variant(Pet::Value2) } } #[doc = "Brown Out Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRWNT_AW { +pub enum Brwnt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRWNT_AW) -> Self { + fn from(variant: Brwnt) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Clear"] -pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_AW>; -impl<'a, REG> BRWNT_W<'a, REG> +pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; +impl<'a, REG> BrwntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRWNT_AW::VALUE1) + self.variant(Brwnt::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRWNT_AW::VALUE2) + self.variant(Brwnt::Value2) } } #[doc = "OSC_ULP Oscillator Watchdog Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDGT_AW { +pub enum Ulpwdgt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDGT_AW) -> Self { + fn from(variant: Ulpwdgt) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGT` writer - OSC_ULP Oscillator Watchdog Trap Clear"] -pub type ULPWDGT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGT_AW>; -impl<'a, REG> ULPWDGT_W<'a, REG> +pub type UlpwdgtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgt>; +impl<'a, REG> UlpwdgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDGT_AW::VALUE1) + self.variant(Ulpwdgt::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDGT_AW::VALUE2) + self.variant(Ulpwdgt::Value2) } } #[doc = "Peripheral Bridge 0 Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR0T_AW { +pub enum Bwerr0t { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR0T_AW) -> Self { + fn from(variant: Bwerr0t) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Clear"] -pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_AW>; -impl<'a, REG> BWERR0T_W<'a, REG> +pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; +impl<'a, REG> Bwerr0tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR0T_AW::VALUE1) + self.variant(Bwerr0t::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR0T_AW::VALUE2) + self.variant(Bwerr0t::Value2) } } #[doc = "Peripheral Bridge 1 Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR1T_AW { +pub enum Bwerr1t { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR1T_AW) -> Self { + fn from(variant: Bwerr1t) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Clear"] -pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_AW>; -impl<'a, REG> BWERR1T_W<'a, REG> +pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; +impl<'a, REG> Bwerr1tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR1T_AW::VALUE1) + self.variant(Bwerr1t::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR1T_AW::VALUE2) + self.variant(Bwerr1t::Value2) } } #[doc = "EtherCat Reset 0 Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RST_AW { +pub enum Ecat0rst { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RST_AW) -> Self { + fn from(variant: Ecat0rst) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RST` writer - EtherCat Reset 0 Trap Clear"] -pub type ECAT0RST_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RST_AW>; -impl<'a, REG> ECAT0RST_W<'a, REG> +pub type Ecat0rstW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rst>; +impl<'a, REG> Ecat0rstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RST_AW::VALUE1) + self.variant(Ecat0rst::Value1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RST_AW::VALUE2) + self.variant(Ecat0rst::Value2) } } impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Clear"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SOSCWDGT_W { - SOSCWDGT_W::new(self, 0) + pub fn soscwdgt(&mut self) -> SoscwdgtW { + SoscwdgtW::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Clear"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SVCOLCKT_W { - SVCOLCKT_W::new(self, 2) + pub fn svcolckt(&mut self) -> SvcolcktW { + SvcolcktW::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Clear"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UVCOLCKT_W { - UVCOLCKT_W::new(self, 3) + pub fn uvcolckt(&mut self) -> UvcolcktW { + UvcolcktW::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Clear"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PET_W { - PET_W::new(self, 4) + pub fn pet(&mut self) -> PetW { + PetW::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Clear"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BRWNT_W { - BRWNT_W::new(self, 5) + pub fn brwnt(&mut self) -> BrwntW { + BrwntW::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Clear"] #[inline(always)] #[must_use] - pub fn ulpwdgt(&mut self) -> ULPWDGT_W { - ULPWDGT_W::new(self, 6) + pub fn ulpwdgt(&mut self) -> UlpwdgtW { + UlpwdgtW::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Clear"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> BWERR0T_W { - BWERR0T_W::new(self, 7) + pub fn bwerr0t(&mut self) -> Bwerr0tW { + Bwerr0tW::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Clear"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> BWERR1T_W { - BWERR1T_W::new(self, 8) + pub fn bwerr1t(&mut self) -> Bwerr1tW { + Bwerr1tW::new(self, 8) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Clear"] #[inline(always)] #[must_use] - pub fn ecat0rst(&mut self) -> ECAT0RST_W { - ECAT0RST_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rst(&mut self) -> Ecat0rstW { + Ecat0rstW::new(self, 16) } } #[doc = "Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRAPCLR_SPEC; -impl crate::RegisterSpec for TRAPCLR_SPEC { +pub struct TrapclrSpec; +impl crate::RegisterSpec for TrapclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trapclr::W`](W) writer structure"] -impl crate::Writable for TRAPCLR_SPEC { +impl crate::Writable for TrapclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPCLR to value 0"] -impl crate::Resettable for TRAPCLR_SPEC { +impl crate::Resettable for TrapclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapdis.rs b/src/scu_trap/trapdis.rs index 8dec1508..11ccc1cb 100644 --- a/src/scu_trap/trapdis.rs +++ b/src/scu_trap/trapdis.rs @@ -1,610 +1,601 @@ #[doc = "Register `TRAPDIS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRAPDIS` writer"] -pub type W = crate::W; -#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Disable"] -pub type SOSCWDGT_R = crate::BitReader; +pub type W = crate::W; #[doc = "OSC_HP Oscillator Watchdog Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOSCWDGT_A { +pub enum Soscwdgt { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOSCWDGT_A) -> Self { + fn from(variant: Soscwdgt) -> Self { variant as u8 != 0 } } -impl SOSCWDGT_R { +#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Disable"] +pub type SoscwdgtR = crate::BitReader; +impl SoscwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOSCWDGT_A { + pub const fn variant(&self) -> Soscwdgt { match self.bits { - false => SOSCWDGT_A::VALUE1, - true => SOSCWDGT_A::VALUE2, + false => Soscwdgt::Value1, + true => Soscwdgt::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOSCWDGT_A::VALUE1 + *self == Soscwdgt::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOSCWDGT_A::VALUE2 + *self == Soscwdgt::Value2 } } #[doc = "Field `SOSCWDGT` writer - OSC_HP Oscillator Watchdog Trap Disable"] -pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_A>; -impl<'a, REG> SOSCWDGT_W<'a, REG> +pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; +impl<'a, REG> SoscwdgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_A::VALUE1) + self.variant(Soscwdgt::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_A::VALUE2) + self.variant(Soscwdgt::Value2) } } -#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Disable"] -pub type SVCOLCKT_R = crate::BitReader; #[doc = "System VCO Lock Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SVCOLCKT_A { +pub enum Svcolckt { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SVCOLCKT_A) -> Self { + fn from(variant: Svcolckt) -> Self { variant as u8 != 0 } } -impl SVCOLCKT_R { +#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Disable"] +pub type SvcolcktR = crate::BitReader; +impl SvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SVCOLCKT_A { + pub const fn variant(&self) -> Svcolckt { match self.bits { - false => SVCOLCKT_A::VALUE1, - true => SVCOLCKT_A::VALUE2, + false => Svcolckt::Value1, + true => Svcolckt::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SVCOLCKT_A::VALUE1 + *self == Svcolckt::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SVCOLCKT_A::VALUE2 + *self == Svcolckt::Value2 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Disable"] -pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_A>; -impl<'a, REG> SVCOLCKT_W<'a, REG> +pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; +impl<'a, REG> SvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_A::VALUE1) + self.variant(Svcolckt::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_A::VALUE2) + self.variant(Svcolckt::Value2) } } -#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Disable"] -pub type UVCOLCKT_R = crate::BitReader; #[doc = "USB VCO Lock Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UVCOLCKT_A { +pub enum Uvcolckt { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UVCOLCKT_A) -> Self { + fn from(variant: Uvcolckt) -> Self { variant as u8 != 0 } } -impl UVCOLCKT_R { +#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Disable"] +pub type UvcolcktR = crate::BitReader; +impl UvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UVCOLCKT_A { + pub const fn variant(&self) -> Uvcolckt { match self.bits { - false => UVCOLCKT_A::VALUE1, - true => UVCOLCKT_A::VALUE2, + false => Uvcolckt::Value1, + true => Uvcolckt::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UVCOLCKT_A::VALUE1 + *self == Uvcolckt::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UVCOLCKT_A::VALUE2 + *self == Uvcolckt::Value2 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Disable"] -pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_A>; -impl<'a, REG> UVCOLCKT_W<'a, REG> +pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; +impl<'a, REG> UvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_A::VALUE1) + self.variant(Uvcolckt::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_A::VALUE2) + self.variant(Uvcolckt::Value2) } } -#[doc = "Field `PET` reader - Parity Error Trap Disable"] -pub type PET_R = crate::BitReader; #[doc = "Parity Error Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PET_A { +pub enum Pet { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PET_A) -> Self { + fn from(variant: Pet) -> Self { variant as u8 != 0 } } -impl PET_R { +#[doc = "Field `PET` reader - Parity Error Trap Disable"] +pub type PetR = crate::BitReader; +impl PetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PET_A { + pub const fn variant(&self) -> Pet { match self.bits { - false => PET_A::VALUE1, - true => PET_A::VALUE2, + false => Pet::Value1, + true => Pet::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PET_A::VALUE1 + *self == Pet::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PET_A::VALUE2 + *self == Pet::Value2 } } #[doc = "Field `PET` writer - Parity Error Trap Disable"] -pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_A>; -impl<'a, REG> PET_W<'a, REG> +pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; +impl<'a, REG> PetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PET_A::VALUE1) + self.variant(Pet::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PET_A::VALUE2) + self.variant(Pet::Value2) } } -#[doc = "Field `BRWNT` reader - Brown Out Trap Disable"] -pub type BRWNT_R = crate::BitReader; #[doc = "Brown Out Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRWNT_A { +pub enum Brwnt { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRWNT_A) -> Self { + fn from(variant: Brwnt) -> Self { variant as u8 != 0 } } -impl BRWNT_R { +#[doc = "Field `BRWNT` reader - Brown Out Trap Disable"] +pub type BrwntR = crate::BitReader; +impl BrwntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRWNT_A { + pub const fn variant(&self) -> Brwnt { match self.bits { - false => BRWNT_A::VALUE1, - true => BRWNT_A::VALUE2, + false => Brwnt::Value1, + true => Brwnt::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRWNT_A::VALUE1 + *self == Brwnt::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRWNT_A::VALUE2 + *self == Brwnt::Value2 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Disable"] -pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_A>; -impl<'a, REG> BRWNT_W<'a, REG> +pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; +impl<'a, REG> BrwntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRWNT_A::VALUE1) + self.variant(Brwnt::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRWNT_A::VALUE2) + self.variant(Brwnt::Value2) } } -#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Disable"] -pub type ULPWDGT_R = crate::BitReader; #[doc = "OSC_ULP Oscillator Watchdog Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDGT_A { +pub enum Ulpwdgt { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDGT_A) -> Self { + fn from(variant: Ulpwdgt) -> Self { variant as u8 != 0 } } -impl ULPWDGT_R { +#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Disable"] +pub type UlpwdgtR = crate::BitReader; +impl UlpwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ULPWDGT_A { + pub const fn variant(&self) -> Ulpwdgt { match self.bits { - false => ULPWDGT_A::VALUE1, - true => ULPWDGT_A::VALUE2, + false => Ulpwdgt::Value1, + true => Ulpwdgt::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ULPWDGT_A::VALUE1 + *self == Ulpwdgt::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ULPWDGT_A::VALUE2 + *self == Ulpwdgt::Value2 } } #[doc = "Field `ULPWDGT` writer - OSC_ULP Oscillator Watchdog Trap Disable"] -pub type ULPWDGT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGT_A>; -impl<'a, REG> ULPWDGT_W<'a, REG> +pub type UlpwdgtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgt>; +impl<'a, REG> UlpwdgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDGT_A::VALUE1) + self.variant(Ulpwdgt::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDGT_A::VALUE2) + self.variant(Ulpwdgt::Value2) } } -#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Disable"] -pub type BWERR0T_R = crate::BitReader; #[doc = "Peripheral Bridge 0 Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR0T_A { +pub enum Bwerr0t { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR0T_A) -> Self { + fn from(variant: Bwerr0t) -> Self { variant as u8 != 0 } } -impl BWERR0T_R { +#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Disable"] +pub type Bwerr0tR = crate::BitReader; +impl Bwerr0tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR0T_A { + pub const fn variant(&self) -> Bwerr0t { match self.bits { - false => BWERR0T_A::VALUE1, - true => BWERR0T_A::VALUE2, + false => Bwerr0t::Value1, + true => Bwerr0t::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR0T_A::VALUE1 + *self == Bwerr0t::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR0T_A::VALUE2 + *self == Bwerr0t::Value2 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Disable"] -pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_A>; -impl<'a, REG> BWERR0T_W<'a, REG> +pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; +impl<'a, REG> Bwerr0tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR0T_A::VALUE1) + self.variant(Bwerr0t::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR0T_A::VALUE2) + self.variant(Bwerr0t::Value2) } } -#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Disable"] -pub type BWERR1T_R = crate::BitReader; #[doc = "Peripheral Bridge 1 Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR1T_A { +pub enum Bwerr1t { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR1T_A) -> Self { + fn from(variant: Bwerr1t) -> Self { variant as u8 != 0 } } -impl BWERR1T_R { +#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Disable"] +pub type Bwerr1tR = crate::BitReader; +impl Bwerr1tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR1T_A { + pub const fn variant(&self) -> Bwerr1t { match self.bits { - false => BWERR1T_A::VALUE1, - true => BWERR1T_A::VALUE2, + false => Bwerr1t::Value1, + true => Bwerr1t::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR1T_A::VALUE1 + *self == Bwerr1t::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR1T_A::VALUE2 + *self == Bwerr1t::Value2 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Disable"] -pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_A>; -impl<'a, REG> BWERR1T_W<'a, REG> +pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; +impl<'a, REG> Bwerr1tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR1T_A::VALUE1) + self.variant(Bwerr1t::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR1T_A::VALUE2) + self.variant(Bwerr1t::Value2) } } -#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Disable"] -pub type ECAT0RST_R = crate::BitReader; #[doc = "EtherCat Reset 0 Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RST_A { +pub enum Ecat0rst { #[doc = "0: Trap request enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trap request disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RST_A) -> Self { + fn from(variant: Ecat0rst) -> Self { variant as u8 != 0 } } -impl ECAT0RST_R { +#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Disable"] +pub type Ecat0rstR = crate::BitReader; +impl Ecat0rstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0RST_A { + pub const fn variant(&self) -> Ecat0rst { match self.bits { - false => ECAT0RST_A::VALUE1, - true => ECAT0RST_A::VALUE2, + false => Ecat0rst::Value1, + true => Ecat0rst::Value2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0RST_A::VALUE1 + *self == Ecat0rst::Value1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0RST_A::VALUE2 + *self == Ecat0rst::Value2 } } #[doc = "Field `ECAT0RST` writer - EtherCat Reset 0 Trap Disable"] -pub type ECAT0RST_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RST_A>; -impl<'a, REG> ECAT0RST_W<'a, REG> +pub type Ecat0rstW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rst>; +impl<'a, REG> Ecat0rstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RST_A::VALUE1) + self.variant(Ecat0rst::Value1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RST_A::VALUE2) + self.variant(Ecat0rst::Value2) } } impl R { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Disable"] #[inline(always)] - pub fn soscwdgt(&self) -> SOSCWDGT_R { - SOSCWDGT_R::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SoscwdgtR { + SoscwdgtR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Disable"] #[inline(always)] - pub fn svcolckt(&self) -> SVCOLCKT_R { - SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SvcolcktR { + SvcolcktR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Disable"] #[inline(always)] - pub fn uvcolckt(&self) -> UVCOLCKT_R { - UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UvcolcktR { + UvcolcktR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Disable"] #[inline(always)] - pub fn pet(&self) -> PET_R { - PET_R::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PetR { + PetR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Disable"] #[inline(always)] - pub fn brwnt(&self) -> BRWNT_R { - BRWNT_R::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BrwntR { + BrwntR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Disable"] #[inline(always)] - pub fn ulpwdgt(&self) -> ULPWDGT_R { - ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> UlpwdgtR { + UlpwdgtR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"] #[inline(always)] - pub fn bwerr0t(&self) -> BWERR0T_R { - BWERR0T_R::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> Bwerr0tR { + Bwerr0tR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"] #[inline(always)] - pub fn bwerr1t(&self) -> BWERR1T_R { - BWERR1T_R::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> Bwerr1tR { + Bwerr1tR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Disable"] #[inline(always)] - pub fn ecat0rst(&self) -> ECAT0RST_R { - ECAT0RST_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecat0rst(&self) -> Ecat0rstR { + Ecat0rstR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Disable"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SOSCWDGT_W { - SOSCWDGT_W::new(self, 0) + pub fn soscwdgt(&mut self) -> SoscwdgtW { + SoscwdgtW::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Disable"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SVCOLCKT_W { - SVCOLCKT_W::new(self, 2) + pub fn svcolckt(&mut self) -> SvcolcktW { + SvcolcktW::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Disable"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UVCOLCKT_W { - UVCOLCKT_W::new(self, 3) + pub fn uvcolckt(&mut self) -> UvcolcktW { + UvcolcktW::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Disable"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PET_W { - PET_W::new(self, 4) + pub fn pet(&mut self) -> PetW { + PetW::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Disable"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BRWNT_W { - BRWNT_W::new(self, 5) + pub fn brwnt(&mut self) -> BrwntW { + BrwntW::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Disable"] #[inline(always)] #[must_use] - pub fn ulpwdgt(&mut self) -> ULPWDGT_W { - ULPWDGT_W::new(self, 6) + pub fn ulpwdgt(&mut self) -> UlpwdgtW { + UlpwdgtW::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> BWERR0T_W { - BWERR0T_W::new(self, 7) + pub fn bwerr0t(&mut self) -> Bwerr0tW { + Bwerr0tW::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> BWERR1T_W { - BWERR1T_W::new(self, 8) + pub fn bwerr1t(&mut self) -> Bwerr1tW { + Bwerr1tW::new(self, 8) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Disable"] #[inline(always)] #[must_use] - pub fn ecat0rst(&mut self) -> ECAT0RST_W { - ECAT0RST_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rst(&mut self) -> Ecat0rstW { + Ecat0rstW::new(self, 16) } } #[doc = "Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRAPDIS_SPEC; -impl crate::RegisterSpec for TRAPDIS_SPEC { +pub struct TrapdisSpec; +impl crate::RegisterSpec for TrapdisSpec { type Ux = u32; } #[doc = "`read()` method returns [`trapdis::R`](R) reader structure"] -impl crate::Readable for TRAPDIS_SPEC {} +impl crate::Readable for TrapdisSpec {} #[doc = "`write(|w| ..)` method takes [`trapdis::W`](W) writer structure"] -impl crate::Writable for TRAPDIS_SPEC { +impl crate::Writable for TrapdisSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPDIS to value 0x0001_01fd"] -impl crate::Resettable for TRAPDIS_SPEC { +impl crate::Resettable for TrapdisSpec { const RESET_VALUE: u32 = 0x0001_01fd; } diff --git a/src/scu_trap/trapraw.rs b/src/scu_trap/trapraw.rs index 00fa74a8..080763db 100644 --- a/src/scu_trap/trapraw.rs +++ b/src/scu_trap/trapraw.rs @@ -1,384 +1,384 @@ #[doc = "Register `TRAPRAW` reader"] -pub type R = crate::R; -#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Raw Status"] -pub type SOSCWDGT_R = crate::BitReader; +pub type R = crate::R; #[doc = "OSC_HP Oscillator Watchdog Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOSCWDGT_A { +pub enum Soscwdgt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOSCWDGT_A) -> Self { + fn from(variant: Soscwdgt) -> Self { variant as u8 != 0 } } -impl SOSCWDGT_R { +#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Raw Status"] +pub type SoscwdgtR = crate::BitReader; +impl SoscwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOSCWDGT_A { + pub const fn variant(&self) -> Soscwdgt { match self.bits { - false => SOSCWDGT_A::VALUE1, - true => SOSCWDGT_A::VALUE2, + false => Soscwdgt::Value1, + true => Soscwdgt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOSCWDGT_A::VALUE1 + *self == Soscwdgt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOSCWDGT_A::VALUE2 + *self == Soscwdgt::Value2 } } -#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Raw Status"] -pub type SVCOLCKT_R = crate::BitReader; #[doc = "System VCO Lock Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SVCOLCKT_A { +pub enum Svcolckt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SVCOLCKT_A) -> Self { + fn from(variant: Svcolckt) -> Self { variant as u8 != 0 } } -impl SVCOLCKT_R { +#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Raw Status"] +pub type SvcolcktR = crate::BitReader; +impl SvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SVCOLCKT_A { + pub const fn variant(&self) -> Svcolckt { match self.bits { - false => SVCOLCKT_A::VALUE1, - true => SVCOLCKT_A::VALUE2, + false => Svcolckt::Value1, + true => Svcolckt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SVCOLCKT_A::VALUE1 + *self == Svcolckt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SVCOLCKT_A::VALUE2 + *self == Svcolckt::Value2 } } -#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Raw Status"] -pub type UVCOLCKT_R = crate::BitReader; #[doc = "USB VCO Lock Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UVCOLCKT_A { +pub enum Uvcolckt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UVCOLCKT_A) -> Self { + fn from(variant: Uvcolckt) -> Self { variant as u8 != 0 } } -impl UVCOLCKT_R { +#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Raw Status"] +pub type UvcolcktR = crate::BitReader; +impl UvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UVCOLCKT_A { + pub const fn variant(&self) -> Uvcolckt { match self.bits { - false => UVCOLCKT_A::VALUE1, - true => UVCOLCKT_A::VALUE2, + false => Uvcolckt::Value1, + true => Uvcolckt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UVCOLCKT_A::VALUE1 + *self == Uvcolckt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UVCOLCKT_A::VALUE2 + *self == Uvcolckt::Value2 } } -#[doc = "Field `PET` reader - Parity Error Trap Raw Status"] -pub type PET_R = crate::BitReader; #[doc = "Parity Error Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PET_A { +pub enum Pet { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PET_A) -> Self { + fn from(variant: Pet) -> Self { variant as u8 != 0 } } -impl PET_R { +#[doc = "Field `PET` reader - Parity Error Trap Raw Status"] +pub type PetR = crate::BitReader; +impl PetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PET_A { + pub const fn variant(&self) -> Pet { match self.bits { - false => PET_A::VALUE1, - true => PET_A::VALUE2, + false => Pet::Value1, + true => Pet::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PET_A::VALUE1 + *self == Pet::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PET_A::VALUE2 + *self == Pet::Value2 } } -#[doc = "Field `BRWNT` reader - Brown Out Trap Raw Status"] -pub type BRWNT_R = crate::BitReader; #[doc = "Brown Out Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRWNT_A { +pub enum Brwnt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRWNT_A) -> Self { + fn from(variant: Brwnt) -> Self { variant as u8 != 0 } } -impl BRWNT_R { +#[doc = "Field `BRWNT` reader - Brown Out Trap Raw Status"] +pub type BrwntR = crate::BitReader; +impl BrwntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRWNT_A { + pub const fn variant(&self) -> Brwnt { match self.bits { - false => BRWNT_A::VALUE1, - true => BRWNT_A::VALUE2, + false => Brwnt::Value1, + true => Brwnt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRWNT_A::VALUE1 + *self == Brwnt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRWNT_A::VALUE2 + *self == Brwnt::Value2 } } -#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Raw Status"] -pub type ULPWDGT_R = crate::BitReader; #[doc = "OSC_ULP Oscillator Watchdog Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDGT_A { +pub enum Ulpwdgt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDGT_A) -> Self { + fn from(variant: Ulpwdgt) -> Self { variant as u8 != 0 } } -impl ULPWDGT_R { +#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Raw Status"] +pub type UlpwdgtR = crate::BitReader; +impl UlpwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ULPWDGT_A { + pub const fn variant(&self) -> Ulpwdgt { match self.bits { - false => ULPWDGT_A::VALUE1, - true => ULPWDGT_A::VALUE2, + false => Ulpwdgt::Value1, + true => Ulpwdgt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ULPWDGT_A::VALUE1 + *self == Ulpwdgt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ULPWDGT_A::VALUE2 + *self == Ulpwdgt::Value2 } } -#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Raw Status"] -pub type BWERR0T_R = crate::BitReader; #[doc = "Peripheral Bridge 0 Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR0T_A { +pub enum Bwerr0t { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR0T_A) -> Self { + fn from(variant: Bwerr0t) -> Self { variant as u8 != 0 } } -impl BWERR0T_R { +#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Raw Status"] +pub type Bwerr0tR = crate::BitReader; +impl Bwerr0tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR0T_A { + pub const fn variant(&self) -> Bwerr0t { match self.bits { - false => BWERR0T_A::VALUE1, - true => BWERR0T_A::VALUE2, + false => Bwerr0t::Value1, + true => Bwerr0t::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR0T_A::VALUE1 + *self == Bwerr0t::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR0T_A::VALUE2 + *self == Bwerr0t::Value2 } } -#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Raw Status"] -pub type BWERR1T_R = crate::BitReader; #[doc = "Peripheral Bridge 1 Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR1T_A { +pub enum Bwerr1t { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR1T_A) -> Self { + fn from(variant: Bwerr1t) -> Self { variant as u8 != 0 } } -impl BWERR1T_R { +#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Raw Status"] +pub type Bwerr1tR = crate::BitReader; +impl Bwerr1tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR1T_A { + pub const fn variant(&self) -> Bwerr1t { match self.bits { - false => BWERR1T_A::VALUE1, - true => BWERR1T_A::VALUE2, + false => Bwerr1t::Value1, + true => Bwerr1t::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR1T_A::VALUE1 + *self == Bwerr1t::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR1T_A::VALUE2 + *self == Bwerr1t::Value2 } } -#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Raw Status"] -pub type ECAT0RST_R = crate::BitReader; #[doc = "EtherCat Reset 0 Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RST_A { +pub enum Ecat0rst { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RST_A) -> Self { + fn from(variant: Ecat0rst) -> Self { variant as u8 != 0 } } -impl ECAT0RST_R { +#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Raw Status"] +pub type Ecat0rstR = crate::BitReader; +impl Ecat0rstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0RST_A { + pub const fn variant(&self) -> Ecat0rst { match self.bits { - false => ECAT0RST_A::VALUE1, - true => ECAT0RST_A::VALUE2, + false => Ecat0rst::Value1, + true => Ecat0rst::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0RST_A::VALUE1 + *self == Ecat0rst::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0RST_A::VALUE2 + *self == Ecat0rst::Value2 } } impl R { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Raw Status"] #[inline(always)] - pub fn soscwdgt(&self) -> SOSCWDGT_R { - SOSCWDGT_R::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SoscwdgtR { + SoscwdgtR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Raw Status"] #[inline(always)] - pub fn svcolckt(&self) -> SVCOLCKT_R { - SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SvcolcktR { + SvcolcktR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Raw Status"] #[inline(always)] - pub fn uvcolckt(&self) -> UVCOLCKT_R { - UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UvcolcktR { + UvcolcktR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Raw Status"] #[inline(always)] - pub fn pet(&self) -> PET_R { - PET_R::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PetR { + PetR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Raw Status"] #[inline(always)] - pub fn brwnt(&self) -> BRWNT_R { - BRWNT_R::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BrwntR { + BrwntR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Raw Status"] #[inline(always)] - pub fn ulpwdgt(&self) -> ULPWDGT_R { - ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> UlpwdgtR { + UlpwdgtR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Raw Status"] #[inline(always)] - pub fn bwerr0t(&self) -> BWERR0T_R { - BWERR0T_R::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> Bwerr0tR { + Bwerr0tR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Raw Status"] #[inline(always)] - pub fn bwerr1t(&self) -> BWERR1T_R { - BWERR1T_R::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> Bwerr1tR { + Bwerr1tR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Raw Status"] #[inline(always)] - pub fn ecat0rst(&self) -> ECAT0RST_R { - ECAT0RST_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecat0rst(&self) -> Ecat0rstR { + Ecat0rstR::new(((self.bits >> 16) & 1) != 0) } } #[doc = "Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRAPRAW_SPEC; -impl crate::RegisterSpec for TRAPRAW_SPEC { +pub struct TraprawSpec; +impl crate::RegisterSpec for TraprawSpec { type Ux = u32; } #[doc = "`read()` method returns [`trapraw::R`](R) reader structure"] -impl crate::Readable for TRAPRAW_SPEC {} +impl crate::Readable for TraprawSpec {} #[doc = "`reset()` method sets TRAPRAW to value 0"] -impl crate::Resettable for TRAPRAW_SPEC { +impl crate::Resettable for TraprawSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapset.rs b/src/scu_trap/trapset.rs index d7cde896..98a3fa90 100644 --- a/src/scu_trap/trapset.rs +++ b/src/scu_trap/trapset.rs @@ -1,361 +1,352 @@ #[doc = "Register `TRAPSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "OSC_HP Oscillator Watchdog Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOSCWDGT_AW { +pub enum Soscwdgt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOSCWDGT_AW) -> Self { + fn from(variant: Soscwdgt) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` writer - OSC_HP Oscillator Watchdog Trap Set"] -pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_AW>; -impl<'a, REG> SOSCWDGT_W<'a, REG> +pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; +impl<'a, REG> SoscwdgtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_AW::VALUE1) + self.variant(Soscwdgt::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SOSCWDGT_AW::VALUE2) + self.variant(Soscwdgt::Value2) } } #[doc = "System VCO Lock Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SVCOLCKT_AW { +pub enum Svcolckt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SVCOLCKT_AW) -> Self { + fn from(variant: Svcolckt) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Set"] -pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_AW>; -impl<'a, REG> SVCOLCKT_W<'a, REG> +pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; +impl<'a, REG> SvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_AW::VALUE1) + self.variant(Svcolckt::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SVCOLCKT_AW::VALUE2) + self.variant(Svcolckt::Value2) } } #[doc = "USB VCO Lock Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UVCOLCKT_AW { +pub enum Uvcolckt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UVCOLCKT_AW) -> Self { + fn from(variant: Uvcolckt) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Set"] -pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_AW>; -impl<'a, REG> UVCOLCKT_W<'a, REG> +pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; +impl<'a, REG> UvcolcktW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_AW::VALUE1) + self.variant(Uvcolckt::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UVCOLCKT_AW::VALUE2) + self.variant(Uvcolckt::Value2) } } #[doc = "Parity Error Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PET_AW { +pub enum Pet { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PET_AW) -> Self { + fn from(variant: Pet) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` writer - Parity Error Trap Set"] -pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_AW>; -impl<'a, REG> PET_W<'a, REG> +pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; +impl<'a, REG> PetW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PET_AW::VALUE1) + self.variant(Pet::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PET_AW::VALUE2) + self.variant(Pet::Value2) } } #[doc = "Brown Out Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRWNT_AW { +pub enum Brwnt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRWNT_AW) -> Self { + fn from(variant: Brwnt) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Set"] -pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_AW>; -impl<'a, REG> BRWNT_W<'a, REG> +pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; +impl<'a, REG> BrwntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRWNT_AW::VALUE1) + self.variant(Brwnt::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRWNT_AW::VALUE2) + self.variant(Brwnt::Value2) } } #[doc = "OSC_ULP Oscillator Watchdog Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDT_AW { +pub enum Ulpwdt { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDT_AW) -> Self { + fn from(variant: Ulpwdt) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDT` writer - OSC_ULP Oscillator Watchdog Trap Set"] -pub type ULPWDT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDT_AW>; -impl<'a, REG> ULPWDT_W<'a, REG> +pub type UlpwdtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdt>; +impl<'a, REG> UlpwdtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ULPWDT_AW::VALUE1) + self.variant(Ulpwdt::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ULPWDT_AW::VALUE2) + self.variant(Ulpwdt::Value2) } } #[doc = "Peripheral Bridge 0 Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR0T_AW { +pub enum Bwerr0t { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR0T_AW) -> Self { + fn from(variant: Bwerr0t) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Set"] -pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_AW>; -impl<'a, REG> BWERR0T_W<'a, REG> +pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; +impl<'a, REG> Bwerr0tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR0T_AW::VALUE1) + self.variant(Bwerr0t::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR0T_AW::VALUE2) + self.variant(Bwerr0t::Value2) } } #[doc = "Peripheral Bridge 1 Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR1T_AW { +pub enum Bwerr1t { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR1T_AW) -> Self { + fn from(variant: Bwerr1t) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Set"] -pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_AW>; -impl<'a, REG> BWERR1T_W<'a, REG> +pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; +impl<'a, REG> Bwerr1tW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWERR1T_AW::VALUE1) + self.variant(Bwerr1t::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWERR1T_AW::VALUE2) + self.variant(Bwerr1t::Value2) } } #[doc = "EtherCat Reset 0 Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RST_AW { +pub enum Ecat0rst { #[doc = "0: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RST_AW) -> Self { + fn from(variant: Ecat0rst) -> Self { variant as u8 != 0 } } #[doc = "Field `ECAT0RST` writer - EtherCat Reset 0 Trap Set"] -pub type ECAT0RST_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RST_AW>; -impl<'a, REG> ECAT0RST_W<'a, REG> +pub type Ecat0rstW<'a, REG> = crate::BitWriter<'a, REG, Ecat0rst>; +impl<'a, REG> Ecat0rstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ECAT0RST_AW::VALUE1) + self.variant(Ecat0rst::Value1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ECAT0RST_AW::VALUE2) + self.variant(Ecat0rst::Value2) } } impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Set"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SOSCWDGT_W { - SOSCWDGT_W::new(self, 0) + pub fn soscwdgt(&mut self) -> SoscwdgtW { + SoscwdgtW::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Set"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SVCOLCKT_W { - SVCOLCKT_W::new(self, 2) + pub fn svcolckt(&mut self) -> SvcolcktW { + SvcolcktW::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Set"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UVCOLCKT_W { - UVCOLCKT_W::new(self, 3) + pub fn uvcolckt(&mut self) -> UvcolcktW { + UvcolcktW::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Set"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PET_W { - PET_W::new(self, 4) + pub fn pet(&mut self) -> PetW { + PetW::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Set"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BRWNT_W { - BRWNT_W::new(self, 5) + pub fn brwnt(&mut self) -> BrwntW { + BrwntW::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Set"] #[inline(always)] #[must_use] - pub fn ulpwdt(&mut self) -> ULPWDT_W { - ULPWDT_W::new(self, 6) + pub fn ulpwdt(&mut self) -> UlpwdtW { + UlpwdtW::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Set"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> BWERR0T_W { - BWERR0T_W::new(self, 7) + pub fn bwerr0t(&mut self) -> Bwerr0tW { + Bwerr0tW::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Set"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> BWERR1T_W { - BWERR1T_W::new(self, 8) + pub fn bwerr1t(&mut self) -> Bwerr1tW { + Bwerr1tW::new(self, 8) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Set"] #[inline(always)] #[must_use] - pub fn ecat0rst(&mut self) -> ECAT0RST_W { - ECAT0RST_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ecat0rst(&mut self) -> Ecat0rstW { + Ecat0rstW::new(self, 16) } } #[doc = "Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRAPSET_SPEC; -impl crate::RegisterSpec for TRAPSET_SPEC { +pub struct TrapsetSpec; +impl crate::RegisterSpec for TrapsetSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trapset::W`](W) writer structure"] -impl crate::Writable for TRAPSET_SPEC { +impl crate::Writable for TrapsetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPSET to value 0"] -impl crate::Resettable for TRAPSET_SPEC { +impl crate::Resettable for TrapsetSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapstat.rs b/src/scu_trap/trapstat.rs index b8888124..8fd46cc2 100644 --- a/src/scu_trap/trapstat.rs +++ b/src/scu_trap/trapstat.rs @@ -1,384 +1,384 @@ #[doc = "Register `TRAPSTAT` reader"] -pub type R = crate::R; -#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Status"] -pub type SOSCWDGT_R = crate::BitReader; +pub type R = crate::R; #[doc = "OSC_HP Oscillator Watchdog Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOSCWDGT_A { +pub enum Soscwdgt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOSCWDGT_A) -> Self { + fn from(variant: Soscwdgt) -> Self { variant as u8 != 0 } } -impl SOSCWDGT_R { +#[doc = "Field `SOSCWDGT` reader - OSC_HP Oscillator Watchdog Trap Status"] +pub type SoscwdgtR = crate::BitReader; +impl SoscwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOSCWDGT_A { + pub const fn variant(&self) -> Soscwdgt { match self.bits { - false => SOSCWDGT_A::VALUE1, - true => SOSCWDGT_A::VALUE2, + false => Soscwdgt::Value1, + true => Soscwdgt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOSCWDGT_A::VALUE1 + *self == Soscwdgt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOSCWDGT_A::VALUE2 + *self == Soscwdgt::Value2 } } -#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Status"] -pub type SVCOLCKT_R = crate::BitReader; #[doc = "System VCO Lock Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SVCOLCKT_A { +pub enum Svcolckt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SVCOLCKT_A) -> Self { + fn from(variant: Svcolckt) -> Self { variant as u8 != 0 } } -impl SVCOLCKT_R { +#[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Status"] +pub type SvcolcktR = crate::BitReader; +impl SvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SVCOLCKT_A { + pub const fn variant(&self) -> Svcolckt { match self.bits { - false => SVCOLCKT_A::VALUE1, - true => SVCOLCKT_A::VALUE2, + false => Svcolckt::Value1, + true => Svcolckt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SVCOLCKT_A::VALUE1 + *self == Svcolckt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SVCOLCKT_A::VALUE2 + *self == Svcolckt::Value2 } } -#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Status"] -pub type UVCOLCKT_R = crate::BitReader; #[doc = "USB VCO Lock Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UVCOLCKT_A { +pub enum Uvcolckt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UVCOLCKT_A) -> Self { + fn from(variant: Uvcolckt) -> Self { variant as u8 != 0 } } -impl UVCOLCKT_R { +#[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Status"] +pub type UvcolcktR = crate::BitReader; +impl UvcolcktR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UVCOLCKT_A { + pub const fn variant(&self) -> Uvcolckt { match self.bits { - false => UVCOLCKT_A::VALUE1, - true => UVCOLCKT_A::VALUE2, + false => Uvcolckt::Value1, + true => Uvcolckt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UVCOLCKT_A::VALUE1 + *self == Uvcolckt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UVCOLCKT_A::VALUE2 + *self == Uvcolckt::Value2 } } -#[doc = "Field `PET` reader - Parity Error Trap Status"] -pub type PET_R = crate::BitReader; #[doc = "Parity Error Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PET_A { +pub enum Pet { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PET_A) -> Self { + fn from(variant: Pet) -> Self { variant as u8 != 0 } } -impl PET_R { +#[doc = "Field `PET` reader - Parity Error Trap Status"] +pub type PetR = crate::BitReader; +impl PetR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PET_A { + pub const fn variant(&self) -> Pet { match self.bits { - false => PET_A::VALUE1, - true => PET_A::VALUE2, + false => Pet::Value1, + true => Pet::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PET_A::VALUE1 + *self == Pet::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PET_A::VALUE2 + *self == Pet::Value2 } } -#[doc = "Field `BRWNT` reader - Brown Out Trap Status"] -pub type BRWNT_R = crate::BitReader; #[doc = "Brown Out Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRWNT_A { +pub enum Brwnt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRWNT_A) -> Self { + fn from(variant: Brwnt) -> Self { variant as u8 != 0 } } -impl BRWNT_R { +#[doc = "Field `BRWNT` reader - Brown Out Trap Status"] +pub type BrwntR = crate::BitReader; +impl BrwntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRWNT_A { + pub const fn variant(&self) -> Brwnt { match self.bits { - false => BRWNT_A::VALUE1, - true => BRWNT_A::VALUE2, + false => Brwnt::Value1, + true => Brwnt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRWNT_A::VALUE1 + *self == Brwnt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRWNT_A::VALUE2 + *self == Brwnt::Value2 } } -#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Status"] -pub type ULPWDGT_R = crate::BitReader; #[doc = "OSC_ULP Oscillator Watchdog Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ULPWDGT_A { +pub enum Ulpwdgt { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ULPWDGT_A) -> Self { + fn from(variant: Ulpwdgt) -> Self { variant as u8 != 0 } } -impl ULPWDGT_R { +#[doc = "Field `ULPWDGT` reader - OSC_ULP Oscillator Watchdog Trap Status"] +pub type UlpwdgtR = crate::BitReader; +impl UlpwdgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ULPWDGT_A { + pub const fn variant(&self) -> Ulpwdgt { match self.bits { - false => ULPWDGT_A::VALUE1, - true => ULPWDGT_A::VALUE2, + false => Ulpwdgt::Value1, + true => Ulpwdgt::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ULPWDGT_A::VALUE1 + *self == Ulpwdgt::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ULPWDGT_A::VALUE2 + *self == Ulpwdgt::Value2 } } -#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Status"] -pub type BWERR0T_R = crate::BitReader; #[doc = "Peripheral Bridge 0 Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR0T_A { +pub enum Bwerr0t { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR0T_A) -> Self { + fn from(variant: Bwerr0t) -> Self { variant as u8 != 0 } } -impl BWERR0T_R { +#[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Status"] +pub type Bwerr0tR = crate::BitReader; +impl Bwerr0tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR0T_A { + pub const fn variant(&self) -> Bwerr0t { match self.bits { - false => BWERR0T_A::VALUE1, - true => BWERR0T_A::VALUE2, + false => Bwerr0t::Value1, + true => Bwerr0t::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR0T_A::VALUE1 + *self == Bwerr0t::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR0T_A::VALUE2 + *self == Bwerr0t::Value2 } } -#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Status"] -pub type BWERR1T_R = crate::BitReader; #[doc = "Peripheral Bridge 1 Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWERR1T_A { +pub enum Bwerr1t { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWERR1T_A) -> Self { + fn from(variant: Bwerr1t) -> Self { variant as u8 != 0 } } -impl BWERR1T_R { +#[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Status"] +pub type Bwerr1tR = crate::BitReader; +impl Bwerr1tR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWERR1T_A { + pub const fn variant(&self) -> Bwerr1t { match self.bits { - false => BWERR1T_A::VALUE1, - true => BWERR1T_A::VALUE2, + false => Bwerr1t::Value1, + true => Bwerr1t::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWERR1T_A::VALUE1 + *self == Bwerr1t::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWERR1T_A::VALUE2 + *self == Bwerr1t::Value2 } } -#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Status"] -pub type ECAT0RST_R = crate::BitReader; #[doc = "EtherCat Reset 0 Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ECAT0RST_A { +pub enum Ecat0rst { #[doc = "0: No pending trap request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Pending trap request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ECAT0RST_A) -> Self { + fn from(variant: Ecat0rst) -> Self { variant as u8 != 0 } } -impl ECAT0RST_R { +#[doc = "Field `ECAT0RST` reader - EtherCat Reset 0 Trap Status"] +pub type Ecat0rstR = crate::BitReader; +impl Ecat0rstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ECAT0RST_A { + pub const fn variant(&self) -> Ecat0rst { match self.bits { - false => ECAT0RST_A::VALUE1, - true => ECAT0RST_A::VALUE2, + false => Ecat0rst::Value1, + true => Ecat0rst::Value2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ECAT0RST_A::VALUE1 + *self == Ecat0rst::Value1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ECAT0RST_A::VALUE2 + *self == Ecat0rst::Value2 } } impl R { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Status"] #[inline(always)] - pub fn soscwdgt(&self) -> SOSCWDGT_R { - SOSCWDGT_R::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SoscwdgtR { + SoscwdgtR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Status"] #[inline(always)] - pub fn svcolckt(&self) -> SVCOLCKT_R { - SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SvcolcktR { + SvcolcktR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Status"] #[inline(always)] - pub fn uvcolckt(&self) -> UVCOLCKT_R { - UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UvcolcktR { + UvcolcktR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Status"] #[inline(always)] - pub fn pet(&self) -> PET_R { - PET_R::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PetR { + PetR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Status"] #[inline(always)] - pub fn brwnt(&self) -> BRWNT_R { - BRWNT_R::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BrwntR { + BrwntR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Status"] #[inline(always)] - pub fn ulpwdgt(&self) -> ULPWDGT_R { - ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> UlpwdgtR { + UlpwdgtR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Status"] #[inline(always)] - pub fn bwerr0t(&self) -> BWERR0T_R { - BWERR0T_R::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> Bwerr0tR { + Bwerr0tR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Status"] #[inline(always)] - pub fn bwerr1t(&self) -> BWERR1T_R { - BWERR1T_R::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> Bwerr1tR { + Bwerr1tR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 16 - EtherCat Reset 0 Trap Status"] #[inline(always)] - pub fn ecat0rst(&self) -> ECAT0RST_R { - ECAT0RST_R::new(((self.bits >> 16) & 1) != 0) + pub fn ecat0rst(&self) -> Ecat0rstR { + Ecat0rstR::new(((self.bits >> 16) & 1) != 0) } } #[doc = "Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRAPSTAT_SPEC; -impl crate::RegisterSpec for TRAPSTAT_SPEC { +pub struct TrapstatSpec; +impl crate::RegisterSpec for TrapstatSpec { type Ux = u32; } #[doc = "`read()` method returns [`trapstat::R`](R) reader structure"] -impl crate::Readable for TRAPSTAT_SPEC {} +impl crate::Readable for TrapstatSpec {} #[doc = "`reset()` method sets TRAPSTAT to value 0"] -impl crate::Resettable for TRAPSTAT_SPEC { +impl crate::Resettable for TrapstatSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc.rs b/src/sdmmc.rs index d5c6f84e..b21507e5 100644 --- a/src/sdmmc.rs +++ b/src/sdmmc.rs @@ -1,363 +1,395 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], - block_size: BLOCK_SIZE, - block_count: BLOCK_COUNT, - argument1: ARGUMENT1, - transfer_mode: TRANSFER_MODE, - command: COMMAND, - response0: RESPONSE0, - response2: RESPONSE2, - response4: RESPONSE4, - response6: RESPONSE6, - data_buffer: DATA_BUFFER, - present_state: PRESENT_STATE, - host_ctrl: HOST_CTRL, - power_ctrl: POWER_CTRL, - block_gap_ctrl: BLOCK_GAP_CTRL, - wakeup_ctrl: WAKEUP_CTRL, - clock_ctrl: CLOCK_CTRL, - timeout_ctrl: TIMEOUT_CTRL, - sw_reset: SW_RESET, - int_status_norm: INT_STATUS_NORM, - int_status_err: INT_STATUS_ERR, - en_int_status_norm: EN_INT_STATUS_NORM, - en_int_status_err: EN_INT_STATUS_ERR, - en_int_signal_norm: EN_INT_SIGNAL_NORM, - en_int_signal_err: EN_INT_SIGNAL_ERR, - acmd_err_status: ACMD_ERR_STATUS, + block_size: BlockSize, + block_count: BlockCount, + argument1: Argument1, + transfer_mode: TransferMode, + command: Command, + response0: Response0, + response2: Response2, + response4: Response4, + response6: Response6, + data_buffer: DataBuffer, + present_state: PresentState, + host_ctrl: HostCtrl, + power_ctrl: PowerCtrl, + block_gap_ctrl: BlockGapCtrl, + wakeup_ctrl: WakeupCtrl, + clock_ctrl: ClockCtrl, + timeout_ctrl: TimeoutCtrl, + sw_reset: SwReset, + int_status_norm: IntStatusNorm, + int_status_err: IntStatusErr, + en_int_status_norm: EnIntStatusNorm, + en_int_status_err: EnIntStatusErr, + en_int_signal_norm: EnIntSignalNorm, + en_int_signal_err: EnIntSignalErr, + acmd_err_status: AcmdErrStatus, _reserved25: [u8; 0x02], - capabilities: CAPABILITIES, - capabilities_hi: CAPABILITIES_HI, - max_current_cap: MAX_CURRENT_CAP, + capabilities: Capabilities, + capabilities_hi: CapabilitiesHi, + max_current_cap: MaxCurrentCap, _reserved28: [u8; 0x04], - force_event_acmd_err_status: FORCE_EVENT_ACMD_ERR_STATUS, - force_event_err_status: FORCE_EVENT_ERR_STATUS, + force_event_acmd_err_status: ForceEventAcmdErrStatus, + force_event_err_status: ForceEventErrStatus, _reserved30: [u8; 0x20], - debug_sel: DEBUG_SEL, + debug_sel: DebugSel, _reserved31: [u8; 0x84], - slot_int_status: SLOT_INT_STATUS, + slot_int_status: SlotIntStatus, } impl RegisterBlock { #[doc = "0x04 - Block Size Register"] #[inline(always)] - pub const fn block_size(&self) -> &BLOCK_SIZE { + pub const fn block_size(&self) -> &BlockSize { &self.block_size } #[doc = "0x06 - Block Count Register"] #[inline(always)] - pub const fn block_count(&self) -> &BLOCK_COUNT { + pub const fn block_count(&self) -> &BlockCount { &self.block_count } #[doc = "0x08 - Argument1 Register"] #[inline(always)] - pub const fn argument1(&self) -> &ARGUMENT1 { + pub const fn argument1(&self) -> &Argument1 { &self.argument1 } #[doc = "0x0c - Transfer Mode Register"] #[inline(always)] - pub const fn transfer_mode(&self) -> &TRANSFER_MODE { + pub const fn transfer_mode(&self) -> &TransferMode { &self.transfer_mode } #[doc = "0x0e - Command Register"] #[inline(always)] - pub const fn command(&self) -> &COMMAND { + pub const fn command(&self) -> &Command { &self.command } #[doc = "0x10 - Response 0 Register"] #[inline(always)] - pub const fn response0(&self) -> &RESPONSE0 { + pub const fn response0(&self) -> &Response0 { &self.response0 } #[doc = "0x14 - Response 2 Register"] #[inline(always)] - pub const fn response2(&self) -> &RESPONSE2 { + pub const fn response2(&self) -> &Response2 { &self.response2 } #[doc = "0x18 - Response 4 Register"] #[inline(always)] - pub const fn response4(&self) -> &RESPONSE4 { + pub const fn response4(&self) -> &Response4 { &self.response4 } #[doc = "0x1c - Response 6 Register"] #[inline(always)] - pub const fn response6(&self) -> &RESPONSE6 { + pub const fn response6(&self) -> &Response6 { &self.response6 } #[doc = "0x20 - Data Buffer Register"] #[inline(always)] - pub const fn data_buffer(&self) -> &DATA_BUFFER { + pub const fn data_buffer(&self) -> &DataBuffer { &self.data_buffer } #[doc = "0x24 - Present State Register"] #[inline(always)] - pub const fn present_state(&self) -> &PRESENT_STATE { + pub const fn present_state(&self) -> &PresentState { &self.present_state } #[doc = "0x28 - Host Control Register"] #[inline(always)] - pub const fn host_ctrl(&self) -> &HOST_CTRL { + pub const fn host_ctrl(&self) -> &HostCtrl { &self.host_ctrl } #[doc = "0x29 - Power Control Register"] #[inline(always)] - pub const fn power_ctrl(&self) -> &POWER_CTRL { + pub const fn power_ctrl(&self) -> &PowerCtrl { &self.power_ctrl } #[doc = "0x2a - Block Gap Control Register"] #[inline(always)] - pub const fn block_gap_ctrl(&self) -> &BLOCK_GAP_CTRL { + pub const fn block_gap_ctrl(&self) -> &BlockGapCtrl { &self.block_gap_ctrl } #[doc = "0x2b - Wake-up Control Register"] #[inline(always)] - pub const fn wakeup_ctrl(&self) -> &WAKEUP_CTRL { + pub const fn wakeup_ctrl(&self) -> &WakeupCtrl { &self.wakeup_ctrl } #[doc = "0x2c - Clock Control Register"] #[inline(always)] - pub const fn clock_ctrl(&self) -> &CLOCK_CTRL { + pub const fn clock_ctrl(&self) -> &ClockCtrl { &self.clock_ctrl } #[doc = "0x2e - Timeout Control Register"] #[inline(always)] - pub const fn timeout_ctrl(&self) -> &TIMEOUT_CTRL { + pub const fn timeout_ctrl(&self) -> &TimeoutCtrl { &self.timeout_ctrl } #[doc = "0x2f - Software Reset Register"] #[inline(always)] - pub const fn sw_reset(&self) -> &SW_RESET { + pub const fn sw_reset(&self) -> &SwReset { &self.sw_reset } #[doc = "0x30 - Normal Interrupt Status Register"] #[inline(always)] - pub const fn int_status_norm(&self) -> &INT_STATUS_NORM { + pub const fn int_status_norm(&self) -> &IntStatusNorm { &self.int_status_norm } #[doc = "0x32 - Error Interrupt Status Register"] #[inline(always)] - pub const fn int_status_err(&self) -> &INT_STATUS_ERR { + pub const fn int_status_err(&self) -> &IntStatusErr { &self.int_status_err } #[doc = "0x34 - Normal Interrupt Status Enable Register"] #[inline(always)] - pub const fn en_int_status_norm(&self) -> &EN_INT_STATUS_NORM { + pub const fn en_int_status_norm(&self) -> &EnIntStatusNorm { &self.en_int_status_norm } #[doc = "0x36 - Error Interrupt Status Enable Register"] #[inline(always)] - pub const fn en_int_status_err(&self) -> &EN_INT_STATUS_ERR { + pub const fn en_int_status_err(&self) -> &EnIntStatusErr { &self.en_int_status_err } #[doc = "0x38 - Normal Interrupt Signal Enable Register"] #[inline(always)] - pub const fn en_int_signal_norm(&self) -> &EN_INT_SIGNAL_NORM { + pub const fn en_int_signal_norm(&self) -> &EnIntSignalNorm { &self.en_int_signal_norm } #[doc = "0x3a - Error Interrupt Signal Enable Register"] #[inline(always)] - pub const fn en_int_signal_err(&self) -> &EN_INT_SIGNAL_ERR { + pub const fn en_int_signal_err(&self) -> &EnIntSignalErr { &self.en_int_signal_err } #[doc = "0x3c - Auto CMD Error Status Register"] #[inline(always)] - pub const fn acmd_err_status(&self) -> &ACMD_ERR_STATUS { + pub const fn acmd_err_status(&self) -> &AcmdErrStatus { &self.acmd_err_status } #[doc = "0x40 - Capabilities Register"] #[inline(always)] - pub const fn capabilities(&self) -> &CAPABILITIES { + pub const fn capabilities(&self) -> &Capabilities { &self.capabilities } #[doc = "0x44 - Capabilities Register High"] #[inline(always)] - pub const fn capabilities_hi(&self) -> &CAPABILITIES_HI { + pub const fn capabilities_hi(&self) -> &CapabilitiesHi { &self.capabilities_hi } #[doc = "0x48 - Maximum Current Capabilities Register"] #[inline(always)] - pub const fn max_current_cap(&self) -> &MAX_CURRENT_CAP { + pub const fn max_current_cap(&self) -> &MaxCurrentCap { &self.max_current_cap } #[doc = "0x50 - Force Event Register for Auto CMD Error Status"] #[inline(always)] - pub const fn force_event_acmd_err_status(&self) -> &FORCE_EVENT_ACMD_ERR_STATUS { + pub const fn force_event_acmd_err_status(&self) -> &ForceEventAcmdErrStatus { &self.force_event_acmd_err_status } #[doc = "0x52 - Force Event Register for Error Interrupt Status"] #[inline(always)] - pub const fn force_event_err_status(&self) -> &FORCE_EVENT_ERR_STATUS { + pub const fn force_event_err_status(&self) -> &ForceEventErrStatus { &self.force_event_err_status } #[doc = "0x74 - Debug Selection Register"] #[inline(always)] - pub const fn debug_sel(&self) -> &DEBUG_SEL { + pub const fn debug_sel(&self) -> &DebugSel { &self.debug_sel } #[doc = "0xfc - Slot Interrupt Status Register"] #[inline(always)] - pub const fn slot_int_status(&self) -> &SLOT_INT_STATUS { + pub const fn slot_int_status(&self) -> &SlotIntStatus { &self.slot_int_status } } #[doc = "BLOCK_SIZE (rw) register accessor: Block Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_size::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_size::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@block_size`] module"] -pub type BLOCK_SIZE = crate::Reg; +#[doc(alias = "BLOCK_SIZE")] +pub type BlockSize = crate::Reg; #[doc = "Block Size Register"] pub mod block_size; #[doc = "BLOCK_COUNT (rw) register accessor: Block Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_count::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_count::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@block_count`] module"] -pub type BLOCK_COUNT = crate::Reg; +#[doc(alias = "BLOCK_COUNT")] +pub type BlockCount = crate::Reg; #[doc = "Block Count Register"] pub mod block_count; #[doc = "ARGUMENT1 (rw) register accessor: Argument1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`argument1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`argument1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@argument1`] module"] -pub type ARGUMENT1 = crate::Reg; +#[doc(alias = "ARGUMENT1")] +pub type Argument1 = crate::Reg; #[doc = "Argument1 Register"] pub mod argument1; #[doc = "TRANSFER_MODE (rw) register accessor: Transfer Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transfer_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transfer_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@transfer_mode`] module"] -pub type TRANSFER_MODE = crate::Reg; +#[doc(alias = "TRANSFER_MODE")] +pub type TransferMode = crate::Reg; #[doc = "Transfer Mode Register"] pub mod transfer_mode; #[doc = "COMMAND (rw) register accessor: Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`command::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`command::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@command`] module"] -pub type COMMAND = crate::Reg; +#[doc(alias = "COMMAND")] +pub type Command = crate::Reg; #[doc = "Command Register"] pub mod command; #[doc = "RESPONSE0 (r) register accessor: Response 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@response0`] module"] -pub type RESPONSE0 = crate::Reg; +#[doc(alias = "RESPONSE0")] +pub type Response0 = crate::Reg; #[doc = "Response 0 Register"] pub mod response0; #[doc = "RESPONSE2 (r) register accessor: Response 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@response2`] module"] -pub type RESPONSE2 = crate::Reg; +#[doc(alias = "RESPONSE2")] +pub type Response2 = crate::Reg; #[doc = "Response 2 Register"] pub mod response2; #[doc = "RESPONSE4 (r) register accessor: Response 4 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@response4`] module"] -pub type RESPONSE4 = crate::Reg; +#[doc(alias = "RESPONSE4")] +pub type Response4 = crate::Reg; #[doc = "Response 4 Register"] pub mod response4; #[doc = "RESPONSE6 (r) register accessor: Response 6 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@response6`] module"] -pub type RESPONSE6 = crate::Reg; +#[doc(alias = "RESPONSE6")] +pub type Response6 = crate::Reg; #[doc = "Response 6 Register"] pub mod response6; #[doc = "DATA_BUFFER (rw) register accessor: Data Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data_buffer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data_buffer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data_buffer`] module"] -pub type DATA_BUFFER = crate::Reg; +#[doc(alias = "DATA_BUFFER")] +pub type DataBuffer = crate::Reg; #[doc = "Data Buffer Register"] pub mod data_buffer; #[doc = "PRESENT_STATE (r) register accessor: Present State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`present_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@present_state`] module"] -pub type PRESENT_STATE = crate::Reg; +#[doc(alias = "PRESENT_STATE")] +pub type PresentState = crate::Reg; #[doc = "Present State Register"] pub mod present_state; #[doc = "HOST_CTRL (rw) register accessor: Host Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`host_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`host_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@host_ctrl`] module"] -pub type HOST_CTRL = crate::Reg; +#[doc(alias = "HOST_CTRL")] +pub type HostCtrl = crate::Reg; #[doc = "Host Control Register"] pub mod host_ctrl; #[doc = "POWER_CTRL (rw) register accessor: Power Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`power_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`power_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@power_ctrl`] module"] -pub type POWER_CTRL = crate::Reg; +#[doc(alias = "POWER_CTRL")] +pub type PowerCtrl = crate::Reg; #[doc = "Power Control Register"] pub mod power_ctrl; #[doc = "BLOCK_GAP_CTRL (rw) register accessor: Block Gap Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_gap_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_gap_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@block_gap_ctrl`] module"] -pub type BLOCK_GAP_CTRL = crate::Reg; +#[doc(alias = "BLOCK_GAP_CTRL")] +pub type BlockGapCtrl = crate::Reg; #[doc = "Block Gap Control Register"] pub mod block_gap_ctrl; #[doc = "WAKEUP_CTRL (rw) register accessor: Wake-up Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wakeup_ctrl`] module"] -pub type WAKEUP_CTRL = crate::Reg; +#[doc(alias = "WAKEUP_CTRL")] +pub type WakeupCtrl = crate::Reg; #[doc = "Wake-up Control Register"] pub mod wakeup_ctrl; #[doc = "CLOCK_CTRL (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_ctrl`] module"] -pub type CLOCK_CTRL = crate::Reg; +#[doc(alias = "CLOCK_CTRL")] +pub type ClockCtrl = crate::Reg; #[doc = "Clock Control Register"] pub mod clock_ctrl; #[doc = "TIMEOUT_CTRL (rw) register accessor: Timeout Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timeout_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timeout_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timeout_ctrl`] module"] -pub type TIMEOUT_CTRL = crate::Reg; +#[doc(alias = "TIMEOUT_CTRL")] +pub type TimeoutCtrl = crate::Reg; #[doc = "Timeout Control Register"] pub mod timeout_ctrl; #[doc = "SW_RESET (rw) register accessor: Software Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sw_reset`] module"] -pub type SW_RESET = crate::Reg; +#[doc(alias = "SW_RESET")] +pub type SwReset = crate::Reg; #[doc = "Software Reset Register"] pub mod sw_reset; #[doc = "INT_STATUS_NORM (rw) register accessor: Normal Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_status_norm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_status_norm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_status_norm`] module"] -pub type INT_STATUS_NORM = crate::Reg; +#[doc(alias = "INT_STATUS_NORM")] +pub type IntStatusNorm = crate::Reg; #[doc = "Normal Interrupt Status Register"] pub mod int_status_norm; #[doc = "INT_STATUS_ERR (rw) register accessor: Error Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_status_err::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_status_err::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_status_err`] module"] -pub type INT_STATUS_ERR = crate::Reg; +#[doc(alias = "INT_STATUS_ERR")] +pub type IntStatusErr = crate::Reg; #[doc = "Error Interrupt Status Register"] pub mod int_status_err; #[doc = "EN_INT_STATUS_NORM (rw) register accessor: Normal Interrupt Status Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_status_norm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_status_norm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en_int_status_norm`] module"] -pub type EN_INT_STATUS_NORM = crate::Reg; +#[doc(alias = "EN_INT_STATUS_NORM")] +pub type EnIntStatusNorm = crate::Reg; #[doc = "Normal Interrupt Status Enable Register"] pub mod en_int_status_norm; #[doc = "EN_INT_STATUS_ERR (rw) register accessor: Error Interrupt Status Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_status_err::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_status_err::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en_int_status_err`] module"] -pub type EN_INT_STATUS_ERR = crate::Reg; +#[doc(alias = "EN_INT_STATUS_ERR")] +pub type EnIntStatusErr = crate::Reg; #[doc = "Error Interrupt Status Enable Register"] pub mod en_int_status_err; #[doc = "EN_INT_SIGNAL_NORM (rw) register accessor: Normal Interrupt Signal Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_signal_norm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_signal_norm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en_int_signal_norm`] module"] -pub type EN_INT_SIGNAL_NORM = crate::Reg; +#[doc(alias = "EN_INT_SIGNAL_NORM")] +pub type EnIntSignalNorm = crate::Reg; #[doc = "Normal Interrupt Signal Enable Register"] pub mod en_int_signal_norm; #[doc = "EN_INT_SIGNAL_ERR (rw) register accessor: Error Interrupt Signal Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_signal_err::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_signal_err::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@en_int_signal_err`] module"] -pub type EN_INT_SIGNAL_ERR = crate::Reg; +#[doc(alias = "EN_INT_SIGNAL_ERR")] +pub type EnIntSignalErr = crate::Reg; #[doc = "Error Interrupt Signal Enable Register"] pub mod en_int_signal_err; #[doc = "ACMD_ERR_STATUS (r) register accessor: Auto CMD Error Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`acmd_err_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@acmd_err_status`] module"] -pub type ACMD_ERR_STATUS = crate::Reg; +#[doc(alias = "ACMD_ERR_STATUS")] +pub type AcmdErrStatus = crate::Reg; #[doc = "Auto CMD Error Status Register"] pub mod acmd_err_status; #[doc = "CAPABILITIES (r) register accessor: Capabilities Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`capabilities::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@capabilities`] module"] -pub type CAPABILITIES = crate::Reg; +#[doc(alias = "CAPABILITIES")] +pub type Capabilities = crate::Reg; #[doc = "Capabilities Register"] pub mod capabilities; #[doc = "CAPABILITIES_HI (r) register accessor: Capabilities Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`capabilities_hi::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@capabilities_hi`] module"] -pub type CAPABILITIES_HI = crate::Reg; +#[doc(alias = "CAPABILITIES_HI")] +pub type CapabilitiesHi = crate::Reg; #[doc = "Capabilities Register High"] pub mod capabilities_hi; #[doc = "MAX_CURRENT_CAP (r) register accessor: Maximum Current Capabilities Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`max_current_cap::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@max_current_cap`] module"] -pub type MAX_CURRENT_CAP = crate::Reg; +#[doc(alias = "MAX_CURRENT_CAP")] +pub type MaxCurrentCap = crate::Reg; #[doc = "Maximum Current Capabilities Register"] pub mod max_current_cap; #[doc = "FORCE_EVENT_ACMD_ERR_STATUS (w) register accessor: Force Event Register for Auto CMD Error Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`force_event_acmd_err_status::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@force_event_acmd_err_status`] module"] -pub type FORCE_EVENT_ACMD_ERR_STATUS = crate::Reg; +#[doc(alias = "FORCE_EVENT_ACMD_ERR_STATUS")] +pub type ForceEventAcmdErrStatus = crate::Reg; #[doc = "Force Event Register for Auto CMD Error Status"] pub mod force_event_acmd_err_status; #[doc = "FORCE_EVENT_ERR_STATUS (w) register accessor: Force Event Register for Error Interrupt Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`force_event_err_status::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@force_event_err_status`] module"] -pub type FORCE_EVENT_ERR_STATUS = crate::Reg; +#[doc(alias = "FORCE_EVENT_ERR_STATUS")] +pub type ForceEventErrStatus = crate::Reg; #[doc = "Force Event Register for Error Interrupt Status"] pub mod force_event_err_status; #[doc = "DEBUG_SEL (w) register accessor: Debug Selection Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_sel::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@debug_sel`] module"] -pub type DEBUG_SEL = crate::Reg; +#[doc(alias = "DEBUG_SEL")] +pub type DebugSel = crate::Reg; #[doc = "Debug Selection Register"] pub mod debug_sel; #[doc = "SLOT_INT_STATUS (r) register accessor: Slot Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slot_int_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slot_int_status`] module"] -pub type SLOT_INT_STATUS = crate::Reg; +#[doc(alias = "SLOT_INT_STATUS")] +pub type SlotIntStatus = crate::Reg; #[doc = "Slot Interrupt Status Register"] pub mod slot_int_status; diff --git a/src/sdmmc/acmd_err_status.rs b/src/sdmmc/acmd_err_status.rs index 36114b31..e751b0f8 100644 --- a/src/sdmmc/acmd_err_status.rs +++ b/src/sdmmc/acmd_err_status.rs @@ -1,261 +1,261 @@ #[doc = "Register `ACMD_ERR_STATUS` reader"] -pub type R = crate::R; -#[doc = "Field `ACMD12_NOT_EXEC_ERR` reader - Auto CMD12 Not Executed"] -pub type ACMD12_NOT_EXEC_ERR_R = crate::BitReader; +pub type R = crate::R; #[doc = "Auto CMD12 Not Executed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD12_NOT_EXEC_ERR_A { +pub enum Acmd12NotExecErr { #[doc = "0: Executed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not Executed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD12_NOT_EXEC_ERR_A) -> Self { + fn from(variant: Acmd12NotExecErr) -> Self { variant as u8 != 0 } } -impl ACMD12_NOT_EXEC_ERR_R { +#[doc = "Field `ACMD12_NOT_EXEC_ERR` reader - Auto CMD12 Not Executed"] +pub type Acmd12NotExecErrR = crate::BitReader; +impl Acmd12NotExecErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD12_NOT_EXEC_ERR_A { + pub const fn variant(&self) -> Acmd12NotExecErr { match self.bits { - false => ACMD12_NOT_EXEC_ERR_A::VALUE1, - true => ACMD12_NOT_EXEC_ERR_A::VALUE2, + false => Acmd12NotExecErr::Value1, + true => Acmd12NotExecErr::Value2, } } #[doc = "Executed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD12_NOT_EXEC_ERR_A::VALUE1 + *self == Acmd12NotExecErr::Value1 } #[doc = "Not Executed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD12_NOT_EXEC_ERR_A::VALUE2 + *self == Acmd12NotExecErr::Value2 } } -#[doc = "Field `ACMD_TIMEOUT_ERR` reader - Auto CMD Timeout Error"] -pub type ACMD_TIMEOUT_ERR_R = crate::BitReader; #[doc = "Auto CMD Timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_TIMEOUT_ERR_A { +pub enum AcmdTimeoutErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timeout"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_TIMEOUT_ERR_A) -> Self { + fn from(variant: AcmdTimeoutErr) -> Self { variant as u8 != 0 } } -impl ACMD_TIMEOUT_ERR_R { +#[doc = "Field `ACMD_TIMEOUT_ERR` reader - Auto CMD Timeout Error"] +pub type AcmdTimeoutErrR = crate::BitReader; +impl AcmdTimeoutErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_TIMEOUT_ERR_A { + pub const fn variant(&self) -> AcmdTimeoutErr { match self.bits { - false => ACMD_TIMEOUT_ERR_A::VALUE1, - true => ACMD_TIMEOUT_ERR_A::VALUE2, + false => AcmdTimeoutErr::Value1, + true => AcmdTimeoutErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_TIMEOUT_ERR_A::VALUE1 + *self == AcmdTimeoutErr::Value1 } #[doc = "Timeout"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_TIMEOUT_ERR_A::VALUE2 + *self == AcmdTimeoutErr::Value2 } } -#[doc = "Field `ACMD_CRC_ERR` reader - Auto CMD CRC Error"] -pub type ACMD_CRC_ERR_R = crate::BitReader; #[doc = "Auto CMD CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_CRC_ERR_A { +pub enum AcmdCrcErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CRC Error Generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_CRC_ERR_A) -> Self { + fn from(variant: AcmdCrcErr) -> Self { variant as u8 != 0 } } -impl ACMD_CRC_ERR_R { +#[doc = "Field `ACMD_CRC_ERR` reader - Auto CMD CRC Error"] +pub type AcmdCrcErrR = crate::BitReader; +impl AcmdCrcErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_CRC_ERR_A { + pub const fn variant(&self) -> AcmdCrcErr { match self.bits { - false => ACMD_CRC_ERR_A::VALUE1, - true => ACMD_CRC_ERR_A::VALUE2, + false => AcmdCrcErr::Value1, + true => AcmdCrcErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_CRC_ERR_A::VALUE1 + *self == AcmdCrcErr::Value1 } #[doc = "CRC Error Generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_CRC_ERR_A::VALUE2 + *self == AcmdCrcErr::Value2 } } -#[doc = "Field `ACMD_END_BIT_ERR` reader - Auto CMD End Bit Error"] -pub type ACMD_END_BIT_ERR_R = crate::BitReader; #[doc = "Auto CMD End Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_END_BIT_ERR_A { +pub enum AcmdEndBitErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: End Bit Error Generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_END_BIT_ERR_A) -> Self { + fn from(variant: AcmdEndBitErr) -> Self { variant as u8 != 0 } } -impl ACMD_END_BIT_ERR_R { +#[doc = "Field `ACMD_END_BIT_ERR` reader - Auto CMD End Bit Error"] +pub type AcmdEndBitErrR = crate::BitReader; +impl AcmdEndBitErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_END_BIT_ERR_A { + pub const fn variant(&self) -> AcmdEndBitErr { match self.bits { - false => ACMD_END_BIT_ERR_A::VALUE1, - true => ACMD_END_BIT_ERR_A::VALUE2, + false => AcmdEndBitErr::Value1, + true => AcmdEndBitErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_END_BIT_ERR_A::VALUE1 + *self == AcmdEndBitErr::Value1 } #[doc = "End Bit Error Generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_END_BIT_ERR_A::VALUE2 + *self == AcmdEndBitErr::Value2 } } -#[doc = "Field `ACMD_IND_ERR` reader - Auto CMD Index Error"] -pub type ACMD_IND_ERR_R = crate::BitReader; #[doc = "Auto CMD Index Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_IND_ERR_A { +pub enum AcmdIndErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_IND_ERR_A) -> Self { + fn from(variant: AcmdIndErr) -> Self { variant as u8 != 0 } } -impl ACMD_IND_ERR_R { +#[doc = "Field `ACMD_IND_ERR` reader - Auto CMD Index Error"] +pub type AcmdIndErrR = crate::BitReader; +impl AcmdIndErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_IND_ERR_A { + pub const fn variant(&self) -> AcmdIndErr { match self.bits { - false => ACMD_IND_ERR_A::VALUE1, - true => ACMD_IND_ERR_A::VALUE2, + false => AcmdIndErr::Value1, + true => AcmdIndErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_IND_ERR_A::VALUE1 + *self == AcmdIndErr::Value1 } #[doc = "Error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_IND_ERR_A::VALUE2 + *self == AcmdIndErr::Value2 } } -#[doc = "Field `CMD_NOT_ISSUED_BY_ACMD12_ERR` reader - Command Not Issued By Auto CMD12 Error"] -pub type CMD_NOT_ISSUED_BY_ACMD12_ERR_R = crate::BitReader; #[doc = "Command Not Issued By Auto CMD12 Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_NOT_ISSUED_BY_ACMD12_ERR_A { +pub enum CmdNotIssuedByAcmd12Err { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Not Issued"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_NOT_ISSUED_BY_ACMD12_ERR_A) -> Self { + fn from(variant: CmdNotIssuedByAcmd12Err) -> Self { variant as u8 != 0 } } -impl CMD_NOT_ISSUED_BY_ACMD12_ERR_R { +#[doc = "Field `CMD_NOT_ISSUED_BY_ACMD12_ERR` reader - Command Not Issued By Auto CMD12 Error"] +pub type CmdNotIssuedByAcmd12ErrR = crate::BitReader; +impl CmdNotIssuedByAcmd12ErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_NOT_ISSUED_BY_ACMD12_ERR_A { + pub const fn variant(&self) -> CmdNotIssuedByAcmd12Err { match self.bits { - false => CMD_NOT_ISSUED_BY_ACMD12_ERR_A::VALUE1, - true => CMD_NOT_ISSUED_BY_ACMD12_ERR_A::VALUE2, + false => CmdNotIssuedByAcmd12Err::Value1, + true => CmdNotIssuedByAcmd12Err::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_NOT_ISSUED_BY_ACMD12_ERR_A::VALUE1 + *self == CmdNotIssuedByAcmd12Err::Value1 } #[doc = "Not Issued"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_NOT_ISSUED_BY_ACMD12_ERR_A::VALUE2 + *self == CmdNotIssuedByAcmd12Err::Value2 } } impl R { #[doc = "Bit 0 - Auto CMD12 Not Executed"] #[inline(always)] - pub fn acmd12_not_exec_err(&self) -> ACMD12_NOT_EXEC_ERR_R { - ACMD12_NOT_EXEC_ERR_R::new((self.bits & 1) != 0) + pub fn acmd12_not_exec_err(&self) -> Acmd12NotExecErrR { + Acmd12NotExecErrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Auto CMD Timeout Error"] #[inline(always)] - pub fn acmd_timeout_err(&self) -> ACMD_TIMEOUT_ERR_R { - ACMD_TIMEOUT_ERR_R::new(((self.bits >> 1) & 1) != 0) + pub fn acmd_timeout_err(&self) -> AcmdTimeoutErrR { + AcmdTimeoutErrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Auto CMD CRC Error"] #[inline(always)] - pub fn acmd_crc_err(&self) -> ACMD_CRC_ERR_R { - ACMD_CRC_ERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn acmd_crc_err(&self) -> AcmdCrcErrR { + AcmdCrcErrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Auto CMD End Bit Error"] #[inline(always)] - pub fn acmd_end_bit_err(&self) -> ACMD_END_BIT_ERR_R { - ACMD_END_BIT_ERR_R::new(((self.bits >> 3) & 1) != 0) + pub fn acmd_end_bit_err(&self) -> AcmdEndBitErrR { + AcmdEndBitErrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Auto CMD Index Error"] #[inline(always)] - pub fn acmd_ind_err(&self) -> ACMD_IND_ERR_R { - ACMD_IND_ERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn acmd_ind_err(&self) -> AcmdIndErrR { + AcmdIndErrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 7 - Command Not Issued By Auto CMD12 Error"] #[inline(always)] - pub fn cmd_not_issued_by_acmd12_err(&self) -> CMD_NOT_ISSUED_BY_ACMD12_ERR_R { - CMD_NOT_ISSUED_BY_ACMD12_ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn cmd_not_issued_by_acmd12_err(&self) -> CmdNotIssuedByAcmd12ErrR { + CmdNotIssuedByAcmd12ErrR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Auto CMD Error Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`acmd_err_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ACMD_ERR_STATUS_SPEC; -impl crate::RegisterSpec for ACMD_ERR_STATUS_SPEC { +pub struct AcmdErrStatusSpec; +impl crate::RegisterSpec for AcmdErrStatusSpec { type Ux = u16; } #[doc = "`read()` method returns [`acmd_err_status::R`](R) reader structure"] -impl crate::Readable for ACMD_ERR_STATUS_SPEC {} +impl crate::Readable for AcmdErrStatusSpec {} #[doc = "`reset()` method sets ACMD_ERR_STATUS to value 0"] -impl crate::Resettable for ACMD_ERR_STATUS_SPEC { +impl crate::Resettable for AcmdErrStatusSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/argument1.rs b/src/sdmmc/argument1.rs index 79186c6d..0efb5d70 100644 --- a/src/sdmmc/argument1.rs +++ b/src/sdmmc/argument1.rs @@ -1,49 +1,40 @@ #[doc = "Register `ARGUMENT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ARGUMENT1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ARGUMENT1` reader - Command Argument"] -pub type ARGUMENT1_R = crate::FieldReader; +pub type Argument1R = crate::FieldReader; #[doc = "Field `ARGUMENT1` writer - Command Argument"] -pub type ARGUMENT1_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type Argument1W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Command Argument"] #[inline(always)] - pub fn argument1(&self) -> ARGUMENT1_R { - ARGUMENT1_R::new(self.bits) + pub fn argument1(&self) -> Argument1R { + Argument1R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Command Argument"] #[inline(always)] #[must_use] - pub fn argument1(&mut self) -> ARGUMENT1_W { - ARGUMENT1_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn argument1(&mut self) -> Argument1W { + Argument1W::new(self, 0) } } #[doc = "Argument1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`argument1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`argument1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ARGUMENT1_SPEC; -impl crate::RegisterSpec for ARGUMENT1_SPEC { +pub struct Argument1Spec; +impl crate::RegisterSpec for Argument1Spec { type Ux = u32; } #[doc = "`read()` method returns [`argument1::R`](R) reader structure"] -impl crate::Readable for ARGUMENT1_SPEC {} +impl crate::Readable for Argument1Spec {} #[doc = "`write(|w| ..)` method takes [`argument1::W`](W) writer structure"] -impl crate::Writable for ARGUMENT1_SPEC { +impl crate::Writable for Argument1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ARGUMENT1 to value 0"] -impl crate::Resettable for ARGUMENT1_SPEC { +impl crate::Resettable for Argument1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/block_count.rs b/src/sdmmc/block_count.rs index b1a50e40..60b8deca 100644 --- a/src/sdmmc/block_count.rs +++ b/src/sdmmc/block_count.rs @@ -1,49 +1,40 @@ #[doc = "Register `BLOCK_COUNT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BLOCK_COUNT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_COUNT` reader - Blocks Count for Current Transfer"] -pub type BLOCK_COUNT_R = crate::FieldReader; +pub type BlockCountR = crate::FieldReader; #[doc = "Field `BLOCK_COUNT` writer - Blocks Count for Current Transfer"] -pub type BLOCK_COUNT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type BlockCountW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Blocks Count for Current Transfer"] #[inline(always)] - pub fn block_count(&self) -> BLOCK_COUNT_R { - BLOCK_COUNT_R::new(self.bits) + pub fn block_count(&self) -> BlockCountR { + BlockCountR::new(self.bits) } } impl W { #[doc = "Bits 0:15 - Blocks Count for Current Transfer"] #[inline(always)] #[must_use] - pub fn block_count(&mut self) -> BLOCK_COUNT_W { - BLOCK_COUNT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn block_count(&mut self) -> BlockCountW { + BlockCountW::new(self, 0) } } #[doc = "Block Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_count::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_count::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BLOCK_COUNT_SPEC; -impl crate::RegisterSpec for BLOCK_COUNT_SPEC { +pub struct BlockCountSpec; +impl crate::RegisterSpec for BlockCountSpec { type Ux = u16; } #[doc = "`read()` method returns [`block_count::R`](R) reader structure"] -impl crate::Readable for BLOCK_COUNT_SPEC {} +impl crate::Readable for BlockCountSpec {} #[doc = "`write(|w| ..)` method takes [`block_count::W`](W) writer structure"] -impl crate::Writable for BLOCK_COUNT_SPEC { +impl crate::Writable for BlockCountSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets BLOCK_COUNT to value 0"] -impl crate::Resettable for BLOCK_COUNT_SPEC { +impl crate::Resettable for BlockCountSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/block_gap_ctrl.rs b/src/sdmmc/block_gap_ctrl.rs index 5ac294fb..c6090a49 100644 --- a/src/sdmmc/block_gap_ctrl.rs +++ b/src/sdmmc/block_gap_ctrl.rs @@ -1,241 +1,232 @@ #[doc = "Register `BLOCK_GAP_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BLOCK_GAP_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `STOP_AT_BLOCK_GAP` reader - Stop At Block Gap Request"] -pub type STOP_AT_BLOCK_GAP_R = crate::BitReader; +pub type W = crate::W; #[doc = "Stop At Block Gap Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STOP_AT_BLOCK_GAP_A { +pub enum StopAtBlockGap { #[doc = "0: Transfer"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Stop"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STOP_AT_BLOCK_GAP_A) -> Self { + fn from(variant: StopAtBlockGap) -> Self { variant as u8 != 0 } } -impl STOP_AT_BLOCK_GAP_R { +#[doc = "Field `STOP_AT_BLOCK_GAP` reader - Stop At Block Gap Request"] +pub type StopAtBlockGapR = crate::BitReader; +impl StopAtBlockGapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STOP_AT_BLOCK_GAP_A { + pub const fn variant(&self) -> StopAtBlockGap { match self.bits { - false => STOP_AT_BLOCK_GAP_A::VALUE1, - true => STOP_AT_BLOCK_GAP_A::VALUE2, + false => StopAtBlockGap::Value1, + true => StopAtBlockGap::Value2, } } #[doc = "Transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STOP_AT_BLOCK_GAP_A::VALUE1 + *self == StopAtBlockGap::Value1 } #[doc = "Stop"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STOP_AT_BLOCK_GAP_A::VALUE2 + *self == StopAtBlockGap::Value2 } } #[doc = "Field `STOP_AT_BLOCK_GAP` writer - Stop At Block Gap Request"] -pub type STOP_AT_BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG, STOP_AT_BLOCK_GAP_A>; -impl<'a, REG> STOP_AT_BLOCK_GAP_W<'a, REG> +pub type StopAtBlockGapW<'a, REG> = crate::BitWriter<'a, REG, StopAtBlockGap>; +impl<'a, REG> StopAtBlockGapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STOP_AT_BLOCK_GAP_A::VALUE1) + self.variant(StopAtBlockGap::Value1) } #[doc = "Stop"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STOP_AT_BLOCK_GAP_A::VALUE2) + self.variant(StopAtBlockGap::Value2) } } -#[doc = "Field `CONTINUE_REQ` reader - Continue Request"] -pub type CONTINUE_REQ_R = crate::BitReader; #[doc = "Continue Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONTINUE_REQ_A { +pub enum ContinueReq { #[doc = "0: Ignored"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Restart"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONTINUE_REQ_A) -> Self { + fn from(variant: ContinueReq) -> Self { variant as u8 != 0 } } -impl CONTINUE_REQ_R { +#[doc = "Field `CONTINUE_REQ` reader - Continue Request"] +pub type ContinueReqR = crate::BitReader; +impl ContinueReqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CONTINUE_REQ_A { + pub const fn variant(&self) -> ContinueReq { match self.bits { - false => CONTINUE_REQ_A::VALUE1, - true => CONTINUE_REQ_A::VALUE2, + false => ContinueReq::Value1, + true => ContinueReq::Value2, } } #[doc = "Ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CONTINUE_REQ_A::VALUE1 + *self == ContinueReq::Value1 } #[doc = "Restart"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CONTINUE_REQ_A::VALUE2 + *self == ContinueReq::Value2 } } #[doc = "Field `CONTINUE_REQ` writer - Continue Request"] -pub type CONTINUE_REQ_W<'a, REG> = crate::BitWriter<'a, REG, CONTINUE_REQ_A>; -impl<'a, REG> CONTINUE_REQ_W<'a, REG> +pub type ContinueReqW<'a, REG> = crate::BitWriter<'a, REG, ContinueReq>; +impl<'a, REG> ContinueReqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CONTINUE_REQ_A::VALUE1) + self.variant(ContinueReq::Value1) } #[doc = "Restart"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CONTINUE_REQ_A::VALUE2) + self.variant(ContinueReq::Value2) } } -#[doc = "Field `READ_WAIT_CTRL` reader - Read Wait Control"] -pub type READ_WAIT_CTRL_R = crate::BitReader; #[doc = "Read Wait Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum READ_WAIT_CTRL_A { +pub enum ReadWaitCtrl { #[doc = "0: Disable Read Wait Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable Read Wait Control"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: READ_WAIT_CTRL_A) -> Self { + fn from(variant: ReadWaitCtrl) -> Self { variant as u8 != 0 } } -impl READ_WAIT_CTRL_R { +#[doc = "Field `READ_WAIT_CTRL` reader - Read Wait Control"] +pub type ReadWaitCtrlR = crate::BitReader; +impl ReadWaitCtrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> READ_WAIT_CTRL_A { + pub const fn variant(&self) -> ReadWaitCtrl { match self.bits { - false => READ_WAIT_CTRL_A::VALUE1, - true => READ_WAIT_CTRL_A::VALUE2, + false => ReadWaitCtrl::Value1, + true => ReadWaitCtrl::Value2, } } #[doc = "Disable Read Wait Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == READ_WAIT_CTRL_A::VALUE1 + *self == ReadWaitCtrl::Value1 } #[doc = "Enable Read Wait Control"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == READ_WAIT_CTRL_A::VALUE2 + *self == ReadWaitCtrl::Value2 } } #[doc = "Field `READ_WAIT_CTRL` writer - Read Wait Control"] -pub type READ_WAIT_CTRL_W<'a, REG> = crate::BitWriter<'a, REG, READ_WAIT_CTRL_A>; -impl<'a, REG> READ_WAIT_CTRL_W<'a, REG> +pub type ReadWaitCtrlW<'a, REG> = crate::BitWriter<'a, REG, ReadWaitCtrl>; +impl<'a, REG> ReadWaitCtrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable Read Wait Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(READ_WAIT_CTRL_A::VALUE1) + self.variant(ReadWaitCtrl::Value1) } #[doc = "Enable Read Wait Control"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(READ_WAIT_CTRL_A::VALUE2) + self.variant(ReadWaitCtrl::Value2) } } #[doc = "Field `INT_AT_BLOCK_GAP` reader - Interrupt At Block Gap"] -pub type INT_AT_BLOCK_GAP_R = crate::BitReader; +pub type IntAtBlockGapR = crate::BitReader; #[doc = "Field `INT_AT_BLOCK_GAP` writer - Interrupt At Block Gap"] -pub type INT_AT_BLOCK_GAP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntAtBlockGapW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Stop At Block Gap Request"] #[inline(always)] - pub fn stop_at_block_gap(&self) -> STOP_AT_BLOCK_GAP_R { - STOP_AT_BLOCK_GAP_R::new((self.bits & 1) != 0) + pub fn stop_at_block_gap(&self) -> StopAtBlockGapR { + StopAtBlockGapR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Continue Request"] #[inline(always)] - pub fn continue_req(&self) -> CONTINUE_REQ_R { - CONTINUE_REQ_R::new(((self.bits >> 1) & 1) != 0) + pub fn continue_req(&self) -> ContinueReqR { + ContinueReqR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Read Wait Control"] #[inline(always)] - pub fn read_wait_ctrl(&self) -> READ_WAIT_CTRL_R { - READ_WAIT_CTRL_R::new(((self.bits >> 2) & 1) != 0) + pub fn read_wait_ctrl(&self) -> ReadWaitCtrlR { + ReadWaitCtrlR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt At Block Gap"] #[inline(always)] - pub fn int_at_block_gap(&self) -> INT_AT_BLOCK_GAP_R { - INT_AT_BLOCK_GAP_R::new(((self.bits >> 3) & 1) != 0) + pub fn int_at_block_gap(&self) -> IntAtBlockGapR { + IntAtBlockGapR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Stop At Block Gap Request"] #[inline(always)] #[must_use] - pub fn stop_at_block_gap(&mut self) -> STOP_AT_BLOCK_GAP_W { - STOP_AT_BLOCK_GAP_W::new(self, 0) + pub fn stop_at_block_gap(&mut self) -> StopAtBlockGapW { + StopAtBlockGapW::new(self, 0) } #[doc = "Bit 1 - Continue Request"] #[inline(always)] #[must_use] - pub fn continue_req(&mut self) -> CONTINUE_REQ_W { - CONTINUE_REQ_W::new(self, 1) + pub fn continue_req(&mut self) -> ContinueReqW { + ContinueReqW::new(self, 1) } #[doc = "Bit 2 - Read Wait Control"] #[inline(always)] #[must_use] - pub fn read_wait_ctrl(&mut self) -> READ_WAIT_CTRL_W { - READ_WAIT_CTRL_W::new(self, 2) + pub fn read_wait_ctrl(&mut self) -> ReadWaitCtrlW { + ReadWaitCtrlW::new(self, 2) } #[doc = "Bit 3 - Interrupt At Block Gap"] #[inline(always)] #[must_use] - pub fn int_at_block_gap(&mut self) -> INT_AT_BLOCK_GAP_W { - INT_AT_BLOCK_GAP_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn int_at_block_gap(&mut self) -> IntAtBlockGapW { + IntAtBlockGapW::new(self, 3) } } #[doc = "Block Gap Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_gap_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_gap_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BLOCK_GAP_CTRL_SPEC; -impl crate::RegisterSpec for BLOCK_GAP_CTRL_SPEC { +pub struct BlockGapCtrlSpec; +impl crate::RegisterSpec for BlockGapCtrlSpec { type Ux = u8; } #[doc = "`read()` method returns [`block_gap_ctrl::R`](R) reader structure"] -impl crate::Readable for BLOCK_GAP_CTRL_SPEC {} +impl crate::Readable for BlockGapCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`block_gap_ctrl::W`](W) writer structure"] -impl crate::Writable for BLOCK_GAP_CTRL_SPEC { +impl crate::Writable for BlockGapCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets BLOCK_GAP_CTRL to value 0"] -impl crate::Resettable for BLOCK_GAP_CTRL_SPEC { +impl crate::Resettable for BlockGapCtrlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc/block_size.rs b/src/sdmmc/block_size.rs index 63db9937..e6aa59f4 100644 --- a/src/sdmmc/block_size.rs +++ b/src/sdmmc/block_size.rs @@ -1,64 +1,55 @@ #[doc = "Register `BLOCK_SIZE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BLOCK_SIZE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TX_BLOCK_SIZE` reader - Transfer Block Size"] -pub type TX_BLOCK_SIZE_R = crate::FieldReader; +pub type TxBlockSizeR = crate::FieldReader; #[doc = "Field `TX_BLOCK_SIZE` writer - Transfer Block Size"] -pub type TX_BLOCK_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type TxBlockSizeW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `TX_BLOCK_SIZE_12` reader - Transfer Block Size 12th bit."] -pub type TX_BLOCK_SIZE_12_R = crate::BitReader; +pub type TxBlockSize12R = crate::BitReader; #[doc = "Field `TX_BLOCK_SIZE_12` writer - Transfer Block Size 12th bit."] -pub type TX_BLOCK_SIZE_12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxBlockSize12W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Transfer Block Size"] #[inline(always)] - pub fn tx_block_size(&self) -> TX_BLOCK_SIZE_R { - TX_BLOCK_SIZE_R::new(self.bits & 0x0fff) + pub fn tx_block_size(&self) -> TxBlockSizeR { + TxBlockSizeR::new(self.bits & 0x0fff) } #[doc = "Bit 15 - Transfer Block Size 12th bit."] #[inline(always)] - pub fn tx_block_size_12(&self) -> TX_BLOCK_SIZE_12_R { - TX_BLOCK_SIZE_12_R::new(((self.bits >> 15) & 1) != 0) + pub fn tx_block_size_12(&self) -> TxBlockSize12R { + TxBlockSize12R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Transfer Block Size"] #[inline(always)] #[must_use] - pub fn tx_block_size(&mut self) -> TX_BLOCK_SIZE_W { - TX_BLOCK_SIZE_W::new(self, 0) + pub fn tx_block_size(&mut self) -> TxBlockSizeW { + TxBlockSizeW::new(self, 0) } #[doc = "Bit 15 - Transfer Block Size 12th bit."] #[inline(always)] #[must_use] - pub fn tx_block_size_12(&mut self) -> TX_BLOCK_SIZE_12_W { - TX_BLOCK_SIZE_12_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn tx_block_size_12(&mut self) -> TxBlockSize12W { + TxBlockSize12W::new(self, 15) } } #[doc = "Block Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`block_size::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`block_size::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BLOCK_SIZE_SPEC; -impl crate::RegisterSpec for BLOCK_SIZE_SPEC { +pub struct BlockSizeSpec; +impl crate::RegisterSpec for BlockSizeSpec { type Ux = u16; } #[doc = "`read()` method returns [`block_size::R`](R) reader structure"] -impl crate::Readable for BLOCK_SIZE_SPEC {} +impl crate::Readable for BlockSizeSpec {} #[doc = "`write(|w| ..)` method takes [`block_size::W`](W) writer structure"] -impl crate::Writable for BLOCK_SIZE_SPEC { +impl crate::Writable for BlockSizeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets BLOCK_SIZE to value 0"] -impl crate::Resettable for BLOCK_SIZE_SPEC { +impl crate::Resettable for BlockSizeSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/capabilities.rs b/src/sdmmc/capabilities.rs index 7ff27d06..c2446bcd 100644 --- a/src/sdmmc/capabilities.rs +++ b/src/sdmmc/capabilities.rs @@ -1,541 +1,541 @@ #[doc = "Register `CAPABILITIES` reader"] -pub type R = crate::R; -#[doc = "Field `TIMEOUT_CLOCK_FREQ` reader - Timeout Clock Frequency"] -pub type TIMEOUT_CLOCK_FREQ_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Timeout Clock Frequency\n\nValue on reset: 48"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIMEOUT_CLOCK_FREQ_A { +pub enum TimeoutClockFreq { #[doc = "48: 48 MHz"] - VALUE1 = 48, + Value1 = 48, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIMEOUT_CLOCK_FREQ_A) -> Self { + fn from(variant: TimeoutClockFreq) -> Self { variant as _ } } -impl crate::FieldSpec for TIMEOUT_CLOCK_FREQ_A { +impl crate::FieldSpec for TimeoutClockFreq { type Ux = u8; } -impl TIMEOUT_CLOCK_FREQ_R { +#[doc = "Field `TIMEOUT_CLOCK_FREQ` reader - Timeout Clock Frequency"] +pub type TimeoutClockFreqR = crate::FieldReader; +impl TimeoutClockFreqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 48 => Some(TIMEOUT_CLOCK_FREQ_A::VALUE1), + 48 => Some(TimeoutClockFreq::Value1), _ => None, } } #[doc = "48 MHz"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIMEOUT_CLOCK_FREQ_A::VALUE1 + *self == TimeoutClockFreq::Value1 } } -#[doc = "Field `TIMEOUT_CLOCK_UNIT` reader - Timeout Clock Unit"] -pub type TIMEOUT_CLOCK_UNIT_R = crate::BitReader; #[doc = "Timeout Clock Unit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIMEOUT_CLOCK_UNIT_A { +pub enum TimeoutClockUnit { #[doc = "1: MHz"] - VALUE1 = 1, + Value1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIMEOUT_CLOCK_UNIT_A) -> Self { + fn from(variant: TimeoutClockUnit) -> Self { variant as u8 != 0 } } -impl TIMEOUT_CLOCK_UNIT_R { +#[doc = "Field `TIMEOUT_CLOCK_UNIT` reader - Timeout Clock Unit"] +pub type TimeoutClockUnitR = crate::BitReader; +impl TimeoutClockUnitR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(TIMEOUT_CLOCK_UNIT_A::VALUE1), + true => Some(TimeoutClockUnit::Value1), _ => None, } } #[doc = "MHz"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIMEOUT_CLOCK_UNIT_A::VALUE1 + *self == TimeoutClockUnit::Value1 } } -#[doc = "Field `BASE_SD_CLOCK_FREQ` reader - Base Clock Frequency for SD Clock"] -pub type BASE_SD_CLOCK_FREQ_R = crate::FieldReader; #[doc = "Base Clock Frequency for SD Clock\n\nValue on reset: 48"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BASE_SD_CLOCK_FREQ_A { +pub enum BaseSdClockFreq { #[doc = "48: 48 MHz"] - VALUE1 = 48, + Value1 = 48, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BASE_SD_CLOCK_FREQ_A) -> Self { + fn from(variant: BaseSdClockFreq) -> Self { variant as _ } } -impl crate::FieldSpec for BASE_SD_CLOCK_FREQ_A { +impl crate::FieldSpec for BaseSdClockFreq { type Ux = u8; } -impl BASE_SD_CLOCK_FREQ_R { +#[doc = "Field `BASE_SD_CLOCK_FREQ` reader - Base Clock Frequency for SD Clock"] +pub type BaseSdClockFreqR = crate::FieldReader; +impl BaseSdClockFreqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 48 => Some(BASE_SD_CLOCK_FREQ_A::VALUE1), + 48 => Some(BaseSdClockFreq::Value1), _ => None, } } #[doc = "48 MHz"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BASE_SD_CLOCK_FREQ_A::VALUE1 + *self == BaseSdClockFreq::Value1 } } -#[doc = "Field `MAX_BLOCK_LENGTH` reader - Max Block Length"] -pub type MAX_BLOCK_LENGTH_R = crate::FieldReader; #[doc = "Max Block Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MAX_BLOCK_LENGTH_A { +pub enum MaxBlockLength { #[doc = "0: 512 byte"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MAX_BLOCK_LENGTH_A) -> Self { + fn from(variant: MaxBlockLength) -> Self { variant as _ } } -impl crate::FieldSpec for MAX_BLOCK_LENGTH_A { +impl crate::FieldSpec for MaxBlockLength { type Ux = u8; } -impl MAX_BLOCK_LENGTH_R { +#[doc = "Field `MAX_BLOCK_LENGTH` reader - Max Block Length"] +pub type MaxBlockLengthR = crate::FieldReader; +impl MaxBlockLengthR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MAX_BLOCK_LENGTH_A::VALUE1), + 0 => Some(MaxBlockLength::Value1), _ => None, } } #[doc = "512 byte"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MAX_BLOCK_LENGTH_A::VALUE1 + *self == MaxBlockLength::Value1 } } -#[doc = "Field `EXT_MEDIA_BUS_SUPPORT` reader - Extended Media Bus Support"] -pub type EXT_MEDIA_BUS_SUPPORT_R = crate::BitReader; #[doc = "Extended Media Bus Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXT_MEDIA_BUS_SUPPORT_A { +pub enum ExtMediaBusSupport { #[doc = "0: Extended Media Bus not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXT_MEDIA_BUS_SUPPORT_A) -> Self { + fn from(variant: ExtMediaBusSupport) -> Self { variant as u8 != 0 } } -impl EXT_MEDIA_BUS_SUPPORT_R { +#[doc = "Field `EXT_MEDIA_BUS_SUPPORT` reader - Extended Media Bus Support"] +pub type ExtMediaBusSupportR = crate::BitReader; +impl ExtMediaBusSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(EXT_MEDIA_BUS_SUPPORT_A::VALUE1), + false => Some(ExtMediaBusSupport::Value1), _ => None, } } #[doc = "Extended Media Bus not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXT_MEDIA_BUS_SUPPORT_A::VALUE1 + *self == ExtMediaBusSupport::Value1 } } -#[doc = "Field `ADMA2_SUPPORT` reader - ADMA2 Support"] -pub type ADMA2_SUPPORT_R = crate::BitReader; #[doc = "ADMA2 Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ADMA2_SUPPORT_A { +pub enum Adma2Support { #[doc = "0: ADMA not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ADMA2_SUPPORT_A) -> Self { + fn from(variant: Adma2Support) -> Self { variant as u8 != 0 } } -impl ADMA2_SUPPORT_R { +#[doc = "Field `ADMA2_SUPPORT` reader - ADMA2 Support"] +pub type Adma2SupportR = crate::BitReader; +impl Adma2SupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(ADMA2_SUPPORT_A::VALUE1), + false => Some(Adma2Support::Value1), _ => None, } } #[doc = "ADMA not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ADMA2_SUPPORT_A::VALUE1 + *self == Adma2Support::Value1 } } -#[doc = "Field `HIGH_SPEED_SUPPORT` reader - High Speed Support"] -pub type HIGH_SPEED_SUPPORT_R = crate::BitReader; #[doc = "High Speed Support\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIGH_SPEED_SUPPORT_A { +pub enum HighSpeedSupport { #[doc = "1: High Speed supported"] - VALUE1 = 1, + Value1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIGH_SPEED_SUPPORT_A) -> Self { + fn from(variant: HighSpeedSupport) -> Self { variant as u8 != 0 } } -impl HIGH_SPEED_SUPPORT_R { +#[doc = "Field `HIGH_SPEED_SUPPORT` reader - High Speed Support"] +pub type HighSpeedSupportR = crate::BitReader; +impl HighSpeedSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(HIGH_SPEED_SUPPORT_A::VALUE1), + true => Some(HighSpeedSupport::Value1), _ => None, } } #[doc = "High Speed supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIGH_SPEED_SUPPORT_A::VALUE1 + *self == HighSpeedSupport::Value1 } } -#[doc = "Field `SDMA_SUPPORT` reader - SDMA Support"] -pub type SDMA_SUPPORT_R = crate::BitReader; #[doc = "SDMA Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDMA_SUPPORT_A { +pub enum SdmaSupport { #[doc = "0: SDMA not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDMA_SUPPORT_A) -> Self { + fn from(variant: SdmaSupport) -> Self { variant as u8 != 0 } } -impl SDMA_SUPPORT_R { +#[doc = "Field `SDMA_SUPPORT` reader - SDMA Support"] +pub type SdmaSupportR = crate::BitReader; +impl SdmaSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(SDMA_SUPPORT_A::VALUE1), + false => Some(SdmaSupport::Value1), _ => None, } } #[doc = "SDMA not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDMA_SUPPORT_A::VALUE1 + *self == SdmaSupport::Value1 } } -#[doc = "Field `SUSPEND_RESUME_SUPPORT` reader - Suspend / Resume Support"] -pub type SUSPEND_RESUME_SUPPORT_R = crate::BitReader; #[doc = "Suspend / Resume Support\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SUSPEND_RESUME_SUPPORT_A { +pub enum SuspendResumeSupport { #[doc = "1: Supported"] - VALUE1 = 1, + Value1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SUSPEND_RESUME_SUPPORT_A) -> Self { + fn from(variant: SuspendResumeSupport) -> Self { variant as u8 != 0 } } -impl SUSPEND_RESUME_SUPPORT_R { +#[doc = "Field `SUSPEND_RESUME_SUPPORT` reader - Suspend / Resume Support"] +pub type SuspendResumeSupportR = crate::BitReader; +impl SuspendResumeSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(SUSPEND_RESUME_SUPPORT_A::VALUE1), + true => Some(SuspendResumeSupport::Value1), _ => None, } } #[doc = "Supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSPEND_RESUME_SUPPORT_A::VALUE1 + *self == SuspendResumeSupport::Value1 } } -#[doc = "Field `VOLTAGE_SUPPORT_3_3V` reader - Voltage Support 3.3V"] -pub type VOLTAGE_SUPPORT_3_3V_R = crate::BitReader; #[doc = "Voltage Support 3.3V\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VOLTAGE_SUPPORT_3_3V_A { +pub enum VoltageSupport3_3v { #[doc = "1: 3.3V supported"] - VALUE1 = 1, + Value1 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VOLTAGE_SUPPORT_3_3V_A) -> Self { + fn from(variant: VoltageSupport3_3v) -> Self { variant as u8 != 0 } } -impl VOLTAGE_SUPPORT_3_3V_R { +#[doc = "Field `VOLTAGE_SUPPORT_3_3V` reader - Voltage Support 3.3V"] +pub type VoltageSupport3_3vR = crate::BitReader; +impl VoltageSupport3_3vR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(VOLTAGE_SUPPORT_3_3V_A::VALUE1), + true => Some(VoltageSupport3_3v::Value1), _ => None, } } #[doc = "3.3V supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VOLTAGE_SUPPORT_3_3V_A::VALUE1 + *self == VoltageSupport3_3v::Value1 } } -#[doc = "Field `VOLTAGE_SUPPORT_3V` reader - Voltage Support 3.0V"] -pub type VOLTAGE_SUPPORT_3V_R = crate::BitReader; #[doc = "Voltage Support 3.0V\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VOLTAGE_SUPPORT_3V_A { +pub enum VoltageSupport3v { #[doc = "0: 3.0V not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VOLTAGE_SUPPORT_3V_A) -> Self { + fn from(variant: VoltageSupport3v) -> Self { variant as u8 != 0 } } -impl VOLTAGE_SUPPORT_3V_R { +#[doc = "Field `VOLTAGE_SUPPORT_3V` reader - Voltage Support 3.0V"] +pub type VoltageSupport3vR = crate::BitReader; +impl VoltageSupport3vR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(VOLTAGE_SUPPORT_3V_A::VALUE1), + false => Some(VoltageSupport3v::Value1), _ => None, } } #[doc = "3.0V not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VOLTAGE_SUPPORT_3V_A::VALUE1 + *self == VoltageSupport3v::Value1 } } -#[doc = "Field `VOLTAGE_SUPPORT_1_8V` reader - Voltage Support 1.8V"] -pub type VOLTAGE_SUPPORT_1_8V_R = crate::BitReader; #[doc = "Voltage Support 1.8V\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VOLTAGE_SUPPORT_1_8V_A { +pub enum VoltageSupport1_8v { #[doc = "0: 1.8V not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VOLTAGE_SUPPORT_1_8V_A) -> Self { + fn from(variant: VoltageSupport1_8v) -> Self { variant as u8 != 0 } } -impl VOLTAGE_SUPPORT_1_8V_R { +#[doc = "Field `VOLTAGE_SUPPORT_1_8V` reader - Voltage Support 1.8V"] +pub type VoltageSupport1_8vR = crate::BitReader; +impl VoltageSupport1_8vR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(VOLTAGE_SUPPORT_1_8V_A::VALUE1), + false => Some(VoltageSupport1_8v::Value1), _ => None, } } #[doc = "1.8V not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VOLTAGE_SUPPORT_1_8V_A::VALUE1 + *self == VoltageSupport1_8v::Value1 } } -#[doc = "Field `SYSBUS_64_SUPPORT` reader - 64-bit System Bus Support"] -pub type SYSBUS_64_SUPPORT_R = crate::BitReader; #[doc = "64-bit System Bus Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYSBUS_64_SUPPORT_A { +pub enum Sysbus64Support { #[doc = "0: Does not support 64-bit system address"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYSBUS_64_SUPPORT_A) -> Self { + fn from(variant: Sysbus64Support) -> Self { variant as u8 != 0 } } -impl SYSBUS_64_SUPPORT_R { +#[doc = "Field `SYSBUS_64_SUPPORT` reader - 64-bit System Bus Support"] +pub type Sysbus64SupportR = crate::BitReader; +impl Sysbus64SupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(SYSBUS_64_SUPPORT_A::VALUE1), + false => Some(Sysbus64Support::Value1), _ => None, } } #[doc = "Does not support 64-bit system address"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYSBUS_64_SUPPORT_A::VALUE1 + *self == Sysbus64Support::Value1 } } -#[doc = "Field `ASYNC_INT_SUPPORT` reader - Asynchronous Interrupt Support"] -pub type ASYNC_INT_SUPPORT_R = crate::BitReader; #[doc = "Asynchronous Interrupt Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASYNC_INT_SUPPORT_A { +pub enum AsyncIntSupport { #[doc = "0: Asynchronous Interrupt not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASYNC_INT_SUPPORT_A) -> Self { + fn from(variant: AsyncIntSupport) -> Self { variant as u8 != 0 } } -impl ASYNC_INT_SUPPORT_R { +#[doc = "Field `ASYNC_INT_SUPPORT` reader - Asynchronous Interrupt Support"] +pub type AsyncIntSupportR = crate::BitReader; +impl AsyncIntSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(ASYNC_INT_SUPPORT_A::VALUE1), + false => Some(AsyncIntSupport::Value1), _ => None, } } #[doc = "Asynchronous Interrupt not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASYNC_INT_SUPPORT_A::VALUE1 + *self == AsyncIntSupport::Value1 } } -#[doc = "Field `SLOT_TYPE` reader - Slot Type"] -pub type SLOT_TYPE_R = crate::FieldReader; #[doc = "Slot Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SLOT_TYPE_A { +pub enum SlotType { #[doc = "0: Removable Card Slot"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SLOT_TYPE_A) -> Self { + fn from(variant: SlotType) -> Self { variant as _ } } -impl crate::FieldSpec for SLOT_TYPE_A { +impl crate::FieldSpec for SlotType { type Ux = u8; } -impl SLOT_TYPE_R { +#[doc = "Field `SLOT_TYPE` reader - Slot Type"] +pub type SlotTypeR = crate::FieldReader; +impl SlotTypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SLOT_TYPE_A::VALUE1), + 0 => Some(SlotType::Value1), _ => None, } } #[doc = "Removable Card Slot"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLOT_TYPE_A::VALUE1 + *self == SlotType::Value1 } } impl R { #[doc = "Bits 0:5 - Timeout Clock Frequency"] #[inline(always)] - pub fn timeout_clock_freq(&self) -> TIMEOUT_CLOCK_FREQ_R { - TIMEOUT_CLOCK_FREQ_R::new((self.bits & 0x3f) as u8) + pub fn timeout_clock_freq(&self) -> TimeoutClockFreqR { + TimeoutClockFreqR::new((self.bits & 0x3f) as u8) } #[doc = "Bit 7 - Timeout Clock Unit"] #[inline(always)] - pub fn timeout_clock_unit(&self) -> TIMEOUT_CLOCK_UNIT_R { - TIMEOUT_CLOCK_UNIT_R::new(((self.bits >> 7) & 1) != 0) + pub fn timeout_clock_unit(&self) -> TimeoutClockUnitR { + TimeoutClockUnitR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:15 - Base Clock Frequency for SD Clock"] #[inline(always)] - pub fn base_sd_clock_freq(&self) -> BASE_SD_CLOCK_FREQ_R { - BASE_SD_CLOCK_FREQ_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn base_sd_clock_freq(&self) -> BaseSdClockFreqR { + BaseSdClockFreqR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:17 - Max Block Length"] #[inline(always)] - pub fn max_block_length(&self) -> MAX_BLOCK_LENGTH_R { - MAX_BLOCK_LENGTH_R::new(((self.bits >> 16) & 3) as u8) + pub fn max_block_length(&self) -> MaxBlockLengthR { + MaxBlockLengthR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 18 - Extended Media Bus Support"] #[inline(always)] - pub fn ext_media_bus_support(&self) -> EXT_MEDIA_BUS_SUPPORT_R { - EXT_MEDIA_BUS_SUPPORT_R::new(((self.bits >> 18) & 1) != 0) + pub fn ext_media_bus_support(&self) -> ExtMediaBusSupportR { + ExtMediaBusSupportR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - ADMA2 Support"] #[inline(always)] - pub fn adma2_support(&self) -> ADMA2_SUPPORT_R { - ADMA2_SUPPORT_R::new(((self.bits >> 19) & 1) != 0) + pub fn adma2_support(&self) -> Adma2SupportR { + Adma2SupportR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - High Speed Support"] #[inline(always)] - pub fn high_speed_support(&self) -> HIGH_SPEED_SUPPORT_R { - HIGH_SPEED_SUPPORT_R::new(((self.bits >> 21) & 1) != 0) + pub fn high_speed_support(&self) -> HighSpeedSupportR { + HighSpeedSupportR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - SDMA Support"] #[inline(always)] - pub fn sdma_support(&self) -> SDMA_SUPPORT_R { - SDMA_SUPPORT_R::new(((self.bits >> 22) & 1) != 0) + pub fn sdma_support(&self) -> SdmaSupportR { + SdmaSupportR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Suspend / Resume Support"] #[inline(always)] - pub fn suspend_resume_support(&self) -> SUSPEND_RESUME_SUPPORT_R { - SUSPEND_RESUME_SUPPORT_R::new(((self.bits >> 23) & 1) != 0) + pub fn suspend_resume_support(&self) -> SuspendResumeSupportR { + SuspendResumeSupportR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Voltage Support 3.3V"] #[inline(always)] - pub fn voltage_support_3_3v(&self) -> VOLTAGE_SUPPORT_3_3V_R { - VOLTAGE_SUPPORT_3_3V_R::new(((self.bits >> 24) & 1) != 0) + pub fn voltage_support_3_3v(&self) -> VoltageSupport3_3vR { + VoltageSupport3_3vR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Voltage Support 3.0V"] #[inline(always)] - pub fn voltage_support_3v(&self) -> VOLTAGE_SUPPORT_3V_R { - VOLTAGE_SUPPORT_3V_R::new(((self.bits >> 25) & 1) != 0) + pub fn voltage_support_3v(&self) -> VoltageSupport3vR { + VoltageSupport3vR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Voltage Support 1.8V"] #[inline(always)] - pub fn voltage_support_1_8v(&self) -> VOLTAGE_SUPPORT_1_8V_R { - VOLTAGE_SUPPORT_1_8V_R::new(((self.bits >> 26) & 1) != 0) + pub fn voltage_support_1_8v(&self) -> VoltageSupport1_8vR { + VoltageSupport1_8vR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - 64-bit System Bus Support"] #[inline(always)] - pub fn sysbus_64_support(&self) -> SYSBUS_64_SUPPORT_R { - SYSBUS_64_SUPPORT_R::new(((self.bits >> 28) & 1) != 0) + pub fn sysbus_64_support(&self) -> Sysbus64SupportR { + Sysbus64SupportR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Asynchronous Interrupt Support"] #[inline(always)] - pub fn async_int_support(&self) -> ASYNC_INT_SUPPORT_R { - ASYNC_INT_SUPPORT_R::new(((self.bits >> 29) & 1) != 0) + pub fn async_int_support(&self) -> AsyncIntSupportR { + AsyncIntSupportR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bits 30:31 - Slot Type"] #[inline(always)] - pub fn slot_type(&self) -> SLOT_TYPE_R { - SLOT_TYPE_R::new(((self.bits >> 30) & 3) as u8) + pub fn slot_type(&self) -> SlotTypeR { + SlotTypeR::new(((self.bits >> 30) & 3) as u8) } } #[doc = "Capabilities Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`capabilities::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CAPABILITIES_SPEC; -impl crate::RegisterSpec for CAPABILITIES_SPEC { +pub struct CapabilitiesSpec; +impl crate::RegisterSpec for CapabilitiesSpec { type Ux = u32; } #[doc = "`read()` method returns [`capabilities::R`](R) reader structure"] -impl crate::Readable for CAPABILITIES_SPEC {} +impl crate::Readable for CapabilitiesSpec {} #[doc = "`reset()` method sets CAPABILITIES to value 0x01a0_30b0"] -impl crate::Resettable for CAPABILITIES_SPEC { +impl crate::Resettable for CapabilitiesSpec { const RESET_VALUE: u32 = 0x01a0_30b0; } diff --git a/src/sdmmc/capabilities_hi.rs b/src/sdmmc/capabilities_hi.rs index 8ab9aa51..12ffc5db 100644 --- a/src/sdmmc/capabilities_hi.rs +++ b/src/sdmmc/capabilities_hi.rs @@ -1,367 +1,367 @@ #[doc = "Register `CAPABILITIES_HI` reader"] -pub type R = crate::R; -#[doc = "Field `SDR50_SUPPORT` reader - SDR50 Support"] -pub type SDR50_SUPPORT_R = crate::BitReader; +pub type R = crate::R; #[doc = "SDR50 Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDR50_SUPPORT_A { +pub enum Sdr50Support { #[doc = "0: SDR50 is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDR50_SUPPORT_A) -> Self { + fn from(variant: Sdr50Support) -> Self { variant as u8 != 0 } } -impl SDR50_SUPPORT_R { +#[doc = "Field `SDR50_SUPPORT` reader - SDR50 Support"] +pub type Sdr50SupportR = crate::BitReader; +impl Sdr50SupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(SDR50_SUPPORT_A::VALUE1), + false => Some(Sdr50Support::Value1), _ => None, } } #[doc = "SDR50 is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDR50_SUPPORT_A::VALUE1 + *self == Sdr50Support::Value1 } } -#[doc = "Field `SDR104_SUPPORT` reader - SDR104 Support"] -pub type SDR104_SUPPORT_R = crate::BitReader; #[doc = "SDR104 Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDR104_SUPPORT_A { +pub enum Sdr104Support { #[doc = "0: SDR104 is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDR104_SUPPORT_A) -> Self { + fn from(variant: Sdr104Support) -> Self { variant as u8 != 0 } } -impl SDR104_SUPPORT_R { +#[doc = "Field `SDR104_SUPPORT` reader - SDR104 Support"] +pub type Sdr104SupportR = crate::BitReader; +impl Sdr104SupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(SDR104_SUPPORT_A::VALUE1), + false => Some(Sdr104Support::Value1), _ => None, } } #[doc = "SDR104 is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDR104_SUPPORT_A::VALUE1 + *self == Sdr104Support::Value1 } } -#[doc = "Field `DDR50_SUPPORT` reader - DDR50 Support"] -pub type DDR50_SUPPORT_R = crate::BitReader; #[doc = "DDR50 Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DDR50_SUPPORT_A { +pub enum Ddr50Support { #[doc = "0: DDR50 is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DDR50_SUPPORT_A) -> Self { + fn from(variant: Ddr50Support) -> Self { variant as u8 != 0 } } -impl DDR50_SUPPORT_R { +#[doc = "Field `DDR50_SUPPORT` reader - DDR50 Support"] +pub type Ddr50SupportR = crate::BitReader; +impl Ddr50SupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(DDR50_SUPPORT_A::VALUE1), + false => Some(Ddr50Support::Value1), _ => None, } } #[doc = "DDR50 is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DDR50_SUPPORT_A::VALUE1 + *self == Ddr50Support::Value1 } } -#[doc = "Field `DRV_A_SUPPORT` reader - Driver Type A Support"] -pub type DRV_A_SUPPORT_R = crate::BitReader; #[doc = "Driver Type A Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DRV_A_SUPPORT_A { +pub enum DrvASupport { #[doc = "0: Driver Type A is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DRV_A_SUPPORT_A) -> Self { + fn from(variant: DrvASupport) -> Self { variant as u8 != 0 } } -impl DRV_A_SUPPORT_R { +#[doc = "Field `DRV_A_SUPPORT` reader - Driver Type A Support"] +pub type DrvASupportR = crate::BitReader; +impl DrvASupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(DRV_A_SUPPORT_A::VALUE1), + false => Some(DrvASupport::Value1), _ => None, } } #[doc = "Driver Type A is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DRV_A_SUPPORT_A::VALUE1 + *self == DrvASupport::Value1 } } -#[doc = "Field `DRV_C_SUPPORT` reader - Driver Type C Support"] -pub type DRV_C_SUPPORT_R = crate::BitReader; #[doc = "Driver Type C Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DRV_C_SUPPORT_A { +pub enum DrvCSupport { #[doc = "0: Driver Type C is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DRV_C_SUPPORT_A) -> Self { + fn from(variant: DrvCSupport) -> Self { variant as u8 != 0 } } -impl DRV_C_SUPPORT_R { +#[doc = "Field `DRV_C_SUPPORT` reader - Driver Type C Support"] +pub type DrvCSupportR = crate::BitReader; +impl DrvCSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(DRV_C_SUPPORT_A::VALUE1), + false => Some(DrvCSupport::Value1), _ => None, } } #[doc = "Driver Type C is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DRV_C_SUPPORT_A::VALUE1 + *self == DrvCSupport::Value1 } } -#[doc = "Field `DRV_D_SUPPORT` reader - Driver Type D Support"] -pub type DRV_D_SUPPORT_R = crate::BitReader; #[doc = "Driver Type D Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DRV_D_SUPPORT_A { +pub enum DrvDSupport { #[doc = "0: Driver Type D is not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DRV_D_SUPPORT_A) -> Self { + fn from(variant: DrvDSupport) -> Self { variant as u8 != 0 } } -impl DRV_D_SUPPORT_R { +#[doc = "Field `DRV_D_SUPPORT` reader - Driver Type D Support"] +pub type DrvDSupportR = crate::BitReader; +impl DrvDSupportR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(DRV_D_SUPPORT_A::VALUE1), + false => Some(DrvDSupport::Value1), _ => None, } } #[doc = "Driver Type D is not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DRV_D_SUPPORT_A::VALUE1 + *self == DrvDSupport::Value1 } } -#[doc = "Field `TIM_CNT_RETUNE` reader - Timer count for Re-Tuning"] -pub type TIM_CNT_RETUNE_R = crate::FieldReader; #[doc = "Timer count for Re-Tuning\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TIM_CNT_RETUNE_A { +pub enum TimCntRetune { #[doc = "0: Get information via other source"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TIM_CNT_RETUNE_A) -> Self { + fn from(variant: TimCntRetune) -> Self { variant as _ } } -impl crate::FieldSpec for TIM_CNT_RETUNE_A { +impl crate::FieldSpec for TimCntRetune { type Ux = u8; } -impl TIM_CNT_RETUNE_R { +#[doc = "Field `TIM_CNT_RETUNE` reader - Timer count for Re-Tuning"] +pub type TimCntRetuneR = crate::FieldReader; +impl TimCntRetuneR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TIM_CNT_RETUNE_A::VALUE1), + 0 => Some(TimCntRetune::Value1), _ => None, } } #[doc = "Get information via other source"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIM_CNT_RETUNE_A::VALUE1 + *self == TimCntRetune::Value1 } } -#[doc = "Field `USE_TUNING_SDR50` reader - Use Tuning for SDR50"] -pub type USE_TUNING_SDR50_R = crate::BitReader; #[doc = "Use Tuning for SDR50\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum USE_TUNING_SDR50_A { +pub enum UseTuningSdr50 { #[doc = "0: SDR50 does not require tuning"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: USE_TUNING_SDR50_A) -> Self { + fn from(variant: UseTuningSdr50) -> Self { variant as u8 != 0 } } -impl USE_TUNING_SDR50_R { +#[doc = "Field `USE_TUNING_SDR50` reader - Use Tuning for SDR50"] +pub type UseTuningSdr50R = crate::BitReader; +impl UseTuningSdr50R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(USE_TUNING_SDR50_A::VALUE1), + false => Some(UseTuningSdr50::Value1), _ => None, } } #[doc = "SDR50 does not require tuning"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == USE_TUNING_SDR50_A::VALUE1 + *self == UseTuningSdr50::Value1 } } -#[doc = "Field `RE_TUNING_MODES` reader - Re-tuning modes"] -pub type RE_TUNING_MODES_R = crate::FieldReader; #[doc = "Re-tuning modes\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RE_TUNING_MODES_A { +pub enum ReTuningModes { #[doc = "0: Mode 1"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RE_TUNING_MODES_A) -> Self { + fn from(variant: ReTuningModes) -> Self { variant as _ } } -impl crate::FieldSpec for RE_TUNING_MODES_A { +impl crate::FieldSpec for ReTuningModes { type Ux = u8; } -impl RE_TUNING_MODES_R { +#[doc = "Field `RE_TUNING_MODES` reader - Re-tuning modes"] +pub type ReTuningModesR = crate::FieldReader; +impl ReTuningModesR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RE_TUNING_MODES_A::VALUE1), + 0 => Some(ReTuningModes::Value1), _ => None, } } #[doc = "Mode 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RE_TUNING_MODES_A::VALUE1 + *self == ReTuningModes::Value1 } } -#[doc = "Field `CLK_MULT` reader - Clock Multiplier"] -pub type CLK_MULT_R = crate::FieldReader; #[doc = "Clock Multiplier\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLK_MULT_A { +pub enum ClkMult { #[doc = "0: Clock Multiplier not supported"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLK_MULT_A) -> Self { + fn from(variant: ClkMult) -> Self { variant as _ } } -impl crate::FieldSpec for CLK_MULT_A { +impl crate::FieldSpec for ClkMult { type Ux = u8; } -impl CLK_MULT_R { +#[doc = "Field `CLK_MULT` reader - Clock Multiplier"] +pub type ClkMultR = crate::FieldReader; +impl ClkMultR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLK_MULT_A::VALUE1), + 0 => Some(ClkMult::Value1), _ => None, } } #[doc = "Clock Multiplier not supported"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLK_MULT_A::VALUE1 + *self == ClkMult::Value1 } } impl R { #[doc = "Bit 0 - SDR50 Support"] #[inline(always)] - pub fn sdr50_support(&self) -> SDR50_SUPPORT_R { - SDR50_SUPPORT_R::new((self.bits & 1) != 0) + pub fn sdr50_support(&self) -> Sdr50SupportR { + Sdr50SupportR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - SDR104 Support"] #[inline(always)] - pub fn sdr104_support(&self) -> SDR104_SUPPORT_R { - SDR104_SUPPORT_R::new(((self.bits >> 1) & 1) != 0) + pub fn sdr104_support(&self) -> Sdr104SupportR { + Sdr104SupportR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DDR50 Support"] #[inline(always)] - pub fn ddr50_support(&self) -> DDR50_SUPPORT_R { - DDR50_SUPPORT_R::new(((self.bits >> 2) & 1) != 0) + pub fn ddr50_support(&self) -> Ddr50SupportR { + Ddr50SupportR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Driver Type A Support"] #[inline(always)] - pub fn drv_a_support(&self) -> DRV_A_SUPPORT_R { - DRV_A_SUPPORT_R::new(((self.bits >> 4) & 1) != 0) + pub fn drv_a_support(&self) -> DrvASupportR { + DrvASupportR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Driver Type C Support"] #[inline(always)] - pub fn drv_c_support(&self) -> DRV_C_SUPPORT_R { - DRV_C_SUPPORT_R::new(((self.bits >> 5) & 1) != 0) + pub fn drv_c_support(&self) -> DrvCSupportR { + DrvCSupportR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Driver Type D Support"] #[inline(always)] - pub fn drv_d_support(&self) -> DRV_D_SUPPORT_R { - DRV_D_SUPPORT_R::new(((self.bits >> 6) & 1) != 0) + pub fn drv_d_support(&self) -> DrvDSupportR { + DrvDSupportR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 8:11 - Timer count for Re-Tuning"] #[inline(always)] - pub fn tim_cnt_retune(&self) -> TIM_CNT_RETUNE_R { - TIM_CNT_RETUNE_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn tim_cnt_retune(&self) -> TimCntRetuneR { + TimCntRetuneR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 13 - Use Tuning for SDR50"] #[inline(always)] - pub fn use_tuning_sdr50(&self) -> USE_TUNING_SDR50_R { - USE_TUNING_SDR50_R::new(((self.bits >> 13) & 1) != 0) + pub fn use_tuning_sdr50(&self) -> UseTuningSdr50R { + UseTuningSdr50R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Re-tuning modes"] #[inline(always)] - pub fn re_tuning_modes(&self) -> RE_TUNING_MODES_R { - RE_TUNING_MODES_R::new(((self.bits >> 14) & 3) as u8) + pub fn re_tuning_modes(&self) -> ReTuningModesR { + ReTuningModesR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:23 - Clock Multiplier"] #[inline(always)] - pub fn clk_mult(&self) -> CLK_MULT_R { - CLK_MULT_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn clk_mult(&self) -> ClkMultR { + ClkMultR::new(((self.bits >> 16) & 0xff) as u8) } } #[doc = "Capabilities Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`capabilities_hi::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CAPABILITIES_HI_SPEC; -impl crate::RegisterSpec for CAPABILITIES_HI_SPEC { +pub struct CapabilitiesHiSpec; +impl crate::RegisterSpec for CapabilitiesHiSpec { type Ux = u32; } #[doc = "`read()` method returns [`capabilities_hi::R`](R) reader structure"] -impl crate::Readable for CAPABILITIES_HI_SPEC {} +impl crate::Readable for CapabilitiesHiSpec {} #[doc = "`reset()` method sets CAPABILITIES_HI to value 0x0300_0000"] -impl crate::Resettable for CAPABILITIES_HI_SPEC { +impl crate::Resettable for CapabilitiesHiSpec { const RESET_VALUE: u32 = 0x0300_0000; } diff --git a/src/sdmmc/clock_ctrl.rs b/src/sdmmc/clock_ctrl.rs index 8fce0466..b49b0c7f 100644 --- a/src/sdmmc/clock_ctrl.rs +++ b/src/sdmmc/clock_ctrl.rs @@ -1,249 +1,249 @@ #[doc = "Register `CLOCK_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLOCK_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `INTERNAL_CLOCK_EN` reader - Internal Clock Enable"] -pub type INTERNAL_CLOCK_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Internal Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INTERNAL_CLOCK_EN_A { +pub enum InternalClockEn { #[doc = "0: Stop"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Oscillate"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INTERNAL_CLOCK_EN_A) -> Self { + fn from(variant: InternalClockEn) -> Self { variant as u8 != 0 } } -impl INTERNAL_CLOCK_EN_R { +#[doc = "Field `INTERNAL_CLOCK_EN` reader - Internal Clock Enable"] +pub type InternalClockEnR = crate::BitReader; +impl InternalClockEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INTERNAL_CLOCK_EN_A { + pub const fn variant(&self) -> InternalClockEn { match self.bits { - false => INTERNAL_CLOCK_EN_A::VALUE1, - true => INTERNAL_CLOCK_EN_A::VALUE2, + false => InternalClockEn::Value1, + true => InternalClockEn::Value2, } } #[doc = "Stop"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INTERNAL_CLOCK_EN_A::VALUE1 + *self == InternalClockEn::Value1 } #[doc = "Oscillate"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INTERNAL_CLOCK_EN_A::VALUE2 + *self == InternalClockEn::Value2 } } #[doc = "Field `INTERNAL_CLOCK_EN` writer - Internal Clock Enable"] -pub type INTERNAL_CLOCK_EN_W<'a, REG> = crate::BitWriter<'a, REG, INTERNAL_CLOCK_EN_A>; -impl<'a, REG> INTERNAL_CLOCK_EN_W<'a, REG> +pub type InternalClockEnW<'a, REG> = crate::BitWriter<'a, REG, InternalClockEn>; +impl<'a, REG> InternalClockEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Stop"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INTERNAL_CLOCK_EN_A::VALUE1) + self.variant(InternalClockEn::Value1) } #[doc = "Oscillate"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INTERNAL_CLOCK_EN_A::VALUE2) + self.variant(InternalClockEn::Value2) } } -#[doc = "Field `INTERNAL_CLOCK_STABLE` reader - Internal Clock Stable"] -pub type INTERNAL_CLOCK_STABLE_R = crate::BitReader; #[doc = "Internal Clock Stable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INTERNAL_CLOCK_STABLE_A { +pub enum InternalClockStable { #[doc = "0: Not Ready"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INTERNAL_CLOCK_STABLE_A) -> Self { + fn from(variant: InternalClockStable) -> Self { variant as u8 != 0 } } -impl INTERNAL_CLOCK_STABLE_R { +#[doc = "Field `INTERNAL_CLOCK_STABLE` reader - Internal Clock Stable"] +pub type InternalClockStableR = crate::BitReader; +impl InternalClockStableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INTERNAL_CLOCK_STABLE_A { + pub const fn variant(&self) -> InternalClockStable { match self.bits { - false => INTERNAL_CLOCK_STABLE_A::VALUE1, - true => INTERNAL_CLOCK_STABLE_A::VALUE2, + false => InternalClockStable::Value1, + true => InternalClockStable::Value2, } } #[doc = "Not Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INTERNAL_CLOCK_STABLE_A::VALUE1 + *self == InternalClockStable::Value1 } #[doc = "Ready"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INTERNAL_CLOCK_STABLE_A::VALUE2 + *self == InternalClockStable::Value2 } } -#[doc = "Field `SDCLOCK_EN` reader - SD Clock Enable"] -pub type SDCLOCK_EN_R = crate::BitReader; #[doc = "SD Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDCLOCK_EN_A { +pub enum SdclockEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDCLOCK_EN_A) -> Self { + fn from(variant: SdclockEn) -> Self { variant as u8 != 0 } } -impl SDCLOCK_EN_R { +#[doc = "Field `SDCLOCK_EN` reader - SD Clock Enable"] +pub type SdclockEnR = crate::BitReader; +impl SdclockEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDCLOCK_EN_A { + pub const fn variant(&self) -> SdclockEn { match self.bits { - false => SDCLOCK_EN_A::VALUE1, - true => SDCLOCK_EN_A::VALUE2, + false => SdclockEn::Value1, + true => SdclockEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDCLOCK_EN_A::VALUE1 + *self == SdclockEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDCLOCK_EN_A::VALUE2 + *self == SdclockEn::Value2 } } #[doc = "Field `SDCLOCK_EN` writer - SD Clock Enable"] -pub type SDCLOCK_EN_W<'a, REG> = crate::BitWriter<'a, REG, SDCLOCK_EN_A>; -impl<'a, REG> SDCLOCK_EN_W<'a, REG> +pub type SdclockEnW<'a, REG> = crate::BitWriter<'a, REG, SdclockEn>; +impl<'a, REG> SdclockEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SDCLOCK_EN_A::VALUE1) + self.variant(SdclockEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SDCLOCK_EN_A::VALUE2) + self.variant(SdclockEn::Value2) } } -#[doc = "Field `SDCLK_FREQ_SEL` reader - SDCLK Frequency Select"] -pub type SDCLK_FREQ_SEL_R = crate::FieldReader; #[doc = "SDCLK Frequency Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SDCLK_FREQ_SEL_A { +pub enum SdclkFreqSel { #[doc = "0: base clock(10MHz-63MHz)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: base clock divided by 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "16: base clock divided by 32"] - VALUE3 = 16, + Value3 = 16, #[doc = "2: base clock divided by 4"] - VALUE4 = 2, + Value4 = 2, #[doc = "4: base clock divided by 8"] - VALUE5 = 4, + Value5 = 4, #[doc = "8: base clock divided by 16"] - VALUE6 = 8, + Value6 = 8, #[doc = "32: base clock divided by 64"] - VALUE7 = 32, + Value7 = 32, #[doc = "64: base clock divided by 128"] - VALUE8 = 64, + Value8 = 64, #[doc = "128: base clock divided by 256"] - VALUE9 = 128, + Value9 = 128, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SDCLK_FREQ_SEL_A) -> Self { + fn from(variant: SdclkFreqSel) -> Self { variant as _ } } -impl crate::FieldSpec for SDCLK_FREQ_SEL_A { +impl crate::FieldSpec for SdclkFreqSel { type Ux = u8; } -impl SDCLK_FREQ_SEL_R { +#[doc = "Field `SDCLK_FREQ_SEL` reader - SDCLK Frequency Select"] +pub type SdclkFreqSelR = crate::FieldReader; +impl SdclkFreqSelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SDCLK_FREQ_SEL_A::VALUE1), - 1 => Some(SDCLK_FREQ_SEL_A::VALUE2), - 16 => Some(SDCLK_FREQ_SEL_A::VALUE3), - 2 => Some(SDCLK_FREQ_SEL_A::VALUE4), - 4 => Some(SDCLK_FREQ_SEL_A::VALUE5), - 8 => Some(SDCLK_FREQ_SEL_A::VALUE6), - 32 => Some(SDCLK_FREQ_SEL_A::VALUE7), - 64 => Some(SDCLK_FREQ_SEL_A::VALUE8), - 128 => Some(SDCLK_FREQ_SEL_A::VALUE9), + 0 => Some(SdclkFreqSel::Value1), + 1 => Some(SdclkFreqSel::Value2), + 16 => Some(SdclkFreqSel::Value3), + 2 => Some(SdclkFreqSel::Value4), + 4 => Some(SdclkFreqSel::Value5), + 8 => Some(SdclkFreqSel::Value6), + 32 => Some(SdclkFreqSel::Value7), + 64 => Some(SdclkFreqSel::Value8), + 128 => Some(SdclkFreqSel::Value9), _ => None, } } #[doc = "base clock(10MHz-63MHz)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE1 + *self == SdclkFreqSel::Value1 } #[doc = "base clock divided by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE2 + *self == SdclkFreqSel::Value2 } #[doc = "base clock divided by 32"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE3 + *self == SdclkFreqSel::Value3 } #[doc = "base clock divided by 4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE4 + *self == SdclkFreqSel::Value4 } #[doc = "base clock divided by 8"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE5 + *self == SdclkFreqSel::Value5 } #[doc = "base clock divided by 16"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE6 + *self == SdclkFreqSel::Value6 } #[doc = "base clock divided by 64"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE7 + *self == SdclkFreqSel::Value7 } #[doc = "base clock divided by 128"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE8 + *self == SdclkFreqSel::Value8 } #[doc = "base clock divided by 256"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == SDCLK_FREQ_SEL_A::VALUE9 + *self == SdclkFreqSel::Value9 } } #[doc = "Field `SDCLK_FREQ_SEL` writer - SDCLK Frequency Select"] -pub type SDCLK_FREQ_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SDCLK_FREQ_SEL_A>; -impl<'a, REG> SDCLK_FREQ_SEL_W<'a, REG> +pub type SdclkFreqSelW<'a, REG> = crate::FieldWriter<'a, REG, 8, SdclkFreqSel>; +impl<'a, REG> SdclkFreqSelW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -251,114 +251,105 @@ where #[doc = "base clock(10MHz-63MHz)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE1) + self.variant(SdclkFreqSel::Value1) } #[doc = "base clock divided by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE2) + self.variant(SdclkFreqSel::Value2) } #[doc = "base clock divided by 32"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE3) + self.variant(SdclkFreqSel::Value3) } #[doc = "base clock divided by 4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE4) + self.variant(SdclkFreqSel::Value4) } #[doc = "base clock divided by 8"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE5) + self.variant(SdclkFreqSel::Value5) } #[doc = "base clock divided by 16"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE6) + self.variant(SdclkFreqSel::Value6) } #[doc = "base clock divided by 64"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE7) + self.variant(SdclkFreqSel::Value7) } #[doc = "base clock divided by 128"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE8) + self.variant(SdclkFreqSel::Value8) } #[doc = "base clock divided by 256"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(SDCLK_FREQ_SEL_A::VALUE9) + self.variant(SdclkFreqSel::Value9) } } impl R { #[doc = "Bit 0 - Internal Clock Enable"] #[inline(always)] - pub fn internal_clock_en(&self) -> INTERNAL_CLOCK_EN_R { - INTERNAL_CLOCK_EN_R::new((self.bits & 1) != 0) + pub fn internal_clock_en(&self) -> InternalClockEnR { + InternalClockEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Internal Clock Stable"] #[inline(always)] - pub fn internal_clock_stable(&self) -> INTERNAL_CLOCK_STABLE_R { - INTERNAL_CLOCK_STABLE_R::new(((self.bits >> 1) & 1) != 0) + pub fn internal_clock_stable(&self) -> InternalClockStableR { + InternalClockStableR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - SD Clock Enable"] #[inline(always)] - pub fn sdclock_en(&self) -> SDCLOCK_EN_R { - SDCLOCK_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn sdclock_en(&self) -> SdclockEnR { + SdclockEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 8:15 - SDCLK Frequency Select"] #[inline(always)] - pub fn sdclk_freq_sel(&self) -> SDCLK_FREQ_SEL_R { - SDCLK_FREQ_SEL_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn sdclk_freq_sel(&self) -> SdclkFreqSelR { + SdclkFreqSelR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Internal Clock Enable"] #[inline(always)] #[must_use] - pub fn internal_clock_en(&mut self) -> INTERNAL_CLOCK_EN_W { - INTERNAL_CLOCK_EN_W::new(self, 0) + pub fn internal_clock_en(&mut self) -> InternalClockEnW { + InternalClockEnW::new(self, 0) } #[doc = "Bit 2 - SD Clock Enable"] #[inline(always)] #[must_use] - pub fn sdclock_en(&mut self) -> SDCLOCK_EN_W { - SDCLOCK_EN_W::new(self, 2) + pub fn sdclock_en(&mut self) -> SdclockEnW { + SdclockEnW::new(self, 2) } #[doc = "Bits 8:15 - SDCLK Frequency Select"] #[inline(always)] #[must_use] - pub fn sdclk_freq_sel(&mut self) -> SDCLK_FREQ_SEL_W { - SDCLK_FREQ_SEL_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn sdclk_freq_sel(&mut self) -> SdclkFreqSelW { + SdclkFreqSelW::new(self, 8) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLOCK_CTRL_SPEC; -impl crate::RegisterSpec for CLOCK_CTRL_SPEC { +pub struct ClockCtrlSpec; +impl crate::RegisterSpec for ClockCtrlSpec { type Ux = u16; } #[doc = "`read()` method returns [`clock_ctrl::R`](R) reader structure"] -impl crate::Readable for CLOCK_CTRL_SPEC {} +impl crate::Readable for ClockCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`clock_ctrl::W`](W) writer structure"] -impl crate::Writable for CLOCK_CTRL_SPEC { +impl crate::Writable for ClockCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets CLOCK_CTRL to value 0"] -impl crate::Resettable for CLOCK_CTRL_SPEC { +impl crate::Resettable for ClockCtrlSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/command.rs b/src/sdmmc/command.rs index b031a2ae..7c4ec8a7 100644 --- a/src/sdmmc/command.rs +++ b/src/sdmmc/command.rs @@ -1,67 +1,67 @@ #[doc = "Register `COMMAND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `COMMAND` writer"] -pub type W = crate::W; -#[doc = "Field `RESP_TYPE_SELECT` reader - Response Type Select"] -pub type RESP_TYPE_SELECT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Response Type Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RESP_TYPE_SELECT_A { +pub enum RespTypeSelect { #[doc = "0: No Response"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Response length 136"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Response length 48"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Response length 48 check Busy after response"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RESP_TYPE_SELECT_A) -> Self { + fn from(variant: RespTypeSelect) -> Self { variant as _ } } -impl crate::FieldSpec for RESP_TYPE_SELECT_A { +impl crate::FieldSpec for RespTypeSelect { type Ux = u8; } -impl RESP_TYPE_SELECT_R { +#[doc = "Field `RESP_TYPE_SELECT` reader - Response Type Select"] +pub type RespTypeSelectR = crate::FieldReader; +impl RespTypeSelectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESP_TYPE_SELECT_A { + pub const fn variant(&self) -> RespTypeSelect { match self.bits { - 0 => RESP_TYPE_SELECT_A::VALUE1, - 1 => RESP_TYPE_SELECT_A::VALUE2, - 2 => RESP_TYPE_SELECT_A::VALUE3, - 3 => RESP_TYPE_SELECT_A::VALUE4, + 0 => RespTypeSelect::Value1, + 1 => RespTypeSelect::Value2, + 2 => RespTypeSelect::Value3, + 3 => RespTypeSelect::Value4, _ => unreachable!(), } } #[doc = "No Response"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESP_TYPE_SELECT_A::VALUE1 + *self == RespTypeSelect::Value1 } #[doc = "Response length 136"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESP_TYPE_SELECT_A::VALUE2 + *self == RespTypeSelect::Value2 } #[doc = "Response length 48"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RESP_TYPE_SELECT_A::VALUE3 + *self == RespTypeSelect::Value3 } #[doc = "Response length 48 check Busy after response"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RESP_TYPE_SELECT_A::VALUE4 + *self == RespTypeSelect::Value4 } } #[doc = "Field `RESP_TYPE_SELECT` writer - Response Type Select"] -pub type RESP_TYPE_SELECT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RESP_TYPE_SELECT_A>; -impl<'a, REG> RESP_TYPE_SELECT_W<'a, REG> +pub type RespTypeSelectW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RespTypeSelect>; +impl<'a, REG> RespTypeSelectW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,243 +69,243 @@ where #[doc = "No Response"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESP_TYPE_SELECT_A::VALUE1) + self.variant(RespTypeSelect::Value1) } #[doc = "Response length 136"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESP_TYPE_SELECT_A::VALUE2) + self.variant(RespTypeSelect::Value2) } #[doc = "Response length 48"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RESP_TYPE_SELECT_A::VALUE3) + self.variant(RespTypeSelect::Value3) } #[doc = "Response length 48 check Busy after response"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RESP_TYPE_SELECT_A::VALUE4) + self.variant(RespTypeSelect::Value4) } } -#[doc = "Field `CMD_CRC_CHECK_EN` reader - Command CRC Check Enable"] -pub type CMD_CRC_CHECK_EN_R = crate::BitReader; #[doc = "Command CRC Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_CRC_CHECK_EN_A { +pub enum CmdCrcCheckEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_CRC_CHECK_EN_A) -> Self { + fn from(variant: CmdCrcCheckEn) -> Self { variant as u8 != 0 } } -impl CMD_CRC_CHECK_EN_R { +#[doc = "Field `CMD_CRC_CHECK_EN` reader - Command CRC Check Enable"] +pub type CmdCrcCheckEnR = crate::BitReader; +impl CmdCrcCheckEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_CRC_CHECK_EN_A { + pub const fn variant(&self) -> CmdCrcCheckEn { match self.bits { - false => CMD_CRC_CHECK_EN_A::VALUE1, - true => CMD_CRC_CHECK_EN_A::VALUE2, + false => CmdCrcCheckEn::Value1, + true => CmdCrcCheckEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_CRC_CHECK_EN_A::VALUE1 + *self == CmdCrcCheckEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_CRC_CHECK_EN_A::VALUE2 + *self == CmdCrcCheckEn::Value2 } } #[doc = "Field `CMD_CRC_CHECK_EN` writer - Command CRC Check Enable"] -pub type CMD_CRC_CHECK_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_CRC_CHECK_EN_A>; -impl<'a, REG> CMD_CRC_CHECK_EN_W<'a, REG> +pub type CmdCrcCheckEnW<'a, REG> = crate::BitWriter<'a, REG, CmdCrcCheckEn>; +impl<'a, REG> CmdCrcCheckEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_CRC_CHECK_EN_A::VALUE1) + self.variant(CmdCrcCheckEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_CRC_CHECK_EN_A::VALUE2) + self.variant(CmdCrcCheckEn::Value2) } } -#[doc = "Field `CMD_IND_CHECK_EN` reader - Command Index Check Enable"] -pub type CMD_IND_CHECK_EN_R = crate::BitReader; #[doc = "Command Index Check Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_IND_CHECK_EN_A { +pub enum CmdIndCheckEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_IND_CHECK_EN_A) -> Self { + fn from(variant: CmdIndCheckEn) -> Self { variant as u8 != 0 } } -impl CMD_IND_CHECK_EN_R { +#[doc = "Field `CMD_IND_CHECK_EN` reader - Command Index Check Enable"] +pub type CmdIndCheckEnR = crate::BitReader; +impl CmdIndCheckEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_IND_CHECK_EN_A { + pub const fn variant(&self) -> CmdIndCheckEn { match self.bits { - false => CMD_IND_CHECK_EN_A::VALUE1, - true => CMD_IND_CHECK_EN_A::VALUE2, + false => CmdIndCheckEn::Value1, + true => CmdIndCheckEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_IND_CHECK_EN_A::VALUE1 + *self == CmdIndCheckEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_IND_CHECK_EN_A::VALUE2 + *self == CmdIndCheckEn::Value2 } } #[doc = "Field `CMD_IND_CHECK_EN` writer - Command Index Check Enable"] -pub type CMD_IND_CHECK_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_IND_CHECK_EN_A>; -impl<'a, REG> CMD_IND_CHECK_EN_W<'a, REG> +pub type CmdIndCheckEnW<'a, REG> = crate::BitWriter<'a, REG, CmdIndCheckEn>; +impl<'a, REG> CmdIndCheckEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_IND_CHECK_EN_A::VALUE1) + self.variant(CmdIndCheckEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_IND_CHECK_EN_A::VALUE2) + self.variant(CmdIndCheckEn::Value2) } } -#[doc = "Field `DATA_PRESENT_SELECT` reader - Data Present Select"] -pub type DATA_PRESENT_SELECT_R = crate::BitReader; #[doc = "Data Present Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_PRESENT_SELECT_A { +pub enum DataPresentSelect { #[doc = "0: No Data Present"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data Present"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_PRESENT_SELECT_A) -> Self { + fn from(variant: DataPresentSelect) -> Self { variant as u8 != 0 } } -impl DATA_PRESENT_SELECT_R { +#[doc = "Field `DATA_PRESENT_SELECT` reader - Data Present Select"] +pub type DataPresentSelectR = crate::BitReader; +impl DataPresentSelectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_PRESENT_SELECT_A { + pub const fn variant(&self) -> DataPresentSelect { match self.bits { - false => DATA_PRESENT_SELECT_A::VALUE1, - true => DATA_PRESENT_SELECT_A::VALUE2, + false => DataPresentSelect::Value1, + true => DataPresentSelect::Value2, } } #[doc = "No Data Present"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_PRESENT_SELECT_A::VALUE1 + *self == DataPresentSelect::Value1 } #[doc = "Data Present"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_PRESENT_SELECT_A::VALUE2 + *self == DataPresentSelect::Value2 } } #[doc = "Field `DATA_PRESENT_SELECT` writer - Data Present Select"] -pub type DATA_PRESENT_SELECT_W<'a, REG> = crate::BitWriter<'a, REG, DATA_PRESENT_SELECT_A>; -impl<'a, REG> DATA_PRESENT_SELECT_W<'a, REG> +pub type DataPresentSelectW<'a, REG> = crate::BitWriter<'a, REG, DataPresentSelect>; +impl<'a, REG> DataPresentSelectW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Data Present"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_PRESENT_SELECT_A::VALUE1) + self.variant(DataPresentSelect::Value1) } #[doc = "Data Present"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_PRESENT_SELECT_A::VALUE2) + self.variant(DataPresentSelect::Value2) } } -#[doc = "Field `CMD_TYPE` reader - Command Type"] -pub type CMD_TYPE_R = crate::FieldReader; #[doc = "Command Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMD_TYPE_A { +pub enum CmdType { #[doc = "0: Normal"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Suspend"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Resume"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Abort"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMD_TYPE_A) -> Self { + fn from(variant: CmdType) -> Self { variant as _ } } -impl crate::FieldSpec for CMD_TYPE_A { +impl crate::FieldSpec for CmdType { type Ux = u8; } -impl CMD_TYPE_R { +#[doc = "Field `CMD_TYPE` reader - Command Type"] +pub type CmdTypeR = crate::FieldReader; +impl CmdTypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_TYPE_A { + pub const fn variant(&self) -> CmdType { match self.bits { - 0 => CMD_TYPE_A::VALUE1, - 1 => CMD_TYPE_A::VALUE2, - 2 => CMD_TYPE_A::VALUE3, - 3 => CMD_TYPE_A::VALUE4, + 0 => CmdType::Value1, + 1 => CmdType::Value2, + 2 => CmdType::Value3, + 3 => CmdType::Value4, _ => unreachable!(), } } #[doc = "Normal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_TYPE_A::VALUE1 + *self == CmdType::Value1 } #[doc = "Suspend"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_TYPE_A::VALUE2 + *self == CmdType::Value2 } #[doc = "Resume"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMD_TYPE_A::VALUE3 + *self == CmdType::Value3 } #[doc = "Abort"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CMD_TYPE_A::VALUE4 + *self == CmdType::Value4 } } #[doc = "Field `CMD_TYPE` writer - Command Type"] -pub type CMD_TYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CMD_TYPE_A>; -impl<'a, REG> CMD_TYPE_W<'a, REG> +pub type CmdTypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CmdType>; +impl<'a, REG> CmdTypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -313,121 +313,112 @@ where #[doc = "Normal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_TYPE_A::VALUE1) + self.variant(CmdType::Value1) } #[doc = "Suspend"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_TYPE_A::VALUE2) + self.variant(CmdType::Value2) } #[doc = "Resume"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMD_TYPE_A::VALUE3) + self.variant(CmdType::Value3) } #[doc = "Abort"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CMD_TYPE_A::VALUE4) + self.variant(CmdType::Value4) } } #[doc = "Field `CMD_IND` reader - Command Index"] -pub type CMD_IND_R = crate::FieldReader; +pub type CmdIndR = crate::FieldReader; #[doc = "Field `CMD_IND` writer - Command Index"] -pub type CMD_IND_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type CmdIndW<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:1 - Response Type Select"] #[inline(always)] - pub fn resp_type_select(&self) -> RESP_TYPE_SELECT_R { - RESP_TYPE_SELECT_R::new((self.bits & 3) as u8) + pub fn resp_type_select(&self) -> RespTypeSelectR { + RespTypeSelectR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Command CRC Check Enable"] #[inline(always)] - pub fn cmd_crc_check_en(&self) -> CMD_CRC_CHECK_EN_R { - CMD_CRC_CHECK_EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd_crc_check_en(&self) -> CmdCrcCheckEnR { + CmdCrcCheckEnR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Command Index Check Enable"] #[inline(always)] - pub fn cmd_ind_check_en(&self) -> CMD_IND_CHECK_EN_R { - CMD_IND_CHECK_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn cmd_ind_check_en(&self) -> CmdIndCheckEnR { + CmdIndCheckEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Data Present Select"] #[inline(always)] - pub fn data_present_select(&self) -> DATA_PRESENT_SELECT_R { - DATA_PRESENT_SELECT_R::new(((self.bits >> 5) & 1) != 0) + pub fn data_present_select(&self) -> DataPresentSelectR { + DataPresentSelectR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Command Type"] #[inline(always)] - pub fn cmd_type(&self) -> CMD_TYPE_R { - CMD_TYPE_R::new(((self.bits >> 6) & 3) as u8) + pub fn cmd_type(&self) -> CmdTypeR { + CmdTypeR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:13 - Command Index"] #[inline(always)] - pub fn cmd_ind(&self) -> CMD_IND_R { - CMD_IND_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn cmd_ind(&self) -> CmdIndR { + CmdIndR::new(((self.bits >> 8) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:1 - Response Type Select"] #[inline(always)] #[must_use] - pub fn resp_type_select(&mut self) -> RESP_TYPE_SELECT_W { - RESP_TYPE_SELECT_W::new(self, 0) + pub fn resp_type_select(&mut self) -> RespTypeSelectW { + RespTypeSelectW::new(self, 0) } #[doc = "Bit 3 - Command CRC Check Enable"] #[inline(always)] #[must_use] - pub fn cmd_crc_check_en(&mut self) -> CMD_CRC_CHECK_EN_W { - CMD_CRC_CHECK_EN_W::new(self, 3) + pub fn cmd_crc_check_en(&mut self) -> CmdCrcCheckEnW { + CmdCrcCheckEnW::new(self, 3) } #[doc = "Bit 4 - Command Index Check Enable"] #[inline(always)] #[must_use] - pub fn cmd_ind_check_en(&mut self) -> CMD_IND_CHECK_EN_W { - CMD_IND_CHECK_EN_W::new(self, 4) + pub fn cmd_ind_check_en(&mut self) -> CmdIndCheckEnW { + CmdIndCheckEnW::new(self, 4) } #[doc = "Bit 5 - Data Present Select"] #[inline(always)] #[must_use] - pub fn data_present_select(&mut self) -> DATA_PRESENT_SELECT_W { - DATA_PRESENT_SELECT_W::new(self, 5) + pub fn data_present_select(&mut self) -> DataPresentSelectW { + DataPresentSelectW::new(self, 5) } #[doc = "Bits 6:7 - Command Type"] #[inline(always)] #[must_use] - pub fn cmd_type(&mut self) -> CMD_TYPE_W { - CMD_TYPE_W::new(self, 6) + pub fn cmd_type(&mut self) -> CmdTypeW { + CmdTypeW::new(self, 6) } #[doc = "Bits 8:13 - Command Index"] #[inline(always)] #[must_use] - pub fn cmd_ind(&mut self) -> CMD_IND_W { - CMD_IND_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn cmd_ind(&mut self) -> CmdIndW { + CmdIndW::new(self, 8) } } #[doc = "Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`command::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`command::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct COMMAND_SPEC; -impl crate::RegisterSpec for COMMAND_SPEC { +pub struct CommandSpec; +impl crate::RegisterSpec for CommandSpec { type Ux = u16; } #[doc = "`read()` method returns [`command::R`](R) reader structure"] -impl crate::Readable for COMMAND_SPEC {} +impl crate::Readable for CommandSpec {} #[doc = "`write(|w| ..)` method takes [`command::W`](W) writer structure"] -impl crate::Writable for COMMAND_SPEC { +impl crate::Writable for CommandSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets COMMAND to value 0"] -impl crate::Resettable for COMMAND_SPEC { +impl crate::Resettable for CommandSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/data_buffer.rs b/src/sdmmc/data_buffer.rs index 1b15af16..03afdd60 100644 --- a/src/sdmmc/data_buffer.rs +++ b/src/sdmmc/data_buffer.rs @@ -1,49 +1,40 @@ #[doc = "Register `DATA_BUFFER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DATA_BUFFER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA_BUFFER` reader - Data Buffer"] -pub type DATA_BUFFER_R = crate::FieldReader; +pub type DataBufferR = crate::FieldReader; #[doc = "Field `DATA_BUFFER` writer - Data Buffer"] -pub type DATA_BUFFER_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DataBufferW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Data Buffer"] #[inline(always)] - pub fn data_buffer(&self) -> DATA_BUFFER_R { - DATA_BUFFER_R::new(self.bits) + pub fn data_buffer(&self) -> DataBufferR { + DataBufferR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Data Buffer"] #[inline(always)] #[must_use] - pub fn data_buffer(&mut self) -> DATA_BUFFER_W { - DATA_BUFFER_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn data_buffer(&mut self) -> DataBufferW { + DataBufferW::new(self, 0) } } #[doc = "Data Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data_buffer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data_buffer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DATA_BUFFER_SPEC; -impl crate::RegisterSpec for DATA_BUFFER_SPEC { +pub struct DataBufferSpec; +impl crate::RegisterSpec for DataBufferSpec { type Ux = u32; } #[doc = "`read()` method returns [`data_buffer::R`](R) reader structure"] -impl crate::Readable for DATA_BUFFER_SPEC {} +impl crate::Readable for DataBufferSpec {} #[doc = "`write(|w| ..)` method takes [`data_buffer::W`](W) writer structure"] -impl crate::Writable for DATA_BUFFER_SPEC { +impl crate::Writable for DataBufferSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DATA_BUFFER to value 0"] -impl crate::Resettable for DATA_BUFFER_SPEC { +impl crate::Resettable for DataBufferSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/debug_sel.rs b/src/sdmmc/debug_sel.rs index ec1c2f7e..f633aeeb 100644 --- a/src/sdmmc/debug_sel.rs +++ b/src/sdmmc/debug_sel.rs @@ -1,65 +1,56 @@ #[doc = "Register `DEBUG_SEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Debug_sel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEBUG_SEL_AW { +pub enum DebugSel { #[doc = "0: receiver module and fifo_ctrl module signals are probed out"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: cmd register, Interrupt status, transmitter module and clk sdcard signals are probed out."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEBUG_SEL_AW) -> Self { + fn from(variant: DebugSel) -> Self { variant as u8 != 0 } } #[doc = "Field `DEBUG_SEL` writer - Debug_sel"] -pub type DEBUG_SEL_W<'a, REG> = crate::BitWriter<'a, REG, DEBUG_SEL_AW>; -impl<'a, REG> DEBUG_SEL_W<'a, REG> +pub type DebugSelW<'a, REG> = crate::BitWriter<'a, REG, DebugSel>; +impl<'a, REG> DebugSelW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "receiver module and fifo_ctrl module signals are probed out"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DEBUG_SEL_AW::VALUE1) + self.variant(DebugSel::Value1) } #[doc = "cmd register, Interrupt status, transmitter module and clk sdcard signals are probed out."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DEBUG_SEL_AW::VALUE2) + self.variant(DebugSel::Value2) } } impl W { #[doc = "Bit 0 - Debug_sel"] #[inline(always)] #[must_use] - pub fn debug_sel(&mut self) -> DEBUG_SEL_W { - DEBUG_SEL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn debug_sel(&mut self) -> DebugSelW { + DebugSelW::new(self, 0) } } #[doc = "Debug Selection Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`debug_sel::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DEBUG_SEL_SPEC; -impl crate::RegisterSpec for DEBUG_SEL_SPEC { +pub struct DebugSelSpec; +impl crate::RegisterSpec for DebugSelSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`debug_sel::W`](W) writer structure"] -impl crate::Writable for DEBUG_SEL_SPEC { +impl crate::Writable for DebugSelSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DEBUG_SEL to value 0"] -impl crate::Resettable for DEBUG_SEL_SPEC { +impl crate::Resettable for DebugSelSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/en_int_signal_err.rs b/src/sdmmc/en_int_signal_err.rs index ade71175..4c598dec 100644 --- a/src/sdmmc/en_int_signal_err.rs +++ b/src/sdmmc/en_int_signal_err.rs @@ -1,738 +1,729 @@ #[doc = "Register `EN_INT_SIGNAL_ERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EN_INT_SIGNAL_ERR` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_TIMEOUT_ERR_EN` reader - Command Timeout Error Signal Enable"] -pub type CMD_TIMEOUT_ERR_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Timeout Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_TIMEOUT_ERR_EN_A { +pub enum CmdTimeoutErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_TIMEOUT_ERR_EN_A) -> Self { + fn from(variant: CmdTimeoutErrEn) -> Self { variant as u8 != 0 } } -impl CMD_TIMEOUT_ERR_EN_R { +#[doc = "Field `CMD_TIMEOUT_ERR_EN` reader - Command Timeout Error Signal Enable"] +pub type CmdTimeoutErrEnR = crate::BitReader; +impl CmdTimeoutErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_TIMEOUT_ERR_EN_A { + pub const fn variant(&self) -> CmdTimeoutErrEn { match self.bits { - false => CMD_TIMEOUT_ERR_EN_A::VALUE1, - true => CMD_TIMEOUT_ERR_EN_A::VALUE2, + false => CmdTimeoutErrEn::Value1, + true => CmdTimeoutErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_TIMEOUT_ERR_EN_A::VALUE1 + *self == CmdTimeoutErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_TIMEOUT_ERR_EN_A::VALUE2 + *self == CmdTimeoutErrEn::Value2 } } #[doc = "Field `CMD_TIMEOUT_ERR_EN` writer - Command Timeout Error Signal Enable"] -pub type CMD_TIMEOUT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_TIMEOUT_ERR_EN_A>; -impl<'a, REG> CMD_TIMEOUT_ERR_EN_W<'a, REG> +pub type CmdTimeoutErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdTimeoutErrEn>; +impl<'a, REG> CmdTimeoutErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_EN_A::VALUE1) + self.variant(CmdTimeoutErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_EN_A::VALUE2) + self.variant(CmdTimeoutErrEn::Value2) } } -#[doc = "Field `CMD_CRC_ERR_EN` reader - Command CRC Error Signal Enable"] -pub type CMD_CRC_ERR_EN_R = crate::BitReader; #[doc = "Command CRC Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_CRC_ERR_EN_A { +pub enum CmdCrcErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_CRC_ERR_EN_A) -> Self { + fn from(variant: CmdCrcErrEn) -> Self { variant as u8 != 0 } } -impl CMD_CRC_ERR_EN_R { +#[doc = "Field `CMD_CRC_ERR_EN` reader - Command CRC Error Signal Enable"] +pub type CmdCrcErrEnR = crate::BitReader; +impl CmdCrcErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_CRC_ERR_EN_A { + pub const fn variant(&self) -> CmdCrcErrEn { match self.bits { - false => CMD_CRC_ERR_EN_A::VALUE1, - true => CMD_CRC_ERR_EN_A::VALUE2, + false => CmdCrcErrEn::Value1, + true => CmdCrcErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_CRC_ERR_EN_A::VALUE1 + *self == CmdCrcErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_CRC_ERR_EN_A::VALUE2 + *self == CmdCrcErrEn::Value2 } } #[doc = "Field `CMD_CRC_ERR_EN` writer - Command CRC Error Signal Enable"] -pub type CMD_CRC_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_CRC_ERR_EN_A>; -impl<'a, REG> CMD_CRC_ERR_EN_W<'a, REG> +pub type CmdCrcErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdCrcErrEn>; +impl<'a, REG> CmdCrcErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_EN_A::VALUE1) + self.variant(CmdCrcErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_EN_A::VALUE2) + self.variant(CmdCrcErrEn::Value2) } } -#[doc = "Field `CMD_END_BIT_ERR_EN` reader - Command End Bit Error Signal Enable"] -pub type CMD_END_BIT_ERR_EN_R = crate::BitReader; #[doc = "Command End Bit Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_END_BIT_ERR_EN_A { +pub enum CmdEndBitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_END_BIT_ERR_EN_A) -> Self { + fn from(variant: CmdEndBitErrEn) -> Self { variant as u8 != 0 } } -impl CMD_END_BIT_ERR_EN_R { +#[doc = "Field `CMD_END_BIT_ERR_EN` reader - Command End Bit Error Signal Enable"] +pub type CmdEndBitErrEnR = crate::BitReader; +impl CmdEndBitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_END_BIT_ERR_EN_A { + pub const fn variant(&self) -> CmdEndBitErrEn { match self.bits { - false => CMD_END_BIT_ERR_EN_A::VALUE1, - true => CMD_END_BIT_ERR_EN_A::VALUE2, + false => CmdEndBitErrEn::Value1, + true => CmdEndBitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_END_BIT_ERR_EN_A::VALUE1 + *self == CmdEndBitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_END_BIT_ERR_EN_A::VALUE2 + *self == CmdEndBitErrEn::Value2 } } #[doc = "Field `CMD_END_BIT_ERR_EN` writer - Command End Bit Error Signal Enable"] -pub type CMD_END_BIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_END_BIT_ERR_EN_A>; -impl<'a, REG> CMD_END_BIT_ERR_EN_W<'a, REG> +pub type CmdEndBitErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdEndBitErrEn>; +impl<'a, REG> CmdEndBitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_EN_A::VALUE1) + self.variant(CmdEndBitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_EN_A::VALUE2) + self.variant(CmdEndBitErrEn::Value2) } } -#[doc = "Field `CMD_IND_ERR_EN` reader - Command Index Error Signal Enable"] -pub type CMD_IND_ERR_EN_R = crate::BitReader; #[doc = "Command Index Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_IND_ERR_EN_A { +pub enum CmdIndErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_IND_ERR_EN_A) -> Self { + fn from(variant: CmdIndErrEn) -> Self { variant as u8 != 0 } } -impl CMD_IND_ERR_EN_R { +#[doc = "Field `CMD_IND_ERR_EN` reader - Command Index Error Signal Enable"] +pub type CmdIndErrEnR = crate::BitReader; +impl CmdIndErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_IND_ERR_EN_A { + pub const fn variant(&self) -> CmdIndErrEn { match self.bits { - false => CMD_IND_ERR_EN_A::VALUE1, - true => CMD_IND_ERR_EN_A::VALUE2, + false => CmdIndErrEn::Value1, + true => CmdIndErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_IND_ERR_EN_A::VALUE1 + *self == CmdIndErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_IND_ERR_EN_A::VALUE2 + *self == CmdIndErrEn::Value2 } } #[doc = "Field `CMD_IND_ERR_EN` writer - Command Index Error Signal Enable"] -pub type CMD_IND_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_IND_ERR_EN_A>; -impl<'a, REG> CMD_IND_ERR_EN_W<'a, REG> +pub type CmdIndErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdIndErrEn>; +impl<'a, REG> CmdIndErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_EN_A::VALUE1) + self.variant(CmdIndErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_EN_A::VALUE2) + self.variant(CmdIndErrEn::Value2) } } -#[doc = "Field `DATA_TIMEOUT_ERR_EN` reader - Data Timeout Error Signal Enable"] -pub type DATA_TIMEOUT_ERR_EN_R = crate::BitReader; #[doc = "Data Timeout Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_TIMEOUT_ERR_EN_A { +pub enum DataTimeoutErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_TIMEOUT_ERR_EN_A) -> Self { + fn from(variant: DataTimeoutErrEn) -> Self { variant as u8 != 0 } } -impl DATA_TIMEOUT_ERR_EN_R { +#[doc = "Field `DATA_TIMEOUT_ERR_EN` reader - Data Timeout Error Signal Enable"] +pub type DataTimeoutErrEnR = crate::BitReader; +impl DataTimeoutErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_TIMEOUT_ERR_EN_A { + pub const fn variant(&self) -> DataTimeoutErrEn { match self.bits { - false => DATA_TIMEOUT_ERR_EN_A::VALUE1, - true => DATA_TIMEOUT_ERR_EN_A::VALUE2, + false => DataTimeoutErrEn::Value1, + true => DataTimeoutErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_TIMEOUT_ERR_EN_A::VALUE1 + *self == DataTimeoutErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_TIMEOUT_ERR_EN_A::VALUE2 + *self == DataTimeoutErrEn::Value2 } } #[doc = "Field `DATA_TIMEOUT_ERR_EN` writer - Data Timeout Error Signal Enable"] -pub type DATA_TIMEOUT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_TIMEOUT_ERR_EN_A>; -impl<'a, REG> DATA_TIMEOUT_ERR_EN_W<'a, REG> +pub type DataTimeoutErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataTimeoutErrEn>; +impl<'a, REG> DataTimeoutErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_EN_A::VALUE1) + self.variant(DataTimeoutErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_EN_A::VALUE2) + self.variant(DataTimeoutErrEn::Value2) } } -#[doc = "Field `DATA_CRC_ERR_EN` reader - Data CRC Error Signal Enable"] -pub type DATA_CRC_ERR_EN_R = crate::BitReader; #[doc = "Data CRC Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_CRC_ERR_EN_A { +pub enum DataCrcErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_CRC_ERR_EN_A) -> Self { + fn from(variant: DataCrcErrEn) -> Self { variant as u8 != 0 } } -impl DATA_CRC_ERR_EN_R { +#[doc = "Field `DATA_CRC_ERR_EN` reader - Data CRC Error Signal Enable"] +pub type DataCrcErrEnR = crate::BitReader; +impl DataCrcErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_CRC_ERR_EN_A { + pub const fn variant(&self) -> DataCrcErrEn { match self.bits { - false => DATA_CRC_ERR_EN_A::VALUE1, - true => DATA_CRC_ERR_EN_A::VALUE2, + false => DataCrcErrEn::Value1, + true => DataCrcErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_CRC_ERR_EN_A::VALUE1 + *self == DataCrcErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_CRC_ERR_EN_A::VALUE2 + *self == DataCrcErrEn::Value2 } } #[doc = "Field `DATA_CRC_ERR_EN` writer - Data CRC Error Signal Enable"] -pub type DATA_CRC_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_CRC_ERR_EN_A>; -impl<'a, REG> DATA_CRC_ERR_EN_W<'a, REG> +pub type DataCrcErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataCrcErrEn>; +impl<'a, REG> DataCrcErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_EN_A::VALUE1) + self.variant(DataCrcErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_EN_A::VALUE2) + self.variant(DataCrcErrEn::Value2) } } -#[doc = "Field `DATA_END_BIT_ERR_EN` reader - Data End Bit Error Signal Enable"] -pub type DATA_END_BIT_ERR_EN_R = crate::BitReader; #[doc = "Data End Bit Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_END_BIT_ERR_EN_A { +pub enum DataEndBitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_END_BIT_ERR_EN_A) -> Self { + fn from(variant: DataEndBitErrEn) -> Self { variant as u8 != 0 } } -impl DATA_END_BIT_ERR_EN_R { +#[doc = "Field `DATA_END_BIT_ERR_EN` reader - Data End Bit Error Signal Enable"] +pub type DataEndBitErrEnR = crate::BitReader; +impl DataEndBitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_END_BIT_ERR_EN_A { + pub const fn variant(&self) -> DataEndBitErrEn { match self.bits { - false => DATA_END_BIT_ERR_EN_A::VALUE1, - true => DATA_END_BIT_ERR_EN_A::VALUE2, + false => DataEndBitErrEn::Value1, + true => DataEndBitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_END_BIT_ERR_EN_A::VALUE1 + *self == DataEndBitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_END_BIT_ERR_EN_A::VALUE2 + *self == DataEndBitErrEn::Value2 } } #[doc = "Field `DATA_END_BIT_ERR_EN` writer - Data End Bit Error Signal Enable"] -pub type DATA_END_BIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_END_BIT_ERR_EN_A>; -impl<'a, REG> DATA_END_BIT_ERR_EN_W<'a, REG> +pub type DataEndBitErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataEndBitErrEn>; +impl<'a, REG> DataEndBitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_EN_A::VALUE1) + self.variant(DataEndBitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_EN_A::VALUE2) + self.variant(DataEndBitErrEn::Value2) } } -#[doc = "Field `CURRENT_LIMIT_ERR_EN` reader - Current Limit Error Signal Enable"] -pub type CURRENT_LIMIT_ERR_EN_R = crate::BitReader; #[doc = "Current Limit Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CURRENT_LIMIT_ERR_EN_A { +pub enum CurrentLimitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CURRENT_LIMIT_ERR_EN_A) -> Self { + fn from(variant: CurrentLimitErrEn) -> Self { variant as u8 != 0 } } -impl CURRENT_LIMIT_ERR_EN_R { +#[doc = "Field `CURRENT_LIMIT_ERR_EN` reader - Current Limit Error Signal Enable"] +pub type CurrentLimitErrEnR = crate::BitReader; +impl CurrentLimitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CURRENT_LIMIT_ERR_EN_A { + pub const fn variant(&self) -> CurrentLimitErrEn { match self.bits { - false => CURRENT_LIMIT_ERR_EN_A::VALUE1, - true => CURRENT_LIMIT_ERR_EN_A::VALUE2, + false => CurrentLimitErrEn::Value1, + true => CurrentLimitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CURRENT_LIMIT_ERR_EN_A::VALUE1 + *self == CurrentLimitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CURRENT_LIMIT_ERR_EN_A::VALUE2 + *self == CurrentLimitErrEn::Value2 } } #[doc = "Field `CURRENT_LIMIT_ERR_EN` writer - Current Limit Error Signal Enable"] -pub type CURRENT_LIMIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CURRENT_LIMIT_ERR_EN_A>; -impl<'a, REG> CURRENT_LIMIT_ERR_EN_W<'a, REG> +pub type CurrentLimitErrEnW<'a, REG> = crate::BitWriter<'a, REG, CurrentLimitErrEn>; +impl<'a, REG> CurrentLimitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_EN_A::VALUE1) + self.variant(CurrentLimitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_EN_A::VALUE2) + self.variant(CurrentLimitErrEn::Value2) } } -#[doc = "Field `ACMD_ERR_EN` reader - Auto CMD12 Error Signal Enable"] -pub type ACMD_ERR_EN_R = crate::BitReader; #[doc = "Auto CMD12 Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_ERR_EN_A { +pub enum AcmdErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_ERR_EN_A) -> Self { + fn from(variant: AcmdErrEn) -> Self { variant as u8 != 0 } } -impl ACMD_ERR_EN_R { +#[doc = "Field `ACMD_ERR_EN` reader - Auto CMD12 Error Signal Enable"] +pub type AcmdErrEnR = crate::BitReader; +impl AcmdErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_ERR_EN_A { + pub const fn variant(&self) -> AcmdErrEn { match self.bits { - false => ACMD_ERR_EN_A::VALUE1, - true => ACMD_ERR_EN_A::VALUE2, + false => AcmdErrEn::Value1, + true => AcmdErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_ERR_EN_A::VALUE1 + *self == AcmdErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_ERR_EN_A::VALUE2 + *self == AcmdErrEn::Value2 } } #[doc = "Field `ACMD_ERR_EN` writer - Auto CMD12 Error Signal Enable"] -pub type ACMD_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, ACMD_ERR_EN_A>; -impl<'a, REG> ACMD_ERR_EN_W<'a, REG> +pub type AcmdErrEnW<'a, REG> = crate::BitWriter<'a, REG, AcmdErrEn>; +impl<'a, REG> AcmdErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_EN_A::VALUE1) + self.variant(AcmdErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_EN_A::VALUE2) + self.variant(AcmdErrEn::Value2) } } -#[doc = "Field `TARGET_RESP_ERR_EN` reader - Target Response Error Signal Enable"] -pub type TARGET_RESP_ERR_EN_R = crate::BitReader; #[doc = "Target Response Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TARGET_RESP_ERR_EN_A { +pub enum TargetRespErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TARGET_RESP_ERR_EN_A) -> Self { + fn from(variant: TargetRespErrEn) -> Self { variant as u8 != 0 } } -impl TARGET_RESP_ERR_EN_R { +#[doc = "Field `TARGET_RESP_ERR_EN` reader - Target Response Error Signal Enable"] +pub type TargetRespErrEnR = crate::BitReader; +impl TargetRespErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TARGET_RESP_ERR_EN_A { + pub const fn variant(&self) -> TargetRespErrEn { match self.bits { - false => TARGET_RESP_ERR_EN_A::VALUE1, - true => TARGET_RESP_ERR_EN_A::VALUE2, + false => TargetRespErrEn::Value1, + true => TargetRespErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TARGET_RESP_ERR_EN_A::VALUE1 + *self == TargetRespErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TARGET_RESP_ERR_EN_A::VALUE2 + *self == TargetRespErrEn::Value2 } } #[doc = "Field `TARGET_RESP_ERR_EN` writer - Target Response Error Signal Enable"] -pub type TARGET_RESP_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, TARGET_RESP_ERR_EN_A>; -impl<'a, REG> TARGET_RESP_ERR_EN_W<'a, REG> +pub type TargetRespErrEnW<'a, REG> = crate::BitWriter<'a, REG, TargetRespErrEn>; +impl<'a, REG> TargetRespErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TARGET_RESP_ERR_EN_A::VALUE1) + self.variant(TargetRespErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TARGET_RESP_ERR_EN_A::VALUE2) + self.variant(TargetRespErrEn::Value2) } } -#[doc = "Field `CEATA_ERR_EN` reader - Ceata Error Signal Enable"] -pub type CEATA_ERR_EN_R = crate::BitReader; #[doc = "Ceata Error Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEATA_ERR_EN_A { +pub enum CeataErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEATA_ERR_EN_A) -> Self { + fn from(variant: CeataErrEn) -> Self { variant as u8 != 0 } } -impl CEATA_ERR_EN_R { +#[doc = "Field `CEATA_ERR_EN` reader - Ceata Error Signal Enable"] +pub type CeataErrEnR = crate::BitReader; +impl CeataErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEATA_ERR_EN_A { + pub const fn variant(&self) -> CeataErrEn { match self.bits { - false => CEATA_ERR_EN_A::VALUE1, - true => CEATA_ERR_EN_A::VALUE2, + false => CeataErrEn::Value1, + true => CeataErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEATA_ERR_EN_A::VALUE1 + *self == CeataErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEATA_ERR_EN_A::VALUE2 + *self == CeataErrEn::Value2 } } #[doc = "Field `CEATA_ERR_EN` writer - Ceata Error Signal Enable"] -pub type CEATA_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CEATA_ERR_EN_A>; -impl<'a, REG> CEATA_ERR_EN_W<'a, REG> +pub type CeataErrEnW<'a, REG> = crate::BitWriter<'a, REG, CeataErrEn>; +impl<'a, REG> CeataErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_EN_A::VALUE1) + self.variant(CeataErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_EN_A::VALUE2) + self.variant(CeataErrEn::Value2) } } impl R { #[doc = "Bit 0 - Command Timeout Error Signal Enable"] #[inline(always)] - pub fn cmd_timeout_err_en(&self) -> CMD_TIMEOUT_ERR_EN_R { - CMD_TIMEOUT_ERR_EN_R::new((self.bits & 1) != 0) + pub fn cmd_timeout_err_en(&self) -> CmdTimeoutErrEnR { + CmdTimeoutErrEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Command CRC Error Signal Enable"] #[inline(always)] - pub fn cmd_crc_err_en(&self) -> CMD_CRC_ERR_EN_R { - CMD_CRC_ERR_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmd_crc_err_en(&self) -> CmdCrcErrEnR { + CmdCrcErrEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Command End Bit Error Signal Enable"] #[inline(always)] - pub fn cmd_end_bit_err_en(&self) -> CMD_END_BIT_ERR_EN_R { - CMD_END_BIT_ERR_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmd_end_bit_err_en(&self) -> CmdEndBitErrEnR { + CmdEndBitErrEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Command Index Error Signal Enable"] #[inline(always)] - pub fn cmd_ind_err_en(&self) -> CMD_IND_ERR_EN_R { - CMD_IND_ERR_EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd_ind_err_en(&self) -> CmdIndErrEnR { + CmdIndErrEnR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Data Timeout Error Signal Enable"] #[inline(always)] - pub fn data_timeout_err_en(&self) -> DATA_TIMEOUT_ERR_EN_R { - DATA_TIMEOUT_ERR_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn data_timeout_err_en(&self) -> DataTimeoutErrEnR { + DataTimeoutErrEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Data CRC Error Signal Enable"] #[inline(always)] - pub fn data_crc_err_en(&self) -> DATA_CRC_ERR_EN_R { - DATA_CRC_ERR_EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn data_crc_err_en(&self) -> DataCrcErrEnR { + DataCrcErrEnR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data End Bit Error Signal Enable"] #[inline(always)] - pub fn data_end_bit_err_en(&self) -> DATA_END_BIT_ERR_EN_R { - DATA_END_BIT_ERR_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn data_end_bit_err_en(&self) -> DataEndBitErrEnR { + DataEndBitErrEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Current Limit Error Signal Enable"] #[inline(always)] - pub fn current_limit_err_en(&self) -> CURRENT_LIMIT_ERR_EN_R { - CURRENT_LIMIT_ERR_EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn current_limit_err_en(&self) -> CurrentLimitErrEnR { + CurrentLimitErrEnR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Auto CMD12 Error Signal Enable"] #[inline(always)] - pub fn acmd_err_en(&self) -> ACMD_ERR_EN_R { - ACMD_ERR_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn acmd_err_en(&self) -> AcmdErrEnR { + AcmdErrEnR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - Target Response Error Signal Enable"] #[inline(always)] - pub fn target_resp_err_en(&self) -> TARGET_RESP_ERR_EN_R { - TARGET_RESP_ERR_EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn target_resp_err_en(&self) -> TargetRespErrEnR { + TargetRespErrEnR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Ceata Error Signal Enable"] #[inline(always)] - pub fn ceata_err_en(&self) -> CEATA_ERR_EN_R { - CEATA_ERR_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn ceata_err_en(&self) -> CeataErrEnR { + CeataErrEnR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Timeout Error Signal Enable"] #[inline(always)] #[must_use] - pub fn cmd_timeout_err_en(&mut self) -> CMD_TIMEOUT_ERR_EN_W { - CMD_TIMEOUT_ERR_EN_W::new(self, 0) + pub fn cmd_timeout_err_en(&mut self) -> CmdTimeoutErrEnW { + CmdTimeoutErrEnW::new(self, 0) } #[doc = "Bit 1 - Command CRC Error Signal Enable"] #[inline(always)] #[must_use] - pub fn cmd_crc_err_en(&mut self) -> CMD_CRC_ERR_EN_W { - CMD_CRC_ERR_EN_W::new(self, 1) + pub fn cmd_crc_err_en(&mut self) -> CmdCrcErrEnW { + CmdCrcErrEnW::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error Signal Enable"] #[inline(always)] #[must_use] - pub fn cmd_end_bit_err_en(&mut self) -> CMD_END_BIT_ERR_EN_W { - CMD_END_BIT_ERR_EN_W::new(self, 2) + pub fn cmd_end_bit_err_en(&mut self) -> CmdEndBitErrEnW { + CmdEndBitErrEnW::new(self, 2) } #[doc = "Bit 3 - Command Index Error Signal Enable"] #[inline(always)] #[must_use] - pub fn cmd_ind_err_en(&mut self) -> CMD_IND_ERR_EN_W { - CMD_IND_ERR_EN_W::new(self, 3) + pub fn cmd_ind_err_en(&mut self) -> CmdIndErrEnW { + CmdIndErrEnW::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error Signal Enable"] #[inline(always)] #[must_use] - pub fn data_timeout_err_en(&mut self) -> DATA_TIMEOUT_ERR_EN_W { - DATA_TIMEOUT_ERR_EN_W::new(self, 4) + pub fn data_timeout_err_en(&mut self) -> DataTimeoutErrEnW { + DataTimeoutErrEnW::new(self, 4) } #[doc = "Bit 5 - Data CRC Error Signal Enable"] #[inline(always)] #[must_use] - pub fn data_crc_err_en(&mut self) -> DATA_CRC_ERR_EN_W { - DATA_CRC_ERR_EN_W::new(self, 5) + pub fn data_crc_err_en(&mut self) -> DataCrcErrEnW { + DataCrcErrEnW::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error Signal Enable"] #[inline(always)] #[must_use] - pub fn data_end_bit_err_en(&mut self) -> DATA_END_BIT_ERR_EN_W { - DATA_END_BIT_ERR_EN_W::new(self, 6) + pub fn data_end_bit_err_en(&mut self) -> DataEndBitErrEnW { + DataEndBitErrEnW::new(self, 6) } #[doc = "Bit 7 - Current Limit Error Signal Enable"] #[inline(always)] #[must_use] - pub fn current_limit_err_en(&mut self) -> CURRENT_LIMIT_ERR_EN_W { - CURRENT_LIMIT_ERR_EN_W::new(self, 7) + pub fn current_limit_err_en(&mut self) -> CurrentLimitErrEnW { + CurrentLimitErrEnW::new(self, 7) } #[doc = "Bit 8 - Auto CMD12 Error Signal Enable"] #[inline(always)] #[must_use] - pub fn acmd_err_en(&mut self) -> ACMD_ERR_EN_W { - ACMD_ERR_EN_W::new(self, 8) + pub fn acmd_err_en(&mut self) -> AcmdErrEnW { + AcmdErrEnW::new(self, 8) } #[doc = "Bit 12 - Target Response Error Signal Enable"] #[inline(always)] #[must_use] - pub fn target_resp_err_en(&mut self) -> TARGET_RESP_ERR_EN_W { - TARGET_RESP_ERR_EN_W::new(self, 12) + pub fn target_resp_err_en(&mut self) -> TargetRespErrEnW { + TargetRespErrEnW::new(self, 12) } #[doc = "Bit 13 - Ceata Error Signal Enable"] #[inline(always)] #[must_use] - pub fn ceata_err_en(&mut self) -> CEATA_ERR_EN_W { - CEATA_ERR_EN_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn ceata_err_en(&mut self) -> CeataErrEnW { + CeataErrEnW::new(self, 13) } } #[doc = "Error Interrupt Signal Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_signal_err::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_signal_err::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EN_INT_SIGNAL_ERR_SPEC; -impl crate::RegisterSpec for EN_INT_SIGNAL_ERR_SPEC { +pub struct EnIntSignalErrSpec; +impl crate::RegisterSpec for EnIntSignalErrSpec { type Ux = u16; } #[doc = "`read()` method returns [`en_int_signal_err::R`](R) reader structure"] -impl crate::Readable for EN_INT_SIGNAL_ERR_SPEC {} +impl crate::Readable for EnIntSignalErrSpec {} #[doc = "`write(|w| ..)` method takes [`en_int_signal_err::W`](W) writer structure"] -impl crate::Writable for EN_INT_SIGNAL_ERR_SPEC { +impl crate::Writable for EnIntSignalErrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets EN_INT_SIGNAL_ERR to value 0"] -impl crate::Resettable for EN_INT_SIGNAL_ERR_SPEC { +impl crate::Resettable for EnIntSignalErrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/en_int_signal_norm.rs b/src/sdmmc/en_int_signal_norm.rs index 192ce3c8..ababc6cf 100644 --- a/src/sdmmc/en_int_signal_norm.rs +++ b/src/sdmmc/en_int_signal_norm.rs @@ -1,553 +1,544 @@ #[doc = "Register `EN_INT_SIGNAL_NORM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EN_INT_SIGNAL_NORM` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_COMPLETE_EN` reader - Command Complete Signal Enable"] -pub type CMD_COMPLETE_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Complete Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_COMPLETE_EN_A { +pub enum CmdCompleteEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_COMPLETE_EN_A) -> Self { + fn from(variant: CmdCompleteEn) -> Self { variant as u8 != 0 } } -impl CMD_COMPLETE_EN_R { +#[doc = "Field `CMD_COMPLETE_EN` reader - Command Complete Signal Enable"] +pub type CmdCompleteEnR = crate::BitReader; +impl CmdCompleteEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_COMPLETE_EN_A { + pub const fn variant(&self) -> CmdCompleteEn { match self.bits { - false => CMD_COMPLETE_EN_A::VALUE1, - true => CMD_COMPLETE_EN_A::VALUE2, + false => CmdCompleteEn::Value1, + true => CmdCompleteEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_COMPLETE_EN_A::VALUE1 + *self == CmdCompleteEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_COMPLETE_EN_A::VALUE2 + *self == CmdCompleteEn::Value2 } } #[doc = "Field `CMD_COMPLETE_EN` writer - Command Complete Signal Enable"] -pub type CMD_COMPLETE_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_COMPLETE_EN_A>; -impl<'a, REG> CMD_COMPLETE_EN_W<'a, REG> +pub type CmdCompleteEnW<'a, REG> = crate::BitWriter<'a, REG, CmdCompleteEn>; +impl<'a, REG> CmdCompleteEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_EN_A::VALUE1) + self.variant(CmdCompleteEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_EN_A::VALUE2) + self.variant(CmdCompleteEn::Value2) } } -#[doc = "Field `TX_COMPLETE_EN` reader - Transfer Complete Signal Enable"] -pub type TX_COMPLETE_EN_R = crate::BitReader; #[doc = "Transfer Complete Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TX_COMPLETE_EN_A { +pub enum TxCompleteEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TX_COMPLETE_EN_A) -> Self { + fn from(variant: TxCompleteEn) -> Self { variant as u8 != 0 } } -impl TX_COMPLETE_EN_R { +#[doc = "Field `TX_COMPLETE_EN` reader - Transfer Complete Signal Enable"] +pub type TxCompleteEnR = crate::BitReader; +impl TxCompleteEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_COMPLETE_EN_A { + pub const fn variant(&self) -> TxCompleteEn { match self.bits { - false => TX_COMPLETE_EN_A::VALUE1, - true => TX_COMPLETE_EN_A::VALUE2, + false => TxCompleteEn::Value1, + true => TxCompleteEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_COMPLETE_EN_A::VALUE1 + *self == TxCompleteEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_COMPLETE_EN_A::VALUE2 + *self == TxCompleteEn::Value2 } } #[doc = "Field `TX_COMPLETE_EN` writer - Transfer Complete Signal Enable"] -pub type TX_COMPLETE_EN_W<'a, REG> = crate::BitWriter<'a, REG, TX_COMPLETE_EN_A>; -impl<'a, REG> TX_COMPLETE_EN_W<'a, REG> +pub type TxCompleteEnW<'a, REG> = crate::BitWriter<'a, REG, TxCompleteEn>; +impl<'a, REG> TxCompleteEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_EN_A::VALUE1) + self.variant(TxCompleteEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_EN_A::VALUE2) + self.variant(TxCompleteEn::Value2) } } -#[doc = "Field `BLOCK_GAP_EVENT_EN` reader - Block Gap Event Signal Enable"] -pub type BLOCK_GAP_EVENT_EN_R = crate::BitReader; #[doc = "Block Gap Event Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLOCK_GAP_EVENT_EN_A { +pub enum BlockGapEventEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLOCK_GAP_EVENT_EN_A) -> Self { + fn from(variant: BlockGapEventEn) -> Self { variant as u8 != 0 } } -impl BLOCK_GAP_EVENT_EN_R { +#[doc = "Field `BLOCK_GAP_EVENT_EN` reader - Block Gap Event Signal Enable"] +pub type BlockGapEventEnR = crate::BitReader; +impl BlockGapEventEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BLOCK_GAP_EVENT_EN_A { + pub const fn variant(&self) -> BlockGapEventEn { match self.bits { - false => BLOCK_GAP_EVENT_EN_A::VALUE1, - true => BLOCK_GAP_EVENT_EN_A::VALUE2, + false => BlockGapEventEn::Value1, + true => BlockGapEventEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BLOCK_GAP_EVENT_EN_A::VALUE1 + *self == BlockGapEventEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BLOCK_GAP_EVENT_EN_A::VALUE2 + *self == BlockGapEventEn::Value2 } } #[doc = "Field `BLOCK_GAP_EVENT_EN` writer - Block Gap Event Signal Enable"] -pub type BLOCK_GAP_EVENT_EN_W<'a, REG> = crate::BitWriter<'a, REG, BLOCK_GAP_EVENT_EN_A>; -impl<'a, REG> BLOCK_GAP_EVENT_EN_W<'a, REG> +pub type BlockGapEventEnW<'a, REG> = crate::BitWriter<'a, REG, BlockGapEventEn>; +impl<'a, REG> BlockGapEventEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_EN_A::VALUE1) + self.variant(BlockGapEventEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_EN_A::VALUE2) + self.variant(BlockGapEventEn::Value2) } } -#[doc = "Field `BUFF_WRITE_READY_EN` reader - Buffer Write Ready Signal Enable"] -pub type BUFF_WRITE_READY_EN_R = crate::BitReader; #[doc = "Buffer Write Ready Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_WRITE_READY_EN_A { +pub enum BuffWriteReadyEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_WRITE_READY_EN_A) -> Self { + fn from(variant: BuffWriteReadyEn) -> Self { variant as u8 != 0 } } -impl BUFF_WRITE_READY_EN_R { +#[doc = "Field `BUFF_WRITE_READY_EN` reader - Buffer Write Ready Signal Enable"] +pub type BuffWriteReadyEnR = crate::BitReader; +impl BuffWriteReadyEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_WRITE_READY_EN_A { + pub const fn variant(&self) -> BuffWriteReadyEn { match self.bits { - false => BUFF_WRITE_READY_EN_A::VALUE1, - true => BUFF_WRITE_READY_EN_A::VALUE2, + false => BuffWriteReadyEn::Value1, + true => BuffWriteReadyEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_WRITE_READY_EN_A::VALUE1 + *self == BuffWriteReadyEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_WRITE_READY_EN_A::VALUE2 + *self == BuffWriteReadyEn::Value2 } } #[doc = "Field `BUFF_WRITE_READY_EN` writer - Buffer Write Ready Signal Enable"] -pub type BUFF_WRITE_READY_EN_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_WRITE_READY_EN_A>; -impl<'a, REG> BUFF_WRITE_READY_EN_W<'a, REG> +pub type BuffWriteReadyEnW<'a, REG> = crate::BitWriter<'a, REG, BuffWriteReadyEn>; +impl<'a, REG> BuffWriteReadyEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_EN_A::VALUE1) + self.variant(BuffWriteReadyEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_EN_A::VALUE2) + self.variant(BuffWriteReadyEn::Value2) } } -#[doc = "Field `BUFF_READ_READY_EN` reader - Buffer Read Ready Signal Enable"] -pub type BUFF_READ_READY_EN_R = crate::BitReader; #[doc = "Buffer Read Ready Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_READ_READY_EN_A { +pub enum BuffReadReadyEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_READ_READY_EN_A) -> Self { + fn from(variant: BuffReadReadyEn) -> Self { variant as u8 != 0 } } -impl BUFF_READ_READY_EN_R { +#[doc = "Field `BUFF_READ_READY_EN` reader - Buffer Read Ready Signal Enable"] +pub type BuffReadReadyEnR = crate::BitReader; +impl BuffReadReadyEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_READ_READY_EN_A { + pub const fn variant(&self) -> BuffReadReadyEn { match self.bits { - false => BUFF_READ_READY_EN_A::VALUE1, - true => BUFF_READ_READY_EN_A::VALUE2, + false => BuffReadReadyEn::Value1, + true => BuffReadReadyEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_READ_READY_EN_A::VALUE1 + *self == BuffReadReadyEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_READ_READY_EN_A::VALUE2 + *self == BuffReadReadyEn::Value2 } } #[doc = "Field `BUFF_READ_READY_EN` writer - Buffer Read Ready Signal Enable"] -pub type BUFF_READ_READY_EN_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_READ_READY_EN_A>; -impl<'a, REG> BUFF_READ_READY_EN_W<'a, REG> +pub type BuffReadReadyEnW<'a, REG> = crate::BitWriter<'a, REG, BuffReadReadyEn>; +impl<'a, REG> BuffReadReadyEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_EN_A::VALUE1) + self.variant(BuffReadReadyEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_EN_A::VALUE2) + self.variant(BuffReadReadyEn::Value2) } } -#[doc = "Field `CARD_INS_EN` reader - Card Insertion Signal Enable"] -pub type CARD_INS_EN_R = crate::BitReader; #[doc = "Card Insertion Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INS_EN_A { +pub enum CardInsEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INS_EN_A) -> Self { + fn from(variant: CardInsEn) -> Self { variant as u8 != 0 } } -impl CARD_INS_EN_R { +#[doc = "Field `CARD_INS_EN` reader - Card Insertion Signal Enable"] +pub type CardInsEnR = crate::BitReader; +impl CardInsEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INS_EN_A { + pub const fn variant(&self) -> CardInsEn { match self.bits { - false => CARD_INS_EN_A::VALUE1, - true => CARD_INS_EN_A::VALUE2, + false => CardInsEn::Value1, + true => CardInsEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INS_EN_A::VALUE1 + *self == CardInsEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INS_EN_A::VALUE2 + *self == CardInsEn::Value2 } } #[doc = "Field `CARD_INS_EN` writer - Card Insertion Signal Enable"] -pub type CARD_INS_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_INS_EN_A>; -impl<'a, REG> CARD_INS_EN_W<'a, REG> +pub type CardInsEnW<'a, REG> = crate::BitWriter<'a, REG, CardInsEn>; +impl<'a, REG> CardInsEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_INS_EN_A::VALUE1) + self.variant(CardInsEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_INS_EN_A::VALUE2) + self.variant(CardInsEn::Value2) } } -#[doc = "Field `CARD_REMOVAL_EN` reader - Card Removal Signal Enable"] -pub type CARD_REMOVAL_EN_R = crate::BitReader; #[doc = "Card Removal Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_REMOVAL_EN_A { +pub enum CardRemovalEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_REMOVAL_EN_A) -> Self { + fn from(variant: CardRemovalEn) -> Self { variant as u8 != 0 } } -impl CARD_REMOVAL_EN_R { +#[doc = "Field `CARD_REMOVAL_EN` reader - Card Removal Signal Enable"] +pub type CardRemovalEnR = crate::BitReader; +impl CardRemovalEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_REMOVAL_EN_A { + pub const fn variant(&self) -> CardRemovalEn { match self.bits { - false => CARD_REMOVAL_EN_A::VALUE1, - true => CARD_REMOVAL_EN_A::VALUE2, + false => CardRemovalEn::Value1, + true => CardRemovalEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_REMOVAL_EN_A::VALUE1 + *self == CardRemovalEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_REMOVAL_EN_A::VALUE2 + *self == CardRemovalEn::Value2 } } #[doc = "Field `CARD_REMOVAL_EN` writer - Card Removal Signal Enable"] -pub type CARD_REMOVAL_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_REMOVAL_EN_A>; -impl<'a, REG> CARD_REMOVAL_EN_W<'a, REG> +pub type CardRemovalEnW<'a, REG> = crate::BitWriter<'a, REG, CardRemovalEn>; +impl<'a, REG> CardRemovalEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_EN_A::VALUE1) + self.variant(CardRemovalEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_EN_A::VALUE2) + self.variant(CardRemovalEn::Value2) } } -#[doc = "Field `CARD_INT_EN` reader - Card Interrupt Signal Enable"] -pub type CARD_INT_EN_R = crate::BitReader; #[doc = "Card Interrupt Signal Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INT_EN_A { +pub enum CardIntEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INT_EN_A) -> Self { + fn from(variant: CardIntEn) -> Self { variant as u8 != 0 } } -impl CARD_INT_EN_R { +#[doc = "Field `CARD_INT_EN` reader - Card Interrupt Signal Enable"] +pub type CardIntEnR = crate::BitReader; +impl CardIntEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INT_EN_A { + pub const fn variant(&self) -> CardIntEn { match self.bits { - false => CARD_INT_EN_A::VALUE1, - true => CARD_INT_EN_A::VALUE2, + false => CardIntEn::Value1, + true => CardIntEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INT_EN_A::VALUE1 + *self == CardIntEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INT_EN_A::VALUE2 + *self == CardIntEn::Value2 } } #[doc = "Field `CARD_INT_EN` writer - Card Interrupt Signal Enable"] -pub type CARD_INT_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_INT_EN_A>; -impl<'a, REG> CARD_INT_EN_W<'a, REG> +pub type CardIntEnW<'a, REG> = crate::BitWriter<'a, REG, CardIntEn>; +impl<'a, REG> CardIntEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_INT_EN_A::VALUE1) + self.variant(CardIntEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_INT_EN_A::VALUE2) + self.variant(CardIntEn::Value2) } } #[doc = "Field `FIXED_TO_0` reader - Fixed to 0"] -pub type FIXED_TO_0_R = crate::BitReader; +pub type FixedTo0R = crate::BitReader; impl R { #[doc = "Bit 0 - Command Complete Signal Enable"] #[inline(always)] - pub fn cmd_complete_en(&self) -> CMD_COMPLETE_EN_R { - CMD_COMPLETE_EN_R::new((self.bits & 1) != 0) + pub fn cmd_complete_en(&self) -> CmdCompleteEnR { + CmdCompleteEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transfer Complete Signal Enable"] #[inline(always)] - pub fn tx_complete_en(&self) -> TX_COMPLETE_EN_R { - TX_COMPLETE_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn tx_complete_en(&self) -> TxCompleteEnR { + TxCompleteEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Block Gap Event Signal Enable"] #[inline(always)] - pub fn block_gap_event_en(&self) -> BLOCK_GAP_EVENT_EN_R { - BLOCK_GAP_EVENT_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn block_gap_event_en(&self) -> BlockGapEventEnR { + BlockGapEventEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Buffer Write Ready Signal Enable"] #[inline(always)] - pub fn buff_write_ready_en(&self) -> BUFF_WRITE_READY_EN_R { - BUFF_WRITE_READY_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn buff_write_ready_en(&self) -> BuffWriteReadyEnR { + BuffWriteReadyEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Buffer Read Ready Signal Enable"] #[inline(always)] - pub fn buff_read_ready_en(&self) -> BUFF_READ_READY_EN_R { - BUFF_READ_READY_EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn buff_read_ready_en(&self) -> BuffReadReadyEnR { + BuffReadReadyEnR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Card Insertion Signal Enable"] #[inline(always)] - pub fn card_ins_en(&self) -> CARD_INS_EN_R { - CARD_INS_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn card_ins_en(&self) -> CardInsEnR { + CardInsEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Card Removal Signal Enable"] #[inline(always)] - pub fn card_removal_en(&self) -> CARD_REMOVAL_EN_R { - CARD_REMOVAL_EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn card_removal_en(&self) -> CardRemovalEnR { + CardRemovalEnR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Card Interrupt Signal Enable"] #[inline(always)] - pub fn card_int_en(&self) -> CARD_INT_EN_R { - CARD_INT_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn card_int_en(&self) -> CardIntEnR { + CardIntEnR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 15 - Fixed to 0"] #[inline(always)] - pub fn fixed_to_0(&self) -> FIXED_TO_0_R { - FIXED_TO_0_R::new(((self.bits >> 15) & 1) != 0) + pub fn fixed_to_0(&self) -> FixedTo0R { + FixedTo0R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Complete Signal Enable"] #[inline(always)] #[must_use] - pub fn cmd_complete_en(&mut self) -> CMD_COMPLETE_EN_W { - CMD_COMPLETE_EN_W::new(self, 0) + pub fn cmd_complete_en(&mut self) -> CmdCompleteEnW { + CmdCompleteEnW::new(self, 0) } #[doc = "Bit 1 - Transfer Complete Signal Enable"] #[inline(always)] #[must_use] - pub fn tx_complete_en(&mut self) -> TX_COMPLETE_EN_W { - TX_COMPLETE_EN_W::new(self, 1) + pub fn tx_complete_en(&mut self) -> TxCompleteEnW { + TxCompleteEnW::new(self, 1) } #[doc = "Bit 2 - Block Gap Event Signal Enable"] #[inline(always)] #[must_use] - pub fn block_gap_event_en(&mut self) -> BLOCK_GAP_EVENT_EN_W { - BLOCK_GAP_EVENT_EN_W::new(self, 2) + pub fn block_gap_event_en(&mut self) -> BlockGapEventEnW { + BlockGapEventEnW::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready Signal Enable"] #[inline(always)] #[must_use] - pub fn buff_write_ready_en(&mut self) -> BUFF_WRITE_READY_EN_W { - BUFF_WRITE_READY_EN_W::new(self, 4) + pub fn buff_write_ready_en(&mut self) -> BuffWriteReadyEnW { + BuffWriteReadyEnW::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready Signal Enable"] #[inline(always)] #[must_use] - pub fn buff_read_ready_en(&mut self) -> BUFF_READ_READY_EN_W { - BUFF_READ_READY_EN_W::new(self, 5) + pub fn buff_read_ready_en(&mut self) -> BuffReadReadyEnW { + BuffReadReadyEnW::new(self, 5) } #[doc = "Bit 6 - Card Insertion Signal Enable"] #[inline(always)] #[must_use] - pub fn card_ins_en(&mut self) -> CARD_INS_EN_W { - CARD_INS_EN_W::new(self, 6) + pub fn card_ins_en(&mut self) -> CardInsEnW { + CardInsEnW::new(self, 6) } #[doc = "Bit 7 - Card Removal Signal Enable"] #[inline(always)] #[must_use] - pub fn card_removal_en(&mut self) -> CARD_REMOVAL_EN_W { - CARD_REMOVAL_EN_W::new(self, 7) + pub fn card_removal_en(&mut self) -> CardRemovalEnW { + CardRemovalEnW::new(self, 7) } #[doc = "Bit 8 - Card Interrupt Signal Enable"] #[inline(always)] #[must_use] - pub fn card_int_en(&mut self) -> CARD_INT_EN_W { - CARD_INT_EN_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn card_int_en(&mut self) -> CardIntEnW { + CardIntEnW::new(self, 8) } } #[doc = "Normal Interrupt Signal Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_signal_norm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_signal_norm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EN_INT_SIGNAL_NORM_SPEC; -impl crate::RegisterSpec for EN_INT_SIGNAL_NORM_SPEC { +pub struct EnIntSignalNormSpec; +impl crate::RegisterSpec for EnIntSignalNormSpec { type Ux = u16; } #[doc = "`read()` method returns [`en_int_signal_norm::R`](R) reader structure"] -impl crate::Readable for EN_INT_SIGNAL_NORM_SPEC {} +impl crate::Readable for EnIntSignalNormSpec {} #[doc = "`write(|w| ..)` method takes [`en_int_signal_norm::W`](W) writer structure"] -impl crate::Writable for EN_INT_SIGNAL_NORM_SPEC { +impl crate::Writable for EnIntSignalNormSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets EN_INT_SIGNAL_NORM to value 0"] -impl crate::Resettable for EN_INT_SIGNAL_NORM_SPEC { +impl crate::Resettable for EnIntSignalNormSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/en_int_status_err.rs b/src/sdmmc/en_int_status_err.rs index def823bc..67ace465 100644 --- a/src/sdmmc/en_int_status_err.rs +++ b/src/sdmmc/en_int_status_err.rs @@ -1,738 +1,729 @@ #[doc = "Register `EN_INT_STATUS_ERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EN_INT_STATUS_ERR` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_TIMEOUT_ERR_EN` reader - Command Timeout Error Status Enable"] -pub type CMD_TIMEOUT_ERR_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Timeout Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_TIMEOUT_ERR_EN_A { +pub enum CmdTimeoutErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_TIMEOUT_ERR_EN_A) -> Self { + fn from(variant: CmdTimeoutErrEn) -> Self { variant as u8 != 0 } } -impl CMD_TIMEOUT_ERR_EN_R { +#[doc = "Field `CMD_TIMEOUT_ERR_EN` reader - Command Timeout Error Status Enable"] +pub type CmdTimeoutErrEnR = crate::BitReader; +impl CmdTimeoutErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_TIMEOUT_ERR_EN_A { + pub const fn variant(&self) -> CmdTimeoutErrEn { match self.bits { - false => CMD_TIMEOUT_ERR_EN_A::VALUE1, - true => CMD_TIMEOUT_ERR_EN_A::VALUE2, + false => CmdTimeoutErrEn::Value1, + true => CmdTimeoutErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_TIMEOUT_ERR_EN_A::VALUE1 + *self == CmdTimeoutErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_TIMEOUT_ERR_EN_A::VALUE2 + *self == CmdTimeoutErrEn::Value2 } } #[doc = "Field `CMD_TIMEOUT_ERR_EN` writer - Command Timeout Error Status Enable"] -pub type CMD_TIMEOUT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_TIMEOUT_ERR_EN_A>; -impl<'a, REG> CMD_TIMEOUT_ERR_EN_W<'a, REG> +pub type CmdTimeoutErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdTimeoutErrEn>; +impl<'a, REG> CmdTimeoutErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_EN_A::VALUE1) + self.variant(CmdTimeoutErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_EN_A::VALUE2) + self.variant(CmdTimeoutErrEn::Value2) } } -#[doc = "Field `CMD_CRC_ERR_EN` reader - Command CRC Error Status Enable"] -pub type CMD_CRC_ERR_EN_R = crate::BitReader; #[doc = "Command CRC Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_CRC_ERR_EN_A { +pub enum CmdCrcErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_CRC_ERR_EN_A) -> Self { + fn from(variant: CmdCrcErrEn) -> Self { variant as u8 != 0 } } -impl CMD_CRC_ERR_EN_R { +#[doc = "Field `CMD_CRC_ERR_EN` reader - Command CRC Error Status Enable"] +pub type CmdCrcErrEnR = crate::BitReader; +impl CmdCrcErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_CRC_ERR_EN_A { + pub const fn variant(&self) -> CmdCrcErrEn { match self.bits { - false => CMD_CRC_ERR_EN_A::VALUE1, - true => CMD_CRC_ERR_EN_A::VALUE2, + false => CmdCrcErrEn::Value1, + true => CmdCrcErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_CRC_ERR_EN_A::VALUE1 + *self == CmdCrcErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_CRC_ERR_EN_A::VALUE2 + *self == CmdCrcErrEn::Value2 } } #[doc = "Field `CMD_CRC_ERR_EN` writer - Command CRC Error Status Enable"] -pub type CMD_CRC_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_CRC_ERR_EN_A>; -impl<'a, REG> CMD_CRC_ERR_EN_W<'a, REG> +pub type CmdCrcErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdCrcErrEn>; +impl<'a, REG> CmdCrcErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_EN_A::VALUE1) + self.variant(CmdCrcErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_EN_A::VALUE2) + self.variant(CmdCrcErrEn::Value2) } } -#[doc = "Field `CMD_END_BIT_ERR_EN` reader - Command End Bit Error Status Enable"] -pub type CMD_END_BIT_ERR_EN_R = crate::BitReader; #[doc = "Command End Bit Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_END_BIT_ERR_EN_A { +pub enum CmdEndBitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_END_BIT_ERR_EN_A) -> Self { + fn from(variant: CmdEndBitErrEn) -> Self { variant as u8 != 0 } } -impl CMD_END_BIT_ERR_EN_R { +#[doc = "Field `CMD_END_BIT_ERR_EN` reader - Command End Bit Error Status Enable"] +pub type CmdEndBitErrEnR = crate::BitReader; +impl CmdEndBitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_END_BIT_ERR_EN_A { + pub const fn variant(&self) -> CmdEndBitErrEn { match self.bits { - false => CMD_END_BIT_ERR_EN_A::VALUE1, - true => CMD_END_BIT_ERR_EN_A::VALUE2, + false => CmdEndBitErrEn::Value1, + true => CmdEndBitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_END_BIT_ERR_EN_A::VALUE1 + *self == CmdEndBitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_END_BIT_ERR_EN_A::VALUE2 + *self == CmdEndBitErrEn::Value2 } } #[doc = "Field `CMD_END_BIT_ERR_EN` writer - Command End Bit Error Status Enable"] -pub type CMD_END_BIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_END_BIT_ERR_EN_A>; -impl<'a, REG> CMD_END_BIT_ERR_EN_W<'a, REG> +pub type CmdEndBitErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdEndBitErrEn>; +impl<'a, REG> CmdEndBitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_EN_A::VALUE1) + self.variant(CmdEndBitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_EN_A::VALUE2) + self.variant(CmdEndBitErrEn::Value2) } } -#[doc = "Field `CMD_IND_ERR_EN` reader - Command Index Error Status Enable"] -pub type CMD_IND_ERR_EN_R = crate::BitReader; #[doc = "Command Index Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_IND_ERR_EN_A { +pub enum CmdIndErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_IND_ERR_EN_A) -> Self { + fn from(variant: CmdIndErrEn) -> Self { variant as u8 != 0 } } -impl CMD_IND_ERR_EN_R { +#[doc = "Field `CMD_IND_ERR_EN` reader - Command Index Error Status Enable"] +pub type CmdIndErrEnR = crate::BitReader; +impl CmdIndErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_IND_ERR_EN_A { + pub const fn variant(&self) -> CmdIndErrEn { match self.bits { - false => CMD_IND_ERR_EN_A::VALUE1, - true => CMD_IND_ERR_EN_A::VALUE2, + false => CmdIndErrEn::Value1, + true => CmdIndErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_IND_ERR_EN_A::VALUE1 + *self == CmdIndErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_IND_ERR_EN_A::VALUE2 + *self == CmdIndErrEn::Value2 } } #[doc = "Field `CMD_IND_ERR_EN` writer - Command Index Error Status Enable"] -pub type CMD_IND_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_IND_ERR_EN_A>; -impl<'a, REG> CMD_IND_ERR_EN_W<'a, REG> +pub type CmdIndErrEnW<'a, REG> = crate::BitWriter<'a, REG, CmdIndErrEn>; +impl<'a, REG> CmdIndErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_EN_A::VALUE1) + self.variant(CmdIndErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_EN_A::VALUE2) + self.variant(CmdIndErrEn::Value2) } } -#[doc = "Field `DATA_TIMEOUT_ERR_EN` reader - Data Timeout Error Status Enable"] -pub type DATA_TIMEOUT_ERR_EN_R = crate::BitReader; #[doc = "Data Timeout Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_TIMEOUT_ERR_EN_A { +pub enum DataTimeoutErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_TIMEOUT_ERR_EN_A) -> Self { + fn from(variant: DataTimeoutErrEn) -> Self { variant as u8 != 0 } } -impl DATA_TIMEOUT_ERR_EN_R { +#[doc = "Field `DATA_TIMEOUT_ERR_EN` reader - Data Timeout Error Status Enable"] +pub type DataTimeoutErrEnR = crate::BitReader; +impl DataTimeoutErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_TIMEOUT_ERR_EN_A { + pub const fn variant(&self) -> DataTimeoutErrEn { match self.bits { - false => DATA_TIMEOUT_ERR_EN_A::VALUE1, - true => DATA_TIMEOUT_ERR_EN_A::VALUE2, + false => DataTimeoutErrEn::Value1, + true => DataTimeoutErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_TIMEOUT_ERR_EN_A::VALUE1 + *self == DataTimeoutErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_TIMEOUT_ERR_EN_A::VALUE2 + *self == DataTimeoutErrEn::Value2 } } #[doc = "Field `DATA_TIMEOUT_ERR_EN` writer - Data Timeout Error Status Enable"] -pub type DATA_TIMEOUT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_TIMEOUT_ERR_EN_A>; -impl<'a, REG> DATA_TIMEOUT_ERR_EN_W<'a, REG> +pub type DataTimeoutErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataTimeoutErrEn>; +impl<'a, REG> DataTimeoutErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_EN_A::VALUE1) + self.variant(DataTimeoutErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_EN_A::VALUE2) + self.variant(DataTimeoutErrEn::Value2) } } -#[doc = "Field `DATA_CRC_ERR_EN` reader - Data CRC Error Status Enable"] -pub type DATA_CRC_ERR_EN_R = crate::BitReader; #[doc = "Data CRC Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_CRC_ERR_EN_A { +pub enum DataCrcErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_CRC_ERR_EN_A) -> Self { + fn from(variant: DataCrcErrEn) -> Self { variant as u8 != 0 } } -impl DATA_CRC_ERR_EN_R { +#[doc = "Field `DATA_CRC_ERR_EN` reader - Data CRC Error Status Enable"] +pub type DataCrcErrEnR = crate::BitReader; +impl DataCrcErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_CRC_ERR_EN_A { + pub const fn variant(&self) -> DataCrcErrEn { match self.bits { - false => DATA_CRC_ERR_EN_A::VALUE1, - true => DATA_CRC_ERR_EN_A::VALUE2, + false => DataCrcErrEn::Value1, + true => DataCrcErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_CRC_ERR_EN_A::VALUE1 + *self == DataCrcErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_CRC_ERR_EN_A::VALUE2 + *self == DataCrcErrEn::Value2 } } #[doc = "Field `DATA_CRC_ERR_EN` writer - Data CRC Error Status Enable"] -pub type DATA_CRC_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_CRC_ERR_EN_A>; -impl<'a, REG> DATA_CRC_ERR_EN_W<'a, REG> +pub type DataCrcErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataCrcErrEn>; +impl<'a, REG> DataCrcErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_EN_A::VALUE1) + self.variant(DataCrcErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_EN_A::VALUE2) + self.variant(DataCrcErrEn::Value2) } } -#[doc = "Field `DATA_END_BIT_ERR_EN` reader - Data End Bit Error Status Enable"] -pub type DATA_END_BIT_ERR_EN_R = crate::BitReader; #[doc = "Data End Bit Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_END_BIT_ERR_EN_A { +pub enum DataEndBitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_END_BIT_ERR_EN_A) -> Self { + fn from(variant: DataEndBitErrEn) -> Self { variant as u8 != 0 } } -impl DATA_END_BIT_ERR_EN_R { +#[doc = "Field `DATA_END_BIT_ERR_EN` reader - Data End Bit Error Status Enable"] +pub type DataEndBitErrEnR = crate::BitReader; +impl DataEndBitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_END_BIT_ERR_EN_A { + pub const fn variant(&self) -> DataEndBitErrEn { match self.bits { - false => DATA_END_BIT_ERR_EN_A::VALUE1, - true => DATA_END_BIT_ERR_EN_A::VALUE2, + false => DataEndBitErrEn::Value1, + true => DataEndBitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_END_BIT_ERR_EN_A::VALUE1 + *self == DataEndBitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_END_BIT_ERR_EN_A::VALUE2 + *self == DataEndBitErrEn::Value2 } } #[doc = "Field `DATA_END_BIT_ERR_EN` writer - Data End Bit Error Status Enable"] -pub type DATA_END_BIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, DATA_END_BIT_ERR_EN_A>; -impl<'a, REG> DATA_END_BIT_ERR_EN_W<'a, REG> +pub type DataEndBitErrEnW<'a, REG> = crate::BitWriter<'a, REG, DataEndBitErrEn>; +impl<'a, REG> DataEndBitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_EN_A::VALUE1) + self.variant(DataEndBitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_EN_A::VALUE2) + self.variant(DataEndBitErrEn::Value2) } } -#[doc = "Field `CURRENT_LIMIT_ERR_EN` reader - Current Limit Error Status Enable"] -pub type CURRENT_LIMIT_ERR_EN_R = crate::BitReader; #[doc = "Current Limit Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CURRENT_LIMIT_ERR_EN_A { +pub enum CurrentLimitErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CURRENT_LIMIT_ERR_EN_A) -> Self { + fn from(variant: CurrentLimitErrEn) -> Self { variant as u8 != 0 } } -impl CURRENT_LIMIT_ERR_EN_R { +#[doc = "Field `CURRENT_LIMIT_ERR_EN` reader - Current Limit Error Status Enable"] +pub type CurrentLimitErrEnR = crate::BitReader; +impl CurrentLimitErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CURRENT_LIMIT_ERR_EN_A { + pub const fn variant(&self) -> CurrentLimitErrEn { match self.bits { - false => CURRENT_LIMIT_ERR_EN_A::VALUE1, - true => CURRENT_LIMIT_ERR_EN_A::VALUE2, + false => CurrentLimitErrEn::Value1, + true => CurrentLimitErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CURRENT_LIMIT_ERR_EN_A::VALUE1 + *self == CurrentLimitErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CURRENT_LIMIT_ERR_EN_A::VALUE2 + *self == CurrentLimitErrEn::Value2 } } #[doc = "Field `CURRENT_LIMIT_ERR_EN` writer - Current Limit Error Status Enable"] -pub type CURRENT_LIMIT_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CURRENT_LIMIT_ERR_EN_A>; -impl<'a, REG> CURRENT_LIMIT_ERR_EN_W<'a, REG> +pub type CurrentLimitErrEnW<'a, REG> = crate::BitWriter<'a, REG, CurrentLimitErrEn>; +impl<'a, REG> CurrentLimitErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_EN_A::VALUE1) + self.variant(CurrentLimitErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_EN_A::VALUE2) + self.variant(CurrentLimitErrEn::Value2) } } -#[doc = "Field `ACMD_ERR_EN` reader - Auto CMD12 Error Status Enable"] -pub type ACMD_ERR_EN_R = crate::BitReader; #[doc = "Auto CMD12 Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_ERR_EN_A { +pub enum AcmdErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_ERR_EN_A) -> Self { + fn from(variant: AcmdErrEn) -> Self { variant as u8 != 0 } } -impl ACMD_ERR_EN_R { +#[doc = "Field `ACMD_ERR_EN` reader - Auto CMD12 Error Status Enable"] +pub type AcmdErrEnR = crate::BitReader; +impl AcmdErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_ERR_EN_A { + pub const fn variant(&self) -> AcmdErrEn { match self.bits { - false => ACMD_ERR_EN_A::VALUE1, - true => ACMD_ERR_EN_A::VALUE2, + false => AcmdErrEn::Value1, + true => AcmdErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_ERR_EN_A::VALUE1 + *self == AcmdErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_ERR_EN_A::VALUE2 + *self == AcmdErrEn::Value2 } } #[doc = "Field `ACMD_ERR_EN` writer - Auto CMD12 Error Status Enable"] -pub type ACMD_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, ACMD_ERR_EN_A>; -impl<'a, REG> ACMD_ERR_EN_W<'a, REG> +pub type AcmdErrEnW<'a, REG> = crate::BitWriter<'a, REG, AcmdErrEn>; +impl<'a, REG> AcmdErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_EN_A::VALUE1) + self.variant(AcmdErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_EN_A::VALUE2) + self.variant(AcmdErrEn::Value2) } } -#[doc = "Field `TARGET_RESP_ERR_EN` reader - Target Response Error Status Enable"] -pub type TARGET_RESP_ERR_EN_R = crate::BitReader; #[doc = "Target Response Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TARGET_RESP_ERR_EN_A { +pub enum TargetRespErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TARGET_RESP_ERR_EN_A) -> Self { + fn from(variant: TargetRespErrEn) -> Self { variant as u8 != 0 } } -impl TARGET_RESP_ERR_EN_R { +#[doc = "Field `TARGET_RESP_ERR_EN` reader - Target Response Error Status Enable"] +pub type TargetRespErrEnR = crate::BitReader; +impl TargetRespErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TARGET_RESP_ERR_EN_A { + pub const fn variant(&self) -> TargetRespErrEn { match self.bits { - false => TARGET_RESP_ERR_EN_A::VALUE1, - true => TARGET_RESP_ERR_EN_A::VALUE2, + false => TargetRespErrEn::Value1, + true => TargetRespErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TARGET_RESP_ERR_EN_A::VALUE1 + *self == TargetRespErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TARGET_RESP_ERR_EN_A::VALUE2 + *self == TargetRespErrEn::Value2 } } #[doc = "Field `TARGET_RESP_ERR_EN` writer - Target Response Error Status Enable"] -pub type TARGET_RESP_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, TARGET_RESP_ERR_EN_A>; -impl<'a, REG> TARGET_RESP_ERR_EN_W<'a, REG> +pub type TargetRespErrEnW<'a, REG> = crate::BitWriter<'a, REG, TargetRespErrEn>; +impl<'a, REG> TargetRespErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TARGET_RESP_ERR_EN_A::VALUE1) + self.variant(TargetRespErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TARGET_RESP_ERR_EN_A::VALUE2) + self.variant(TargetRespErrEn::Value2) } } -#[doc = "Field `CEATA_ERR_EN` reader - Ceata Error Status Enable"] -pub type CEATA_ERR_EN_R = crate::BitReader; #[doc = "Ceata Error Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEATA_ERR_EN_A { +pub enum CeataErrEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEATA_ERR_EN_A) -> Self { + fn from(variant: CeataErrEn) -> Self { variant as u8 != 0 } } -impl CEATA_ERR_EN_R { +#[doc = "Field `CEATA_ERR_EN` reader - Ceata Error Status Enable"] +pub type CeataErrEnR = crate::BitReader; +impl CeataErrEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEATA_ERR_EN_A { + pub const fn variant(&self) -> CeataErrEn { match self.bits { - false => CEATA_ERR_EN_A::VALUE1, - true => CEATA_ERR_EN_A::VALUE2, + false => CeataErrEn::Value1, + true => CeataErrEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEATA_ERR_EN_A::VALUE1 + *self == CeataErrEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEATA_ERR_EN_A::VALUE2 + *self == CeataErrEn::Value2 } } #[doc = "Field `CEATA_ERR_EN` writer - Ceata Error Status Enable"] -pub type CEATA_ERR_EN_W<'a, REG> = crate::BitWriter<'a, REG, CEATA_ERR_EN_A>; -impl<'a, REG> CEATA_ERR_EN_W<'a, REG> +pub type CeataErrEnW<'a, REG> = crate::BitWriter<'a, REG, CeataErrEn>; +impl<'a, REG> CeataErrEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_EN_A::VALUE1) + self.variant(CeataErrEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_EN_A::VALUE2) + self.variant(CeataErrEn::Value2) } } impl R { #[doc = "Bit 0 - Command Timeout Error Status Enable"] #[inline(always)] - pub fn cmd_timeout_err_en(&self) -> CMD_TIMEOUT_ERR_EN_R { - CMD_TIMEOUT_ERR_EN_R::new((self.bits & 1) != 0) + pub fn cmd_timeout_err_en(&self) -> CmdTimeoutErrEnR { + CmdTimeoutErrEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Command CRC Error Status Enable"] #[inline(always)] - pub fn cmd_crc_err_en(&self) -> CMD_CRC_ERR_EN_R { - CMD_CRC_ERR_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmd_crc_err_en(&self) -> CmdCrcErrEnR { + CmdCrcErrEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Command End Bit Error Status Enable"] #[inline(always)] - pub fn cmd_end_bit_err_en(&self) -> CMD_END_BIT_ERR_EN_R { - CMD_END_BIT_ERR_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmd_end_bit_err_en(&self) -> CmdEndBitErrEnR { + CmdEndBitErrEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Command Index Error Status Enable"] #[inline(always)] - pub fn cmd_ind_err_en(&self) -> CMD_IND_ERR_EN_R { - CMD_IND_ERR_EN_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd_ind_err_en(&self) -> CmdIndErrEnR { + CmdIndErrEnR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Data Timeout Error Status Enable"] #[inline(always)] - pub fn data_timeout_err_en(&self) -> DATA_TIMEOUT_ERR_EN_R { - DATA_TIMEOUT_ERR_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn data_timeout_err_en(&self) -> DataTimeoutErrEnR { + DataTimeoutErrEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Data CRC Error Status Enable"] #[inline(always)] - pub fn data_crc_err_en(&self) -> DATA_CRC_ERR_EN_R { - DATA_CRC_ERR_EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn data_crc_err_en(&self) -> DataCrcErrEnR { + DataCrcErrEnR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data End Bit Error Status Enable"] #[inline(always)] - pub fn data_end_bit_err_en(&self) -> DATA_END_BIT_ERR_EN_R { - DATA_END_BIT_ERR_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn data_end_bit_err_en(&self) -> DataEndBitErrEnR { + DataEndBitErrEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Current Limit Error Status Enable"] #[inline(always)] - pub fn current_limit_err_en(&self) -> CURRENT_LIMIT_ERR_EN_R { - CURRENT_LIMIT_ERR_EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn current_limit_err_en(&self) -> CurrentLimitErrEnR { + CurrentLimitErrEnR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Auto CMD12 Error Status Enable"] #[inline(always)] - pub fn acmd_err_en(&self) -> ACMD_ERR_EN_R { - ACMD_ERR_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn acmd_err_en(&self) -> AcmdErrEnR { + AcmdErrEnR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - Target Response Error Status Enable"] #[inline(always)] - pub fn target_resp_err_en(&self) -> TARGET_RESP_ERR_EN_R { - TARGET_RESP_ERR_EN_R::new(((self.bits >> 12) & 1) != 0) + pub fn target_resp_err_en(&self) -> TargetRespErrEnR { + TargetRespErrEnR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Ceata Error Status Enable"] #[inline(always)] - pub fn ceata_err_en(&self) -> CEATA_ERR_EN_R { - CEATA_ERR_EN_R::new(((self.bits >> 13) & 1) != 0) + pub fn ceata_err_en(&self) -> CeataErrEnR { + CeataErrEnR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Timeout Error Status Enable"] #[inline(always)] #[must_use] - pub fn cmd_timeout_err_en(&mut self) -> CMD_TIMEOUT_ERR_EN_W { - CMD_TIMEOUT_ERR_EN_W::new(self, 0) + pub fn cmd_timeout_err_en(&mut self) -> CmdTimeoutErrEnW { + CmdTimeoutErrEnW::new(self, 0) } #[doc = "Bit 1 - Command CRC Error Status Enable"] #[inline(always)] #[must_use] - pub fn cmd_crc_err_en(&mut self) -> CMD_CRC_ERR_EN_W { - CMD_CRC_ERR_EN_W::new(self, 1) + pub fn cmd_crc_err_en(&mut self) -> CmdCrcErrEnW { + CmdCrcErrEnW::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error Status Enable"] #[inline(always)] #[must_use] - pub fn cmd_end_bit_err_en(&mut self) -> CMD_END_BIT_ERR_EN_W { - CMD_END_BIT_ERR_EN_W::new(self, 2) + pub fn cmd_end_bit_err_en(&mut self) -> CmdEndBitErrEnW { + CmdEndBitErrEnW::new(self, 2) } #[doc = "Bit 3 - Command Index Error Status Enable"] #[inline(always)] #[must_use] - pub fn cmd_ind_err_en(&mut self) -> CMD_IND_ERR_EN_W { - CMD_IND_ERR_EN_W::new(self, 3) + pub fn cmd_ind_err_en(&mut self) -> CmdIndErrEnW { + CmdIndErrEnW::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error Status Enable"] #[inline(always)] #[must_use] - pub fn data_timeout_err_en(&mut self) -> DATA_TIMEOUT_ERR_EN_W { - DATA_TIMEOUT_ERR_EN_W::new(self, 4) + pub fn data_timeout_err_en(&mut self) -> DataTimeoutErrEnW { + DataTimeoutErrEnW::new(self, 4) } #[doc = "Bit 5 - Data CRC Error Status Enable"] #[inline(always)] #[must_use] - pub fn data_crc_err_en(&mut self) -> DATA_CRC_ERR_EN_W { - DATA_CRC_ERR_EN_W::new(self, 5) + pub fn data_crc_err_en(&mut self) -> DataCrcErrEnW { + DataCrcErrEnW::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error Status Enable"] #[inline(always)] #[must_use] - pub fn data_end_bit_err_en(&mut self) -> DATA_END_BIT_ERR_EN_W { - DATA_END_BIT_ERR_EN_W::new(self, 6) + pub fn data_end_bit_err_en(&mut self) -> DataEndBitErrEnW { + DataEndBitErrEnW::new(self, 6) } #[doc = "Bit 7 - Current Limit Error Status Enable"] #[inline(always)] #[must_use] - pub fn current_limit_err_en(&mut self) -> CURRENT_LIMIT_ERR_EN_W { - CURRENT_LIMIT_ERR_EN_W::new(self, 7) + pub fn current_limit_err_en(&mut self) -> CurrentLimitErrEnW { + CurrentLimitErrEnW::new(self, 7) } #[doc = "Bit 8 - Auto CMD12 Error Status Enable"] #[inline(always)] #[must_use] - pub fn acmd_err_en(&mut self) -> ACMD_ERR_EN_W { - ACMD_ERR_EN_W::new(self, 8) + pub fn acmd_err_en(&mut self) -> AcmdErrEnW { + AcmdErrEnW::new(self, 8) } #[doc = "Bit 12 - Target Response Error Status Enable"] #[inline(always)] #[must_use] - pub fn target_resp_err_en(&mut self) -> TARGET_RESP_ERR_EN_W { - TARGET_RESP_ERR_EN_W::new(self, 12) + pub fn target_resp_err_en(&mut self) -> TargetRespErrEnW { + TargetRespErrEnW::new(self, 12) } #[doc = "Bit 13 - Ceata Error Status Enable"] #[inline(always)] #[must_use] - pub fn ceata_err_en(&mut self) -> CEATA_ERR_EN_W { - CEATA_ERR_EN_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn ceata_err_en(&mut self) -> CeataErrEnW { + CeataErrEnW::new(self, 13) } } #[doc = "Error Interrupt Status Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_status_err::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_status_err::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EN_INT_STATUS_ERR_SPEC; -impl crate::RegisterSpec for EN_INT_STATUS_ERR_SPEC { +pub struct EnIntStatusErrSpec; +impl crate::RegisterSpec for EnIntStatusErrSpec { type Ux = u16; } #[doc = "`read()` method returns [`en_int_status_err::R`](R) reader structure"] -impl crate::Readable for EN_INT_STATUS_ERR_SPEC {} +impl crate::Readable for EnIntStatusErrSpec {} #[doc = "`write(|w| ..)` method takes [`en_int_status_err::W`](W) writer structure"] -impl crate::Writable for EN_INT_STATUS_ERR_SPEC { +impl crate::Writable for EnIntStatusErrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets EN_INT_STATUS_ERR to value 0"] -impl crate::Resettable for EN_INT_STATUS_ERR_SPEC { +impl crate::Resettable for EnIntStatusErrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/en_int_status_norm.rs b/src/sdmmc/en_int_status_norm.rs index 18593a9f..c276c8ed 100644 --- a/src/sdmmc/en_int_status_norm.rs +++ b/src/sdmmc/en_int_status_norm.rs @@ -1,553 +1,544 @@ #[doc = "Register `EN_INT_STATUS_NORM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EN_INT_STATUS_NORM` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_COMPLETE_EN` reader - Command Complete Status Enable"] -pub type CMD_COMPLETE_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Complete Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_COMPLETE_EN_A { +pub enum CmdCompleteEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_COMPLETE_EN_A) -> Self { + fn from(variant: CmdCompleteEn) -> Self { variant as u8 != 0 } } -impl CMD_COMPLETE_EN_R { +#[doc = "Field `CMD_COMPLETE_EN` reader - Command Complete Status Enable"] +pub type CmdCompleteEnR = crate::BitReader; +impl CmdCompleteEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_COMPLETE_EN_A { + pub const fn variant(&self) -> CmdCompleteEn { match self.bits { - false => CMD_COMPLETE_EN_A::VALUE1, - true => CMD_COMPLETE_EN_A::VALUE2, + false => CmdCompleteEn::Value1, + true => CmdCompleteEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_COMPLETE_EN_A::VALUE1 + *self == CmdCompleteEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_COMPLETE_EN_A::VALUE2 + *self == CmdCompleteEn::Value2 } } #[doc = "Field `CMD_COMPLETE_EN` writer - Command Complete Status Enable"] -pub type CMD_COMPLETE_EN_W<'a, REG> = crate::BitWriter<'a, REG, CMD_COMPLETE_EN_A>; -impl<'a, REG> CMD_COMPLETE_EN_W<'a, REG> +pub type CmdCompleteEnW<'a, REG> = crate::BitWriter<'a, REG, CmdCompleteEn>; +impl<'a, REG> CmdCompleteEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_EN_A::VALUE1) + self.variant(CmdCompleteEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_EN_A::VALUE2) + self.variant(CmdCompleteEn::Value2) } } -#[doc = "Field `TX_COMPLETE_EN` reader - Transfer Complete Status Enable"] -pub type TX_COMPLETE_EN_R = crate::BitReader; #[doc = "Transfer Complete Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TX_COMPLETE_EN_A { +pub enum TxCompleteEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TX_COMPLETE_EN_A) -> Self { + fn from(variant: TxCompleteEn) -> Self { variant as u8 != 0 } } -impl TX_COMPLETE_EN_R { +#[doc = "Field `TX_COMPLETE_EN` reader - Transfer Complete Status Enable"] +pub type TxCompleteEnR = crate::BitReader; +impl TxCompleteEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_COMPLETE_EN_A { + pub const fn variant(&self) -> TxCompleteEn { match self.bits { - false => TX_COMPLETE_EN_A::VALUE1, - true => TX_COMPLETE_EN_A::VALUE2, + false => TxCompleteEn::Value1, + true => TxCompleteEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_COMPLETE_EN_A::VALUE1 + *self == TxCompleteEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_COMPLETE_EN_A::VALUE2 + *self == TxCompleteEn::Value2 } } #[doc = "Field `TX_COMPLETE_EN` writer - Transfer Complete Status Enable"] -pub type TX_COMPLETE_EN_W<'a, REG> = crate::BitWriter<'a, REG, TX_COMPLETE_EN_A>; -impl<'a, REG> TX_COMPLETE_EN_W<'a, REG> +pub type TxCompleteEnW<'a, REG> = crate::BitWriter<'a, REG, TxCompleteEn>; +impl<'a, REG> TxCompleteEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_EN_A::VALUE1) + self.variant(TxCompleteEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_EN_A::VALUE2) + self.variant(TxCompleteEn::Value2) } } -#[doc = "Field `BLOCK_GAP_EVENT_EN` reader - Block Gap Event Status Enable"] -pub type BLOCK_GAP_EVENT_EN_R = crate::BitReader; #[doc = "Block Gap Event Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLOCK_GAP_EVENT_EN_A { +pub enum BlockGapEventEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLOCK_GAP_EVENT_EN_A) -> Self { + fn from(variant: BlockGapEventEn) -> Self { variant as u8 != 0 } } -impl BLOCK_GAP_EVENT_EN_R { +#[doc = "Field `BLOCK_GAP_EVENT_EN` reader - Block Gap Event Status Enable"] +pub type BlockGapEventEnR = crate::BitReader; +impl BlockGapEventEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BLOCK_GAP_EVENT_EN_A { + pub const fn variant(&self) -> BlockGapEventEn { match self.bits { - false => BLOCK_GAP_EVENT_EN_A::VALUE1, - true => BLOCK_GAP_EVENT_EN_A::VALUE2, + false => BlockGapEventEn::Value1, + true => BlockGapEventEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BLOCK_GAP_EVENT_EN_A::VALUE1 + *self == BlockGapEventEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BLOCK_GAP_EVENT_EN_A::VALUE2 + *self == BlockGapEventEn::Value2 } } #[doc = "Field `BLOCK_GAP_EVENT_EN` writer - Block Gap Event Status Enable"] -pub type BLOCK_GAP_EVENT_EN_W<'a, REG> = crate::BitWriter<'a, REG, BLOCK_GAP_EVENT_EN_A>; -impl<'a, REG> BLOCK_GAP_EVENT_EN_W<'a, REG> +pub type BlockGapEventEnW<'a, REG> = crate::BitWriter<'a, REG, BlockGapEventEn>; +impl<'a, REG> BlockGapEventEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_EN_A::VALUE1) + self.variant(BlockGapEventEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_EN_A::VALUE2) + self.variant(BlockGapEventEn::Value2) } } -#[doc = "Field `BUFF_WRITE_READY_EN` reader - Buffer Write Ready Status Enable"] -pub type BUFF_WRITE_READY_EN_R = crate::BitReader; #[doc = "Buffer Write Ready Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_WRITE_READY_EN_A { +pub enum BuffWriteReadyEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_WRITE_READY_EN_A) -> Self { + fn from(variant: BuffWriteReadyEn) -> Self { variant as u8 != 0 } } -impl BUFF_WRITE_READY_EN_R { +#[doc = "Field `BUFF_WRITE_READY_EN` reader - Buffer Write Ready Status Enable"] +pub type BuffWriteReadyEnR = crate::BitReader; +impl BuffWriteReadyEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_WRITE_READY_EN_A { + pub const fn variant(&self) -> BuffWriteReadyEn { match self.bits { - false => BUFF_WRITE_READY_EN_A::VALUE1, - true => BUFF_WRITE_READY_EN_A::VALUE2, + false => BuffWriteReadyEn::Value1, + true => BuffWriteReadyEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_WRITE_READY_EN_A::VALUE1 + *self == BuffWriteReadyEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_WRITE_READY_EN_A::VALUE2 + *self == BuffWriteReadyEn::Value2 } } #[doc = "Field `BUFF_WRITE_READY_EN` writer - Buffer Write Ready Status Enable"] -pub type BUFF_WRITE_READY_EN_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_WRITE_READY_EN_A>; -impl<'a, REG> BUFF_WRITE_READY_EN_W<'a, REG> +pub type BuffWriteReadyEnW<'a, REG> = crate::BitWriter<'a, REG, BuffWriteReadyEn>; +impl<'a, REG> BuffWriteReadyEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_EN_A::VALUE1) + self.variant(BuffWriteReadyEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_EN_A::VALUE2) + self.variant(BuffWriteReadyEn::Value2) } } -#[doc = "Field `BUFF_READ_READY_EN` reader - Buffer Read Ready Status Enable"] -pub type BUFF_READ_READY_EN_R = crate::BitReader; #[doc = "Buffer Read Ready Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_READ_READY_EN_A { +pub enum BuffReadReadyEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_READ_READY_EN_A) -> Self { + fn from(variant: BuffReadReadyEn) -> Self { variant as u8 != 0 } } -impl BUFF_READ_READY_EN_R { +#[doc = "Field `BUFF_READ_READY_EN` reader - Buffer Read Ready Status Enable"] +pub type BuffReadReadyEnR = crate::BitReader; +impl BuffReadReadyEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_READ_READY_EN_A { + pub const fn variant(&self) -> BuffReadReadyEn { match self.bits { - false => BUFF_READ_READY_EN_A::VALUE1, - true => BUFF_READ_READY_EN_A::VALUE2, + false => BuffReadReadyEn::Value1, + true => BuffReadReadyEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_READ_READY_EN_A::VALUE1 + *self == BuffReadReadyEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_READ_READY_EN_A::VALUE2 + *self == BuffReadReadyEn::Value2 } } #[doc = "Field `BUFF_READ_READY_EN` writer - Buffer Read Ready Status Enable"] -pub type BUFF_READ_READY_EN_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_READ_READY_EN_A>; -impl<'a, REG> BUFF_READ_READY_EN_W<'a, REG> +pub type BuffReadReadyEnW<'a, REG> = crate::BitWriter<'a, REG, BuffReadReadyEn>; +impl<'a, REG> BuffReadReadyEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_EN_A::VALUE1) + self.variant(BuffReadReadyEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_EN_A::VALUE2) + self.variant(BuffReadReadyEn::Value2) } } -#[doc = "Field `CARD_INS_EN` reader - Card Insertion Status Enable"] -pub type CARD_INS_EN_R = crate::BitReader; #[doc = "Card Insertion Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INS_EN_A { +pub enum CardInsEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INS_EN_A) -> Self { + fn from(variant: CardInsEn) -> Self { variant as u8 != 0 } } -impl CARD_INS_EN_R { +#[doc = "Field `CARD_INS_EN` reader - Card Insertion Status Enable"] +pub type CardInsEnR = crate::BitReader; +impl CardInsEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INS_EN_A { + pub const fn variant(&self) -> CardInsEn { match self.bits { - false => CARD_INS_EN_A::VALUE1, - true => CARD_INS_EN_A::VALUE2, + false => CardInsEn::Value1, + true => CardInsEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INS_EN_A::VALUE1 + *self == CardInsEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INS_EN_A::VALUE2 + *self == CardInsEn::Value2 } } #[doc = "Field `CARD_INS_EN` writer - Card Insertion Status Enable"] -pub type CARD_INS_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_INS_EN_A>; -impl<'a, REG> CARD_INS_EN_W<'a, REG> +pub type CardInsEnW<'a, REG> = crate::BitWriter<'a, REG, CardInsEn>; +impl<'a, REG> CardInsEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_INS_EN_A::VALUE1) + self.variant(CardInsEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_INS_EN_A::VALUE2) + self.variant(CardInsEn::Value2) } } -#[doc = "Field `CARD_REMOVAL_EN` reader - Card Removal Status Enable"] -pub type CARD_REMOVAL_EN_R = crate::BitReader; #[doc = "Card Removal Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_REMOVAL_EN_A { +pub enum CardRemovalEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_REMOVAL_EN_A) -> Self { + fn from(variant: CardRemovalEn) -> Self { variant as u8 != 0 } } -impl CARD_REMOVAL_EN_R { +#[doc = "Field `CARD_REMOVAL_EN` reader - Card Removal Status Enable"] +pub type CardRemovalEnR = crate::BitReader; +impl CardRemovalEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_REMOVAL_EN_A { + pub const fn variant(&self) -> CardRemovalEn { match self.bits { - false => CARD_REMOVAL_EN_A::VALUE1, - true => CARD_REMOVAL_EN_A::VALUE2, + false => CardRemovalEn::Value1, + true => CardRemovalEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_REMOVAL_EN_A::VALUE1 + *self == CardRemovalEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_REMOVAL_EN_A::VALUE2 + *self == CardRemovalEn::Value2 } } #[doc = "Field `CARD_REMOVAL_EN` writer - Card Removal Status Enable"] -pub type CARD_REMOVAL_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_REMOVAL_EN_A>; -impl<'a, REG> CARD_REMOVAL_EN_W<'a, REG> +pub type CardRemovalEnW<'a, REG> = crate::BitWriter<'a, REG, CardRemovalEn>; +impl<'a, REG> CardRemovalEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_EN_A::VALUE1) + self.variant(CardRemovalEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_EN_A::VALUE2) + self.variant(CardRemovalEn::Value2) } } -#[doc = "Field `CARD_INT_EN` reader - Card Interrupt Status Enable"] -pub type CARD_INT_EN_R = crate::BitReader; #[doc = "Card Interrupt Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INT_EN_A { +pub enum CardIntEn { #[doc = "0: Masked"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INT_EN_A) -> Self { + fn from(variant: CardIntEn) -> Self { variant as u8 != 0 } } -impl CARD_INT_EN_R { +#[doc = "Field `CARD_INT_EN` reader - Card Interrupt Status Enable"] +pub type CardIntEnR = crate::BitReader; +impl CardIntEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INT_EN_A { + pub const fn variant(&self) -> CardIntEn { match self.bits { - false => CARD_INT_EN_A::VALUE1, - true => CARD_INT_EN_A::VALUE2, + false => CardIntEn::Value1, + true => CardIntEn::Value2, } } #[doc = "Masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INT_EN_A::VALUE1 + *self == CardIntEn::Value1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INT_EN_A::VALUE2 + *self == CardIntEn::Value2 } } #[doc = "Field `CARD_INT_EN` writer - Card Interrupt Status Enable"] -pub type CARD_INT_EN_W<'a, REG> = crate::BitWriter<'a, REG, CARD_INT_EN_A>; -impl<'a, REG> CARD_INT_EN_W<'a, REG> +pub type CardIntEnW<'a, REG> = crate::BitWriter<'a, REG, CardIntEn>; +impl<'a, REG> CardIntEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_INT_EN_A::VALUE1) + self.variant(CardIntEn::Value1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_INT_EN_A::VALUE2) + self.variant(CardIntEn::Value2) } } #[doc = "Field `FIXED_TO_0` reader - Fixed to 0"] -pub type FIXED_TO_0_R = crate::BitReader; +pub type FixedTo0R = crate::BitReader; impl R { #[doc = "Bit 0 - Command Complete Status Enable"] #[inline(always)] - pub fn cmd_complete_en(&self) -> CMD_COMPLETE_EN_R { - CMD_COMPLETE_EN_R::new((self.bits & 1) != 0) + pub fn cmd_complete_en(&self) -> CmdCompleteEnR { + CmdCompleteEnR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transfer Complete Status Enable"] #[inline(always)] - pub fn tx_complete_en(&self) -> TX_COMPLETE_EN_R { - TX_COMPLETE_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn tx_complete_en(&self) -> TxCompleteEnR { + TxCompleteEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Block Gap Event Status Enable"] #[inline(always)] - pub fn block_gap_event_en(&self) -> BLOCK_GAP_EVENT_EN_R { - BLOCK_GAP_EVENT_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn block_gap_event_en(&self) -> BlockGapEventEnR { + BlockGapEventEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Buffer Write Ready Status Enable"] #[inline(always)] - pub fn buff_write_ready_en(&self) -> BUFF_WRITE_READY_EN_R { - BUFF_WRITE_READY_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn buff_write_ready_en(&self) -> BuffWriteReadyEnR { + BuffWriteReadyEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Buffer Read Ready Status Enable"] #[inline(always)] - pub fn buff_read_ready_en(&self) -> BUFF_READ_READY_EN_R { - BUFF_READ_READY_EN_R::new(((self.bits >> 5) & 1) != 0) + pub fn buff_read_ready_en(&self) -> BuffReadReadyEnR { + BuffReadReadyEnR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Card Insertion Status Enable"] #[inline(always)] - pub fn card_ins_en(&self) -> CARD_INS_EN_R { - CARD_INS_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn card_ins_en(&self) -> CardInsEnR { + CardInsEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Card Removal Status Enable"] #[inline(always)] - pub fn card_removal_en(&self) -> CARD_REMOVAL_EN_R { - CARD_REMOVAL_EN_R::new(((self.bits >> 7) & 1) != 0) + pub fn card_removal_en(&self) -> CardRemovalEnR { + CardRemovalEnR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Card Interrupt Status Enable"] #[inline(always)] - pub fn card_int_en(&self) -> CARD_INT_EN_R { - CARD_INT_EN_R::new(((self.bits >> 8) & 1) != 0) + pub fn card_int_en(&self) -> CardIntEnR { + CardIntEnR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 15 - Fixed to 0"] #[inline(always)] - pub fn fixed_to_0(&self) -> FIXED_TO_0_R { - FIXED_TO_0_R::new(((self.bits >> 15) & 1) != 0) + pub fn fixed_to_0(&self) -> FixedTo0R { + FixedTo0R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Complete Status Enable"] #[inline(always)] #[must_use] - pub fn cmd_complete_en(&mut self) -> CMD_COMPLETE_EN_W { - CMD_COMPLETE_EN_W::new(self, 0) + pub fn cmd_complete_en(&mut self) -> CmdCompleteEnW { + CmdCompleteEnW::new(self, 0) } #[doc = "Bit 1 - Transfer Complete Status Enable"] #[inline(always)] #[must_use] - pub fn tx_complete_en(&mut self) -> TX_COMPLETE_EN_W { - TX_COMPLETE_EN_W::new(self, 1) + pub fn tx_complete_en(&mut self) -> TxCompleteEnW { + TxCompleteEnW::new(self, 1) } #[doc = "Bit 2 - Block Gap Event Status Enable"] #[inline(always)] #[must_use] - pub fn block_gap_event_en(&mut self) -> BLOCK_GAP_EVENT_EN_W { - BLOCK_GAP_EVENT_EN_W::new(self, 2) + pub fn block_gap_event_en(&mut self) -> BlockGapEventEnW { + BlockGapEventEnW::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready Status Enable"] #[inline(always)] #[must_use] - pub fn buff_write_ready_en(&mut self) -> BUFF_WRITE_READY_EN_W { - BUFF_WRITE_READY_EN_W::new(self, 4) + pub fn buff_write_ready_en(&mut self) -> BuffWriteReadyEnW { + BuffWriteReadyEnW::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready Status Enable"] #[inline(always)] #[must_use] - pub fn buff_read_ready_en(&mut self) -> BUFF_READ_READY_EN_W { - BUFF_READ_READY_EN_W::new(self, 5) + pub fn buff_read_ready_en(&mut self) -> BuffReadReadyEnW { + BuffReadReadyEnW::new(self, 5) } #[doc = "Bit 6 - Card Insertion Status Enable"] #[inline(always)] #[must_use] - pub fn card_ins_en(&mut self) -> CARD_INS_EN_W { - CARD_INS_EN_W::new(self, 6) + pub fn card_ins_en(&mut self) -> CardInsEnW { + CardInsEnW::new(self, 6) } #[doc = "Bit 7 - Card Removal Status Enable"] #[inline(always)] #[must_use] - pub fn card_removal_en(&mut self) -> CARD_REMOVAL_EN_W { - CARD_REMOVAL_EN_W::new(self, 7) + pub fn card_removal_en(&mut self) -> CardRemovalEnW { + CardRemovalEnW::new(self, 7) } #[doc = "Bit 8 - Card Interrupt Status Enable"] #[inline(always)] #[must_use] - pub fn card_int_en(&mut self) -> CARD_INT_EN_W { - CARD_INT_EN_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn card_int_en(&mut self) -> CardIntEnW { + CardIntEnW::new(self, 8) } } #[doc = "Normal Interrupt Status Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`en_int_status_norm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`en_int_status_norm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EN_INT_STATUS_NORM_SPEC; -impl crate::RegisterSpec for EN_INT_STATUS_NORM_SPEC { +pub struct EnIntStatusNormSpec; +impl crate::RegisterSpec for EnIntStatusNormSpec { type Ux = u16; } #[doc = "`read()` method returns [`en_int_status_norm::R`](R) reader structure"] -impl crate::Readable for EN_INT_STATUS_NORM_SPEC {} +impl crate::Readable for EnIntStatusNormSpec {} #[doc = "`write(|w| ..)` method takes [`en_int_status_norm::W`](W) writer structure"] -impl crate::Writable for EN_INT_STATUS_NORM_SPEC { +impl crate::Writable for EnIntStatusNormSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets EN_INT_STATUS_NORM to value 0"] -impl crate::Resettable for EN_INT_STATUS_NORM_SPEC { +impl crate::Resettable for EnIntStatusNormSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/force_event_acmd_err_status.rs b/src/sdmmc/force_event_acmd_err_status.rs index 51435fb8..7f7563e9 100644 --- a/src/sdmmc/force_event_acmd_err_status.rs +++ b/src/sdmmc/force_event_acmd_err_status.rs @@ -1,250 +1,241 @@ #[doc = "Register `FORCE_EVENT_ACMD_ERR_STATUS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Force Event for Auto CMD12 NOT Executed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD_NOT_EXEC_AW { +pub enum FeAcmdNotExec { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD_NOT_EXEC_AW) -> Self { + fn from(variant: FeAcmdNotExec) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD_NOT_EXEC` writer - Force Event for Auto CMD12 NOT Executed"] -pub type FE_ACMD_NOT_EXEC_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD_NOT_EXEC_AW>; -impl<'a, REG> FE_ACMD_NOT_EXEC_W<'a, REG> +pub type FeAcmdNotExecW<'a, REG> = crate::BitWriter<'a, REG, FeAcmdNotExec>; +impl<'a, REG> FeAcmdNotExecW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD_NOT_EXEC_AW::VALUE1) + self.variant(FeAcmdNotExec::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD_NOT_EXEC_AW::VALUE2) + self.variant(FeAcmdNotExec::Value2) } } #[doc = "Force Event for Auto CMD timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD_TIMEOUT_ERR_AW { +pub enum FeAcmdTimeoutErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD_TIMEOUT_ERR_AW) -> Self { + fn from(variant: FeAcmdTimeoutErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD_TIMEOUT_ERR` writer - Force Event for Auto CMD timeout Error"] -pub type FE_ACMD_TIMEOUT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD_TIMEOUT_ERR_AW>; -impl<'a, REG> FE_ACMD_TIMEOUT_ERR_W<'a, REG> +pub type FeAcmdTimeoutErrW<'a, REG> = crate::BitWriter<'a, REG, FeAcmdTimeoutErr>; +impl<'a, REG> FeAcmdTimeoutErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD_TIMEOUT_ERR_AW::VALUE1) + self.variant(FeAcmdTimeoutErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD_TIMEOUT_ERR_AW::VALUE2) + self.variant(FeAcmdTimeoutErr::Value2) } } #[doc = "Force Event for Auto CMD CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD_CRC_ERR_AW { +pub enum FeAcmdCrcErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD_CRC_ERR_AW) -> Self { + fn from(variant: FeAcmdCrcErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD_CRC_ERR` writer - Force Event for Auto CMD CRC Error"] -pub type FE_ACMD_CRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD_CRC_ERR_AW>; -impl<'a, REG> FE_ACMD_CRC_ERR_W<'a, REG> +pub type FeAcmdCrcErrW<'a, REG> = crate::BitWriter<'a, REG, FeAcmdCrcErr>; +impl<'a, REG> FeAcmdCrcErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD_CRC_ERR_AW::VALUE1) + self.variant(FeAcmdCrcErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD_CRC_ERR_AW::VALUE2) + self.variant(FeAcmdCrcErr::Value2) } } #[doc = "Force Event for Auto CMD End bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD_END_BIT_ERR_AW { +pub enum FeAcmdEndBitErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD_END_BIT_ERR_AW) -> Self { + fn from(variant: FeAcmdEndBitErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD_END_BIT_ERR` writer - Force Event for Auto CMD End bit Error"] -pub type FE_ACMD_END_BIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD_END_BIT_ERR_AW>; -impl<'a, REG> FE_ACMD_END_BIT_ERR_W<'a, REG> +pub type FeAcmdEndBitErrW<'a, REG> = crate::BitWriter<'a, REG, FeAcmdEndBitErr>; +impl<'a, REG> FeAcmdEndBitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD_END_BIT_ERR_AW::VALUE1) + self.variant(FeAcmdEndBitErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD_END_BIT_ERR_AW::VALUE2) + self.variant(FeAcmdEndBitErr::Value2) } } #[doc = "Force Event for Auto CMD Index Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD_IND_ERR_AW { +pub enum FeAcmdIndErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD_IND_ERR_AW) -> Self { + fn from(variant: FeAcmdIndErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD_IND_ERR` writer - Force Event for Auto CMD Index Error"] -pub type FE_ACMD_IND_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD_IND_ERR_AW>; -impl<'a, REG> FE_ACMD_IND_ERR_W<'a, REG> +pub type FeAcmdIndErrW<'a, REG> = crate::BitWriter<'a, REG, FeAcmdIndErr>; +impl<'a, REG> FeAcmdIndErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD_IND_ERR_AW::VALUE1) + self.variant(FeAcmdIndErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD_IND_ERR_AW::VALUE2) + self.variant(FeAcmdIndErr::Value2) } } #[doc = "Force Event for CMD not issued by Auto CMD12 Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CMD_NOT_ISSUED_ACMD12_ERR_AW { +pub enum FeCmdNotIssuedAcmd12Err { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CMD_NOT_ISSUED_ACMD12_ERR_AW) -> Self { + fn from(variant: FeCmdNotIssuedAcmd12Err) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CMD_NOT_ISSUED_ACMD12_ERR` writer - Force Event for CMD not issued by Auto CMD12 Error"] -pub type FE_CMD_NOT_ISSUED_ACMD12_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CMD_NOT_ISSUED_ACMD12_ERR_AW>; -impl<'a, REG> FE_CMD_NOT_ISSUED_ACMD12_ERR_W<'a, REG> +pub type FeCmdNotIssuedAcmd12ErrW<'a, REG> = crate::BitWriter<'a, REG, FeCmdNotIssuedAcmd12Err>; +impl<'a, REG> FeCmdNotIssuedAcmd12ErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CMD_NOT_ISSUED_ACMD12_ERR_AW::VALUE1) + self.variant(FeCmdNotIssuedAcmd12Err::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CMD_NOT_ISSUED_ACMD12_ERR_AW::VALUE2) + self.variant(FeCmdNotIssuedAcmd12Err::Value2) } } impl W { #[doc = "Bit 0 - Force Event for Auto CMD12 NOT Executed"] #[inline(always)] #[must_use] - pub fn fe_acmd_not_exec(&mut self) -> FE_ACMD_NOT_EXEC_W { - FE_ACMD_NOT_EXEC_W::new(self, 0) + pub fn fe_acmd_not_exec(&mut self) -> FeAcmdNotExecW { + FeAcmdNotExecW::new(self, 0) } #[doc = "Bit 1 - Force Event for Auto CMD timeout Error"] #[inline(always)] #[must_use] - pub fn fe_acmd_timeout_err(&mut self) -> FE_ACMD_TIMEOUT_ERR_W { - FE_ACMD_TIMEOUT_ERR_W::new(self, 1) + pub fn fe_acmd_timeout_err(&mut self) -> FeAcmdTimeoutErrW { + FeAcmdTimeoutErrW::new(self, 1) } #[doc = "Bit 2 - Force Event for Auto CMD CRC Error"] #[inline(always)] #[must_use] - pub fn fe_acmd_crc_err(&mut self) -> FE_ACMD_CRC_ERR_W { - FE_ACMD_CRC_ERR_W::new(self, 2) + pub fn fe_acmd_crc_err(&mut self) -> FeAcmdCrcErrW { + FeAcmdCrcErrW::new(self, 2) } #[doc = "Bit 3 - Force Event for Auto CMD End bit Error"] #[inline(always)] #[must_use] - pub fn fe_acmd_end_bit_err(&mut self) -> FE_ACMD_END_BIT_ERR_W { - FE_ACMD_END_BIT_ERR_W::new(self, 3) + pub fn fe_acmd_end_bit_err(&mut self) -> FeAcmdEndBitErrW { + FeAcmdEndBitErrW::new(self, 3) } #[doc = "Bit 4 - Force Event for Auto CMD Index Error"] #[inline(always)] #[must_use] - pub fn fe_acmd_ind_err(&mut self) -> FE_ACMD_IND_ERR_W { - FE_ACMD_IND_ERR_W::new(self, 4) + pub fn fe_acmd_ind_err(&mut self) -> FeAcmdIndErrW { + FeAcmdIndErrW::new(self, 4) } #[doc = "Bit 7 - Force Event for CMD not issued by Auto CMD12 Error"] #[inline(always)] #[must_use] - pub fn fe_cmd_not_issued_acmd12_err(&mut self) -> FE_CMD_NOT_ISSUED_ACMD12_ERR_W { - FE_CMD_NOT_ISSUED_ACMD12_ERR_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn fe_cmd_not_issued_acmd12_err(&mut self) -> FeCmdNotIssuedAcmd12ErrW { + FeCmdNotIssuedAcmd12ErrW::new(self, 7) } } #[doc = "Force Event Register for Auto CMD Error Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`force_event_acmd_err_status::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FORCE_EVENT_ACMD_ERR_STATUS_SPEC; -impl crate::RegisterSpec for FORCE_EVENT_ACMD_ERR_STATUS_SPEC { +pub struct ForceEventAcmdErrStatusSpec; +impl crate::RegisterSpec for ForceEventAcmdErrStatusSpec { type Ux = u16; } #[doc = "`write(|w| ..)` method takes [`force_event_acmd_err_status::W`](W) writer structure"] -impl crate::Writable for FORCE_EVENT_ACMD_ERR_STATUS_SPEC { +impl crate::Writable for ForceEventAcmdErrStatusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets FORCE_EVENT_ACMD_ERR_STATUS to value 0"] -impl crate::Resettable for FORCE_EVENT_ACMD_ERR_STATUS_SPEC { +impl crate::Resettable for ForceEventAcmdErrStatusSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/force_event_err_status.rs b/src/sdmmc/force_event_err_status.rs index 4ce4b000..44c36826 100644 --- a/src/sdmmc/force_event_err_status.rs +++ b/src/sdmmc/force_event_err_status.rs @@ -1,435 +1,426 @@ #[doc = "Register `FORCE_EVENT_ERR_STATUS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Force Event for Command Timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CMD_TIMEOUT_ERR_AW { +pub enum FeCmdTimeoutErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CMD_TIMEOUT_ERR_AW) -> Self { + fn from(variant: FeCmdTimeoutErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CMD_TIMEOUT_ERR` writer - Force Event for Command Timeout Error"] -pub type FE_CMD_TIMEOUT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CMD_TIMEOUT_ERR_AW>; -impl<'a, REG> FE_CMD_TIMEOUT_ERR_W<'a, REG> +pub type FeCmdTimeoutErrW<'a, REG> = crate::BitWriter<'a, REG, FeCmdTimeoutErr>; +impl<'a, REG> FeCmdTimeoutErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CMD_TIMEOUT_ERR_AW::VALUE1) + self.variant(FeCmdTimeoutErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CMD_TIMEOUT_ERR_AW::VALUE2) + self.variant(FeCmdTimeoutErr::Value2) } } #[doc = "Force Event for Command CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CMD_CRC_ERR_AW { +pub enum FeCmdCrcErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CMD_CRC_ERR_AW) -> Self { + fn from(variant: FeCmdCrcErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CMD_CRC_ERR` writer - Force Event for Command CRC Error"] -pub type FE_CMD_CRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CMD_CRC_ERR_AW>; -impl<'a, REG> FE_CMD_CRC_ERR_W<'a, REG> +pub type FeCmdCrcErrW<'a, REG> = crate::BitWriter<'a, REG, FeCmdCrcErr>; +impl<'a, REG> FeCmdCrcErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CMD_CRC_ERR_AW::VALUE1) + self.variant(FeCmdCrcErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CMD_CRC_ERR_AW::VALUE2) + self.variant(FeCmdCrcErr::Value2) } } #[doc = "Force Event for Command End Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CMD_END_BIT_ERR_AW { +pub enum FeCmdEndBitErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CMD_END_BIT_ERR_AW) -> Self { + fn from(variant: FeCmdEndBitErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CMD_END_BIT_ERR` writer - Force Event for Command End Bit Error"] -pub type FE_CMD_END_BIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CMD_END_BIT_ERR_AW>; -impl<'a, REG> FE_CMD_END_BIT_ERR_W<'a, REG> +pub type FeCmdEndBitErrW<'a, REG> = crate::BitWriter<'a, REG, FeCmdEndBitErr>; +impl<'a, REG> FeCmdEndBitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CMD_END_BIT_ERR_AW::VALUE1) + self.variant(FeCmdEndBitErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CMD_END_BIT_ERR_AW::VALUE2) + self.variant(FeCmdEndBitErr::Value2) } } #[doc = "Force Event for Command Index Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CMD_IND_ERR_AW { +pub enum FeCmdIndErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CMD_IND_ERR_AW) -> Self { + fn from(variant: FeCmdIndErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CMD_IND_ERR` writer - Force Event for Command Index Error"] -pub type FE_CMD_IND_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CMD_IND_ERR_AW>; -impl<'a, REG> FE_CMD_IND_ERR_W<'a, REG> +pub type FeCmdIndErrW<'a, REG> = crate::BitWriter<'a, REG, FeCmdIndErr>; +impl<'a, REG> FeCmdIndErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CMD_IND_ERR_AW::VALUE1) + self.variant(FeCmdIndErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CMD_IND_ERR_AW::VALUE2) + self.variant(FeCmdIndErr::Value2) } } #[doc = "Force Event for Data Timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_DATA_TIMEOUT_ERR_AW { +pub enum FeDataTimeoutErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_DATA_TIMEOUT_ERR_AW) -> Self { + fn from(variant: FeDataTimeoutErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_DATA_TIMEOUT_ERR` writer - Force Event for Data Timeout Error"] -pub type FE_DATA_TIMEOUT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_DATA_TIMEOUT_ERR_AW>; -impl<'a, REG> FE_DATA_TIMEOUT_ERR_W<'a, REG> +pub type FeDataTimeoutErrW<'a, REG> = crate::BitWriter<'a, REG, FeDataTimeoutErr>; +impl<'a, REG> FeDataTimeoutErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_DATA_TIMEOUT_ERR_AW::VALUE1) + self.variant(FeDataTimeoutErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_DATA_TIMEOUT_ERR_AW::VALUE2) + self.variant(FeDataTimeoutErr::Value2) } } #[doc = "Force Event for Data CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_DATA_CRC_ERR_AW { +pub enum FeDataCrcErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_DATA_CRC_ERR_AW) -> Self { + fn from(variant: FeDataCrcErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_DATA_CRC_ERR` writer - Force Event for Data CRC Error"] -pub type FE_DATA_CRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_DATA_CRC_ERR_AW>; -impl<'a, REG> FE_DATA_CRC_ERR_W<'a, REG> +pub type FeDataCrcErrW<'a, REG> = crate::BitWriter<'a, REG, FeDataCrcErr>; +impl<'a, REG> FeDataCrcErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_DATA_CRC_ERR_AW::VALUE1) + self.variant(FeDataCrcErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_DATA_CRC_ERR_AW::VALUE2) + self.variant(FeDataCrcErr::Value2) } } #[doc = "Force Event for Data End Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_DATA_END_BIT_ERR_AW { +pub enum FeDataEndBitErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_DATA_END_BIT_ERR_AW) -> Self { + fn from(variant: FeDataEndBitErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_DATA_END_BIT_ERR` writer - Force Event for Data End Bit Error"] -pub type FE_DATA_END_BIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_DATA_END_BIT_ERR_AW>; -impl<'a, REG> FE_DATA_END_BIT_ERR_W<'a, REG> +pub type FeDataEndBitErrW<'a, REG> = crate::BitWriter<'a, REG, FeDataEndBitErr>; +impl<'a, REG> FeDataEndBitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_DATA_END_BIT_ERR_AW::VALUE1) + self.variant(FeDataEndBitErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_DATA_END_BIT_ERR_AW::VALUE2) + self.variant(FeDataEndBitErr::Value2) } } #[doc = "Force Event for Current Limit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CURRENT_LIMIT_ERR_AW { +pub enum FeCurrentLimitErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CURRENT_LIMIT_ERR_AW) -> Self { + fn from(variant: FeCurrentLimitErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CURRENT_LIMIT_ERR` writer - Force Event for Current Limit Error"] -pub type FE_CURRENT_LIMIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CURRENT_LIMIT_ERR_AW>; -impl<'a, REG> FE_CURRENT_LIMIT_ERR_W<'a, REG> +pub type FeCurrentLimitErrW<'a, REG> = crate::BitWriter<'a, REG, FeCurrentLimitErr>; +impl<'a, REG> FeCurrentLimitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CURRENT_LIMIT_ERR_AW::VALUE1) + self.variant(FeCurrentLimitErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CURRENT_LIMIT_ERR_AW::VALUE2) + self.variant(FeCurrentLimitErr::Value2) } } #[doc = "Force Event for Auto CMD Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_ACMD12_ERR_AW { +pub enum FeAcmd12Err { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_ACMD12_ERR_AW) -> Self { + fn from(variant: FeAcmd12Err) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_ACMD12_ERR` writer - Force Event for Auto CMD Error"] -pub type FE_ACMD12_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_ACMD12_ERR_AW>; -impl<'a, REG> FE_ACMD12_ERR_W<'a, REG> +pub type FeAcmd12ErrW<'a, REG> = crate::BitWriter<'a, REG, FeAcmd12Err>; +impl<'a, REG> FeAcmd12ErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_ACMD12_ERR_AW::VALUE1) + self.variant(FeAcmd12Err::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_ACMD12_ERR_AW::VALUE2) + self.variant(FeAcmd12Err::Value2) } } #[doc = "Force event for Target Response Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_TARGET_RESPONSE_ERR_AW { +pub enum FeTargetResponseErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_TARGET_RESPONSE_ERR_AW) -> Self { + fn from(variant: FeTargetResponseErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_TARGET_RESPONSE_ERR` writer - Force event for Target Response Error"] -pub type FE_TARGET_RESPONSE_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_TARGET_RESPONSE_ERR_AW>; -impl<'a, REG> FE_TARGET_RESPONSE_ERR_W<'a, REG> +pub type FeTargetResponseErrW<'a, REG> = crate::BitWriter<'a, REG, FeTargetResponseErr>; +impl<'a, REG> FeTargetResponseErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_TARGET_RESPONSE_ERR_AW::VALUE1) + self.variant(FeTargetResponseErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_TARGET_RESPONSE_ERR_AW::VALUE2) + self.variant(FeTargetResponseErr::Value2) } } #[doc = "Force Event for Ceata Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FE_CEATA_ERR_AW { +pub enum FeCeataErr { #[doc = "0: No interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Interrupt is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FE_CEATA_ERR_AW) -> Self { + fn from(variant: FeCeataErr) -> Self { variant as u8 != 0 } } #[doc = "Field `FE_CEATA_ERR` writer - Force Event for Ceata Error"] -pub type FE_CEATA_ERR_W<'a, REG> = crate::BitWriter<'a, REG, FE_CEATA_ERR_AW>; -impl<'a, REG> FE_CEATA_ERR_W<'a, REG> +pub type FeCeataErrW<'a, REG> = crate::BitWriter<'a, REG, FeCeataErr>; +impl<'a, REG> FeCeataErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FE_CEATA_ERR_AW::VALUE1) + self.variant(FeCeataErr::Value1) } #[doc = "Interrupt is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FE_CEATA_ERR_AW::VALUE2) + self.variant(FeCeataErr::Value2) } } impl W { #[doc = "Bit 0 - Force Event for Command Timeout Error"] #[inline(always)] #[must_use] - pub fn fe_cmd_timeout_err(&mut self) -> FE_CMD_TIMEOUT_ERR_W { - FE_CMD_TIMEOUT_ERR_W::new(self, 0) + pub fn fe_cmd_timeout_err(&mut self) -> FeCmdTimeoutErrW { + FeCmdTimeoutErrW::new(self, 0) } #[doc = "Bit 1 - Force Event for Command CRC Error"] #[inline(always)] #[must_use] - pub fn fe_cmd_crc_err(&mut self) -> FE_CMD_CRC_ERR_W { - FE_CMD_CRC_ERR_W::new(self, 1) + pub fn fe_cmd_crc_err(&mut self) -> FeCmdCrcErrW { + FeCmdCrcErrW::new(self, 1) } #[doc = "Bit 2 - Force Event for Command End Bit Error"] #[inline(always)] #[must_use] - pub fn fe_cmd_end_bit_err(&mut self) -> FE_CMD_END_BIT_ERR_W { - FE_CMD_END_BIT_ERR_W::new(self, 2) + pub fn fe_cmd_end_bit_err(&mut self) -> FeCmdEndBitErrW { + FeCmdEndBitErrW::new(self, 2) } #[doc = "Bit 3 - Force Event for Command Index Error"] #[inline(always)] #[must_use] - pub fn fe_cmd_ind_err(&mut self) -> FE_CMD_IND_ERR_W { - FE_CMD_IND_ERR_W::new(self, 3) + pub fn fe_cmd_ind_err(&mut self) -> FeCmdIndErrW { + FeCmdIndErrW::new(self, 3) } #[doc = "Bit 4 - Force Event for Data Timeout Error"] #[inline(always)] #[must_use] - pub fn fe_data_timeout_err(&mut self) -> FE_DATA_TIMEOUT_ERR_W { - FE_DATA_TIMEOUT_ERR_W::new(self, 4) + pub fn fe_data_timeout_err(&mut self) -> FeDataTimeoutErrW { + FeDataTimeoutErrW::new(self, 4) } #[doc = "Bit 5 - Force Event for Data CRC Error"] #[inline(always)] #[must_use] - pub fn fe_data_crc_err(&mut self) -> FE_DATA_CRC_ERR_W { - FE_DATA_CRC_ERR_W::new(self, 5) + pub fn fe_data_crc_err(&mut self) -> FeDataCrcErrW { + FeDataCrcErrW::new(self, 5) } #[doc = "Bit 6 - Force Event for Data End Bit Error"] #[inline(always)] #[must_use] - pub fn fe_data_end_bit_err(&mut self) -> FE_DATA_END_BIT_ERR_W { - FE_DATA_END_BIT_ERR_W::new(self, 6) + pub fn fe_data_end_bit_err(&mut self) -> FeDataEndBitErrW { + FeDataEndBitErrW::new(self, 6) } #[doc = "Bit 7 - Force Event for Current Limit Error"] #[inline(always)] #[must_use] - pub fn fe_current_limit_err(&mut self) -> FE_CURRENT_LIMIT_ERR_W { - FE_CURRENT_LIMIT_ERR_W::new(self, 7) + pub fn fe_current_limit_err(&mut self) -> FeCurrentLimitErrW { + FeCurrentLimitErrW::new(self, 7) } #[doc = "Bit 8 - Force Event for Auto CMD Error"] #[inline(always)] #[must_use] - pub fn fe_acmd12_err(&mut self) -> FE_ACMD12_ERR_W { - FE_ACMD12_ERR_W::new(self, 8) + pub fn fe_acmd12_err(&mut self) -> FeAcmd12ErrW { + FeAcmd12ErrW::new(self, 8) } #[doc = "Bit 12 - Force event for Target Response Error"] #[inline(always)] #[must_use] - pub fn fe_target_response_err(&mut self) -> FE_TARGET_RESPONSE_ERR_W { - FE_TARGET_RESPONSE_ERR_W::new(self, 12) + pub fn fe_target_response_err(&mut self) -> FeTargetResponseErrW { + FeTargetResponseErrW::new(self, 12) } #[doc = "Bit 13 - Force Event for Ceata Error"] #[inline(always)] #[must_use] - pub fn fe_ceata_err(&mut self) -> FE_CEATA_ERR_W { - FE_CEATA_ERR_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn fe_ceata_err(&mut self) -> FeCeataErrW { + FeCeataErrW::new(self, 13) } } #[doc = "Force Event Register for Error Interrupt Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`force_event_err_status::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FORCE_EVENT_ERR_STATUS_SPEC; -impl crate::RegisterSpec for FORCE_EVENT_ERR_STATUS_SPEC { +pub struct ForceEventErrStatusSpec; +impl crate::RegisterSpec for ForceEventErrStatusSpec { type Ux = u16; } #[doc = "`write(|w| ..)` method takes [`force_event_err_status::W`](W) writer structure"] -impl crate::Writable for FORCE_EVENT_ERR_STATUS_SPEC { +impl crate::Writable for ForceEventErrStatusSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets FORCE_EVENT_ERR_STATUS to value 0"] -impl crate::Resettable for FORCE_EVENT_ERR_STATUS_SPEC { +impl crate::Resettable for ForceEventErrStatusSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/host_ctrl.rs b/src/sdmmc/host_ctrl.rs index 856fec8b..a58b80bc 100644 --- a/src/sdmmc/host_ctrl.rs +++ b/src/sdmmc/host_ctrl.rs @@ -1,418 +1,409 @@ #[doc = "Register `HOST_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HOST_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `LED_CTRL` reader - LED Control"] -pub type LED_CTRL_R = crate::BitReader; +pub type W = crate::W; #[doc = "LED Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LED_CTRL_A { +pub enum LedCtrl { #[doc = "0: LED off"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: LED on"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LED_CTRL_A) -> Self { + fn from(variant: LedCtrl) -> Self { variant as u8 != 0 } } -impl LED_CTRL_R { +#[doc = "Field `LED_CTRL` reader - LED Control"] +pub type LedCtrlR = crate::BitReader; +impl LedCtrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LED_CTRL_A { + pub const fn variant(&self) -> LedCtrl { match self.bits { - false => LED_CTRL_A::VALUE1, - true => LED_CTRL_A::VALUE2, + false => LedCtrl::Value1, + true => LedCtrl::Value2, } } #[doc = "LED off"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LED_CTRL_A::VALUE1 + *self == LedCtrl::Value1 } #[doc = "LED on"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LED_CTRL_A::VALUE2 + *self == LedCtrl::Value2 } } #[doc = "Field `LED_CTRL` writer - LED Control"] -pub type LED_CTRL_W<'a, REG> = crate::BitWriter<'a, REG, LED_CTRL_A>; -impl<'a, REG> LED_CTRL_W<'a, REG> +pub type LedCtrlW<'a, REG> = crate::BitWriter<'a, REG, LedCtrl>; +impl<'a, REG> LedCtrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "LED off"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LED_CTRL_A::VALUE1) + self.variant(LedCtrl::Value1) } #[doc = "LED on"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LED_CTRL_A::VALUE2) + self.variant(LedCtrl::Value2) } } -#[doc = "Field `DATA_TX_WIDTH` reader - Data Transfer Width (SD1 or SD4)"] -pub type DATA_TX_WIDTH_R = crate::BitReader; #[doc = "Data Transfer Width (SD1 or SD4)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_TX_WIDTH_A { +pub enum DataTxWidth { #[doc = "0: 1 bit mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 4-bit mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_TX_WIDTH_A) -> Self { + fn from(variant: DataTxWidth) -> Self { variant as u8 != 0 } } -impl DATA_TX_WIDTH_R { +#[doc = "Field `DATA_TX_WIDTH` reader - Data Transfer Width (SD1 or SD4)"] +pub type DataTxWidthR = crate::BitReader; +impl DataTxWidthR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_TX_WIDTH_A { + pub const fn variant(&self) -> DataTxWidth { match self.bits { - false => DATA_TX_WIDTH_A::VALUE1, - true => DATA_TX_WIDTH_A::VALUE2, + false => DataTxWidth::Value1, + true => DataTxWidth::Value2, } } #[doc = "1 bit mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_TX_WIDTH_A::VALUE1 + *self == DataTxWidth::Value1 } #[doc = "4-bit mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_TX_WIDTH_A::VALUE2 + *self == DataTxWidth::Value2 } } #[doc = "Field `DATA_TX_WIDTH` writer - Data Transfer Width (SD1 or SD4)"] -pub type DATA_TX_WIDTH_W<'a, REG> = crate::BitWriter<'a, REG, DATA_TX_WIDTH_A>; -impl<'a, REG> DATA_TX_WIDTH_W<'a, REG> +pub type DataTxWidthW<'a, REG> = crate::BitWriter<'a, REG, DataTxWidth>; +impl<'a, REG> DataTxWidthW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "1 bit mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_TX_WIDTH_A::VALUE1) + self.variant(DataTxWidth::Value1) } #[doc = "4-bit mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_TX_WIDTH_A::VALUE2) + self.variant(DataTxWidth::Value2) } } -#[doc = "Field `HIGH_SPEED_EN` reader - High Speed Enable"] -pub type HIGH_SPEED_EN_R = crate::BitReader; #[doc = "High Speed Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HIGH_SPEED_EN_A { +pub enum HighSpeedEn { #[doc = "0: Normal Speed Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: High Speed Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HIGH_SPEED_EN_A) -> Self { + fn from(variant: HighSpeedEn) -> Self { variant as u8 != 0 } } -impl HIGH_SPEED_EN_R { +#[doc = "Field `HIGH_SPEED_EN` reader - High Speed Enable"] +pub type HighSpeedEnR = crate::BitReader; +impl HighSpeedEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HIGH_SPEED_EN_A { + pub const fn variant(&self) -> HighSpeedEn { match self.bits { - false => HIGH_SPEED_EN_A::VALUE1, - true => HIGH_SPEED_EN_A::VALUE2, + false => HighSpeedEn::Value1, + true => HighSpeedEn::Value2, } } #[doc = "Normal Speed Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HIGH_SPEED_EN_A::VALUE1 + *self == HighSpeedEn::Value1 } #[doc = "High Speed Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HIGH_SPEED_EN_A::VALUE2 + *self == HighSpeedEn::Value2 } } #[doc = "Field `HIGH_SPEED_EN` writer - High Speed Enable"] -pub type HIGH_SPEED_EN_W<'a, REG> = crate::BitWriter<'a, REG, HIGH_SPEED_EN_A>; -impl<'a, REG> HIGH_SPEED_EN_W<'a, REG> +pub type HighSpeedEnW<'a, REG> = crate::BitWriter<'a, REG, HighSpeedEn>; +impl<'a, REG> HighSpeedEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Speed Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HIGH_SPEED_EN_A::VALUE1) + self.variant(HighSpeedEn::Value1) } #[doc = "High Speed Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HIGH_SPEED_EN_A::VALUE2) + self.variant(HighSpeedEn::Value2) } } -#[doc = "Field `SD_8BIT_MODE` reader - Extended Data Transfer Width"] -pub type SD_8BIT_MODE_R = crate::BitReader; #[doc = "Extended Data Transfer Width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SD_8BIT_MODE_A { +pub enum Sd8bitMode { #[doc = "0: Bus Width is selected by Data Transfer Width"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 8-bit Bus Width"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SD_8BIT_MODE_A) -> Self { + fn from(variant: Sd8bitMode) -> Self { variant as u8 != 0 } } -impl SD_8BIT_MODE_R { +#[doc = "Field `SD_8BIT_MODE` reader - Extended Data Transfer Width"] +pub type Sd8bitModeR = crate::BitReader; +impl Sd8bitModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SD_8BIT_MODE_A { + pub const fn variant(&self) -> Sd8bitMode { match self.bits { - false => SD_8BIT_MODE_A::VALUE1, - true => SD_8BIT_MODE_A::VALUE2, + false => Sd8bitMode::Value1, + true => Sd8bitMode::Value2, } } #[doc = "Bus Width is selected by Data Transfer Width"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SD_8BIT_MODE_A::VALUE1 + *self == Sd8bitMode::Value1 } #[doc = "8-bit Bus Width"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SD_8BIT_MODE_A::VALUE2 + *self == Sd8bitMode::Value2 } } #[doc = "Field `SD_8BIT_MODE` writer - Extended Data Transfer Width"] -pub type SD_8BIT_MODE_W<'a, REG> = crate::BitWriter<'a, REG, SD_8BIT_MODE_A>; -impl<'a, REG> SD_8BIT_MODE_W<'a, REG> +pub type Sd8bitModeW<'a, REG> = crate::BitWriter<'a, REG, Sd8bitMode>; +impl<'a, REG> Sd8bitModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bus Width is selected by Data Transfer Width"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SD_8BIT_MODE_A::VALUE1) + self.variant(Sd8bitMode::Value1) } #[doc = "8-bit Bus Width"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SD_8BIT_MODE_A::VALUE2) + self.variant(Sd8bitMode::Value2) } } -#[doc = "Field `CARD_DETECT_TEST_LEVEL` reader - Card Detect Test Level"] -pub type CARD_DETECT_TEST_LEVEL_R = crate::BitReader; #[doc = "Card Detect Test Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_DETECT_TEST_LEVEL_A { +pub enum CardDetectTestLevel { #[doc = "0: No Card"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card Inserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_DETECT_TEST_LEVEL_A) -> Self { + fn from(variant: CardDetectTestLevel) -> Self { variant as u8 != 0 } } -impl CARD_DETECT_TEST_LEVEL_R { +#[doc = "Field `CARD_DETECT_TEST_LEVEL` reader - Card Detect Test Level"] +pub type CardDetectTestLevelR = crate::BitReader; +impl CardDetectTestLevelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_DETECT_TEST_LEVEL_A { + pub const fn variant(&self) -> CardDetectTestLevel { match self.bits { - false => CARD_DETECT_TEST_LEVEL_A::VALUE1, - true => CARD_DETECT_TEST_LEVEL_A::VALUE2, + false => CardDetectTestLevel::Value1, + true => CardDetectTestLevel::Value2, } } #[doc = "No Card"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_DETECT_TEST_LEVEL_A::VALUE1 + *self == CardDetectTestLevel::Value1 } #[doc = "Card Inserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_DETECT_TEST_LEVEL_A::VALUE2 + *self == CardDetectTestLevel::Value2 } } #[doc = "Field `CARD_DETECT_TEST_LEVEL` writer - Card Detect Test Level"] -pub type CARD_DETECT_TEST_LEVEL_W<'a, REG> = crate::BitWriter<'a, REG, CARD_DETECT_TEST_LEVEL_A>; -impl<'a, REG> CARD_DETECT_TEST_LEVEL_W<'a, REG> +pub type CardDetectTestLevelW<'a, REG> = crate::BitWriter<'a, REG, CardDetectTestLevel>; +impl<'a, REG> CardDetectTestLevelW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Card"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_DETECT_TEST_LEVEL_A::VALUE1) + self.variant(CardDetectTestLevel::Value1) } #[doc = "Card Inserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_DETECT_TEST_LEVEL_A::VALUE2) + self.variant(CardDetectTestLevel::Value2) } } -#[doc = "Field `CARD_DET_SIGNAL_DETECT` reader - Card detect signal detetction"] -pub type CARD_DET_SIGNAL_DETECT_R = crate::BitReader; #[doc = "Card detect signal detetction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_DET_SIGNAL_DETECT_A { +pub enum CardDetSignalDetect { #[doc = "0: SDCD is selected (for normal use)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The card detect test level is selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_DET_SIGNAL_DETECT_A) -> Self { + fn from(variant: CardDetSignalDetect) -> Self { variant as u8 != 0 } } -impl CARD_DET_SIGNAL_DETECT_R { +#[doc = "Field `CARD_DET_SIGNAL_DETECT` reader - Card detect signal detetction"] +pub type CardDetSignalDetectR = crate::BitReader; +impl CardDetSignalDetectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_DET_SIGNAL_DETECT_A { + pub const fn variant(&self) -> CardDetSignalDetect { match self.bits { - false => CARD_DET_SIGNAL_DETECT_A::VALUE1, - true => CARD_DET_SIGNAL_DETECT_A::VALUE2, + false => CardDetSignalDetect::Value1, + true => CardDetSignalDetect::Value2, } } #[doc = "SDCD is selected (for normal use)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_DET_SIGNAL_DETECT_A::VALUE1 + *self == CardDetSignalDetect::Value1 } #[doc = "The card detect test level is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_DET_SIGNAL_DETECT_A::VALUE2 + *self == CardDetSignalDetect::Value2 } } #[doc = "Field `CARD_DET_SIGNAL_DETECT` writer - Card detect signal detetction"] -pub type CARD_DET_SIGNAL_DETECT_W<'a, REG> = crate::BitWriter<'a, REG, CARD_DET_SIGNAL_DETECT_A>; -impl<'a, REG> CARD_DET_SIGNAL_DETECT_W<'a, REG> +pub type CardDetSignalDetectW<'a, REG> = crate::BitWriter<'a, REG, CardDetSignalDetect>; +impl<'a, REG> CardDetSignalDetectW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SDCD is selected (for normal use)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_DET_SIGNAL_DETECT_A::VALUE1) + self.variant(CardDetSignalDetect::Value1) } #[doc = "The card detect test level is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_DET_SIGNAL_DETECT_A::VALUE2) + self.variant(CardDetSignalDetect::Value2) } } impl R { #[doc = "Bit 0 - LED Control"] #[inline(always)] - pub fn led_ctrl(&self) -> LED_CTRL_R { - LED_CTRL_R::new((self.bits & 1) != 0) + pub fn led_ctrl(&self) -> LedCtrlR { + LedCtrlR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Data Transfer Width (SD1 or SD4)"] #[inline(always)] - pub fn data_tx_width(&self) -> DATA_TX_WIDTH_R { - DATA_TX_WIDTH_R::new(((self.bits >> 1) & 1) != 0) + pub fn data_tx_width(&self) -> DataTxWidthR { + DataTxWidthR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - High Speed Enable"] #[inline(always)] - pub fn high_speed_en(&self) -> HIGH_SPEED_EN_R { - HIGH_SPEED_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn high_speed_en(&self) -> HighSpeedEnR { + HighSpeedEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 5 - Extended Data Transfer Width"] #[inline(always)] - pub fn sd_8bit_mode(&self) -> SD_8BIT_MODE_R { - SD_8BIT_MODE_R::new(((self.bits >> 5) & 1) != 0) + pub fn sd_8bit_mode(&self) -> Sd8bitModeR { + Sd8bitModeR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Card Detect Test Level"] #[inline(always)] - pub fn card_detect_test_level(&self) -> CARD_DETECT_TEST_LEVEL_R { - CARD_DETECT_TEST_LEVEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn card_detect_test_level(&self) -> CardDetectTestLevelR { + CardDetectTestLevelR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Card detect signal detetction"] #[inline(always)] - pub fn card_det_signal_detect(&self) -> CARD_DET_SIGNAL_DETECT_R { - CARD_DET_SIGNAL_DETECT_R::new(((self.bits >> 7) & 1) != 0) + pub fn card_det_signal_detect(&self) -> CardDetSignalDetectR { + CardDetSignalDetectR::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - LED Control"] #[inline(always)] #[must_use] - pub fn led_ctrl(&mut self) -> LED_CTRL_W { - LED_CTRL_W::new(self, 0) + pub fn led_ctrl(&mut self) -> LedCtrlW { + LedCtrlW::new(self, 0) } #[doc = "Bit 1 - Data Transfer Width (SD1 or SD4)"] #[inline(always)] #[must_use] - pub fn data_tx_width(&mut self) -> DATA_TX_WIDTH_W { - DATA_TX_WIDTH_W::new(self, 1) + pub fn data_tx_width(&mut self) -> DataTxWidthW { + DataTxWidthW::new(self, 1) } #[doc = "Bit 2 - High Speed Enable"] #[inline(always)] #[must_use] - pub fn high_speed_en(&mut self) -> HIGH_SPEED_EN_W { - HIGH_SPEED_EN_W::new(self, 2) + pub fn high_speed_en(&mut self) -> HighSpeedEnW { + HighSpeedEnW::new(self, 2) } #[doc = "Bit 5 - Extended Data Transfer Width"] #[inline(always)] #[must_use] - pub fn sd_8bit_mode(&mut self) -> SD_8BIT_MODE_W { - SD_8BIT_MODE_W::new(self, 5) + pub fn sd_8bit_mode(&mut self) -> Sd8bitModeW { + Sd8bitModeW::new(self, 5) } #[doc = "Bit 6 - Card Detect Test Level"] #[inline(always)] #[must_use] - pub fn card_detect_test_level(&mut self) -> CARD_DETECT_TEST_LEVEL_W { - CARD_DETECT_TEST_LEVEL_W::new(self, 6) + pub fn card_detect_test_level(&mut self) -> CardDetectTestLevelW { + CardDetectTestLevelW::new(self, 6) } #[doc = "Bit 7 - Card detect signal detetction"] #[inline(always)] #[must_use] - pub fn card_det_signal_detect(&mut self) -> CARD_DET_SIGNAL_DETECT_W { - CARD_DET_SIGNAL_DETECT_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn card_det_signal_detect(&mut self) -> CardDetSignalDetectW { + CardDetSignalDetectW::new(self, 7) } } #[doc = "Host Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`host_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`host_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HOST_CTRL_SPEC; -impl crate::RegisterSpec for HOST_CTRL_SPEC { +pub struct HostCtrlSpec; +impl crate::RegisterSpec for HostCtrlSpec { type Ux = u8; } #[doc = "`read()` method returns [`host_ctrl::R`](R) reader structure"] -impl crate::Readable for HOST_CTRL_SPEC {} +impl crate::Readable for HostCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`host_ctrl::W`](W) writer structure"] -impl crate::Writable for HOST_CTRL_SPEC { +impl crate::Writable for HostCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets HOST_CTRL to value 0"] -impl crate::Resettable for HOST_CTRL_SPEC { +impl crate::Resettable for HostCtrlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc/int_status_err.rs b/src/sdmmc/int_status_err.rs index 050b5104..ee1ec6aa 100644 --- a/src/sdmmc/int_status_err.rs +++ b/src/sdmmc/int_status_err.rs @@ -1,674 +1,665 @@ #[doc = "Register `INT_STATUS_ERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INT_STATUS_ERR` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_TIMEOUT_ERR` reader - Command Timeout Error"] -pub type CMD_TIMEOUT_ERR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_TIMEOUT_ERR_A { +pub enum CmdTimeoutErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timeout"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_TIMEOUT_ERR_A) -> Self { + fn from(variant: CmdTimeoutErr) -> Self { variant as u8 != 0 } } -impl CMD_TIMEOUT_ERR_R { +#[doc = "Field `CMD_TIMEOUT_ERR` reader - Command Timeout Error"] +pub type CmdTimeoutErrR = crate::BitReader; +impl CmdTimeoutErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_TIMEOUT_ERR_A { + pub const fn variant(&self) -> CmdTimeoutErr { match self.bits { - false => CMD_TIMEOUT_ERR_A::VALUE1, - true => CMD_TIMEOUT_ERR_A::VALUE2, + false => CmdTimeoutErr::Value1, + true => CmdTimeoutErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_TIMEOUT_ERR_A::VALUE1 + *self == CmdTimeoutErr::Value1 } #[doc = "Timeout"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_TIMEOUT_ERR_A::VALUE2 + *self == CmdTimeoutErr::Value2 } } #[doc = "Field `CMD_TIMEOUT_ERR` writer - Command Timeout Error"] -pub type CMD_TIMEOUT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CMD_TIMEOUT_ERR_A>; -impl<'a, REG> CMD_TIMEOUT_ERR_W<'a, REG> +pub type CmdTimeoutErrW<'a, REG> = crate::BitWriter<'a, REG, CmdTimeoutErr>; +impl<'a, REG> CmdTimeoutErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_A::VALUE1) + self.variant(CmdTimeoutErr::Value1) } #[doc = "Timeout"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_TIMEOUT_ERR_A::VALUE2) + self.variant(CmdTimeoutErr::Value2) } } -#[doc = "Field `CMD_CRC_ERR` reader - Command CRC Error"] -pub type CMD_CRC_ERR_R = crate::BitReader; #[doc = "Command CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_CRC_ERR_A { +pub enum CmdCrcErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: CRC Error Generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_CRC_ERR_A) -> Self { + fn from(variant: CmdCrcErr) -> Self { variant as u8 != 0 } } -impl CMD_CRC_ERR_R { +#[doc = "Field `CMD_CRC_ERR` reader - Command CRC Error"] +pub type CmdCrcErrR = crate::BitReader; +impl CmdCrcErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_CRC_ERR_A { + pub const fn variant(&self) -> CmdCrcErr { match self.bits { - false => CMD_CRC_ERR_A::VALUE1, - true => CMD_CRC_ERR_A::VALUE2, + false => CmdCrcErr::Value1, + true => CmdCrcErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_CRC_ERR_A::VALUE1 + *self == CmdCrcErr::Value1 } #[doc = "CRC Error Generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_CRC_ERR_A::VALUE2 + *self == CmdCrcErr::Value2 } } #[doc = "Field `CMD_CRC_ERR` writer - Command CRC Error"] -pub type CMD_CRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CMD_CRC_ERR_A>; -impl<'a, REG> CMD_CRC_ERR_W<'a, REG> +pub type CmdCrcErrW<'a, REG> = crate::BitWriter<'a, REG, CmdCrcErr>; +impl<'a, REG> CmdCrcErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_A::VALUE1) + self.variant(CmdCrcErr::Value1) } #[doc = "CRC Error Generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_CRC_ERR_A::VALUE2) + self.variant(CmdCrcErr::Value2) } } -#[doc = "Field `CMD_END_BIT_ERR` reader - Command End Bit Error"] -pub type CMD_END_BIT_ERR_R = crate::BitReader; #[doc = "Command End Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_END_BIT_ERR_A { +pub enum CmdEndBitErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: End Bit Error Generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_END_BIT_ERR_A) -> Self { + fn from(variant: CmdEndBitErr) -> Self { variant as u8 != 0 } } -impl CMD_END_BIT_ERR_R { +#[doc = "Field `CMD_END_BIT_ERR` reader - Command End Bit Error"] +pub type CmdEndBitErrR = crate::BitReader; +impl CmdEndBitErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_END_BIT_ERR_A { + pub const fn variant(&self) -> CmdEndBitErr { match self.bits { - false => CMD_END_BIT_ERR_A::VALUE1, - true => CMD_END_BIT_ERR_A::VALUE2, + false => CmdEndBitErr::Value1, + true => CmdEndBitErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_END_BIT_ERR_A::VALUE1 + *self == CmdEndBitErr::Value1 } #[doc = "End Bit Error Generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_END_BIT_ERR_A::VALUE2 + *self == CmdEndBitErr::Value2 } } #[doc = "Field `CMD_END_BIT_ERR` writer - Command End Bit Error"] -pub type CMD_END_BIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CMD_END_BIT_ERR_A>; -impl<'a, REG> CMD_END_BIT_ERR_W<'a, REG> +pub type CmdEndBitErrW<'a, REG> = crate::BitWriter<'a, REG, CmdEndBitErr>; +impl<'a, REG> CmdEndBitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_A::VALUE1) + self.variant(CmdEndBitErr::Value1) } #[doc = "End Bit Error Generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_END_BIT_ERR_A::VALUE2) + self.variant(CmdEndBitErr::Value2) } } -#[doc = "Field `CMD_IND_ERR` reader - Command Index Error"] -pub type CMD_IND_ERR_R = crate::BitReader; #[doc = "Command Index Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_IND_ERR_A { +pub enum CmdIndErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_IND_ERR_A) -> Self { + fn from(variant: CmdIndErr) -> Self { variant as u8 != 0 } } -impl CMD_IND_ERR_R { +#[doc = "Field `CMD_IND_ERR` reader - Command Index Error"] +pub type CmdIndErrR = crate::BitReader; +impl CmdIndErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_IND_ERR_A { + pub const fn variant(&self) -> CmdIndErr { match self.bits { - false => CMD_IND_ERR_A::VALUE1, - true => CMD_IND_ERR_A::VALUE2, + false => CmdIndErr::Value1, + true => CmdIndErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_IND_ERR_A::VALUE1 + *self == CmdIndErr::Value1 } #[doc = "Error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_IND_ERR_A::VALUE2 + *self == CmdIndErr::Value2 } } #[doc = "Field `CMD_IND_ERR` writer - Command Index Error"] -pub type CMD_IND_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CMD_IND_ERR_A>; -impl<'a, REG> CMD_IND_ERR_W<'a, REG> +pub type CmdIndErrW<'a, REG> = crate::BitWriter<'a, REG, CmdIndErr>; +impl<'a, REG> CmdIndErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_A::VALUE1) + self.variant(CmdIndErr::Value1) } #[doc = "Error"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_IND_ERR_A::VALUE2) + self.variant(CmdIndErr::Value2) } } -#[doc = "Field `DATA_TIMEOUT_ERR` reader - Data Timeout Error"] -pub type DATA_TIMEOUT_ERR_R = crate::BitReader; #[doc = "Data Timeout Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_TIMEOUT_ERR_A { +pub enum DataTimeoutErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timeout"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_TIMEOUT_ERR_A) -> Self { + fn from(variant: DataTimeoutErr) -> Self { variant as u8 != 0 } } -impl DATA_TIMEOUT_ERR_R { +#[doc = "Field `DATA_TIMEOUT_ERR` reader - Data Timeout Error"] +pub type DataTimeoutErrR = crate::BitReader; +impl DataTimeoutErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_TIMEOUT_ERR_A { + pub const fn variant(&self) -> DataTimeoutErr { match self.bits { - false => DATA_TIMEOUT_ERR_A::VALUE1, - true => DATA_TIMEOUT_ERR_A::VALUE2, + false => DataTimeoutErr::Value1, + true => DataTimeoutErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_TIMEOUT_ERR_A::VALUE1 + *self == DataTimeoutErr::Value1 } #[doc = "Timeout"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_TIMEOUT_ERR_A::VALUE2 + *self == DataTimeoutErr::Value2 } } #[doc = "Field `DATA_TIMEOUT_ERR` writer - Data Timeout Error"] -pub type DATA_TIMEOUT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, DATA_TIMEOUT_ERR_A>; -impl<'a, REG> DATA_TIMEOUT_ERR_W<'a, REG> +pub type DataTimeoutErrW<'a, REG> = crate::BitWriter<'a, REG, DataTimeoutErr>; +impl<'a, REG> DataTimeoutErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_A::VALUE1) + self.variant(DataTimeoutErr::Value1) } #[doc = "Timeout"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_TIMEOUT_ERR_A::VALUE2) + self.variant(DataTimeoutErr::Value2) } } -#[doc = "Field `DATA_CRC_ERR` reader - Data CRC Error"] -pub type DATA_CRC_ERR_R = crate::BitReader; #[doc = "Data CRC Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_CRC_ERR_A { +pub enum DataCrcErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_CRC_ERR_A) -> Self { + fn from(variant: DataCrcErr) -> Self { variant as u8 != 0 } } -impl DATA_CRC_ERR_R { +#[doc = "Field `DATA_CRC_ERR` reader - Data CRC Error"] +pub type DataCrcErrR = crate::BitReader; +impl DataCrcErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_CRC_ERR_A { + pub const fn variant(&self) -> DataCrcErr { match self.bits { - false => DATA_CRC_ERR_A::VALUE1, - true => DATA_CRC_ERR_A::VALUE2, + false => DataCrcErr::Value1, + true => DataCrcErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_CRC_ERR_A::VALUE1 + *self == DataCrcErr::Value1 } #[doc = "Error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_CRC_ERR_A::VALUE2 + *self == DataCrcErr::Value2 } } #[doc = "Field `DATA_CRC_ERR` writer - Data CRC Error"] -pub type DATA_CRC_ERR_W<'a, REG> = crate::BitWriter<'a, REG, DATA_CRC_ERR_A>; -impl<'a, REG> DATA_CRC_ERR_W<'a, REG> +pub type DataCrcErrW<'a, REG> = crate::BitWriter<'a, REG, DataCrcErr>; +impl<'a, REG> DataCrcErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_A::VALUE1) + self.variant(DataCrcErr::Value1) } #[doc = "Error"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_CRC_ERR_A::VALUE2) + self.variant(DataCrcErr::Value2) } } -#[doc = "Field `DATA_END_BIT_ERR` reader - Data End Bit Error"] -pub type DATA_END_BIT_ERR_R = crate::BitReader; #[doc = "Data End Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DATA_END_BIT_ERR_A { +pub enum DataEndBitErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DATA_END_BIT_ERR_A) -> Self { + fn from(variant: DataEndBitErr) -> Self { variant as u8 != 0 } } -impl DATA_END_BIT_ERR_R { +#[doc = "Field `DATA_END_BIT_ERR` reader - Data End Bit Error"] +pub type DataEndBitErrR = crate::BitReader; +impl DataEndBitErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DATA_END_BIT_ERR_A { + pub const fn variant(&self) -> DataEndBitErr { match self.bits { - false => DATA_END_BIT_ERR_A::VALUE1, - true => DATA_END_BIT_ERR_A::VALUE2, + false => DataEndBitErr::Value1, + true => DataEndBitErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DATA_END_BIT_ERR_A::VALUE1 + *self == DataEndBitErr::Value1 } #[doc = "Error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DATA_END_BIT_ERR_A::VALUE2 + *self == DataEndBitErr::Value2 } } #[doc = "Field `DATA_END_BIT_ERR` writer - Data End Bit Error"] -pub type DATA_END_BIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, DATA_END_BIT_ERR_A>; -impl<'a, REG> DATA_END_BIT_ERR_W<'a, REG> +pub type DataEndBitErrW<'a, REG> = crate::BitWriter<'a, REG, DataEndBitErr>; +impl<'a, REG> DataEndBitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_A::VALUE1) + self.variant(DataEndBitErr::Value1) } #[doc = "Error"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DATA_END_BIT_ERR_A::VALUE2) + self.variant(DataEndBitErr::Value2) } } -#[doc = "Field `CURRENT_LIMIT_ERR` reader - Current Limit Error"] -pub type CURRENT_LIMIT_ERR_R = crate::BitReader; #[doc = "Current Limit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CURRENT_LIMIT_ERR_A { +pub enum CurrentLimitErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power Fail"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CURRENT_LIMIT_ERR_A) -> Self { + fn from(variant: CurrentLimitErr) -> Self { variant as u8 != 0 } } -impl CURRENT_LIMIT_ERR_R { +#[doc = "Field `CURRENT_LIMIT_ERR` reader - Current Limit Error"] +pub type CurrentLimitErrR = crate::BitReader; +impl CurrentLimitErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CURRENT_LIMIT_ERR_A { + pub const fn variant(&self) -> CurrentLimitErr { match self.bits { - false => CURRENT_LIMIT_ERR_A::VALUE1, - true => CURRENT_LIMIT_ERR_A::VALUE2, + false => CurrentLimitErr::Value1, + true => CurrentLimitErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CURRENT_LIMIT_ERR_A::VALUE1 + *self == CurrentLimitErr::Value1 } #[doc = "Power Fail"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CURRENT_LIMIT_ERR_A::VALUE2 + *self == CurrentLimitErr::Value2 } } #[doc = "Field `CURRENT_LIMIT_ERR` writer - Current Limit Error"] -pub type CURRENT_LIMIT_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CURRENT_LIMIT_ERR_A>; -impl<'a, REG> CURRENT_LIMIT_ERR_W<'a, REG> +pub type CurrentLimitErrW<'a, REG> = crate::BitWriter<'a, REG, CurrentLimitErr>; +impl<'a, REG> CurrentLimitErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_A::VALUE1) + self.variant(CurrentLimitErr::Value1) } #[doc = "Power Fail"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CURRENT_LIMIT_ERR_A::VALUE2) + self.variant(CurrentLimitErr::Value2) } } -#[doc = "Field `ACMD_ERR` reader - Auto CMD Error"] -pub type ACMD_ERR_R = crate::BitReader; #[doc = "Auto CMD Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACMD_ERR_A { +pub enum AcmdErr { #[doc = "0: No Error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACMD_ERR_A) -> Self { + fn from(variant: AcmdErr) -> Self { variant as u8 != 0 } } -impl ACMD_ERR_R { +#[doc = "Field `ACMD_ERR` reader - Auto CMD Error"] +pub type AcmdErrR = crate::BitReader; +impl AcmdErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACMD_ERR_A { + pub const fn variant(&self) -> AcmdErr { match self.bits { - false => ACMD_ERR_A::VALUE1, - true => ACMD_ERR_A::VALUE2, + false => AcmdErr::Value1, + true => AcmdErr::Value2, } } #[doc = "No Error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_ERR_A::VALUE1 + *self == AcmdErr::Value1 } #[doc = "Error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_ERR_A::VALUE2 + *self == AcmdErr::Value2 } } #[doc = "Field `ACMD_ERR` writer - Auto CMD Error"] -pub type ACMD_ERR_W<'a, REG> = crate::BitWriter<'a, REG, ACMD_ERR_A>; -impl<'a, REG> ACMD_ERR_W<'a, REG> +pub type AcmdErrW<'a, REG> = crate::BitWriter<'a, REG, AcmdErr>; +impl<'a, REG> AcmdErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_A::VALUE1) + self.variant(AcmdErr::Value1) } #[doc = "Error"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACMD_ERR_A::VALUE2) + self.variant(AcmdErr::Value2) } } -#[doc = "Field `CEATA_ERR` reader - Ceata Error Status"] -pub type CEATA_ERR_R = crate::BitReader; #[doc = "Ceata Error Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEATA_ERR_A { +pub enum CeataErr { #[doc = "0: no error"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: error"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEATA_ERR_A) -> Self { + fn from(variant: CeataErr) -> Self { variant as u8 != 0 } } -impl CEATA_ERR_R { +#[doc = "Field `CEATA_ERR` reader - Ceata Error Status"] +pub type CeataErrR = crate::BitReader; +impl CeataErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEATA_ERR_A { + pub const fn variant(&self) -> CeataErr { match self.bits { - false => CEATA_ERR_A::VALUE1, - true => CEATA_ERR_A::VALUE2, + false => CeataErr::Value1, + true => CeataErr::Value2, } } #[doc = "no error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEATA_ERR_A::VALUE1 + *self == CeataErr::Value1 } #[doc = "error"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEATA_ERR_A::VALUE2 + *self == CeataErr::Value2 } } #[doc = "Field `CEATA_ERR` writer - Ceata Error Status"] -pub type CEATA_ERR_W<'a, REG> = crate::BitWriter<'a, REG, CEATA_ERR_A>; -impl<'a, REG> CEATA_ERR_W<'a, REG> +pub type CeataErrW<'a, REG> = crate::BitWriter<'a, REG, CeataErr>; +impl<'a, REG> CeataErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_A::VALUE1) + self.variant(CeataErr::Value1) } #[doc = "error"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEATA_ERR_A::VALUE2) + self.variant(CeataErr::Value2) } } impl R { #[doc = "Bit 0 - Command Timeout Error"] #[inline(always)] - pub fn cmd_timeout_err(&self) -> CMD_TIMEOUT_ERR_R { - CMD_TIMEOUT_ERR_R::new((self.bits & 1) != 0) + pub fn cmd_timeout_err(&self) -> CmdTimeoutErrR { + CmdTimeoutErrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Command CRC Error"] #[inline(always)] - pub fn cmd_crc_err(&self) -> CMD_CRC_ERR_R { - CMD_CRC_ERR_R::new(((self.bits >> 1) & 1) != 0) + pub fn cmd_crc_err(&self) -> CmdCrcErrR { + CmdCrcErrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Command End Bit Error"] #[inline(always)] - pub fn cmd_end_bit_err(&self) -> CMD_END_BIT_ERR_R { - CMD_END_BIT_ERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn cmd_end_bit_err(&self) -> CmdEndBitErrR { + CmdEndBitErrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Command Index Error"] #[inline(always)] - pub fn cmd_ind_err(&self) -> CMD_IND_ERR_R { - CMD_IND_ERR_R::new(((self.bits >> 3) & 1) != 0) + pub fn cmd_ind_err(&self) -> CmdIndErrR { + CmdIndErrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Data Timeout Error"] #[inline(always)] - pub fn data_timeout_err(&self) -> DATA_TIMEOUT_ERR_R { - DATA_TIMEOUT_ERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn data_timeout_err(&self) -> DataTimeoutErrR { + DataTimeoutErrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Data CRC Error"] #[inline(always)] - pub fn data_crc_err(&self) -> DATA_CRC_ERR_R { - DATA_CRC_ERR_R::new(((self.bits >> 5) & 1) != 0) + pub fn data_crc_err(&self) -> DataCrcErrR { + DataCrcErrR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data End Bit Error"] #[inline(always)] - pub fn data_end_bit_err(&self) -> DATA_END_BIT_ERR_R { - DATA_END_BIT_ERR_R::new(((self.bits >> 6) & 1) != 0) + pub fn data_end_bit_err(&self) -> DataEndBitErrR { + DataEndBitErrR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Current Limit Error"] #[inline(always)] - pub fn current_limit_err(&self) -> CURRENT_LIMIT_ERR_R { - CURRENT_LIMIT_ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn current_limit_err(&self) -> CurrentLimitErrR { + CurrentLimitErrR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Auto CMD Error"] #[inline(always)] - pub fn acmd_err(&self) -> ACMD_ERR_R { - ACMD_ERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn acmd_err(&self) -> AcmdErrR { + AcmdErrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 13 - Ceata Error Status"] #[inline(always)] - pub fn ceata_err(&self) -> CEATA_ERR_R { - CEATA_ERR_R::new(((self.bits >> 13) & 1) != 0) + pub fn ceata_err(&self) -> CeataErrR { + CeataErrR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Timeout Error"] #[inline(always)] #[must_use] - pub fn cmd_timeout_err(&mut self) -> CMD_TIMEOUT_ERR_W { - CMD_TIMEOUT_ERR_W::new(self, 0) + pub fn cmd_timeout_err(&mut self) -> CmdTimeoutErrW { + CmdTimeoutErrW::new(self, 0) } #[doc = "Bit 1 - Command CRC Error"] #[inline(always)] #[must_use] - pub fn cmd_crc_err(&mut self) -> CMD_CRC_ERR_W { - CMD_CRC_ERR_W::new(self, 1) + pub fn cmd_crc_err(&mut self) -> CmdCrcErrW { + CmdCrcErrW::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error"] #[inline(always)] #[must_use] - pub fn cmd_end_bit_err(&mut self) -> CMD_END_BIT_ERR_W { - CMD_END_BIT_ERR_W::new(self, 2) + pub fn cmd_end_bit_err(&mut self) -> CmdEndBitErrW { + CmdEndBitErrW::new(self, 2) } #[doc = "Bit 3 - Command Index Error"] #[inline(always)] #[must_use] - pub fn cmd_ind_err(&mut self) -> CMD_IND_ERR_W { - CMD_IND_ERR_W::new(self, 3) + pub fn cmd_ind_err(&mut self) -> CmdIndErrW { + CmdIndErrW::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error"] #[inline(always)] #[must_use] - pub fn data_timeout_err(&mut self) -> DATA_TIMEOUT_ERR_W { - DATA_TIMEOUT_ERR_W::new(self, 4) + pub fn data_timeout_err(&mut self) -> DataTimeoutErrW { + DataTimeoutErrW::new(self, 4) } #[doc = "Bit 5 - Data CRC Error"] #[inline(always)] #[must_use] - pub fn data_crc_err(&mut self) -> DATA_CRC_ERR_W { - DATA_CRC_ERR_W::new(self, 5) + pub fn data_crc_err(&mut self) -> DataCrcErrW { + DataCrcErrW::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error"] #[inline(always)] #[must_use] - pub fn data_end_bit_err(&mut self) -> DATA_END_BIT_ERR_W { - DATA_END_BIT_ERR_W::new(self, 6) + pub fn data_end_bit_err(&mut self) -> DataEndBitErrW { + DataEndBitErrW::new(self, 6) } #[doc = "Bit 7 - Current Limit Error"] #[inline(always)] #[must_use] - pub fn current_limit_err(&mut self) -> CURRENT_LIMIT_ERR_W { - CURRENT_LIMIT_ERR_W::new(self, 7) + pub fn current_limit_err(&mut self) -> CurrentLimitErrW { + CurrentLimitErrW::new(self, 7) } #[doc = "Bit 8 - Auto CMD Error"] #[inline(always)] #[must_use] - pub fn acmd_err(&mut self) -> ACMD_ERR_W { - ACMD_ERR_W::new(self, 8) + pub fn acmd_err(&mut self) -> AcmdErrW { + AcmdErrW::new(self, 8) } #[doc = "Bit 13 - Ceata Error Status"] #[inline(always)] #[must_use] - pub fn ceata_err(&mut self) -> CEATA_ERR_W { - CEATA_ERR_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn ceata_err(&mut self) -> CeataErrW { + CeataErrW::new(self, 13) } } #[doc = "Error Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_status_err::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_status_err::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INT_STATUS_ERR_SPEC; -impl crate::RegisterSpec for INT_STATUS_ERR_SPEC { +pub struct IntStatusErrSpec; +impl crate::RegisterSpec for IntStatusErrSpec { type Ux = u16; } #[doc = "`read()` method returns [`int_status_err::R`](R) reader structure"] -impl crate::Readable for INT_STATUS_ERR_SPEC {} +impl crate::Readable for IntStatusErrSpec {} #[doc = "`write(|w| ..)` method takes [`int_status_err::W`](W) writer structure"] -impl crate::Writable for INT_STATUS_ERR_SPEC { +impl crate::Writable for IntStatusErrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets INT_STATUS_ERR to value 0"] -impl crate::Resettable for INT_STATUS_ERR_SPEC { +impl crate::Resettable for IntStatusErrSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/int_status_norm.rs b/src/sdmmc/int_status_norm.rs index 1a611654..6cb358a9 100644 --- a/src/sdmmc/int_status_norm.rs +++ b/src/sdmmc/int_status_norm.rs @@ -1,564 +1,555 @@ #[doc = "Register `INT_STATUS_NORM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INT_STATUS_NORM` writer"] -pub type W = crate::W; -#[doc = "Field `CMD_COMPLETE` reader - Command Complete"] -pub type CMD_COMPLETE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Command Complete\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_COMPLETE_A { +pub enum CmdComplete { #[doc = "0: No Command Complete"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Command Complete"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_COMPLETE_A) -> Self { + fn from(variant: CmdComplete) -> Self { variant as u8 != 0 } } -impl CMD_COMPLETE_R { +#[doc = "Field `CMD_COMPLETE` reader - Command Complete"] +pub type CmdCompleteR = crate::BitReader; +impl CmdCompleteR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_COMPLETE_A { + pub const fn variant(&self) -> CmdComplete { match self.bits { - false => CMD_COMPLETE_A::VALUE1, - true => CMD_COMPLETE_A::VALUE2, + false => CmdComplete::Value1, + true => CmdComplete::Value2, } } #[doc = "No Command Complete"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_COMPLETE_A::VALUE1 + *self == CmdComplete::Value1 } #[doc = "Command Complete"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_COMPLETE_A::VALUE2 + *self == CmdComplete::Value2 } } #[doc = "Field `CMD_COMPLETE` writer - Command Complete"] -pub type CMD_COMPLETE_W<'a, REG> = crate::BitWriter<'a, REG, CMD_COMPLETE_A>; -impl<'a, REG> CMD_COMPLETE_W<'a, REG> +pub type CmdCompleteW<'a, REG> = crate::BitWriter<'a, REG, CmdComplete>; +impl<'a, REG> CmdCompleteW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Command Complete"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_A::VALUE1) + self.variant(CmdComplete::Value1) } #[doc = "Command Complete"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_COMPLETE_A::VALUE2) + self.variant(CmdComplete::Value2) } } -#[doc = "Field `TX_COMPLETE` reader - Transfer Complete"] -pub type TX_COMPLETE_R = crate::BitReader; #[doc = "Transfer Complete\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TX_COMPLETE_A { +pub enum TxComplete { #[doc = "0: No Data Transfer Complete"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Data Transfer Complete"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TX_COMPLETE_A) -> Self { + fn from(variant: TxComplete) -> Self { variant as u8 != 0 } } -impl TX_COMPLETE_R { +#[doc = "Field `TX_COMPLETE` reader - Transfer Complete"] +pub type TxCompleteR = crate::BitReader; +impl TxCompleteR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_COMPLETE_A { + pub const fn variant(&self) -> TxComplete { match self.bits { - false => TX_COMPLETE_A::VALUE1, - true => TX_COMPLETE_A::VALUE2, + false => TxComplete::Value1, + true => TxComplete::Value2, } } #[doc = "No Data Transfer Complete"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_COMPLETE_A::VALUE1 + *self == TxComplete::Value1 } #[doc = "Data Transfer Complete"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_COMPLETE_A::VALUE2 + *self == TxComplete::Value2 } } #[doc = "Field `TX_COMPLETE` writer - Transfer Complete"] -pub type TX_COMPLETE_W<'a, REG> = crate::BitWriter<'a, REG, TX_COMPLETE_A>; -impl<'a, REG> TX_COMPLETE_W<'a, REG> +pub type TxCompleteW<'a, REG> = crate::BitWriter<'a, REG, TxComplete>; +impl<'a, REG> TxCompleteW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Data Transfer Complete"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_A::VALUE1) + self.variant(TxComplete::Value1) } #[doc = "Data Transfer Complete"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_COMPLETE_A::VALUE2) + self.variant(TxComplete::Value2) } } -#[doc = "Field `BLOCK_GAP_EVENT` reader - Block Gap Event"] -pub type BLOCK_GAP_EVENT_R = crate::BitReader; #[doc = "Block Gap Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLOCK_GAP_EVENT_A { +pub enum BlockGapEvent { #[doc = "0: No Block Gap Event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transaction stopped at Block Gap"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLOCK_GAP_EVENT_A) -> Self { + fn from(variant: BlockGapEvent) -> Self { variant as u8 != 0 } } -impl BLOCK_GAP_EVENT_R { +#[doc = "Field `BLOCK_GAP_EVENT` reader - Block Gap Event"] +pub type BlockGapEventR = crate::BitReader; +impl BlockGapEventR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BLOCK_GAP_EVENT_A { + pub const fn variant(&self) -> BlockGapEvent { match self.bits { - false => BLOCK_GAP_EVENT_A::VALUE1, - true => BLOCK_GAP_EVENT_A::VALUE2, + false => BlockGapEvent::Value1, + true => BlockGapEvent::Value2, } } #[doc = "No Block Gap Event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BLOCK_GAP_EVENT_A::VALUE1 + *self == BlockGapEvent::Value1 } #[doc = "Transaction stopped at Block Gap"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BLOCK_GAP_EVENT_A::VALUE2 + *self == BlockGapEvent::Value2 } } #[doc = "Field `BLOCK_GAP_EVENT` writer - Block Gap Event"] -pub type BLOCK_GAP_EVENT_W<'a, REG> = crate::BitWriter<'a, REG, BLOCK_GAP_EVENT_A>; -impl<'a, REG> BLOCK_GAP_EVENT_W<'a, REG> +pub type BlockGapEventW<'a, REG> = crate::BitWriter<'a, REG, BlockGapEvent>; +impl<'a, REG> BlockGapEventW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Block Gap Event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_A::VALUE1) + self.variant(BlockGapEvent::Value1) } #[doc = "Transaction stopped at Block Gap"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BLOCK_GAP_EVENT_A::VALUE2) + self.variant(BlockGapEvent::Value2) } } -#[doc = "Field `BUFF_WRITE_READY` reader - Buffer Write Ready"] -pub type BUFF_WRITE_READY_R = crate::BitReader; #[doc = "Buffer Write Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_WRITE_READY_A { +pub enum BuffWriteReady { #[doc = "0: Not Ready to Write Buffer."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready to Write Buffer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_WRITE_READY_A) -> Self { + fn from(variant: BuffWriteReady) -> Self { variant as u8 != 0 } } -impl BUFF_WRITE_READY_R { +#[doc = "Field `BUFF_WRITE_READY` reader - Buffer Write Ready"] +pub type BuffWriteReadyR = crate::BitReader; +impl BuffWriteReadyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_WRITE_READY_A { + pub const fn variant(&self) -> BuffWriteReady { match self.bits { - false => BUFF_WRITE_READY_A::VALUE1, - true => BUFF_WRITE_READY_A::VALUE2, + false => BuffWriteReady::Value1, + true => BuffWriteReady::Value2, } } #[doc = "Not Ready to Write Buffer."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_WRITE_READY_A::VALUE1 + *self == BuffWriteReady::Value1 } #[doc = "Ready to Write Buffer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_WRITE_READY_A::VALUE2 + *self == BuffWriteReady::Value2 } } #[doc = "Field `BUFF_WRITE_READY` writer - Buffer Write Ready"] -pub type BUFF_WRITE_READY_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_WRITE_READY_A>; -impl<'a, REG> BUFF_WRITE_READY_W<'a, REG> +pub type BuffWriteReadyW<'a, REG> = crate::BitWriter<'a, REG, BuffWriteReady>; +impl<'a, REG> BuffWriteReadyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not Ready to Write Buffer."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_A::VALUE1) + self.variant(BuffWriteReady::Value1) } #[doc = "Ready to Write Buffer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_WRITE_READY_A::VALUE2) + self.variant(BuffWriteReady::Value2) } } -#[doc = "Field `BUFF_READ_READY` reader - Buffer Read Ready"] -pub type BUFF_READ_READY_R = crate::BitReader; #[doc = "Buffer Read Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFF_READ_READY_A { +pub enum BuffReadReady { #[doc = "0: Not Ready to read Buffer."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready to read Buffer."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFF_READ_READY_A) -> Self { + fn from(variant: BuffReadReady) -> Self { variant as u8 != 0 } } -impl BUFF_READ_READY_R { +#[doc = "Field `BUFF_READ_READY` reader - Buffer Read Ready"] +pub type BuffReadReadyR = crate::BitReader; +impl BuffReadReadyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFF_READ_READY_A { + pub const fn variant(&self) -> BuffReadReady { match self.bits { - false => BUFF_READ_READY_A::VALUE1, - true => BUFF_READ_READY_A::VALUE2, + false => BuffReadReady::Value1, + true => BuffReadReady::Value2, } } #[doc = "Not Ready to read Buffer."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFF_READ_READY_A::VALUE1 + *self == BuffReadReady::Value1 } #[doc = "Ready to read Buffer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFF_READ_READY_A::VALUE2 + *self == BuffReadReady::Value2 } } #[doc = "Field `BUFF_READ_READY` writer - Buffer Read Ready"] -pub type BUFF_READ_READY_W<'a, REG> = crate::BitWriter<'a, REG, BUFF_READ_READY_A>; -impl<'a, REG> BUFF_READ_READY_W<'a, REG> +pub type BuffReadReadyW<'a, REG> = crate::BitWriter<'a, REG, BuffReadReady>; +impl<'a, REG> BuffReadReadyW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not Ready to read Buffer."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_A::VALUE1) + self.variant(BuffReadReady::Value1) } #[doc = "Ready to read Buffer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BUFF_READ_READY_A::VALUE2) + self.variant(BuffReadReady::Value2) } } -#[doc = "Field `CARD_INS` reader - Card Insertion"] -pub type CARD_INS_R = crate::BitReader; #[doc = "Card Insertion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INS_A { +pub enum CardIns { #[doc = "0: Card State Stable or Debouncing"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card Inserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INS_A) -> Self { + fn from(variant: CardIns) -> Self { variant as u8 != 0 } } -impl CARD_INS_R { +#[doc = "Field `CARD_INS` reader - Card Insertion"] +pub type CardInsR = crate::BitReader; +impl CardInsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INS_A { + pub const fn variant(&self) -> CardIns { match self.bits { - false => CARD_INS_A::VALUE1, - true => CARD_INS_A::VALUE2, + false => CardIns::Value1, + true => CardIns::Value2, } } #[doc = "Card State Stable or Debouncing"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INS_A::VALUE1 + *self == CardIns::Value1 } #[doc = "Card Inserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INS_A::VALUE2 + *self == CardIns::Value2 } } #[doc = "Field `CARD_INS` writer - Card Insertion"] -pub type CARD_INS_W<'a, REG> = crate::BitWriter<'a, REG, CARD_INS_A>; -impl<'a, REG> CARD_INS_W<'a, REG> +pub type CardInsW<'a, REG> = crate::BitWriter<'a, REG, CardIns>; +impl<'a, REG> CardInsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Card State Stable or Debouncing"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_INS_A::VALUE1) + self.variant(CardIns::Value1) } #[doc = "Card Inserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_INS_A::VALUE2) + self.variant(CardIns::Value2) } } -#[doc = "Field `CARD_REMOVAL` reader - Card Removal"] -pub type CARD_REMOVAL_R = crate::BitReader; #[doc = "Card Removal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_REMOVAL_A { +pub enum CardRemoval { #[doc = "0: Card State Stable or Debouncing"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card Removed"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_REMOVAL_A) -> Self { + fn from(variant: CardRemoval) -> Self { variant as u8 != 0 } } -impl CARD_REMOVAL_R { +#[doc = "Field `CARD_REMOVAL` reader - Card Removal"] +pub type CardRemovalR = crate::BitReader; +impl CardRemovalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_REMOVAL_A { + pub const fn variant(&self) -> CardRemoval { match self.bits { - false => CARD_REMOVAL_A::VALUE1, - true => CARD_REMOVAL_A::VALUE2, + false => CardRemoval::Value1, + true => CardRemoval::Value2, } } #[doc = "Card State Stable or Debouncing"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_REMOVAL_A::VALUE1 + *self == CardRemoval::Value1 } #[doc = "Card Removed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_REMOVAL_A::VALUE2 + *self == CardRemoval::Value2 } } #[doc = "Field `CARD_REMOVAL` writer - Card Removal"] -pub type CARD_REMOVAL_W<'a, REG> = crate::BitWriter<'a, REG, CARD_REMOVAL_A>; -impl<'a, REG> CARD_REMOVAL_W<'a, REG> +pub type CardRemovalW<'a, REG> = crate::BitWriter<'a, REG, CardRemoval>; +impl<'a, REG> CardRemovalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Card State Stable or Debouncing"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_A::VALUE1) + self.variant(CardRemoval::Value1) } #[doc = "Card Removed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARD_REMOVAL_A::VALUE2) + self.variant(CardRemoval::Value2) } } -#[doc = "Field `CARD_INT` reader - Card Interrupt"] -pub type CARD_INT_R = crate::BitReader; #[doc = "Card Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INT_A { +pub enum CardInt { #[doc = "0: No Card Interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Generate Card Interrupt"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INT_A) -> Self { + fn from(variant: CardInt) -> Self { variant as u8 != 0 } } -impl CARD_INT_R { +#[doc = "Field `CARD_INT` reader - Card Interrupt"] +pub type CardIntR = crate::BitReader; +impl CardIntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INT_A { + pub const fn variant(&self) -> CardInt { match self.bits { - false => CARD_INT_A::VALUE1, - true => CARD_INT_A::VALUE2, + false => CardInt::Value1, + true => CardInt::Value2, } } #[doc = "No Card Interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INT_A::VALUE1 + *self == CardInt::Value1 } #[doc = "Generate Card Interrupt"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INT_A::VALUE2 + *self == CardInt::Value2 } } -#[doc = "Field `ERR_INT` reader - Error Interrupt"] -pub type ERR_INT_R = crate::BitReader; #[doc = "Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERR_INT_A { +pub enum ErrInt { #[doc = "0: No Error."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Error."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERR_INT_A) -> Self { + fn from(variant: ErrInt) -> Self { variant as u8 != 0 } } -impl ERR_INT_R { +#[doc = "Field `ERR_INT` reader - Error Interrupt"] +pub type ErrIntR = crate::BitReader; +impl ErrIntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERR_INT_A { + pub const fn variant(&self) -> ErrInt { match self.bits { - false => ERR_INT_A::VALUE1, - true => ERR_INT_A::VALUE2, + false => ErrInt::Value1, + true => ErrInt::Value2, } } #[doc = "No Error."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERR_INT_A::VALUE1 + *self == ErrInt::Value1 } #[doc = "Error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERR_INT_A::VALUE2 + *self == ErrInt::Value2 } } impl R { #[doc = "Bit 0 - Command Complete"] #[inline(always)] - pub fn cmd_complete(&self) -> CMD_COMPLETE_R { - CMD_COMPLETE_R::new((self.bits & 1) != 0) + pub fn cmd_complete(&self) -> CmdCompleteR { + CmdCompleteR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transfer Complete"] #[inline(always)] - pub fn tx_complete(&self) -> TX_COMPLETE_R { - TX_COMPLETE_R::new(((self.bits >> 1) & 1) != 0) + pub fn tx_complete(&self) -> TxCompleteR { + TxCompleteR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Block Gap Event"] #[inline(always)] - pub fn block_gap_event(&self) -> BLOCK_GAP_EVENT_R { - BLOCK_GAP_EVENT_R::new(((self.bits >> 2) & 1) != 0) + pub fn block_gap_event(&self) -> BlockGapEventR { + BlockGapEventR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Buffer Write Ready"] #[inline(always)] - pub fn buff_write_ready(&self) -> BUFF_WRITE_READY_R { - BUFF_WRITE_READY_R::new(((self.bits >> 4) & 1) != 0) + pub fn buff_write_ready(&self) -> BuffWriteReadyR { + BuffWriteReadyR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Buffer Read Ready"] #[inline(always)] - pub fn buff_read_ready(&self) -> BUFF_READ_READY_R { - BUFF_READ_READY_R::new(((self.bits >> 5) & 1) != 0) + pub fn buff_read_ready(&self) -> BuffReadReadyR { + BuffReadReadyR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Card Insertion"] #[inline(always)] - pub fn card_ins(&self) -> CARD_INS_R { - CARD_INS_R::new(((self.bits >> 6) & 1) != 0) + pub fn card_ins(&self) -> CardInsR { + CardInsR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Card Removal"] #[inline(always)] - pub fn card_removal(&self) -> CARD_REMOVAL_R { - CARD_REMOVAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn card_removal(&self) -> CardRemovalR { + CardRemovalR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Card Interrupt"] #[inline(always)] - pub fn card_int(&self) -> CARD_INT_R { - CARD_INT_R::new(((self.bits >> 8) & 1) != 0) + pub fn card_int(&self) -> CardIntR { + CardIntR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 15 - Error Interrupt"] #[inline(always)] - pub fn err_int(&self) -> ERR_INT_R { - ERR_INT_R::new(((self.bits >> 15) & 1) != 0) + pub fn err_int(&self) -> ErrIntR { + ErrIntR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Command Complete"] #[inline(always)] #[must_use] - pub fn cmd_complete(&mut self) -> CMD_COMPLETE_W { - CMD_COMPLETE_W::new(self, 0) + pub fn cmd_complete(&mut self) -> CmdCompleteW { + CmdCompleteW::new(self, 0) } #[doc = "Bit 1 - Transfer Complete"] #[inline(always)] #[must_use] - pub fn tx_complete(&mut self) -> TX_COMPLETE_W { - TX_COMPLETE_W::new(self, 1) + pub fn tx_complete(&mut self) -> TxCompleteW { + TxCompleteW::new(self, 1) } #[doc = "Bit 2 - Block Gap Event"] #[inline(always)] #[must_use] - pub fn block_gap_event(&mut self) -> BLOCK_GAP_EVENT_W { - BLOCK_GAP_EVENT_W::new(self, 2) + pub fn block_gap_event(&mut self) -> BlockGapEventW { + BlockGapEventW::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready"] #[inline(always)] #[must_use] - pub fn buff_write_ready(&mut self) -> BUFF_WRITE_READY_W { - BUFF_WRITE_READY_W::new(self, 4) + pub fn buff_write_ready(&mut self) -> BuffWriteReadyW { + BuffWriteReadyW::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready"] #[inline(always)] #[must_use] - pub fn buff_read_ready(&mut self) -> BUFF_READ_READY_W { - BUFF_READ_READY_W::new(self, 5) + pub fn buff_read_ready(&mut self) -> BuffReadReadyW { + BuffReadReadyW::new(self, 5) } #[doc = "Bit 6 - Card Insertion"] #[inline(always)] #[must_use] - pub fn card_ins(&mut self) -> CARD_INS_W { - CARD_INS_W::new(self, 6) + pub fn card_ins(&mut self) -> CardInsW { + CardInsW::new(self, 6) } #[doc = "Bit 7 - Card Removal"] #[inline(always)] #[must_use] - pub fn card_removal(&mut self) -> CARD_REMOVAL_W { - CARD_REMOVAL_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn card_removal(&mut self) -> CardRemovalW { + CardRemovalW::new(self, 7) } } #[doc = "Normal Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_status_norm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_status_norm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INT_STATUS_NORM_SPEC; -impl crate::RegisterSpec for INT_STATUS_NORM_SPEC { +pub struct IntStatusNormSpec; +impl crate::RegisterSpec for IntStatusNormSpec { type Ux = u16; } #[doc = "`read()` method returns [`int_status_norm::R`](R) reader structure"] -impl crate::Readable for INT_STATUS_NORM_SPEC {} +impl crate::Readable for IntStatusNormSpec {} #[doc = "`write(|w| ..)` method takes [`int_status_norm::W`](W) writer structure"] -impl crate::Writable for INT_STATUS_NORM_SPEC { +impl crate::Writable for IntStatusNormSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets INT_STATUS_NORM to value 0"] -impl crate::Resettable for INT_STATUS_NORM_SPEC { +impl crate::Resettable for IntStatusNormSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/max_current_cap.rs b/src/sdmmc/max_current_cap.rs index eef16e3f..69977aab 100644 --- a/src/sdmmc/max_current_cap.rs +++ b/src/sdmmc/max_current_cap.rs @@ -1,22 +1,22 @@ #[doc = "Register `MAX_CURRENT_CAP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MAX_CURRENT_FOR_3_3V` reader - Maximum Current for 3.3V"] -pub type MAX_CURRENT_FOR_3_3V_R = crate::FieldReader; +pub type MaxCurrentFor3_3vR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Maximum Current for 3.3V"] #[inline(always)] - pub fn max_current_for_3_3v(&self) -> MAX_CURRENT_FOR_3_3V_R { - MAX_CURRENT_FOR_3_3V_R::new((self.bits & 0xff) as u8) + pub fn max_current_for_3_3v(&self) -> MaxCurrentFor3_3vR { + MaxCurrentFor3_3vR::new((self.bits & 0xff) as u8) } } #[doc = "Maximum Current Capabilities Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`max_current_cap::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MAX_CURRENT_CAP_SPEC; -impl crate::RegisterSpec for MAX_CURRENT_CAP_SPEC { +pub struct MaxCurrentCapSpec; +impl crate::RegisterSpec for MaxCurrentCapSpec { type Ux = u32; } #[doc = "`read()` method returns [`max_current_cap::R`](R) reader structure"] -impl crate::Readable for MAX_CURRENT_CAP_SPEC {} +impl crate::Readable for MaxCurrentCapSpec {} #[doc = "`reset()` method sets MAX_CURRENT_CAP to value 0x01"] -impl crate::Resettable for MAX_CURRENT_CAP_SPEC { +impl crate::Resettable for MaxCurrentCapSpec { const RESET_VALUE: u32 = 0x01; } diff --git a/src/sdmmc/power_ctrl.rs b/src/sdmmc/power_ctrl.rs index 4d1bdf41..6443b9e2 100644 --- a/src/sdmmc/power_ctrl.rs +++ b/src/sdmmc/power_ctrl.rs @@ -1,96 +1,96 @@ #[doc = "Register `POWER_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `POWER_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `SD_BUS_POWER` reader - SD Bus Power"] -pub type SD_BUS_POWER_R = crate::BitReader; +pub type W = crate::W; #[doc = "SD Bus Power\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SD_BUS_POWER_A { +pub enum SdBusPower { #[doc = "0: Power off"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power on"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SD_BUS_POWER_A) -> Self { + fn from(variant: SdBusPower) -> Self { variant as u8 != 0 } } -impl SD_BUS_POWER_R { +#[doc = "Field `SD_BUS_POWER` reader - SD Bus Power"] +pub type SdBusPowerR = crate::BitReader; +impl SdBusPowerR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SD_BUS_POWER_A { + pub const fn variant(&self) -> SdBusPower { match self.bits { - false => SD_BUS_POWER_A::VALUE1, - true => SD_BUS_POWER_A::VALUE2, + false => SdBusPower::Value1, + true => SdBusPower::Value2, } } #[doc = "Power off"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SD_BUS_POWER_A::VALUE1 + *self == SdBusPower::Value1 } #[doc = "Power on"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SD_BUS_POWER_A::VALUE2 + *self == SdBusPower::Value2 } } #[doc = "Field `SD_BUS_POWER` writer - SD Bus Power"] -pub type SD_BUS_POWER_W<'a, REG> = crate::BitWriter<'a, REG, SD_BUS_POWER_A>; -impl<'a, REG> SD_BUS_POWER_W<'a, REG> +pub type SdBusPowerW<'a, REG> = crate::BitWriter<'a, REG, SdBusPower>; +impl<'a, REG> SdBusPowerW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Power off"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SD_BUS_POWER_A::VALUE1) + self.variant(SdBusPower::Value1) } #[doc = "Power on"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SD_BUS_POWER_A::VALUE2) + self.variant(SdBusPower::Value2) } } -#[doc = "Field `SD_BUS_VOLTAGE_SEL` reader - SD Bus Voltage Select"] -pub type SD_BUS_VOLTAGE_SEL_R = crate::FieldReader; #[doc = "SD Bus Voltage Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SD_BUS_VOLTAGE_SEL_A { +pub enum SdBusVoltageSel { #[doc = "7: 3.3V (Flattop.)"] - VALUE1 = 7, + Value1 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SD_BUS_VOLTAGE_SEL_A) -> Self { + fn from(variant: SdBusVoltageSel) -> Self { variant as _ } } -impl crate::FieldSpec for SD_BUS_VOLTAGE_SEL_A { +impl crate::FieldSpec for SdBusVoltageSel { type Ux = u8; } -impl SD_BUS_VOLTAGE_SEL_R { +#[doc = "Field `SD_BUS_VOLTAGE_SEL` reader - SD Bus Voltage Select"] +pub type SdBusVoltageSelR = crate::FieldReader; +impl SdBusVoltageSelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 7 => Some(SD_BUS_VOLTAGE_SEL_A::VALUE1), + 7 => Some(SdBusVoltageSel::Value1), _ => None, } } #[doc = "3.3V (Flattop.)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SD_BUS_VOLTAGE_SEL_A::VALUE1 + *self == SdBusVoltageSel::Value1 } } #[doc = "Field `SD_BUS_VOLTAGE_SEL` writer - SD Bus Voltage Select"] -pub type SD_BUS_VOLTAGE_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SD_BUS_VOLTAGE_SEL_A>; -impl<'a, REG> SD_BUS_VOLTAGE_SEL_W<'a, REG> +pub type SdBusVoltageSelW<'a, REG> = crate::FieldWriter<'a, REG, 3, SdBusVoltageSel>; +impl<'a, REG> SdBusVoltageSelW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -98,73 +98,64 @@ where #[doc = "3.3V (Flattop.)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SD_BUS_VOLTAGE_SEL_A::VALUE1) + self.variant(SdBusVoltageSel::Value1) } } #[doc = "Field `HARDWARE_RESET` reader - Hardware reset"] -pub type HARDWARE_RESET_R = crate::BitReader; +pub type HardwareResetR = crate::BitReader; #[doc = "Field `HARDWARE_RESET` writer - Hardware reset"] -pub type HARDWARE_RESET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HardwareResetW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - SD Bus Power"] #[inline(always)] - pub fn sd_bus_power(&self) -> SD_BUS_POWER_R { - SD_BUS_POWER_R::new((self.bits & 1) != 0) + pub fn sd_bus_power(&self) -> SdBusPowerR { + SdBusPowerR::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - SD Bus Voltage Select"] #[inline(always)] - pub fn sd_bus_voltage_sel(&self) -> SD_BUS_VOLTAGE_SEL_R { - SD_BUS_VOLTAGE_SEL_R::new((self.bits >> 1) & 7) + pub fn sd_bus_voltage_sel(&self) -> SdBusVoltageSelR { + SdBusVoltageSelR::new((self.bits >> 1) & 7) } #[doc = "Bit 4 - Hardware reset"] #[inline(always)] - pub fn hardware_reset(&self) -> HARDWARE_RESET_R { - HARDWARE_RESET_R::new(((self.bits >> 4) & 1) != 0) + pub fn hardware_reset(&self) -> HardwareResetR { + HardwareResetR::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - SD Bus Power"] #[inline(always)] #[must_use] - pub fn sd_bus_power(&mut self) -> SD_BUS_POWER_W { - SD_BUS_POWER_W::new(self, 0) + pub fn sd_bus_power(&mut self) -> SdBusPowerW { + SdBusPowerW::new(self, 0) } #[doc = "Bits 1:3 - SD Bus Voltage Select"] #[inline(always)] #[must_use] - pub fn sd_bus_voltage_sel(&mut self) -> SD_BUS_VOLTAGE_SEL_W { - SD_BUS_VOLTAGE_SEL_W::new(self, 1) + pub fn sd_bus_voltage_sel(&mut self) -> SdBusVoltageSelW { + SdBusVoltageSelW::new(self, 1) } #[doc = "Bit 4 - Hardware reset"] #[inline(always)] #[must_use] - pub fn hardware_reset(&mut self) -> HARDWARE_RESET_W { - HARDWARE_RESET_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn hardware_reset(&mut self) -> HardwareResetW { + HardwareResetW::new(self, 4) } } #[doc = "Power Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`power_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`power_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct POWER_CTRL_SPEC; -impl crate::RegisterSpec for POWER_CTRL_SPEC { +pub struct PowerCtrlSpec; +impl crate::RegisterSpec for PowerCtrlSpec { type Ux = u8; } #[doc = "`read()` method returns [`power_ctrl::R`](R) reader structure"] -impl crate::Readable for POWER_CTRL_SPEC {} +impl crate::Readable for PowerCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`power_ctrl::W`](W) writer structure"] -impl crate::Writable for POWER_CTRL_SPEC { +impl crate::Writable for PowerCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets POWER_CTRL to value 0"] -impl crate::Resettable for POWER_CTRL_SPEC { +impl crate::Resettable for PowerCtrlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc/present_state.rs b/src/sdmmc/present_state.rs index c00da038..49f9ce9f 100644 --- a/src/sdmmc/present_state.rs +++ b/src/sdmmc/present_state.rs @@ -1,453 +1,453 @@ #[doc = "Register `PRESENT_STATE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `COMMAND_INHIBIT_CMD` reader - Command Inhibit (CMD)"] -pub type COMMAND_INHIBIT_CMD_R = crate::BitReader; -#[doc = "Field `COMMAND_INHIBIT_DAT` reader - Command Inhibit (DAT)"] -pub type COMMAND_INHIBIT_DAT_R = crate::BitReader; +pub type CommandInhibitCmdR = crate::BitReader; #[doc = "Command Inhibit (DAT)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COMMAND_INHIBIT_DAT_A { +pub enum CommandInhibitDat { #[doc = "0: Can issue command which uses the DAT line"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Cannot issue command which uses the DAT line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COMMAND_INHIBIT_DAT_A) -> Self { + fn from(variant: CommandInhibitDat) -> Self { variant as u8 != 0 } } -impl COMMAND_INHIBIT_DAT_R { +#[doc = "Field `COMMAND_INHIBIT_DAT` reader - Command Inhibit (DAT)"] +pub type CommandInhibitDatR = crate::BitReader; +impl CommandInhibitDatR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COMMAND_INHIBIT_DAT_A { + pub const fn variant(&self) -> CommandInhibitDat { match self.bits { - false => COMMAND_INHIBIT_DAT_A::VALUE1, - true => COMMAND_INHIBIT_DAT_A::VALUE2, + false => CommandInhibitDat::Value1, + true => CommandInhibitDat::Value2, } } #[doc = "Can issue command which uses the DAT line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COMMAND_INHIBIT_DAT_A::VALUE1 + *self == CommandInhibitDat::Value1 } #[doc = "Cannot issue command which uses the DAT line"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COMMAND_INHIBIT_DAT_A::VALUE2 + *self == CommandInhibitDat::Value2 } } -#[doc = "Field `DAT_LINE_ACTIVE` reader - DAT Line Active"] -pub type DAT_LINE_ACTIVE_R = crate::BitReader; #[doc = "DAT Line Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DAT_LINE_ACTIVE_A { +pub enum DatLineActive { #[doc = "0: DAT line inactive"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DAT line active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DAT_LINE_ACTIVE_A) -> Self { + fn from(variant: DatLineActive) -> Self { variant as u8 != 0 } } -impl DAT_LINE_ACTIVE_R { +#[doc = "Field `DAT_LINE_ACTIVE` reader - DAT Line Active"] +pub type DatLineActiveR = crate::BitReader; +impl DatLineActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DAT_LINE_ACTIVE_A { + pub const fn variant(&self) -> DatLineActive { match self.bits { - false => DAT_LINE_ACTIVE_A::VALUE1, - true => DAT_LINE_ACTIVE_A::VALUE2, + false => DatLineActive::Value1, + true => DatLineActive::Value2, } } #[doc = "DAT line inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DAT_LINE_ACTIVE_A::VALUE1 + *self == DatLineActive::Value1 } #[doc = "DAT line active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DAT_LINE_ACTIVE_A::VALUE2 + *self == DatLineActive::Value2 } } -#[doc = "Field `WRITE_TRANSFER_ACTIVE` reader - Write Transfer Active"] -pub type WRITE_TRANSFER_ACTIVE_R = crate::BitReader; #[doc = "Write Transfer Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WRITE_TRANSFER_ACTIVE_A { +pub enum WriteTransferActive { #[doc = "0: No valid data"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transferring data"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WRITE_TRANSFER_ACTIVE_A) -> Self { + fn from(variant: WriteTransferActive) -> Self { variant as u8 != 0 } } -impl WRITE_TRANSFER_ACTIVE_R { +#[doc = "Field `WRITE_TRANSFER_ACTIVE` reader - Write Transfer Active"] +pub type WriteTransferActiveR = crate::BitReader; +impl WriteTransferActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WRITE_TRANSFER_ACTIVE_A { + pub const fn variant(&self) -> WriteTransferActive { match self.bits { - false => WRITE_TRANSFER_ACTIVE_A::VALUE1, - true => WRITE_TRANSFER_ACTIVE_A::VALUE2, + false => WriteTransferActive::Value1, + true => WriteTransferActive::Value2, } } #[doc = "No valid data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRITE_TRANSFER_ACTIVE_A::VALUE1 + *self == WriteTransferActive::Value1 } #[doc = "Transferring data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRITE_TRANSFER_ACTIVE_A::VALUE2 + *self == WriteTransferActive::Value2 } } -#[doc = "Field `READ_TRANSFER_ACTIVE` reader - Read Transfer Active"] -pub type READ_TRANSFER_ACTIVE_R = crate::BitReader; #[doc = "Read Transfer Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum READ_TRANSFER_ACTIVE_A { +pub enum ReadTransferActive { #[doc = "0: No valid data"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transferring data"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: READ_TRANSFER_ACTIVE_A) -> Self { + fn from(variant: ReadTransferActive) -> Self { variant as u8 != 0 } } -impl READ_TRANSFER_ACTIVE_R { +#[doc = "Field `READ_TRANSFER_ACTIVE` reader - Read Transfer Active"] +pub type ReadTransferActiveR = crate::BitReader; +impl ReadTransferActiveR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> READ_TRANSFER_ACTIVE_A { + pub const fn variant(&self) -> ReadTransferActive { match self.bits { - false => READ_TRANSFER_ACTIVE_A::VALUE1, - true => READ_TRANSFER_ACTIVE_A::VALUE2, + false => ReadTransferActive::Value1, + true => ReadTransferActive::Value2, } } #[doc = "No valid data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == READ_TRANSFER_ACTIVE_A::VALUE1 + *self == ReadTransferActive::Value1 } #[doc = "Transferring data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == READ_TRANSFER_ACTIVE_A::VALUE2 + *self == ReadTransferActive::Value2 } } -#[doc = "Field `BUFFER_WRITE_ENABLE` reader - Buffer Write Enable"] -pub type BUFFER_WRITE_ENABLE_R = crate::BitReader; #[doc = "Buffer Write Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFFER_WRITE_ENABLE_A { +pub enum BufferWriteEnable { #[doc = "0: Write Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write Enable."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFFER_WRITE_ENABLE_A) -> Self { + fn from(variant: BufferWriteEnable) -> Self { variant as u8 != 0 } } -impl BUFFER_WRITE_ENABLE_R { +#[doc = "Field `BUFFER_WRITE_ENABLE` reader - Buffer Write Enable"] +pub type BufferWriteEnableR = crate::BitReader; +impl BufferWriteEnableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFFER_WRITE_ENABLE_A { + pub const fn variant(&self) -> BufferWriteEnable { match self.bits { - false => BUFFER_WRITE_ENABLE_A::VALUE1, - true => BUFFER_WRITE_ENABLE_A::VALUE2, + false => BufferWriteEnable::Value1, + true => BufferWriteEnable::Value2, } } #[doc = "Write Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFFER_WRITE_ENABLE_A::VALUE1 + *self == BufferWriteEnable::Value1 } #[doc = "Write Enable."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFFER_WRITE_ENABLE_A::VALUE2 + *self == BufferWriteEnable::Value2 } } -#[doc = "Field `BUFFER_READ_ENABLE` reader - Buffer Read Enable"] -pub type BUFFER_READ_ENABLE_R = crate::BitReader; #[doc = "Buffer Read Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUFFER_READ_ENABLE_A { +pub enum BufferReadEnable { #[doc = "0: Read Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read Enable."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUFFER_READ_ENABLE_A) -> Self { + fn from(variant: BufferReadEnable) -> Self { variant as u8 != 0 } } -impl BUFFER_READ_ENABLE_R { +#[doc = "Field `BUFFER_READ_ENABLE` reader - Buffer Read Enable"] +pub type BufferReadEnableR = crate::BitReader; +impl BufferReadEnableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUFFER_READ_ENABLE_A { + pub const fn variant(&self) -> BufferReadEnable { match self.bits { - false => BUFFER_READ_ENABLE_A::VALUE1, - true => BUFFER_READ_ENABLE_A::VALUE2, + false => BufferReadEnable::Value1, + true => BufferReadEnable::Value2, } } #[doc = "Read Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUFFER_READ_ENABLE_A::VALUE1 + *self == BufferReadEnable::Value1 } #[doc = "Read Enable."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUFFER_READ_ENABLE_A::VALUE2 + *self == BufferReadEnable::Value2 } } -#[doc = "Field `CARD_INSERTED` reader - Card Inserted"] -pub type CARD_INSERTED_R = crate::BitReader; #[doc = "Card Inserted\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_INSERTED_A { +pub enum CardInserted { #[doc = "0: Reset or Debouncing or No Card"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card Inserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_INSERTED_A) -> Self { + fn from(variant: CardInserted) -> Self { variant as u8 != 0 } } -impl CARD_INSERTED_R { +#[doc = "Field `CARD_INSERTED` reader - Card Inserted"] +pub type CardInsertedR = crate::BitReader; +impl CardInsertedR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_INSERTED_A { + pub const fn variant(&self) -> CardInserted { match self.bits { - false => CARD_INSERTED_A::VALUE1, - true => CARD_INSERTED_A::VALUE2, + false => CardInserted::Value1, + true => CardInserted::Value2, } } #[doc = "Reset or Debouncing or No Card"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_INSERTED_A::VALUE1 + *self == CardInserted::Value1 } #[doc = "Card Inserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_INSERTED_A::VALUE2 + *self == CardInserted::Value2 } } -#[doc = "Field `CARD_STATE_STABLE` reader - Card State Stable"] -pub type CARD_STATE_STABLE_R = crate::BitReader; #[doc = "Card State Stable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_STATE_STABLE_A { +pub enum CardStateStable { #[doc = "0: Reset of Debouncing"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No Card or Inserted"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_STATE_STABLE_A) -> Self { + fn from(variant: CardStateStable) -> Self { variant as u8 != 0 } } -impl CARD_STATE_STABLE_R { +#[doc = "Field `CARD_STATE_STABLE` reader - Card State Stable"] +pub type CardStateStableR = crate::BitReader; +impl CardStateStableR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_STATE_STABLE_A { + pub const fn variant(&self) -> CardStateStable { match self.bits { - false => CARD_STATE_STABLE_A::VALUE1, - true => CARD_STATE_STABLE_A::VALUE2, + false => CardStateStable::Value1, + true => CardStateStable::Value2, } } #[doc = "Reset of Debouncing"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_STATE_STABLE_A::VALUE1 + *self == CardStateStable::Value1 } #[doc = "No Card or Inserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_STATE_STABLE_A::VALUE2 + *self == CardStateStable::Value2 } } -#[doc = "Field `CARD_DETECT_PIN_LEVEL` reader - Card Detect Pin Level"] -pub type CARD_DETECT_PIN_LEVEL_R = crate::BitReader; #[doc = "Card Detect Pin Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARD_DETECT_PIN_LEVEL_A { +pub enum CardDetectPinLevel { #[doc = "0: No Card present (SDCD = 1)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card present (SDCD = 0)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARD_DETECT_PIN_LEVEL_A) -> Self { + fn from(variant: CardDetectPinLevel) -> Self { variant as u8 != 0 } } -impl CARD_DETECT_PIN_LEVEL_R { +#[doc = "Field `CARD_DETECT_PIN_LEVEL` reader - Card Detect Pin Level"] +pub type CardDetectPinLevelR = crate::BitReader; +impl CardDetectPinLevelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CARD_DETECT_PIN_LEVEL_A { + pub const fn variant(&self) -> CardDetectPinLevel { match self.bits { - false => CARD_DETECT_PIN_LEVEL_A::VALUE1, - true => CARD_DETECT_PIN_LEVEL_A::VALUE2, + false => CardDetectPinLevel::Value1, + true => CardDetectPinLevel::Value2, } } #[doc = "No Card present (SDCD = 1)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CARD_DETECT_PIN_LEVEL_A::VALUE1 + *self == CardDetectPinLevel::Value1 } #[doc = "Card present (SDCD = 0)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CARD_DETECT_PIN_LEVEL_A::VALUE2 + *self == CardDetectPinLevel::Value2 } } -#[doc = "Field `WRITE_PROTECT_PIN_LEVEL` reader - Write Protect Switch Pin Level"] -pub type WRITE_PROTECT_PIN_LEVEL_R = crate::BitReader; #[doc = "Write Protect Switch Pin Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WRITE_PROTECT_PIN_LEVEL_A { +pub enum WriteProtectPinLevel { #[doc = "0: Write protected (SDWP = 1)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write enabled (SDWP = 0)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WRITE_PROTECT_PIN_LEVEL_A) -> Self { + fn from(variant: WriteProtectPinLevel) -> Self { variant as u8 != 0 } } -impl WRITE_PROTECT_PIN_LEVEL_R { +#[doc = "Field `WRITE_PROTECT_PIN_LEVEL` reader - Write Protect Switch Pin Level"] +pub type WriteProtectPinLevelR = crate::BitReader; +impl WriteProtectPinLevelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WRITE_PROTECT_PIN_LEVEL_A { + pub const fn variant(&self) -> WriteProtectPinLevel { match self.bits { - false => WRITE_PROTECT_PIN_LEVEL_A::VALUE1, - true => WRITE_PROTECT_PIN_LEVEL_A::VALUE2, + false => WriteProtectPinLevel::Value1, + true => WriteProtectPinLevel::Value2, } } #[doc = "Write protected (SDWP = 1)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WRITE_PROTECT_PIN_LEVEL_A::VALUE1 + *self == WriteProtectPinLevel::Value1 } #[doc = "Write enabled (SDWP = 0)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WRITE_PROTECT_PIN_LEVEL_A::VALUE2 + *self == WriteProtectPinLevel::Value2 } } #[doc = "Field `DAT_3_0_PIN_LEVEL` reader - Line Signal Level"] -pub type DAT_3_0_PIN_LEVEL_R = crate::FieldReader; +pub type Dat3_0PinLevelR = crate::FieldReader; #[doc = "Field `CMD_LINE_LEVEL` reader - CMD Line Signal Level"] -pub type CMD_LINE_LEVEL_R = crate::BitReader; +pub type CmdLineLevelR = crate::BitReader; #[doc = "Field `DAT_7_4_PIN_LEVEL` reader - Line Signal Level"] -pub type DAT_7_4_PIN_LEVEL_R = crate::FieldReader; +pub type Dat7_4PinLevelR = crate::FieldReader; impl R { #[doc = "Bit 0 - Command Inhibit (CMD)"] #[inline(always)] - pub fn command_inhibit_cmd(&self) -> COMMAND_INHIBIT_CMD_R { - COMMAND_INHIBIT_CMD_R::new((self.bits & 1) != 0) + pub fn command_inhibit_cmd(&self) -> CommandInhibitCmdR { + CommandInhibitCmdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Command Inhibit (DAT)"] #[inline(always)] - pub fn command_inhibit_dat(&self) -> COMMAND_INHIBIT_DAT_R { - COMMAND_INHIBIT_DAT_R::new(((self.bits >> 1) & 1) != 0) + pub fn command_inhibit_dat(&self) -> CommandInhibitDatR { + CommandInhibitDatR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - DAT Line Active"] #[inline(always)] - pub fn dat_line_active(&self) -> DAT_LINE_ACTIVE_R { - DAT_LINE_ACTIVE_R::new(((self.bits >> 2) & 1) != 0) + pub fn dat_line_active(&self) -> DatLineActiveR { + DatLineActiveR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Write Transfer Active"] #[inline(always)] - pub fn write_transfer_active(&self) -> WRITE_TRANSFER_ACTIVE_R { - WRITE_TRANSFER_ACTIVE_R::new(((self.bits >> 8) & 1) != 0) + pub fn write_transfer_active(&self) -> WriteTransferActiveR { + WriteTransferActiveR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Read Transfer Active"] #[inline(always)] - pub fn read_transfer_active(&self) -> READ_TRANSFER_ACTIVE_R { - READ_TRANSFER_ACTIVE_R::new(((self.bits >> 9) & 1) != 0) + pub fn read_transfer_active(&self) -> ReadTransferActiveR { + ReadTransferActiveR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Buffer Write Enable"] #[inline(always)] - pub fn buffer_write_enable(&self) -> BUFFER_WRITE_ENABLE_R { - BUFFER_WRITE_ENABLE_R::new(((self.bits >> 10) & 1) != 0) + pub fn buffer_write_enable(&self) -> BufferWriteEnableR { + BufferWriteEnableR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Buffer Read Enable"] #[inline(always)] - pub fn buffer_read_enable(&self) -> BUFFER_READ_ENABLE_R { - BUFFER_READ_ENABLE_R::new(((self.bits >> 11) & 1) != 0) + pub fn buffer_read_enable(&self) -> BufferReadEnableR { + BufferReadEnableR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Card Inserted"] #[inline(always)] - pub fn card_inserted(&self) -> CARD_INSERTED_R { - CARD_INSERTED_R::new(((self.bits >> 16) & 1) != 0) + pub fn card_inserted(&self) -> CardInsertedR { + CardInsertedR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Card State Stable"] #[inline(always)] - pub fn card_state_stable(&self) -> CARD_STATE_STABLE_R { - CARD_STATE_STABLE_R::new(((self.bits >> 17) & 1) != 0) + pub fn card_state_stable(&self) -> CardStateStableR { + CardStateStableR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Card Detect Pin Level"] #[inline(always)] - pub fn card_detect_pin_level(&self) -> CARD_DETECT_PIN_LEVEL_R { - CARD_DETECT_PIN_LEVEL_R::new(((self.bits >> 18) & 1) != 0) + pub fn card_detect_pin_level(&self) -> CardDetectPinLevelR { + CardDetectPinLevelR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Write Protect Switch Pin Level"] #[inline(always)] - pub fn write_protect_pin_level(&self) -> WRITE_PROTECT_PIN_LEVEL_R { - WRITE_PROTECT_PIN_LEVEL_R::new(((self.bits >> 19) & 1) != 0) + pub fn write_protect_pin_level(&self) -> WriteProtectPinLevelR { + WriteProtectPinLevelR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:23 - Line Signal Level"] #[inline(always)] - pub fn dat_3_0_pin_level(&self) -> DAT_3_0_PIN_LEVEL_R { - DAT_3_0_PIN_LEVEL_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn dat_3_0_pin_level(&self) -> Dat3_0PinLevelR { + Dat3_0PinLevelR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bit 24 - CMD Line Signal Level"] #[inline(always)] - pub fn cmd_line_level(&self) -> CMD_LINE_LEVEL_R { - CMD_LINE_LEVEL_R::new(((self.bits >> 24) & 1) != 0) + pub fn cmd_line_level(&self) -> CmdLineLevelR { + CmdLineLevelR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:28 - Line Signal Level"] #[inline(always)] - pub fn dat_7_4_pin_level(&self) -> DAT_7_4_PIN_LEVEL_R { - DAT_7_4_PIN_LEVEL_R::new(((self.bits >> 25) & 0x0f) as u8) + pub fn dat_7_4_pin_level(&self) -> Dat7_4PinLevelR { + Dat7_4PinLevelR::new(((self.bits >> 25) & 0x0f) as u8) } } #[doc = "Present State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`present_state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PRESENT_STATE_SPEC; -impl crate::RegisterSpec for PRESENT_STATE_SPEC { +pub struct PresentStateSpec; +impl crate::RegisterSpec for PresentStateSpec { type Ux = u32; } #[doc = "`read()` method returns [`present_state::R`](R) reader structure"] -impl crate::Readable for PRESENT_STATE_SPEC {} +impl crate::Readable for PresentStateSpec {} #[doc = "`reset()` method sets PRESENT_STATE to value 0"] -impl crate::Resettable for PRESENT_STATE_SPEC { +impl crate::Resettable for PresentStateSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/response0.rs b/src/sdmmc/response0.rs index 4b51d515..4c152fce 100644 --- a/src/sdmmc/response0.rs +++ b/src/sdmmc/response0.rs @@ -1,29 +1,29 @@ #[doc = "Register `RESPONSE0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESPONSE0` reader - Response0"] -pub type RESPONSE0_R = crate::FieldReader; +pub type Response0R = crate::FieldReader; #[doc = "Field `RESPONSE1` reader - Response1"] -pub type RESPONSE1_R = crate::FieldReader; +pub type Response1R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Response0"] #[inline(always)] - pub fn response0(&self) -> RESPONSE0_R { - RESPONSE0_R::new((self.bits & 0xffff) as u16) + pub fn response0(&self) -> Response0R { + Response0R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Response1"] #[inline(always)] - pub fn response1(&self) -> RESPONSE1_R { - RESPONSE1_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn response1(&self) -> Response1R { + Response1R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Response 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESPONSE0_SPEC; -impl crate::RegisterSpec for RESPONSE0_SPEC { +pub struct Response0Spec; +impl crate::RegisterSpec for Response0Spec { type Ux = u32; } #[doc = "`read()` method returns [`response0::R`](R) reader structure"] -impl crate::Readable for RESPONSE0_SPEC {} +impl crate::Readable for Response0Spec {} #[doc = "`reset()` method sets RESPONSE0 to value 0"] -impl crate::Resettable for RESPONSE0_SPEC { +impl crate::Resettable for Response0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/response2.rs b/src/sdmmc/response2.rs index abb84948..febb2e53 100644 --- a/src/sdmmc/response2.rs +++ b/src/sdmmc/response2.rs @@ -1,29 +1,29 @@ #[doc = "Register `RESPONSE2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESPONSE2` reader - Response2"] -pub type RESPONSE2_R = crate::FieldReader; +pub type Response2R = crate::FieldReader; #[doc = "Field `RESPONSE3` reader - Response3"] -pub type RESPONSE3_R = crate::FieldReader; +pub type Response3R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Response2"] #[inline(always)] - pub fn response2(&self) -> RESPONSE2_R { - RESPONSE2_R::new((self.bits & 0xffff) as u16) + pub fn response2(&self) -> Response2R { + Response2R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Response3"] #[inline(always)] - pub fn response3(&self) -> RESPONSE3_R { - RESPONSE3_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn response3(&self) -> Response3R { + Response3R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Response 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESPONSE2_SPEC; -impl crate::RegisterSpec for RESPONSE2_SPEC { +pub struct Response2Spec; +impl crate::RegisterSpec for Response2Spec { type Ux = u32; } #[doc = "`read()` method returns [`response2::R`](R) reader structure"] -impl crate::Readable for RESPONSE2_SPEC {} +impl crate::Readable for Response2Spec {} #[doc = "`reset()` method sets RESPONSE2 to value 0"] -impl crate::Resettable for RESPONSE2_SPEC { +impl crate::Resettable for Response2Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/response4.rs b/src/sdmmc/response4.rs index c80bad7e..6604ef77 100644 --- a/src/sdmmc/response4.rs +++ b/src/sdmmc/response4.rs @@ -1,29 +1,29 @@ #[doc = "Register `RESPONSE4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESPONSE4` reader - Response4"] -pub type RESPONSE4_R = crate::FieldReader; +pub type Response4R = crate::FieldReader; #[doc = "Field `RESPONSE5` reader - Response5"] -pub type RESPONSE5_R = crate::FieldReader; +pub type Response5R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Response4"] #[inline(always)] - pub fn response4(&self) -> RESPONSE4_R { - RESPONSE4_R::new((self.bits & 0xffff) as u16) + pub fn response4(&self) -> Response4R { + Response4R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Response5"] #[inline(always)] - pub fn response5(&self) -> RESPONSE5_R { - RESPONSE5_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn response5(&self) -> Response5R { + Response5R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Response 4 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESPONSE4_SPEC; -impl crate::RegisterSpec for RESPONSE4_SPEC { +pub struct Response4Spec; +impl crate::RegisterSpec for Response4Spec { type Ux = u32; } #[doc = "`read()` method returns [`response4::R`](R) reader structure"] -impl crate::Readable for RESPONSE4_SPEC {} +impl crate::Readable for Response4Spec {} #[doc = "`reset()` method sets RESPONSE4 to value 0"] -impl crate::Resettable for RESPONSE4_SPEC { +impl crate::Resettable for Response4Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/response6.rs b/src/sdmmc/response6.rs index 01b9d7b3..051f9a91 100644 --- a/src/sdmmc/response6.rs +++ b/src/sdmmc/response6.rs @@ -1,29 +1,29 @@ #[doc = "Register `RESPONSE6` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESPONSE6` reader - Response6"] -pub type RESPONSE6_R = crate::FieldReader; +pub type Response6R = crate::FieldReader; #[doc = "Field `RESPONSE7` reader - Response7"] -pub type RESPONSE7_R = crate::FieldReader; +pub type Response7R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Response6"] #[inline(always)] - pub fn response6(&self) -> RESPONSE6_R { - RESPONSE6_R::new((self.bits & 0xffff) as u16) + pub fn response6(&self) -> Response6R { + Response6R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Response7"] #[inline(always)] - pub fn response7(&self) -> RESPONSE7_R { - RESPONSE7_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn response7(&self) -> Response7R { + Response7R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Response 6 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`response6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESPONSE6_SPEC; -impl crate::RegisterSpec for RESPONSE6_SPEC { +pub struct Response6Spec; +impl crate::RegisterSpec for Response6Spec { type Ux = u32; } #[doc = "`read()` method returns [`response6::R`](R) reader structure"] -impl crate::Readable for RESPONSE6_SPEC {} +impl crate::Readable for Response6Spec {} #[doc = "`reset()` method sets RESPONSE6 to value 0"] -impl crate::Resettable for RESPONSE6_SPEC { +impl crate::Resettable for Response6Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/sdmmc/slot_int_status.rs b/src/sdmmc/slot_int_status.rs index 47f9a274..f3e6e5ce 100644 --- a/src/sdmmc/slot_int_status.rs +++ b/src/sdmmc/slot_int_status.rs @@ -1,53 +1,53 @@ #[doc = "Register `SLOT_INT_STATUS` reader"] -pub type R = crate::R; -#[doc = "Field `SLOT_INT_STATUS` reader - Interrupt Signal for Card Slot"] -pub type SLOT_INT_STATUS_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Interrupt Signal for Card Slot\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SLOT_INT_STATUS_A { +pub enum SlotIntStatus { #[doc = "0: Slot 1"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SLOT_INT_STATUS_A) -> Self { + fn from(variant: SlotIntStatus) -> Self { variant as _ } } -impl crate::FieldSpec for SLOT_INT_STATUS_A { +impl crate::FieldSpec for SlotIntStatus { type Ux = u8; } -impl SLOT_INT_STATUS_R { +#[doc = "Field `SLOT_INT_STATUS` reader - Interrupt Signal for Card Slot"] +pub type SlotIntStatusR = crate::FieldReader; +impl SlotIntStatusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SLOT_INT_STATUS_A::VALUE1), + 0 => Some(SlotIntStatus::Value1), _ => None, } } #[doc = "Slot 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLOT_INT_STATUS_A::VALUE1 + *self == SlotIntStatus::Value1 } } impl R { #[doc = "Bits 0:7 - Interrupt Signal for Card Slot"] #[inline(always)] - pub fn slot_int_status(&self) -> SLOT_INT_STATUS_R { - SLOT_INT_STATUS_R::new((self.bits & 0xff) as u8) + pub fn slot_int_status(&self) -> SlotIntStatusR { + SlotIntStatusR::new((self.bits & 0xff) as u8) } } #[doc = "Slot Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`slot_int_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SLOT_INT_STATUS_SPEC; -impl crate::RegisterSpec for SLOT_INT_STATUS_SPEC { +pub struct SlotIntStatusSpec; +impl crate::RegisterSpec for SlotIntStatusSpec { type Ux = u16; } #[doc = "`read()` method returns [`slot_int_status::R`](R) reader structure"] -impl crate::Readable for SLOT_INT_STATUS_SPEC {} +impl crate::Readable for SlotIntStatusSpec {} #[doc = "`reset()` method sets SLOT_INT_STATUS to value 0"] -impl crate::Resettable for SLOT_INT_STATUS_SPEC { +impl crate::Resettable for SlotIntStatusSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/sw_reset.rs b/src/sdmmc/sw_reset.rs index 2521a71e..79e1d3a4 100644 --- a/src/sdmmc/sw_reset.rs +++ b/src/sdmmc/sw_reset.rs @@ -1,177 +1,168 @@ #[doc = "Register `SW_RESET` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SW_RESET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SW_RST_ALL` reader - Software Reset for All"] -pub type SW_RST_ALL_R = crate::BitReader; +pub type SwRstAllR = crate::BitReader; #[doc = "Field `SW_RST_ALL` writer - Software Reset for All"] -pub type SW_RST_ALL_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SW_RST_CMD_LINE` reader - Software Reset for CMD Line"] -pub type SW_RST_CMD_LINE_R = crate::BitReader; +pub type SwRstAllW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Software Reset for CMD Line\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SW_RST_CMD_LINE_A { +pub enum SwRstCmdLine { #[doc = "0: Work"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SW_RST_CMD_LINE_A) -> Self { + fn from(variant: SwRstCmdLine) -> Self { variant as u8 != 0 } } -impl SW_RST_CMD_LINE_R { +#[doc = "Field `SW_RST_CMD_LINE` reader - Software Reset for CMD Line"] +pub type SwRstCmdLineR = crate::BitReader; +impl SwRstCmdLineR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SW_RST_CMD_LINE_A { + pub const fn variant(&self) -> SwRstCmdLine { match self.bits { - false => SW_RST_CMD_LINE_A::VALUE1, - true => SW_RST_CMD_LINE_A::VALUE2, + false => SwRstCmdLine::Value1, + true => SwRstCmdLine::Value2, } } #[doc = "Work"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SW_RST_CMD_LINE_A::VALUE1 + *self == SwRstCmdLine::Value1 } #[doc = "Reset"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SW_RST_CMD_LINE_A::VALUE2 + *self == SwRstCmdLine::Value2 } } #[doc = "Field `SW_RST_CMD_LINE` writer - Software Reset for CMD Line"] -pub type SW_RST_CMD_LINE_W<'a, REG> = crate::BitWriter<'a, REG, SW_RST_CMD_LINE_A>; -impl<'a, REG> SW_RST_CMD_LINE_W<'a, REG> +pub type SwRstCmdLineW<'a, REG> = crate::BitWriter<'a, REG, SwRstCmdLine>; +impl<'a, REG> SwRstCmdLineW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Work"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SW_RST_CMD_LINE_A::VALUE1) + self.variant(SwRstCmdLine::Value1) } #[doc = "Reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SW_RST_CMD_LINE_A::VALUE2) + self.variant(SwRstCmdLine::Value2) } } -#[doc = "Field `SW_RST_DAT_LINE` reader - Software Reset for DAT Line"] -pub type SW_RST_DAT_LINE_R = crate::BitReader; #[doc = "Software Reset for DAT Line\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SW_RST_DAT_LINE_A { +pub enum SwRstDatLine { #[doc = "0: Work"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SW_RST_DAT_LINE_A) -> Self { + fn from(variant: SwRstDatLine) -> Self { variant as u8 != 0 } } -impl SW_RST_DAT_LINE_R { +#[doc = "Field `SW_RST_DAT_LINE` reader - Software Reset for DAT Line"] +pub type SwRstDatLineR = crate::BitReader; +impl SwRstDatLineR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SW_RST_DAT_LINE_A { + pub const fn variant(&self) -> SwRstDatLine { match self.bits { - false => SW_RST_DAT_LINE_A::VALUE1, - true => SW_RST_DAT_LINE_A::VALUE2, + false => SwRstDatLine::Value1, + true => SwRstDatLine::Value2, } } #[doc = "Work"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SW_RST_DAT_LINE_A::VALUE1 + *self == SwRstDatLine::Value1 } #[doc = "Reset"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SW_RST_DAT_LINE_A::VALUE2 + *self == SwRstDatLine::Value2 } } #[doc = "Field `SW_RST_DAT_LINE` writer - Software Reset for DAT Line"] -pub type SW_RST_DAT_LINE_W<'a, REG> = crate::BitWriter<'a, REG, SW_RST_DAT_LINE_A>; -impl<'a, REG> SW_RST_DAT_LINE_W<'a, REG> +pub type SwRstDatLineW<'a, REG> = crate::BitWriter<'a, REG, SwRstDatLine>; +impl<'a, REG> SwRstDatLineW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Work"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SW_RST_DAT_LINE_A::VALUE1) + self.variant(SwRstDatLine::Value1) } #[doc = "Reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SW_RST_DAT_LINE_A::VALUE2) + self.variant(SwRstDatLine::Value2) } } impl R { #[doc = "Bit 0 - Software Reset for All"] #[inline(always)] - pub fn sw_rst_all(&self) -> SW_RST_ALL_R { - SW_RST_ALL_R::new((self.bits & 1) != 0) + pub fn sw_rst_all(&self) -> SwRstAllR { + SwRstAllR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Software Reset for CMD Line"] #[inline(always)] - pub fn sw_rst_cmd_line(&self) -> SW_RST_CMD_LINE_R { - SW_RST_CMD_LINE_R::new(((self.bits >> 1) & 1) != 0) + pub fn sw_rst_cmd_line(&self) -> SwRstCmdLineR { + SwRstCmdLineR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Software Reset for DAT Line"] #[inline(always)] - pub fn sw_rst_dat_line(&self) -> SW_RST_DAT_LINE_R { - SW_RST_DAT_LINE_R::new(((self.bits >> 2) & 1) != 0) + pub fn sw_rst_dat_line(&self) -> SwRstDatLineR { + SwRstDatLineR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Software Reset for All"] #[inline(always)] #[must_use] - pub fn sw_rst_all(&mut self) -> SW_RST_ALL_W { - SW_RST_ALL_W::new(self, 0) + pub fn sw_rst_all(&mut self) -> SwRstAllW { + SwRstAllW::new(self, 0) } #[doc = "Bit 1 - Software Reset for CMD Line"] #[inline(always)] #[must_use] - pub fn sw_rst_cmd_line(&mut self) -> SW_RST_CMD_LINE_W { - SW_RST_CMD_LINE_W::new(self, 1) + pub fn sw_rst_cmd_line(&mut self) -> SwRstCmdLineW { + SwRstCmdLineW::new(self, 1) } #[doc = "Bit 2 - Software Reset for DAT Line"] #[inline(always)] #[must_use] - pub fn sw_rst_dat_line(&mut self) -> SW_RST_DAT_LINE_W { - SW_RST_DAT_LINE_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn sw_rst_dat_line(&mut self) -> SwRstDatLineW { + SwRstDatLineW::new(self, 2) } } #[doc = "Software Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sw_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sw_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SW_RESET_SPEC; -impl crate::RegisterSpec for SW_RESET_SPEC { +pub struct SwResetSpec; +impl crate::RegisterSpec for SwResetSpec { type Ux = u8; } #[doc = "`read()` method returns [`sw_reset::R`](R) reader structure"] -impl crate::Readable for SW_RESET_SPEC {} +impl crate::Readable for SwResetSpec {} #[doc = "`write(|w| ..)` method takes [`sw_reset::W`](W) writer structure"] -impl crate::Writable for SW_RESET_SPEC { +impl crate::Writable for SwResetSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets SW_RESET to value 0"] -impl crate::Resettable for SW_RESET_SPEC { +impl crate::Resettable for SwResetSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc/timeout_ctrl.rs b/src/sdmmc/timeout_ctrl.rs index d1180267..b84b5810 100644 --- a/src/sdmmc/timeout_ctrl.rs +++ b/src/sdmmc/timeout_ctrl.rs @@ -1,59 +1,59 @@ #[doc = "Register `TIMEOUT_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMEOUT_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `DAT_TIMEOUT_CNT_VAL` reader - Data Timeout Counter Value"] -pub type DAT_TIMEOUT_CNT_VAL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Timeout Counter Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DAT_TIMEOUT_CNT_VAL_A { +pub enum DatTimeoutCntVal { #[doc = "0: TMCLK * 2^13"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: TMCLK * 2^14"] - VALUE2 = 1, + Value2 = 1, #[doc = "14: TMCLK * 2^27"] - VALUE3 = 14, + Value3 = 14, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DAT_TIMEOUT_CNT_VAL_A) -> Self { + fn from(variant: DatTimeoutCntVal) -> Self { variant as _ } } -impl crate::FieldSpec for DAT_TIMEOUT_CNT_VAL_A { +impl crate::FieldSpec for DatTimeoutCntVal { type Ux = u8; } -impl DAT_TIMEOUT_CNT_VAL_R { +#[doc = "Field `DAT_TIMEOUT_CNT_VAL` reader - Data Timeout Counter Value"] +pub type DatTimeoutCntValR = crate::FieldReader; +impl DatTimeoutCntValR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DAT_TIMEOUT_CNT_VAL_A::VALUE1), - 1 => Some(DAT_TIMEOUT_CNT_VAL_A::VALUE2), - 14 => Some(DAT_TIMEOUT_CNT_VAL_A::VALUE3), + 0 => Some(DatTimeoutCntVal::Value1), + 1 => Some(DatTimeoutCntVal::Value2), + 14 => Some(DatTimeoutCntVal::Value3), _ => None, } } #[doc = "TMCLK * 2^13"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DAT_TIMEOUT_CNT_VAL_A::VALUE1 + *self == DatTimeoutCntVal::Value1 } #[doc = "TMCLK * 2^14"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DAT_TIMEOUT_CNT_VAL_A::VALUE2 + *self == DatTimeoutCntVal::Value2 } #[doc = "TMCLK * 2^27"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DAT_TIMEOUT_CNT_VAL_A::VALUE3 + *self == DatTimeoutCntVal::Value3 } } #[doc = "Field `DAT_TIMEOUT_CNT_VAL` writer - Data Timeout Counter Value"] -pub type DAT_TIMEOUT_CNT_VAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DAT_TIMEOUT_CNT_VAL_A>; -impl<'a, REG> DAT_TIMEOUT_CNT_VAL_W<'a, REG> +pub type DatTimeoutCntValW<'a, REG> = crate::FieldWriter<'a, REG, 4, DatTimeoutCntVal>; +impl<'a, REG> DatTimeoutCntValW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,57 +61,48 @@ where #[doc = "TMCLK * 2^13"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DAT_TIMEOUT_CNT_VAL_A::VALUE1) + self.variant(DatTimeoutCntVal::Value1) } #[doc = "TMCLK * 2^14"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DAT_TIMEOUT_CNT_VAL_A::VALUE2) + self.variant(DatTimeoutCntVal::Value2) } #[doc = "TMCLK * 2^27"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DAT_TIMEOUT_CNT_VAL_A::VALUE3) + self.variant(DatTimeoutCntVal::Value3) } } impl R { #[doc = "Bits 0:3 - Data Timeout Counter Value"] #[inline(always)] - pub fn dat_timeout_cnt_val(&self) -> DAT_TIMEOUT_CNT_VAL_R { - DAT_TIMEOUT_CNT_VAL_R::new(self.bits & 0x0f) + pub fn dat_timeout_cnt_val(&self) -> DatTimeoutCntValR { + DatTimeoutCntValR::new(self.bits & 0x0f) } } impl W { #[doc = "Bits 0:3 - Data Timeout Counter Value"] #[inline(always)] #[must_use] - pub fn dat_timeout_cnt_val(&mut self) -> DAT_TIMEOUT_CNT_VAL_W { - DAT_TIMEOUT_CNT_VAL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn dat_timeout_cnt_val(&mut self) -> DatTimeoutCntValW { + DatTimeoutCntValW::new(self, 0) } } #[doc = "Timeout Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timeout_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timeout_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIMEOUT_CTRL_SPEC; -impl crate::RegisterSpec for TIMEOUT_CTRL_SPEC { +pub struct TimeoutCtrlSpec; +impl crate::RegisterSpec for TimeoutCtrlSpec { type Ux = u8; } #[doc = "`read()` method returns [`timeout_ctrl::R`](R) reader structure"] -impl crate::Readable for TIMEOUT_CTRL_SPEC {} +impl crate::Readable for TimeoutCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`timeout_ctrl::W`](W) writer structure"] -impl crate::Writable for TIMEOUT_CTRL_SPEC { +impl crate::Writable for TimeoutCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets TIMEOUT_CTRL to value 0"] -impl crate::Resettable for TIMEOUT_CTRL_SPEC { +impl crate::Resettable for TimeoutCtrlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc/transfer_mode.rs b/src/sdmmc/transfer_mode.rs index 88b2427e..bc2b17d3 100644 --- a/src/sdmmc/transfer_mode.rs +++ b/src/sdmmc/transfer_mode.rs @@ -1,104 +1,104 @@ #[doc = "Register `TRANSFER_MODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRANSFER_MODE` writer"] -pub type W = crate::W; -#[doc = "Field `BLOCK_COUNT_EN` reader - Block Count Enable"] -pub type BLOCK_COUNT_EN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Block Count Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BLOCK_COUNT_EN_A { +pub enum BlockCountEn { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BLOCK_COUNT_EN_A) -> Self { + fn from(variant: BlockCountEn) -> Self { variant as u8 != 0 } } -impl BLOCK_COUNT_EN_R { +#[doc = "Field `BLOCK_COUNT_EN` reader - Block Count Enable"] +pub type BlockCountEnR = crate::BitReader; +impl BlockCountEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BLOCK_COUNT_EN_A { + pub const fn variant(&self) -> BlockCountEn { match self.bits { - false => BLOCK_COUNT_EN_A::VALUE1, - true => BLOCK_COUNT_EN_A::VALUE2, + false => BlockCountEn::Value1, + true => BlockCountEn::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BLOCK_COUNT_EN_A::VALUE1 + *self == BlockCountEn::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BLOCK_COUNT_EN_A::VALUE2 + *self == BlockCountEn::Value2 } } #[doc = "Field `BLOCK_COUNT_EN` writer - Block Count Enable"] -pub type BLOCK_COUNT_EN_W<'a, REG> = crate::BitWriter<'a, REG, BLOCK_COUNT_EN_A>; -impl<'a, REG> BLOCK_COUNT_EN_W<'a, REG> +pub type BlockCountEnW<'a, REG> = crate::BitWriter<'a, REG, BlockCountEn>; +impl<'a, REG> BlockCountEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BLOCK_COUNT_EN_A::VALUE1) + self.variant(BlockCountEn::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BLOCK_COUNT_EN_A::VALUE2) + self.variant(BlockCountEn::Value2) } } -#[doc = "Field `ACMD_EN` reader - Auto CMD Enable"] -pub type ACMD_EN_R = crate::FieldReader; #[doc = "Auto CMD Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ACMD_EN_A { +pub enum AcmdEn { #[doc = "0: Auto Command Disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Auto CMD12 Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ACMD_EN_A) -> Self { + fn from(variant: AcmdEn) -> Self { variant as _ } } -impl crate::FieldSpec for ACMD_EN_A { +impl crate::FieldSpec for AcmdEn { type Ux = u8; } -impl ACMD_EN_R { +#[doc = "Field `ACMD_EN` reader - Auto CMD Enable"] +pub type AcmdEnR = crate::FieldReader; +impl AcmdEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ACMD_EN_A::VALUE1), - 1 => Some(ACMD_EN_A::VALUE2), + 0 => Some(AcmdEn::Value1), + 1 => Some(AcmdEn::Value2), _ => None, } } #[doc = "Auto Command Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACMD_EN_A::VALUE1 + *self == AcmdEn::Value1 } #[doc = "Auto CMD12 Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACMD_EN_A::VALUE2 + *self == AcmdEn::Value2 } } #[doc = "Field `ACMD_EN` writer - Auto CMD Enable"] -pub type ACMD_EN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ACMD_EN_A>; -impl<'a, REG> ACMD_EN_W<'a, REG> +pub type AcmdEnW<'a, REG> = crate::FieldWriter<'a, REG, 2, AcmdEn>; +impl<'a, REG> AcmdEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -106,255 +106,246 @@ where #[doc = "Auto Command Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACMD_EN_A::VALUE1) + self.variant(AcmdEn::Value1) } #[doc = "Auto CMD12 Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACMD_EN_A::VALUE2) + self.variant(AcmdEn::Value2) } } -#[doc = "Field `TX_DIR_SELECT` reader - Data Transfer Direction Select"] -pub type TX_DIR_SELECT_R = crate::BitReader; #[doc = "Data Transfer Direction Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TX_DIR_SELECT_A { +pub enum TxDirSelect { #[doc = "0: Write (Host to Card)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read (Card to Host)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TX_DIR_SELECT_A) -> Self { + fn from(variant: TxDirSelect) -> Self { variant as u8 != 0 } } -impl TX_DIR_SELECT_R { +#[doc = "Field `TX_DIR_SELECT` reader - Data Transfer Direction Select"] +pub type TxDirSelectR = crate::BitReader; +impl TxDirSelectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_DIR_SELECT_A { + pub const fn variant(&self) -> TxDirSelect { match self.bits { - false => TX_DIR_SELECT_A::VALUE1, - true => TX_DIR_SELECT_A::VALUE2, + false => TxDirSelect::Value1, + true => TxDirSelect::Value2, } } #[doc = "Write (Host to Card)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_DIR_SELECT_A::VALUE1 + *self == TxDirSelect::Value1 } #[doc = "Read (Card to Host)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_DIR_SELECT_A::VALUE2 + *self == TxDirSelect::Value2 } } #[doc = "Field `TX_DIR_SELECT` writer - Data Transfer Direction Select"] -pub type TX_DIR_SELECT_W<'a, REG> = crate::BitWriter<'a, REG, TX_DIR_SELECT_A>; -impl<'a, REG> TX_DIR_SELECT_W<'a, REG> +pub type TxDirSelectW<'a, REG> = crate::BitWriter<'a, REG, TxDirSelect>; +impl<'a, REG> TxDirSelectW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Write (Host to Card)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_DIR_SELECT_A::VALUE1) + self.variant(TxDirSelect::Value1) } #[doc = "Read (Card to Host)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_DIR_SELECT_A::VALUE2) + self.variant(TxDirSelect::Value2) } } -#[doc = "Field `MULTI_BLOCK_SELECT` reader - Multi / Single Block Select"] -pub type MULTI_BLOCK_SELECT_R = crate::BitReader; #[doc = "Multi / Single Block Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MULTI_BLOCK_SELECT_A { +pub enum MultiBlockSelect { #[doc = "0: Single Block"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Multiple Block"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MULTI_BLOCK_SELECT_A) -> Self { + fn from(variant: MultiBlockSelect) -> Self { variant as u8 != 0 } } -impl MULTI_BLOCK_SELECT_R { +#[doc = "Field `MULTI_BLOCK_SELECT` reader - Multi / Single Block Select"] +pub type MultiBlockSelectR = crate::BitReader; +impl MultiBlockSelectR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MULTI_BLOCK_SELECT_A { + pub const fn variant(&self) -> MultiBlockSelect { match self.bits { - false => MULTI_BLOCK_SELECT_A::VALUE1, - true => MULTI_BLOCK_SELECT_A::VALUE2, + false => MultiBlockSelect::Value1, + true => MultiBlockSelect::Value2, } } #[doc = "Single Block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MULTI_BLOCK_SELECT_A::VALUE1 + *self == MultiBlockSelect::Value1 } #[doc = "Multiple Block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MULTI_BLOCK_SELECT_A::VALUE2 + *self == MultiBlockSelect::Value2 } } #[doc = "Field `MULTI_BLOCK_SELECT` writer - Multi / Single Block Select"] -pub type MULTI_BLOCK_SELECT_W<'a, REG> = crate::BitWriter<'a, REG, MULTI_BLOCK_SELECT_A>; -impl<'a, REG> MULTI_BLOCK_SELECT_W<'a, REG> +pub type MultiBlockSelectW<'a, REG> = crate::BitWriter<'a, REG, MultiBlockSelect>; +impl<'a, REG> MultiBlockSelectW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Single Block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MULTI_BLOCK_SELECT_A::VALUE1) + self.variant(MultiBlockSelect::Value1) } #[doc = "Multiple Block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MULTI_BLOCK_SELECT_A::VALUE2) + self.variant(MultiBlockSelect::Value2) } } -#[doc = "Field `CMD_COMP_ATA` reader - Command Completion Signal Enable for CE-ATA Device"] -pub type CMD_COMP_ATA_R = crate::BitReader; #[doc = "Command Completion Signal Enable for CE-ATA Device\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CMD_COMP_ATA_A { +pub enum CmdCompAta { #[doc = "1: Device will send command completion Signal"] - VALUE1 = 1, + Value1 = 1, #[doc = "0: Device will not send command completion Signal"] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CMD_COMP_ATA_A) -> Self { + fn from(variant: CmdCompAta) -> Self { variant as u8 != 0 } } -impl CMD_COMP_ATA_R { +#[doc = "Field `CMD_COMP_ATA` reader - Command Completion Signal Enable for CE-ATA Device"] +pub type CmdCompAtaR = crate::BitReader; +impl CmdCompAtaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CMD_COMP_ATA_A { + pub const fn variant(&self) -> CmdCompAta { match self.bits { - true => CMD_COMP_ATA_A::VALUE1, - false => CMD_COMP_ATA_A::VALUE2, + true => CmdCompAta::Value1, + false => CmdCompAta::Value2, } } #[doc = "Device will send command completion Signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMD_COMP_ATA_A::VALUE1 + *self == CmdCompAta::Value1 } #[doc = "Device will not send command completion Signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMD_COMP_ATA_A::VALUE2 + *self == CmdCompAta::Value2 } } #[doc = "Field `CMD_COMP_ATA` writer - Command Completion Signal Enable for CE-ATA Device"] -pub type CMD_COMP_ATA_W<'a, REG> = crate::BitWriter<'a, REG, CMD_COMP_ATA_A>; -impl<'a, REG> CMD_COMP_ATA_W<'a, REG> +pub type CmdCompAtaW<'a, REG> = crate::BitWriter<'a, REG, CmdCompAta>; +impl<'a, REG> CmdCompAtaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Device will send command completion Signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMD_COMP_ATA_A::VALUE1) + self.variant(CmdCompAta::Value1) } #[doc = "Device will not send command completion Signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMD_COMP_ATA_A::VALUE2) + self.variant(CmdCompAta::Value2) } } impl R { #[doc = "Bit 1 - Block Count Enable"] #[inline(always)] - pub fn block_count_en(&self) -> BLOCK_COUNT_EN_R { - BLOCK_COUNT_EN_R::new(((self.bits >> 1) & 1) != 0) + pub fn block_count_en(&self) -> BlockCountEnR { + BlockCountEnR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:3 - Auto CMD Enable"] #[inline(always)] - pub fn acmd_en(&self) -> ACMD_EN_R { - ACMD_EN_R::new(((self.bits >> 2) & 3) as u8) + pub fn acmd_en(&self) -> AcmdEnR { + AcmdEnR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Data Transfer Direction Select"] #[inline(always)] - pub fn tx_dir_select(&self) -> TX_DIR_SELECT_R { - TX_DIR_SELECT_R::new(((self.bits >> 4) & 1) != 0) + pub fn tx_dir_select(&self) -> TxDirSelectR { + TxDirSelectR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Multi / Single Block Select"] #[inline(always)] - pub fn multi_block_select(&self) -> MULTI_BLOCK_SELECT_R { - MULTI_BLOCK_SELECT_R::new(((self.bits >> 5) & 1) != 0) + pub fn multi_block_select(&self) -> MultiBlockSelectR { + MultiBlockSelectR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Command Completion Signal Enable for CE-ATA Device"] #[inline(always)] - pub fn cmd_comp_ata(&self) -> CMD_COMP_ATA_R { - CMD_COMP_ATA_R::new(((self.bits >> 6) & 1) != 0) + pub fn cmd_comp_ata(&self) -> CmdCompAtaR { + CmdCompAtaR::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bit 1 - Block Count Enable"] #[inline(always)] #[must_use] - pub fn block_count_en(&mut self) -> BLOCK_COUNT_EN_W { - BLOCK_COUNT_EN_W::new(self, 1) + pub fn block_count_en(&mut self) -> BlockCountEnW { + BlockCountEnW::new(self, 1) } #[doc = "Bits 2:3 - Auto CMD Enable"] #[inline(always)] #[must_use] - pub fn acmd_en(&mut self) -> ACMD_EN_W { - ACMD_EN_W::new(self, 2) + pub fn acmd_en(&mut self) -> AcmdEnW { + AcmdEnW::new(self, 2) } #[doc = "Bit 4 - Data Transfer Direction Select"] #[inline(always)] #[must_use] - pub fn tx_dir_select(&mut self) -> TX_DIR_SELECT_W { - TX_DIR_SELECT_W::new(self, 4) + pub fn tx_dir_select(&mut self) -> TxDirSelectW { + TxDirSelectW::new(self, 4) } #[doc = "Bit 5 - Multi / Single Block Select"] #[inline(always)] #[must_use] - pub fn multi_block_select(&mut self) -> MULTI_BLOCK_SELECT_W { - MULTI_BLOCK_SELECT_W::new(self, 5) + pub fn multi_block_select(&mut self) -> MultiBlockSelectW { + MultiBlockSelectW::new(self, 5) } #[doc = "Bit 6 - Command Completion Signal Enable for CE-ATA Device"] #[inline(always)] #[must_use] - pub fn cmd_comp_ata(&mut self) -> CMD_COMP_ATA_W { - CMD_COMP_ATA_W::new(self, 6) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { - self.bits = bits; - self + pub fn cmd_comp_ata(&mut self) -> CmdCompAtaW { + CmdCompAtaW::new(self, 6) } } #[doc = "Transfer Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`transfer_mode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`transfer_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRANSFER_MODE_SPEC; -impl crate::RegisterSpec for TRANSFER_MODE_SPEC { +pub struct TransferModeSpec; +impl crate::RegisterSpec for TransferModeSpec { type Ux = u16; } #[doc = "`read()` method returns [`transfer_mode::R`](R) reader structure"] -impl crate::Readable for TRANSFER_MODE_SPEC {} +impl crate::Readable for TransferModeSpec {} #[doc = "`write(|w| ..)` method takes [`transfer_mode::W`](W) writer structure"] -impl crate::Writable for TRANSFER_MODE_SPEC { +impl crate::Writable for TransferModeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0; } #[doc = "`reset()` method sets TRANSFER_MODE to value 0"] -impl crate::Resettable for TRANSFER_MODE_SPEC { +impl crate::Resettable for TransferModeSpec { const RESET_VALUE: u16 = 0; } diff --git a/src/sdmmc/wakeup_ctrl.rs b/src/sdmmc/wakeup_ctrl.rs index 5eb19a5e..9abbaf6a 100644 --- a/src/sdmmc/wakeup_ctrl.rs +++ b/src/sdmmc/wakeup_ctrl.rs @@ -1,226 +1,217 @@ #[doc = "Register `WAKEUP_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WAKEUP_CTRL` writer"] -pub type W = crate::W; -#[doc = "Field `WAKEUP_EVENT_EN_INT` reader - Wakeup Event Enable On Card Interrupt"] -pub type WAKEUP_EVENT_EN_INT_R = crate::BitReader; +pub type W = crate::W; #[doc = "Wakeup Event Enable On Card Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAKEUP_EVENT_EN_INT_A { +pub enum WakeupEventEnInt { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAKEUP_EVENT_EN_INT_A) -> Self { + fn from(variant: WakeupEventEnInt) -> Self { variant as u8 != 0 } } -impl WAKEUP_EVENT_EN_INT_R { +#[doc = "Field `WAKEUP_EVENT_EN_INT` reader - Wakeup Event Enable On Card Interrupt"] +pub type WakeupEventEnIntR = crate::BitReader; +impl WakeupEventEnIntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAKEUP_EVENT_EN_INT_A { + pub const fn variant(&self) -> WakeupEventEnInt { match self.bits { - false => WAKEUP_EVENT_EN_INT_A::VALUE1, - true => WAKEUP_EVENT_EN_INT_A::VALUE2, + false => WakeupEventEnInt::Value1, + true => WakeupEventEnInt::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAKEUP_EVENT_EN_INT_A::VALUE1 + *self == WakeupEventEnInt::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAKEUP_EVENT_EN_INT_A::VALUE2 + *self == WakeupEventEnInt::Value2 } } #[doc = "Field `WAKEUP_EVENT_EN_INT` writer - Wakeup Event Enable On Card Interrupt"] -pub type WAKEUP_EVENT_EN_INT_W<'a, REG> = crate::BitWriter<'a, REG, WAKEUP_EVENT_EN_INT_A>; -impl<'a, REG> WAKEUP_EVENT_EN_INT_W<'a, REG> +pub type WakeupEventEnIntW<'a, REG> = crate::BitWriter<'a, REG, WakeupEventEnInt>; +impl<'a, REG> WakeupEventEnIntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_INT_A::VALUE1) + self.variant(WakeupEventEnInt::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_INT_A::VALUE2) + self.variant(WakeupEventEnInt::Value2) } } -#[doc = "Field `WAKEUP_EVENT_EN_INS` reader - Wakeup Event Enable On SD Card Insertion"] -pub type WAKEUP_EVENT_EN_INS_R = crate::BitReader; #[doc = "Wakeup Event Enable On SD Card Insertion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAKEUP_EVENT_EN_INS_A { +pub enum WakeupEventEnIns { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAKEUP_EVENT_EN_INS_A) -> Self { + fn from(variant: WakeupEventEnIns) -> Self { variant as u8 != 0 } } -impl WAKEUP_EVENT_EN_INS_R { +#[doc = "Field `WAKEUP_EVENT_EN_INS` reader - Wakeup Event Enable On SD Card Insertion"] +pub type WakeupEventEnInsR = crate::BitReader; +impl WakeupEventEnInsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAKEUP_EVENT_EN_INS_A { + pub const fn variant(&self) -> WakeupEventEnIns { match self.bits { - false => WAKEUP_EVENT_EN_INS_A::VALUE1, - true => WAKEUP_EVENT_EN_INS_A::VALUE2, + false => WakeupEventEnIns::Value1, + true => WakeupEventEnIns::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAKEUP_EVENT_EN_INS_A::VALUE1 + *self == WakeupEventEnIns::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAKEUP_EVENT_EN_INS_A::VALUE2 + *self == WakeupEventEnIns::Value2 } } #[doc = "Field `WAKEUP_EVENT_EN_INS` writer - Wakeup Event Enable On SD Card Insertion"] -pub type WAKEUP_EVENT_EN_INS_W<'a, REG> = crate::BitWriter<'a, REG, WAKEUP_EVENT_EN_INS_A>; -impl<'a, REG> WAKEUP_EVENT_EN_INS_W<'a, REG> +pub type WakeupEventEnInsW<'a, REG> = crate::BitWriter<'a, REG, WakeupEventEnIns>; +impl<'a, REG> WakeupEventEnInsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_INS_A::VALUE1) + self.variant(WakeupEventEnIns::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_INS_A::VALUE2) + self.variant(WakeupEventEnIns::Value2) } } -#[doc = "Field `WAKEUP_EVENT_EN_REM` reader - Wakeup Event Enable On SD Card Removal"] -pub type WAKEUP_EVENT_EN_REM_R = crate::BitReader; #[doc = "Wakeup Event Enable On SD Card Removal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAKEUP_EVENT_EN_REM_A { +pub enum WakeupEventEnRem { #[doc = "0: Disable"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Enable"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAKEUP_EVENT_EN_REM_A) -> Self { + fn from(variant: WakeupEventEnRem) -> Self { variant as u8 != 0 } } -impl WAKEUP_EVENT_EN_REM_R { +#[doc = "Field `WAKEUP_EVENT_EN_REM` reader - Wakeup Event Enable On SD Card Removal"] +pub type WakeupEventEnRemR = crate::BitReader; +impl WakeupEventEnRemR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAKEUP_EVENT_EN_REM_A { + pub const fn variant(&self) -> WakeupEventEnRem { match self.bits { - false => WAKEUP_EVENT_EN_REM_A::VALUE1, - true => WAKEUP_EVENT_EN_REM_A::VALUE2, + false => WakeupEventEnRem::Value1, + true => WakeupEventEnRem::Value2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAKEUP_EVENT_EN_REM_A::VALUE1 + *self == WakeupEventEnRem::Value1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAKEUP_EVENT_EN_REM_A::VALUE2 + *self == WakeupEventEnRem::Value2 } } #[doc = "Field `WAKEUP_EVENT_EN_REM` writer - Wakeup Event Enable On SD Card Removal"] -pub type WAKEUP_EVENT_EN_REM_W<'a, REG> = crate::BitWriter<'a, REG, WAKEUP_EVENT_EN_REM_A>; -impl<'a, REG> WAKEUP_EVENT_EN_REM_W<'a, REG> +pub type WakeupEventEnRemW<'a, REG> = crate::BitWriter<'a, REG, WakeupEventEnRem>; +impl<'a, REG> WakeupEventEnRemW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_REM_A::VALUE1) + self.variant(WakeupEventEnRem::Value1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAKEUP_EVENT_EN_REM_A::VALUE2) + self.variant(WakeupEventEnRem::Value2) } } impl R { #[doc = "Bit 0 - Wakeup Event Enable On Card Interrupt"] #[inline(always)] - pub fn wakeup_event_en_int(&self) -> WAKEUP_EVENT_EN_INT_R { - WAKEUP_EVENT_EN_INT_R::new((self.bits & 1) != 0) + pub fn wakeup_event_en_int(&self) -> WakeupEventEnIntR { + WakeupEventEnIntR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wakeup Event Enable On SD Card Insertion"] #[inline(always)] - pub fn wakeup_event_en_ins(&self) -> WAKEUP_EVENT_EN_INS_R { - WAKEUP_EVENT_EN_INS_R::new(((self.bits >> 1) & 1) != 0) + pub fn wakeup_event_en_ins(&self) -> WakeupEventEnInsR { + WakeupEventEnInsR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Wakeup Event Enable On SD Card Removal"] #[inline(always)] - pub fn wakeup_event_en_rem(&self) -> WAKEUP_EVENT_EN_REM_R { - WAKEUP_EVENT_EN_REM_R::new(((self.bits >> 2) & 1) != 0) + pub fn wakeup_event_en_rem(&self) -> WakeupEventEnRemR { + WakeupEventEnRemR::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Wakeup Event Enable On Card Interrupt"] #[inline(always)] #[must_use] - pub fn wakeup_event_en_int(&mut self) -> WAKEUP_EVENT_EN_INT_W { - WAKEUP_EVENT_EN_INT_W::new(self, 0) + pub fn wakeup_event_en_int(&mut self) -> WakeupEventEnIntW { + WakeupEventEnIntW::new(self, 0) } #[doc = "Bit 1 - Wakeup Event Enable On SD Card Insertion"] #[inline(always)] #[must_use] - pub fn wakeup_event_en_ins(&mut self) -> WAKEUP_EVENT_EN_INS_W { - WAKEUP_EVENT_EN_INS_W::new(self, 1) + pub fn wakeup_event_en_ins(&mut self) -> WakeupEventEnInsW { + WakeupEventEnInsW::new(self, 1) } #[doc = "Bit 2 - Wakeup Event Enable On SD Card Removal"] #[inline(always)] #[must_use] - pub fn wakeup_event_en_rem(&mut self) -> WAKEUP_EVENT_EN_REM_W { - WAKEUP_EVENT_EN_REM_W::new(self, 2) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { - self.bits = bits; - self + pub fn wakeup_event_en_rem(&mut self) -> WakeupEventEnRemW { + WakeupEventEnRemW::new(self, 2) } } #[doc = "Wake-up Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wakeup_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wakeup_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WAKEUP_CTRL_SPEC; -impl crate::RegisterSpec for WAKEUP_CTRL_SPEC { +pub struct WakeupCtrlSpec; +impl crate::RegisterSpec for WakeupCtrlSpec { type Ux = u8; } #[doc = "`read()` method returns [`wakeup_ctrl::R`](R) reader structure"] -impl crate::Readable for WAKEUP_CTRL_SPEC {} +impl crate::Readable for WakeupCtrlSpec {} #[doc = "`write(|w| ..)` method takes [`wakeup_ctrl::W`](W) writer structure"] -impl crate::Writable for WAKEUP_CTRL_SPEC { +impl crate::Writable for WakeupCtrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0; } #[doc = "`reset()` method sets WAKEUP_CTRL to value 0"] -impl crate::Resettable for WAKEUP_CTRL_SPEC { +impl crate::Resettable for WakeupCtrlSpec { const RESET_VALUE: u8 = 0; } diff --git a/src/sdmmc_con.rs b/src/sdmmc_con.rs index 954f8c4b..26acd6e8 100644 --- a/src/sdmmc_con.rs +++ b/src/sdmmc_con.rs @@ -1,17 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - sdmmc_con: SDMMC_CON, + sdmmc_con: SdmmcCon, } impl RegisterBlock { #[doc = "0x00 - SDMMC Configuration"] #[inline(always)] - pub const fn sdmmc_con(&self) -> &SDMMC_CON { + pub const fn sdmmc_con(&self) -> &SdmmcCon { &self.sdmmc_con } } #[doc = "SDMMC_CON (rw) register accessor: SDMMC Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdmmc_con::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdmmc_con::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdmmc_con`] module"] -pub type SDMMC_CON = crate::Reg; +#[doc(alias = "SDMMC_CON")] +pub type SdmmcCon = crate::Reg; #[doc = "SDMMC Configuration"] pub mod sdmmc_con; diff --git a/src/sdmmc_con/sdmmc_con.rs b/src/sdmmc_con/sdmmc_con.rs index 79e74e6a..806ec204 100644 --- a/src/sdmmc_con/sdmmc_con.rs +++ b/src/sdmmc_con/sdmmc_con.rs @@ -1,290 +1,281 @@ #[doc = "Register `SDMMC_CON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDMMC_CON` writer"] -pub type W = crate::W; -#[doc = "Field `WPSEL` reader - SDMMC Write Protection Input Multiplexer Control"] -pub type WPSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "SDMMC Write Protection Input Multiplexer Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPSEL_A { +pub enum Wpsel { #[doc = "0: P1.1 input pin selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software bit WPVAL is selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPSEL_A) -> Self { + fn from(variant: Wpsel) -> Self { variant as u8 != 0 } } -impl WPSEL_R { +#[doc = "Field `WPSEL` reader - SDMMC Write Protection Input Multiplexer Control"] +pub type WpselR = crate::BitReader; +impl WpselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPSEL_A { + pub const fn variant(&self) -> Wpsel { match self.bits { - false => WPSEL_A::VALUE1, - true => WPSEL_A::VALUE2, + false => Wpsel::Value1, + true => Wpsel::Value2, } } #[doc = "P1.1 input pin selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPSEL_A::VALUE1 + *self == Wpsel::Value1 } #[doc = "Software bit WPVAL is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPSEL_A::VALUE2 + *self == Wpsel::Value2 } } #[doc = "Field `WPSEL` writer - SDMMC Write Protection Input Multiplexer Control"] -pub type WPSEL_W<'a, REG> = crate::BitWriter<'a, REG, WPSEL_A>; -impl<'a, REG> WPSEL_W<'a, REG> +pub type WpselW<'a, REG> = crate::BitWriter<'a, REG, Wpsel>; +impl<'a, REG> WpselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "P1.1 input pin selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPSEL_A::VALUE1) + self.variant(Wpsel::Value1) } #[doc = "Software bit WPVAL is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPSEL_A::VALUE2) + self.variant(Wpsel::Value2) } } -#[doc = "Field `WPSVAL` reader - SDMMC Write Protect Software Control"] -pub type WPSVAL_R = crate::BitReader; #[doc = "SDMMC Write Protect Software Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WPSVAL_A { +pub enum Wpsval { #[doc = "0: No write protection"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Write protection active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WPSVAL_A) -> Self { + fn from(variant: Wpsval) -> Self { variant as u8 != 0 } } -impl WPSVAL_R { +#[doc = "Field `WPSVAL` reader - SDMMC Write Protect Software Control"] +pub type WpsvalR = crate::BitReader; +impl WpsvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WPSVAL_A { + pub const fn variant(&self) -> Wpsval { match self.bits { - false => WPSVAL_A::VALUE1, - true => WPSVAL_A::VALUE2, + false => Wpsval::Value1, + true => Wpsval::Value2, } } #[doc = "No write protection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WPSVAL_A::VALUE1 + *self == Wpsval::Value1 } #[doc = "Write protection active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WPSVAL_A::VALUE2 + *self == Wpsval::Value2 } } #[doc = "Field `WPSVAL` writer - SDMMC Write Protect Software Control"] -pub type WPSVAL_W<'a, REG> = crate::BitWriter<'a, REG, WPSVAL_A>; -impl<'a, REG> WPSVAL_W<'a, REG> +pub type WpsvalW<'a, REG> = crate::BitWriter<'a, REG, Wpsval>; +impl<'a, REG> WpsvalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write protection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WPSVAL_A::VALUE1) + self.variant(Wpsval::Value1) } #[doc = "Write protection active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WPSVAL_A::VALUE2) + self.variant(Wpsval::Value2) } } -#[doc = "Field `CDSEL` reader - SDMMC Card Detection Control"] -pub type CDSEL_R = crate::BitReader; #[doc = "SDMMC Card Detection Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDSEL_A { +pub enum Cdsel { #[doc = "0: P1.10 input pin selected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Software bit CDSVAL is selected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDSEL_A) -> Self { + fn from(variant: Cdsel) -> Self { variant as u8 != 0 } } -impl CDSEL_R { +#[doc = "Field `CDSEL` reader - SDMMC Card Detection Control"] +pub type CdselR = crate::BitReader; +impl CdselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDSEL_A { + pub const fn variant(&self) -> Cdsel { match self.bits { - false => CDSEL_A::VALUE1, - true => CDSEL_A::VALUE2, + false => Cdsel::Value1, + true => Cdsel::Value2, } } #[doc = "P1.10 input pin selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDSEL_A::VALUE1 + *self == Cdsel::Value1 } #[doc = "Software bit CDSVAL is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDSEL_A::VALUE2 + *self == Cdsel::Value2 } } #[doc = "Field `CDSEL` writer - SDMMC Card Detection Control"] -pub type CDSEL_W<'a, REG> = crate::BitWriter<'a, REG, CDSEL_A>; -impl<'a, REG> CDSEL_W<'a, REG> +pub type CdselW<'a, REG> = crate::BitWriter<'a, REG, Cdsel>; +impl<'a, REG> CdselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "P1.10 input pin selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE1) + self.variant(Cdsel::Value1) } #[doc = "Software bit CDSVAL is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE2) + self.variant(Cdsel::Value2) } } -#[doc = "Field `CDSVAL` reader - SDMMC Write Protect Software Control"] -pub type CDSVAL_R = crate::BitReader; #[doc = "SDMMC Write Protect Software Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDSVAL_A { +pub enum Cdsval { #[doc = "0: No card detected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Card detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDSVAL_A) -> Self { + fn from(variant: Cdsval) -> Self { variant as u8 != 0 } } -impl CDSVAL_R { +#[doc = "Field `CDSVAL` reader - SDMMC Write Protect Software Control"] +pub type CdsvalR = crate::BitReader; +impl CdsvalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDSVAL_A { + pub const fn variant(&self) -> Cdsval { match self.bits { - false => CDSVAL_A::VALUE1, - true => CDSVAL_A::VALUE2, + false => Cdsval::Value1, + true => Cdsval::Value2, } } #[doc = "No card detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDSVAL_A::VALUE1 + *self == Cdsval::Value1 } #[doc = "Card detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDSVAL_A::VALUE2 + *self == Cdsval::Value2 } } #[doc = "Field `CDSVAL` writer - SDMMC Write Protect Software Control"] -pub type CDSVAL_W<'a, REG> = crate::BitWriter<'a, REG, CDSVAL_A>; -impl<'a, REG> CDSVAL_W<'a, REG> +pub type CdsvalW<'a, REG> = crate::BitWriter<'a, REG, Cdsval>; +impl<'a, REG> CdsvalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No card detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDSVAL_A::VALUE1) + self.variant(Cdsval::Value1) } #[doc = "Card detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDSVAL_A::VALUE2) + self.variant(Cdsval::Value2) } } impl R { #[doc = "Bit 0 - SDMMC Write Protection Input Multiplexer Control"] #[inline(always)] - pub fn wpsel(&self) -> WPSEL_R { - WPSEL_R::new((self.bits & 1) != 0) + pub fn wpsel(&self) -> WpselR { + WpselR::new((self.bits & 1) != 0) } #[doc = "Bit 4 - SDMMC Write Protect Software Control"] #[inline(always)] - pub fn wpsval(&self) -> WPSVAL_R { - WPSVAL_R::new(((self.bits >> 4) & 1) != 0) + pub fn wpsval(&self) -> WpsvalR { + WpsvalR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 16 - SDMMC Card Detection Control"] #[inline(always)] - pub fn cdsel(&self) -> CDSEL_R { - CDSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn cdsel(&self) -> CdselR { + CdselR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - SDMMC Write Protect Software Control"] #[inline(always)] - pub fn cdsval(&self) -> CDSVAL_R { - CDSVAL_R::new(((self.bits >> 20) & 1) != 0) + pub fn cdsval(&self) -> CdsvalR { + CdsvalR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - SDMMC Write Protection Input Multiplexer Control"] #[inline(always)] #[must_use] - pub fn wpsel(&mut self) -> WPSEL_W { - WPSEL_W::new(self, 0) + pub fn wpsel(&mut self) -> WpselW { + WpselW::new(self, 0) } #[doc = "Bit 4 - SDMMC Write Protect Software Control"] #[inline(always)] #[must_use] - pub fn wpsval(&mut self) -> WPSVAL_W { - WPSVAL_W::new(self, 4) + pub fn wpsval(&mut self) -> WpsvalW { + WpsvalW::new(self, 4) } #[doc = "Bit 16 - SDMMC Card Detection Control"] #[inline(always)] #[must_use] - pub fn cdsel(&mut self) -> CDSEL_W { - CDSEL_W::new(self, 16) + pub fn cdsel(&mut self) -> CdselW { + CdselW::new(self, 16) } #[doc = "Bit 20 - SDMMC Write Protect Software Control"] #[inline(always)] #[must_use] - pub fn cdsval(&mut self) -> CDSVAL_W { - CDSVAL_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cdsval(&mut self) -> CdsvalW { + CdsvalW::new(self, 20) } } #[doc = "SDMMC Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdmmc_con::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdmmc_con::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SDMMC_CON_SPEC; -impl crate::RegisterSpec for SDMMC_CON_SPEC { +pub struct SdmmcConSpec; +impl crate::RegisterSpec for SdmmcConSpec { type Ux = u32; } #[doc = "`read()` method returns [`sdmmc_con::R`](R) reader structure"] -impl crate::Readable for SDMMC_CON_SPEC {} +impl crate::Readable for SdmmcConSpec {} #[doc = "`write(|w| ..)` method takes [`sdmmc_con::W`](W) writer structure"] -impl crate::Writable for SDMMC_CON_SPEC { +impl crate::Writable for SdmmcConSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDMMC_CON to value 0"] -impl crate::Resettable for SDMMC_CON_SPEC { +impl crate::Resettable for SdmmcConSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0.rs b/src/usb0.rs index 3e45e3b4..bab901a1 100644 --- a/src/usb0.rs +++ b/src/usb0.rs @@ -1,507 +1,552 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - gotgctl: GOTGCTL, - gotgint: GOTGINT, - gahbcfg: GAHBCFG, - gusbcfg: GUSBCFG, - grstctl: GRSTCTL, + gotgctl: Gotgctl, + gotgint: Gotgint, + gahbcfg: Gahbcfg, + gusbcfg: Gusbcfg, + grstctl: Grstctl, _reserved_5_gintsts: [u8; 0x04], _reserved_6_gintmsk: [u8; 0x04], _reserved_7_grxstsr: [u8; 0x04], _reserved_8_grxstsp: [u8; 0x04], - grxfsiz: GRXFSIZ, + grxfsiz: Grxfsiz, _reserved_10_gnptxfsiz: [u8; 0x04], - gnptxsts: GNPTXSTS, + gnptxsts: Gnptxsts, _reserved12: [u8; 0x0c], - guid: GUID, + guid: Guid, _reserved13: [u8; 0x1c], - gdfifocfg: GDFIFOCFG, + gdfifocfg: Gdfifocfg, _reserved14: [u8; 0xa0], - hptxfsiz: HPTXFSIZ, - dieptxf1: DIEPTXF1, - dieptxf2: DIEPTXF2, - dieptxf3: DIEPTXF3, - dieptxf4: DIEPTXF4, - dieptxf5: DIEPTXF5, - dieptxf6: DIEPTXF6, + hptxfsiz: Hptxfsiz, + dieptxf1: Dieptxf1, + dieptxf2: Dieptxf2, + dieptxf3: Dieptxf3, + dieptxf4: Dieptxf4, + dieptxf5: Dieptxf5, + dieptxf6: Dieptxf6, _reserved21: [u8; 0x02e4], - hcfg: HCFG, - hfir: HFIR, - hfnum: HFNUM, + hcfg: Hcfg, + hfir: Hfir, + hfnum: Hfnum, _reserved24: [u8; 0x04], - hptxsts: HPTXSTS, - haint: HAINT, - haintmsk: HAINTMSK, - hflbaddr: HFLBADDR, + hptxsts: Hptxsts, + haint: Haint, + haintmsk: Haintmsk, + hflbaddr: Hflbaddr, _reserved28: [u8; 0x20], - hprt: HPRT, + hprt: Hprt, _reserved29: [u8; 0x03bc], - dcfg: DCFG, - dctl: DCTL, - dsts: DSTS, + dcfg: Dcfg, + dctl: Dctl, + dsts: Dsts, _reserved32: [u8; 0x04], - diepmsk: DIEPMSK, - doepmsk: DOEPMSK, - daint: DAINT, - daintmsk: DAINTMSK, + diepmsk: Diepmsk, + doepmsk: Doepmsk, + daint: Daint, + daintmsk: Daintmsk, _reserved36: [u8; 0x08], - dvbusdis: DVBUSDIS, - dvbuspulse: DVBUSPULSE, + dvbusdis: Dvbusdis, + dvbuspulse: Dvbuspulse, _reserved38: [u8; 0x04], - diepempmsk: DIEPEMPMSK, + diepempmsk: Diepempmsk, _reserved39: [u8; 0x05c8], - pcgcctl: PCGCCTL, + pcgcctl: Pcgcctl, } impl RegisterBlock { #[doc = "0x00 - Control and Status Register"] #[inline(always)] - pub const fn gotgctl(&self) -> &GOTGCTL { + pub const fn gotgctl(&self) -> &Gotgctl { &self.gotgctl } #[doc = "0x04 - OTG Interrupt Register"] #[inline(always)] - pub const fn gotgint(&self) -> &GOTGINT { + pub const fn gotgint(&self) -> &Gotgint { &self.gotgint } #[doc = "0x08 - AHB Configuration Register"] #[inline(always)] - pub const fn gahbcfg(&self) -> &GAHBCFG { + pub const fn gahbcfg(&self) -> &Gahbcfg { &self.gahbcfg } #[doc = "0x0c - USB Configuration Register"] #[inline(always)] - pub const fn gusbcfg(&self) -> &GUSBCFG { + pub const fn gusbcfg(&self) -> &Gusbcfg { &self.gusbcfg } #[doc = "0x10 - Reset Register"] #[inline(always)] - pub const fn grstctl(&self) -> &GRSTCTL { + pub const fn grstctl(&self) -> &Grstctl { &self.grstctl } #[doc = "0x14 - Interrupt Register \\[DEVICEMODE\\]"] #[inline(always)] - pub const fn gintsts_devicemode(&self) -> &GINTSTS_DEVICEMODE { + pub const fn gintsts_devicemode(&self) -> &GintstsDevicemode { unsafe { &*(self as *const Self).cast::().add(20).cast() } } #[doc = "0x14 - Interrupt Register \\[HOSTMODE\\]"] #[inline(always)] - pub const fn gintsts_hostmode(&self) -> &GINTSTS_HOSTMODE { + pub const fn gintsts_hostmode(&self) -> &GintstsHostmode { unsafe { &*(self as *const Self).cast::().add(20).cast() } } #[doc = "0x18 - Interrupt Mask Register \\[DEVICEMODE\\]"] #[inline(always)] - pub const fn gintmsk_devicemode(&self) -> &GINTMSK_DEVICEMODE { + pub const fn gintmsk_devicemode(&self) -> &GintmskDevicemode { unsafe { &*(self as *const Self).cast::().add(24).cast() } } #[doc = "0x18 - Interrupt Mask Register \\[HOSTMODE\\]"] #[inline(always)] - pub const fn gintmsk_hostmode(&self) -> &GINTMSK_HOSTMODE { + pub const fn gintmsk_hostmode(&self) -> &GintmskHostmode { unsafe { &*(self as *const Self).cast::().add(24).cast() } } #[doc = "0x1c - Receive Status Debug Read Register \\[DEVICEMODE\\]"] #[inline(always)] - pub const fn grxstsr_devicemode(&self) -> &GRXSTSR_DEVICEMODE { + pub const fn grxstsr_devicemode(&self) -> &GrxstsrDevicemode { unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - Receive Status Debug Read Register \\[HOSTMODE\\]"] #[inline(always)] - pub const fn grxstsr_hostmode(&self) -> &GRXSTSR_HOSTMODE { + pub const fn grxstsr_hostmode(&self) -> &GrxstsrHostmode { unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x20 - Receive Status Read and Pop Register \\[HOSTMODE\\]"] #[inline(always)] - pub const fn grxstsp_hostmode(&self) -> &GRXSTSP_HOSTMODE { + pub const fn grxstsp_hostmode(&self) -> &GrxstspHostmode { unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x20 - Receive Status Read and Pop Register \\[DEVICEMODE\\]"] #[inline(always)] - pub const fn grxstsp_devicemode(&self) -> &GRXSTSP_DEVICEMODE { + pub const fn grxstsp_devicemode(&self) -> &GrxstspDevicemode { unsafe { &*(self as *const Self).cast::().add(32).cast() } } #[doc = "0x24 - Receive FIFO Size Register"] #[inline(always)] - pub const fn grxfsiz(&self) -> &GRXFSIZ { + pub const fn grxfsiz(&self) -> &Grxfsiz { &self.grxfsiz } #[doc = "0x28 - Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]"] #[inline(always)] - pub const fn gnptxfsiz_devicemode(&self) -> &GNPTXFSIZ_DEVICEMODE { + pub const fn gnptxfsiz_devicemode(&self) -> &GnptxfsizDevicemode { unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x28 - Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]"] #[inline(always)] - pub const fn gnptxfsiz_hostmode(&self) -> &GNPTXFSIZ_HOSTMODE { + pub const fn gnptxfsiz_hostmode(&self) -> &GnptxfsizHostmode { unsafe { &*(self as *const Self).cast::().add(40).cast() } } #[doc = "0x2c - Non-Periodic Transmit FIFO/Queue Status Register"] #[inline(always)] - pub const fn gnptxsts(&self) -> &GNPTXSTS { + pub const fn gnptxsts(&self) -> &Gnptxsts { &self.gnptxsts } #[doc = "0x3c - USB Module Identification Register"] #[inline(always)] - pub const fn guid(&self) -> &GUID { + pub const fn guid(&self) -> &Guid { &self.guid } #[doc = "0x5c - Global DFIFO Software Config Register"] #[inline(always)] - pub const fn gdfifocfg(&self) -> &GDFIFOCFG { + pub const fn gdfifocfg(&self) -> &Gdfifocfg { &self.gdfifocfg } #[doc = "0x100 - Host Periodic Transmit FIFO Size Register"] #[inline(always)] - pub const fn hptxfsiz(&self) -> &HPTXFSIZ { + pub const fn hptxfsiz(&self) -> &Hptxfsiz { &self.hptxfsiz } #[doc = "0x104 - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf1(&self) -> &DIEPTXF1 { + pub const fn dieptxf1(&self) -> &Dieptxf1 { &self.dieptxf1 } #[doc = "0x108 - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf2(&self) -> &DIEPTXF2 { + pub const fn dieptxf2(&self) -> &Dieptxf2 { &self.dieptxf2 } #[doc = "0x10c - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf3(&self) -> &DIEPTXF3 { + pub const fn dieptxf3(&self) -> &Dieptxf3 { &self.dieptxf3 } #[doc = "0x110 - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf4(&self) -> &DIEPTXF4 { + pub const fn dieptxf4(&self) -> &Dieptxf4 { &self.dieptxf4 } #[doc = "0x114 - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf5(&self) -> &DIEPTXF5 { + pub const fn dieptxf5(&self) -> &Dieptxf5 { &self.dieptxf5 } #[doc = "0x118 - Device IN Endpoint Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf6(&self) -> &DIEPTXF6 { + pub const fn dieptxf6(&self) -> &Dieptxf6 { &self.dieptxf6 } #[doc = "0x400 - Host Configuration Register"] #[inline(always)] - pub const fn hcfg(&self) -> &HCFG { + pub const fn hcfg(&self) -> &Hcfg { &self.hcfg } #[doc = "0x404 - Host Frame Interval Register"] #[inline(always)] - pub const fn hfir(&self) -> &HFIR { + pub const fn hfir(&self) -> &Hfir { &self.hfir } #[doc = "0x408 - Host Frame Number/Frame Time Remaining Register"] #[inline(always)] - pub const fn hfnum(&self) -> &HFNUM { + pub const fn hfnum(&self) -> &Hfnum { &self.hfnum } #[doc = "0x410 - Host Periodic Transmit FIFO/ Queue Status Register"] #[inline(always)] - pub const fn hptxsts(&self) -> &HPTXSTS { + pub const fn hptxsts(&self) -> &Hptxsts { &self.hptxsts } #[doc = "0x414 - Host All Channels Interrupt Register"] #[inline(always)] - pub const fn haint(&self) -> &HAINT { + pub const fn haint(&self) -> &Haint { &self.haint } #[doc = "0x418 - Host All Channels Interrupt Mask Register"] #[inline(always)] - pub const fn haintmsk(&self) -> &HAINTMSK { + pub const fn haintmsk(&self) -> &Haintmsk { &self.haintmsk } #[doc = "0x41c - Host Frame List Base Address Register"] #[inline(always)] - pub const fn hflbaddr(&self) -> &HFLBADDR { + pub const fn hflbaddr(&self) -> &Hflbaddr { &self.hflbaddr } #[doc = "0x440 - Host Port Control and Status Register"] #[inline(always)] - pub const fn hprt(&self) -> &HPRT { + pub const fn hprt(&self) -> &Hprt { &self.hprt } #[doc = "0x800 - Device Configuration Register"] #[inline(always)] - pub const fn dcfg(&self) -> &DCFG { + pub const fn dcfg(&self) -> &Dcfg { &self.dcfg } #[doc = "0x804 - Device Control Register"] #[inline(always)] - pub const fn dctl(&self) -> &DCTL { + pub const fn dctl(&self) -> &Dctl { &self.dctl } #[doc = "0x808 - Device Status Register"] #[inline(always)] - pub const fn dsts(&self) -> &DSTS { + pub const fn dsts(&self) -> &Dsts { &self.dsts } #[doc = "0x810 - Device IN Endpoint Common Interrupt Mask Register"] #[inline(always)] - pub const fn diepmsk(&self) -> &DIEPMSK { + pub const fn diepmsk(&self) -> &Diepmsk { &self.diepmsk } #[doc = "0x814 - Device OUT Endpoint Common Interrupt Mask Register"] #[inline(always)] - pub const fn doepmsk(&self) -> &DOEPMSK { + pub const fn doepmsk(&self) -> &Doepmsk { &self.doepmsk } #[doc = "0x818 - Device All Endpoints Interrupt Register"] #[inline(always)] - pub const fn daint(&self) -> &DAINT { + pub const fn daint(&self) -> &Daint { &self.daint } #[doc = "0x81c - Device All Endpoints Interrupt Mask Register"] #[inline(always)] - pub const fn daintmsk(&self) -> &DAINTMSK { + pub const fn daintmsk(&self) -> &Daintmsk { &self.daintmsk } #[doc = "0x828 - Device VBUS Discharge Time Register"] #[inline(always)] - pub const fn dvbusdis(&self) -> &DVBUSDIS { + pub const fn dvbusdis(&self) -> &Dvbusdis { &self.dvbusdis } #[doc = "0x82c - Device VBUS Pulsing Time Register"] #[inline(always)] - pub const fn dvbuspulse(&self) -> &DVBUSPULSE { + pub const fn dvbuspulse(&self) -> &Dvbuspulse { &self.dvbuspulse } #[doc = "0x834 - Device IN Endpoint FIFO Empty Interrupt Mask Register"] #[inline(always)] - pub const fn diepempmsk(&self) -> &DIEPEMPMSK { + pub const fn diepempmsk(&self) -> &Diepempmsk { &self.diepempmsk } #[doc = "0xe00 - Power and Clock Gating Control Register"] #[inline(always)] - pub const fn pcgcctl(&self) -> &PCGCCTL { + pub const fn pcgcctl(&self) -> &Pcgcctl { &self.pcgcctl } } #[doc = "GOTGCTL (rw) register accessor: Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgctl`] module"] -pub type GOTGCTL = crate::Reg; +#[doc(alias = "GOTGCTL")] +pub type Gotgctl = crate::Reg; #[doc = "Control and Status Register"] pub mod gotgctl; #[doc = "GOTGINT (rw) register accessor: OTG Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gotgint`] module"] -pub type GOTGINT = crate::Reg; +#[doc(alias = "GOTGINT")] +pub type Gotgint = crate::Reg; #[doc = "OTG Interrupt Register"] pub mod gotgint; #[doc = "GAHBCFG (rw) register accessor: AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gahbcfg`] module"] -pub type GAHBCFG = crate::Reg; +#[doc(alias = "GAHBCFG")] +pub type Gahbcfg = crate::Reg; #[doc = "AHB Configuration Register"] pub mod gahbcfg; #[doc = "GUSBCFG (rw) register accessor: USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gusbcfg`] module"] -pub type GUSBCFG = crate::Reg; +#[doc(alias = "GUSBCFG")] +pub type Gusbcfg = crate::Reg; #[doc = "USB Configuration Register"] pub mod gusbcfg; #[doc = "GRSTCTL (rw) register accessor: Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grstctl`] module"] -pub type GRSTCTL = crate::Reg; +#[doc(alias = "GRSTCTL")] +pub type Grstctl = crate::Reg; #[doc = "Reset Register"] pub mod grstctl; #[doc = "GINTSTS_HOSTMODE (rw) register accessor: Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_hostmode`] module"] -pub type GINTSTS_HOSTMODE = crate::Reg; +#[doc(alias = "GINTSTS_HOSTMODE")] +pub type GintstsHostmode = crate::Reg; #[doc = "Interrupt Register \\[HOSTMODE\\]"] pub mod gintsts_hostmode; #[doc = "GINTSTS_DEVICEMODE (rw) register accessor: Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts_devicemode`] module"] -pub type GINTSTS_DEVICEMODE = crate::Reg; +#[doc(alias = "GINTSTS_DEVICEMODE")] +pub type GintstsDevicemode = crate::Reg; #[doc = "Interrupt Register \\[DEVICEMODE\\]"] pub mod gintsts_devicemode; #[doc = "GINTMSK_HOSTMODE (rw) register accessor: Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_hostmode`] module"] -pub type GINTMSK_HOSTMODE = crate::Reg; +#[doc(alias = "GINTMSK_HOSTMODE")] +pub type GintmskHostmode = crate::Reg; #[doc = "Interrupt Mask Register \\[HOSTMODE\\]"] pub mod gintmsk_hostmode; #[doc = "GINTMSK_DEVICEMODE (rw) register accessor: Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk_devicemode`] module"] -pub type GINTMSK_DEVICEMODE = crate::Reg; +#[doc(alias = "GINTMSK_DEVICEMODE")] +pub type GintmskDevicemode = crate::Reg; #[doc = "Interrupt Mask Register \\[DEVICEMODE\\]"] pub mod gintmsk_devicemode; #[doc = "GRXSTSR_HOSTMODE (r) register accessor: Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_hostmode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_hostmode`] module"] -pub type GRXSTSR_HOSTMODE = crate::Reg; +#[doc(alias = "GRXSTSR_HOSTMODE")] +pub type GrxstsrHostmode = crate::Reg; #[doc = "Receive Status Debug Read Register \\[HOSTMODE\\]"] pub mod grxstsr_hostmode; #[doc = "GRXSTSR_DEVICEMODE (r) register accessor: Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_devicemode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr_devicemode`] module"] -pub type GRXSTSR_DEVICEMODE = crate::Reg; +#[doc(alias = "GRXSTSR_DEVICEMODE")] +pub type GrxstsrDevicemode = crate::Reg; #[doc = "Receive Status Debug Read Register \\[DEVICEMODE\\]"] pub mod grxstsr_devicemode; #[doc = "GRXSTSP_DEVICEMODE (r) register accessor: Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_devicemode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsp_devicemode`] module"] -pub type GRXSTSP_DEVICEMODE = crate::Reg; +#[doc(alias = "GRXSTSP_DEVICEMODE")] +pub type GrxstspDevicemode = crate::Reg; #[doc = "Receive Status Read and Pop Register \\[DEVICEMODE\\]"] pub mod grxstsp_devicemode; #[doc = "GRXSTSP_HOSTMODE (r) register accessor: Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_hostmode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsp_hostmode`] module"] -pub type GRXSTSP_HOSTMODE = crate::Reg; +#[doc(alias = "GRXSTSP_HOSTMODE")] +pub type GrxstspHostmode = crate::Reg; #[doc = "Receive Status Read and Pop Register \\[HOSTMODE\\]"] pub mod grxstsp_hostmode; #[doc = "GRXFSIZ (rw) register accessor: Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxfsiz`] module"] -pub type GRXFSIZ = crate::Reg; +#[doc(alias = "GRXFSIZ")] +pub type Grxfsiz = crate::Reg; #[doc = "Receive FIFO Size Register"] pub mod grxfsiz; #[doc = "GNPTXFSIZ_HOSTMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_hostmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_hostmode`] module"] -pub type GNPTXFSIZ_HOSTMODE = crate::Reg; +#[doc(alias = "GNPTXFSIZ_HOSTMODE")] +pub type GnptxfsizHostmode = crate::Reg; #[doc = "Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]"] pub mod gnptxfsiz_hostmode; #[doc = "GNPTXFSIZ_DEVICEMODE (rw) register accessor: Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_devicemode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz_devicemode`] module"] -pub type GNPTXFSIZ_DEVICEMODE = crate::Reg; +#[doc(alias = "GNPTXFSIZ_DEVICEMODE")] +pub type GnptxfsizDevicemode = crate::Reg; #[doc = "Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]"] pub mod gnptxfsiz_devicemode; #[doc = "GNPTXSTS (r) register accessor: Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxsts`] module"] -pub type GNPTXSTS = crate::Reg; +#[doc(alias = "GNPTXSTS")] +pub type Gnptxsts = crate::Reg; #[doc = "Non-Periodic Transmit FIFO/Queue Status Register"] pub mod gnptxsts; #[doc = "GUID (rw) register accessor: USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@guid`] module"] -pub type GUID = crate::Reg; +#[doc(alias = "GUID")] +pub type Guid = crate::Reg; #[doc = "USB Module Identification Register"] pub mod guid; #[doc = "GDFIFOCFG (rw) register accessor: Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdfifocfg`] module"] -pub type GDFIFOCFG = crate::Reg; +#[doc(alias = "GDFIFOCFG")] +pub type Gdfifocfg = crate::Reg; #[doc = "Global DFIFO Software Config Register"] pub mod gdfifocfg; #[doc = "HPTXFSIZ (rw) register accessor: Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxfsiz`] module"] -pub type HPTXFSIZ = crate::Reg; +#[doc(alias = "HPTXFSIZ")] +pub type Hptxfsiz = crate::Reg; #[doc = "Host Periodic Transmit FIFO Size Register"] pub mod hptxfsiz; #[doc = "DIEPTXF1 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf1`] module"] -pub type DIEPTXF1 = crate::Reg; +#[doc(alias = "DIEPTXF1")] +pub type Dieptxf1 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf1; #[doc = "DIEPTXF2 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf2`] module"] -pub type DIEPTXF2 = crate::Reg; +#[doc(alias = "DIEPTXF2")] +pub type Dieptxf2 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf2; #[doc = "DIEPTXF3 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf3`] module"] -pub type DIEPTXF3 = crate::Reg; +#[doc(alias = "DIEPTXF3")] +pub type Dieptxf3 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf3; #[doc = "DIEPTXF4 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf4`] module"] -pub type DIEPTXF4 = crate::Reg; +#[doc(alias = "DIEPTXF4")] +pub type Dieptxf4 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf4; #[doc = "DIEPTXF5 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf5`] module"] -pub type DIEPTXF5 = crate::Reg; +#[doc(alias = "DIEPTXF5")] +pub type Dieptxf5 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf5; #[doc = "DIEPTXF6 (rw) register accessor: Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf6`] module"] -pub type DIEPTXF6 = crate::Reg; +#[doc(alias = "DIEPTXF6")] +pub type Dieptxf6 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Size Register"] pub mod dieptxf6; #[doc = "HCFG (rw) register accessor: Host Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcfg`] module"] -pub type HCFG = crate::Reg; +#[doc(alias = "HCFG")] +pub type Hcfg = crate::Reg; #[doc = "Host Configuration Register"] pub mod hcfg; #[doc = "HFIR (rw) register accessor: Host Frame Interval Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfir::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfir::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfir`] module"] -pub type HFIR = crate::Reg; +#[doc(alias = "HFIR")] +pub type Hfir = crate::Reg; #[doc = "Host Frame Interval Register"] pub mod hfir; #[doc = "HFNUM (rw) register accessor: Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfnum::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfnum`] module"] -pub type HFNUM = crate::Reg; +#[doc(alias = "HFNUM")] +pub type Hfnum = crate::Reg; #[doc = "Host Frame Number/Frame Time Remaining Register"] pub mod hfnum; #[doc = "HPTXSTS (rw) register accessor: Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxsts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxsts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hptxsts`] module"] -pub type HPTXSTS = crate::Reg; +#[doc(alias = "HPTXSTS")] +pub type Hptxsts = crate::Reg; #[doc = "Host Periodic Transmit FIFO/ Queue Status Register"] pub mod hptxsts; #[doc = "HAINT (r) register accessor: Host All Channels Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haint`] module"] -pub type HAINT = crate::Reg; +#[doc(alias = "HAINT")] +pub type Haint = crate::Reg; #[doc = "Host All Channels Interrupt Register"] pub mod haint; #[doc = "HAINTMSK (rw) register accessor: Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`haintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@haintmsk`] module"] -pub type HAINTMSK = crate::Reg; +#[doc(alias = "HAINTMSK")] +pub type Haintmsk = crate::Reg; #[doc = "Host All Channels Interrupt Mask Register"] pub mod haintmsk; #[doc = "HFLBADDR (rw) register accessor: Host Frame List Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hflbaddr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hflbaddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hflbaddr`] module"] -pub type HFLBADDR = crate::Reg; +#[doc(alias = "HFLBADDR")] +pub type Hflbaddr = crate::Reg; #[doc = "Host Frame List Base Address Register"] pub mod hflbaddr; #[doc = "HPRT (rw) register accessor: Host Port Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hprt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hprt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hprt`] module"] -pub type HPRT = crate::Reg; +#[doc(alias = "HPRT")] +pub type Hprt = crate::Reg; #[doc = "Host Port Control and Status Register"] pub mod hprt; #[doc = "DCFG (rw) register accessor: Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] -pub type DCFG = crate::Reg; +#[doc(alias = "DCFG")] +pub type Dcfg = crate::Reg; #[doc = "Device Configuration Register"] pub mod dcfg; #[doc = "DCTL (rw) register accessor: Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dctl`] module"] -pub type DCTL = crate::Reg; +#[doc(alias = "DCTL")] +pub type Dctl = crate::Reg; #[doc = "Device Control Register"] pub mod dctl; #[doc = "DSTS (r) register accessor: Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsts`] module"] -pub type DSTS = crate::Reg; +#[doc(alias = "DSTS")] +pub type Dsts = crate::Reg; #[doc = "Device Status Register"] pub mod dsts; #[doc = "DIEPMSK (rw) register accessor: Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepmsk`] module"] -pub type DIEPMSK = crate::Reg; +#[doc(alias = "DIEPMSK")] +pub type Diepmsk = crate::Reg; #[doc = "Device IN Endpoint Common Interrupt Mask Register"] pub mod diepmsk; #[doc = "DOEPMSK (rw) register accessor: Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepmsk`] module"] -pub type DOEPMSK = crate::Reg; +#[doc(alias = "DOEPMSK")] +pub type Doepmsk = crate::Reg; #[doc = "Device OUT Endpoint Common Interrupt Mask Register"] pub mod doepmsk; #[doc = "DAINT (r) register accessor: Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daint`] module"] -pub type DAINT = crate::Reg; +#[doc(alias = "DAINT")] +pub type Daint = crate::Reg; #[doc = "Device All Endpoints Interrupt Register"] pub mod daint; #[doc = "DAINTMSK (rw) register accessor: Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daintmsk`] module"] -pub type DAINTMSK = crate::Reg; +#[doc(alias = "DAINTMSK")] +pub type Daintmsk = crate::Reg; #[doc = "Device All Endpoints Interrupt Mask Register"] pub mod daintmsk; #[doc = "DVBUSDIS (rw) register accessor: Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbusdis`] module"] -pub type DVBUSDIS = crate::Reg; +#[doc(alias = "DVBUSDIS")] +pub type Dvbusdis = crate::Reg; #[doc = "Device VBUS Discharge Time Register"] pub mod dvbusdis; #[doc = "DVBUSPULSE (rw) register accessor: Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbuspulse`] module"] -pub type DVBUSPULSE = crate::Reg; +#[doc(alias = "DVBUSPULSE")] +pub type Dvbuspulse = crate::Reg; #[doc = "Device VBUS Pulsing Time Register"] pub mod dvbuspulse; #[doc = "DIEPEMPMSK (rw) register accessor: Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepempmsk`] module"] -pub type DIEPEMPMSK = crate::Reg; +#[doc(alias = "DIEPEMPMSK")] +pub type Diepempmsk = crate::Reg; #[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register"] pub mod diepempmsk; #[doc = "PCGCCTL (rw) register accessor: Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] -pub type PCGCCTL = crate::Reg; +#[doc(alias = "PCGCCTL")] +pub type Pcgcctl = crate::Reg; #[doc = "Power and Clock Gating Control Register"] pub mod pcgcctl; diff --git a/src/usb0/daint.rs b/src/usb0/daint.rs index 60bbb06d..510ba933 100644 --- a/src/usb0/daint.rs +++ b/src/usb0/daint.rs @@ -1,29 +1,29 @@ #[doc = "Register `DAINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `InEpInt` reader - IN Endpoint Interrupt Bits"] -pub type IN_EP_INT_R = crate::FieldReader; +pub type InEpIntR = crate::FieldReader; #[doc = "Field `OutEPInt` reader - OUT Endpoint Interrupt Bits"] -pub type OUT_EPINT_R = crate::FieldReader; +pub type OutEpintR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - IN Endpoint Interrupt Bits"] #[inline(always)] - pub fn in_ep_int(&self) -> IN_EP_INT_R { - IN_EP_INT_R::new((self.bits & 0xffff) as u16) + pub fn in_ep_int(&self) -> InEpIntR { + InEpIntR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - OUT Endpoint Interrupt Bits"] #[inline(always)] - pub fn out_epint(&self) -> OUT_EPINT_R { - OUT_EPINT_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn out_epint(&self) -> OutEpintR { + OutEpintR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAINT_SPEC; -impl crate::RegisterSpec for DAINT_SPEC { +pub struct DaintSpec; +impl crate::RegisterSpec for DaintSpec { type Ux = u32; } #[doc = "`read()` method returns [`daint::R`](R) reader structure"] -impl crate::Readable for DAINT_SPEC {} +impl crate::Readable for DaintSpec {} #[doc = "`reset()` method sets DAINT to value 0"] -impl crate::Resettable for DAINT_SPEC { +impl crate::Resettable for DaintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/daintmsk.rs b/src/usb0/daintmsk.rs index 8f5a7fd8..5bc8a1fb 100644 --- a/src/usb0/daintmsk.rs +++ b/src/usb0/daintmsk.rs @@ -1,64 +1,55 @@ #[doc = "Register `DAINTMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAINTMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `InEpMsk` reader - IN EP Interrupt Mask Bits"] -pub type IN_EP_MSK_R = crate::FieldReader; +pub type InEpMskR = crate::FieldReader; #[doc = "Field `InEpMsk` writer - IN EP Interrupt Mask Bits"] -pub type IN_EP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InEpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `OutEpMsk` reader - OUT EP Interrupt Mask Bits"] -pub type OUT_EP_MSK_R = crate::FieldReader; +pub type OutEpMskR = crate::FieldReader; #[doc = "Field `OutEpMsk` writer - OUT EP Interrupt Mask Bits"] -pub type OUT_EP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type OutEpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"] #[inline(always)] - pub fn in_ep_msk(&self) -> IN_EP_MSK_R { - IN_EP_MSK_R::new((self.bits & 0xffff) as u16) + pub fn in_ep_msk(&self) -> InEpMskR { + InEpMskR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"] #[inline(always)] - pub fn out_ep_msk(&self) -> OUT_EP_MSK_R { - OUT_EP_MSK_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn out_ep_msk(&self) -> OutEpMskR { + OutEpMskR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn in_ep_msk(&mut self) -> IN_EP_MSK_W { - IN_EP_MSK_W::new(self, 0) + pub fn in_ep_msk(&mut self) -> InEpMskW { + InEpMskW::new(self, 0) } #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn out_ep_msk(&mut self) -> OUT_EP_MSK_W { - OUT_EP_MSK_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn out_ep_msk(&mut self) -> OutEpMskW { + OutEpMskW::new(self, 16) } } #[doc = "Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DAINTMSK_SPEC; -impl crate::RegisterSpec for DAINTMSK_SPEC { +pub struct DaintmskSpec; +impl crate::RegisterSpec for DaintmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`daintmsk::R`](R) reader structure"] -impl crate::Readable for DAINTMSK_SPEC {} +impl crate::Readable for DaintmskSpec {} #[doc = "`write(|w| ..)` method takes [`daintmsk::W`](W) writer structure"] -impl crate::Writable for DAINTMSK_SPEC { +impl crate::Writable for DaintmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAINTMSK to value 0"] -impl crate::Resettable for DAINTMSK_SPEC { +impl crate::Resettable for DaintmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dcfg.rs b/src/usb0/dcfg.rs index 6dc3e44a..9c2c4380 100644 --- a/src/usb0/dcfg.rs +++ b/src/usb0/dcfg.rs @@ -1,43 +1,43 @@ #[doc = "Register `DCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DCFG` writer"] -pub type W = crate::W; -#[doc = "Field `DevSpd` reader - Device Speed"] -pub type DEV_SPD_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Device Speed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DEV_SPD_A { +pub enum DevSpd { #[doc = "3: Full speed (USB 1.1 transceiver clock is 48 MHz)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DEV_SPD_A) -> Self { + fn from(variant: DevSpd) -> Self { variant as _ } } -impl crate::FieldSpec for DEV_SPD_A { +impl crate::FieldSpec for DevSpd { type Ux = u8; } -impl DEV_SPD_R { +#[doc = "Field `DevSpd` reader - Device Speed"] +pub type DevSpdR = crate::FieldReader; +impl DevSpdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(DEV_SPD_A::VALUE4), + 3 => Some(DevSpd::Value4), _ => None, } } #[doc = "Full speed (USB 1.1 transceiver clock is 48 MHz)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DEV_SPD_A::VALUE4 + *self == DevSpd::Value4 } } #[doc = "Field `DevSpd` writer - Device Speed"] -pub type DEV_SPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DEV_SPD_A>; -impl<'a, REG> DEV_SPD_W<'a, REG> +pub type DevSpdW<'a, REG> = crate::FieldWriter<'a, REG, 2, DevSpd>; +impl<'a, REG> DevSpdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -45,126 +45,126 @@ where #[doc = "Full speed (USB 1.1 transceiver clock is 48 MHz)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DEV_SPD_A::VALUE4) + self.variant(DevSpd::Value4) } } -#[doc = "Field `NZStsOUTHShk` reader - Non-Zero-Length Status OUT Handshake"] -pub type NZSTS_OUTHSHK_R = crate::BitReader; #[doc = "Non-Zero-Length Status OUT Handshake\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NZSTS_OUTHSHK_A { +pub enum NzstsOuthshk { #[doc = "1: Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] - VALUE1 = 1, + Value1 = 1, #[doc = "0: Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] - VALUE2 = 0, + Value2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NZSTS_OUTHSHK_A) -> Self { + fn from(variant: NzstsOuthshk) -> Self { variant as u8 != 0 } } -impl NZSTS_OUTHSHK_R { +#[doc = "Field `NZStsOUTHShk` reader - Non-Zero-Length Status OUT Handshake"] +pub type NzstsOuthshkR = crate::BitReader; +impl NzstsOuthshkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NZSTS_OUTHSHK_A { + pub const fn variant(&self) -> NzstsOuthshk { match self.bits { - true => NZSTS_OUTHSHK_A::VALUE1, - false => NZSTS_OUTHSHK_A::VALUE2, + true => NzstsOuthshk::Value1, + false => NzstsOuthshk::Value2, } } #[doc = "Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NZSTS_OUTHSHK_A::VALUE1 + *self == NzstsOuthshk::Value1 } #[doc = "Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NZSTS_OUTHSHK_A::VALUE2 + *self == NzstsOuthshk::Value2 } } #[doc = "Field `NZStsOUTHShk` writer - Non-Zero-Length Status OUT Handshake"] -pub type NZSTS_OUTHSHK_W<'a, REG> = crate::BitWriter<'a, REG, NZSTS_OUTHSHK_A>; -impl<'a, REG> NZSTS_OUTHSHK_W<'a, REG> +pub type NzstsOuthshkW<'a, REG> = crate::BitWriter<'a, REG, NzstsOuthshk>; +impl<'a, REG> NzstsOuthshkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NZSTS_OUTHSHK_A::VALUE1) + self.variant(NzstsOuthshk::Value1) } #[doc = "Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NZSTS_OUTHSHK_A::VALUE2) + self.variant(NzstsOuthshk::Value2) } } #[doc = "Field `DevAddr` reader - Device Address"] -pub type DEV_ADDR_R = crate::FieldReader; +pub type DevAddrR = crate::FieldReader; #[doc = "Field `DevAddr` writer - Device Address"] -pub type DEV_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; -#[doc = "Field `PerFrInt` reader - Periodic Frame Interval"] -pub type PER_FR_INT_R = crate::FieldReader; +pub type DevAddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Periodic Frame Interval\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PER_FR_INT_A { +pub enum PerFrInt { #[doc = "0: 80% of the frame interval"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 85%"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 90%"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 95%"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PER_FR_INT_A) -> Self { + fn from(variant: PerFrInt) -> Self { variant as _ } } -impl crate::FieldSpec for PER_FR_INT_A { +impl crate::FieldSpec for PerFrInt { type Ux = u8; } -impl PER_FR_INT_R { +#[doc = "Field `PerFrInt` reader - Periodic Frame Interval"] +pub type PerFrIntR = crate::FieldReader; +impl PerFrIntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PER_FR_INT_A { + pub const fn variant(&self) -> PerFrInt { match self.bits { - 0 => PER_FR_INT_A::VALUE1, - 1 => PER_FR_INT_A::VALUE2, - 2 => PER_FR_INT_A::VALUE3, - 3 => PER_FR_INT_A::VALUE4, + 0 => PerFrInt::Value1, + 1 => PerFrInt::Value2, + 2 => PerFrInt::Value3, + 3 => PerFrInt::Value4, _ => unreachable!(), } } #[doc = "80% of the frame interval"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PER_FR_INT_A::VALUE1 + *self == PerFrInt::Value1 } #[doc = "85%"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PER_FR_INT_A::VALUE2 + *self == PerFrInt::Value2 } #[doc = "90%"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PER_FR_INT_A::VALUE3 + *self == PerFrInt::Value3 } #[doc = "95%"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PER_FR_INT_A::VALUE4 + *self == PerFrInt::Value4 } } #[doc = "Field `PerFrInt` writer - Periodic Frame Interval"] -pub type PER_FR_INT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PER_FR_INT_A>; -impl<'a, REG> PER_FR_INT_W<'a, REG> +pub type PerFrIntW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PerFrInt>; +impl<'a, REG> PerFrIntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -172,80 +172,80 @@ where #[doc = "80% of the frame interval"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PER_FR_INT_A::VALUE1) + self.variant(PerFrInt::Value1) } #[doc = "85%"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PER_FR_INT_A::VALUE2) + self.variant(PerFrInt::Value2) } #[doc = "90%"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PER_FR_INT_A::VALUE3) + self.variant(PerFrInt::Value3) } #[doc = "95%"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PER_FR_INT_A::VALUE4) + self.variant(PerFrInt::Value4) } } #[doc = "Field `DescDMA` reader - Enable Scatter/Gather DMA in Device mode."] -pub type DESC_DMA_R = crate::BitReader; +pub type DescDmaR = crate::BitReader; #[doc = "Field `DescDMA` writer - Enable Scatter/Gather DMA in Device mode."] -pub type DESC_DMA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `PerSchIntvl` reader - Periodic Scheduling Interval"] -pub type PER_SCH_INTVL_R = crate::FieldReader; +pub type DescDmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Periodic Scheduling Interval\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PER_SCH_INTVL_A { +pub enum PerSchIntvl { #[doc = "0: 25% of frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 50% of frame."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 75% of frame."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PER_SCH_INTVL_A) -> Self { + fn from(variant: PerSchIntvl) -> Self { variant as _ } } -impl crate::FieldSpec for PER_SCH_INTVL_A { +impl crate::FieldSpec for PerSchIntvl { type Ux = u8; } -impl PER_SCH_INTVL_R { +#[doc = "Field `PerSchIntvl` reader - Periodic Scheduling Interval"] +pub type PerSchIntvlR = crate::FieldReader; +impl PerSchIntvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PER_SCH_INTVL_A::VALUE1), - 1 => Some(PER_SCH_INTVL_A::VALUE2), - 2 => Some(PER_SCH_INTVL_A::VALUE3), + 0 => Some(PerSchIntvl::Value1), + 1 => Some(PerSchIntvl::Value2), + 2 => Some(PerSchIntvl::Value3), _ => None, } } #[doc = "25% of frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PER_SCH_INTVL_A::VALUE1 + *self == PerSchIntvl::Value1 } #[doc = "50% of frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PER_SCH_INTVL_A::VALUE2 + *self == PerSchIntvl::Value2 } #[doc = "75% of frame."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PER_SCH_INTVL_A::VALUE3 + *self == PerSchIntvl::Value3 } } #[doc = "Field `PerSchIntvl` writer - Periodic Scheduling Interval"] -pub type PER_SCH_INTVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PER_SCH_INTVL_A>; -impl<'a, REG> PER_SCH_INTVL_W<'a, REG> +pub type PerSchIntvlW<'a, REG> = crate::FieldWriter<'a, REG, 2, PerSchIntvl>; +impl<'a, REG> PerSchIntvlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -253,112 +253,103 @@ where #[doc = "25% of frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PER_SCH_INTVL_A::VALUE1) + self.variant(PerSchIntvl::Value1) } #[doc = "50% of frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PER_SCH_INTVL_A::VALUE2) + self.variant(PerSchIntvl::Value2) } #[doc = "75% of frame."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PER_SCH_INTVL_A::VALUE3) + self.variant(PerSchIntvl::Value3) } } impl R { #[doc = "Bits 0:1 - Device Speed"] #[inline(always)] - pub fn dev_spd(&self) -> DEV_SPD_R { - DEV_SPD_R::new((self.bits & 3) as u8) + pub fn dev_spd(&self) -> DevSpdR { + DevSpdR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"] #[inline(always)] - pub fn nzsts_outhshk(&self) -> NZSTS_OUTHSHK_R { - NZSTS_OUTHSHK_R::new(((self.bits >> 2) & 1) != 0) + pub fn nzsts_outhshk(&self) -> NzstsOuthshkR { + NzstsOuthshkR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:10 - Device Address"] #[inline(always)] - pub fn dev_addr(&self) -> DEV_ADDR_R { - DEV_ADDR_R::new(((self.bits >> 4) & 0x7f) as u8) + pub fn dev_addr(&self) -> DevAddrR { + DevAddrR::new(((self.bits >> 4) & 0x7f) as u8) } #[doc = "Bits 11:12 - Periodic Frame Interval"] #[inline(always)] - pub fn per_fr_int(&self) -> PER_FR_INT_R { - PER_FR_INT_R::new(((self.bits >> 11) & 3) as u8) + pub fn per_fr_int(&self) -> PerFrIntR { + PerFrIntR::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."] #[inline(always)] - pub fn desc_dma(&self) -> DESC_DMA_R { - DESC_DMA_R::new(((self.bits >> 23) & 1) != 0) + pub fn desc_dma(&self) -> DescDmaR { + DescDmaR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Periodic Scheduling Interval"] #[inline(always)] - pub fn per_sch_intvl(&self) -> PER_SCH_INTVL_R { - PER_SCH_INTVL_R::new(((self.bits >> 24) & 3) as u8) + pub fn per_sch_intvl(&self) -> PerSchIntvlR { + PerSchIntvlR::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Device Speed"] #[inline(always)] #[must_use] - pub fn dev_spd(&mut self) -> DEV_SPD_W { - DEV_SPD_W::new(self, 0) + pub fn dev_spd(&mut self) -> DevSpdW { + DevSpdW::new(self, 0) } #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"] #[inline(always)] #[must_use] - pub fn nzsts_outhshk(&mut self) -> NZSTS_OUTHSHK_W { - NZSTS_OUTHSHK_W::new(self, 2) + pub fn nzsts_outhshk(&mut self) -> NzstsOuthshkW { + NzstsOuthshkW::new(self, 2) } #[doc = "Bits 4:10 - Device Address"] #[inline(always)] #[must_use] - pub fn dev_addr(&mut self) -> DEV_ADDR_W { - DEV_ADDR_W::new(self, 4) + pub fn dev_addr(&mut self) -> DevAddrW { + DevAddrW::new(self, 4) } #[doc = "Bits 11:12 - Periodic Frame Interval"] #[inline(always)] #[must_use] - pub fn per_fr_int(&mut self) -> PER_FR_INT_W { - PER_FR_INT_W::new(self, 11) + pub fn per_fr_int(&mut self) -> PerFrIntW { + PerFrIntW::new(self, 11) } #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."] #[inline(always)] #[must_use] - pub fn desc_dma(&mut self) -> DESC_DMA_W { - DESC_DMA_W::new(self, 23) + pub fn desc_dma(&mut self) -> DescDmaW { + DescDmaW::new(self, 23) } #[doc = "Bits 24:25 - Periodic Scheduling Interval"] #[inline(always)] #[must_use] - pub fn per_sch_intvl(&mut self) -> PER_SCH_INTVL_W { - PER_SCH_INTVL_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn per_sch_intvl(&mut self) -> PerSchIntvlW { + PerSchIntvlW::new(self, 24) } } #[doc = "Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DCFG_SPEC; -impl crate::RegisterSpec for DCFG_SPEC { +pub struct DcfgSpec; +impl crate::RegisterSpec for DcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`dcfg::R`](R) reader structure"] -impl crate::Readable for DCFG_SPEC {} +impl crate::Readable for DcfgSpec {} #[doc = "`write(|w| ..)` method takes [`dcfg::W`](W) writer structure"] -impl crate::Writable for DCFG_SPEC { +impl crate::Writable for DcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DCFG to value 0x0820_0000"] -impl crate::Resettable for DCFG_SPEC { +impl crate::Resettable for DcfgSpec { const RESET_VALUE: u32 = 0x0820_0000; } diff --git a/src/usb0/dctl.rs b/src/usb0/dctl.rs index 80e72b59..84b0a402 100644 --- a/src/usb0/dctl.rs +++ b/src/usb0/dctl.rs @@ -1,204 +1,204 @@ #[doc = "Register `DCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RmtWkUpSig` reader - Remote Wakeup Signaling"] -pub type RMT_WK_UP_SIG_R = crate::BitReader; +pub type RmtWkUpSigR = crate::BitReader; #[doc = "Field `RmtWkUpSig` writer - Remote Wakeup Signaling"] -pub type RMT_WK_UP_SIG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SftDiscon` reader - Soft Disconnect"] -pub type SFT_DISCON_R = crate::BitReader; +pub type RmtWkUpSigW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Soft Disconnect\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFT_DISCON_A { +pub enum SftDiscon { #[doc = "0: Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core drives a device disconnect event to the USB host."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFT_DISCON_A) -> Self { + fn from(variant: SftDiscon) -> Self { variant as u8 != 0 } } -impl SFT_DISCON_R { +#[doc = "Field `SftDiscon` reader - Soft Disconnect"] +pub type SftDisconR = crate::BitReader; +impl SftDisconR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFT_DISCON_A { + pub const fn variant(&self) -> SftDiscon { match self.bits { - false => SFT_DISCON_A::VALUE1, - true => SFT_DISCON_A::VALUE2, + false => SftDiscon::Value1, + true => SftDiscon::Value2, } } #[doc = "Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFT_DISCON_A::VALUE1 + *self == SftDiscon::Value1 } #[doc = "The core drives a device disconnect event to the USB host."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFT_DISCON_A::VALUE2 + *self == SftDiscon::Value2 } } #[doc = "Field `SftDiscon` writer - Soft Disconnect"] -pub type SFT_DISCON_W<'a, REG> = crate::BitWriter<'a, REG, SFT_DISCON_A>; -impl<'a, REG> SFT_DISCON_W<'a, REG> +pub type SftDisconW<'a, REG> = crate::BitWriter<'a, REG, SftDiscon>; +impl<'a, REG> SftDisconW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFT_DISCON_A::VALUE1) + self.variant(SftDiscon::Value1) } #[doc = "The core drives a device disconnect event to the USB host."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFT_DISCON_A::VALUE2) + self.variant(SftDiscon::Value2) } } -#[doc = "Field `GNPINNakSts` reader - Global Non-periodic IN NAK Status"] -pub type GNPINNAK_STS_R = crate::BitReader; #[doc = "Global Non-periodic IN NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GNPINNAK_STS_A { +pub enum GnpinnakSts { #[doc = "0: A handshake is sent out based on the data availability in the transmit FIFO."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GNPINNAK_STS_A) -> Self { + fn from(variant: GnpinnakSts) -> Self { variant as u8 != 0 } } -impl GNPINNAK_STS_R { +#[doc = "Field `GNPINNakSts` reader - Global Non-periodic IN NAK Status"] +pub type GnpinnakStsR = crate::BitReader; +impl GnpinnakStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GNPINNAK_STS_A { + pub const fn variant(&self) -> GnpinnakSts { match self.bits { - false => GNPINNAK_STS_A::VALUE1, - true => GNPINNAK_STS_A::VALUE2, + false => GnpinnakSts::Value1, + true => GnpinnakSts::Value2, } } #[doc = "A handshake is sent out based on the data availability in the transmit FIFO."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GNPINNAK_STS_A::VALUE1 + *self == GnpinnakSts::Value1 } #[doc = "A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GNPINNAK_STS_A::VALUE2 + *self == GnpinnakSts::Value2 } } -#[doc = "Field `GOUTNakSts` reader - Global OUT NAK Status"] -pub type GOUTNAK_STS_R = crate::BitReader; #[doc = "Global OUT NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GOUTNAK_STS_A { +pub enum GoutnakSts { #[doc = "0: A handshake is sent based on the FIFO Status and the NAK and STALL bit settings."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GOUTNAK_STS_A) -> Self { + fn from(variant: GoutnakSts) -> Self { variant as u8 != 0 } } -impl GOUTNAK_STS_R { +#[doc = "Field `GOUTNakSts` reader - Global OUT NAK Status"] +pub type GoutnakStsR = crate::BitReader; +impl GoutnakStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GOUTNAK_STS_A { + pub const fn variant(&self) -> GoutnakSts { match self.bits { - false => GOUTNAK_STS_A::VALUE1, - true => GOUTNAK_STS_A::VALUE2, + false => GoutnakSts::Value1, + true => GoutnakSts::Value2, } } #[doc = "A handshake is sent based on the FIFO Status and the NAK and STALL bit settings."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GOUTNAK_STS_A::VALUE1 + *self == GoutnakSts::Value1 } #[doc = "No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GOUTNAK_STS_A::VALUE2 + *self == GoutnakSts::Value2 } } #[doc = "Field `SGNPInNak` writer - Set Global Non-periodic IN NAK"] -pub type SGNPIN_NAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SgnpinNakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGNPInNak` writer - Clear Global Non-periodic IN NAK"] -pub type CGNPIN_NAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CgnpinNakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SGOUTNak` writer - Set Global OUT NAK"] -pub type SGOUTNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SgoutnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGOUTNak` writer - Clear Global OUT NAK"] -pub type CGOUTNAK_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `GMC` reader - Global Multi Count"] -pub type GMC_R = crate::FieldReader; +pub type CgoutnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Global Multi Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum GMC_A { +pub enum Gmc { #[doc = "0: Invalid."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 packet."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 packets."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 3 packets."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: GMC_A) -> Self { + fn from(variant: Gmc) -> Self { variant as _ } } -impl crate::FieldSpec for GMC_A { +impl crate::FieldSpec for Gmc { type Ux = u8; } -impl GMC_R { +#[doc = "Field `GMC` reader - Global Multi Count"] +pub type GmcR = crate::FieldReader; +impl GmcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GMC_A { + pub const fn variant(&self) -> Gmc { match self.bits { - 0 => GMC_A::VALUE1, - 1 => GMC_A::VALUE2, - 2 => GMC_A::VALUE3, - 3 => GMC_A::VALUE4, + 0 => Gmc::Value1, + 1 => Gmc::Value2, + 2 => Gmc::Value3, + 3 => Gmc::Value4, _ => unreachable!(), } } #[doc = "Invalid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GMC_A::VALUE1 + *self == Gmc::Value1 } #[doc = "1 packet."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GMC_A::VALUE2 + *self == Gmc::Value2 } #[doc = "2 packets."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == GMC_A::VALUE3 + *self == Gmc::Value3 } #[doc = "3 packets."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == GMC_A::VALUE4 + *self == Gmc::Value4 } } #[doc = "Field `GMC` writer - Global Multi Count"] -pub type GMC_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, GMC_A>; -impl<'a, REG> GMC_W<'a, REG> +pub type GmcW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Gmc>; +impl<'a, REG> GmcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -206,261 +206,252 @@ where #[doc = "Invalid."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GMC_A::VALUE1) + self.variant(Gmc::Value1) } #[doc = "1 packet."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GMC_A::VALUE2) + self.variant(Gmc::Value2) } #[doc = "2 packets."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(GMC_A::VALUE3) + self.variant(Gmc::Value3) } #[doc = "3 packets."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(GMC_A::VALUE4) + self.variant(Gmc::Value4) } } -#[doc = "Field `IgnrFrmNum` reader - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] -pub type IGNR_FRM_NUM_R = crate::BitReader; #[doc = "Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IGNR_FRM_NUM_A { +pub enum IgnrFrmNum { #[doc = "0: Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IGNR_FRM_NUM_A) -> Self { + fn from(variant: IgnrFrmNum) -> Self { variant as u8 != 0 } } -impl IGNR_FRM_NUM_R { +#[doc = "Field `IgnrFrmNum` reader - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] +pub type IgnrFrmNumR = crate::BitReader; +impl IgnrFrmNumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IGNR_FRM_NUM_A { + pub const fn variant(&self) -> IgnrFrmNum { match self.bits { - false => IGNR_FRM_NUM_A::VALUE1, - true => IGNR_FRM_NUM_A::VALUE2, + false => IgnrFrmNum::Value1, + true => IgnrFrmNum::Value2, } } #[doc = "Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IGNR_FRM_NUM_A::VALUE1 + *self == IgnrFrmNum::Value1 } #[doc = "Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IGNR_FRM_NUM_A::VALUE2 + *self == IgnrFrmNum::Value2 } } #[doc = "Field `IgnrFrmNum` writer - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] -pub type IGNR_FRM_NUM_W<'a, REG> = crate::BitWriter<'a, REG, IGNR_FRM_NUM_A>; -impl<'a, REG> IGNR_FRM_NUM_W<'a, REG> +pub type IgnrFrmNumW<'a, REG> = crate::BitWriter<'a, REG, IgnrFrmNum>; +impl<'a, REG> IgnrFrmNumW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IGNR_FRM_NUM_A::VALUE1) + self.variant(IgnrFrmNum::Value1) } #[doc = "Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IGNR_FRM_NUM_A::VALUE2) + self.variant(IgnrFrmNum::Value2) } } #[doc = "Field `NakOnBble` reader - Set NAK automatically on babble"] -pub type NAK_ON_BBLE_R = crate::BitReader; +pub type NakOnBbleR = crate::BitReader; #[doc = "Field `NakOnBble` writer - Set NAK automatically on babble"] -pub type NAK_ON_BBLE_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `EnContOnBNA` reader - Enable continue on BNA"] -pub type EN_CONT_ON_BNA_R = crate::BitReader; +pub type NakOnBbleW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Enable continue on BNA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EN_CONT_ON_BNA_A { +pub enum EnContOnBna { #[doc = "0: After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EN_CONT_ON_BNA_A) -> Self { + fn from(variant: EnContOnBna) -> Self { variant as u8 != 0 } } -impl EN_CONT_ON_BNA_R { +#[doc = "Field `EnContOnBNA` reader - Enable continue on BNA"] +pub type EnContOnBnaR = crate::BitReader; +impl EnContOnBnaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EN_CONT_ON_BNA_A { + pub const fn variant(&self) -> EnContOnBna { match self.bits { - false => EN_CONT_ON_BNA_A::VALUE1, - true => EN_CONT_ON_BNA_A::VALUE2, + false => EnContOnBna::Value1, + true => EnContOnBna::Value2, } } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EN_CONT_ON_BNA_A::VALUE1 + *self == EnContOnBna::Value1 } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EN_CONT_ON_BNA_A::VALUE2 + *self == EnContOnBna::Value2 } } #[doc = "Field `EnContOnBNA` writer - Enable continue on BNA"] -pub type EN_CONT_ON_BNA_W<'a, REG> = crate::BitWriter<'a, REG, EN_CONT_ON_BNA_A>; -impl<'a, REG> EN_CONT_ON_BNA_W<'a, REG> +pub type EnContOnBnaW<'a, REG> = crate::BitWriter<'a, REG, EnContOnBna>; +impl<'a, REG> EnContOnBnaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EN_CONT_ON_BNA_A::VALUE1) + self.variant(EnContOnBna::Value1) } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EN_CONT_ON_BNA_A::VALUE2) + self.variant(EnContOnBna::Value2) } } impl R { #[doc = "Bit 0 - Remote Wakeup Signaling"] #[inline(always)] - pub fn rmt_wk_up_sig(&self) -> RMT_WK_UP_SIG_R { - RMT_WK_UP_SIG_R::new((self.bits & 1) != 0) + pub fn rmt_wk_up_sig(&self) -> RmtWkUpSigR { + RmtWkUpSigR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Soft Disconnect"] #[inline(always)] - pub fn sft_discon(&self) -> SFT_DISCON_R { - SFT_DISCON_R::new(((self.bits >> 1) & 1) != 0) + pub fn sft_discon(&self) -> SftDisconR { + SftDisconR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Global Non-periodic IN NAK Status"] #[inline(always)] - pub fn gnpinnak_sts(&self) -> GNPINNAK_STS_R { - GNPINNAK_STS_R::new(((self.bits >> 2) & 1) != 0) + pub fn gnpinnak_sts(&self) -> GnpinnakStsR { + GnpinnakStsR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Global OUT NAK Status"] #[inline(always)] - pub fn goutnak_sts(&self) -> GOUTNAK_STS_R { - GOUTNAK_STS_R::new(((self.bits >> 3) & 1) != 0) + pub fn goutnak_sts(&self) -> GoutnakStsR { + GoutnakStsR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 13:14 - Global Multi Count"] #[inline(always)] - pub fn gmc(&self) -> GMC_R { - GMC_R::new(((self.bits >> 13) & 3) as u8) + pub fn gmc(&self) -> GmcR { + GmcR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] #[inline(always)] - pub fn ignr_frm_num(&self) -> IGNR_FRM_NUM_R { - IGNR_FRM_NUM_R::new(((self.bits >> 15) & 1) != 0) + pub fn ignr_frm_num(&self) -> IgnrFrmNumR { + IgnrFrmNumR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Set NAK automatically on babble"] #[inline(always)] - pub fn nak_on_bble(&self) -> NAK_ON_BBLE_R { - NAK_ON_BBLE_R::new(((self.bits >> 16) & 1) != 0) + pub fn nak_on_bble(&self) -> NakOnBbleR { + NakOnBbleR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable continue on BNA"] #[inline(always)] - pub fn en_cont_on_bna(&self) -> EN_CONT_ON_BNA_R { - EN_CONT_ON_BNA_R::new(((self.bits >> 17) & 1) != 0) + pub fn en_cont_on_bna(&self) -> EnContOnBnaR { + EnContOnBnaR::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - Remote Wakeup Signaling"] #[inline(always)] #[must_use] - pub fn rmt_wk_up_sig(&mut self) -> RMT_WK_UP_SIG_W { - RMT_WK_UP_SIG_W::new(self, 0) + pub fn rmt_wk_up_sig(&mut self) -> RmtWkUpSigW { + RmtWkUpSigW::new(self, 0) } #[doc = "Bit 1 - Soft Disconnect"] #[inline(always)] #[must_use] - pub fn sft_discon(&mut self) -> SFT_DISCON_W { - SFT_DISCON_W::new(self, 1) + pub fn sft_discon(&mut self) -> SftDisconW { + SftDisconW::new(self, 1) } #[doc = "Bit 7 - Set Global Non-periodic IN NAK"] #[inline(always)] #[must_use] - pub fn sgnpin_nak(&mut self) -> SGNPIN_NAK_W { - SGNPIN_NAK_W::new(self, 7) + pub fn sgnpin_nak(&mut self) -> SgnpinNakW { + SgnpinNakW::new(self, 7) } #[doc = "Bit 8 - Clear Global Non-periodic IN NAK"] #[inline(always)] #[must_use] - pub fn cgnpin_nak(&mut self) -> CGNPIN_NAK_W { - CGNPIN_NAK_W::new(self, 8) + pub fn cgnpin_nak(&mut self) -> CgnpinNakW { + CgnpinNakW::new(self, 8) } #[doc = "Bit 9 - Set Global OUT NAK"] #[inline(always)] #[must_use] - pub fn sgoutnak(&mut self) -> SGOUTNAK_W { - SGOUTNAK_W::new(self, 9) + pub fn sgoutnak(&mut self) -> SgoutnakW { + SgoutnakW::new(self, 9) } #[doc = "Bit 10 - Clear Global OUT NAK"] #[inline(always)] #[must_use] - pub fn cgoutnak(&mut self) -> CGOUTNAK_W { - CGOUTNAK_W::new(self, 10) + pub fn cgoutnak(&mut self) -> CgoutnakW { + CgoutnakW::new(self, 10) } #[doc = "Bits 13:14 - Global Multi Count"] #[inline(always)] #[must_use] - pub fn gmc(&mut self) -> GMC_W { - GMC_W::new(self, 13) + pub fn gmc(&mut self) -> GmcW { + GmcW::new(self, 13) } #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] #[inline(always)] #[must_use] - pub fn ignr_frm_num(&mut self) -> IGNR_FRM_NUM_W { - IGNR_FRM_NUM_W::new(self, 15) + pub fn ignr_frm_num(&mut self) -> IgnrFrmNumW { + IgnrFrmNumW::new(self, 15) } #[doc = "Bit 16 - Set NAK automatically on babble"] #[inline(always)] #[must_use] - pub fn nak_on_bble(&mut self) -> NAK_ON_BBLE_W { - NAK_ON_BBLE_W::new(self, 16) + pub fn nak_on_bble(&mut self) -> NakOnBbleW { + NakOnBbleW::new(self, 16) } #[doc = "Bit 17 - Enable continue on BNA"] #[inline(always)] #[must_use] - pub fn en_cont_on_bna(&mut self) -> EN_CONT_ON_BNA_W { - EN_CONT_ON_BNA_W::new(self, 17) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn en_cont_on_bna(&mut self) -> EnContOnBnaW { + EnContOnBnaW::new(self, 17) } } #[doc = "Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DCTL_SPEC; -impl crate::RegisterSpec for DCTL_SPEC { +pub struct DctlSpec; +impl crate::RegisterSpec for DctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`dctl::R`](R) reader structure"] -impl crate::Readable for DCTL_SPEC {} +impl crate::Readable for DctlSpec {} #[doc = "`write(|w| ..)` method takes [`dctl::W`](W) writer structure"] -impl crate::Writable for DCTL_SPEC { +impl crate::Writable for DctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DCTL to value 0x02"] -impl crate::Resettable for DCTL_SPEC { +impl crate::Resettable for DctlSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/usb0/diepempmsk.rs b/src/usb0/diepempmsk.rs index c2e9e3ee..28a99142 100644 --- a/src/usb0/diepempmsk.rs +++ b/src/usb0/diepempmsk.rs @@ -1,49 +1,40 @@ #[doc = "Register `DIEPEMPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPEMPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `InEpTxfEmpMsk` reader - IN EP Tx FIFO Empty Interrupt Mask Bits"] -pub type IN_EP_TXF_EMP_MSK_R = crate::FieldReader; +pub type InEpTxfEmpMskR = crate::FieldReader; #[doc = "Field `InEpTxfEmpMsk` writer - IN EP Tx FIFO Empty Interrupt Mask Bits"] -pub type IN_EP_TXF_EMP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InEpTxfEmpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"] #[inline(always)] - pub fn in_ep_txf_emp_msk(&self) -> IN_EP_TXF_EMP_MSK_R { - IN_EP_TXF_EMP_MSK_R::new((self.bits & 0xffff) as u16) + pub fn in_ep_txf_emp_msk(&self) -> InEpTxfEmpMskR { + InEpTxfEmpMskR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn in_ep_txf_emp_msk(&mut self) -> IN_EP_TXF_EMP_MSK_W { - IN_EP_TXF_EMP_MSK_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn in_ep_txf_emp_msk(&mut self) -> InEpTxfEmpMskW { + InEpTxfEmpMskW::new(self, 0) } } #[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPEMPMSK_SPEC; -impl crate::RegisterSpec for DIEPEMPMSK_SPEC { +pub struct DiepempmskSpec; +impl crate::RegisterSpec for DiepempmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepempmsk::R`](R) reader structure"] -impl crate::Readable for DIEPEMPMSK_SPEC {} +impl crate::Readable for DiepempmskSpec {} #[doc = "`write(|w| ..)` method takes [`diepempmsk::W`](W) writer structure"] -impl crate::Writable for DIEPEMPMSK_SPEC { +impl crate::Writable for DiepempmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPEMPMSK to value 0"] -impl crate::Resettable for DIEPEMPMSK_SPEC { +impl crate::Resettable for DiepempmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/diepmsk.rs b/src/usb0/diepmsk.rs index 83c2ec79..215aaa1b 100644 --- a/src/usb0/diepmsk.rs +++ b/src/usb0/diepmsk.rs @@ -1,169 +1,160 @@ #[doc = "Register `DIEPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferComplMsk` reader - Transfer Completed Interrupt Mask"] -pub type XFER_COMPL_MSK_R = crate::BitReader; +pub type XferComplMskR = crate::BitReader; #[doc = "Field `XferComplMsk` writer - Transfer Completed Interrupt Mask"] -pub type XFER_COMPL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbldMsk` reader - Endpoint Disabled Interrupt Mask"] -pub type EPDISBLD_MSK_R = crate::BitReader; +pub type EpdisbldMskR = crate::BitReader; #[doc = "Field `EPDisbldMsk` writer - Endpoint Disabled Interrupt Mask"] -pub type EPDISBLD_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErrMsk` reader - AHB Error Mask"] -pub type AHBERR_MSK_R = crate::BitReader; +pub type AhberrMskR = crate::BitReader; #[doc = "Field `AHBErrMsk` writer - AHB Error Mask"] -pub type AHBERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUTMsk` reader - Timeout Condition Mask"] -pub type TIME_OUTMSK_R = crate::BitReader; +pub type TimeOutmskR = crate::BitReader; #[doc = "Field `TimeOUTMsk` writer - Timeout Condition Mask"] -pub type TIME_OUTMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TimeOutmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmpMsk` reader - IN Token Received When TxFIFO Empty Mask"] -pub type INTKN_TXFEMP_MSK_R = crate::BitReader; +pub type IntknTxfempMskR = crate::BitReader; #[doc = "Field `INTknTXFEmpMsk` writer - IN Token Received When TxFIFO Empty Mask"] -pub type INTKN_TXFEMP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntknTxfempMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEffMsk` reader - IN Endpoint NAK Effective Mask"] -pub type INEPNAK_EFF_MSK_R = crate::BitReader; +pub type InepnakEffMskR = crate::BitReader; #[doc = "Field `INEPNakEffMsk` writer - IN Endpoint NAK Effective Mask"] -pub type INEPNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type InepnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxfifoUndrnMsk` reader - Fifo Underrun Mask"] -pub type TXFIFO_UNDRN_MSK_R = crate::BitReader; +pub type TxfifoUndrnMskR = crate::BitReader; #[doc = "Field `TxfifoUndrnMsk` writer - Fifo Underrun Mask"] -pub type TXFIFO_UNDRN_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TxfifoUndrnMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAInIntrMsk` reader - BNA Interrupt Mask"] -pub type BNAIN_INTR_MSK_R = crate::BitReader; +pub type BnainIntrMskR = crate::BitReader; #[doc = "Field `BNAInIntrMsk` writer - BNA Interrupt Mask"] -pub type BNAIN_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnainIntrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKMsk` reader - NAK interrupt Mask"] -pub type NAKMSK_R = crate::BitReader; +pub type NakmskR = crate::BitReader; #[doc = "Field `NAKMsk` writer - NAK interrupt Mask"] -pub type NAKMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakmskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - pub fn xfer_compl_msk(&self) -> XFER_COMPL_MSK_R { - XFER_COMPL_MSK_R::new((self.bits & 1) != 0) + pub fn xfer_compl_msk(&self) -> XferComplMskR { + XferComplMskR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - pub fn epdisbld_msk(&self) -> EPDISBLD_MSK_R { - EPDISBLD_MSK_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld_msk(&self) -> EpdisbldMskR { + EpdisbldMskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] - pub fn ahberr_msk(&self) -> AHBERR_MSK_R { - AHBERR_MSK_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr_msk(&self) -> AhberrMskR { + AhberrMskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition Mask"] #[inline(always)] - pub fn time_outmsk(&self) -> TIME_OUTMSK_R { - TIME_OUTMSK_R::new(((self.bits >> 3) & 1) != 0) + pub fn time_outmsk(&self) -> TimeOutmskR { + TimeOutmskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"] #[inline(always)] - pub fn intkn_txfemp_msk(&self) -> INTKN_TXFEMP_MSK_R { - INTKN_TXFEMP_MSK_R::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp_msk(&self) -> IntknTxfempMskR { + IntknTxfempMskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"] #[inline(always)] - pub fn inepnak_eff_msk(&self) -> INEPNAK_EFF_MSK_R { - INEPNAK_EFF_MSK_R::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff_msk(&self) -> InepnakEffMskR { + InepnakEffMskR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Fifo Underrun Mask"] #[inline(always)] - pub fn txfifo_undrn_msk(&self) -> TXFIFO_UNDRN_MSK_R { - TXFIFO_UNDRN_MSK_R::new(((self.bits >> 8) & 1) != 0) + pub fn txfifo_undrn_msk(&self) -> TxfifoUndrnMskR { + TxfifoUndrnMskR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - BNA Interrupt Mask"] #[inline(always)] - pub fn bnain_intr_msk(&self) -> BNAIN_INTR_MSK_R { - BNAIN_INTR_MSK_R::new(((self.bits >> 9) & 1) != 0) + pub fn bnain_intr_msk(&self) -> BnainIntrMskR { + BnainIntrMskR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt Mask"] #[inline(always)] - pub fn nakmsk(&self) -> NAKMSK_R { - NAKMSK_R::new(((self.bits >> 13) & 1) != 0) + pub fn nakmsk(&self) -> NakmskR { + NakmskR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] #[must_use] - pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { - XFER_COMPL_MSK_W::new(self, 0) + pub fn xfer_compl_msk(&mut self) -> XferComplMskW { + XferComplMskW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] #[must_use] - pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { - EPDISBLD_MSK_W::new(self, 1) + pub fn epdisbld_msk(&mut self) -> EpdisbldMskW { + EpdisbldMskW::new(self, 1) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] #[must_use] - pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { - AHBERR_MSK_W::new(self, 2) + pub fn ahberr_msk(&mut self) -> AhberrMskW { + AhberrMskW::new(self, 2) } #[doc = "Bit 3 - Timeout Condition Mask"] #[inline(always)] #[must_use] - pub fn time_outmsk(&mut self) -> TIME_OUTMSK_W { - TIME_OUTMSK_W::new(self, 3) + pub fn time_outmsk(&mut self) -> TimeOutmskW { + TimeOutmskW::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"] #[inline(always)] #[must_use] - pub fn intkn_txfemp_msk(&mut self) -> INTKN_TXFEMP_MSK_W { - INTKN_TXFEMP_MSK_W::new(self, 4) + pub fn intkn_txfemp_msk(&mut self) -> IntknTxfempMskW { + IntknTxfempMskW::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn inepnak_eff_msk(&mut self) -> INEPNAK_EFF_MSK_W { - INEPNAK_EFF_MSK_W::new(self, 6) + pub fn inepnak_eff_msk(&mut self) -> InepnakEffMskW { + InepnakEffMskW::new(self, 6) } #[doc = "Bit 8 - Fifo Underrun Mask"] #[inline(always)] #[must_use] - pub fn txfifo_undrn_msk(&mut self) -> TXFIFO_UNDRN_MSK_W { - TXFIFO_UNDRN_MSK_W::new(self, 8) + pub fn txfifo_undrn_msk(&mut self) -> TxfifoUndrnMskW { + TxfifoUndrnMskW::new(self, 8) } #[doc = "Bit 9 - BNA Interrupt Mask"] #[inline(always)] #[must_use] - pub fn bnain_intr_msk(&mut self) -> BNAIN_INTR_MSK_W { - BNAIN_INTR_MSK_W::new(self, 9) + pub fn bnain_intr_msk(&mut self) -> BnainIntrMskW { + BnainIntrMskW::new(self, 9) } #[doc = "Bit 13 - NAK interrupt Mask"] #[inline(always)] #[must_use] - pub fn nakmsk(&mut self) -> NAKMSK_W { - NAKMSK_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nakmsk(&mut self) -> NakmskW { + NakmskW::new(self, 13) } } #[doc = "Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPMSK_SPEC; -impl crate::RegisterSpec for DIEPMSK_SPEC { +pub struct DiepmskSpec; +impl crate::RegisterSpec for DiepmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepmsk::R`](R) reader structure"] -impl crate::Readable for DIEPMSK_SPEC {} +impl crate::Readable for DiepmskSpec {} #[doc = "`write(|w| ..)` method takes [`diepmsk::W`](W) writer structure"] -impl crate::Writable for DIEPMSK_SPEC { +impl crate::Writable for DiepmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPMSK to value 0"] -impl crate::Resettable for DIEPMSK_SPEC { +impl crate::Resettable for DiepmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dieptxf1.rs b/src/usb0/dieptxf1.rs index a2dcd314..43cb9604 100644 --- a/src/usb0/dieptxf1.rs +++ b/src/usb0/dieptxf1.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF1_SPEC; -impl crate::RegisterSpec for DIEPTXF1_SPEC { +pub struct Dieptxf1Spec; +impl crate::RegisterSpec for Dieptxf1Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf1::R`](R) reader structure"] -impl crate::Readable for DIEPTXF1_SPEC {} +impl crate::Readable for Dieptxf1Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf1::W`](W) writer structure"] -impl crate::Writable for DIEPTXF1_SPEC { +impl crate::Writable for Dieptxf1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF1 to value 0x0100_012a"] -impl crate::Resettable for DIEPTXF1_SPEC { +impl crate::Resettable for Dieptxf1Spec { const RESET_VALUE: u32 = 0x0100_012a; } diff --git a/src/usb0/dieptxf2.rs b/src/usb0/dieptxf2.rs index 2862d723..e08181a7 100644 --- a/src/usb0/dieptxf2.rs +++ b/src/usb0/dieptxf2.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF2_SPEC; -impl crate::RegisterSpec for DIEPTXF2_SPEC { +pub struct Dieptxf2Spec; +impl crate::RegisterSpec for Dieptxf2Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf2::R`](R) reader structure"] -impl crate::Readable for DIEPTXF2_SPEC {} +impl crate::Readable for Dieptxf2Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf2::W`](W) writer structure"] -impl crate::Writable for DIEPTXF2_SPEC { +impl crate::Writable for Dieptxf2Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF2 to value 0x0100_022a"] -impl crate::Resettable for DIEPTXF2_SPEC { +impl crate::Resettable for Dieptxf2Spec { const RESET_VALUE: u32 = 0x0100_022a; } diff --git a/src/usb0/dieptxf3.rs b/src/usb0/dieptxf3.rs index 927ad6d1..682acd32 100644 --- a/src/usb0/dieptxf3.rs +++ b/src/usb0/dieptxf3.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF3_SPEC; -impl crate::RegisterSpec for DIEPTXF3_SPEC { +pub struct Dieptxf3Spec; +impl crate::RegisterSpec for Dieptxf3Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf3::R`](R) reader structure"] -impl crate::Readable for DIEPTXF3_SPEC {} +impl crate::Readable for Dieptxf3Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf3::W`](W) writer structure"] -impl crate::Writable for DIEPTXF3_SPEC { +impl crate::Writable for Dieptxf3Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF3 to value 0x0100_032a"] -impl crate::Resettable for DIEPTXF3_SPEC { +impl crate::Resettable for Dieptxf3Spec { const RESET_VALUE: u32 = 0x0100_032a; } diff --git a/src/usb0/dieptxf4.rs b/src/usb0/dieptxf4.rs index fd1f1824..f8d21b6e 100644 --- a/src/usb0/dieptxf4.rs +++ b/src/usb0/dieptxf4.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF4_SPEC; -impl crate::RegisterSpec for DIEPTXF4_SPEC { +pub struct Dieptxf4Spec; +impl crate::RegisterSpec for Dieptxf4Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf4::R`](R) reader structure"] -impl crate::Readable for DIEPTXF4_SPEC {} +impl crate::Readable for Dieptxf4Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf4::W`](W) writer structure"] -impl crate::Writable for DIEPTXF4_SPEC { +impl crate::Writable for Dieptxf4Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF4 to value 0x0100_042a"] -impl crate::Resettable for DIEPTXF4_SPEC { +impl crate::Resettable for Dieptxf4Spec { const RESET_VALUE: u32 = 0x0100_042a; } diff --git a/src/usb0/dieptxf5.rs b/src/usb0/dieptxf5.rs index 645aec53..6fe89968 100644 --- a/src/usb0/dieptxf5.rs +++ b/src/usb0/dieptxf5.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF5` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF5` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF5_SPEC; -impl crate::RegisterSpec for DIEPTXF5_SPEC { +pub struct Dieptxf5Spec; +impl crate::RegisterSpec for Dieptxf5Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf5::R`](R) reader structure"] -impl crate::Readable for DIEPTXF5_SPEC {} +impl crate::Readable for Dieptxf5Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf5::W`](W) writer structure"] -impl crate::Writable for DIEPTXF5_SPEC { +impl crate::Writable for Dieptxf5Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF5 to value 0x0100_052a"] -impl crate::Resettable for DIEPTXF5_SPEC { +impl crate::Resettable for Dieptxf5Spec { const RESET_VALUE: u32 = 0x0100_052a; } diff --git a/src/usb0/dieptxf6.rs b/src/usb0/dieptxf6.rs index 26bc1ef3..b83bbbba 100644 --- a/src/usb0/dieptxf6.rs +++ b/src/usb0/dieptxf6.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTXF6` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF6` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; +pub type InepnTxFstAddrR = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_R = crate::FieldReader; +pub type InepnTxFdepR = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { - INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { + InepnTxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { - INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { + InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { - INEPN_TX_FST_ADDR_W::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { + InepnTxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { - INEPN_TX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { + InepnTxFdepW::new(self, 16) } } #[doc = "Device IN Endpoint Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTXF6_SPEC; -impl crate::RegisterSpec for DIEPTXF6_SPEC { +pub struct Dieptxf6Spec; +impl crate::RegisterSpec for Dieptxf6Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf6::R`](R) reader structure"] -impl crate::Readable for DIEPTXF6_SPEC {} +impl crate::Readable for Dieptxf6Spec {} #[doc = "`write(|w| ..)` method takes [`dieptxf6::W`](W) writer structure"] -impl crate::Writable for DIEPTXF6_SPEC { +impl crate::Writable for Dieptxf6Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF6 to value 0x0100_062a"] -impl crate::Resettable for DIEPTXF6_SPEC { +impl crate::Resettable for Dieptxf6Spec { const RESET_VALUE: u32 = 0x0100_062a; } diff --git a/src/usb0/doepmsk.rs b/src/usb0/doepmsk.rs index 557d5114..7b3c2fc7 100644 --- a/src/usb0/doepmsk.rs +++ b/src/usb0/doepmsk.rs @@ -1,199 +1,190 @@ #[doc = "Register `DOEPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferComplMsk` reader - Transfer Completed Interrupt Mask"] -pub type XFER_COMPL_MSK_R = crate::BitReader; +pub type XferComplMskR = crate::BitReader; #[doc = "Field `XferComplMsk` writer - Transfer Completed Interrupt Mask"] -pub type XFER_COMPL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbldMsk` reader - Endpoint Disabled Interrupt Mask"] -pub type EPDISBLD_MSK_R = crate::BitReader; +pub type EpdisbldMskR = crate::BitReader; #[doc = "Field `EPDisbldMsk` writer - Endpoint Disabled Interrupt Mask"] -pub type EPDISBLD_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErrMsk` reader - AHB Error"] -pub type AHBERR_MSK_R = crate::BitReader; +pub type AhberrMskR = crate::BitReader; #[doc = "Field `AHBErrMsk` writer - AHB Error"] -pub type AHBERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUPMsk` reader - SETUP Phase Done Mask"] -pub type SET_UPMSK_R = crate::BitReader; +pub type SetUpmskR = crate::BitReader; #[doc = "Field `SetUPMsk` writer - SETUP Phase Done Mask"] -pub type SET_UPMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetUpmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdisMsk` reader - OUT Token Received when Endpoint Disabled Mask"] -pub type OUTTKN_EPDIS_MSK_R = crate::BitReader; +pub type OuttknEpdisMskR = crate::BitReader; #[doc = "Field `OUTTknEPdisMsk` writer - OUT Token Received when Endpoint Disabled Mask"] -pub type OUTTKN_EPDIS_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OuttknEpdisMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received Mask"] -pub type BACK2BACK_SETUP_R = crate::BitReader; +pub type Back2backSetupR = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received Mask"] -pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OutPktErrMsk` reader - OUT Packet Error Mask"] -pub type OUT_PKT_ERR_MSK_R = crate::BitReader; +pub type OutPktErrMskR = crate::BitReader; #[doc = "Field `OutPktErrMsk` writer - OUT Packet Error Mask"] -pub type OUT_PKT_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OutPktErrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BnaOutIntrMsk` reader - BNA interrupt Mask"] -pub type BNA_OUT_INTR_MSK_R = crate::BitReader; +pub type BnaOutIntrMskR = crate::BitReader; #[doc = "Field `BnaOutIntrMsk` writer - BNA interrupt Mask"] -pub type BNA_OUT_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaOutIntrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrMsk` reader - Babble Interrupt Mask"] -pub type BBLE_ERR_MSK_R = crate::BitReader; +pub type BbleErrMskR = crate::BitReader; #[doc = "Field `BbleErrMsk` writer - Babble Interrupt Mask"] -pub type BBLE_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BbleErrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKMsk` reader - NAK Interrupt Mask"] -pub type NAKMSK_R = crate::BitReader; +pub type NakmskR = crate::BitReader; #[doc = "Field `NAKMsk` writer - NAK Interrupt Mask"] -pub type NAKMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETMsk` reader - NYET Interrupt Mask"] -pub type NYETMSK_R = crate::BitReader; +pub type NyetmskR = crate::BitReader; #[doc = "Field `NYETMsk` writer - NYET Interrupt Mask"] -pub type NYETMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NyetmskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - pub fn xfer_compl_msk(&self) -> XFER_COMPL_MSK_R { - XFER_COMPL_MSK_R::new((self.bits & 1) != 0) + pub fn xfer_compl_msk(&self) -> XferComplMskR { + XferComplMskR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - pub fn epdisbld_msk(&self) -> EPDISBLD_MSK_R { - EPDISBLD_MSK_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld_msk(&self) -> EpdisbldMskR { + EpdisbldMskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr_msk(&self) -> AHBERR_MSK_R { - AHBERR_MSK_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr_msk(&self) -> AhberrMskR { + AhberrMskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done Mask"] #[inline(always)] - pub fn set_upmsk(&self) -> SET_UPMSK_R { - SET_UPMSK_R::new(((self.bits >> 3) & 1) != 0) + pub fn set_upmsk(&self) -> SetUpmskR { + SetUpmskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"] #[inline(always)] - pub fn outtkn_epdis_msk(&self) -> OUTTKN_EPDIS_MSK_R { - OUTTKN_EPDIS_MSK_R::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis_msk(&self) -> OuttknEpdisMskR { + OuttknEpdisMskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"] #[inline(always)] - pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { - BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> Back2backSetupR { + Back2backSetupR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - OUT Packet Error Mask"] #[inline(always)] - pub fn out_pkt_err_msk(&self) -> OUT_PKT_ERR_MSK_R { - OUT_PKT_ERR_MSK_R::new(((self.bits >> 8) & 1) != 0) + pub fn out_pkt_err_msk(&self) -> OutPktErrMskR { + OutPktErrMskR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - BNA interrupt Mask"] #[inline(always)] - pub fn bna_out_intr_msk(&self) -> BNA_OUT_INTR_MSK_R { - BNA_OUT_INTR_MSK_R::new(((self.bits >> 9) & 1) != 0) + pub fn bna_out_intr_msk(&self) -> BnaOutIntrMskR { + BnaOutIntrMskR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Babble Interrupt Mask"] #[inline(always)] - pub fn bble_err_msk(&self) -> BBLE_ERR_MSK_R { - BBLE_ERR_MSK_R::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_msk(&self) -> BbleErrMskR { + BbleErrMskR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK Interrupt Mask"] #[inline(always)] - pub fn nakmsk(&self) -> NAKMSK_R { - NAKMSK_R::new(((self.bits >> 13) & 1) != 0) + pub fn nakmsk(&self) -> NakmskR { + NakmskR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET Interrupt Mask"] #[inline(always)] - pub fn nyetmsk(&self) -> NYETMSK_R { - NYETMSK_R::new(((self.bits >> 14) & 1) != 0) + pub fn nyetmsk(&self) -> NyetmskR { + NyetmskR::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] #[must_use] - pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { - XFER_COMPL_MSK_W::new(self, 0) + pub fn xfer_compl_msk(&mut self) -> XferComplMskW { + XferComplMskW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] #[must_use] - pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { - EPDISBLD_MSK_W::new(self, 1) + pub fn epdisbld_msk(&mut self) -> EpdisbldMskW { + EpdisbldMskW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { - AHBERR_MSK_W::new(self, 2) + pub fn ahberr_msk(&mut self) -> AhberrMskW { + AhberrMskW::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done Mask"] #[inline(always)] #[must_use] - pub fn set_upmsk(&mut self) -> SET_UPMSK_W { - SET_UPMSK_W::new(self, 3) + pub fn set_upmsk(&mut self) -> SetUpmskW { + SetUpmskW::new(self, 3) } #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"] #[inline(always)] #[must_use] - pub fn outtkn_epdis_msk(&mut self) -> OUTTKN_EPDIS_MSK_W { - OUTTKN_EPDIS_MSK_W::new(self, 4) + pub fn outtkn_epdis_msk(&mut self) -> OuttknEpdisMskW { + OuttknEpdisMskW::new(self, 4) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { - BACK2BACK_SETUP_W::new(self, 6) + pub fn back2back_setup(&mut self) -> Back2backSetupW { + Back2backSetupW::new(self, 6) } #[doc = "Bit 8 - OUT Packet Error Mask"] #[inline(always)] #[must_use] - pub fn out_pkt_err_msk(&mut self) -> OUT_PKT_ERR_MSK_W { - OUT_PKT_ERR_MSK_W::new(self, 8) + pub fn out_pkt_err_msk(&mut self) -> OutPktErrMskW { + OutPktErrMskW::new(self, 8) } #[doc = "Bit 9 - BNA interrupt Mask"] #[inline(always)] #[must_use] - pub fn bna_out_intr_msk(&mut self) -> BNA_OUT_INTR_MSK_W { - BNA_OUT_INTR_MSK_W::new(self, 9) + pub fn bna_out_intr_msk(&mut self) -> BnaOutIntrMskW { + BnaOutIntrMskW::new(self, 9) } #[doc = "Bit 12 - Babble Interrupt Mask"] #[inline(always)] #[must_use] - pub fn bble_err_msk(&mut self) -> BBLE_ERR_MSK_W { - BBLE_ERR_MSK_W::new(self, 12) + pub fn bble_err_msk(&mut self) -> BbleErrMskW { + BbleErrMskW::new(self, 12) } #[doc = "Bit 13 - NAK Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nakmsk(&mut self) -> NAKMSK_W { - NAKMSK_W::new(self, 13) + pub fn nakmsk(&mut self) -> NakmskW { + NakmskW::new(self, 13) } #[doc = "Bit 14 - NYET Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nyetmsk(&mut self) -> NYETMSK_W { - NYETMSK_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nyetmsk(&mut self) -> NyetmskW { + NyetmskW::new(self, 14) } } #[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPMSK_SPEC; -impl crate::RegisterSpec for DOEPMSK_SPEC { +pub struct DoepmskSpec; +impl crate::RegisterSpec for DoepmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepmsk::R`](R) reader structure"] -impl crate::Readable for DOEPMSK_SPEC {} +impl crate::Readable for DoepmskSpec {} #[doc = "`write(|w| ..)` method takes [`doepmsk::W`](W) writer structure"] -impl crate::Writable for DOEPMSK_SPEC { +impl crate::Writable for DoepmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPMSK to value 0"] -impl crate::Resettable for DOEPMSK_SPEC { +impl crate::Resettable for DoepmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dsts.rs b/src/usb0/dsts.rs index 3bf3295e..6e208e32 100644 --- a/src/usb0/dsts.rs +++ b/src/usb0/dsts.rs @@ -1,74 +1,74 @@ #[doc = "Register `DSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SuspSts` reader - Suspend Status"] -pub type SUSP_STS_R = crate::BitReader; -#[doc = "Field `EnumSpd` reader - Enumerated Speed"] -pub type ENUM_SPD_R = crate::FieldReader; +pub type SuspStsR = crate::BitReader; #[doc = "Enumerated Speed\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENUM_SPD_A { +pub enum EnumSpd { #[doc = "3: Full speed (PHY clock is running at 48 MHz)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENUM_SPD_A) -> Self { + fn from(variant: EnumSpd) -> Self { variant as _ } } -impl crate::FieldSpec for ENUM_SPD_A { +impl crate::FieldSpec for EnumSpd { type Ux = u8; } -impl ENUM_SPD_R { +#[doc = "Field `EnumSpd` reader - Enumerated Speed"] +pub type EnumSpdR = crate::FieldReader; +impl EnumSpdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(ENUM_SPD_A::VALUE4), + 3 => Some(EnumSpd::Value4), _ => None, } } #[doc = "Full speed (PHY clock is running at 48 MHz)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENUM_SPD_A::VALUE4 + *self == EnumSpd::Value4 } } #[doc = "Field `ErrticErr` reader - Erratic Error"] -pub type ERRTIC_ERR_R = crate::BitReader; +pub type ErrticErrR = crate::BitReader; #[doc = "Field `SOFFN` reader - Frame Number of the Received SOF"] -pub type SOFFN_R = crate::FieldReader; +pub type SoffnR = crate::FieldReader; impl R { #[doc = "Bit 0 - Suspend Status"] #[inline(always)] - pub fn susp_sts(&self) -> SUSP_STS_R { - SUSP_STS_R::new((self.bits & 1) != 0) + pub fn susp_sts(&self) -> SuspStsR { + SuspStsR::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Enumerated Speed"] #[inline(always)] - pub fn enum_spd(&self) -> ENUM_SPD_R { - ENUM_SPD_R::new(((self.bits >> 1) & 3) as u8) + pub fn enum_spd(&self) -> EnumSpdR { + EnumSpdR::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - Erratic Error"] #[inline(always)] - pub fn errtic_err(&self) -> ERRTIC_ERR_R { - ERRTIC_ERR_R::new(((self.bits >> 3) & 1) != 0) + pub fn errtic_err(&self) -> ErrticErrR { + ErrticErrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 8:21 - Frame Number of the Received SOF"] #[inline(always)] - pub fn soffn(&self) -> SOFFN_R { - SOFFN_R::new(((self.bits >> 8) & 0x3fff) as u16) + pub fn soffn(&self) -> SoffnR { + SoffnR::new(((self.bits >> 8) & 0x3fff) as u16) } } #[doc = "Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DSTS_SPEC; -impl crate::RegisterSpec for DSTS_SPEC { +pub struct DstsSpec; +impl crate::RegisterSpec for DstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`dsts::R`](R) reader structure"] -impl crate::Readable for DSTS_SPEC {} +impl crate::Readable for DstsSpec {} #[doc = "`reset()` method sets DSTS to value 0x02"] -impl crate::Resettable for DSTS_SPEC { +impl crate::Resettable for DstsSpec { const RESET_VALUE: u32 = 0x02; } diff --git a/src/usb0/dvbusdis.rs b/src/usb0/dvbusdis.rs index 9c99cf27..f085c704 100644 --- a/src/usb0/dvbusdis.rs +++ b/src/usb0/dvbusdis.rs @@ -1,49 +1,40 @@ #[doc = "Register `DVBUSDIS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DVBUSDIS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DVBUSDis` reader - Device Vbus Discharge Time"] -pub type DVBUSDIS_R = crate::FieldReader; +pub type DvbusdisR = crate::FieldReader; #[doc = "Field `DVBUSDis` writer - Device Vbus Discharge Time"] -pub type DVBUSDIS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type DvbusdisW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Device Vbus Discharge Time"] #[inline(always)] - pub fn dvbusdis(&self) -> DVBUSDIS_R { - DVBUSDIS_R::new((self.bits & 0xffff) as u16) + pub fn dvbusdis(&self) -> DvbusdisR { + DvbusdisR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Device Vbus Discharge Time"] #[inline(always)] #[must_use] - pub fn dvbusdis(&mut self) -> DVBUSDIS_W { - DVBUSDIS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dvbusdis(&mut self) -> DvbusdisW { + DvbusdisW::new(self, 0) } } #[doc = "Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DVBUSDIS_SPEC; -impl crate::RegisterSpec for DVBUSDIS_SPEC { +pub struct DvbusdisSpec; +impl crate::RegisterSpec for DvbusdisSpec { type Ux = u32; } #[doc = "`read()` method returns [`dvbusdis::R`](R) reader structure"] -impl crate::Readable for DVBUSDIS_SPEC {} +impl crate::Readable for DvbusdisSpec {} #[doc = "`write(|w| ..)` method takes [`dvbusdis::W`](W) writer structure"] -impl crate::Writable for DVBUSDIS_SPEC { +impl crate::Writable for DvbusdisSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DVBUSDIS to value 0x17d7"] -impl crate::Resettable for DVBUSDIS_SPEC { +impl crate::Resettable for DvbusdisSpec { const RESET_VALUE: u32 = 0x17d7; } diff --git a/src/usb0/dvbuspulse.rs b/src/usb0/dvbuspulse.rs index 543134b5..8bbd4e63 100644 --- a/src/usb0/dvbuspulse.rs +++ b/src/usb0/dvbuspulse.rs @@ -1,49 +1,40 @@ #[doc = "Register `DVBUSPULSE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DVBUSPULSE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DVBUSPulse` reader - Device Vbus Pulsing Time"] -pub type DVBUSPULSE_R = crate::FieldReader; +pub type DvbuspulseR = crate::FieldReader; #[doc = "Field `DVBUSPulse` writer - Device Vbus Pulsing Time"] -pub type DVBUSPULSE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DvbuspulseW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Device Vbus Pulsing Time"] #[inline(always)] - pub fn dvbuspulse(&self) -> DVBUSPULSE_R { - DVBUSPULSE_R::new((self.bits & 0x0fff) as u16) + pub fn dvbuspulse(&self) -> DvbuspulseR { + DvbuspulseR::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Device Vbus Pulsing Time"] #[inline(always)] #[must_use] - pub fn dvbuspulse(&mut self) -> DVBUSPULSE_W { - DVBUSPULSE_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dvbuspulse(&mut self) -> DvbuspulseW { + DvbuspulseW::new(self, 0) } } #[doc = "Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DVBUSPULSE_SPEC; -impl crate::RegisterSpec for DVBUSPULSE_SPEC { +pub struct DvbuspulseSpec; +impl crate::RegisterSpec for DvbuspulseSpec { type Ux = u32; } #[doc = "`read()` method returns [`dvbuspulse::R`](R) reader structure"] -impl crate::Readable for DVBUSPULSE_SPEC {} +impl crate::Readable for DvbuspulseSpec {} #[doc = "`write(|w| ..)` method takes [`dvbuspulse::W`](W) writer structure"] -impl crate::Writable for DVBUSPULSE_SPEC { +impl crate::Writable for DvbuspulseSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DVBUSPULSE to value 0x05b8"] -impl crate::Resettable for DVBUSPULSE_SPEC { +impl crate::Resettable for DvbuspulseSpec { const RESET_VALUE: u32 = 0x05b8; } diff --git a/src/usb0/gahbcfg.rs b/src/usb0/gahbcfg.rs index cd3d2c47..3e335a3d 100644 --- a/src/usb0/gahbcfg.rs +++ b/src/usb0/gahbcfg.rs @@ -1,128 +1,128 @@ #[doc = "Register `GAHBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GAHBCFG` writer"] -pub type W = crate::W; -#[doc = "Field `GlblIntrMsk` reader - Global Interrupt Mask"] -pub type GLBL_INTR_MSK_R = crate::BitReader; +pub type W = crate::W; #[doc = "Global Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GLBL_INTR_MSK_A { +pub enum GlblIntrMsk { #[doc = "0: Mask the interrupt assertion to the application."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Unmask the interrupt assertion to the application."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GLBL_INTR_MSK_A) -> Self { + fn from(variant: GlblIntrMsk) -> Self { variant as u8 != 0 } } -impl GLBL_INTR_MSK_R { +#[doc = "Field `GlblIntrMsk` reader - Global Interrupt Mask"] +pub type GlblIntrMskR = crate::BitReader; +impl GlblIntrMskR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GLBL_INTR_MSK_A { + pub const fn variant(&self) -> GlblIntrMsk { match self.bits { - false => GLBL_INTR_MSK_A::VALUE1, - true => GLBL_INTR_MSK_A::VALUE2, + false => GlblIntrMsk::Value1, + true => GlblIntrMsk::Value2, } } #[doc = "Mask the interrupt assertion to the application."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GLBL_INTR_MSK_A::VALUE1 + *self == GlblIntrMsk::Value1 } #[doc = "Unmask the interrupt assertion to the application."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GLBL_INTR_MSK_A::VALUE2 + *self == GlblIntrMsk::Value2 } } #[doc = "Field `GlblIntrMsk` writer - Global Interrupt Mask"] -pub type GLBL_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG, GLBL_INTR_MSK_A>; -impl<'a, REG> GLBL_INTR_MSK_W<'a, REG> +pub type GlblIntrMskW<'a, REG> = crate::BitWriter<'a, REG, GlblIntrMsk>; +impl<'a, REG> GlblIntrMskW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Mask the interrupt assertion to the application."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GLBL_INTR_MSK_A::VALUE1) + self.variant(GlblIntrMsk::Value1) } #[doc = "Unmask the interrupt assertion to the application."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GLBL_INTR_MSK_A::VALUE2) + self.variant(GlblIntrMsk::Value2) } } -#[doc = "Field `HBstLen` reader - Burst Length/Type"] -pub type HBST_LEN_R = crate::FieldReader; #[doc = "Burst Length/Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HBST_LEN_A { +pub enum HbstLen { #[doc = "0: Single"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: INCR"] - VALUE2 = 1, + Value2 = 1, #[doc = "3: INCR4"] - VALUE3 = 3, + Value3 = 3, #[doc = "5: INCR8"] - VALUE4 = 5, + Value4 = 5, #[doc = "7: INCR16"] - VALUE5 = 7, + Value5 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HBST_LEN_A) -> Self { + fn from(variant: HbstLen) -> Self { variant as _ } } -impl crate::FieldSpec for HBST_LEN_A { +impl crate::FieldSpec for HbstLen { type Ux = u8; } -impl HBST_LEN_R { +#[doc = "Field `HBstLen` reader - Burst Length/Type"] +pub type HbstLenR = crate::FieldReader; +impl HbstLenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HBST_LEN_A::VALUE1), - 1 => Some(HBST_LEN_A::VALUE2), - 3 => Some(HBST_LEN_A::VALUE3), - 5 => Some(HBST_LEN_A::VALUE4), - 7 => Some(HBST_LEN_A::VALUE5), + 0 => Some(HbstLen::Value1), + 1 => Some(HbstLen::Value2), + 3 => Some(HbstLen::Value3), + 5 => Some(HbstLen::Value4), + 7 => Some(HbstLen::Value5), _ => None, } } #[doc = "Single"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HBST_LEN_A::VALUE1 + *self == HbstLen::Value1 } #[doc = "INCR"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HBST_LEN_A::VALUE2 + *self == HbstLen::Value2 } #[doc = "INCR4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HBST_LEN_A::VALUE3 + *self == HbstLen::Value3 } #[doc = "INCR8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HBST_LEN_A::VALUE4 + *self == HbstLen::Value4 } #[doc = "INCR16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == HBST_LEN_A::VALUE5 + *self == HbstLen::Value5 } } #[doc = "Field `HBstLen` writer - Burst Length/Type"] -pub type HBST_LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4, HBST_LEN_A>; -impl<'a, REG> HBST_LEN_W<'a, REG> +pub type HbstLenW<'a, REG> = crate::FieldWriter<'a, REG, 4, HbstLen>; +impl<'a, REG> HbstLenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -130,334 +130,325 @@ where #[doc = "Single"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HBST_LEN_A::VALUE1) + self.variant(HbstLen::Value1) } #[doc = "INCR"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HBST_LEN_A::VALUE2) + self.variant(HbstLen::Value2) } #[doc = "INCR4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HBST_LEN_A::VALUE3) + self.variant(HbstLen::Value3) } #[doc = "INCR8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(HBST_LEN_A::VALUE4) + self.variant(HbstLen::Value4) } #[doc = "INCR16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(HBST_LEN_A::VALUE5) + self.variant(HbstLen::Value5) } } -#[doc = "Field `DMAEn` reader - DMA Enable"] -pub type DMAEN_R = crate::BitReader; #[doc = "DMA Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DMAEN_A { +pub enum Dmaen { #[doc = "0: Core operates in Slave mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Core operates in a DMA mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DMAEN_A) -> Self { + fn from(variant: Dmaen) -> Self { variant as u8 != 0 } } -impl DMAEN_R { +#[doc = "Field `DMAEn` reader - DMA Enable"] +pub type DmaenR = crate::BitReader; +impl DmaenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DMAEN_A { + pub const fn variant(&self) -> Dmaen { match self.bits { - false => DMAEN_A::VALUE1, - true => DMAEN_A::VALUE2, + false => Dmaen::Value1, + true => Dmaen::Value2, } } #[doc = "Core operates in Slave mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMAEN_A::VALUE1 + *self == Dmaen::Value1 } #[doc = "Core operates in a DMA mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMAEN_A::VALUE2 + *self == Dmaen::Value2 } } #[doc = "Field `DMAEn` writer - DMA Enable"] -pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG, DMAEN_A>; -impl<'a, REG> DMAEN_W<'a, REG> +pub type DmaenW<'a, REG> = crate::BitWriter<'a, REG, Dmaen>; +impl<'a, REG> DmaenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Core operates in Slave mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMAEN_A::VALUE1) + self.variant(Dmaen::Value1) } #[doc = "Core operates in a DMA mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMAEN_A::VALUE2) + self.variant(Dmaen::Value2) } } -#[doc = "Field `NPTxFEmpLvl` reader - Non-Periodic TxFIFO Empty Level"] -pub type NPTX_FEMP_LVL_R = crate::BitReader; #[doc = "Non-Periodic TxFIFO Empty Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NPTX_FEMP_LVL_A { +pub enum NptxFempLvl { #[doc = "0: DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NPTX_FEMP_LVL_A) -> Self { + fn from(variant: NptxFempLvl) -> Self { variant as u8 != 0 } } -impl NPTX_FEMP_LVL_R { +#[doc = "Field `NPTxFEmpLvl` reader - Non-Periodic TxFIFO Empty Level"] +pub type NptxFempLvlR = crate::BitReader; +impl NptxFempLvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NPTX_FEMP_LVL_A { + pub const fn variant(&self) -> NptxFempLvl { match self.bits { - false => NPTX_FEMP_LVL_A::VALUE1, - true => NPTX_FEMP_LVL_A::VALUE2, + false => NptxFempLvl::Value1, + true => NptxFempLvl::Value2, } } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NPTX_FEMP_LVL_A::VALUE1 + *self == NptxFempLvl::Value1 } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NPTX_FEMP_LVL_A::VALUE2 + *self == NptxFempLvl::Value2 } } #[doc = "Field `NPTxFEmpLvl` writer - Non-Periodic TxFIFO Empty Level"] -pub type NPTX_FEMP_LVL_W<'a, REG> = crate::BitWriter<'a, REG, NPTX_FEMP_LVL_A>; -impl<'a, REG> NPTX_FEMP_LVL_W<'a, REG> +pub type NptxFempLvlW<'a, REG> = crate::BitWriter<'a, REG, NptxFempLvl>; +impl<'a, REG> NptxFempLvlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NPTX_FEMP_LVL_A::VALUE1) + self.variant(NptxFempLvl::Value1) } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NPTX_FEMP_LVL_A::VALUE2) + self.variant(NptxFempLvl::Value2) } } -#[doc = "Field `PTxFEmpLvl` reader - Periodic TxFIFO Empty Level"] -pub type PTX_FEMP_LVL_R = crate::BitReader; #[doc = "Periodic TxFIFO Empty Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PTX_FEMP_LVL_A { +pub enum PtxFempLvl { #[doc = "0: GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is half empty"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is completely empty"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PTX_FEMP_LVL_A) -> Self { + fn from(variant: PtxFempLvl) -> Self { variant as u8 != 0 } } -impl PTX_FEMP_LVL_R { +#[doc = "Field `PTxFEmpLvl` reader - Periodic TxFIFO Empty Level"] +pub type PtxFempLvlR = crate::BitReader; +impl PtxFempLvlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PTX_FEMP_LVL_A { + pub const fn variant(&self) -> PtxFempLvl { match self.bits { - false => PTX_FEMP_LVL_A::VALUE1, - true => PTX_FEMP_LVL_A::VALUE2, + false => PtxFempLvl::Value1, + true => PtxFempLvl::Value2, } } #[doc = "GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is half empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PTX_FEMP_LVL_A::VALUE1 + *self == PtxFempLvl::Value1 } #[doc = "GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is completely empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PTX_FEMP_LVL_A::VALUE2 + *self == PtxFempLvl::Value2 } } #[doc = "Field `PTxFEmpLvl` writer - Periodic TxFIFO Empty Level"] -pub type PTX_FEMP_LVL_W<'a, REG> = crate::BitWriter<'a, REG, PTX_FEMP_LVL_A>; -impl<'a, REG> PTX_FEMP_LVL_W<'a, REG> +pub type PtxFempLvlW<'a, REG> = crate::BitWriter<'a, REG, PtxFempLvl>; +impl<'a, REG> PtxFempLvlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is half empty"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PTX_FEMP_LVL_A::VALUE1) + self.variant(PtxFempLvl::Value1) } #[doc = "GINTSTS.PTxFEmp interrupt indicates that the Periodic TxFIFO is completely empty"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PTX_FEMP_LVL_A::VALUE2) + self.variant(PtxFempLvl::Value2) } } -#[doc = "Field `AHBSingle` reader - AHB Single Support"] -pub type AHBSINGLE_R = crate::BitReader; #[doc = "AHB Single Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AHBSINGLE_A { +pub enum Ahbsingle { #[doc = "0: The remaining data in a transfer is sent using INCR burst size. This is the default mode."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The remaining data in a transfer is sent using single burst size."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AHBSINGLE_A) -> Self { + fn from(variant: Ahbsingle) -> Self { variant as u8 != 0 } } -impl AHBSINGLE_R { +#[doc = "Field `AHBSingle` reader - AHB Single Support"] +pub type AhbsingleR = crate::BitReader; +impl AhbsingleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AHBSINGLE_A { + pub const fn variant(&self) -> Ahbsingle { match self.bits { - false => AHBSINGLE_A::VALUE1, - true => AHBSINGLE_A::VALUE2, + false => Ahbsingle::Value1, + true => Ahbsingle::Value2, } } #[doc = "The remaining data in a transfer is sent using INCR burst size. This is the default mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AHBSINGLE_A::VALUE1 + *self == Ahbsingle::Value1 } #[doc = "The remaining data in a transfer is sent using single burst size."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AHBSINGLE_A::VALUE2 + *self == Ahbsingle::Value2 } } #[doc = "Field `AHBSingle` writer - AHB Single Support"] -pub type AHBSINGLE_W<'a, REG> = crate::BitWriter<'a, REG, AHBSINGLE_A>; -impl<'a, REG> AHBSINGLE_W<'a, REG> +pub type AhbsingleW<'a, REG> = crate::BitWriter<'a, REG, Ahbsingle>; +impl<'a, REG> AhbsingleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The remaining data in a transfer is sent using INCR burst size. This is the default mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AHBSINGLE_A::VALUE1) + self.variant(Ahbsingle::Value1) } #[doc = "The remaining data in a transfer is sent using single burst size."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AHBSINGLE_A::VALUE2) + self.variant(Ahbsingle::Value2) } } impl R { #[doc = "Bit 0 - Global Interrupt Mask"] #[inline(always)] - pub fn glbl_intr_msk(&self) -> GLBL_INTR_MSK_R { - GLBL_INTR_MSK_R::new((self.bits & 1) != 0) + pub fn glbl_intr_msk(&self) -> GlblIntrMskR { + GlblIntrMskR::new((self.bits & 1) != 0) } #[doc = "Bits 1:4 - Burst Length/Type"] #[inline(always)] - pub fn hbst_len(&self) -> HBST_LEN_R { - HBST_LEN_R::new(((self.bits >> 1) & 0x0f) as u8) + pub fn hbst_len(&self) -> HbstLenR { + HbstLenR::new(((self.bits >> 1) & 0x0f) as u8) } #[doc = "Bit 5 - DMA Enable"] #[inline(always)] - pub fn dmaen(&self) -> DMAEN_R { - DMAEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dmaen(&self) -> DmaenR { + DmaenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"] #[inline(always)] - pub fn nptx_femp_lvl(&self) -> NPTX_FEMP_LVL_R { - NPTX_FEMP_LVL_R::new(((self.bits >> 7) & 1) != 0) + pub fn nptx_femp_lvl(&self) -> NptxFempLvlR { + NptxFempLvlR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Periodic TxFIFO Empty Level"] #[inline(always)] - pub fn ptx_femp_lvl(&self) -> PTX_FEMP_LVL_R { - PTX_FEMP_LVL_R::new(((self.bits >> 8) & 1) != 0) + pub fn ptx_femp_lvl(&self) -> PtxFempLvlR { + PtxFempLvlR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 23 - AHB Single Support"] #[inline(always)] - pub fn ahbsingle(&self) -> AHBSINGLE_R { - AHBSINGLE_R::new(((self.bits >> 23) & 1) != 0) + pub fn ahbsingle(&self) -> AhbsingleR { + AhbsingleR::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - Global Interrupt Mask"] #[inline(always)] #[must_use] - pub fn glbl_intr_msk(&mut self) -> GLBL_INTR_MSK_W { - GLBL_INTR_MSK_W::new(self, 0) + pub fn glbl_intr_msk(&mut self) -> GlblIntrMskW { + GlblIntrMskW::new(self, 0) } #[doc = "Bits 1:4 - Burst Length/Type"] #[inline(always)] #[must_use] - pub fn hbst_len(&mut self) -> HBST_LEN_W { - HBST_LEN_W::new(self, 1) + pub fn hbst_len(&mut self) -> HbstLenW { + HbstLenW::new(self, 1) } #[doc = "Bit 5 - DMA Enable"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DMAEN_W { - DMAEN_W::new(self, 5) + pub fn dmaen(&mut self) -> DmaenW { + DmaenW::new(self, 5) } #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"] #[inline(always)] #[must_use] - pub fn nptx_femp_lvl(&mut self) -> NPTX_FEMP_LVL_W { - NPTX_FEMP_LVL_W::new(self, 7) + pub fn nptx_femp_lvl(&mut self) -> NptxFempLvlW { + NptxFempLvlW::new(self, 7) } #[doc = "Bit 8 - Periodic TxFIFO Empty Level"] #[inline(always)] #[must_use] - pub fn ptx_femp_lvl(&mut self) -> PTX_FEMP_LVL_W { - PTX_FEMP_LVL_W::new(self, 8) + pub fn ptx_femp_lvl(&mut self) -> PtxFempLvlW { + PtxFempLvlW::new(self, 8) } #[doc = "Bit 23 - AHB Single Support"] #[inline(always)] #[must_use] - pub fn ahbsingle(&mut self) -> AHBSINGLE_W { - AHBSINGLE_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ahbsingle(&mut self) -> AhbsingleW { + AhbsingleW::new(self, 23) } } #[doc = "AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GAHBCFG_SPEC; -impl crate::RegisterSpec for GAHBCFG_SPEC { +pub struct GahbcfgSpec; +impl crate::RegisterSpec for GahbcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`gahbcfg::R`](R) reader structure"] -impl crate::Readable for GAHBCFG_SPEC {} +impl crate::Readable for GahbcfgSpec {} #[doc = "`write(|w| ..)` method takes [`gahbcfg::W`](W) writer structure"] -impl crate::Writable for GAHBCFG_SPEC { +impl crate::Writable for GahbcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GAHBCFG to value 0"] -impl crate::Resettable for GAHBCFG_SPEC { +impl crate::Resettable for GahbcfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/gdfifocfg.rs b/src/usb0/gdfifocfg.rs index 0b417feb..c33dd908 100644 --- a/src/usb0/gdfifocfg.rs +++ b/src/usb0/gdfifocfg.rs @@ -1,64 +1,55 @@ #[doc = "Register `GDFIFOCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GDFIFOCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `GDFIFOCfg` reader - GDFIFOCfg"] -pub type GDFIFOCFG_R = crate::FieldReader; +pub type GdfifocfgR = crate::FieldReader; #[doc = "Field `GDFIFOCfg` writer - GDFIFOCfg"] -pub type GDFIFOCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type GdfifocfgW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `EPInfoBaseAddr` reader - EPInfoBaseAddr"] -pub type EPINFO_BASE_ADDR_R = crate::FieldReader; +pub type EpinfoBaseAddrR = crate::FieldReader; #[doc = "Field `EPInfoBaseAddr` writer - EPInfoBaseAddr"] -pub type EPINFO_BASE_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type EpinfoBaseAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - GDFIFOCfg"] #[inline(always)] - pub fn gdfifocfg(&self) -> GDFIFOCFG_R { - GDFIFOCFG_R::new((self.bits & 0xffff) as u16) + pub fn gdfifocfg(&self) -> GdfifocfgR { + GdfifocfgR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - EPInfoBaseAddr"] #[inline(always)] - pub fn epinfo_base_addr(&self) -> EPINFO_BASE_ADDR_R { - EPINFO_BASE_ADDR_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn epinfo_base_addr(&self) -> EpinfoBaseAddrR { + EpinfoBaseAddrR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - GDFIFOCfg"] #[inline(always)] #[must_use] - pub fn gdfifocfg(&mut self) -> GDFIFOCFG_W { - GDFIFOCFG_W::new(self, 0) + pub fn gdfifocfg(&mut self) -> GdfifocfgW { + GdfifocfgW::new(self, 0) } #[doc = "Bits 16:31 - EPInfoBaseAddr"] #[inline(always)] #[must_use] - pub fn epinfo_base_addr(&mut self) -> EPINFO_BASE_ADDR_W { - EPINFO_BASE_ADDR_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epinfo_base_addr(&mut self) -> EpinfoBaseAddrW { + EpinfoBaseAddrW::new(self, 16) } } #[doc = "Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GDFIFOCFG_SPEC; -impl crate::RegisterSpec for GDFIFOCFG_SPEC { +pub struct GdfifocfgSpec; +impl crate::RegisterSpec for GdfifocfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`gdfifocfg::R`](R) reader structure"] -impl crate::Readable for GDFIFOCFG_SPEC {} +impl crate::Readable for GdfifocfgSpec {} #[doc = "`write(|w| ..)` method takes [`gdfifocfg::W`](W) writer structure"] -impl crate::Writable for GDFIFOCFG_SPEC { +impl crate::Writable for GdfifocfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GDFIFOCFG to value 0x027a_02b2"] -impl crate::Resettable for GDFIFOCFG_SPEC { +impl crate::Resettable for GdfifocfgSpec { const RESET_VALUE: u32 = 0x027a_02b2; } diff --git a/src/usb0/gintmsk_devicemode.rs b/src/usb0/gintmsk_devicemode.rs index 15f5f5db..c11c69ff 100644 --- a/src/usb0/gintmsk_devicemode.rs +++ b/src/usb0/gintmsk_devicemode.rs @@ -1,334 +1,325 @@ #[doc = "Register `GINTMSK_DEVICEMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTMSK_DEVICEMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ModeMisMsk` reader - Mode Mismatch Interrupt Mask"] -pub type MODE_MIS_MSK_R = crate::BitReader; +pub type ModeMisMskR = crate::BitReader; #[doc = "Field `ModeMisMsk` writer - Mode Mismatch Interrupt Mask"] -pub type MODE_MIS_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ModeMisMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGIntMsk` reader - OTG Interrupt Mask"] -pub type OTGINT_MSK_R = crate::BitReader; +pub type OtgintMskR = crate::BitReader; #[doc = "Field `OTGIntMsk` writer - OTG Interrupt Mask"] -pub type OTGINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OtgintMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SofMsk` reader - Start of Frame Mask"] -pub type SOF_MSK_R = crate::BitReader; +pub type SofMskR = crate::BitReader; #[doc = "Field `SofMsk` writer - Start of Frame Mask"] -pub type SOF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SofMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvlMsk` reader - Receive FIFO Non-Empty Mask"] -pub type RX_FLVL_MSK_R = crate::BitReader; +pub type RxFlvlMskR = crate::BitReader; #[doc = "Field `RxFLvlMsk` writer - Receive FIFO Non-Empty Mask"] -pub type RX_FLVL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxFlvlMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINNakEffMsk` reader - Global Non-periodic IN NAK Effective Mask"] -pub type GINNAK_EFF_MSK_R = crate::BitReader; +pub type GinnakEffMskR = crate::BitReader; #[doc = "Field `GINNakEffMsk` writer - Global Non-periodic IN NAK Effective Mask"] -pub type GINNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type GinnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GOUTNakEffMsk` reader - Global OUT NAK Effective Mask"] -pub type GOUTNAK_EFF_MSK_R = crate::BitReader; +pub type GoutnakEffMskR = crate::BitReader; #[doc = "Field `GOUTNakEffMsk` writer - Global OUT NAK Effective Mask"] -pub type GOUTNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type GoutnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ErlySuspMsk` reader - Early Suspend Mask"] -pub type ERLY_SUSP_MSK_R = crate::BitReader; +pub type ErlySuspMskR = crate::BitReader; #[doc = "Field `ErlySuspMsk` writer - Early Suspend Mask"] -pub type ERLY_SUSP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ErlySuspMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSuspMsk` reader - USB Suspend Mask"] -pub type USBSUSP_MSK_R = crate::BitReader; +pub type UsbsuspMskR = crate::BitReader; #[doc = "Field `USBSuspMsk` writer - USB Suspend Mask"] -pub type USBSUSP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsbsuspMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRstMsk` reader - USB Reset Mask"] -pub type USBRST_MSK_R = crate::BitReader; +pub type UsbrstMskR = crate::BitReader; #[doc = "Field `USBRstMsk` writer - USB Reset Mask"] -pub type USBRST_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsbrstMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EnumDoneMsk` reader - Enumeration Done Mask"] -pub type ENUM_DONE_MSK_R = crate::BitReader; +pub type EnumDoneMskR = crate::BitReader; #[doc = "Field `EnumDoneMsk` writer - Enumeration Done Mask"] -pub type ENUM_DONE_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnumDoneMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOOutDropMsk` reader - Isochronous OUT Packet Dropped Interrupt Mask"] -pub type ISOOUT_DROP_MSK_R = crate::BitReader; +pub type IsooutDropMskR = crate::BitReader; #[doc = "Field `ISOOutDropMsk` writer - Isochronous OUT Packet Dropped Interrupt Mask"] -pub type ISOOUT_DROP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IsooutDropMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPFMsk` reader - End of Periodic Frame Interrupt Mask"] -pub type EOPFMSK_R = crate::BitReader; +pub type EopfmskR = crate::BitReader; #[doc = "Field `EOPFMsk` writer - End of Periodic Frame Interrupt Mask"] -pub type EOPFMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EopfmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPIntMsk` reader - IN Endpoints Interrupt Mask"] -pub type IEPINT_MSK_R = crate::BitReader; +pub type IepintMskR = crate::BitReader; #[doc = "Field `IEPIntMsk` writer - IN Endpoints Interrupt Mask"] -pub type IEPINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IepintMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEPIntMsk` reader - OUT Endpoints Interrupt Mask"] -pub type OEPINT_MSK_R = crate::BitReader; +pub type OepintMskR = crate::BitReader; #[doc = "Field `OEPIntMsk` writer - OUT Endpoints Interrupt Mask"] -pub type OEPINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OepintMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incompISOINMsk` reader - Incomplete Isochronous IN Transfer Mask"] -pub type INCOMP_ISOINMSK_R = crate::BitReader; +pub type IncompIsoinmskR = crate::BitReader; #[doc = "Field `incompISOINMsk` writer - Incomplete Isochronous IN Transfer Mask"] -pub type INCOMP_ISOINMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncompIsoinmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incomplSOOUTMsk` reader - Incomplete Isochronous OUT Transfer Mask"] -pub type INCOMPL_SOOUTMSK_R = crate::BitReader; +pub type IncomplSooutmskR = crate::BitReader; #[doc = "Field `incomplSOOUTMsk` writer - Incomplete Isochronous OUT Transfer Mask"] -pub type INCOMPL_SOOUTMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncomplSooutmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ConIDStsChngMsk` reader - Connector ID Status Change Mask"] -pub type CON_IDSTS_CHNG_MSK_R = crate::BitReader; +pub type ConIdstsChngMskR = crate::BitReader; #[doc = "Field `ConIDStsChngMsk` writer - Connector ID Status Change Mask"] -pub type CON_IDSTS_CHNG_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ConIdstsChngMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DisconnIntMsk` reader - Disconnect Detected Interrupt Mask"] -pub type DISCONN_INT_MSK_R = crate::BitReader; +pub type DisconnIntMskR = crate::BitReader; #[doc = "Field `DisconnIntMsk` writer - Disconnect Detected Interrupt Mask"] -pub type DISCONN_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisconnIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SessReqIntMsk` reader - Session Request/New Session Detected Interrupt Mask"] -pub type SESS_REQ_INT_MSK_R = crate::BitReader; +pub type SessReqIntMskR = crate::BitReader; #[doc = "Field `SessReqIntMsk` writer - Session Request/New Session Detected Interrupt Mask"] -pub type SESS_REQ_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SessReqIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpIntMsk` reader - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WK_UP_INT_MSK_R = crate::BitReader; +pub type WkUpIntMskR = crate::BitReader; #[doc = "Field `WkUpIntMsk` writer - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WK_UP_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type WkUpIntMskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] - pub fn mode_mis_msk(&self) -> MODE_MIS_MSK_R { - MODE_MIS_MSK_R::new(((self.bits >> 1) & 1) != 0) + pub fn mode_mis_msk(&self) -> ModeMisMskR { + ModeMisMskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] - pub fn otgint_msk(&self) -> OTGINT_MSK_R { - OTGINT_MSK_R::new(((self.bits >> 2) & 1) != 0) + pub fn otgint_msk(&self) -> OtgintMskR { + OtgintMskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] - pub fn sof_msk(&self) -> SOF_MSK_R { - SOF_MSK_R::new(((self.bits >> 3) & 1) != 0) + pub fn sof_msk(&self) -> SofMskR { + SofMskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] - pub fn rx_flvl_msk(&self) -> RX_FLVL_MSK_R { - RX_FLVL_MSK_R::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl_msk(&self) -> RxFlvlMskR { + RxFlvlMskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"] #[inline(always)] - pub fn ginnak_eff_msk(&self) -> GINNAK_EFF_MSK_R { - GINNAK_EFF_MSK_R::new(((self.bits >> 6) & 1) != 0) + pub fn ginnak_eff_msk(&self) -> GinnakEffMskR { + GinnakEffMskR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Global OUT NAK Effective Mask"] #[inline(always)] - pub fn goutnak_eff_msk(&self) -> GOUTNAK_EFF_MSK_R { - GOUTNAK_EFF_MSK_R::new(((self.bits >> 7) & 1) != 0) + pub fn goutnak_eff_msk(&self) -> GoutnakEffMskR { + GoutnakEffMskR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Early Suspend Mask"] #[inline(always)] - pub fn erly_susp_msk(&self) -> ERLY_SUSP_MSK_R { - ERLY_SUSP_MSK_R::new(((self.bits >> 10) & 1) != 0) + pub fn erly_susp_msk(&self) -> ErlySuspMskR { + ErlySuspMskR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USB Suspend Mask"] #[inline(always)] - pub fn usbsusp_msk(&self) -> USBSUSP_MSK_R { - USBSUSP_MSK_R::new(((self.bits >> 11) & 1) != 0) + pub fn usbsusp_msk(&self) -> UsbsuspMskR { + UsbsuspMskR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - USB Reset Mask"] #[inline(always)] - pub fn usbrst_msk(&self) -> USBRST_MSK_R { - USBRST_MSK_R::new(((self.bits >> 12) & 1) != 0) + pub fn usbrst_msk(&self) -> UsbrstMskR { + UsbrstMskR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enumeration Done Mask"] #[inline(always)] - pub fn enum_done_msk(&self) -> ENUM_DONE_MSK_R { - ENUM_DONE_MSK_R::new(((self.bits >> 13) & 1) != 0) + pub fn enum_done_msk(&self) -> EnumDoneMskR { + EnumDoneMskR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"] #[inline(always)] - pub fn isoout_drop_msk(&self) -> ISOOUT_DROP_MSK_R { - ISOOUT_DROP_MSK_R::new(((self.bits >> 14) & 1) != 0) + pub fn isoout_drop_msk(&self) -> IsooutDropMskR { + IsooutDropMskR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"] #[inline(always)] - pub fn eopfmsk(&self) -> EOPFMSK_R { - EOPFMSK_R::new(((self.bits >> 15) & 1) != 0) + pub fn eopfmsk(&self) -> EopfmskR { + EopfmskR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 18 - IN Endpoints Interrupt Mask"] #[inline(always)] - pub fn iepint_msk(&self) -> IEPINT_MSK_R { - IEPINT_MSK_R::new(((self.bits >> 18) & 1) != 0) + pub fn iepint_msk(&self) -> IepintMskR { + IepintMskR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"] #[inline(always)] - pub fn oepint_msk(&self) -> OEPINT_MSK_R { - OEPINT_MSK_R::new(((self.bits >> 19) & 1) != 0) + pub fn oepint_msk(&self) -> OepintMskR { + OepintMskR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"] #[inline(always)] - pub fn incomp_isoinmsk(&self) -> INCOMP_ISOINMSK_R { - INCOMP_ISOINMSK_R::new(((self.bits >> 20) & 1) != 0) + pub fn incomp_isoinmsk(&self) -> IncompIsoinmskR { + IncompIsoinmskR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"] #[inline(always)] - pub fn incompl_sooutmsk(&self) -> INCOMPL_SOOUTMSK_R { - INCOMPL_SOOUTMSK_R::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_sooutmsk(&self) -> IncomplSooutmskR { + IncomplSooutmskR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] - pub fn con_idsts_chng_msk(&self) -> CON_IDSTS_CHNG_MSK_R { - CON_IDSTS_CHNG_MSK_R::new(((self.bits >> 28) & 1) != 0) + pub fn con_idsts_chng_msk(&self) -> ConIdstsChngMskR { + ConIdstsChngMskR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] - pub fn disconn_int_msk(&self) -> DISCONN_INT_MSK_R { - DISCONN_INT_MSK_R::new(((self.bits >> 29) & 1) != 0) + pub fn disconn_int_msk(&self) -> DisconnIntMskR { + DisconnIntMskR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] - pub fn sess_req_int_msk(&self) -> SESS_REQ_INT_MSK_R { - SESS_REQ_INT_MSK_R::new(((self.bits >> 30) & 1) != 0) + pub fn sess_req_int_msk(&self) -> SessReqIntMskR { + SessReqIntMskR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] - pub fn wk_up_int_msk(&self) -> WK_UP_INT_MSK_R { - WK_UP_INT_MSK_R::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int_msk(&self) -> WkUpIntMskR { + WkUpIntMskR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mode_mis_msk(&mut self) -> MODE_MIS_MSK_W { - MODE_MIS_MSK_W::new(self, 1) + pub fn mode_mis_msk(&mut self) -> ModeMisMskW { + ModeMisMskW::new(self, 1) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] #[must_use] - pub fn otgint_msk(&mut self) -> OTGINT_MSK_W { - OTGINT_MSK_W::new(self, 2) + pub fn otgint_msk(&mut self) -> OtgintMskW { + OtgintMskW::new(self, 2) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] #[must_use] - pub fn sof_msk(&mut self) -> SOF_MSK_W { - SOF_MSK_W::new(self, 3) + pub fn sof_msk(&mut self) -> SofMskW { + SofMskW::new(self, 3) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] #[must_use] - pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W { - RX_FLVL_MSK_W::new(self, 4) + pub fn rx_flvl_msk(&mut self) -> RxFlvlMskW { + RxFlvlMskW::new(self, 4) } #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn ginnak_eff_msk(&mut self) -> GINNAK_EFF_MSK_W { - GINNAK_EFF_MSK_W::new(self, 6) + pub fn ginnak_eff_msk(&mut self) -> GinnakEffMskW { + GinnakEffMskW::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn goutnak_eff_msk(&mut self) -> GOUTNAK_EFF_MSK_W { - GOUTNAK_EFF_MSK_W::new(self, 7) + pub fn goutnak_eff_msk(&mut self) -> GoutnakEffMskW { + GoutnakEffMskW::new(self, 7) } #[doc = "Bit 10 - Early Suspend Mask"] #[inline(always)] #[must_use] - pub fn erly_susp_msk(&mut self) -> ERLY_SUSP_MSK_W { - ERLY_SUSP_MSK_W::new(self, 10) + pub fn erly_susp_msk(&mut self) -> ErlySuspMskW { + ErlySuspMskW::new(self, 10) } #[doc = "Bit 11 - USB Suspend Mask"] #[inline(always)] #[must_use] - pub fn usbsusp_msk(&mut self) -> USBSUSP_MSK_W { - USBSUSP_MSK_W::new(self, 11) + pub fn usbsusp_msk(&mut self) -> UsbsuspMskW { + UsbsuspMskW::new(self, 11) } #[doc = "Bit 12 - USB Reset Mask"] #[inline(always)] #[must_use] - pub fn usbrst_msk(&mut self) -> USBRST_MSK_W { - USBRST_MSK_W::new(self, 12) + pub fn usbrst_msk(&mut self) -> UsbrstMskW { + UsbrstMskW::new(self, 12) } #[doc = "Bit 13 - Enumeration Done Mask"] #[inline(always)] #[must_use] - pub fn enum_done_msk(&mut self) -> ENUM_DONE_MSK_W { - ENUM_DONE_MSK_W::new(self, 13) + pub fn enum_done_msk(&mut self) -> EnumDoneMskW { + EnumDoneMskW::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"] #[inline(always)] #[must_use] - pub fn isoout_drop_msk(&mut self) -> ISOOUT_DROP_MSK_W { - ISOOUT_DROP_MSK_W::new(self, 14) + pub fn isoout_drop_msk(&mut self) -> IsooutDropMskW { + IsooutDropMskW::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"] #[inline(always)] #[must_use] - pub fn eopfmsk(&mut self) -> EOPFMSK_W { - EOPFMSK_W::new(self, 15) + pub fn eopfmsk(&mut self) -> EopfmskW { + EopfmskW::new(self, 15) } #[doc = "Bit 18 - IN Endpoints Interrupt Mask"] #[inline(always)] #[must_use] - pub fn iepint_msk(&mut self) -> IEPINT_MSK_W { - IEPINT_MSK_W::new(self, 18) + pub fn iepint_msk(&mut self) -> IepintMskW { + IepintMskW::new(self, 18) } #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"] #[inline(always)] #[must_use] - pub fn oepint_msk(&mut self) -> OEPINT_MSK_W { - OEPINT_MSK_W::new(self, 19) + pub fn oepint_msk(&mut self) -> OepintMskW { + OepintMskW::new(self, 19) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"] #[inline(always)] #[must_use] - pub fn incomp_isoinmsk(&mut self) -> INCOMP_ISOINMSK_W { - INCOMP_ISOINMSK_W::new(self, 20) + pub fn incomp_isoinmsk(&mut self) -> IncompIsoinmskW { + IncompIsoinmskW::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"] #[inline(always)] #[must_use] - pub fn incompl_sooutmsk(&mut self) -> INCOMPL_SOOUTMSK_W { - INCOMPL_SOOUTMSK_W::new(self, 21) + pub fn incompl_sooutmsk(&mut self) -> IncomplSooutmskW { + IncomplSooutmskW::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] #[must_use] - pub fn con_idsts_chng_msk(&mut self) -> CON_IDSTS_CHNG_MSK_W { - CON_IDSTS_CHNG_MSK_W::new(self, 28) + pub fn con_idsts_chng_msk(&mut self) -> ConIdstsChngMskW { + ConIdstsChngMskW::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn disconn_int_msk(&mut self) -> DISCONN_INT_MSK_W { - DISCONN_INT_MSK_W::new(self, 29) + pub fn disconn_int_msk(&mut self) -> DisconnIntMskW { + DisconnIntMskW::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn sess_req_int_msk(&mut self) -> SESS_REQ_INT_MSK_W { - SESS_REQ_INT_MSK_W::new(self, 30) + pub fn sess_req_int_msk(&mut self) -> SessReqIntMskW { + SessReqIntMskW::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W { - WK_UP_INT_MSK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wk_up_int_msk(&mut self) -> WkUpIntMskW { + WkUpIntMskW::new(self, 31) } } #[doc = "Interrupt Mask Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GINTMSK_DEVICEMODE_SPEC; -impl crate::RegisterSpec for GINTMSK_DEVICEMODE_SPEC { +pub struct GintmskDevicemodeSpec; +impl crate::RegisterSpec for GintmskDevicemodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gintmsk_devicemode::R`](R) reader structure"] -impl crate::Readable for GINTMSK_DEVICEMODE_SPEC {} +impl crate::Readable for GintmskDevicemodeSpec {} #[doc = "`write(|w| ..)` method takes [`gintmsk_devicemode::W`](W) writer structure"] -impl crate::Writable for GINTMSK_DEVICEMODE_SPEC { +impl crate::Writable for GintmskDevicemodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTMSK_DEVICEMODE to value 0"] -impl crate::Resettable for GINTMSK_DEVICEMODE_SPEC { +impl crate::Resettable for GintmskDevicemodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/gintmsk_hostmode.rs b/src/usb0/gintmsk_hostmode.rs index 5c3af92e..66e421ee 100644 --- a/src/usb0/gintmsk_hostmode.rs +++ b/src/usb0/gintmsk_hostmode.rs @@ -1,214 +1,205 @@ #[doc = "Register `GINTMSK_HOSTMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTMSK_HOSTMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ModeMisMsk` reader - Mode Mismatch Interrupt Mask"] -pub type MODE_MIS_MSK_R = crate::BitReader; +pub type ModeMisMskR = crate::BitReader; #[doc = "Field `ModeMisMsk` writer - Mode Mismatch Interrupt Mask"] -pub type MODE_MIS_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ModeMisMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGIntMsk` reader - OTG Interrupt Mask"] -pub type OTGINT_MSK_R = crate::BitReader; +pub type OtgintMskR = crate::BitReader; #[doc = "Field `OTGIntMsk` writer - OTG Interrupt Mask"] -pub type OTGINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OtgintMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SofMsk` reader - Start of Frame Mask"] -pub type SOF_MSK_R = crate::BitReader; +pub type SofMskR = crate::BitReader; #[doc = "Field `SofMsk` writer - Start of Frame Mask"] -pub type SOF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SofMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvlMsk` reader - Receive FIFO Non-Empty Mask"] -pub type RX_FLVL_MSK_R = crate::BitReader; +pub type RxFlvlMskR = crate::BitReader; #[doc = "Field `RxFLvlMsk` writer - Receive FIFO Non-Empty Mask"] -pub type RX_FLVL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxFlvlMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incomplPMsk` reader - Incomplete Periodic Transfer Mask"] -pub type INCOMPL_PMSK_R = crate::BitReader; +pub type IncomplPmskR = crate::BitReader; #[doc = "Field `incomplPMsk` writer - Incomplete Periodic Transfer Mask"] -pub type INCOMPL_PMSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncomplPmskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PrtIntMsk` reader - Host Port Interrupt Mask"] -pub type PRT_INT_MSK_R = crate::BitReader; +pub type PrtIntMskR = crate::BitReader; #[doc = "Field `PrtIntMsk` writer - Host Port Interrupt Mask"] -pub type PRT_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PrtIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HChIntMsk` reader - Host Channels Interrupt Mask"] -pub type HCH_INT_MSK_R = crate::BitReader; +pub type HchIntMskR = crate::BitReader; #[doc = "Field `HChIntMsk` writer - Host Channels Interrupt Mask"] -pub type HCH_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HchIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PTxFEmpMsk` reader - Periodic TxFIFO Empty Mask"] -pub type PTX_FEMP_MSK_R = crate::BitReader; +pub type PtxFempMskR = crate::BitReader; #[doc = "Field `PTxFEmpMsk` writer - Periodic TxFIFO Empty Mask"] -pub type PTX_FEMP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PtxFempMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ConIDStsChngMsk` reader - Connector ID Status Change Mask"] -pub type CON_IDSTS_CHNG_MSK_R = crate::BitReader; +pub type ConIdstsChngMskR = crate::BitReader; #[doc = "Field `ConIDStsChngMsk` writer - Connector ID Status Change Mask"] -pub type CON_IDSTS_CHNG_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ConIdstsChngMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DisconnIntMsk` reader - Disconnect Detected Interrupt Mask"] -pub type DISCONN_INT_MSK_R = crate::BitReader; +pub type DisconnIntMskR = crate::BitReader; #[doc = "Field `DisconnIntMsk` writer - Disconnect Detected Interrupt Mask"] -pub type DISCONN_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisconnIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SessReqIntMsk` reader - Session Request/New Session Detected Interrupt Mask"] -pub type SESS_REQ_INT_MSK_R = crate::BitReader; +pub type SessReqIntMskR = crate::BitReader; #[doc = "Field `SessReqIntMsk` writer - Session Request/New Session Detected Interrupt Mask"] -pub type SESS_REQ_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SessReqIntMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpIntMsk` reader - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WK_UP_INT_MSK_R = crate::BitReader; +pub type WkUpIntMskR = crate::BitReader; #[doc = "Field `WkUpIntMsk` writer - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WK_UP_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type WkUpIntMskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] - pub fn mode_mis_msk(&self) -> MODE_MIS_MSK_R { - MODE_MIS_MSK_R::new(((self.bits >> 1) & 1) != 0) + pub fn mode_mis_msk(&self) -> ModeMisMskR { + ModeMisMskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] - pub fn otgint_msk(&self) -> OTGINT_MSK_R { - OTGINT_MSK_R::new(((self.bits >> 2) & 1) != 0) + pub fn otgint_msk(&self) -> OtgintMskR { + OtgintMskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] - pub fn sof_msk(&self) -> SOF_MSK_R { - SOF_MSK_R::new(((self.bits >> 3) & 1) != 0) + pub fn sof_msk(&self) -> SofMskR { + SofMskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] - pub fn rx_flvl_msk(&self) -> RX_FLVL_MSK_R { - RX_FLVL_MSK_R::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl_msk(&self) -> RxFlvlMskR { + RxFlvlMskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 21 - Incomplete Periodic Transfer Mask"] #[inline(always)] - pub fn incompl_pmsk(&self) -> INCOMPL_PMSK_R { - INCOMPL_PMSK_R::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_pmsk(&self) -> IncomplPmskR { + IncomplPmskR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 24 - Host Port Interrupt Mask"] #[inline(always)] - pub fn prt_int_msk(&self) -> PRT_INT_MSK_R { - PRT_INT_MSK_R::new(((self.bits >> 24) & 1) != 0) + pub fn prt_int_msk(&self) -> PrtIntMskR { + PrtIntMskR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Host Channels Interrupt Mask"] #[inline(always)] - pub fn hch_int_msk(&self) -> HCH_INT_MSK_R { - HCH_INT_MSK_R::new(((self.bits >> 25) & 1) != 0) + pub fn hch_int_msk(&self) -> HchIntMskR { + HchIntMskR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Periodic TxFIFO Empty Mask"] #[inline(always)] - pub fn ptx_femp_msk(&self) -> PTX_FEMP_MSK_R { - PTX_FEMP_MSK_R::new(((self.bits >> 26) & 1) != 0) + pub fn ptx_femp_msk(&self) -> PtxFempMskR { + PtxFempMskR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] - pub fn con_idsts_chng_msk(&self) -> CON_IDSTS_CHNG_MSK_R { - CON_IDSTS_CHNG_MSK_R::new(((self.bits >> 28) & 1) != 0) + pub fn con_idsts_chng_msk(&self) -> ConIdstsChngMskR { + ConIdstsChngMskR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] - pub fn disconn_int_msk(&self) -> DISCONN_INT_MSK_R { - DISCONN_INT_MSK_R::new(((self.bits >> 29) & 1) != 0) + pub fn disconn_int_msk(&self) -> DisconnIntMskR { + DisconnIntMskR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] - pub fn sess_req_int_msk(&self) -> SESS_REQ_INT_MSK_R { - SESS_REQ_INT_MSK_R::new(((self.bits >> 30) & 1) != 0) + pub fn sess_req_int_msk(&self) -> SessReqIntMskR { + SessReqIntMskR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] - pub fn wk_up_int_msk(&self) -> WK_UP_INT_MSK_R { - WK_UP_INT_MSK_R::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int_msk(&self) -> WkUpIntMskR { + WkUpIntMskR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mode_mis_msk(&mut self) -> MODE_MIS_MSK_W { - MODE_MIS_MSK_W::new(self, 1) + pub fn mode_mis_msk(&mut self) -> ModeMisMskW { + ModeMisMskW::new(self, 1) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] #[must_use] - pub fn otgint_msk(&mut self) -> OTGINT_MSK_W { - OTGINT_MSK_W::new(self, 2) + pub fn otgint_msk(&mut self) -> OtgintMskW { + OtgintMskW::new(self, 2) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] #[must_use] - pub fn sof_msk(&mut self) -> SOF_MSK_W { - SOF_MSK_W::new(self, 3) + pub fn sof_msk(&mut self) -> SofMskW { + SofMskW::new(self, 3) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] #[must_use] - pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W { - RX_FLVL_MSK_W::new(self, 4) + pub fn rx_flvl_msk(&mut self) -> RxFlvlMskW { + RxFlvlMskW::new(self, 4) } #[doc = "Bit 21 - Incomplete Periodic Transfer Mask"] #[inline(always)] #[must_use] - pub fn incompl_pmsk(&mut self) -> INCOMPL_PMSK_W { - INCOMPL_PMSK_W::new(self, 21) + pub fn incompl_pmsk(&mut self) -> IncomplPmskW { + IncomplPmskW::new(self, 21) } #[doc = "Bit 24 - Host Port Interrupt Mask"] #[inline(always)] #[must_use] - pub fn prt_int_msk(&mut self) -> PRT_INT_MSK_W { - PRT_INT_MSK_W::new(self, 24) + pub fn prt_int_msk(&mut self) -> PrtIntMskW { + PrtIntMskW::new(self, 24) } #[doc = "Bit 25 - Host Channels Interrupt Mask"] #[inline(always)] #[must_use] - pub fn hch_int_msk(&mut self) -> HCH_INT_MSK_W { - HCH_INT_MSK_W::new(self, 25) + pub fn hch_int_msk(&mut self) -> HchIntMskW { + HchIntMskW::new(self, 25) } #[doc = "Bit 26 - Periodic TxFIFO Empty Mask"] #[inline(always)] #[must_use] - pub fn ptx_femp_msk(&mut self) -> PTX_FEMP_MSK_W { - PTX_FEMP_MSK_W::new(self, 26) + pub fn ptx_femp_msk(&mut self) -> PtxFempMskW { + PtxFempMskW::new(self, 26) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] #[must_use] - pub fn con_idsts_chng_msk(&mut self) -> CON_IDSTS_CHNG_MSK_W { - CON_IDSTS_CHNG_MSK_W::new(self, 28) + pub fn con_idsts_chng_msk(&mut self) -> ConIdstsChngMskW { + ConIdstsChngMskW::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn disconn_int_msk(&mut self) -> DISCONN_INT_MSK_W { - DISCONN_INT_MSK_W::new(self, 29) + pub fn disconn_int_msk(&mut self) -> DisconnIntMskW { + DisconnIntMskW::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn sess_req_int_msk(&mut self) -> SESS_REQ_INT_MSK_W { - SESS_REQ_INT_MSK_W::new(self, 30) + pub fn sess_req_int_msk(&mut self) -> SessReqIntMskW { + SessReqIntMskW::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W { - WK_UP_INT_MSK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wk_up_int_msk(&mut self) -> WkUpIntMskW { + WkUpIntMskW::new(self, 31) } } #[doc = "Interrupt Mask Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GINTMSK_HOSTMODE_SPEC; -impl crate::RegisterSpec for GINTMSK_HOSTMODE_SPEC { +pub struct GintmskHostmodeSpec; +impl crate::RegisterSpec for GintmskHostmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gintmsk_hostmode::R`](R) reader structure"] -impl crate::Readable for GINTMSK_HOSTMODE_SPEC {} +impl crate::Readable for GintmskHostmodeSpec {} #[doc = "`write(|w| ..)` method takes [`gintmsk_hostmode::W`](W) writer structure"] -impl crate::Writable for GINTMSK_HOSTMODE_SPEC { +impl crate::Writable for GintmskHostmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTMSK_HOSTMODE to value 0"] -impl crate::Resettable for GINTMSK_HOSTMODE_SPEC { +impl crate::Resettable for GintmskHostmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/gintsts_devicemode.rs b/src/usb0/gintsts_devicemode.rs index 59e8000e..eec524ba 100644 --- a/src/usb0/gintsts_devicemode.rs +++ b/src/usb0/gintsts_devicemode.rs @@ -1,312 +1,303 @@ #[doc = "Register `GINTSTS_DEVICEMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTSTS_DEVICEMODE` writer"] -pub type W = crate::W; -#[doc = "Field `CurMod` reader - Current Mode of Operation"] -pub type CUR_MOD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Current Mode of Operation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CUR_MOD_A { +pub enum CurMod { #[doc = "0: Device mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Host mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CUR_MOD_A) -> Self { + fn from(variant: CurMod) -> Self { variant as u8 != 0 } } -impl CUR_MOD_R { +#[doc = "Field `CurMod` reader - Current Mode of Operation"] +pub type CurModR = crate::BitReader; +impl CurModR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CUR_MOD_A { + pub const fn variant(&self) -> CurMod { match self.bits { - false => CUR_MOD_A::VALUE1, - true => CUR_MOD_A::VALUE2, + false => CurMod::Value1, + true => CurMod::Value2, } } #[doc = "Device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CUR_MOD_A::VALUE1 + *self == CurMod::Value1 } #[doc = "Host mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CUR_MOD_A::VALUE2 + *self == CurMod::Value2 } } #[doc = "Field `ModeMis` reader - Mode Mismatch Interrupt"] -pub type MODE_MIS_R = crate::BitReader; +pub type ModeMisR = crate::BitReader; #[doc = "Field `ModeMis` writer - Mode Mismatch Interrupt"] -pub type MODE_MIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ModeMisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGInt` reader - OTG Interrupt"] -pub type OTGINT_R = crate::BitReader; +pub type OtgintR = crate::BitReader; #[doc = "Field `Sof` reader - Start of Frame"] -pub type SOF_R = crate::BitReader; +pub type SofR = crate::BitReader; #[doc = "Field `Sof` writer - Start of Frame"] -pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvl` reader - RxFIFO Non-Empty"] -pub type RX_FLVL_R = crate::BitReader; +pub type RxFlvlR = crate::BitReader; #[doc = "Field `GINNakEff` reader - Global IN Non-Periodic NAK Effective"] -pub type GINNAK_EFF_R = crate::BitReader; +pub type GinnakEffR = crate::BitReader; #[doc = "Field `GOUTNakEff` reader - Global OUT NAK Effective"] -pub type GOUTNAK_EFF_R = crate::BitReader; +pub type GoutnakEffR = crate::BitReader; #[doc = "Field `ErlySusp` reader - Early Suspend"] -pub type ERLY_SUSP_R = crate::BitReader; +pub type ErlySuspR = crate::BitReader; #[doc = "Field `ErlySusp` writer - Early Suspend"] -pub type ERLY_SUSP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ErlySuspW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSusp` reader - USB Suspend"] -pub type USBSUSP_R = crate::BitReader; +pub type UsbsuspR = crate::BitReader; #[doc = "Field `USBSusp` writer - USB Suspend"] -pub type USBSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsbsuspW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRst` reader - USB Reset"] -pub type USBRST_R = crate::BitReader; +pub type UsbrstR = crate::BitReader; #[doc = "Field `USBRst` writer - USB Reset"] -pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type UsbrstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EnumDone` reader - Enumeration Done"] -pub type ENUM_DONE_R = crate::BitReader; +pub type EnumDoneR = crate::BitReader; #[doc = "Field `EnumDone` writer - Enumeration Done"] -pub type ENUM_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnumDoneW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOOutDrop` reader - Isochronous OUT Packet Dropped Interrupt"] -pub type ISOOUT_DROP_R = crate::BitReader; +pub type IsooutDropR = crate::BitReader; #[doc = "Field `ISOOutDrop` writer - Isochronous OUT Packet Dropped Interrupt"] -pub type ISOOUT_DROP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IsooutDropW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPF` reader - End of Periodic Frame Interrupt"] -pub type EOPF_R = crate::BitReader; +pub type EopfR = crate::BitReader; #[doc = "Field `EOPF` writer - End of Periodic Frame Interrupt"] -pub type EOPF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EopfW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPInt` reader - IN Endpoints Interrupt"] -pub type IEPINT_R = crate::BitReader; +pub type IepintR = crate::BitReader; #[doc = "Field `OEPInt` reader - OUT Endpoints Interrupt"] -pub type OEPINT_R = crate::BitReader; +pub type OepintR = crate::BitReader; #[doc = "Field `incompISOIN` reader - Incomplete Isochronous IN Transfer"] -pub type INCOMP_ISOIN_R = crate::BitReader; +pub type IncompIsoinR = crate::BitReader; #[doc = "Field `incompISOIN` writer - Incomplete Isochronous IN Transfer"] -pub type INCOMP_ISOIN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncompIsoinW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incomplSOOUT` reader - Incomplete Isochronous OUT Transfer"] -pub type INCOMPL_SOOUT_R = crate::BitReader; +pub type IncomplSooutR = crate::BitReader; #[doc = "Field `incomplSOOUT` writer - Incomplete Isochronous OUT Transfer"] -pub type INCOMPL_SOOUT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncomplSooutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ConIDStsChng` reader - Connector ID Status Change"] -pub type CON_IDSTS_CHNG_R = crate::BitReader; +pub type ConIdstsChngR = crate::BitReader; #[doc = "Field `ConIDStsChng` writer - Connector ID Status Change"] -pub type CON_IDSTS_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ConIdstsChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SessReqInt` reader - Session Request/New Session Detected Interrupt"] -pub type SESS_REQ_INT_R = crate::BitReader; +pub type SessReqIntR = crate::BitReader; #[doc = "Field `SessReqInt` writer - Session Request/New Session Detected Interrupt"] -pub type SESS_REQ_INT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SessReqIntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpInt` reader - Resume/Remote Wakeup Detected Interrupt"] -pub type WK_UP_INT_R = crate::BitReader; +pub type WkUpIntR = crate::BitReader; #[doc = "Field `WkUpInt` writer - Resume/Remote Wakeup Detected Interrupt"] -pub type WK_UP_INT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type WkUpIntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current Mode of Operation"] #[inline(always)] - pub fn cur_mod(&self) -> CUR_MOD_R { - CUR_MOD_R::new((self.bits & 1) != 0) + pub fn cur_mod(&self) -> CurModR { + CurModR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] - pub fn mode_mis(&self) -> MODE_MIS_R { - MODE_MIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn mode_mis(&self) -> ModeMisR { + ModeMisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OTG Interrupt"] #[inline(always)] - pub fn otgint(&self) -> OTGINT_R { - OTGINT_R::new(((self.bits >> 2) & 1) != 0) + pub fn otgint(&self) -> OtgintR { + OtgintR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] - pub fn sof(&self) -> SOF_R { - SOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn sof(&self) -> SofR { + SofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RxFIFO Non-Empty"] #[inline(always)] - pub fn rx_flvl(&self) -> RX_FLVL_R { - RX_FLVL_R::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl(&self) -> RxFlvlR { + RxFlvlR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Global IN Non-Periodic NAK Effective"] #[inline(always)] - pub fn ginnak_eff(&self) -> GINNAK_EFF_R { - GINNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) + pub fn ginnak_eff(&self) -> GinnakEffR { + GinnakEffR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Global OUT NAK Effective"] #[inline(always)] - pub fn goutnak_eff(&self) -> GOUTNAK_EFF_R { - GOUTNAK_EFF_R::new(((self.bits >> 7) & 1) != 0) + pub fn goutnak_eff(&self) -> GoutnakEffR { + GoutnakEffR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Early Suspend"] #[inline(always)] - pub fn erly_susp(&self) -> ERLY_SUSP_R { - ERLY_SUSP_R::new(((self.bits >> 10) & 1) != 0) + pub fn erly_susp(&self) -> ErlySuspR { + ErlySuspR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USB Suspend"] #[inline(always)] - pub fn usbsusp(&self) -> USBSUSP_R { - USBSUSP_R::new(((self.bits >> 11) & 1) != 0) + pub fn usbsusp(&self) -> UsbsuspR { + UsbsuspR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - USB Reset"] #[inline(always)] - pub fn usbrst(&self) -> USBRST_R { - USBRST_R::new(((self.bits >> 12) & 1) != 0) + pub fn usbrst(&self) -> UsbrstR { + UsbrstR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enumeration Done"] #[inline(always)] - pub fn enum_done(&self) -> ENUM_DONE_R { - ENUM_DONE_R::new(((self.bits >> 13) & 1) != 0) + pub fn enum_done(&self) -> EnumDoneR { + EnumDoneR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"] #[inline(always)] - pub fn isoout_drop(&self) -> ISOOUT_DROP_R { - ISOOUT_DROP_R::new(((self.bits >> 14) & 1) != 0) + pub fn isoout_drop(&self) -> IsooutDropR { + IsooutDropR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - End of Periodic Frame Interrupt"] #[inline(always)] - pub fn eopf(&self) -> EOPF_R { - EOPF_R::new(((self.bits >> 15) & 1) != 0) + pub fn eopf(&self) -> EopfR { + EopfR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 18 - IN Endpoints Interrupt"] #[inline(always)] - pub fn iepint(&self) -> IEPINT_R { - IEPINT_R::new(((self.bits >> 18) & 1) != 0) + pub fn iepint(&self) -> IepintR { + IepintR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - OUT Endpoints Interrupt"] #[inline(always)] - pub fn oepint(&self) -> OEPINT_R { - OEPINT_R::new(((self.bits >> 19) & 1) != 0) + pub fn oepint(&self) -> OepintR { + OepintR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"] #[inline(always)] - pub fn incomp_isoin(&self) -> INCOMP_ISOIN_R { - INCOMP_ISOIN_R::new(((self.bits >> 20) & 1) != 0) + pub fn incomp_isoin(&self) -> IncompIsoinR { + IncompIsoinR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"] #[inline(always)] - pub fn incompl_soout(&self) -> INCOMPL_SOOUT_R { - INCOMPL_SOOUT_R::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_soout(&self) -> IncomplSooutR { + IncomplSooutR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] - pub fn con_idsts_chng(&self) -> CON_IDSTS_CHNG_R { - CON_IDSTS_CHNG_R::new(((self.bits >> 28) & 1) != 0) + pub fn con_idsts_chng(&self) -> ConIdstsChngR { + ConIdstsChngR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] - pub fn sess_req_int(&self) -> SESS_REQ_INT_R { - SESS_REQ_INT_R::new(((self.bits >> 30) & 1) != 0) + pub fn sess_req_int(&self) -> SessReqIntR { + SessReqIntR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] - pub fn wk_up_int(&self) -> WK_UP_INT_R { - WK_UP_INT_R::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int(&self) -> WkUpIntR { + WkUpIntR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] #[must_use] - pub fn mode_mis(&mut self) -> MODE_MIS_W { - MODE_MIS_W::new(self, 1) + pub fn mode_mis(&mut self) -> ModeMisW { + ModeMisW::new(self, 1) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self, 3) + pub fn sof(&mut self) -> SofW { + SofW::new(self, 3) } #[doc = "Bit 10 - Early Suspend"] #[inline(always)] #[must_use] - pub fn erly_susp(&mut self) -> ERLY_SUSP_W { - ERLY_SUSP_W::new(self, 10) + pub fn erly_susp(&mut self) -> ErlySuspW { + ErlySuspW::new(self, 10) } #[doc = "Bit 11 - USB Suspend"] #[inline(always)] #[must_use] - pub fn usbsusp(&mut self) -> USBSUSP_W { - USBSUSP_W::new(self, 11) + pub fn usbsusp(&mut self) -> UsbsuspW { + UsbsuspW::new(self, 11) } #[doc = "Bit 12 - USB Reset"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> USBRST_W { - USBRST_W::new(self, 12) + pub fn usbrst(&mut self) -> UsbrstW { + UsbrstW::new(self, 12) } #[doc = "Bit 13 - Enumeration Done"] #[inline(always)] #[must_use] - pub fn enum_done(&mut self) -> ENUM_DONE_W { - ENUM_DONE_W::new(self, 13) + pub fn enum_done(&mut self) -> EnumDoneW { + EnumDoneW::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"] #[inline(always)] #[must_use] - pub fn isoout_drop(&mut self) -> ISOOUT_DROP_W { - ISOOUT_DROP_W::new(self, 14) + pub fn isoout_drop(&mut self) -> IsooutDropW { + IsooutDropW::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt"] #[inline(always)] #[must_use] - pub fn eopf(&mut self) -> EOPF_W { - EOPF_W::new(self, 15) + pub fn eopf(&mut self) -> EopfW { + EopfW::new(self, 15) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"] #[inline(always)] #[must_use] - pub fn incomp_isoin(&mut self) -> INCOMP_ISOIN_W { - INCOMP_ISOIN_W::new(self, 20) + pub fn incomp_isoin(&mut self) -> IncompIsoinW { + IncompIsoinW::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"] #[inline(always)] #[must_use] - pub fn incompl_soout(&mut self) -> INCOMPL_SOOUT_W { - INCOMPL_SOOUT_W::new(self, 21) + pub fn incompl_soout(&mut self) -> IncomplSooutW { + IncomplSooutW::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] #[must_use] - pub fn con_idsts_chng(&mut self) -> CON_IDSTS_CHNG_W { - CON_IDSTS_CHNG_W::new(self, 28) + pub fn con_idsts_chng(&mut self) -> ConIdstsChngW { + ConIdstsChngW::new(self, 28) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] #[must_use] - pub fn sess_req_int(&mut self) -> SESS_REQ_INT_W { - SESS_REQ_INT_W::new(self, 30) + pub fn sess_req_int(&mut self) -> SessReqIntW { + SessReqIntW::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] #[must_use] - pub fn wk_up_int(&mut self) -> WK_UP_INT_W { - WK_UP_INT_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wk_up_int(&mut self) -> WkUpIntW { + WkUpIntW::new(self, 31) } } #[doc = "Interrupt Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GINTSTS_DEVICEMODE_SPEC; -impl crate::RegisterSpec for GINTSTS_DEVICEMODE_SPEC { +pub struct GintstsDevicemodeSpec; +impl crate::RegisterSpec for GintstsDevicemodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gintsts_devicemode::R`](R) reader structure"] -impl crate::Readable for GINTSTS_DEVICEMODE_SPEC {} +impl crate::Readable for GintstsDevicemodeSpec {} #[doc = "`write(|w| ..)` method takes [`gintsts_devicemode::W`](W) writer structure"] -impl crate::Writable for GINTSTS_DEVICEMODE_SPEC { +impl crate::Writable for GintstsDevicemodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTSTS_DEVICEMODE to value 0x1400_0020"] -impl crate::Resettable for GINTSTS_DEVICEMODE_SPEC { +impl crate::Resettable for GintstsDevicemodeSpec { const RESET_VALUE: u32 = 0x1400_0020; } diff --git a/src/usb0/gintsts_hostmode.rs b/src/usb0/gintsts_hostmode.rs index b45469e8..f0dffcad 100644 --- a/src/usb0/gintsts_hostmode.rs +++ b/src/usb0/gintsts_hostmode.rs @@ -1,215 +1,206 @@ #[doc = "Register `GINTSTS_HOSTMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTSTS_HOSTMODE` writer"] -pub type W = crate::W; -#[doc = "Field `CurMod` reader - Current Mode of Operation"] -pub type CUR_MOD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Current Mode of Operation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CUR_MOD_A { +pub enum CurMod { #[doc = "0: Device mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Host mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CUR_MOD_A) -> Self { + fn from(variant: CurMod) -> Self { variant as u8 != 0 } } -impl CUR_MOD_R { +#[doc = "Field `CurMod` reader - Current Mode of Operation"] +pub type CurModR = crate::BitReader; +impl CurModR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CUR_MOD_A { + pub const fn variant(&self) -> CurMod { match self.bits { - false => CUR_MOD_A::VALUE1, - true => CUR_MOD_A::VALUE2, + false => CurMod::Value1, + true => CurMod::Value2, } } #[doc = "Device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CUR_MOD_A::VALUE1 + *self == CurMod::Value1 } #[doc = "Host mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CUR_MOD_A::VALUE2 + *self == CurMod::Value2 } } #[doc = "Field `ModeMis` reader - Mode Mismatch Interrupt"] -pub type MODE_MIS_R = crate::BitReader; +pub type ModeMisR = crate::BitReader; #[doc = "Field `ModeMis` writer - Mode Mismatch Interrupt"] -pub type MODE_MIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ModeMisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OTGInt` reader - OTG Interrupt"] -pub type OTGINT_R = crate::BitReader; +pub type OtgintR = crate::BitReader; #[doc = "Field `Sof` reader - Start of Frame"] -pub type SOF_R = crate::BitReader; +pub type SofR = crate::BitReader; #[doc = "Field `Sof` writer - Start of Frame"] -pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SofW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvl` reader - RxFIFO Non-Empty"] -pub type RX_FLVL_R = crate::BitReader; +pub type RxFlvlR = crate::BitReader; #[doc = "Field `incomplP` reader - Incomplete Periodic Transfer"] -pub type INCOMPL_P_R = crate::BitReader; +pub type IncomplPR = crate::BitReader; #[doc = "Field `incomplP` writer - Incomplete Periodic Transfer"] -pub type INCOMPL_P_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IncomplPW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PrtInt` reader - Host Port Interrupt"] -pub type PRT_INT_R = crate::BitReader; +pub type PrtIntR = crate::BitReader; #[doc = "Field `HChInt` reader - Host Channels Interrupt"] -pub type HCH_INT_R = crate::BitReader; +pub type HchIntR = crate::BitReader; #[doc = "Field `PTxFEmp` reader - Periodic TxFIFO Empty"] -pub type PTX_FEMP_R = crate::BitReader; +pub type PtxFempR = crate::BitReader; #[doc = "Field `ConIDStsChng` reader - Connector ID Status Change"] -pub type CON_IDSTS_CHNG_R = crate::BitReader; +pub type ConIdstsChngR = crate::BitReader; #[doc = "Field `ConIDStsChng` writer - Connector ID Status Change"] -pub type CON_IDSTS_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ConIdstsChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DisconnInt` reader - Disconnect Detected Interrupt"] -pub type DISCONN_INT_R = crate::BitReader; +pub type DisconnIntR = crate::BitReader; #[doc = "Field `DisconnInt` writer - Disconnect Detected Interrupt"] -pub type DISCONN_INT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DisconnIntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SessReqInt` reader - Session Request/New Session Detected Interrupt"] -pub type SESS_REQ_INT_R = crate::BitReader; +pub type SessReqIntR = crate::BitReader; #[doc = "Field `SessReqInt` writer - Session Request/New Session Detected Interrupt"] -pub type SESS_REQ_INT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SessReqIntW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpInt` reader - Resume/Remote Wakeup Detected Interrupt"] -pub type WK_UP_INT_R = crate::BitReader; +pub type WkUpIntR = crate::BitReader; #[doc = "Field `WkUpInt` writer - Resume/Remote Wakeup Detected Interrupt"] -pub type WK_UP_INT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type WkUpIntW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current Mode of Operation"] #[inline(always)] - pub fn cur_mod(&self) -> CUR_MOD_R { - CUR_MOD_R::new((self.bits & 1) != 0) + pub fn cur_mod(&self) -> CurModR { + CurModR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] - pub fn mode_mis(&self) -> MODE_MIS_R { - MODE_MIS_R::new(((self.bits >> 1) & 1) != 0) + pub fn mode_mis(&self) -> ModeMisR { + ModeMisR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OTG Interrupt"] #[inline(always)] - pub fn otgint(&self) -> OTGINT_R { - OTGINT_R::new(((self.bits >> 2) & 1) != 0) + pub fn otgint(&self) -> OtgintR { + OtgintR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] - pub fn sof(&self) -> SOF_R { - SOF_R::new(((self.bits >> 3) & 1) != 0) + pub fn sof(&self) -> SofR { + SofR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RxFIFO Non-Empty"] #[inline(always)] - pub fn rx_flvl(&self) -> RX_FLVL_R { - RX_FLVL_R::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl(&self) -> RxFlvlR { + RxFlvlR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 21 - Incomplete Periodic Transfer"] #[inline(always)] - pub fn incompl_p(&self) -> INCOMPL_P_R { - INCOMPL_P_R::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_p(&self) -> IncomplPR { + IncomplPR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 24 - Host Port Interrupt"] #[inline(always)] - pub fn prt_int(&self) -> PRT_INT_R { - PRT_INT_R::new(((self.bits >> 24) & 1) != 0) + pub fn prt_int(&self) -> PrtIntR { + PrtIntR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Host Channels Interrupt"] #[inline(always)] - pub fn hch_int(&self) -> HCH_INT_R { - HCH_INT_R::new(((self.bits >> 25) & 1) != 0) + pub fn hch_int(&self) -> HchIntR { + HchIntR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Periodic TxFIFO Empty"] #[inline(always)] - pub fn ptx_femp(&self) -> PTX_FEMP_R { - PTX_FEMP_R::new(((self.bits >> 26) & 1) != 0) + pub fn ptx_femp(&self) -> PtxFempR { + PtxFempR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] - pub fn con_idsts_chng(&self) -> CON_IDSTS_CHNG_R { - CON_IDSTS_CHNG_R::new(((self.bits >> 28) & 1) != 0) + pub fn con_idsts_chng(&self) -> ConIdstsChngR { + ConIdstsChngR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Disconnect Detected Interrupt"] #[inline(always)] - pub fn disconn_int(&self) -> DISCONN_INT_R { - DISCONN_INT_R::new(((self.bits >> 29) & 1) != 0) + pub fn disconn_int(&self) -> DisconnIntR { + DisconnIntR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] - pub fn sess_req_int(&self) -> SESS_REQ_INT_R { - SESS_REQ_INT_R::new(((self.bits >> 30) & 1) != 0) + pub fn sess_req_int(&self) -> SessReqIntR { + SessReqIntR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] - pub fn wk_up_int(&self) -> WK_UP_INT_R { - WK_UP_INT_R::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int(&self) -> WkUpIntR { + WkUpIntR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] #[must_use] - pub fn mode_mis(&mut self) -> MODE_MIS_W { - MODE_MIS_W::new(self, 1) + pub fn mode_mis(&mut self) -> ModeMisW { + ModeMisW::new(self, 1) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self, 3) + pub fn sof(&mut self) -> SofW { + SofW::new(self, 3) } #[doc = "Bit 21 - Incomplete Periodic Transfer"] #[inline(always)] #[must_use] - pub fn incompl_p(&mut self) -> INCOMPL_P_W { - INCOMPL_P_W::new(self, 21) + pub fn incompl_p(&mut self) -> IncomplPW { + IncomplPW::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] #[must_use] - pub fn con_idsts_chng(&mut self) -> CON_IDSTS_CHNG_W { - CON_IDSTS_CHNG_W::new(self, 28) + pub fn con_idsts_chng(&mut self) -> ConIdstsChngW { + ConIdstsChngW::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt"] #[inline(always)] #[must_use] - pub fn disconn_int(&mut self) -> DISCONN_INT_W { - DISCONN_INT_W::new(self, 29) + pub fn disconn_int(&mut self) -> DisconnIntW { + DisconnIntW::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] #[must_use] - pub fn sess_req_int(&mut self) -> SESS_REQ_INT_W { - SESS_REQ_INT_W::new(self, 30) + pub fn sess_req_int(&mut self) -> SessReqIntW { + SessReqIntW::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] #[must_use] - pub fn wk_up_int(&mut self) -> WK_UP_INT_W { - WK_UP_INT_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wk_up_int(&mut self) -> WkUpIntW { + WkUpIntW::new(self, 31) } } #[doc = "Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GINTSTS_HOSTMODE_SPEC; -impl crate::RegisterSpec for GINTSTS_HOSTMODE_SPEC { +pub struct GintstsHostmodeSpec; +impl crate::RegisterSpec for GintstsHostmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gintsts_hostmode::R`](R) reader structure"] -impl crate::Readable for GINTSTS_HOSTMODE_SPEC {} +impl crate::Readable for GintstsHostmodeSpec {} #[doc = "`write(|w| ..)` method takes [`gintsts_hostmode::W`](W) writer structure"] -impl crate::Writable for GINTSTS_HOSTMODE_SPEC { +impl crate::Writable for GintstsHostmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTSTS_HOSTMODE to value 0x1400_0020"] -impl crate::Resettable for GINTSTS_HOSTMODE_SPEC { +impl crate::Resettable for GintstsHostmodeSpec { const RESET_VALUE: u32 = 0x1400_0020; } diff --git a/src/usb0/gnptxfsiz_devicemode.rs b/src/usb0/gnptxfsiz_devicemode.rs index dc746a28..c6e88310 100644 --- a/src/usb0/gnptxfsiz_devicemode.rs +++ b/src/usb0/gnptxfsiz_devicemode.rs @@ -1,64 +1,55 @@ #[doc = "Register `GNPTXFSIZ_DEVICEMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GNPTXFSIZ_DEVICEMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPTxF0StAddr` reader - IN Endpoint FIFO0 Transmit RAM Start Address"] -pub type INEPTX_F0ST_ADDR_R = crate::FieldReader; +pub type IneptxF0stAddrR = crate::FieldReader; #[doc = "Field `INEPTxF0StAddr` writer - IN Endpoint FIFO0 Transmit RAM Start Address"] -pub type INEPTX_F0ST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type IneptxF0stAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTxF0Dep` reader - IN Endpoint TxFIFO 0 Depth"] -pub type INEPTX_F0DEP_R = crate::FieldReader; +pub type IneptxF0depR = crate::FieldReader; #[doc = "Field `INEPTxF0Dep` writer - IN Endpoint TxFIFO 0 Depth"] -pub type INEPTX_F0DEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type IneptxF0depW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"] #[inline(always)] - pub fn ineptx_f0st_addr(&self) -> INEPTX_F0ST_ADDR_R { - INEPTX_F0ST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn ineptx_f0st_addr(&self) -> IneptxF0stAddrR { + IneptxF0stAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"] #[inline(always)] - pub fn ineptx_f0dep(&self) -> INEPTX_F0DEP_R { - INEPTX_F0DEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn ineptx_f0dep(&self) -> IneptxF0depR { + IneptxF0depR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn ineptx_f0st_addr(&mut self) -> INEPTX_F0ST_ADDR_W { - INEPTX_F0ST_ADDR_W::new(self, 0) + pub fn ineptx_f0st_addr(&mut self) -> IneptxF0stAddrW { + IneptxF0stAddrW::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"] #[inline(always)] #[must_use] - pub fn ineptx_f0dep(&mut self) -> INEPTX_F0DEP_W { - INEPTX_F0DEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ineptx_f0dep(&mut self) -> IneptxF0depW { + IneptxF0depW::new(self, 16) } } #[doc = "Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_devicemode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_devicemode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GNPTXFSIZ_DEVICEMODE_SPEC; -impl crate::RegisterSpec for GNPTXFSIZ_DEVICEMODE_SPEC { +pub struct GnptxfsizDevicemodeSpec; +impl crate::RegisterSpec for GnptxfsizDevicemodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gnptxfsiz_devicemode::R`](R) reader structure"] -impl crate::Readable for GNPTXFSIZ_DEVICEMODE_SPEC {} +impl crate::Readable for GnptxfsizDevicemodeSpec {} #[doc = "`write(|w| ..)` method takes [`gnptxfsiz_devicemode::W`](W) writer structure"] -impl crate::Writable for GNPTXFSIZ_DEVICEMODE_SPEC { +impl crate::Writable for GnptxfsizDevicemodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GNPTXFSIZ_DEVICEMODE to value 0x0010_0000"] -impl crate::Resettable for GNPTXFSIZ_DEVICEMODE_SPEC { +impl crate::Resettable for GnptxfsizDevicemodeSpec { const RESET_VALUE: u32 = 0x0010_0000; } diff --git a/src/usb0/gnptxfsiz_hostmode.rs b/src/usb0/gnptxfsiz_hostmode.rs index 8d0e20dc..ffd1b29d 100644 --- a/src/usb0/gnptxfsiz_hostmode.rs +++ b/src/usb0/gnptxfsiz_hostmode.rs @@ -1,64 +1,55 @@ #[doc = "Register `GNPTXFSIZ_HOSTMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GNPTXFSIZ_HOSTMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `NPTxFStAddr` reader - Non-periodic Transmit RAM Start Address"] -pub type NPTX_FST_ADDR_R = crate::FieldReader; +pub type NptxFstAddrR = crate::FieldReader; #[doc = "Field `NPTxFStAddr` writer - Non-periodic Transmit RAM Start Address"] -pub type NPTX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type NptxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `NPTxFDep` reader - Non-periodic TxFIFO Depth"] -pub type NPTX_FDEP_R = crate::FieldReader; +pub type NptxFdepR = crate::FieldReader; #[doc = "Field `NPTxFDep` writer - Non-periodic TxFIFO Depth"] -pub type NPTX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type NptxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Non-periodic Transmit RAM Start Address"] #[inline(always)] - pub fn nptx_fst_addr(&self) -> NPTX_FST_ADDR_R { - NPTX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn nptx_fst_addr(&self) -> NptxFstAddrR { + NptxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Non-periodic TxFIFO Depth"] #[inline(always)] - pub fn nptx_fdep(&self) -> NPTX_FDEP_R { - NPTX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn nptx_fdep(&self) -> NptxFdepR { + NptxFdepR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Non-periodic Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn nptx_fst_addr(&mut self) -> NPTX_FST_ADDR_W { - NPTX_FST_ADDR_W::new(self, 0) + pub fn nptx_fst_addr(&mut self) -> NptxFstAddrW { + NptxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - Non-periodic TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn nptx_fdep(&mut self) -> NPTX_FDEP_W { - NPTX_FDEP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nptx_fdep(&mut self) -> NptxFdepW { + NptxFdepW::new(self, 16) } } #[doc = "Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz_hostmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz_hostmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GNPTXFSIZ_HOSTMODE_SPEC; -impl crate::RegisterSpec for GNPTXFSIZ_HOSTMODE_SPEC { +pub struct GnptxfsizHostmodeSpec; +impl crate::RegisterSpec for GnptxfsizHostmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`gnptxfsiz_hostmode::R`](R) reader structure"] -impl crate::Readable for GNPTXFSIZ_HOSTMODE_SPEC {} +impl crate::Readable for GnptxfsizHostmodeSpec {} #[doc = "`write(|w| ..)` method takes [`gnptxfsiz_hostmode::W`](W) writer structure"] -impl crate::Writable for GNPTXFSIZ_HOSTMODE_SPEC { +impl crate::Writable for GnptxfsizHostmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GNPTXFSIZ_HOSTMODE to value 0x0010_011a"] -impl crate::Resettable for GNPTXFSIZ_HOSTMODE_SPEC { +impl crate::Resettable for GnptxfsizHostmodeSpec { const RESET_VALUE: u32 = 0x0010_011a; } diff --git a/src/usb0/gnptxsts.rs b/src/usb0/gnptxsts.rs index 1033598b..ad2d1b1c 100644 --- a/src/usb0/gnptxsts.rs +++ b/src/usb0/gnptxsts.rs @@ -1,177 +1,177 @@ #[doc = "Register `GNPTXSTS` reader"] -pub type R = crate::R; -#[doc = "Field `NPTxFSpcAvail` reader - Non-periodic TxFIFO Space Avail"] -pub type NPTX_FSPC_AVAIL_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Non-periodic TxFIFO Space Avail\n\nValue on reset: 16"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum NPTX_FSPC_AVAIL_A { +pub enum NptxFspcAvail { #[doc = "0: Non-periodic TxFIFO is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 word available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 words available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: NPTX_FSPC_AVAIL_A) -> Self { + fn from(variant: NptxFspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for NPTX_FSPC_AVAIL_A { +impl crate::FieldSpec for NptxFspcAvail { type Ux = u16; } -impl NPTX_FSPC_AVAIL_R { +#[doc = "Field `NPTxFSpcAvail` reader - Non-periodic TxFIFO Space Avail"] +pub type NptxFspcAvailR = crate::FieldReader; +impl NptxFspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NPTX_FSPC_AVAIL_A::VALUE1), - 1 => Some(NPTX_FSPC_AVAIL_A::VALUE2), - 2 => Some(NPTX_FSPC_AVAIL_A::VALUE3), + 0 => Some(NptxFspcAvail::Value1), + 1 => Some(NptxFspcAvail::Value2), + 2 => Some(NptxFspcAvail::Value3), _ => None, } } #[doc = "Non-periodic TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NPTX_FSPC_AVAIL_A::VALUE1 + *self == NptxFspcAvail::Value1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NPTX_FSPC_AVAIL_A::VALUE2 + *self == NptxFspcAvail::Value2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == NPTX_FSPC_AVAIL_A::VALUE3 + *self == NptxFspcAvail::Value3 } } -#[doc = "Field `NPTxQSpcAvail` reader - Non-periodic Transmit Request Queue Space Available"] -pub type NPTX_QSPC_AVAIL_R = crate::FieldReader; #[doc = "Non-periodic Transmit Request Queue Space Available\n\nValue on reset: 8"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NPTX_QSPC_AVAIL_A { +pub enum NptxQspcAvail { #[doc = "0: Non-periodic Transmit Request Queue is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 location available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 locations available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NPTX_QSPC_AVAIL_A) -> Self { + fn from(variant: NptxQspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for NPTX_QSPC_AVAIL_A { +impl crate::FieldSpec for NptxQspcAvail { type Ux = u8; } -impl NPTX_QSPC_AVAIL_R { +#[doc = "Field `NPTxQSpcAvail` reader - Non-periodic Transmit Request Queue Space Available"] +pub type NptxQspcAvailR = crate::FieldReader; +impl NptxQspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NPTX_QSPC_AVAIL_A::VALUE1), - 1 => Some(NPTX_QSPC_AVAIL_A::VALUE2), - 2 => Some(NPTX_QSPC_AVAIL_A::VALUE3), + 0 => Some(NptxQspcAvail::Value1), + 1 => Some(NptxQspcAvail::Value2), + 2 => Some(NptxQspcAvail::Value3), _ => None, } } #[doc = "Non-periodic Transmit Request Queue is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NPTX_QSPC_AVAIL_A::VALUE1 + *self == NptxQspcAvail::Value1 } #[doc = "1 location available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NPTX_QSPC_AVAIL_A::VALUE2 + *self == NptxQspcAvail::Value2 } #[doc = "2 locations available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == NPTX_QSPC_AVAIL_A::VALUE3 + *self == NptxQspcAvail::Value3 } } -#[doc = "Field `NPTxQTop` reader - Top of the Non-periodic Transmit Request Queue"] -pub type NPTX_QTOP_R = crate::FieldReader; #[doc = "Top of the Non-periodic Transmit Request Queue\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NPTX_QTOP_A { +pub enum NptxQtop { #[doc = "0: IN/OUT token"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Zero-length transmit packet (device IN/host OUT)"] - VALUE2 = 1, + Value2 = 1, #[doc = "3: Channel halt command"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NPTX_QTOP_A) -> Self { + fn from(variant: NptxQtop) -> Self { variant as _ } } -impl crate::FieldSpec for NPTX_QTOP_A { +impl crate::FieldSpec for NptxQtop { type Ux = u8; } -impl NPTX_QTOP_R { +#[doc = "Field `NPTxQTop` reader - Top of the Non-periodic Transmit Request Queue"] +pub type NptxQtopR = crate::FieldReader; +impl NptxQtopR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NPTX_QTOP_A::VALUE1), - 1 => Some(NPTX_QTOP_A::VALUE2), - 3 => Some(NPTX_QTOP_A::VALUE4), + 0 => Some(NptxQtop::Value1), + 1 => Some(NptxQtop::Value2), + 3 => Some(NptxQtop::Value4), _ => None, } } #[doc = "IN/OUT token"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NPTX_QTOP_A::VALUE1 + *self == NptxQtop::Value1 } #[doc = "Zero-length transmit packet (device IN/host OUT)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NPTX_QTOP_A::VALUE2 + *self == NptxQtop::Value2 } #[doc = "Channel halt command"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == NPTX_QTOP_A::VALUE4 + *self == NptxQtop::Value4 } } impl R { #[doc = "Bits 0:15 - Non-periodic TxFIFO Space Avail"] #[inline(always)] - pub fn nptx_fspc_avail(&self) -> NPTX_FSPC_AVAIL_R { - NPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) + pub fn nptx_fspc_avail(&self) -> NptxFspcAvailR { + NptxFspcAvailR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Non-periodic Transmit Request Queue Space Available"] #[inline(always)] - pub fn nptx_qspc_avail(&self) -> NPTX_QSPC_AVAIL_R { - NPTX_QSPC_AVAIL_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn nptx_qspc_avail(&self) -> NptxQspcAvailR { + NptxQspcAvailR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:30 - Top of the Non-periodic Transmit Request Queue"] #[inline(always)] - pub fn nptx_qtop(&self) -> NPTX_QTOP_R { - NPTX_QTOP_R::new(((self.bits >> 24) & 0x7f) as u8) + pub fn nptx_qtop(&self) -> NptxQtopR { + NptxQtopR::new(((self.bits >> 24) & 0x7f) as u8) } } #[doc = "Non-Periodic Transmit FIFO/Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GNPTXSTS_SPEC; -impl crate::RegisterSpec for GNPTXSTS_SPEC { +pub struct GnptxstsSpec; +impl crate::RegisterSpec for GnptxstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`gnptxsts::R`](R) reader structure"] -impl crate::Readable for GNPTXSTS_SPEC {} +impl crate::Readable for GnptxstsSpec {} #[doc = "`reset()` method sets GNPTXSTS to value 0x0008_0010"] -impl crate::Resettable for GNPTXSTS_SPEC { +impl crate::Resettable for GnptxstsSpec { const RESET_VALUE: u32 = 0x0008_0010; } diff --git a/src/usb0/gotgctl.rs b/src/usb0/gotgctl.rs index eb1f3322..46ce5147 100644 --- a/src/usb0/gotgctl.rs +++ b/src/usb0/gotgctl.rs @@ -1,984 +1,975 @@ #[doc = "Register `GOTGCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GOTGCTL` writer"] -pub type W = crate::W; -#[doc = "Field `SesReqScs` reader - Session Request Success"] -pub type SES_REQ_SCS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Session Request Success\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SES_REQ_SCS_A { +pub enum SesReqScs { #[doc = "0: Session request failure"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Session request success"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SES_REQ_SCS_A) -> Self { + fn from(variant: SesReqScs) -> Self { variant as u8 != 0 } } -impl SES_REQ_SCS_R { +#[doc = "Field `SesReqScs` reader - Session Request Success"] +pub type SesReqScsR = crate::BitReader; +impl SesReqScsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SES_REQ_SCS_A { + pub const fn variant(&self) -> SesReqScs { match self.bits { - false => SES_REQ_SCS_A::VALUE1, - true => SES_REQ_SCS_A::VALUE2, + false => SesReqScs::Value1, + true => SesReqScs::Value2, } } #[doc = "Session request failure"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SES_REQ_SCS_A::VALUE1 + *self == SesReqScs::Value1 } #[doc = "Session request success"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SES_REQ_SCS_A::VALUE2 + *self == SesReqScs::Value2 } } -#[doc = "Field `SesReq` reader - Session Request"] -pub type SES_REQ_R = crate::BitReader; #[doc = "Session Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SES_REQ_A { +pub enum SesReq { #[doc = "0: No session request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Session request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SES_REQ_A) -> Self { + fn from(variant: SesReq) -> Self { variant as u8 != 0 } } -impl SES_REQ_R { +#[doc = "Field `SesReq` reader - Session Request"] +pub type SesReqR = crate::BitReader; +impl SesReqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SES_REQ_A { + pub const fn variant(&self) -> SesReq { match self.bits { - false => SES_REQ_A::VALUE1, - true => SES_REQ_A::VALUE2, + false => SesReq::Value1, + true => SesReq::Value2, } } #[doc = "No session request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SES_REQ_A::VALUE1 + *self == SesReq::Value1 } #[doc = "Session request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SES_REQ_A::VALUE2 + *self == SesReq::Value2 } } #[doc = "Field `SesReq` writer - Session Request"] -pub type SES_REQ_W<'a, REG> = crate::BitWriter<'a, REG, SES_REQ_A>; -impl<'a, REG> SES_REQ_W<'a, REG> +pub type SesReqW<'a, REG> = crate::BitWriter<'a, REG, SesReq>; +impl<'a, REG> SesReqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No session request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SES_REQ_A::VALUE1) + self.variant(SesReq::Value1) } #[doc = "Session request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SES_REQ_A::VALUE2) + self.variant(SesReq::Value2) } } -#[doc = "Field `VbvalidOvEn` reader - VBUS Valid Override Enable"] -pub type VBVALID_OV_EN_R = crate::BitReader; #[doc = "VBUS Valid Override Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VBVALID_OV_EN_A { +pub enum VbvalidOvEn { #[doc = "0: Override is disabled and vbus valid signal from the PHY is used internally by the core."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Internally vbus valid received from the PHY is overridden with GOTGCTL.VbvalidOvVal."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VBVALID_OV_EN_A) -> Self { + fn from(variant: VbvalidOvEn) -> Self { variant as u8 != 0 } } -impl VBVALID_OV_EN_R { +#[doc = "Field `VbvalidOvEn` reader - VBUS Valid Override Enable"] +pub type VbvalidOvEnR = crate::BitReader; +impl VbvalidOvEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VBVALID_OV_EN_A { + pub const fn variant(&self) -> VbvalidOvEn { match self.bits { - false => VBVALID_OV_EN_A::VALUE1, - true => VBVALID_OV_EN_A::VALUE2, + false => VbvalidOvEn::Value1, + true => VbvalidOvEn::Value2, } } #[doc = "Override is disabled and vbus valid signal from the PHY is used internally by the core."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VBVALID_OV_EN_A::VALUE1 + *self == VbvalidOvEn::Value1 } #[doc = "Internally vbus valid received from the PHY is overridden with GOTGCTL.VbvalidOvVal."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VBVALID_OV_EN_A::VALUE2 + *self == VbvalidOvEn::Value2 } } #[doc = "Field `VbvalidOvEn` writer - VBUS Valid Override Enable"] -pub type VBVALID_OV_EN_W<'a, REG> = crate::BitWriter<'a, REG, VBVALID_OV_EN_A>; -impl<'a, REG> VBVALID_OV_EN_W<'a, REG> +pub type VbvalidOvEnW<'a, REG> = crate::BitWriter<'a, REG, VbvalidOvEn>; +impl<'a, REG> VbvalidOvEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override is disabled and vbus valid signal from the PHY is used internally by the core."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VBVALID_OV_EN_A::VALUE1) + self.variant(VbvalidOvEn::Value1) } #[doc = "Internally vbus valid received from the PHY is overridden with GOTGCTL.VbvalidOvVal."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VBVALID_OV_EN_A::VALUE2) + self.variant(VbvalidOvEn::Value2) } } -#[doc = "Field `VbvalidOvVal` reader - VBUS Valid Override Value"] -pub type VBVALID_OV_VAL_R = crate::BitReader; #[doc = "VBUS Valid Override Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VBVALID_OV_VAL_A { +pub enum VbvalidOvVal { #[doc = "0: vbusvalid value is 0# when GOTGCTL.VbvalidOvEn = 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: vbusvalid value is 1# when GOTGCTL.VbvalidOvEn = 1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VBVALID_OV_VAL_A) -> Self { + fn from(variant: VbvalidOvVal) -> Self { variant as u8 != 0 } } -impl VBVALID_OV_VAL_R { +#[doc = "Field `VbvalidOvVal` reader - VBUS Valid Override Value"] +pub type VbvalidOvValR = crate::BitReader; +impl VbvalidOvValR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VBVALID_OV_VAL_A { + pub const fn variant(&self) -> VbvalidOvVal { match self.bits { - false => VBVALID_OV_VAL_A::VALUE1, - true => VBVALID_OV_VAL_A::VALUE2, + false => VbvalidOvVal::Value1, + true => VbvalidOvVal::Value2, } } #[doc = "vbusvalid value is 0# when GOTGCTL.VbvalidOvEn = 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VBVALID_OV_VAL_A::VALUE1 + *self == VbvalidOvVal::Value1 } #[doc = "vbusvalid value is 1# when GOTGCTL.VbvalidOvEn = 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VBVALID_OV_VAL_A::VALUE2 + *self == VbvalidOvVal::Value2 } } #[doc = "Field `VbvalidOvVal` writer - VBUS Valid Override Value"] -pub type VBVALID_OV_VAL_W<'a, REG> = crate::BitWriter<'a, REG, VBVALID_OV_VAL_A>; -impl<'a, REG> VBVALID_OV_VAL_W<'a, REG> +pub type VbvalidOvValW<'a, REG> = crate::BitWriter<'a, REG, VbvalidOvVal>; +impl<'a, REG> VbvalidOvValW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "vbusvalid value is 0# when GOTGCTL.VbvalidOvEn = 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VBVALID_OV_VAL_A::VALUE1) + self.variant(VbvalidOvVal::Value1) } #[doc = "vbusvalid value is 1# when GOTGCTL.VbvalidOvEn = 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VBVALID_OV_VAL_A::VALUE2) + self.variant(VbvalidOvVal::Value2) } } -#[doc = "Field `AvalidOvEn` reader - A-Peripheral Session Valid Override Enable"] -pub type AVALID_OV_EN_R = crate::BitReader; #[doc = "A-Peripheral Session Valid Override Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AVALID_OV_EN_A { +pub enum AvalidOvEn { #[doc = "0: Override is disabled and Avalid signal from the PHY is used internally by the core."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Internally Avalid received from the PHY is overridden with GOTGCTL.AvalidOvVal."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AVALID_OV_EN_A) -> Self { + fn from(variant: AvalidOvEn) -> Self { variant as u8 != 0 } } -impl AVALID_OV_EN_R { +#[doc = "Field `AvalidOvEn` reader - A-Peripheral Session Valid Override Enable"] +pub type AvalidOvEnR = crate::BitReader; +impl AvalidOvEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AVALID_OV_EN_A { + pub const fn variant(&self) -> AvalidOvEn { match self.bits { - false => AVALID_OV_EN_A::VALUE1, - true => AVALID_OV_EN_A::VALUE2, + false => AvalidOvEn::Value1, + true => AvalidOvEn::Value2, } } #[doc = "Override is disabled and Avalid signal from the PHY is used internally by the core."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AVALID_OV_EN_A::VALUE1 + *self == AvalidOvEn::Value1 } #[doc = "Internally Avalid received from the PHY is overridden with GOTGCTL.AvalidOvVal."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AVALID_OV_EN_A::VALUE2 + *self == AvalidOvEn::Value2 } } #[doc = "Field `AvalidOvEn` writer - A-Peripheral Session Valid Override Enable"] -pub type AVALID_OV_EN_W<'a, REG> = crate::BitWriter<'a, REG, AVALID_OV_EN_A>; -impl<'a, REG> AVALID_OV_EN_W<'a, REG> +pub type AvalidOvEnW<'a, REG> = crate::BitWriter<'a, REG, AvalidOvEn>; +impl<'a, REG> AvalidOvEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override is disabled and Avalid signal from the PHY is used internally by the core."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AVALID_OV_EN_A::VALUE1) + self.variant(AvalidOvEn::Value1) } #[doc = "Internally Avalid received from the PHY is overridden with GOTGCTL.AvalidOvVal."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AVALID_OV_EN_A::VALUE2) + self.variant(AvalidOvEn::Value2) } } -#[doc = "Field `AvalidOvVal` reader - A-Peripheral Session Valid Override Value"] -pub type AVALID_OV_VAL_R = crate::BitReader; #[doc = "A-Peripheral Session Valid Override Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AVALID_OV_VAL_A { +pub enum AvalidOvVal { #[doc = "0: Avalid value is 0# when GOTGCTL.AvalidOvEn = 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Avalid value is 1# when GOTGCTL.AvalidOvEn = 1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AVALID_OV_VAL_A) -> Self { + fn from(variant: AvalidOvVal) -> Self { variant as u8 != 0 } } -impl AVALID_OV_VAL_R { +#[doc = "Field `AvalidOvVal` reader - A-Peripheral Session Valid Override Value"] +pub type AvalidOvValR = crate::BitReader; +impl AvalidOvValR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AVALID_OV_VAL_A { + pub const fn variant(&self) -> AvalidOvVal { match self.bits { - false => AVALID_OV_VAL_A::VALUE1, - true => AVALID_OV_VAL_A::VALUE2, + false => AvalidOvVal::Value1, + true => AvalidOvVal::Value2, } } #[doc = "Avalid value is 0# when GOTGCTL.AvalidOvEn = 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AVALID_OV_VAL_A::VALUE1 + *self == AvalidOvVal::Value1 } #[doc = "Avalid value is 1# when GOTGCTL.AvalidOvEn = 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AVALID_OV_VAL_A::VALUE2 + *self == AvalidOvVal::Value2 } } #[doc = "Field `AvalidOvVal` writer - A-Peripheral Session Valid Override Value"] -pub type AVALID_OV_VAL_W<'a, REG> = crate::BitWriter<'a, REG, AVALID_OV_VAL_A>; -impl<'a, REG> AVALID_OV_VAL_W<'a, REG> +pub type AvalidOvValW<'a, REG> = crate::BitWriter<'a, REG, AvalidOvVal>; +impl<'a, REG> AvalidOvValW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Avalid value is 0# when GOTGCTL.AvalidOvEn = 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AVALID_OV_VAL_A::VALUE1) + self.variant(AvalidOvVal::Value1) } #[doc = "Avalid value is 1# when GOTGCTL.AvalidOvEn = 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AVALID_OV_VAL_A::VALUE2) + self.variant(AvalidOvVal::Value2) } } -#[doc = "Field `BvalidOvEn` reader - B-Peripheral Session Valid Override Enable"] -pub type BVALID_OV_EN_R = crate::BitReader; #[doc = "B-Peripheral Session Valid Override Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BVALID_OV_EN_A { +pub enum BvalidOvEn { #[doc = "0: Override is disabled and Bvalid signal from the PHY is used internally by the core."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BVALID_OV_EN_A) -> Self { + fn from(variant: BvalidOvEn) -> Self { variant as u8 != 0 } } -impl BVALID_OV_EN_R { +#[doc = "Field `BvalidOvEn` reader - B-Peripheral Session Valid Override Enable"] +pub type BvalidOvEnR = crate::BitReader; +impl BvalidOvEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BVALID_OV_EN_A { + pub const fn variant(&self) -> BvalidOvEn { match self.bits { - false => BVALID_OV_EN_A::VALUE1, - true => BVALID_OV_EN_A::VALUE2, + false => BvalidOvEn::Value1, + true => BvalidOvEn::Value2, } } #[doc = "Override is disabled and Bvalid signal from the PHY is used internally by the core."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BVALID_OV_EN_A::VALUE1 + *self == BvalidOvEn::Value1 } #[doc = "Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BVALID_OV_EN_A::VALUE2 + *self == BvalidOvEn::Value2 } } #[doc = "Field `BvalidOvEn` writer - B-Peripheral Session Valid Override Enable"] -pub type BVALID_OV_EN_W<'a, REG> = crate::BitWriter<'a, REG, BVALID_OV_EN_A>; -impl<'a, REG> BVALID_OV_EN_W<'a, REG> +pub type BvalidOvEnW<'a, REG> = crate::BitWriter<'a, REG, BvalidOvEn>; +impl<'a, REG> BvalidOvEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override is disabled and Bvalid signal from the PHY is used internally by the core."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BVALID_OV_EN_A::VALUE1) + self.variant(BvalidOvEn::Value1) } #[doc = "Internally Bvalid received from the PHY is overridden with GOTGCTL.BvalidOvVal."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BVALID_OV_EN_A::VALUE2) + self.variant(BvalidOvEn::Value2) } } -#[doc = "Field `BvalidOvVal` reader - B-Peripheral Session Valid Override Value"] -pub type BVALID_OV_VAL_R = crate::BitReader; #[doc = "B-Peripheral Session Valid Override Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BVALID_OV_VAL_A { +pub enum BvalidOvVal { #[doc = "0: Bvalid value is 0# when GOTGCTL.BvalidOvEn = 1"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bvalid value is 1# when GOTGCTL.BvalidOvEn = 1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BVALID_OV_VAL_A) -> Self { + fn from(variant: BvalidOvVal) -> Self { variant as u8 != 0 } } -impl BVALID_OV_VAL_R { +#[doc = "Field `BvalidOvVal` reader - B-Peripheral Session Valid Override Value"] +pub type BvalidOvValR = crate::BitReader; +impl BvalidOvValR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BVALID_OV_VAL_A { + pub const fn variant(&self) -> BvalidOvVal { match self.bits { - false => BVALID_OV_VAL_A::VALUE1, - true => BVALID_OV_VAL_A::VALUE2, + false => BvalidOvVal::Value1, + true => BvalidOvVal::Value2, } } #[doc = "Bvalid value is 0# when GOTGCTL.BvalidOvEn = 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BVALID_OV_VAL_A::VALUE1 + *self == BvalidOvVal::Value1 } #[doc = "Bvalid value is 1# when GOTGCTL.BvalidOvEn = 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BVALID_OV_VAL_A::VALUE2 + *self == BvalidOvVal::Value2 } } #[doc = "Field `BvalidOvVal` writer - B-Peripheral Session Valid Override Value"] -pub type BVALID_OV_VAL_W<'a, REG> = crate::BitWriter<'a, REG, BVALID_OV_VAL_A>; -impl<'a, REG> BVALID_OV_VAL_W<'a, REG> +pub type BvalidOvValW<'a, REG> = crate::BitWriter<'a, REG, BvalidOvVal>; +impl<'a, REG> BvalidOvValW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bvalid value is 0# when GOTGCTL.BvalidOvEn = 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BVALID_OV_VAL_A::VALUE1) + self.variant(BvalidOvVal::Value1) } #[doc = "Bvalid value is 1# when GOTGCTL.BvalidOvEn = 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BVALID_OV_VAL_A::VALUE2) + self.variant(BvalidOvVal::Value2) } } -#[doc = "Field `HstNegScs` reader - Host Negotiation Success"] -pub type HST_NEG_SCS_R = crate::BitReader; #[doc = "Host Negotiation Success\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HST_NEG_SCS_A { +pub enum HstNegScs { #[doc = "0: Host negotiation failure"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Host negotiation success"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HST_NEG_SCS_A) -> Self { + fn from(variant: HstNegScs) -> Self { variant as u8 != 0 } } -impl HST_NEG_SCS_R { +#[doc = "Field `HstNegScs` reader - Host Negotiation Success"] +pub type HstNegScsR = crate::BitReader; +impl HstNegScsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HST_NEG_SCS_A { + pub const fn variant(&self) -> HstNegScs { match self.bits { - false => HST_NEG_SCS_A::VALUE1, - true => HST_NEG_SCS_A::VALUE2, + false => HstNegScs::Value1, + true => HstNegScs::Value2, } } #[doc = "Host negotiation failure"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HST_NEG_SCS_A::VALUE1 + *self == HstNegScs::Value1 } #[doc = "Host negotiation success"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HST_NEG_SCS_A::VALUE2 + *self == HstNegScs::Value2 } } -#[doc = "Field `HNPReq` reader - HNP Request"] -pub type HNPREQ_R = crate::BitReader; #[doc = "HNP Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HNPREQ_A { +pub enum Hnpreq { #[doc = "0: No HNP request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HNP request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HNPREQ_A) -> Self { + fn from(variant: Hnpreq) -> Self { variant as u8 != 0 } } -impl HNPREQ_R { +#[doc = "Field `HNPReq` reader - HNP Request"] +pub type HnpreqR = crate::BitReader; +impl HnpreqR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HNPREQ_A { + pub const fn variant(&self) -> Hnpreq { match self.bits { - false => HNPREQ_A::VALUE1, - true => HNPREQ_A::VALUE2, + false => Hnpreq::Value1, + true => Hnpreq::Value2, } } #[doc = "No HNP request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HNPREQ_A::VALUE1 + *self == Hnpreq::Value1 } #[doc = "HNP request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HNPREQ_A::VALUE2 + *self == Hnpreq::Value2 } } #[doc = "Field `HNPReq` writer - HNP Request"] -pub type HNPREQ_W<'a, REG> = crate::BitWriter<'a, REG, HNPREQ_A>; -impl<'a, REG> HNPREQ_W<'a, REG> +pub type HnpreqW<'a, REG> = crate::BitWriter<'a, REG, Hnpreq>; +impl<'a, REG> HnpreqW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No HNP request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HNPREQ_A::VALUE1) + self.variant(Hnpreq::Value1) } #[doc = "HNP request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HNPREQ_A::VALUE2) + self.variant(Hnpreq::Value2) } } -#[doc = "Field `HstSetHNPEn` reader - Host Set HNP Enable"] -pub type HST_SET_HNPEN_R = crate::BitReader; #[doc = "Host Set HNP Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HST_SET_HNPEN_A { +pub enum HstSetHnpen { #[doc = "0: Host Set HNP is not enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Host Set HNP is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HST_SET_HNPEN_A) -> Self { + fn from(variant: HstSetHnpen) -> Self { variant as u8 != 0 } } -impl HST_SET_HNPEN_R { +#[doc = "Field `HstSetHNPEn` reader - Host Set HNP Enable"] +pub type HstSetHnpenR = crate::BitReader; +impl HstSetHnpenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HST_SET_HNPEN_A { + pub const fn variant(&self) -> HstSetHnpen { match self.bits { - false => HST_SET_HNPEN_A::VALUE1, - true => HST_SET_HNPEN_A::VALUE2, + false => HstSetHnpen::Value1, + true => HstSetHnpen::Value2, } } #[doc = "Host Set HNP is not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HST_SET_HNPEN_A::VALUE1 + *self == HstSetHnpen::Value1 } #[doc = "Host Set HNP is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HST_SET_HNPEN_A::VALUE2 + *self == HstSetHnpen::Value2 } } #[doc = "Field `HstSetHNPEn` writer - Host Set HNP Enable"] -pub type HST_SET_HNPEN_W<'a, REG> = crate::BitWriter<'a, REG, HST_SET_HNPEN_A>; -impl<'a, REG> HST_SET_HNPEN_W<'a, REG> +pub type HstSetHnpenW<'a, REG> = crate::BitWriter<'a, REG, HstSetHnpen>; +impl<'a, REG> HstSetHnpenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Host Set HNP is not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HST_SET_HNPEN_A::VALUE1) + self.variant(HstSetHnpen::Value1) } #[doc = "Host Set HNP is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HST_SET_HNPEN_A::VALUE2) + self.variant(HstSetHnpen::Value2) } } -#[doc = "Field `DevHNPEn` reader - Device HNP Enabled"] -pub type DEV_HNPEN_R = crate::BitReader; #[doc = "Device HNP Enabled\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DEV_HNPEN_A { +pub enum DevHnpen { #[doc = "0: HNP is not enabled in the application"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HNP is enabled in the application"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DEV_HNPEN_A) -> Self { + fn from(variant: DevHnpen) -> Self { variant as u8 != 0 } } -impl DEV_HNPEN_R { +#[doc = "Field `DevHNPEn` reader - Device HNP Enabled"] +pub type DevHnpenR = crate::BitReader; +impl DevHnpenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DEV_HNPEN_A { + pub const fn variant(&self) -> DevHnpen { match self.bits { - false => DEV_HNPEN_A::VALUE1, - true => DEV_HNPEN_A::VALUE2, + false => DevHnpen::Value1, + true => DevHnpen::Value2, } } #[doc = "HNP is not enabled in the application"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DEV_HNPEN_A::VALUE1 + *self == DevHnpen::Value1 } #[doc = "HNP is enabled in the application"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DEV_HNPEN_A::VALUE2 + *self == DevHnpen::Value2 } } #[doc = "Field `DevHNPEn` writer - Device HNP Enabled"] -pub type DEV_HNPEN_W<'a, REG> = crate::BitWriter<'a, REG, DEV_HNPEN_A>; -impl<'a, REG> DEV_HNPEN_W<'a, REG> +pub type DevHnpenW<'a, REG> = crate::BitWriter<'a, REG, DevHnpen>; +impl<'a, REG> DevHnpenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HNP is not enabled in the application"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DEV_HNPEN_A::VALUE1) + self.variant(DevHnpen::Value1) } #[doc = "HNP is enabled in the application"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DEV_HNPEN_A::VALUE2) + self.variant(DevHnpen::Value2) } } -#[doc = "Field `ConlDSts` reader - Connector ID Status"] -pub type CONL_DSTS_R = crate::BitReader; #[doc = "Connector ID Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CONL_DSTS_A { +pub enum ConlDsts { #[doc = "0: The USB core is in A-Device mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The USB core is in B-Device mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CONL_DSTS_A) -> Self { + fn from(variant: ConlDsts) -> Self { variant as u8 != 0 } } -impl CONL_DSTS_R { +#[doc = "Field `ConlDSts` reader - Connector ID Status"] +pub type ConlDstsR = crate::BitReader; +impl ConlDstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CONL_DSTS_A { + pub const fn variant(&self) -> ConlDsts { match self.bits { - false => CONL_DSTS_A::VALUE1, - true => CONL_DSTS_A::VALUE2, + false => ConlDsts::Value1, + true => ConlDsts::Value2, } } #[doc = "The USB core is in A-Device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CONL_DSTS_A::VALUE1 + *self == ConlDsts::Value1 } #[doc = "The USB core is in B-Device mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CONL_DSTS_A::VALUE2 + *self == ConlDsts::Value2 } } -#[doc = "Field `DbncTime` reader - Long/Short Debounce Time"] -pub type DBNC_TIME_R = crate::BitReader; #[doc = "Long/Short Debounce Time\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DBNC_TIME_A { +pub enum DbncTime { #[doc = "0: Long debounce time, used for physical connections (100 ms + 2.5 us)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Short debounce time, used for soft connections (2.5 us)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DBNC_TIME_A) -> Self { + fn from(variant: DbncTime) -> Self { variant as u8 != 0 } } -impl DBNC_TIME_R { +#[doc = "Field `DbncTime` reader - Long/Short Debounce Time"] +pub type DbncTimeR = crate::BitReader; +impl DbncTimeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DBNC_TIME_A { + pub const fn variant(&self) -> DbncTime { match self.bits { - false => DBNC_TIME_A::VALUE1, - true => DBNC_TIME_A::VALUE2, + false => DbncTime::Value1, + true => DbncTime::Value2, } } #[doc = "Long debounce time, used for physical connections (100 ms + 2.5 us)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DBNC_TIME_A::VALUE1 + *self == DbncTime::Value1 } #[doc = "Short debounce time, used for soft connections (2.5 us)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DBNC_TIME_A::VALUE2 + *self == DbncTime::Value2 } } -#[doc = "Field `ASesVId` reader - A-Session Valid"] -pub type ASES_VID_R = crate::BitReader; #[doc = "A-Session Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASES_VID_A { +pub enum AsesVid { #[doc = "0: A-session is not valid"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A-session is valid"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASES_VID_A) -> Self { + fn from(variant: AsesVid) -> Self { variant as u8 != 0 } } -impl ASES_VID_R { +#[doc = "Field `ASesVId` reader - A-Session Valid"] +pub type AsesVidR = crate::BitReader; +impl AsesVidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASES_VID_A { + pub const fn variant(&self) -> AsesVid { match self.bits { - false => ASES_VID_A::VALUE1, - true => ASES_VID_A::VALUE2, + false => AsesVid::Value1, + true => AsesVid::Value2, } } #[doc = "A-session is not valid"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASES_VID_A::VALUE1 + *self == AsesVid::Value1 } #[doc = "A-session is valid"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASES_VID_A::VALUE2 + *self == AsesVid::Value2 } } -#[doc = "Field `BSesVld` reader - B-Session Valid"] -pub type BSES_VLD_R = crate::BitReader; #[doc = "B-Session Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BSES_VLD_A { +pub enum BsesVld { #[doc = "0: B-session is not valid."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: B-session is valid."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BSES_VLD_A) -> Self { + fn from(variant: BsesVld) -> Self { variant as u8 != 0 } } -impl BSES_VLD_R { +#[doc = "Field `BSesVld` reader - B-Session Valid"] +pub type BsesVldR = crate::BitReader; +impl BsesVldR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BSES_VLD_A { + pub const fn variant(&self) -> BsesVld { match self.bits { - false => BSES_VLD_A::VALUE1, - true => BSES_VLD_A::VALUE2, + false => BsesVld::Value1, + true => BsesVld::Value2, } } #[doc = "B-session is not valid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BSES_VLD_A::VALUE1 + *self == BsesVld::Value1 } #[doc = "B-session is valid."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BSES_VLD_A::VALUE2 + *self == BsesVld::Value2 } } -#[doc = "Field `OTGVer` reader - OTG Version"] -pub type OTGVER_R = crate::BitReader; #[doc = "OTG Version\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OTGVER_A { +pub enum Otgver { #[doc = "0: OTG Version 1.3. In this version the core supports Data line pulsing and VBus pulsing for SRP."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: OTG Version 2.0. In this version the core supports only Data line pulsing for SRP."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OTGVER_A) -> Self { + fn from(variant: Otgver) -> Self { variant as u8 != 0 } } -impl OTGVER_R { +#[doc = "Field `OTGVer` reader - OTG Version"] +pub type OtgverR = crate::BitReader; +impl OtgverR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> OTGVER_A { + pub const fn variant(&self) -> Otgver { match self.bits { - false => OTGVER_A::VALUE1, - true => OTGVER_A::VALUE2, + false => Otgver::Value1, + true => Otgver::Value2, } } #[doc = "OTG Version 1.3. In this version the core supports Data line pulsing and VBus pulsing for SRP."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OTGVER_A::VALUE1 + *self == Otgver::Value1 } #[doc = "OTG Version 2.0. In this version the core supports only Data line pulsing for SRP."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == OTGVER_A::VALUE2 + *self == Otgver::Value2 } } #[doc = "Field `OTGVer` writer - OTG Version"] -pub type OTGVER_W<'a, REG> = crate::BitWriter<'a, REG, OTGVER_A>; -impl<'a, REG> OTGVER_W<'a, REG> +pub type OtgverW<'a, REG> = crate::BitWriter<'a, REG, Otgver>; +impl<'a, REG> OtgverW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "OTG Version 1.3. In this version the core supports Data line pulsing and VBus pulsing for SRP."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OTGVER_A::VALUE1) + self.variant(Otgver::Value1) } #[doc = "OTG Version 2.0. In this version the core supports only Data line pulsing for SRP."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(OTGVER_A::VALUE2) + self.variant(Otgver::Value2) } } impl R { #[doc = "Bit 0 - Session Request Success"] #[inline(always)] - pub fn ses_req_scs(&self) -> SES_REQ_SCS_R { - SES_REQ_SCS_R::new((self.bits & 1) != 0) + pub fn ses_req_scs(&self) -> SesReqScsR { + SesReqScsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Session Request"] #[inline(always)] - pub fn ses_req(&self) -> SES_REQ_R { - SES_REQ_R::new(((self.bits >> 1) & 1) != 0) + pub fn ses_req(&self) -> SesReqR { + SesReqR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VBUS Valid Override Enable"] #[inline(always)] - pub fn vbvalid_ov_en(&self) -> VBVALID_OV_EN_R { - VBVALID_OV_EN_R::new(((self.bits >> 2) & 1) != 0) + pub fn vbvalid_ov_en(&self) -> VbvalidOvEnR { + VbvalidOvEnR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - VBUS Valid Override Value"] #[inline(always)] - pub fn vbvalid_ov_val(&self) -> VBVALID_OV_VAL_R { - VBVALID_OV_VAL_R::new(((self.bits >> 3) & 1) != 0) + pub fn vbvalid_ov_val(&self) -> VbvalidOvValR { + VbvalidOvValR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - A-Peripheral Session Valid Override Enable"] #[inline(always)] - pub fn avalid_ov_en(&self) -> AVALID_OV_EN_R { - AVALID_OV_EN_R::new(((self.bits >> 4) & 1) != 0) + pub fn avalid_ov_en(&self) -> AvalidOvEnR { + AvalidOvEnR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - A-Peripheral Session Valid Override Value"] #[inline(always)] - pub fn avalid_ov_val(&self) -> AVALID_OV_VAL_R { - AVALID_OV_VAL_R::new(((self.bits >> 5) & 1) != 0) + pub fn avalid_ov_val(&self) -> AvalidOvValR { + AvalidOvValR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - B-Peripheral Session Valid Override Enable"] #[inline(always)] - pub fn bvalid_ov_en(&self) -> BVALID_OV_EN_R { - BVALID_OV_EN_R::new(((self.bits >> 6) & 1) != 0) + pub fn bvalid_ov_en(&self) -> BvalidOvEnR { + BvalidOvEnR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - B-Peripheral Session Valid Override Value"] #[inline(always)] - pub fn bvalid_ov_val(&self) -> BVALID_OV_VAL_R { - BVALID_OV_VAL_R::new(((self.bits >> 7) & 1) != 0) + pub fn bvalid_ov_val(&self) -> BvalidOvValR { + BvalidOvValR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Host Negotiation Success"] #[inline(always)] - pub fn hst_neg_scs(&self) -> HST_NEG_SCS_R { - HST_NEG_SCS_R::new(((self.bits >> 8) & 1) != 0) + pub fn hst_neg_scs(&self) -> HstNegScsR { + HstNegScsR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - HNP Request"] #[inline(always)] - pub fn hnpreq(&self) -> HNPREQ_R { - HNPREQ_R::new(((self.bits >> 9) & 1) != 0) + pub fn hnpreq(&self) -> HnpreqR { + HnpreqR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Host Set HNP Enable"] #[inline(always)] - pub fn hst_set_hnpen(&self) -> HST_SET_HNPEN_R { - HST_SET_HNPEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn hst_set_hnpen(&self) -> HstSetHnpenR { + HstSetHnpenR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Device HNP Enabled"] #[inline(always)] - pub fn dev_hnpen(&self) -> DEV_HNPEN_R { - DEV_HNPEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dev_hnpen(&self) -> DevHnpenR { + DevHnpenR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Connector ID Status"] #[inline(always)] - pub fn conl_dsts(&self) -> CONL_DSTS_R { - CONL_DSTS_R::new(((self.bits >> 16) & 1) != 0) + pub fn conl_dsts(&self) -> ConlDstsR { + ConlDstsR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Long/Short Debounce Time"] #[inline(always)] - pub fn dbnc_time(&self) -> DBNC_TIME_R { - DBNC_TIME_R::new(((self.bits >> 17) & 1) != 0) + pub fn dbnc_time(&self) -> DbncTimeR { + DbncTimeR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - A-Session Valid"] #[inline(always)] - pub fn ases_vid(&self) -> ASES_VID_R { - ASES_VID_R::new(((self.bits >> 18) & 1) != 0) + pub fn ases_vid(&self) -> AsesVidR { + AsesVidR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - B-Session Valid"] #[inline(always)] - pub fn bses_vld(&self) -> BSES_VLD_R { - BSES_VLD_R::new(((self.bits >> 19) & 1) != 0) + pub fn bses_vld(&self) -> BsesVldR { + BsesVldR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - OTG Version"] #[inline(always)] - pub fn otgver(&self) -> OTGVER_R { - OTGVER_R::new(((self.bits >> 20) & 1) != 0) + pub fn otgver(&self) -> OtgverR { + OtgverR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 1 - Session Request"] #[inline(always)] #[must_use] - pub fn ses_req(&mut self) -> SES_REQ_W { - SES_REQ_W::new(self, 1) + pub fn ses_req(&mut self) -> SesReqW { + SesReqW::new(self, 1) } #[doc = "Bit 2 - VBUS Valid Override Enable"] #[inline(always)] #[must_use] - pub fn vbvalid_ov_en(&mut self) -> VBVALID_OV_EN_W { - VBVALID_OV_EN_W::new(self, 2) + pub fn vbvalid_ov_en(&mut self) -> VbvalidOvEnW { + VbvalidOvEnW::new(self, 2) } #[doc = "Bit 3 - VBUS Valid Override Value"] #[inline(always)] #[must_use] - pub fn vbvalid_ov_val(&mut self) -> VBVALID_OV_VAL_W { - VBVALID_OV_VAL_W::new(self, 3) + pub fn vbvalid_ov_val(&mut self) -> VbvalidOvValW { + VbvalidOvValW::new(self, 3) } #[doc = "Bit 4 - A-Peripheral Session Valid Override Enable"] #[inline(always)] #[must_use] - pub fn avalid_ov_en(&mut self) -> AVALID_OV_EN_W { - AVALID_OV_EN_W::new(self, 4) + pub fn avalid_ov_en(&mut self) -> AvalidOvEnW { + AvalidOvEnW::new(self, 4) } #[doc = "Bit 5 - A-Peripheral Session Valid Override Value"] #[inline(always)] #[must_use] - pub fn avalid_ov_val(&mut self) -> AVALID_OV_VAL_W { - AVALID_OV_VAL_W::new(self, 5) + pub fn avalid_ov_val(&mut self) -> AvalidOvValW { + AvalidOvValW::new(self, 5) } #[doc = "Bit 6 - B-Peripheral Session Valid Override Enable"] #[inline(always)] #[must_use] - pub fn bvalid_ov_en(&mut self) -> BVALID_OV_EN_W { - BVALID_OV_EN_W::new(self, 6) + pub fn bvalid_ov_en(&mut self) -> BvalidOvEnW { + BvalidOvEnW::new(self, 6) } #[doc = "Bit 7 - B-Peripheral Session Valid Override Value"] #[inline(always)] #[must_use] - pub fn bvalid_ov_val(&mut self) -> BVALID_OV_VAL_W { - BVALID_OV_VAL_W::new(self, 7) + pub fn bvalid_ov_val(&mut self) -> BvalidOvValW { + BvalidOvValW::new(self, 7) } #[doc = "Bit 9 - HNP Request"] #[inline(always)] #[must_use] - pub fn hnpreq(&mut self) -> HNPREQ_W { - HNPREQ_W::new(self, 9) + pub fn hnpreq(&mut self) -> HnpreqW { + HnpreqW::new(self, 9) } #[doc = "Bit 10 - Host Set HNP Enable"] #[inline(always)] #[must_use] - pub fn hst_set_hnpen(&mut self) -> HST_SET_HNPEN_W { - HST_SET_HNPEN_W::new(self, 10) + pub fn hst_set_hnpen(&mut self) -> HstSetHnpenW { + HstSetHnpenW::new(self, 10) } #[doc = "Bit 11 - Device HNP Enabled"] #[inline(always)] #[must_use] - pub fn dev_hnpen(&mut self) -> DEV_HNPEN_W { - DEV_HNPEN_W::new(self, 11) + pub fn dev_hnpen(&mut self) -> DevHnpenW { + DevHnpenW::new(self, 11) } #[doc = "Bit 20 - OTG Version"] #[inline(always)] #[must_use] - pub fn otgver(&mut self) -> OTGVER_W { - OTGVER_W::new(self, 20) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn otgver(&mut self) -> OtgverW { + OtgverW::new(self, 20) } } #[doc = "Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GOTGCTL_SPEC; -impl crate::RegisterSpec for GOTGCTL_SPEC { +pub struct GotgctlSpec; +impl crate::RegisterSpec for GotgctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`gotgctl::R`](R) reader structure"] -impl crate::Readable for GOTGCTL_SPEC {} +impl crate::Readable for GotgctlSpec {} #[doc = "`write(|w| ..)` method takes [`gotgctl::W`](W) writer structure"] -impl crate::Writable for GOTGCTL_SPEC { +impl crate::Writable for GotgctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GOTGCTL to value 0x0001_0000"] -impl crate::Resettable for GOTGCTL_SPEC { +impl crate::Resettable for GotgctlSpec { const RESET_VALUE: u32 = 0x0001_0000; } diff --git a/src/usb0/gotgint.rs b/src/usb0/gotgint.rs index 54610260..0d7eb421 100644 --- a/src/usb0/gotgint.rs +++ b/src/usb0/gotgint.rs @@ -1,124 +1,115 @@ #[doc = "Register `GOTGINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GOTGINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SesEndDet` reader - Session End Detected"] -pub type SES_END_DET_R = crate::BitReader; +pub type SesEndDetR = crate::BitReader; #[doc = "Field `SesEndDet` writer - Session End Detected"] -pub type SES_END_DET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SesEndDetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SesReqSucStsChng` reader - Session Request Success Status Change"] -pub type SES_REQ_SUC_STS_CHNG_R = crate::BitReader; +pub type SesReqSucStsChngR = crate::BitReader; #[doc = "Field `SesReqSucStsChng` writer - Session Request Success Status Change"] -pub type SES_REQ_SUC_STS_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SesReqSucStsChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HstNegSucStsChng` reader - Host Negotiation Success Status Change"] -pub type HST_NEG_SUC_STS_CHNG_R = crate::BitReader; +pub type HstNegSucStsChngR = crate::BitReader; #[doc = "Field `HstNegSucStsChng` writer - Host Negotiation Success Status Change"] -pub type HST_NEG_SUC_STS_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HstNegSucStsChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `HstNegDet` reader - Host Negotiation Detected"] -pub type HST_NEG_DET_R = crate::BitReader; +pub type HstNegDetR = crate::BitReader; #[doc = "Field `HstNegDet` writer - Host Negotiation Detected"] -pub type HST_NEG_DET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type HstNegDetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ADevTOUTChg` reader - A-Device Timeout Change"] -pub type ADEV_TOUTCHG_R = crate::BitReader; +pub type AdevToutchgR = crate::BitReader; #[doc = "Field `ADevTOUTChg` writer - A-Device Timeout Change"] -pub type ADEV_TOUTCHG_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AdevToutchgW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DbnceDone` reader - Debounce Done"] -pub type DBNCE_DONE_R = crate::BitReader; +pub type DbnceDoneR = crate::BitReader; #[doc = "Field `DbnceDone` writer - Debounce Done"] -pub type DBNCE_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DbnceDoneW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 2 - Session End Detected"] #[inline(always)] - pub fn ses_end_det(&self) -> SES_END_DET_R { - SES_END_DET_R::new(((self.bits >> 2) & 1) != 0) + pub fn ses_end_det(&self) -> SesEndDetR { + SesEndDetR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Session Request Success Status Change"] #[inline(always)] - pub fn ses_req_suc_sts_chng(&self) -> SES_REQ_SUC_STS_CHNG_R { - SES_REQ_SUC_STS_CHNG_R::new(((self.bits >> 8) & 1) != 0) + pub fn ses_req_suc_sts_chng(&self) -> SesReqSucStsChngR { + SesReqSucStsChngR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Host Negotiation Success Status Change"] #[inline(always)] - pub fn hst_neg_suc_sts_chng(&self) -> HST_NEG_SUC_STS_CHNG_R { - HST_NEG_SUC_STS_CHNG_R::new(((self.bits >> 9) & 1) != 0) + pub fn hst_neg_suc_sts_chng(&self) -> HstNegSucStsChngR { + HstNegSucStsChngR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 17 - Host Negotiation Detected"] #[inline(always)] - pub fn hst_neg_det(&self) -> HST_NEG_DET_R { - HST_NEG_DET_R::new(((self.bits >> 17) & 1) != 0) + pub fn hst_neg_det(&self) -> HstNegDetR { + HstNegDetR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - A-Device Timeout Change"] #[inline(always)] - pub fn adev_toutchg(&self) -> ADEV_TOUTCHG_R { - ADEV_TOUTCHG_R::new(((self.bits >> 18) & 1) != 0) + pub fn adev_toutchg(&self) -> AdevToutchgR { + AdevToutchgR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Debounce Done"] #[inline(always)] - pub fn dbnce_done(&self) -> DBNCE_DONE_R { - DBNCE_DONE_R::new(((self.bits >> 19) & 1) != 0) + pub fn dbnce_done(&self) -> DbnceDoneR { + DbnceDoneR::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 2 - Session End Detected"] #[inline(always)] #[must_use] - pub fn ses_end_det(&mut self) -> SES_END_DET_W { - SES_END_DET_W::new(self, 2) + pub fn ses_end_det(&mut self) -> SesEndDetW { + SesEndDetW::new(self, 2) } #[doc = "Bit 8 - Session Request Success Status Change"] #[inline(always)] #[must_use] - pub fn ses_req_suc_sts_chng(&mut self) -> SES_REQ_SUC_STS_CHNG_W { - SES_REQ_SUC_STS_CHNG_W::new(self, 8) + pub fn ses_req_suc_sts_chng(&mut self) -> SesReqSucStsChngW { + SesReqSucStsChngW::new(self, 8) } #[doc = "Bit 9 - Host Negotiation Success Status Change"] #[inline(always)] #[must_use] - pub fn hst_neg_suc_sts_chng(&mut self) -> HST_NEG_SUC_STS_CHNG_W { - HST_NEG_SUC_STS_CHNG_W::new(self, 9) + pub fn hst_neg_suc_sts_chng(&mut self) -> HstNegSucStsChngW { + HstNegSucStsChngW::new(self, 9) } #[doc = "Bit 17 - Host Negotiation Detected"] #[inline(always)] #[must_use] - pub fn hst_neg_det(&mut self) -> HST_NEG_DET_W { - HST_NEG_DET_W::new(self, 17) + pub fn hst_neg_det(&mut self) -> HstNegDetW { + HstNegDetW::new(self, 17) } #[doc = "Bit 18 - A-Device Timeout Change"] #[inline(always)] #[must_use] - pub fn adev_toutchg(&mut self) -> ADEV_TOUTCHG_W { - ADEV_TOUTCHG_W::new(self, 18) + pub fn adev_toutchg(&mut self) -> AdevToutchgW { + AdevToutchgW::new(self, 18) } #[doc = "Bit 19 - Debounce Done"] #[inline(always)] #[must_use] - pub fn dbnce_done(&mut self) -> DBNCE_DONE_W { - DBNCE_DONE_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dbnce_done(&mut self) -> DbnceDoneW { + DbnceDoneW::new(self, 19) } } #[doc = "OTG Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gotgint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gotgint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GOTGINT_SPEC; -impl crate::RegisterSpec for GOTGINT_SPEC { +pub struct GotgintSpec; +impl crate::RegisterSpec for GotgintSpec { type Ux = u32; } #[doc = "`read()` method returns [`gotgint::R`](R) reader structure"] -impl crate::Readable for GOTGINT_SPEC {} +impl crate::Readable for GotgintSpec {} #[doc = "`write(|w| ..)` method takes [`gotgint::W`](W) writer structure"] -impl crate::Writable for GOTGINT_SPEC { +impl crate::Writable for GotgintSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GOTGINT to value 0"] -impl crate::Resettable for GOTGINT_SPEC { +impl crate::Resettable for GotgintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/grstctl.rs b/src/usb0/grstctl.rs index fe853345..484af341 100644 --- a/src/usb0/grstctl.rs +++ b/src/usb0/grstctl.rs @@ -1,91 +1,91 @@ #[doc = "Register `GRSTCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GRSTCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CSftRst` reader - Core Soft Reset"] -pub type CSFT_RST_R = crate::BitReader; +pub type CsftRstR = crate::BitReader; #[doc = "Field `CSftRst` writer - Core Soft Reset"] -pub type CSFT_RST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CsftRstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FrmCntrRst` reader - Host Frame Counter Reset"] -pub type FRM_CNTR_RST_R = crate::BitReader; +pub type FrmCntrRstR = crate::BitReader; #[doc = "Field `FrmCntrRst` writer - Host Frame Counter Reset"] -pub type FRM_CNTR_RST_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FrmCntrRstW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFFlsh` reader - RxFIFO Flush"] -pub type RX_FFLSH_R = crate::BitReader; +pub type RxFflshR = crate::BitReader; #[doc = "Field `RxFFlsh` writer - RxFIFO Flush"] -pub type RX_FFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RxFflshW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFFlsh` reader - TxFIFO Flush"] -pub type TX_FFLSH_R = crate::BitReader; +pub type TxFflshR = crate::BitReader; #[doc = "Field `TxFFlsh` writer - TxFIFO Flush"] -pub type TX_FFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFflshW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TxFIFO Number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TX_FNUM_A { +pub enum TxFnum { #[doc = "0: Non-periodic TxFIFO flush in Host mode or Tx FIFO 0 flush in device mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Periodic TxFIFO flush in Host mode or Tx FIFO 1 flush in device mode"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Tx FIFO 2 flush in device mode"] - VALUE3 = 2, + Value3 = 2, #[doc = "15: Tx FIFO 15 flush in device mode"] - VALUE4 = 15, + Value4 = 15, #[doc = "16: Flush all the transmit FIFOs in device or host mode."] - VALUE5 = 16, + Value5 = 16, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TX_FNUM_A) -> Self { + fn from(variant: TxFnum) -> Self { variant as _ } } -impl crate::FieldSpec for TX_FNUM_A { +impl crate::FieldSpec for TxFnum { type Ux = u8; } -impl TX_FNUM_R { +#[doc = "Field `TxFNum` reader - TxFIFO Number"] +pub type TxFnumR = crate::FieldReader; +impl TxFnumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TX_FNUM_A::VALUE1), - 1 => Some(TX_FNUM_A::VALUE2), - 2 => Some(TX_FNUM_A::VALUE3), - 15 => Some(TX_FNUM_A::VALUE4), - 16 => Some(TX_FNUM_A::VALUE5), + 0 => Some(TxFnum::Value1), + 1 => Some(TxFnum::Value2), + 2 => Some(TxFnum::Value3), + 15 => Some(TxFnum::Value4), + 16 => Some(TxFnum::Value5), _ => None, } } #[doc = "Non-periodic TxFIFO flush in Host mode or Tx FIFO 0 flush in device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_FNUM_A::VALUE1 + *self == TxFnum::Value1 } #[doc = "Periodic TxFIFO flush in Host mode or Tx FIFO 1 flush in device mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_FNUM_A::VALUE2 + *self == TxFnum::Value2 } #[doc = "Tx FIFO 2 flush in device mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TX_FNUM_A::VALUE3 + *self == TxFnum::Value3 } #[doc = "Tx FIFO 15 flush in device mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TX_FNUM_A::VALUE4 + *self == TxFnum::Value4 } #[doc = "Flush all the transmit FIFOs in device or host mode."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == TX_FNUM_A::VALUE5 + *self == TxFnum::Value5 } } #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 5, TX_FNUM_A>; -impl<'a, REG> TX_FNUM_W<'a, REG> +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 5, TxFnum>; +impl<'a, REG> TxFnumW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -93,125 +93,116 @@ where #[doc = "Non-periodic TxFIFO flush in Host mode or Tx FIFO 0 flush in device mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_FNUM_A::VALUE1) + self.variant(TxFnum::Value1) } #[doc = "Periodic TxFIFO flush in Host mode or Tx FIFO 1 flush in device mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_FNUM_A::VALUE2) + self.variant(TxFnum::Value2) } #[doc = "Tx FIFO 2 flush in device mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TX_FNUM_A::VALUE3) + self.variant(TxFnum::Value3) } #[doc = "Tx FIFO 15 flush in device mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TX_FNUM_A::VALUE4) + self.variant(TxFnum::Value4) } #[doc = "Flush all the transmit FIFOs in device or host mode."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(TX_FNUM_A::VALUE5) + self.variant(TxFnum::Value5) } } #[doc = "Field `DMAReq` reader - DMA Request Signal"] -pub type DMAREQ_R = crate::BitReader; +pub type DmareqR = crate::BitReader; #[doc = "Field `AHBIdle` reader - AHB Master Idle"] -pub type AHBIDLE_R = crate::BitReader; +pub type AhbidleR = crate::BitReader; impl R { #[doc = "Bit 0 - Core Soft Reset"] #[inline(always)] - pub fn csft_rst(&self) -> CSFT_RST_R { - CSFT_RST_R::new((self.bits & 1) != 0) + pub fn csft_rst(&self) -> CsftRstR { + CsftRstR::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Host Frame Counter Reset"] #[inline(always)] - pub fn frm_cntr_rst(&self) -> FRM_CNTR_RST_R { - FRM_CNTR_RST_R::new(((self.bits >> 2) & 1) != 0) + pub fn frm_cntr_rst(&self) -> FrmCntrRstR { + FrmCntrRstR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - RxFIFO Flush"] #[inline(always)] - pub fn rx_fflsh(&self) -> RX_FFLSH_R { - RX_FFLSH_R::new(((self.bits >> 4) & 1) != 0) + pub fn rx_fflsh(&self) -> RxFflshR { + RxFflshR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TxFIFO Flush"] #[inline(always)] - pub fn tx_fflsh(&self) -> TX_FFLSH_R { - TX_FFLSH_R::new(((self.bits >> 5) & 1) != 0) + pub fn tx_fflsh(&self) -> TxFflshR { + TxFflshR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:10 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 6) & 0x1f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 6) & 0x1f) as u8) } #[doc = "Bit 30 - DMA Request Signal"] #[inline(always)] - pub fn dmareq(&self) -> DMAREQ_R { - DMAREQ_R::new(((self.bits >> 30) & 1) != 0) + pub fn dmareq(&self) -> DmareqR { + DmareqR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AHB Master Idle"] #[inline(always)] - pub fn ahbidle(&self) -> AHBIDLE_R { - AHBIDLE_R::new(((self.bits >> 31) & 1) != 0) + pub fn ahbidle(&self) -> AhbidleR { + AhbidleR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Core Soft Reset"] #[inline(always)] #[must_use] - pub fn csft_rst(&mut self) -> CSFT_RST_W { - CSFT_RST_W::new(self, 0) + pub fn csft_rst(&mut self) -> CsftRstW { + CsftRstW::new(self, 0) } #[doc = "Bit 2 - Host Frame Counter Reset"] #[inline(always)] #[must_use] - pub fn frm_cntr_rst(&mut self) -> FRM_CNTR_RST_W { - FRM_CNTR_RST_W::new(self, 2) + pub fn frm_cntr_rst(&mut self) -> FrmCntrRstW { + FrmCntrRstW::new(self, 2) } #[doc = "Bit 4 - RxFIFO Flush"] #[inline(always)] #[must_use] - pub fn rx_fflsh(&mut self) -> RX_FFLSH_W { - RX_FFLSH_W::new(self, 4) + pub fn rx_fflsh(&mut self) -> RxFflshW { + RxFflshW::new(self, 4) } #[doc = "Bit 5 - TxFIFO Flush"] #[inline(always)] #[must_use] - pub fn tx_fflsh(&mut self) -> TX_FFLSH_W { - TX_FFLSH_W::new(self, 5) + pub fn tx_fflsh(&mut self) -> TxFflshW { + TxFflshW::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 6) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 6) } } #[doc = "Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRSTCTL_SPEC; -impl crate::RegisterSpec for GRSTCTL_SPEC { +pub struct GrstctlSpec; +impl crate::RegisterSpec for GrstctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`grstctl::R`](R) reader structure"] -impl crate::Readable for GRSTCTL_SPEC {} +impl crate::Readable for GrstctlSpec {} #[doc = "`write(|w| ..)` method takes [`grstctl::W`](W) writer structure"] -impl crate::Writable for GRSTCTL_SPEC { +impl crate::Writable for GrstctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRSTCTL to value 0x1000_0000"] -impl crate::Resettable for GRSTCTL_SPEC { +impl crate::Resettable for GrstctlSpec { const RESET_VALUE: u32 = 0x1000_0000; } diff --git a/src/usb0/grxfsiz.rs b/src/usb0/grxfsiz.rs index 4c6477b8..05b2ef45 100644 --- a/src/usb0/grxfsiz.rs +++ b/src/usb0/grxfsiz.rs @@ -1,49 +1,40 @@ #[doc = "Register `GRXFSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GRXFSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RxFDep` reader - RxFIFO Depth"] -pub type RX_FDEP_R = crate::FieldReader; +pub type RxFdepR = crate::FieldReader; #[doc = "Field `RxFDep` writer - RxFIFO Depth"] -pub type RX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type RxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RxFIFO Depth"] #[inline(always)] - pub fn rx_fdep(&self) -> RX_FDEP_R { - RX_FDEP_R::new((self.bits & 0xffff) as u16) + pub fn rx_fdep(&self) -> RxFdepR { + RxFdepR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - RxFIFO Depth"] #[inline(always)] #[must_use] - pub fn rx_fdep(&mut self) -> RX_FDEP_W { - RX_FDEP_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rx_fdep(&mut self) -> RxFdepW { + RxFdepW::new(self, 0) } } #[doc = "Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRXFSIZ_SPEC; -impl crate::RegisterSpec for GRXFSIZ_SPEC { +pub struct GrxfsizSpec; +impl crate::RegisterSpec for GrxfsizSpec { type Ux = u32; } #[doc = "`read()` method returns [`grxfsiz::R`](R) reader structure"] -impl crate::Readable for GRXFSIZ_SPEC {} +impl crate::Readable for GrxfsizSpec {} #[doc = "`write(|w| ..)` method takes [`grxfsiz::W`](W) writer structure"] -impl crate::Writable for GRXFSIZ_SPEC { +impl crate::Writable for GrxfsizSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRXFSIZ to value 0x011a"] -impl crate::Resettable for GRXFSIZ_SPEC { +impl crate::Resettable for GrxfsizSpec { const RESET_VALUE: u32 = 0x011a; } diff --git a/src/usb0/grxstsp_devicemode.rs b/src/usb0/grxstsp_devicemode.rs index bb158b99..45f5f6c6 100644 --- a/src/usb0/grxstsp_devicemode.rs +++ b/src/usb0/grxstsp_devicemode.rs @@ -1,168 +1,168 @@ #[doc = "Register `GRXSTSP_DEVICEMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `EPNum` reader - Endpoint Number"] -pub type EPNUM_R = crate::FieldReader; +pub type EpnumR = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BCNT_R = crate::FieldReader; -#[doc = "Field `DPID` reader - Data PID"] -pub type DPID_R = crate::FieldReader; +pub type BcntR = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: DATA1"] - VALUE2 = 2, + Value2 = 2, #[doc = "1: DATA2"] - VALUE3 = 1, + Value3 = 1, #[doc = "3: MDATA"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as _ } } -impl crate::FieldSpec for DPID_A { +impl crate::FieldSpec for Dpid { type Ux = u8; } -impl DPID_R { +#[doc = "Field `DPID` reader - Data PID"] +pub type DpidR = crate::FieldReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - 0 => DPID_A::VALUE1, - 2 => DPID_A::VALUE2, - 1 => DPID_A::VALUE3, - 3 => DPID_A::VALUE4, + 0 => Dpid::Value1, + 2 => Dpid::Value2, + 1 => Dpid::Value3, + 3 => Dpid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DPID_A::VALUE3 + *self == Dpid::Value3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DPID_A::VALUE4 + *self == Dpid::Value4 } } -#[doc = "Field `PktSts` reader - Packet Status"] -pub type PKT_STS_R = crate::FieldReader; #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PKT_STS_A { +pub enum PktSts { #[doc = "1: Global OUT NAK (triggers an interrupt)"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: OUT data packet received"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: OUT transfer completed (triggers an interrupt)"] - VALUE3 = 3, + Value3 = 3, #[doc = "4: SETUP transaction completed (triggers an interrupt)"] - VALUE4 = 4, + Value4 = 4, #[doc = "6: SETUP data packet received"] - VALUE5 = 6, + Value5 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PKT_STS_A) -> Self { + fn from(variant: PktSts) -> Self { variant as _ } } -impl crate::FieldSpec for PKT_STS_A { +impl crate::FieldSpec for PktSts { type Ux = u8; } -impl PKT_STS_R { +#[doc = "Field `PktSts` reader - Packet Status"] +pub type PktStsR = crate::FieldReader; +impl PktStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PKT_STS_A::VALUE1), - 2 => Some(PKT_STS_A::VALUE2), - 3 => Some(PKT_STS_A::VALUE3), - 4 => Some(PKT_STS_A::VALUE4), - 6 => Some(PKT_STS_A::VALUE5), + 1 => Some(PktSts::Value1), + 2 => Some(PktSts::Value2), + 3 => Some(PktSts::Value3), + 4 => Some(PktSts::Value4), + 6 => Some(PktSts::Value5), _ => None, } } #[doc = "Global OUT NAK (triggers an interrupt)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PKT_STS_A::VALUE1 + *self == PktSts::Value1 } #[doc = "OUT data packet received"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PKT_STS_A::VALUE2 + *self == PktSts::Value2 } #[doc = "OUT transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PKT_STS_A::VALUE3 + *self == PktSts::Value3 } #[doc = "SETUP transaction completed (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PKT_STS_A::VALUE4 + *self == PktSts::Value4 } #[doc = "SETUP data packet received"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PKT_STS_A::VALUE5 + *self == PktSts::Value5 } } #[doc = "Field `FN` reader - Frame Number"] -pub type FN_R = crate::FieldReader; +pub type FnR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Endpoint Number"] #[inline(always)] - pub fn epnum(&self) -> EPNUM_R { - EPNUM_R::new((self.bits & 0x0f) as u8) + pub fn epnum(&self) -> EpnumR { + EpnumR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BCNT_R { - BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BcntR { + BcntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PKT_STS_R { - PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PktStsR { + PktStsR::new(((self.bits >> 17) & 0x0f) as u8) } #[doc = "Bits 21:24 - Frame Number"] #[inline(always)] - pub fn fn_(&self) -> FN_R { - FN_R::new(((self.bits >> 21) & 0x0f) as u8) + pub fn fn_(&self) -> FnR { + FnR::new(((self.bits >> 21) & 0x0f) as u8) } } #[doc = "Receive Status Read and Pop Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_devicemode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRXSTSP_DEVICEMODE_SPEC; -impl crate::RegisterSpec for GRXSTSP_DEVICEMODE_SPEC { +pub struct GrxstspDevicemodeSpec; +impl crate::RegisterSpec for GrxstspDevicemodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`grxstsp_devicemode::R`](R) reader structure"] -impl crate::Readable for GRXSTSP_DEVICEMODE_SPEC {} +impl crate::Readable for GrxstspDevicemodeSpec {} #[doc = "`reset()` method sets GRXSTSP_DEVICEMODE to value 0"] -impl crate::Resettable for GRXSTSP_DEVICEMODE_SPEC { +impl crate::Resettable for GrxstspDevicemodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/grxstsp_hostmode.rs b/src/usb0/grxstsp_hostmode.rs index 9708c6b5..7aaec19b 100644 --- a/src/usb0/grxstsp_hostmode.rs +++ b/src/usb0/grxstsp_hostmode.rs @@ -1,153 +1,153 @@ #[doc = "Register `GRXSTSP_HOSTMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ChNum` reader - Channel Number"] -pub type CH_NUM_R = crate::FieldReader; +pub type ChNumR = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BCNT_R = crate::FieldReader; -#[doc = "Field `DPID` reader - Data PID"] -pub type DPID_R = crate::FieldReader; +pub type BcntR = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: DATA1"] - VALUE2 = 2, + Value2 = 2, #[doc = "1: DATA2"] - VALUE3 = 1, + Value3 = 1, #[doc = "3: MDATA"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as _ } } -impl crate::FieldSpec for DPID_A { +impl crate::FieldSpec for Dpid { type Ux = u8; } -impl DPID_R { +#[doc = "Field `DPID` reader - Data PID"] +pub type DpidR = crate::FieldReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - 0 => DPID_A::VALUE1, - 2 => DPID_A::VALUE2, - 1 => DPID_A::VALUE3, - 3 => DPID_A::VALUE4, + 0 => Dpid::Value1, + 2 => Dpid::Value2, + 1 => Dpid::Value3, + 3 => Dpid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DPID_A::VALUE3 + *self == Dpid::Value3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DPID_A::VALUE4 + *self == Dpid::Value4 } } -#[doc = "Field `PktSts` reader - Packet Status"] -pub type PKT_STS_R = crate::FieldReader; #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PKT_STS_A { +pub enum PktSts { #[doc = "2: IN data packet received"] - VALUE1 = 2, + Value1 = 2, #[doc = "3: IN transfer completed (triggers an interrupt)"] - VALUE2 = 3, + Value2 = 3, #[doc = "5: Data toggle error (triggers an interrupt)"] - VALUE3 = 5, + Value3 = 5, #[doc = "7: Channel halted (triggers an interrupt)"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PKT_STS_A) -> Self { + fn from(variant: PktSts) -> Self { variant as _ } } -impl crate::FieldSpec for PKT_STS_A { +impl crate::FieldSpec for PktSts { type Ux = u8; } -impl PKT_STS_R { +#[doc = "Field `PktSts` reader - Packet Status"] +pub type PktStsR = crate::FieldReader; +impl PktStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 2 => Some(PKT_STS_A::VALUE1), - 3 => Some(PKT_STS_A::VALUE2), - 5 => Some(PKT_STS_A::VALUE3), - 7 => Some(PKT_STS_A::VALUE4), + 2 => Some(PktSts::Value1), + 3 => Some(PktSts::Value2), + 5 => Some(PktSts::Value3), + 7 => Some(PktSts::Value4), _ => None, } } #[doc = "IN data packet received"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PKT_STS_A::VALUE1 + *self == PktSts::Value1 } #[doc = "IN transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PKT_STS_A::VALUE2 + *self == PktSts::Value2 } #[doc = "Data toggle error (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PKT_STS_A::VALUE3 + *self == PktSts::Value3 } #[doc = "Channel halted (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PKT_STS_A::VALUE4 + *self == PktSts::Value4 } } impl R { #[doc = "Bits 0:3 - Channel Number"] #[inline(always)] - pub fn ch_num(&self) -> CH_NUM_R { - CH_NUM_R::new((self.bits & 0x0f) as u8) + pub fn ch_num(&self) -> ChNumR { + ChNumR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BCNT_R { - BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BcntR { + BcntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PKT_STS_R { - PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PktStsR { + PktStsR::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Receive Status Read and Pop Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp_hostmode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRXSTSP_HOSTMODE_SPEC; -impl crate::RegisterSpec for GRXSTSP_HOSTMODE_SPEC { +pub struct GrxstspHostmodeSpec; +impl crate::RegisterSpec for GrxstspHostmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`grxstsp_hostmode::R`](R) reader structure"] -impl crate::Readable for GRXSTSP_HOSTMODE_SPEC {} +impl crate::Readable for GrxstspHostmodeSpec {} #[doc = "`reset()` method sets GRXSTSP_HOSTMODE to value 0"] -impl crate::Resettable for GRXSTSP_HOSTMODE_SPEC { +impl crate::Resettable for GrxstspHostmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/grxstsr_devicemode.rs b/src/usb0/grxstsr_devicemode.rs index d50013cc..f1f026c4 100644 --- a/src/usb0/grxstsr_devicemode.rs +++ b/src/usb0/grxstsr_devicemode.rs @@ -1,168 +1,168 @@ #[doc = "Register `GRXSTSR_DEVICEMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `EPNum` reader - Endpoint Number"] -pub type EPNUM_R = crate::FieldReader; +pub type EpnumR = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BCNT_R = crate::FieldReader; -#[doc = "Field `DPID` reader - Data PID"] -pub type DPID_R = crate::FieldReader; +pub type BcntR = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: DATA1"] - VALUE2 = 2, + Value2 = 2, #[doc = "1: DATA2"] - VALUE3 = 1, + Value3 = 1, #[doc = "3: MDATA"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as _ } } -impl crate::FieldSpec for DPID_A { +impl crate::FieldSpec for Dpid { type Ux = u8; } -impl DPID_R { +#[doc = "Field `DPID` reader - Data PID"] +pub type DpidR = crate::FieldReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - 0 => DPID_A::VALUE1, - 2 => DPID_A::VALUE2, - 1 => DPID_A::VALUE3, - 3 => DPID_A::VALUE4, + 0 => Dpid::Value1, + 2 => Dpid::Value2, + 1 => Dpid::Value3, + 3 => Dpid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DPID_A::VALUE3 + *self == Dpid::Value3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DPID_A::VALUE4 + *self == Dpid::Value4 } } -#[doc = "Field `PktSts` reader - Packet Status"] -pub type PKT_STS_R = crate::FieldReader; #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PKT_STS_A { +pub enum PktSts { #[doc = "1: Global OUT NAK (triggers an interrupt)"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: OUT data packet received"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: OUT transfer completed (triggers an interrupt)"] - VALUE3 = 3, + Value3 = 3, #[doc = "4: SETUP transaction completed (triggers an interrupt)"] - VALUE4 = 4, + Value4 = 4, #[doc = "6: SETUP data packet received"] - VALUE5 = 6, + Value5 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PKT_STS_A) -> Self { + fn from(variant: PktSts) -> Self { variant as _ } } -impl crate::FieldSpec for PKT_STS_A { +impl crate::FieldSpec for PktSts { type Ux = u8; } -impl PKT_STS_R { +#[doc = "Field `PktSts` reader - Packet Status"] +pub type PktStsR = crate::FieldReader; +impl PktStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PKT_STS_A::VALUE1), - 2 => Some(PKT_STS_A::VALUE2), - 3 => Some(PKT_STS_A::VALUE3), - 4 => Some(PKT_STS_A::VALUE4), - 6 => Some(PKT_STS_A::VALUE5), + 1 => Some(PktSts::Value1), + 2 => Some(PktSts::Value2), + 3 => Some(PktSts::Value3), + 4 => Some(PktSts::Value4), + 6 => Some(PktSts::Value5), _ => None, } } #[doc = "Global OUT NAK (triggers an interrupt)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PKT_STS_A::VALUE1 + *self == PktSts::Value1 } #[doc = "OUT data packet received"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PKT_STS_A::VALUE2 + *self == PktSts::Value2 } #[doc = "OUT transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PKT_STS_A::VALUE3 + *self == PktSts::Value3 } #[doc = "SETUP transaction completed (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PKT_STS_A::VALUE4 + *self == PktSts::Value4 } #[doc = "SETUP data packet received"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PKT_STS_A::VALUE5 + *self == PktSts::Value5 } } #[doc = "Field `FN` reader - Frame Number"] -pub type FN_R = crate::FieldReader; +pub type FnR = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Endpoint Number"] #[inline(always)] - pub fn epnum(&self) -> EPNUM_R { - EPNUM_R::new((self.bits & 0x0f) as u8) + pub fn epnum(&self) -> EpnumR { + EpnumR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BCNT_R { - BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BcntR { + BcntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PKT_STS_R { - PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PktStsR { + PktStsR::new(((self.bits >> 17) & 0x0f) as u8) } #[doc = "Bits 21:24 - Frame Number"] #[inline(always)] - pub fn fn_(&self) -> FN_R { - FN_R::new(((self.bits >> 21) & 0x0f) as u8) + pub fn fn_(&self) -> FnR { + FnR::new(((self.bits >> 21) & 0x0f) as u8) } } #[doc = "Receive Status Debug Read Register \\[DEVICEMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_devicemode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRXSTSR_DEVICEMODE_SPEC; -impl crate::RegisterSpec for GRXSTSR_DEVICEMODE_SPEC { +pub struct GrxstsrDevicemodeSpec; +impl crate::RegisterSpec for GrxstsrDevicemodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`grxstsr_devicemode::R`](R) reader structure"] -impl crate::Readable for GRXSTSR_DEVICEMODE_SPEC {} +impl crate::Readable for GrxstsrDevicemodeSpec {} #[doc = "`reset()` method sets GRXSTSR_DEVICEMODE to value 0"] -impl crate::Resettable for GRXSTSR_DEVICEMODE_SPEC { +impl crate::Resettable for GrxstsrDevicemodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/grxstsr_hostmode.rs b/src/usb0/grxstsr_hostmode.rs index 069fee1b..daba5a9c 100644 --- a/src/usb0/grxstsr_hostmode.rs +++ b/src/usb0/grxstsr_hostmode.rs @@ -1,153 +1,153 @@ #[doc = "Register `GRXSTSR_HOSTMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ChNum` reader - Channel Number"] -pub type CH_NUM_R = crate::FieldReader; +pub type ChNumR = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BCNT_R = crate::FieldReader; -#[doc = "Field `DPID` reader - Data PID"] -pub type DPID_R = crate::FieldReader; +pub type BcntR = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "2: DATA1"] - VALUE2 = 2, + Value2 = 2, #[doc = "1: DATA2"] - VALUE3 = 1, + Value3 = 1, #[doc = "3: MDATA"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as _ } } -impl crate::FieldSpec for DPID_A { +impl crate::FieldSpec for Dpid { type Ux = u8; } -impl DPID_R { +#[doc = "Field `DPID` reader - Data PID"] +pub type DpidR = crate::FieldReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - 0 => DPID_A::VALUE1, - 2 => DPID_A::VALUE2, - 1 => DPID_A::VALUE3, - 3 => DPID_A::VALUE4, + 0 => Dpid::Value1, + 2 => Dpid::Value2, + 1 => Dpid::Value3, + 3 => Dpid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DPID_A::VALUE3 + *self == Dpid::Value3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DPID_A::VALUE4 + *self == Dpid::Value4 } } -#[doc = "Field `PktSts` reader - Packet Status"] -pub type PKT_STS_R = crate::FieldReader; #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PKT_STS_A { +pub enum PktSts { #[doc = "2: IN data packet received"] - VALUE1 = 2, + Value1 = 2, #[doc = "3: IN transfer completed (triggers an interrupt)"] - VALUE2 = 3, + Value2 = 3, #[doc = "5: Data toggle error (triggers an interrupt)"] - VALUE3 = 5, + Value3 = 5, #[doc = "7: Channel halted (triggers an interrupt)"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PKT_STS_A) -> Self { + fn from(variant: PktSts) -> Self { variant as _ } } -impl crate::FieldSpec for PKT_STS_A { +impl crate::FieldSpec for PktSts { type Ux = u8; } -impl PKT_STS_R { +#[doc = "Field `PktSts` reader - Packet Status"] +pub type PktStsR = crate::FieldReader; +impl PktStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 2 => Some(PKT_STS_A::VALUE1), - 3 => Some(PKT_STS_A::VALUE2), - 5 => Some(PKT_STS_A::VALUE3), - 7 => Some(PKT_STS_A::VALUE4), + 2 => Some(PktSts::Value1), + 3 => Some(PktSts::Value2), + 5 => Some(PktSts::Value3), + 7 => Some(PktSts::Value4), _ => None, } } #[doc = "IN data packet received"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PKT_STS_A::VALUE1 + *self == PktSts::Value1 } #[doc = "IN transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PKT_STS_A::VALUE2 + *self == PktSts::Value2 } #[doc = "Data toggle error (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PKT_STS_A::VALUE3 + *self == PktSts::Value3 } #[doc = "Channel halted (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PKT_STS_A::VALUE4 + *self == PktSts::Value4 } } impl R { #[doc = "Bits 0:3 - Channel Number"] #[inline(always)] - pub fn ch_num(&self) -> CH_NUM_R { - CH_NUM_R::new((self.bits & 0x0f) as u8) + pub fn ch_num(&self) -> ChNumR { + ChNumR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BCNT_R { - BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BcntR { + BcntR::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PKT_STS_R { - PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PktStsR { + PktStsR::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Receive Status Debug Read Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr_hostmode::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GRXSTSR_HOSTMODE_SPEC; -impl crate::RegisterSpec for GRXSTSR_HOSTMODE_SPEC { +pub struct GrxstsrHostmodeSpec; +impl crate::RegisterSpec for GrxstsrHostmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`grxstsr_hostmode::R`](R) reader structure"] -impl crate::Readable for GRXSTSR_HOSTMODE_SPEC {} +impl crate::Readable for GrxstsrHostmodeSpec {} #[doc = "`reset()` method sets GRXSTSR_HOSTMODE to value 0"] -impl crate::Resettable for GRXSTSR_HOSTMODE_SPEC { +impl crate::Resettable for GrxstsrHostmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/guid.rs b/src/usb0/guid.rs index 2b68d7a5..b1cd1e49 100644 --- a/src/usb0/guid.rs +++ b/src/usb0/guid.rs @@ -1,79 +1,70 @@ #[doc = "Register `GUID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GUID` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_REV` writer - Module Revision"] -pub type MOD_REV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type ModRevW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_TYPE` writer - Module Type"] -pub type MOD_TYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type ModTypeW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` writer - Module Number"] -pub type MOD_NUMBER_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type ModNumberW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] #[must_use] - pub fn mod_rev(&mut self) -> MOD_REV_W { - MOD_REV_W::new(self, 0) + pub fn mod_rev(&mut self) -> ModRevW { + ModRevW::new(self, 0) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] #[must_use] - pub fn mod_type(&mut self) -> MOD_TYPE_W { - MOD_TYPE_W::new(self, 8) + pub fn mod_type(&mut self) -> ModTypeW { + ModTypeW::new(self, 8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] #[must_use] - pub fn mod_number(&mut self) -> MOD_NUMBER_W { - MOD_NUMBER_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mod_number(&mut self) -> ModNumberW { + ModNumberW::new(self, 16) } } #[doc = "USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GUID_SPEC; -impl crate::RegisterSpec for GUID_SPEC { +pub struct GuidSpec; +impl crate::RegisterSpec for GuidSpec { type Ux = u32; } #[doc = "`read()` method returns [`guid::R`](R) reader structure"] -impl crate::Readable for GUID_SPEC {} +impl crate::Readable for GuidSpec {} #[doc = "`write(|w| ..)` method takes [`guid::W`](W) writer structure"] -impl crate::Writable for GUID_SPEC { +impl crate::Writable for GuidSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GUID to value 0x00ae_c000"] -impl crate::Resettable for GUID_SPEC { +impl crate::Resettable for GuidSpec { const RESET_VALUE: u32 = 0x00ae_c000; } diff --git a/src/usb0/gusbcfg.rs b/src/usb0/gusbcfg.rs index a0716211..c8515103 100644 --- a/src/usb0/gusbcfg.rs +++ b/src/usb0/gusbcfg.rs @@ -1,485 +1,476 @@ #[doc = "Register `GUSBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GUSBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TOutCal` reader - FS Timeout Calibration"] -pub type TOUT_CAL_R = crate::FieldReader; +pub type ToutCalR = crate::FieldReader; #[doc = "Field `TOutCal` writer - FS Timeout Calibration"] -pub type TOUT_CAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; -#[doc = "Field `PHYSel` reader - USB 1.1 Full-Speed Serial Transceiver Select"] -pub type PHYSEL_R = crate::BitReader; +pub type ToutCalW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "USB 1.1 Full-Speed Serial Transceiver Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PHYSEL_A { +pub enum Physel { #[doc = "1: USB 1.1 full-speed serial transceiver"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PHYSEL_A) -> Self { + fn from(variant: Physel) -> Self { variant as u8 != 0 } } -impl PHYSEL_R { +#[doc = "Field `PHYSel` reader - USB 1.1 Full-Speed Serial Transceiver Select"] +pub type PhyselR = crate::BitReader; +impl PhyselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(PHYSEL_A::VALUE2), + true => Some(Physel::Value2), _ => None, } } #[doc = "USB 1.1 full-speed serial transceiver"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PHYSEL_A::VALUE2 + *self == Physel::Value2 } } -#[doc = "Field `SRPCap` reader - SRP-Capable"] -pub type SRPCAP_R = crate::BitReader; #[doc = "SRP-Capable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRPCAP_A { +pub enum Srpcap { #[doc = "0: SRP capability is not enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SRP capability is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRPCAP_A) -> Self { + fn from(variant: Srpcap) -> Self { variant as u8 != 0 } } -impl SRPCAP_R { +#[doc = "Field `SRPCap` reader - SRP-Capable"] +pub type SrpcapR = crate::BitReader; +impl SrpcapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRPCAP_A { + pub const fn variant(&self) -> Srpcap { match self.bits { - false => SRPCAP_A::VALUE1, - true => SRPCAP_A::VALUE2, + false => Srpcap::Value1, + true => Srpcap::Value2, } } #[doc = "SRP capability is not enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRPCAP_A::VALUE1 + *self == Srpcap::Value1 } #[doc = "SRP capability is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRPCAP_A::VALUE2 + *self == Srpcap::Value2 } } #[doc = "Field `SRPCap` writer - SRP-Capable"] -pub type SRPCAP_W<'a, REG> = crate::BitWriter<'a, REG, SRPCAP_A>; -impl<'a, REG> SRPCAP_W<'a, REG> +pub type SrpcapW<'a, REG> = crate::BitWriter<'a, REG, Srpcap>; +impl<'a, REG> SrpcapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SRP capability is not enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRPCAP_A::VALUE1) + self.variant(Srpcap::Value1) } #[doc = "SRP capability is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRPCAP_A::VALUE2) + self.variant(Srpcap::Value2) } } -#[doc = "Field `HNPCap` reader - HNP-Capable"] -pub type HNPCAP_R = crate::BitReader; #[doc = "HNP-Capable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HNPCAP_A { +pub enum Hnpcap { #[doc = "0: HNP capability is not enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HNP capability is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HNPCAP_A) -> Self { + fn from(variant: Hnpcap) -> Self { variant as u8 != 0 } } -impl HNPCAP_R { +#[doc = "Field `HNPCap` reader - HNP-Capable"] +pub type HnpcapR = crate::BitReader; +impl HnpcapR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HNPCAP_A { + pub const fn variant(&self) -> Hnpcap { match self.bits { - false => HNPCAP_A::VALUE1, - true => HNPCAP_A::VALUE2, + false => Hnpcap::Value1, + true => Hnpcap::Value2, } } #[doc = "HNP capability is not enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HNPCAP_A::VALUE1 + *self == Hnpcap::Value1 } #[doc = "HNP capability is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HNPCAP_A::VALUE2 + *self == Hnpcap::Value2 } } #[doc = "Field `HNPCap` writer - HNP-Capable"] -pub type HNPCAP_W<'a, REG> = crate::BitWriter<'a, REG, HNPCAP_A>; -impl<'a, REG> HNPCAP_W<'a, REG> +pub type HnpcapW<'a, REG> = crate::BitWriter<'a, REG, Hnpcap>; +impl<'a, REG> HnpcapW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HNP capability is not enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HNPCAP_A::VALUE1) + self.variant(Hnpcap::Value1) } #[doc = "HNP capability is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HNPCAP_A::VALUE2) + self.variant(Hnpcap::Value2) } } #[doc = "Field `USBTrdTim` reader - USB Turnaround Time"] -pub type USBTRD_TIM_R = crate::FieldReader; +pub type UsbtrdTimR = crate::FieldReader; #[doc = "Field `USBTrdTim` writer - USB Turnaround Time"] -pub type USBTRD_TIM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `OtgI2CSel` reader - UTMIFS Interface Select"] -pub type OTG_I2CSEL_R = crate::BitReader; +pub type UsbtrdTimW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "UTMIFS Interface Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum OTG_I2CSEL_A { +pub enum OtgI2csel { #[doc = "0: UTMI USB 1.1 Full-Speed interface for OTG signals"] - VALUE1 = 0, + Value1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: OTG_I2CSEL_A) -> Self { + fn from(variant: OtgI2csel) -> Self { variant as u8 != 0 } } -impl OTG_I2CSEL_R { +#[doc = "Field `OtgI2CSel` reader - UTMIFS Interface Select"] +pub type OtgI2cselR = crate::BitReader; +impl OtgI2cselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(OTG_I2CSEL_A::VALUE1), + false => Some(OtgI2csel::Value1), _ => None, } } #[doc = "UTMI USB 1.1 Full-Speed interface for OTG signals"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == OTG_I2CSEL_A::VALUE1 + *self == OtgI2csel::Value1 } } #[doc = "Field `OtgI2CSel` writer - UTMIFS Interface Select"] -pub type OTG_I2CSEL_W<'a, REG> = crate::BitWriter<'a, REG, OTG_I2CSEL_A>; -impl<'a, REG> OTG_I2CSEL_W<'a, REG> +pub type OtgI2cselW<'a, REG> = crate::BitWriter<'a, REG, OtgI2csel>; +impl<'a, REG> OtgI2cselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "UTMI USB 1.1 Full-Speed interface for OTG signals"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(OTG_I2CSEL_A::VALUE1) + self.variant(OtgI2csel::Value1) } } -#[doc = "Field `TxEndDelay` reader - Tx End Delay"] -pub type TX_END_DELAY_R = crate::BitReader; #[doc = "Tx End Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TX_END_DELAY_A { +pub enum TxEndDelay { #[doc = "0: Normal mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Introduce Tx end delay timers"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TX_END_DELAY_A) -> Self { + fn from(variant: TxEndDelay) -> Self { variant as u8 != 0 } } -impl TX_END_DELAY_R { +#[doc = "Field `TxEndDelay` reader - Tx End Delay"] +pub type TxEndDelayR = crate::BitReader; +impl TxEndDelayR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TX_END_DELAY_A { + pub const fn variant(&self) -> TxEndDelay { match self.bits { - false => TX_END_DELAY_A::VALUE1, - true => TX_END_DELAY_A::VALUE2, + false => TxEndDelay::Value1, + true => TxEndDelay::Value2, } } #[doc = "Normal mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TX_END_DELAY_A::VALUE1 + *self == TxEndDelay::Value1 } #[doc = "Introduce Tx end delay timers"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TX_END_DELAY_A::VALUE2 + *self == TxEndDelay::Value2 } } #[doc = "Field `TxEndDelay` writer - Tx End Delay"] -pub type TX_END_DELAY_W<'a, REG> = crate::BitWriter<'a, REG, TX_END_DELAY_A>; -impl<'a, REG> TX_END_DELAY_W<'a, REG> +pub type TxEndDelayW<'a, REG> = crate::BitWriter<'a, REG, TxEndDelay>; +impl<'a, REG> TxEndDelayW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TX_END_DELAY_A::VALUE1) + self.variant(TxEndDelay::Value1) } #[doc = "Introduce Tx end delay timers"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TX_END_DELAY_A::VALUE2) + self.variant(TxEndDelay::Value2) } } -#[doc = "Field `ForceHstMode` reader - Force Host Mode"] -pub type FORCE_HST_MODE_R = crate::BitReader; #[doc = "Force Host Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCE_HST_MODE_A { +pub enum ForceHstMode { #[doc = "0: Normal Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Force Host Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCE_HST_MODE_A) -> Self { + fn from(variant: ForceHstMode) -> Self { variant as u8 != 0 } } -impl FORCE_HST_MODE_R { +#[doc = "Field `ForceHstMode` reader - Force Host Mode"] +pub type ForceHstModeR = crate::BitReader; +impl ForceHstModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FORCE_HST_MODE_A { + pub const fn variant(&self) -> ForceHstMode { match self.bits { - false => FORCE_HST_MODE_A::VALUE1, - true => FORCE_HST_MODE_A::VALUE2, + false => ForceHstMode::Value1, + true => ForceHstMode::Value2, } } #[doc = "Normal Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FORCE_HST_MODE_A::VALUE1 + *self == ForceHstMode::Value1 } #[doc = "Force Host Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FORCE_HST_MODE_A::VALUE2 + *self == ForceHstMode::Value2 } } #[doc = "Field `ForceHstMode` writer - Force Host Mode"] -pub type FORCE_HST_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FORCE_HST_MODE_A>; -impl<'a, REG> FORCE_HST_MODE_W<'a, REG> +pub type ForceHstModeW<'a, REG> = crate::BitWriter<'a, REG, ForceHstMode>; +impl<'a, REG> ForceHstModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FORCE_HST_MODE_A::VALUE1) + self.variant(ForceHstMode::Value1) } #[doc = "Force Host Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FORCE_HST_MODE_A::VALUE2) + self.variant(ForceHstMode::Value2) } } -#[doc = "Field `ForceDevMode` reader - Force Device Mode"] -pub type FORCE_DEV_MODE_R = crate::BitReader; #[doc = "Force Device Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FORCE_DEV_MODE_A { +pub enum ForceDevMode { #[doc = "0: Normal Mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Force Device Mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FORCE_DEV_MODE_A) -> Self { + fn from(variant: ForceDevMode) -> Self { variant as u8 != 0 } } -impl FORCE_DEV_MODE_R { +#[doc = "Field `ForceDevMode` reader - Force Device Mode"] +pub type ForceDevModeR = crate::BitReader; +impl ForceDevModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FORCE_DEV_MODE_A { + pub const fn variant(&self) -> ForceDevMode { match self.bits { - false => FORCE_DEV_MODE_A::VALUE1, - true => FORCE_DEV_MODE_A::VALUE2, + false => ForceDevMode::Value1, + true => ForceDevMode::Value2, } } #[doc = "Normal Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FORCE_DEV_MODE_A::VALUE1 + *self == ForceDevMode::Value1 } #[doc = "Force Device Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FORCE_DEV_MODE_A::VALUE2 + *self == ForceDevMode::Value2 } } #[doc = "Field `ForceDevMode` writer - Force Device Mode"] -pub type FORCE_DEV_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FORCE_DEV_MODE_A>; -impl<'a, REG> FORCE_DEV_MODE_W<'a, REG> +pub type ForceDevModeW<'a, REG> = crate::BitWriter<'a, REG, ForceDevMode>; +impl<'a, REG> ForceDevModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FORCE_DEV_MODE_A::VALUE1) + self.variant(ForceDevMode::Value1) } #[doc = "Force Device Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FORCE_DEV_MODE_A::VALUE2) + self.variant(ForceDevMode::Value2) } } #[doc = "Field `CTP` reader - Corrupt Tx packet"] -pub type CTP_R = crate::BitReader; +pub type CtpR = crate::BitReader; #[doc = "Field `CTP` writer - Corrupt Tx packet"] -pub type CTP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CtpW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - FS Timeout Calibration"] #[inline(always)] - pub fn tout_cal(&self) -> TOUT_CAL_R { - TOUT_CAL_R::new((self.bits & 7) as u8) + pub fn tout_cal(&self) -> ToutCalR { + ToutCalR::new((self.bits & 7) as u8) } #[doc = "Bit 6 - USB 1.1 Full-Speed Serial Transceiver Select"] #[inline(always)] - pub fn physel(&self) -> PHYSEL_R { - PHYSEL_R::new(((self.bits >> 6) & 1) != 0) + pub fn physel(&self) -> PhyselR { + PhyselR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - SRP-Capable"] #[inline(always)] - pub fn srpcap(&self) -> SRPCAP_R { - SRPCAP_R::new(((self.bits >> 8) & 1) != 0) + pub fn srpcap(&self) -> SrpcapR { + SrpcapR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - HNP-Capable"] #[inline(always)] - pub fn hnpcap(&self) -> HNPCAP_R { - HNPCAP_R::new(((self.bits >> 9) & 1) != 0) + pub fn hnpcap(&self) -> HnpcapR { + HnpcapR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:13 - USB Turnaround Time"] #[inline(always)] - pub fn usbtrd_tim(&self) -> USBTRD_TIM_R { - USBTRD_TIM_R::new(((self.bits >> 10) & 0x0f) as u8) + pub fn usbtrd_tim(&self) -> UsbtrdTimR { + UsbtrdTimR::new(((self.bits >> 10) & 0x0f) as u8) } #[doc = "Bit 16 - UTMIFS Interface Select"] #[inline(always)] - pub fn otg_i2csel(&self) -> OTG_I2CSEL_R { - OTG_I2CSEL_R::new(((self.bits >> 16) & 1) != 0) + pub fn otg_i2csel(&self) -> OtgI2cselR { + OtgI2cselR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 28 - Tx End Delay"] #[inline(always)] - pub fn tx_end_delay(&self) -> TX_END_DELAY_R { - TX_END_DELAY_R::new(((self.bits >> 28) & 1) != 0) + pub fn tx_end_delay(&self) -> TxEndDelayR { + TxEndDelayR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Force Host Mode"] #[inline(always)] - pub fn force_hst_mode(&self) -> FORCE_HST_MODE_R { - FORCE_HST_MODE_R::new(((self.bits >> 29) & 1) != 0) + pub fn force_hst_mode(&self) -> ForceHstModeR { + ForceHstModeR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Force Device Mode"] #[inline(always)] - pub fn force_dev_mode(&self) -> FORCE_DEV_MODE_R { - FORCE_DEV_MODE_R::new(((self.bits >> 30) & 1) != 0) + pub fn force_dev_mode(&self) -> ForceDevModeR { + ForceDevModeR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] - pub fn ctp(&self) -> CTP_R { - CTP_R::new(((self.bits >> 31) & 1) != 0) + pub fn ctp(&self) -> CtpR { + CtpR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - FS Timeout Calibration"] #[inline(always)] #[must_use] - pub fn tout_cal(&mut self) -> TOUT_CAL_W { - TOUT_CAL_W::new(self, 0) + pub fn tout_cal(&mut self) -> ToutCalW { + ToutCalW::new(self, 0) } #[doc = "Bit 8 - SRP-Capable"] #[inline(always)] #[must_use] - pub fn srpcap(&mut self) -> SRPCAP_W { - SRPCAP_W::new(self, 8) + pub fn srpcap(&mut self) -> SrpcapW { + SrpcapW::new(self, 8) } #[doc = "Bit 9 - HNP-Capable"] #[inline(always)] #[must_use] - pub fn hnpcap(&mut self) -> HNPCAP_W { - HNPCAP_W::new(self, 9) + pub fn hnpcap(&mut self) -> HnpcapW { + HnpcapW::new(self, 9) } #[doc = "Bits 10:13 - USB Turnaround Time"] #[inline(always)] #[must_use] - pub fn usbtrd_tim(&mut self) -> USBTRD_TIM_W { - USBTRD_TIM_W::new(self, 10) + pub fn usbtrd_tim(&mut self) -> UsbtrdTimW { + UsbtrdTimW::new(self, 10) } #[doc = "Bit 16 - UTMIFS Interface Select"] #[inline(always)] #[must_use] - pub fn otg_i2csel(&mut self) -> OTG_I2CSEL_W { - OTG_I2CSEL_W::new(self, 16) + pub fn otg_i2csel(&mut self) -> OtgI2cselW { + OtgI2cselW::new(self, 16) } #[doc = "Bit 28 - Tx End Delay"] #[inline(always)] #[must_use] - pub fn tx_end_delay(&mut self) -> TX_END_DELAY_W { - TX_END_DELAY_W::new(self, 28) + pub fn tx_end_delay(&mut self) -> TxEndDelayW { + TxEndDelayW::new(self, 28) } #[doc = "Bit 29 - Force Host Mode"] #[inline(always)] #[must_use] - pub fn force_hst_mode(&mut self) -> FORCE_HST_MODE_W { - FORCE_HST_MODE_W::new(self, 29) + pub fn force_hst_mode(&mut self) -> ForceHstModeW { + ForceHstModeW::new(self, 29) } #[doc = "Bit 30 - Force Device Mode"] #[inline(always)] #[must_use] - pub fn force_dev_mode(&mut self) -> FORCE_DEV_MODE_W { - FORCE_DEV_MODE_W::new(self, 30) + pub fn force_dev_mode(&mut self) -> ForceDevModeW { + ForceDevModeW::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] #[must_use] - pub fn ctp(&mut self) -> CTP_W { - CTP_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ctp(&mut self) -> CtpW { + CtpW::new(self, 31) } } #[doc = "USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GUSBCFG_SPEC; -impl crate::RegisterSpec for GUSBCFG_SPEC { +pub struct GusbcfgSpec; +impl crate::RegisterSpec for GusbcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`gusbcfg::R`](R) reader structure"] -impl crate::Readable for GUSBCFG_SPEC {} +impl crate::Readable for GusbcfgSpec {} #[doc = "`write(|w| ..)` method takes [`gusbcfg::W`](W) writer structure"] -impl crate::Writable for GUSBCFG_SPEC { +impl crate::Writable for GusbcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GUSBCFG to value 0x1440"] -impl crate::Resettable for GUSBCFG_SPEC { +impl crate::Resettable for GusbcfgSpec { const RESET_VALUE: u32 = 0x1440; } diff --git a/src/usb0/haint.rs b/src/usb0/haint.rs index 70a20dd2..6b5cfdcc 100644 --- a/src/usb0/haint.rs +++ b/src/usb0/haint.rs @@ -1,22 +1,22 @@ #[doc = "Register `HAINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `HAINT` reader - Channel Interrupts"] -pub type HAINT_R = crate::FieldReader; +pub type HaintR = crate::FieldReader; impl R { #[doc = "Bits 0:13 - Channel Interrupts"] #[inline(always)] - pub fn haint(&self) -> HAINT_R { - HAINT_R::new((self.bits & 0x3fff) as u16) + pub fn haint(&self) -> HaintR { + HaintR::new((self.bits & 0x3fff) as u16) } } #[doc = "Host All Channels Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HAINT_SPEC; -impl crate::RegisterSpec for HAINT_SPEC { +pub struct HaintSpec; +impl crate::RegisterSpec for HaintSpec { type Ux = u32; } #[doc = "`read()` method returns [`haint::R`](R) reader structure"] -impl crate::Readable for HAINT_SPEC {} +impl crate::Readable for HaintSpec {} #[doc = "`reset()` method sets HAINT to value 0"] -impl crate::Resettable for HAINT_SPEC { +impl crate::Resettable for HaintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/haintmsk.rs b/src/usb0/haintmsk.rs index 856cb844..89fd7ed8 100644 --- a/src/usb0/haintmsk.rs +++ b/src/usb0/haintmsk.rs @@ -1,49 +1,40 @@ #[doc = "Register `HAINTMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HAINTMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `HAINTMsk` reader - Channel Interrupt Mask"] -pub type HAINTMSK_R = crate::FieldReader; +pub type HaintmskR = crate::FieldReader; #[doc = "Field `HAINTMsk` writer - Channel Interrupt Mask"] -pub type HAINTMSK_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>; +pub type HaintmskW<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>; impl R { #[doc = "Bits 0:13 - Channel Interrupt Mask"] #[inline(always)] - pub fn haintmsk(&self) -> HAINTMSK_R { - HAINTMSK_R::new((self.bits & 0x3fff) as u16) + pub fn haintmsk(&self) -> HaintmskR { + HaintmskR::new((self.bits & 0x3fff) as u16) } } impl W { #[doc = "Bits 0:13 - Channel Interrupt Mask"] #[inline(always)] #[must_use] - pub fn haintmsk(&mut self) -> HAINTMSK_W { - HAINTMSK_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn haintmsk(&mut self) -> HaintmskW { + HaintmskW::new(self, 0) } } #[doc = "Host All Channels Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`haintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`haintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HAINTMSK_SPEC; -impl crate::RegisterSpec for HAINTMSK_SPEC { +pub struct HaintmskSpec; +impl crate::RegisterSpec for HaintmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`haintmsk::R`](R) reader structure"] -impl crate::Readable for HAINTMSK_SPEC {} +impl crate::Readable for HaintmskSpec {} #[doc = "`write(|w| ..)` method takes [`haintmsk::W`](W) writer structure"] -impl crate::Writable for HAINTMSK_SPEC { +impl crate::Writable for HaintmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HAINTMSK to value 0"] -impl crate::Resettable for HAINTMSK_SPEC { +impl crate::Resettable for HaintmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/hcfg.rs b/src/usb0/hcfg.rs index 2fc3a2a0..356882d0 100644 --- a/src/usb0/hcfg.rs +++ b/src/usb0/hcfg.rs @@ -1,43 +1,43 @@ #[doc = "Register `HCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCFG` writer"] -pub type W = crate::W; -#[doc = "Field `FSLSPclkSel` reader - FS PHY Clock Select"] -pub type FSLSPCLK_SEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "FS PHY Clock Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FSLSPCLK_SEL_A { +pub enum FslspclkSel { #[doc = "1: PHY clock is running at 48 MHz"] - VALUE1 = 1, + Value1 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FSLSPCLK_SEL_A) -> Self { + fn from(variant: FslspclkSel) -> Self { variant as _ } } -impl crate::FieldSpec for FSLSPCLK_SEL_A { +impl crate::FieldSpec for FslspclkSel { type Ux = u8; } -impl FSLSPCLK_SEL_R { +#[doc = "Field `FSLSPclkSel` reader - FS PHY Clock Select"] +pub type FslspclkSelR = crate::FieldReader; +impl FslspclkSelR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(FSLSPCLK_SEL_A::VALUE1), + 1 => Some(FslspclkSel::Value1), _ => None, } } #[doc = "PHY clock is running at 48 MHz"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FSLSPCLK_SEL_A::VALUE1 + *self == FslspclkSel::Value1 } } #[doc = "Field `FSLSPclkSel` writer - FS PHY Clock Select"] -pub type FSLSPCLK_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FSLSPCLK_SEL_A>; -impl<'a, REG> FSLSPCLK_SEL_W<'a, REG> +pub type FslspclkSelW<'a, REG> = crate::FieldWriter<'a, REG, 2, FslspclkSel>; +impl<'a, REG> FslspclkSelW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -45,126 +45,126 @@ where #[doc = "PHY clock is running at 48 MHz"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FSLSPCLK_SEL_A::VALUE1) + self.variant(FslspclkSel::Value1) } } -#[doc = "Field `FSLSSupp` reader - FS-Only Support"] -pub type FSLSSUPP_R = crate::BitReader; #[doc = "FS-Only Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FSLSSUPP_A { +pub enum Fslssupp { #[doc = "0: FS-only, connected device can supports also only FS."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: FS-only, even if the connected device can support HS"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FSLSSUPP_A) -> Self { + fn from(variant: Fslssupp) -> Self { variant as u8 != 0 } } -impl FSLSSUPP_R { +#[doc = "Field `FSLSSupp` reader - FS-Only Support"] +pub type FslssuppR = crate::BitReader; +impl FslssuppR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FSLSSUPP_A { + pub const fn variant(&self) -> Fslssupp { match self.bits { - false => FSLSSUPP_A::VALUE1, - true => FSLSSUPP_A::VALUE2, + false => Fslssupp::Value1, + true => Fslssupp::Value2, } } #[doc = "FS-only, connected device can supports also only FS."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FSLSSUPP_A::VALUE1 + *self == Fslssupp::Value1 } #[doc = "FS-only, even if the connected device can support HS"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FSLSSUPP_A::VALUE2 + *self == Fslssupp::Value2 } } #[doc = "Field `FSLSSupp` writer - FS-Only Support"] -pub type FSLSSUPP_W<'a, REG> = crate::BitWriter<'a, REG, FSLSSUPP_A>; -impl<'a, REG> FSLSSUPP_W<'a, REG> +pub type FslssuppW<'a, REG> = crate::BitWriter<'a, REG, Fslssupp>; +impl<'a, REG> FslssuppW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "FS-only, connected device can supports also only FS."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FSLSSUPP_A::VALUE1) + self.variant(Fslssupp::Value1) } #[doc = "FS-only, even if the connected device can support HS"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FSLSSUPP_A::VALUE2) + self.variant(Fslssupp::Value2) } } #[doc = "Field `DescDMA` reader - Enable Scatter/gather DMA in Host mode"] -pub type DESC_DMA_R = crate::BitReader; +pub type DescDmaR = crate::BitReader; #[doc = "Field `DescDMA` writer - Enable Scatter/gather DMA in Host mode"] -pub type DESC_DMA_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `FrListEn` reader - Frame List Entries"] -pub type FR_LIST_EN_R = crate::FieldReader; +pub type DescDmaW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Frame List Entries\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FR_LIST_EN_A { +pub enum FrListEn { #[doc = "0: 8 Entries"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 16 Entries"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 32 Entries"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 64 Entries"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FR_LIST_EN_A) -> Self { + fn from(variant: FrListEn) -> Self { variant as _ } } -impl crate::FieldSpec for FR_LIST_EN_A { +impl crate::FieldSpec for FrListEn { type Ux = u8; } -impl FR_LIST_EN_R { +#[doc = "Field `FrListEn` reader - Frame List Entries"] +pub type FrListEnR = crate::FieldReader; +impl FrListEnR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FR_LIST_EN_A { + pub const fn variant(&self) -> FrListEn { match self.bits { - 0 => FR_LIST_EN_A::VALUE1, - 1 => FR_LIST_EN_A::VALUE2, - 2 => FR_LIST_EN_A::VALUE3, - 3 => FR_LIST_EN_A::VALUE4, + 0 => FrListEn::Value1, + 1 => FrListEn::Value2, + 2 => FrListEn::Value3, + 3 => FrListEn::Value4, _ => unreachable!(), } } #[doc = "8 Entries"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FR_LIST_EN_A::VALUE1 + *self == FrListEn::Value1 } #[doc = "16 Entries"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FR_LIST_EN_A::VALUE2 + *self == FrListEn::Value2 } #[doc = "32 Entries"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FR_LIST_EN_A::VALUE3 + *self == FrListEn::Value3 } #[doc = "64 Entries"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FR_LIST_EN_A::VALUE4 + *self == FrListEn::Value4 } } #[doc = "Field `FrListEn` writer - Frame List Entries"] -pub type FR_LIST_EN_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FR_LIST_EN_A>; -impl<'a, REG> FR_LIST_EN_W<'a, REG> +pub type FrListEnW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, FrListEn>; +impl<'a, REG> FrListEnW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -172,110 +172,101 @@ where #[doc = "8 Entries"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FR_LIST_EN_A::VALUE1) + self.variant(FrListEn::Value1) } #[doc = "16 Entries"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FR_LIST_EN_A::VALUE2) + self.variant(FrListEn::Value2) } #[doc = "32 Entries"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(FR_LIST_EN_A::VALUE3) + self.variant(FrListEn::Value3) } #[doc = "64 Entries"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(FR_LIST_EN_A::VALUE4) + self.variant(FrListEn::Value4) } } #[doc = "Field `PerSchedEna` reader - Enable Periodic Scheduling"] -pub type PER_SCHED_ENA_R = crate::BitReader; +pub type PerSchedEnaR = crate::BitReader; #[doc = "Field `PerSchedEna` writer - Enable Periodic Scheduling"] -pub type PER_SCHED_ENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PerSchedEnaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - FS PHY Clock Select"] #[inline(always)] - pub fn fslspclk_sel(&self) -> FSLSPCLK_SEL_R { - FSLSPCLK_SEL_R::new((self.bits & 3) as u8) + pub fn fslspclk_sel(&self) -> FslspclkSelR { + FslspclkSelR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - FS-Only Support"] #[inline(always)] - pub fn fslssupp(&self) -> FSLSSUPP_R { - FSLSSUPP_R::new(((self.bits >> 2) & 1) != 0) + pub fn fslssupp(&self) -> FslssuppR { + FslssuppR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 23 - Enable Scatter/gather DMA in Host mode"] #[inline(always)] - pub fn desc_dma(&self) -> DESC_DMA_R { - DESC_DMA_R::new(((self.bits >> 23) & 1) != 0) + pub fn desc_dma(&self) -> DescDmaR { + DescDmaR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Frame List Entries"] #[inline(always)] - pub fn fr_list_en(&self) -> FR_LIST_EN_R { - FR_LIST_EN_R::new(((self.bits >> 24) & 3) as u8) + pub fn fr_list_en(&self) -> FrListEnR { + FrListEnR::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Enable Periodic Scheduling"] #[inline(always)] - pub fn per_sched_ena(&self) -> PER_SCHED_ENA_R { - PER_SCHED_ENA_R::new(((self.bits >> 26) & 1) != 0) + pub fn per_sched_ena(&self) -> PerSchedEnaR { + PerSchedEnaR::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - FS PHY Clock Select"] #[inline(always)] #[must_use] - pub fn fslspclk_sel(&mut self) -> FSLSPCLK_SEL_W { - FSLSPCLK_SEL_W::new(self, 0) + pub fn fslspclk_sel(&mut self) -> FslspclkSelW { + FslspclkSelW::new(self, 0) } #[doc = "Bit 2 - FS-Only Support"] #[inline(always)] #[must_use] - pub fn fslssupp(&mut self) -> FSLSSUPP_W { - FSLSSUPP_W::new(self, 2) + pub fn fslssupp(&mut self) -> FslssuppW { + FslssuppW::new(self, 2) } #[doc = "Bit 23 - Enable Scatter/gather DMA in Host mode"] #[inline(always)] #[must_use] - pub fn desc_dma(&mut self) -> DESC_DMA_W { - DESC_DMA_W::new(self, 23) + pub fn desc_dma(&mut self) -> DescDmaW { + DescDmaW::new(self, 23) } #[doc = "Bits 24:25 - Frame List Entries"] #[inline(always)] #[must_use] - pub fn fr_list_en(&mut self) -> FR_LIST_EN_W { - FR_LIST_EN_W::new(self, 24) + pub fn fr_list_en(&mut self) -> FrListEnW { + FrListEnW::new(self, 24) } #[doc = "Bit 26 - Enable Periodic Scheduling"] #[inline(always)] #[must_use] - pub fn per_sched_ena(&mut self) -> PER_SCHED_ENA_W { - PER_SCHED_ENA_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn per_sched_ena(&mut self) -> PerSchedEnaW { + PerSchedEnaW::new(self, 26) } } #[doc = "Host Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCFG_SPEC; -impl crate::RegisterSpec for HCFG_SPEC { +pub struct HcfgSpec; +impl crate::RegisterSpec for HcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcfg::R`](R) reader structure"] -impl crate::Readable for HCFG_SPEC {} +impl crate::Readable for HcfgSpec {} #[doc = "`write(|w| ..)` method takes [`hcfg::W`](W) writer structure"] -impl crate::Writable for HCFG_SPEC { +impl crate::Writable for HcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCFG to value 0x0200"] -impl crate::Resettable for HCFG_SPEC { +impl crate::Resettable for HcfgSpec { const RESET_VALUE: u32 = 0x0200; } diff --git a/src/usb0/hfir.rs b/src/usb0/hfir.rs index 6849caf7..cd79da42 100644 --- a/src/usb0/hfir.rs +++ b/src/usb0/hfir.rs @@ -1,113 +1,104 @@ #[doc = "Register `HFIR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HFIR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FrInt` reader - Frame Interval"] -pub type FR_INT_R = crate::FieldReader; +pub type FrIntR = crate::FieldReader; #[doc = "Field `FrInt` writer - Frame Interval"] -pub type FR_INT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -#[doc = "Field `HFIRRldCtrl` reader - Reload Control"] -pub type HFIRRLD_CTRL_R = crate::BitReader; +pub type FrIntW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Reload Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HFIRRLD_CTRL_A { +pub enum HfirrldCtrl { #[doc = "0: HFIR cannot be reloaded dynamically"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: HFIR can be dynamically reloaded during runtime"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HFIRRLD_CTRL_A) -> Self { + fn from(variant: HfirrldCtrl) -> Self { variant as u8 != 0 } } -impl HFIRRLD_CTRL_R { +#[doc = "Field `HFIRRldCtrl` reader - Reload Control"] +pub type HfirrldCtrlR = crate::BitReader; +impl HfirrldCtrlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HFIRRLD_CTRL_A { + pub const fn variant(&self) -> HfirrldCtrl { match self.bits { - false => HFIRRLD_CTRL_A::VALUE1, - true => HFIRRLD_CTRL_A::VALUE2, + false => HfirrldCtrl::Value1, + true => HfirrldCtrl::Value2, } } #[doc = "HFIR cannot be reloaded dynamically"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HFIRRLD_CTRL_A::VALUE1 + *self == HfirrldCtrl::Value1 } #[doc = "HFIR can be dynamically reloaded during runtime"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HFIRRLD_CTRL_A::VALUE2 + *self == HfirrldCtrl::Value2 } } #[doc = "Field `HFIRRldCtrl` writer - Reload Control"] -pub type HFIRRLD_CTRL_W<'a, REG> = crate::BitWriter<'a, REG, HFIRRLD_CTRL_A>; -impl<'a, REG> HFIRRLD_CTRL_W<'a, REG> +pub type HfirrldCtrlW<'a, REG> = crate::BitWriter<'a, REG, HfirrldCtrl>; +impl<'a, REG> HfirrldCtrlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HFIR cannot be reloaded dynamically"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HFIRRLD_CTRL_A::VALUE1) + self.variant(HfirrldCtrl::Value1) } #[doc = "HFIR can be dynamically reloaded during runtime"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HFIRRLD_CTRL_A::VALUE2) + self.variant(HfirrldCtrl::Value2) } } impl R { #[doc = "Bits 0:15 - Frame Interval"] #[inline(always)] - pub fn fr_int(&self) -> FR_INT_R { - FR_INT_R::new((self.bits & 0xffff) as u16) + pub fn fr_int(&self) -> FrIntR { + FrIntR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Reload Control"] #[inline(always)] - pub fn hfirrld_ctrl(&self) -> HFIRRLD_CTRL_R { - HFIRRLD_CTRL_R::new(((self.bits >> 16) & 1) != 0) + pub fn hfirrld_ctrl(&self) -> HfirrldCtrlR { + HfirrldCtrlR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Frame Interval"] #[inline(always)] #[must_use] - pub fn fr_int(&mut self) -> FR_INT_W { - FR_INT_W::new(self, 0) + pub fn fr_int(&mut self) -> FrIntW { + FrIntW::new(self, 0) } #[doc = "Bit 16 - Reload Control"] #[inline(always)] #[must_use] - pub fn hfirrld_ctrl(&mut self) -> HFIRRLD_CTRL_W { - HFIRRLD_CTRL_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn hfirrld_ctrl(&mut self) -> HfirrldCtrlW { + HfirrldCtrlW::new(self, 16) } } #[doc = "Host Frame Interval Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfir::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfir::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HFIR_SPEC; -impl crate::RegisterSpec for HFIR_SPEC { +pub struct HfirSpec; +impl crate::RegisterSpec for HfirSpec { type Ux = u32; } #[doc = "`read()` method returns [`hfir::R`](R) reader structure"] -impl crate::Readable for HFIR_SPEC {} +impl crate::Readable for HfirSpec {} #[doc = "`write(|w| ..)` method takes [`hfir::W`](W) writer structure"] -impl crate::Writable for HFIR_SPEC { +impl crate::Writable for HfirSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HFIR to value 0xea60"] -impl crate::Resettable for HFIR_SPEC { +impl crate::Resettable for HfirSpec { const RESET_VALUE: u32 = 0xea60; } diff --git a/src/usb0/hflbaddr.rs b/src/usb0/hflbaddr.rs index 4d8a516a..818ffac3 100644 --- a/src/usb0/hflbaddr.rs +++ b/src/usb0/hflbaddr.rs @@ -1,49 +1,40 @@ #[doc = "Register `HFLBADDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HFLBADDR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `Starting_Address` reader - Starting Address"] -pub type STARTING_ADDRESS_R = crate::FieldReader; +pub type StartingAddressR = crate::FieldReader; #[doc = "Field `Starting_Address` writer - Starting Address"] -pub type STARTING_ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type StartingAddressW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Starting Address"] #[inline(always)] - pub fn starting_address(&self) -> STARTING_ADDRESS_R { - STARTING_ADDRESS_R::new(self.bits) + pub fn starting_address(&self) -> StartingAddressR { + StartingAddressR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Starting Address"] #[inline(always)] #[must_use] - pub fn starting_address(&mut self) -> STARTING_ADDRESS_W { - STARTING_ADDRESS_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn starting_address(&mut self) -> StartingAddressW { + StartingAddressW::new(self, 0) } } #[doc = "Host Frame List Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hflbaddr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hflbaddr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HFLBADDR_SPEC; -impl crate::RegisterSpec for HFLBADDR_SPEC { +pub struct HflbaddrSpec; +impl crate::RegisterSpec for HflbaddrSpec { type Ux = u32; } #[doc = "`read()` method returns [`hflbaddr::R`](R) reader structure"] -impl crate::Readable for HFLBADDR_SPEC {} +impl crate::Readable for HflbaddrSpec {} #[doc = "`write(|w| ..)` method takes [`hflbaddr::W`](W) writer structure"] -impl crate::Writable for HFLBADDR_SPEC { +impl crate::Writable for HflbaddrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HFLBADDR to value 0"] -impl crate::Resettable for HFLBADDR_SPEC { +impl crate::Resettable for HflbaddrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/hfnum.rs b/src/usb0/hfnum.rs index 68cac67c..45f8153e 100644 --- a/src/usb0/hfnum.rs +++ b/src/usb0/hfnum.rs @@ -1,56 +1,47 @@ #[doc = "Register `HFNUM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HFNUM` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FrNum` reader - Frame Number"] -pub type FR_NUM_R = crate::FieldReader; +pub type FrNumR = crate::FieldReader; #[doc = "Field `FrNum` writer - Frame Number"] -pub type FR_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type FrNumW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `FrRem` reader - Frame Time Remaining"] -pub type FR_REM_R = crate::FieldReader; +pub type FrRemR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Frame Number"] #[inline(always)] - pub fn fr_num(&self) -> FR_NUM_R { - FR_NUM_R::new((self.bits & 0xffff) as u16) + pub fn fr_num(&self) -> FrNumR { + FrNumR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Frame Time Remaining"] #[inline(always)] - pub fn fr_rem(&self) -> FR_REM_R { - FR_REM_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn fr_rem(&self) -> FrRemR { + FrRemR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Frame Number"] #[inline(always)] #[must_use] - pub fn fr_num(&mut self) -> FR_NUM_W { - FR_NUM_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn fr_num(&mut self) -> FrNumW { + FrNumW::new(self, 0) } } #[doc = "Host Frame Number/Frame Time Remaining Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfnum::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfnum::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HFNUM_SPEC; -impl crate::RegisterSpec for HFNUM_SPEC { +pub struct HfnumSpec; +impl crate::RegisterSpec for HfnumSpec { type Ux = u32; } #[doc = "`read()` method returns [`hfnum::R`](R) reader structure"] -impl crate::Readable for HFNUM_SPEC {} +impl crate::Readable for HfnumSpec {} #[doc = "`write(|w| ..)` method takes [`hfnum::W`](W) writer structure"] -impl crate::Writable for HFNUM_SPEC { +impl crate::Writable for HfnumSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HFNUM to value 0x3fff"] -impl crate::Resettable for HFNUM_SPEC { +impl crate::Resettable for HfnumSpec { const RESET_VALUE: u32 = 0x3fff; } diff --git a/src/usb0/hprt.rs b/src/usb0/hprt.rs index bcb6128a..d12466ff 100644 --- a/src/usb0/hprt.rs +++ b/src/usb0/hprt.rs @@ -1,526 +1,517 @@ #[doc = "Register `HPRT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HPRT` writer"] -pub type W = crate::W; -#[doc = "Field `PrtConnSts` reader - Port Connect Status"] -pub type PRT_CONN_STS_R = crate::BitReader; +pub type W = crate::W; #[doc = "Port Connect Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_CONN_STS_A { +pub enum PrtConnSts { #[doc = "0: No device is attached to the port."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A device is attached to the port."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_CONN_STS_A) -> Self { + fn from(variant: PrtConnSts) -> Self { variant as u8 != 0 } } -impl PRT_CONN_STS_R { +#[doc = "Field `PrtConnSts` reader - Port Connect Status"] +pub type PrtConnStsR = crate::BitReader; +impl PrtConnStsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_CONN_STS_A { + pub const fn variant(&self) -> PrtConnSts { match self.bits { - false => PRT_CONN_STS_A::VALUE1, - true => PRT_CONN_STS_A::VALUE2, + false => PrtConnSts::Value1, + true => PrtConnSts::Value2, } } #[doc = "No device is attached to the port."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_CONN_STS_A::VALUE1 + *self == PrtConnSts::Value1 } #[doc = "A device is attached to the port."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_CONN_STS_A::VALUE2 + *self == PrtConnSts::Value2 } } #[doc = "Field `PrtConnDet` reader - Port Connect Detected"] -pub type PRT_CONN_DET_R = crate::BitReader; +pub type PrtConnDetR = crate::BitReader; #[doc = "Field `PrtConnDet` writer - Port Connect Detected"] -pub type PRT_CONN_DET_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `PrtEna` reader - Port Enable"] -pub type PRT_ENA_R = crate::BitReader; +pub type PrtConnDetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Port Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_ENA_A { +pub enum PrtEna { #[doc = "0: Port disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Port enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_ENA_A) -> Self { + fn from(variant: PrtEna) -> Self { variant as u8 != 0 } } -impl PRT_ENA_R { +#[doc = "Field `PrtEna` reader - Port Enable"] +pub type PrtEnaR = crate::BitReader; +impl PrtEnaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_ENA_A { + pub const fn variant(&self) -> PrtEna { match self.bits { - false => PRT_ENA_A::VALUE1, - true => PRT_ENA_A::VALUE2, + false => PrtEna::Value1, + true => PrtEna::Value2, } } #[doc = "Port disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_ENA_A::VALUE1 + *self == PrtEna::Value1 } #[doc = "Port enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_ENA_A::VALUE2 + *self == PrtEna::Value2 } } #[doc = "Field `PrtEna` writer - Port Enable"] -pub type PRT_ENA_W<'a, REG> = crate::BitWriter<'a, REG, PRT_ENA_A>; -impl<'a, REG> PRT_ENA_W<'a, REG> +pub type PrtEnaW<'a, REG> = crate::BitWriter<'a, REG, PrtEna>; +impl<'a, REG> PrtEnaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Port disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRT_ENA_A::VALUE1) + self.variant(PrtEna::Value1) } #[doc = "Port enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRT_ENA_A::VALUE2) + self.variant(PrtEna::Value2) } } #[doc = "Field `PrtEnChng` reader - Port Enable/Disable Change"] -pub type PRT_EN_CHNG_R = crate::BitReader; +pub type PrtEnChngR = crate::BitReader; #[doc = "Field `PrtEnChng` writer - Port Enable/Disable Change"] -pub type PRT_EN_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `PrtOvrCurrAct` reader - Port Overcurrent Active"] -pub type PRT_OVR_CURR_ACT_R = crate::BitReader; +pub type PrtEnChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Port Overcurrent Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_OVR_CURR_ACT_A { +pub enum PrtOvrCurrAct { #[doc = "0: No overcurrent condition"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Overcurrent condition"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_OVR_CURR_ACT_A) -> Self { + fn from(variant: PrtOvrCurrAct) -> Self { variant as u8 != 0 } } -impl PRT_OVR_CURR_ACT_R { +#[doc = "Field `PrtOvrCurrAct` reader - Port Overcurrent Active"] +pub type PrtOvrCurrActR = crate::BitReader; +impl PrtOvrCurrActR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_OVR_CURR_ACT_A { + pub const fn variant(&self) -> PrtOvrCurrAct { match self.bits { - false => PRT_OVR_CURR_ACT_A::VALUE1, - true => PRT_OVR_CURR_ACT_A::VALUE2, + false => PrtOvrCurrAct::Value1, + true => PrtOvrCurrAct::Value2, } } #[doc = "No overcurrent condition"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_OVR_CURR_ACT_A::VALUE1 + *self == PrtOvrCurrAct::Value1 } #[doc = "Overcurrent condition"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_OVR_CURR_ACT_A::VALUE2 + *self == PrtOvrCurrAct::Value2 } } #[doc = "Field `PrtOvrCurrChng` reader - Port Overcurrent Change"] -pub type PRT_OVR_CURR_CHNG_R = crate::BitReader; +pub type PrtOvrCurrChngR = crate::BitReader; #[doc = "Field `PrtOvrCurrChng` writer - Port Overcurrent Change"] -pub type PRT_OVR_CURR_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `PrtRes` reader - Port Resume"] -pub type PRT_RES_R = crate::BitReader; +pub type PrtOvrCurrChngW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Port Resume\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_RES_A { +pub enum PrtRes { #[doc = "0: No resume driven"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Resume driven"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_RES_A) -> Self { + fn from(variant: PrtRes) -> Self { variant as u8 != 0 } } -impl PRT_RES_R { +#[doc = "Field `PrtRes` reader - Port Resume"] +pub type PrtResR = crate::BitReader; +impl PrtResR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_RES_A { + pub const fn variant(&self) -> PrtRes { match self.bits { - false => PRT_RES_A::VALUE1, - true => PRT_RES_A::VALUE2, + false => PrtRes::Value1, + true => PrtRes::Value2, } } #[doc = "No resume driven"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_RES_A::VALUE1 + *self == PrtRes::Value1 } #[doc = "Resume driven"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_RES_A::VALUE2 + *self == PrtRes::Value2 } } #[doc = "Field `PrtRes` writer - Port Resume"] -pub type PRT_RES_W<'a, REG> = crate::BitWriter<'a, REG, PRT_RES_A>; -impl<'a, REG> PRT_RES_W<'a, REG> +pub type PrtResW<'a, REG> = crate::BitWriter<'a, REG, PrtRes>; +impl<'a, REG> PrtResW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No resume driven"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRT_RES_A::VALUE1) + self.variant(PrtRes::Value1) } #[doc = "Resume driven"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRT_RES_A::VALUE2) + self.variant(PrtRes::Value2) } } -#[doc = "Field `PrtSusp` reader - Port Suspend"] -pub type PRT_SUSP_R = crate::BitReader; #[doc = "Port Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_SUSP_A { +pub enum PrtSusp { #[doc = "0: Port not in Suspend mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Port in Suspend mode"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_SUSP_A) -> Self { + fn from(variant: PrtSusp) -> Self { variant as u8 != 0 } } -impl PRT_SUSP_R { +#[doc = "Field `PrtSusp` reader - Port Suspend"] +pub type PrtSuspR = crate::BitReader; +impl PrtSuspR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_SUSP_A { + pub const fn variant(&self) -> PrtSusp { match self.bits { - false => PRT_SUSP_A::VALUE1, - true => PRT_SUSP_A::VALUE2, + false => PrtSusp::Value1, + true => PrtSusp::Value2, } } #[doc = "Port not in Suspend mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_SUSP_A::VALUE1 + *self == PrtSusp::Value1 } #[doc = "Port in Suspend mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_SUSP_A::VALUE2 + *self == PrtSusp::Value2 } } #[doc = "Field `PrtSusp` writer - Port Suspend"] -pub type PRT_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, PRT_SUSP_A>; -impl<'a, REG> PRT_SUSP_W<'a, REG> +pub type PrtSuspW<'a, REG> = crate::BitWriter<'a, REG, PrtSusp>; +impl<'a, REG> PrtSuspW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Port not in Suspend mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRT_SUSP_A::VALUE1) + self.variant(PrtSusp::Value1) } #[doc = "Port in Suspend mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRT_SUSP_A::VALUE2) + self.variant(PrtSusp::Value2) } } -#[doc = "Field `PrtRst` reader - Port Reset"] -pub type PRT_RST_R = crate::BitReader; #[doc = "Port Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_RST_A { +pub enum PrtRst { #[doc = "0: Port not in reset"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Port in reset"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_RST_A) -> Self { + fn from(variant: PrtRst) -> Self { variant as u8 != 0 } } -impl PRT_RST_R { +#[doc = "Field `PrtRst` reader - Port Reset"] +pub type PrtRstR = crate::BitReader; +impl PrtRstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_RST_A { + pub const fn variant(&self) -> PrtRst { match self.bits { - false => PRT_RST_A::VALUE1, - true => PRT_RST_A::VALUE2, + false => PrtRst::Value1, + true => PrtRst::Value2, } } #[doc = "Port not in reset"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_RST_A::VALUE1 + *self == PrtRst::Value1 } #[doc = "Port in reset"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_RST_A::VALUE2 + *self == PrtRst::Value2 } } #[doc = "Field `PrtRst` writer - Port Reset"] -pub type PRT_RST_W<'a, REG> = crate::BitWriter<'a, REG, PRT_RST_A>; -impl<'a, REG> PRT_RST_W<'a, REG> +pub type PrtRstW<'a, REG> = crate::BitWriter<'a, REG, PrtRst>; +impl<'a, REG> PrtRstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Port not in reset"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRT_RST_A::VALUE1) + self.variant(PrtRst::Value1) } #[doc = "Port in reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRT_RST_A::VALUE2) + self.variant(PrtRst::Value2) } } #[doc = "Field `PrtLnSts` reader - Port Line Status"] -pub type PRT_LN_STS_R = crate::FieldReader; -#[doc = "Field `PrtPwr` reader - Port Power"] -pub type PRT_PWR_R = crate::BitReader; +pub type PrtLnStsR = crate::FieldReader; #[doc = "Port Power\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PRT_PWR_A { +pub enum PrtPwr { #[doc = "0: Power off"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Power on"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PRT_PWR_A) -> Self { + fn from(variant: PrtPwr) -> Self { variant as u8 != 0 } } -impl PRT_PWR_R { +#[doc = "Field `PrtPwr` reader - Port Power"] +pub type PrtPwrR = crate::BitReader; +impl PrtPwrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PRT_PWR_A { + pub const fn variant(&self) -> PrtPwr { match self.bits { - false => PRT_PWR_A::VALUE1, - true => PRT_PWR_A::VALUE2, + false => PrtPwr::Value1, + true => PrtPwr::Value2, } } #[doc = "Power off"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_PWR_A::VALUE1 + *self == PrtPwr::Value1 } #[doc = "Power on"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRT_PWR_A::VALUE2 + *self == PrtPwr::Value2 } } #[doc = "Field `PrtPwr` writer - Port Power"] -pub type PRT_PWR_W<'a, REG> = crate::BitWriter<'a, REG, PRT_PWR_A>; -impl<'a, REG> PRT_PWR_W<'a, REG> +pub type PrtPwrW<'a, REG> = crate::BitWriter<'a, REG, PrtPwr>; +impl<'a, REG> PrtPwrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Power off"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRT_PWR_A::VALUE1) + self.variant(PrtPwr::Value1) } #[doc = "Power on"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRT_PWR_A::VALUE2) + self.variant(PrtPwr::Value2) } } -#[doc = "Field `PrtSpd` reader - Port Speed"] -pub type PRT_SPD_R = crate::FieldReader; #[doc = "Port Speed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRT_SPD_A { +pub enum PrtSpd { #[doc = "1: Full speed"] - VALUE1 = 1, + Value1 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRT_SPD_A) -> Self { + fn from(variant: PrtSpd) -> Self { variant as _ } } -impl crate::FieldSpec for PRT_SPD_A { +impl crate::FieldSpec for PrtSpd { type Ux = u8; } -impl PRT_SPD_R { +#[doc = "Field `PrtSpd` reader - Port Speed"] +pub type PrtSpdR = crate::FieldReader; +impl PrtSpdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PRT_SPD_A::VALUE1), + 1 => Some(PrtSpd::Value1), _ => None, } } #[doc = "Full speed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRT_SPD_A::VALUE1 + *self == PrtSpd::Value1 } } impl R { #[doc = "Bit 0 - Port Connect Status"] #[inline(always)] - pub fn prt_conn_sts(&self) -> PRT_CONN_STS_R { - PRT_CONN_STS_R::new((self.bits & 1) != 0) + pub fn prt_conn_sts(&self) -> PrtConnStsR { + PrtConnStsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port Connect Detected"] #[inline(always)] - pub fn prt_conn_det(&self) -> PRT_CONN_DET_R { - PRT_CONN_DET_R::new(((self.bits >> 1) & 1) != 0) + pub fn prt_conn_det(&self) -> PrtConnDetR { + PrtConnDetR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port Enable"] #[inline(always)] - pub fn prt_ena(&self) -> PRT_ENA_R { - PRT_ENA_R::new(((self.bits >> 2) & 1) != 0) + pub fn prt_ena(&self) -> PrtEnaR { + PrtEnaR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port Enable/Disable Change"] #[inline(always)] - pub fn prt_en_chng(&self) -> PRT_EN_CHNG_R { - PRT_EN_CHNG_R::new(((self.bits >> 3) & 1) != 0) + pub fn prt_en_chng(&self) -> PrtEnChngR { + PrtEnChngR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port Overcurrent Active"] #[inline(always)] - pub fn prt_ovr_curr_act(&self) -> PRT_OVR_CURR_ACT_R { - PRT_OVR_CURR_ACT_R::new(((self.bits >> 4) & 1) != 0) + pub fn prt_ovr_curr_act(&self) -> PrtOvrCurrActR { + PrtOvrCurrActR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port Overcurrent Change"] #[inline(always)] - pub fn prt_ovr_curr_chng(&self) -> PRT_OVR_CURR_CHNG_R { - PRT_OVR_CURR_CHNG_R::new(((self.bits >> 5) & 1) != 0) + pub fn prt_ovr_curr_chng(&self) -> PrtOvrCurrChngR { + PrtOvrCurrChngR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port Resume"] #[inline(always)] - pub fn prt_res(&self) -> PRT_RES_R { - PRT_RES_R::new(((self.bits >> 6) & 1) != 0) + pub fn prt_res(&self) -> PrtResR { + PrtResR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port Suspend"] #[inline(always)] - pub fn prt_susp(&self) -> PRT_SUSP_R { - PRT_SUSP_R::new(((self.bits >> 7) & 1) != 0) + pub fn prt_susp(&self) -> PrtSuspR { + PrtSuspR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port Reset"] #[inline(always)] - pub fn prt_rst(&self) -> PRT_RST_R { - PRT_RST_R::new(((self.bits >> 8) & 1) != 0) + pub fn prt_rst(&self) -> PrtRstR { + PrtRstR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 10:11 - Port Line Status"] #[inline(always)] - pub fn prt_ln_sts(&self) -> PRT_LN_STS_R { - PRT_LN_STS_R::new(((self.bits >> 10) & 3) as u8) + pub fn prt_ln_sts(&self) -> PrtLnStsR { + PrtLnStsR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 12 - Port Power"] #[inline(always)] - pub fn prt_pwr(&self) -> PRT_PWR_R { - PRT_PWR_R::new(((self.bits >> 12) & 1) != 0) + pub fn prt_pwr(&self) -> PrtPwrR { + PrtPwrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 17:18 - Port Speed"] #[inline(always)] - pub fn prt_spd(&self) -> PRT_SPD_R { - PRT_SPD_R::new(((self.bits >> 17) & 3) as u8) + pub fn prt_spd(&self) -> PrtSpdR { + PrtSpdR::new(((self.bits >> 17) & 3) as u8) } } impl W { #[doc = "Bit 1 - Port Connect Detected"] #[inline(always)] #[must_use] - pub fn prt_conn_det(&mut self) -> PRT_CONN_DET_W { - PRT_CONN_DET_W::new(self, 1) + pub fn prt_conn_det(&mut self) -> PrtConnDetW { + PrtConnDetW::new(self, 1) } #[doc = "Bit 2 - Port Enable"] #[inline(always)] #[must_use] - pub fn prt_ena(&mut self) -> PRT_ENA_W { - PRT_ENA_W::new(self, 2) + pub fn prt_ena(&mut self) -> PrtEnaW { + PrtEnaW::new(self, 2) } #[doc = "Bit 3 - Port Enable/Disable Change"] #[inline(always)] #[must_use] - pub fn prt_en_chng(&mut self) -> PRT_EN_CHNG_W { - PRT_EN_CHNG_W::new(self, 3) + pub fn prt_en_chng(&mut self) -> PrtEnChngW { + PrtEnChngW::new(self, 3) } #[doc = "Bit 5 - Port Overcurrent Change"] #[inline(always)] #[must_use] - pub fn prt_ovr_curr_chng(&mut self) -> PRT_OVR_CURR_CHNG_W { - PRT_OVR_CURR_CHNG_W::new(self, 5) + pub fn prt_ovr_curr_chng(&mut self) -> PrtOvrCurrChngW { + PrtOvrCurrChngW::new(self, 5) } #[doc = "Bit 6 - Port Resume"] #[inline(always)] #[must_use] - pub fn prt_res(&mut self) -> PRT_RES_W { - PRT_RES_W::new(self, 6) + pub fn prt_res(&mut self) -> PrtResW { + PrtResW::new(self, 6) } #[doc = "Bit 7 - Port Suspend"] #[inline(always)] #[must_use] - pub fn prt_susp(&mut self) -> PRT_SUSP_W { - PRT_SUSP_W::new(self, 7) + pub fn prt_susp(&mut self) -> PrtSuspW { + PrtSuspW::new(self, 7) } #[doc = "Bit 8 - Port Reset"] #[inline(always)] #[must_use] - pub fn prt_rst(&mut self) -> PRT_RST_W { - PRT_RST_W::new(self, 8) + pub fn prt_rst(&mut self) -> PrtRstW { + PrtRstW::new(self, 8) } #[doc = "Bit 12 - Port Power"] #[inline(always)] #[must_use] - pub fn prt_pwr(&mut self) -> PRT_PWR_W { - PRT_PWR_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn prt_pwr(&mut self) -> PrtPwrW { + PrtPwrW::new(self, 12) } } #[doc = "Host Port Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hprt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hprt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HPRT_SPEC; -impl crate::RegisterSpec for HPRT_SPEC { +pub struct HprtSpec; +impl crate::RegisterSpec for HprtSpec { type Ux = u32; } #[doc = "`read()` method returns [`hprt::R`](R) reader structure"] -impl crate::Readable for HPRT_SPEC {} +impl crate::Readable for HprtSpec {} #[doc = "`write(|w| ..)` method takes [`hprt::W`](W) writer structure"] -impl crate::Writable for HPRT_SPEC { +impl crate::Writable for HprtSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HPRT to value 0"] -impl crate::Resettable for HPRT_SPEC { +impl crate::Resettable for HprtSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/hptxfsiz.rs b/src/usb0/hptxfsiz.rs index 3e7b1927..8597f3dc 100644 --- a/src/usb0/hptxfsiz.rs +++ b/src/usb0/hptxfsiz.rs @@ -1,64 +1,55 @@ #[doc = "Register `HPTXFSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HPTXFSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PTxFStAddr` reader - Host Periodic TxFIFO Start Address"] -pub type PTX_FST_ADDR_R = crate::FieldReader; +pub type PtxFstAddrR = crate::FieldReader; #[doc = "Field `PTxFStAddr` writer - Host Periodic TxFIFO Start Address"] -pub type PTX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PtxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `PTxFSize` reader - Host Periodic TxFIFO Depth"] -pub type PTX_FSIZE_R = crate::FieldReader; +pub type PtxFsizeR = crate::FieldReader; #[doc = "Field `PTxFSize` writer - Host Periodic TxFIFO Depth"] -pub type PTX_FSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PtxFsizeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Host Periodic TxFIFO Start Address"] #[inline(always)] - pub fn ptx_fst_addr(&self) -> PTX_FST_ADDR_R { - PTX_FST_ADDR_R::new((self.bits & 0xffff) as u16) + pub fn ptx_fst_addr(&self) -> PtxFstAddrR { + PtxFstAddrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Host Periodic TxFIFO Depth"] #[inline(always)] - pub fn ptx_fsize(&self) -> PTX_FSIZE_R { - PTX_FSIZE_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn ptx_fsize(&self) -> PtxFsizeR { + PtxFsizeR::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Host Periodic TxFIFO Start Address"] #[inline(always)] #[must_use] - pub fn ptx_fst_addr(&mut self) -> PTX_FST_ADDR_W { - PTX_FST_ADDR_W::new(self, 0) + pub fn ptx_fst_addr(&mut self) -> PtxFstAddrW { + PtxFstAddrW::new(self, 0) } #[doc = "Bits 16:31 - Host Periodic TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn ptx_fsize(&mut self) -> PTX_FSIZE_W { - PTX_FSIZE_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ptx_fsize(&mut self) -> PtxFsizeW { + PtxFsizeW::new(self, 16) } } #[doc = "Host Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HPTXFSIZ_SPEC; -impl crate::RegisterSpec for HPTXFSIZ_SPEC { +pub struct HptxfsizSpec; +impl crate::RegisterSpec for HptxfsizSpec { type Ux = u32; } #[doc = "`read()` method returns [`hptxfsiz::R`](R) reader structure"] -impl crate::Readable for HPTXFSIZ_SPEC {} +impl crate::Readable for HptxfsizSpec {} #[doc = "`write(|w| ..)` method takes [`hptxfsiz::W`](W) writer structure"] -impl crate::Writable for HPTXFSIZ_SPEC { +impl crate::Writable for HptxfsizSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HPTXFSIZ to value 0x0100_012a"] -impl crate::Resettable for HPTXFSIZ_SPEC { +impl crate::Resettable for HptxfsizSpec { const RESET_VALUE: u32 = 0x0100_012a; } diff --git a/src/usb0/hptxsts.rs b/src/usb0/hptxsts.rs index 2f00663a..92a12546 100644 --- a/src/usb0/hptxsts.rs +++ b/src/usb0/hptxsts.rs @@ -1,59 +1,59 @@ #[doc = "Register `HPTXSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HPTXSTS` writer"] -pub type W = crate::W; -#[doc = "Field `PTxFSpcAvail` reader - Periodic Transmit Data FIFO Space Available"] -pub type PTX_FSPC_AVAIL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Periodic Transmit Data FIFO Space Available\n\nValue on reset: 256"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PTX_FSPC_AVAIL_A { +pub enum PtxFspcAvail { #[doc = "0: Periodic TxFIFO is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 word available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 words available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PTX_FSPC_AVAIL_A) -> Self { + fn from(variant: PtxFspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for PTX_FSPC_AVAIL_A { +impl crate::FieldSpec for PtxFspcAvail { type Ux = u16; } -impl PTX_FSPC_AVAIL_R { +#[doc = "Field `PTxFSpcAvail` reader - Periodic Transmit Data FIFO Space Available"] +pub type PtxFspcAvailR = crate::FieldReader; +impl PtxFspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PTX_FSPC_AVAIL_A::VALUE1), - 1 => Some(PTX_FSPC_AVAIL_A::VALUE2), - 2 => Some(PTX_FSPC_AVAIL_A::VALUE3), + 0 => Some(PtxFspcAvail::Value1), + 1 => Some(PtxFspcAvail::Value2), + 2 => Some(PtxFspcAvail::Value3), _ => None, } } #[doc = "Periodic TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PTX_FSPC_AVAIL_A::VALUE1 + *self == PtxFspcAvail::Value1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PTX_FSPC_AVAIL_A::VALUE2 + *self == PtxFspcAvail::Value2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PTX_FSPC_AVAIL_A::VALUE3 + *self == PtxFspcAvail::Value3 } } #[doc = "Field `PTxFSpcAvail` writer - Periodic Transmit Data FIFO Space Available"] -pub type PTX_FSPC_AVAIL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, PTX_FSPC_AVAIL_A>; -impl<'a, REG> PTX_FSPC_AVAIL_W<'a, REG> +pub type PtxFspcAvailW<'a, REG> = crate::FieldWriter<'a, REG, 16, PtxFspcAvail>; +impl<'a, REG> PtxFspcAvailW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,118 +61,109 @@ where #[doc = "Periodic TxFIFO is full"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PTX_FSPC_AVAIL_A::VALUE1) + self.variant(PtxFspcAvail::Value1) } #[doc = "1 word available"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PTX_FSPC_AVAIL_A::VALUE2) + self.variant(PtxFspcAvail::Value2) } #[doc = "2 words available"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PTX_FSPC_AVAIL_A::VALUE3) + self.variant(PtxFspcAvail::Value3) } } -#[doc = "Field `PTxQSpcAvail` reader - Periodic Transmit Request Queue Space Available"] -pub type PTX_QSPC_AVAIL_R = crate::FieldReader; #[doc = "Periodic Transmit Request Queue Space Available\n\nValue on reset: 8"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PTX_QSPC_AVAIL_A { +pub enum PtxQspcAvail { #[doc = "0: Periodic Transmit Request Queue is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 location available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 locations available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PTX_QSPC_AVAIL_A) -> Self { + fn from(variant: PtxQspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for PTX_QSPC_AVAIL_A { +impl crate::FieldSpec for PtxQspcAvail { type Ux = u8; } -impl PTX_QSPC_AVAIL_R { +#[doc = "Field `PTxQSpcAvail` reader - Periodic Transmit Request Queue Space Available"] +pub type PtxQspcAvailR = crate::FieldReader; +impl PtxQspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PTX_QSPC_AVAIL_A::VALUE1), - 1 => Some(PTX_QSPC_AVAIL_A::VALUE2), - 2 => Some(PTX_QSPC_AVAIL_A::VALUE3), + 0 => Some(PtxQspcAvail::Value1), + 1 => Some(PtxQspcAvail::Value2), + 2 => Some(PtxQspcAvail::Value3), _ => None, } } #[doc = "Periodic Transmit Request Queue is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PTX_QSPC_AVAIL_A::VALUE1 + *self == PtxQspcAvail::Value1 } #[doc = "1 location available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PTX_QSPC_AVAIL_A::VALUE2 + *self == PtxQspcAvail::Value2 } #[doc = "2 locations available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PTX_QSPC_AVAIL_A::VALUE3 + *self == PtxQspcAvail::Value3 } } #[doc = "Field `PTxQTop` reader - Top of the Periodic Transmit Request Queue"] -pub type PTX_QTOP_R = crate::FieldReader; +pub type PtxQtopR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Periodic Transmit Data FIFO Space Available"] #[inline(always)] - pub fn ptx_fspc_avail(&self) -> PTX_FSPC_AVAIL_R { - PTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) + pub fn ptx_fspc_avail(&self) -> PtxFspcAvailR { + PtxFspcAvailR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Periodic Transmit Request Queue Space Available"] #[inline(always)] - pub fn ptx_qspc_avail(&self) -> PTX_QSPC_AVAIL_R { - PTX_QSPC_AVAIL_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn ptx_qspc_avail(&self) -> PtxQspcAvailR { + PtxQspcAvailR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Top of the Periodic Transmit Request Queue"] #[inline(always)] - pub fn ptx_qtop(&self) -> PTX_QTOP_R { - PTX_QTOP_R::new(((self.bits >> 24) & 0xff) as u8) + pub fn ptx_qtop(&self) -> PtxQtopR { + PtxQtopR::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:15 - Periodic Transmit Data FIFO Space Available"] #[inline(always)] #[must_use] - pub fn ptx_fspc_avail(&mut self) -> PTX_FSPC_AVAIL_W { - PTX_FSPC_AVAIL_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ptx_fspc_avail(&mut self) -> PtxFspcAvailW { + PtxFspcAvailW::new(self, 0) } } #[doc = "Host Periodic Transmit FIFO/ Queue Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hptxsts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hptxsts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HPTXSTS_SPEC; -impl crate::RegisterSpec for HPTXSTS_SPEC { +pub struct HptxstsSpec; +impl crate::RegisterSpec for HptxstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`hptxsts::R`](R) reader structure"] -impl crate::Readable for HPTXSTS_SPEC {} +impl crate::Readable for HptxstsSpec {} #[doc = "`write(|w| ..)` method takes [`hptxsts::W`](W) writer structure"] -impl crate::Writable for HPTXSTS_SPEC { +impl crate::Writable for HptxstsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HPTXSTS to value 0x0008_0100"] -impl crate::Resettable for HPTXSTS_SPEC { +impl crate::Resettable for HptxstsSpec { const RESET_VALUE: u32 = 0x0008_0100; } diff --git a/src/usb0/pcgcctl.rs b/src/usb0/pcgcctl.rs index 9b181be4..7693b57d 100644 --- a/src/usb0/pcgcctl.rs +++ b/src/usb0/pcgcctl.rs @@ -1,64 +1,55 @@ #[doc = "Register `PCGCCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCGCCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `StopPclk` reader - Stop Pclk"] -pub type STOP_PCLK_R = crate::BitReader; +pub type StopPclkR = crate::BitReader; #[doc = "Field `StopPclk` writer - Stop Pclk"] -pub type STOP_PCLK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StopPclkW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GateHclk` reader - Gate Hclk"] -pub type GATE_HCLK_R = crate::BitReader; +pub type GateHclkR = crate::BitReader; #[doc = "Field `GateHclk` writer - Gate Hclk"] -pub type GATE_HCLK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type GateHclkW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Stop Pclk"] #[inline(always)] - pub fn stop_pclk(&self) -> STOP_PCLK_R { - STOP_PCLK_R::new((self.bits & 1) != 0) + pub fn stop_pclk(&self) -> StopPclkR { + StopPclkR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Gate Hclk"] #[inline(always)] - pub fn gate_hclk(&self) -> GATE_HCLK_R { - GATE_HCLK_R::new(((self.bits >> 1) & 1) != 0) + pub fn gate_hclk(&self) -> GateHclkR { + GateHclkR::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Stop Pclk"] #[inline(always)] #[must_use] - pub fn stop_pclk(&mut self) -> STOP_PCLK_W { - STOP_PCLK_W::new(self, 0) + pub fn stop_pclk(&mut self) -> StopPclkW { + StopPclkW::new(self, 0) } #[doc = "Bit 1 - Gate Hclk"] #[inline(always)] #[must_use] - pub fn gate_hclk(&mut self) -> GATE_HCLK_W { - GATE_HCLK_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn gate_hclk(&mut self) -> GateHclkW { + GateHclkW::new(self, 1) } } #[doc = "Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCGCCTL_SPEC; -impl crate::RegisterSpec for PCGCCTL_SPEC { +pub struct PcgcctlSpec; +impl crate::RegisterSpec for PcgcctlSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcgcctl::R`](R) reader structure"] -impl crate::Readable for PCGCCTL_SPEC {} +impl crate::Readable for PcgcctlSpec {} #[doc = "`write(|w| ..)` method takes [`pcgcctl::W`](W) writer structure"] -impl crate::Writable for PCGCCTL_SPEC { +impl crate::Writable for PcgcctlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCGCCTL to value 0x0100"] -impl crate::Resettable for PCGCCTL_SPEC { +impl crate::Resettable for PcgcctlSpec { const RESET_VALUE: u32 = 0x0100; } diff --git a/src/usb0_ch0.rs b/src/usb0_ch0.rs index 514840aa..e26ed016 100644 --- a/src/usb0_ch0.rs +++ b/src/usb0_ch0.rs @@ -1,94 +1,102 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - hcchar: HCCHAR, + hcchar: Hcchar, _reserved1: [u8; 0x04], - hcint: HCINT, - hcintmsk: HCINTMSK, + hcint: Hcint, + hcintmsk: Hcintmsk, _reserved_3_hctsiz: [u8; 0x04], _reserved_4_hcdma: [u8; 0x04], _reserved5: [u8; 0x04], - hcdmab: HCDMAB, + hcdmab: Hcdmab, } impl RegisterBlock { #[doc = "0x00 - Host Channel Characteristics Register"] #[inline(always)] - pub const fn hcchar(&self) -> &HCCHAR { + pub const fn hcchar(&self) -> &Hcchar { &self.hcchar } #[doc = "0x08 - Host Channel Interrupt Register"] #[inline(always)] - pub const fn hcint(&self) -> &HCINT { + pub const fn hcint(&self) -> &Hcint { &self.hcint } #[doc = "0x0c - Host Channel Interrupt Mask Register"] #[inline(always)] - pub const fn hcintmsk(&self) -> &HCINTMSK { + pub const fn hcintmsk(&self) -> &Hcintmsk { &self.hcintmsk } #[doc = "0x10 - Host Channel Transfer Size Register \\[SCATGATHER\\]"] #[inline(always)] - pub const fn hctsiz_scatgather(&self) -> &HCTSIZ_SCATGATHER { + pub const fn hctsiz_scatgather(&self) -> &HctsizScatgather { unsafe { &*(self as *const Self).cast::().add(16).cast() } } #[doc = "0x10 - Host Channel Transfer Size Register \\[BUFFERMODE\\]"] #[inline(always)] - pub const fn hctsiz_buffermode(&self) -> &HCTSIZ_BUFFERMODE { + pub const fn hctsiz_buffermode(&self) -> &HctsizBuffermode { unsafe { &*(self as *const Self).cast::().add(16).cast() } } #[doc = "0x14 - Host Channel DMA Address Register \\[SCATGATHER\\]"] #[inline(always)] - pub const fn hcdma_scatgather(&self) -> &HCDMA_SCATGATHER { + pub const fn hcdma_scatgather(&self) -> &HcdmaScatgather { unsafe { &*(self as *const Self).cast::().add(20).cast() } } #[doc = "0x14 - Host Channel DMA Address Register \\[BUFFERMODE\\]"] #[inline(always)] - pub const fn hcdma_buffermode(&self) -> &HCDMA_BUFFERMODE { + pub const fn hcdma_buffermode(&self) -> &HcdmaBuffermode { unsafe { &*(self as *const Self).cast::().add(20).cast() } } #[doc = "0x1c - Host Channel DMA Buffer Address Register"] #[inline(always)] - pub const fn hcdmab(&self) -> &HCDMAB { + pub const fn hcdmab(&self) -> &Hcdmab { &self.hcdmab } } #[doc = "HCCHAR (rw) register accessor: Host Channel Characteristics Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcchar`] module"] -pub type HCCHAR = crate::Reg; +#[doc(alias = "HCCHAR")] +pub type Hcchar = crate::Reg; #[doc = "Host Channel Characteristics Register"] pub mod hcchar; #[doc = "HCINT (rw) register accessor: Host Channel Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcint`] module"] -pub type HCINT = crate::Reg; +#[doc(alias = "HCINT")] +pub type Hcint = crate::Reg; #[doc = "Host Channel Interrupt Register"] pub mod hcint; #[doc = "HCINTMSK (rw) register accessor: Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcintmsk`] module"] -pub type HCINTMSK = crate::Reg; +#[doc(alias = "HCINTMSK")] +pub type Hcintmsk = crate::Reg; #[doc = "Host Channel Interrupt Mask Register"] pub mod hcintmsk; #[doc = "HCTSIZ_BUFFERMODE (rw) register accessor: Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_buffermode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_buffermode`] module"] -pub type HCTSIZ_BUFFERMODE = crate::Reg; +#[doc(alias = "HCTSIZ_BUFFERMODE")] +pub type HctsizBuffermode = crate::Reg; #[doc = "Host Channel Transfer Size Register \\[BUFFERMODE\\]"] pub mod hctsiz_buffermode; #[doc = "HCTSIZ_SCATGATHER (rw) register accessor: Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_scatgather::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hctsiz_scatgather`] module"] -pub type HCTSIZ_SCATGATHER = crate::Reg; +#[doc(alias = "HCTSIZ_SCATGATHER")] +pub type HctsizScatgather = crate::Reg; #[doc = "Host Channel Transfer Size Register \\[SCATGATHER\\]"] pub mod hctsiz_scatgather; #[doc = "HCDMA_BUFFERMODE (rw) register accessor: Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_buffermode::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_buffermode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdma_buffermode`] module"] -pub type HCDMA_BUFFERMODE = crate::Reg; +#[doc(alias = "HCDMA_BUFFERMODE")] +pub type HcdmaBuffermode = crate::Reg; #[doc = "Host Channel DMA Address Register \\[BUFFERMODE\\]"] pub mod hcdma_buffermode; #[doc = "HCDMA_SCATGATHER (rw) register accessor: Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_scatgather::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_scatgather::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdma_scatgather`] module"] -pub type HCDMA_SCATGATHER = crate::Reg; +#[doc(alias = "HCDMA_SCATGATHER")] +pub type HcdmaScatgather = crate::Reg; #[doc = "Host Channel DMA Address Register \\[SCATGATHER\\]"] pub mod hcdma_scatgather; #[doc = "HCDMAB (r) register accessor: Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hcdmab`] module"] -pub type HCDMAB = crate::Reg; +#[doc(alias = "HCDMAB")] +pub type Hcdmab = crate::Reg; #[doc = "Host Channel DMA Buffer Address Register"] pub mod hcdmab; diff --git a/src/usb0_ch0/hcchar.rs b/src/usb0_ch0/hcchar.rs index b7d7bef6..082e2758 100644 --- a/src/usb0_ch0/hcchar.rs +++ b/src/usb0_ch0/hcchar.rs @@ -1,128 +1,128 @@ #[doc = "Register `HCCHAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCCHAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type MpsR = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `EPNum` reader - Endpoint Number"] -pub type EPNUM_R = crate::FieldReader; +pub type EpnumR = crate::FieldReader; #[doc = "Field `EPNum` writer - Endpoint Number"] -pub type EPNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `EPDir` reader - Endpoint Direction"] -pub type EPDIR_R = crate::BitReader; +pub type EpnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Endpoint Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EPDIR_A { +pub enum Epdir { #[doc = "0: OUT"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: IN"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EPDIR_A) -> Self { + fn from(variant: Epdir) -> Self { variant as u8 != 0 } } -impl EPDIR_R { +#[doc = "Field `EPDir` reader - Endpoint Direction"] +pub type EpdirR = crate::BitReader; +impl EpdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPDIR_A { + pub const fn variant(&self) -> Epdir { match self.bits { - false => EPDIR_A::VALUE1, - true => EPDIR_A::VALUE2, + false => Epdir::Value1, + true => Epdir::Value2, } } #[doc = "OUT"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPDIR_A::VALUE1 + *self == Epdir::Value1 } #[doc = "IN"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPDIR_A::VALUE2 + *self == Epdir::Value2 } } #[doc = "Field `EPDir` writer - Endpoint Direction"] -pub type EPDIR_W<'a, REG> = crate::BitWriter<'a, REG, EPDIR_A>; -impl<'a, REG> EPDIR_W<'a, REG> +pub type EpdirW<'a, REG> = crate::BitWriter<'a, REG, Epdir>; +impl<'a, REG> EpdirW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "OUT"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPDIR_A::VALUE1) + self.variant(Epdir::Value1) } #[doc = "IN"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPDIR_A::VALUE2) + self.variant(Epdir::Value2) } } -#[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EPTYPE_A { +pub enum Eptype { #[doc = "0: Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Isochronous"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bulk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Interrupt"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EPTYPE_A) -> Self { + fn from(variant: Eptype) -> Self { variant as _ } } -impl crate::FieldSpec for EPTYPE_A { +impl crate::FieldSpec for Eptype { type Ux = u8; } -impl EPTYPE_R { +#[doc = "Field `EPType` reader - Endpoint Type"] +pub type EptypeR = crate::FieldReader; +impl EptypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPTYPE_A { + pub const fn variant(&self) -> Eptype { match self.bits { - 0 => EPTYPE_A::VALUE1, - 1 => EPTYPE_A::VALUE2, - 2 => EPTYPE_A::VALUE3, - 3 => EPTYPE_A::VALUE4, + 0 => Eptype::Value1, + 1 => Eptype::Value2, + 2 => Eptype::Value3, + 3 => Eptype::Value4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPTYPE_A::VALUE1 + *self == Eptype::Value1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPTYPE_A::VALUE2 + *self == Eptype::Value2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EPTYPE_A::VALUE3 + *self == Eptype::Value3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EPTYPE_A::VALUE4 + *self == Eptype::Value4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EPTYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EPTYPE_A>; -impl<'a, REG> EPTYPE_W<'a, REG> +pub type EptypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eptype>; +impl<'a, REG> EptypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -130,76 +130,76 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE1) + self.variant(Eptype::Value1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE2) + self.variant(Eptype::Value2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE3) + self.variant(Eptype::Value3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE4) + self.variant(Eptype::Value4) } } -#[doc = "Field `MC_EC` reader - Multi Count / Error Count"] -pub type MC_EC_R = crate::FieldReader; #[doc = "Multi Count / Error Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MC_EC_A { +pub enum McEc { #[doc = "1: 1 transaction"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 transactions to be issued for this endpoint per frame"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 3 transactions to be issued for this endpoint per frame"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MC_EC_A) -> Self { + fn from(variant: McEc) -> Self { variant as _ } } -impl crate::FieldSpec for MC_EC_A { +impl crate::FieldSpec for McEc { type Ux = u8; } -impl MC_EC_R { +#[doc = "Field `MC_EC` reader - Multi Count / Error Count"] +pub type McEcR = crate::FieldReader; +impl McEcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(MC_EC_A::VALUE2), - 2 => Some(MC_EC_A::VALUE3), - 3 => Some(MC_EC_A::VALUE4), + 1 => Some(McEc::Value2), + 2 => Some(McEc::Value3), + 3 => Some(McEc::Value4), _ => None, } } #[doc = "1 transaction"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MC_EC_A::VALUE2 + *self == McEc::Value2 } #[doc = "2 transactions to be issued for this endpoint per frame"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MC_EC_A::VALUE3 + *self == McEc::Value3 } #[doc = "3 transactions to be issued for this endpoint per frame"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MC_EC_A::VALUE4 + *self == McEc::Value4 } } #[doc = "Field `MC_EC` writer - Multi Count / Error Count"] -pub type MC_EC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MC_EC_A>; -impl<'a, REG> MC_EC_W<'a, REG> +pub type McEcW<'a, REG> = crate::FieldWriter<'a, REG, 2, McEc>; +impl<'a, REG> McEcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -207,259 +207,250 @@ where #[doc = "1 transaction"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MC_EC_A::VALUE2) + self.variant(McEc::Value2) } #[doc = "2 transactions to be issued for this endpoint per frame"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MC_EC_A::VALUE3) + self.variant(McEc::Value3) } #[doc = "3 transactions to be issued for this endpoint per frame"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MC_EC_A::VALUE4) + self.variant(McEc::Value4) } } #[doc = "Field `DevAddr` reader - Device Address"] -pub type DEV_ADDR_R = crate::FieldReader; +pub type DevAddrR = crate::FieldReader; #[doc = "Field `DevAddr` writer - Device Address"] -pub type DEV_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; -#[doc = "Field `OddFrm` reader - Odd Frame"] -pub type ODD_FRM_R = crate::BitReader; +pub type DevAddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Odd Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ODD_FRM_A { +pub enum OddFrm { #[doc = "0: Even frame"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Odd frame"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ODD_FRM_A) -> Self { + fn from(variant: OddFrm) -> Self { variant as u8 != 0 } } -impl ODD_FRM_R { +#[doc = "Field `OddFrm` reader - Odd Frame"] +pub type OddFrmR = crate::BitReader; +impl OddFrmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ODD_FRM_A { + pub const fn variant(&self) -> OddFrm { match self.bits { - false => ODD_FRM_A::VALUE1, - true => ODD_FRM_A::VALUE2, + false => OddFrm::Value1, + true => OddFrm::Value2, } } #[doc = "Even frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ODD_FRM_A::VALUE1 + *self == OddFrm::Value1 } #[doc = "Odd frame"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ODD_FRM_A::VALUE2 + *self == OddFrm::Value2 } } #[doc = "Field `OddFrm` writer - Odd Frame"] -pub type ODD_FRM_W<'a, REG> = crate::BitWriter<'a, REG, ODD_FRM_A>; -impl<'a, REG> ODD_FRM_W<'a, REG> +pub type OddFrmW<'a, REG> = crate::BitWriter<'a, REG, OddFrm>; +impl<'a, REG> OddFrmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Even frame"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ODD_FRM_A::VALUE1) + self.variant(OddFrm::Value1) } #[doc = "Odd frame"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ODD_FRM_A::VALUE2) + self.variant(OddFrm::Value2) } } #[doc = "Field `ChDis` reader - Channel Disable"] -pub type CH_DIS_R = crate::BitReader; +pub type ChDisR = crate::BitReader; #[doc = "Field `ChDis` writer - Channel Disable"] -pub type CH_DIS_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `ChEna` reader - Channel Enable"] -pub type CH_ENA_R = crate::BitReader; +pub type ChDisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Channel Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CH_ENA_A { +pub enum ChEna { #[doc = "0: Scatter/Gather mode enabled: Indicates that the descriptor structure is not yet ready. Scatter/Gather mode disabled: Channel disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Scatter/Gather mode enabled: Indicates that the descriptor structure and data buffer with data is setup and this channel can access the descriptor. Scatter/Gather mode disabled: Channel enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CH_ENA_A) -> Self { + fn from(variant: ChEna) -> Self { variant as u8 != 0 } } -impl CH_ENA_R { +#[doc = "Field `ChEna` reader - Channel Enable"] +pub type ChEnaR = crate::BitReader; +impl ChEnaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CH_ENA_A { + pub const fn variant(&self) -> ChEna { match self.bits { - false => CH_ENA_A::VALUE1, - true => CH_ENA_A::VALUE2, + false => ChEna::Value1, + true => ChEna::Value2, } } #[doc = "Scatter/Gather mode enabled: Indicates that the descriptor structure is not yet ready. Scatter/Gather mode disabled: Channel disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CH_ENA_A::VALUE1 + *self == ChEna::Value1 } #[doc = "Scatter/Gather mode enabled: Indicates that the descriptor structure and data buffer with data is setup and this channel can access the descriptor. Scatter/Gather mode disabled: Channel enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CH_ENA_A::VALUE2 + *self == ChEna::Value2 } } #[doc = "Field `ChEna` writer - Channel Enable"] -pub type CH_ENA_W<'a, REG> = crate::BitWriter<'a, REG, CH_ENA_A>; -impl<'a, REG> CH_ENA_W<'a, REG> +pub type ChEnaW<'a, REG> = crate::BitWriter<'a, REG, ChEna>; +impl<'a, REG> ChEnaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Scatter/Gather mode enabled: Indicates that the descriptor structure is not yet ready. Scatter/Gather mode disabled: Channel disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CH_ENA_A::VALUE1) + self.variant(ChEna::Value1) } #[doc = "Scatter/Gather mode enabled: Indicates that the descriptor structure and data buffer with data is setup and this channel can access the descriptor. Scatter/Gather mode disabled: Channel enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CH_ENA_A::VALUE2) + self.variant(ChEna::Value2) } } impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint Number"] #[inline(always)] - pub fn epnum(&self) -> EPNUM_R { - EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) + pub fn epnum(&self) -> EpnumR { + EpnumR::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint Direction"] #[inline(always)] - pub fn epdir(&self) -> EPDIR_R { - EPDIR_R::new(((self.bits >> 15) & 1) != 0) + pub fn epdir(&self) -> EpdirR { + EpdirR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Multi Count / Error Count"] #[inline(always)] - pub fn mc_ec(&self) -> MC_EC_R { - MC_EC_R::new(((self.bits >> 20) & 3) as u8) + pub fn mc_ec(&self) -> McEcR { + McEcR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:28 - Device Address"] #[inline(always)] - pub fn dev_addr(&self) -> DEV_ADDR_R { - DEV_ADDR_R::new(((self.bits >> 22) & 0x7f) as u8) + pub fn dev_addr(&self) -> DevAddrR { + DevAddrR::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd Frame"] #[inline(always)] - pub fn odd_frm(&self) -> ODD_FRM_R { - ODD_FRM_R::new(((self.bits >> 29) & 1) != 0) + pub fn odd_frm(&self) -> OddFrmR { + OddFrmR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Channel Disable"] #[inline(always)] - pub fn ch_dis(&self) -> CH_DIS_R { - CH_DIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn ch_dis(&self) -> ChDisR { + ChDisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Channel Enable"] #[inline(always)] - pub fn ch_ena(&self) -> CH_ENA_R { - CH_ENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn ch_ena(&self) -> ChEnaR { + ChEnaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bits 11:14 - Endpoint Number"] #[inline(always)] #[must_use] - pub fn epnum(&mut self) -> EPNUM_W { - EPNUM_W::new(self, 11) + pub fn epnum(&mut self) -> EpnumW { + EpnumW::new(self, 11) } #[doc = "Bit 15 - Endpoint Direction"] #[inline(always)] #[must_use] - pub fn epdir(&mut self) -> EPDIR_W { - EPDIR_W::new(self, 15) + pub fn epdir(&mut self) -> EpdirW { + EpdirW::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EPTYPE_W { - EPTYPE_W::new(self, 18) + pub fn eptype(&mut self) -> EptypeW { + EptypeW::new(self, 18) } #[doc = "Bits 20:21 - Multi Count / Error Count"] #[inline(always)] #[must_use] - pub fn mc_ec(&mut self) -> MC_EC_W { - MC_EC_W::new(self, 20) + pub fn mc_ec(&mut self) -> McEcW { + McEcW::new(self, 20) } #[doc = "Bits 22:28 - Device Address"] #[inline(always)] #[must_use] - pub fn dev_addr(&mut self) -> DEV_ADDR_W { - DEV_ADDR_W::new(self, 22) + pub fn dev_addr(&mut self) -> DevAddrW { + DevAddrW::new(self, 22) } #[doc = "Bit 29 - Odd Frame"] #[inline(always)] #[must_use] - pub fn odd_frm(&mut self) -> ODD_FRM_W { - ODD_FRM_W::new(self, 29) + pub fn odd_frm(&mut self) -> OddFrmW { + OddFrmW::new(self, 29) } #[doc = "Bit 30 - Channel Disable"] #[inline(always)] #[must_use] - pub fn ch_dis(&mut self) -> CH_DIS_W { - CH_DIS_W::new(self, 30) + pub fn ch_dis(&mut self) -> ChDisW { + ChDisW::new(self, 30) } #[doc = "Bit 31 - Channel Enable"] #[inline(always)] #[must_use] - pub fn ch_ena(&mut self) -> CH_ENA_W { - CH_ENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ch_ena(&mut self) -> ChEnaW { + ChEnaW::new(self, 31) } } #[doc = "Host Channel Characteristics Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcchar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcchar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCCHAR_SPEC; -impl crate::RegisterSpec for HCCHAR_SPEC { +pub struct HccharSpec; +impl crate::RegisterSpec for HccharSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcchar::R`](R) reader structure"] -impl crate::Readable for HCCHAR_SPEC {} +impl crate::Readable for HccharSpec {} #[doc = "`write(|w| ..)` method takes [`hcchar::W`](W) writer structure"] -impl crate::Writable for HCCHAR_SPEC { +impl crate::Writable for HccharSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCCHAR to value 0"] -impl crate::Resettable for HCCHAR_SPEC { +impl crate::Resettable for HccharSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hcdma_buffermode.rs b/src/usb0_ch0/hcdma_buffermode.rs index 4d06d6ac..f1f6ca63 100644 --- a/src/usb0_ch0/hcdma_buffermode.rs +++ b/src/usb0_ch0/hcdma_buffermode.rs @@ -1,49 +1,40 @@ #[doc = "Register `HCDMA_BUFFERMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCDMA_BUFFERMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new(self.bits) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 0) } } #[doc = "Host Channel DMA Address Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_buffermode::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_buffermode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCDMA_BUFFERMODE_SPEC; -impl crate::RegisterSpec for HCDMA_BUFFERMODE_SPEC { +pub struct HcdmaBuffermodeSpec; +impl crate::RegisterSpec for HcdmaBuffermodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcdma_buffermode::R`](R) reader structure"] -impl crate::Readable for HCDMA_BUFFERMODE_SPEC {} +impl crate::Readable for HcdmaBuffermodeSpec {} #[doc = "`write(|w| ..)` method takes [`hcdma_buffermode::W`](W) writer structure"] -impl crate::Writable for HCDMA_BUFFERMODE_SPEC { +impl crate::Writable for HcdmaBuffermodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCDMA_BUFFERMODE to value 0"] -impl crate::Resettable for HCDMA_BUFFERMODE_SPEC { +impl crate::Resettable for HcdmaBuffermodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hcdma_scatgather.rs b/src/usb0_ch0/hcdma_scatgather.rs index 3c06c5e3..7867003c 100644 --- a/src/usb0_ch0/hcdma_scatgather.rs +++ b/src/usb0_ch0/hcdma_scatgather.rs @@ -1,51 +1,51 @@ #[doc = "Register `HCDMA_SCATGATHER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCDMA_SCATGATHER` writer"] -pub type W = crate::W; -#[doc = "Field `CTD` reader - Current Transfer Desc:"] -pub type CTD_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Current Transfer Desc:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CTD_A { +pub enum Ctd { #[doc = "0: 1 descriptor"] - VALUE1 = 0, + Value1 = 0, #[doc = "63: 64 descriptors"] - VALUE2 = 63, + Value2 = 63, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CTD_A) -> Self { + fn from(variant: Ctd) -> Self { variant as _ } } -impl crate::FieldSpec for CTD_A { +impl crate::FieldSpec for Ctd { type Ux = u8; } -impl CTD_R { +#[doc = "Field `CTD` reader - Current Transfer Desc:"] +pub type CtdR = crate::FieldReader; +impl CtdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CTD_A::VALUE1), - 63 => Some(CTD_A::VALUE2), + 0 => Some(Ctd::Value1), + 63 => Some(Ctd::Value2), _ => None, } } #[doc = "1 descriptor"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CTD_A::VALUE1 + *self == Ctd::Value1 } #[doc = "64 descriptors"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CTD_A::VALUE2 + *self == Ctd::Value2 } } #[doc = "Field `CTD` writer - Current Transfer Desc:"] -pub type CTD_W<'a, REG> = crate::FieldWriter<'a, REG, 6, CTD_A>; -impl<'a, REG> CTD_W<'a, REG> +pub type CtdW<'a, REG> = crate::FieldWriter<'a, REG, 6, Ctd>; +impl<'a, REG> CtdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,67 +53,58 @@ where #[doc = "1 descriptor"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTD_A::VALUE1) + self.variant(Ctd::Value1) } #[doc = "64 descriptors"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTD_A::VALUE2) + self.variant(Ctd::Value2) } } #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 3:8 - Current Transfer Desc:"] #[inline(always)] - pub fn ctd(&self) -> CTD_R { - CTD_R::new(((self.bits >> 3) & 0x3f) as u8) + pub fn ctd(&self) -> CtdR { + CtdR::new(((self.bits >> 3) & 0x3f) as u8) } #[doc = "Bits 9:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new((self.bits >> 9) & 0x007f_ffff) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 3:8 - Current Transfer Desc:"] #[inline(always)] #[must_use] - pub fn ctd(&mut self) -> CTD_W { - CTD_W::new(self, 3) + pub fn ctd(&mut self) -> CtdW { + CtdW::new(self, 3) } #[doc = "Bits 9:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 9) } } #[doc = "Host Channel DMA Address Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdma_scatgather::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcdma_scatgather::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCDMA_SCATGATHER_SPEC; -impl crate::RegisterSpec for HCDMA_SCATGATHER_SPEC { +pub struct HcdmaScatgatherSpec; +impl crate::RegisterSpec for HcdmaScatgatherSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcdma_scatgather::R`](R) reader structure"] -impl crate::Readable for HCDMA_SCATGATHER_SPEC {} +impl crate::Readable for HcdmaScatgatherSpec {} #[doc = "`write(|w| ..)` method takes [`hcdma_scatgather::W`](W) writer structure"] -impl crate::Writable for HCDMA_SCATGATHER_SPEC { +impl crate::Writable for HcdmaScatgatherSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCDMA_SCATGATHER to value 0"] -impl crate::Resettable for HCDMA_SCATGATHER_SPEC { +impl crate::Resettable for HcdmaScatgatherSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hcdmab.rs b/src/usb0_ch0/hcdmab.rs index ad0a6686..010a4c75 100644 --- a/src/usb0_ch0/hcdmab.rs +++ b/src/usb0_ch0/hcdmab.rs @@ -1,22 +1,22 @@ #[doc = "Register `HCDMAB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `Buffer_Address` reader - Buffer Address"] -pub type BUFFER_ADDRESS_R = crate::FieldReader; +pub type BufferAddressR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Buffer Address"] #[inline(always)] - pub fn buffer_address(&self) -> BUFFER_ADDRESS_R { - BUFFER_ADDRESS_R::new(self.bits) + pub fn buffer_address(&self) -> BufferAddressR { + BufferAddressR::new(self.bits) } } #[doc = "Host Channel DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCDMAB_SPEC; -impl crate::RegisterSpec for HCDMAB_SPEC { +pub struct HcdmabSpec; +impl crate::RegisterSpec for HcdmabSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcdmab::R`](R) reader structure"] -impl crate::Readable for HCDMAB_SPEC {} +impl crate::Readable for HcdmabSpec {} #[doc = "`reset()` method sets HCDMAB to value 0"] -impl crate::Resettable for HCDMAB_SPEC { +impl crate::Resettable for HcdmabSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hcint.rs b/src/usb0_ch0/hcint.rs index 7b4bcc92..41923125 100644 --- a/src/usb0_ch0/hcint.rs +++ b/src/usb0_ch0/hcint.rs @@ -1,244 +1,235 @@ #[doc = "Register `HCINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed"] -pub type XFER_COMPL_R = crate::BitReader; +pub type XferComplR = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed"] -pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ChHltd` reader - Channel Halted"] -pub type CH_HLTD_R = crate::BitReader; +pub type ChHltdR = crate::BitReader; #[doc = "Field `ChHltd` writer - Channel Halted"] -pub type CH_HLTD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ChHltdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AHBERR_R = crate::BitReader; +pub type AhberrR = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STALL` reader - STALL Response Received Interrupt"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `STALL` writer - STALL Response Received Interrupt"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAK` reader - NAK Response Received Interrupt"] -pub type NAK_R = crate::BitReader; +pub type NakR = crate::BitReader; #[doc = "Field `NAK` writer - NAK Response Received Interrupt"] -pub type NAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ACK` reader - ACK Response Received/Transmitted Interrupt"] -pub type ACK_R = crate::BitReader; +pub type AckR = crate::BitReader; #[doc = "Field `ACK` writer - ACK Response Received/Transmitted Interrupt"] -pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AckW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYET` reader - NYET Response Received Interrupt"] -pub type NYET_R = crate::BitReader; +pub type NyetR = crate::BitReader; #[doc = "Field `NYET` writer - NYET Response Received Interrupt"] -pub type NYET_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NyetW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `XactErr` reader - Transaction Error"] -pub type XACT_ERR_R = crate::BitReader; +pub type XactErrR = crate::BitReader; #[doc = "Field `XactErr` writer - Transaction Error"] -pub type XACT_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XactErrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BblErr` reader - Babble Error"] -pub type BBL_ERR_R = crate::BitReader; +pub type BblErrR = crate::BitReader; #[doc = "Field `BblErr` writer - Babble Error"] -pub type BBL_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BblErrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FrmOvrun` reader - Frame Overrun"] -pub type FRM_OVRUN_R = crate::BitReader; +pub type FrmOvrunR = crate::BitReader; #[doc = "Field `FrmOvrun` writer - Frame Overrun"] -pub type FRM_OVRUN_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FrmOvrunW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DataTglErr` reader - Data Toggle Error"] -pub type DATA_TGL_ERR_R = crate::BitReader; +pub type DataTglErrR = crate::BitReader; #[doc = "Field `DataTglErr` writer - Data Toggle Error"] -pub type DATA_TGL_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DataTglErrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_R = crate::BitReader; +pub type BnaintrR = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `XCS_XACT_ERR` reader - Excessive Transaction Error"] -pub type XCS_XACT_ERR_R = crate::BitReader; +pub type XcsXactErrR = crate::BitReader; #[doc = "Field `XCS_XACT_ERR` writer - Excessive Transaction Error"] -pub type XCS_XACT_ERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XcsXactErrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DESC_LST_ROLLIntr` reader - Descriptor rollover interrupt"] -pub type DESC_LST_ROLLINTR_R = crate::BitReader; +pub type DescLstRollintrR = crate::BitReader; #[doc = "Field `DESC_LST_ROLLIntr` writer - Descriptor rollover interrupt"] -pub type DESC_LST_ROLLINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DescLstRollintrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed"] #[inline(always)] - pub fn xfer_compl(&self) -> XFER_COMPL_R { - XFER_COMPL_R::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XferComplR { + XferComplR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Halted"] #[inline(always)] - pub fn ch_hltd(&self) -> CH_HLTD_R { - CH_HLTD_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch_hltd(&self) -> ChHltdR { + ChHltdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AHBERR_R { - AHBERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AhberrR { + AhberrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - STALL Response Received Interrupt"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 3) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - NAK Response Received Interrupt"] #[inline(always)] - pub fn nak(&self) -> NAK_R { - NAK_R::new(((self.bits >> 4) & 1) != 0) + pub fn nak(&self) -> NakR { + NakR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 5) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - NYET Response Received Interrupt"] #[inline(always)] - pub fn nyet(&self) -> NYET_R { - NYET_R::new(((self.bits >> 6) & 1) != 0) + pub fn nyet(&self) -> NyetR { + NyetR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transaction Error"] #[inline(always)] - pub fn xact_err(&self) -> XACT_ERR_R { - XACT_ERR_R::new(((self.bits >> 7) & 1) != 0) + pub fn xact_err(&self) -> XactErrR { + XactErrR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Babble Error"] #[inline(always)] - pub fn bbl_err(&self) -> BBL_ERR_R { - BBL_ERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn bbl_err(&self) -> BblErrR { + BblErrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Frame Overrun"] #[inline(always)] - pub fn frm_ovrun(&self) -> FRM_OVRUN_R { - FRM_OVRUN_R::new(((self.bits >> 9) & 1) != 0) + pub fn frm_ovrun(&self) -> FrmOvrunR { + FrmOvrunR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Data Toggle Error"] #[inline(always)] - pub fn data_tgl_err(&self) -> DATA_TGL_ERR_R { - DATA_TGL_ERR_R::new(((self.bits >> 10) & 1) != 0) + pub fn data_tgl_err(&self) -> DataTglErrR { + DataTglErrR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BNAINTR_R { - BNAINTR_R::new(((self.bits >> 11) & 1) != 0) + pub fn bnaintr(&self) -> BnaintrR { + BnaintrR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Excessive Transaction Error"] #[inline(always)] - pub fn xcs_xact_err(&self) -> XCS_XACT_ERR_R { - XCS_XACT_ERR_R::new(((self.bits >> 12) & 1) != 0) + pub fn xcs_xact_err(&self) -> XcsXactErrR { + XcsXactErrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Descriptor rollover interrupt"] #[inline(always)] - pub fn desc_lst_rollintr(&self) -> DESC_LST_ROLLINTR_R { - DESC_LST_ROLLINTR_R::new(((self.bits >> 13) & 1) != 0) + pub fn desc_lst_rollintr(&self) -> DescLstRollintrR { + DescLstRollintrR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XFER_COMPL_W { - XFER_COMPL_W::new(self, 0) + pub fn xfer_compl(&mut self) -> XferComplW { + XferComplW::new(self, 0) } #[doc = "Bit 1 - Channel Halted"] #[inline(always)] #[must_use] - pub fn ch_hltd(&mut self) -> CH_HLTD_W { - CH_HLTD_W::new(self, 1) + pub fn ch_hltd(&mut self) -> ChHltdW { + ChHltdW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self, 2) + pub fn ahberr(&mut self) -> AhberrW { + AhberrW::new(self, 2) } #[doc = "Bit 3 - STALL Response Received Interrupt"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 3) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 3) } #[doc = "Bit 4 - NAK Response Received Interrupt"] #[inline(always)] #[must_use] - pub fn nak(&mut self) -> NAK_W { - NAK_W::new(self, 4) + pub fn nak(&mut self) -> NakW { + NakW::new(self, 4) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W { - ACK_W::new(self, 5) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 5) } #[doc = "Bit 6 - NYET Response Received Interrupt"] #[inline(always)] #[must_use] - pub fn nyet(&mut self) -> NYET_W { - NYET_W::new(self, 6) + pub fn nyet(&mut self) -> NyetW { + NyetW::new(self, 6) } #[doc = "Bit 7 - Transaction Error"] #[inline(always)] #[must_use] - pub fn xact_err(&mut self) -> XACT_ERR_W { - XACT_ERR_W::new(self, 7) + pub fn xact_err(&mut self) -> XactErrW { + XactErrW::new(self, 7) } #[doc = "Bit 8 - Babble Error"] #[inline(always)] #[must_use] - pub fn bbl_err(&mut self) -> BBL_ERR_W { - BBL_ERR_W::new(self, 8) + pub fn bbl_err(&mut self) -> BblErrW { + BblErrW::new(self, 8) } #[doc = "Bit 9 - Frame Overrun"] #[inline(always)] #[must_use] - pub fn frm_ovrun(&mut self) -> FRM_OVRUN_W { - FRM_OVRUN_W::new(self, 9) + pub fn frm_ovrun(&mut self) -> FrmOvrunW { + FrmOvrunW::new(self, 9) } #[doc = "Bit 10 - Data Toggle Error"] #[inline(always)] #[must_use] - pub fn data_tgl_err(&mut self) -> DATA_TGL_ERR_W { - DATA_TGL_ERR_W::new(self, 10) + pub fn data_tgl_err(&mut self) -> DataTglErrW { + DataTglErrW::new(self, 10) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BNAINTR_W { - BNAINTR_W::new(self, 11) + pub fn bnaintr(&mut self) -> BnaintrW { + BnaintrW::new(self, 11) } #[doc = "Bit 12 - Excessive Transaction Error"] #[inline(always)] #[must_use] - pub fn xcs_xact_err(&mut self) -> XCS_XACT_ERR_W { - XCS_XACT_ERR_W::new(self, 12) + pub fn xcs_xact_err(&mut self) -> XcsXactErrW { + XcsXactErrW::new(self, 12) } #[doc = "Bit 13 - Descriptor rollover interrupt"] #[inline(always)] #[must_use] - pub fn desc_lst_rollintr(&mut self) -> DESC_LST_ROLLINTR_W { - DESC_LST_ROLLINTR_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn desc_lst_rollintr(&mut self) -> DescLstRollintrW { + DescLstRollintrW::new(self, 13) } } #[doc = "Host Channel Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCINT_SPEC; -impl crate::RegisterSpec for HCINT_SPEC { +pub struct HcintSpec; +impl crate::RegisterSpec for HcintSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcint::R`](R) reader structure"] -impl crate::Readable for HCINT_SPEC {} +impl crate::Readable for HcintSpec {} #[doc = "`write(|w| ..)` method takes [`hcint::W`](W) writer structure"] -impl crate::Writable for HCINT_SPEC { +impl crate::Writable for HcintSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCINT to value 0"] -impl crate::Resettable for HCINT_SPEC { +impl crate::Resettable for HcintSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hcintmsk.rs b/src/usb0_ch0/hcintmsk.rs index 9b23c8c9..bf3fc670 100644 --- a/src/usb0_ch0/hcintmsk.rs +++ b/src/usb0_ch0/hcintmsk.rs @@ -1,229 +1,220 @@ #[doc = "Register `HCINTMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCINTMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferComplMsk` reader - Transfer Completed Mask"] -pub type XFER_COMPL_MSK_R = crate::BitReader; +pub type XferComplMskR = crate::BitReader; #[doc = "Field `XferComplMsk` writer - Transfer Completed Mask"] -pub type XFER_COMPL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ChHltdMsk` reader - Channel Halted Mask"] -pub type CH_HLTD_MSK_R = crate::BitReader; +pub type ChHltdMskR = crate::BitReader; #[doc = "Field `ChHltdMsk` writer - Channel Halted Mask"] -pub type CH_HLTD_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ChHltdMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErrMsk` reader - AHB Error Mask"] -pub type AHBERR_MSK_R = crate::BitReader; +pub type AhberrMskR = crate::BitReader; #[doc = "Field `AHBErrMsk` writer - AHB Error Mask"] -pub type AHBERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `StallMsk` reader - STALL Response Received Interrupt Mask"] -pub type STALL_MSK_R = crate::BitReader; +pub type StallMskR = crate::BitReader; #[doc = "Field `StallMsk` writer - STALL Response Received Interrupt Mask"] -pub type STALL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NakMsk` reader - NAK Response Received Interrupt Mask"] -pub type NAK_MSK_R = crate::BitReader; +pub type NakMskR = crate::BitReader; #[doc = "Field `NakMsk` writer - NAK Response Received Interrupt Mask"] -pub type NAK_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AckMsk` reader - ACK Response Received/Transmitted Interrupt Mask"] -pub type ACK_MSK_R = crate::BitReader; +pub type AckMskR = crate::BitReader; #[doc = "Field `AckMsk` writer - ACK Response Received/Transmitted Interrupt Mask"] -pub type ACK_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AckMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NyetMsk` reader - NYET Response Received Interrupt Mask"] -pub type NYET_MSK_R = crate::BitReader; +pub type NyetMskR = crate::BitReader; #[doc = "Field `NyetMsk` writer - NYET Response Received Interrupt Mask"] -pub type NYET_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NyetMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `XactErrMsk` reader - Transaction Error Mask"] -pub type XACT_ERR_MSK_R = crate::BitReader; +pub type XactErrMskR = crate::BitReader; #[doc = "Field `XactErrMsk` writer - Transaction Error Mask"] -pub type XACT_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XactErrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BblErrMsk` reader - Babble Error Mask"] -pub type BBL_ERR_MSK_R = crate::BitReader; +pub type BblErrMskR = crate::BitReader; #[doc = "Field `BblErrMsk` writer - Babble Error Mask"] -pub type BBL_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BblErrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FrmOvrunMsk` reader - Frame Overrun Mask"] -pub type FRM_OVRUN_MSK_R = crate::BitReader; +pub type FrmOvrunMskR = crate::BitReader; #[doc = "Field `FrmOvrunMsk` writer - Frame Overrun Mask"] -pub type FRM_OVRUN_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type FrmOvrunMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DataTglErrMsk` reader - Data Toggle Error Mask"] -pub type DATA_TGL_ERR_MSK_R = crate::BitReader; +pub type DataTglErrMskR = crate::BitReader; #[doc = "Field `DataTglErrMsk` writer - Data Toggle Error Mask"] -pub type DATA_TGL_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DataTglErrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntrMsk` reader - BNA (Buffer Not Available) Interrupt mask register"] -pub type BNAINTR_MSK_R = crate::BitReader; +pub type BnaintrMskR = crate::BitReader; #[doc = "Field `BNAIntrMsk` writer - BNA (Buffer Not Available) Interrupt mask register"] -pub type BNAINTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrMskW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DESC_LST_ROLLIntrMsk` reader - Descriptor rollover interrupt Mask register"] -pub type DESC_LST_ROLLINTR_MSK_R = crate::BitReader; +pub type DescLstRollintrMskR = crate::BitReader; #[doc = "Field `DESC_LST_ROLLIntrMsk` writer - Descriptor rollover interrupt Mask register"] -pub type DESC_LST_ROLLINTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DescLstRollintrMskW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Mask"] #[inline(always)] - pub fn xfer_compl_msk(&self) -> XFER_COMPL_MSK_R { - XFER_COMPL_MSK_R::new((self.bits & 1) != 0) + pub fn xfer_compl_msk(&self) -> XferComplMskR { + XferComplMskR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Halted Mask"] #[inline(always)] - pub fn ch_hltd_msk(&self) -> CH_HLTD_MSK_R { - CH_HLTD_MSK_R::new(((self.bits >> 1) & 1) != 0) + pub fn ch_hltd_msk(&self) -> ChHltdMskR { + ChHltdMskR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] - pub fn ahberr_msk(&self) -> AHBERR_MSK_R { - AHBERR_MSK_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr_msk(&self) -> AhberrMskR { + AhberrMskR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - STALL Response Received Interrupt Mask"] #[inline(always)] - pub fn stall_msk(&self) -> STALL_MSK_R { - STALL_MSK_R::new(((self.bits >> 3) & 1) != 0) + pub fn stall_msk(&self) -> StallMskR { + StallMskR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - NAK Response Received Interrupt Mask"] #[inline(always)] - pub fn nak_msk(&self) -> NAK_MSK_R { - NAK_MSK_R::new(((self.bits >> 4) & 1) != 0) + pub fn nak_msk(&self) -> NakMskR { + NakMskR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt Mask"] #[inline(always)] - pub fn ack_msk(&self) -> ACK_MSK_R { - ACK_MSK_R::new(((self.bits >> 5) & 1) != 0) + pub fn ack_msk(&self) -> AckMskR { + AckMskR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - NYET Response Received Interrupt Mask"] #[inline(always)] - pub fn nyet_msk(&self) -> NYET_MSK_R { - NYET_MSK_R::new(((self.bits >> 6) & 1) != 0) + pub fn nyet_msk(&self) -> NyetMskR { + NyetMskR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transaction Error Mask"] #[inline(always)] - pub fn xact_err_msk(&self) -> XACT_ERR_MSK_R { - XACT_ERR_MSK_R::new(((self.bits >> 7) & 1) != 0) + pub fn xact_err_msk(&self) -> XactErrMskR { + XactErrMskR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Babble Error Mask"] #[inline(always)] - pub fn bbl_err_msk(&self) -> BBL_ERR_MSK_R { - BBL_ERR_MSK_R::new(((self.bits >> 8) & 1) != 0) + pub fn bbl_err_msk(&self) -> BblErrMskR { + BblErrMskR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Frame Overrun Mask"] #[inline(always)] - pub fn frm_ovrun_msk(&self) -> FRM_OVRUN_MSK_R { - FRM_OVRUN_MSK_R::new(((self.bits >> 9) & 1) != 0) + pub fn frm_ovrun_msk(&self) -> FrmOvrunMskR { + FrmOvrunMskR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Data Toggle Error Mask"] #[inline(always)] - pub fn data_tgl_err_msk(&self) -> DATA_TGL_ERR_MSK_R { - DATA_TGL_ERR_MSK_R::new(((self.bits >> 10) & 1) != 0) + pub fn data_tgl_err_msk(&self) -> DataTglErrMskR { + DataTglErrMskR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt mask register"] #[inline(always)] - pub fn bnaintr_msk(&self) -> BNAINTR_MSK_R { - BNAINTR_MSK_R::new(((self.bits >> 11) & 1) != 0) + pub fn bnaintr_msk(&self) -> BnaintrMskR { + BnaintrMskR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 13 - Descriptor rollover interrupt Mask register"] #[inline(always)] - pub fn desc_lst_rollintr_msk(&self) -> DESC_LST_ROLLINTR_MSK_R { - DESC_LST_ROLLINTR_MSK_R::new(((self.bits >> 13) & 1) != 0) + pub fn desc_lst_rollintr_msk(&self) -> DescLstRollintrMskR { + DescLstRollintrMskR::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Mask"] #[inline(always)] #[must_use] - pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { - XFER_COMPL_MSK_W::new(self, 0) + pub fn xfer_compl_msk(&mut self) -> XferComplMskW { + XferComplMskW::new(self, 0) } #[doc = "Bit 1 - Channel Halted Mask"] #[inline(always)] #[must_use] - pub fn ch_hltd_msk(&mut self) -> CH_HLTD_MSK_W { - CH_HLTD_MSK_W::new(self, 1) + pub fn ch_hltd_msk(&mut self) -> ChHltdMskW { + ChHltdMskW::new(self, 1) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] #[must_use] - pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { - AHBERR_MSK_W::new(self, 2) + pub fn ahberr_msk(&mut self) -> AhberrMskW { + AhberrMskW::new(self, 2) } #[doc = "Bit 3 - STALL Response Received Interrupt Mask"] #[inline(always)] #[must_use] - pub fn stall_msk(&mut self) -> STALL_MSK_W { - STALL_MSK_W::new(self, 3) + pub fn stall_msk(&mut self) -> StallMskW { + StallMskW::new(self, 3) } #[doc = "Bit 4 - NAK Response Received Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nak_msk(&mut self) -> NAK_MSK_W { - NAK_MSK_W::new(self, 4) + pub fn nak_msk(&mut self) -> NakMskW { + NakMskW::new(self, 4) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt Mask"] #[inline(always)] #[must_use] - pub fn ack_msk(&mut self) -> ACK_MSK_W { - ACK_MSK_W::new(self, 5) + pub fn ack_msk(&mut self) -> AckMskW { + AckMskW::new(self, 5) } #[doc = "Bit 6 - NYET Response Received Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nyet_msk(&mut self) -> NYET_MSK_W { - NYET_MSK_W::new(self, 6) + pub fn nyet_msk(&mut self) -> NyetMskW { + NyetMskW::new(self, 6) } #[doc = "Bit 7 - Transaction Error Mask"] #[inline(always)] #[must_use] - pub fn xact_err_msk(&mut self) -> XACT_ERR_MSK_W { - XACT_ERR_MSK_W::new(self, 7) + pub fn xact_err_msk(&mut self) -> XactErrMskW { + XactErrMskW::new(self, 7) } #[doc = "Bit 8 - Babble Error Mask"] #[inline(always)] #[must_use] - pub fn bbl_err_msk(&mut self) -> BBL_ERR_MSK_W { - BBL_ERR_MSK_W::new(self, 8) + pub fn bbl_err_msk(&mut self) -> BblErrMskW { + BblErrMskW::new(self, 8) } #[doc = "Bit 9 - Frame Overrun Mask"] #[inline(always)] #[must_use] - pub fn frm_ovrun_msk(&mut self) -> FRM_OVRUN_MSK_W { - FRM_OVRUN_MSK_W::new(self, 9) + pub fn frm_ovrun_msk(&mut self) -> FrmOvrunMskW { + FrmOvrunMskW::new(self, 9) } #[doc = "Bit 10 - Data Toggle Error Mask"] #[inline(always)] #[must_use] - pub fn data_tgl_err_msk(&mut self) -> DATA_TGL_ERR_MSK_W { - DATA_TGL_ERR_MSK_W::new(self, 10) + pub fn data_tgl_err_msk(&mut self) -> DataTglErrMskW { + DataTglErrMskW::new(self, 10) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt mask register"] #[inline(always)] #[must_use] - pub fn bnaintr_msk(&mut self) -> BNAINTR_MSK_W { - BNAINTR_MSK_W::new(self, 11) + pub fn bnaintr_msk(&mut self) -> BnaintrMskW { + BnaintrMskW::new(self, 11) } #[doc = "Bit 13 - Descriptor rollover interrupt Mask register"] #[inline(always)] #[must_use] - pub fn desc_lst_rollintr_msk(&mut self) -> DESC_LST_ROLLINTR_MSK_W { - DESC_LST_ROLLINTR_MSK_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn desc_lst_rollintr_msk(&mut self) -> DescLstRollintrMskW { + DescLstRollintrMskW::new(self, 13) } } #[doc = "Host Channel Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hcintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCINTMSK_SPEC; -impl crate::RegisterSpec for HCINTMSK_SPEC { +pub struct HcintmskSpec; +impl crate::RegisterSpec for HcintmskSpec { type Ux = u32; } #[doc = "`read()` method returns [`hcintmsk::R`](R) reader structure"] -impl crate::Readable for HCINTMSK_SPEC {} +impl crate::Readable for HcintmskSpec {} #[doc = "`write(|w| ..)` method takes [`hcintmsk::W`](W) writer structure"] -impl crate::Writable for HCINTMSK_SPEC { +impl crate::Writable for HcintmskSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCINTMSK to value 0"] -impl crate::Resettable for HCINTMSK_SPEC { +impl crate::Resettable for HcintmskSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hctsiz_buffermode.rs b/src/usb0_ch0/hctsiz_buffermode.rs index 0b2ccb8b..acf68393 100644 --- a/src/usb0_ch0/hctsiz_buffermode.rs +++ b/src/usb0_ch0/hctsiz_buffermode.rs @@ -1,75 +1,75 @@ #[doc = "Register `HCTSIZ_BUFFERMODE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCTSIZ_BUFFERMODE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; -#[doc = "Field `Pid` reader - PID"] -pub type PID_R = crate::FieldReader; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PID_A { +pub enum Pid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DATA2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: DATA1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MDATA (non-control)/SETUP (control)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PID_A) -> Self { + fn from(variant: Pid) -> Self { variant as _ } } -impl crate::FieldSpec for PID_A { +impl crate::FieldSpec for Pid { type Ux = u8; } -impl PID_R { +#[doc = "Field `Pid` reader - PID"] +pub type PidR = crate::FieldReader; +impl PidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PID_A { + pub const fn variant(&self) -> Pid { match self.bits { - 0 => PID_A::VALUE1, - 1 => PID_A::VALUE2, - 2 => PID_A::VALUE3, - 3 => PID_A::VALUE4, + 0 => Pid::Value1, + 1 => Pid::Value2, + 2 => Pid::Value3, + 3 => Pid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PID_A::VALUE1 + *self == Pid::Value1 } #[doc = "DATA2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PID_A::VALUE2 + *self == Pid::Value2 } #[doc = "DATA1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PID_A::VALUE3 + *self == Pid::Value3 } #[doc = "MDATA (non-control)/SETUP (control)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PID_A::VALUE4 + *self == Pid::Value4 } } #[doc = "Field `Pid` writer - PID"] -pub type PID_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PID_A>; -impl<'a, REG> PID_W<'a, REG> +pub type PidW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pid>; +impl<'a, REG> PidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,84 +77,75 @@ where #[doc = "DATA0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE1) + self.variant(Pid::Value1) } #[doc = "DATA2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE2) + self.variant(Pid::Value2) } #[doc = "DATA1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE3) + self.variant(Pid::Value3) } #[doc = "MDATA (non-control)/SETUP (control)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE4) + self.variant(Pid::Value4) } } impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - PID"] #[inline(always)] - pub fn pid(&self) -> PID_R { - PID_R::new(((self.bits >> 29) & 3) as u8) + pub fn pid(&self) -> PidR { + PidR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } #[doc = "Bits 29:30 - PID"] #[inline(always)] #[must_use] - pub fn pid(&mut self) -> PID_W { - PID_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pid(&mut self) -> PidW { + PidW::new(self, 29) } } #[doc = "Host Channel Transfer Size Register \\[BUFFERMODE\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_buffermode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_buffermode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCTSIZ_BUFFERMODE_SPEC; -impl crate::RegisterSpec for HCTSIZ_BUFFERMODE_SPEC { +pub struct HctsizBuffermodeSpec; +impl crate::RegisterSpec for HctsizBuffermodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`hctsiz_buffermode::R`](R) reader structure"] -impl crate::Readable for HCTSIZ_BUFFERMODE_SPEC {} +impl crate::Readable for HctsizBuffermodeSpec {} #[doc = "`write(|w| ..)` method takes [`hctsiz_buffermode::W`](W) writer structure"] -impl crate::Writable for HCTSIZ_BUFFERMODE_SPEC { +impl crate::Writable for HctsizBuffermodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCTSIZ_BUFFERMODE to value 0"] -impl crate::Resettable for HCTSIZ_BUFFERMODE_SPEC { +impl crate::Resettable for HctsizBuffermodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ch0/hctsiz_scatgather.rs b/src/usb0_ch0/hctsiz_scatgather.rs index b1ee1abc..6b0c5e88 100644 --- a/src/usb0_ch0/hctsiz_scatgather.rs +++ b/src/usb0_ch0/hctsiz_scatgather.rs @@ -1,75 +1,75 @@ #[doc = "Register `HCTSIZ_SCATGATHER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HCTSIZ_SCATGATHER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SCHED_INFO` reader - Schedule information"] -pub type SCHED_INFO_R = crate::FieldReader; +pub type SchedInfoR = crate::FieldReader; #[doc = "Field `SCHED_INFO` writer - Schedule information"] -pub type SCHED_INFO_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SchedInfoW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `NTD` reader - Number of Transfer Descriptors: 0=1 descriptor, 63=64 descriptors, 1=2 descriptors, 3=4 descriptors, 7=8 descriptors, 15=16 descriptors, 31=32 descriptors, 63=64 descriptors,"] -pub type NTD_R = crate::FieldReader; +pub type NtdR = crate::FieldReader; #[doc = "Field `NTD` writer - Number of Transfer Descriptors: 0=1 descriptor, 63=64 descriptors, 1=2 descriptors, 3=4 descriptors, 7=8 descriptors, 15=16 descriptors, 31=32 descriptors, 63=64 descriptors,"] -pub type NTD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; -#[doc = "Field `Pid` reader - PID"] -pub type PID_R = crate::FieldReader; +pub type NtdW<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PID_A { +pub enum Pid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DATA2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: DATA1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MDATA (non-control)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PID_A) -> Self { + fn from(variant: Pid) -> Self { variant as _ } } -impl crate::FieldSpec for PID_A { +impl crate::FieldSpec for Pid { type Ux = u8; } -impl PID_R { +#[doc = "Field `Pid` reader - PID"] +pub type PidR = crate::FieldReader; +impl PidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PID_A { + pub const fn variant(&self) -> Pid { match self.bits { - 0 => PID_A::VALUE1, - 1 => PID_A::VALUE2, - 2 => PID_A::VALUE3, - 3 => PID_A::VALUE4, + 0 => Pid::Value1, + 1 => Pid::Value2, + 2 => Pid::Value3, + 3 => Pid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PID_A::VALUE1 + *self == Pid::Value1 } #[doc = "DATA2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PID_A::VALUE2 + *self == Pid::Value2 } #[doc = "DATA1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PID_A::VALUE3 + *self == Pid::Value3 } #[doc = "MDATA (non-control)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PID_A::VALUE4 + *self == Pid::Value4 } } #[doc = "Field `Pid` writer - PID"] -pub type PID_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, PID_A>; -impl<'a, REG> PID_W<'a, REG> +pub type PidW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Pid>; +impl<'a, REG> PidW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,84 +77,75 @@ where #[doc = "DATA0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE1) + self.variant(Pid::Value1) } #[doc = "DATA2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE2) + self.variant(Pid::Value2) } #[doc = "DATA1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE3) + self.variant(Pid::Value3) } #[doc = "MDATA (non-control)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PID_A::VALUE4) + self.variant(Pid::Value4) } } impl R { #[doc = "Bits 0:7 - Schedule information"] #[inline(always)] - pub fn sched_info(&self) -> SCHED_INFO_R { - SCHED_INFO_R::new((self.bits & 0xff) as u8) + pub fn sched_info(&self) -> SchedInfoR { + SchedInfoR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Number of Transfer Descriptors: 0=1 descriptor, 63=64 descriptors, 1=2 descriptors, 3=4 descriptors, 7=8 descriptors, 15=16 descriptors, 31=32 descriptors, 63=64 descriptors,"] #[inline(always)] - pub fn ntd(&self) -> NTD_R { - NTD_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn ntd(&self) -> NtdR { + NtdR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 29:30 - PID"] #[inline(always)] - pub fn pid(&self) -> PID_R { - PID_R::new(((self.bits >> 29) & 3) as u8) + pub fn pid(&self) -> PidR { + PidR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:7 - Schedule information"] #[inline(always)] #[must_use] - pub fn sched_info(&mut self) -> SCHED_INFO_W { - SCHED_INFO_W::new(self, 0) + pub fn sched_info(&mut self) -> SchedInfoW { + SchedInfoW::new(self, 0) } #[doc = "Bits 8:15 - Number of Transfer Descriptors: 0=1 descriptor, 63=64 descriptors, 1=2 descriptors, 3=4 descriptors, 7=8 descriptors, 15=16 descriptors, 31=32 descriptors, 63=64 descriptors,"] #[inline(always)] #[must_use] - pub fn ntd(&mut self) -> NTD_W { - NTD_W::new(self, 8) + pub fn ntd(&mut self) -> NtdW { + NtdW::new(self, 8) } #[doc = "Bits 29:30 - PID"] #[inline(always)] #[must_use] - pub fn pid(&mut self) -> PID_W { - PID_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pid(&mut self) -> PidW { + PidW::new(self, 29) } } #[doc = "Host Channel Transfer Size Register \\[SCATGATHER\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hctsiz_scatgather::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hctsiz_scatgather::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HCTSIZ_SCATGATHER_SPEC; -impl crate::RegisterSpec for HCTSIZ_SCATGATHER_SPEC { +pub struct HctsizScatgatherSpec; +impl crate::RegisterSpec for HctsizScatgatherSpec { type Ux = u32; } #[doc = "`read()` method returns [`hctsiz_scatgather::R`](R) reader structure"] -impl crate::Readable for HCTSIZ_SCATGATHER_SPEC {} +impl crate::Readable for HctsizScatgatherSpec {} #[doc = "`write(|w| ..)` method takes [`hctsiz_scatgather::W`](W) writer structure"] -impl crate::Writable for HCTSIZ_SCATGATHER_SPEC { +impl crate::Writable for HctsizScatgatherSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HCTSIZ_SCATGATHER to value 0"] -impl crate::Resettable for HCTSIZ_SCATGATHER_SPEC { +impl crate::Resettable for HctsizScatgatherSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0.rs b/src/usb0_ep0.rs index 2a7a4740..d53fe5f4 100644 --- a/src/usb0_ep0.rs +++ b/src/usb0_ep0.rs @@ -1,133 +1,144 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - diepctl0: DIEPCTL0, + diepctl0: Diepctl0, _reserved1: [u8; 0x04], - diepint0: DIEPINT0, + diepint0: Diepint0, _reserved2: [u8; 0x04], - dieptsiz0: DIEPTSIZ0, - diepdma0: DIEPDMA0, - dtxfsts0: DTXFSTS0, - diepdmab0: DIEPDMAB0, + dieptsiz0: Dieptsiz0, + diepdma0: Diepdma0, + dtxfsts0: Dtxfsts0, + diepdmab0: Diepdmab0, _reserved6: [u8; 0x01e0], - doepctl0: DOEPCTL0, + doepctl0: Doepctl0, _reserved7: [u8; 0x04], - doepint0: DOEPINT0, + doepint0: Doepint0, _reserved8: [u8; 0x04], - doeptsiz0: DOEPTSIZ0, - doepdma0: DOEPDMA0, + doeptsiz0: Doeptsiz0, + doepdma0: Doepdma0, _reserved10: [u8; 0x04], - doepdmab0: DOEPDMAB0, + doepdmab0: Doepdmab0, } impl RegisterBlock { #[doc = "0x00 - Device Control IN Endpoint Control Register"] #[inline(always)] - pub const fn diepctl0(&self) -> &DIEPCTL0 { + pub const fn diepctl0(&self) -> &Diepctl0 { &self.diepctl0 } #[doc = "0x08 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn diepint0(&self) -> &DIEPINT0 { + pub const fn diepint0(&self) -> &Diepint0 { &self.diepint0 } #[doc = "0x10 - Device IN Endpoint Transfer Size Register"] #[inline(always)] - pub const fn dieptsiz0(&self) -> &DIEPTSIZ0 { + pub const fn dieptsiz0(&self) -> &Dieptsiz0 { &self.dieptsiz0 } #[doc = "0x14 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn diepdma0(&self) -> &DIEPDMA0 { + pub const fn diepdma0(&self) -> &Diepdma0 { &self.diepdma0 } #[doc = "0x18 - Device IN Endpoint Transmit FIFO Status Register"] #[inline(always)] - pub const fn dtxfsts0(&self) -> &DTXFSTS0 { + pub const fn dtxfsts0(&self) -> &Dtxfsts0 { &self.dtxfsts0 } #[doc = "0x1c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn diepdmab0(&self) -> &DIEPDMAB0 { + pub const fn diepdmab0(&self) -> &Diepdmab0 { &self.diepdmab0 } #[doc = "0x200 - Device Control OUT Endpoint Control Register"] #[inline(always)] - pub const fn doepctl0(&self) -> &DOEPCTL0 { + pub const fn doepctl0(&self) -> &Doepctl0 { &self.doepctl0 } #[doc = "0x208 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn doepint0(&self) -> &DOEPINT0 { + pub const fn doepint0(&self) -> &Doepint0 { &self.doepint0 } #[doc = "0x210 - Device OUT Endpoint Transfer Size Register"] #[inline(always)] - pub const fn doeptsiz0(&self) -> &DOEPTSIZ0 { + pub const fn doeptsiz0(&self) -> &Doeptsiz0 { &self.doeptsiz0 } #[doc = "0x214 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn doepdma0(&self) -> &DOEPDMA0 { + pub const fn doepdma0(&self) -> &Doepdma0 { &self.doepdma0 } #[doc = "0x21c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn doepdmab0(&self) -> &DOEPDMAB0 { + pub const fn doepdmab0(&self) -> &Doepdmab0 { &self.doepdmab0 } } #[doc = "DIEPCTL0 (rw) register accessor: Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] -pub type DIEPCTL0 = crate::Reg; +#[doc(alias = "DIEPCTL0")] +pub type Diepctl0 = crate::Reg; #[doc = "Device Control IN Endpoint Control Register"] pub mod diepctl0; #[doc = "DIEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint0`] module"] -pub type DIEPINT0 = crate::Reg; +#[doc(alias = "DIEPINT0")] +pub type Diepint0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint0; #[doc = "DIEPTSIZ0 (rw) register accessor: Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz0`] module"] -pub type DIEPTSIZ0 = crate::Reg; +#[doc(alias = "DIEPTSIZ0")] +pub type Dieptsiz0 = crate::Reg; #[doc = "Device IN Endpoint Transfer Size Register"] pub mod dieptsiz0; #[doc = "DIEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma0`] module"] -pub type DIEPDMA0 = crate::Reg; +#[doc(alias = "DIEPDMA0")] +pub type Diepdma0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma0; #[doc = "DTXFSTS0 (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts0`] module"] -pub type DTXFSTS0 = crate::Reg; +#[doc(alias = "DTXFSTS0")] +pub type Dtxfsts0 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts0; #[doc = "DIEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab0`] module"] -pub type DIEPDMAB0 = crate::Reg; +#[doc(alias = "DIEPDMAB0")] +pub type Diepdmab0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab0; #[doc = "DOEPCTL0 (rw) register accessor: Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl0`] module"] -pub type DOEPCTL0 = crate::Reg; +#[doc(alias = "DOEPCTL0")] +pub type Doepctl0 = crate::Reg; #[doc = "Device Control OUT Endpoint Control Register"] pub mod doepctl0; #[doc = "DOEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint0`] module"] -pub type DOEPINT0 = crate::Reg; +#[doc(alias = "DOEPINT0")] +pub type Doepint0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint0; #[doc = "DOEPTSIZ0 (rw) register accessor: Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz0`] module"] -pub type DOEPTSIZ0 = crate::Reg; +#[doc(alias = "DOEPTSIZ0")] +pub type Doeptsiz0 = crate::Reg; #[doc = "Device OUT Endpoint Transfer Size Register"] pub mod doeptsiz0; #[doc = "DOEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma0`] module"] -pub type DOEPDMA0 = crate::Reg; +#[doc(alias = "DOEPDMA0")] +pub type Doepdma0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma0; #[doc = "DOEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab0`] module"] -pub type DOEPDMAB0 = crate::Reg; +#[doc(alias = "DOEPDMAB0")] +pub type Doepdmab0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod doepdmab0; diff --git a/src/usb0_ep0/diepctl0.rs b/src/usb0_ep0/diepctl0.rs index 9c25b1a4..99f0b9c2 100644 --- a/src/usb0_ep0/diepctl0.rs +++ b/src/usb0_ep0/diepctl0.rs @@ -1,67 +1,67 @@ #[doc = "Register `DIEPCTL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL0` writer"] -pub type W = crate::W; -#[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Maximum Packet Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MPS_A { +pub enum Mps { #[doc = "0: 64 bytes"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 32 bytes"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 16 bytes"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 bytes"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MPS_A) -> Self { + fn from(variant: Mps) -> Self { variant as _ } } -impl crate::FieldSpec for MPS_A { +impl crate::FieldSpec for Mps { type Ux = u8; } -impl MPS_R { +#[doc = "Field `MPS` reader - Maximum Packet Size"] +pub type MpsR = crate::FieldReader; +impl MpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MPS_A { + pub const fn variant(&self) -> Mps { match self.bits { - 0 => MPS_A::VALUE1, - 1 => MPS_A::VALUE2, - 2 => MPS_A::VALUE3, - 3 => MPS_A::VALUE4, + 0 => Mps::Value1, + 1 => Mps::Value2, + 2 => Mps::Value3, + 3 => Mps::Value4, _ => unreachable!(), } } #[doc = "64 bytes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MPS_A::VALUE1 + *self == Mps::Value1 } #[doc = "32 bytes"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MPS_A::VALUE2 + *self == Mps::Value2 } #[doc = "16 bytes"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MPS_A::VALUE3 + *self == Mps::Value3 } #[doc = "8 bytes"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MPS_A::VALUE4 + *self == Mps::Value4 } } #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MPS_A>; -impl<'a, REG> MPS_W<'a, REG> +pub type MpsW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Mps>; +impl<'a, REG> MpsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,193 +69,184 @@ where #[doc = "64 bytes"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MPS_A::VALUE1) + self.variant(Mps::Value1) } #[doc = "32 bytes"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MPS_A::VALUE2) + self.variant(Mps::Value2) } #[doc = "16 bytes"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MPS_A::VALUE3) + self.variant(Mps::Value3) } #[doc = "8 bytes"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MPS_A::VALUE4) + self.variant(Mps::Value4) } } #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; +pub type EptypeR = crate::FieldReader; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFnumR = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 3) as u8) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 3) as u8) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 22) + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self, 30) + pub fn epdis(&mut self) -> EpdisW { + EpdisW::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPCTL0_SPEC; -impl crate::RegisterSpec for DIEPCTL0_SPEC { +pub struct Diepctl0Spec; +impl crate::RegisterSpec for Diepctl0Spec { type Ux = u32; } #[doc = "`read()` method returns [`diepctl0::R`](R) reader structure"] -impl crate::Readable for DIEPCTL0_SPEC {} +impl crate::Readable for Diepctl0Spec {} #[doc = "`write(|w| ..)` method takes [`diepctl0::W`](W) writer structure"] -impl crate::Writable for DIEPCTL0_SPEC { +impl crate::Writable for Diepctl0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL0 to value 0x8000"] -impl crate::Resettable for DIEPCTL0_SPEC { +impl crate::Resettable for Diepctl0Spec { const RESET_VALUE: u32 = 0x8000; } diff --git a/src/usb0_ep0/diepdma0.rs b/src/usb0_ep0/diepdma0.rs index 81799622..6ef5824c 100644 --- a/src/usb0_ep0/diepdma0.rs +++ b/src/usb0_ep0/diepdma0.rs @@ -1,49 +1,40 @@ #[doc = "Register `DIEPDMA0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPDMA0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new(self.bits) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPDMA0_SPEC; -impl crate::RegisterSpec for DIEPDMA0_SPEC { +pub struct Diepdma0Spec; +impl crate::RegisterSpec for Diepdma0Spec { type Ux = u32; } #[doc = "`read()` method returns [`diepdma0::R`](R) reader structure"] -impl crate::Readable for DIEPDMA0_SPEC {} +impl crate::Readable for Diepdma0Spec {} #[doc = "`write(|w| ..)` method takes [`diepdma0::W`](W) writer structure"] -impl crate::Writable for DIEPDMA0_SPEC { +impl crate::Writable for Diepdma0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPDMA0 to value 0"] -impl crate::Resettable for DIEPDMA0_SPEC { +impl crate::Resettable for Diepdma0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/diepdmab0.rs b/src/usb0_ep0/diepdmab0.rs index c5414cf9..3766f468 100644 --- a/src/usb0_ep0/diepdmab0.rs +++ b/src/usb0_ep0/diepdmab0.rs @@ -1,22 +1,22 @@ #[doc = "Register `DIEPDMAB0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DMABUFFER_ADDR_R = crate::FieldReader; +pub type DmabufferAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { - DMABUFFER_ADDR_R::new(self.bits) + pub fn dmabuffer_addr(&self) -> DmabufferAddrR { + DmabufferAddrR::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPDMAB0_SPEC; -impl crate::RegisterSpec for DIEPDMAB0_SPEC { +pub struct Diepdmab0Spec; +impl crate::RegisterSpec for Diepdmab0Spec { type Ux = u32; } #[doc = "`read()` method returns [`diepdmab0::R`](R) reader structure"] -impl crate::Readable for DIEPDMAB0_SPEC {} +impl crate::Readable for Diepdmab0Spec {} #[doc = "`reset()` method sets DIEPDMAB0 to value 0"] -impl crate::Resettable for DIEPDMAB0_SPEC { +impl crate::Resettable for Diepdmab0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/diepint0.rs b/src/usb0_ep0/diepint0.rs index fb9351a2..859a2cb0 100644 --- a/src/usb0_ep0/diepint0.rs +++ b/src/usb0_ep0/diepint0.rs @@ -1,146 +1,137 @@ #[doc = "Register `DIEPINT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPINT0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XFER_COMPL_R = crate::BitReader; +pub type XferComplR = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EPDISBLD_R = crate::BitReader; +pub type EpdisbldR = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AHBERR_R = crate::BitReader; +pub type AhberrR = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUT` reader - Timeout Condition"] -pub type TIME_OUT_R = crate::BitReader; +pub type TimeOutR = crate::BitReader; #[doc = "Field `TimeOUT` writer - Timeout Condition"] -pub type TIME_OUT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TimeOutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmp` reader - IN Token Received When TxFIFO is Empty"] -pub type INTKN_TXFEMP_R = crate::BitReader; +pub type IntknTxfempR = crate::BitReader; #[doc = "Field `INTknTXFEmp` writer - IN Token Received When TxFIFO is Empty"] -pub type INTKN_TXFEMP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntknTxfempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEff` reader - IN Endpoint NAK Effective"] -pub type INEPNAK_EFF_R = crate::BitReader; +pub type InepnakEffR = crate::BitReader; #[doc = "Field `INEPNakEff` writer - IN Endpoint NAK Effective"] -pub type INEPNAK_EFF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type InepnakEffW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFEmp` reader - Transmit FIFO Empty"] -pub type TX_FEMP_R = crate::BitReader; +pub type TxFempR = crate::BitReader; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_R = crate::BitReader; +pub type BnaintrR = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XFER_COMPL_R { - XFER_COMPL_R::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XferComplR { + XferComplR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EPDISBLD_R { - EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EpdisbldR { + EpdisbldR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AHBERR_R { - AHBERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AhberrR { + AhberrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - pub fn time_out(&self) -> TIME_OUT_R { - TIME_OUT_R::new(((self.bits >> 3) & 1) != 0) + pub fn time_out(&self) -> TimeOutR { + TimeOutR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - pub fn intkn_txfemp(&self) -> INTKN_TXFEMP_R { - INTKN_TXFEMP_R::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp(&self) -> IntknTxfempR { + IntknTxfempR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - pub fn inepnak_eff(&self) -> INEPNAK_EFF_R { - INEPNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff(&self) -> InepnakEffR { + InepnakEffR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Empty"] #[inline(always)] - pub fn tx_femp(&self) -> TX_FEMP_R { - TX_FEMP_R::new(((self.bits >> 7) & 1) != 0) + pub fn tx_femp(&self) -> TxFempR { + TxFempR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BNAINTR_R { - BNAINTR_R::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BnaintrR { + BnaintrR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XFER_COMPL_W { - XFER_COMPL_W::new(self, 0) + pub fn xfer_compl(&mut self) -> XferComplW { + XferComplW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EPDISBLD_W { - EPDISBLD_W::new(self, 1) + pub fn epdisbld(&mut self) -> EpdisbldW { + EpdisbldW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self, 2) + pub fn ahberr(&mut self) -> AhberrW { + AhberrW::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] #[must_use] - pub fn time_out(&mut self) -> TIME_OUT_W { - TIME_OUT_W::new(self, 3) + pub fn time_out(&mut self) -> TimeOutW { + TimeOutW::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] #[must_use] - pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { - INTKN_TXFEMP_W::new(self, 4) + pub fn intkn_txfemp(&mut self) -> IntknTxfempW { + IntknTxfempW::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] #[must_use] - pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { - INEPNAK_EFF_W::new(self, 6) + pub fn inepnak_eff(&mut self) -> InepnakEffW { + InepnakEffW::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BNAINTR_W { - BNAINTR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bnaintr(&mut self) -> BnaintrW { + BnaintrW::new(self, 9) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPINT0_SPEC; -impl crate::RegisterSpec for DIEPINT0_SPEC { +pub struct Diepint0Spec; +impl crate::RegisterSpec for Diepint0Spec { type Ux = u32; } #[doc = "`read()` method returns [`diepint0::R`](R) reader structure"] -impl crate::Readable for DIEPINT0_SPEC {} +impl crate::Readable for Diepint0Spec {} #[doc = "`write(|w| ..)` method takes [`diepint0::W`](W) writer structure"] -impl crate::Writable for DIEPINT0_SPEC { +impl crate::Writable for Diepint0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPINT0 to value 0x80"] -impl crate::Resettable for DIEPINT0_SPEC { +impl crate::Resettable for Diepint0Spec { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep0/dieptsiz0.rs b/src/usb0_ep0/dieptsiz0.rs index cfc8dc49..0c40c6d1 100644 --- a/src/usb0_ep0/dieptsiz0.rs +++ b/src/usb0_ep0/dieptsiz0.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTSIZ0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTSIZ0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new((self.bits & 0x7f) as u8) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 3) as u8) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } } #[doc = "Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTSIZ0_SPEC; -impl crate::RegisterSpec for DIEPTSIZ0_SPEC { +pub struct Dieptsiz0Spec; +impl crate::RegisterSpec for Dieptsiz0Spec { type Ux = u32; } #[doc = "`read()` method returns [`dieptsiz0::R`](R) reader structure"] -impl crate::Readable for DIEPTSIZ0_SPEC {} +impl crate::Readable for Dieptsiz0Spec {} #[doc = "`write(|w| ..)` method takes [`dieptsiz0::W`](W) writer structure"] -impl crate::Writable for DIEPTSIZ0_SPEC { +impl crate::Writable for Dieptsiz0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTSIZ0 to value 0"] -impl crate::Resettable for DIEPTSIZ0_SPEC { +impl crate::Resettable for Dieptsiz0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepctl0.rs b/src/usb0_ep0/doepctl0.rs index abcc9e68..1c0e8311 100644 --- a/src/usb0_ep0/doepctl0.rs +++ b/src/usb0_ep0/doepctl0.rs @@ -1,219 +1,210 @@ #[doc = "Register `DOEPCTL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL0` writer"] -pub type W = crate::W; -#[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Maximum Packet Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MPS_A { +pub enum Mps { #[doc = "0: 64 bytes"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 32 bytes"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 16 bytes"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 8 bytes"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MPS_A) -> Self { + fn from(variant: Mps) -> Self { variant as _ } } -impl crate::FieldSpec for MPS_A { +impl crate::FieldSpec for Mps { type Ux = u8; } -impl MPS_R { +#[doc = "Field `MPS` reader - Maximum Packet Size"] +pub type MpsR = crate::FieldReader; +impl MpsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MPS_A { + pub const fn variant(&self) -> Mps { match self.bits { - 0 => MPS_A::VALUE1, - 1 => MPS_A::VALUE2, - 2 => MPS_A::VALUE3, - 3 => MPS_A::VALUE4, + 0 => Mps::Value1, + 1 => Mps::Value2, + 2 => Mps::Value3, + 3 => Mps::Value4, _ => unreachable!(), } } #[doc = "64 bytes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MPS_A::VALUE1 + *self == Mps::Value1 } #[doc = "32 bytes"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MPS_A::VALUE2 + *self == Mps::Value2 } #[doc = "16 bytes"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MPS_A::VALUE3 + *self == Mps::Value3 } #[doc = "8 bytes"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MPS_A::VALUE4 + *self == Mps::Value4 } } #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; +pub type EptypeR = crate::FieldReader; #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SNP_R = crate::BitReader; +pub type SnpR = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 3) as u8) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 3) as u8) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SNP_R { - SNP_R::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SnpR { + SnpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SNP_W { - SNP_W::new(self, 20) + pub fn snp(&mut self) -> SnpW { + SnpW::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPCTL0_SPEC; -impl crate::RegisterSpec for DOEPCTL0_SPEC { +pub struct Doepctl0Spec; +impl crate::RegisterSpec for Doepctl0Spec { type Ux = u32; } #[doc = "`read()` method returns [`doepctl0::R`](R) reader structure"] -impl crate::Readable for DOEPCTL0_SPEC {} +impl crate::Readable for Doepctl0Spec {} #[doc = "`write(|w| ..)` method takes [`doepctl0::W`](W) writer structure"] -impl crate::Writable for DOEPCTL0_SPEC { +impl crate::Writable for Doepctl0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL0 to value 0x8000"] -impl crate::Resettable for DOEPCTL0_SPEC { +impl crate::Resettable for Doepctl0Spec { const RESET_VALUE: u32 = 0x8000; } diff --git a/src/usb0_ep0/doepdma0.rs b/src/usb0_ep0/doepdma0.rs index 3fa7995a..85908df8 100644 --- a/src/usb0_ep0/doepdma0.rs +++ b/src/usb0_ep0/doepdma0.rs @@ -1,49 +1,40 @@ #[doc = "Register `DOEPDMA0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPDMA0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new(self.bits) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPDMA0_SPEC; -impl crate::RegisterSpec for DOEPDMA0_SPEC { +pub struct Doepdma0Spec; +impl crate::RegisterSpec for Doepdma0Spec { type Ux = u32; } #[doc = "`read()` method returns [`doepdma0::R`](R) reader structure"] -impl crate::Readable for DOEPDMA0_SPEC {} +impl crate::Readable for Doepdma0Spec {} #[doc = "`write(|w| ..)` method takes [`doepdma0::W`](W) writer structure"] -impl crate::Writable for DOEPDMA0_SPEC { +impl crate::Writable for Doepdma0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPDMA0 to value 0"] -impl crate::Resettable for DOEPDMA0_SPEC { +impl crate::Resettable for Doepdma0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepdmab0.rs b/src/usb0_ep0/doepdmab0.rs index ce04ff38..9629e6ed 100644 --- a/src/usb0_ep0/doepdmab0.rs +++ b/src/usb0_ep0/doepdmab0.rs @@ -1,22 +1,22 @@ #[doc = "Register `DOEPDMAB0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DMABUFFER_ADDR_R = crate::FieldReader; +pub type DmabufferAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { - DMABUFFER_ADDR_R::new(self.bits) + pub fn dmabuffer_addr(&self) -> DmabufferAddrR { + DmabufferAddrR::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPDMAB0_SPEC; -impl crate::RegisterSpec for DOEPDMAB0_SPEC { +pub struct Doepdmab0Spec; +impl crate::RegisterSpec for Doepdmab0Spec { type Ux = u32; } #[doc = "`read()` method returns [`doepdmab0::R`](R) reader structure"] -impl crate::Readable for DOEPDMAB0_SPEC {} +impl crate::Readable for Doepdmab0Spec {} #[doc = "`reset()` method sets DOEPDMAB0 to value 0"] -impl crate::Resettable for DOEPDMAB0_SPEC { +impl crate::Resettable for Doepdmab0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepint0.rs b/src/usb0_ep0/doepint0.rs index c850db48..e57bfdab 100644 --- a/src/usb0_ep0/doepint0.rs +++ b/src/usb0_ep0/doepint0.rs @@ -1,214 +1,205 @@ #[doc = "Register `DOEPINT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPINT0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XFER_COMPL_R = crate::BitReader; +pub type XferComplR = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EPDISBLD_R = crate::BitReader; +pub type EpdisbldR = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AHBERR_R = crate::BitReader; +pub type AhberrR = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUp` reader - SETUP Phase Done"] -pub type SET_UP_R = crate::BitReader; +pub type SetUpR = crate::BitReader; #[doc = "Field `SetUp` writer - SETUP Phase Done"] -pub type SET_UP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetUpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdis` reader - OUT Token Received When Endpoint Disabled"] -pub type OUTTKN_EPDIS_R = crate::BitReader; +pub type OuttknEpdisR = crate::BitReader; #[doc = "Field `OUTTknEPdis` writer - OUT Token Received When Endpoint Disabled"] -pub type OUTTKN_EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OuttknEpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `StsPhseRcvd` reader - Status Phase Received For Control Write"] -pub type STS_PHSE_RCVD_R = crate::BitReader; +pub type StsPhseRcvdR = crate::BitReader; #[doc = "Field `StsPhseRcvd` writer - Status Phase Received For Control Write"] -pub type STS_PHSE_RCVD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StsPhseRcvdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received"] -pub type BACK2BACK_SETUP_R = crate::BitReader; +pub type Back2backSetupR = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received"] -pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_R = crate::BitReader; +pub type BnaintrR = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PktDrpSts` reader - Packet Dropped Status"] -pub type PKT_DRP_STS_R = crate::BitReader; +pub type PktDrpStsR = crate::BitReader; #[doc = "Field `PktDrpSts` writer - Packet Dropped Status"] -pub type PKT_DRP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PktDrpStsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrIntrpt` reader - BbleErr (Babble Error) interrupt"] -pub type BBLE_ERR_INTRPT_R = crate::BitReader; +pub type BbleErrIntrptR = crate::BitReader; #[doc = "Field `BbleErrIntrpt` writer - BbleErr (Babble Error) interrupt"] -pub type BBLE_ERR_INTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BbleErrIntrptW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKIntrpt` reader - NAK interrupt"] -pub type NAKINTRPT_R = crate::BitReader; +pub type NakintrptR = crate::BitReader; #[doc = "Field `NAKIntrpt` writer - NAK interrupt"] -pub type NAKINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakintrptW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETIntrpt` reader - NYET interrupt"] -pub type NYETINTRPT_R = crate::BitReader; +pub type NyetintrptR = crate::BitReader; #[doc = "Field `NYETIntrpt` writer - NYET interrupt"] -pub type NYETINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NyetintrptW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XFER_COMPL_R { - XFER_COMPL_R::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XferComplR { + XferComplR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EPDISBLD_R { - EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EpdisbldR { + EpdisbldR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AHBERR_R { - AHBERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AhberrR { + AhberrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - pub fn set_up(&self) -> SET_UP_R { - SET_UP_R::new(((self.bits >> 3) & 1) != 0) + pub fn set_up(&self) -> SetUpR { + SetUpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - pub fn outtkn_epdis(&self) -> OUTTKN_EPDIS_R { - OUTTKN_EPDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis(&self) -> OuttknEpdisR { + OuttknEpdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - pub fn sts_phse_rcvd(&self) -> STS_PHSE_RCVD_R { - STS_PHSE_RCVD_R::new(((self.bits >> 5) & 1) != 0) + pub fn sts_phse_rcvd(&self) -> StsPhseRcvdR { + StsPhseRcvdR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { - BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> Back2backSetupR { + Back2backSetupR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BNAINTR_R { - BNAINTR_R::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BnaintrR { + BnaintrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - pub fn pkt_drp_sts(&self) -> PKT_DRP_STS_R { - PKT_DRP_STS_R::new(((self.bits >> 11) & 1) != 0) + pub fn pkt_drp_sts(&self) -> PktDrpStsR { + PktDrpStsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - pub fn bble_err_intrpt(&self) -> BBLE_ERR_INTRPT_R { - BBLE_ERR_INTRPT_R::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_intrpt(&self) -> BbleErrIntrptR { + BbleErrIntrptR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - pub fn nakintrpt(&self) -> NAKINTRPT_R { - NAKINTRPT_R::new(((self.bits >> 13) & 1) != 0) + pub fn nakintrpt(&self) -> NakintrptR { + NakintrptR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - pub fn nyetintrpt(&self) -> NYETINTRPT_R { - NYETINTRPT_R::new(((self.bits >> 14) & 1) != 0) + pub fn nyetintrpt(&self) -> NyetintrptR { + NyetintrptR::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XFER_COMPL_W { - XFER_COMPL_W::new(self, 0) + pub fn xfer_compl(&mut self) -> XferComplW { + XferComplW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EPDISBLD_W { - EPDISBLD_W::new(self, 1) + pub fn epdisbld(&mut self) -> EpdisbldW { + EpdisbldW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self, 2) + pub fn ahberr(&mut self) -> AhberrW { + AhberrW::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] #[must_use] - pub fn set_up(&mut self) -> SET_UP_W { - SET_UP_W::new(self, 3) + pub fn set_up(&mut self) -> SetUpW { + SetUpW::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] #[must_use] - pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { - OUTTKN_EPDIS_W::new(self, 4) + pub fn outtkn_epdis(&mut self) -> OuttknEpdisW { + OuttknEpdisW::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] #[must_use] - pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { - STS_PHSE_RCVD_W::new(self, 5) + pub fn sts_phse_rcvd(&mut self) -> StsPhseRcvdW { + StsPhseRcvdW::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { - BACK2BACK_SETUP_W::new(self, 6) + pub fn back2back_setup(&mut self) -> Back2backSetupW { + Back2backSetupW::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BNAINTR_W { - BNAINTR_W::new(self, 9) + pub fn bnaintr(&mut self) -> BnaintrW { + BnaintrW::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] #[must_use] - pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { - PKT_DRP_STS_W::new(self, 11) + pub fn pkt_drp_sts(&mut self) -> PktDrpStsW { + PktDrpStsW::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] #[must_use] - pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { - BBLE_ERR_INTRPT_W::new(self, 12) + pub fn bble_err_intrpt(&mut self) -> BbleErrIntrptW { + BbleErrIntrptW::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nakintrpt(&mut self) -> NAKINTRPT_W { - NAKINTRPT_W::new(self, 13) + pub fn nakintrpt(&mut self) -> NakintrptW { + NakintrptW::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { - NYETINTRPT_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nyetintrpt(&mut self) -> NyetintrptW { + NyetintrptW::new(self, 14) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPINT0_SPEC; -impl crate::RegisterSpec for DOEPINT0_SPEC { +pub struct Doepint0Spec; +impl crate::RegisterSpec for Doepint0Spec { type Ux = u32; } #[doc = "`read()` method returns [`doepint0::R`](R) reader structure"] -impl crate::Readable for DOEPINT0_SPEC {} +impl crate::Readable for Doepint0Spec {} #[doc = "`write(|w| ..)` method takes [`doepint0::W`](W) writer structure"] -impl crate::Writable for DOEPINT0_SPEC { +impl crate::Writable for Doepint0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPINT0 to value 0x80"] -impl crate::Resettable for DOEPINT0_SPEC { +impl crate::Resettable for Doepint0Spec { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep0/doeptsiz0.rs b/src/usb0_ep0/doeptsiz0.rs index 7845bc19..ab81a167 100644 --- a/src/usb0_ep0/doeptsiz0.rs +++ b/src/usb0_ep0/doeptsiz0.rs @@ -1,67 +1,67 @@ #[doc = "Register `DOEPTSIZ0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `SUPCnt` reader - SETUP Packet Count"] -pub type SUPCNT_R = crate::FieldReader; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "SETUP Packet Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUPCNT_A { +pub enum Supcnt { #[doc = "1: 1 packet"] - VALUE1 = 1, + Value1 = 1, #[doc = "2: 2 packets"] - VALUE2 = 2, + Value2 = 2, #[doc = "3: 3 packets"] - VALUE3 = 3, + Value3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUPCNT_A) -> Self { + fn from(variant: Supcnt) -> Self { variant as _ } } -impl crate::FieldSpec for SUPCNT_A { +impl crate::FieldSpec for Supcnt { type Ux = u8; } -impl SUPCNT_R { +#[doc = "Field `SUPCnt` reader - SETUP Packet Count"] +pub type SupcntR = crate::FieldReader; +impl SupcntR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(SUPCNT_A::VALUE1), - 2 => Some(SUPCNT_A::VALUE2), - 3 => Some(SUPCNT_A::VALUE3), + 1 => Some(Supcnt::Value1), + 2 => Some(Supcnt::Value2), + 3 => Some(Supcnt::Value3), _ => None, } } #[doc = "1 packet"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUPCNT_A::VALUE1 + *self == Supcnt::Value1 } #[doc = "2 packets"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUPCNT_A::VALUE2 + *self == Supcnt::Value2 } #[doc = "3 packets"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUPCNT_A::VALUE3 + *self == Supcnt::Value3 } } #[doc = "Field `SUPCnt` writer - SETUP Packet Count"] -pub type SUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SUPCNT_A>; -impl<'a, REG> SUPCNT_W<'a, REG> +pub type SupcntW<'a, REG> = crate::FieldWriter<'a, REG, 2, Supcnt>; +impl<'a, REG> SupcntW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,79 +69,70 @@ where #[doc = "1 packet"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUPCNT_A::VALUE1) + self.variant(Supcnt::Value1) } #[doc = "2 packets"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUPCNT_A::VALUE2) + self.variant(Supcnt::Value2) } #[doc = "3 packets"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SUPCNT_A::VALUE3) + self.variant(Supcnt::Value3) } } impl R { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new((self.bits & 0x7f) as u8) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new((self.bits & 0x7f) as u8) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 3) as u8) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 3) as u8) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] - pub fn supcnt(&self) -> SUPCNT_R { - SUPCNT_R::new(((self.bits >> 29) & 3) as u8) + pub fn supcnt(&self) -> SupcntR { + SupcntR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] #[must_use] - pub fn supcnt(&mut self) -> SUPCNT_W { - SUPCNT_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn supcnt(&mut self) -> SupcntW { + SupcntW::new(self, 29) } } #[doc = "Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPTSIZ0_SPEC; -impl crate::RegisterSpec for DOEPTSIZ0_SPEC { +pub struct Doeptsiz0Spec; +impl crate::RegisterSpec for Doeptsiz0Spec { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz0::R`](R) reader structure"] -impl crate::Readable for DOEPTSIZ0_SPEC {} +impl crate::Readable for Doeptsiz0Spec {} #[doc = "`write(|w| ..)` method takes [`doeptsiz0::W`](W) writer structure"] -impl crate::Writable for DOEPTSIZ0_SPEC { +impl crate::Writable for Doeptsiz0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ0 to value 0"] -impl crate::Resettable for DOEPTSIZ0_SPEC { +impl crate::Resettable for Doeptsiz0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/dtxfsts0.rs b/src/usb0_ep0/dtxfsts0.rs index e080eea8..c8eb50dc 100644 --- a/src/usb0_ep0/dtxfsts0.rs +++ b/src/usb0_ep0/dtxfsts0.rs @@ -1,69 +1,69 @@ #[doc = "Register `DTXFSTS0` reader"] -pub type R = crate::R; -#[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] -pub type INEPTX_FSPC_AVAIL_R = crate::FieldReader; +pub type R = crate::R; #[doc = "IN Endpoint TxFIFO Space Avail\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum INEPTX_FSPC_AVAIL_A { +pub enum IneptxFspcAvail { #[doc = "0: Endpoint TxFIFO is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 word available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 words available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: INEPTX_FSPC_AVAIL_A) -> Self { + fn from(variant: IneptxFspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for INEPTX_FSPC_AVAIL_A { +impl crate::FieldSpec for IneptxFspcAvail { type Ux = u16; } -impl INEPTX_FSPC_AVAIL_R { +#[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] +pub type IneptxFspcAvailR = crate::FieldReader; +impl IneptxFspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(INEPTX_FSPC_AVAIL_A::VALUE1), - 1 => Some(INEPTX_FSPC_AVAIL_A::VALUE2), - 2 => Some(INEPTX_FSPC_AVAIL_A::VALUE3), + 0 => Some(IneptxFspcAvail::Value1), + 1 => Some(IneptxFspcAvail::Value2), + 2 => Some(IneptxFspcAvail::Value3), _ => None, } } #[doc = "Endpoint TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE1 + *self == IneptxFspcAvail::Value1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE2 + *self == IneptxFspcAvail::Value2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE3 + *self == IneptxFspcAvail::Value3 } } impl R { #[doc = "Bits 0:15 - IN Endpoint TxFIFO Space Avail"] #[inline(always)] - pub fn ineptx_fspc_avail(&self) -> INEPTX_FSPC_AVAIL_R { - INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) + pub fn ineptx_fspc_avail(&self) -> IneptxFspcAvailR { + IneptxFspcAvailR::new((self.bits & 0xffff) as u16) } } #[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DTXFSTS0_SPEC; -impl crate::RegisterSpec for DTXFSTS0_SPEC { +pub struct Dtxfsts0Spec; +impl crate::RegisterSpec for Dtxfsts0Spec { type Ux = u32; } #[doc = "`read()` method returns [`dtxfsts0::R`](R) reader structure"] -impl crate::Readable for DTXFSTS0_SPEC {} +impl crate::Readable for Dtxfsts0Spec {} #[doc = "`reset()` method sets DTXFSTS0 to value 0"] -impl crate::Resettable for DTXFSTS0_SPEC { +impl crate::Resettable for Dtxfsts0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1.rs b/src/usb0_ep1.rs index f3501ed2..b6baef37 100644 --- a/src/usb0_ep1.rs +++ b/src/usb0_ep1.rs @@ -1,163 +1,177 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved_0_diepctl: [u8; 0x04], _reserved1: [u8; 0x04], - diepint: DIEPINT, + diepint: Diepint, _reserved2: [u8; 0x04], - dieptsiz: DIEPTSIZ, - diepdma: DIEPDMA, - dtxfsts: DTXFSTS, - diepdmab: DIEPDMAB, + dieptsiz: Dieptsiz, + diepdma: Diepdma, + dtxfsts: Dtxfsts, + diepdmab: Diepdmab, _reserved6: [u8; 0x01e0], _reserved_6_doepctl: [u8; 0x04], _reserved7: [u8; 0x04], - doepint: DOEPINT, + doepint: Doepint, _reserved8: [u8; 0x04], _reserved_8_doeptsiz: [u8; 0x04], - doepdma: DOEPDMA, + doepdma: Doepdma, _reserved10: [u8; 0x04], - doepdmab: DOEPDMAB, + doepdmab: Doepdmab, } impl RegisterBlock { #[doc = "0x00 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] - pub const fn diepctl_intbulk(&self) -> &DIEPCTL_INTBULK { + pub const fn diepctl_intbulk(&self) -> &DiepctlIntbulk { unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x00 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] - pub const fn diepctl_isocont(&self) -> &DIEPCTL_ISOCONT { + pub const fn diepctl_isocont(&self) -> &DiepctlIsocont { unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x08 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn diepint(&self) -> &DIEPINT { + pub const fn diepint(&self) -> &Diepint { &self.diepint } #[doc = "0x10 - Device Endpoint Transfer Size Register"] #[inline(always)] - pub const fn dieptsiz(&self) -> &DIEPTSIZ { + pub const fn dieptsiz(&self) -> &Dieptsiz { &self.dieptsiz } #[doc = "0x14 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn diepdma(&self) -> &DIEPDMA { + pub const fn diepdma(&self) -> &Diepdma { &self.diepdma } #[doc = "0x18 - Device IN Endpoint Transmit FIFO Status Register"] #[inline(always)] - pub const fn dtxfsts(&self) -> &DTXFSTS { + pub const fn dtxfsts(&self) -> &Dtxfsts { &self.dtxfsts } #[doc = "0x1c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn diepdmab(&self) -> &DIEPDMAB { + pub const fn diepdmab(&self) -> &Diepdmab { &self.diepdmab } #[doc = "0x200 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] - pub const fn doepctl_intbulk(&self) -> &DOEPCTL_INTBULK { + pub const fn doepctl_intbulk(&self) -> &DoepctlIntbulk { unsafe { &*(self as *const Self).cast::().add(512).cast() } } #[doc = "0x200 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] - pub const fn doepctl_isocont(&self) -> &DOEPCTL_ISOCONT { + pub const fn doepctl_isocont(&self) -> &DoepctlIsocont { unsafe { &*(self as *const Self).cast::().add(512).cast() } } #[doc = "0x208 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn doepint(&self) -> &DOEPINT { + pub const fn doepint(&self) -> &Doepint { &self.doepint } #[doc = "0x210 - Device Endpoint Transfer Size Register \\[CONT\\]"] #[inline(always)] - pub const fn doeptsiz_control(&self) -> &DOEPTSIZ_CONTROL { + pub const fn doeptsiz_control(&self) -> &DoeptsizControl { unsafe { &*(self as *const Self).cast::().add(528).cast() } } #[doc = "0x210 - Device Endpoint Transfer Size Register \\[ISO\\]"] #[inline(always)] - pub const fn doeptsiz_iso(&self) -> &DOEPTSIZ_ISO { + pub const fn doeptsiz_iso(&self) -> &DoeptsizIso { unsafe { &*(self as *const Self).cast::().add(528).cast() } } #[doc = "0x214 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn doepdma(&self) -> &DOEPDMA { + pub const fn doepdma(&self) -> &Doepdma { &self.doepdma } #[doc = "0x21c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn doepdmab(&self) -> &DOEPDMAB { + pub const fn doepdmab(&self) -> &Doepdmab { &self.doepdmab } } #[doc = "DIEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_isocont`] module"] -pub type DIEPCTL_ISOCONT = crate::Reg; +#[doc(alias = "DIEPCTL_ISOCONT")] +pub type DiepctlIsocont = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod diepctl_isocont; #[doc = "DIEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_intbulk`] module"] -pub type DIEPCTL_INTBULK = crate::Reg; +#[doc(alias = "DIEPCTL_INTBULK")] +pub type DiepctlIntbulk = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod diepctl_intbulk; #[doc = "DIEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint`] module"] -pub type DIEPINT = crate::Reg; +#[doc(alias = "DIEPINT")] +pub type Diepint = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint; #[doc = "DIEPTSIZ (rw) register accessor: Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz`] module"] -pub type DIEPTSIZ = crate::Reg; +#[doc(alias = "DIEPTSIZ")] +pub type Dieptsiz = crate::Reg; #[doc = "Device Endpoint Transfer Size Register"] pub mod dieptsiz; #[doc = "DIEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma`] module"] -pub type DIEPDMA = crate::Reg; +#[doc(alias = "DIEPDMA")] +pub type Diepdma = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma; #[doc = "DTXFSTS (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts`] module"] -pub type DTXFSTS = crate::Reg; +#[doc(alias = "DTXFSTS")] +pub type Dtxfsts = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts; #[doc = "DIEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab`] module"] -pub type DIEPDMAB = crate::Reg; +#[doc(alias = "DIEPDMAB")] +pub type Diepdmab = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab; #[doc = "DOEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_isocont`] module"] -pub type DOEPCTL_ISOCONT = crate::Reg; +#[doc(alias = "DOEPCTL_ISOCONT")] +pub type DoepctlIsocont = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod doepctl_isocont; #[doc = "DOEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_intbulk`] module"] -pub type DOEPCTL_INTBULK = crate::Reg; +#[doc(alias = "DOEPCTL_INTBULK")] +pub type DoepctlIntbulk = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod doepctl_intbulk; #[doc = "DOEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint`] module"] -pub type DOEPINT = crate::Reg; +#[doc(alias = "DOEPINT")] +pub type Doepint = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint; #[doc = "DOEPTSIZ_ISO (rw) register accessor: Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_iso`] module"] -pub type DOEPTSIZ_ISO = crate::Reg; +#[doc(alias = "DOEPTSIZ_ISO")] +pub type DoeptsizIso = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[ISO\\]"] pub mod doeptsiz_iso; #[doc = "DOEPTSIZ_CONTROL (rw) register accessor: Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_control`] module"] -pub type DOEPTSIZ_CONTROL = crate::Reg; +#[doc(alias = "DOEPTSIZ_CONTROL")] +pub type DoeptsizControl = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[CONT\\]"] pub mod doeptsiz_control; #[doc = "DOEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma`] module"] -pub type DOEPDMA = crate::Reg; +#[doc(alias = "DOEPDMA")] +pub type Doepdma = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma; #[doc = "DOEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab`] module"] -pub type DOEPDMAB = crate::Reg; +#[doc(alias = "DOEPDMAB")] +pub type Doepdmab = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod doepdmab; diff --git a/src/usb0_ep1/diepctl_intbulk.rs b/src/usb0_ep1/diepctl_intbulk.rs index 15a8c5c6..9bb78dae 100644 --- a/src/usb0_ep1/diepctl_intbulk.rs +++ b/src/usb0_ep1/diepctl_intbulk.rs @@ -1,147 +1,147 @@ #[doc = "Register `DIEPCTL_INTBULK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL_INTBULK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type MpsR = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `DPID` reader - Endpoint Data PID"] -pub type DPID_R = crate::BitReader; +pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Endpoint Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DATA1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as u8 != 0 } } -impl DPID_R { +#[doc = "Field `DPID` reader - Endpoint Data PID"] +pub type DpidR = crate::BitReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - false => DPID_A::VALUE1, - true => DPID_A::VALUE2, + false => Dpid::Value1, + true => Dpid::Value2, } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } } -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } -#[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EPTYPE_A { +pub enum Eptype { #[doc = "0: Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Isochronous"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bulk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Interrupt"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EPTYPE_A) -> Self { + fn from(variant: Eptype) -> Self { variant as _ } } -impl crate::FieldSpec for EPTYPE_A { +impl crate::FieldSpec for Eptype { type Ux = u8; } -impl EPTYPE_R { +#[doc = "Field `EPType` reader - Endpoint Type"] +pub type EptypeR = crate::FieldReader; +impl EptypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPTYPE_A { + pub const fn variant(&self) -> Eptype { match self.bits { - 0 => EPTYPE_A::VALUE1, - 1 => EPTYPE_A::VALUE2, - 2 => EPTYPE_A::VALUE3, - 3 => EPTYPE_A::VALUE4, + 0 => Eptype::Value1, + 1 => Eptype::Value2, + 2 => Eptype::Value3, + 3 => Eptype::Value4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPTYPE_A::VALUE1 + *self == Eptype::Value1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPTYPE_A::VALUE2 + *self == Eptype::Value2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EPTYPE_A::VALUE3 + *self == Eptype::Value3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EPTYPE_A::VALUE4 + *self == Eptype::Value4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EPTYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EPTYPE_A>; -impl<'a, REG> EPTYPE_W<'a, REG> +pub type EptypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eptype>; +impl<'a, REG> EptypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,201 +149,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE1) + self.variant(Eptype::Value1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE2) + self.variant(Eptype::Value2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE3) + self.variant(Eptype::Value3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE4) + self.variant(Eptype::Value4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SNP_R = crate::BitReader; +pub type SnpR = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFnumR = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD0PID` writer - Set DATA0 PID"] -pub type SET_D0PID_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetD0pidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD1PID` writer - 29 Set DATA1 PID"] -pub type SET_D1PID_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetD1pidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Endpoint Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 16) & 1) != 0) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SNP_R { - SNP_R::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SnpR { + SnpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> USBACT_EP_W { - USBACT_EP_W::new(self, 15) + pub fn usbact_ep(&mut self) -> UsbactEpW { + UsbactEpW::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EPTYPE_W { - EPTYPE_W::new(self, 18) + pub fn eptype(&mut self) -> EptypeW { + EptypeW::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SNP_W { - SNP_W::new(self, 20) + pub fn snp(&mut self) -> SnpW { + SnpW::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 22) + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn set_d0pid(&mut self) -> SET_D0PID_W { - SET_D0PID_W::new(self, 28) + pub fn set_d0pid(&mut self) -> SetD0pidW { + SetD0pidW::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] #[must_use] - pub fn set_d1pid(&mut self) -> SET_D1PID_W { - SET_D1PID_W::new(self, 29) + pub fn set_d1pid(&mut self) -> SetD1pidW { + SetD1pidW::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self, 30) + pub fn epdis(&mut self) -> EpdisW { + EpdisW::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPCTL_INTBULK_SPEC; -impl crate::RegisterSpec for DIEPCTL_INTBULK_SPEC { +pub struct DiepctlIntbulkSpec; +impl crate::RegisterSpec for DiepctlIntbulkSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepctl_intbulk::R`](R) reader structure"] -impl crate::Readable for DIEPCTL_INTBULK_SPEC {} +impl crate::Readable for DiepctlIntbulkSpec {} #[doc = "`write(|w| ..)` method takes [`diepctl_intbulk::W`](W) writer structure"] -impl crate::Writable for DIEPCTL_INTBULK_SPEC { +impl crate::Writable for DiepctlIntbulkSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL_INTBULK to value 0"] -impl crate::Resettable for DIEPCTL_INTBULK_SPEC { +impl crate::Resettable for DiepctlIntbulkSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepctl_isocont.rs b/src/usb0_ep1/diepctl_isocont.rs index 32a1a602..e21cbf04 100644 --- a/src/usb0_ep1/diepctl_isocont.rs +++ b/src/usb0_ep1/diepctl_isocont.rs @@ -1,147 +1,147 @@ #[doc = "Register `DIEPCTL_ISOCONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL_ISOCONT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type MpsR = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] -pub type EO_FR_NUM_R = crate::BitReader; +pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Even/Odd Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EO_FR_NUM_A { +pub enum EoFrNum { #[doc = "0: Even frame"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Odd rame"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EO_FR_NUM_A) -> Self { + fn from(variant: EoFrNum) -> Self { variant as u8 != 0 } } -impl EO_FR_NUM_R { +#[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] +pub type EoFrNumR = crate::BitReader; +impl EoFrNumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EO_FR_NUM_A { + pub const fn variant(&self) -> EoFrNum { match self.bits { - false => EO_FR_NUM_A::VALUE1, - true => EO_FR_NUM_A::VALUE2, + false => EoFrNum::Value1, + true => EoFrNum::Value2, } } #[doc = "Even frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EO_FR_NUM_A::VALUE1 + *self == EoFrNum::Value1 } #[doc = "Odd rame"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EO_FR_NUM_A::VALUE2 + *self == EoFrNum::Value2 } } -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } -#[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EPTYPE_A { +pub enum Eptype { #[doc = "0: Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Isochronous"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bulk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Interrupt"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EPTYPE_A) -> Self { + fn from(variant: Eptype) -> Self { variant as _ } } -impl crate::FieldSpec for EPTYPE_A { +impl crate::FieldSpec for Eptype { type Ux = u8; } -impl EPTYPE_R { +#[doc = "Field `EPType` reader - Endpoint Type"] +pub type EptypeR = crate::FieldReader; +impl EptypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPTYPE_A { + pub const fn variant(&self) -> Eptype { match self.bits { - 0 => EPTYPE_A::VALUE1, - 1 => EPTYPE_A::VALUE2, - 2 => EPTYPE_A::VALUE3, - 3 => EPTYPE_A::VALUE4, + 0 => Eptype::Value1, + 1 => Eptype::Value2, + 2 => Eptype::Value3, + 3 => Eptype::Value4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPTYPE_A::VALUE1 + *self == Eptype::Value1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPTYPE_A::VALUE2 + *self == Eptype::Value2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EPTYPE_A::VALUE3 + *self == Eptype::Value3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EPTYPE_A::VALUE4 + *self == Eptype::Value4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EPTYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EPTYPE_A>; -impl<'a, REG> EPTYPE_W<'a, REG> +pub type EptypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eptype>; +impl<'a, REG> EptypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,201 +149,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE1) + self.variant(Eptype::Value1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE2) + self.variant(Eptype::Value2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE3) + self.variant(Eptype::Value3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE4) + self.variant(Eptype::Value4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SNP_R = crate::BitReader; +pub type SnpR = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFnumR = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetEvenFr` writer - In non-Scatter/Gather DMA mode: Set Even frame"] -pub type SET_EVEN_FR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetEvenFrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetOddFr` writer - Set Odd frame"] -pub type SET_ODD_FR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetOddFrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Even/Odd Frame"] #[inline(always)] - pub fn eo_fr_num(&self) -> EO_FR_NUM_R { - EO_FR_NUM_R::new(((self.bits >> 16) & 1) != 0) + pub fn eo_fr_num(&self) -> EoFrNumR { + EoFrNumR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SNP_R { - SNP_R::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SnpR { + SnpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> USBACT_EP_W { - USBACT_EP_W::new(self, 15) + pub fn usbact_ep(&mut self) -> UsbactEpW { + UsbactEpW::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EPTYPE_W { - EPTYPE_W::new(self, 18) + pub fn eptype(&mut self) -> EptypeW { + EptypeW::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SNP_W { - SNP_W::new(self, 20) + pub fn snp(&mut self) -> SnpW { + SnpW::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 22) + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] #[must_use] - pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { - SET_EVEN_FR_W::new(self, 28) + pub fn set_even_fr(&mut self) -> SetEvenFrW { + SetEvenFrW::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] #[must_use] - pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { - SET_ODD_FR_W::new(self, 29) + pub fn set_odd_fr(&mut self) -> SetOddFrW { + SetOddFrW::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self, 30) + pub fn epdis(&mut self) -> EpdisW { + EpdisW::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPCTL_ISOCONT_SPEC; -impl crate::RegisterSpec for DIEPCTL_ISOCONT_SPEC { +pub struct DiepctlIsocontSpec; +impl crate::RegisterSpec for DiepctlIsocontSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepctl_isocont::R`](R) reader structure"] -impl crate::Readable for DIEPCTL_ISOCONT_SPEC {} +impl crate::Readable for DiepctlIsocontSpec {} #[doc = "`write(|w| ..)` method takes [`diepctl_isocont::W`](W) writer structure"] -impl crate::Writable for DIEPCTL_ISOCONT_SPEC { +impl crate::Writable for DiepctlIsocontSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL_ISOCONT to value 0"] -impl crate::Resettable for DIEPCTL_ISOCONT_SPEC { +impl crate::Resettable for DiepctlIsocontSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepdma.rs b/src/usb0_ep1/diepdma.rs index df8508a5..64b8a622 100644 --- a/src/usb0_ep1/diepdma.rs +++ b/src/usb0_ep1/diepdma.rs @@ -1,49 +1,40 @@ #[doc = "Register `DIEPDMA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPDMA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new(self.bits) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPDMA_SPEC; -impl crate::RegisterSpec for DIEPDMA_SPEC { +pub struct DiepdmaSpec; +impl crate::RegisterSpec for DiepdmaSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepdma::R`](R) reader structure"] -impl crate::Readable for DIEPDMA_SPEC {} +impl crate::Readable for DiepdmaSpec {} #[doc = "`write(|w| ..)` method takes [`diepdma::W`](W) writer structure"] -impl crate::Writable for DIEPDMA_SPEC { +impl crate::Writable for DiepdmaSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPDMA to value 0"] -impl crate::Resettable for DIEPDMA_SPEC { +impl crate::Resettable for DiepdmaSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepdmab.rs b/src/usb0_ep1/diepdmab.rs index a695cd8f..e20e43b7 100644 --- a/src/usb0_ep1/diepdmab.rs +++ b/src/usb0_ep1/diepdmab.rs @@ -1,22 +1,22 @@ #[doc = "Register `DIEPDMAB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DMABUFFER_ADDR_R = crate::FieldReader; +pub type DmabufferAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { - DMABUFFER_ADDR_R::new(self.bits) + pub fn dmabuffer_addr(&self) -> DmabufferAddrR { + DmabufferAddrR::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPDMAB_SPEC; -impl crate::RegisterSpec for DIEPDMAB_SPEC { +pub struct DiepdmabSpec; +impl crate::RegisterSpec for DiepdmabSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepdmab::R`](R) reader structure"] -impl crate::Readable for DIEPDMAB_SPEC {} +impl crate::Readable for DiepdmabSpec {} #[doc = "`reset()` method sets DIEPDMAB to value 0"] -impl crate::Resettable for DIEPDMAB_SPEC { +impl crate::Resettable for DiepdmabSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepint.rs b/src/usb0_ep1/diepint.rs index 3f6659c1..e3232e1e 100644 --- a/src/usb0_ep1/diepint.rs +++ b/src/usb0_ep1/diepint.rs @@ -1,146 +1,137 @@ #[doc = "Register `DIEPINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XFER_COMPL_R = crate::BitReader; +pub type XferComplR = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EPDISBLD_R = crate::BitReader; +pub type EpdisbldR = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AHBERR_R = crate::BitReader; +pub type AhberrR = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUT` reader - Timeout Condition"] -pub type TIME_OUT_R = crate::BitReader; +pub type TimeOutR = crate::BitReader; #[doc = "Field `TimeOUT` writer - Timeout Condition"] -pub type TIME_OUT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TimeOutW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmp` reader - IN Token Received When TxFIFO is Empty"] -pub type INTKN_TXFEMP_R = crate::BitReader; +pub type IntknTxfempR = crate::BitReader; #[doc = "Field `INTknTXFEmp` writer - IN Token Received When TxFIFO is Empty"] -pub type INTKN_TXFEMP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type IntknTxfempW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEff` reader - IN Endpoint NAK Effective"] -pub type INEPNAK_EFF_R = crate::BitReader; +pub type InepnakEffR = crate::BitReader; #[doc = "Field `INEPNakEff` writer - IN Endpoint NAK Effective"] -pub type INEPNAK_EFF_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type InepnakEffW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFEmp` reader - Transmit FIFO Empty"] -pub type TX_FEMP_R = crate::BitReader; +pub type TxFempR = crate::BitReader; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_R = crate::BitReader; +pub type BnaintrR = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XFER_COMPL_R { - XFER_COMPL_R::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XferComplR { + XferComplR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EPDISBLD_R { - EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EpdisbldR { + EpdisbldR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AHBERR_R { - AHBERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AhberrR { + AhberrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - pub fn time_out(&self) -> TIME_OUT_R { - TIME_OUT_R::new(((self.bits >> 3) & 1) != 0) + pub fn time_out(&self) -> TimeOutR { + TimeOutR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - pub fn intkn_txfemp(&self) -> INTKN_TXFEMP_R { - INTKN_TXFEMP_R::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp(&self) -> IntknTxfempR { + IntknTxfempR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - pub fn inepnak_eff(&self) -> INEPNAK_EFF_R { - INEPNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff(&self) -> InepnakEffR { + InepnakEffR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Empty"] #[inline(always)] - pub fn tx_femp(&self) -> TX_FEMP_R { - TX_FEMP_R::new(((self.bits >> 7) & 1) != 0) + pub fn tx_femp(&self) -> TxFempR { + TxFempR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BNAINTR_R { - BNAINTR_R::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BnaintrR { + BnaintrR::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XFER_COMPL_W { - XFER_COMPL_W::new(self, 0) + pub fn xfer_compl(&mut self) -> XferComplW { + XferComplW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EPDISBLD_W { - EPDISBLD_W::new(self, 1) + pub fn epdisbld(&mut self) -> EpdisbldW { + EpdisbldW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self, 2) + pub fn ahberr(&mut self) -> AhberrW { + AhberrW::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] #[must_use] - pub fn time_out(&mut self) -> TIME_OUT_W { - TIME_OUT_W::new(self, 3) + pub fn time_out(&mut self) -> TimeOutW { + TimeOutW::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] #[must_use] - pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { - INTKN_TXFEMP_W::new(self, 4) + pub fn intkn_txfemp(&mut self) -> IntknTxfempW { + IntknTxfempW::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] #[must_use] - pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { - INEPNAK_EFF_W::new(self, 6) + pub fn inepnak_eff(&mut self) -> InepnakEffW { + InepnakEffW::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BNAINTR_W { - BNAINTR_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bnaintr(&mut self) -> BnaintrW { + BnaintrW::new(self, 9) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPINT_SPEC; -impl crate::RegisterSpec for DIEPINT_SPEC { +pub struct DiepintSpec; +impl crate::RegisterSpec for DiepintSpec { type Ux = u32; } #[doc = "`read()` method returns [`diepint::R`](R) reader structure"] -impl crate::Readable for DIEPINT_SPEC {} +impl crate::Readable for DiepintSpec {} #[doc = "`write(|w| ..)` method takes [`diepint::W`](W) writer structure"] -impl crate::Writable for DIEPINT_SPEC { +impl crate::Writable for DiepintSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPINT to value 0x80"] -impl crate::Resettable for DIEPINT_SPEC { +impl crate::Resettable for DiepintSpec { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep1/dieptsiz.rs b/src/usb0_ep1/dieptsiz.rs index 6b45e27b..d05d69cd 100644 --- a/src/usb0_ep1/dieptsiz.rs +++ b/src/usb0_ep1/dieptsiz.rs @@ -1,64 +1,55 @@ #[doc = "Register `DIEPTSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } } #[doc = "Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DIEPTSIZ_SPEC; -impl crate::RegisterSpec for DIEPTSIZ_SPEC { +pub struct DieptsizSpec; +impl crate::RegisterSpec for DieptsizSpec { type Ux = u32; } #[doc = "`read()` method returns [`dieptsiz::R`](R) reader structure"] -impl crate::Readable for DIEPTSIZ_SPEC {} +impl crate::Readable for DieptsizSpec {} #[doc = "`write(|w| ..)` method takes [`dieptsiz::W`](W) writer structure"] -impl crate::Writable for DIEPTSIZ_SPEC { +impl crate::Writable for DieptsizSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTSIZ to value 0"] -impl crate::Resettable for DIEPTSIZ_SPEC { +impl crate::Resettable for DieptsizSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepctl_intbulk.rs b/src/usb0_ep1/doepctl_intbulk.rs index b6066c50..09a329e3 100644 --- a/src/usb0_ep1/doepctl_intbulk.rs +++ b/src/usb0_ep1/doepctl_intbulk.rs @@ -1,147 +1,147 @@ #[doc = "Register `DOEPCTL_INTBULK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL_INTBULK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type MpsR = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `DPID` reader - Endpoint Data PID"] -pub type DPID_R = crate::BitReader; +pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Endpoint Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPID_A { +pub enum Dpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DATA1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPID_A) -> Self { + fn from(variant: Dpid) -> Self { variant as u8 != 0 } } -impl DPID_R { +#[doc = "Field `DPID` reader - Endpoint Data PID"] +pub type DpidR = crate::BitReader; +impl DpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPID_A { + pub const fn variant(&self) -> Dpid { match self.bits { - false => DPID_A::VALUE1, - true => DPID_A::VALUE2, + false => Dpid::Value1, + true => Dpid::Value2, } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPID_A::VALUE1 + *self == Dpid::Value1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPID_A::VALUE2 + *self == Dpid::Value2 } } -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } -#[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EPTYPE_A { +pub enum Eptype { #[doc = "0: Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Isochronous"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bulk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Interrupt"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EPTYPE_A) -> Self { + fn from(variant: Eptype) -> Self { variant as _ } } -impl crate::FieldSpec for EPTYPE_A { +impl crate::FieldSpec for Eptype { type Ux = u8; } -impl EPTYPE_R { +#[doc = "Field `EPType` reader - Endpoint Type"] +pub type EptypeR = crate::FieldReader; +impl EptypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPTYPE_A { + pub const fn variant(&self) -> Eptype { match self.bits { - 0 => EPTYPE_A::VALUE1, - 1 => EPTYPE_A::VALUE2, - 2 => EPTYPE_A::VALUE3, - 3 => EPTYPE_A::VALUE4, + 0 => Eptype::Value1, + 1 => Eptype::Value2, + 2 => Eptype::Value3, + 3 => Eptype::Value4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPTYPE_A::VALUE1 + *self == Eptype::Value1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPTYPE_A::VALUE2 + *self == Eptype::Value2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EPTYPE_A::VALUE3 + *self == Eptype::Value3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EPTYPE_A::VALUE4 + *self == Eptype::Value4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EPTYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EPTYPE_A>; -impl<'a, REG> EPTYPE_W<'a, REG> +pub type EptypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eptype>; +impl<'a, REG> EptypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,201 +149,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE1) + self.variant(Eptype::Value1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE2) + self.variant(Eptype::Value2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE3) + self.variant(Eptype::Value3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE4) + self.variant(Eptype::Value4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SNP_R = crate::BitReader; +pub type SnpR = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFnumR = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD0PID` writer - Set DATA0 PID"] -pub type SET_D0PID_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetD0pidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD1PID` writer - 29 Set DATA1 PID"] -pub type SET_D1PID_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetD1pidW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Endpoint Data PID"] #[inline(always)] - pub fn dpid(&self) -> DPID_R { - DPID_R::new(((self.bits >> 16) & 1) != 0) + pub fn dpid(&self) -> DpidR { + DpidR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SNP_R { - SNP_R::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SnpR { + SnpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> USBACT_EP_W { - USBACT_EP_W::new(self, 15) + pub fn usbact_ep(&mut self) -> UsbactEpW { + UsbactEpW::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EPTYPE_W { - EPTYPE_W::new(self, 18) + pub fn eptype(&mut self) -> EptypeW { + EptypeW::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SNP_W { - SNP_W::new(self, 20) + pub fn snp(&mut self) -> SnpW { + SnpW::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 22) + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn set_d0pid(&mut self) -> SET_D0PID_W { - SET_D0PID_W::new(self, 28) + pub fn set_d0pid(&mut self) -> SetD0pidW { + SetD0pidW::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] #[must_use] - pub fn set_d1pid(&mut self) -> SET_D1PID_W { - SET_D1PID_W::new(self, 29) + pub fn set_d1pid(&mut self) -> SetD1pidW { + SetD1pidW::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self, 30) + pub fn epdis(&mut self) -> EpdisW { + EpdisW::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPCTL_INTBULK_SPEC; -impl crate::RegisterSpec for DOEPCTL_INTBULK_SPEC { +pub struct DoepctlIntbulkSpec; +impl crate::RegisterSpec for DoepctlIntbulkSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepctl_intbulk::R`](R) reader structure"] -impl crate::Readable for DOEPCTL_INTBULK_SPEC {} +impl crate::Readable for DoepctlIntbulkSpec {} #[doc = "`write(|w| ..)` method takes [`doepctl_intbulk::W`](W) writer structure"] -impl crate::Writable for DOEPCTL_INTBULK_SPEC { +impl crate::Writable for DoepctlIntbulkSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL_INTBULK to value 0"] -impl crate::Resettable for DOEPCTL_INTBULK_SPEC { +impl crate::Resettable for DoepctlIntbulkSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepctl_isocont.rs b/src/usb0_ep1/doepctl_isocont.rs index d9c0e34b..9696b07f 100644 --- a/src/usb0_ep1/doepctl_isocont.rs +++ b/src/usb0_ep1/doepctl_isocont.rs @@ -1,147 +1,147 @@ #[doc = "Register `DOEPCTL_ISOCONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL_ISOCONT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MPS_R = crate::FieldReader; +pub type MpsR = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type USBACT_EP_R = crate::BitReader; +pub type UsbactEpR = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] -pub type EO_FR_NUM_R = crate::BitReader; +pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Even/Odd Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EO_FR_NUM_A { +pub enum EoFrNum { #[doc = "0: Even frame"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Odd rame"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EO_FR_NUM_A) -> Self { + fn from(variant: EoFrNum) -> Self { variant as u8 != 0 } } -impl EO_FR_NUM_R { +#[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] +pub type EoFrNumR = crate::BitReader; +impl EoFrNumR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EO_FR_NUM_A { + pub const fn variant(&self) -> EoFrNum { match self.bits { - false => EO_FR_NUM_A::VALUE1, - true => EO_FR_NUM_A::VALUE2, + false => EoFrNum::Value1, + true => EoFrNum::Value2, } } #[doc = "Even frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EO_FR_NUM_A::VALUE1 + *self == EoFrNum::Value1 } #[doc = "Odd rame"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EO_FR_NUM_A::VALUE2 + *self == EoFrNum::Value2 } } -#[doc = "Field `NAKSts` reader - NAK Status"] -pub type NAKSTS_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NAKSTS_A { +pub enum Naksts { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NAKSTS_A) -> Self { + fn from(variant: Naksts) -> Self { variant as u8 != 0 } } -impl NAKSTS_R { +#[doc = "Field `NAKSts` reader - NAK Status"] +pub type NakstsR = crate::BitReader; +impl NakstsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NAKSTS_A { + pub const fn variant(&self) -> Naksts { match self.bits { - false => NAKSTS_A::VALUE1, - true => NAKSTS_A::VALUE2, + false => Naksts::Value1, + true => Naksts::Value2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NAKSTS_A::VALUE1 + *self == Naksts::Value1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NAKSTS_A::VALUE2 + *self == Naksts::Value2 } } -#[doc = "Field `EPType` reader - Endpoint Type"] -pub type EPTYPE_R = crate::FieldReader; #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EPTYPE_A { +pub enum Eptype { #[doc = "0: Control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Isochronous"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bulk"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Interrupt"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EPTYPE_A) -> Self { + fn from(variant: Eptype) -> Self { variant as _ } } -impl crate::FieldSpec for EPTYPE_A { +impl crate::FieldSpec for Eptype { type Ux = u8; } -impl EPTYPE_R { +#[doc = "Field `EPType` reader - Endpoint Type"] +pub type EptypeR = crate::FieldReader; +impl EptypeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EPTYPE_A { + pub const fn variant(&self) -> Eptype { match self.bits { - 0 => EPTYPE_A::VALUE1, - 1 => EPTYPE_A::VALUE2, - 2 => EPTYPE_A::VALUE3, - 3 => EPTYPE_A::VALUE4, + 0 => Eptype::Value1, + 1 => Eptype::Value2, + 2 => Eptype::Value3, + 3 => Eptype::Value4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EPTYPE_A::VALUE1 + *self == Eptype::Value1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EPTYPE_A::VALUE2 + *self == Eptype::Value2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EPTYPE_A::VALUE3 + *self == Eptype::Value3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EPTYPE_A::VALUE4 + *self == Eptype::Value4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EPTYPE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EPTYPE_A>; -impl<'a, REG> EPTYPE_W<'a, REG> +pub type EptypeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Eptype>; +impl<'a, REG> EptypeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,201 +149,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE1) + self.variant(Eptype::Value1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE2) + self.variant(Eptype::Value2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE3) + self.variant(Eptype::Value3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EPTYPE_A::VALUE4) + self.variant(Eptype::Value4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SNP_R = crate::BitReader; +pub type SnpR = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type STALL_R = crate::BitReader; +pub type StallR = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TX_FNUM_R = crate::FieldReader; +pub type TxFnumR = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetEvenFr` writer - In non-Scatter/Gather DMA mode: Set Even frame"] -pub type SET_EVEN_FR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetEvenFrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetOddFr` writer - Set Odd frame"] -pub type SET_ODD_FR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetOddFrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EPDIS_R = crate::BitReader; +pub type EpdisR = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EPENA_R = crate::BitReader; +pub type EpenaR = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MPS_R { - MPS_R::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MpsR { + MpsR::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> USBACT_EP_R { - USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> UsbactEpR { + UsbactEpR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Even/Odd Frame"] #[inline(always)] - pub fn eo_fr_num(&self) -> EO_FR_NUM_R { - EO_FR_NUM_R::new(((self.bits >> 16) & 1) != 0) + pub fn eo_fr_num(&self) -> EoFrNumR { + EoFrNumR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NAKSTS_R { - NAKSTS_R::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NakstsR { + NakstsR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EPTYPE_R { - EPTYPE_R::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EptypeR { + EptypeR::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SNP_R { - SNP_R::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SnpR { + SnpR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> STALL_R { - STALL_R::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> StallR { + StallR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TX_FNUM_R { - TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TxFnumR { + TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EPDIS_R { - EPDIS_R::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EpdisR { + EpdisR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EPENA_R { - EPENA_R::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EpenaR { + EpenaR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MPS_W { - MPS_W::new(self, 0) + pub fn mps(&mut self) -> MpsW { + MpsW::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> USBACT_EP_W { - USBACT_EP_W::new(self, 15) + pub fn usbact_ep(&mut self) -> UsbactEpW { + UsbactEpW::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EPTYPE_W { - EPTYPE_W::new(self, 18) + pub fn eptype(&mut self) -> EptypeW { + EptypeW::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SNP_W { - SNP_W::new(self, 20) + pub fn snp(&mut self) -> SnpW { + SnpW::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> STALL_W { - STALL_W::new(self, 21) + pub fn stall(&mut self) -> StallW { + StallW::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TX_FNUM_W { - TX_FNUM_W::new(self, 22) + pub fn tx_fnum(&mut self) -> TxFnumW { + TxFnumW::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CNAK_W { - CNAK_W::new(self, 26) + pub fn cnak(&mut self) -> CnakW { + CnakW::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SNAK_W { - SNAK_W::new(self, 27) + pub fn snak(&mut self) -> SnakW { + SnakW::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] #[must_use] - pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { - SET_EVEN_FR_W::new(self, 28) + pub fn set_even_fr(&mut self) -> SetEvenFrW { + SetEvenFrW::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] #[must_use] - pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { - SET_ODD_FR_W::new(self, 29) + pub fn set_odd_fr(&mut self) -> SetOddFrW { + SetOddFrW::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EPDIS_W { - EPDIS_W::new(self, 30) + pub fn epdis(&mut self) -> EpdisW { + EpdisW::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EPENA_W { - EPENA_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn epena(&mut self) -> EpenaW { + EpenaW::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPCTL_ISOCONT_SPEC; -impl crate::RegisterSpec for DOEPCTL_ISOCONT_SPEC { +pub struct DoepctlIsocontSpec; +impl crate::RegisterSpec for DoepctlIsocontSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepctl_isocont::R`](R) reader structure"] -impl crate::Readable for DOEPCTL_ISOCONT_SPEC {} +impl crate::Readable for DoepctlIsocontSpec {} #[doc = "`write(|w| ..)` method takes [`doepctl_isocont::W`](W) writer structure"] -impl crate::Writable for DOEPCTL_ISOCONT_SPEC { +impl crate::Writable for DoepctlIsocontSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL_ISOCONT to value 0"] -impl crate::Resettable for DOEPCTL_ISOCONT_SPEC { +impl crate::Resettable for DoepctlIsocontSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepdma.rs b/src/usb0_ep1/doepdma.rs index 2a4d54a3..e1c7b47c 100644 --- a/src/usb0_ep1/doepdma.rs +++ b/src/usb0_ep1/doepdma.rs @@ -1,49 +1,40 @@ #[doc = "Register `DOEPDMA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPDMA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DMAADDR_R = crate::FieldReader; +pub type DmaaddrR = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DMAADDR_R { - DMAADDR_R::new(self.bits) + pub fn dmaaddr(&self) -> DmaaddrR { + DmaaddrR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DMAADDR_W { - DMAADDR_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dmaaddr(&mut self) -> DmaaddrW { + DmaaddrW::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPDMA_SPEC; -impl crate::RegisterSpec for DOEPDMA_SPEC { +pub struct DoepdmaSpec; +impl crate::RegisterSpec for DoepdmaSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepdma::R`](R) reader structure"] -impl crate::Readable for DOEPDMA_SPEC {} +impl crate::Readable for DoepdmaSpec {} #[doc = "`write(|w| ..)` method takes [`doepdma::W`](W) writer structure"] -impl crate::Writable for DOEPDMA_SPEC { +impl crate::Writable for DoepdmaSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPDMA to value 0"] -impl crate::Resettable for DOEPDMA_SPEC { +impl crate::Resettable for DoepdmaSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepdmab.rs b/src/usb0_ep1/doepdmab.rs index 64581ece..541bef6e 100644 --- a/src/usb0_ep1/doepdmab.rs +++ b/src/usb0_ep1/doepdmab.rs @@ -1,22 +1,22 @@ #[doc = "Register `DOEPDMAB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DMABUFFER_ADDR_R = crate::FieldReader; +pub type DmabufferAddrR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { - DMABUFFER_ADDR_R::new(self.bits) + pub fn dmabuffer_addr(&self) -> DmabufferAddrR { + DmabufferAddrR::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPDMAB_SPEC; -impl crate::RegisterSpec for DOEPDMAB_SPEC { +pub struct DoepdmabSpec; +impl crate::RegisterSpec for DoepdmabSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepdmab::R`](R) reader structure"] -impl crate::Readable for DOEPDMAB_SPEC {} +impl crate::Readable for DoepdmabSpec {} #[doc = "`reset()` method sets DOEPDMAB to value 0"] -impl crate::Resettable for DOEPDMAB_SPEC { +impl crate::Resettable for DoepdmabSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepint.rs b/src/usb0_ep1/doepint.rs index 8598da87..caccbf38 100644 --- a/src/usb0_ep1/doepint.rs +++ b/src/usb0_ep1/doepint.rs @@ -1,214 +1,205 @@ #[doc = "Register `DOEPINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XFER_COMPL_R = crate::BitReader; +pub type XferComplR = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EPDISBLD_R = crate::BitReader; +pub type EpdisbldR = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AHBERR_R = crate::BitReader; +pub type AhberrR = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUp` reader - SETUP Phase Done"] -pub type SET_UP_R = crate::BitReader; +pub type SetUpR = crate::BitReader; #[doc = "Field `SetUp` writer - SETUP Phase Done"] -pub type SET_UP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SetUpW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdis` reader - OUT Token Received When Endpoint Disabled"] -pub type OUTTKN_EPDIS_R = crate::BitReader; +pub type OuttknEpdisR = crate::BitReader; #[doc = "Field `OUTTknEPdis` writer - OUT Token Received When Endpoint Disabled"] -pub type OUTTKN_EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type OuttknEpdisW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `StsPhseRcvd` reader - Status Phase Received For Control Write"] -pub type STS_PHSE_RCVD_R = crate::BitReader; +pub type StsPhseRcvdR = crate::BitReader; #[doc = "Field `StsPhseRcvd` writer - Status Phase Received For Control Write"] -pub type STS_PHSE_RCVD_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type StsPhseRcvdW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received"] -pub type BACK2BACK_SETUP_R = crate::BitReader; +pub type Back2backSetupR = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received"] -pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_R = crate::BitReader; +pub type BnaintrR = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PktDrpSts` reader - Packet Dropped Status"] -pub type PKT_DRP_STS_R = crate::BitReader; +pub type PktDrpStsR = crate::BitReader; #[doc = "Field `PktDrpSts` writer - Packet Dropped Status"] -pub type PKT_DRP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PktDrpStsW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrIntrpt` reader - BbleErr (Babble Error) interrupt"] -pub type BBLE_ERR_INTRPT_R = crate::BitReader; +pub type BbleErrIntrptR = crate::BitReader; #[doc = "Field `BbleErrIntrpt` writer - BbleErr (Babble Error) interrupt"] -pub type BBLE_ERR_INTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type BbleErrIntrptW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKIntrpt` reader - NAK interrupt"] -pub type NAKINTRPT_R = crate::BitReader; +pub type NakintrptR = crate::BitReader; #[doc = "Field `NAKIntrpt` writer - NAK interrupt"] -pub type NAKINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NakintrptW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETIntrpt` reader - NYET interrupt"] -pub type NYETINTRPT_R = crate::BitReader; +pub type NyetintrptR = crate::BitReader; #[doc = "Field `NYETIntrpt` writer - NYET interrupt"] -pub type NYETINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type NyetintrptW<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XFER_COMPL_R { - XFER_COMPL_R::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XferComplR { + XferComplR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EPDISBLD_R { - EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EpdisbldR { + EpdisbldR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AHBERR_R { - AHBERR_R::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AhberrR { + AhberrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - pub fn set_up(&self) -> SET_UP_R { - SET_UP_R::new(((self.bits >> 3) & 1) != 0) + pub fn set_up(&self) -> SetUpR { + SetUpR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - pub fn outtkn_epdis(&self) -> OUTTKN_EPDIS_R { - OUTTKN_EPDIS_R::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis(&self) -> OuttknEpdisR { + OuttknEpdisR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - pub fn sts_phse_rcvd(&self) -> STS_PHSE_RCVD_R { - STS_PHSE_RCVD_R::new(((self.bits >> 5) & 1) != 0) + pub fn sts_phse_rcvd(&self) -> StsPhseRcvdR { + StsPhseRcvdR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { - BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> Back2backSetupR { + Back2backSetupR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BNAINTR_R { - BNAINTR_R::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BnaintrR { + BnaintrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - pub fn pkt_drp_sts(&self) -> PKT_DRP_STS_R { - PKT_DRP_STS_R::new(((self.bits >> 11) & 1) != 0) + pub fn pkt_drp_sts(&self) -> PktDrpStsR { + PktDrpStsR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - pub fn bble_err_intrpt(&self) -> BBLE_ERR_INTRPT_R { - BBLE_ERR_INTRPT_R::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_intrpt(&self) -> BbleErrIntrptR { + BbleErrIntrptR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - pub fn nakintrpt(&self) -> NAKINTRPT_R { - NAKINTRPT_R::new(((self.bits >> 13) & 1) != 0) + pub fn nakintrpt(&self) -> NakintrptR { + NakintrptR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - pub fn nyetintrpt(&self) -> NYETINTRPT_R { - NYETINTRPT_R::new(((self.bits >> 14) & 1) != 0) + pub fn nyetintrpt(&self) -> NyetintrptR { + NyetintrptR::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XFER_COMPL_W { - XFER_COMPL_W::new(self, 0) + pub fn xfer_compl(&mut self) -> XferComplW { + XferComplW::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EPDISBLD_W { - EPDISBLD_W::new(self, 1) + pub fn epdisbld(&mut self) -> EpdisbldW { + EpdisbldW::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AHBERR_W { - AHBERR_W::new(self, 2) + pub fn ahberr(&mut self) -> AhberrW { + AhberrW::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] #[must_use] - pub fn set_up(&mut self) -> SET_UP_W { - SET_UP_W::new(self, 3) + pub fn set_up(&mut self) -> SetUpW { + SetUpW::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] #[must_use] - pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { - OUTTKN_EPDIS_W::new(self, 4) + pub fn outtkn_epdis(&mut self) -> OuttknEpdisW { + OuttknEpdisW::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] #[must_use] - pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { - STS_PHSE_RCVD_W::new(self, 5) + pub fn sts_phse_rcvd(&mut self) -> StsPhseRcvdW { + StsPhseRcvdW::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { - BACK2BACK_SETUP_W::new(self, 6) + pub fn back2back_setup(&mut self) -> Back2backSetupW { + Back2backSetupW::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BNAINTR_W { - BNAINTR_W::new(self, 9) + pub fn bnaintr(&mut self) -> BnaintrW { + BnaintrW::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] #[must_use] - pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { - PKT_DRP_STS_W::new(self, 11) + pub fn pkt_drp_sts(&mut self) -> PktDrpStsW { + PktDrpStsW::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] #[must_use] - pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { - BBLE_ERR_INTRPT_W::new(self, 12) + pub fn bble_err_intrpt(&mut self) -> BbleErrIntrptW { + BbleErrIntrptW::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nakintrpt(&mut self) -> NAKINTRPT_W { - NAKINTRPT_W::new(self, 13) + pub fn nakintrpt(&mut self) -> NakintrptW { + NakintrptW::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { - NYETINTRPT_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn nyetintrpt(&mut self) -> NyetintrptW { + NyetintrptW::new(self, 14) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPINT_SPEC; -impl crate::RegisterSpec for DOEPINT_SPEC { +pub struct DoepintSpec; +impl crate::RegisterSpec for DoepintSpec { type Ux = u32; } #[doc = "`read()` method returns [`doepint::R`](R) reader structure"] -impl crate::Readable for DOEPINT_SPEC {} +impl crate::Readable for DoepintSpec {} #[doc = "`write(|w| ..)` method takes [`doepint::W`](W) writer structure"] -impl crate::Writable for DOEPINT_SPEC { +impl crate::Writable for DoepintSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPINT to value 0x80"] -impl crate::Resettable for DOEPINT_SPEC { +impl crate::Resettable for DoepintSpec { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep1/doeptsiz_control.rs b/src/usb0_ep1/doeptsiz_control.rs index 15a32c31..699d2bbb 100644 --- a/src/usb0_ep1/doeptsiz_control.rs +++ b/src/usb0_ep1/doeptsiz_control.rs @@ -1,79 +1,70 @@ #[doc = "Register `DOEPTSIZ_CONTROL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ_CONTROL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `SUPCnt` reader - SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,"] -pub type SUPCNT_R = crate::FieldReader; +pub type SupcntR = crate::FieldReader; #[doc = "Field `SUPCnt` writer - SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,"] -pub type SUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SupcntW<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,"] #[inline(always)] - pub fn supcnt(&self) -> SUPCNT_R { - SUPCNT_R::new(((self.bits >> 29) & 3) as u8) + pub fn supcnt(&self) -> SupcntR { + SupcntR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,"] #[inline(always)] #[must_use] - pub fn supcnt(&mut self) -> SUPCNT_W { - SUPCNT_W::new(self, 29) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn supcnt(&mut self) -> SupcntW { + SupcntW::new(self, 29) } } #[doc = "Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPTSIZ_CONTROL_SPEC; -impl crate::RegisterSpec for DOEPTSIZ_CONTROL_SPEC { +pub struct DoeptsizControlSpec; +impl crate::RegisterSpec for DoeptsizControlSpec { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz_control::R`](R) reader structure"] -impl crate::Readable for DOEPTSIZ_CONTROL_SPEC {} +impl crate::Readable for DoeptsizControlSpec {} #[doc = "`write(|w| ..)` method takes [`doeptsiz_control::W`](W) writer structure"] -impl crate::Writable for DOEPTSIZ_CONTROL_SPEC { +impl crate::Writable for DoeptsizControlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ_CONTROL to value 0"] -impl crate::Resettable for DOEPTSIZ_CONTROL_SPEC { +impl crate::Resettable for DoeptsizControlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doeptsiz_iso.rs b/src/usb0_ep1/doeptsiz_iso.rs index ff359b6e..e5d8d7ad 100644 --- a/src/usb0_ep1/doeptsiz_iso.rs +++ b/src/usb0_ep1/doeptsiz_iso.rs @@ -1,126 +1,117 @@ #[doc = "Register `DOEPTSIZ_ISO` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ_ISO` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XFER_SIZE_R = crate::FieldReader; +pub type XferSizeR = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PKT_CNT_R = crate::FieldReader; +pub type PktCntR = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; -#[doc = "Field `RxDPID` reader - Received Data PID"] -pub type RX_DPID_R = crate::FieldReader; +pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Received Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RX_DPID_A { +pub enum RxDpid { #[doc = "0: DATA0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DATA2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: DATA1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: MDATA"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RX_DPID_A) -> Self { + fn from(variant: RxDpid) -> Self { variant as _ } } -impl crate::FieldSpec for RX_DPID_A { +impl crate::FieldSpec for RxDpid { type Ux = u8; } -impl RX_DPID_R { +#[doc = "Field `RxDPID` reader - Received Data PID"] +pub type RxDpidR = crate::FieldReader; +impl RxDpidR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RX_DPID_A { + pub const fn variant(&self) -> RxDpid { match self.bits { - 0 => RX_DPID_A::VALUE1, - 1 => RX_DPID_A::VALUE2, - 2 => RX_DPID_A::VALUE3, - 3 => RX_DPID_A::VALUE4, + 0 => RxDpid::Value1, + 1 => RxDpid::Value2, + 2 => RxDpid::Value3, + 3 => RxDpid::Value4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RX_DPID_A::VALUE1 + *self == RxDpid::Value1 } #[doc = "DATA2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RX_DPID_A::VALUE2 + *self == RxDpid::Value2 } #[doc = "DATA1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RX_DPID_A::VALUE3 + *self == RxDpid::Value3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RX_DPID_A::VALUE4 + *self == RxDpid::Value4 } } impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XFER_SIZE_R { - XFER_SIZE_R::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XferSizeR { + XferSizeR::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PKT_CNT_R { - PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PktCntR { + PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Received Data PID"] #[inline(always)] - pub fn rx_dpid(&self) -> RX_DPID_R { - RX_DPID_R::new(((self.bits >> 29) & 3) as u8) + pub fn rx_dpid(&self) -> RxDpidR { + RxDpidR::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XFER_SIZE_W { - XFER_SIZE_W::new(self, 0) + pub fn xfer_size(&mut self) -> XferSizeW { + XferSizeW::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PKT_CNT_W { - PKT_CNT_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pkt_cnt(&mut self) -> PktCntW { + PktCntW::new(self, 19) } } #[doc = "Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DOEPTSIZ_ISO_SPEC; -impl crate::RegisterSpec for DOEPTSIZ_ISO_SPEC { +pub struct DoeptsizIsoSpec; +impl crate::RegisterSpec for DoeptsizIsoSpec { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz_iso::R`](R) reader structure"] -impl crate::Readable for DOEPTSIZ_ISO_SPEC {} +impl crate::Readable for DoeptsizIsoSpec {} #[doc = "`write(|w| ..)` method takes [`doeptsiz_iso::W`](W) writer structure"] -impl crate::Writable for DOEPTSIZ_ISO_SPEC { +impl crate::Writable for DoeptsizIsoSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ_ISO to value 0"] -impl crate::Resettable for DOEPTSIZ_ISO_SPEC { +impl crate::Resettable for DoeptsizIsoSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/dtxfsts.rs b/src/usb0_ep1/dtxfsts.rs index 92c25252..999a6575 100644 --- a/src/usb0_ep1/dtxfsts.rs +++ b/src/usb0_ep1/dtxfsts.rs @@ -1,69 +1,69 @@ #[doc = "Register `DTXFSTS` reader"] -pub type R = crate::R; -#[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] -pub type INEPTX_FSPC_AVAIL_R = crate::FieldReader; +pub type R = crate::R; #[doc = "IN Endpoint TxFIFO Space Avail\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum INEPTX_FSPC_AVAIL_A { +pub enum IneptxFspcAvail { #[doc = "0: Endpoint TxFIFO is full"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 1 word available"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 2 words available"] - VALUE3 = 2, + Value3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: INEPTX_FSPC_AVAIL_A) -> Self { + fn from(variant: IneptxFspcAvail) -> Self { variant as _ } } -impl crate::FieldSpec for INEPTX_FSPC_AVAIL_A { +impl crate::FieldSpec for IneptxFspcAvail { type Ux = u16; } -impl INEPTX_FSPC_AVAIL_R { +#[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] +pub type IneptxFspcAvailR = crate::FieldReader; +impl IneptxFspcAvailR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(INEPTX_FSPC_AVAIL_A::VALUE1), - 1 => Some(INEPTX_FSPC_AVAIL_A::VALUE2), - 2 => Some(INEPTX_FSPC_AVAIL_A::VALUE3), + 0 => Some(IneptxFspcAvail::Value1), + 1 => Some(IneptxFspcAvail::Value2), + 2 => Some(IneptxFspcAvail::Value3), _ => None, } } #[doc = "Endpoint TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE1 + *self == IneptxFspcAvail::Value1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE2 + *self == IneptxFspcAvail::Value2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == INEPTX_FSPC_AVAIL_A::VALUE3 + *self == IneptxFspcAvail::Value3 } } impl R { #[doc = "Bits 0:15 - IN Endpoint TxFIFO Space Avail"] #[inline(always)] - pub fn ineptx_fspc_avail(&self) -> INEPTX_FSPC_AVAIL_R { - INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) + pub fn ineptx_fspc_avail(&self) -> IneptxFspcAvailR { + IneptxFspcAvailR::new((self.bits & 0xffff) as u16) } } #[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DTXFSTS_SPEC; -impl crate::RegisterSpec for DTXFSTS_SPEC { +pub struct DtxfstsSpec; +impl crate::RegisterSpec for DtxfstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`dtxfsts::R`](R) reader structure"] -impl crate::Readable for DTXFSTS_SPEC {} +impl crate::Readable for DtxfstsSpec {} #[doc = "`reset()` method sets DTXFSTS to value 0"] -impl crate::Resettable for DTXFSTS_SPEC { +impl crate::Resettable for DtxfstsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0.rs b/src/usic0.rs index 8c24db6e..a91d172a 100644 --- a/src/usic0.rs +++ b/src/usic0.rs @@ -1,17 +1,18 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, + id: Id, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; diff --git a/src/usic0/id.rs b/src/usic0/id.rs index f44473c6..43631964 100644 --- a/src/usic0/id.rs +++ b/src/usic0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00aa_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00aa_c000; } diff --git a/src/usic0_ch0.rs b/src/usic0_ch0.rs index dcd64221..2bc3e40c 100644 --- a/src/usic0_ch0.rs +++ b/src/usic0_ch0.rs @@ -1,498 +1,542 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], - ccfg: CCFG, + ccfg: Ccfg, _reserved1: [u8; 0x04], - kscfg: KSCFG, - fdr: FDR, - brg: BRG, - inpr: INPR, - dx0cr: DX0CR, - dx1cr: DX1CR, - dx2cr: DX2CR, - dx3cr: DX3CR, - dx4cr: DX4CR, - dx5cr: DX5CR, - sctr: SCTR, - tcsr: TCSR, + kscfg: Kscfg, + fdr: Fdr, + brg: Brg, + inpr: Inpr, + dx0cr: Dx0cr, + dx1cr: Dx1cr, + dx2cr: Dx2cr, + dx3cr: Dx3cr, + dx4cr: Dx4cr, + dx5cr: Dx5cr, + sctr: Sctr, + tcsr: Tcsr, _reserved_13_pcr: [u8; 0x04], - ccr: CCR, - cmtr: CMTR, + ccr: Ccr, + cmtr: Cmtr, _reserved_16_psr: [u8; 0x04], - pscr: PSCR, - rbufsr: RBUFSR, - rbuf: RBUF, - rbufd: RBUFD, - rbuf0: RBUF0, - rbuf1: RBUF1, - rbuf01sr: RBUF01SR, - fmr: FMR, + pscr: Pscr, + rbufsr: Rbufsr, + rbuf: Rbuf, + rbufd: Rbufd, + rbuf0: Rbuf0, + rbuf1: Rbuf1, + rbuf01sr: Rbuf01sr, + fmr: Fmr, _reserved25: [u8; 0x14], - tbuf: [TBUF; 32], - byp: BYP, - bypcr: BYPCR, - tbctr: TBCTR, - rbctr: RBCTR, - trbptr: TRBPTR, - trbsr: TRBSR, - trbscr: TRBSCR, - outr: OUTR, - outdr: OUTDR, + tbuf: [Tbuf; 32], + byp: Byp, + bypcr: Bypcr, + tbctr: Tbctr, + rbctr: Rbctr, + trbptr: Trbptr, + trbsr: Trbsr, + trbscr: Trbscr, + outr: Outr, + outdr: Outdr, _reserved35: [u8; 0x5c], - in_: [IN; 32], + in_: [In; 32], } impl RegisterBlock { #[doc = "0x04 - Channel Configuration Register"] #[inline(always)] - pub const fn ccfg(&self) -> &CCFG { + pub const fn ccfg(&self) -> &Ccfg { &self.ccfg } #[doc = "0x0c - Kernel State Configuration Register"] #[inline(always)] - pub const fn kscfg(&self) -> &KSCFG { + pub const fn kscfg(&self) -> &Kscfg { &self.kscfg } #[doc = "0x10 - Fractional Divider Register"] #[inline(always)] - pub const fn fdr(&self) -> &FDR { + pub const fn fdr(&self) -> &Fdr { &self.fdr } #[doc = "0x14 - Baud Rate Generator Register"] #[inline(always)] - pub const fn brg(&self) -> &BRG { + pub const fn brg(&self) -> &Brg { &self.brg } #[doc = "0x18 - Interrupt Node Pointer Register"] #[inline(always)] - pub const fn inpr(&self) -> &INPR { + pub const fn inpr(&self) -> &Inpr { &self.inpr } #[doc = "0x1c - Input Control Register 0"] #[inline(always)] - pub const fn dx0cr(&self) -> &DX0CR { + pub const fn dx0cr(&self) -> &Dx0cr { &self.dx0cr } #[doc = "0x20 - Input Control Register 1"] #[inline(always)] - pub const fn dx1cr(&self) -> &DX1CR { + pub const fn dx1cr(&self) -> &Dx1cr { &self.dx1cr } #[doc = "0x24 - Input Control Register 2"] #[inline(always)] - pub const fn dx2cr(&self) -> &DX2CR { + pub const fn dx2cr(&self) -> &Dx2cr { &self.dx2cr } #[doc = "0x28 - Input Control Register 3"] #[inline(always)] - pub const fn dx3cr(&self) -> &DX3CR { + pub const fn dx3cr(&self) -> &Dx3cr { &self.dx3cr } #[doc = "0x2c - Input Control Register 4"] #[inline(always)] - pub const fn dx4cr(&self) -> &DX4CR { + pub const fn dx4cr(&self) -> &Dx4cr { &self.dx4cr } #[doc = "0x30 - Input Control Register 5"] #[inline(always)] - pub const fn dx5cr(&self) -> &DX5CR { + pub const fn dx5cr(&self) -> &Dx5cr { &self.dx5cr } #[doc = "0x34 - Shift Control Register"] #[inline(always)] - pub const fn sctr(&self) -> &SCTR { + pub const fn sctr(&self) -> &Sctr { &self.sctr } #[doc = "0x38 - Transmit Control/Status Register"] #[inline(always)] - pub const fn tcsr(&self) -> &TCSR { + pub const fn tcsr(&self) -> &Tcsr { &self.tcsr } #[doc = "0x3c - Protocol Control Register \\[IIS Mode\\]"] #[inline(always)] - pub const fn pcr_iismode(&self) -> &PCR_IISMODE { + pub const fn pcr_iismode(&self) -> &PcrIismode { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[IIC Mode\\]"] #[inline(always)] - pub const fn pcr_iicmode(&self) -> &PCR_IICMODE { + pub const fn pcr_iicmode(&self) -> &PcrIicmode { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[SSC Mode\\]"] #[inline(always)] - pub const fn pcr_sscmode(&self) -> &PCR_SSCMODE { + pub const fn pcr_sscmode(&self) -> &PcrSscmode { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[ASC Mode\\]"] #[inline(always)] - pub const fn pcr_ascmode(&self) -> &PCR_ASCMODE { + pub const fn pcr_ascmode(&self) -> &PcrAscmode { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register"] #[inline(always)] - pub const fn pcr(&self) -> &PCR { + pub const fn pcr(&self) -> &Pcr { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x40 - Channel Control Register"] #[inline(always)] - pub const fn ccr(&self) -> &CCR { + pub const fn ccr(&self) -> &Ccr { &self.ccr } #[doc = "0x44 - Capture Mode Timer Register"] #[inline(always)] - pub const fn cmtr(&self) -> &CMTR { + pub const fn cmtr(&self) -> &Cmtr { &self.cmtr } #[doc = "0x48 - Protocol Status Register \\[IIS Mode\\]"] #[inline(always)] - pub const fn psr_iismode(&self) -> &PSR_IISMODE { + pub const fn psr_iismode(&self) -> &PsrIismode { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[IIC Mode\\]"] #[inline(always)] - pub const fn psr_iicmode(&self) -> &PSR_IICMODE { + pub const fn psr_iicmode(&self) -> &PsrIicmode { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[SSC Mode\\]"] #[inline(always)] - pub const fn psr_sscmode(&self) -> &PSR_SSCMODE { + pub const fn psr_sscmode(&self) -> &PsrSscmode { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[ASC Mode\\]"] #[inline(always)] - pub const fn psr_ascmode(&self) -> &PSR_ASCMODE { + pub const fn psr_ascmode(&self) -> &PsrAscmode { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register"] #[inline(always)] - pub const fn psr(&self) -> &PSR { + pub const fn psr(&self) -> &Psr { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x4c - Protocol Status Clear Register"] #[inline(always)] - pub const fn pscr(&self) -> &PSCR { + pub const fn pscr(&self) -> &Pscr { &self.pscr } #[doc = "0x50 - Receiver Buffer Status Register"] #[inline(always)] - pub const fn rbufsr(&self) -> &RBUFSR { + pub const fn rbufsr(&self) -> &Rbufsr { &self.rbufsr } #[doc = "0x54 - Receiver Buffer Register"] #[inline(always)] - pub const fn rbuf(&self) -> &RBUF { + pub const fn rbuf(&self) -> &Rbuf { &self.rbuf } #[doc = "0x58 - Receiver Buffer Register for Debugger"] #[inline(always)] - pub const fn rbufd(&self) -> &RBUFD { + pub const fn rbufd(&self) -> &Rbufd { &self.rbufd } #[doc = "0x5c - Receiver Buffer Register 0"] #[inline(always)] - pub const fn rbuf0(&self) -> &RBUF0 { + pub const fn rbuf0(&self) -> &Rbuf0 { &self.rbuf0 } #[doc = "0x60 - Receiver Buffer Register 1"] #[inline(always)] - pub const fn rbuf1(&self) -> &RBUF1 { + pub const fn rbuf1(&self) -> &Rbuf1 { &self.rbuf1 } #[doc = "0x64 - Receiver Buffer 01 Status Register"] #[inline(always)] - pub const fn rbuf01sr(&self) -> &RBUF01SR { + pub const fn rbuf01sr(&self) -> &Rbuf01sr { &self.rbuf01sr } #[doc = "0x68 - Flag Modification Register"] #[inline(always)] - pub const fn fmr(&self) -> &FMR { + pub const fn fmr(&self) -> &Fmr { &self.fmr } #[doc = "0x80..0x100 - Transmit Buffer"] #[inline(always)] - pub const fn tbuf(&self, n: usize) -> &TBUF { + pub const fn tbuf(&self, n: usize) -> &Tbuf { &self.tbuf[n] } #[doc = "Iterator for array of:"] #[doc = "0x80..0x100 - Transmit Buffer"] #[inline(always)] - pub fn tbuf_iter(&self) -> impl Iterator { + pub fn tbuf_iter(&self) -> impl Iterator { self.tbuf.iter() } #[doc = "0x100 - Bypass Data Register"] #[inline(always)] - pub const fn byp(&self) -> &BYP { + pub const fn byp(&self) -> &Byp { &self.byp } #[doc = "0x104 - Bypass Control Register"] #[inline(always)] - pub const fn bypcr(&self) -> &BYPCR { + pub const fn bypcr(&self) -> &Bypcr { &self.bypcr } #[doc = "0x108 - Transmitter Buffer Control Register"] #[inline(always)] - pub const fn tbctr(&self) -> &TBCTR { + pub const fn tbctr(&self) -> &Tbctr { &self.tbctr } #[doc = "0x10c - Receiver Buffer Control Register"] #[inline(always)] - pub const fn rbctr(&self) -> &RBCTR { + pub const fn rbctr(&self) -> &Rbctr { &self.rbctr } #[doc = "0x110 - Transmit/Receive Buffer Pointer Register"] #[inline(always)] - pub const fn trbptr(&self) -> &TRBPTR { + pub const fn trbptr(&self) -> &Trbptr { &self.trbptr } #[doc = "0x114 - Transmit/Receive Buffer Status Register"] #[inline(always)] - pub const fn trbsr(&self) -> &TRBSR { + pub const fn trbsr(&self) -> &Trbsr { &self.trbsr } #[doc = "0x118 - Transmit/Receive Buffer Status Clear Register"] #[inline(always)] - pub const fn trbscr(&self) -> &TRBSCR { + pub const fn trbscr(&self) -> &Trbscr { &self.trbscr } #[doc = "0x11c - Receiver Buffer Output Register"] #[inline(always)] - pub const fn outr(&self) -> &OUTR { + pub const fn outr(&self) -> &Outr { &self.outr } #[doc = "0x120 - Receiver Buffer Output Register L for Debugger"] #[inline(always)] - pub const fn outdr(&self) -> &OUTDR { + pub const fn outdr(&self) -> &Outdr { &self.outdr } #[doc = "0x180..0x200 - Transmit FIFO Buffer"] #[inline(always)] - pub const fn in_(&self, n: usize) -> &IN { + pub const fn in_(&self, n: usize) -> &In { &self.in_[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x200 - Transmit FIFO Buffer"] #[inline(always)] - pub fn in__iter(&self) -> impl Iterator { + pub fn in__iter(&self) -> impl Iterator { self.in_.iter() } } #[doc = "CCFG (r) register accessor: Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccfg`] module"] -pub type CCFG = crate::Reg; +#[doc(alias = "CCFG")] +pub type Ccfg = crate::Reg; #[doc = "Channel Configuration Register"] pub mod ccfg; #[doc = "KSCFG (rw) register accessor: Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@kscfg`] module"] -pub type KSCFG = crate::Reg; +#[doc(alias = "KSCFG")] +pub type Kscfg = crate::Reg; #[doc = "Kernel State Configuration Register"] pub mod kscfg; #[doc = "FDR (rw) register accessor: Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] -pub type FDR = crate::Reg; +#[doc(alias = "FDR")] +pub type Fdr = crate::Reg; #[doc = "Fractional Divider Register"] pub mod fdr; #[doc = "BRG (rw) register accessor: Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brg`] module"] -pub type BRG = crate::Reg; +#[doc(alias = "BRG")] +pub type Brg = crate::Reg; #[doc = "Baud Rate Generator Register"] pub mod brg; #[doc = "INPR (rw) register accessor: Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inpr`] module"] -pub type INPR = crate::Reg; +#[doc(alias = "INPR")] +pub type Inpr = crate::Reg; #[doc = "Interrupt Node Pointer Register"] pub mod inpr; #[doc = "DX0CR (rw) register accessor: Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx0cr`] module"] -pub type DX0CR = crate::Reg; +#[doc(alias = "DX0CR")] +pub type Dx0cr = crate::Reg; #[doc = "Input Control Register 0"] pub mod dx0cr; #[doc = "DX1CR (rw) register accessor: Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx1cr`] module"] -pub type DX1CR = crate::Reg; +#[doc(alias = "DX1CR")] +pub type Dx1cr = crate::Reg; #[doc = "Input Control Register 1"] pub mod dx1cr; #[doc = "DX2CR (rw) register accessor: Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx2cr`] module"] -pub type DX2CR = crate::Reg; +#[doc(alias = "DX2CR")] +pub type Dx2cr = crate::Reg; #[doc = "Input Control Register 2"] pub mod dx2cr; #[doc = "DX3CR (rw) register accessor: Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx3cr`] module"] -pub type DX3CR = crate::Reg; +#[doc(alias = "DX3CR")] +pub type Dx3cr = crate::Reg; #[doc = "Input Control Register 3"] pub mod dx3cr; #[doc = "DX4CR (rw) register accessor: Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx4cr`] module"] -pub type DX4CR = crate::Reg; +#[doc(alias = "DX4CR")] +pub type Dx4cr = crate::Reg; #[doc = "Input Control Register 4"] pub mod dx4cr; #[doc = "DX5CR (rw) register accessor: Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx5cr`] module"] -pub type DX5CR = crate::Reg; +#[doc(alias = "DX5CR")] +pub type Dx5cr = crate::Reg; #[doc = "Input Control Register 5"] pub mod dx5cr; #[doc = "SCTR (rw) register accessor: Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctr`] module"] -pub type SCTR = crate::Reg; +#[doc(alias = "SCTR")] +pub type Sctr = crate::Reg; #[doc = "Shift Control Register"] pub mod sctr; #[doc = "TCSR (rw) register accessor: Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcsr`] module"] -pub type TCSR = crate::Reg; +#[doc(alias = "TCSR")] +pub type Tcsr = crate::Reg; #[doc = "Transmit Control/Status Register"] pub mod tcsr; #[doc = "PCR (rw) register accessor: Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`] module"] -pub type PCR = crate::Reg; +#[doc(alias = "PCR")] +pub type Pcr = crate::Reg; #[doc = "Protocol Control Register"] pub mod pcr; #[doc = "PCR_ASCMode (rw) register accessor: Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_ascmode`] module"] -pub type PCR_ASCMODE = crate::Reg; +#[doc(alias = "PCR_ASCMode")] +pub type PcrAscmode = crate::Reg; #[doc = "Protocol Control Register \\[ASC Mode\\]"] pub mod pcr_ascmode; #[doc = "PCR_SSCMode (rw) register accessor: Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_sscmode`] module"] -pub type PCR_SSCMODE = crate::Reg; +#[doc(alias = "PCR_SSCMode")] +pub type PcrSscmode = crate::Reg; #[doc = "Protocol Control Register \\[SSC Mode\\]"] pub mod pcr_sscmode; #[doc = "PCR_IICMode (rw) register accessor: Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iicmode`] module"] -pub type PCR_IICMODE = crate::Reg; +#[doc(alias = "PCR_IICMode")] +pub type PcrIicmode = crate::Reg; #[doc = "Protocol Control Register \\[IIC Mode\\]"] pub mod pcr_iicmode; #[doc = "PCR_IISMode (rw) register accessor: Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iismode`] module"] -pub type PCR_IISMODE = crate::Reg; +#[doc(alias = "PCR_IISMode")] +pub type PcrIismode = crate::Reg; #[doc = "Protocol Control Register \\[IIS Mode\\]"] pub mod pcr_iismode; #[doc = "CCR (rw) register accessor: Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] -pub type CCR = crate::Reg; +#[doc(alias = "CCR")] +pub type Ccr = crate::Reg; #[doc = "Channel Control Register"] pub mod ccr; #[doc = "CMTR (rw) register accessor: Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmtr`] module"] -pub type CMTR = crate::Reg; +#[doc(alias = "CMTR")] +pub type Cmtr = crate::Reg; #[doc = "Capture Mode Timer Register"] pub mod cmtr; #[doc = "PSR (rw) register accessor: Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`] module"] -pub type PSR = crate::Reg; +#[doc(alias = "PSR")] +pub type Psr = crate::Reg; #[doc = "Protocol Status Register"] pub mod psr; #[doc = "PSR_ASCMode (rw) register accessor: Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_ascmode`] module"] -pub type PSR_ASCMODE = crate::Reg; +#[doc(alias = "PSR_ASCMode")] +pub type PsrAscmode = crate::Reg; #[doc = "Protocol Status Register \\[ASC Mode\\]"] pub mod psr_ascmode; #[doc = "PSR_SSCMode (rw) register accessor: Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_sscmode`] module"] -pub type PSR_SSCMODE = crate::Reg; +#[doc(alias = "PSR_SSCMode")] +pub type PsrSscmode = crate::Reg; #[doc = "Protocol Status Register \\[SSC Mode\\]"] pub mod psr_sscmode; #[doc = "PSR_IICMode (rw) register accessor: Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iicmode`] module"] -pub type PSR_IICMODE = crate::Reg; +#[doc(alias = "PSR_IICMode")] +pub type PsrIicmode = crate::Reg; #[doc = "Protocol Status Register \\[IIC Mode\\]"] pub mod psr_iicmode; #[doc = "PSR_IISMode (rw) register accessor: Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iismode`] module"] -pub type PSR_IISMODE = crate::Reg; +#[doc(alias = "PSR_IISMode")] +pub type PsrIismode = crate::Reg; #[doc = "Protocol Status Register \\[IIS Mode\\]"] pub mod psr_iismode; #[doc = "PSCR (w) register accessor: Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pscr`] module"] -pub type PSCR = crate::Reg; +#[doc(alias = "PSCR")] +pub type Pscr = crate::Reg; #[doc = "Protocol Status Clear Register"] pub mod pscr; #[doc = "RBUFSR (r) register accessor: Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufsr`] module"] -pub type RBUFSR = crate::Reg; +#[doc(alias = "RBUFSR")] +pub type Rbufsr = crate::Reg; #[doc = "Receiver Buffer Status Register"] pub mod rbufsr; #[doc = "RBUF (r) register accessor: Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf`] module"] -pub type RBUF = crate::Reg; +#[doc(alias = "RBUF")] +pub type Rbuf = crate::Reg; #[doc = "Receiver Buffer Register"] pub mod rbuf; #[doc = "RBUFD (r) register accessor: Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufd`] module"] -pub type RBUFD = crate::Reg; +#[doc(alias = "RBUFD")] +pub type Rbufd = crate::Reg; #[doc = "Receiver Buffer Register for Debugger"] pub mod rbufd; #[doc = "RBUF0 (r) register accessor: Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf0`] module"] -pub type RBUF0 = crate::Reg; +#[doc(alias = "RBUF0")] +pub type Rbuf0 = crate::Reg; #[doc = "Receiver Buffer Register 0"] pub mod rbuf0; #[doc = "RBUF1 (r) register accessor: Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf1`] module"] -pub type RBUF1 = crate::Reg; +#[doc(alias = "RBUF1")] +pub type Rbuf1 = crate::Reg; #[doc = "Receiver Buffer Register 1"] pub mod rbuf1; #[doc = "RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf01sr`] module"] -pub type RBUF01SR = crate::Reg; +#[doc(alias = "RBUF01SR")] +pub type Rbuf01sr = crate::Reg; #[doc = "Receiver Buffer 01 Status Register"] pub mod rbuf01sr; #[doc = "FMR (w) register accessor: Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmr`] module"] -pub type FMR = crate::Reg; +#[doc(alias = "FMR")] +pub type Fmr = crate::Reg; #[doc = "Flag Modification Register"] pub mod fmr; #[doc = "TBUF (rw) register accessor: Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbuf`] module"] -pub type TBUF = crate::Reg; +#[doc(alias = "TBUF")] +pub type Tbuf = crate::Reg; #[doc = "Transmit Buffer"] pub mod tbuf; #[doc = "BYP (rw) register accessor: Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@byp`] module"] -pub type BYP = crate::Reg; +#[doc(alias = "BYP")] +pub type Byp = crate::Reg; #[doc = "Bypass Data Register"] pub mod byp; #[doc = "BYPCR (rw) register accessor: Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bypcr`] module"] -pub type BYPCR = crate::Reg; +#[doc(alias = "BYPCR")] +pub type Bypcr = crate::Reg; #[doc = "Bypass Control Register"] pub mod bypcr; #[doc = "TBCTR (rw) register accessor: Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbctr`] module"] -pub type TBCTR = crate::Reg; +#[doc(alias = "TBCTR")] +pub type Tbctr = crate::Reg; #[doc = "Transmitter Buffer Control Register"] pub mod tbctr; #[doc = "RBCTR (rw) register accessor: Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbctr`] module"] -pub type RBCTR = crate::Reg; +#[doc(alias = "RBCTR")] +pub type Rbctr = crate::Reg; #[doc = "Receiver Buffer Control Register"] pub mod rbctr; #[doc = "TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbptr`] module"] -pub type TRBPTR = crate::Reg; +#[doc(alias = "TRBPTR")] +pub type Trbptr = crate::Reg; #[doc = "Transmit/Receive Buffer Pointer Register"] pub mod trbptr; #[doc = "TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbsr`] module"] -pub type TRBSR = crate::Reg; +#[doc(alias = "TRBSR")] +pub type Trbsr = crate::Reg; #[doc = "Transmit/Receive Buffer Status Register"] pub mod trbsr; #[doc = "TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbscr`] module"] -pub type TRBSCR = crate::Reg; +#[doc(alias = "TRBSCR")] +pub type Trbscr = crate::Reg; #[doc = "Transmit/Receive Buffer Status Clear Register"] pub mod trbscr; #[doc = "OUTR (r) register accessor: Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outr`] module"] -pub type OUTR = crate::Reg; +#[doc(alias = "OUTR")] +pub type Outr = crate::Reg; #[doc = "Receiver Buffer Output Register"] pub mod outr; #[doc = "OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outdr`] module"] -pub type OUTDR = crate::Reg; +#[doc(alias = "OUTDR")] +pub type Outdr = crate::Reg; #[doc = "Receiver Buffer Output Register L for Debugger"] pub mod outdr; #[doc = "IN (w) register accessor: Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -pub type IN = crate::Reg; +#[doc(alias = "IN")] +pub type In = crate::Reg; #[doc = "Transmit FIFO Buffer"] pub mod in_; diff --git a/src/usic0_ch0/brg.rs b/src/usic0_ch0/brg.rs index 2002d28f..88018626 100644 --- a/src/usic0_ch0/brg.rs +++ b/src/usic0_ch0/brg.rs @@ -1,59 +1,59 @@ #[doc = "Register `BRG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRG` writer"] -pub type W = crate::W; -#[doc = "Field `CLKSEL` reader - Clock Selection"] -pub type CLKSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CLKSEL_A { +pub enum Clksel { #[doc = "0: The fractional divider frequency fFD is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "2: The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CLKSEL_A) -> Self { + fn from(variant: Clksel) -> Self { variant as _ } } -impl crate::FieldSpec for CLKSEL_A { +impl crate::FieldSpec for Clksel { type Ux = u8; } -impl CLKSEL_R { +#[doc = "Field `CLKSEL` reader - Clock Selection"] +pub type ClkselR = crate::FieldReader; +impl ClkselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CLKSEL_A::VALUE1), - 2 => Some(CLKSEL_A::VALUE3), - 3 => Some(CLKSEL_A::VALUE4), + 0 => Some(Clksel::Value1), + 2 => Some(Clksel::Value3), + 3 => Some(Clksel::Value4), _ => None, } } #[doc = "The fractional divider frequency fFD is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CLKSEL_A::VALUE1 + *self == Clksel::Value1 } #[doc = "The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CLKSEL_A::VALUE3 + *self == Clksel::Value3 } #[doc = "Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CLKSEL_A::VALUE4 + *self == Clksel::Value4 } } #[doc = "Field `CLKSEL` writer - Clock Selection"] -pub type CLKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CLKSEL_A>; -impl<'a, REG> CLKSEL_W<'a, REG> +pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; +impl<'a, REG> ClkselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,185 +61,185 @@ where #[doc = "The fractional divider frequency fFD is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE1) + self.variant(Clksel::Value1) } #[doc = "The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE3) + self.variant(Clksel::Value3) } #[doc = "Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CLKSEL_A::VALUE4) + self.variant(Clksel::Value4) } } -#[doc = "Field `TMEN` reader - Timing Measurement Enable"] -pub type TMEN_R = crate::BitReader; #[doc = "Timing Measurement Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TMEN_A { +pub enum Tmen { #[doc = "0: Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TMEN_A) -> Self { + fn from(variant: Tmen) -> Self { variant as u8 != 0 } } -impl TMEN_R { +#[doc = "Field `TMEN` reader - Timing Measurement Enable"] +pub type TmenR = crate::BitReader; +impl TmenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TMEN_A { + pub const fn variant(&self) -> Tmen { match self.bits { - false => TMEN_A::VALUE1, - true => TMEN_A::VALUE2, + false => Tmen::Value1, + true => Tmen::Value2, } } #[doc = "Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TMEN_A::VALUE1 + *self == Tmen::Value1 } #[doc = "Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TMEN_A::VALUE2 + *self == Tmen::Value2 } } #[doc = "Field `TMEN` writer - Timing Measurement Enable"] -pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; -impl<'a, REG> TMEN_W<'a, REG> +pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; +impl<'a, REG> TmenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE1) + self.variant(Tmen::Value1) } #[doc = "Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE2) + self.variant(Tmen::Value2) } } -#[doc = "Field `PPPEN` reader - Enable 2:1 Divider for fPPP"] -pub type PPPEN_R = crate::BitReader; #[doc = "Enable 2:1 Divider for fPPP\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PPPEN_A { +pub enum Pppen { #[doc = "0: The 2:1 divider for fPPP is disabled. fPPP = fPIN"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PPPEN_A) -> Self { + fn from(variant: Pppen) -> Self { variant as u8 != 0 } } -impl PPPEN_R { +#[doc = "Field `PPPEN` reader - Enable 2:1 Divider for fPPP"] +pub type PppenR = crate::BitReader; +impl PppenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PPPEN_A { + pub const fn variant(&self) -> Pppen { match self.bits { - false => PPPEN_A::VALUE1, - true => PPPEN_A::VALUE2, + false => Pppen::Value1, + true => Pppen::Value2, } } #[doc = "The 2:1 divider for fPPP is disabled. fPPP = fPIN"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PPPEN_A::VALUE1 + *self == Pppen::Value1 } #[doc = "The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PPPEN_A::VALUE2 + *self == Pppen::Value2 } } #[doc = "Field `PPPEN` writer - Enable 2:1 Divider for fPPP"] -pub type PPPEN_W<'a, REG> = crate::BitWriter<'a, REG, PPPEN_A>; -impl<'a, REG> PPPEN_W<'a, REG> +pub type PppenW<'a, REG> = crate::BitWriter<'a, REG, Pppen>; +impl<'a, REG> PppenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The 2:1 divider for fPPP is disabled. fPPP = fPIN"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PPPEN_A::VALUE1) + self.variant(Pppen::Value1) } #[doc = "The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PPPEN_A::VALUE2) + self.variant(Pppen::Value2) } } -#[doc = "Field `CTQSEL` reader - Input Selection for CTQ"] -pub type CTQSEL_R = crate::FieldReader; #[doc = "Input Selection for CTQ\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CTQSEL_A { +pub enum Ctqsel { #[doc = "0: fCTQIN = fPDIV"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCTQIN = fPPP"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fCTQIN = fSCLK"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: fCTQIN = fMCLK"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CTQSEL_A) -> Self { + fn from(variant: Ctqsel) -> Self { variant as _ } } -impl crate::FieldSpec for CTQSEL_A { +impl crate::FieldSpec for Ctqsel { type Ux = u8; } -impl CTQSEL_R { +#[doc = "Field `CTQSEL` reader - Input Selection for CTQ"] +pub type CtqselR = crate::FieldReader; +impl CtqselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CTQSEL_A { + pub const fn variant(&self) -> Ctqsel { match self.bits { - 0 => CTQSEL_A::VALUE1, - 1 => CTQSEL_A::VALUE2, - 2 => CTQSEL_A::VALUE3, - 3 => CTQSEL_A::VALUE4, + 0 => Ctqsel::Value1, + 1 => Ctqsel::Value2, + 2 => Ctqsel::Value3, + 3 => Ctqsel::Value4, _ => unreachable!(), } } #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CTQSEL_A::VALUE1 + *self == Ctqsel::Value1 } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CTQSEL_A::VALUE2 + *self == Ctqsel::Value2 } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CTQSEL_A::VALUE3 + *self == Ctqsel::Value3 } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CTQSEL_A::VALUE4 + *self == Ctqsel::Value4 } } #[doc = "Field `CTQSEL` writer - Input Selection for CTQ"] -pub type CTQSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CTQSEL_A>; -impl<'a, REG> CTQSEL_W<'a, REG> +pub type CtqselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ctqsel>; +impl<'a, REG> CtqselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,202 +247,202 @@ where #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTQSEL_A::VALUE1) + self.variant(Ctqsel::Value1) } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTQSEL_A::VALUE2) + self.variant(Ctqsel::Value2) } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CTQSEL_A::VALUE3) + self.variant(Ctqsel::Value3) } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CTQSEL_A::VALUE4) + self.variant(Ctqsel::Value4) } } #[doc = "Field `PCTQ` reader - Pre-Divider for Time Quanta Counter"] -pub type PCTQ_R = crate::FieldReader; +pub type PctqR = crate::FieldReader; #[doc = "Field `PCTQ` writer - Pre-Divider for Time Quanta Counter"] -pub type PCTQ_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PctqW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DCTQ` reader - Denominator for Time Quanta Counter"] -pub type DCTQ_R = crate::FieldReader; +pub type DctqR = crate::FieldReader; #[doc = "Field `DCTQ` writer - Denominator for Time Quanta Counter"] -pub type DCTQ_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DctqW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PDIV` reader - Divider Mode: Divider Factor to Generate fPDIV"] -pub type PDIV_R = crate::FieldReader; +pub type PdivR = crate::FieldReader; #[doc = "Field `PDIV` writer - Divider Mode: Divider Factor to Generate fPDIV"] -pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; -#[doc = "Field `SCLKOSEL` reader - Shift Clock Output Select"] -pub type SCLKOSEL_R = crate::BitReader; +pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Shift Clock Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCLKOSEL_A { +pub enum Sclkosel { #[doc = "0: SCLK from the baud rate generator is selected as the SCLKOUT input source."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCLKOSEL_A) -> Self { + fn from(variant: Sclkosel) -> Self { variant as u8 != 0 } } -impl SCLKOSEL_R { +#[doc = "Field `SCLKOSEL` reader - Shift Clock Output Select"] +pub type SclkoselR = crate::BitReader; +impl SclkoselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCLKOSEL_A { + pub const fn variant(&self) -> Sclkosel { match self.bits { - false => SCLKOSEL_A::VALUE1, - true => SCLKOSEL_A::VALUE2, + false => Sclkosel::Value1, + true => Sclkosel::Value2, } } #[doc = "SCLK from the baud rate generator is selected as the SCLKOUT input source."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCLKOSEL_A::VALUE1 + *self == Sclkosel::Value1 } #[doc = "The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCLKOSEL_A::VALUE2 + *self == Sclkosel::Value2 } } #[doc = "Field `SCLKOSEL` writer - Shift Clock Output Select"] -pub type SCLKOSEL_W<'a, REG> = crate::BitWriter<'a, REG, SCLKOSEL_A>; -impl<'a, REG> SCLKOSEL_W<'a, REG> +pub type SclkoselW<'a, REG> = crate::BitWriter<'a, REG, Sclkosel>; +impl<'a, REG> SclkoselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SCLK from the baud rate generator is selected as the SCLKOUT input source."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCLKOSEL_A::VALUE1) + self.variant(Sclkosel::Value1) } #[doc = "The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCLKOSEL_A::VALUE2) + self.variant(Sclkosel::Value2) } } -#[doc = "Field `MCLKCFG` reader - Master Clock Configuration"] -pub type MCLKCFG_R = crate::BitReader; #[doc = "Master Clock Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCLKCFG_A { +pub enum Mclkcfg { #[doc = "0: The passive level is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The passive level is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCLKCFG_A) -> Self { + fn from(variant: Mclkcfg) -> Self { variant as u8 != 0 } } -impl MCLKCFG_R { +#[doc = "Field `MCLKCFG` reader - Master Clock Configuration"] +pub type MclkcfgR = crate::BitReader; +impl MclkcfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCLKCFG_A { + pub const fn variant(&self) -> Mclkcfg { match self.bits { - false => MCLKCFG_A::VALUE1, - true => MCLKCFG_A::VALUE2, + false => Mclkcfg::Value1, + true => Mclkcfg::Value2, } } #[doc = "The passive level is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCLKCFG_A::VALUE1 + *self == Mclkcfg::Value1 } #[doc = "The passive level is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCLKCFG_A::VALUE2 + *self == Mclkcfg::Value2 } } #[doc = "Field `MCLKCFG` writer - Master Clock Configuration"] -pub type MCLKCFG_W<'a, REG> = crate::BitWriter<'a, REG, MCLKCFG_A>; -impl<'a, REG> MCLKCFG_W<'a, REG> +pub type MclkcfgW<'a, REG> = crate::BitWriter<'a, REG, Mclkcfg>; +impl<'a, REG> MclkcfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The passive level is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCLKCFG_A::VALUE1) + self.variant(Mclkcfg::Value1) } #[doc = "The passive level is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCLKCFG_A::VALUE2) + self.variant(Mclkcfg::Value2) } } -#[doc = "Field `SCLKCFG` reader - Shift Clock Output Configuration"] -pub type SCLKCFG_R = crate::FieldReader; #[doc = "Shift Clock Output Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SCLKCFG_A { +pub enum Sclkcfg { #[doc = "0: The passive level is 0 and the delay is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The passive level is 1 and the delay is disabled."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The passive level is 0 and the delay is enabled."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The passive level is 1 and the delay is enabled."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SCLKCFG_A) -> Self { + fn from(variant: Sclkcfg) -> Self { variant as _ } } -impl crate::FieldSpec for SCLKCFG_A { +impl crate::FieldSpec for Sclkcfg { type Ux = u8; } -impl SCLKCFG_R { +#[doc = "Field `SCLKCFG` reader - Shift Clock Output Configuration"] +pub type SclkcfgR = crate::FieldReader; +impl SclkcfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCLKCFG_A { + pub const fn variant(&self) -> Sclkcfg { match self.bits { - 0 => SCLKCFG_A::VALUE1, - 1 => SCLKCFG_A::VALUE2, - 2 => SCLKCFG_A::VALUE3, - 3 => SCLKCFG_A::VALUE4, + 0 => Sclkcfg::Value1, + 1 => Sclkcfg::Value2, + 2 => Sclkcfg::Value3, + 3 => Sclkcfg::Value4, _ => unreachable!(), } } #[doc = "The passive level is 0 and the delay is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCLKCFG_A::VALUE1 + *self == Sclkcfg::Value1 } #[doc = "The passive level is 1 and the delay is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCLKCFG_A::VALUE2 + *self == Sclkcfg::Value2 } #[doc = "The passive level is 0 and the delay is enabled."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SCLKCFG_A::VALUE3 + *self == Sclkcfg::Value3 } #[doc = "The passive level is 1 and the delay is enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SCLKCFG_A::VALUE4 + *self == Sclkcfg::Value4 } } #[doc = "Field `SCLKCFG` writer - Shift Clock Output Configuration"] -pub type SCLKCFG_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, SCLKCFG_A>; -impl<'a, REG> SCLKCFG_W<'a, REG> +pub type SclkcfgW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Sclkcfg>; +impl<'a, REG> SclkcfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,161 +450,152 @@ where #[doc = "The passive level is 0 and the delay is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCLKCFG_A::VALUE1) + self.variant(Sclkcfg::Value1) } #[doc = "The passive level is 1 and the delay is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCLKCFG_A::VALUE2) + self.variant(Sclkcfg::Value2) } #[doc = "The passive level is 0 and the delay is enabled."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SCLKCFG_A::VALUE3) + self.variant(Sclkcfg::Value3) } #[doc = "The passive level is 1 and the delay is enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SCLKCFG_A::VALUE4) + self.variant(Sclkcfg::Value4) } } impl R { #[doc = "Bits 0:1 - Clock Selection"] #[inline(always)] - pub fn clksel(&self) -> CLKSEL_R { - CLKSEL_R::new((self.bits & 3) as u8) + pub fn clksel(&self) -> ClkselR { + ClkselR::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timing Measurement Enable"] #[inline(always)] - pub fn tmen(&self) -> TMEN_R { - TMEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn tmen(&self) -> TmenR { + TmenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"] #[inline(always)] - pub fn pppen(&self) -> PPPEN_R { - PPPEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn pppen(&self) -> PppenR { + PppenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 6:7 - Input Selection for CTQ"] #[inline(always)] - pub fn ctqsel(&self) -> CTQSEL_R { - CTQSEL_R::new(((self.bits >> 6) & 3) as u8) + pub fn ctqsel(&self) -> CtqselR { + CtqselR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"] #[inline(always)] - pub fn pctq(&self) -> PCTQ_R { - PCTQ_R::new(((self.bits >> 8) & 3) as u8) + pub fn pctq(&self) -> PctqR { + PctqR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"] #[inline(always)] - pub fn dctq(&self) -> DCTQ_R { - DCTQ_R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn dctq(&self) -> DctqR { + DctqR::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"] #[inline(always)] - pub fn pdiv(&self) -> PDIV_R { - PDIV_R::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn pdiv(&self) -> PdivR { + PdivR::new(((self.bits >> 16) & 0x03ff) as u16) } #[doc = "Bit 28 - Shift Clock Output Select"] #[inline(always)] - pub fn sclkosel(&self) -> SCLKOSEL_R { - SCLKOSEL_R::new(((self.bits >> 28) & 1) != 0) + pub fn sclkosel(&self) -> SclkoselR { + SclkoselR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Master Clock Configuration"] #[inline(always)] - pub fn mclkcfg(&self) -> MCLKCFG_R { - MCLKCFG_R::new(((self.bits >> 29) & 1) != 0) + pub fn mclkcfg(&self) -> MclkcfgR { + MclkcfgR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bits 30:31 - Shift Clock Output Configuration"] #[inline(always)] - pub fn sclkcfg(&self) -> SCLKCFG_R { - SCLKCFG_R::new(((self.bits >> 30) & 3) as u8) + pub fn sclkcfg(&self) -> SclkcfgR { + SclkcfgR::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Selection"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> CLKSEL_W { - CLKSEL_W::new(self, 0) + pub fn clksel(&mut self) -> ClkselW { + ClkselW::new(self, 0) } #[doc = "Bit 3 - Timing Measurement Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TMEN_W { - TMEN_W::new(self, 3) + pub fn tmen(&mut self) -> TmenW { + TmenW::new(self, 3) } #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"] #[inline(always)] #[must_use] - pub fn pppen(&mut self) -> PPPEN_W { - PPPEN_W::new(self, 4) + pub fn pppen(&mut self) -> PppenW { + PppenW::new(self, 4) } #[doc = "Bits 6:7 - Input Selection for CTQ"] #[inline(always)] #[must_use] - pub fn ctqsel(&mut self) -> CTQSEL_W { - CTQSEL_W::new(self, 6) + pub fn ctqsel(&mut self) -> CtqselW { + CtqselW::new(self, 6) } #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"] #[inline(always)] #[must_use] - pub fn pctq(&mut self) -> PCTQ_W { - PCTQ_W::new(self, 8) + pub fn pctq(&mut self) -> PctqW { + PctqW::new(self, 8) } #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"] #[inline(always)] #[must_use] - pub fn dctq(&mut self) -> DCTQ_W { - DCTQ_W::new(self, 10) + pub fn dctq(&mut self) -> DctqW { + DctqW::new(self, 10) } #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PDIV_W { - PDIV_W::new(self, 16) + pub fn pdiv(&mut self) -> PdivW { + PdivW::new(self, 16) } #[doc = "Bit 28 - Shift Clock Output Select"] #[inline(always)] #[must_use] - pub fn sclkosel(&mut self) -> SCLKOSEL_W { - SCLKOSEL_W::new(self, 28) + pub fn sclkosel(&mut self) -> SclkoselW { + SclkoselW::new(self, 28) } #[doc = "Bit 29 - Master Clock Configuration"] #[inline(always)] #[must_use] - pub fn mclkcfg(&mut self) -> MCLKCFG_W { - MCLKCFG_W::new(self, 29) + pub fn mclkcfg(&mut self) -> MclkcfgW { + MclkcfgW::new(self, 29) } #[doc = "Bits 30:31 - Shift Clock Output Configuration"] #[inline(always)] #[must_use] - pub fn sclkcfg(&mut self) -> SCLKCFG_W { - SCLKCFG_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sclkcfg(&mut self) -> SclkcfgW { + SclkcfgW::new(self, 30) } } #[doc = "Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BRG_SPEC; -impl crate::RegisterSpec for BRG_SPEC { +pub struct BrgSpec; +impl crate::RegisterSpec for BrgSpec { type Ux = u32; } #[doc = "`read()` method returns [`brg::R`](R) reader structure"] -impl crate::Readable for BRG_SPEC {} +impl crate::Readable for BrgSpec {} #[doc = "`write(|w| ..)` method takes [`brg::W`](W) writer structure"] -impl crate::Writable for BRG_SPEC { +impl crate::Writable for BrgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRG to value 0"] -impl crate::Resettable for BRG_SPEC { +impl crate::Resettable for BrgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/byp.rs b/src/usic0_ch0/byp.rs index b3fabd2d..4b45e1a9 100644 --- a/src/usic0_ch0/byp.rs +++ b/src/usic0_ch0/byp.rs @@ -1,49 +1,40 @@ #[doc = "Register `BYP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BYP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BDATA` reader - Bypass Data"] -pub type BDATA_R = crate::FieldReader; +pub type BdataR = crate::FieldReader; #[doc = "Field `BDATA` writer - Bypass Data"] -pub type BDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type BdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Bypass Data"] #[inline(always)] - pub fn bdata(&self) -> BDATA_R { - BDATA_R::new((self.bits & 0xffff) as u16) + pub fn bdata(&self) -> BdataR { + BdataR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Bypass Data"] #[inline(always)] #[must_use] - pub fn bdata(&mut self) -> BDATA_W { - BDATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bdata(&mut self) -> BdataW { + BdataW::new(self, 0) } } #[doc = "Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BYP_SPEC; -impl crate::RegisterSpec for BYP_SPEC { +pub struct BypSpec; +impl crate::RegisterSpec for BypSpec { type Ux = u32; } #[doc = "`read()` method returns [`byp::R`](R) reader structure"] -impl crate::Readable for BYP_SPEC {} +impl crate::Readable for BypSpec {} #[doc = "`write(|w| ..)` method takes [`byp::W`](W) writer structure"] -impl crate::Writable for BYP_SPEC { +impl crate::Writable for BypSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BYP to value 0"] -impl crate::Resettable for BYP_SPEC { +impl crate::Resettable for BypSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/bypcr.rs b/src/usic0_ch0/bypcr.rs index 64d97a22..3732c7c4 100644 --- a/src/usic0_ch0/bypcr.rs +++ b/src/usic0_ch0/bypcr.rs @@ -1,124 +1,124 @@ #[doc = "Register `BYPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BYPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BWLE` reader - Bypass Word Length"] -pub type BWLE_R = crate::FieldReader; +pub type BwleR = crate::FieldReader; #[doc = "Field `BWLE` writer - Bypass Word Length"] -pub type BWLE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `BDSSM` reader - Bypass Data Single Shot Mode"] -pub type BDSSM_R = crate::BitReader; +pub type BwleW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Bypass Data Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BDSSM_A { +pub enum Bdssm { #[doc = "0: The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BDSSM_A) -> Self { + fn from(variant: Bdssm) -> Self { variant as u8 != 0 } } -impl BDSSM_R { +#[doc = "Field `BDSSM` reader - Bypass Data Single Shot Mode"] +pub type BdssmR = crate::BitReader; +impl BdssmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BDSSM_A { + pub const fn variant(&self) -> Bdssm { match self.bits { - false => BDSSM_A::VALUE1, - true => BDSSM_A::VALUE2, + false => Bdssm::Value1, + true => Bdssm::Value2, } } #[doc = "The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BDSSM_A::VALUE1 + *self == Bdssm::Value1 } #[doc = "The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BDSSM_A::VALUE2 + *self == Bdssm::Value2 } } #[doc = "Field `BDSSM` writer - Bypass Data Single Shot Mode"] -pub type BDSSM_W<'a, REG> = crate::BitWriter<'a, REG, BDSSM_A>; -impl<'a, REG> BDSSM_W<'a, REG> +pub type BdssmW<'a, REG> = crate::BitWriter<'a, REG, Bdssm>; +impl<'a, REG> BdssmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BDSSM_A::VALUE1) + self.variant(Bdssm::Value1) } #[doc = "The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BDSSM_A::VALUE2) + self.variant(Bdssm::Value2) } } -#[doc = "Field `BDEN` reader - Bypass Data Enable"] -pub type BDEN_R = crate::FieldReader; #[doc = "Bypass Data Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BDEN_A { +pub enum Bden { #[doc = "0: The transfer of bypass data is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BDEN_A) -> Self { + fn from(variant: Bden) -> Self { variant as _ } } -impl crate::FieldSpec for BDEN_A { +impl crate::FieldSpec for Bden { type Ux = u8; } -impl BDEN_R { +#[doc = "Field `BDEN` reader - Bypass Data Enable"] +pub type BdenR = crate::FieldReader; +impl BdenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BDEN_A { + pub const fn variant(&self) -> Bden { match self.bits { - 0 => BDEN_A::VALUE1, - 1 => BDEN_A::VALUE2, - 2 => BDEN_A::VALUE3, - 3 => BDEN_A::VALUE4, + 0 => Bden::Value1, + 1 => Bden::Value2, + 2 => Bden::Value3, + 3 => Bden::Value4, _ => unreachable!(), } } #[doc = "The transfer of bypass data is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BDEN_A::VALUE1 + *self == Bden::Value1 } #[doc = "The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BDEN_A::VALUE2 + *self == Bden::Value2 } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BDEN_A::VALUE3 + *self == Bden::Value3 } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BDEN_A::VALUE4 + *self == Bden::Value4 } } #[doc = "Field `BDEN` writer - Bypass Data Enable"] -pub type BDEN_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BDEN_A>; -impl<'a, REG> BDEN_W<'a, REG> +pub type BdenW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Bden>; +impl<'a, REG> BdenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -126,283 +126,274 @@ where #[doc = "The transfer of bypass data is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BDEN_A::VALUE1) + self.variant(Bden::Value1) } #[doc = "The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BDEN_A::VALUE2) + self.variant(Bden::Value2) } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BDEN_A::VALUE3) + self.variant(Bden::Value3) } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BDEN_A::VALUE4) + self.variant(Bden::Value4) } } -#[doc = "Field `BDVTR` reader - Bypass Data Valid Trigger"] -pub type BDVTR_R = crate::BitReader; #[doc = "Bypass Data Valid Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BDVTR_A { +pub enum Bdvtr { #[doc = "0: Bit BDV is not influenced by DX2T."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit BDV is set if DX2T is active."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BDVTR_A) -> Self { + fn from(variant: Bdvtr) -> Self { variant as u8 != 0 } } -impl BDVTR_R { +#[doc = "Field `BDVTR` reader - Bypass Data Valid Trigger"] +pub type BdvtrR = crate::BitReader; +impl BdvtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BDVTR_A { + pub const fn variant(&self) -> Bdvtr { match self.bits { - false => BDVTR_A::VALUE1, - true => BDVTR_A::VALUE2, + false => Bdvtr::Value1, + true => Bdvtr::Value2, } } #[doc = "Bit BDV is not influenced by DX2T."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BDVTR_A::VALUE1 + *self == Bdvtr::Value1 } #[doc = "Bit BDV is set if DX2T is active."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BDVTR_A::VALUE2 + *self == Bdvtr::Value2 } } #[doc = "Field `BDVTR` writer - Bypass Data Valid Trigger"] -pub type BDVTR_W<'a, REG> = crate::BitWriter<'a, REG, BDVTR_A>; -impl<'a, REG> BDVTR_W<'a, REG> +pub type BdvtrW<'a, REG> = crate::BitWriter<'a, REG, Bdvtr>; +impl<'a, REG> BdvtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit BDV is not influenced by DX2T."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BDVTR_A::VALUE1) + self.variant(Bdvtr::Value1) } #[doc = "Bit BDV is set if DX2T is active."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BDVTR_A::VALUE2) + self.variant(Bdvtr::Value2) } } -#[doc = "Field `BPRIO` reader - Bypass Priority"] -pub type BPRIO_R = crate::BitReader; #[doc = "Bypass Priority\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BPRIO_A { +pub enum Bprio { #[doc = "0: The transmit FIFO data has a higher priority than the bypass data."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bypass data has a higher priority than the transmit FIFO data."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BPRIO_A) -> Self { + fn from(variant: Bprio) -> Self { variant as u8 != 0 } } -impl BPRIO_R { +#[doc = "Field `BPRIO` reader - Bypass Priority"] +pub type BprioR = crate::BitReader; +impl BprioR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BPRIO_A { + pub const fn variant(&self) -> Bprio { match self.bits { - false => BPRIO_A::VALUE1, - true => BPRIO_A::VALUE2, + false => Bprio::Value1, + true => Bprio::Value2, } } #[doc = "The transmit FIFO data has a higher priority than the bypass data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BPRIO_A::VALUE1 + *self == Bprio::Value1 } #[doc = "The bypass data has a higher priority than the transmit FIFO data."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BPRIO_A::VALUE2 + *self == Bprio::Value2 } } #[doc = "Field `BPRIO` writer - Bypass Priority"] -pub type BPRIO_W<'a, REG> = crate::BitWriter<'a, REG, BPRIO_A>; -impl<'a, REG> BPRIO_W<'a, REG> +pub type BprioW<'a, REG> = crate::BitWriter<'a, REG, Bprio>; +impl<'a, REG> BprioW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit FIFO data has a higher priority than the bypass data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BPRIO_A::VALUE1) + self.variant(Bprio::Value1) } #[doc = "The bypass data has a higher priority than the transmit FIFO data."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BPRIO_A::VALUE2) + self.variant(Bprio::Value2) } } -#[doc = "Field `BDV` reader - Bypass Data Valid"] -pub type BDV_R = crate::BitReader; #[doc = "Bypass Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BDV_A { +pub enum Bdv { #[doc = "0: The bypass data is not valid."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bypass data is valid."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BDV_A) -> Self { + fn from(variant: Bdv) -> Self { variant as u8 != 0 } } -impl BDV_R { +#[doc = "Field `BDV` reader - Bypass Data Valid"] +pub type BdvR = crate::BitReader; +impl BdvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BDV_A { + pub const fn variant(&self) -> Bdv { match self.bits { - false => BDV_A::VALUE1, - true => BDV_A::VALUE2, + false => Bdv::Value1, + true => Bdv::Value2, } } #[doc = "The bypass data is not valid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BDV_A::VALUE1 + *self == Bdv::Value1 } #[doc = "The bypass data is valid."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BDV_A::VALUE2 + *self == Bdv::Value2 } } #[doc = "Field `BSELO` reader - Bypass Select Outputs"] -pub type BSELO_R = crate::FieldReader; +pub type BseloR = crate::FieldReader; #[doc = "Field `BSELO` writer - Bypass Select Outputs"] -pub type BSELO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type BseloW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `BHPC` reader - Bypass Hardware Port Control"] -pub type BHPC_R = crate::FieldReader; +pub type BhpcR = crate::FieldReader; #[doc = "Field `BHPC` writer - Bypass Hardware Port Control"] -pub type BHPC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type BhpcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:3 - Bypass Word Length"] #[inline(always)] - pub fn bwle(&self) -> BWLE_R { - BWLE_R::new((self.bits & 0x0f) as u8) + pub fn bwle(&self) -> BwleR { + BwleR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Bypass Data Single Shot Mode"] #[inline(always)] - pub fn bdssm(&self) -> BDSSM_R { - BDSSM_R::new(((self.bits >> 8) & 1) != 0) + pub fn bdssm(&self) -> BdssmR { + BdssmR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 10:11 - Bypass Data Enable"] #[inline(always)] - pub fn bden(&self) -> BDEN_R { - BDEN_R::new(((self.bits >> 10) & 3) as u8) + pub fn bden(&self) -> BdenR { + BdenR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 12 - Bypass Data Valid Trigger"] #[inline(always)] - pub fn bdvtr(&self) -> BDVTR_R { - BDVTR_R::new(((self.bits >> 12) & 1) != 0) + pub fn bdvtr(&self) -> BdvtrR { + BdvtrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Bypass Priority"] #[inline(always)] - pub fn bprio(&self) -> BPRIO_R { - BPRIO_R::new(((self.bits >> 13) & 1) != 0) + pub fn bprio(&self) -> BprioR { + BprioR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - Bypass Data Valid"] #[inline(always)] - pub fn bdv(&self) -> BDV_R { - BDV_R::new(((self.bits >> 15) & 1) != 0) + pub fn bdv(&self) -> BdvR { + BdvR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Bypass Select Outputs"] #[inline(always)] - pub fn bselo(&self) -> BSELO_R { - BSELO_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn bselo(&self) -> BseloR { + BseloR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Bypass Hardware Port Control"] #[inline(always)] - pub fn bhpc(&self) -> BHPC_R { - BHPC_R::new(((self.bits >> 21) & 7) as u8) + pub fn bhpc(&self) -> BhpcR { + BhpcR::new(((self.bits >> 21) & 7) as u8) } } impl W { #[doc = "Bits 0:3 - Bypass Word Length"] #[inline(always)] #[must_use] - pub fn bwle(&mut self) -> BWLE_W { - BWLE_W::new(self, 0) + pub fn bwle(&mut self) -> BwleW { + BwleW::new(self, 0) } #[doc = "Bit 8 - Bypass Data Single Shot Mode"] #[inline(always)] #[must_use] - pub fn bdssm(&mut self) -> BDSSM_W { - BDSSM_W::new(self, 8) + pub fn bdssm(&mut self) -> BdssmW { + BdssmW::new(self, 8) } #[doc = "Bits 10:11 - Bypass Data Enable"] #[inline(always)] #[must_use] - pub fn bden(&mut self) -> BDEN_W { - BDEN_W::new(self, 10) + pub fn bden(&mut self) -> BdenW { + BdenW::new(self, 10) } #[doc = "Bit 12 - Bypass Data Valid Trigger"] #[inline(always)] #[must_use] - pub fn bdvtr(&mut self) -> BDVTR_W { - BDVTR_W::new(self, 12) + pub fn bdvtr(&mut self) -> BdvtrW { + BdvtrW::new(self, 12) } #[doc = "Bit 13 - Bypass Priority"] #[inline(always)] #[must_use] - pub fn bprio(&mut self) -> BPRIO_W { - BPRIO_W::new(self, 13) + pub fn bprio(&mut self) -> BprioW { + BprioW::new(self, 13) } #[doc = "Bits 16:20 - Bypass Select Outputs"] #[inline(always)] #[must_use] - pub fn bselo(&mut self) -> BSELO_W { - BSELO_W::new(self, 16) + pub fn bselo(&mut self) -> BseloW { + BseloW::new(self, 16) } #[doc = "Bits 21:23 - Bypass Hardware Port Control"] #[inline(always)] #[must_use] - pub fn bhpc(&mut self) -> BHPC_W { - BHPC_W::new(self, 21) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bhpc(&mut self) -> BhpcW { + BhpcW::new(self, 21) } } #[doc = "Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BYPCR_SPEC; -impl crate::RegisterSpec for BYPCR_SPEC { +pub struct BypcrSpec; +impl crate::RegisterSpec for BypcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`bypcr::R`](R) reader structure"] -impl crate::Readable for BYPCR_SPEC {} +impl crate::Readable for BypcrSpec {} #[doc = "`write(|w| ..)` method takes [`bypcr::W`](W) writer structure"] -impl crate::Writable for BYPCR_SPEC { +impl crate::Writable for BypcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BYPCR to value 0"] -impl crate::Resettable for BYPCR_SPEC { +impl crate::Resettable for BypcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/ccfg.rs b/src/usic0_ch0/ccfg.rs index 2192398a..f3224e74 100644 --- a/src/usic0_ch0/ccfg.rs +++ b/src/usic0_ch0/ccfg.rs @@ -1,261 +1,261 @@ #[doc = "Register `CCFG` reader"] -pub type R = crate::R; -#[doc = "Field `SSC` reader - SSC Protocol Available"] -pub type SSC_R = crate::BitReader; +pub type R = crate::R; #[doc = "SSC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SSC_A { +pub enum Ssc { #[doc = "0: The SSC protocol is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The SSC protocol is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SSC_A) -> Self { + fn from(variant: Ssc) -> Self { variant as u8 != 0 } } -impl SSC_R { +#[doc = "Field `SSC` reader - SSC Protocol Available"] +pub type SscR = crate::BitReader; +impl SscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SSC_A { + pub const fn variant(&self) -> Ssc { match self.bits { - false => SSC_A::VALUE1, - true => SSC_A::VALUE2, + false => Ssc::Value1, + true => Ssc::Value2, } } #[doc = "The SSC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SSC_A::VALUE1 + *self == Ssc::Value1 } #[doc = "The SSC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SSC_A::VALUE2 + *self == Ssc::Value2 } } -#[doc = "Field `ASC` reader - ASC Protocol Available"] -pub type ASC_R = crate::BitReader; #[doc = "ASC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASC_A { +pub enum Asc { #[doc = "0: The ASC protocol is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The ASC protocol is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASC_A) -> Self { + fn from(variant: Asc) -> Self { variant as u8 != 0 } } -impl ASC_R { +#[doc = "Field `ASC` reader - ASC Protocol Available"] +pub type AscR = crate::BitReader; +impl AscR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASC_A { + pub const fn variant(&self) -> Asc { match self.bits { - false => ASC_A::VALUE1, - true => ASC_A::VALUE2, + false => Asc::Value1, + true => Asc::Value2, } } #[doc = "The ASC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASC_A::VALUE1 + *self == Asc::Value1 } #[doc = "The ASC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASC_A::VALUE2 + *self == Asc::Value2 } } -#[doc = "Field `IIC` reader - IIC Protocol Available"] -pub type IIC_R = crate::BitReader; #[doc = "IIC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IIC_A { +pub enum Iic { #[doc = "0: The IIC protocol is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The IIC protocol is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IIC_A) -> Self { + fn from(variant: Iic) -> Self { variant as u8 != 0 } } -impl IIC_R { +#[doc = "Field `IIC` reader - IIC Protocol Available"] +pub type IicR = crate::BitReader; +impl IicR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IIC_A { + pub const fn variant(&self) -> Iic { match self.bits { - false => IIC_A::VALUE1, - true => IIC_A::VALUE2, + false => Iic::Value1, + true => Iic::Value2, } } #[doc = "The IIC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IIC_A::VALUE1 + *self == Iic::Value1 } #[doc = "The IIC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IIC_A::VALUE2 + *self == Iic::Value2 } } -#[doc = "Field `IIS` reader - IIS Protocol Available"] -pub type IIS_R = crate::BitReader; #[doc = "IIS Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IIS_A { +pub enum Iis { #[doc = "0: The IIS protocol is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The IIS protocol is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IIS_A) -> Self { + fn from(variant: Iis) -> Self { variant as u8 != 0 } } -impl IIS_R { +#[doc = "Field `IIS` reader - IIS Protocol Available"] +pub type IisR = crate::BitReader; +impl IisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IIS_A { + pub const fn variant(&self) -> Iis { match self.bits { - false => IIS_A::VALUE1, - true => IIS_A::VALUE2, + false => Iis::Value1, + true => Iis::Value2, } } #[doc = "The IIS protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IIS_A::VALUE1 + *self == Iis::Value1 } #[doc = "The IIS protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IIS_A::VALUE2 + *self == Iis::Value2 } } -#[doc = "Field `RB` reader - Receive FIFO Buffer Available"] -pub type RB_R = crate::BitReader; #[doc = "Receive FIFO Buffer Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RB_A { +pub enum Rb { #[doc = "0: A receive FIFO buffer is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive FIFO buffer is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RB_A) -> Self { + fn from(variant: Rb) -> Self { variant as u8 != 0 } } -impl RB_R { +#[doc = "Field `RB` reader - Receive FIFO Buffer Available"] +pub type RbR = crate::BitReader; +impl RbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RB_A { + pub const fn variant(&self) -> Rb { match self.bits { - false => RB_A::VALUE1, - true => RB_A::VALUE2, + false => Rb::Value1, + true => Rb::Value2, } } #[doc = "A receive FIFO buffer is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RB_A::VALUE1 + *self == Rb::Value1 } #[doc = "A receive FIFO buffer is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RB_A::VALUE2 + *self == Rb::Value2 } } -#[doc = "Field `TB` reader - Transmit FIFO Buffer Available"] -pub type TB_R = crate::BitReader; #[doc = "Transmit FIFO Buffer Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TB_A { +pub enum Tb { #[doc = "0: A transmit FIFO buffer is not available."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit FIFO buffer is available."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TB_A) -> Self { + fn from(variant: Tb) -> Self { variant as u8 != 0 } } -impl TB_R { +#[doc = "Field `TB` reader - Transmit FIFO Buffer Available"] +pub type TbR = crate::BitReader; +impl TbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TB_A { + pub const fn variant(&self) -> Tb { match self.bits { - false => TB_A::VALUE1, - true => TB_A::VALUE2, + false => Tb::Value1, + true => Tb::Value2, } } #[doc = "A transmit FIFO buffer is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TB_A::VALUE1 + *self == Tb::Value1 } #[doc = "A transmit FIFO buffer is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TB_A::VALUE2 + *self == Tb::Value2 } } impl R { #[doc = "Bit 0 - SSC Protocol Available"] #[inline(always)] - pub fn ssc(&self) -> SSC_R { - SSC_R::new((self.bits & 1) != 0) + pub fn ssc(&self) -> SscR { + SscR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ASC Protocol Available"] #[inline(always)] - pub fn asc(&self) -> ASC_R { - ASC_R::new(((self.bits >> 1) & 1) != 0) + pub fn asc(&self) -> AscR { + AscR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - IIC Protocol Available"] #[inline(always)] - pub fn iic(&self) -> IIC_R { - IIC_R::new(((self.bits >> 2) & 1) != 0) + pub fn iic(&self) -> IicR { + IicR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - IIS Protocol Available"] #[inline(always)] - pub fn iis(&self) -> IIS_R { - IIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn iis(&self) -> IisR { + IisR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - Receive FIFO Buffer Available"] #[inline(always)] - pub fn rb(&self) -> RB_R { - RB_R::new(((self.bits >> 6) & 1) != 0) + pub fn rb(&self) -> RbR { + RbR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Buffer Available"] #[inline(always)] - pub fn tb(&self) -> TB_R { - TB_R::new(((self.bits >> 7) & 1) != 0) + pub fn tb(&self) -> TbR { + TbR::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CCFG_SPEC; -impl crate::RegisterSpec for CCFG_SPEC { +pub struct CcfgSpec; +impl crate::RegisterSpec for CcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`ccfg::R`](R) reader structure"] -impl crate::Readable for CCFG_SPEC {} +impl crate::Readable for CcfgSpec {} #[doc = "`reset()` method sets CCFG to value 0xcf"] -impl crate::Resettable for CCFG_SPEC { +impl crate::Resettable for CcfgSpec { const RESET_VALUE: u32 = 0xcf; } diff --git a/src/usic0_ch0/ccr.rs b/src/usic0_ch0/ccr.rs index c48d5989..6b0c00a6 100644 --- a/src/usic0_ch0/ccr.rs +++ b/src/usic0_ch0/ccr.rs @@ -1,75 +1,75 @@ #[doc = "Register `CCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCR` writer"] -pub type W = crate::W; -#[doc = "Field `MODE` reader - Operating Mode"] -pub type MODE_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MODE_A { +pub enum Mode { #[doc = "0: The USIC channel is disabled. All protocol-related state machines are set to an idle state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The SSC (SPI) protocol is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The ASC (SCI, UART) protocol is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The IIS protocol is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The IIC protocol is selected."] - VALUE5 = 4, + Value5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MODE_A) -> Self { + fn from(variant: Mode) -> Self { variant as _ } } -impl crate::FieldSpec for MODE_A { +impl crate::FieldSpec for Mode { type Ux = u8; } -impl MODE_R { +#[doc = "Field `MODE` reader - Operating Mode"] +pub type ModeR = crate::FieldReader; +impl ModeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(MODE_A::VALUE1), - 1 => Some(MODE_A::VALUE2), - 2 => Some(MODE_A::VALUE3), - 3 => Some(MODE_A::VALUE4), - 4 => Some(MODE_A::VALUE5), + 0 => Some(Mode::Value1), + 1 => Some(Mode::Value2), + 2 => Some(Mode::Value3), + 3 => Some(Mode::Value4), + 4 => Some(Mode::Value5), _ => None, } } #[doc = "The USIC channel is disabled. All protocol-related state machines are set to an idle state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODE_A::VALUE1 + *self == Mode::Value1 } #[doc = "The SSC (SPI) protocol is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODE_A::VALUE2 + *self == Mode::Value2 } #[doc = "The ASC (SCI, UART) protocol is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == MODE_A::VALUE3 + *self == Mode::Value3 } #[doc = "The IIS protocol is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == MODE_A::VALUE4 + *self == Mode::Value4 } #[doc = "The IIC protocol is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == MODE_A::VALUE5 + *self == Mode::Value5 } } #[doc = "Field `MODE` writer - Operating Mode"] -pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MODE_A>; -impl<'a, REG> MODE_W<'a, REG> +pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode>; +impl<'a, REG> ModeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,91 +77,91 @@ where #[doc = "The USIC channel is disabled. All protocol-related state machines are set to an idle state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE1) + self.variant(Mode::Value1) } #[doc = "The SSC (SPI) protocol is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE2) + self.variant(Mode::Value2) } #[doc = "The ASC (SCI, UART) protocol is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE3) + self.variant(Mode::Value3) } #[doc = "The IIS protocol is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE4) + self.variant(Mode::Value4) } #[doc = "The IIC protocol is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(MODE_A::VALUE5) + self.variant(Mode::Value5) } } -#[doc = "Field `HPCEN` reader - Hardware Port Control Enable"] -pub type HPCEN_R = crate::FieldReader; #[doc = "Hardware Port Control Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HPCEN_A { +pub enum Hpcen { #[doc = "0: The hardware port control is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The hardware port control is enabled for DX0 and DOUT0."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HPCEN_A) -> Self { + fn from(variant: Hpcen) -> Self { variant as _ } } -impl crate::FieldSpec for HPCEN_A { +impl crate::FieldSpec for Hpcen { type Ux = u8; } -impl HPCEN_R { +#[doc = "Field `HPCEN` reader - Hardware Port Control Enable"] +pub type HpcenR = crate::FieldReader; +impl HpcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HPCEN_A { + pub const fn variant(&self) -> Hpcen { match self.bits { - 0 => HPCEN_A::VALUE1, - 1 => HPCEN_A::VALUE2, - 2 => HPCEN_A::VALUE3, - 3 => HPCEN_A::VALUE4, + 0 => Hpcen::Value1, + 1 => Hpcen::Value2, + 2 => Hpcen::Value3, + 3 => Hpcen::Value4, _ => unreachable!(), } } #[doc = "The hardware port control is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HPCEN_A::VALUE1 + *self == Hpcen::Value1 } #[doc = "The hardware port control is enabled for DX0 and DOUT0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HPCEN_A::VALUE2 + *self == Hpcen::Value2 } #[doc = "The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HPCEN_A::VALUE3 + *self == Hpcen::Value3 } #[doc = "The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HPCEN_A::VALUE4 + *self == Hpcen::Value4 } } #[doc = "Field `HPCEN` writer - Hardware Port Control Enable"] -pub type HPCEN_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, HPCEN_A>; -impl<'a, REG> HPCEN_W<'a, REG> +pub type HpcenW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Hpcen>; +impl<'a, REG> HpcenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -169,77 +169,77 @@ where #[doc = "The hardware port control is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HPCEN_A::VALUE1) + self.variant(Hpcen::Value1) } #[doc = "The hardware port control is enabled for DX0 and DOUT0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HPCEN_A::VALUE2) + self.variant(Hpcen::Value2) } #[doc = "The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HPCEN_A::VALUE3) + self.variant(Hpcen::Value3) } #[doc = "The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(HPCEN_A::VALUE4) + self.variant(Hpcen::Value4) } } -#[doc = "Field `PM` reader - Parity Mode"] -pub type PM_R = crate::FieldReader; #[doc = "Parity Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PM_A { +pub enum Pm { #[doc = "0: The parity generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "2: Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PM_A) -> Self { + fn from(variant: Pm) -> Self { variant as _ } } -impl crate::FieldSpec for PM_A { +impl crate::FieldSpec for Pm { type Ux = u8; } -impl PM_R { +#[doc = "Field `PM` reader - Parity Mode"] +pub type PmR = crate::FieldReader; +impl PmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PM_A::VALUE1), - 2 => Some(PM_A::VALUE3), - 3 => Some(PM_A::VALUE4), + 0 => Some(Pm::Value1), + 2 => Some(Pm::Value3), + 3 => Some(Pm::Value4), _ => None, } } #[doc = "The parity generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PM_A::VALUE1 + *self == Pm::Value1 } #[doc = "Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PM_A::VALUE3 + *self == Pm::Value3 } #[doc = "Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PM_A::VALUE4 + *self == Pm::Value4 } } #[doc = "Field `PM` writer - Parity Mode"] -pub type PM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PM_A>; -impl<'a, REG> PM_W<'a, REG> +pub type PmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pm>; +impl<'a, REG> PmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -247,527 +247,518 @@ where #[doc = "The parity generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PM_A::VALUE1) + self.variant(Pm::Value1) } #[doc = "Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PM_A::VALUE3) + self.variant(Pm::Value3) } #[doc = "Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PM_A::VALUE4) + self.variant(Pm::Value4) } } -#[doc = "Field `RSIEN` reader - Receiver Start Interrupt Enable"] -pub type RSIEN_R = crate::BitReader; #[doc = "Receiver Start Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIEN_A { +pub enum Rsien { #[doc = "0: The receiver start interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIEN_A) -> Self { + fn from(variant: Rsien) -> Self { variant as u8 != 0 } } -impl RSIEN_R { +#[doc = "Field `RSIEN` reader - Receiver Start Interrupt Enable"] +pub type RsienR = crate::BitReader; +impl RsienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIEN_A { + pub const fn variant(&self) -> Rsien { match self.bits { - false => RSIEN_A::VALUE1, - true => RSIEN_A::VALUE2, + false => Rsien::Value1, + true => Rsien::Value2, } } #[doc = "The receiver start interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIEN_A::VALUE1 + *self == Rsien::Value1 } #[doc = "The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIEN_A::VALUE2 + *self == Rsien::Value2 } } #[doc = "Field `RSIEN` writer - Receiver Start Interrupt Enable"] -pub type RSIEN_W<'a, REG> = crate::BitWriter<'a, REG, RSIEN_A>; -impl<'a, REG> RSIEN_W<'a, REG> +pub type RsienW<'a, REG> = crate::BitWriter<'a, REG, Rsien>; +impl<'a, REG> RsienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receiver start interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIEN_A::VALUE1) + self.variant(Rsien::Value1) } #[doc = "The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIEN_A::VALUE2) + self.variant(Rsien::Value2) } } -#[doc = "Field `DLIEN` reader - Data Lost Interrupt Enable"] -pub type DLIEN_R = crate::BitReader; #[doc = "Data Lost Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIEN_A { +pub enum Dlien { #[doc = "0: The data lost interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIEN_A) -> Self { + fn from(variant: Dlien) -> Self { variant as u8 != 0 } } -impl DLIEN_R { +#[doc = "Field `DLIEN` reader - Data Lost Interrupt Enable"] +pub type DlienR = crate::BitReader; +impl DlienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIEN_A { + pub const fn variant(&self) -> Dlien { match self.bits { - false => DLIEN_A::VALUE1, - true => DLIEN_A::VALUE2, + false => Dlien::Value1, + true => Dlien::Value2, } } #[doc = "The data lost interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIEN_A::VALUE1 + *self == Dlien::Value1 } #[doc = "The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIEN_A::VALUE2 + *self == Dlien::Value2 } } #[doc = "Field `DLIEN` writer - Data Lost Interrupt Enable"] -pub type DLIEN_W<'a, REG> = crate::BitWriter<'a, REG, DLIEN_A>; -impl<'a, REG> DLIEN_W<'a, REG> +pub type DlienW<'a, REG> = crate::BitWriter<'a, REG, Dlien>; +impl<'a, REG> DlienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data lost interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIEN_A::VALUE1) + self.variant(Dlien::Value1) } #[doc = "The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIEN_A::VALUE2) + self.variant(Dlien::Value2) } } -#[doc = "Field `TSIEN` reader - Transmit Shift Interrupt Enable"] -pub type TSIEN_R = crate::BitReader; #[doc = "Transmit Shift Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIEN_A { +pub enum Tsien { #[doc = "0: The transmit shift interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIEN_A) -> Self { + fn from(variant: Tsien) -> Self { variant as u8 != 0 } } -impl TSIEN_R { +#[doc = "Field `TSIEN` reader - Transmit Shift Interrupt Enable"] +pub type TsienR = crate::BitReader; +impl TsienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIEN_A { + pub const fn variant(&self) -> Tsien { match self.bits { - false => TSIEN_A::VALUE1, - true => TSIEN_A::VALUE2, + false => Tsien::Value1, + true => Tsien::Value2, } } #[doc = "The transmit shift interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIEN_A::VALUE1 + *self == Tsien::Value1 } #[doc = "The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIEN_A::VALUE2 + *self == Tsien::Value2 } } #[doc = "Field `TSIEN` writer - Transmit Shift Interrupt Enable"] -pub type TSIEN_W<'a, REG> = crate::BitWriter<'a, REG, TSIEN_A>; -impl<'a, REG> TSIEN_W<'a, REG> +pub type TsienW<'a, REG> = crate::BitWriter<'a, REG, Tsien>; +impl<'a, REG> TsienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit shift interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIEN_A::VALUE1) + self.variant(Tsien::Value1) } #[doc = "The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIEN_A::VALUE2) + self.variant(Tsien::Value2) } } -#[doc = "Field `TBIEN` reader - Transmit Buffer Interrupt Enable"] -pub type TBIEN_R = crate::BitReader; #[doc = "Transmit Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIEN_A { +pub enum Tbien { #[doc = "0: The transmit buffer interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIEN_A) -> Self { + fn from(variant: Tbien) -> Self { variant as u8 != 0 } } -impl TBIEN_R { +#[doc = "Field `TBIEN` reader - Transmit Buffer Interrupt Enable"] +pub type TbienR = crate::BitReader; +impl TbienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIEN_A { + pub const fn variant(&self) -> Tbien { match self.bits { - false => TBIEN_A::VALUE1, - true => TBIEN_A::VALUE2, + false => Tbien::Value1, + true => Tbien::Value2, } } #[doc = "The transmit buffer interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIEN_A::VALUE1 + *self == Tbien::Value1 } #[doc = "The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIEN_A::VALUE2 + *self == Tbien::Value2 } } #[doc = "Field `TBIEN` writer - Transmit Buffer Interrupt Enable"] -pub type TBIEN_W<'a, REG> = crate::BitWriter<'a, REG, TBIEN_A>; -impl<'a, REG> TBIEN_W<'a, REG> +pub type TbienW<'a, REG> = crate::BitWriter<'a, REG, Tbien>; +impl<'a, REG> TbienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit buffer interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIEN_A::VALUE1) + self.variant(Tbien::Value1) } #[doc = "The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIEN_A::VALUE2) + self.variant(Tbien::Value2) } } -#[doc = "Field `RIEN` reader - Receive Interrupt Enable"] -pub type RIEN_R = crate::BitReader; #[doc = "Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIEN_A { +pub enum Rien { #[doc = "0: The receive interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIEN_A) -> Self { + fn from(variant: Rien) -> Self { variant as u8 != 0 } } -impl RIEN_R { +#[doc = "Field `RIEN` reader - Receive Interrupt Enable"] +pub type RienR = crate::BitReader; +impl RienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIEN_A { + pub const fn variant(&self) -> Rien { match self.bits { - false => RIEN_A::VALUE1, - true => RIEN_A::VALUE2, + false => Rien::Value1, + true => Rien::Value2, } } #[doc = "The receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIEN_A::VALUE1 + *self == Rien::Value1 } #[doc = "The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIEN_A::VALUE2 + *self == Rien::Value2 } } #[doc = "Field `RIEN` writer - Receive Interrupt Enable"] -pub type RIEN_W<'a, REG> = crate::BitWriter<'a, REG, RIEN_A>; -impl<'a, REG> RIEN_W<'a, REG> +pub type RienW<'a, REG> = crate::BitWriter<'a, REG, Rien>; +impl<'a, REG> RienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIEN_A::VALUE1) + self.variant(Rien::Value1) } #[doc = "The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIEN_A::VALUE2) + self.variant(Rien::Value2) } } -#[doc = "Field `AIEN` reader - Alternative Receive Interrupt Enable"] -pub type AIEN_R = crate::BitReader; #[doc = "Alternative Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIEN_A { +pub enum Aien { #[doc = "0: The alternative receive interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIEN_A) -> Self { + fn from(variant: Aien) -> Self { variant as u8 != 0 } } -impl AIEN_R { +#[doc = "Field `AIEN` reader - Alternative Receive Interrupt Enable"] +pub type AienR = crate::BitReader; +impl AienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIEN_A { + pub const fn variant(&self) -> Aien { match self.bits { - false => AIEN_A::VALUE1, - true => AIEN_A::VALUE2, + false => Aien::Value1, + true => Aien::Value2, } } #[doc = "The alternative receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIEN_A::VALUE1 + *self == Aien::Value1 } #[doc = "The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIEN_A::VALUE2 + *self == Aien::Value2 } } #[doc = "Field `AIEN` writer - Alternative Receive Interrupt Enable"] -pub type AIEN_W<'a, REG> = crate::BitWriter<'a, REG, AIEN_A>; -impl<'a, REG> AIEN_W<'a, REG> +pub type AienW<'a, REG> = crate::BitWriter<'a, REG, Aien>; +impl<'a, REG> AienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The alternative receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIEN_A::VALUE1) + self.variant(Aien::Value1) } #[doc = "The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIEN_A::VALUE2) + self.variant(Aien::Value2) } } -#[doc = "Field `BRGIEN` reader - Baud Rate Generator Interrupt Enable"] -pub type BRGIEN_R = crate::BitReader; #[doc = "Baud Rate Generator Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIEN_A { +pub enum Brgien { #[doc = "0: The baud rate generator interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIEN_A) -> Self { + fn from(variant: Brgien) -> Self { variant as u8 != 0 } } -impl BRGIEN_R { +#[doc = "Field `BRGIEN` reader - Baud Rate Generator Interrupt Enable"] +pub type BrgienR = crate::BitReader; +impl BrgienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIEN_A { + pub const fn variant(&self) -> Brgien { match self.bits { - false => BRGIEN_A::VALUE1, - true => BRGIEN_A::VALUE2, + false => Brgien::Value1, + true => Brgien::Value2, } } #[doc = "The baud rate generator interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIEN_A::VALUE1 + *self == Brgien::Value1 } #[doc = "The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIEN_A::VALUE2 + *self == Brgien::Value2 } } #[doc = "Field `BRGIEN` writer - Baud Rate Generator Interrupt Enable"] -pub type BRGIEN_W<'a, REG> = crate::BitWriter<'a, REG, BRGIEN_A>; -impl<'a, REG> BRGIEN_W<'a, REG> +pub type BrgienW<'a, REG> = crate::BitWriter<'a, REG, Brgien>; +impl<'a, REG> BrgienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The baud rate generator interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIEN_A::VALUE1) + self.variant(Brgien::Value1) } #[doc = "The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIEN_A::VALUE2) + self.variant(Brgien::Value2) } } impl R { #[doc = "Bits 0:3 - Operating Mode"] #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new((self.bits & 0x0f) as u8) + pub fn mode(&self) -> ModeR { + ModeR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 6:7 - Hardware Port Control Enable"] #[inline(always)] - pub fn hpcen(&self) -> HPCEN_R { - HPCEN_R::new(((self.bits >> 6) & 3) as u8) + pub fn hpcen(&self) -> HpcenR { + HpcenR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Parity Mode"] #[inline(always)] - pub fn pm(&self) -> PM_R { - PM_R::new(((self.bits >> 8) & 3) as u8) + pub fn pm(&self) -> PmR { + PmR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Receiver Start Interrupt Enable"] #[inline(always)] - pub fn rsien(&self) -> RSIEN_R { - RSIEN_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsien(&self) -> RsienR { + RsienR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Interrupt Enable"] #[inline(always)] - pub fn dlien(&self) -> DLIEN_R { - DLIEN_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlien(&self) -> DlienR { + DlienR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Interrupt Enable"] #[inline(always)] - pub fn tsien(&self) -> TSIEN_R { - TSIEN_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsien(&self) -> TsienR { + TsienR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"] #[inline(always)] - pub fn tbien(&self) -> TBIEN_R { - TBIEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbien(&self) -> TbienR { + TbienR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Interrupt Enable"] #[inline(always)] - pub fn rien(&self) -> RIEN_R { - RIEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn rien(&self) -> RienR { + RienR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Interrupt Enable"] #[inline(always)] - pub fn aien(&self) -> AIEN_R { - AIEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn aien(&self) -> AienR { + AienR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"] #[inline(always)] - pub fn brgien(&self) -> BRGIEN_R { - BRGIEN_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgien(&self) -> BrgienR { + BrgienR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Operating Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> MODE_W { - MODE_W::new(self, 0) + pub fn mode(&mut self) -> ModeW { + ModeW::new(self, 0) } #[doc = "Bits 6:7 - Hardware Port Control Enable"] #[inline(always)] #[must_use] - pub fn hpcen(&mut self) -> HPCEN_W { - HPCEN_W::new(self, 6) + pub fn hpcen(&mut self) -> HpcenW { + HpcenW::new(self, 6) } #[doc = "Bits 8:9 - Parity Mode"] #[inline(always)] #[must_use] - pub fn pm(&mut self) -> PM_W { - PM_W::new(self, 8) + pub fn pm(&mut self) -> PmW { + PmW::new(self, 8) } #[doc = "Bit 10 - Receiver Start Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rsien(&mut self) -> RSIEN_W { - RSIEN_W::new(self, 10) + pub fn rsien(&mut self) -> RsienW { + RsienW::new(self, 10) } #[doc = "Bit 11 - Data Lost Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dlien(&mut self) -> DLIEN_W { - DLIEN_W::new(self, 11) + pub fn dlien(&mut self) -> DlienW { + DlienW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tsien(&mut self) -> TSIEN_W { - TSIEN_W::new(self, 12) + pub fn tsien(&mut self) -> TsienW { + TsienW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tbien(&mut self) -> TBIEN_W { - TBIEN_W::new(self, 13) + pub fn tbien(&mut self) -> TbienW { + TbienW::new(self, 13) } #[doc = "Bit 14 - Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rien(&mut self) -> RIEN_W { - RIEN_W::new(self, 14) + pub fn rien(&mut self) -> RienW { + RienW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn aien(&mut self) -> AIEN_W { - AIEN_W::new(self, 15) + pub fn aien(&mut self) -> AienW { + AienW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"] #[inline(always)] #[must_use] - pub fn brgien(&mut self) -> BRGIEN_W { - BRGIEN_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgien(&mut self) -> BrgienW { + BrgienW::new(self, 16) } } #[doc = "Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CCR_SPEC; -impl crate::RegisterSpec for CCR_SPEC { +pub struct CcrSpec; +impl crate::RegisterSpec for CcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ccr::R`](R) reader structure"] -impl crate::Readable for CCR_SPEC {} +impl crate::Readable for CcrSpec {} #[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"] -impl crate::Writable for CCR_SPEC { +impl crate::Writable for CcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCR to value 0"] -impl crate::Resettable for CCR_SPEC { +impl crate::Resettable for CcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/cmtr.rs b/src/usic0_ch0/cmtr.rs index 52ec65c7..330db222 100644 --- a/src/usic0_ch0/cmtr.rs +++ b/src/usic0_ch0/cmtr.rs @@ -1,49 +1,40 @@ #[doc = "Register `CMTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CTV` reader - Captured Timer Value"] -pub type CTV_R = crate::FieldReader; +pub type CtvR = crate::FieldReader; #[doc = "Field `CTV` writer - Captured Timer Value"] -pub type CTV_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type CtvW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Captured Timer Value"] #[inline(always)] - pub fn ctv(&self) -> CTV_R { - CTV_R::new((self.bits & 0x03ff) as u16) + pub fn ctv(&self) -> CtvR { + CtvR::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Captured Timer Value"] #[inline(always)] #[must_use] - pub fn ctv(&mut self) -> CTV_W { - CTV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ctv(&mut self) -> CtvW { + CtvW::new(self, 0) } } #[doc = "Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CMTR_SPEC; -impl crate::RegisterSpec for CMTR_SPEC { +pub struct CmtrSpec; +impl crate::RegisterSpec for CmtrSpec { type Ux = u32; } #[doc = "`read()` method returns [`cmtr::R`](R) reader structure"] -impl crate::Readable for CMTR_SPEC {} +impl crate::Readable for CmtrSpec {} #[doc = "`write(|w| ..)` method takes [`cmtr::W`](W) writer structure"] -impl crate::Writable for CMTR_SPEC { +impl crate::Writable for CmtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMTR to value 0"] -impl crate::Resettable for CMTR_SPEC { +impl crate::Resettable for CmtrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx0cr.rs b/src/usic0_ch0/dx0cr.rs index dc6b07be..6f9cb04a 100644 --- a/src/usic0_ch0/dx0cr.rs +++ b/src/usic0_ch0/dx0cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX0CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX0CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DXnA is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DXnB is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DXnC is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DXnD is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DXnE is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DXnF is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DXnG is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,369 +101,369 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DXnT."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DXnT."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DXnT."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -471,169 +471,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DXnS is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DXnS is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX0CR_SPEC; -impl crate::RegisterSpec for DX0CR_SPEC { +pub struct Dx0crSpec; +impl crate::RegisterSpec for Dx0crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx0cr::R`](R) reader structure"] -impl crate::Readable for DX0CR_SPEC {} +impl crate::Readable for Dx0crSpec {} #[doc = "`write(|w| ..)` method takes [`dx0cr::W`](W) writer structure"] -impl crate::Writable for DX0CR_SPEC { +impl crate::Writable for Dx0crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX0CR to value 0"] -impl crate::Resettable for DX0CR_SPEC { +impl crate::Resettable for Dx0crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx1cr.rs b/src/usic0_ch0/dx1cr.rs index ddf733d8..c7c3be90 100644 --- a/src/usic0_ch0/dx1cr.rs +++ b/src/usic0_ch0/dx1cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX1CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX1CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DX1A is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DX1B is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DX1C is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DX1D is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DX1E is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DX1F is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DX1G is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DX1A is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DX1B is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DX1C is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DX1D is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DX1E is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DX1F is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DX1G is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,422 +101,422 @@ where #[doc = "The data input DX1A is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DX1B is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DX1C is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DX1D is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DX1E is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DX1F is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DX1G is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `DCEN` reader - Delay Compensation Enable"] -pub type DCEN_R = crate::BitReader; #[doc = "Delay Compensation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCEN_A { +pub enum Dcen { #[doc = "0: The receive shift clock is dependent on INSW selection."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCEN_A) -> Self { + fn from(variant: Dcen) -> Self { variant as u8 != 0 } } -impl DCEN_R { +#[doc = "Field `DCEN` reader - Delay Compensation Enable"] +pub type DcenR = crate::BitReader; +impl DcenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCEN_A { + pub const fn variant(&self) -> Dcen { match self.bits { - false => DCEN_A::VALUE1, - true => DCEN_A::VALUE2, + false => Dcen::Value1, + true => Dcen::Value2, } } #[doc = "The receive shift clock is dependent on INSW selection."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCEN_A::VALUE1 + *self == Dcen::Value1 } #[doc = "The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCEN_A::VALUE2 + *self == Dcen::Value2 } } #[doc = "Field `DCEN` writer - Delay Compensation Enable"] -pub type DCEN_W<'a, REG> = crate::BitWriter<'a, REG, DCEN_A>; -impl<'a, REG> DCEN_W<'a, REG> +pub type DcenW<'a, REG> = crate::BitWriter<'a, REG, Dcen>; +impl<'a, REG> DcenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive shift clock is dependent on INSW selection."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCEN_A::VALUE1) + self.variant(Dcen::Value1) } #[doc = "The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCEN_A::VALUE2) + self.variant(Dcen::Value2) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DX1T."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DX1T."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DX1T."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DX1T."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DX1T."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DX1T."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -524,180 +524,171 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DX1T."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DX1T."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DX1T."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DX1S is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DX1S is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DX1S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DX1S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Delay Compensation Enable"] #[inline(always)] - pub fn dcen(&self) -> DCEN_R { - DCEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn dcen(&self) -> DcenR { + DcenR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 3 - Delay Compensation Enable"] #[inline(always)] #[must_use] - pub fn dcen(&mut self) -> DCEN_W { - DCEN_W::new(self, 3) + pub fn dcen(&mut self) -> DcenW { + DcenW::new(self, 3) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX1CR_SPEC; -impl crate::RegisterSpec for DX1CR_SPEC { +pub struct Dx1crSpec; +impl crate::RegisterSpec for Dx1crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx1cr::R`](R) reader structure"] -impl crate::Readable for DX1CR_SPEC {} +impl crate::Readable for Dx1crSpec {} #[doc = "`write(|w| ..)` method takes [`dx1cr::W`](W) writer structure"] -impl crate::Writable for DX1CR_SPEC { +impl crate::Writable for Dx1crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX1CR to value 0"] -impl crate::Resettable for DX1CR_SPEC { +impl crate::Resettable for Dx1crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx2cr.rs b/src/usic0_ch0/dx2cr.rs index b6274e96..e710ad2f 100644 --- a/src/usic0_ch0/dx2cr.rs +++ b/src/usic0_ch0/dx2cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX2CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX2CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DXnA is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DXnB is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DXnC is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DXnD is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DXnE is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DXnF is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DXnG is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,369 +101,369 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DXnT."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DXnT."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DXnT."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -471,169 +471,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DXnS is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DXnS is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX2CR_SPEC; -impl crate::RegisterSpec for DX2CR_SPEC { +pub struct Dx2crSpec; +impl crate::RegisterSpec for Dx2crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx2cr::R`](R) reader structure"] -impl crate::Readable for DX2CR_SPEC {} +impl crate::Readable for Dx2crSpec {} #[doc = "`write(|w| ..)` method takes [`dx2cr::W`](W) writer structure"] -impl crate::Writable for DX2CR_SPEC { +impl crate::Writable for Dx2crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX2CR to value 0"] -impl crate::Resettable for DX2CR_SPEC { +impl crate::Resettable for Dx2crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx3cr.rs b/src/usic0_ch0/dx3cr.rs index c2244cf9..7aed324f 100644 --- a/src/usic0_ch0/dx3cr.rs +++ b/src/usic0_ch0/dx3cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX3CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX3CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DXnA is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DXnB is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DXnC is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DXnD is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DXnE is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DXnF is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DXnG is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,369 +101,369 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DXnT."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DXnT."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DXnT."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -471,169 +471,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DXnS is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DXnS is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX3CR_SPEC; -impl crate::RegisterSpec for DX3CR_SPEC { +pub struct Dx3crSpec; +impl crate::RegisterSpec for Dx3crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx3cr::R`](R) reader structure"] -impl crate::Readable for DX3CR_SPEC {} +impl crate::Readable for Dx3crSpec {} #[doc = "`write(|w| ..)` method takes [`dx3cr::W`](W) writer structure"] -impl crate::Writable for DX3CR_SPEC { +impl crate::Writable for Dx3crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX3CR to value 0"] -impl crate::Resettable for DX3CR_SPEC { +impl crate::Resettable for Dx3crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx4cr.rs b/src/usic0_ch0/dx4cr.rs index dd2bce47..80e169e8 100644 --- a/src/usic0_ch0/dx4cr.rs +++ b/src/usic0_ch0/dx4cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX4CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX4CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DXnA is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DXnB is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DXnC is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DXnD is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DXnE is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DXnF is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DXnG is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,369 +101,369 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DXnT."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DXnT."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DXnT."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -471,169 +471,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DXnS is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DXnS is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX4CR_SPEC; -impl crate::RegisterSpec for DX4CR_SPEC { +pub struct Dx4crSpec; +impl crate::RegisterSpec for Dx4crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx4cr::R`](R) reader structure"] -impl crate::Readable for DX4CR_SPEC {} +impl crate::Readable for Dx4crSpec {} #[doc = "`write(|w| ..)` method takes [`dx4cr::W`](W) writer structure"] -impl crate::Writable for DX4CR_SPEC { +impl crate::Writable for Dx4crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX4CR to value 0"] -impl crate::Resettable for DX4CR_SPEC { +impl crate::Resettable for Dx4crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx5cr.rs b/src/usic0_ch0/dx5cr.rs index ac078663..9939e343 100644 --- a/src/usic0_ch0/dx5cr.rs +++ b/src/usic0_ch0/dx5cr.rs @@ -1,99 +1,99 @@ #[doc = "Register `DX5CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX5CR` writer"] -pub type W = crate::W; -#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSEL_A { +pub enum Dsel { #[doc = "0: The data input DXnA is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data input DXnB is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The data input DXnC is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The data input DXnD is selected."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The data input DXnE is selected."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The data input DXnF is selected."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The data input DXnG is selected."] - VALUE7 = 6, + Value7 = 6, #[doc = "7: The data input is always 1."] - VALUE8 = 7, + Value8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSEL_A) -> Self { + fn from(variant: Dsel) -> Self { variant as _ } } -impl crate::FieldSpec for DSEL_A { +impl crate::FieldSpec for Dsel { type Ux = u8; } -impl DSEL_R { +#[doc = "Field `DSEL` reader - Data Selection for Input Signal"] +pub type DselR = crate::FieldReader; +impl DselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEL_A { + pub const fn variant(&self) -> Dsel { match self.bits { - 0 => DSEL_A::VALUE1, - 1 => DSEL_A::VALUE2, - 2 => DSEL_A::VALUE3, - 3 => DSEL_A::VALUE4, - 4 => DSEL_A::VALUE5, - 5 => DSEL_A::VALUE6, - 6 => DSEL_A::VALUE7, - 7 => DSEL_A::VALUE8, + 0 => Dsel::Value1, + 1 => Dsel::Value2, + 2 => Dsel::Value3, + 3 => Dsel::Value4, + 4 => Dsel::Value5, + 5 => Dsel::Value6, + 6 => Dsel::Value7, + 7 => Dsel::Value8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEL_A::VALUE1 + *self == Dsel::Value1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEL_A::VALUE2 + *self == Dsel::Value2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSEL_A::VALUE3 + *self == Dsel::Value3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSEL_A::VALUE4 + *self == Dsel::Value4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == DSEL_A::VALUE5 + *self == Dsel::Value5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == DSEL_A::VALUE6 + *self == Dsel::Value6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == DSEL_A::VALUE7 + *self == Dsel::Value7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == DSEL_A::VALUE8 + *self == Dsel::Value8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, DSEL_A>; -impl<'a, REG> DSEL_W<'a, REG> +pub type DselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, Dsel>; +impl<'a, REG> DselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -101,369 +101,369 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE1) + self.variant(Dsel::Value1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE2) + self.variant(Dsel::Value2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE3) + self.variant(Dsel::Value3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE4) + self.variant(Dsel::Value4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE5) + self.variant(Dsel::Value5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE6) + self.variant(Dsel::Value6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE7) + self.variant(Dsel::Value7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(DSEL_A::VALUE8) + self.variant(Dsel::Value8) } } -#[doc = "Field `INSW` reader - Input Switch"] -pub type INSW_R = crate::BitReader; #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum INSW_A { +pub enum Insw { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: INSW_A) -> Self { + fn from(variant: Insw) -> Self { variant as u8 != 0 } } -impl INSW_R { +#[doc = "Field `INSW` reader - Input Switch"] +pub type InswR = crate::BitReader; +impl InswR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> INSW_A { + pub const fn variant(&self) -> Insw { match self.bits { - false => INSW_A::VALUE1, - true => INSW_A::VALUE2, + false => Insw::Value1, + true => Insw::Value2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == INSW_A::VALUE1 + *self == Insw::Value1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == INSW_A::VALUE2 + *self == Insw::Value2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; -impl<'a, REG> INSW_W<'a, REG> +pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; +impl<'a, REG> InswW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE1) + self.variant(Insw::Value1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(INSW_A::VALUE2) + self.variant(Insw::Value2) } } -#[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DFEN_R = crate::BitReader; #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DFEN_A { +pub enum Dfen { #[doc = "0: The input signal is not digitally filtered."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is digitally filtered."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DFEN_A) -> Self { + fn from(variant: Dfen) -> Self { variant as u8 != 0 } } -impl DFEN_R { +#[doc = "Field `DFEN` reader - Digital Filter Enable"] +pub type DfenR = crate::BitReader; +impl DfenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DFEN_A { + pub const fn variant(&self) -> Dfen { match self.bits { - false => DFEN_A::VALUE1, - true => DFEN_A::VALUE2, + false => Dfen::Value1, + true => Dfen::Value2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DFEN_A::VALUE1 + *self == Dfen::Value1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DFEN_A::VALUE2 + *self == Dfen::Value2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; -impl<'a, REG> DFEN_W<'a, REG> +pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; +impl<'a, REG> DfenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE1) + self.variant(Dfen::Value1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DFEN_A::VALUE2) + self.variant(Dfen::Value2) } } -#[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DSEN_R = crate::BitReader; #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DSEN_A { +pub enum Dsen { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DSEN_A) -> Self { + fn from(variant: Dsen) -> Self { variant as u8 != 0 } } -impl DSEN_R { +#[doc = "Field `DSEN` reader - Data Synchronization Enable"] +pub type DsenR = crate::BitReader; +impl DsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DSEN_A { + pub const fn variant(&self) -> Dsen { match self.bits { - false => DSEN_A::VALUE1, - true => DSEN_A::VALUE2, + false => Dsen::Value1, + true => Dsen::Value2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSEN_A::VALUE1 + *self == Dsen::Value1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DSEN_A::VALUE2 + *self == Dsen::Value2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; -impl<'a, REG> DSEN_W<'a, REG> +pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; +impl<'a, REG> DsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE1) + self.variant(Dsen::Value1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DSEN_A::VALUE2) + self.variant(Dsen::Value2) } } -#[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DPOL_R = crate::BitReader; #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPOL_A { +pub enum Dpol { #[doc = "0: The input signal is not inverted."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The input signal is inverted."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPOL_A) -> Self { + fn from(variant: Dpol) -> Self { variant as u8 != 0 } } -impl DPOL_R { +#[doc = "Field `DPOL` reader - Data Polarity for DXn"] +pub type DpolR = crate::BitReader; +impl DpolR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPOL_A { + pub const fn variant(&self) -> Dpol { match self.bits { - false => DPOL_A::VALUE1, - true => DPOL_A::VALUE2, + false => Dpol::Value1, + true => Dpol::Value2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPOL_A::VALUE1 + *self == Dpol::Value1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPOL_A::VALUE2 + *self == Dpol::Value2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; -impl<'a, REG> DPOL_W<'a, REG> +pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; +impl<'a, REG> DpolW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE1) + self.variant(Dpol::Value1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPOL_A::VALUE2) + self.variant(Dpol::Value2) } } -#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SFSEL_R = crate::BitReader; #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SFSEL_A { +pub enum Sfsel { #[doc = "0: The sampling frequency is fPB."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The sampling frequency is fFD."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SFSEL_A) -> Self { + fn from(variant: Sfsel) -> Self { variant as u8 != 0 } } -impl SFSEL_R { +#[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] +pub type SfselR = crate::BitReader; +impl SfselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SFSEL_A { + pub const fn variant(&self) -> Sfsel { match self.bits { - false => SFSEL_A::VALUE1, - true => SFSEL_A::VALUE2, + false => Sfsel::Value1, + true => Sfsel::Value2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SFSEL_A::VALUE1 + *self == Sfsel::Value1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SFSEL_A::VALUE2 + *self == Sfsel::Value2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; -impl<'a, REG> SFSEL_W<'a, REG> +pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; +impl<'a, REG> SfselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE1) + self.variant(Sfsel::Value1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SFSEL_A::VALUE2) + self.variant(Sfsel::Value2) } } -#[doc = "Field `CM` reader - Combination Mode"] -pub type CM_R = crate::FieldReader; #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CM_A { +pub enum Cm { #[doc = "0: The trigger activation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A rising edge activates DXnT."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A falling edge activates DXnT."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Both edges activate DXnT."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CM_A) -> Self { + fn from(variant: Cm) -> Self { variant as _ } } -impl crate::FieldSpec for CM_A { +impl crate::FieldSpec for Cm { type Ux = u8; } -impl CM_R { +#[doc = "Field `CM` reader - Combination Mode"] +pub type CmR = crate::FieldReader; +impl CmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CM_A { + pub const fn variant(&self) -> Cm { match self.bits { - 0 => CM_A::VALUE1, - 1 => CM_A::VALUE2, - 2 => CM_A::VALUE3, - 3 => CM_A::VALUE4, + 0 => Cm::Value1, + 1 => Cm::Value2, + 2 => Cm::Value3, + 3 => Cm::Value4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CM_A::VALUE1 + *self == Cm::Value1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CM_A::VALUE2 + *self == Cm::Value2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CM_A::VALUE3 + *self == Cm::Value3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CM_A::VALUE4 + *self == Cm::Value4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CM_A>; -impl<'a, REG> CM_W<'a, REG> +pub type CmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cm>; +impl<'a, REG> CmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -471,169 +471,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE1) + self.variant(Cm::Value1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE2) + self.variant(Cm::Value2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE3) + self.variant(Cm::Value3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CM_A::VALUE4) + self.variant(Cm::Value4) } } -#[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DXS_R = crate::BitReader; #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DXS_A { +pub enum Dxs { #[doc = "0: The current value of DXnS is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The current value of DXnS is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DXS_A) -> Self { + fn from(variant: Dxs) -> Self { variant as u8 != 0 } } -impl DXS_R { +#[doc = "Field `DXS` reader - Synchronized Data Value"] +pub type DxsR = crate::BitReader; +impl DxsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DXS_A { + pub const fn variant(&self) -> Dxs { match self.bits { - false => DXS_A::VALUE1, - true => DXS_A::VALUE2, + false => Dxs::Value1, + true => Dxs::Value2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DXS_A::VALUE1 + *self == Dxs::Value1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DXS_A::VALUE2 + *self == Dxs::Value2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DSEL_R { - DSEL_R::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DselR { + DselR::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> INSW_R { - INSW_R::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> InswR { + InswR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DFEN_R { - DFEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DfenR { + DfenR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DSEN_R { - DSEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DsenR { + DsenR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DPOL_R { - DPOL_R::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DpolR { + DpolR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SFSEL_R { - SFSEL_R::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SfselR { + SfselR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CM_R { - CM_R::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CmR { + CmR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DXS_R { - DXS_R::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DxsR { + DxsR::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DSEL_W { - DSEL_W::new(self, 0) + pub fn dsel(&mut self) -> DselW { + DselW::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> INSW_W { - INSW_W::new(self, 4) + pub fn insw(&mut self) -> InswW { + InswW::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DFEN_W { - DFEN_W::new(self, 5) + pub fn dfen(&mut self) -> DfenW { + DfenW::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DSEN_W { - DSEN_W::new(self, 6) + pub fn dsen(&mut self) -> DsenW { + DsenW::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DPOL_W { - DPOL_W::new(self, 8) + pub fn dpol(&mut self) -> DpolW { + DpolW::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SFSEL_W { - SFSEL_W::new(self, 9) + pub fn sfsel(&mut self) -> SfselW { + SfselW::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CM_W { - CM_W::new(self, 10) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cm(&mut self) -> CmW { + CmW::new(self, 10) } } #[doc = "Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DX5CR_SPEC; -impl crate::RegisterSpec for DX5CR_SPEC { +pub struct Dx5crSpec; +impl crate::RegisterSpec for Dx5crSpec { type Ux = u32; } #[doc = "`read()` method returns [`dx5cr::R`](R) reader structure"] -impl crate::Readable for DX5CR_SPEC {} +impl crate::Readable for Dx5crSpec {} #[doc = "`write(|w| ..)` method takes [`dx5cr::W`](W) writer structure"] -impl crate::Writable for DX5CR_SPEC { +impl crate::Writable for Dx5crSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX5CR to value 0"] -impl crate::Resettable for DX5CR_SPEC { +impl crate::Resettable for Dx5crSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/fdr.rs b/src/usic0_ch0/fdr.rs index fc5d4f8e..026feb85 100644 --- a/src/usic0_ch0/fdr.rs +++ b/src/usic0_ch0/fdr.rs @@ -1,71 +1,71 @@ #[doc = "Register `FDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FDR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STEP` reader - Step Value"] -pub type STEP_R = crate::FieldReader; +pub type StepR = crate::FieldReader; #[doc = "Field `STEP` writer - Step Value"] -pub type STEP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; -#[doc = "Field `DM` reader - Divider Mode"] -pub type DM_R = crate::FieldReader; +pub type StepW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Divider Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DM_A { +pub enum Dm { #[doc = "0: The divider is switched off, fFD = 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Normal divider mode selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Fractional divider mode selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The divider is switched off, fFD = 0."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DM_A) -> Self { + fn from(variant: Dm) -> Self { variant as _ } } -impl crate::FieldSpec for DM_A { +impl crate::FieldSpec for Dm { type Ux = u8; } -impl DM_R { +#[doc = "Field `DM` reader - Divider Mode"] +pub type DmR = crate::FieldReader; +impl DmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DM_A { + pub const fn variant(&self) -> Dm { match self.bits { - 0 => DM_A::VALUE1, - 1 => DM_A::VALUE2, - 2 => DM_A::VALUE3, - 3 => DM_A::VALUE4, + 0 => Dm::Value1, + 1 => Dm::Value2, + 2 => Dm::Value3, + 3 => Dm::Value4, _ => unreachable!(), } } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DM_A::VALUE1 + *self == Dm::Value1 } #[doc = "Normal divider mode selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DM_A::VALUE2 + *self == Dm::Value2 } #[doc = "Fractional divider mode selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DM_A::VALUE3 + *self == Dm::Value3 } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DM_A::VALUE4 + *self == Dm::Value4 } } #[doc = "Field `DM` writer - Divider Mode"] -pub type DM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DM_A>; -impl<'a, REG> DM_W<'a, REG> +pub type DmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Dm>; +impl<'a, REG> DmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,80 +73,71 @@ where #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DM_A::VALUE1) + self.variant(Dm::Value1) } #[doc = "Normal divider mode selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DM_A::VALUE2) + self.variant(Dm::Value2) } #[doc = "Fractional divider mode selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DM_A::VALUE3) + self.variant(Dm::Value3) } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DM_A::VALUE4) + self.variant(Dm::Value4) } } #[doc = "Field `RESULT` reader - Result Value"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; impl R { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - pub fn step(&self) -> STEP_R { - STEP_R::new((self.bits & 0x03ff) as u16) + pub fn step(&self) -> StepR { + StepR::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - pub fn dm(&self) -> DM_R { - DM_R::new(((self.bits >> 14) & 3) as u8) + pub fn dm(&self) -> DmR { + DmR::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:25 - Result Value"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new(((self.bits >> 16) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] #[must_use] - pub fn step(&mut self) -> STEP_W { - STEP_W::new(self, 0) + pub fn step(&mut self) -> StepW { + StepW::new(self, 0) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] #[must_use] - pub fn dm(&mut self) -> DM_W { - DM_W::new(self, 14) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn dm(&mut self) -> DmW { + DmW::new(self, 14) } } #[doc = "Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FDR_SPEC; -impl crate::RegisterSpec for FDR_SPEC { +pub struct FdrSpec; +impl crate::RegisterSpec for FdrSpec { type Ux = u32; } #[doc = "`read()` method returns [`fdr::R`](R) reader structure"] -impl crate::Readable for FDR_SPEC {} +impl crate::Readable for FdrSpec {} #[doc = "`write(|w| ..)` method takes [`fdr::W`](W) writer structure"] -impl crate::Writable for FDR_SPEC { +impl crate::Writable for FdrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FDR to value 0"] -impl crate::Resettable for FDR_SPEC { +impl crate::Resettable for FdrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/fmr.rs b/src/usic0_ch0/fmr.rs index 9ac76f8d..c5cf9480 100644 --- a/src/usic0_ch0/fmr.rs +++ b/src/usic0_ch0/fmr.rs @@ -1,28 +1,28 @@ #[doc = "Register `FMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Modify Transmit Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum MTDV_AW { +pub enum Mtdv { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TDV is set, TE is unchanged."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Bits TDV and TE are cleared."] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: MTDV_AW) -> Self { + fn from(variant: Mtdv) -> Self { variant as _ } } -impl crate::FieldSpec for MTDV_AW { +impl crate::FieldSpec for Mtdv { type Ux = u8; } #[doc = "Field `MTDV` writer - Modify Transmit Data Valid"] -pub type MTDV_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MTDV_AW>; -impl<'a, REG> MTDV_W<'a, REG> +pub type MtdvW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mtdv>; +impl<'a, REG> MtdvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -30,381 +30,372 @@ where #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MTDV_AW::VALUE1) + self.variant(Mtdv::Value1) } #[doc = "Bit TDV is set, TE is unchanged."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MTDV_AW::VALUE2) + self.variant(Mtdv::Value2) } #[doc = "Bits TDV and TE are cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(MTDV_AW::VALUE3) + self.variant(Mtdv::Value3) } } #[doc = "Activate Bit TVC\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ATVC_AW { +pub enum Atvc { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TCSR.TVC is set."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ATVC_AW) -> Self { + fn from(variant: Atvc) -> Self { variant as u8 != 0 } } #[doc = "Field `ATVC` writer - Activate Bit TVC"] -pub type ATVC_W<'a, REG> = crate::BitWriter<'a, REG, ATVC_AW>; -impl<'a, REG> ATVC_W<'a, REG> +pub type AtvcW<'a, REG> = crate::BitWriter<'a, REG, Atvc>; +impl<'a, REG> AtvcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ATVC_AW::VALUE1) + self.variant(Atvc::Value1) } #[doc = "Bit TCSR.TVC is set."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ATVC_AW::VALUE2) + self.variant(Atvc::Value2) } } #[doc = "Clear Bits RDV for RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CRDV0_AW { +pub enum Crdv0 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CRDV0_AW) -> Self { + fn from(variant: Crdv0) -> Self { variant as u8 != 0 } } #[doc = "Field `CRDV0` writer - Clear Bits RDV for RBUF0"] -pub type CRDV0_W<'a, REG> = crate::BitWriter<'a, REG, CRDV0_AW>; -impl<'a, REG> CRDV0_W<'a, REG> +pub type Crdv0W<'a, REG> = crate::BitWriter<'a, REG, Crdv0>; +impl<'a, REG> Crdv0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRDV0_AW::VALUE1) + self.variant(Crdv0::Value1) } #[doc = "Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRDV0_AW::VALUE2) + self.variant(Crdv0::Value2) } } #[doc = "Clear Bit RDV for RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CRDV1_AW { +pub enum Crdv1 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CRDV1_AW) -> Self { + fn from(variant: Crdv1) -> Self { variant as u8 != 0 } } #[doc = "Field `CRDV1` writer - Clear Bit RDV for RBUF1"] -pub type CRDV1_W<'a, REG> = crate::BitWriter<'a, REG, CRDV1_AW>; -impl<'a, REG> CRDV1_W<'a, REG> +pub type Crdv1W<'a, REG> = crate::BitWriter<'a, REG, Crdv1>; +impl<'a, REG> Crdv1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRDV1_AW::VALUE1) + self.variant(Crdv1::Value1) } #[doc = "Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRDV1_AW::VALUE2) + self.variant(Crdv1::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO0_AW { +pub enum Sio0 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO0_AW) -> Self { + fn from(variant: Sio0) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO0` writer - Set Interrupt Output SRx"] -pub type SIO0_W<'a, REG> = crate::BitWriter<'a, REG, SIO0_AW>; -impl<'a, REG> SIO0_W<'a, REG> +pub type Sio0W<'a, REG> = crate::BitWriter<'a, REG, Sio0>; +impl<'a, REG> Sio0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO0_AW::VALUE1) + self.variant(Sio0::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO0_AW::VALUE2) + self.variant(Sio0::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO1_AW { +pub enum Sio1 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO1_AW) -> Self { + fn from(variant: Sio1) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO1` writer - Set Interrupt Output SRx"] -pub type SIO1_W<'a, REG> = crate::BitWriter<'a, REG, SIO1_AW>; -impl<'a, REG> SIO1_W<'a, REG> +pub type Sio1W<'a, REG> = crate::BitWriter<'a, REG, Sio1>; +impl<'a, REG> Sio1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO1_AW::VALUE1) + self.variant(Sio1::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO1_AW::VALUE2) + self.variant(Sio1::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO2_AW { +pub enum Sio2 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO2_AW) -> Self { + fn from(variant: Sio2) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO2` writer - Set Interrupt Output SRx"] -pub type SIO2_W<'a, REG> = crate::BitWriter<'a, REG, SIO2_AW>; -impl<'a, REG> SIO2_W<'a, REG> +pub type Sio2W<'a, REG> = crate::BitWriter<'a, REG, Sio2>; +impl<'a, REG> Sio2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO2_AW::VALUE1) + self.variant(Sio2::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO2_AW::VALUE2) + self.variant(Sio2::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO3_AW { +pub enum Sio3 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO3_AW) -> Self { + fn from(variant: Sio3) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO3` writer - Set Interrupt Output SRx"] -pub type SIO3_W<'a, REG> = crate::BitWriter<'a, REG, SIO3_AW>; -impl<'a, REG> SIO3_W<'a, REG> +pub type Sio3W<'a, REG> = crate::BitWriter<'a, REG, Sio3>; +impl<'a, REG> Sio3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO3_AW::VALUE1) + self.variant(Sio3::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO3_AW::VALUE2) + self.variant(Sio3::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO4_AW { +pub enum Sio4 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO4_AW) -> Self { + fn from(variant: Sio4) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO4` writer - Set Interrupt Output SRx"] -pub type SIO4_W<'a, REG> = crate::BitWriter<'a, REG, SIO4_AW>; -impl<'a, REG> SIO4_W<'a, REG> +pub type Sio4W<'a, REG> = crate::BitWriter<'a, REG, Sio4>; +impl<'a, REG> Sio4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO4_AW::VALUE1) + self.variant(Sio4::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO4_AW::VALUE2) + self.variant(Sio4::Value2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SIO5_AW { +pub enum Sio5 { #[doc = "0: No action."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The service request output SRx is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SIO5_AW) -> Self { + fn from(variant: Sio5) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO5` writer - Set Interrupt Output SRx"] -pub type SIO5_W<'a, REG> = crate::BitWriter<'a, REG, SIO5_AW>; -impl<'a, REG> SIO5_W<'a, REG> +pub type Sio5W<'a, REG> = crate::BitWriter<'a, REG, Sio5>; +impl<'a, REG> Sio5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIO5_AW::VALUE1) + self.variant(Sio5::Value1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIO5_AW::VALUE2) + self.variant(Sio5::Value2) } } impl W { #[doc = "Bits 0:1 - Modify Transmit Data Valid"] #[inline(always)] #[must_use] - pub fn mtdv(&mut self) -> MTDV_W { - MTDV_W::new(self, 0) + pub fn mtdv(&mut self) -> MtdvW { + MtdvW::new(self, 0) } #[doc = "Bit 4 - Activate Bit TVC"] #[inline(always)] #[must_use] - pub fn atvc(&mut self) -> ATVC_W { - ATVC_W::new(self, 4) + pub fn atvc(&mut self) -> AtvcW { + AtvcW::new(self, 4) } #[doc = "Bit 14 - Clear Bits RDV for RBUF0"] #[inline(always)] #[must_use] - pub fn crdv0(&mut self) -> CRDV0_W { - CRDV0_W::new(self, 14) + pub fn crdv0(&mut self) -> Crdv0W { + Crdv0W::new(self, 14) } #[doc = "Bit 15 - Clear Bit RDV for RBUF1"] #[inline(always)] #[must_use] - pub fn crdv1(&mut self) -> CRDV1_W { - CRDV1_W::new(self, 15) + pub fn crdv1(&mut self) -> Crdv1W { + Crdv1W::new(self, 15) } #[doc = "Bit 16 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio0(&mut self) -> SIO0_W { - SIO0_W::new(self, 16) + pub fn sio0(&mut self) -> Sio0W { + Sio0W::new(self, 16) } #[doc = "Bit 17 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio1(&mut self) -> SIO1_W { - SIO1_W::new(self, 17) + pub fn sio1(&mut self) -> Sio1W { + Sio1W::new(self, 17) } #[doc = "Bit 18 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio2(&mut self) -> SIO2_W { - SIO2_W::new(self, 18) + pub fn sio2(&mut self) -> Sio2W { + Sio2W::new(self, 18) } #[doc = "Bit 19 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio3(&mut self) -> SIO3_W { - SIO3_W::new(self, 19) + pub fn sio3(&mut self) -> Sio3W { + Sio3W::new(self, 19) } #[doc = "Bit 20 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio4(&mut self) -> SIO4_W { - SIO4_W::new(self, 20) + pub fn sio4(&mut self) -> Sio4W { + Sio4W::new(self, 20) } #[doc = "Bit 21 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio5(&mut self) -> SIO5_W { - SIO5_W::new(self, 21) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sio5(&mut self) -> Sio5W { + Sio5W::new(self, 21) } } #[doc = "Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FMR_SPEC; -impl crate::RegisterSpec for FMR_SPEC { +pub struct FmrSpec; +impl crate::RegisterSpec for FmrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`fmr::W`](W) writer structure"] -impl crate::Writable for FMR_SPEC { +impl crate::Writable for FmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FMR to value 0"] -impl crate::Resettable for FMR_SPEC { +impl crate::Resettable for FmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/in_.rs b/src/usic0_ch0/in_.rs index 85c48e1d..e70671a3 100644 --- a/src/usic0_ch0/in_.rs +++ b/src/usic0_ch0/in_.rs @@ -1,37 +1,28 @@ #[doc = "Register `IN[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TDATA` writer - Transmit Data"] -pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] #[must_use] - pub fn tdata(&mut self) -> TDATA_W { - TDATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tdata(&mut self) -> TdataW { + TdataW::new(self, 0) } } #[doc = "Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IN_SPEC; -impl crate::RegisterSpec for IN_SPEC { +pub struct InSpec; +impl crate::RegisterSpec for InSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`in_::W`](W) writer structure"] -impl crate::Writable for IN_SPEC { +impl crate::Writable for InSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IN[%s] to value 0"] -impl crate::Resettable for IN_SPEC { +impl crate::Resettable for InSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/inpr.rs b/src/usic0_ch0/inpr.rs index deaadb9b..8e8e6255 100644 --- a/src/usic0_ch0/inpr.rs +++ b/src/usic0_ch0/inpr.rs @@ -1,83 +1,83 @@ #[doc = "Register `INPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INPR` writer"] -pub type W = crate::W; -#[doc = "Field `TSINP` reader - Transmit Shift Interrupt Node Pointer"] -pub type TSINP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Transmit Shift Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TSINP_A { +pub enum Tsinp { #[doc = "0: Output SR0 becomes activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output SR1 becomes activated."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Output SR2 becomes activated."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Output SR3 becomes activated."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Output SR4 becomes activated."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Output SR5 becomes activated."] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TSINP_A) -> Self { + fn from(variant: Tsinp) -> Self { variant as _ } } -impl crate::FieldSpec for TSINP_A { +impl crate::FieldSpec for Tsinp { type Ux = u8; } -impl TSINP_R { +#[doc = "Field `TSINP` reader - Transmit Shift Interrupt Node Pointer"] +pub type TsinpR = crate::FieldReader; +impl TsinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TSINP_A::VALUE1), - 1 => Some(TSINP_A::VALUE2), - 2 => Some(TSINP_A::VALUE3), - 3 => Some(TSINP_A::VALUE4), - 4 => Some(TSINP_A::VALUE5), - 5 => Some(TSINP_A::VALUE6), + 0 => Some(Tsinp::Value1), + 1 => Some(Tsinp::Value2), + 2 => Some(Tsinp::Value3), + 3 => Some(Tsinp::Value4), + 4 => Some(Tsinp::Value5), + 5 => Some(Tsinp::Value6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSINP_A::VALUE1 + *self == Tsinp::Value1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSINP_A::VALUE2 + *self == Tsinp::Value2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TSINP_A::VALUE3 + *self == Tsinp::Value3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TSINP_A::VALUE4 + *self == Tsinp::Value4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == TSINP_A::VALUE5 + *self == Tsinp::Value5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == TSINP_A::VALUE6 + *self == Tsinp::Value6 } } #[doc = "Field `TSINP` writer - Transmit Shift Interrupt Node Pointer"] -pub type TSINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TSINP_A>; -impl<'a, REG> TSINP_W<'a, REG> +pub type TsinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tsinp>; +impl<'a, REG> TsinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -85,132 +85,123 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE1) + self.variant(Tsinp::Value1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE2) + self.variant(Tsinp::Value2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE3) + self.variant(Tsinp::Value3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE4) + self.variant(Tsinp::Value4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE5) + self.variant(Tsinp::Value5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(TSINP_A::VALUE6) + self.variant(Tsinp::Value6) } } #[doc = "Field `TBINP` reader - Transmit Buffer Interrupt Node Pointer"] -pub type TBINP_R = crate::FieldReader; +pub type TbinpR = crate::FieldReader; #[doc = "Field `TBINP` writer - Transmit Buffer Interrupt Node Pointer"] -pub type TBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `RINP` reader - Receive Interrupt Node Pointer"] -pub type RINP_R = crate::FieldReader; +pub type RinpR = crate::FieldReader; #[doc = "Field `RINP` writer - Receive Interrupt Node Pointer"] -pub type RINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type RinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AINP` reader - Alternative Receive Interrupt Node Pointer"] -pub type AINP_R = crate::FieldReader; +pub type AinpR = crate::FieldReader; #[doc = "Field `AINP` writer - Alternative Receive Interrupt Node Pointer"] -pub type AINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PINP` reader - Transmit Shift Interrupt Node Pointer"] -pub type PINP_R = crate::FieldReader; +pub type PinpR = crate::FieldReader; #[doc = "Field `PINP` writer - Transmit Shift Interrupt Node Pointer"] -pub type PINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - pub fn tsinp(&self) -> TSINP_R { - TSINP_R::new((self.bits & 7) as u8) + pub fn tsinp(&self) -> TsinpR { + TsinpR::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn tbinp(&self) -> TBINP_R { - TBINP_R::new(((self.bits >> 4) & 7) as u8) + pub fn tbinp(&self) -> TbinpR { + TbinpR::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"] #[inline(always)] - pub fn rinp(&self) -> RINP_R { - RINP_R::new(((self.bits >> 8) & 7) as u8) + pub fn rinp(&self) -> RinpR { + RinpR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"] #[inline(always)] - pub fn ainp(&self) -> AINP_R { - AINP_R::new(((self.bits >> 12) & 7) as u8) + pub fn ainp(&self) -> AinpR { + AinpR::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - pub fn pinp(&self) -> PINP_R { - PINP_R::new(((self.bits >> 16) & 7) as u8) + pub fn pinp(&self) -> PinpR { + PinpR::new(((self.bits >> 16) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn tsinp(&mut self) -> TSINP_W { - TSINP_W::new(self, 0) + pub fn tsinp(&mut self) -> TsinpW { + TsinpW::new(self, 0) } #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn tbinp(&mut self) -> TBINP_W { - TBINP_W::new(self, 4) + pub fn tbinp(&mut self) -> TbinpW { + TbinpW::new(self, 4) } #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn rinp(&mut self) -> RINP_W { - RINP_W::new(self, 8) + pub fn rinp(&mut self) -> RinpW { + RinpW::new(self, 8) } #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn ainp(&mut self) -> AINP_W { - AINP_W::new(self, 12) + pub fn ainp(&mut self) -> AinpW { + AinpW::new(self, 12) } #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn pinp(&mut self) -> PINP_W { - PINP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn pinp(&mut self) -> PinpW { + PinpW::new(self, 16) } } #[doc = "Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct INPR_SPEC; -impl crate::RegisterSpec for INPR_SPEC { +pub struct InprSpec; +impl crate::RegisterSpec for InprSpec { type Ux = u32; } #[doc = "`read()` method returns [`inpr::R`](R) reader structure"] -impl crate::Readable for INPR_SPEC {} +impl crate::Readable for InprSpec {} #[doc = "`write(|w| ..)` method takes [`inpr::W`](W) writer structure"] -impl crate::Writable for INPR_SPEC { +impl crate::Writable for InprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPR to value 0"] -impl crate::Resettable for INPR_SPEC { +impl crate::Resettable for InprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/kscfg.rs b/src/usic0_ch0/kscfg.rs index f85e69dd..4813f0a5 100644 --- a/src/usic0_ch0/kscfg.rs +++ b/src/usic0_ch0/kscfg.rs @@ -1,151 +1,151 @@ #[doc = "Register `KSCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `KSCFG` writer"] -pub type W = crate::W; -#[doc = "Field `MODEN` reader - Module Enable"] -pub type MODEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "Module Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MODEN_A { +pub enum Moden { #[doc = "0: The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MODEN_A) -> Self { + fn from(variant: Moden) -> Self { variant as u8 != 0 } } -impl MODEN_R { +#[doc = "Field `MODEN` reader - Module Enable"] +pub type ModenR = crate::BitReader; +impl ModenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MODEN_A { + pub const fn variant(&self) -> Moden { match self.bits { - false => MODEN_A::VALUE1, - true => MODEN_A::VALUE2, + false => Moden::Value1, + true => Moden::Value2, } } #[doc = "The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MODEN_A::VALUE1 + *self == Moden::Value1 } #[doc = "The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MODEN_A::VALUE2 + *self == Moden::Value2 } } #[doc = "Field `MODEN` writer - Module Enable"] -pub type MODEN_W<'a, REG> = crate::BitWriter<'a, REG, MODEN_A>; -impl<'a, REG> MODEN_W<'a, REG> +pub type ModenW<'a, REG> = crate::BitWriter<'a, REG, Moden>; +impl<'a, REG> ModenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MODEN_A::VALUE1) + self.variant(Moden::Value1) } #[doc = "The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MODEN_A::VALUE2) + self.variant(Moden::Value2) } } #[doc = "Bit Protection for MODEN\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BPMODEN_AW { +pub enum Bpmoden { #[doc = "0: MODEN is not changed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: MODEN is updated with the written value."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BPMODEN_AW) -> Self { + fn from(variant: Bpmoden) -> Self { variant as u8 != 0 } } #[doc = "Field `BPMODEN` writer - Bit Protection for MODEN"] -pub type BPMODEN_W<'a, REG> = crate::BitWriter<'a, REG, BPMODEN_AW>; -impl<'a, REG> BPMODEN_W<'a, REG> +pub type BpmodenW<'a, REG> = crate::BitWriter<'a, REG, Bpmoden>; +impl<'a, REG> BpmodenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MODEN is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BPMODEN_AW::VALUE1) + self.variant(Bpmoden::Value1) } #[doc = "MODEN is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BPMODEN_AW::VALUE2) + self.variant(Bpmoden::Value2) } } -#[doc = "Field `NOMCFG` reader - Normal Operation Mode Configuration"] -pub type NOMCFG_R = crate::FieldReader; #[doc = "Normal Operation Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NOMCFG_A { +pub enum Nomcfg { #[doc = "0: Run mode 0 is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Run mode 1 is selected."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Stop mode 0 is selected."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Stop mode 1 is selected."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NOMCFG_A) -> Self { + fn from(variant: Nomcfg) -> Self { variant as _ } } -impl crate::FieldSpec for NOMCFG_A { +impl crate::FieldSpec for Nomcfg { type Ux = u8; } -impl NOMCFG_R { +#[doc = "Field `NOMCFG` reader - Normal Operation Mode Configuration"] +pub type NomcfgR = crate::FieldReader; +impl NomcfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NOMCFG_A { + pub const fn variant(&self) -> Nomcfg { match self.bits { - 0 => NOMCFG_A::VALUE1, - 1 => NOMCFG_A::VALUE2, - 2 => NOMCFG_A::VALUE3, - 3 => NOMCFG_A::VALUE4, + 0 => Nomcfg::Value1, + 1 => Nomcfg::Value2, + 2 => Nomcfg::Value3, + 3 => Nomcfg::Value4, _ => unreachable!(), } } #[doc = "Run mode 0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NOMCFG_A::VALUE1 + *self == Nomcfg::Value1 } #[doc = "Run mode 1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NOMCFG_A::VALUE2 + *self == Nomcfg::Value2 } #[doc = "Stop mode 0 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == NOMCFG_A::VALUE3 + *self == Nomcfg::Value3 } #[doc = "Stop mode 1 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == NOMCFG_A::VALUE4 + *self == Nomcfg::Value4 } } #[doc = "Field `NOMCFG` writer - Normal Operation Mode Configuration"] -pub type NOMCFG_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, NOMCFG_A>; -impl<'a, REG> NOMCFG_W<'a, REG> +pub type NomcfgW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Nomcfg>; +impl<'a, REG> NomcfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -153,168 +153,159 @@ where #[doc = "Run mode 0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NOMCFG_A::VALUE1) + self.variant(Nomcfg::Value1) } #[doc = "Run mode 1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NOMCFG_A::VALUE2) + self.variant(Nomcfg::Value2) } #[doc = "Stop mode 0 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(NOMCFG_A::VALUE3) + self.variant(Nomcfg::Value3) } #[doc = "Stop mode 1 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(NOMCFG_A::VALUE4) + self.variant(Nomcfg::Value4) } } #[doc = "Bit Protection for NOMCFG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BPNOM_AW { +pub enum Bpnom { #[doc = "0: NOMCFG is not changed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: NOMCFG is updated with the written value."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BPNOM_AW) -> Self { + fn from(variant: Bpnom) -> Self { variant as u8 != 0 } } #[doc = "Field `BPNOM` writer - Bit Protection for NOMCFG"] -pub type BPNOM_W<'a, REG> = crate::BitWriter<'a, REG, BPNOM_AW>; -impl<'a, REG> BPNOM_W<'a, REG> +pub type BpnomW<'a, REG> = crate::BitWriter<'a, REG, Bpnom>; +impl<'a, REG> BpnomW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "NOMCFG is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BPNOM_AW::VALUE1) + self.variant(Bpnom::Value1) } #[doc = "NOMCFG is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BPNOM_AW::VALUE2) + self.variant(Bpnom::Value2) } } #[doc = "Field `SUMCFG` reader - Suspend Mode Configuration"] -pub type SUMCFG_R = crate::FieldReader; +pub type SumcfgR = crate::FieldReader; #[doc = "Field `SUMCFG` writer - Suspend Mode Configuration"] -pub type SUMCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SumcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Bit Protection for SUMCFG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BPSUM_AW { +pub enum Bpsum { #[doc = "0: SUMCFG is not changed."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: SUMCFG is updated with the written value."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BPSUM_AW) -> Self { + fn from(variant: Bpsum) -> Self { variant as u8 != 0 } } #[doc = "Field `BPSUM` writer - Bit Protection for SUMCFG"] -pub type BPSUM_W<'a, REG> = crate::BitWriter<'a, REG, BPSUM_AW>; -impl<'a, REG> BPSUM_W<'a, REG> +pub type BpsumW<'a, REG> = crate::BitWriter<'a, REG, Bpsum>; +impl<'a, REG> BpsumW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SUMCFG is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BPSUM_AW::VALUE1) + self.variant(Bpsum::Value1) } #[doc = "SUMCFG is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BPSUM_AW::VALUE2) + self.variant(Bpsum::Value2) } } impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn moden(&self) -> MODEN_R { - MODEN_R::new((self.bits & 1) != 0) + pub fn moden(&self) -> ModenR { + ModenR::new((self.bits & 1) != 0) } #[doc = "Bits 4:5 - Normal Operation Mode Configuration"] #[inline(always)] - pub fn nomcfg(&self) -> NOMCFG_R { - NOMCFG_R::new(((self.bits >> 4) & 3) as u8) + pub fn nomcfg(&self) -> NomcfgR { + NomcfgR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn sumcfg(&self) -> SUMCFG_R { - SUMCFG_R::new(((self.bits >> 8) & 3) as u8) + pub fn sumcfg(&self) -> SumcfgR { + SumcfgR::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn moden(&mut self) -> MODEN_W { - MODEN_W::new(self, 0) + pub fn moden(&mut self) -> ModenW { + ModenW::new(self, 0) } #[doc = "Bit 1 - Bit Protection for MODEN"] #[inline(always)] #[must_use] - pub fn bpmoden(&mut self) -> BPMODEN_W { - BPMODEN_W::new(self, 1) + pub fn bpmoden(&mut self) -> BpmodenW { + BpmodenW::new(self, 1) } #[doc = "Bits 4:5 - Normal Operation Mode Configuration"] #[inline(always)] #[must_use] - pub fn nomcfg(&mut self) -> NOMCFG_W { - NOMCFG_W::new(self, 4) + pub fn nomcfg(&mut self) -> NomcfgW { + NomcfgW::new(self, 4) } #[doc = "Bit 7 - Bit Protection for NOMCFG"] #[inline(always)] #[must_use] - pub fn bpnom(&mut self) -> BPNOM_W { - BPNOM_W::new(self, 7) + pub fn bpnom(&mut self) -> BpnomW { + BpnomW::new(self, 7) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn sumcfg(&mut self) -> SUMCFG_W { - SUMCFG_W::new(self, 8) + pub fn sumcfg(&mut self) -> SumcfgW { + SumcfgW::new(self, 8) } #[doc = "Bit 11 - Bit Protection for SUMCFG"] #[inline(always)] #[must_use] - pub fn bpsum(&mut self) -> BPSUM_W { - BPSUM_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bpsum(&mut self) -> BpsumW { + BpsumW::new(self, 11) } } #[doc = "Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct KSCFG_SPEC; -impl crate::RegisterSpec for KSCFG_SPEC { +pub struct KscfgSpec; +impl crate::RegisterSpec for KscfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`kscfg::R`](R) reader structure"] -impl crate::Readable for KSCFG_SPEC {} +impl crate::Readable for KscfgSpec {} #[doc = "`write(|w| ..)` method takes [`kscfg::W`](W) writer structure"] -impl crate::Writable for KSCFG_SPEC { +impl crate::Writable for KscfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KSCFG to value 0"] -impl crate::Resettable for KSCFG_SPEC { +impl crate::Resettable for KscfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/outdr.rs b/src/usic0_ch0/outdr.rs index 8080282f..f30c8536 100644 --- a/src/usic0_ch0/outdr.rs +++ b/src/usic0_ch0/outdr.rs @@ -1,29 +1,29 @@ #[doc = "Register `OUTDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Data from Shift Register"] -pub type DSR_R = crate::FieldReader; +pub type DsrR = crate::FieldReader; #[doc = "Field `RCI` reader - Receive Control Information from Shift Register"] -pub type RCI_R = crate::FieldReader; +pub type RciR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data from Shift Register"] #[inline(always)] - pub fn dsr(&self) -> DSR_R { - DSR_R::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DsrR { + DsrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:20 - Receive Control Information from Shift Register"] #[inline(always)] - pub fn rci(&self) -> RCI_R { - RCI_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn rci(&self) -> RciR { + RciR::new(((self.bits >> 16) & 0x1f) as u8) } } #[doc = "Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUTDR_SPEC; -impl crate::RegisterSpec for OUTDR_SPEC { +pub struct OutdrSpec; +impl crate::RegisterSpec for OutdrSpec { type Ux = u32; } #[doc = "`read()` method returns [`outdr::R`](R) reader structure"] -impl crate::Readable for OUTDR_SPEC {} +impl crate::Readable for OutdrSpec {} #[doc = "`reset()` method sets OUTDR to value 0"] -impl crate::Resettable for OUTDR_SPEC { +impl crate::Resettable for OutdrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/outr.rs b/src/usic0_ch0/outr.rs index ceffa844..aefb99a1 100644 --- a/src/usic0_ch0/outr.rs +++ b/src/usic0_ch0/outr.rs @@ -1,29 +1,29 @@ #[doc = "Register `OUTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Received Data"] -pub type DSR_R = crate::FieldReader; +pub type DsrR = crate::FieldReader; #[doc = "Field `RCI` reader - Receiver Control Information"] -pub type RCI_R = crate::FieldReader; +pub type RciR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Received Data"] #[inline(always)] - pub fn dsr(&self) -> DSR_R { - DSR_R::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DsrR { + DsrR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:20 - Receiver Control Information"] #[inline(always)] - pub fn rci(&self) -> RCI_R { - RCI_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn rci(&self) -> RciR { + RciR::new(((self.bits >> 16) & 0x1f) as u8) } } #[doc = "Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OUTR_SPEC; -impl crate::RegisterSpec for OUTR_SPEC { +pub struct OutrSpec; +impl crate::RegisterSpec for OutrSpec { type Ux = u32; } #[doc = "`read()` method returns [`outr::R`](R) reader structure"] -impl crate::Readable for OUTR_SPEC {} +impl crate::Readable for OutrSpec {} #[doc = "`reset()` method sets OUTR to value 0"] -impl crate::Resettable for OUTR_SPEC { +impl crate::Resettable for OutrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr.rs b/src/usic0_ch0/pcr.rs index d9217af7..e075cb0b 100644 --- a/src/usic0_ch0/pcr.rs +++ b/src/usic0_ch0/pcr.rs @@ -1,514 +1,505 @@ #[doc = "Register `PCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CTR0` reader - Protocol Control Bit 0"] -pub type CTR0_R = crate::BitReader; +pub type Ctr0R = crate::BitReader; #[doc = "Field `CTR0` writer - Protocol Control Bit 0"] -pub type CTR0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR1` reader - Protocol Control Bit 1"] -pub type CTR1_R = crate::BitReader; +pub type Ctr1R = crate::BitReader; #[doc = "Field `CTR1` writer - Protocol Control Bit 1"] -pub type CTR1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR2` reader - Protocol Control Bit 2"] -pub type CTR2_R = crate::BitReader; +pub type Ctr2R = crate::BitReader; #[doc = "Field `CTR2` writer - Protocol Control Bit 2"] -pub type CTR2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR3` reader - Protocol Control Bit 3"] -pub type CTR3_R = crate::BitReader; +pub type Ctr3R = crate::BitReader; #[doc = "Field `CTR3` writer - Protocol Control Bit 3"] -pub type CTR3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR4` reader - Protocol Control Bit 4"] -pub type CTR4_R = crate::BitReader; +pub type Ctr4R = crate::BitReader; #[doc = "Field `CTR4` writer - Protocol Control Bit 4"] -pub type CTR4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR5` reader - Protocol Control Bit 5"] -pub type CTR5_R = crate::BitReader; +pub type Ctr5R = crate::BitReader; #[doc = "Field `CTR5` writer - Protocol Control Bit 5"] -pub type CTR5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR6` reader - Protocol Control Bit 6"] -pub type CTR6_R = crate::BitReader; +pub type Ctr6R = crate::BitReader; #[doc = "Field `CTR6` writer - Protocol Control Bit 6"] -pub type CTR6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR7` reader - Protocol Control Bit 7"] -pub type CTR7_R = crate::BitReader; +pub type Ctr7R = crate::BitReader; #[doc = "Field `CTR7` writer - Protocol Control Bit 7"] -pub type CTR7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR8` reader - Protocol Control Bit 8"] -pub type CTR8_R = crate::BitReader; +pub type Ctr8R = crate::BitReader; #[doc = "Field `CTR8` writer - Protocol Control Bit 8"] -pub type CTR8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR9` reader - Protocol Control Bit 9"] -pub type CTR9_R = crate::BitReader; +pub type Ctr9R = crate::BitReader; #[doc = "Field `CTR9` writer - Protocol Control Bit 9"] -pub type CTR9_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR10` reader - Protocol Control Bit 10"] -pub type CTR10_R = crate::BitReader; +pub type Ctr10R = crate::BitReader; #[doc = "Field `CTR10` writer - Protocol Control Bit 10"] -pub type CTR10_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr10W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR11` reader - Protocol Control Bit 11"] -pub type CTR11_R = crate::BitReader; +pub type Ctr11R = crate::BitReader; #[doc = "Field `CTR11` writer - Protocol Control Bit 11"] -pub type CTR11_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr11W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR12` reader - Protocol Control Bit 12"] -pub type CTR12_R = crate::BitReader; +pub type Ctr12R = crate::BitReader; #[doc = "Field `CTR12` writer - Protocol Control Bit 12"] -pub type CTR12_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr12W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR13` reader - Protocol Control Bit 13"] -pub type CTR13_R = crate::BitReader; +pub type Ctr13R = crate::BitReader; #[doc = "Field `CTR13` writer - Protocol Control Bit 13"] -pub type CTR13_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr13W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR14` reader - Protocol Control Bit 14"] -pub type CTR14_R = crate::BitReader; +pub type Ctr14R = crate::BitReader; #[doc = "Field `CTR14` writer - Protocol Control Bit 14"] -pub type CTR14_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr14W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR15` reader - Protocol Control Bit 15"] -pub type CTR15_R = crate::BitReader; +pub type Ctr15R = crate::BitReader; #[doc = "Field `CTR15` writer - Protocol Control Bit 15"] -pub type CTR15_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr15W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR16` reader - Protocol Control Bit 16"] -pub type CTR16_R = crate::BitReader; +pub type Ctr16R = crate::BitReader; #[doc = "Field `CTR16` writer - Protocol Control Bit 16"] -pub type CTR16_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr16W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR17` reader - Protocol Control Bit 17"] -pub type CTR17_R = crate::BitReader; +pub type Ctr17R = crate::BitReader; #[doc = "Field `CTR17` writer - Protocol Control Bit 17"] -pub type CTR17_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr17W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR18` reader - Protocol Control Bit 18"] -pub type CTR18_R = crate::BitReader; +pub type Ctr18R = crate::BitReader; #[doc = "Field `CTR18` writer - Protocol Control Bit 18"] -pub type CTR18_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr18W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR19` reader - Protocol Control Bit 19"] -pub type CTR19_R = crate::BitReader; +pub type Ctr19R = crate::BitReader; #[doc = "Field `CTR19` writer - Protocol Control Bit 19"] -pub type CTR19_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr19W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR20` reader - Protocol Control Bit 20"] -pub type CTR20_R = crate::BitReader; +pub type Ctr20R = crate::BitReader; #[doc = "Field `CTR20` writer - Protocol Control Bit 20"] -pub type CTR20_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr20W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR21` reader - Protocol Control Bit 21"] -pub type CTR21_R = crate::BitReader; +pub type Ctr21R = crate::BitReader; #[doc = "Field `CTR21` writer - Protocol Control Bit 21"] -pub type CTR21_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr21W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR22` reader - Protocol Control Bit 22"] -pub type CTR22_R = crate::BitReader; +pub type Ctr22R = crate::BitReader; #[doc = "Field `CTR22` writer - Protocol Control Bit 22"] -pub type CTR22_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr22W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR23` reader - Protocol Control Bit 23"] -pub type CTR23_R = crate::BitReader; +pub type Ctr23R = crate::BitReader; #[doc = "Field `CTR23` writer - Protocol Control Bit 23"] -pub type CTR23_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr23W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR24` reader - Protocol Control Bit 24"] -pub type CTR24_R = crate::BitReader; +pub type Ctr24R = crate::BitReader; #[doc = "Field `CTR24` writer - Protocol Control Bit 24"] -pub type CTR24_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr24W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR25` reader - Protocol Control Bit 25"] -pub type CTR25_R = crate::BitReader; +pub type Ctr25R = crate::BitReader; #[doc = "Field `CTR25` writer - Protocol Control Bit 25"] -pub type CTR25_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr25W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR26` reader - Protocol Control Bit 26"] -pub type CTR26_R = crate::BitReader; +pub type Ctr26R = crate::BitReader; #[doc = "Field `CTR26` writer - Protocol Control Bit 26"] -pub type CTR26_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr26W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR27` reader - Protocol Control Bit 27"] -pub type CTR27_R = crate::BitReader; +pub type Ctr27R = crate::BitReader; #[doc = "Field `CTR27` writer - Protocol Control Bit 27"] -pub type CTR27_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr27W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR28` reader - Protocol Control Bit 28"] -pub type CTR28_R = crate::BitReader; +pub type Ctr28R = crate::BitReader; #[doc = "Field `CTR28` writer - Protocol Control Bit 28"] -pub type CTR28_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr28W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR29` reader - Protocol Control Bit 29"] -pub type CTR29_R = crate::BitReader; +pub type Ctr29R = crate::BitReader; #[doc = "Field `CTR29` writer - Protocol Control Bit 29"] -pub type CTR29_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr29W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR30` reader - Protocol Control Bit 30"] -pub type CTR30_R = crate::BitReader; +pub type Ctr30R = crate::BitReader; #[doc = "Field `CTR30` writer - Protocol Control Bit 30"] -pub type CTR30_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr30W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR31` reader - Protocol Control Bit 31"] -pub type CTR31_R = crate::BitReader; +pub type Ctr31R = crate::BitReader; #[doc = "Field `CTR31` writer - Protocol Control Bit 31"] -pub type CTR31_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type Ctr31W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Protocol Control Bit 0"] #[inline(always)] - pub fn ctr0(&self) -> CTR0_R { - CTR0_R::new((self.bits & 1) != 0) + pub fn ctr0(&self) -> Ctr0R { + Ctr0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Protocol Control Bit 1"] #[inline(always)] - pub fn ctr1(&self) -> CTR1_R { - CTR1_R::new(((self.bits >> 1) & 1) != 0) + pub fn ctr1(&self) -> Ctr1R { + Ctr1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Protocol Control Bit 2"] #[inline(always)] - pub fn ctr2(&self) -> CTR2_R { - CTR2_R::new(((self.bits >> 2) & 1) != 0) + pub fn ctr2(&self) -> Ctr2R { + Ctr2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Protocol Control Bit 3"] #[inline(always)] - pub fn ctr3(&self) -> CTR3_R { - CTR3_R::new(((self.bits >> 3) & 1) != 0) + pub fn ctr3(&self) -> Ctr3R { + Ctr3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Protocol Control Bit 4"] #[inline(always)] - pub fn ctr4(&self) -> CTR4_R { - CTR4_R::new(((self.bits >> 4) & 1) != 0) + pub fn ctr4(&self) -> Ctr4R { + Ctr4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Protocol Control Bit 5"] #[inline(always)] - pub fn ctr5(&self) -> CTR5_R { - CTR5_R::new(((self.bits >> 5) & 1) != 0) + pub fn ctr5(&self) -> Ctr5R { + Ctr5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Protocol Control Bit 6"] #[inline(always)] - pub fn ctr6(&self) -> CTR6_R { - CTR6_R::new(((self.bits >> 6) & 1) != 0) + pub fn ctr6(&self) -> Ctr6R { + Ctr6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Protocol Control Bit 7"] #[inline(always)] - pub fn ctr7(&self) -> CTR7_R { - CTR7_R::new(((self.bits >> 7) & 1) != 0) + pub fn ctr7(&self) -> Ctr7R { + Ctr7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Protocol Control Bit 8"] #[inline(always)] - pub fn ctr8(&self) -> CTR8_R { - CTR8_R::new(((self.bits >> 8) & 1) != 0) + pub fn ctr8(&self) -> Ctr8R { + Ctr8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol Control Bit 9"] #[inline(always)] - pub fn ctr9(&self) -> CTR9_R { - CTR9_R::new(((self.bits >> 9) & 1) != 0) + pub fn ctr9(&self) -> Ctr9R { + Ctr9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Protocol Control Bit 10"] #[inline(always)] - pub fn ctr10(&self) -> CTR10_R { - CTR10_R::new(((self.bits >> 10) & 1) != 0) + pub fn ctr10(&self) -> Ctr10R { + Ctr10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Protocol Control Bit 11"] #[inline(always)] - pub fn ctr11(&self) -> CTR11_R { - CTR11_R::new(((self.bits >> 11) & 1) != 0) + pub fn ctr11(&self) -> Ctr11R { + Ctr11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Protocol Control Bit 12"] #[inline(always)] - pub fn ctr12(&self) -> CTR12_R { - CTR12_R::new(((self.bits >> 12) & 1) != 0) + pub fn ctr12(&self) -> Ctr12R { + Ctr12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Protocol Control Bit 13"] #[inline(always)] - pub fn ctr13(&self) -> CTR13_R { - CTR13_R::new(((self.bits >> 13) & 1) != 0) + pub fn ctr13(&self) -> Ctr13R { + Ctr13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Protocol Control Bit 14"] #[inline(always)] - pub fn ctr14(&self) -> CTR14_R { - CTR14_R::new(((self.bits >> 14) & 1) != 0) + pub fn ctr14(&self) -> Ctr14R { + Ctr14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Protocol Control Bit 15"] #[inline(always)] - pub fn ctr15(&self) -> CTR15_R { - CTR15_R::new(((self.bits >> 15) & 1) != 0) + pub fn ctr15(&self) -> Ctr15R { + Ctr15R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Protocol Control Bit 16"] #[inline(always)] - pub fn ctr16(&self) -> CTR16_R { - CTR16_R::new(((self.bits >> 16) & 1) != 0) + pub fn ctr16(&self) -> Ctr16R { + Ctr16R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Protocol Control Bit 17"] #[inline(always)] - pub fn ctr17(&self) -> CTR17_R { - CTR17_R::new(((self.bits >> 17) & 1) != 0) + pub fn ctr17(&self) -> Ctr17R { + Ctr17R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Protocol Control Bit 18"] #[inline(always)] - pub fn ctr18(&self) -> CTR18_R { - CTR18_R::new(((self.bits >> 18) & 1) != 0) + pub fn ctr18(&self) -> Ctr18R { + Ctr18R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Protocol Control Bit 19"] #[inline(always)] - pub fn ctr19(&self) -> CTR19_R { - CTR19_R::new(((self.bits >> 19) & 1) != 0) + pub fn ctr19(&self) -> Ctr19R { + Ctr19R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Protocol Control Bit 20"] #[inline(always)] - pub fn ctr20(&self) -> CTR20_R { - CTR20_R::new(((self.bits >> 20) & 1) != 0) + pub fn ctr20(&self) -> Ctr20R { + Ctr20R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Protocol Control Bit 21"] #[inline(always)] - pub fn ctr21(&self) -> CTR21_R { - CTR21_R::new(((self.bits >> 21) & 1) != 0) + pub fn ctr21(&self) -> Ctr21R { + Ctr21R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Protocol Control Bit 22"] #[inline(always)] - pub fn ctr22(&self) -> CTR22_R { - CTR22_R::new(((self.bits >> 22) & 1) != 0) + pub fn ctr22(&self) -> Ctr22R { + Ctr22R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Protocol Control Bit 23"] #[inline(always)] - pub fn ctr23(&self) -> CTR23_R { - CTR23_R::new(((self.bits >> 23) & 1) != 0) + pub fn ctr23(&self) -> Ctr23R { + Ctr23R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Protocol Control Bit 24"] #[inline(always)] - pub fn ctr24(&self) -> CTR24_R { - CTR24_R::new(((self.bits >> 24) & 1) != 0) + pub fn ctr24(&self) -> Ctr24R { + Ctr24R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Protocol Control Bit 25"] #[inline(always)] - pub fn ctr25(&self) -> CTR25_R { - CTR25_R::new(((self.bits >> 25) & 1) != 0) + pub fn ctr25(&self) -> Ctr25R { + Ctr25R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Protocol Control Bit 26"] #[inline(always)] - pub fn ctr26(&self) -> CTR26_R { - CTR26_R::new(((self.bits >> 26) & 1) != 0) + pub fn ctr26(&self) -> Ctr26R { + Ctr26R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Protocol Control Bit 27"] #[inline(always)] - pub fn ctr27(&self) -> CTR27_R { - CTR27_R::new(((self.bits >> 27) & 1) != 0) + pub fn ctr27(&self) -> Ctr27R { + Ctr27R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Protocol Control Bit 28"] #[inline(always)] - pub fn ctr28(&self) -> CTR28_R { - CTR28_R::new(((self.bits >> 28) & 1) != 0) + pub fn ctr28(&self) -> Ctr28R { + Ctr28R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Protocol Control Bit 29"] #[inline(always)] - pub fn ctr29(&self) -> CTR29_R { - CTR29_R::new(((self.bits >> 29) & 1) != 0) + pub fn ctr29(&self) -> Ctr29R { + Ctr29R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Protocol Control Bit 30"] #[inline(always)] - pub fn ctr30(&self) -> CTR30_R { - CTR30_R::new(((self.bits >> 30) & 1) != 0) + pub fn ctr30(&self) -> Ctr30R { + Ctr30R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Protocol Control Bit 31"] #[inline(always)] - pub fn ctr31(&self) -> CTR31_R { - CTR31_R::new(((self.bits >> 31) & 1) != 0) + pub fn ctr31(&self) -> Ctr31R { + Ctr31R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Protocol Control Bit 0"] #[inline(always)] #[must_use] - pub fn ctr0(&mut self) -> CTR0_W { - CTR0_W::new(self, 0) + pub fn ctr0(&mut self) -> Ctr0W { + Ctr0W::new(self, 0) } #[doc = "Bit 1 - Protocol Control Bit 1"] #[inline(always)] #[must_use] - pub fn ctr1(&mut self) -> CTR1_W { - CTR1_W::new(self, 1) + pub fn ctr1(&mut self) -> Ctr1W { + Ctr1W::new(self, 1) } #[doc = "Bit 2 - Protocol Control Bit 2"] #[inline(always)] #[must_use] - pub fn ctr2(&mut self) -> CTR2_W { - CTR2_W::new(self, 2) + pub fn ctr2(&mut self) -> Ctr2W { + Ctr2W::new(self, 2) } #[doc = "Bit 3 - Protocol Control Bit 3"] #[inline(always)] #[must_use] - pub fn ctr3(&mut self) -> CTR3_W { - CTR3_W::new(self, 3) + pub fn ctr3(&mut self) -> Ctr3W { + Ctr3W::new(self, 3) } #[doc = "Bit 4 - Protocol Control Bit 4"] #[inline(always)] #[must_use] - pub fn ctr4(&mut self) -> CTR4_W { - CTR4_W::new(self, 4) + pub fn ctr4(&mut self) -> Ctr4W { + Ctr4W::new(self, 4) } #[doc = "Bit 5 - Protocol Control Bit 5"] #[inline(always)] #[must_use] - pub fn ctr5(&mut self) -> CTR5_W { - CTR5_W::new(self, 5) + pub fn ctr5(&mut self) -> Ctr5W { + Ctr5W::new(self, 5) } #[doc = "Bit 6 - Protocol Control Bit 6"] #[inline(always)] #[must_use] - pub fn ctr6(&mut self) -> CTR6_W { - CTR6_W::new(self, 6) + pub fn ctr6(&mut self) -> Ctr6W { + Ctr6W::new(self, 6) } #[doc = "Bit 7 - Protocol Control Bit 7"] #[inline(always)] #[must_use] - pub fn ctr7(&mut self) -> CTR7_W { - CTR7_W::new(self, 7) + pub fn ctr7(&mut self) -> Ctr7W { + Ctr7W::new(self, 7) } #[doc = "Bit 8 - Protocol Control Bit 8"] #[inline(always)] #[must_use] - pub fn ctr8(&mut self) -> CTR8_W { - CTR8_W::new(self, 8) + pub fn ctr8(&mut self) -> Ctr8W { + Ctr8W::new(self, 8) } #[doc = "Bit 9 - Protocol Control Bit 9"] #[inline(always)] #[must_use] - pub fn ctr9(&mut self) -> CTR9_W { - CTR9_W::new(self, 9) + pub fn ctr9(&mut self) -> Ctr9W { + Ctr9W::new(self, 9) } #[doc = "Bit 10 - Protocol Control Bit 10"] #[inline(always)] #[must_use] - pub fn ctr10(&mut self) -> CTR10_W { - CTR10_W::new(self, 10) + pub fn ctr10(&mut self) -> Ctr10W { + Ctr10W::new(self, 10) } #[doc = "Bit 11 - Protocol Control Bit 11"] #[inline(always)] #[must_use] - pub fn ctr11(&mut self) -> CTR11_W { - CTR11_W::new(self, 11) + pub fn ctr11(&mut self) -> Ctr11W { + Ctr11W::new(self, 11) } #[doc = "Bit 12 - Protocol Control Bit 12"] #[inline(always)] #[must_use] - pub fn ctr12(&mut self) -> CTR12_W { - CTR12_W::new(self, 12) + pub fn ctr12(&mut self) -> Ctr12W { + Ctr12W::new(self, 12) } #[doc = "Bit 13 - Protocol Control Bit 13"] #[inline(always)] #[must_use] - pub fn ctr13(&mut self) -> CTR13_W { - CTR13_W::new(self, 13) + pub fn ctr13(&mut self) -> Ctr13W { + Ctr13W::new(self, 13) } #[doc = "Bit 14 - Protocol Control Bit 14"] #[inline(always)] #[must_use] - pub fn ctr14(&mut self) -> CTR14_W { - CTR14_W::new(self, 14) + pub fn ctr14(&mut self) -> Ctr14W { + Ctr14W::new(self, 14) } #[doc = "Bit 15 - Protocol Control Bit 15"] #[inline(always)] #[must_use] - pub fn ctr15(&mut self) -> CTR15_W { - CTR15_W::new(self, 15) + pub fn ctr15(&mut self) -> Ctr15W { + Ctr15W::new(self, 15) } #[doc = "Bit 16 - Protocol Control Bit 16"] #[inline(always)] #[must_use] - pub fn ctr16(&mut self) -> CTR16_W { - CTR16_W::new(self, 16) + pub fn ctr16(&mut self) -> Ctr16W { + Ctr16W::new(self, 16) } #[doc = "Bit 17 - Protocol Control Bit 17"] #[inline(always)] #[must_use] - pub fn ctr17(&mut self) -> CTR17_W { - CTR17_W::new(self, 17) + pub fn ctr17(&mut self) -> Ctr17W { + Ctr17W::new(self, 17) } #[doc = "Bit 18 - Protocol Control Bit 18"] #[inline(always)] #[must_use] - pub fn ctr18(&mut self) -> CTR18_W { - CTR18_W::new(self, 18) + pub fn ctr18(&mut self) -> Ctr18W { + Ctr18W::new(self, 18) } #[doc = "Bit 19 - Protocol Control Bit 19"] #[inline(always)] #[must_use] - pub fn ctr19(&mut self) -> CTR19_W { - CTR19_W::new(self, 19) + pub fn ctr19(&mut self) -> Ctr19W { + Ctr19W::new(self, 19) } #[doc = "Bit 20 - Protocol Control Bit 20"] #[inline(always)] #[must_use] - pub fn ctr20(&mut self) -> CTR20_W { - CTR20_W::new(self, 20) + pub fn ctr20(&mut self) -> Ctr20W { + Ctr20W::new(self, 20) } #[doc = "Bit 21 - Protocol Control Bit 21"] #[inline(always)] #[must_use] - pub fn ctr21(&mut self) -> CTR21_W { - CTR21_W::new(self, 21) + pub fn ctr21(&mut self) -> Ctr21W { + Ctr21W::new(self, 21) } #[doc = "Bit 22 - Protocol Control Bit 22"] #[inline(always)] #[must_use] - pub fn ctr22(&mut self) -> CTR22_W { - CTR22_W::new(self, 22) + pub fn ctr22(&mut self) -> Ctr22W { + Ctr22W::new(self, 22) } #[doc = "Bit 23 - Protocol Control Bit 23"] #[inline(always)] #[must_use] - pub fn ctr23(&mut self) -> CTR23_W { - CTR23_W::new(self, 23) + pub fn ctr23(&mut self) -> Ctr23W { + Ctr23W::new(self, 23) } #[doc = "Bit 24 - Protocol Control Bit 24"] #[inline(always)] #[must_use] - pub fn ctr24(&mut self) -> CTR24_W { - CTR24_W::new(self, 24) + pub fn ctr24(&mut self) -> Ctr24W { + Ctr24W::new(self, 24) } #[doc = "Bit 25 - Protocol Control Bit 25"] #[inline(always)] #[must_use] - pub fn ctr25(&mut self) -> CTR25_W { - CTR25_W::new(self, 25) + pub fn ctr25(&mut self) -> Ctr25W { + Ctr25W::new(self, 25) } #[doc = "Bit 26 - Protocol Control Bit 26"] #[inline(always)] #[must_use] - pub fn ctr26(&mut self) -> CTR26_W { - CTR26_W::new(self, 26) + pub fn ctr26(&mut self) -> Ctr26W { + Ctr26W::new(self, 26) } #[doc = "Bit 27 - Protocol Control Bit 27"] #[inline(always)] #[must_use] - pub fn ctr27(&mut self) -> CTR27_W { - CTR27_W::new(self, 27) + pub fn ctr27(&mut self) -> Ctr27W { + Ctr27W::new(self, 27) } #[doc = "Bit 28 - Protocol Control Bit 28"] #[inline(always)] #[must_use] - pub fn ctr28(&mut self) -> CTR28_W { - CTR28_W::new(self, 28) + pub fn ctr28(&mut self) -> Ctr28W { + Ctr28W::new(self, 28) } #[doc = "Bit 29 - Protocol Control Bit 29"] #[inline(always)] #[must_use] - pub fn ctr29(&mut self) -> CTR29_W { - CTR29_W::new(self, 29) + pub fn ctr29(&mut self) -> Ctr29W { + Ctr29W::new(self, 29) } #[doc = "Bit 30 - Protocol Control Bit 30"] #[inline(always)] #[must_use] - pub fn ctr30(&mut self) -> CTR30_W { - CTR30_W::new(self, 30) + pub fn ctr30(&mut self) -> Ctr30W { + Ctr30W::new(self, 30) } #[doc = "Bit 31 - Protocol Control Bit 31"] #[inline(always)] #[must_use] - pub fn ctr31(&mut self) -> CTR31_W { - CTR31_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn ctr31(&mut self) -> Ctr31W { + Ctr31W::new(self, 31) } } #[doc = "Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCR_SPEC; -impl crate::RegisterSpec for PCR_SPEC { +pub struct PcrSpec; +impl crate::RegisterSpec for PcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcr::R`](R) reader structure"] -impl crate::Readable for PCR_SPEC {} +impl crate::Readable for PcrSpec {} #[doc = "`write(|w| ..)` method takes [`pcr::W`](W) writer structure"] -impl crate::Writable for PCR_SPEC { +impl crate::Writable for PcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR to value 0"] -impl crate::Resettable for PCR_SPEC { +impl crate::Resettable for PcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_ascmode.rs b/src/usic0_ch0/pcr_ascmode.rs index 6cfece26..9d385d34 100644 --- a/src/usic0_ch0/pcr_ascmode.rs +++ b/src/usic0_ch0/pcr_ascmode.rs @@ -1,495 +1,495 @@ #[doc = "Register `PCR_ASCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_ASCMode` writer"] -pub type W = crate::W; -#[doc = "Field `SMD` reader - Sample Mode"] -pub type SMD_R = crate::BitReader; +pub type W = crate::W; #[doc = "Sample Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SMD_A { +pub enum Smd { #[doc = "0: Only one sample is taken per bit time. The current input value is sampled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Three samples are taken per bit time and a majority decision is made."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SMD_A) -> Self { + fn from(variant: Smd) -> Self { variant as u8 != 0 } } -impl SMD_R { +#[doc = "Field `SMD` reader - Sample Mode"] +pub type SmdR = crate::BitReader; +impl SmdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SMD_A { + pub const fn variant(&self) -> Smd { match self.bits { - false => SMD_A::VALUE1, - true => SMD_A::VALUE2, + false => Smd::Value1, + true => Smd::Value2, } } #[doc = "Only one sample is taken per bit time. The current input value is sampled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SMD_A::VALUE1 + *self == Smd::Value1 } #[doc = "Three samples are taken per bit time and a majority decision is made."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SMD_A::VALUE2 + *self == Smd::Value2 } } #[doc = "Field `SMD` writer - Sample Mode"] -pub type SMD_W<'a, REG> = crate::BitWriter<'a, REG, SMD_A>; -impl<'a, REG> SMD_W<'a, REG> +pub type SmdW<'a, REG> = crate::BitWriter<'a, REG, Smd>; +impl<'a, REG> SmdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Only one sample is taken per bit time. The current input value is sampled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SMD_A::VALUE1) + self.variant(Smd::Value1) } #[doc = "Three samples are taken per bit time and a majority decision is made."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SMD_A::VALUE2) + self.variant(Smd::Value2) } } -#[doc = "Field `STPB` reader - Stop Bits"] -pub type STPB_R = crate::BitReader; #[doc = "Stop Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STPB_A { +pub enum Stpb { #[doc = "0: The number of stop bits is 1."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The number of stop bits is 2."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STPB_A) -> Self { + fn from(variant: Stpb) -> Self { variant as u8 != 0 } } -impl STPB_R { +#[doc = "Field `STPB` reader - Stop Bits"] +pub type StpbR = crate::BitReader; +impl StpbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STPB_A { + pub const fn variant(&self) -> Stpb { match self.bits { - false => STPB_A::VALUE1, - true => STPB_A::VALUE2, + false => Stpb::Value1, + true => Stpb::Value2, } } #[doc = "The number of stop bits is 1."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STPB_A::VALUE1 + *self == Stpb::Value1 } #[doc = "The number of stop bits is 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STPB_A::VALUE2 + *self == Stpb::Value2 } } #[doc = "Field `STPB` writer - Stop Bits"] -pub type STPB_W<'a, REG> = crate::BitWriter<'a, REG, STPB_A>; -impl<'a, REG> STPB_W<'a, REG> +pub type StpbW<'a, REG> = crate::BitWriter<'a, REG, Stpb>; +impl<'a, REG> StpbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The number of stop bits is 1."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STPB_A::VALUE1) + self.variant(Stpb::Value1) } #[doc = "The number of stop bits is 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STPB_A::VALUE2) + self.variant(Stpb::Value2) } } -#[doc = "Field `IDM` reader - Idle Detection Mode"] -pub type IDM_R = crate::BitReader; #[doc = "Idle Detection Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IDM_A { +pub enum Idm { #[doc = "0: The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IDM_A) -> Self { + fn from(variant: Idm) -> Self { variant as u8 != 0 } } -impl IDM_R { +#[doc = "Field `IDM` reader - Idle Detection Mode"] +pub type IdmR = crate::BitReader; +impl IdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IDM_A { + pub const fn variant(&self) -> Idm { match self.bits { - false => IDM_A::VALUE1, - true => IDM_A::VALUE2, + false => Idm::Value1, + true => Idm::Value2, } } #[doc = "The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IDM_A::VALUE1 + *self == Idm::Value1 } #[doc = "The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IDM_A::VALUE2 + *self == Idm::Value2 } } #[doc = "Field `IDM` writer - Idle Detection Mode"] -pub type IDM_W<'a, REG> = crate::BitWriter<'a, REG, IDM_A>; -impl<'a, REG> IDM_W<'a, REG> +pub type IdmW<'a, REG> = crate::BitWriter<'a, REG, Idm>; +impl<'a, REG> IdmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IDM_A::VALUE1) + self.variant(Idm::Value1) } #[doc = "The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IDM_A::VALUE2) + self.variant(Idm::Value2) } } -#[doc = "Field `SBIEN` reader - Synchronization Break Interrupt Enable"] -pub type SBIEN_R = crate::BitReader; #[doc = "Synchronization Break Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SBIEN_A { +pub enum Sbien { #[doc = "0: The interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SBIEN_A) -> Self { + fn from(variant: Sbien) -> Self { variant as u8 != 0 } } -impl SBIEN_R { +#[doc = "Field `SBIEN` reader - Synchronization Break Interrupt Enable"] +pub type SbienR = crate::BitReader; +impl SbienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SBIEN_A { + pub const fn variant(&self) -> Sbien { match self.bits { - false => SBIEN_A::VALUE1, - true => SBIEN_A::VALUE2, + false => Sbien::Value1, + true => Sbien::Value2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SBIEN_A::VALUE1 + *self == Sbien::Value1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SBIEN_A::VALUE2 + *self == Sbien::Value2 } } #[doc = "Field `SBIEN` writer - Synchronization Break Interrupt Enable"] -pub type SBIEN_W<'a, REG> = crate::BitWriter<'a, REG, SBIEN_A>; -impl<'a, REG> SBIEN_W<'a, REG> +pub type SbienW<'a, REG> = crate::BitWriter<'a, REG, Sbien>; +impl<'a, REG> SbienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SBIEN_A::VALUE1) + self.variant(Sbien::Value1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SBIEN_A::VALUE2) + self.variant(Sbien::Value2) } } -#[doc = "Field `CDEN` reader - Collision Detection Enable"] -pub type CDEN_R = crate::BitReader; #[doc = "Collision Detection Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDEN_A { +pub enum Cden { #[doc = "0: The collision detection is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDEN_A) -> Self { + fn from(variant: Cden) -> Self { variant as u8 != 0 } } -impl CDEN_R { +#[doc = "Field `CDEN` reader - Collision Detection Enable"] +pub type CdenR = crate::BitReader; +impl CdenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDEN_A { + pub const fn variant(&self) -> Cden { match self.bits { - false => CDEN_A::VALUE1, - true => CDEN_A::VALUE2, + false => Cden::Value1, + true => Cden::Value2, } } #[doc = "The collision detection is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDEN_A::VALUE1 + *self == Cden::Value1 } #[doc = "If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDEN_A::VALUE2 + *self == Cden::Value2 } } #[doc = "Field `CDEN` writer - Collision Detection Enable"] -pub type CDEN_W<'a, REG> = crate::BitWriter<'a, REG, CDEN_A>; -impl<'a, REG> CDEN_W<'a, REG> +pub type CdenW<'a, REG> = crate::BitWriter<'a, REG, Cden>; +impl<'a, REG> CdenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The collision detection is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDEN_A::VALUE1) + self.variant(Cden::Value1) } #[doc = "If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDEN_A::VALUE2) + self.variant(Cden::Value2) } } -#[doc = "Field `RNIEN` reader - Receiver Noise Detection Interrupt Enable"] -pub type RNIEN_R = crate::BitReader; #[doc = "Receiver Noise Detection Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RNIEN_A { +pub enum Rnien { #[doc = "0: The interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RNIEN_A) -> Self { + fn from(variant: Rnien) -> Self { variant as u8 != 0 } } -impl RNIEN_R { +#[doc = "Field `RNIEN` reader - Receiver Noise Detection Interrupt Enable"] +pub type RnienR = crate::BitReader; +impl RnienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RNIEN_A { + pub const fn variant(&self) -> Rnien { match self.bits { - false => RNIEN_A::VALUE1, - true => RNIEN_A::VALUE2, + false => Rnien::Value1, + true => Rnien::Value2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RNIEN_A::VALUE1 + *self == Rnien::Value1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RNIEN_A::VALUE2 + *self == Rnien::Value2 } } #[doc = "Field `RNIEN` writer - Receiver Noise Detection Interrupt Enable"] -pub type RNIEN_W<'a, REG> = crate::BitWriter<'a, REG, RNIEN_A>; -impl<'a, REG> RNIEN_W<'a, REG> +pub type RnienW<'a, REG> = crate::BitWriter<'a, REG, Rnien>; +impl<'a, REG> RnienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RNIEN_A::VALUE1) + self.variant(Rnien::Value1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RNIEN_A::VALUE2) + self.variant(Rnien::Value2) } } -#[doc = "Field `FEIEN` reader - Format Error Interrupt Enable"] -pub type FEIEN_R = crate::BitReader; #[doc = "Format Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FEIEN_A { +pub enum Feien { #[doc = "0: The interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FEIEN_A) -> Self { + fn from(variant: Feien) -> Self { variant as u8 != 0 } } -impl FEIEN_R { +#[doc = "Field `FEIEN` reader - Format Error Interrupt Enable"] +pub type FeienR = crate::BitReader; +impl FeienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FEIEN_A { + pub const fn variant(&self) -> Feien { match self.bits { - false => FEIEN_A::VALUE1, - true => FEIEN_A::VALUE2, + false => Feien::Value1, + true => Feien::Value2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FEIEN_A::VALUE1 + *self == Feien::Value1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FEIEN_A::VALUE2 + *self == Feien::Value2 } } #[doc = "Field `FEIEN` writer - Format Error Interrupt Enable"] -pub type FEIEN_W<'a, REG> = crate::BitWriter<'a, REG, FEIEN_A>; -impl<'a, REG> FEIEN_W<'a, REG> +pub type FeienW<'a, REG> = crate::BitWriter<'a, REG, Feien>; +impl<'a, REG> FeienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FEIEN_A::VALUE1) + self.variant(Feien::Value1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FEIEN_A::VALUE2) + self.variant(Feien::Value2) } } -#[doc = "Field `FFIEN` reader - Frame Finished Interrupt Enable"] -pub type FFIEN_R = crate::BitReader; #[doc = "Frame Finished Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FFIEN_A { +pub enum Ffien { #[doc = "0: The interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FFIEN_A) -> Self { + fn from(variant: Ffien) -> Self { variant as u8 != 0 } } -impl FFIEN_R { +#[doc = "Field `FFIEN` reader - Frame Finished Interrupt Enable"] +pub type FfienR = crate::BitReader; +impl FfienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FFIEN_A { + pub const fn variant(&self) -> Ffien { match self.bits { - false => FFIEN_A::VALUE1, - true => FFIEN_A::VALUE2, + false => Ffien::Value1, + true => Ffien::Value2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FFIEN_A::VALUE1 + *self == Ffien::Value1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FFIEN_A::VALUE2 + *self == Ffien::Value2 } } #[doc = "Field `FFIEN` writer - Frame Finished Interrupt Enable"] -pub type FFIEN_W<'a, REG> = crate::BitWriter<'a, REG, FFIEN_A>; -impl<'a, REG> FFIEN_W<'a, REG> +pub type FfienW<'a, REG> = crate::BitWriter<'a, REG, Ffien>; +impl<'a, REG> FfienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FFIEN_A::VALUE1) + self.variant(Ffien::Value1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FFIEN_A::VALUE2) + self.variant(Ffien::Value2) } } #[doc = "Field `SP` reader - Sample Point"] -pub type SP_R = crate::FieldReader; +pub type SpR = crate::FieldReader; #[doc = "Field `SP` writer - Sample Point"] -pub type SP_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `PL` reader - Pulse Length"] -pub type PL_R = crate::FieldReader; +pub type SpW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Pulse Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PL_A { +pub enum Pl { #[doc = "0: The pulse length is equal to the bit length (no shortened 0)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The pulse length of a 0 bit is 2 time quanta."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The pulse length of a 0 bit is 3 time quanta."] - VALUE3 = 2, + Value3 = 2, #[doc = "7: The pulse length of a 0 bit is 8 time quanta."] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PL_A) -> Self { + fn from(variant: Pl) -> Self { variant as _ } } -impl crate::FieldSpec for PL_A { +impl crate::FieldSpec for Pl { type Ux = u8; } -impl PL_R { +#[doc = "Field `PL` reader - Pulse Length"] +pub type PlR = crate::FieldReader; +impl PlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PL_A::VALUE1), - 1 => Some(PL_A::VALUE2), - 2 => Some(PL_A::VALUE3), - 7 => Some(PL_A::VALUE4), + 0 => Some(Pl::Value1), + 1 => Some(Pl::Value2), + 2 => Some(Pl::Value3), + 7 => Some(Pl::Value4), _ => None, } } #[doc = "The pulse length is equal to the bit length (no shortened 0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PL_A::VALUE1 + *self == Pl::Value1 } #[doc = "The pulse length of a 0 bit is 2 time quanta."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PL_A::VALUE2 + *self == Pl::Value2 } #[doc = "The pulse length of a 0 bit is 3 time quanta."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PL_A::VALUE3 + *self == Pl::Value3 } #[doc = "The pulse length of a 0 bit is 8 time quanta."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PL_A::VALUE4 + *self == Pl::Value4 } } #[doc = "Field `PL` writer - Pulse Length"] -pub type PL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PL_A>; -impl<'a, REG> PL_W<'a, REG> +pub type PlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Pl>; +impl<'a, REG> PlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -497,67 +497,67 @@ where #[doc = "The pulse length is equal to the bit length (no shortened 0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PL_A::VALUE1) + self.variant(Pl::Value1) } #[doc = "The pulse length of a 0 bit is 2 time quanta."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PL_A::VALUE2) + self.variant(Pl::Value2) } #[doc = "The pulse length of a 0 bit is 3 time quanta."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PL_A::VALUE3) + self.variant(Pl::Value3) } #[doc = "The pulse length of a 0 bit is 8 time quanta."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PL_A::VALUE4) + self.variant(Pl::Value4) } } -#[doc = "Field `RSTEN` reader - Receiver Status Enable"] -pub type RSTEN_R = crate::BitReader; #[doc = "Receiver Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSTEN_A { +pub enum Rsten { #[doc = "0: Flag PSR\\[9\\] is not modified depending on the receiver status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR\\[9\\] is set during the complete reception of a frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSTEN_A) -> Self { + fn from(variant: Rsten) -> Self { variant as u8 != 0 } } -impl RSTEN_R { +#[doc = "Field `RSTEN` reader - Receiver Status Enable"] +pub type RstenR = crate::BitReader; +impl RstenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSTEN_A { + pub const fn variant(&self) -> Rsten { match self.bits { - false => RSTEN_A::VALUE1, - true => RSTEN_A::VALUE2, + false => Rsten::Value1, + true => Rsten::Value2, } } #[doc = "Flag PSR\\[9\\] is not modified depending on the receiver status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSTEN_A::VALUE1 + *self == Rsten::Value1 } #[doc = "Flag PSR\\[9\\] is set during the complete reception of a frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSTEN_A::VALUE2 + *self == Rsten::Value2 } } #[doc = "Field `RSTEN` writer - Receiver Status Enable"] -pub type RSTEN_W<'a, REG> = crate::BitWriter<'a, REG, RSTEN_A>; -impl<'a, REG> RSTEN_W<'a, REG> +pub type RstenW<'a, REG> = crate::BitWriter<'a, REG, Rsten>; +impl<'a, REG> RstenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -565,58 +565,58 @@ where is not modified depending on the receiver status."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSTEN_A::VALUE1) + self.variant(Rsten::Value1) } #[doc = "Flag PSR\\[9\\] is set during the complete reception of a frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSTEN_A::VALUE2) + self.variant(Rsten::Value2) } } -#[doc = "Field `TSTEN` reader - Transmitter Status Enable"] -pub type TSTEN_R = crate::BitReader; #[doc = "Transmitter Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSTEN_A { +pub enum Tsten { #[doc = "0: Flag PSR\\[9\\] is not modified depending on the transmitter status."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR\\[9\\] is set during the complete transmission of a frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSTEN_A) -> Self { + fn from(variant: Tsten) -> Self { variant as u8 != 0 } } -impl TSTEN_R { +#[doc = "Field `TSTEN` reader - Transmitter Status Enable"] +pub type TstenR = crate::BitReader; +impl TstenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSTEN_A { + pub const fn variant(&self) -> Tsten { match self.bits { - false => TSTEN_A::VALUE1, - true => TSTEN_A::VALUE2, + false => Tsten::Value1, + true => Tsten::Value2, } } #[doc = "Flag PSR\\[9\\] is not modified depending on the transmitter status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSTEN_A::VALUE1 + *self == Tsten::Value1 } #[doc = "Flag PSR\\[9\\] is set during the complete transmission of a frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSTEN_A::VALUE2 + *self == Tsten::Value2 } } #[doc = "Field `TSTEN` writer - Transmitter Status Enable"] -pub type TSTEN_W<'a, REG> = crate::BitWriter<'a, REG, TSTEN_A>; -impl<'a, REG> TSTEN_W<'a, REG> +pub type TstenW<'a, REG> = crate::BitWriter<'a, REG, Tsten>; +impl<'a, REG> TstenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -624,238 +624,229 @@ where is not modified depending on the transmitter status."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSTEN_A::VALUE1) + self.variant(Tsten::Value1) } #[doc = "Flag PSR\\[9\\] is set during the complete transmission of a frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSTEN_A::VALUE2) + self.variant(Tsten::Value2) } } -#[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MCLK_R = crate::BitReader; #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCLK_A { +pub enum Mclk { #[doc = "0: The MCLK generation is disabled and the MCLK signal is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MCLK generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCLK_A) -> Self { + fn from(variant: Mclk) -> Self { variant as u8 != 0 } } -impl MCLK_R { +#[doc = "Field `MCLK` reader - Master Clock Enable"] +pub type MclkR = crate::BitReader; +impl MclkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCLK_A { + pub const fn variant(&self) -> Mclk { match self.bits { - false => MCLK_A::VALUE1, - true => MCLK_A::VALUE2, + false => Mclk::Value1, + true => Mclk::Value2, } } #[doc = "The MCLK generation is disabled and the MCLK signal is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCLK_A::VALUE1 + *self == Mclk::Value1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCLK_A::VALUE2 + *self == Mclk::Value2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; -impl<'a, REG> MCLK_W<'a, REG> +pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; +impl<'a, REG> MclkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and the MCLK signal is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE1) + self.variant(Mclk::Value1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE2) + self.variant(Mclk::Value2) } } impl R { #[doc = "Bit 0 - Sample Mode"] #[inline(always)] - pub fn smd(&self) -> SMD_R { - SMD_R::new((self.bits & 1) != 0) + pub fn smd(&self) -> SmdR { + SmdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Stop Bits"] #[inline(always)] - pub fn stpb(&self) -> STPB_R { - STPB_R::new(((self.bits >> 1) & 1) != 0) + pub fn stpb(&self) -> StpbR { + StpbR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Idle Detection Mode"] #[inline(always)] - pub fn idm(&self) -> IDM_R { - IDM_R::new(((self.bits >> 2) & 1) != 0) + pub fn idm(&self) -> IdmR { + IdmR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Synchronization Break Interrupt Enable"] #[inline(always)] - pub fn sbien(&self) -> SBIEN_R { - SBIEN_R::new(((self.bits >> 3) & 1) != 0) + pub fn sbien(&self) -> SbienR { + SbienR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Collision Detection Enable"] #[inline(always)] - pub fn cden(&self) -> CDEN_R { - CDEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn cden(&self) -> CdenR { + CdenR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"] #[inline(always)] - pub fn rnien(&self) -> RNIEN_R { - RNIEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn rnien(&self) -> RnienR { + RnienR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Format Error Interrupt Enable"] #[inline(always)] - pub fn feien(&self) -> FEIEN_R { - FEIEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn feien(&self) -> FeienR { + FeienR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Frame Finished Interrupt Enable"] #[inline(always)] - pub fn ffien(&self) -> FFIEN_R { - FFIEN_R::new(((self.bits >> 7) & 1) != 0) + pub fn ffien(&self) -> FfienR { + FfienR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:12 - Sample Point"] #[inline(always)] - pub fn sp(&self) -> SP_R { - SP_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn sp(&self) -> SpR { + SpR::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 13:15 - Pulse Length"] #[inline(always)] - pub fn pl(&self) -> PL_R { - PL_R::new(((self.bits >> 13) & 7) as u8) + pub fn pl(&self) -> PlR { + PlR::new(((self.bits >> 13) & 7) as u8) } #[doc = "Bit 16 - Receiver Status Enable"] #[inline(always)] - pub fn rsten(&self) -> RSTEN_R { - RSTEN_R::new(((self.bits >> 16) & 1) != 0) + pub fn rsten(&self) -> RstenR { + RstenR::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Transmitter Status Enable"] #[inline(always)] - pub fn tsten(&self) -> TSTEN_R { - TSTEN_R::new(((self.bits >> 17) & 1) != 0) + pub fn tsten(&self) -> TstenR { + TstenR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MCLK_R { - MCLK_R::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MclkR { + MclkR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Sample Mode"] #[inline(always)] #[must_use] - pub fn smd(&mut self) -> SMD_W { - SMD_W::new(self, 0) + pub fn smd(&mut self) -> SmdW { + SmdW::new(self, 0) } #[doc = "Bit 1 - Stop Bits"] #[inline(always)] #[must_use] - pub fn stpb(&mut self) -> STPB_W { - STPB_W::new(self, 1) + pub fn stpb(&mut self) -> StpbW { + StpbW::new(self, 1) } #[doc = "Bit 2 - Idle Detection Mode"] #[inline(always)] #[must_use] - pub fn idm(&mut self) -> IDM_W { - IDM_W::new(self, 2) + pub fn idm(&mut self) -> IdmW { + IdmW::new(self, 2) } #[doc = "Bit 3 - Synchronization Break Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sbien(&mut self) -> SBIEN_W { - SBIEN_W::new(self, 3) + pub fn sbien(&mut self) -> SbienW { + SbienW::new(self, 3) } #[doc = "Bit 4 - Collision Detection Enable"] #[inline(always)] #[must_use] - pub fn cden(&mut self) -> CDEN_W { - CDEN_W::new(self, 4) + pub fn cden(&mut self) -> CdenW { + CdenW::new(self, 4) } #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rnien(&mut self) -> RNIEN_W { - RNIEN_W::new(self, 5) + pub fn rnien(&mut self) -> RnienW { + RnienW::new(self, 5) } #[doc = "Bit 6 - Format Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn feien(&mut self) -> FEIEN_W { - FEIEN_W::new(self, 6) + pub fn feien(&mut self) -> FeienW { + FeienW::new(self, 6) } #[doc = "Bit 7 - Frame Finished Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ffien(&mut self) -> FFIEN_W { - FFIEN_W::new(self, 7) + pub fn ffien(&mut self) -> FfienW { + FfienW::new(self, 7) } #[doc = "Bits 8:12 - Sample Point"] #[inline(always)] #[must_use] - pub fn sp(&mut self) -> SP_W { - SP_W::new(self, 8) + pub fn sp(&mut self) -> SpW { + SpW::new(self, 8) } #[doc = "Bits 13:15 - Pulse Length"] #[inline(always)] #[must_use] - pub fn pl(&mut self) -> PL_W { - PL_W::new(self, 13) + pub fn pl(&mut self) -> PlW { + PlW::new(self, 13) } #[doc = "Bit 16 - Receiver Status Enable"] #[inline(always)] #[must_use] - pub fn rsten(&mut self) -> RSTEN_W { - RSTEN_W::new(self, 16) + pub fn rsten(&mut self) -> RstenW { + RstenW::new(self, 16) } #[doc = "Bit 17 - Transmitter Status Enable"] #[inline(always)] #[must_use] - pub fn tsten(&mut self) -> TSTEN_W { - TSTEN_W::new(self, 17) + pub fn tsten(&mut self) -> TstenW { + TstenW::new(self, 17) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MCLK_W { - MCLK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mclk(&mut self) -> MclkW { + MclkW::new(self, 31) } } #[doc = "Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCR_ASCMODE_SPEC; -impl crate::RegisterSpec for PCR_ASCMODE_SPEC { +pub struct PcrAscmodeSpec; +impl crate::RegisterSpec for PcrAscmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcr_ascmode::R`](R) reader structure"] -impl crate::Readable for PCR_ASCMODE_SPEC {} +impl crate::Readable for PcrAscmodeSpec {} #[doc = "`write(|w| ..)` method takes [`pcr_ascmode::W`](W) writer structure"] -impl crate::Writable for PCR_ASCMODE_SPEC { +impl crate::Writable for PcrAscmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_ASCMode to value 0"] -impl crate::Resettable for PCR_ASCMODE_SPEC { +impl crate::Resettable for PcrAscmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_iicmode.rs b/src/usic0_ch0/pcr_iicmode.rs index f2863408..be5f6066 100644 --- a/src/usic0_ch0/pcr_iicmode.rs +++ b/src/usic0_ch0/pcr_iicmode.rs @@ -1,832 +1,823 @@ #[doc = "Register `PCR_IICMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_IICMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SLAD` reader - Slave Address"] -pub type SLAD_R = crate::FieldReader; +pub type SladR = crate::FieldReader; #[doc = "Field `SLAD` writer - Slave Address"] -pub type SLAD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; -#[doc = "Field `ACK00` reader - Acknowledge 00H"] -pub type ACK00_R = crate::BitReader; +pub type SladW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Acknowledge 00H\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACK00_A { +pub enum Ack00 { #[doc = "0: The slave device is not sensitive to this address."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The slave device is sensitive to this address."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACK00_A) -> Self { + fn from(variant: Ack00) -> Self { variant as u8 != 0 } } -impl ACK00_R { +#[doc = "Field `ACK00` reader - Acknowledge 00H"] +pub type Ack00R = crate::BitReader; +impl Ack00R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACK00_A { + pub const fn variant(&self) -> Ack00 { match self.bits { - false => ACK00_A::VALUE1, - true => ACK00_A::VALUE2, + false => Ack00::Value1, + true => Ack00::Value2, } } #[doc = "The slave device is not sensitive to this address."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACK00_A::VALUE1 + *self == Ack00::Value1 } #[doc = "The slave device is sensitive to this address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACK00_A::VALUE2 + *self == Ack00::Value2 } } #[doc = "Field `ACK00` writer - Acknowledge 00H"] -pub type ACK00_W<'a, REG> = crate::BitWriter<'a, REG, ACK00_A>; -impl<'a, REG> ACK00_W<'a, REG> +pub type Ack00W<'a, REG> = crate::BitWriter<'a, REG, Ack00>; +impl<'a, REG> Ack00W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slave device is not sensitive to this address."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACK00_A::VALUE1) + self.variant(Ack00::Value1) } #[doc = "The slave device is sensitive to this address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACK00_A::VALUE2) + self.variant(Ack00::Value2) } } -#[doc = "Field `STIM` reader - Symbol Timing"] -pub type STIM_R = crate::BitReader; #[doc = "Symbol Timing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STIM_A { +pub enum Stim { #[doc = "0: A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STIM_A) -> Self { + fn from(variant: Stim) -> Self { variant as u8 != 0 } } -impl STIM_R { +#[doc = "Field `STIM` reader - Symbol Timing"] +pub type StimR = crate::BitReader; +impl StimR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STIM_A { + pub const fn variant(&self) -> Stim { match self.bits { - false => STIM_A::VALUE1, - true => STIM_A::VALUE2, + false => Stim::Value1, + true => Stim::Value2, } } #[doc = "A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STIM_A::VALUE1 + *self == Stim::Value1 } #[doc = "A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STIM_A::VALUE2 + *self == Stim::Value2 } } #[doc = "Field `STIM` writer - Symbol Timing"] -pub type STIM_W<'a, REG> = crate::BitWriter<'a, REG, STIM_A>; -impl<'a, REG> STIM_W<'a, REG> +pub type StimW<'a, REG> = crate::BitWriter<'a, REG, Stim>; +impl<'a, REG> StimW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STIM_A::VALUE1) + self.variant(Stim::Value1) } #[doc = "A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STIM_A::VALUE2) + self.variant(Stim::Value2) } } -#[doc = "Field `SCRIEN` reader - Start Condition Received Interrupt Enable"] -pub type SCRIEN_R = crate::BitReader; #[doc = "Start Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCRIEN_A { +pub enum Scrien { #[doc = "0: The start condition interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The start condition interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCRIEN_A) -> Self { + fn from(variant: Scrien) -> Self { variant as u8 != 0 } } -impl SCRIEN_R { +#[doc = "Field `SCRIEN` reader - Start Condition Received Interrupt Enable"] +pub type ScrienR = crate::BitReader; +impl ScrienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCRIEN_A { + pub const fn variant(&self) -> Scrien { match self.bits { - false => SCRIEN_A::VALUE1, - true => SCRIEN_A::VALUE2, + false => Scrien::Value1, + true => Scrien::Value2, } } #[doc = "The start condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCRIEN_A::VALUE1 + *self == Scrien::Value1 } #[doc = "The start condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCRIEN_A::VALUE2 + *self == Scrien::Value2 } } #[doc = "Field `SCRIEN` writer - Start Condition Received Interrupt Enable"] -pub type SCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, SCRIEN_A>; -impl<'a, REG> SCRIEN_W<'a, REG> +pub type ScrienW<'a, REG> = crate::BitWriter<'a, REG, Scrien>; +impl<'a, REG> ScrienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The start condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCRIEN_A::VALUE1) + self.variant(Scrien::Value1) } #[doc = "The start condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCRIEN_A::VALUE2) + self.variant(Scrien::Value2) } } -#[doc = "Field `RSCRIEN` reader - Repeated Start Condition Received Interrupt Enable"] -pub type RSCRIEN_R = crate::BitReader; #[doc = "Repeated Start Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSCRIEN_A { +pub enum Rscrien { #[doc = "0: The repeated start condition interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The repeated start condition interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSCRIEN_A) -> Self { + fn from(variant: Rscrien) -> Self { variant as u8 != 0 } } -impl RSCRIEN_R { +#[doc = "Field `RSCRIEN` reader - Repeated Start Condition Received Interrupt Enable"] +pub type RscrienR = crate::BitReader; +impl RscrienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSCRIEN_A { + pub const fn variant(&self) -> Rscrien { match self.bits { - false => RSCRIEN_A::VALUE1, - true => RSCRIEN_A::VALUE2, + false => Rscrien::Value1, + true => Rscrien::Value2, } } #[doc = "The repeated start condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSCRIEN_A::VALUE1 + *self == Rscrien::Value1 } #[doc = "The repeated start condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSCRIEN_A::VALUE2 + *self == Rscrien::Value2 } } #[doc = "Field `RSCRIEN` writer - Repeated Start Condition Received Interrupt Enable"] -pub type RSCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, RSCRIEN_A>; -impl<'a, REG> RSCRIEN_W<'a, REG> +pub type RscrienW<'a, REG> = crate::BitWriter<'a, REG, Rscrien>; +impl<'a, REG> RscrienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The repeated start condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSCRIEN_A::VALUE1) + self.variant(Rscrien::Value1) } #[doc = "The repeated start condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSCRIEN_A::VALUE2) + self.variant(Rscrien::Value2) } } -#[doc = "Field `PCRIEN` reader - Stop Condition Received Interrupt Enable"] -pub type PCRIEN_R = crate::BitReader; #[doc = "Stop Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCRIEN_A { +pub enum Pcrien { #[doc = "0: The stop condition interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The stop condition interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCRIEN_A) -> Self { + fn from(variant: Pcrien) -> Self { variant as u8 != 0 } } -impl PCRIEN_R { +#[doc = "Field `PCRIEN` reader - Stop Condition Received Interrupt Enable"] +pub type PcrienR = crate::BitReader; +impl PcrienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCRIEN_A { + pub const fn variant(&self) -> Pcrien { match self.bits { - false => PCRIEN_A::VALUE1, - true => PCRIEN_A::VALUE2, + false => Pcrien::Value1, + true => Pcrien::Value2, } } #[doc = "The stop condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCRIEN_A::VALUE1 + *self == Pcrien::Value1 } #[doc = "The stop condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCRIEN_A::VALUE2 + *self == Pcrien::Value2 } } #[doc = "Field `PCRIEN` writer - Stop Condition Received Interrupt Enable"] -pub type PCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, PCRIEN_A>; -impl<'a, REG> PCRIEN_W<'a, REG> +pub type PcrienW<'a, REG> = crate::BitWriter<'a, REG, Pcrien>; +impl<'a, REG> PcrienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The stop condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCRIEN_A::VALUE1) + self.variant(Pcrien::Value1) } #[doc = "The stop condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCRIEN_A::VALUE2) + self.variant(Pcrien::Value2) } } -#[doc = "Field `NACKIEN` reader - Non-Acknowledge Interrupt Enable"] -pub type NACKIEN_R = crate::BitReader; #[doc = "Non-Acknowledge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NACKIEN_A { +pub enum Nackien { #[doc = "0: The non-acknowledge interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The non-acknowledge interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NACKIEN_A) -> Self { + fn from(variant: Nackien) -> Self { variant as u8 != 0 } } -impl NACKIEN_R { +#[doc = "Field `NACKIEN` reader - Non-Acknowledge Interrupt Enable"] +pub type NackienR = crate::BitReader; +impl NackienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NACKIEN_A { + pub const fn variant(&self) -> Nackien { match self.bits { - false => NACKIEN_A::VALUE1, - true => NACKIEN_A::VALUE2, + false => Nackien::Value1, + true => Nackien::Value2, } } #[doc = "The non-acknowledge interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NACKIEN_A::VALUE1 + *self == Nackien::Value1 } #[doc = "The non-acknowledge interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NACKIEN_A::VALUE2 + *self == Nackien::Value2 } } #[doc = "Field `NACKIEN` writer - Non-Acknowledge Interrupt Enable"] -pub type NACKIEN_W<'a, REG> = crate::BitWriter<'a, REG, NACKIEN_A>; -impl<'a, REG> NACKIEN_W<'a, REG> +pub type NackienW<'a, REG> = crate::BitWriter<'a, REG, Nackien>; +impl<'a, REG> NackienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The non-acknowledge interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NACKIEN_A::VALUE1) + self.variant(Nackien::Value1) } #[doc = "The non-acknowledge interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NACKIEN_A::VALUE2) + self.variant(Nackien::Value2) } } -#[doc = "Field `ARLIEN` reader - Arbitration Lost Interrupt Enable"] -pub type ARLIEN_R = crate::BitReader; #[doc = "Arbitration Lost Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARLIEN_A { +pub enum Arlien { #[doc = "0: The arbitration lost interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The arbitration lost interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARLIEN_A) -> Self { + fn from(variant: Arlien) -> Self { variant as u8 != 0 } } -impl ARLIEN_R { +#[doc = "Field `ARLIEN` reader - Arbitration Lost Interrupt Enable"] +pub type ArlienR = crate::BitReader; +impl ArlienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARLIEN_A { + pub const fn variant(&self) -> Arlien { match self.bits { - false => ARLIEN_A::VALUE1, - true => ARLIEN_A::VALUE2, + false => Arlien::Value1, + true => Arlien::Value2, } } #[doc = "The arbitration lost interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARLIEN_A::VALUE1 + *self == Arlien::Value1 } #[doc = "The arbitration lost interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARLIEN_A::VALUE2 + *self == Arlien::Value2 } } #[doc = "Field `ARLIEN` writer - Arbitration Lost Interrupt Enable"] -pub type ARLIEN_W<'a, REG> = crate::BitWriter<'a, REG, ARLIEN_A>; -impl<'a, REG> ARLIEN_W<'a, REG> +pub type ArlienW<'a, REG> = crate::BitWriter<'a, REG, Arlien>; +impl<'a, REG> ArlienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The arbitration lost interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARLIEN_A::VALUE1) + self.variant(Arlien::Value1) } #[doc = "The arbitration lost interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARLIEN_A::VALUE2) + self.variant(Arlien::Value2) } } -#[doc = "Field `SRRIEN` reader - Slave Read Request Interrupt Enable"] -pub type SRRIEN_R = crate::BitReader; #[doc = "Slave Read Request Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRRIEN_A { +pub enum Srrien { #[doc = "0: The slave read request interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The slave read request interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRRIEN_A) -> Self { + fn from(variant: Srrien) -> Self { variant as u8 != 0 } } -impl SRRIEN_R { +#[doc = "Field `SRRIEN` reader - Slave Read Request Interrupt Enable"] +pub type SrrienR = crate::BitReader; +impl SrrienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRRIEN_A { + pub const fn variant(&self) -> Srrien { match self.bits { - false => SRRIEN_A::VALUE1, - true => SRRIEN_A::VALUE2, + false => Srrien::Value1, + true => Srrien::Value2, } } #[doc = "The slave read request interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRRIEN_A::VALUE1 + *self == Srrien::Value1 } #[doc = "The slave read request interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRRIEN_A::VALUE2 + *self == Srrien::Value2 } } #[doc = "Field `SRRIEN` writer - Slave Read Request Interrupt Enable"] -pub type SRRIEN_W<'a, REG> = crate::BitWriter<'a, REG, SRRIEN_A>; -impl<'a, REG> SRRIEN_W<'a, REG> +pub type SrrienW<'a, REG> = crate::BitWriter<'a, REG, Srrien>; +impl<'a, REG> SrrienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slave read request interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRRIEN_A::VALUE1) + self.variant(Srrien::Value1) } #[doc = "The slave read request interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRRIEN_A::VALUE2) + self.variant(Srrien::Value2) } } -#[doc = "Field `ERRIEN` reader - Error Interrupt Enable"] -pub type ERRIEN_R = crate::BitReader; #[doc = "Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERRIEN_A { +pub enum Errien { #[doc = "0: The error interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The error interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERRIEN_A) -> Self { + fn from(variant: Errien) -> Self { variant as u8 != 0 } } -impl ERRIEN_R { +#[doc = "Field `ERRIEN` reader - Error Interrupt Enable"] +pub type ErrienR = crate::BitReader; +impl ErrienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERRIEN_A { + pub const fn variant(&self) -> Errien { match self.bits { - false => ERRIEN_A::VALUE1, - true => ERRIEN_A::VALUE2, + false => Errien::Value1, + true => Errien::Value2, } } #[doc = "The error interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERRIEN_A::VALUE1 + *self == Errien::Value1 } #[doc = "The error interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERRIEN_A::VALUE2 + *self == Errien::Value2 } } #[doc = "Field `ERRIEN` writer - Error Interrupt Enable"] -pub type ERRIEN_W<'a, REG> = crate::BitWriter<'a, REG, ERRIEN_A>; -impl<'a, REG> ERRIEN_W<'a, REG> +pub type ErrienW<'a, REG> = crate::BitWriter<'a, REG, Errien>; +impl<'a, REG> ErrienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The error interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERRIEN_A::VALUE1) + self.variant(Errien::Value1) } #[doc = "The error interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERRIEN_A::VALUE2) + self.variant(Errien::Value2) } } -#[doc = "Field `SACKDIS` reader - Slave Acknowledge Disable"] -pub type SACKDIS_R = crate::BitReader; #[doc = "Slave Acknowledge Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SACKDIS_A { +pub enum Sackdis { #[doc = "0: The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SACKDIS_A) -> Self { + fn from(variant: Sackdis) -> Self { variant as u8 != 0 } } -impl SACKDIS_R { +#[doc = "Field `SACKDIS` reader - Slave Acknowledge Disable"] +pub type SackdisR = crate::BitReader; +impl SackdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SACKDIS_A { + pub const fn variant(&self) -> Sackdis { match self.bits { - false => SACKDIS_A::VALUE1, - true => SACKDIS_A::VALUE2, + false => Sackdis::Value1, + true => Sackdis::Value2, } } #[doc = "The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SACKDIS_A::VALUE1 + *self == Sackdis::Value1 } #[doc = "The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SACKDIS_A::VALUE2 + *self == Sackdis::Value2 } } #[doc = "Field `SACKDIS` writer - Slave Acknowledge Disable"] -pub type SACKDIS_W<'a, REG> = crate::BitWriter<'a, REG, SACKDIS_A>; -impl<'a, REG> SACKDIS_W<'a, REG> +pub type SackdisW<'a, REG> = crate::BitWriter<'a, REG, Sackdis>; +impl<'a, REG> SackdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SACKDIS_A::VALUE1) + self.variant(Sackdis::Value1) } #[doc = "The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SACKDIS_A::VALUE2) + self.variant(Sackdis::Value2) } } #[doc = "Field `HDEL` reader - Hardware Delay"] -pub type HDEL_R = crate::FieldReader; +pub type HdelR = crate::FieldReader; #[doc = "Field `HDEL` writer - Hardware Delay"] -pub type HDEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `ACKIEN` reader - Acknowledge Interrupt Enable"] -pub type ACKIEN_R = crate::BitReader; +pub type HdelW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Acknowledge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACKIEN_A { +pub enum Ackien { #[doc = "0: The acknowledge interrupt is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The acknowledge interrupt is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACKIEN_A) -> Self { + fn from(variant: Ackien) -> Self { variant as u8 != 0 } } -impl ACKIEN_R { +#[doc = "Field `ACKIEN` reader - Acknowledge Interrupt Enable"] +pub type AckienR = crate::BitReader; +impl AckienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACKIEN_A { + pub const fn variant(&self) -> Ackien { match self.bits { - false => ACKIEN_A::VALUE1, - true => ACKIEN_A::VALUE2, + false => Ackien::Value1, + true => Ackien::Value2, } } #[doc = "The acknowledge interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACKIEN_A::VALUE1 + *self == Ackien::Value1 } #[doc = "The acknowledge interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACKIEN_A::VALUE2 + *self == Ackien::Value2 } } #[doc = "Field `ACKIEN` writer - Acknowledge Interrupt Enable"] -pub type ACKIEN_W<'a, REG> = crate::BitWriter<'a, REG, ACKIEN_A>; -impl<'a, REG> ACKIEN_W<'a, REG> +pub type AckienW<'a, REG> = crate::BitWriter<'a, REG, Ackien>; +impl<'a, REG> AckienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The acknowledge interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACKIEN_A::VALUE1) + self.variant(Ackien::Value1) } #[doc = "The acknowledge interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACKIEN_A::VALUE2) + self.variant(Ackien::Value2) } } -#[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MCLK_R = crate::BitReader; #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCLK_A { +pub enum Mclk { #[doc = "0: The MCLK generation is disabled and MCLK is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MCLK generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCLK_A) -> Self { + fn from(variant: Mclk) -> Self { variant as u8 != 0 } } -impl MCLK_R { +#[doc = "Field `MCLK` reader - Master Clock Enable"] +pub type MclkR = crate::BitReader; +impl MclkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCLK_A { + pub const fn variant(&self) -> Mclk { match self.bits { - false => MCLK_A::VALUE1, - true => MCLK_A::VALUE2, + false => Mclk::Value1, + true => Mclk::Value2, } } #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCLK_A::VALUE1 + *self == Mclk::Value1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCLK_A::VALUE2 + *self == Mclk::Value2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; -impl<'a, REG> MCLK_W<'a, REG> +pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; +impl<'a, REG> MclkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE1) + self.variant(Mclk::Value1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE2) + self.variant(Mclk::Value2) } } impl R { #[doc = "Bits 0:15 - Slave Address"] #[inline(always)] - pub fn slad(&self) -> SLAD_R { - SLAD_R::new((self.bits & 0xffff) as u16) + pub fn slad(&self) -> SladR { + SladR::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Acknowledge 00H"] #[inline(always)] - pub fn ack00(&self) -> ACK00_R { - ACK00_R::new(((self.bits >> 16) & 1) != 0) + pub fn ack00(&self) -> Ack00R { + Ack00R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Symbol Timing"] #[inline(always)] - pub fn stim(&self) -> STIM_R { - STIM_R::new(((self.bits >> 17) & 1) != 0) + pub fn stim(&self) -> StimR { + StimR::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Start Condition Received Interrupt Enable"] #[inline(always)] - pub fn scrien(&self) -> SCRIEN_R { - SCRIEN_R::new(((self.bits >> 18) & 1) != 0) + pub fn scrien(&self) -> ScrienR { + ScrienR::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"] #[inline(always)] - pub fn rscrien(&self) -> RSCRIEN_R { - RSCRIEN_R::new(((self.bits >> 19) & 1) != 0) + pub fn rscrien(&self) -> RscrienR { + RscrienR::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"] #[inline(always)] - pub fn pcrien(&self) -> PCRIEN_R { - PCRIEN_R::new(((self.bits >> 20) & 1) != 0) + pub fn pcrien(&self) -> PcrienR { + PcrienR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"] #[inline(always)] - pub fn nackien(&self) -> NACKIEN_R { - NACKIEN_R::new(((self.bits >> 21) & 1) != 0) + pub fn nackien(&self) -> NackienR { + NackienR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"] #[inline(always)] - pub fn arlien(&self) -> ARLIEN_R { - ARLIEN_R::new(((self.bits >> 22) & 1) != 0) + pub fn arlien(&self) -> ArlienR { + ArlienR::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Slave Read Request Interrupt Enable"] #[inline(always)] - pub fn srrien(&self) -> SRRIEN_R { - SRRIEN_R::new(((self.bits >> 23) & 1) != 0) + pub fn srrien(&self) -> SrrienR { + SrrienR::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Error Interrupt Enable"] #[inline(always)] - pub fn errien(&self) -> ERRIEN_R { - ERRIEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn errien(&self) -> ErrienR { + ErrienR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Slave Acknowledge Disable"] #[inline(always)] - pub fn sackdis(&self) -> SACKDIS_R { - SACKDIS_R::new(((self.bits >> 25) & 1) != 0) + pub fn sackdis(&self) -> SackdisR { + SackdisR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bits 26:29 - Hardware Delay"] #[inline(always)] - pub fn hdel(&self) -> HDEL_R { - HDEL_R::new(((self.bits >> 26) & 0x0f) as u8) + pub fn hdel(&self) -> HdelR { + HdelR::new(((self.bits >> 26) & 0x0f) as u8) } #[doc = "Bit 30 - Acknowledge Interrupt Enable"] #[inline(always)] - pub fn ackien(&self) -> ACKIEN_R { - ACKIEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn ackien(&self) -> AckienR { + AckienR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MCLK_R { - MCLK_R::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MclkR { + MclkR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Slave Address"] #[inline(always)] #[must_use] - pub fn slad(&mut self) -> SLAD_W { - SLAD_W::new(self, 0) + pub fn slad(&mut self) -> SladW { + SladW::new(self, 0) } #[doc = "Bit 16 - Acknowledge 00H"] #[inline(always)] #[must_use] - pub fn ack00(&mut self) -> ACK00_W { - ACK00_W::new(self, 16) + pub fn ack00(&mut self) -> Ack00W { + Ack00W::new(self, 16) } #[doc = "Bit 17 - Symbol Timing"] #[inline(always)] #[must_use] - pub fn stim(&mut self) -> STIM_W { - STIM_W::new(self, 17) + pub fn stim(&mut self) -> StimW { + StimW::new(self, 17) } #[doc = "Bit 18 - Start Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn scrien(&mut self) -> SCRIEN_W { - SCRIEN_W::new(self, 18) + pub fn scrien(&mut self) -> ScrienW { + ScrienW::new(self, 18) } #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rscrien(&mut self) -> RSCRIEN_W { - RSCRIEN_W::new(self, 19) + pub fn rscrien(&mut self) -> RscrienW { + RscrienW::new(self, 19) } #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pcrien(&mut self) -> PCRIEN_W { - PCRIEN_W::new(self, 20) + pub fn pcrien(&mut self) -> PcrienW { + PcrienW::new(self, 20) } #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn nackien(&mut self) -> NACKIEN_W { - NACKIEN_W::new(self, 21) + pub fn nackien(&mut self) -> NackienW { + NackienW::new(self, 21) } #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"] #[inline(always)] #[must_use] - pub fn arlien(&mut self) -> ARLIEN_W { - ARLIEN_W::new(self, 22) + pub fn arlien(&mut self) -> ArlienW { + ArlienW::new(self, 22) } #[doc = "Bit 23 - Slave Read Request Interrupt Enable"] #[inline(always)] #[must_use] - pub fn srrien(&mut self) -> SRRIEN_W { - SRRIEN_W::new(self, 23) + pub fn srrien(&mut self) -> SrrienW { + SrrienW::new(self, 23) } #[doc = "Bit 24 - Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn errien(&mut self) -> ERRIEN_W { - ERRIEN_W::new(self, 24) + pub fn errien(&mut self) -> ErrienW { + ErrienW::new(self, 24) } #[doc = "Bit 25 - Slave Acknowledge Disable"] #[inline(always)] #[must_use] - pub fn sackdis(&mut self) -> SACKDIS_W { - SACKDIS_W::new(self, 25) + pub fn sackdis(&mut self) -> SackdisW { + SackdisW::new(self, 25) } #[doc = "Bits 26:29 - Hardware Delay"] #[inline(always)] #[must_use] - pub fn hdel(&mut self) -> HDEL_W { - HDEL_W::new(self, 26) + pub fn hdel(&mut self) -> HdelW { + HdelW::new(self, 26) } #[doc = "Bit 30 - Acknowledge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ackien(&mut self) -> ACKIEN_W { - ACKIEN_W::new(self, 30) + pub fn ackien(&mut self) -> AckienW { + AckienW::new(self, 30) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MCLK_W { - MCLK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mclk(&mut self) -> MclkW { + MclkW::new(self, 31) } } #[doc = "Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCR_IICMODE_SPEC; -impl crate::RegisterSpec for PCR_IICMODE_SPEC { +pub struct PcrIicmodeSpec; +impl crate::RegisterSpec for PcrIicmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcr_iicmode::R`](R) reader structure"] -impl crate::Readable for PCR_IICMODE_SPEC {} +impl crate::Readable for PcrIicmodeSpec {} #[doc = "`write(|w| ..)` method takes [`pcr_iicmode::W`](W) writer structure"] -impl crate::Writable for PCR_IICMODE_SPEC { +impl crate::Writable for PcrIicmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_IICMode to value 0"] -impl crate::Resettable for PCR_IICMODE_SPEC { +impl crate::Resettable for PcrIicmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_iismode.rs b/src/usic0_ch0/pcr_iismode.rs index 4b2c29cb..f995addc 100644 --- a/src/usic0_ch0/pcr_iismode.rs +++ b/src/usic0_ch0/pcr_iismode.rs @@ -1,561 +1,552 @@ #[doc = "Register `PCR_IISMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_IISMode` writer"] -pub type W = crate::W; -#[doc = "Field `WAGEN` reader - WA Generation Enable"] -pub type WAGEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "WA Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAGEN_A { +pub enum Wagen { #[doc = "0: The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAGEN_A) -> Self { + fn from(variant: Wagen) -> Self { variant as u8 != 0 } } -impl WAGEN_R { +#[doc = "Field `WAGEN` reader - WA Generation Enable"] +pub type WagenR = crate::BitReader; +impl WagenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAGEN_A { + pub const fn variant(&self) -> Wagen { match self.bits { - false => WAGEN_A::VALUE1, - true => WAGEN_A::VALUE2, + false => Wagen::Value1, + true => Wagen::Value2, } } #[doc = "The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAGEN_A::VALUE1 + *self == Wagen::Value1 } #[doc = "The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAGEN_A::VALUE2 + *self == Wagen::Value2 } } #[doc = "Field `WAGEN` writer - WA Generation Enable"] -pub type WAGEN_W<'a, REG> = crate::BitWriter<'a, REG, WAGEN_A>; -impl<'a, REG> WAGEN_W<'a, REG> +pub type WagenW<'a, REG> = crate::BitWriter<'a, REG, Wagen>; +impl<'a, REG> WagenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAGEN_A::VALUE1) + self.variant(Wagen::Value1) } #[doc = "The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAGEN_A::VALUE2) + self.variant(Wagen::Value2) } } -#[doc = "Field `DTEN` reader - Data Transfers Enable"] -pub type DTEN_R = crate::BitReader; #[doc = "Data Transfers Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DTEN_A { +pub enum Dten { #[doc = "0: The changes of the WA input signal are ignored and no transfers take place."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Transfers are enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DTEN_A) -> Self { + fn from(variant: Dten) -> Self { variant as u8 != 0 } } -impl DTEN_R { +#[doc = "Field `DTEN` reader - Data Transfers Enable"] +pub type DtenR = crate::BitReader; +impl DtenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DTEN_A { + pub const fn variant(&self) -> Dten { match self.bits { - false => DTEN_A::VALUE1, - true => DTEN_A::VALUE2, + false => Dten::Value1, + true => Dten::Value2, } } #[doc = "The changes of the WA input signal are ignored and no transfers take place."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DTEN_A::VALUE1 + *self == Dten::Value1 } #[doc = "Transfers are enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DTEN_A::VALUE2 + *self == Dten::Value2 } } #[doc = "Field `DTEN` writer - Data Transfers Enable"] -pub type DTEN_W<'a, REG> = crate::BitWriter<'a, REG, DTEN_A>; -impl<'a, REG> DTEN_W<'a, REG> +pub type DtenW<'a, REG> = crate::BitWriter<'a, REG, Dten>; +impl<'a, REG> DtenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The changes of the WA input signal are ignored and no transfers take place."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DTEN_A::VALUE1) + self.variant(Dten::Value1) } #[doc = "Transfers are enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DTEN_A::VALUE2) + self.variant(Dten::Value2) } } -#[doc = "Field `SELINV` reader - Select Inversion"] -pub type SELINV_R = crate::BitReader; #[doc = "Select Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELINV_A { +pub enum Selinv { #[doc = "0: The SELOx outputs have the same polarity as the WA signal."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The SELOx outputs have the inverted polarity to the WA signal."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELINV_A) -> Self { + fn from(variant: Selinv) -> Self { variant as u8 != 0 } } -impl SELINV_R { +#[doc = "Field `SELINV` reader - Select Inversion"] +pub type SelinvR = crate::BitReader; +impl SelinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELINV_A { + pub const fn variant(&self) -> Selinv { match self.bits { - false => SELINV_A::VALUE1, - true => SELINV_A::VALUE2, + false => Selinv::Value1, + true => Selinv::Value2, } } #[doc = "The SELOx outputs have the same polarity as the WA signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELINV_A::VALUE1 + *self == Selinv::Value1 } #[doc = "The SELOx outputs have the inverted polarity to the WA signal."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELINV_A::VALUE2 + *self == Selinv::Value2 } } #[doc = "Field `SELINV` writer - Select Inversion"] -pub type SELINV_W<'a, REG> = crate::BitWriter<'a, REG, SELINV_A>; -impl<'a, REG> SELINV_W<'a, REG> +pub type SelinvW<'a, REG> = crate::BitWriter<'a, REG, Selinv>; +impl<'a, REG> SelinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The SELOx outputs have the same polarity as the WA signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELINV_A::VALUE1) + self.variant(Selinv::Value1) } #[doc = "The SELOx outputs have the inverted polarity to the WA signal."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELINV_A::VALUE2) + self.variant(Selinv::Value2) } } -#[doc = "Field `WAFEIEN` reader - WA Falling Edge Interrupt Enable"] -pub type WAFEIEN_R = crate::BitReader; #[doc = "WA Falling Edge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAFEIEN_A { +pub enum Wafeien { #[doc = "0: A protocol interrupt is not activated if a falling edge of WA is generated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is activated if a falling edge of WA is generated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAFEIEN_A) -> Self { + fn from(variant: Wafeien) -> Self { variant as u8 != 0 } } -impl WAFEIEN_R { +#[doc = "Field `WAFEIEN` reader - WA Falling Edge Interrupt Enable"] +pub type WafeienR = crate::BitReader; +impl WafeienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAFEIEN_A { + pub const fn variant(&self) -> Wafeien { match self.bits { - false => WAFEIEN_A::VALUE1, - true => WAFEIEN_A::VALUE2, + false => Wafeien::Value1, + true => Wafeien::Value2, } } #[doc = "A protocol interrupt is not activated if a falling edge of WA is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAFEIEN_A::VALUE1 + *self == Wafeien::Value1 } #[doc = "A protocol interrupt is activated if a falling edge of WA is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAFEIEN_A::VALUE2 + *self == Wafeien::Value2 } } #[doc = "Field `WAFEIEN` writer - WA Falling Edge Interrupt Enable"] -pub type WAFEIEN_W<'a, REG> = crate::BitWriter<'a, REG, WAFEIEN_A>; -impl<'a, REG> WAFEIEN_W<'a, REG> +pub type WafeienW<'a, REG> = crate::BitWriter<'a, REG, Wafeien>; +impl<'a, REG> WafeienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated if a falling edge of WA is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAFEIEN_A::VALUE1) + self.variant(Wafeien::Value1) } #[doc = "A protocol interrupt is activated if a falling edge of WA is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAFEIEN_A::VALUE2) + self.variant(Wafeien::Value2) } } -#[doc = "Field `WAREIEN` reader - WA Rising Edge Interrupt Enable"] -pub type WAREIEN_R = crate::BitReader; #[doc = "WA Rising Edge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAREIEN_A { +pub enum Wareien { #[doc = "0: A protocol interrupt is not activated if a rising edge of WA is generated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is activated if a rising edge of WA is generated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAREIEN_A) -> Self { + fn from(variant: Wareien) -> Self { variant as u8 != 0 } } -impl WAREIEN_R { +#[doc = "Field `WAREIEN` reader - WA Rising Edge Interrupt Enable"] +pub type WareienR = crate::BitReader; +impl WareienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAREIEN_A { + pub const fn variant(&self) -> Wareien { match self.bits { - false => WAREIEN_A::VALUE1, - true => WAREIEN_A::VALUE2, + false => Wareien::Value1, + true => Wareien::Value2, } } #[doc = "A protocol interrupt is not activated if a rising edge of WA is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAREIEN_A::VALUE1 + *self == Wareien::Value1 } #[doc = "A protocol interrupt is activated if a rising edge of WA is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAREIEN_A::VALUE2 + *self == Wareien::Value2 } } #[doc = "Field `WAREIEN` writer - WA Rising Edge Interrupt Enable"] -pub type WAREIEN_W<'a, REG> = crate::BitWriter<'a, REG, WAREIEN_A>; -impl<'a, REG> WAREIEN_W<'a, REG> +pub type WareienW<'a, REG> = crate::BitWriter<'a, REG, Wareien>; +impl<'a, REG> WareienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated if a rising edge of WA is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAREIEN_A::VALUE1) + self.variant(Wareien::Value1) } #[doc = "A protocol interrupt is activated if a rising edge of WA is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAREIEN_A::VALUE2) + self.variant(Wareien::Value2) } } -#[doc = "Field `ENDIEN` reader - END Interrupt Enable"] -pub type ENDIEN_R = crate::BitReader; #[doc = "END Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENDIEN_A { +pub enum Endien { #[doc = "0: A protocol interrupt is not activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENDIEN_A) -> Self { + fn from(variant: Endien) -> Self { variant as u8 != 0 } } -impl ENDIEN_R { +#[doc = "Field `ENDIEN` reader - END Interrupt Enable"] +pub type EndienR = crate::BitReader; +impl EndienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENDIEN_A { + pub const fn variant(&self) -> Endien { match self.bits { - false => ENDIEN_A::VALUE1, - true => ENDIEN_A::VALUE2, + false => Endien::Value1, + true => Endien::Value2, } } #[doc = "A protocol interrupt is not activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENDIEN_A::VALUE1 + *self == Endien::Value1 } #[doc = "A protocol interrupt is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENDIEN_A::VALUE2 + *self == Endien::Value2 } } #[doc = "Field `ENDIEN` writer - END Interrupt Enable"] -pub type ENDIEN_W<'a, REG> = crate::BitWriter<'a, REG, ENDIEN_A>; -impl<'a, REG> ENDIEN_W<'a, REG> +pub type EndienW<'a, REG> = crate::BitWriter<'a, REG, Endien>; +impl<'a, REG> EndienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENDIEN_A::VALUE1) + self.variant(Endien::Value1) } #[doc = "A protocol interrupt is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENDIEN_A::VALUE2) + self.variant(Endien::Value2) } } -#[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] -pub type DX2TIEN_R = crate::BitReader; #[doc = "DX2T Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2TIEN_A { +pub enum Dx2tien { #[doc = "0: A protocol interrupt is not generated if DX2T is active."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is generated if DX2T is active."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2TIEN_A) -> Self { + fn from(variant: Dx2tien) -> Self { variant as u8 != 0 } } -impl DX2TIEN_R { +#[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] +pub type Dx2tienR = crate::BitReader; +impl Dx2tienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2TIEN_A { + pub const fn variant(&self) -> Dx2tien { match self.bits { - false => DX2TIEN_A::VALUE1, - true => DX2TIEN_A::VALUE2, + false => Dx2tien::Value1, + true => Dx2tien::Value2, } } #[doc = "A protocol interrupt is not generated if DX2T is active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2TIEN_A::VALUE1 + *self == Dx2tien::Value1 } #[doc = "A protocol interrupt is generated if DX2T is active."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2TIEN_A::VALUE2 + *self == Dx2tien::Value2 } } #[doc = "Field `DX2TIEN` writer - DX2T Interrupt Enable"] -pub type DX2TIEN_W<'a, REG> = crate::BitWriter<'a, REG, DX2TIEN_A>; -impl<'a, REG> DX2TIEN_W<'a, REG> +pub type Dx2tienW<'a, REG> = crate::BitWriter<'a, REG, Dx2tien>; +impl<'a, REG> Dx2tienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if DX2T is active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2TIEN_A::VALUE1) + self.variant(Dx2tien::Value1) } #[doc = "A protocol interrupt is generated if DX2T is active."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2TIEN_A::VALUE2) + self.variant(Dx2tien::Value2) } } #[doc = "Field `TDEL` reader - Transfer Delay"] -pub type TDEL_R = crate::FieldReader; +pub type TdelR = crate::FieldReader; #[doc = "Field `TDEL` writer - Transfer Delay"] -pub type TDEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MCLK_R = crate::BitReader; +pub type TdelW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCLK_A { +pub enum Mclk { #[doc = "0: The MCLK generation is disabled and MCLK is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MCLK generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCLK_A) -> Self { + fn from(variant: Mclk) -> Self { variant as u8 != 0 } } -impl MCLK_R { +#[doc = "Field `MCLK` reader - Master Clock Enable"] +pub type MclkR = crate::BitReader; +impl MclkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCLK_A { + pub const fn variant(&self) -> Mclk { match self.bits { - false => MCLK_A::VALUE1, - true => MCLK_A::VALUE2, + false => Mclk::Value1, + true => Mclk::Value2, } } #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCLK_A::VALUE1 + *self == Mclk::Value1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCLK_A::VALUE2 + *self == Mclk::Value2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; -impl<'a, REG> MCLK_W<'a, REG> +pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; +impl<'a, REG> MclkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE1) + self.variant(Mclk::Value1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE2) + self.variant(Mclk::Value2) } } impl R { #[doc = "Bit 0 - WA Generation Enable"] #[inline(always)] - pub fn wagen(&self) -> WAGEN_R { - WAGEN_R::new((self.bits & 1) != 0) + pub fn wagen(&self) -> WagenR { + WagenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Data Transfers Enable"] #[inline(always)] - pub fn dten(&self) -> DTEN_R { - DTEN_R::new(((self.bits >> 1) & 1) != 0) + pub fn dten(&self) -> DtenR { + DtenR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - pub fn selinv(&self) -> SELINV_R { - SELINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn selinv(&self) -> SelinvR { + SelinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"] #[inline(always)] - pub fn wafeien(&self) -> WAFEIEN_R { - WAFEIEN_R::new(((self.bits >> 4) & 1) != 0) + pub fn wafeien(&self) -> WafeienR { + WafeienR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"] #[inline(always)] - pub fn wareien(&self) -> WAREIEN_R { - WAREIEN_R::new(((self.bits >> 5) & 1) != 0) + pub fn wareien(&self) -> WareienR { + WareienR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - END Interrupt Enable"] #[inline(always)] - pub fn endien(&self) -> ENDIEN_R { - ENDIEN_R::new(((self.bits >> 6) & 1) != 0) + pub fn endien(&self) -> EndienR { + EndienR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - pub fn dx2tien(&self) -> DX2TIEN_R { - DX2TIEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn dx2tien(&self) -> Dx2tienR { + Dx2tienR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:21 - Transfer Delay"] #[inline(always)] - pub fn tdel(&self) -> TDEL_R { - TDEL_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn tdel(&self) -> TdelR { + TdelR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MCLK_R { - MCLK_R::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MclkR { + MclkR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - WA Generation Enable"] #[inline(always)] #[must_use] - pub fn wagen(&mut self) -> WAGEN_W { - WAGEN_W::new(self, 0) + pub fn wagen(&mut self) -> WagenW { + WagenW::new(self, 0) } #[doc = "Bit 1 - Data Transfers Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DTEN_W { - DTEN_W::new(self, 1) + pub fn dten(&mut self) -> DtenW { + DtenW::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] #[must_use] - pub fn selinv(&mut self) -> SELINV_W { - SELINV_W::new(self, 2) + pub fn selinv(&mut self) -> SelinvW { + SelinvW::new(self, 2) } #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn wafeien(&mut self) -> WAFEIEN_W { - WAFEIEN_W::new(self, 4) + pub fn wafeien(&mut self) -> WafeienW { + WafeienW::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn wareien(&mut self) -> WAREIEN_W { - WAREIEN_W::new(self, 5) + pub fn wareien(&mut self) -> WareienW { + WareienW::new(self, 5) } #[doc = "Bit 6 - END Interrupt Enable"] #[inline(always)] #[must_use] - pub fn endien(&mut self) -> ENDIEN_W { - ENDIEN_W::new(self, 6) + pub fn endien(&mut self) -> EndienW { + EndienW::new(self, 6) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dx2tien(&mut self) -> DX2TIEN_W { - DX2TIEN_W::new(self, 15) + pub fn dx2tien(&mut self) -> Dx2tienW { + Dx2tienW::new(self, 15) } #[doc = "Bits 16:21 - Transfer Delay"] #[inline(always)] #[must_use] - pub fn tdel(&mut self) -> TDEL_W { - TDEL_W::new(self, 16) + pub fn tdel(&mut self) -> TdelW { + TdelW::new(self, 16) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MCLK_W { - MCLK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mclk(&mut self) -> MclkW { + MclkW::new(self, 31) } } #[doc = "Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCR_IISMODE_SPEC; -impl crate::RegisterSpec for PCR_IISMODE_SPEC { +pub struct PcrIismodeSpec; +impl crate::RegisterSpec for PcrIismodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcr_iismode::R`](R) reader structure"] -impl crate::Readable for PCR_IISMODE_SPEC {} +impl crate::Readable for PcrIismodeSpec {} #[doc = "`write(|w| ..)` method takes [`pcr_iismode::W`](W) writer structure"] -impl crate::Writable for PCR_IISMODE_SPEC { +impl crate::Writable for PcrIismodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_IISMode to value 0"] -impl crate::Resettable for PCR_IISMODE_SPEC { +impl crate::Resettable for PcrIismodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_sscmode.rs b/src/usic0_ch0/pcr_sscmode.rs index 2b947e32..2fc74e36 100644 --- a/src/usic0_ch0/pcr_sscmode.rs +++ b/src/usic0_ch0/pcr_sscmode.rs @@ -1,279 +1,279 @@ #[doc = "Register `PCR_SSCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_SSCMode` writer"] -pub type W = crate::W; -#[doc = "Field `MSLSEN` reader - MSLS Enable"] -pub type MSLSEN_R = crate::BitReader; +pub type W = crate::W; #[doc = "MSLS Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSLSEN_A { +pub enum Mslsen { #[doc = "0: The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MSLS generation is enabled. This is the setting for SSC master mode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSLSEN_A) -> Self { + fn from(variant: Mslsen) -> Self { variant as u8 != 0 } } -impl MSLSEN_R { +#[doc = "Field `MSLSEN` reader - MSLS Enable"] +pub type MslsenR = crate::BitReader; +impl MslsenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSLSEN_A { + pub const fn variant(&self) -> Mslsen { match self.bits { - false => MSLSEN_A::VALUE1, - true => MSLSEN_A::VALUE2, + false => Mslsen::Value1, + true => Mslsen::Value2, } } #[doc = "The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSLSEN_A::VALUE1 + *self == Mslsen::Value1 } #[doc = "The MSLS generation is enabled. This is the setting for SSC master mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSLSEN_A::VALUE2 + *self == Mslsen::Value2 } } #[doc = "Field `MSLSEN` writer - MSLS Enable"] -pub type MSLSEN_W<'a, REG> = crate::BitWriter<'a, REG, MSLSEN_A>; -impl<'a, REG> MSLSEN_W<'a, REG> +pub type MslsenW<'a, REG> = crate::BitWriter<'a, REG, Mslsen>; +impl<'a, REG> MslsenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSLSEN_A::VALUE1) + self.variant(Mslsen::Value1) } #[doc = "The MSLS generation is enabled. This is the setting for SSC master mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSLSEN_A::VALUE2) + self.variant(Mslsen::Value2) } } -#[doc = "Field `SELCTR` reader - Select Control"] -pub type SELCTR_R = crate::BitReader; #[doc = "Select Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELCTR_A { +pub enum Selctr { #[doc = "0: The coded select mode is enabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The direct select mode is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELCTR_A) -> Self { + fn from(variant: Selctr) -> Self { variant as u8 != 0 } } -impl SELCTR_R { +#[doc = "Field `SELCTR` reader - Select Control"] +pub type SelctrR = crate::BitReader; +impl SelctrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELCTR_A { + pub const fn variant(&self) -> Selctr { match self.bits { - false => SELCTR_A::VALUE1, - true => SELCTR_A::VALUE2, + false => Selctr::Value1, + true => Selctr::Value2, } } #[doc = "The coded select mode is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELCTR_A::VALUE1 + *self == Selctr::Value1 } #[doc = "The direct select mode is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELCTR_A::VALUE2 + *self == Selctr::Value2 } } #[doc = "Field `SELCTR` writer - Select Control"] -pub type SELCTR_W<'a, REG> = crate::BitWriter<'a, REG, SELCTR_A>; -impl<'a, REG> SELCTR_W<'a, REG> +pub type SelctrW<'a, REG> = crate::BitWriter<'a, REG, Selctr>; +impl<'a, REG> SelctrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The coded select mode is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELCTR_A::VALUE1) + self.variant(Selctr::Value1) } #[doc = "The direct select mode is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELCTR_A::VALUE2) + self.variant(Selctr::Value2) } } -#[doc = "Field `SELINV` reader - Select Inversion"] -pub type SELINV_R = crate::BitReader; #[doc = "Select Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELINV_A { +pub enum Selinv { #[doc = "0: The SELO outputs have the same polarity as the MSLS signal (active high)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The SELO outputs have the inverted polarity to the MSLS signal (active low)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELINV_A) -> Self { + fn from(variant: Selinv) -> Self { variant as u8 != 0 } } -impl SELINV_R { +#[doc = "Field `SELINV` reader - Select Inversion"] +pub type SelinvR = crate::BitReader; +impl SelinvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELINV_A { + pub const fn variant(&self) -> Selinv { match self.bits { - false => SELINV_A::VALUE1, - true => SELINV_A::VALUE2, + false => Selinv::Value1, + true => Selinv::Value2, } } #[doc = "The SELO outputs have the same polarity as the MSLS signal (active high)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELINV_A::VALUE1 + *self == Selinv::Value1 } #[doc = "The SELO outputs have the inverted polarity to the MSLS signal (active low)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELINV_A::VALUE2 + *self == Selinv::Value2 } } #[doc = "Field `SELINV` writer - Select Inversion"] -pub type SELINV_W<'a, REG> = crate::BitWriter<'a, REG, SELINV_A>; -impl<'a, REG> SELINV_W<'a, REG> +pub type SelinvW<'a, REG> = crate::BitWriter<'a, REG, Selinv>; +impl<'a, REG> SelinvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The SELO outputs have the same polarity as the MSLS signal (active high)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELINV_A::VALUE1) + self.variant(Selinv::Value1) } #[doc = "The SELO outputs have the inverted polarity to the MSLS signal (active low)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELINV_A::VALUE2) + self.variant(Selinv::Value2) } } -#[doc = "Field `FEM` reader - Frame End Mode"] -pub type FEM_R = crate::BitReader; #[doc = "Frame End Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FEM_A { +pub enum Fem { #[doc = "0: The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FEM_A) -> Self { + fn from(variant: Fem) -> Self { variant as u8 != 0 } } -impl FEM_R { +#[doc = "Field `FEM` reader - Frame End Mode"] +pub type FemR = crate::BitReader; +impl FemR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FEM_A { + pub const fn variant(&self) -> Fem { match self.bits { - false => FEM_A::VALUE1, - true => FEM_A::VALUE2, + false => Fem::Value1, + true => Fem::Value2, } } #[doc = "The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FEM_A::VALUE1 + *self == Fem::Value1 } #[doc = "The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FEM_A::VALUE2 + *self == Fem::Value2 } } #[doc = "Field `FEM` writer - Frame End Mode"] -pub type FEM_W<'a, REG> = crate::BitWriter<'a, REG, FEM_A>; -impl<'a, REG> FEM_W<'a, REG> +pub type FemW<'a, REG> = crate::BitWriter<'a, REG, Fem>; +impl<'a, REG> FemW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FEM_A::VALUE1) + self.variant(Fem::Value1) } #[doc = "The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FEM_A::VALUE2) + self.variant(Fem::Value2) } } -#[doc = "Field `CTQSEL1` reader - Input Frequency Selection"] -pub type CTQSEL1_R = crate::FieldReader; #[doc = "Input Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CTQSEL1_A { +pub enum Ctqsel1 { #[doc = "0: fCTQIN = fPDIV"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fCTQIN = fPPP"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fCTQIN = fSCLK"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: fCTQIN = fMCLK"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CTQSEL1_A) -> Self { + fn from(variant: Ctqsel1) -> Self { variant as _ } } -impl crate::FieldSpec for CTQSEL1_A { +impl crate::FieldSpec for Ctqsel1 { type Ux = u8; } -impl CTQSEL1_R { +#[doc = "Field `CTQSEL1` reader - Input Frequency Selection"] +pub type Ctqsel1R = crate::FieldReader; +impl Ctqsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CTQSEL1_A { + pub const fn variant(&self) -> Ctqsel1 { match self.bits { - 0 => CTQSEL1_A::VALUE1, - 1 => CTQSEL1_A::VALUE2, - 2 => CTQSEL1_A::VALUE3, - 3 => CTQSEL1_A::VALUE4, + 0 => Ctqsel1::Value1, + 1 => Ctqsel1::Value2, + 2 => Ctqsel1::Value3, + 3 => Ctqsel1::Value4, _ => unreachable!(), } } #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CTQSEL1_A::VALUE1 + *self == Ctqsel1::Value1 } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CTQSEL1_A::VALUE2 + *self == Ctqsel1::Value2 } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CTQSEL1_A::VALUE3 + *self == Ctqsel1::Value3 } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CTQSEL1_A::VALUE4 + *self == Ctqsel1::Value4 } } #[doc = "Field `CTQSEL1` writer - Input Frequency Selection"] -pub type CTQSEL1_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CTQSEL1_A>; -impl<'a, REG> CTQSEL1_W<'a, REG> +pub type Ctqsel1W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Ctqsel1>; +impl<'a, REG> Ctqsel1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,235 +281,235 @@ where #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTQSEL1_A::VALUE1) + self.variant(Ctqsel1::Value1) } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTQSEL1_A::VALUE2) + self.variant(Ctqsel1::Value2) } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CTQSEL1_A::VALUE3) + self.variant(Ctqsel1::Value3) } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CTQSEL1_A::VALUE4) + self.variant(Ctqsel1::Value4) } } #[doc = "Field `PCTQ1` reader - Divider Factor PCTQ1 for Tiw and Tnf"] -pub type PCTQ1_R = crate::FieldReader; +pub type Pctq1R = crate::FieldReader; #[doc = "Field `PCTQ1` writer - Divider Factor PCTQ1 for Tiw and Tnf"] -pub type PCTQ1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type Pctq1W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DCTQ1` reader - Divider Factor DCTQ1 for Tiw and Tnf"] -pub type DCTQ1_R = crate::FieldReader; +pub type Dctq1R = crate::FieldReader; #[doc = "Field `DCTQ1` writer - Divider Factor DCTQ1 for Tiw and Tnf"] -pub type DCTQ1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `PARIEN` reader - Parity Error Interrupt Enable"] -pub type PARIEN_R = crate::BitReader; +pub type Dctq1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Parity Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PARIEN_A { +pub enum Parien { #[doc = "0: A protocol interrupt is not generated with the detection of a parity error."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is generated with the detection of a parity error."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PARIEN_A) -> Self { + fn from(variant: Parien) -> Self { variant as u8 != 0 } } -impl PARIEN_R { +#[doc = "Field `PARIEN` reader - Parity Error Interrupt Enable"] +pub type ParienR = crate::BitReader; +impl ParienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PARIEN_A { + pub const fn variant(&self) -> Parien { match self.bits { - false => PARIEN_A::VALUE1, - true => PARIEN_A::VALUE2, + false => Parien::Value1, + true => Parien::Value2, } } #[doc = "A protocol interrupt is not generated with the detection of a parity error."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PARIEN_A::VALUE1 + *self == Parien::Value1 } #[doc = "A protocol interrupt is generated with the detection of a parity error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PARIEN_A::VALUE2 + *self == Parien::Value2 } } #[doc = "Field `PARIEN` writer - Parity Error Interrupt Enable"] -pub type PARIEN_W<'a, REG> = crate::BitWriter<'a, REG, PARIEN_A>; -impl<'a, REG> PARIEN_W<'a, REG> +pub type ParienW<'a, REG> = crate::BitWriter<'a, REG, Parien>; +impl<'a, REG> ParienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated with the detection of a parity error."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PARIEN_A::VALUE1) + self.variant(Parien::Value1) } #[doc = "A protocol interrupt is generated with the detection of a parity error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PARIEN_A::VALUE2) + self.variant(Parien::Value2) } } -#[doc = "Field `MSLSIEN` reader - MSLS Interrupt Enable"] -pub type MSLSIEN_R = crate::BitReader; #[doc = "MSLS Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSLSIEN_A { +pub enum Mslsien { #[doc = "0: A protocol interrupt is not generated if a change of signal MSLS is detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is generated if a change of signal MSLS is detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSLSIEN_A) -> Self { + fn from(variant: Mslsien) -> Self { variant as u8 != 0 } } -impl MSLSIEN_R { +#[doc = "Field `MSLSIEN` reader - MSLS Interrupt Enable"] +pub type MslsienR = crate::BitReader; +impl MslsienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSLSIEN_A { + pub const fn variant(&self) -> Mslsien { match self.bits { - false => MSLSIEN_A::VALUE1, - true => MSLSIEN_A::VALUE2, + false => Mslsien::Value1, + true => Mslsien::Value2, } } #[doc = "A protocol interrupt is not generated if a change of signal MSLS is detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSLSIEN_A::VALUE1 + *self == Mslsien::Value1 } #[doc = "A protocol interrupt is generated if a change of signal MSLS is detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSLSIEN_A::VALUE2 + *self == Mslsien::Value2 } } #[doc = "Field `MSLSIEN` writer - MSLS Interrupt Enable"] -pub type MSLSIEN_W<'a, REG> = crate::BitWriter<'a, REG, MSLSIEN_A>; -impl<'a, REG> MSLSIEN_W<'a, REG> +pub type MslsienW<'a, REG> = crate::BitWriter<'a, REG, Mslsien>; +impl<'a, REG> MslsienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if a change of signal MSLS is detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSLSIEN_A::VALUE1) + self.variant(Mslsien::Value1) } #[doc = "A protocol interrupt is generated if a change of signal MSLS is detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSLSIEN_A::VALUE2) + self.variant(Mslsien::Value2) } } -#[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] -pub type DX2TIEN_R = crate::BitReader; #[doc = "DX2T Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2TIEN_A { +pub enum Dx2tien { #[doc = "0: A protocol interrupt is not generated if DX2T is activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A protocol interrupt is generated if DX2T is activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2TIEN_A) -> Self { + fn from(variant: Dx2tien) -> Self { variant as u8 != 0 } } -impl DX2TIEN_R { +#[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] +pub type Dx2tienR = crate::BitReader; +impl Dx2tienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2TIEN_A { + pub const fn variant(&self) -> Dx2tien { match self.bits { - false => DX2TIEN_A::VALUE1, - true => DX2TIEN_A::VALUE2, + false => Dx2tien::Value1, + true => Dx2tien::Value2, } } #[doc = "A protocol interrupt is not generated if DX2T is activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2TIEN_A::VALUE1 + *self == Dx2tien::Value1 } #[doc = "A protocol interrupt is generated if DX2T is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2TIEN_A::VALUE2 + *self == Dx2tien::Value2 } } #[doc = "Field `DX2TIEN` writer - DX2T Interrupt Enable"] -pub type DX2TIEN_W<'a, REG> = crate::BitWriter<'a, REG, DX2TIEN_A>; -impl<'a, REG> DX2TIEN_W<'a, REG> +pub type Dx2tienW<'a, REG> = crate::BitWriter<'a, REG, Dx2tien>; +impl<'a, REG> Dx2tienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if DX2T is activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2TIEN_A::VALUE1) + self.variant(Dx2tien::Value1) } #[doc = "A protocol interrupt is generated if DX2T is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2TIEN_A::VALUE2) + self.variant(Dx2tien::Value2) } } -#[doc = "Field `SELO` reader - Select Output"] -pub type SELO_R = crate::FieldReader; #[doc = "Select Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SELO_A { +pub enum Selo { #[doc = "0: The corresponding SELOx line cannot be activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SELO_A) -> Self { + fn from(variant: Selo) -> Self { variant as _ } } -impl crate::FieldSpec for SELO_A { +impl crate::FieldSpec for Selo { type Ux = u8; } -impl SELO_R { +#[doc = "Field `SELO` reader - Select Output"] +pub type SeloR = crate::FieldReader; +impl SeloR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SELO_A::VALUE1), - 1 => Some(SELO_A::VALUE2), + 0 => Some(Selo::Value1), + 1 => Some(Selo::Value2), _ => None, } } #[doc = "The corresponding SELOx line cannot be activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELO_A::VALUE1 + *self == Selo::Value1 } #[doc = "The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELO_A::VALUE2 + *self == Selo::Value2 } } #[doc = "Field `SELO` writer - Select Output"] -pub type SELO_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SELO_A>; -impl<'a, REG> SELO_W<'a, REG> +pub type SeloW<'a, REG> = crate::FieldWriter<'a, REG, 8, Selo>; +impl<'a, REG> SeloW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -517,354 +517,345 @@ where #[doc = "The corresponding SELOx line cannot be activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELO_A::VALUE1) + self.variant(Selo::Value1) } #[doc = "The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELO_A::VALUE2) + self.variant(Selo::Value2) } } -#[doc = "Field `TIWEN` reader - Enable Inter-Word Delay Tiw"] -pub type TIWEN_R = crate::BitReader; #[doc = "Enable Inter-Word Delay Tiw\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TIWEN_A { +pub enum Tiwen { #[doc = "0: No delay between data words of the same frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The inter-word delay Tiw is enabled and introduced between data words of the same frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TIWEN_A) -> Self { + fn from(variant: Tiwen) -> Self { variant as u8 != 0 } } -impl TIWEN_R { +#[doc = "Field `TIWEN` reader - Enable Inter-Word Delay Tiw"] +pub type TiwenR = crate::BitReader; +impl TiwenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TIWEN_A { + pub const fn variant(&self) -> Tiwen { match self.bits { - false => TIWEN_A::VALUE1, - true => TIWEN_A::VALUE2, + false => Tiwen::Value1, + true => Tiwen::Value2, } } #[doc = "No delay between data words of the same frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TIWEN_A::VALUE1 + *self == Tiwen::Value1 } #[doc = "The inter-word delay Tiw is enabled and introduced between data words of the same frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TIWEN_A::VALUE2 + *self == Tiwen::Value2 } } #[doc = "Field `TIWEN` writer - Enable Inter-Word Delay Tiw"] -pub type TIWEN_W<'a, REG> = crate::BitWriter<'a, REG, TIWEN_A>; -impl<'a, REG> TIWEN_W<'a, REG> +pub type TiwenW<'a, REG> = crate::BitWriter<'a, REG, Tiwen>; +impl<'a, REG> TiwenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No delay between data words of the same frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TIWEN_A::VALUE1) + self.variant(Tiwen::Value1) } #[doc = "The inter-word delay Tiw is enabled and introduced between data words of the same frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TIWEN_A::VALUE2) + self.variant(Tiwen::Value2) } } -#[doc = "Field `SLPHSEL` reader - Slave Mode Clock Phase Select"] -pub type SLPHSEL_R = crate::BitReader; #[doc = "Slave Mode Clock Phase Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLPHSEL_A { +pub enum Slphsel { #[doc = "0: Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLPHSEL_A) -> Self { + fn from(variant: Slphsel) -> Self { variant as u8 != 0 } } -impl SLPHSEL_R { +#[doc = "Field `SLPHSEL` reader - Slave Mode Clock Phase Select"] +pub type SlphselR = crate::BitReader; +impl SlphselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLPHSEL_A { + pub const fn variant(&self) -> Slphsel { match self.bits { - false => SLPHSEL_A::VALUE1, - true => SLPHSEL_A::VALUE2, + false => Slphsel::Value1, + true => Slphsel::Value2, } } #[doc = "Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLPHSEL_A::VALUE1 + *self == Slphsel::Value1 } #[doc = "The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLPHSEL_A::VALUE2 + *self == Slphsel::Value2 } } #[doc = "Field `SLPHSEL` writer - Slave Mode Clock Phase Select"] -pub type SLPHSEL_W<'a, REG> = crate::BitWriter<'a, REG, SLPHSEL_A>; -impl<'a, REG> SLPHSEL_W<'a, REG> +pub type SlphselW<'a, REG> = crate::BitWriter<'a, REG, Slphsel>; +impl<'a, REG> SlphselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SLPHSEL_A::VALUE1) + self.variant(Slphsel::Value1) } #[doc = "The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SLPHSEL_A::VALUE2) + self.variant(Slphsel::Value2) } } -#[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MCLK_R = crate::BitReader; #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MCLK_A { +pub enum Mclk { #[doc = "0: The MCLK generation is disabled and output MCLK = 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MCLK generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MCLK_A) -> Self { + fn from(variant: Mclk) -> Self { variant as u8 != 0 } } -impl MCLK_R { +#[doc = "Field `MCLK` reader - Master Clock Enable"] +pub type MclkR = crate::BitReader; +impl MclkR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MCLK_A { + pub const fn variant(&self) -> Mclk { match self.bits { - false => MCLK_A::VALUE1, - true => MCLK_A::VALUE2, + false => Mclk::Value1, + true => Mclk::Value2, } } #[doc = "The MCLK generation is disabled and output MCLK = 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MCLK_A::VALUE1 + *self == Mclk::Value1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MCLK_A::VALUE2 + *self == Mclk::Value2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; -impl<'a, REG> MCLK_W<'a, REG> +pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; +impl<'a, REG> MclkW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and output MCLK = 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE1) + self.variant(Mclk::Value1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MCLK_A::VALUE2) + self.variant(Mclk::Value2) } } impl R { #[doc = "Bit 0 - MSLS Enable"] #[inline(always)] - pub fn mslsen(&self) -> MSLSEN_R { - MSLSEN_R::new((self.bits & 1) != 0) + pub fn mslsen(&self) -> MslsenR { + MslsenR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Control"] #[inline(always)] - pub fn selctr(&self) -> SELCTR_R { - SELCTR_R::new(((self.bits >> 1) & 1) != 0) + pub fn selctr(&self) -> SelctrR { + SelctrR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - pub fn selinv(&self) -> SELINV_R { - SELINV_R::new(((self.bits >> 2) & 1) != 0) + pub fn selinv(&self) -> SelinvR { + SelinvR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Frame End Mode"] #[inline(always)] - pub fn fem(&self) -> FEM_R { - FEM_R::new(((self.bits >> 3) & 1) != 0) + pub fn fem(&self) -> FemR { + FemR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Input Frequency Selection"] #[inline(always)] - pub fn ctqsel1(&self) -> CTQSEL1_R { - CTQSEL1_R::new(((self.bits >> 4) & 3) as u8) + pub fn ctqsel1(&self) -> Ctqsel1R { + Ctqsel1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"] #[inline(always)] - pub fn pctq1(&self) -> PCTQ1_R { - PCTQ1_R::new(((self.bits >> 6) & 3) as u8) + pub fn pctq1(&self) -> Pctq1R { + Pctq1R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"] #[inline(always)] - pub fn dctq1(&self) -> DCTQ1_R { - DCTQ1_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn dctq1(&self) -> Dctq1R { + Dctq1R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bit 13 - Parity Error Interrupt Enable"] #[inline(always)] - pub fn parien(&self) -> PARIEN_R { - PARIEN_R::new(((self.bits >> 13) & 1) != 0) + pub fn parien(&self) -> ParienR { + ParienR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MSLS Interrupt Enable"] #[inline(always)] - pub fn mslsien(&self) -> MSLSIEN_R { - MSLSIEN_R::new(((self.bits >> 14) & 1) != 0) + pub fn mslsien(&self) -> MslsienR { + MslsienR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - pub fn dx2tien(&self) -> DX2TIEN_R { - DX2TIEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn dx2tien(&self) -> Dx2tienR { + Dx2tienR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:23 - Select Output"] #[inline(always)] - pub fn selo(&self) -> SELO_R { - SELO_R::new(((self.bits >> 16) & 0xff) as u8) + pub fn selo(&self) -> SeloR { + SeloR::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"] #[inline(always)] - pub fn tiwen(&self) -> TIWEN_R { - TIWEN_R::new(((self.bits >> 24) & 1) != 0) + pub fn tiwen(&self) -> TiwenR { + TiwenR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Slave Mode Clock Phase Select"] #[inline(always)] - pub fn slphsel(&self) -> SLPHSEL_R { - SLPHSEL_R::new(((self.bits >> 25) & 1) != 0) + pub fn slphsel(&self) -> SlphselR { + SlphselR::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MCLK_R { - MCLK_R::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MclkR { + MclkR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - MSLS Enable"] #[inline(always)] #[must_use] - pub fn mslsen(&mut self) -> MSLSEN_W { - MSLSEN_W::new(self, 0) + pub fn mslsen(&mut self) -> MslsenW { + MslsenW::new(self, 0) } #[doc = "Bit 1 - Select Control"] #[inline(always)] #[must_use] - pub fn selctr(&mut self) -> SELCTR_W { - SELCTR_W::new(self, 1) + pub fn selctr(&mut self) -> SelctrW { + SelctrW::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] #[must_use] - pub fn selinv(&mut self) -> SELINV_W { - SELINV_W::new(self, 2) + pub fn selinv(&mut self) -> SelinvW { + SelinvW::new(self, 2) } #[doc = "Bit 3 - Frame End Mode"] #[inline(always)] #[must_use] - pub fn fem(&mut self) -> FEM_W { - FEM_W::new(self, 3) + pub fn fem(&mut self) -> FemW { + FemW::new(self, 3) } #[doc = "Bits 4:5 - Input Frequency Selection"] #[inline(always)] #[must_use] - pub fn ctqsel1(&mut self) -> CTQSEL1_W { - CTQSEL1_W::new(self, 4) + pub fn ctqsel1(&mut self) -> Ctqsel1W { + Ctqsel1W::new(self, 4) } #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"] #[inline(always)] #[must_use] - pub fn pctq1(&mut self) -> PCTQ1_W { - PCTQ1_W::new(self, 6) + pub fn pctq1(&mut self) -> Pctq1W { + Pctq1W::new(self, 6) } #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"] #[inline(always)] #[must_use] - pub fn dctq1(&mut self) -> DCTQ1_W { - DCTQ1_W::new(self, 8) + pub fn dctq1(&mut self) -> Dctq1W { + Dctq1W::new(self, 8) } #[doc = "Bit 13 - Parity Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn parien(&mut self) -> PARIEN_W { - PARIEN_W::new(self, 13) + pub fn parien(&mut self) -> ParienW { + ParienW::new(self, 13) } #[doc = "Bit 14 - MSLS Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mslsien(&mut self) -> MSLSIEN_W { - MSLSIEN_W::new(self, 14) + pub fn mslsien(&mut self) -> MslsienW { + MslsienW::new(self, 14) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dx2tien(&mut self) -> DX2TIEN_W { - DX2TIEN_W::new(self, 15) + pub fn dx2tien(&mut self) -> Dx2tienW { + Dx2tienW::new(self, 15) } #[doc = "Bits 16:23 - Select Output"] #[inline(always)] #[must_use] - pub fn selo(&mut self) -> SELO_W { - SELO_W::new(self, 16) + pub fn selo(&mut self) -> SeloW { + SeloW::new(self, 16) } #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"] #[inline(always)] #[must_use] - pub fn tiwen(&mut self) -> TIWEN_W { - TIWEN_W::new(self, 24) + pub fn tiwen(&mut self) -> TiwenW { + TiwenW::new(self, 24) } #[doc = "Bit 25 - Slave Mode Clock Phase Select"] #[inline(always)] #[must_use] - pub fn slphsel(&mut self) -> SLPHSEL_W { - SLPHSEL_W::new(self, 25) + pub fn slphsel(&mut self) -> SlphselW { + SlphselW::new(self, 25) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MCLK_W { - MCLK_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mclk(&mut self) -> MclkW { + MclkW::new(self, 31) } } #[doc = "Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PCR_SSCMODE_SPEC; -impl crate::RegisterSpec for PCR_SSCMODE_SPEC { +pub struct PcrSscmodeSpec; +impl crate::RegisterSpec for PcrSscmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`pcr_sscmode::R`](R) reader structure"] -impl crate::Readable for PCR_SSCMODE_SPEC {} +impl crate::Readable for PcrSscmodeSpec {} #[doc = "`write(|w| ..)` method takes [`pcr_sscmode::W`](W) writer structure"] -impl crate::Writable for PCR_SSCMODE_SPEC { +impl crate::Writable for PcrSscmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_SSCMode to value 0"] -impl crate::Resettable for PCR_SSCMODE_SPEC { +impl crate::Resettable for PcrSscmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pscr.rs b/src/usic0_ch0/pscr.rs index 85248dfa..97a43679 100644 --- a/src/usic0_ch0/pscr.rs +++ b/src/usic0_ch0/pscr.rs @@ -1,657 +1,648 @@ #[doc = "Register `PSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Status Flag 0 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST0_AW { +pub enum Cst0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST0_AW) -> Self { + fn from(variant: Cst0) -> Self { variant as u8 != 0 } } #[doc = "Field `CST0` writer - Clear Status Flag 0 in PSR"] -pub type CST0_W<'a, REG> = crate::BitWriter<'a, REG, CST0_AW>; -impl<'a, REG> CST0_W<'a, REG> +pub type Cst0W<'a, REG> = crate::BitWriter<'a, REG, Cst0>; +impl<'a, REG> Cst0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST0_AW::VALUE1) + self.variant(Cst0::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST0_AW::VALUE2) + self.variant(Cst0::Value2) } } #[doc = "Clear Status Flag 1 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST1_AW { +pub enum Cst1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST1_AW) -> Self { + fn from(variant: Cst1) -> Self { variant as u8 != 0 } } #[doc = "Field `CST1` writer - Clear Status Flag 1 in PSR"] -pub type CST1_W<'a, REG> = crate::BitWriter<'a, REG, CST1_AW>; -impl<'a, REG> CST1_W<'a, REG> +pub type Cst1W<'a, REG> = crate::BitWriter<'a, REG, Cst1>; +impl<'a, REG> Cst1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST1_AW::VALUE1) + self.variant(Cst1::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST1_AW::VALUE2) + self.variant(Cst1::Value2) } } #[doc = "Clear Status Flag 2 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST2_AW { +pub enum Cst2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST2_AW) -> Self { + fn from(variant: Cst2) -> Self { variant as u8 != 0 } } #[doc = "Field `CST2` writer - Clear Status Flag 2 in PSR"] -pub type CST2_W<'a, REG> = crate::BitWriter<'a, REG, CST2_AW>; -impl<'a, REG> CST2_W<'a, REG> +pub type Cst2W<'a, REG> = crate::BitWriter<'a, REG, Cst2>; +impl<'a, REG> Cst2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST2_AW::VALUE1) + self.variant(Cst2::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST2_AW::VALUE2) + self.variant(Cst2::Value2) } } #[doc = "Clear Status Flag 3 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST3_AW { +pub enum Cst3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST3_AW) -> Self { + fn from(variant: Cst3) -> Self { variant as u8 != 0 } } #[doc = "Field `CST3` writer - Clear Status Flag 3 in PSR"] -pub type CST3_W<'a, REG> = crate::BitWriter<'a, REG, CST3_AW>; -impl<'a, REG> CST3_W<'a, REG> +pub type Cst3W<'a, REG> = crate::BitWriter<'a, REG, Cst3>; +impl<'a, REG> Cst3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST3_AW::VALUE1) + self.variant(Cst3::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST3_AW::VALUE2) + self.variant(Cst3::Value2) } } #[doc = "Clear Status Flag 4 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST4_AW { +pub enum Cst4 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST4_AW) -> Self { + fn from(variant: Cst4) -> Self { variant as u8 != 0 } } #[doc = "Field `CST4` writer - Clear Status Flag 4 in PSR"] -pub type CST4_W<'a, REG> = crate::BitWriter<'a, REG, CST4_AW>; -impl<'a, REG> CST4_W<'a, REG> +pub type Cst4W<'a, REG> = crate::BitWriter<'a, REG, Cst4>; +impl<'a, REG> Cst4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST4_AW::VALUE1) + self.variant(Cst4::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST4_AW::VALUE2) + self.variant(Cst4::Value2) } } #[doc = "Clear Status Flag 5 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST5_AW { +pub enum Cst5 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST5_AW) -> Self { + fn from(variant: Cst5) -> Self { variant as u8 != 0 } } #[doc = "Field `CST5` writer - Clear Status Flag 5 in PSR"] -pub type CST5_W<'a, REG> = crate::BitWriter<'a, REG, CST5_AW>; -impl<'a, REG> CST5_W<'a, REG> +pub type Cst5W<'a, REG> = crate::BitWriter<'a, REG, Cst5>; +impl<'a, REG> Cst5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST5_AW::VALUE1) + self.variant(Cst5::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST5_AW::VALUE2) + self.variant(Cst5::Value2) } } #[doc = "Clear Status Flag 6 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST6_AW { +pub enum Cst6 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST6_AW) -> Self { + fn from(variant: Cst6) -> Self { variant as u8 != 0 } } #[doc = "Field `CST6` writer - Clear Status Flag 6 in PSR"] -pub type CST6_W<'a, REG> = crate::BitWriter<'a, REG, CST6_AW>; -impl<'a, REG> CST6_W<'a, REG> +pub type Cst6W<'a, REG> = crate::BitWriter<'a, REG, Cst6>; +impl<'a, REG> Cst6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST6_AW::VALUE1) + self.variant(Cst6::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST6_AW::VALUE2) + self.variant(Cst6::Value2) } } #[doc = "Clear Status Flag 7 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST7_AW { +pub enum Cst7 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST7_AW) -> Self { + fn from(variant: Cst7) -> Self { variant as u8 != 0 } } #[doc = "Field `CST7` writer - Clear Status Flag 7 in PSR"] -pub type CST7_W<'a, REG> = crate::BitWriter<'a, REG, CST7_AW>; -impl<'a, REG> CST7_W<'a, REG> +pub type Cst7W<'a, REG> = crate::BitWriter<'a, REG, Cst7>; +impl<'a, REG> Cst7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST7_AW::VALUE1) + self.variant(Cst7::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST7_AW::VALUE2) + self.variant(Cst7::Value2) } } #[doc = "Clear Status Flag 8 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST8_AW { +pub enum Cst8 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST8_AW) -> Self { + fn from(variant: Cst8) -> Self { variant as u8 != 0 } } #[doc = "Field `CST8` writer - Clear Status Flag 8 in PSR"] -pub type CST8_W<'a, REG> = crate::BitWriter<'a, REG, CST8_AW>; -impl<'a, REG> CST8_W<'a, REG> +pub type Cst8W<'a, REG> = crate::BitWriter<'a, REG, Cst8>; +impl<'a, REG> Cst8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST8_AW::VALUE1) + self.variant(Cst8::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST8_AW::VALUE2) + self.variant(Cst8::Value2) } } #[doc = "Clear Status Flag 9 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CST9_AW { +pub enum Cst9 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CST9_AW) -> Self { + fn from(variant: Cst9) -> Self { variant as u8 != 0 } } #[doc = "Field `CST9` writer - Clear Status Flag 9 in PSR"] -pub type CST9_W<'a, REG> = crate::BitWriter<'a, REG, CST9_AW>; -impl<'a, REG> CST9_W<'a, REG> +pub type Cst9W<'a, REG> = crate::BitWriter<'a, REG, Cst9>; +impl<'a, REG> Cst9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CST9_AW::VALUE1) + self.variant(Cst9::Value1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CST9_AW::VALUE2) + self.variant(Cst9::Value2) } } #[doc = "Clear Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CRSIF_AW { +pub enum Crsif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.RSIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CRSIF_AW) -> Self { + fn from(variant: Crsif) -> Self { variant as u8 != 0 } } #[doc = "Field `CRSIF` writer - Clear Receiver Start Indication Flag"] -pub type CRSIF_W<'a, REG> = crate::BitWriter<'a, REG, CRSIF_AW>; -impl<'a, REG> CRSIF_W<'a, REG> +pub type CrsifW<'a, REG> = crate::BitWriter<'a, REG, Crsif>; +impl<'a, REG> CrsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRSIF_AW::VALUE1) + self.variant(Crsif::Value1) } #[doc = "Flag PSR.RSIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRSIF_AW::VALUE2) + self.variant(Crsif::Value2) } } #[doc = "Clear Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDLIF_AW { +pub enum Cdlif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.DLIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDLIF_AW) -> Self { + fn from(variant: Cdlif) -> Self { variant as u8 != 0 } } #[doc = "Field `CDLIF` writer - Clear Data Lost Indication Flag"] -pub type CDLIF_W<'a, REG> = crate::BitWriter<'a, REG, CDLIF_AW>; -impl<'a, REG> CDLIF_W<'a, REG> +pub type CdlifW<'a, REG> = crate::BitWriter<'a, REG, Cdlif>; +impl<'a, REG> CdlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDLIF_AW::VALUE1) + self.variant(Cdlif::Value1) } #[doc = "Flag PSR.DLIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDLIF_AW::VALUE2) + self.variant(Cdlif::Value2) } } #[doc = "Clear Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTSIF_AW { +pub enum Ctsif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.TSIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTSIF_AW) -> Self { + fn from(variant: Ctsif) -> Self { variant as u8 != 0 } } #[doc = "Field `CTSIF` writer - Clear Transmit Shift Indication Flag"] -pub type CTSIF_W<'a, REG> = crate::BitWriter<'a, REG, CTSIF_AW>; -impl<'a, REG> CTSIF_W<'a, REG> +pub type CtsifW<'a, REG> = crate::BitWriter<'a, REG, Ctsif>; +impl<'a, REG> CtsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTSIF_AW::VALUE1) + self.variant(Ctsif::Value1) } #[doc = "Flag PSR.TSIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTSIF_AW::VALUE2) + self.variant(Ctsif::Value2) } } #[doc = "Clear Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTBIF_AW { +pub enum Ctbif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.TBIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTBIF_AW) -> Self { + fn from(variant: Ctbif) -> Self { variant as u8 != 0 } } #[doc = "Field `CTBIF` writer - Clear Transmit Buffer Indication Flag"] -pub type CTBIF_W<'a, REG> = crate::BitWriter<'a, REG, CTBIF_AW>; -impl<'a, REG> CTBIF_W<'a, REG> +pub type CtbifW<'a, REG> = crate::BitWriter<'a, REG, Ctbif>; +impl<'a, REG> CtbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTBIF_AW::VALUE1) + self.variant(Ctbif::Value1) } #[doc = "Flag PSR.TBIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTBIF_AW::VALUE2) + self.variant(Ctbif::Value2) } } #[doc = "Clear Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CRIF_AW { +pub enum Crif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.RIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CRIF_AW) -> Self { + fn from(variant: Crif) -> Self { variant as u8 != 0 } } #[doc = "Field `CRIF` writer - Clear Receive Indication Flag"] -pub type CRIF_W<'a, REG> = crate::BitWriter<'a, REG, CRIF_AW>; -impl<'a, REG> CRIF_W<'a, REG> +pub type CrifW<'a, REG> = crate::BitWriter<'a, REG, Crif>; +impl<'a, REG> CrifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRIF_AW::VALUE1) + self.variant(Crif::Value1) } #[doc = "Flag PSR.RIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRIF_AW::VALUE2) + self.variant(Crif::Value2) } } #[doc = "Clear Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CAIF_AW { +pub enum Caif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.AIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CAIF_AW) -> Self { + fn from(variant: Caif) -> Self { variant as u8 != 0 } } #[doc = "Field `CAIF` writer - Clear Alternative Receive Indication Flag"] -pub type CAIF_W<'a, REG> = crate::BitWriter<'a, REG, CAIF_AW>; -impl<'a, REG> CAIF_W<'a, REG> +pub type CaifW<'a, REG> = crate::BitWriter<'a, REG, Caif>; +impl<'a, REG> CaifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CAIF_AW::VALUE1) + self.variant(Caif::Value1) } #[doc = "Flag PSR.AIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CAIF_AW::VALUE2) + self.variant(Caif::Value2) } } #[doc = "Clear Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CBRGIF_AW { +pub enum Cbrgif { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Flag PSR.BRGIF is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CBRGIF_AW) -> Self { + fn from(variant: Cbrgif) -> Self { variant as u8 != 0 } } #[doc = "Field `CBRGIF` writer - Clear Baud Rate Generator Indication Flag"] -pub type CBRGIF_W<'a, REG> = crate::BitWriter<'a, REG, CBRGIF_AW>; -impl<'a, REG> CBRGIF_W<'a, REG> +pub type CbrgifW<'a, REG> = crate::BitWriter<'a, REG, Cbrgif>; +impl<'a, REG> CbrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CBRGIF_AW::VALUE1) + self.variant(Cbrgif::Value1) } #[doc = "Flag PSR.BRGIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CBRGIF_AW::VALUE2) + self.variant(Cbrgif::Value2) } } impl W { #[doc = "Bit 0 - Clear Status Flag 0 in PSR"] #[inline(always)] #[must_use] - pub fn cst0(&mut self) -> CST0_W { - CST0_W::new(self, 0) + pub fn cst0(&mut self) -> Cst0W { + Cst0W::new(self, 0) } #[doc = "Bit 1 - Clear Status Flag 1 in PSR"] #[inline(always)] #[must_use] - pub fn cst1(&mut self) -> CST1_W { - CST1_W::new(self, 1) + pub fn cst1(&mut self) -> Cst1W { + Cst1W::new(self, 1) } #[doc = "Bit 2 - Clear Status Flag 2 in PSR"] #[inline(always)] #[must_use] - pub fn cst2(&mut self) -> CST2_W { - CST2_W::new(self, 2) + pub fn cst2(&mut self) -> Cst2W { + Cst2W::new(self, 2) } #[doc = "Bit 3 - Clear Status Flag 3 in PSR"] #[inline(always)] #[must_use] - pub fn cst3(&mut self) -> CST3_W { - CST3_W::new(self, 3) + pub fn cst3(&mut self) -> Cst3W { + Cst3W::new(self, 3) } #[doc = "Bit 4 - Clear Status Flag 4 in PSR"] #[inline(always)] #[must_use] - pub fn cst4(&mut self) -> CST4_W { - CST4_W::new(self, 4) + pub fn cst4(&mut self) -> Cst4W { + Cst4W::new(self, 4) } #[doc = "Bit 5 - Clear Status Flag 5 in PSR"] #[inline(always)] #[must_use] - pub fn cst5(&mut self) -> CST5_W { - CST5_W::new(self, 5) + pub fn cst5(&mut self) -> Cst5W { + Cst5W::new(self, 5) } #[doc = "Bit 6 - Clear Status Flag 6 in PSR"] #[inline(always)] #[must_use] - pub fn cst6(&mut self) -> CST6_W { - CST6_W::new(self, 6) + pub fn cst6(&mut self) -> Cst6W { + Cst6W::new(self, 6) } #[doc = "Bit 7 - Clear Status Flag 7 in PSR"] #[inline(always)] #[must_use] - pub fn cst7(&mut self) -> CST7_W { - CST7_W::new(self, 7) + pub fn cst7(&mut self) -> Cst7W { + Cst7W::new(self, 7) } #[doc = "Bit 8 - Clear Status Flag 8 in PSR"] #[inline(always)] #[must_use] - pub fn cst8(&mut self) -> CST8_W { - CST8_W::new(self, 8) + pub fn cst8(&mut self) -> Cst8W { + Cst8W::new(self, 8) } #[doc = "Bit 9 - Clear Status Flag 9 in PSR"] #[inline(always)] #[must_use] - pub fn cst9(&mut self) -> CST9_W { - CST9_W::new(self, 9) + pub fn cst9(&mut self) -> Cst9W { + Cst9W::new(self, 9) } #[doc = "Bit 10 - Clear Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn crsif(&mut self) -> CRSIF_W { - CRSIF_W::new(self, 10) + pub fn crsif(&mut self) -> CrsifW { + CrsifW::new(self, 10) } #[doc = "Bit 11 - Clear Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn cdlif(&mut self) -> CDLIF_W { - CDLIF_W::new(self, 11) + pub fn cdlif(&mut self) -> CdlifW { + CdlifW::new(self, 11) } #[doc = "Bit 12 - Clear Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn ctsif(&mut self) -> CTSIF_W { - CTSIF_W::new(self, 12) + pub fn ctsif(&mut self) -> CtsifW { + CtsifW::new(self, 12) } #[doc = "Bit 13 - Clear Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn ctbif(&mut self) -> CTBIF_W { - CTBIF_W::new(self, 13) + pub fn ctbif(&mut self) -> CtbifW { + CtbifW::new(self, 13) } #[doc = "Bit 14 - Clear Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn crif(&mut self) -> CRIF_W { - CRIF_W::new(self, 14) + pub fn crif(&mut self) -> CrifW { + CrifW::new(self, 14) } #[doc = "Bit 15 - Clear Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn caif(&mut self) -> CAIF_W { - CAIF_W::new(self, 15) + pub fn caif(&mut self) -> CaifW { + CaifW::new(self, 15) } #[doc = "Bit 16 - Clear Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn cbrgif(&mut self) -> CBRGIF_W { - CBRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cbrgif(&mut self) -> CbrgifW { + CbrgifW::new(self, 16) } } #[doc = "Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSCR_SPEC; -impl crate::RegisterSpec for PSCR_SPEC { +pub struct PscrSpec; +impl crate::RegisterSpec for PscrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pscr::W`](W) writer structure"] -impl crate::Writable for PSCR_SPEC { +impl crate::Writable for PscrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSCR to value 0"] -impl crate::Resettable for PSCR_SPEC { +impl crate::Resettable for PscrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr.rs b/src/usic0_ch0/psr.rs index 5f89222c..4ef01c43 100644 --- a/src/usic0_ch0/psr.rs +++ b/src/usic0_ch0/psr.rs @@ -1,632 +1,623 @@ #[doc = "Register `PSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ST0` reader - Protocol Status Flag 0"] -pub type ST0_R = crate::BitReader; +pub type St0R = crate::BitReader; #[doc = "Field `ST0` writer - Protocol Status Flag 0"] -pub type ST0_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St0W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST1` reader - Protocol Status Flag 1"] -pub type ST1_R = crate::BitReader; +pub type St1R = crate::BitReader; #[doc = "Field `ST1` writer - Protocol Status Flag 1"] -pub type ST1_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St1W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST2` reader - Protocol Status Flag 2"] -pub type ST2_R = crate::BitReader; +pub type St2R = crate::BitReader; #[doc = "Field `ST2` writer - Protocol Status Flag 2"] -pub type ST2_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St2W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST3` reader - Protocol Status Flag 3"] -pub type ST3_R = crate::BitReader; +pub type St3R = crate::BitReader; #[doc = "Field `ST3` writer - Protocol Status Flag 3"] -pub type ST3_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St3W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST4` reader - Protocol Status Flag 4"] -pub type ST4_R = crate::BitReader; +pub type St4R = crate::BitReader; #[doc = "Field `ST4` writer - Protocol Status Flag 4"] -pub type ST4_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St4W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST5` reader - Protocol Status Flag 5"] -pub type ST5_R = crate::BitReader; +pub type St5R = crate::BitReader; #[doc = "Field `ST5` writer - Protocol Status Flag 5"] -pub type ST5_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St5W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST6` reader - Protocol Status Flag 6"] -pub type ST6_R = crate::BitReader; +pub type St6R = crate::BitReader; #[doc = "Field `ST6` writer - Protocol Status Flag 6"] -pub type ST6_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St6W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST7` reader - Protocol Status Flag 7"] -pub type ST7_R = crate::BitReader; +pub type St7R = crate::BitReader; #[doc = "Field `ST7` writer - Protocol Status Flag 7"] -pub type ST7_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St7W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST8` reader - Protocol Status Flag 8"] -pub type ST8_R = crate::BitReader; +pub type St8R = crate::BitReader; #[doc = "Field `ST8` writer - Protocol Status Flag 8"] -pub type ST8_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type St8W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST9` reader - Protocol Status Flag 9"] -pub type ST9_R = crate::BitReader; +pub type St9R = crate::BitReader; #[doc = "Field `ST9` writer - Protocol Status Flag 9"] -pub type ST9_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RSIF_R = crate::BitReader; +pub type St9W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIF_A { +pub enum Rsif { #[doc = "0: A receiver start event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receiver start event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIF_A) -> Self { + fn from(variant: Rsif) -> Self { variant as u8 != 0 } } -impl RSIF_R { +#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] +pub type RsifR = crate::BitReader; +impl RsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIF_A { + pub const fn variant(&self) -> Rsif { match self.bits { - false => RSIF_A::VALUE1, - true => RSIF_A::VALUE2, + false => Rsif::Value1, + true => Rsif::Value2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIF_A::VALUE1 + *self == Rsif::Value1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIF_A::VALUE2 + *self == Rsif::Value2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; -impl<'a, REG> RSIF_W<'a, REG> +pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; +impl<'a, REG> RsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE1) + self.variant(Rsif::Value1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE2) + self.variant(Rsif::Value2) } } -#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DLIF_R = crate::BitReader; #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIF_A { +pub enum Dlif { #[doc = "0: A data lost event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data lost event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIF_A) -> Self { + fn from(variant: Dlif) -> Self { variant as u8 != 0 } } -impl DLIF_R { +#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] +pub type DlifR = crate::BitReader; +impl DlifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIF_A { + pub const fn variant(&self) -> Dlif { match self.bits { - false => DLIF_A::VALUE1, - true => DLIF_A::VALUE2, + false => Dlif::Value1, + true => Dlif::Value2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIF_A::VALUE1 + *self == Dlif::Value1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIF_A::VALUE2 + *self == Dlif::Value2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; -impl<'a, REG> DLIF_W<'a, REG> +pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; +impl<'a, REG> DlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE1) + self.variant(Dlif::Value1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE2) + self.variant(Dlif::Value2) } } -#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TSIF_R = crate::BitReader; #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIF_A { +pub enum Tsif { #[doc = "0: A transmit shift event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit shift event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIF_A) -> Self { + fn from(variant: Tsif) -> Self { variant as u8 != 0 } } -impl TSIF_R { +#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] +pub type TsifR = crate::BitReader; +impl TsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIF_A { + pub const fn variant(&self) -> Tsif { match self.bits { - false => TSIF_A::VALUE1, - true => TSIF_A::VALUE2, + false => Tsif::Value1, + true => Tsif::Value2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIF_A::VALUE1 + *self == Tsif::Value1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIF_A::VALUE2 + *self == Tsif::Value2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; -impl<'a, REG> TSIF_W<'a, REG> +pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; +impl<'a, REG> TsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE1) + self.variant(Tsif::Value1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE2) + self.variant(Tsif::Value2) } } -#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TBIF_R = crate::BitReader; #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIF_A { +pub enum Tbif { #[doc = "0: A transmit buffer event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIF_A) -> Self { + fn from(variant: Tbif) -> Self { variant as u8 != 0 } } -impl TBIF_R { +#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] +pub type TbifR = crate::BitReader; +impl TbifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIF_A { + pub const fn variant(&self) -> Tbif { match self.bits { - false => TBIF_A::VALUE1, - true => TBIF_A::VALUE2, + false => Tbif::Value1, + true => Tbif::Value2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIF_A::VALUE1 + *self == Tbif::Value1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIF_A::VALUE2 + *self == Tbif::Value2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; -impl<'a, REG> TBIF_W<'a, REG> +pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; +impl<'a, REG> TbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE1) + self.variant(Tbif::Value1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE2) + self.variant(Tbif::Value2) } } -#[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RIF_R = crate::BitReader; #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIF_A { +pub enum Rif { #[doc = "0: A receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIF_A) -> Self { + fn from(variant: Rif) -> Self { variant as u8 != 0 } } -impl RIF_R { +#[doc = "Field `RIF` reader - Receive Indication Flag"] +pub type RifR = crate::BitReader; +impl RifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIF_A { + pub const fn variant(&self) -> Rif { match self.bits { - false => RIF_A::VALUE1, - true => RIF_A::VALUE2, + false => Rif::Value1, + true => Rif::Value2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIF_A::VALUE1 + *self == Rif::Value1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIF_A::VALUE2 + *self == Rif::Value2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; -impl<'a, REG> RIF_W<'a, REG> +pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; +impl<'a, REG> RifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE1) + self.variant(Rif::Value1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE2) + self.variant(Rif::Value2) } } -#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AIF_R = crate::BitReader; #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIF_A { +pub enum Aif { #[doc = "0: An alternative receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIF_A) -> Self { + fn from(variant: Aif) -> Self { variant as u8 != 0 } } -impl AIF_R { +#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] +pub type AifR = crate::BitReader; +impl AifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIF_A { + pub const fn variant(&self) -> Aif { match self.bits { - false => AIF_A::VALUE1, - true => AIF_A::VALUE2, + false => Aif::Value1, + true => Aif::Value2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIF_A::VALUE1 + *self == Aif::Value1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIF_A::VALUE2 + *self == Aif::Value2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; -impl<'a, REG> AIF_W<'a, REG> +pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; +impl<'a, REG> AifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE1) + self.variant(Aif::Value1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE2) + self.variant(Aif::Value2) } } -#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BRGIF_R = crate::BitReader; #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIF_A { +pub enum Brgif { #[doc = "0: A baud rate generator event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A baud rate generator event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIF_A) -> Self { + fn from(variant: Brgif) -> Self { variant as u8 != 0 } } -impl BRGIF_R { +#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] +pub type BrgifR = crate::BitReader; +impl BrgifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIF_A { + pub const fn variant(&self) -> Brgif { match self.bits { - false => BRGIF_A::VALUE1, - true => BRGIF_A::VALUE2, + false => Brgif::Value1, + true => Brgif::Value2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIF_A::VALUE1 + *self == Brgif::Value1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIF_A::VALUE2 + *self == Brgif::Value2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; -impl<'a, REG> BRGIF_W<'a, REG> +pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; +impl<'a, REG> BrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE1) + self.variant(Brgif::Value1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE2) + self.variant(Brgif::Value2) } } impl R { #[doc = "Bit 0 - Protocol Status Flag 0"] #[inline(always)] - pub fn st0(&self) -> ST0_R { - ST0_R::new((self.bits & 1) != 0) + pub fn st0(&self) -> St0R { + St0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Protocol Status Flag 1"] #[inline(always)] - pub fn st1(&self) -> ST1_R { - ST1_R::new(((self.bits >> 1) & 1) != 0) + pub fn st1(&self) -> St1R { + St1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Protocol Status Flag 2"] #[inline(always)] - pub fn st2(&self) -> ST2_R { - ST2_R::new(((self.bits >> 2) & 1) != 0) + pub fn st2(&self) -> St2R { + St2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Protocol Status Flag 3"] #[inline(always)] - pub fn st3(&self) -> ST3_R { - ST3_R::new(((self.bits >> 3) & 1) != 0) + pub fn st3(&self) -> St3R { + St3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Protocol Status Flag 4"] #[inline(always)] - pub fn st4(&self) -> ST4_R { - ST4_R::new(((self.bits >> 4) & 1) != 0) + pub fn st4(&self) -> St4R { + St4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Protocol Status Flag 5"] #[inline(always)] - pub fn st5(&self) -> ST5_R { - ST5_R::new(((self.bits >> 5) & 1) != 0) + pub fn st5(&self) -> St5R { + St5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Protocol Status Flag 6"] #[inline(always)] - pub fn st6(&self) -> ST6_R { - ST6_R::new(((self.bits >> 6) & 1) != 0) + pub fn st6(&self) -> St6R { + St6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Protocol Status Flag 7"] #[inline(always)] - pub fn st7(&self) -> ST7_R { - ST7_R::new(((self.bits >> 7) & 1) != 0) + pub fn st7(&self) -> St7R { + St7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Protocol Status Flag 8"] #[inline(always)] - pub fn st8(&self) -> ST8_R { - ST8_R::new(((self.bits >> 8) & 1) != 0) + pub fn st8(&self) -> St8R { + St8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol Status Flag 9"] #[inline(always)] - pub fn st9(&self) -> ST9_R { - ST9_R::new(((self.bits >> 9) & 1) != 0) + pub fn st9(&self) -> St9R { + St9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RSIF_R { - RSIF_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RsifR { + RsifR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DLIF_R { - DLIF_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DlifR { + DlifR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TSIF_R { - TSIF_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TsifR { + TsifR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TBIF_R { - TBIF_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TbifR { + TbifR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RIF_R { - RIF_R::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RifR { + RifR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AIF_R { - AIF_R::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AifR { + AifR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BRGIF_R { - BRGIF_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BrgifR { + BrgifR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Protocol Status Flag 0"] #[inline(always)] #[must_use] - pub fn st0(&mut self) -> ST0_W { - ST0_W::new(self, 0) + pub fn st0(&mut self) -> St0W { + St0W::new(self, 0) } #[doc = "Bit 1 - Protocol Status Flag 1"] #[inline(always)] #[must_use] - pub fn st1(&mut self) -> ST1_W { - ST1_W::new(self, 1) + pub fn st1(&mut self) -> St1W { + St1W::new(self, 1) } #[doc = "Bit 2 - Protocol Status Flag 2"] #[inline(always)] #[must_use] - pub fn st2(&mut self) -> ST2_W { - ST2_W::new(self, 2) + pub fn st2(&mut self) -> St2W { + St2W::new(self, 2) } #[doc = "Bit 3 - Protocol Status Flag 3"] #[inline(always)] #[must_use] - pub fn st3(&mut self) -> ST3_W { - ST3_W::new(self, 3) + pub fn st3(&mut self) -> St3W { + St3W::new(self, 3) } #[doc = "Bit 4 - Protocol Status Flag 4"] #[inline(always)] #[must_use] - pub fn st4(&mut self) -> ST4_W { - ST4_W::new(self, 4) + pub fn st4(&mut self) -> St4W { + St4W::new(self, 4) } #[doc = "Bit 5 - Protocol Status Flag 5"] #[inline(always)] #[must_use] - pub fn st5(&mut self) -> ST5_W { - ST5_W::new(self, 5) + pub fn st5(&mut self) -> St5W { + St5W::new(self, 5) } #[doc = "Bit 6 - Protocol Status Flag 6"] #[inline(always)] #[must_use] - pub fn st6(&mut self) -> ST6_W { - ST6_W::new(self, 6) + pub fn st6(&mut self) -> St6W { + St6W::new(self, 6) } #[doc = "Bit 7 - Protocol Status Flag 7"] #[inline(always)] #[must_use] - pub fn st7(&mut self) -> ST7_W { - ST7_W::new(self, 7) + pub fn st7(&mut self) -> St7W { + St7W::new(self, 7) } #[doc = "Bit 8 - Protocol Status Flag 8"] #[inline(always)] #[must_use] - pub fn st8(&mut self) -> ST8_W { - ST8_W::new(self, 8) + pub fn st8(&mut self) -> St8W { + St8W::new(self, 8) } #[doc = "Bit 9 - Protocol Status Flag 9"] #[inline(always)] #[must_use] - pub fn st9(&mut self) -> ST9_W { - ST9_W::new(self, 9) + pub fn st9(&mut self) -> St9W { + St9W::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RSIF_W { - RSIF_W::new(self, 10) + pub fn rsif(&mut self) -> RsifW { + RsifW::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DLIF_W { - DLIF_W::new(self, 11) + pub fn dlif(&mut self) -> DlifW { + DlifW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TSIF_W { - TSIF_W::new(self, 12) + pub fn tsif(&mut self) -> TsifW { + TsifW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TBIF_W { - TBIF_W::new(self, 13) + pub fn tbif(&mut self) -> TbifW { + TbifW::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RIF_W { - RIF_W::new(self, 14) + pub fn rif(&mut self) -> RifW { + RifW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AIF_W { - AIF_W::new(self, 15) + pub fn aif(&mut self) -> AifW { + AifW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BRGIF_W { - BRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgif(&mut self) -> BrgifW { + BrgifW::new(self, 16) } } #[doc = "Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSR_SPEC; -impl crate::RegisterSpec for PSR_SPEC { +pub struct PsrSpec; +impl crate::RegisterSpec for PsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`psr::R`](R) reader structure"] -impl crate::Readable for PSR_SPEC {} +impl crate::Readable for PsrSpec {} #[doc = "`write(|w| ..)` method takes [`psr::W`](W) writer structure"] -impl crate::Writable for PSR_SPEC { +impl crate::Writable for PsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR to value 0"] -impl crate::Resettable for PSR_SPEC { +impl crate::Resettable for PsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_ascmode.rs b/src/usic0_ch0/psr_ascmode.rs index 4307c5e5..2a88f01f 100644 --- a/src/usic0_ch0/psr_ascmode.rs +++ b/src/usic0_ch0/psr_ascmode.rs @@ -1,1099 +1,1090 @@ #[doc = "Register `PSR_ASCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_ASCMode` writer"] -pub type W = crate::W; -#[doc = "Field `TXIDLE` reader - Transmission Idle"] -pub type TXIDLE_R = crate::BitReader; +pub type W = crate::W; #[doc = "Transmission Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TXIDLE_A { +pub enum Txidle { #[doc = "0: The transmitter line has not yet been idle."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmitter line has been idle and frame transmission is possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TXIDLE_A) -> Self { + fn from(variant: Txidle) -> Self { variant as u8 != 0 } } -impl TXIDLE_R { +#[doc = "Field `TXIDLE` reader - Transmission Idle"] +pub type TxidleR = crate::BitReader; +impl TxidleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TXIDLE_A { + pub const fn variant(&self) -> Txidle { match self.bits { - false => TXIDLE_A::VALUE1, - true => TXIDLE_A::VALUE2, + false => Txidle::Value1, + true => Txidle::Value2, } } #[doc = "The transmitter line has not yet been idle."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TXIDLE_A::VALUE1 + *self == Txidle::Value1 } #[doc = "The transmitter line has been idle and frame transmission is possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TXIDLE_A::VALUE2 + *self == Txidle::Value2 } } #[doc = "Field `TXIDLE` writer - Transmission Idle"] -pub type TXIDLE_W<'a, REG> = crate::BitWriter<'a, REG, TXIDLE_A>; -impl<'a, REG> TXIDLE_W<'a, REG> +pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG, Txidle>; +impl<'a, REG> TxidleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmitter line has not yet been idle."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TXIDLE_A::VALUE1) + self.variant(Txidle::Value1) } #[doc = "The transmitter line has been idle and frame transmission is possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TXIDLE_A::VALUE2) + self.variant(Txidle::Value2) } } -#[doc = "Field `RXIDLE` reader - Reception Idle"] -pub type RXIDLE_R = crate::BitReader; #[doc = "Reception Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RXIDLE_A { +pub enum Rxidle { #[doc = "0: The receiver line has not yet been idle."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receiver line has been idle and frame reception is possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RXIDLE_A) -> Self { + fn from(variant: Rxidle) -> Self { variant as u8 != 0 } } -impl RXIDLE_R { +#[doc = "Field `RXIDLE` reader - Reception Idle"] +pub type RxidleR = crate::BitReader; +impl RxidleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RXIDLE_A { + pub const fn variant(&self) -> Rxidle { match self.bits { - false => RXIDLE_A::VALUE1, - true => RXIDLE_A::VALUE2, + false => Rxidle::Value1, + true => Rxidle::Value2, } } #[doc = "The receiver line has not yet been idle."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RXIDLE_A::VALUE1 + *self == Rxidle::Value1 } #[doc = "The receiver line has been idle and frame reception is possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RXIDLE_A::VALUE2 + *self == Rxidle::Value2 } } #[doc = "Field `RXIDLE` writer - Reception Idle"] -pub type RXIDLE_W<'a, REG> = crate::BitWriter<'a, REG, RXIDLE_A>; -impl<'a, REG> RXIDLE_W<'a, REG> +pub type RxidleW<'a, REG> = crate::BitWriter<'a, REG, Rxidle>; +impl<'a, REG> RxidleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receiver line has not yet been idle."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RXIDLE_A::VALUE1) + self.variant(Rxidle::Value1) } #[doc = "The receiver line has been idle and frame reception is possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RXIDLE_A::VALUE2) + self.variant(Rxidle::Value2) } } -#[doc = "Field `SBD` reader - Synchronization Break Detected"] -pub type SBD_R = crate::BitReader; #[doc = "Synchronization Break Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SBD_A { +pub enum Sbd { #[doc = "0: A synchronization break has not yet been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A synchronization break has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SBD_A) -> Self { + fn from(variant: Sbd) -> Self { variant as u8 != 0 } } -impl SBD_R { +#[doc = "Field `SBD` reader - Synchronization Break Detected"] +pub type SbdR = crate::BitReader; +impl SbdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SBD_A { + pub const fn variant(&self) -> Sbd { match self.bits { - false => SBD_A::VALUE1, - true => SBD_A::VALUE2, + false => Sbd::Value1, + true => Sbd::Value2, } } #[doc = "A synchronization break has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SBD_A::VALUE1 + *self == Sbd::Value1 } #[doc = "A synchronization break has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SBD_A::VALUE2 + *self == Sbd::Value2 } } #[doc = "Field `SBD` writer - Synchronization Break Detected"] -pub type SBD_W<'a, REG> = crate::BitWriter<'a, REG, SBD_A>; -impl<'a, REG> SBD_W<'a, REG> +pub type SbdW<'a, REG> = crate::BitWriter<'a, REG, Sbd>; +impl<'a, REG> SbdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A synchronization break has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SBD_A::VALUE1) + self.variant(Sbd::Value1) } #[doc = "A synchronization break has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SBD_A::VALUE2) + self.variant(Sbd::Value2) } } -#[doc = "Field `COL` reader - Collision Detected"] -pub type COL_R = crate::BitReader; #[doc = "Collision Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum COL_A { +pub enum Col { #[doc = "0: A collision has not yet been detected and frame transmission is possible."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A collision has been detected and frame transmission is not possible."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: COL_A) -> Self { + fn from(variant: Col) -> Self { variant as u8 != 0 } } -impl COL_R { +#[doc = "Field `COL` reader - Collision Detected"] +pub type ColR = crate::BitReader; +impl ColR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> COL_A { + pub const fn variant(&self) -> Col { match self.bits { - false => COL_A::VALUE1, - true => COL_A::VALUE2, + false => Col::Value1, + true => Col::Value2, } } #[doc = "A collision has not yet been detected and frame transmission is possible."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == COL_A::VALUE1 + *self == Col::Value1 } #[doc = "A collision has been detected and frame transmission is not possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == COL_A::VALUE2 + *self == Col::Value2 } } #[doc = "Field `COL` writer - Collision Detected"] -pub type COL_W<'a, REG> = crate::BitWriter<'a, REG, COL_A>; -impl<'a, REG> COL_W<'a, REG> +pub type ColW<'a, REG> = crate::BitWriter<'a, REG, Col>; +impl<'a, REG> ColW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A collision has not yet been detected and frame transmission is possible."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE1) + self.variant(Col::Value1) } #[doc = "A collision has been detected and frame transmission is not possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(COL_A::VALUE2) + self.variant(Col::Value2) } } -#[doc = "Field `RNS` reader - Receiver Noise Detected"] -pub type RNS_R = crate::BitReader; #[doc = "Receiver Noise Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RNS_A { +pub enum Rns { #[doc = "0: Receiver noise has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Receiver noise has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RNS_A) -> Self { + fn from(variant: Rns) -> Self { variant as u8 != 0 } } -impl RNS_R { +#[doc = "Field `RNS` reader - Receiver Noise Detected"] +pub type RnsR = crate::BitReader; +impl RnsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RNS_A { + pub const fn variant(&self) -> Rns { match self.bits { - false => RNS_A::VALUE1, - true => RNS_A::VALUE2, + false => Rns::Value1, + true => Rns::Value2, } } #[doc = "Receiver noise has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RNS_A::VALUE1 + *self == Rns::Value1 } #[doc = "Receiver noise has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RNS_A::VALUE2 + *self == Rns::Value2 } } #[doc = "Field `RNS` writer - Receiver Noise Detected"] -pub type RNS_W<'a, REG> = crate::BitWriter<'a, REG, RNS_A>; -impl<'a, REG> RNS_W<'a, REG> +pub type RnsW<'a, REG> = crate::BitWriter<'a, REG, Rns>; +impl<'a, REG> RnsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Receiver noise has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RNS_A::VALUE1) + self.variant(Rns::Value1) } #[doc = "Receiver noise has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RNS_A::VALUE2) + self.variant(Rns::Value2) } } -#[doc = "Field `FER0` reader - Format Error in Stop Bit 0"] -pub type FER0_R = crate::BitReader; #[doc = "Format Error in Stop Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FER0_A { +pub enum Fer0 { #[doc = "0: A format error 0 has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A format error 0 has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FER0_A) -> Self { + fn from(variant: Fer0) -> Self { variant as u8 != 0 } } -impl FER0_R { +#[doc = "Field `FER0` reader - Format Error in Stop Bit 0"] +pub type Fer0R = crate::BitReader; +impl Fer0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FER0_A { + pub const fn variant(&self) -> Fer0 { match self.bits { - false => FER0_A::VALUE1, - true => FER0_A::VALUE2, + false => Fer0::Value1, + true => Fer0::Value2, } } #[doc = "A format error 0 has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FER0_A::VALUE1 + *self == Fer0::Value1 } #[doc = "A format error 0 has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FER0_A::VALUE2 + *self == Fer0::Value2 } } #[doc = "Field `FER0` writer - Format Error in Stop Bit 0"] -pub type FER0_W<'a, REG> = crate::BitWriter<'a, REG, FER0_A>; -impl<'a, REG> FER0_W<'a, REG> +pub type Fer0W<'a, REG> = crate::BitWriter<'a, REG, Fer0>; +impl<'a, REG> Fer0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A format error 0 has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FER0_A::VALUE1) + self.variant(Fer0::Value1) } #[doc = "A format error 0 has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FER0_A::VALUE2) + self.variant(Fer0::Value2) } } -#[doc = "Field `FER1` reader - Format Error in Stop Bit 1"] -pub type FER1_R = crate::BitReader; #[doc = "Format Error in Stop Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FER1_A { +pub enum Fer1 { #[doc = "0: A format error 1 has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A format error 1 has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FER1_A) -> Self { + fn from(variant: Fer1) -> Self { variant as u8 != 0 } } -impl FER1_R { +#[doc = "Field `FER1` reader - Format Error in Stop Bit 1"] +pub type Fer1R = crate::BitReader; +impl Fer1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FER1_A { + pub const fn variant(&self) -> Fer1 { match self.bits { - false => FER1_A::VALUE1, - true => FER1_A::VALUE2, + false => Fer1::Value1, + true => Fer1::Value2, } } #[doc = "A format error 1 has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FER1_A::VALUE1 + *self == Fer1::Value1 } #[doc = "A format error 1 has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FER1_A::VALUE2 + *self == Fer1::Value2 } } #[doc = "Field `FER1` writer - Format Error in Stop Bit 1"] -pub type FER1_W<'a, REG> = crate::BitWriter<'a, REG, FER1_A>; -impl<'a, REG> FER1_W<'a, REG> +pub type Fer1W<'a, REG> = crate::BitWriter<'a, REG, Fer1>; +impl<'a, REG> Fer1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A format error 1 has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FER1_A::VALUE1) + self.variant(Fer1::Value1) } #[doc = "A format error 1 has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FER1_A::VALUE2) + self.variant(Fer1::Value2) } } -#[doc = "Field `RFF` reader - Receive Frame Finished"] -pub type RFF_R = crate::BitReader; #[doc = "Receive Frame Finished\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RFF_A { +pub enum Rff { #[doc = "0: The received frame is not yet finished."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The received frame is finished."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RFF_A) -> Self { + fn from(variant: Rff) -> Self { variant as u8 != 0 } } -impl RFF_R { +#[doc = "Field `RFF` reader - Receive Frame Finished"] +pub type RffR = crate::BitReader; +impl RffR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RFF_A { + pub const fn variant(&self) -> Rff { match self.bits { - false => RFF_A::VALUE1, - true => RFF_A::VALUE2, + false => Rff::Value1, + true => Rff::Value2, } } #[doc = "The received frame is not yet finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RFF_A::VALUE1 + *self == Rff::Value1 } #[doc = "The received frame is finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RFF_A::VALUE2 + *self == Rff::Value2 } } #[doc = "Field `RFF` writer - Receive Frame Finished"] -pub type RFF_W<'a, REG> = crate::BitWriter<'a, REG, RFF_A>; -impl<'a, REG> RFF_W<'a, REG> +pub type RffW<'a, REG> = crate::BitWriter<'a, REG, Rff>; +impl<'a, REG> RffW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The received frame is not yet finished."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RFF_A::VALUE1) + self.variant(Rff::Value1) } #[doc = "The received frame is finished."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RFF_A::VALUE2) + self.variant(Rff::Value2) } } -#[doc = "Field `TFF` reader - Transmitter Frame Finished"] -pub type TFF_R = crate::BitReader; #[doc = "Transmitter Frame Finished\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TFF_A { +pub enum Tff { #[doc = "0: The transmitter frame is not yet finished."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmitter frame is finished."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TFF_A) -> Self { + fn from(variant: Tff) -> Self { variant as u8 != 0 } } -impl TFF_R { +#[doc = "Field `TFF` reader - Transmitter Frame Finished"] +pub type TffR = crate::BitReader; +impl TffR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TFF_A { + pub const fn variant(&self) -> Tff { match self.bits { - false => TFF_A::VALUE1, - true => TFF_A::VALUE2, + false => Tff::Value1, + true => Tff::Value2, } } #[doc = "The transmitter frame is not yet finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TFF_A::VALUE1 + *self == Tff::Value1 } #[doc = "The transmitter frame is finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TFF_A::VALUE2 + *self == Tff::Value2 } } #[doc = "Field `TFF` writer - Transmitter Frame Finished"] -pub type TFF_W<'a, REG> = crate::BitWriter<'a, REG, TFF_A>; -impl<'a, REG> TFF_W<'a, REG> +pub type TffW<'a, REG> = crate::BitWriter<'a, REG, Tff>; +impl<'a, REG> TffW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmitter frame is not yet finished."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TFF_A::VALUE1) + self.variant(Tff::Value1) } #[doc = "The transmitter frame is finished."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TFF_A::VALUE2) + self.variant(Tff::Value2) } } -#[doc = "Field `BUSY` reader - Transfer Status BUSY"] -pub type BUSY_R = crate::BitReader; #[doc = "Transfer Status BUSY\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: A data transfer does not take place."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data transfer currently takes place."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Transfer Status BUSY"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "A data transfer does not take place."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "A data transfer currently takes place."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } -#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RSIF_R = crate::BitReader; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIF_A { +pub enum Rsif { #[doc = "0: A receiver start event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receiver start event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIF_A) -> Self { + fn from(variant: Rsif) -> Self { variant as u8 != 0 } } -impl RSIF_R { +#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] +pub type RsifR = crate::BitReader; +impl RsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIF_A { + pub const fn variant(&self) -> Rsif { match self.bits { - false => RSIF_A::VALUE1, - true => RSIF_A::VALUE2, + false => Rsif::Value1, + true => Rsif::Value2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIF_A::VALUE1 + *self == Rsif::Value1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIF_A::VALUE2 + *self == Rsif::Value2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; -impl<'a, REG> RSIF_W<'a, REG> +pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; +impl<'a, REG> RsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE1) + self.variant(Rsif::Value1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE2) + self.variant(Rsif::Value2) } } -#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DLIF_R = crate::BitReader; #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIF_A { +pub enum Dlif { #[doc = "0: A data lost event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data lost event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIF_A) -> Self { + fn from(variant: Dlif) -> Self { variant as u8 != 0 } } -impl DLIF_R { +#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] +pub type DlifR = crate::BitReader; +impl DlifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIF_A { + pub const fn variant(&self) -> Dlif { match self.bits { - false => DLIF_A::VALUE1, - true => DLIF_A::VALUE2, + false => Dlif::Value1, + true => Dlif::Value2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIF_A::VALUE1 + *self == Dlif::Value1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIF_A::VALUE2 + *self == Dlif::Value2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; -impl<'a, REG> DLIF_W<'a, REG> +pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; +impl<'a, REG> DlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE1) + self.variant(Dlif::Value1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE2) + self.variant(Dlif::Value2) } } -#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TSIF_R = crate::BitReader; #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIF_A { +pub enum Tsif { #[doc = "0: A transmit shift event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit shift event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIF_A) -> Self { + fn from(variant: Tsif) -> Self { variant as u8 != 0 } } -impl TSIF_R { +#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] +pub type TsifR = crate::BitReader; +impl TsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIF_A { + pub const fn variant(&self) -> Tsif { match self.bits { - false => TSIF_A::VALUE1, - true => TSIF_A::VALUE2, + false => Tsif::Value1, + true => Tsif::Value2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIF_A::VALUE1 + *self == Tsif::Value1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIF_A::VALUE2 + *self == Tsif::Value2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; -impl<'a, REG> TSIF_W<'a, REG> +pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; +impl<'a, REG> TsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE1) + self.variant(Tsif::Value1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE2) + self.variant(Tsif::Value2) } } -#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TBIF_R = crate::BitReader; #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIF_A { +pub enum Tbif { #[doc = "0: A transmit buffer event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIF_A) -> Self { + fn from(variant: Tbif) -> Self { variant as u8 != 0 } } -impl TBIF_R { +#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] +pub type TbifR = crate::BitReader; +impl TbifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIF_A { + pub const fn variant(&self) -> Tbif { match self.bits { - false => TBIF_A::VALUE1, - true => TBIF_A::VALUE2, + false => Tbif::Value1, + true => Tbif::Value2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIF_A::VALUE1 + *self == Tbif::Value1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIF_A::VALUE2 + *self == Tbif::Value2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; -impl<'a, REG> TBIF_W<'a, REG> +pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; +impl<'a, REG> TbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE1) + self.variant(Tbif::Value1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE2) + self.variant(Tbif::Value2) } } -#[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RIF_R = crate::BitReader; #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIF_A { +pub enum Rif { #[doc = "0: A receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIF_A) -> Self { + fn from(variant: Rif) -> Self { variant as u8 != 0 } } -impl RIF_R { +#[doc = "Field `RIF` reader - Receive Indication Flag"] +pub type RifR = crate::BitReader; +impl RifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIF_A { + pub const fn variant(&self) -> Rif { match self.bits { - false => RIF_A::VALUE1, - true => RIF_A::VALUE2, + false => Rif::Value1, + true => Rif::Value2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIF_A::VALUE1 + *self == Rif::Value1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIF_A::VALUE2 + *self == Rif::Value2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; -impl<'a, REG> RIF_W<'a, REG> +pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; +impl<'a, REG> RifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE1) + self.variant(Rif::Value1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE2) + self.variant(Rif::Value2) } } -#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AIF_R = crate::BitReader; #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIF_A { +pub enum Aif { #[doc = "0: An alternative receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIF_A) -> Self { + fn from(variant: Aif) -> Self { variant as u8 != 0 } } -impl AIF_R { +#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] +pub type AifR = crate::BitReader; +impl AifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIF_A { + pub const fn variant(&self) -> Aif { match self.bits { - false => AIF_A::VALUE1, - true => AIF_A::VALUE2, + false => Aif::Value1, + true => Aif::Value2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIF_A::VALUE1 + *self == Aif::Value1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIF_A::VALUE2 + *self == Aif::Value2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; -impl<'a, REG> AIF_W<'a, REG> +pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; +impl<'a, REG> AifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE1) + self.variant(Aif::Value1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE2) + self.variant(Aif::Value2) } } -#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BRGIF_R = crate::BitReader; #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIF_A { +pub enum Brgif { #[doc = "0: A baud rate generator event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A baud rate generator event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIF_A) -> Self { + fn from(variant: Brgif) -> Self { variant as u8 != 0 } } -impl BRGIF_R { +#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] +pub type BrgifR = crate::BitReader; +impl BrgifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIF_A { + pub const fn variant(&self) -> Brgif { match self.bits { - false => BRGIF_A::VALUE1, - true => BRGIF_A::VALUE2, + false => Brgif::Value1, + true => Brgif::Value2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIF_A::VALUE1 + *self == Brgif::Value1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIF_A::VALUE2 + *self == Brgif::Value2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; -impl<'a, REG> BRGIF_W<'a, REG> +pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; +impl<'a, REG> BrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE1) + self.variant(Brgif::Value1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE2) + self.variant(Brgif::Value2) } } impl R { #[doc = "Bit 0 - Transmission Idle"] #[inline(always)] - pub fn txidle(&self) -> TXIDLE_R { - TXIDLE_R::new((self.bits & 1) != 0) + pub fn txidle(&self) -> TxidleR { + TxidleR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Reception Idle"] #[inline(always)] - pub fn rxidle(&self) -> RXIDLE_R { - RXIDLE_R::new(((self.bits >> 1) & 1) != 0) + pub fn rxidle(&self) -> RxidleR { + RxidleR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Break Detected"] #[inline(always)] - pub fn sbd(&self) -> SBD_R { - SBD_R::new(((self.bits >> 2) & 1) != 0) + pub fn sbd(&self) -> SbdR { + SbdR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Collision Detected"] #[inline(always)] - pub fn col(&self) -> COL_R { - COL_R::new(((self.bits >> 3) & 1) != 0) + pub fn col(&self) -> ColR { + ColR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receiver Noise Detected"] #[inline(always)] - pub fn rns(&self) -> RNS_R { - RNS_R::new(((self.bits >> 4) & 1) != 0) + pub fn rns(&self) -> RnsR { + RnsR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Format Error in Stop Bit 0"] #[inline(always)] - pub fn fer0(&self) -> FER0_R { - FER0_R::new(((self.bits >> 5) & 1) != 0) + pub fn fer0(&self) -> Fer0R { + Fer0R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Format Error in Stop Bit 1"] #[inline(always)] - pub fn fer1(&self) -> FER1_R { - FER1_R::new(((self.bits >> 6) & 1) != 0) + pub fn fer1(&self) -> Fer1R { + Fer1R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Frame Finished"] #[inline(always)] - pub fn rff(&self) -> RFF_R { - RFF_R::new(((self.bits >> 7) & 1) != 0) + pub fn rff(&self) -> RffR { + RffR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Transmitter Frame Finished"] #[inline(always)] - pub fn tff(&self) -> TFF_R { - TFF_R::new(((self.bits >> 8) & 1) != 0) + pub fn tff(&self) -> TffR { + TffR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transfer Status BUSY"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 9) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RSIF_R { - RSIF_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RsifR { + RsifR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DLIF_R { - DLIF_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DlifR { + DlifR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TSIF_R { - TSIF_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TsifR { + TsifR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TBIF_R { - TBIF_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TbifR { + TbifR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RIF_R { - RIF_R::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RifR { + RifR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AIF_R { - AIF_R::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AifR { + AifR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BRGIF_R { - BRGIF_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BrgifR { + BrgifR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transmission Idle"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TXIDLE_W { - TXIDLE_W::new(self, 0) + pub fn txidle(&mut self) -> TxidleW { + TxidleW::new(self, 0) } #[doc = "Bit 1 - Reception Idle"] #[inline(always)] #[must_use] - pub fn rxidle(&mut self) -> RXIDLE_W { - RXIDLE_W::new(self, 1) + pub fn rxidle(&mut self) -> RxidleW { + RxidleW::new(self, 1) } #[doc = "Bit 2 - Synchronization Break Detected"] #[inline(always)] #[must_use] - pub fn sbd(&mut self) -> SBD_W { - SBD_W::new(self, 2) + pub fn sbd(&mut self) -> SbdW { + SbdW::new(self, 2) } #[doc = "Bit 3 - Collision Detected"] #[inline(always)] #[must_use] - pub fn col(&mut self) -> COL_W { - COL_W::new(self, 3) + pub fn col(&mut self) -> ColW { + ColW::new(self, 3) } #[doc = "Bit 4 - Receiver Noise Detected"] #[inline(always)] #[must_use] - pub fn rns(&mut self) -> RNS_W { - RNS_W::new(self, 4) + pub fn rns(&mut self) -> RnsW { + RnsW::new(self, 4) } #[doc = "Bit 5 - Format Error in Stop Bit 0"] #[inline(always)] #[must_use] - pub fn fer0(&mut self) -> FER0_W { - FER0_W::new(self, 5) + pub fn fer0(&mut self) -> Fer0W { + Fer0W::new(self, 5) } #[doc = "Bit 6 - Format Error in Stop Bit 1"] #[inline(always)] #[must_use] - pub fn fer1(&mut self) -> FER1_W { - FER1_W::new(self, 6) + pub fn fer1(&mut self) -> Fer1W { + Fer1W::new(self, 6) } #[doc = "Bit 7 - Receive Frame Finished"] #[inline(always)] #[must_use] - pub fn rff(&mut self) -> RFF_W { - RFF_W::new(self, 7) + pub fn rff(&mut self) -> RffW { + RffW::new(self, 7) } #[doc = "Bit 8 - Transmitter Frame Finished"] #[inline(always)] #[must_use] - pub fn tff(&mut self) -> TFF_W { - TFF_W::new(self, 8) + pub fn tff(&mut self) -> TffW { + TffW::new(self, 8) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RSIF_W { - RSIF_W::new(self, 10) + pub fn rsif(&mut self) -> RsifW { + RsifW::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DLIF_W { - DLIF_W::new(self, 11) + pub fn dlif(&mut self) -> DlifW { + DlifW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TSIF_W { - TSIF_W::new(self, 12) + pub fn tsif(&mut self) -> TsifW { + TsifW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TBIF_W { - TBIF_W::new(self, 13) + pub fn tbif(&mut self) -> TbifW { + TbifW::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RIF_W { - RIF_W::new(self, 14) + pub fn rif(&mut self) -> RifW { + RifW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AIF_W { - AIF_W::new(self, 15) + pub fn aif(&mut self) -> AifW { + AifW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BRGIF_W { - BRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgif(&mut self) -> BrgifW { + BrgifW::new(self, 16) } } #[doc = "Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSR_ASCMODE_SPEC; -impl crate::RegisterSpec for PSR_ASCMODE_SPEC { +pub struct PsrAscmodeSpec; +impl crate::RegisterSpec for PsrAscmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`psr_ascmode::R`](R) reader structure"] -impl crate::Readable for PSR_ASCMODE_SPEC {} +impl crate::Readable for PsrAscmodeSpec {} #[doc = "`write(|w| ..)` method takes [`psr_ascmode::W`](W) writer structure"] -impl crate::Writable for PSR_ASCMODE_SPEC { +impl crate::Writable for PsrAscmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_ASCMode to value 0"] -impl crate::Resettable for PSR_ASCMODE_SPEC { +impl crate::Resettable for PsrAscmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_iicmode.rs b/src/usic0_ch0/psr_iicmode.rs index 8dcbff65..0f602d7c 100644 --- a/src/usic0_ch0/psr_iicmode.rs +++ b/src/usic0_ch0/psr_iicmode.rs @@ -1,1122 +1,1113 @@ #[doc = "Register `PSR_IICMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_IICMode` writer"] -pub type W = crate::W; -#[doc = "Field `SLSEL` reader - Slave Select"] -pub type SLSEL_R = crate::BitReader; +pub type W = crate::W; #[doc = "Slave Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SLSEL_A { +pub enum Slsel { #[doc = "0: The device is not selected as slave."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The device is selected as slave."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SLSEL_A) -> Self { + fn from(variant: Slsel) -> Self { variant as u8 != 0 } } -impl SLSEL_R { +#[doc = "Field `SLSEL` reader - Slave Select"] +pub type SlselR = crate::BitReader; +impl SlselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SLSEL_A { + pub const fn variant(&self) -> Slsel { match self.bits { - false => SLSEL_A::VALUE1, - true => SLSEL_A::VALUE2, + false => Slsel::Value1, + true => Slsel::Value2, } } #[doc = "The device is not selected as slave."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SLSEL_A::VALUE1 + *self == Slsel::Value1 } #[doc = "The device is selected as slave."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SLSEL_A::VALUE2 + *self == Slsel::Value2 } } #[doc = "Field `SLSEL` writer - Slave Select"] -pub type SLSEL_W<'a, REG> = crate::BitWriter<'a, REG, SLSEL_A>; -impl<'a, REG> SLSEL_W<'a, REG> +pub type SlselW<'a, REG> = crate::BitWriter<'a, REG, Slsel>; +impl<'a, REG> SlselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The device is not selected as slave."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SLSEL_A::VALUE1) + self.variant(Slsel::Value1) } #[doc = "The device is selected as slave."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SLSEL_A::VALUE2) + self.variant(Slsel::Value2) } } -#[doc = "Field `WTDF` reader - Wrong TDF Code Found"] -pub type WTDF_R = crate::BitReader; #[doc = "Wrong TDF Code Found\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WTDF_A { +pub enum Wtdf { #[doc = "0: A wrong TDF code has not been found."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A wrong TDF code has been found."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WTDF_A) -> Self { + fn from(variant: Wtdf) -> Self { variant as u8 != 0 } } -impl WTDF_R { +#[doc = "Field `WTDF` reader - Wrong TDF Code Found"] +pub type WtdfR = crate::BitReader; +impl WtdfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WTDF_A { + pub const fn variant(&self) -> Wtdf { match self.bits { - false => WTDF_A::VALUE1, - true => WTDF_A::VALUE2, + false => Wtdf::Value1, + true => Wtdf::Value2, } } #[doc = "A wrong TDF code has not been found."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WTDF_A::VALUE1 + *self == Wtdf::Value1 } #[doc = "A wrong TDF code has been found."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WTDF_A::VALUE2 + *self == Wtdf::Value2 } } #[doc = "Field `WTDF` writer - Wrong TDF Code Found"] -pub type WTDF_W<'a, REG> = crate::BitWriter<'a, REG, WTDF_A>; -impl<'a, REG> WTDF_W<'a, REG> +pub type WtdfW<'a, REG> = crate::BitWriter<'a, REG, Wtdf>; +impl<'a, REG> WtdfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A wrong TDF code has not been found."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WTDF_A::VALUE1) + self.variant(Wtdf::Value1) } #[doc = "A wrong TDF code has been found."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WTDF_A::VALUE2) + self.variant(Wtdf::Value2) } } -#[doc = "Field `SCR` reader - Start Condition Received"] -pub type SCR_R = crate::BitReader; #[doc = "Start Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCR_A { +pub enum Scr { #[doc = "0: A start condition has not yet been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A start condition has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCR_A) -> Self { + fn from(variant: Scr) -> Self { variant as u8 != 0 } } -impl SCR_R { +#[doc = "Field `SCR` reader - Start Condition Received"] +pub type ScrR = crate::BitReader; +impl ScrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCR_A { + pub const fn variant(&self) -> Scr { match self.bits { - false => SCR_A::VALUE1, - true => SCR_A::VALUE2, + false => Scr::Value1, + true => Scr::Value2, } } #[doc = "A start condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCR_A::VALUE1 + *self == Scr::Value1 } #[doc = "A start condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCR_A::VALUE2 + *self == Scr::Value2 } } #[doc = "Field `SCR` writer - Start Condition Received"] -pub type SCR_W<'a, REG> = crate::BitWriter<'a, REG, SCR_A>; -impl<'a, REG> SCR_W<'a, REG> +pub type ScrW<'a, REG> = crate::BitWriter<'a, REG, Scr>; +impl<'a, REG> ScrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A start condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCR_A::VALUE1) + self.variant(Scr::Value1) } #[doc = "A start condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCR_A::VALUE2) + self.variant(Scr::Value2) } } -#[doc = "Field `RSCR` reader - Repeated Start Condition Received"] -pub type RSCR_R = crate::BitReader; #[doc = "Repeated Start Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSCR_A { +pub enum Rscr { #[doc = "0: A repeated start condition has not yet been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A repeated start condition has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSCR_A) -> Self { + fn from(variant: Rscr) -> Self { variant as u8 != 0 } } -impl RSCR_R { +#[doc = "Field `RSCR` reader - Repeated Start Condition Received"] +pub type RscrR = crate::BitReader; +impl RscrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSCR_A { + pub const fn variant(&self) -> Rscr { match self.bits { - false => RSCR_A::VALUE1, - true => RSCR_A::VALUE2, + false => Rscr::Value1, + true => Rscr::Value2, } } #[doc = "A repeated start condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSCR_A::VALUE1 + *self == Rscr::Value1 } #[doc = "A repeated start condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSCR_A::VALUE2 + *self == Rscr::Value2 } } #[doc = "Field `RSCR` writer - Repeated Start Condition Received"] -pub type RSCR_W<'a, REG> = crate::BitWriter<'a, REG, RSCR_A>; -impl<'a, REG> RSCR_W<'a, REG> +pub type RscrW<'a, REG> = crate::BitWriter<'a, REG, Rscr>; +impl<'a, REG> RscrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A repeated start condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSCR_A::VALUE1) + self.variant(Rscr::Value1) } #[doc = "A repeated start condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSCR_A::VALUE2) + self.variant(Rscr::Value2) } } -#[doc = "Field `PCR` reader - Stop Condition Received"] -pub type PCR_R = crate::BitReader; #[doc = "Stop Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PCR_A { +pub enum Pcr { #[doc = "0: A stop condition has not yet been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A stop condition has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PCR_A) -> Self { + fn from(variant: Pcr) -> Self { variant as u8 != 0 } } -impl PCR_R { +#[doc = "Field `PCR` reader - Stop Condition Received"] +pub type PcrR = crate::BitReader; +impl PcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PCR_A { + pub const fn variant(&self) -> Pcr { match self.bits { - false => PCR_A::VALUE1, - true => PCR_A::VALUE2, + false => Pcr::Value1, + true => Pcr::Value2, } } #[doc = "A stop condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PCR_A::VALUE1 + *self == Pcr::Value1 } #[doc = "A stop condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PCR_A::VALUE2 + *self == Pcr::Value2 } } #[doc = "Field `PCR` writer - Stop Condition Received"] -pub type PCR_W<'a, REG> = crate::BitWriter<'a, REG, PCR_A>; -impl<'a, REG> PCR_W<'a, REG> +pub type PcrW<'a, REG> = crate::BitWriter<'a, REG, Pcr>; +impl<'a, REG> PcrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A stop condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PCR_A::VALUE1) + self.variant(Pcr::Value1) } #[doc = "A stop condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PCR_A::VALUE2) + self.variant(Pcr::Value2) } } -#[doc = "Field `NACK` reader - Non-Acknowledge Received"] -pub type NACK_R = crate::BitReader; #[doc = "Non-Acknowledge Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NACK_A { +pub enum Nack { #[doc = "0: A non-acknowledge has not been received."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A non-acknowledge has been received."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NACK_A) -> Self { + fn from(variant: Nack) -> Self { variant as u8 != 0 } } -impl NACK_R { +#[doc = "Field `NACK` reader - Non-Acknowledge Received"] +pub type NackR = crate::BitReader; +impl NackR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NACK_A { + pub const fn variant(&self) -> Nack { match self.bits { - false => NACK_A::VALUE1, - true => NACK_A::VALUE2, + false => Nack::Value1, + true => Nack::Value2, } } #[doc = "A non-acknowledge has not been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NACK_A::VALUE1 + *self == Nack::Value1 } #[doc = "A non-acknowledge has been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NACK_A::VALUE2 + *self == Nack::Value2 } } #[doc = "Field `NACK` writer - Non-Acknowledge Received"] -pub type NACK_W<'a, REG> = crate::BitWriter<'a, REG, NACK_A>; -impl<'a, REG> NACK_W<'a, REG> +pub type NackW<'a, REG> = crate::BitWriter<'a, REG, Nack>; +impl<'a, REG> NackW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A non-acknowledge has not been received."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NACK_A::VALUE1) + self.variant(Nack::Value1) } #[doc = "A non-acknowledge has been received."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NACK_A::VALUE2) + self.variant(Nack::Value2) } } -#[doc = "Field `ARL` reader - Arbitration Lost"] -pub type ARL_R = crate::BitReader; #[doc = "Arbitration Lost\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARL_A { +pub enum Arl { #[doc = "0: An arbitration has not been lost."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An arbitration has been lost."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARL_A) -> Self { + fn from(variant: Arl) -> Self { variant as u8 != 0 } } -impl ARL_R { +#[doc = "Field `ARL` reader - Arbitration Lost"] +pub type ArlR = crate::BitReader; +impl ArlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARL_A { + pub const fn variant(&self) -> Arl { match self.bits { - false => ARL_A::VALUE1, - true => ARL_A::VALUE2, + false => Arl::Value1, + true => Arl::Value2, } } #[doc = "An arbitration has not been lost."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARL_A::VALUE1 + *self == Arl::Value1 } #[doc = "An arbitration has been lost."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARL_A::VALUE2 + *self == Arl::Value2 } } #[doc = "Field `ARL` writer - Arbitration Lost"] -pub type ARL_W<'a, REG> = crate::BitWriter<'a, REG, ARL_A>; -impl<'a, REG> ARL_W<'a, REG> +pub type ArlW<'a, REG> = crate::BitWriter<'a, REG, Arl>; +impl<'a, REG> ArlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An arbitration has not been lost."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARL_A::VALUE1) + self.variant(Arl::Value1) } #[doc = "An arbitration has been lost."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARL_A::VALUE2) + self.variant(Arl::Value2) } } -#[doc = "Field `SRR` reader - Slave Read Request"] -pub type SRR_R = crate::BitReader; #[doc = "Slave Read Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRR_A { +pub enum Srr { #[doc = "0: A slave read request has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A slave read request has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRR_A) -> Self { + fn from(variant: Srr) -> Self { variant as u8 != 0 } } -impl SRR_R { +#[doc = "Field `SRR` reader - Slave Read Request"] +pub type SrrR = crate::BitReader; +impl SrrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRR_A { + pub const fn variant(&self) -> Srr { match self.bits { - false => SRR_A::VALUE1, - true => SRR_A::VALUE2, + false => Srr::Value1, + true => Srr::Value2, } } #[doc = "A slave read request has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRR_A::VALUE1 + *self == Srr::Value1 } #[doc = "A slave read request has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRR_A::VALUE2 + *self == Srr::Value2 } } #[doc = "Field `SRR` writer - Slave Read Request"] -pub type SRR_W<'a, REG> = crate::BitWriter<'a, REG, SRR_A>; -impl<'a, REG> SRR_W<'a, REG> +pub type SrrW<'a, REG> = crate::BitWriter<'a, REG, Srr>; +impl<'a, REG> SrrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A slave read request has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRR_A::VALUE1) + self.variant(Srr::Value1) } #[doc = "A slave read request has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRR_A::VALUE2) + self.variant(Srr::Value2) } } -#[doc = "Field `ERR` reader - Error"] -pub type ERR_R = crate::BitReader; #[doc = "Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ERR_A { +pub enum Err { #[doc = "0: An IIC error has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An IIC error has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ERR_A) -> Self { + fn from(variant: Err) -> Self { variant as u8 != 0 } } -impl ERR_R { +#[doc = "Field `ERR` reader - Error"] +pub type ErrR = crate::BitReader; +impl ErrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ERR_A { + pub const fn variant(&self) -> Err { match self.bits { - false => ERR_A::VALUE1, - true => ERR_A::VALUE2, + false => Err::Value1, + true => Err::Value2, } } #[doc = "An IIC error has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ERR_A::VALUE1 + *self == Err::Value1 } #[doc = "An IIC error has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ERR_A::VALUE2 + *self == Err::Value2 } } #[doc = "Field `ERR` writer - Error"] -pub type ERR_W<'a, REG> = crate::BitWriter<'a, REG, ERR_A>; -impl<'a, REG> ERR_W<'a, REG> +pub type ErrW<'a, REG> = crate::BitWriter<'a, REG, Err>; +impl<'a, REG> ErrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An IIC error has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ERR_A::VALUE1) + self.variant(Err::Value1) } #[doc = "An IIC error has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ERR_A::VALUE2) + self.variant(Err::Value2) } } -#[doc = "Field `ACK` reader - Acknowledge Received"] -pub type ACK_R = crate::BitReader; #[doc = "Acknowledge Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ACK_A { +pub enum Ack { #[doc = "0: An acknowledge has not been received."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An acknowledge has been received."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ACK_A) -> Self { + fn from(variant: Ack) -> Self { variant as u8 != 0 } } -impl ACK_R { +#[doc = "Field `ACK` reader - Acknowledge Received"] +pub type AckR = crate::BitReader; +impl AckR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ACK_A { + pub const fn variant(&self) -> Ack { match self.bits { - false => ACK_A::VALUE1, - true => ACK_A::VALUE2, + false => Ack::Value1, + true => Ack::Value2, } } #[doc = "An acknowledge has not been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ACK_A::VALUE1 + *self == Ack::Value1 } #[doc = "An acknowledge has been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ACK_A::VALUE2 + *self == Ack::Value2 } } #[doc = "Field `ACK` writer - Acknowledge Received"] -pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG, ACK_A>; -impl<'a, REG> ACK_W<'a, REG> +pub type AckW<'a, REG> = crate::BitWriter<'a, REG, Ack>; +impl<'a, REG> AckW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An acknowledge has not been received."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ACK_A::VALUE1) + self.variant(Ack::Value1) } #[doc = "An acknowledge has been received."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ACK_A::VALUE2) + self.variant(Ack::Value2) } } -#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RSIF_R = crate::BitReader; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIF_A { +pub enum Rsif { #[doc = "0: A receiver start event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receiver start event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIF_A) -> Self { + fn from(variant: Rsif) -> Self { variant as u8 != 0 } } -impl RSIF_R { +#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] +pub type RsifR = crate::BitReader; +impl RsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIF_A { + pub const fn variant(&self) -> Rsif { match self.bits { - false => RSIF_A::VALUE1, - true => RSIF_A::VALUE2, + false => Rsif::Value1, + true => Rsif::Value2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIF_A::VALUE1 + *self == Rsif::Value1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIF_A::VALUE2 + *self == Rsif::Value2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; -impl<'a, REG> RSIF_W<'a, REG> +pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; +impl<'a, REG> RsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE1) + self.variant(Rsif::Value1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE2) + self.variant(Rsif::Value2) } } -#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DLIF_R = crate::BitReader; #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIF_A { +pub enum Dlif { #[doc = "0: A data lost event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data lost event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIF_A) -> Self { + fn from(variant: Dlif) -> Self { variant as u8 != 0 } } -impl DLIF_R { +#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] +pub type DlifR = crate::BitReader; +impl DlifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIF_A { + pub const fn variant(&self) -> Dlif { match self.bits { - false => DLIF_A::VALUE1, - true => DLIF_A::VALUE2, + false => Dlif::Value1, + true => Dlif::Value2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIF_A::VALUE1 + *self == Dlif::Value1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIF_A::VALUE2 + *self == Dlif::Value2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; -impl<'a, REG> DLIF_W<'a, REG> +pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; +impl<'a, REG> DlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE1) + self.variant(Dlif::Value1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE2) + self.variant(Dlif::Value2) } } -#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TSIF_R = crate::BitReader; #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIF_A { +pub enum Tsif { #[doc = "0: A transmit shift event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit shift event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIF_A) -> Self { + fn from(variant: Tsif) -> Self { variant as u8 != 0 } } -impl TSIF_R { +#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] +pub type TsifR = crate::BitReader; +impl TsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIF_A { + pub const fn variant(&self) -> Tsif { match self.bits { - false => TSIF_A::VALUE1, - true => TSIF_A::VALUE2, + false => Tsif::Value1, + true => Tsif::Value2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIF_A::VALUE1 + *self == Tsif::Value1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIF_A::VALUE2 + *self == Tsif::Value2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; -impl<'a, REG> TSIF_W<'a, REG> +pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; +impl<'a, REG> TsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE1) + self.variant(Tsif::Value1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE2) + self.variant(Tsif::Value2) } } -#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TBIF_R = crate::BitReader; #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIF_A { +pub enum Tbif { #[doc = "0: A transmit buffer event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIF_A) -> Self { + fn from(variant: Tbif) -> Self { variant as u8 != 0 } } -impl TBIF_R { +#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] +pub type TbifR = crate::BitReader; +impl TbifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIF_A { + pub const fn variant(&self) -> Tbif { match self.bits { - false => TBIF_A::VALUE1, - true => TBIF_A::VALUE2, + false => Tbif::Value1, + true => Tbif::Value2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIF_A::VALUE1 + *self == Tbif::Value1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIF_A::VALUE2 + *self == Tbif::Value2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; -impl<'a, REG> TBIF_W<'a, REG> +pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; +impl<'a, REG> TbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE1) + self.variant(Tbif::Value1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE2) + self.variant(Tbif::Value2) } } -#[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RIF_R = crate::BitReader; #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIF_A { +pub enum Rif { #[doc = "0: A receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIF_A) -> Self { + fn from(variant: Rif) -> Self { variant as u8 != 0 } } -impl RIF_R { +#[doc = "Field `RIF` reader - Receive Indication Flag"] +pub type RifR = crate::BitReader; +impl RifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIF_A { + pub const fn variant(&self) -> Rif { match self.bits { - false => RIF_A::VALUE1, - true => RIF_A::VALUE2, + false => Rif::Value1, + true => Rif::Value2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIF_A::VALUE1 + *self == Rif::Value1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIF_A::VALUE2 + *self == Rif::Value2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; -impl<'a, REG> RIF_W<'a, REG> +pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; +impl<'a, REG> RifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE1) + self.variant(Rif::Value1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE2) + self.variant(Rif::Value2) } } -#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AIF_R = crate::BitReader; #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIF_A { +pub enum Aif { #[doc = "0: An alternative receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIF_A) -> Self { + fn from(variant: Aif) -> Self { variant as u8 != 0 } } -impl AIF_R { +#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] +pub type AifR = crate::BitReader; +impl AifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIF_A { + pub const fn variant(&self) -> Aif { match self.bits { - false => AIF_A::VALUE1, - true => AIF_A::VALUE2, + false => Aif::Value1, + true => Aif::Value2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIF_A::VALUE1 + *self == Aif::Value1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIF_A::VALUE2 + *self == Aif::Value2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; -impl<'a, REG> AIF_W<'a, REG> +pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; +impl<'a, REG> AifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE1) + self.variant(Aif::Value1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE2) + self.variant(Aif::Value2) } } -#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BRGIF_R = crate::BitReader; #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIF_A { +pub enum Brgif { #[doc = "0: A baud rate generator event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A baud rate generator event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIF_A) -> Self { + fn from(variant: Brgif) -> Self { variant as u8 != 0 } } -impl BRGIF_R { +#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] +pub type BrgifR = crate::BitReader; +impl BrgifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIF_A { + pub const fn variant(&self) -> Brgif { match self.bits { - false => BRGIF_A::VALUE1, - true => BRGIF_A::VALUE2, + false => Brgif::Value1, + true => Brgif::Value2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIF_A::VALUE1 + *self == Brgif::Value1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIF_A::VALUE2 + *self == Brgif::Value2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; -impl<'a, REG> BRGIF_W<'a, REG> +pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; +impl<'a, REG> BrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE1) + self.variant(Brgif::Value1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE2) + self.variant(Brgif::Value2) } } impl R { #[doc = "Bit 0 - Slave Select"] #[inline(always)] - pub fn slsel(&self) -> SLSEL_R { - SLSEL_R::new((self.bits & 1) != 0) + pub fn slsel(&self) -> SlselR { + SlselR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong TDF Code Found"] #[inline(always)] - pub fn wtdf(&self) -> WTDF_R { - WTDF_R::new(((self.bits >> 1) & 1) != 0) + pub fn wtdf(&self) -> WtdfR { + WtdfR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Start Condition Received"] #[inline(always)] - pub fn scr(&self) -> SCR_R { - SCR_R::new(((self.bits >> 2) & 1) != 0) + pub fn scr(&self) -> ScrR { + ScrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeated Start Condition Received"] #[inline(always)] - pub fn rscr(&self) -> RSCR_R { - RSCR_R::new(((self.bits >> 3) & 1) != 0) + pub fn rscr(&self) -> RscrR { + RscrR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Stop Condition Received"] #[inline(always)] - pub fn pcr(&self) -> PCR_R { - PCR_R::new(((self.bits >> 4) & 1) != 0) + pub fn pcr(&self) -> PcrR { + PcrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Non-Acknowledge Received"] #[inline(always)] - pub fn nack(&self) -> NACK_R { - NACK_R::new(((self.bits >> 5) & 1) != 0) + pub fn nack(&self) -> NackR { + NackR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Arbitration Lost"] #[inline(always)] - pub fn arl(&self) -> ARL_R { - ARL_R::new(((self.bits >> 6) & 1) != 0) + pub fn arl(&self) -> ArlR { + ArlR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Slave Read Request"] #[inline(always)] - pub fn srr(&self) -> SRR_R { - SRR_R::new(((self.bits >> 7) & 1) != 0) + pub fn srr(&self) -> SrrR { + SrrR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Error"] #[inline(always)] - pub fn err(&self) -> ERR_R { - ERR_R::new(((self.bits >> 8) & 1) != 0) + pub fn err(&self) -> ErrR { + ErrR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Acknowledge Received"] #[inline(always)] - pub fn ack(&self) -> ACK_R { - ACK_R::new(((self.bits >> 9) & 1) != 0) + pub fn ack(&self) -> AckR { + AckR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RSIF_R { - RSIF_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RsifR { + RsifR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DLIF_R { - DLIF_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DlifR { + DlifR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TSIF_R { - TSIF_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TsifR { + TsifR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TBIF_R { - TBIF_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TbifR { + TbifR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RIF_R { - RIF_R::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RifR { + RifR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AIF_R { - AIF_R::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AifR { + AifR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BRGIF_R { - BRGIF_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BrgifR { + BrgifR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Slave Select"] #[inline(always)] #[must_use] - pub fn slsel(&mut self) -> SLSEL_W { - SLSEL_W::new(self, 0) + pub fn slsel(&mut self) -> SlselW { + SlselW::new(self, 0) } #[doc = "Bit 1 - Wrong TDF Code Found"] #[inline(always)] #[must_use] - pub fn wtdf(&mut self) -> WTDF_W { - WTDF_W::new(self, 1) + pub fn wtdf(&mut self) -> WtdfW { + WtdfW::new(self, 1) } #[doc = "Bit 2 - Start Condition Received"] #[inline(always)] #[must_use] - pub fn scr(&mut self) -> SCR_W { - SCR_W::new(self, 2) + pub fn scr(&mut self) -> ScrW { + ScrW::new(self, 2) } #[doc = "Bit 3 - Repeated Start Condition Received"] #[inline(always)] #[must_use] - pub fn rscr(&mut self) -> RSCR_W { - RSCR_W::new(self, 3) + pub fn rscr(&mut self) -> RscrW { + RscrW::new(self, 3) } #[doc = "Bit 4 - Stop Condition Received"] #[inline(always)] #[must_use] - pub fn pcr(&mut self) -> PCR_W { - PCR_W::new(self, 4) + pub fn pcr(&mut self) -> PcrW { + PcrW::new(self, 4) } #[doc = "Bit 5 - Non-Acknowledge Received"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NACK_W { - NACK_W::new(self, 5) + pub fn nack(&mut self) -> NackW { + NackW::new(self, 5) } #[doc = "Bit 6 - Arbitration Lost"] #[inline(always)] #[must_use] - pub fn arl(&mut self) -> ARL_W { - ARL_W::new(self, 6) + pub fn arl(&mut self) -> ArlW { + ArlW::new(self, 6) } #[doc = "Bit 7 - Slave Read Request"] #[inline(always)] #[must_use] - pub fn srr(&mut self) -> SRR_W { - SRR_W::new(self, 7) + pub fn srr(&mut self) -> SrrW { + SrrW::new(self, 7) } #[doc = "Bit 8 - Error"] #[inline(always)] #[must_use] - pub fn err(&mut self) -> ERR_W { - ERR_W::new(self, 8) + pub fn err(&mut self) -> ErrW { + ErrW::new(self, 8) } #[doc = "Bit 9 - Acknowledge Received"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> ACK_W { - ACK_W::new(self, 9) + pub fn ack(&mut self) -> AckW { + AckW::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RSIF_W { - RSIF_W::new(self, 10) + pub fn rsif(&mut self) -> RsifW { + RsifW::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DLIF_W { - DLIF_W::new(self, 11) + pub fn dlif(&mut self) -> DlifW { + DlifW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TSIF_W { - TSIF_W::new(self, 12) + pub fn tsif(&mut self) -> TsifW { + TsifW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TBIF_W { - TBIF_W::new(self, 13) + pub fn tbif(&mut self) -> TbifW { + TbifW::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RIF_W { - RIF_W::new(self, 14) + pub fn rif(&mut self) -> RifW { + RifW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AIF_W { - AIF_W::new(self, 15) + pub fn aif(&mut self) -> AifW { + AifW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BRGIF_W { - BRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgif(&mut self) -> BrgifW { + BrgifW::new(self, 16) } } #[doc = "Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSR_IICMODE_SPEC; -impl crate::RegisterSpec for PSR_IICMODE_SPEC { +pub struct PsrIicmodeSpec; +impl crate::RegisterSpec for PsrIicmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`psr_iicmode::R`](R) reader structure"] -impl crate::Readable for PSR_IICMODE_SPEC {} +impl crate::Readable for PsrIicmodeSpec {} #[doc = "`write(|w| ..)` method takes [`psr_iicmode::W`](W) writer structure"] -impl crate::Writable for PSR_IICMODE_SPEC { +impl crate::Writable for PsrIicmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_IICMode to value 0"] -impl crate::Resettable for PSR_IICMODE_SPEC { +impl crate::Resettable for PsrIicmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_iismode.rs b/src/usic0_ch0/psr_iismode.rs index 335872ab..5dbb63c5 100644 --- a/src/usic0_ch0/psr_iismode.rs +++ b/src/usic0_ch0/psr_iismode.rs @@ -1,866 +1,857 @@ #[doc = "Register `PSR_IISMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_IISMode` writer"] -pub type W = crate::W; -#[doc = "Field `WA` reader - Word Address"] -pub type WA_R = crate::BitReader; +pub type W = crate::W; #[doc = "Word Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WA_A { +pub enum Wa { #[doc = "0: WA has been sampled 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: WA has been sampled 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WA_A) -> Self { + fn from(variant: Wa) -> Self { variant as u8 != 0 } } -impl WA_R { +#[doc = "Field `WA` reader - Word Address"] +pub type WaR = crate::BitReader; +impl WaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WA_A { + pub const fn variant(&self) -> Wa { match self.bits { - false => WA_A::VALUE1, - true => WA_A::VALUE2, + false => Wa::Value1, + true => Wa::Value2, } } #[doc = "WA has been sampled 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WA_A::VALUE1 + *self == Wa::Value1 } #[doc = "WA has been sampled 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WA_A::VALUE2 + *self == Wa::Value2 } } #[doc = "Field `WA` writer - Word Address"] -pub type WA_W<'a, REG> = crate::BitWriter<'a, REG, WA_A>; -impl<'a, REG> WA_W<'a, REG> +pub type WaW<'a, REG> = crate::BitWriter<'a, REG, Wa>; +impl<'a, REG> WaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "WA has been sampled 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WA_A::VALUE1) + self.variant(Wa::Value1) } #[doc = "WA has been sampled 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WA_A::VALUE2) + self.variant(Wa::Value2) } } -#[doc = "Field `DX2S` reader - DX2S Status"] -pub type DX2S_R = crate::BitReader; #[doc = "DX2S Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2S_A { +pub enum Dx2s { #[doc = "0: DX2S is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DX2S is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2S_A) -> Self { + fn from(variant: Dx2s) -> Self { variant as u8 != 0 } } -impl DX2S_R { +#[doc = "Field `DX2S` reader - DX2S Status"] +pub type Dx2sR = crate::BitReader; +impl Dx2sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2S_A { + pub const fn variant(&self) -> Dx2s { match self.bits { - false => DX2S_A::VALUE1, - true => DX2S_A::VALUE2, + false => Dx2s::Value1, + true => Dx2s::Value2, } } #[doc = "DX2S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2S_A::VALUE1 + *self == Dx2s::Value1 } #[doc = "DX2S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2S_A::VALUE2 + *self == Dx2s::Value2 } } #[doc = "Field `DX2S` writer - DX2S Status"] -pub type DX2S_W<'a, REG> = crate::BitWriter<'a, REG, DX2S_A>; -impl<'a, REG> DX2S_W<'a, REG> +pub type Dx2sW<'a, REG> = crate::BitWriter<'a, REG, Dx2s>; +impl<'a, REG> Dx2sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DX2S is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2S_A::VALUE1) + self.variant(Dx2s::Value1) } #[doc = "DX2S is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2S_A::VALUE2) + self.variant(Dx2s::Value2) } } -#[doc = "Field `DX2TEV` reader - DX2T Event Detected"] -pub type DX2TEV_R = crate::BitReader; #[doc = "DX2T Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2TEV_A { +pub enum Dx2tev { #[doc = "0: The DX2T signal has not been activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The DX2T signal has been activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2TEV_A) -> Self { + fn from(variant: Dx2tev) -> Self { variant as u8 != 0 } } -impl DX2TEV_R { +#[doc = "Field `DX2TEV` reader - DX2T Event Detected"] +pub type Dx2tevR = crate::BitReader; +impl Dx2tevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2TEV_A { + pub const fn variant(&self) -> Dx2tev { match self.bits { - false => DX2TEV_A::VALUE1, - true => DX2TEV_A::VALUE2, + false => Dx2tev::Value1, + true => Dx2tev::Value2, } } #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2TEV_A::VALUE1 + *self == Dx2tev::Value1 } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2TEV_A::VALUE2 + *self == Dx2tev::Value2 } } #[doc = "Field `DX2TEV` writer - DX2T Event Detected"] -pub type DX2TEV_W<'a, REG> = crate::BitWriter<'a, REG, DX2TEV_A>; -impl<'a, REG> DX2TEV_W<'a, REG> +pub type Dx2tevW<'a, REG> = crate::BitWriter<'a, REG, Dx2tev>; +impl<'a, REG> Dx2tevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2TEV_A::VALUE1) + self.variant(Dx2tev::Value1) } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2TEV_A::VALUE2) + self.variant(Dx2tev::Value2) } } -#[doc = "Field `WAFE` reader - WA Falling Edge Event"] -pub type WAFE_R = crate::BitReader; #[doc = "WA Falling Edge Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAFE_A { +pub enum Wafe { #[doc = "0: A WA falling edge has not been generated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A WA falling edge has been generated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAFE_A) -> Self { + fn from(variant: Wafe) -> Self { variant as u8 != 0 } } -impl WAFE_R { +#[doc = "Field `WAFE` reader - WA Falling Edge Event"] +pub type WafeR = crate::BitReader; +impl WafeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAFE_A { + pub const fn variant(&self) -> Wafe { match self.bits { - false => WAFE_A::VALUE1, - true => WAFE_A::VALUE2, + false => Wafe::Value1, + true => Wafe::Value2, } } #[doc = "A WA falling edge has not been generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAFE_A::VALUE1 + *self == Wafe::Value1 } #[doc = "A WA falling edge has been generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAFE_A::VALUE2 + *self == Wafe::Value2 } } #[doc = "Field `WAFE` writer - WA Falling Edge Event"] -pub type WAFE_W<'a, REG> = crate::BitWriter<'a, REG, WAFE_A>; -impl<'a, REG> WAFE_W<'a, REG> +pub type WafeW<'a, REG> = crate::BitWriter<'a, REG, Wafe>; +impl<'a, REG> WafeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A WA falling edge has not been generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAFE_A::VALUE1) + self.variant(Wafe::Value1) } #[doc = "A WA falling edge has been generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAFE_A::VALUE2) + self.variant(Wafe::Value2) } } -#[doc = "Field `WARE` reader - WA Rising Edge Event"] -pub type WARE_R = crate::BitReader; #[doc = "WA Rising Edge Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WARE_A { +pub enum Ware { #[doc = "0: A WA rising edge has not been generated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A WA rising edge has been generated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WARE_A) -> Self { + fn from(variant: Ware) -> Self { variant as u8 != 0 } } -impl WARE_R { +#[doc = "Field `WARE` reader - WA Rising Edge Event"] +pub type WareR = crate::BitReader; +impl WareR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WARE_A { + pub const fn variant(&self) -> Ware { match self.bits { - false => WARE_A::VALUE1, - true => WARE_A::VALUE2, + false => Ware::Value1, + true => Ware::Value2, } } #[doc = "A WA rising edge has not been generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WARE_A::VALUE1 + *self == Ware::Value1 } #[doc = "A WA rising edge has been generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WARE_A::VALUE2 + *self == Ware::Value2 } } #[doc = "Field `WARE` writer - WA Rising Edge Event"] -pub type WARE_W<'a, REG> = crate::BitWriter<'a, REG, WARE_A>; -impl<'a, REG> WARE_W<'a, REG> +pub type WareW<'a, REG> = crate::BitWriter<'a, REG, Ware>; +impl<'a, REG> WareW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A WA rising edge has not been generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WARE_A::VALUE1) + self.variant(Ware::Value1) } #[doc = "A WA rising edge has been generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WARE_A::VALUE2) + self.variant(Ware::Value2) } } -#[doc = "Field `END` reader - WA Generation End"] -pub type END_R = crate::BitReader; #[doc = "WA Generation End\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum END_A { +pub enum End { #[doc = "0: The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The WA generation has ended (if it has been running)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: END_A) -> Self { + fn from(variant: End) -> Self { variant as u8 != 0 } } -impl END_R { +#[doc = "Field `END` reader - WA Generation End"] +pub type EndR = crate::BitReader; +impl EndR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> END_A { + pub const fn variant(&self) -> End { match self.bits { - false => END_A::VALUE1, - true => END_A::VALUE2, + false => End::Value1, + true => End::Value2, } } #[doc = "The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == END_A::VALUE1 + *self == End::Value1 } #[doc = "The WA generation has ended (if it has been running)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == END_A::VALUE2 + *self == End::Value2 } } #[doc = "Field `END` writer - WA Generation End"] -pub type END_W<'a, REG> = crate::BitWriter<'a, REG, END_A>; -impl<'a, REG> END_W<'a, REG> +pub type EndW<'a, REG> = crate::BitWriter<'a, REG, End>; +impl<'a, REG> EndW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(END_A::VALUE1) + self.variant(End::Value1) } #[doc = "The WA generation has ended (if it has been running)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(END_A::VALUE2) + self.variant(End::Value2) } } -#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RSIF_R = crate::BitReader; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIF_A { +pub enum Rsif { #[doc = "0: A receiver start event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receiver start event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIF_A) -> Self { + fn from(variant: Rsif) -> Self { variant as u8 != 0 } } -impl RSIF_R { +#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] +pub type RsifR = crate::BitReader; +impl RsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIF_A { + pub const fn variant(&self) -> Rsif { match self.bits { - false => RSIF_A::VALUE1, - true => RSIF_A::VALUE2, + false => Rsif::Value1, + true => Rsif::Value2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIF_A::VALUE1 + *self == Rsif::Value1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIF_A::VALUE2 + *self == Rsif::Value2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; -impl<'a, REG> RSIF_W<'a, REG> +pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; +impl<'a, REG> RsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE1) + self.variant(Rsif::Value1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE2) + self.variant(Rsif::Value2) } } -#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DLIF_R = crate::BitReader; #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIF_A { +pub enum Dlif { #[doc = "0: A data lost event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data lost event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIF_A) -> Self { + fn from(variant: Dlif) -> Self { variant as u8 != 0 } } -impl DLIF_R { +#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] +pub type DlifR = crate::BitReader; +impl DlifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIF_A { + pub const fn variant(&self) -> Dlif { match self.bits { - false => DLIF_A::VALUE1, - true => DLIF_A::VALUE2, + false => Dlif::Value1, + true => Dlif::Value2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIF_A::VALUE1 + *self == Dlif::Value1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIF_A::VALUE2 + *self == Dlif::Value2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; -impl<'a, REG> DLIF_W<'a, REG> +pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; +impl<'a, REG> DlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE1) + self.variant(Dlif::Value1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE2) + self.variant(Dlif::Value2) } } -#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TSIF_R = crate::BitReader; #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIF_A { +pub enum Tsif { #[doc = "0: A transmit shift event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit shift event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIF_A) -> Self { + fn from(variant: Tsif) -> Self { variant as u8 != 0 } } -impl TSIF_R { +#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] +pub type TsifR = crate::BitReader; +impl TsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIF_A { + pub const fn variant(&self) -> Tsif { match self.bits { - false => TSIF_A::VALUE1, - true => TSIF_A::VALUE2, + false => Tsif::Value1, + true => Tsif::Value2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIF_A::VALUE1 + *self == Tsif::Value1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIF_A::VALUE2 + *self == Tsif::Value2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; -impl<'a, REG> TSIF_W<'a, REG> +pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; +impl<'a, REG> TsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE1) + self.variant(Tsif::Value1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE2) + self.variant(Tsif::Value2) } } -#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TBIF_R = crate::BitReader; #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIF_A { +pub enum Tbif { #[doc = "0: A transmit buffer event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIF_A) -> Self { + fn from(variant: Tbif) -> Self { variant as u8 != 0 } } -impl TBIF_R { +#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] +pub type TbifR = crate::BitReader; +impl TbifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIF_A { + pub const fn variant(&self) -> Tbif { match self.bits { - false => TBIF_A::VALUE1, - true => TBIF_A::VALUE2, + false => Tbif::Value1, + true => Tbif::Value2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIF_A::VALUE1 + *self == Tbif::Value1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIF_A::VALUE2 + *self == Tbif::Value2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; -impl<'a, REG> TBIF_W<'a, REG> +pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; +impl<'a, REG> TbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE1) + self.variant(Tbif::Value1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE2) + self.variant(Tbif::Value2) } } -#[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RIF_R = crate::BitReader; #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIF_A { +pub enum Rif { #[doc = "0: A receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIF_A) -> Self { + fn from(variant: Rif) -> Self { variant as u8 != 0 } } -impl RIF_R { +#[doc = "Field `RIF` reader - Receive Indication Flag"] +pub type RifR = crate::BitReader; +impl RifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIF_A { + pub const fn variant(&self) -> Rif { match self.bits { - false => RIF_A::VALUE1, - true => RIF_A::VALUE2, + false => Rif::Value1, + true => Rif::Value2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIF_A::VALUE1 + *self == Rif::Value1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIF_A::VALUE2 + *self == Rif::Value2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; -impl<'a, REG> RIF_W<'a, REG> +pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; +impl<'a, REG> RifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE1) + self.variant(Rif::Value1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE2) + self.variant(Rif::Value2) } } -#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AIF_R = crate::BitReader; #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIF_A { +pub enum Aif { #[doc = "0: An alternative receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIF_A) -> Self { + fn from(variant: Aif) -> Self { variant as u8 != 0 } } -impl AIF_R { +#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] +pub type AifR = crate::BitReader; +impl AifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIF_A { + pub const fn variant(&self) -> Aif { match self.bits { - false => AIF_A::VALUE1, - true => AIF_A::VALUE2, + false => Aif::Value1, + true => Aif::Value2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIF_A::VALUE1 + *self == Aif::Value1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIF_A::VALUE2 + *self == Aif::Value2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; -impl<'a, REG> AIF_W<'a, REG> +pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; +impl<'a, REG> AifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE1) + self.variant(Aif::Value1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE2) + self.variant(Aif::Value2) } } -#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BRGIF_R = crate::BitReader; #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIF_A { +pub enum Brgif { #[doc = "0: A baud rate generator event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A baud rate generator event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIF_A) -> Self { + fn from(variant: Brgif) -> Self { variant as u8 != 0 } } -impl BRGIF_R { +#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] +pub type BrgifR = crate::BitReader; +impl BrgifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIF_A { + pub const fn variant(&self) -> Brgif { match self.bits { - false => BRGIF_A::VALUE1, - true => BRGIF_A::VALUE2, + false => Brgif::Value1, + true => Brgif::Value2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIF_A::VALUE1 + *self == Brgif::Value1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIF_A::VALUE2 + *self == Brgif::Value2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; -impl<'a, REG> BRGIF_W<'a, REG> +pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; +impl<'a, REG> BrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE1) + self.variant(Brgif::Value1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE2) + self.variant(Brgif::Value2) } } impl R { #[doc = "Bit 0 - Word Address"] #[inline(always)] - pub fn wa(&self) -> WA_R { - WA_R::new((self.bits & 1) != 0) + pub fn wa(&self) -> WaR { + WaR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - pub fn dx2s(&self) -> DX2S_R { - DX2S_R::new(((self.bits >> 1) & 1) != 0) + pub fn dx2s(&self) -> Dx2sR { + Dx2sR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - pub fn dx2tev(&self) -> DX2TEV_R { - DX2TEV_R::new(((self.bits >> 3) & 1) != 0) + pub fn dx2tev(&self) -> Dx2tevR { + Dx2tevR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - WA Falling Edge Event"] #[inline(always)] - pub fn wafe(&self) -> WAFE_R { - WAFE_R::new(((self.bits >> 4) & 1) != 0) + pub fn wafe(&self) -> WafeR { + WafeR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WA Rising Edge Event"] #[inline(always)] - pub fn ware(&self) -> WARE_R { - WARE_R::new(((self.bits >> 5) & 1) != 0) + pub fn ware(&self) -> WareR { + WareR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - WA Generation End"] #[inline(always)] - pub fn end(&self) -> END_R { - END_R::new(((self.bits >> 6) & 1) != 0) + pub fn end(&self) -> EndR { + EndR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RSIF_R { - RSIF_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RsifR { + RsifR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DLIF_R { - DLIF_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DlifR { + DlifR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TSIF_R { - TSIF_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TsifR { + TsifR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TBIF_R { - TBIF_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TbifR { + TbifR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RIF_R { - RIF_R::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RifR { + RifR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AIF_R { - AIF_R::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AifR { + AifR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BRGIF_R { - BRGIF_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BrgifR { + BrgifR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Word Address"] #[inline(always)] #[must_use] - pub fn wa(&mut self) -> WA_W { - WA_W::new(self, 0) + pub fn wa(&mut self) -> WaW { + WaW::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] #[must_use] - pub fn dx2s(&mut self) -> DX2S_W { - DX2S_W::new(self, 1) + pub fn dx2s(&mut self) -> Dx2sW { + Dx2sW::new(self, 1) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] #[must_use] - pub fn dx2tev(&mut self) -> DX2TEV_W { - DX2TEV_W::new(self, 3) + pub fn dx2tev(&mut self) -> Dx2tevW { + Dx2tevW::new(self, 3) } #[doc = "Bit 4 - WA Falling Edge Event"] #[inline(always)] #[must_use] - pub fn wafe(&mut self) -> WAFE_W { - WAFE_W::new(self, 4) + pub fn wafe(&mut self) -> WafeW { + WafeW::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Event"] #[inline(always)] #[must_use] - pub fn ware(&mut self) -> WARE_W { - WARE_W::new(self, 5) + pub fn ware(&mut self) -> WareW { + WareW::new(self, 5) } #[doc = "Bit 6 - WA Generation End"] #[inline(always)] #[must_use] - pub fn end(&mut self) -> END_W { - END_W::new(self, 6) + pub fn end(&mut self) -> EndW { + EndW::new(self, 6) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RSIF_W { - RSIF_W::new(self, 10) + pub fn rsif(&mut self) -> RsifW { + RsifW::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DLIF_W { - DLIF_W::new(self, 11) + pub fn dlif(&mut self) -> DlifW { + DlifW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TSIF_W { - TSIF_W::new(self, 12) + pub fn tsif(&mut self) -> TsifW { + TsifW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TBIF_W { - TBIF_W::new(self, 13) + pub fn tbif(&mut self) -> TbifW { + TbifW::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RIF_W { - RIF_W::new(self, 14) + pub fn rif(&mut self) -> RifW { + RifW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AIF_W { - AIF_W::new(self, 15) + pub fn aif(&mut self) -> AifW { + AifW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BRGIF_W { - BRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgif(&mut self) -> BrgifW { + BrgifW::new(self, 16) } } #[doc = "Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSR_IISMODE_SPEC; -impl crate::RegisterSpec for PSR_IISMODE_SPEC { +pub struct PsrIismodeSpec; +impl crate::RegisterSpec for PsrIismodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`psr_iismode::R`](R) reader structure"] -impl crate::Readable for PSR_IISMODE_SPEC {} +impl crate::Readable for PsrIismodeSpec {} #[doc = "`write(|w| ..)` method takes [`psr_iismode::W`](W) writer structure"] -impl crate::Writable for PSR_IISMODE_SPEC { +impl crate::Writable for PsrIismodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_IISMode to value 0"] -impl crate::Resettable for PSR_IISMODE_SPEC { +impl crate::Resettable for PsrIismodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_sscmode.rs b/src/usic0_ch0/psr_sscmode.rs index 7304d41b..59a66def 100644 --- a/src/usic0_ch0/psr_sscmode.rs +++ b/src/usic0_ch0/psr_sscmode.rs @@ -1,802 +1,793 @@ #[doc = "Register `PSR_SSCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_SSCMode` writer"] -pub type W = crate::W; -#[doc = "Field `MSLS` reader - MSLS Status"] -pub type MSLS_R = crate::BitReader; +pub type W = crate::W; #[doc = "MSLS Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSLS_A { +pub enum Msls { #[doc = "0: The internal signal MSLS is inactive (0)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The internal signal MSLS is active (1)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSLS_A) -> Self { + fn from(variant: Msls) -> Self { variant as u8 != 0 } } -impl MSLS_R { +#[doc = "Field `MSLS` reader - MSLS Status"] +pub type MslsR = crate::BitReader; +impl MslsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSLS_A { + pub const fn variant(&self) -> Msls { match self.bits { - false => MSLS_A::VALUE1, - true => MSLS_A::VALUE2, + false => Msls::Value1, + true => Msls::Value2, } } #[doc = "The internal signal MSLS is inactive (0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSLS_A::VALUE1 + *self == Msls::Value1 } #[doc = "The internal signal MSLS is active (1)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSLS_A::VALUE2 + *self == Msls::Value2 } } #[doc = "Field `MSLS` writer - MSLS Status"] -pub type MSLS_W<'a, REG> = crate::BitWriter<'a, REG, MSLS_A>; -impl<'a, REG> MSLS_W<'a, REG> +pub type MslsW<'a, REG> = crate::BitWriter<'a, REG, Msls>; +impl<'a, REG> MslsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The internal signal MSLS is inactive (0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSLS_A::VALUE1) + self.variant(Msls::Value1) } #[doc = "The internal signal MSLS is active (1)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSLS_A::VALUE2) + self.variant(Msls::Value2) } } -#[doc = "Field `DX2S` reader - DX2S Status"] -pub type DX2S_R = crate::BitReader; #[doc = "DX2S Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2S_A { +pub enum Dx2s { #[doc = "0: DX2S is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DX2S is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2S_A) -> Self { + fn from(variant: Dx2s) -> Self { variant as u8 != 0 } } -impl DX2S_R { +#[doc = "Field `DX2S` reader - DX2S Status"] +pub type Dx2sR = crate::BitReader; +impl Dx2sR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2S_A { + pub const fn variant(&self) -> Dx2s { match self.bits { - false => DX2S_A::VALUE1, - true => DX2S_A::VALUE2, + false => Dx2s::Value1, + true => Dx2s::Value2, } } #[doc = "DX2S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2S_A::VALUE1 + *self == Dx2s::Value1 } #[doc = "DX2S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2S_A::VALUE2 + *self == Dx2s::Value2 } } #[doc = "Field `DX2S` writer - DX2S Status"] -pub type DX2S_W<'a, REG> = crate::BitWriter<'a, REG, DX2S_A>; -impl<'a, REG> DX2S_W<'a, REG> +pub type Dx2sW<'a, REG> = crate::BitWriter<'a, REG, Dx2s>; +impl<'a, REG> Dx2sW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DX2S is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2S_A::VALUE1) + self.variant(Dx2s::Value1) } #[doc = "DX2S is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2S_A::VALUE2) + self.variant(Dx2s::Value2) } } -#[doc = "Field `MSLSEV` reader - MSLS Event Detected"] -pub type MSLSEV_R = crate::BitReader; #[doc = "MSLS Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MSLSEV_A { +pub enum Mslsev { #[doc = "0: The MSLS signal has not changed its state."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The MSLS signal has changed its state."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MSLSEV_A) -> Self { + fn from(variant: Mslsev) -> Self { variant as u8 != 0 } } -impl MSLSEV_R { +#[doc = "Field `MSLSEV` reader - MSLS Event Detected"] +pub type MslsevR = crate::BitReader; +impl MslsevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> MSLSEV_A { + pub const fn variant(&self) -> Mslsev { match self.bits { - false => MSLSEV_A::VALUE1, - true => MSLSEV_A::VALUE2, + false => Mslsev::Value1, + true => Mslsev::Value2, } } #[doc = "The MSLS signal has not changed its state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == MSLSEV_A::VALUE1 + *self == Mslsev::Value1 } #[doc = "The MSLS signal has changed its state."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == MSLSEV_A::VALUE2 + *self == Mslsev::Value2 } } #[doc = "Field `MSLSEV` writer - MSLS Event Detected"] -pub type MSLSEV_W<'a, REG> = crate::BitWriter<'a, REG, MSLSEV_A>; -impl<'a, REG> MSLSEV_W<'a, REG> +pub type MslsevW<'a, REG> = crate::BitWriter<'a, REG, Mslsev>; +impl<'a, REG> MslsevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MSLS signal has not changed its state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MSLSEV_A::VALUE1) + self.variant(Mslsev::Value1) } #[doc = "The MSLS signal has changed its state."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MSLSEV_A::VALUE2) + self.variant(Mslsev::Value2) } } -#[doc = "Field `DX2TEV` reader - DX2T Event Detected"] -pub type DX2TEV_R = crate::BitReader; #[doc = "DX2T Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DX2TEV_A { +pub enum Dx2tev { #[doc = "0: The DX2T signal has not been activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The DX2T signal has been activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DX2TEV_A) -> Self { + fn from(variant: Dx2tev) -> Self { variant as u8 != 0 } } -impl DX2TEV_R { +#[doc = "Field `DX2TEV` reader - DX2T Event Detected"] +pub type Dx2tevR = crate::BitReader; +impl Dx2tevR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DX2TEV_A { + pub const fn variant(&self) -> Dx2tev { match self.bits { - false => DX2TEV_A::VALUE1, - true => DX2TEV_A::VALUE2, + false => Dx2tev::Value1, + true => Dx2tev::Value2, } } #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DX2TEV_A::VALUE1 + *self == Dx2tev::Value1 } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DX2TEV_A::VALUE2 + *self == Dx2tev::Value2 } } #[doc = "Field `DX2TEV` writer - DX2T Event Detected"] -pub type DX2TEV_W<'a, REG> = crate::BitWriter<'a, REG, DX2TEV_A>; -impl<'a, REG> DX2TEV_W<'a, REG> +pub type Dx2tevW<'a, REG> = crate::BitWriter<'a, REG, Dx2tev>; +impl<'a, REG> Dx2tevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DX2TEV_A::VALUE1) + self.variant(Dx2tev::Value1) } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DX2TEV_A::VALUE2) + self.variant(Dx2tev::Value2) } } -#[doc = "Field `PARERR` reader - Parity Error Event Detected"] -pub type PARERR_R = crate::BitReader; #[doc = "Parity Error Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PARERR_A { +pub enum Parerr { #[doc = "0: A parity error event has not been activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A parity error event has been activated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PARERR_A) -> Self { + fn from(variant: Parerr) -> Self { variant as u8 != 0 } } -impl PARERR_R { +#[doc = "Field `PARERR` reader - Parity Error Event Detected"] +pub type ParerrR = crate::BitReader; +impl ParerrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PARERR_A { + pub const fn variant(&self) -> Parerr { match self.bits { - false => PARERR_A::VALUE1, - true => PARERR_A::VALUE2, + false => Parerr::Value1, + true => Parerr::Value2, } } #[doc = "A parity error event has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PARERR_A::VALUE1 + *self == Parerr::Value1 } #[doc = "A parity error event has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PARERR_A::VALUE2 + *self == Parerr::Value2 } } #[doc = "Field `PARERR` writer - Parity Error Event Detected"] -pub type PARERR_W<'a, REG> = crate::BitWriter<'a, REG, PARERR_A>; -impl<'a, REG> PARERR_W<'a, REG> +pub type ParerrW<'a, REG> = crate::BitWriter<'a, REG, Parerr>; +impl<'a, REG> ParerrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A parity error event has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PARERR_A::VALUE1) + self.variant(Parerr::Value1) } #[doc = "A parity error event has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PARERR_A::VALUE2) + self.variant(Parerr::Value2) } } -#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RSIF_R = crate::BitReader; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RSIF_A { +pub enum Rsif { #[doc = "0: A receiver start event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receiver start event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RSIF_A) -> Self { + fn from(variant: Rsif) -> Self { variant as u8 != 0 } } -impl RSIF_R { +#[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] +pub type RsifR = crate::BitReader; +impl RsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RSIF_A { + pub const fn variant(&self) -> Rsif { match self.bits { - false => RSIF_A::VALUE1, - true => RSIF_A::VALUE2, + false => Rsif::Value1, + true => Rsif::Value2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RSIF_A::VALUE1 + *self == Rsif::Value1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RSIF_A::VALUE2 + *self == Rsif::Value2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; -impl<'a, REG> RSIF_W<'a, REG> +pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; +impl<'a, REG> RsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE1) + self.variant(Rsif::Value1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RSIF_A::VALUE2) + self.variant(Rsif::Value2) } } -#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DLIF_R = crate::BitReader; #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DLIF_A { +pub enum Dlif { #[doc = "0: A data lost event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A data lost event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DLIF_A) -> Self { + fn from(variant: Dlif) -> Self { variant as u8 != 0 } } -impl DLIF_R { +#[doc = "Field `DLIF` reader - Data Lost Indication Flag"] +pub type DlifR = crate::BitReader; +impl DlifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DLIF_A { + pub const fn variant(&self) -> Dlif { match self.bits { - false => DLIF_A::VALUE1, - true => DLIF_A::VALUE2, + false => Dlif::Value1, + true => Dlif::Value2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DLIF_A::VALUE1 + *self == Dlif::Value1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DLIF_A::VALUE2 + *self == Dlif::Value2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; -impl<'a, REG> DLIF_W<'a, REG> +pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; +impl<'a, REG> DlifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE1) + self.variant(Dlif::Value1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DLIF_A::VALUE2) + self.variant(Dlif::Value2) } } -#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TSIF_R = crate::BitReader; #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSIF_A { +pub enum Tsif { #[doc = "0: A transmit shift event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit shift event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSIF_A) -> Self { + fn from(variant: Tsif) -> Self { variant as u8 != 0 } } -impl TSIF_R { +#[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] +pub type TsifR = crate::BitReader; +impl TsifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSIF_A { + pub const fn variant(&self) -> Tsif { match self.bits { - false => TSIF_A::VALUE1, - true => TSIF_A::VALUE2, + false => Tsif::Value1, + true => Tsif::Value2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSIF_A::VALUE1 + *self == Tsif::Value1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSIF_A::VALUE2 + *self == Tsif::Value2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; -impl<'a, REG> TSIF_W<'a, REG> +pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; +impl<'a, REG> TsifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE1) + self.variant(Tsif::Value1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TSIF_A::VALUE2) + self.variant(Tsif::Value2) } } -#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TBIF_R = crate::BitReader; #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBIF_A { +pub enum Tbif { #[doc = "0: A transmit buffer event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBIF_A) -> Self { + fn from(variant: Tbif) -> Self { variant as u8 != 0 } } -impl TBIF_R { +#[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] +pub type TbifR = crate::BitReader; +impl TbifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBIF_A { + pub const fn variant(&self) -> Tbif { match self.bits { - false => TBIF_A::VALUE1, - true => TBIF_A::VALUE2, + false => Tbif::Value1, + true => Tbif::Value2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBIF_A::VALUE1 + *self == Tbif::Value1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBIF_A::VALUE2 + *self == Tbif::Value2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; -impl<'a, REG> TBIF_W<'a, REG> +pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; +impl<'a, REG> TbifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE1) + self.variant(Tbif::Value1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBIF_A::VALUE2) + self.variant(Tbif::Value2) } } -#[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RIF_R = crate::BitReader; #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RIF_A { +pub enum Rif { #[doc = "0: A receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RIF_A) -> Self { + fn from(variant: Rif) -> Self { variant as u8 != 0 } } -impl RIF_R { +#[doc = "Field `RIF` reader - Receive Indication Flag"] +pub type RifR = crate::BitReader; +impl RifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RIF_A { + pub const fn variant(&self) -> Rif { match self.bits { - false => RIF_A::VALUE1, - true => RIF_A::VALUE2, + false => Rif::Value1, + true => Rif::Value2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RIF_A::VALUE1 + *self == Rif::Value1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RIF_A::VALUE2 + *self == Rif::Value2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; -impl<'a, REG> RIF_W<'a, REG> +pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; +impl<'a, REG> RifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE1) + self.variant(Rif::Value1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RIF_A::VALUE2) + self.variant(Rif::Value2) } } -#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AIF_R = crate::BitReader; #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AIF_A { +pub enum Aif { #[doc = "0: An alternative receive event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AIF_A) -> Self { + fn from(variant: Aif) -> Self { variant as u8 != 0 } } -impl AIF_R { +#[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] +pub type AifR = crate::BitReader; +impl AifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> AIF_A { + pub const fn variant(&self) -> Aif { match self.bits { - false => AIF_A::VALUE1, - true => AIF_A::VALUE2, + false => Aif::Value1, + true => Aif::Value2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == AIF_A::VALUE1 + *self == Aif::Value1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == AIF_A::VALUE2 + *self == Aif::Value2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; -impl<'a, REG> AIF_W<'a, REG> +pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; +impl<'a, REG> AifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE1) + self.variant(Aif::Value1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AIF_A::VALUE2) + self.variant(Aif::Value2) } } -#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BRGIF_R = crate::BitReader; #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BRGIF_A { +pub enum Brgif { #[doc = "0: A baud rate generator event has not occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A baud rate generator event has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BRGIF_A) -> Self { + fn from(variant: Brgif) -> Self { variant as u8 != 0 } } -impl BRGIF_R { +#[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] +pub type BrgifR = crate::BitReader; +impl BrgifR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BRGIF_A { + pub const fn variant(&self) -> Brgif { match self.bits { - false => BRGIF_A::VALUE1, - true => BRGIF_A::VALUE2, + false => Brgif::Value1, + true => Brgif::Value2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BRGIF_A::VALUE1 + *self == Brgif::Value1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BRGIF_A::VALUE2 + *self == Brgif::Value2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; -impl<'a, REG> BRGIF_W<'a, REG> +pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; +impl<'a, REG> BrgifW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE1) + self.variant(Brgif::Value1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BRGIF_A::VALUE2) + self.variant(Brgif::Value2) } } impl R { #[doc = "Bit 0 - MSLS Status"] #[inline(always)] - pub fn msls(&self) -> MSLS_R { - MSLS_R::new((self.bits & 1) != 0) + pub fn msls(&self) -> MslsR { + MslsR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - pub fn dx2s(&self) -> DX2S_R { - DX2S_R::new(((self.bits >> 1) & 1) != 0) + pub fn dx2s(&self) -> Dx2sR { + Dx2sR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MSLS Event Detected"] #[inline(always)] - pub fn mslsev(&self) -> MSLSEV_R { - MSLSEV_R::new(((self.bits >> 2) & 1) != 0) + pub fn mslsev(&self) -> MslsevR { + MslsevR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - pub fn dx2tev(&self) -> DX2TEV_R { - DX2TEV_R::new(((self.bits >> 3) & 1) != 0) + pub fn dx2tev(&self) -> Dx2tevR { + Dx2tevR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Event Detected"] #[inline(always)] - pub fn parerr(&self) -> PARERR_R { - PARERR_R::new(((self.bits >> 4) & 1) != 0) + pub fn parerr(&self) -> ParerrR { + ParerrR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RSIF_R { - RSIF_R::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RsifR { + RsifR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DLIF_R { - DLIF_R::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DlifR { + DlifR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TSIF_R { - TSIF_R::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TsifR { + TsifR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TBIF_R { - TBIF_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TbifR { + TbifR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RIF_R { - RIF_R::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RifR { + RifR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AIF_R { - AIF_R::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AifR { + AifR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BRGIF_R { - BRGIF_R::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BrgifR { + BrgifR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - MSLS Status"] #[inline(always)] #[must_use] - pub fn msls(&mut self) -> MSLS_W { - MSLS_W::new(self, 0) + pub fn msls(&mut self) -> MslsW { + MslsW::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] #[must_use] - pub fn dx2s(&mut self) -> DX2S_W { - DX2S_W::new(self, 1) + pub fn dx2s(&mut self) -> Dx2sW { + Dx2sW::new(self, 1) } #[doc = "Bit 2 - MSLS Event Detected"] #[inline(always)] #[must_use] - pub fn mslsev(&mut self) -> MSLSEV_W { - MSLSEV_W::new(self, 2) + pub fn mslsev(&mut self) -> MslsevW { + MslsevW::new(self, 2) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] #[must_use] - pub fn dx2tev(&mut self) -> DX2TEV_W { - DX2TEV_W::new(self, 3) + pub fn dx2tev(&mut self) -> Dx2tevW { + Dx2tevW::new(self, 3) } #[doc = "Bit 4 - Parity Error Event Detected"] #[inline(always)] #[must_use] - pub fn parerr(&mut self) -> PARERR_W { - PARERR_W::new(self, 4) + pub fn parerr(&mut self) -> ParerrW { + ParerrW::new(self, 4) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RSIF_W { - RSIF_W::new(self, 10) + pub fn rsif(&mut self) -> RsifW { + RsifW::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DLIF_W { - DLIF_W::new(self, 11) + pub fn dlif(&mut self) -> DlifW { + DlifW::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TSIF_W { - TSIF_W::new(self, 12) + pub fn tsif(&mut self) -> TsifW { + TsifW::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TBIF_W { - TBIF_W::new(self, 13) + pub fn tbif(&mut self) -> TbifW { + TbifW::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RIF_W { - RIF_W::new(self, 14) + pub fn rif(&mut self) -> RifW { + RifW::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AIF_W { - AIF_W::new(self, 15) + pub fn aif(&mut self) -> AifW { + AifW::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BRGIF_W { - BRGIF_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn brgif(&mut self) -> BrgifW { + BrgifW::new(self, 16) } } #[doc = "Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PSR_SSCMODE_SPEC; -impl crate::RegisterSpec for PSR_SSCMODE_SPEC { +pub struct PsrSscmodeSpec; +impl crate::RegisterSpec for PsrSscmodeSpec { type Ux = u32; } #[doc = "`read()` method returns [`psr_sscmode::R`](R) reader structure"] -impl crate::Readable for PSR_SSCMODE_SPEC {} +impl crate::Readable for PsrSscmodeSpec {} #[doc = "`write(|w| ..)` method takes [`psr_sscmode::W`](W) writer structure"] -impl crate::Writable for PSR_SSCMODE_SPEC { +impl crate::Writable for PsrSscmodeSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_SSCMode to value 0"] -impl crate::Resettable for PSR_SSCMODE_SPEC { +impl crate::Resettable for PsrSscmodeSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbctr.rs b/src/usic0_ch0/rbctr.rs index b6417cfe..808dcb9b 100644 --- a/src/usic0_ch0/rbctr.rs +++ b/src/usic0_ch0/rbctr.rs @@ -1,195 +1,195 @@ #[doc = "Register `RBCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RBCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DPTR` writer - Data Pointer"] -pub type DPTR_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type DptrW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LIMIT` reader - Limit For Interrupt Generation"] -pub type LIMIT_R = crate::FieldReader; +pub type LimitR = crate::FieldReader; #[doc = "Field `LIMIT` writer - Limit For Interrupt Generation"] -pub type LIMIT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `SRBTM` reader - Standard Receive Buffer Trigger Mode"] -pub type SRBTM_R = crate::BitReader; +pub type LimitW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Standard Receive Buffer Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRBTM_A { +pub enum Srbtm { #[doc = "0: Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRBTM_A) -> Self { + fn from(variant: Srbtm) -> Self { variant as u8 != 0 } } -impl SRBTM_R { +#[doc = "Field `SRBTM` reader - Standard Receive Buffer Trigger Mode"] +pub type SrbtmR = crate::BitReader; +impl SrbtmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRBTM_A { + pub const fn variant(&self) -> Srbtm { match self.bits { - false => SRBTM_A::VALUE1, - true => SRBTM_A::VALUE2, + false => Srbtm::Value1, + true => Srbtm::Value2, } } #[doc = "Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBTM_A::VALUE1 + *self == Srbtm::Value1 } #[doc = "Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBTM_A::VALUE2 + *self == Srbtm::Value2 } } #[doc = "Field `SRBTM` writer - Standard Receive Buffer Trigger Mode"] -pub type SRBTM_W<'a, REG> = crate::BitWriter<'a, REG, SRBTM_A>; -impl<'a, REG> SRBTM_W<'a, REG> +pub type SrbtmW<'a, REG> = crate::BitWriter<'a, REG, Srbtm>; +impl<'a, REG> SrbtmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRBTM_A::VALUE1) + self.variant(Srbtm::Value1) } #[doc = "Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRBTM_A::VALUE2) + self.variant(Srbtm::Value2) } } -#[doc = "Field `SRBTEN` reader - Standard Receive Buffer Trigger Enable"] -pub type SRBTEN_R = crate::BitReader; #[doc = "Standard Receive Buffer Trigger Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRBTEN_A { +pub enum Srbten { #[doc = "0: The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRBTEN_A) -> Self { + fn from(variant: Srbten) -> Self { variant as u8 != 0 } } -impl SRBTEN_R { +#[doc = "Field `SRBTEN` reader - Standard Receive Buffer Trigger Enable"] +pub type SrbtenR = crate::BitReader; +impl SrbtenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRBTEN_A { + pub const fn variant(&self) -> Srbten { match self.bits { - false => SRBTEN_A::VALUE1, - true => SRBTEN_A::VALUE2, + false => Srbten::Value1, + true => Srbten::Value2, } } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBTEN_A::VALUE1 + *self == Srbten::Value1 } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBTEN_A::VALUE2 + *self == Srbten::Value2 } } #[doc = "Field `SRBTEN` writer - Standard Receive Buffer Trigger Enable"] -pub type SRBTEN_W<'a, REG> = crate::BitWriter<'a, REG, SRBTEN_A>; -impl<'a, REG> SRBTEN_W<'a, REG> +pub type SrbtenW<'a, REG> = crate::BitWriter<'a, REG, Srbten>; +impl<'a, REG> SrbtenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRBTEN_A::VALUE1) + self.variant(Srbten::Value1) } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRBTEN_A::VALUE2) + self.variant(Srbten::Value2) } } -#[doc = "Field `SRBINP` reader - Standard Receive Buffer Interrupt Node Pointer"] -pub type SRBINP_R = crate::FieldReader; #[doc = "Standard Receive Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRBINP_A { +pub enum Srbinp { #[doc = "0: Output SR0 becomes activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output SR1 becomes activated."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Output SR2 becomes activated."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Output SR3 becomes activated."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Output SR4 becomes activated."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Output SR5 becomes activated."] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRBINP_A) -> Self { + fn from(variant: Srbinp) -> Self { variant as _ } } -impl crate::FieldSpec for SRBINP_A { +impl crate::FieldSpec for Srbinp { type Ux = u8; } -impl SRBINP_R { +#[doc = "Field `SRBINP` reader - Standard Receive Buffer Interrupt Node Pointer"] +pub type SrbinpR = crate::FieldReader; +impl SrbinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRBINP_A::VALUE1), - 1 => Some(SRBINP_A::VALUE2), - 2 => Some(SRBINP_A::VALUE3), - 3 => Some(SRBINP_A::VALUE4), - 4 => Some(SRBINP_A::VALUE5), - 5 => Some(SRBINP_A::VALUE6), + 0 => Some(Srbinp::Value1), + 1 => Some(Srbinp::Value2), + 2 => Some(Srbinp::Value3), + 3 => Some(Srbinp::Value4), + 4 => Some(Srbinp::Value5), + 5 => Some(Srbinp::Value6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBINP_A::VALUE1 + *self == Srbinp::Value1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBINP_A::VALUE2 + *self == Srbinp::Value2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SRBINP_A::VALUE3 + *self == Srbinp::Value3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SRBINP_A::VALUE4 + *self == Srbinp::Value4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SRBINP_A::VALUE5 + *self == Srbinp::Value5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SRBINP_A::VALUE6 + *self == Srbinp::Value6 } } #[doc = "Field `SRBINP` writer - Standard Receive Buffer Interrupt Node Pointer"] -pub type SRBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SRBINP_A>; -impl<'a, REG> SRBINP_W<'a, REG> +pub type SrbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Srbinp>; +impl<'a, REG> SrbinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -197,110 +197,110 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE1) + self.variant(Srbinp::Value1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE2) + self.variant(Srbinp::Value2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE3) + self.variant(Srbinp::Value3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE4) + self.variant(Srbinp::Value4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE5) + self.variant(Srbinp::Value5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SRBINP_A::VALUE6) + self.variant(Srbinp::Value6) } } -#[doc = "Field `ARBINP` reader - Alternative Receive Buffer Interrupt Node Pointer"] -pub type ARBINP_R = crate::FieldReader; #[doc = "Alternative Receive Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBINP_A { +pub enum Arbinp { #[doc = "0: Output SR0 becomes activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output SR1 becomes activated."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Output SR2 becomes activated."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Output SR3 becomes activated."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Output SR4 becomes activated."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Output SR5 becomes activated."] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBINP_A) -> Self { + fn from(variant: Arbinp) -> Self { variant as _ } } -impl crate::FieldSpec for ARBINP_A { +impl crate::FieldSpec for Arbinp { type Ux = u8; } -impl ARBINP_R { +#[doc = "Field `ARBINP` reader - Alternative Receive Buffer Interrupt Node Pointer"] +pub type ArbinpR = crate::FieldReader; +impl ArbinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ARBINP_A::VALUE1), - 1 => Some(ARBINP_A::VALUE2), - 2 => Some(ARBINP_A::VALUE3), - 3 => Some(ARBINP_A::VALUE4), - 4 => Some(ARBINP_A::VALUE5), - 5 => Some(ARBINP_A::VALUE6), + 0 => Some(Arbinp::Value1), + 1 => Some(Arbinp::Value2), + 2 => Some(Arbinp::Value3), + 3 => Some(Arbinp::Value4), + 4 => Some(Arbinp::Value5), + 5 => Some(Arbinp::Value6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBINP_A::VALUE1 + *self == Arbinp::Value1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBINP_A::VALUE2 + *self == Arbinp::Value2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ARBINP_A::VALUE3 + *self == Arbinp::Value3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ARBINP_A::VALUE4 + *self == Arbinp::Value4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == ARBINP_A::VALUE5 + *self == Arbinp::Value5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == ARBINP_A::VALUE6 + *self == Arbinp::Value6 } } #[doc = "Field `ARBINP` writer - Alternative Receive Buffer Interrupt Node Pointer"] -pub type ARBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ARBINP_A>; -impl<'a, REG> ARBINP_W<'a, REG> +pub type ArbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Arbinp>; +impl<'a, REG> ArbinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -308,77 +308,77 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE1) + self.variant(Arbinp::Value1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE2) + self.variant(Arbinp::Value2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE3) + self.variant(Arbinp::Value3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE4) + self.variant(Arbinp::Value4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE5) + self.variant(Arbinp::Value5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(ARBINP_A::VALUE6) + self.variant(Arbinp::Value6) } } -#[doc = "Field `RCIM` reader - Receiver Control Information Mode"] -pub type RCIM_R = crate::FieldReader; #[doc = "Receiver Control Information Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RCIM_A { +pub enum Rcim { #[doc = "0: RCI\\[4\\] = PERR, RCI\\[3:0\\] = WLEN"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: RCI\\[4\\] = PERR, RCI\\[3\\] = PAR, RCI\\[2:1\\] = 00B, RCI\\[0\\] = SOF"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RCIM_A) -> Self { + fn from(variant: Rcim) -> Self { variant as _ } } -impl crate::FieldSpec for RCIM_A { +impl crate::FieldSpec for Rcim { type Ux = u8; } -impl RCIM_R { +#[doc = "Field `RCIM` reader - Receiver Control Information Mode"] +pub type RcimR = crate::FieldReader; +impl RcimR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RCIM_A { + pub const fn variant(&self) -> Rcim { match self.bits { - 0 => RCIM_A::VALUE1, - 1 => RCIM_A::VALUE2, - 2 => RCIM_A::VALUE3, - 3 => RCIM_A::VALUE4, + 0 => Rcim::Value1, + 1 => Rcim::Value2, + 2 => Rcim::Value3, + 3 => Rcim::Value4, _ => unreachable!(), } } @@ -387,21 +387,21 @@ impl RCIM_R { = WLEN"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RCIM_A::VALUE1 + *self == Rcim::Value1 } #[doc = "RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RCIM_A::VALUE2 + *self == Rcim::Value2 } #[doc = "RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RCIM_A::VALUE3 + *self == Rcim::Value3 } #[doc = "RCI\\[4\\] = PERR, RCI\\[3\\] @@ -410,12 +410,12 @@ impl RCIM_R { = SOF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RCIM_A::VALUE4 + *self == Rcim::Value4 } } #[doc = "Field `RCIM` writer - Receiver Control Information Mode"] -pub type RCIM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, RCIM_A>; -impl<'a, REG> RCIM_W<'a, REG> +pub type RcimW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Rcim>; +impl<'a, REG> RcimW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -425,21 +425,21 @@ where = WLEN"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RCIM_A::VALUE1) + self.variant(Rcim::Value1) } #[doc = "RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RCIM_A::VALUE2) + self.variant(Rcim::Value2) } #[doc = "RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(RCIM_A::VALUE3) + self.variant(Rcim::Value3) } #[doc = "RCI\\[4\\] = PERR, RCI\\[3\\] @@ -448,93 +448,93 @@ where = SOF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(RCIM_A::VALUE4) + self.variant(Rcim::Value4) } } -#[doc = "Field `SIZE` reader - Buffer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Buffer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: The FIFO mechanism is disabled. The buffer does not accept any request for data."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The FIFO buffer contains 2 entries."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The FIFO buffer contains 4 entries."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The FIFO buffer contains 8 entries."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The FIFO buffer contains 16 entries."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The FIFO buffer contains 32 entries."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The FIFO buffer contains 64 entries."] - VALUE7 = 6, + Value7 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl crate::FieldSpec for SIZE_A { +impl crate::FieldSpec for Size { type Ux = u8; } -impl SIZE_R { +#[doc = "Field `SIZE` reader - Buffer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::VALUE1), - 1 => Some(SIZE_A::VALUE2), - 2 => Some(SIZE_A::VALUE3), - 3 => Some(SIZE_A::VALUE4), - 4 => Some(SIZE_A::VALUE5), - 5 => Some(SIZE_A::VALUE6), - 6 => Some(SIZE_A::VALUE7), + 0 => Some(Size::Value1), + 1 => Some(Size::Value2), + 2 => Some(Size::Value3), + 3 => Some(Size::Value4), + 4 => Some(Size::Value5), + 5 => Some(Size::Value6), + 6 => Some(Size::Value7), _ => None, } } #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIZE_A::VALUE1 + *self == Size::Value1 } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIZE_A::VALUE2 + *self == Size::Value2 } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SIZE_A::VALUE3 + *self == Size::Value3 } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SIZE_A::VALUE4 + *self == Size::Value4 } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SIZE_A::VALUE5 + *self == Size::Value5 } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SIZE_A::VALUE6 + *self == Size::Value6 } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SIZE_A::VALUE7 + *self == Size::Value7 } } #[doc = "Field `SIZE` writer - Buffer Size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SIZE_A>; -impl<'a, REG> SIZE_W<'a, REG> +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Size>; +impl<'a, REG> SizeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -542,475 +542,466 @@ where #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE1) + self.variant(Size::Value1) } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE2) + self.variant(Size::Value2) } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE3) + self.variant(Size::Value3) } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE4) + self.variant(Size::Value4) } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE5) + self.variant(Size::Value5) } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE6) + self.variant(Size::Value6) } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE7) + self.variant(Size::Value7) } } -#[doc = "Field `RNM` reader - Receiver Notification Mode"] -pub type RNM_R = crate::BitReader; #[doc = "Receiver Notification Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RNM_A { +pub enum Rnm { #[doc = "0: Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RNM_A) -> Self { + fn from(variant: Rnm) -> Self { variant as u8 != 0 } } -impl RNM_R { +#[doc = "Field `RNM` reader - Receiver Notification Mode"] +pub type RnmR = crate::BitReader; +impl RnmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RNM_A { + pub const fn variant(&self) -> Rnm { match self.bits { - false => RNM_A::VALUE1, - true => RNM_A::VALUE2, + false => Rnm::Value1, + true => Rnm::Value2, } } #[doc = "Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RNM_A::VALUE1 + *self == Rnm::Value1 } #[doc = "RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RNM_A::VALUE2 + *self == Rnm::Value2 } } #[doc = "Field `RNM` writer - Receiver Notification Mode"] -pub type RNM_W<'a, REG> = crate::BitWriter<'a, REG, RNM_A>; -impl<'a, REG> RNM_W<'a, REG> +pub type RnmW<'a, REG> = crate::BitWriter<'a, REG, Rnm>; +impl<'a, REG> RnmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RNM_A::VALUE1) + self.variant(Rnm::Value1) } #[doc = "RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RNM_A::VALUE2) + self.variant(Rnm::Value2) } } -#[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] -pub type LOF_R = crate::BitReader; #[doc = "Buffer Event on Limit Overflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOF_A { +pub enum Lof { #[doc = "0: A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOF_A) -> Self { + fn from(variant: Lof) -> Self { variant as u8 != 0 } } -impl LOF_R { +#[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] +pub type LofR = crate::BitReader; +impl LofR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOF_A { + pub const fn variant(&self) -> Lof { match self.bits { - false => LOF_A::VALUE1, - true => LOF_A::VALUE2, + false => Lof::Value1, + true => Lof::Value2, } } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOF_A::VALUE1 + *self == Lof::Value1 } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOF_A::VALUE2 + *self == Lof::Value2 } } #[doc = "Field `LOF` writer - Buffer Event on Limit Overflow"] -pub type LOF_W<'a, REG> = crate::BitWriter<'a, REG, LOF_A>; -impl<'a, REG> LOF_W<'a, REG> +pub type LofW<'a, REG> = crate::BitWriter<'a, REG, Lof>; +impl<'a, REG> LofW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOF_A::VALUE1) + self.variant(Lof::Value1) } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOF_A::VALUE2) + self.variant(Lof::Value2) } } -#[doc = "Field `ARBIEN` reader - Alternative Receive Buffer Interrupt Enable"] -pub type ARBIEN_R = crate::BitReader; #[doc = "Alternative Receive Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBIEN_A { +pub enum Arbien { #[doc = "0: The alternative receive buffer interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The alternative receive buffer interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBIEN_A) -> Self { + fn from(variant: Arbien) -> Self { variant as u8 != 0 } } -impl ARBIEN_R { +#[doc = "Field `ARBIEN` reader - Alternative Receive Buffer Interrupt Enable"] +pub type ArbienR = crate::BitReader; +impl ArbienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBIEN_A { + pub const fn variant(&self) -> Arbien { match self.bits { - false => ARBIEN_A::VALUE1, - true => ARBIEN_A::VALUE2, + false => Arbien::Value1, + true => Arbien::Value2, } } #[doc = "The alternative receive buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBIEN_A::VALUE1 + *self == Arbien::Value1 } #[doc = "The alternative receive buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBIEN_A::VALUE2 + *self == Arbien::Value2 } } #[doc = "Field `ARBIEN` writer - Alternative Receive Buffer Interrupt Enable"] -pub type ARBIEN_W<'a, REG> = crate::BitWriter<'a, REG, ARBIEN_A>; -impl<'a, REG> ARBIEN_W<'a, REG> +pub type ArbienW<'a, REG> = crate::BitWriter<'a, REG, Arbien>; +impl<'a, REG> ArbienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The alternative receive buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBIEN_A::VALUE1) + self.variant(Arbien::Value1) } #[doc = "The alternative receive buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBIEN_A::VALUE2) + self.variant(Arbien::Value2) } } -#[doc = "Field `SRBIEN` reader - Standard Receive Buffer Interrupt Enable"] -pub type SRBIEN_R = crate::BitReader; #[doc = "Standard Receive Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRBIEN_A { +pub enum Srbien { #[doc = "0: The standard receive buffer interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The standard receive buffer interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRBIEN_A) -> Self { + fn from(variant: Srbien) -> Self { variant as u8 != 0 } } -impl SRBIEN_R { +#[doc = "Field `SRBIEN` reader - Standard Receive Buffer Interrupt Enable"] +pub type SrbienR = crate::BitReader; +impl SrbienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRBIEN_A { + pub const fn variant(&self) -> Srbien { match self.bits { - false => SRBIEN_A::VALUE1, - true => SRBIEN_A::VALUE2, + false => Srbien::Value1, + true => Srbien::Value2, } } #[doc = "The standard receive buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBIEN_A::VALUE1 + *self == Srbien::Value1 } #[doc = "The standard receive buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBIEN_A::VALUE2 + *self == Srbien::Value2 } } #[doc = "Field `SRBIEN` writer - Standard Receive Buffer Interrupt Enable"] -pub type SRBIEN_W<'a, REG> = crate::BitWriter<'a, REG, SRBIEN_A>; -impl<'a, REG> SRBIEN_W<'a, REG> +pub type SrbienW<'a, REG> = crate::BitWriter<'a, REG, Srbien>; +impl<'a, REG> SrbienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard receive buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRBIEN_A::VALUE1) + self.variant(Srbien::Value1) } #[doc = "The standard receive buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRBIEN_A::VALUE2) + self.variant(Srbien::Value2) } } -#[doc = "Field `RBERIEN` reader - Receive Buffer Error Interrupt Enable"] -pub type RBERIEN_R = crate::BitReader; #[doc = "Receive Buffer Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RBERIEN_A { +pub enum Rberien { #[doc = "0: The receive buffer error interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive buffer error interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RBERIEN_A) -> Self { + fn from(variant: Rberien) -> Self { variant as u8 != 0 } } -impl RBERIEN_R { +#[doc = "Field `RBERIEN` reader - Receive Buffer Error Interrupt Enable"] +pub type RberienR = crate::BitReader; +impl RberienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RBERIEN_A { + pub const fn variant(&self) -> Rberien { match self.bits { - false => RBERIEN_A::VALUE1, - true => RBERIEN_A::VALUE2, + false => Rberien::Value1, + true => Rberien::Value2, } } #[doc = "The receive buffer error interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RBERIEN_A::VALUE1 + *self == Rberien::Value1 } #[doc = "The receive buffer error interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RBERIEN_A::VALUE2 + *self == Rberien::Value2 } } #[doc = "Field `RBERIEN` writer - Receive Buffer Error Interrupt Enable"] -pub type RBERIEN_W<'a, REG> = crate::BitWriter<'a, REG, RBERIEN_A>; -impl<'a, REG> RBERIEN_W<'a, REG> +pub type RberienW<'a, REG> = crate::BitWriter<'a, REG, Rberien>; +impl<'a, REG> RberienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive buffer error interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RBERIEN_A::VALUE1) + self.variant(Rberien::Value1) } #[doc = "The receive buffer error interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RBERIEN_A::VALUE2) + self.variant(Rberien::Value2) } } impl R { #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - pub fn limit(&self) -> LIMIT_R { - LIMIT_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn limit(&self) -> LimitR { + LimitR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"] #[inline(always)] - pub fn srbtm(&self) -> SRBTM_R { - SRBTM_R::new(((self.bits >> 14) & 1) != 0) + pub fn srbtm(&self) -> SrbtmR { + SrbtmR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"] #[inline(always)] - pub fn srbten(&self) -> SRBTEN_R { - SRBTEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn srbten(&self) -> SrbtenR { + SrbtenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn srbinp(&self) -> SRBINP_R { - SRBINP_R::new(((self.bits >> 16) & 7) as u8) + pub fn srbinp(&self) -> SrbinpR { + SrbinpR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn arbinp(&self) -> ARBINP_R { - ARBINP_R::new(((self.bits >> 19) & 7) as u8) + pub fn arbinp(&self) -> ArbinpR { + ArbinpR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 22:23 - Receiver Control Information Mode"] #[inline(always)] - pub fn rcim(&self) -> RCIM_R { - RCIM_R::new(((self.bits >> 22) & 3) as u8) + pub fn rcim(&self) -> RcimR { + RcimR::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 24) & 7) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 27 - Receiver Notification Mode"] #[inline(always)] - pub fn rnm(&self) -> RNM_R { - RNM_R::new(((self.bits >> 27) & 1) != 0) + pub fn rnm(&self) -> RnmR { + RnmR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - pub fn lof(&self) -> LOF_R { - LOF_R::new(((self.bits >> 28) & 1) != 0) + pub fn lof(&self) -> LofR { + LofR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"] #[inline(always)] - pub fn arbien(&self) -> ARBIEN_R { - ARBIEN_R::new(((self.bits >> 29) & 1) != 0) + pub fn arbien(&self) -> ArbienR { + ArbienR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"] #[inline(always)] - pub fn srbien(&self) -> SRBIEN_R { - SRBIEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn srbien(&self) -> SrbienR { + SrbienR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"] #[inline(always)] - pub fn rberien(&self) -> RBERIEN_R { - RBERIEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn rberien(&self) -> RberienR { + RberienR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] #[must_use] - pub fn dptr(&mut self) -> DPTR_W { - DPTR_W::new(self, 0) + pub fn dptr(&mut self) -> DptrW { + DptrW::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] #[must_use] - pub fn limit(&mut self) -> LIMIT_W { - LIMIT_W::new(self, 8) + pub fn limit(&mut self) -> LimitW { + LimitW::new(self, 8) } #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"] #[inline(always)] #[must_use] - pub fn srbtm(&mut self) -> SRBTM_W { - SRBTM_W::new(self, 14) + pub fn srbtm(&mut self) -> SrbtmW { + SrbtmW::new(self, 14) } #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"] #[inline(always)] #[must_use] - pub fn srbten(&mut self) -> SRBTEN_W { - SRBTEN_W::new(self, 15) + pub fn srbten(&mut self) -> SrbtenW { + SrbtenW::new(self, 15) } #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn srbinp(&mut self) -> SRBINP_W { - SRBINP_W::new(self, 16) + pub fn srbinp(&mut self) -> SrbinpW { + SrbinpW::new(self, 16) } #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn arbinp(&mut self) -> ARBINP_W { - ARBINP_W::new(self, 19) + pub fn arbinp(&mut self) -> ArbinpW { + ArbinpW::new(self, 19) } #[doc = "Bits 22:23 - Receiver Control Information Mode"] #[inline(always)] #[must_use] - pub fn rcim(&mut self) -> RCIM_W { - RCIM_W::new(self, 22) + pub fn rcim(&mut self) -> RcimW { + RcimW::new(self, 22) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 24) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 24) } #[doc = "Bit 27 - Receiver Notification Mode"] #[inline(always)] #[must_use] - pub fn rnm(&mut self) -> RNM_W { - RNM_W::new(self, 27) + pub fn rnm(&mut self) -> RnmW { + RnmW::new(self, 27) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] #[must_use] - pub fn lof(&mut self) -> LOF_W { - LOF_W::new(self, 28) + pub fn lof(&mut self) -> LofW { + LofW::new(self, 28) } #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn arbien(&mut self) -> ARBIEN_W { - ARBIEN_W::new(self, 29) + pub fn arbien(&mut self) -> ArbienW { + ArbienW::new(self, 29) } #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn srbien(&mut self) -> SRBIEN_W { - SRBIEN_W::new(self, 30) + pub fn srbien(&mut self) -> SrbienW { + SrbienW::new(self, 30) } #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rberien(&mut self) -> RBERIEN_W { - RBERIEN_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rberien(&mut self) -> RberienW { + RberienW::new(self, 31) } } #[doc = "Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBCTR_SPEC; -impl crate::RegisterSpec for RBCTR_SPEC { +pub struct RbctrSpec; +impl crate::RegisterSpec for RbctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rbctr::R`](R) reader structure"] -impl crate::Readable for RBCTR_SPEC {} +impl crate::Readable for RbctrSpec {} #[doc = "`write(|w| ..)` method takes [`rbctr::W`](W) writer structure"] -impl crate::Writable for RBCTR_SPEC { +impl crate::Writable for RbctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RBCTR to value 0"] -impl crate::Resettable for RBCTR_SPEC { +impl crate::Resettable for RbctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf.rs b/src/usic0_ch0/rbuf.rs index 6388c73e..87469cda 100644 --- a/src/usic0_ch0/rbuf.rs +++ b/src/usic0_ch0/rbuf.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Received Data"] -pub type DSR_R = crate::FieldReader; +pub type DsrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Received Data"] #[inline(always)] - pub fn dsr(&self) -> DSR_R { - DSR_R::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DsrR { + DsrR::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUF_SPEC; -impl crate::RegisterSpec for RBUF_SPEC { +pub struct RbufSpec; +impl crate::RegisterSpec for RbufSpec { type Ux = u32; } #[doc = "`read()` method returns [`rbuf::R`](R) reader structure"] -impl crate::Readable for RBUF_SPEC {} +impl crate::Readable for RbufSpec {} #[doc = "`reset()` method sets RBUF to value 0"] -impl crate::Resettable for RBUF_SPEC { +impl crate::Resettable for RbufSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf0.rs b/src/usic0_ch0/rbuf0.rs index cfc36b8c..a8748e1f 100644 --- a/src/usic0_ch0/rbuf0.rs +++ b/src/usic0_ch0/rbuf0.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR0` reader - Data of Shift Registers 0\\[3:0\\]"] -pub type DSR0_R = crate::FieldReader; +pub type Dsr0R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data of Shift Registers 0\\[3:0\\]"] #[inline(always)] - pub fn dsr0(&self) -> DSR0_R { - DSR0_R::new((self.bits & 0xffff) as u16) + pub fn dsr0(&self) -> Dsr0R { + Dsr0R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUF0_SPEC; -impl crate::RegisterSpec for RBUF0_SPEC { +pub struct Rbuf0Spec; +impl crate::RegisterSpec for Rbuf0Spec { type Ux = u32; } #[doc = "`read()` method returns [`rbuf0::R`](R) reader structure"] -impl crate::Readable for RBUF0_SPEC {} +impl crate::Readable for Rbuf0Spec {} #[doc = "`reset()` method sets RBUF0 to value 0"] -impl crate::Resettable for RBUF0_SPEC { +impl crate::Resettable for Rbuf0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf01sr.rs b/src/usic0_ch0/rbuf01sr.rs index c8894c17..d4dbd456 100644 --- a/src/usic0_ch0/rbuf01sr.rs +++ b/src/usic0_ch0/rbuf01sr.rs @@ -1,492 +1,492 @@ #[doc = "Register `RBUF01SR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WLEN0` reader - Received Data Word Length in RBUF0"] -pub type WLEN0_R = crate::FieldReader; -#[doc = "Field `SOF0` reader - Start of Frame in RBUF0"] -pub type SOF0_R = crate::BitReader; +pub type Wlen0R = crate::FieldReader; #[doc = "Start of Frame in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOF0_A { +pub enum Sof0 { #[doc = "0: The data in RBUF0 has not been the first data word of a data frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data in RBUF0 has been the first data word of a data frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOF0_A) -> Self { + fn from(variant: Sof0) -> Self { variant as u8 != 0 } } -impl SOF0_R { +#[doc = "Field `SOF0` reader - Start of Frame in RBUF0"] +pub type Sof0R = crate::BitReader; +impl Sof0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOF0_A { + pub const fn variant(&self) -> Sof0 { match self.bits { - false => SOF0_A::VALUE1, - true => SOF0_A::VALUE2, + false => Sof0::Value1, + true => Sof0::Value2, } } #[doc = "The data in RBUF0 has not been the first data word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOF0_A::VALUE1 + *self == Sof0::Value1 } #[doc = "The data in RBUF0 has been the first data word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOF0_A::VALUE2 + *self == Sof0::Value2 } } #[doc = "Field `PAR0` reader - Protocol-Related Argument in RBUF0"] -pub type PAR0_R = crate::BitReader; -#[doc = "Field `PERR0` reader - Protocol-related Error in RBUF0"] -pub type PERR0_R = crate::BitReader; +pub type Par0R = crate::BitReader; #[doc = "Protocol-related Error in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PERR0_A { +pub enum Perr0 { #[doc = "0: The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PERR0_A) -> Self { + fn from(variant: Perr0) -> Self { variant as u8 != 0 } } -impl PERR0_R { +#[doc = "Field `PERR0` reader - Protocol-related Error in RBUF0"] +pub type Perr0R = crate::BitReader; +impl Perr0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PERR0_A { + pub const fn variant(&self) -> Perr0 { match self.bits { - false => PERR0_A::VALUE1, - true => PERR0_A::VALUE2, + false => Perr0::Value1, + true => Perr0::Value2, } } #[doc = "The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PERR0_A::VALUE1 + *self == Perr0::Value1 } #[doc = "The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PERR0_A::VALUE2 + *self == Perr0::Value2 } } -#[doc = "Field `RDV00` reader - Receive Data Valid in RBUF0"] -pub type RDV00_R = crate::BitReader; #[doc = "Receive Data Valid in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDV00_A { +pub enum Rdv00 { #[doc = "0: Register RBUF0 does not contain data that has not yet been read out."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Register RBUF0 contains data that has not yet been read out."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDV00_A) -> Self { + fn from(variant: Rdv00) -> Self { variant as u8 != 0 } } -impl RDV00_R { +#[doc = "Field `RDV00` reader - Receive Data Valid in RBUF0"] +pub type Rdv00R = crate::BitReader; +impl Rdv00R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDV00_A { + pub const fn variant(&self) -> Rdv00 { match self.bits { - false => RDV00_A::VALUE1, - true => RDV00_A::VALUE2, + false => Rdv00::Value1, + true => Rdv00::Value2, } } #[doc = "Register RBUF0 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDV00_A::VALUE1 + *self == Rdv00::Value1 } #[doc = "Register RBUF0 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDV00_A::VALUE2 + *self == Rdv00::Value2 } } -#[doc = "Field `RDV01` reader - Receive Data Valid in RBUF1"] -pub type RDV01_R = crate::BitReader; #[doc = "Receive Data Valid in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDV01_A { +pub enum Rdv01 { #[doc = "0: Register RBUF1 does not contain data that has not yet been read out."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Register RBUF1 contains data that has not yet been read out."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDV01_A) -> Self { + fn from(variant: Rdv01) -> Self { variant as u8 != 0 } } -impl RDV01_R { +#[doc = "Field `RDV01` reader - Receive Data Valid in RBUF1"] +pub type Rdv01R = crate::BitReader; +impl Rdv01R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDV01_A { + pub const fn variant(&self) -> Rdv01 { match self.bits { - false => RDV01_A::VALUE1, - true => RDV01_A::VALUE2, + false => Rdv01::Value1, + true => Rdv01::Value2, } } #[doc = "Register RBUF1 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDV01_A::VALUE1 + *self == Rdv01::Value1 } #[doc = "Register RBUF1 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDV01_A::VALUE2 + *self == Rdv01::Value2 } } -#[doc = "Field `DS0` reader - Data Source"] -pub type DS0_R = crate::BitReader; #[doc = "Data Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DS0_A { +pub enum Ds0 { #[doc = "0: The register RBUF contains the data of RBUF0 (same for associated status information)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The register RBUF contains the data of RBUF1 (same for associated status information)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DS0_A) -> Self { + fn from(variant: Ds0) -> Self { variant as u8 != 0 } } -impl DS0_R { +#[doc = "Field `DS0` reader - Data Source"] +pub type Ds0R = crate::BitReader; +impl Ds0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DS0_A { + pub const fn variant(&self) -> Ds0 { match self.bits { - false => DS0_A::VALUE1, - true => DS0_A::VALUE2, + false => Ds0::Value1, + true => Ds0::Value2, } } #[doc = "The register RBUF contains the data of RBUF0 (same for associated status information)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DS0_A::VALUE1 + *self == Ds0::Value1 } #[doc = "The register RBUF contains the data of RBUF1 (same for associated status information)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DS0_A::VALUE2 + *self == Ds0::Value2 } } -#[doc = "Field `WLEN1` reader - Received Data Word Length in RBUF1"] -pub type WLEN1_R = crate::FieldReader; #[doc = "Received Data Word Length in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WLEN1_A { +pub enum Wlen1 { #[doc = "0: One bit has been received."] - VALUE1 = 0, + Value1 = 0, #[doc = "15: Sixteen bits have been received."] - VALUE2 = 15, + Value2 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WLEN1_A) -> Self { + fn from(variant: Wlen1) -> Self { variant as _ } } -impl crate::FieldSpec for WLEN1_A { +impl crate::FieldSpec for Wlen1 { type Ux = u8; } -impl WLEN1_R { +#[doc = "Field `WLEN1` reader - Received Data Word Length in RBUF1"] +pub type Wlen1R = crate::FieldReader; +impl Wlen1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WLEN1_A::VALUE1), - 15 => Some(WLEN1_A::VALUE2), + 0 => Some(Wlen1::Value1), + 15 => Some(Wlen1::Value2), _ => None, } } #[doc = "One bit has been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WLEN1_A::VALUE1 + *self == Wlen1::Value1 } #[doc = "Sixteen bits have been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WLEN1_A::VALUE2 + *self == Wlen1::Value2 } } -#[doc = "Field `SOF1` reader - Start of Frame in RBUF1"] -pub type SOF1_R = crate::BitReader; #[doc = "Start of Frame in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOF1_A { +pub enum Sof1 { #[doc = "0: The data in RBUF1 has not been the first data word of a data frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data in RBUF1 has been the first data word of a data frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOF1_A) -> Self { + fn from(variant: Sof1) -> Self { variant as u8 != 0 } } -impl SOF1_R { +#[doc = "Field `SOF1` reader - Start of Frame in RBUF1"] +pub type Sof1R = crate::BitReader; +impl Sof1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOF1_A { + pub const fn variant(&self) -> Sof1 { match self.bits { - false => SOF1_A::VALUE1, - true => SOF1_A::VALUE2, + false => Sof1::Value1, + true => Sof1::Value2, } } #[doc = "The data in RBUF1 has not been the first data word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOF1_A::VALUE1 + *self == Sof1::Value1 } #[doc = "The data in RBUF1 has been the first data word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOF1_A::VALUE2 + *self == Sof1::Value2 } } #[doc = "Field `PAR1` reader - Protocol-Related Argument in RBUF1"] -pub type PAR1_R = crate::BitReader; -#[doc = "Field `PERR1` reader - Protocol-related Error in RBUF1"] -pub type PERR1_R = crate::BitReader; +pub type Par1R = crate::BitReader; #[doc = "Protocol-related Error in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PERR1_A { +pub enum Perr1 { #[doc = "0: The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PERR1_A) -> Self { + fn from(variant: Perr1) -> Self { variant as u8 != 0 } } -impl PERR1_R { +#[doc = "Field `PERR1` reader - Protocol-related Error in RBUF1"] +pub type Perr1R = crate::BitReader; +impl Perr1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PERR1_A { + pub const fn variant(&self) -> Perr1 { match self.bits { - false => PERR1_A::VALUE1, - true => PERR1_A::VALUE2, + false => Perr1::Value1, + true => Perr1::Value2, } } #[doc = "The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PERR1_A::VALUE1 + *self == Perr1::Value1 } #[doc = "The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PERR1_A::VALUE2 + *self == Perr1::Value2 } } -#[doc = "Field `RDV10` reader - Receive Data Valid in RBUF0"] -pub type RDV10_R = crate::BitReader; #[doc = "Receive Data Valid in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDV10_A { +pub enum Rdv10 { #[doc = "0: Register RBUF0 does not contain data that has not yet been read out."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Register RBUF0 contains data that has not yet been read out."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDV10_A) -> Self { + fn from(variant: Rdv10) -> Self { variant as u8 != 0 } } -impl RDV10_R { +#[doc = "Field `RDV10` reader - Receive Data Valid in RBUF0"] +pub type Rdv10R = crate::BitReader; +impl Rdv10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDV10_A { + pub const fn variant(&self) -> Rdv10 { match self.bits { - false => RDV10_A::VALUE1, - true => RDV10_A::VALUE2, + false => Rdv10::Value1, + true => Rdv10::Value2, } } #[doc = "Register RBUF0 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDV10_A::VALUE1 + *self == Rdv10::Value1 } #[doc = "Register RBUF0 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDV10_A::VALUE2 + *self == Rdv10::Value2 } } -#[doc = "Field `RDV11` reader - Receive Data Valid in RBUF1"] -pub type RDV11_R = crate::BitReader; #[doc = "Receive Data Valid in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RDV11_A { +pub enum Rdv11 { #[doc = "0: Register RBUF1 does not contain data that has not yet been read out."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Register RBUF1 contains data that has not yet been read out."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RDV11_A) -> Self { + fn from(variant: Rdv11) -> Self { variant as u8 != 0 } } -impl RDV11_R { +#[doc = "Field `RDV11` reader - Receive Data Valid in RBUF1"] +pub type Rdv11R = crate::BitReader; +impl Rdv11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RDV11_A { + pub const fn variant(&self) -> Rdv11 { match self.bits { - false => RDV11_A::VALUE1, - true => RDV11_A::VALUE2, + false => Rdv11::Value1, + true => Rdv11::Value2, } } #[doc = "Register RBUF1 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RDV11_A::VALUE1 + *self == Rdv11::Value1 } #[doc = "Register RBUF1 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RDV11_A::VALUE2 + *self == Rdv11::Value2 } } -#[doc = "Field `DS1` reader - Data Source"] -pub type DS1_R = crate::BitReader; #[doc = "Data Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DS1_A { +pub enum Ds1 { #[doc = "0: The register RBUF contains the data of RBUF0 (same for associated status information)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The register RBUF contains the data of RBUF1 (same for associated status information)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DS1_A) -> Self { + fn from(variant: Ds1) -> Self { variant as u8 != 0 } } -impl DS1_R { +#[doc = "Field `DS1` reader - Data Source"] +pub type Ds1R = crate::BitReader; +impl Ds1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DS1_A { + pub const fn variant(&self) -> Ds1 { match self.bits { - false => DS1_A::VALUE1, - true => DS1_A::VALUE2, + false => Ds1::Value1, + true => Ds1::Value2, } } #[doc = "The register RBUF contains the data of RBUF0 (same for associated status information)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DS1_A::VALUE1 + *self == Ds1::Value1 } #[doc = "The register RBUF contains the data of RBUF1 (same for associated status information)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DS1_A::VALUE2 + *self == Ds1::Value2 } } impl R { #[doc = "Bits 0:3 - Received Data Word Length in RBUF0"] #[inline(always)] - pub fn wlen0(&self) -> WLEN0_R { - WLEN0_R::new((self.bits & 0x0f) as u8) + pub fn wlen0(&self) -> Wlen0R { + Wlen0R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 6 - Start of Frame in RBUF0"] #[inline(always)] - pub fn sof0(&self) -> SOF0_R { - SOF0_R::new(((self.bits >> 6) & 1) != 0) + pub fn sof0(&self) -> Sof0R { + Sof0R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Protocol-Related Argument in RBUF0"] #[inline(always)] - pub fn par0(&self) -> PAR0_R { - PAR0_R::new(((self.bits >> 8) & 1) != 0) + pub fn par0(&self) -> Par0R { + Par0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol-related Error in RBUF0"] #[inline(always)] - pub fn perr0(&self) -> PERR0_R { - PERR0_R::new(((self.bits >> 9) & 1) != 0) + pub fn perr0(&self) -> Perr0R { + Perr0R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - Receive Data Valid in RBUF0"] #[inline(always)] - pub fn rdv00(&self) -> RDV00_R { - RDV00_R::new(((self.bits >> 13) & 1) != 0) + pub fn rdv00(&self) -> Rdv00R { + Rdv00R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Data Valid in RBUF1"] #[inline(always)] - pub fn rdv01(&self) -> RDV01_R { - RDV01_R::new(((self.bits >> 14) & 1) != 0) + pub fn rdv01(&self) -> Rdv01R { + Rdv01R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Source"] #[inline(always)] - pub fn ds0(&self) -> DS0_R { - DS0_R::new(((self.bits >> 15) & 1) != 0) + pub fn ds0(&self) -> Ds0R { + Ds0R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Received Data Word Length in RBUF1"] #[inline(always)] - pub fn wlen1(&self) -> WLEN1_R { - WLEN1_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn wlen1(&self) -> Wlen1R { + Wlen1R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 22 - Start of Frame in RBUF1"] #[inline(always)] - pub fn sof1(&self) -> SOF1_R { - SOF1_R::new(((self.bits >> 22) & 1) != 0) + pub fn sof1(&self) -> Sof1R { + Sof1R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Protocol-Related Argument in RBUF1"] #[inline(always)] - pub fn par1(&self) -> PAR1_R { - PAR1_R::new(((self.bits >> 24) & 1) != 0) + pub fn par1(&self) -> Par1R { + Par1R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Protocol-related Error in RBUF1"] #[inline(always)] - pub fn perr1(&self) -> PERR1_R { - PERR1_R::new(((self.bits >> 25) & 1) != 0) + pub fn perr1(&self) -> Perr1R { + Perr1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 29 - Receive Data Valid in RBUF0"] #[inline(always)] - pub fn rdv10(&self) -> RDV10_R { - RDV10_R::new(((self.bits >> 29) & 1) != 0) + pub fn rdv10(&self) -> Rdv10R { + Rdv10R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Receive Data Valid in RBUF1"] #[inline(always)] - pub fn rdv11(&self) -> RDV11_R { - RDV11_R::new(((self.bits >> 30) & 1) != 0) + pub fn rdv11(&self) -> Rdv11R { + Rdv11R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Source"] #[inline(always)] - pub fn ds1(&self) -> DS1_R { - DS1_R::new(((self.bits >> 31) & 1) != 0) + pub fn ds1(&self) -> Ds1R { + Ds1R::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUF01SR_SPEC; -impl crate::RegisterSpec for RBUF01SR_SPEC { +pub struct Rbuf01srSpec; +impl crate::RegisterSpec for Rbuf01srSpec { type Ux = u32; } #[doc = "`read()` method returns [`rbuf01sr::R`](R) reader structure"] -impl crate::Readable for RBUF01SR_SPEC {} +impl crate::Readable for Rbuf01srSpec {} #[doc = "`reset()` method sets RBUF01SR to value 0"] -impl crate::Resettable for RBUF01SR_SPEC { +impl crate::Resettable for Rbuf01srSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf1.rs b/src/usic0_ch0/rbuf1.rs index 036e9716..309d0c76 100644 --- a/src/usic0_ch0/rbuf1.rs +++ b/src/usic0_ch0/rbuf1.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR1` reader - Data of Shift Registers 1\\[3:0\\]"] -pub type DSR1_R = crate::FieldReader; +pub type Dsr1R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data of Shift Registers 1\\[3:0\\]"] #[inline(always)] - pub fn dsr1(&self) -> DSR1_R { - DSR1_R::new((self.bits & 0xffff) as u16) + pub fn dsr1(&self) -> Dsr1R { + Dsr1R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUF1_SPEC; -impl crate::RegisterSpec for RBUF1_SPEC { +pub struct Rbuf1Spec; +impl crate::RegisterSpec for Rbuf1Spec { type Ux = u32; } #[doc = "`read()` method returns [`rbuf1::R`](R) reader structure"] -impl crate::Readable for RBUF1_SPEC {} +impl crate::Readable for Rbuf1Spec {} #[doc = "`reset()` method sets RBUF1 to value 0"] -impl crate::Resettable for RBUF1_SPEC { +impl crate::Resettable for Rbuf1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbufd.rs b/src/usic0_ch0/rbufd.rs index 441149e7..f62a81ba 100644 --- a/src/usic0_ch0/rbufd.rs +++ b/src/usic0_ch0/rbufd.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUFD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Data from Shift Register"] -pub type DSR_R = crate::FieldReader; +pub type DsrR = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data from Shift Register"] #[inline(always)] - pub fn dsr(&self) -> DSR_R { - DSR_R::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DsrR { + DsrR::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUFD_SPEC; -impl crate::RegisterSpec for RBUFD_SPEC { +pub struct RbufdSpec; +impl crate::RegisterSpec for RbufdSpec { type Ux = u32; } #[doc = "`read()` method returns [`rbufd::R`](R) reader structure"] -impl crate::Readable for RBUFD_SPEC {} +impl crate::Readable for RbufdSpec {} #[doc = "`reset()` method sets RBUFD to value 0"] -impl crate::Resettable for RBUFD_SPEC { +impl crate::Resettable for RbufdSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbufsr.rs b/src/usic0_ch0/rbufsr.rs index 034f4742..8e567a9f 100644 --- a/src/usic0_ch0/rbufsr.rs +++ b/src/usic0_ch0/rbufsr.rs @@ -1,64 +1,64 @@ #[doc = "Register `RBUFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WLEN` reader - Received Data Word Length in RBUF or RBUFD"] -pub type WLEN_R = crate::FieldReader; +pub type WlenR = crate::FieldReader; #[doc = "Field `SOF` reader - Start of Frame in RBUF or RBUFD"] -pub type SOF_R = crate::BitReader; +pub type SofR = crate::BitReader; #[doc = "Field `PAR` reader - Protocol-Related Argument in RBUF or RBUFD"] -pub type PAR_R = crate::BitReader; +pub type ParR = crate::BitReader; #[doc = "Field `PERR` reader - Protocol-related Error in RBUF or RBUFD"] -pub type PERR_R = crate::BitReader; +pub type PerrR = crate::BitReader; #[doc = "Field `RDV0` reader - Receive Data Valid in RBUF or RBUFD"] -pub type RDV0_R = crate::BitReader; +pub type Rdv0R = crate::BitReader; #[doc = "Field `RDV1` reader - Receive Data Valid in RBUF or RBUFD"] -pub type RDV1_R = crate::BitReader; +pub type Rdv1R = crate::BitReader; #[doc = "Field `DS` reader - Data Source of RBUF or RBUFD"] -pub type DS_R = crate::BitReader; +pub type DsR = crate::BitReader; impl R { #[doc = "Bits 0:3 - Received Data Word Length in RBUF or RBUFD"] #[inline(always)] - pub fn wlen(&self) -> WLEN_R { - WLEN_R::new((self.bits & 0x0f) as u8) + pub fn wlen(&self) -> WlenR { + WlenR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 6 - Start of Frame in RBUF or RBUFD"] #[inline(always)] - pub fn sof(&self) -> SOF_R { - SOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn sof(&self) -> SofR { + SofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Protocol-Related Argument in RBUF or RBUFD"] #[inline(always)] - pub fn par(&self) -> PAR_R { - PAR_R::new(((self.bits >> 8) & 1) != 0) + pub fn par(&self) -> ParR { + ParR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol-related Error in RBUF or RBUFD"] #[inline(always)] - pub fn perr(&self) -> PERR_R { - PERR_R::new(((self.bits >> 9) & 1) != 0) + pub fn perr(&self) -> PerrR { + PerrR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - Receive Data Valid in RBUF or RBUFD"] #[inline(always)] - pub fn rdv0(&self) -> RDV0_R { - RDV0_R::new(((self.bits >> 13) & 1) != 0) + pub fn rdv0(&self) -> Rdv0R { + Rdv0R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Data Valid in RBUF or RBUFD"] #[inline(always)] - pub fn rdv1(&self) -> RDV1_R { - RDV1_R::new(((self.bits >> 14) & 1) != 0) + pub fn rdv1(&self) -> Rdv1R { + Rdv1R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Source of RBUF or RBUFD"] #[inline(always)] - pub fn ds(&self) -> DS_R { - DS_R::new(((self.bits >> 15) & 1) != 0) + pub fn ds(&self) -> DsR { + DsR::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RBUFSR_SPEC; -impl crate::RegisterSpec for RBUFSR_SPEC { +pub struct RbufsrSpec; +impl crate::RegisterSpec for RbufsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rbufsr::R`](R) reader structure"] -impl crate::Readable for RBUFSR_SPEC {} +impl crate::Readable for RbufsrSpec {} #[doc = "`reset()` method sets RBUFSR to value 0"] -impl crate::Resettable for RBUFSR_SPEC { +impl crate::Resettable for RbufsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/sctr.rs b/src/usic0_ch0/sctr.rs index f798b07d..80f708e8 100644 --- a/src/usic0_ch0/sctr.rs +++ b/src/usic0_ch0/sctr.rs @@ -1,169 +1,169 @@ #[doc = "Register `SCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCTR` writer"] -pub type W = crate::W; -#[doc = "Field `SDIR` reader - Shift Direction"] -pub type SDIR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Shift Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SDIR_A { +pub enum Sdir { #[doc = "0: Shift LSB first. The first data bit of a data word is located at bit position 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SDIR_A) -> Self { + fn from(variant: Sdir) -> Self { variant as u8 != 0 } } -impl SDIR_R { +#[doc = "Field `SDIR` reader - Shift Direction"] +pub type SdirR = crate::BitReader; +impl SdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SDIR_A { + pub const fn variant(&self) -> Sdir { match self.bits { - false => SDIR_A::VALUE1, - true => SDIR_A::VALUE2, + false => Sdir::Value1, + true => Sdir::Value2, } } #[doc = "Shift LSB first. The first data bit of a data word is located at bit position 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SDIR_A::VALUE1 + *self == Sdir::Value1 } #[doc = "Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SDIR_A::VALUE2 + *self == Sdir::Value2 } } #[doc = "Field `SDIR` writer - Shift Direction"] -pub type SDIR_W<'a, REG> = crate::BitWriter<'a, REG, SDIR_A>; -impl<'a, REG> SDIR_W<'a, REG> +pub type SdirW<'a, REG> = crate::BitWriter<'a, REG, Sdir>; +impl<'a, REG> SdirW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shift LSB first. The first data bit of a data word is located at bit position 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SDIR_A::VALUE1) + self.variant(Sdir::Value1) } #[doc = "Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SDIR_A::VALUE2) + self.variant(Sdir::Value2) } } -#[doc = "Field `PDL` reader - Passive Data Level"] -pub type PDL_R = crate::BitReader; #[doc = "Passive Data Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDL_A { +pub enum Pdl { #[doc = "0: The passive data level is 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The passive data level is 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDL_A) -> Self { + fn from(variant: Pdl) -> Self { variant as u8 != 0 } } -impl PDL_R { +#[doc = "Field `PDL` reader - Passive Data Level"] +pub type PdlR = crate::BitReader; +impl PdlR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDL_A { + pub const fn variant(&self) -> Pdl { match self.bits { - false => PDL_A::VALUE1, - true => PDL_A::VALUE2, + false => Pdl::Value1, + true => Pdl::Value2, } } #[doc = "The passive data level is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDL_A::VALUE1 + *self == Pdl::Value1 } #[doc = "The passive data level is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDL_A::VALUE2 + *self == Pdl::Value2 } } #[doc = "Field `PDL` writer - Passive Data Level"] -pub type PDL_W<'a, REG> = crate::BitWriter<'a, REG, PDL_A>; -impl<'a, REG> PDL_W<'a, REG> +pub type PdlW<'a, REG> = crate::BitWriter<'a, REG, Pdl>; +impl<'a, REG> PdlW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The passive data level is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDL_A::VALUE1) + self.variant(Pdl::Value1) } #[doc = "The passive data level is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDL_A::VALUE2) + self.variant(Pdl::Value2) } } -#[doc = "Field `DSM` reader - Data Shift Mode"] -pub type DSM_R = crate::FieldReader; #[doc = "Data Shift Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DSM_A { +pub enum Dsm { #[doc = "0: Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] - VALUE1 = 0, + Value1 = 0, #[doc = "2: Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DSM_A) -> Self { + fn from(variant: Dsm) -> Self { variant as _ } } -impl crate::FieldSpec for DSM_A { +impl crate::FieldSpec for Dsm { type Ux = u8; } -impl DSM_R { +#[doc = "Field `DSM` reader - Data Shift Mode"] +pub type DsmR = crate::FieldReader; +impl DsmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DSM_A::VALUE1), - 2 => Some(DSM_A::VALUE3), - 3 => Some(DSM_A::VALUE4), + 0 => Some(Dsm::Value1), + 2 => Some(Dsm::Value3), + 3 => Some(Dsm::Value4), _ => None, } } #[doc = "Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DSM_A::VALUE1 + *self == Dsm::Value1 } #[doc = "Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DSM_A::VALUE3 + *self == Dsm::Value3 } #[doc = "Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DSM_A::VALUE4 + *self == Dsm::Value4 } } #[doc = "Field `DSM` writer - Data Shift Mode"] -pub type DSM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DSM_A>; -impl<'a, REG> DSM_W<'a, REG> +pub type DsmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dsm>; +impl<'a, REG> DsmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -171,118 +171,118 @@ where #[doc = "Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DSM_A::VALUE1) + self.variant(Dsm::Value1) } #[doc = "Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DSM_A::VALUE3) + self.variant(Dsm::Value3) } #[doc = "Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DSM_A::VALUE4) + self.variant(Dsm::Value4) } } -#[doc = "Field `HPCDIR` reader - Port Control Direction"] -pub type HPCDIR_R = crate::BitReader; #[doc = "Port Control Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HPCDIR_A { +pub enum Hpcdir { #[doc = "0: The pin(s) with hardware pin control enabled are selected to be in input mode."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The pin(s) with hardware pin control enabled are selected to be in output mode."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HPCDIR_A) -> Self { + fn from(variant: Hpcdir) -> Self { variant as u8 != 0 } } -impl HPCDIR_R { +#[doc = "Field `HPCDIR` reader - Port Control Direction"] +pub type HpcdirR = crate::BitReader; +impl HpcdirR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HPCDIR_A { + pub const fn variant(&self) -> Hpcdir { match self.bits { - false => HPCDIR_A::VALUE1, - true => HPCDIR_A::VALUE2, + false => Hpcdir::Value1, + true => Hpcdir::Value2, } } #[doc = "The pin(s) with hardware pin control enabled are selected to be in input mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HPCDIR_A::VALUE1 + *self == Hpcdir::Value1 } #[doc = "The pin(s) with hardware pin control enabled are selected to be in output mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HPCDIR_A::VALUE2 + *self == Hpcdir::Value2 } } #[doc = "Field `HPCDIR` writer - Port Control Direction"] -pub type HPCDIR_W<'a, REG> = crate::BitWriter<'a, REG, HPCDIR_A>; -impl<'a, REG> HPCDIR_W<'a, REG> +pub type HpcdirW<'a, REG> = crate::BitWriter<'a, REG, Hpcdir>; +impl<'a, REG> HpcdirW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The pin(s) with hardware pin control enabled are selected to be in input mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HPCDIR_A::VALUE1) + self.variant(Hpcdir::Value1) } #[doc = "The pin(s) with hardware pin control enabled are selected to be in output mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HPCDIR_A::VALUE2) + self.variant(Hpcdir::Value2) } } -#[doc = "Field `DOCFG` reader - Data Output Configuration"] -pub type DOCFG_R = crate::FieldReader; #[doc = "Data Output Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DOCFG_A { +pub enum Docfg { #[doc = "0: DOUTx = shift data value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: DOUTx = inverted shift data value"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DOCFG_A) -> Self { + fn from(variant: Docfg) -> Self { variant as _ } } -impl crate::FieldSpec for DOCFG_A { +impl crate::FieldSpec for Docfg { type Ux = u8; } -impl DOCFG_R { +#[doc = "Field `DOCFG` reader - Data Output Configuration"] +pub type DocfgR = crate::FieldReader; +impl DocfgR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DOCFG_A::VALUE1), - 1 => Some(DOCFG_A::VALUE2), + 0 => Some(Docfg::Value1), + 1 => Some(Docfg::Value2), _ => None, } } #[doc = "DOUTx = shift data value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DOCFG_A::VALUE1 + *self == Docfg::Value1 } #[doc = "DOUTx = inverted shift data value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DOCFG_A::VALUE2 + *self == Docfg::Value2 } } #[doc = "Field `DOCFG` writer - Data Output Configuration"] -pub type DOCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DOCFG_A>; -impl<'a, REG> DOCFG_W<'a, REG> +pub type DocfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Docfg>; +impl<'a, REG> DocfgW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -290,74 +290,74 @@ where #[doc = "DOUTx = shift data value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DOCFG_A::VALUE1) + self.variant(Docfg::Value1) } #[doc = "DOUTx = inverted shift data value"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DOCFG_A::VALUE2) + self.variant(Docfg::Value2) } } -#[doc = "Field `TRM` reader - Transmission Mode"] -pub type TRM_R = crate::FieldReader; #[doc = "Transmission Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TRM_A { +pub enum Trm { #[doc = "0: The shift control signal is considered as inactive and data frame transfers are not possible."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TRM_A) -> Self { + fn from(variant: Trm) -> Self { variant as _ } } -impl crate::FieldSpec for TRM_A { +impl crate::FieldSpec for Trm { type Ux = u8; } -impl TRM_R { +#[doc = "Field `TRM` reader - Transmission Mode"] +pub type TrmR = crate::FieldReader; +impl TrmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TRM_A { + pub const fn variant(&self) -> Trm { match self.bits { - 0 => TRM_A::VALUE1, - 1 => TRM_A::VALUE2, - 2 => TRM_A::VALUE3, - 3 => TRM_A::VALUE4, + 0 => Trm::Value1, + 1 => Trm::Value2, + 2 => Trm::Value3, + 3 => Trm::Value4, _ => unreachable!(), } } #[doc = "The shift control signal is considered as inactive and data frame transfers are not possible."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TRM_A::VALUE1 + *self == Trm::Value1 } #[doc = "The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TRM_A::VALUE2 + *self == Trm::Value2 } #[doc = "The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TRM_A::VALUE3 + *self == Trm::Value3 } #[doc = "The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TRM_A::VALUE4 + *self == Trm::Value4 } } #[doc = "Field `TRM` writer - Transmission Mode"] -pub type TRM_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TRM_A>; -impl<'a, REG> TRM_W<'a, REG> +pub type TrmW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Trm>; +impl<'a, REG> TrmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -365,88 +365,88 @@ where #[doc = "The shift control signal is considered as inactive and data frame transfers are not possible."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TRM_A::VALUE1) + self.variant(Trm::Value1) } #[doc = "The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TRM_A::VALUE2) + self.variant(Trm::Value2) } #[doc = "The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TRM_A::VALUE3) + self.variant(Trm::Value3) } #[doc = "The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TRM_A::VALUE4) + self.variant(Trm::Value4) } } #[doc = "Field `FLE` reader - Frame Length"] -pub type FLE_R = crate::FieldReader; +pub type FleR = crate::FieldReader; #[doc = "Field `FLE` writer - Frame Length"] -pub type FLE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `WLE` reader - Word Length"] -pub type WLE_R = crate::FieldReader; +pub type FleW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Word Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum WLE_A { +pub enum Wle { #[doc = "0: The data word contains 1 data bit located at bit position 0."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word contains 2 data bits located at bit positions \\[1:0\\]."] - VALUE2 = 1, + Value2 = 1, #[doc = "14: The data word contains 15 data bits located at bit positions \\[14:0\\]."] - VALUE3 = 14, + Value3 = 14, #[doc = "15: The data word contains 16 data bits located at bit positions \\[15:0\\]."] - VALUE4 = 15, + Value4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: WLE_A) -> Self { + fn from(variant: Wle) -> Self { variant as _ } } -impl crate::FieldSpec for WLE_A { +impl crate::FieldSpec for Wle { type Ux = u8; } -impl WLE_R { +#[doc = "Field `WLE` reader - Word Length"] +pub type WleR = crate::FieldReader; +impl WleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(WLE_A::VALUE1), - 1 => Some(WLE_A::VALUE2), - 14 => Some(WLE_A::VALUE3), - 15 => Some(WLE_A::VALUE4), + 0 => Some(Wle::Value1), + 1 => Some(Wle::Value2), + 14 => Some(Wle::Value3), + 15 => Some(Wle::Value4), _ => None, } } #[doc = "The data word contains 1 data bit located at bit position 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WLE_A::VALUE1 + *self == Wle::Value1 } #[doc = "The data word contains 2 data bits located at bit positions \\[1:0\\]."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WLE_A::VALUE2 + *self == Wle::Value2 } #[doc = "The data word contains 15 data bits located at bit positions \\[14:0\\]."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == WLE_A::VALUE3 + *self == Wle::Value3 } #[doc = "The data word contains 16 data bits located at bit positions \\[15:0\\]."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == WLE_A::VALUE4 + *self == Wle::Value4 } } #[doc = "Field `WLE` writer - Word Length"] -pub type WLE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WLE_A>; -impl<'a, REG> WLE_W<'a, REG> +pub type WleW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wle>; +impl<'a, REG> WleW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -454,139 +454,130 @@ where #[doc = "The data word contains 1 data bit located at bit position 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WLE_A::VALUE1) + self.variant(Wle::Value1) } #[doc = "The data word contains 2 data bits located at bit positions \\[1:0\\]."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WLE_A::VALUE2) + self.variant(Wle::Value2) } #[doc = "The data word contains 15 data bits located at bit positions \\[14:0\\]."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(WLE_A::VALUE3) + self.variant(Wle::Value3) } #[doc = "The data word contains 16 data bits located at bit positions \\[15:0\\]."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(WLE_A::VALUE4) + self.variant(Wle::Value4) } } impl R { #[doc = "Bit 0 - Shift Direction"] #[inline(always)] - pub fn sdir(&self) -> SDIR_R { - SDIR_R::new((self.bits & 1) != 0) + pub fn sdir(&self) -> SdirR { + SdirR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Passive Data Level"] #[inline(always)] - pub fn pdl(&self) -> PDL_R { - PDL_R::new(((self.bits >> 1) & 1) != 0) + pub fn pdl(&self) -> PdlR { + PdlR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:3 - Data Shift Mode"] #[inline(always)] - pub fn dsm(&self) -> DSM_R { - DSM_R::new(((self.bits >> 2) & 3) as u8) + pub fn dsm(&self) -> DsmR { + DsmR::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Port Control Direction"] #[inline(always)] - pub fn hpcdir(&self) -> HPCDIR_R { - HPCDIR_R::new(((self.bits >> 4) & 1) != 0) + pub fn hpcdir(&self) -> HpcdirR { + HpcdirR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 6:7 - Data Output Configuration"] #[inline(always)] - pub fn docfg(&self) -> DOCFG_R { - DOCFG_R::new(((self.bits >> 6) & 3) as u8) + pub fn docfg(&self) -> DocfgR { + DocfgR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Transmission Mode"] #[inline(always)] - pub fn trm(&self) -> TRM_R { - TRM_R::new(((self.bits >> 8) & 3) as u8) + pub fn trm(&self) -> TrmR { + TrmR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 16:21 - Frame Length"] #[inline(always)] - pub fn fle(&self) -> FLE_R { - FLE_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn fle(&self) -> FleR { + FleR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:27 - Word Length"] #[inline(always)] - pub fn wle(&self) -> WLE_R { - WLE_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn wle(&self) -> WleR { + WleR::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Shift Direction"] #[inline(always)] #[must_use] - pub fn sdir(&mut self) -> SDIR_W { - SDIR_W::new(self, 0) + pub fn sdir(&mut self) -> SdirW { + SdirW::new(self, 0) } #[doc = "Bit 1 - Passive Data Level"] #[inline(always)] #[must_use] - pub fn pdl(&mut self) -> PDL_W { - PDL_W::new(self, 1) + pub fn pdl(&mut self) -> PdlW { + PdlW::new(self, 1) } #[doc = "Bits 2:3 - Data Shift Mode"] #[inline(always)] #[must_use] - pub fn dsm(&mut self) -> DSM_W { - DSM_W::new(self, 2) + pub fn dsm(&mut self) -> DsmW { + DsmW::new(self, 2) } #[doc = "Bit 4 - Port Control Direction"] #[inline(always)] #[must_use] - pub fn hpcdir(&mut self) -> HPCDIR_W { - HPCDIR_W::new(self, 4) + pub fn hpcdir(&mut self) -> HpcdirW { + HpcdirW::new(self, 4) } #[doc = "Bits 6:7 - Data Output Configuration"] #[inline(always)] #[must_use] - pub fn docfg(&mut self) -> DOCFG_W { - DOCFG_W::new(self, 6) + pub fn docfg(&mut self) -> DocfgW { + DocfgW::new(self, 6) } #[doc = "Bits 8:9 - Transmission Mode"] #[inline(always)] #[must_use] - pub fn trm(&mut self) -> TRM_W { - TRM_W::new(self, 8) + pub fn trm(&mut self) -> TrmW { + TrmW::new(self, 8) } #[doc = "Bits 16:21 - Frame Length"] #[inline(always)] #[must_use] - pub fn fle(&mut self) -> FLE_W { - FLE_W::new(self, 16) + pub fn fle(&mut self) -> FleW { + FleW::new(self, 16) } #[doc = "Bits 24:27 - Word Length"] #[inline(always)] #[must_use] - pub fn wle(&mut self) -> WLE_W { - WLE_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wle(&mut self) -> WleW { + WleW::new(self, 24) } } #[doc = "Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SCTR_SPEC; -impl crate::RegisterSpec for SCTR_SPEC { +pub struct SctrSpec; +impl crate::RegisterSpec for SctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`sctr::R`](R) reader structure"] -impl crate::Readable for SCTR_SPEC {} +impl crate::Readable for SctrSpec {} #[doc = "`write(|w| ..)` method takes [`sctr::W`](W) writer structure"] -impl crate::Writable for SCTR_SPEC { +impl crate::Writable for SctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCTR to value 0"] -impl crate::Resettable for SCTR_SPEC { +impl crate::Resettable for SctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tbctr.rs b/src/usic0_ch0/tbctr.rs index a758af2c..a3ab30d0 100644 --- a/src/usic0_ch0/tbctr.rs +++ b/src/usic0_ch0/tbctr.rs @@ -1,195 +1,195 @@ #[doc = "Register `TBCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TBCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DPTR` writer - Data Pointer"] -pub type DPTR_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type DptrW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LIMIT` reader - Limit For Interrupt Generation"] -pub type LIMIT_R = crate::FieldReader; +pub type LimitR = crate::FieldReader; #[doc = "Field `LIMIT` writer - Limit For Interrupt Generation"] -pub type LIMIT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; -#[doc = "Field `STBTM` reader - Standard Transmit Buffer Trigger Mode"] -pub type STBTM_R = crate::BitReader; +pub type LimitW<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Standard Transmit Buffer Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STBTM_A { +pub enum Stbtm { #[doc = "0: Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STBTM_A) -> Self { + fn from(variant: Stbtm) -> Self { variant as u8 != 0 } } -impl STBTM_R { +#[doc = "Field `STBTM` reader - Standard Transmit Buffer Trigger Mode"] +pub type StbtmR = crate::BitReader; +impl StbtmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STBTM_A { + pub const fn variant(&self) -> Stbtm { match self.bits { - false => STBTM_A::VALUE1, - true => STBTM_A::VALUE2, + false => Stbtm::Value1, + true => Stbtm::Value2, } } #[doc = "Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBTM_A::VALUE1 + *self == Stbtm::Value1 } #[doc = "Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBTM_A::VALUE2 + *self == Stbtm::Value2 } } #[doc = "Field `STBTM` writer - Standard Transmit Buffer Trigger Mode"] -pub type STBTM_W<'a, REG> = crate::BitWriter<'a, REG, STBTM_A>; -impl<'a, REG> STBTM_W<'a, REG> +pub type StbtmW<'a, REG> = crate::BitWriter<'a, REG, Stbtm>; +impl<'a, REG> StbtmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STBTM_A::VALUE1) + self.variant(Stbtm::Value1) } #[doc = "Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STBTM_A::VALUE2) + self.variant(Stbtm::Value2) } } -#[doc = "Field `STBTEN` reader - Standard Transmit Buffer Trigger Enable"] -pub type STBTEN_R = crate::BitReader; #[doc = "Standard Transmit Buffer Trigger Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STBTEN_A { +pub enum Stbten { #[doc = "0: The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STBTEN_A) -> Self { + fn from(variant: Stbten) -> Self { variant as u8 != 0 } } -impl STBTEN_R { +#[doc = "Field `STBTEN` reader - Standard Transmit Buffer Trigger Enable"] +pub type StbtenR = crate::BitReader; +impl StbtenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STBTEN_A { + pub const fn variant(&self) -> Stbten { match self.bits { - false => STBTEN_A::VALUE1, - true => STBTEN_A::VALUE2, + false => Stbten::Value1, + true => Stbten::Value2, } } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBTEN_A::VALUE1 + *self == Stbten::Value1 } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBTEN_A::VALUE2 + *self == Stbten::Value2 } } #[doc = "Field `STBTEN` writer - Standard Transmit Buffer Trigger Enable"] -pub type STBTEN_W<'a, REG> = crate::BitWriter<'a, REG, STBTEN_A>; -impl<'a, REG> STBTEN_W<'a, REG> +pub type StbtenW<'a, REG> = crate::BitWriter<'a, REG, Stbten>; +impl<'a, REG> StbtenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STBTEN_A::VALUE1) + self.variant(Stbten::Value1) } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STBTEN_A::VALUE2) + self.variant(Stbten::Value2) } } -#[doc = "Field `STBINP` reader - Standard Transmit Buffer Interrupt Node Pointer"] -pub type STBINP_R = crate::FieldReader; #[doc = "Standard Transmit Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STBINP_A { +pub enum Stbinp { #[doc = "0: Output SR0 becomes activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output SR1 becomes activated."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Output SR2 becomes activated."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Output SR3 becomes activated."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Output SR4 becomes activated."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Output SR5 becomes activated."] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STBINP_A) -> Self { + fn from(variant: Stbinp) -> Self { variant as _ } } -impl crate::FieldSpec for STBINP_A { +impl crate::FieldSpec for Stbinp { type Ux = u8; } -impl STBINP_R { +#[doc = "Field `STBINP` reader - Standard Transmit Buffer Interrupt Node Pointer"] +pub type StbinpR = crate::FieldReader; +impl StbinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(STBINP_A::VALUE1), - 1 => Some(STBINP_A::VALUE2), - 2 => Some(STBINP_A::VALUE3), - 3 => Some(STBINP_A::VALUE4), - 4 => Some(STBINP_A::VALUE5), - 5 => Some(STBINP_A::VALUE6), + 0 => Some(Stbinp::Value1), + 1 => Some(Stbinp::Value2), + 2 => Some(Stbinp::Value3), + 3 => Some(Stbinp::Value4), + 4 => Some(Stbinp::Value5), + 5 => Some(Stbinp::Value6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBINP_A::VALUE1 + *self == Stbinp::Value1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBINP_A::VALUE2 + *self == Stbinp::Value2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STBINP_A::VALUE3 + *self == Stbinp::Value3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STBINP_A::VALUE4 + *self == Stbinp::Value4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == STBINP_A::VALUE5 + *self == Stbinp::Value5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == STBINP_A::VALUE6 + *self == Stbinp::Value6 } } #[doc = "Field `STBINP` writer - Standard Transmit Buffer Interrupt Node Pointer"] -pub type STBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, STBINP_A>; -impl<'a, REG> STBINP_W<'a, REG> +pub type StbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Stbinp>; +impl<'a, REG> StbinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -197,110 +197,110 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE1) + self.variant(Stbinp::Value1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE2) + self.variant(Stbinp::Value2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE3) + self.variant(Stbinp::Value3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE4) + self.variant(Stbinp::Value4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE5) + self.variant(Stbinp::Value5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(STBINP_A::VALUE6) + self.variant(Stbinp::Value6) } } -#[doc = "Field `ATBINP` reader - Alternative Transmit Buffer Interrupt Node Pointer"] -pub type ATBINP_R = crate::FieldReader; #[doc = "Alternative Transmit Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ATBINP_A { +pub enum Atbinp { #[doc = "0: Output SR0 becomes activated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output SR1 becomes activated."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Output SR2 becomes activated."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Output SR3 becomes activated."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: Output SR4 becomes activated."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: Output SR5 becomes activated."] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ATBINP_A) -> Self { + fn from(variant: Atbinp) -> Self { variant as _ } } -impl crate::FieldSpec for ATBINP_A { +impl crate::FieldSpec for Atbinp { type Ux = u8; } -impl ATBINP_R { +#[doc = "Field `ATBINP` reader - Alternative Transmit Buffer Interrupt Node Pointer"] +pub type AtbinpR = crate::FieldReader; +impl AtbinpR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ATBINP_A::VALUE1), - 1 => Some(ATBINP_A::VALUE2), - 2 => Some(ATBINP_A::VALUE3), - 3 => Some(ATBINP_A::VALUE4), - 4 => Some(ATBINP_A::VALUE5), - 5 => Some(ATBINP_A::VALUE6), + 0 => Some(Atbinp::Value1), + 1 => Some(Atbinp::Value2), + 2 => Some(Atbinp::Value3), + 3 => Some(Atbinp::Value4), + 4 => Some(Atbinp::Value5), + 5 => Some(Atbinp::Value6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ATBINP_A::VALUE1 + *self == Atbinp::Value1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ATBINP_A::VALUE2 + *self == Atbinp::Value2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ATBINP_A::VALUE3 + *self == Atbinp::Value3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ATBINP_A::VALUE4 + *self == Atbinp::Value4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == ATBINP_A::VALUE5 + *self == Atbinp::Value5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == ATBINP_A::VALUE6 + *self == Atbinp::Value6 } } #[doc = "Field `ATBINP` writer - Alternative Transmit Buffer Interrupt Node Pointer"] -pub type ATBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ATBINP_A>; -impl<'a, REG> ATBINP_W<'a, REG> +pub type AtbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Atbinp>; +impl<'a, REG> AtbinpW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -308,118 +308,118 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE1) + self.variant(Atbinp::Value1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE2) + self.variant(Atbinp::Value2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE3) + self.variant(Atbinp::Value3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE4) + self.variant(Atbinp::Value4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE5) + self.variant(Atbinp::Value5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(ATBINP_A::VALUE6) + self.variant(Atbinp::Value6) } } -#[doc = "Field `SIZE` reader - Buffer Size"] -pub type SIZE_R = crate::FieldReader; #[doc = "Buffer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SIZE_A { +pub enum Size { #[doc = "0: The FIFO mechanism is disabled. The buffer does not accept any request for data."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The FIFO buffer contains 2 entries."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: The FIFO buffer contains 4 entries."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: The FIFO buffer contains 8 entries."] - VALUE4 = 3, + Value4 = 3, #[doc = "4: The FIFO buffer contains 16 entries."] - VALUE5 = 4, + Value5 = 4, #[doc = "5: The FIFO buffer contains 32 entries."] - VALUE6 = 5, + Value6 = 5, #[doc = "6: The FIFO buffer contains 64 entries."] - VALUE7 = 6, + Value7 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SIZE_A) -> Self { + fn from(variant: Size) -> Self { variant as _ } } -impl crate::FieldSpec for SIZE_A { +impl crate::FieldSpec for Size { type Ux = u8; } -impl SIZE_R { +#[doc = "Field `SIZE` reader - Buffer Size"] +pub type SizeR = crate::FieldReader; +impl SizeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SIZE_A::VALUE1), - 1 => Some(SIZE_A::VALUE2), - 2 => Some(SIZE_A::VALUE3), - 3 => Some(SIZE_A::VALUE4), - 4 => Some(SIZE_A::VALUE5), - 5 => Some(SIZE_A::VALUE6), - 6 => Some(SIZE_A::VALUE7), + 0 => Some(Size::Value1), + 1 => Some(Size::Value2), + 2 => Some(Size::Value3), + 3 => Some(Size::Value4), + 4 => Some(Size::Value5), + 5 => Some(Size::Value6), + 6 => Some(Size::Value7), _ => None, } } #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SIZE_A::VALUE1 + *self == Size::Value1 } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SIZE_A::VALUE2 + *self == Size::Value2 } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SIZE_A::VALUE3 + *self == Size::Value3 } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SIZE_A::VALUE4 + *self == Size::Value4 } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == SIZE_A::VALUE5 + *self == Size::Value5 } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == SIZE_A::VALUE6 + *self == Size::Value6 } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == SIZE_A::VALUE7 + *self == Size::Value7 } } #[doc = "Field `SIZE` writer - Buffer Size"] -pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SIZE_A>; -impl<'a, REG> SIZE_W<'a, REG> +pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Size>; +impl<'a, REG> SizeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,330 +427,321 @@ where #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE1) + self.variant(Size::Value1) } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE2) + self.variant(Size::Value2) } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE3) + self.variant(Size::Value3) } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE4) + self.variant(Size::Value4) } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE5) + self.variant(Size::Value5) } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE6) + self.variant(Size::Value6) } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(SIZE_A::VALUE7) + self.variant(Size::Value7) } } -#[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] -pub type LOF_R = crate::BitReader; #[doc = "Buffer Event on Limit Overflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LOF_A { +pub enum Lof { #[doc = "0: A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LOF_A) -> Self { + fn from(variant: Lof) -> Self { variant as u8 != 0 } } -impl LOF_R { +#[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] +pub type LofR = crate::BitReader; +impl LofR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LOF_A { + pub const fn variant(&self) -> Lof { match self.bits { - false => LOF_A::VALUE1, - true => LOF_A::VALUE2, + false => Lof::Value1, + true => Lof::Value2, } } #[doc = "A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LOF_A::VALUE1 + *self == Lof::Value1 } #[doc = "A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LOF_A::VALUE2 + *self == Lof::Value2 } } #[doc = "Field `LOF` writer - Buffer Event on Limit Overflow"] -pub type LOF_W<'a, REG> = crate::BitWriter<'a, REG, LOF_A>; -impl<'a, REG> LOF_W<'a, REG> +pub type LofW<'a, REG> = crate::BitWriter<'a, REG, Lof>; +impl<'a, REG> LofW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LOF_A::VALUE1) + self.variant(Lof::Value1) } #[doc = "A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LOF_A::VALUE2) + self.variant(Lof::Value2) } } -#[doc = "Field `STBIEN` reader - Standard Transmit Buffer Interrupt Enable"] -pub type STBIEN_R = crate::BitReader; #[doc = "Standard Transmit Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STBIEN_A { +pub enum Stbien { #[doc = "0: The standard transmit buffer interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The standard transmit buffer interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STBIEN_A) -> Self { + fn from(variant: Stbien) -> Self { variant as u8 != 0 } } -impl STBIEN_R { +#[doc = "Field `STBIEN` reader - Standard Transmit Buffer Interrupt Enable"] +pub type StbienR = crate::BitReader; +impl StbienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STBIEN_A { + pub const fn variant(&self) -> Stbien { match self.bits { - false => STBIEN_A::VALUE1, - true => STBIEN_A::VALUE2, + false => Stbien::Value1, + true => Stbien::Value2, } } #[doc = "The standard transmit buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBIEN_A::VALUE1 + *self == Stbien::Value1 } #[doc = "The standard transmit buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBIEN_A::VALUE2 + *self == Stbien::Value2 } } #[doc = "Field `STBIEN` writer - Standard Transmit Buffer Interrupt Enable"] -pub type STBIEN_W<'a, REG> = crate::BitWriter<'a, REG, STBIEN_A>; -impl<'a, REG> STBIEN_W<'a, REG> +pub type StbienW<'a, REG> = crate::BitWriter<'a, REG, Stbien>; +impl<'a, REG> StbienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard transmit buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STBIEN_A::VALUE1) + self.variant(Stbien::Value1) } #[doc = "The standard transmit buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STBIEN_A::VALUE2) + self.variant(Stbien::Value2) } } -#[doc = "Field `TBERIEN` reader - Transmit Buffer Error Interrupt Enable"] -pub type TBERIEN_R = crate::BitReader; #[doc = "Transmit Buffer Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBERIEN_A { +pub enum Tberien { #[doc = "0: The transmit buffer error interrupt generation is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit buffer error interrupt generation is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBERIEN_A) -> Self { + fn from(variant: Tberien) -> Self { variant as u8 != 0 } } -impl TBERIEN_R { +#[doc = "Field `TBERIEN` reader - Transmit Buffer Error Interrupt Enable"] +pub type TberienR = crate::BitReader; +impl TberienR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBERIEN_A { + pub const fn variant(&self) -> Tberien { match self.bits { - false => TBERIEN_A::VALUE1, - true => TBERIEN_A::VALUE2, + false => Tberien::Value1, + true => Tberien::Value2, } } #[doc = "The transmit buffer error interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBERIEN_A::VALUE1 + *self == Tberien::Value1 } #[doc = "The transmit buffer error interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBERIEN_A::VALUE2 + *self == Tberien::Value2 } } #[doc = "Field `TBERIEN` writer - Transmit Buffer Error Interrupt Enable"] -pub type TBERIEN_W<'a, REG> = crate::BitWriter<'a, REG, TBERIEN_A>; -impl<'a, REG> TBERIEN_W<'a, REG> +pub type TberienW<'a, REG> = crate::BitWriter<'a, REG, Tberien>; +impl<'a, REG> TberienW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit buffer error interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBERIEN_A::VALUE1) + self.variant(Tberien::Value1) } #[doc = "The transmit buffer error interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBERIEN_A::VALUE2) + self.variant(Tberien::Value2) } } impl R { #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - pub fn limit(&self) -> LIMIT_R { - LIMIT_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn limit(&self) -> LimitR { + LimitR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"] #[inline(always)] - pub fn stbtm(&self) -> STBTM_R { - STBTM_R::new(((self.bits >> 14) & 1) != 0) + pub fn stbtm(&self) -> StbtmR { + StbtmR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"] #[inline(always)] - pub fn stbten(&self) -> STBTEN_R { - STBTEN_R::new(((self.bits >> 15) & 1) != 0) + pub fn stbten(&self) -> StbtenR { + StbtenR::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn stbinp(&self) -> STBINP_R { - STBINP_R::new(((self.bits >> 16) & 7) as u8) + pub fn stbinp(&self) -> StbinpR { + StbinpR::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn atbinp(&self) -> ATBINP_R { - ATBINP_R::new(((self.bits >> 19) & 7) as u8) + pub fn atbinp(&self) -> AtbinpR { + AtbinpR::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - pub fn size(&self) -> SIZE_R { - SIZE_R::new(((self.bits >> 24) & 7) as u8) + pub fn size(&self) -> SizeR { + SizeR::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - pub fn lof(&self) -> LOF_R { - LOF_R::new(((self.bits >> 28) & 1) != 0) + pub fn lof(&self) -> LofR { + LofR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"] #[inline(always)] - pub fn stbien(&self) -> STBIEN_R { - STBIEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn stbien(&self) -> StbienR { + StbienR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"] #[inline(always)] - pub fn tberien(&self) -> TBERIEN_R { - TBERIEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn tberien(&self) -> TberienR { + TberienR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] #[must_use] - pub fn dptr(&mut self) -> DPTR_W { - DPTR_W::new(self, 0) + pub fn dptr(&mut self) -> DptrW { + DptrW::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] #[must_use] - pub fn limit(&mut self) -> LIMIT_W { - LIMIT_W::new(self, 8) + pub fn limit(&mut self) -> LimitW { + LimitW::new(self, 8) } #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"] #[inline(always)] #[must_use] - pub fn stbtm(&mut self) -> STBTM_W { - STBTM_W::new(self, 14) + pub fn stbtm(&mut self) -> StbtmW { + StbtmW::new(self, 14) } #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"] #[inline(always)] #[must_use] - pub fn stbten(&mut self) -> STBTEN_W { - STBTEN_W::new(self, 15) + pub fn stbten(&mut self) -> StbtenW { + StbtenW::new(self, 15) } #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn stbinp(&mut self) -> STBINP_W { - STBINP_W::new(self, 16) + pub fn stbinp(&mut self) -> StbinpW { + StbinpW::new(self, 16) } #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn atbinp(&mut self) -> ATBINP_W { - ATBINP_W::new(self, 19) + pub fn atbinp(&mut self) -> AtbinpW { + AtbinpW::new(self, 19) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SIZE_W { - SIZE_W::new(self, 24) + pub fn size(&mut self) -> SizeW { + SizeW::new(self, 24) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] #[must_use] - pub fn lof(&mut self) -> LOF_W { - LOF_W::new(self, 28) + pub fn lof(&mut self) -> LofW { + LofW::new(self, 28) } #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn stbien(&mut self) -> STBIEN_W { - STBIEN_W::new(self, 30) + pub fn stbien(&mut self) -> StbienW { + StbienW::new(self, 30) } #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tberien(&mut self) -> TBERIEN_W { - TBERIEN_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tberien(&mut self) -> TberienW { + TberienW::new(self, 31) } } #[doc = "Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TBCTR_SPEC; -impl crate::RegisterSpec for TBCTR_SPEC { +pub struct TbctrSpec; +impl crate::RegisterSpec for TbctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`tbctr::R`](R) reader structure"] -impl crate::Readable for TBCTR_SPEC {} +impl crate::Readable for TbctrSpec {} #[doc = "`write(|w| ..)` method takes [`tbctr::W`](W) writer structure"] -impl crate::Writable for TBCTR_SPEC { +impl crate::Writable for TbctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TBCTR to value 0"] -impl crate::Resettable for TBCTR_SPEC { +impl crate::Resettable for TbctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tbuf.rs b/src/usic0_ch0/tbuf.rs index 4a64e580..7805f451 100644 --- a/src/usic0_ch0/tbuf.rs +++ b/src/usic0_ch0/tbuf.rs @@ -1,50 +1,41 @@ #[doc = "Register `TBUF[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TBUF[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TDATA` reader - Transmit Data"] -pub type TDATA_R = crate::FieldReader; +pub type TdataR = crate::FieldReader; #[doc = "Field `TDATA` writer - Transmit Data"] -pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] - pub fn tdata(&self) -> TDATA_R { - TDATA_R::new((self.bits & 0xffff) as u16) + pub fn tdata(&self) -> TdataR { + TdataR::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] #[must_use] - pub fn tdata(&mut self) -> TDATA_W { - TDATA_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tdata(&mut self) -> TdataW { + TdataW::new(self, 0) } } #[doc = "Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TBUF_SPEC; -impl crate::RegisterSpec for TBUF_SPEC { +pub struct TbufSpec; +impl crate::RegisterSpec for TbufSpec { type Ux = u32; } #[doc = "`read()` method returns [`tbuf::R`](R) reader structure"] -impl crate::Readable for TBUF_SPEC {} +impl crate::Readable for TbufSpec {} #[doc = "`write(|w| ..)` method takes [`tbuf::W`](W) writer structure"] -impl crate::Writable for TBUF_SPEC { +impl crate::Writable for TbufSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TBUF[%s] to value 0"] -impl crate::Resettable for TBUF_SPEC { +impl crate::Resettable for TbufSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tcsr.rs b/src/usic0_ch0/tcsr.rs index 655e1d42..846f7643 100644 --- a/src/usic0_ch0/tcsr.rs +++ b/src/usic0_ch0/tcsr.rs @@ -1,103 +1,103 @@ #[doc = "Register `TCSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TCSR` writer"] -pub type W = crate::W; -#[doc = "Field `WLEMD` reader - WLE Mode"] -pub type WLEMD_R = crate::BitReader; +pub type W = crate::W; #[doc = "WLE Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WLEMD_A { +pub enum Wlemd { #[doc = "0: The automatic update of SCTR.WLE and TCSR.EOF is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The automatic update of SCTR.WLE and TCSR.EOF is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WLEMD_A) -> Self { + fn from(variant: Wlemd) -> Self { variant as u8 != 0 } } -impl WLEMD_R { +#[doc = "Field `WLEMD` reader - WLE Mode"] +pub type WlemdR = crate::BitReader; +impl WlemdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WLEMD_A { + pub const fn variant(&self) -> Wlemd { match self.bits { - false => WLEMD_A::VALUE1, - true => WLEMD_A::VALUE2, + false => Wlemd::Value1, + true => Wlemd::Value2, } } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WLEMD_A::VALUE1 + *self == Wlemd::Value1 } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WLEMD_A::VALUE2 + *self == Wlemd::Value2 } } #[doc = "Field `WLEMD` writer - WLE Mode"] -pub type WLEMD_W<'a, REG> = crate::BitWriter<'a, REG, WLEMD_A>; -impl<'a, REG> WLEMD_W<'a, REG> +pub type WlemdW<'a, REG> = crate::BitWriter<'a, REG, Wlemd>; +impl<'a, REG> WlemdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WLEMD_A::VALUE1) + self.variant(Wlemd::Value1) } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WLEMD_A::VALUE2) + self.variant(Wlemd::Value2) } } -#[doc = "Field `SELMD` reader - Select Mode"] -pub type SELMD_R = crate::BitReader; #[doc = "Select Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SELMD_A { +pub enum Selmd { #[doc = "0: The automatic update of PCR.CTR\\[23:16\\] is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The automatic update of PCR.CTR\\[23:16\\] is disabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SELMD_A) -> Self { + fn from(variant: Selmd) -> Self { variant as u8 != 0 } } -impl SELMD_R { +#[doc = "Field `SELMD` reader - Select Mode"] +pub type SelmdR = crate::BitReader; +impl SelmdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SELMD_A { + pub const fn variant(&self) -> Selmd { match self.bits { - false => SELMD_A::VALUE1, - true => SELMD_A::VALUE2, + false => Selmd::Value1, + true => Selmd::Value2, } } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SELMD_A::VALUE1 + *self == Selmd::Value1 } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SELMD_A::VALUE2 + *self == Selmd::Value2 } } #[doc = "Field `SELMD` writer - Select Mode"] -pub type SELMD_W<'a, REG> = crate::BitWriter<'a, REG, SELMD_A>; -impl<'a, REG> SELMD_W<'a, REG> +pub type SelmdW<'a, REG> = crate::BitWriter<'a, REG, Selmd>; +impl<'a, REG> SelmdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -105,429 +105,429 @@ where is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SELMD_A::VALUE1) + self.variant(Selmd::Value1) } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SELMD_A::VALUE2) + self.variant(Selmd::Value2) } } -#[doc = "Field `FLEMD` reader - FLE Mode"] -pub type FLEMD_R = crate::BitReader; #[doc = "FLE Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FLEMD_A { +pub enum Flemd { #[doc = "0: The automatic update of FLE is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The automatic update of FLE is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FLEMD_A) -> Self { + fn from(variant: Flemd) -> Self { variant as u8 != 0 } } -impl FLEMD_R { +#[doc = "Field `FLEMD` reader - FLE Mode"] +pub type FlemdR = crate::BitReader; +impl FlemdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FLEMD_A { + pub const fn variant(&self) -> Flemd { match self.bits { - false => FLEMD_A::VALUE1, - true => FLEMD_A::VALUE2, + false => Flemd::Value1, + true => Flemd::Value2, } } #[doc = "The automatic update of FLE is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FLEMD_A::VALUE1 + *self == Flemd::Value1 } #[doc = "The automatic update of FLE is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FLEMD_A::VALUE2 + *self == Flemd::Value2 } } #[doc = "Field `FLEMD` writer - FLE Mode"] -pub type FLEMD_W<'a, REG> = crate::BitWriter<'a, REG, FLEMD_A>; -impl<'a, REG> FLEMD_W<'a, REG> +pub type FlemdW<'a, REG> = crate::BitWriter<'a, REG, Flemd>; +impl<'a, REG> FlemdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of FLE is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FLEMD_A::VALUE1) + self.variant(Flemd::Value1) } #[doc = "The automatic update of FLE is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FLEMD_A::VALUE2) + self.variant(Flemd::Value2) } } -#[doc = "Field `WAMD` reader - WA Mode"] -pub type WAMD_R = crate::BitReader; #[doc = "WA Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WAMD_A { +pub enum Wamd { #[doc = "0: The automatic update of bit WA is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The automatic update of bit WA is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WAMD_A) -> Self { + fn from(variant: Wamd) -> Self { variant as u8 != 0 } } -impl WAMD_R { +#[doc = "Field `WAMD` reader - WA Mode"] +pub type WamdR = crate::BitReader; +impl WamdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WAMD_A { + pub const fn variant(&self) -> Wamd { match self.bits { - false => WAMD_A::VALUE1, - true => WAMD_A::VALUE2, + false => Wamd::Value1, + true => Wamd::Value2, } } #[doc = "The automatic update of bit WA is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WAMD_A::VALUE1 + *self == Wamd::Value1 } #[doc = "The automatic update of bit WA is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WAMD_A::VALUE2 + *self == Wamd::Value2 } } #[doc = "Field `WAMD` writer - WA Mode"] -pub type WAMD_W<'a, REG> = crate::BitWriter<'a, REG, WAMD_A>; -impl<'a, REG> WAMD_W<'a, REG> +pub type WamdW<'a, REG> = crate::BitWriter<'a, REG, Wamd>; +impl<'a, REG> WamdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of bit WA is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WAMD_A::VALUE1) + self.variant(Wamd::Value1) } #[doc = "The automatic update of bit WA is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WAMD_A::VALUE2) + self.variant(Wamd::Value2) } } -#[doc = "Field `HPCMD` reader - Hardware Port Control Mode"] -pub type HPCMD_R = crate::BitReader; #[doc = "Hardware Port Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HPCMD_A { +pub enum Hpcmd { #[doc = "0: The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HPCMD_A) -> Self { + fn from(variant: Hpcmd) -> Self { variant as u8 != 0 } } -impl HPCMD_R { +#[doc = "Field `HPCMD` reader - Hardware Port Control Mode"] +pub type HpcmdR = crate::BitReader; +impl HpcmdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HPCMD_A { + pub const fn variant(&self) -> Hpcmd { match self.bits { - false => HPCMD_A::VALUE1, - true => HPCMD_A::VALUE2, + false => Hpcmd::Value1, + true => Hpcmd::Value2, } } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HPCMD_A::VALUE1 + *self == Hpcmd::Value1 } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HPCMD_A::VALUE2 + *self == Hpcmd::Value2 } } #[doc = "Field `HPCMD` writer - Hardware Port Control Mode"] -pub type HPCMD_W<'a, REG> = crate::BitWriter<'a, REG, HPCMD_A>; -impl<'a, REG> HPCMD_W<'a, REG> +pub type HpcmdW<'a, REG> = crate::BitWriter<'a, REG, Hpcmd>; +impl<'a, REG> HpcmdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HPCMD_A::VALUE1) + self.variant(Hpcmd::Value1) } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HPCMD_A::VALUE2) + self.variant(Hpcmd::Value2) } } -#[doc = "Field `SOF` reader - Start Of Frame"] -pub type SOF_R = crate::BitReader; #[doc = "Start Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SOF_A { +pub enum Sof { #[doc = "0: The data word in TBUF is not considered as first word of a frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SOF_A) -> Self { + fn from(variant: Sof) -> Self { variant as u8 != 0 } } -impl SOF_R { +#[doc = "Field `SOF` reader - Start Of Frame"] +pub type SofR = crate::BitReader; +impl SofR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SOF_A { + pub const fn variant(&self) -> Sof { match self.bits { - false => SOF_A::VALUE1, - true => SOF_A::VALUE2, + false => Sof::Value1, + true => Sof::Value2, } } #[doc = "The data word in TBUF is not considered as first word of a frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SOF_A::VALUE1 + *self == Sof::Value1 } #[doc = "The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SOF_A::VALUE2 + *self == Sof::Value2 } } #[doc = "Field `SOF` writer - Start Of Frame"] -pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG, SOF_A>; -impl<'a, REG> SOF_W<'a, REG> +pub type SofW<'a, REG> = crate::BitWriter<'a, REG, Sof>; +impl<'a, REG> SofW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as first word of a frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SOF_A::VALUE1) + self.variant(Sof::Value1) } #[doc = "The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SOF_A::VALUE2) + self.variant(Sof::Value2) } } -#[doc = "Field `EOF` reader - End Of Frame"] -pub type EOF_R = crate::BitReader; #[doc = "End Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EOF_A { +pub enum Eof { #[doc = "0: The data word in TBUF is not considered as last word of an SSC frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word in TBUF is considered as last word of an SSC frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EOF_A) -> Self { + fn from(variant: Eof) -> Self { variant as u8 != 0 } } -impl EOF_R { +#[doc = "Field `EOF` reader - End Of Frame"] +pub type EofR = crate::BitReader; +impl EofR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EOF_A { + pub const fn variant(&self) -> Eof { match self.bits { - false => EOF_A::VALUE1, - true => EOF_A::VALUE2, + false => Eof::Value1, + true => Eof::Value2, } } #[doc = "The data word in TBUF is not considered as last word of an SSC frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EOF_A::VALUE1 + *self == Eof::Value1 } #[doc = "The data word in TBUF is considered as last word of an SSC frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EOF_A::VALUE2 + *self == Eof::Value2 } } #[doc = "Field `EOF` writer - End Of Frame"] -pub type EOF_W<'a, REG> = crate::BitWriter<'a, REG, EOF_A>; -impl<'a, REG> EOF_W<'a, REG> +pub type EofW<'a, REG> = crate::BitWriter<'a, REG, Eof>; +impl<'a, REG> EofW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as last word of an SSC frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EOF_A::VALUE1) + self.variant(Eof::Value1) } #[doc = "The data word in TBUF is considered as last word of an SSC frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EOF_A::VALUE2) + self.variant(Eof::Value2) } } -#[doc = "Field `TDV` reader - Transmit Data Valid"] -pub type TDV_R = crate::BitReader; #[doc = "Transmit Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TDV_A { +pub enum Tdv { #[doc = "0: The data word in TBUF is not valid for transmission."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TDV_A) -> Self { + fn from(variant: Tdv) -> Self { variant as u8 != 0 } } -impl TDV_R { +#[doc = "Field `TDV` reader - Transmit Data Valid"] +pub type TdvR = crate::BitReader; +impl TdvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TDV_A { + pub const fn variant(&self) -> Tdv { match self.bits { - false => TDV_A::VALUE1, - true => TDV_A::VALUE2, + false => Tdv::Value1, + true => Tdv::Value2, } } #[doc = "The data word in TBUF is not valid for transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TDV_A::VALUE1 + *self == Tdv::Value1 } #[doc = "The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TDV_A::VALUE2 + *self == Tdv::Value2 } } -#[doc = "Field `TDSSM` reader - TBUF Data Single Shot Mode"] -pub type TDSSM_R = crate::BitReader; #[doc = "TBUF Data Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TDSSM_A { +pub enum Tdssm { #[doc = "0: The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TDSSM_A) -> Self { + fn from(variant: Tdssm) -> Self { variant as u8 != 0 } } -impl TDSSM_R { +#[doc = "Field `TDSSM` reader - TBUF Data Single Shot Mode"] +pub type TdssmR = crate::BitReader; +impl TdssmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TDSSM_A { + pub const fn variant(&self) -> Tdssm { match self.bits { - false => TDSSM_A::VALUE1, - true => TDSSM_A::VALUE2, + false => Tdssm::Value1, + true => Tdssm::Value2, } } #[doc = "The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TDSSM_A::VALUE1 + *self == Tdssm::Value1 } #[doc = "The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TDSSM_A::VALUE2 + *self == Tdssm::Value2 } } #[doc = "Field `TDSSM` writer - TBUF Data Single Shot Mode"] -pub type TDSSM_W<'a, REG> = crate::BitWriter<'a, REG, TDSSM_A>; -impl<'a, REG> TDSSM_W<'a, REG> +pub type TdssmW<'a, REG> = crate::BitWriter<'a, REG, Tdssm>; +impl<'a, REG> TdssmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TDSSM_A::VALUE1) + self.variant(Tdssm::Value1) } #[doc = "The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TDSSM_A::VALUE2) + self.variant(Tdssm::Value2) } } -#[doc = "Field `TDEN` reader - TBUF Data Enable"] -pub type TDEN_R = crate::FieldReader; #[doc = "TBUF Data Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TDEN_A { +pub enum Tden { #[doc = "0: A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmission of the data word in TBUF can be started if TDV = 1."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TDEN_A) -> Self { + fn from(variant: Tden) -> Self { variant as _ } } -impl crate::FieldSpec for TDEN_A { +impl crate::FieldSpec for Tden { type Ux = u8; } -impl TDEN_R { +#[doc = "Field `TDEN` reader - TBUF Data Enable"] +pub type TdenR = crate::FieldReader; +impl TdenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TDEN_A { + pub const fn variant(&self) -> Tden { match self.bits { - 0 => TDEN_A::VALUE1, - 1 => TDEN_A::VALUE2, - 2 => TDEN_A::VALUE3, - 3 => TDEN_A::VALUE4, + 0 => Tden::Value1, + 1 => Tden::Value2, + 2 => Tden::Value3, + 3 => Tden::Value4, _ => unreachable!(), } } #[doc = "A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TDEN_A::VALUE1 + *self == Tden::Value1 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TDEN_A::VALUE2 + *self == Tden::Value2 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TDEN_A::VALUE3 + *self == Tden::Value3 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TDEN_A::VALUE4 + *self == Tden::Value4 } } #[doc = "Field `TDEN` writer - TBUF Data Enable"] -pub type TDEN_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, TDEN_A>; -impl<'a, REG> TDEN_W<'a, REG> +pub type TdenW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Tden>; +impl<'a, REG> TdenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -535,447 +535,438 @@ where #[doc = "A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TDEN_A::VALUE1) + self.variant(Tden::Value1) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TDEN_A::VALUE2) + self.variant(Tden::Value2) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TDEN_A::VALUE3) + self.variant(Tden::Value3) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TDEN_A::VALUE4) + self.variant(Tden::Value4) } } -#[doc = "Field `TDVTR` reader - TBUF Data Valid Trigger"] -pub type TDVTR_R = crate::BitReader; #[doc = "TBUF Data Valid Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TDVTR_A { +pub enum Tdvtr { #[doc = "0: Bit TCSR.TE is permanently set."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TDVTR_A) -> Self { + fn from(variant: Tdvtr) -> Self { variant as u8 != 0 } } -impl TDVTR_R { +#[doc = "Field `TDVTR` reader - TBUF Data Valid Trigger"] +pub type TdvtrR = crate::BitReader; +impl TdvtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TDVTR_A { + pub const fn variant(&self) -> Tdvtr { match self.bits { - false => TDVTR_A::VALUE1, - true => TDVTR_A::VALUE2, + false => Tdvtr::Value1, + true => Tdvtr::Value2, } } #[doc = "Bit TCSR.TE is permanently set."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TDVTR_A::VALUE1 + *self == Tdvtr::Value1 } #[doc = "Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TDVTR_A::VALUE2 + *self == Tdvtr::Value2 } } #[doc = "Field `TDVTR` writer - TBUF Data Valid Trigger"] -pub type TDVTR_W<'a, REG> = crate::BitWriter<'a, REG, TDVTR_A>; -impl<'a, REG> TDVTR_W<'a, REG> +pub type TdvtrW<'a, REG> = crate::BitWriter<'a, REG, Tdvtr>; +impl<'a, REG> TdvtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit TCSR.TE is permanently set."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TDVTR_A::VALUE1) + self.variant(Tdvtr::Value1) } #[doc = "Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TDVTR_A::VALUE2) + self.variant(Tdvtr::Value2) } } -#[doc = "Field `WA` reader - Word Address"] -pub type WA_R = crate::BitReader; #[doc = "Word Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WA_A { +pub enum Wa { #[doc = "0: The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WA_A) -> Self { + fn from(variant: Wa) -> Self { variant as u8 != 0 } } -impl WA_R { +#[doc = "Field `WA` reader - Word Address"] +pub type WaR = crate::BitReader; +impl WaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WA_A { + pub const fn variant(&self) -> Wa { match self.bits { - false => WA_A::VALUE1, - true => WA_A::VALUE2, + false => Wa::Value1, + true => Wa::Value2, } } #[doc = "The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WA_A::VALUE1 + *self == Wa::Value1 } #[doc = "The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WA_A::VALUE2 + *self == Wa::Value2 } } #[doc = "Field `WA` writer - Word Address"] -pub type WA_W<'a, REG> = crate::BitWriter<'a, REG, WA_A>; -impl<'a, REG> WA_W<'a, REG> +pub type WaW<'a, REG> = crate::BitWriter<'a, REG, Wa>; +impl<'a, REG> WaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WA_A::VALUE1) + self.variant(Wa::Value1) } #[doc = "The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WA_A::VALUE2) + self.variant(Wa::Value2) } } -#[doc = "Field `TSOF` reader - Transmitted Start Of Frame"] -pub type TSOF_R = crate::BitReader; #[doc = "Transmitted Start Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TSOF_A { +pub enum Tsof { #[doc = "0: The latest data word transmission has not been started for the first word of a data frame."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The latest data word transmission has been started for the first word of a data frame."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TSOF_A) -> Self { + fn from(variant: Tsof) -> Self { variant as u8 != 0 } } -impl TSOF_R { +#[doc = "Field `TSOF` reader - Transmitted Start Of Frame"] +pub type TsofR = crate::BitReader; +impl TsofR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TSOF_A { + pub const fn variant(&self) -> Tsof { match self.bits { - false => TSOF_A::VALUE1, - true => TSOF_A::VALUE2, + false => Tsof::Value1, + true => Tsof::Value2, } } #[doc = "The latest data word transmission has not been started for the first word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TSOF_A::VALUE1 + *self == Tsof::Value1 } #[doc = "The latest data word transmission has been started for the first word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TSOF_A::VALUE2 + *self == Tsof::Value2 } } -#[doc = "Field `TV` reader - Transmission Valid"] -pub type TV_R = crate::BitReader; #[doc = "Transmission Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TV_A { +pub enum Tv { #[doc = "0: The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The latest start of a data word transmission has taken place with valid data from TBUF."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TV_A) -> Self { + fn from(variant: Tv) -> Self { variant as u8 != 0 } } -impl TV_R { +#[doc = "Field `TV` reader - Transmission Valid"] +pub type TvR = crate::BitReader; +impl TvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TV_A { + pub const fn variant(&self) -> Tv { match self.bits { - false => TV_A::VALUE1, - true => TV_A::VALUE2, + false => Tv::Value1, + true => Tv::Value2, } } #[doc = "The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TV_A::VALUE1 + *self == Tv::Value1 } #[doc = "The latest start of a data word transmission has taken place with valid data from TBUF."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TV_A::VALUE2 + *self == Tv::Value2 } } -#[doc = "Field `TVC` reader - Transmission Valid Cumulated"] -pub type TVC_R = crate::BitReader; #[doc = "Transmission Valid Cumulated\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TVC_A { +pub enum Tvc { #[doc = "0: Since TVC has been set, at least one data buffer underflow condition has occurred."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Since TVC has been set, no data buffer underflow condition has occurred."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TVC_A) -> Self { + fn from(variant: Tvc) -> Self { variant as u8 != 0 } } -impl TVC_R { +#[doc = "Field `TVC` reader - Transmission Valid Cumulated"] +pub type TvcR = crate::BitReader; +impl TvcR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TVC_A { + pub const fn variant(&self) -> Tvc { match self.bits { - false => TVC_A::VALUE1, - true => TVC_A::VALUE2, + false => Tvc::Value1, + true => Tvc::Value2, } } #[doc = "Since TVC has been set, at least one data buffer underflow condition has occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TVC_A::VALUE1 + *self == Tvc::Value1 } #[doc = "Since TVC has been set, no data buffer underflow condition has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TVC_A::VALUE2 + *self == Tvc::Value2 } } -#[doc = "Field `TE` reader - Trigger Event"] -pub type TE_R = crate::BitReader; #[doc = "Trigger Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TE_A { +pub enum Te { #[doc = "0: The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TE_A) -> Self { + fn from(variant: Te) -> Self { variant as u8 != 0 } } -impl TE_R { +#[doc = "Field `TE` reader - Trigger Event"] +pub type TeR = crate::BitReader; +impl TeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TE_A { + pub const fn variant(&self) -> Te { match self.bits { - false => TE_A::VALUE1, - true => TE_A::VALUE2, + false => Te::Value1, + true => Te::Value2, } } #[doc = "The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TE_A::VALUE1 + *self == Te::Value1 } #[doc = "The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TE_A::VALUE2 + *self == Te::Value2 } } impl R { #[doc = "Bit 0 - WLE Mode"] #[inline(always)] - pub fn wlemd(&self) -> WLEMD_R { - WLEMD_R::new((self.bits & 1) != 0) + pub fn wlemd(&self) -> WlemdR { + WlemdR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Mode"] #[inline(always)] - pub fn selmd(&self) -> SELMD_R { - SELMD_R::new(((self.bits >> 1) & 1) != 0) + pub fn selmd(&self) -> SelmdR { + SelmdR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - FLE Mode"] #[inline(always)] - pub fn flemd(&self) -> FLEMD_R { - FLEMD_R::new(((self.bits >> 2) & 1) != 0) + pub fn flemd(&self) -> FlemdR { + FlemdR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - WA Mode"] #[inline(always)] - pub fn wamd(&self) -> WAMD_R { - WAMD_R::new(((self.bits >> 3) & 1) != 0) + pub fn wamd(&self) -> WamdR { + WamdR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hardware Port Control Mode"] #[inline(always)] - pub fn hpcmd(&self) -> HPCMD_R { - HPCMD_R::new(((self.bits >> 4) & 1) != 0) + pub fn hpcmd(&self) -> HpcmdR { + HpcmdR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Start Of Frame"] #[inline(always)] - pub fn sof(&self) -> SOF_R { - SOF_R::new(((self.bits >> 5) & 1) != 0) + pub fn sof(&self) -> SofR { + SofR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - End Of Frame"] #[inline(always)] - pub fn eof(&self) -> EOF_R { - EOF_R::new(((self.bits >> 6) & 1) != 0) + pub fn eof(&self) -> EofR { + EofR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit Data Valid"] #[inline(always)] - pub fn tdv(&self) -> TDV_R { - TDV_R::new(((self.bits >> 7) & 1) != 0) + pub fn tdv(&self) -> TdvR { + TdvR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - TBUF Data Single Shot Mode"] #[inline(always)] - pub fn tdssm(&self) -> TDSSM_R { - TDSSM_R::new(((self.bits >> 8) & 1) != 0) + pub fn tdssm(&self) -> TdssmR { + TdssmR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 10:11 - TBUF Data Enable"] #[inline(always)] - pub fn tden(&self) -> TDEN_R { - TDEN_R::new(((self.bits >> 10) & 3) as u8) + pub fn tden(&self) -> TdenR { + TdenR::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 12 - TBUF Data Valid Trigger"] #[inline(always)] - pub fn tdvtr(&self) -> TDVTR_R { - TDVTR_R::new(((self.bits >> 12) & 1) != 0) + pub fn tdvtr(&self) -> TdvtrR { + TdvtrR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Word Address"] #[inline(always)] - pub fn wa(&self) -> WA_R { - WA_R::new(((self.bits >> 13) & 1) != 0) + pub fn wa(&self) -> WaR { + WaR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - Transmitted Start Of Frame"] #[inline(always)] - pub fn tsof(&self) -> TSOF_R { - TSOF_R::new(((self.bits >> 24) & 1) != 0) + pub fn tsof(&self) -> TsofR { + TsofR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 26 - Transmission Valid"] #[inline(always)] - pub fn tv(&self) -> TV_R { - TV_R::new(((self.bits >> 26) & 1) != 0) + pub fn tv(&self) -> TvR { + TvR::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Transmission Valid Cumulated"] #[inline(always)] - pub fn tvc(&self) -> TVC_R { - TVC_R::new(((self.bits >> 27) & 1) != 0) + pub fn tvc(&self) -> TvcR { + TvcR::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Trigger Event"] #[inline(always)] - pub fn te(&self) -> TE_R { - TE_R::new(((self.bits >> 28) & 1) != 0) + pub fn te(&self) -> TeR { + TeR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - WLE Mode"] #[inline(always)] #[must_use] - pub fn wlemd(&mut self) -> WLEMD_W { - WLEMD_W::new(self, 0) + pub fn wlemd(&mut self) -> WlemdW { + WlemdW::new(self, 0) } #[doc = "Bit 1 - Select Mode"] #[inline(always)] #[must_use] - pub fn selmd(&mut self) -> SELMD_W { - SELMD_W::new(self, 1) + pub fn selmd(&mut self) -> SelmdW { + SelmdW::new(self, 1) } #[doc = "Bit 2 - FLE Mode"] #[inline(always)] #[must_use] - pub fn flemd(&mut self) -> FLEMD_W { - FLEMD_W::new(self, 2) + pub fn flemd(&mut self) -> FlemdW { + FlemdW::new(self, 2) } #[doc = "Bit 3 - WA Mode"] #[inline(always)] #[must_use] - pub fn wamd(&mut self) -> WAMD_W { - WAMD_W::new(self, 3) + pub fn wamd(&mut self) -> WamdW { + WamdW::new(self, 3) } #[doc = "Bit 4 - Hardware Port Control Mode"] #[inline(always)] #[must_use] - pub fn hpcmd(&mut self) -> HPCMD_W { - HPCMD_W::new(self, 4) + pub fn hpcmd(&mut self) -> HpcmdW { + HpcmdW::new(self, 4) } #[doc = "Bit 5 - Start Of Frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SOF_W { - SOF_W::new(self, 5) + pub fn sof(&mut self) -> SofW { + SofW::new(self, 5) } #[doc = "Bit 6 - End Of Frame"] #[inline(always)] #[must_use] - pub fn eof(&mut self) -> EOF_W { - EOF_W::new(self, 6) + pub fn eof(&mut self) -> EofW { + EofW::new(self, 6) } #[doc = "Bit 8 - TBUF Data Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tdssm(&mut self) -> TDSSM_W { - TDSSM_W::new(self, 8) + pub fn tdssm(&mut self) -> TdssmW { + TdssmW::new(self, 8) } #[doc = "Bits 10:11 - TBUF Data Enable"] #[inline(always)] #[must_use] - pub fn tden(&mut self) -> TDEN_W { - TDEN_W::new(self, 10) + pub fn tden(&mut self) -> TdenW { + TdenW::new(self, 10) } #[doc = "Bit 12 - TBUF Data Valid Trigger"] #[inline(always)] #[must_use] - pub fn tdvtr(&mut self) -> TDVTR_W { - TDVTR_W::new(self, 12) + pub fn tdvtr(&mut self) -> TdvtrW { + TdvtrW::new(self, 12) } #[doc = "Bit 13 - Word Address"] #[inline(always)] #[must_use] - pub fn wa(&mut self) -> WA_W { - WA_W::new(self, 13) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wa(&mut self) -> WaW { + WaW::new(self, 13) } } #[doc = "Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TCSR_SPEC; -impl crate::RegisterSpec for TCSR_SPEC { +pub struct TcsrSpec; +impl crate::RegisterSpec for TcsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`tcsr::R`](R) reader structure"] -impl crate::Readable for TCSR_SPEC {} +impl crate::Readable for TcsrSpec {} #[doc = "`write(|w| ..)` method takes [`tcsr::W`](W) writer structure"] -impl crate::Writable for TCSR_SPEC { +impl crate::Writable for TcsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSR to value 0"] -impl crate::Resettable for TCSR_SPEC { +impl crate::Resettable for TcsrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbptr.rs b/src/usic0_ch0/trbptr.rs index ed9103d8..f14576cb 100644 --- a/src/usic0_ch0/trbptr.rs +++ b/src/usic0_ch0/trbptr.rs @@ -1,43 +1,43 @@ #[doc = "Register `TRBPTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TDIPTR` reader - Transmitter Data Input Pointer"] -pub type TDIPTR_R = crate::FieldReader; +pub type TdiptrR = crate::FieldReader; #[doc = "Field `TDOPTR` reader - Transmitter Data Output Pointer"] -pub type TDOPTR_R = crate::FieldReader; +pub type TdoptrR = crate::FieldReader; #[doc = "Field `RDIPTR` reader - Receiver Data Input Pointer"] -pub type RDIPTR_R = crate::FieldReader; +pub type RdiptrR = crate::FieldReader; #[doc = "Field `RDOPTR` reader - Receiver Data Output Pointer"] -pub type RDOPTR_R = crate::FieldReader; +pub type RdoptrR = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Transmitter Data Input Pointer"] #[inline(always)] - pub fn tdiptr(&self) -> TDIPTR_R { - TDIPTR_R::new((self.bits & 0x3f) as u8) + pub fn tdiptr(&self) -> TdiptrR { + TdiptrR::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Transmitter Data Output Pointer"] #[inline(always)] - pub fn tdoptr(&self) -> TDOPTR_R { - TDOPTR_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn tdoptr(&self) -> TdoptrR { + TdoptrR::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:21 - Receiver Data Input Pointer"] #[inline(always)] - pub fn rdiptr(&self) -> RDIPTR_R { - RDIPTR_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn rdiptr(&self) -> RdiptrR { + RdiptrR::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:29 - Receiver Data Output Pointer"] #[inline(always)] - pub fn rdoptr(&self) -> RDOPTR_R { - RDOPTR_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn rdoptr(&self) -> RdoptrR { + RdoptrR::new(((self.bits >> 24) & 0x3f) as u8) } } #[doc = "Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRBPTR_SPEC; -impl crate::RegisterSpec for TRBPTR_SPEC { +pub struct TrbptrSpec; +impl crate::RegisterSpec for TrbptrSpec { type Ux = u32; } #[doc = "`read()` method returns [`trbptr::R`](R) reader structure"] -impl crate::Readable for TRBPTR_SPEC {} +impl crate::Readable for TrbptrSpec {} #[doc = "`reset()` method sets TRBPTR to value 0"] -impl crate::Resettable for TRBPTR_SPEC { +impl crate::Resettable for TrbptrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbscr.rs b/src/usic0_ch0/trbscr.rs index 23dc81f7..403802fc 100644 --- a/src/usic0_ch0/trbscr.rs +++ b/src/usic0_ch0/trbscr.rs @@ -1,324 +1,315 @@ #[doc = "Register `TRBSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Standard Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSRBI_AW { +pub enum Csrbi { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear TRBSR.SRBI."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSRBI_AW) -> Self { + fn from(variant: Csrbi) -> Self { variant as u8 != 0 } } #[doc = "Field `CSRBI` writer - Clear Standard Receive Buffer Event"] -pub type CSRBI_W<'a, REG> = crate::BitWriter<'a, REG, CSRBI_AW>; -impl<'a, REG> CSRBI_W<'a, REG> +pub type CsrbiW<'a, REG> = crate::BitWriter<'a, REG, Csrbi>; +impl<'a, REG> CsrbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSRBI_AW::VALUE1) + self.variant(Csrbi::Value1) } #[doc = "Clear TRBSR.SRBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSRBI_AW::VALUE2) + self.variant(Csrbi::Value2) } } #[doc = "Clear Receive Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CRBERI_AW { +pub enum Crberi { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear TRBSR.RBERI."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CRBERI_AW) -> Self { + fn from(variant: Crberi) -> Self { variant as u8 != 0 } } #[doc = "Field `CRBERI` writer - Clear Receive Buffer Error Event"] -pub type CRBERI_W<'a, REG> = crate::BitWriter<'a, REG, CRBERI_AW>; -impl<'a, REG> CRBERI_W<'a, REG> +pub type CrberiW<'a, REG> = crate::BitWriter<'a, REG, Crberi>; +impl<'a, REG> CrberiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CRBERI_AW::VALUE1) + self.variant(Crberi::Value1) } #[doc = "Clear TRBSR.RBERI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CRBERI_AW::VALUE2) + self.variant(Crberi::Value2) } } #[doc = "Clear Alternative Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CARBI_AW { +pub enum Carbi { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear TRBSR.ARBI."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CARBI_AW) -> Self { + fn from(variant: Carbi) -> Self { variant as u8 != 0 } } #[doc = "Field `CARBI` writer - Clear Alternative Receive Buffer Event"] -pub type CARBI_W<'a, REG> = crate::BitWriter<'a, REG, CARBI_AW>; -impl<'a, REG> CARBI_W<'a, REG> +pub type CarbiW<'a, REG> = crate::BitWriter<'a, REG, Carbi>; +impl<'a, REG> CarbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CARBI_AW::VALUE1) + self.variant(Carbi::Value1) } #[doc = "Clear TRBSR.ARBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CARBI_AW::VALUE2) + self.variant(Carbi::Value2) } } #[doc = "Clear Standard Transmit Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSTBI_AW { +pub enum Cstbi { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear TRBSR.STBI."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSTBI_AW) -> Self { + fn from(variant: Cstbi) -> Self { variant as u8 != 0 } } #[doc = "Field `CSTBI` writer - Clear Standard Transmit Buffer Event"] -pub type CSTBI_W<'a, REG> = crate::BitWriter<'a, REG, CSTBI_AW>; -impl<'a, REG> CSTBI_W<'a, REG> +pub type CstbiW<'a, REG> = crate::BitWriter<'a, REG, Cstbi>; +impl<'a, REG> CstbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSTBI_AW::VALUE1) + self.variant(Cstbi::Value1) } #[doc = "Clear TRBSR.STBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSTBI_AW::VALUE2) + self.variant(Cstbi::Value2) } } #[doc = "Clear Transmit Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CTBERI_AW { +pub enum Ctberi { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear TRBSR.TBERI."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CTBERI_AW) -> Self { + fn from(variant: Ctberi) -> Self { variant as u8 != 0 } } #[doc = "Field `CTBERI` writer - Clear Transmit Buffer Error Event"] -pub type CTBERI_W<'a, REG> = crate::BitWriter<'a, REG, CTBERI_AW>; -impl<'a, REG> CTBERI_W<'a, REG> +pub type CtberiW<'a, REG> = crate::BitWriter<'a, REG, Ctberi>; +impl<'a, REG> CtberiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CTBERI_AW::VALUE1) + self.variant(Ctberi::Value1) } #[doc = "Clear TRBSR.TBERI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CTBERI_AW::VALUE2) + self.variant(Ctberi::Value2) } } #[doc = "Clear Bypass Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CBDV_AW { +pub enum Cbdv { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear BYPCR.BDV."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CBDV_AW) -> Self { + fn from(variant: Cbdv) -> Self { variant as u8 != 0 } } #[doc = "Field `CBDV` writer - Clear Bypass Data Valid"] -pub type CBDV_W<'a, REG> = crate::BitWriter<'a, REG, CBDV_AW>; -impl<'a, REG> CBDV_W<'a, REG> +pub type CbdvW<'a, REG> = crate::BitWriter<'a, REG, Cbdv>; +impl<'a, REG> CbdvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CBDV_AW::VALUE1) + self.variant(Cbdv::Value1) } #[doc = "Clear BYPCR.BDV."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CBDV_AW::VALUE2) + self.variant(Cbdv::Value2) } } #[doc = "Flush Receive Buffer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FLUSHRB_AW { +pub enum Flushrb { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FLUSHRB_AW) -> Self { + fn from(variant: Flushrb) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSHRB` writer - Flush Receive Buffer"] -pub type FLUSHRB_W<'a, REG> = crate::BitWriter<'a, REG, FLUSHRB_AW>; -impl<'a, REG> FLUSHRB_W<'a, REG> +pub type FlushrbW<'a, REG> = crate::BitWriter<'a, REG, Flushrb>; +impl<'a, REG> FlushrbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FLUSHRB_AW::VALUE1) + self.variant(Flushrb::Value1) } #[doc = "The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FLUSHRB_AW::VALUE2) + self.variant(Flushrb::Value2) } } #[doc = "Flush Transmit Buffer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FLUSHTB_AW { +pub enum Flushtb { #[doc = "0: No effect."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FLUSHTB_AW) -> Self { + fn from(variant: Flushtb) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSHTB` writer - Flush Transmit Buffer"] -pub type FLUSHTB_W<'a, REG> = crate::BitWriter<'a, REG, FLUSHTB_AW>; -impl<'a, REG> FLUSHTB_W<'a, REG> +pub type FlushtbW<'a, REG> = crate::BitWriter<'a, REG, Flushtb>; +impl<'a, REG> FlushtbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FLUSHTB_AW::VALUE1) + self.variant(Flushtb::Value1) } #[doc = "The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FLUSHTB_AW::VALUE2) + self.variant(Flushtb::Value2) } } impl W { #[doc = "Bit 0 - Clear Standard Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn csrbi(&mut self) -> CSRBI_W { - CSRBI_W::new(self, 0) + pub fn csrbi(&mut self) -> CsrbiW { + CsrbiW::new(self, 0) } #[doc = "Bit 1 - Clear Receive Buffer Error Event"] #[inline(always)] #[must_use] - pub fn crberi(&mut self) -> CRBERI_W { - CRBERI_W::new(self, 1) + pub fn crberi(&mut self) -> CrberiW { + CrberiW::new(self, 1) } #[doc = "Bit 2 - Clear Alternative Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn carbi(&mut self) -> CARBI_W { - CARBI_W::new(self, 2) + pub fn carbi(&mut self) -> CarbiW { + CarbiW::new(self, 2) } #[doc = "Bit 8 - Clear Standard Transmit Buffer Event"] #[inline(always)] #[must_use] - pub fn cstbi(&mut self) -> CSTBI_W { - CSTBI_W::new(self, 8) + pub fn cstbi(&mut self) -> CstbiW { + CstbiW::new(self, 8) } #[doc = "Bit 9 - Clear Transmit Buffer Error Event"] #[inline(always)] #[must_use] - pub fn ctberi(&mut self) -> CTBERI_W { - CTBERI_W::new(self, 9) + pub fn ctberi(&mut self) -> CtberiW { + CtberiW::new(self, 9) } #[doc = "Bit 10 - Clear Bypass Data Valid"] #[inline(always)] #[must_use] - pub fn cbdv(&mut self) -> CBDV_W { - CBDV_W::new(self, 10) + pub fn cbdv(&mut self) -> CbdvW { + CbdvW::new(self, 10) } #[doc = "Bit 14 - Flush Receive Buffer"] #[inline(always)] #[must_use] - pub fn flushrb(&mut self) -> FLUSHRB_W { - FLUSHRB_W::new(self, 14) + pub fn flushrb(&mut self) -> FlushrbW { + FlushrbW::new(self, 14) } #[doc = "Bit 15 - Flush Transmit Buffer"] #[inline(always)] #[must_use] - pub fn flushtb(&mut self) -> FLUSHTB_W { - FLUSHTB_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn flushtb(&mut self) -> FlushtbW { + FlushtbW::new(self, 15) } } #[doc = "Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRBSCR_SPEC; -impl crate::RegisterSpec for TRBSCR_SPEC { +pub struct TrbscrSpec; +impl crate::RegisterSpec for TrbscrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trbscr::W`](W) writer structure"] -impl crate::Writable for TRBSCR_SPEC { +impl crate::Writable for TrbscrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRBSCR to value 0"] -impl crate::Resettable for TRBSCR_SPEC { +impl crate::Resettable for TrbscrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbsr.rs b/src/usic0_ch0/trbsr.rs index db7ac80d..c01da375 100644 --- a/src/usic0_ch0/trbsr.rs +++ b/src/usic0_ch0/trbsr.rs @@ -1,696 +1,687 @@ #[doc = "Register `TRBSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRBSR` writer"] -pub type W = crate::W; -#[doc = "Field `SRBI` reader - Standard Receive Buffer Event"] -pub type SRBI_R = crate::BitReader; +pub type W = crate::W; #[doc = "Standard Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRBI_A { +pub enum Srbi { #[doc = "0: A standard receive buffer event has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard receive buffer event has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRBI_A) -> Self { + fn from(variant: Srbi) -> Self { variant as u8 != 0 } } -impl SRBI_R { +#[doc = "Field `SRBI` reader - Standard Receive Buffer Event"] +pub type SrbiR = crate::BitReader; +impl SrbiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRBI_A { + pub const fn variant(&self) -> Srbi { match self.bits { - false => SRBI_A::VALUE1, - true => SRBI_A::VALUE2, + false => Srbi::Value1, + true => Srbi::Value2, } } #[doc = "A standard receive buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBI_A::VALUE1 + *self == Srbi::Value1 } #[doc = "A standard receive buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBI_A::VALUE2 + *self == Srbi::Value2 } } #[doc = "Field `SRBI` writer - Standard Receive Buffer Event"] -pub type SRBI_W<'a, REG> = crate::BitWriter<'a, REG, SRBI_A>; -impl<'a, REG> SRBI_W<'a, REG> +pub type SrbiW<'a, REG> = crate::BitWriter<'a, REG, Srbi>; +impl<'a, REG> SrbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard receive buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRBI_A::VALUE1) + self.variant(Srbi::Value1) } #[doc = "A standard receive buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRBI_A::VALUE2) + self.variant(Srbi::Value2) } } -#[doc = "Field `RBERI` reader - Receive Buffer Error Event"] -pub type RBERI_R = crate::BitReader; #[doc = "Receive Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RBERI_A { +pub enum Rberi { #[doc = "0: A receive buffer error event has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A receive buffer error event has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RBERI_A) -> Self { + fn from(variant: Rberi) -> Self { variant as u8 != 0 } } -impl RBERI_R { +#[doc = "Field `RBERI` reader - Receive Buffer Error Event"] +pub type RberiR = crate::BitReader; +impl RberiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RBERI_A { + pub const fn variant(&self) -> Rberi { match self.bits { - false => RBERI_A::VALUE1, - true => RBERI_A::VALUE2, + false => Rberi::Value1, + true => Rberi::Value2, } } #[doc = "A receive buffer error event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RBERI_A::VALUE1 + *self == Rberi::Value1 } #[doc = "A receive buffer error event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RBERI_A::VALUE2 + *self == Rberi::Value2 } } #[doc = "Field `RBERI` writer - Receive Buffer Error Event"] -pub type RBERI_W<'a, REG> = crate::BitWriter<'a, REG, RBERI_A>; -impl<'a, REG> RBERI_W<'a, REG> +pub type RberiW<'a, REG> = crate::BitWriter<'a, REG, Rberi>; +impl<'a, REG> RberiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive buffer error event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RBERI_A::VALUE1) + self.variant(Rberi::Value1) } #[doc = "A receive buffer error event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RBERI_A::VALUE2) + self.variant(Rberi::Value2) } } -#[doc = "Field `ARBI` reader - Alternative Receive Buffer Event"] -pub type ARBI_R = crate::BitReader; #[doc = "Alternative Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBI_A { +pub enum Arbi { #[doc = "0: An alternative receive buffer event has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: An alternative receive buffer event has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBI_A) -> Self { + fn from(variant: Arbi) -> Self { variant as u8 != 0 } } -impl ARBI_R { +#[doc = "Field `ARBI` reader - Alternative Receive Buffer Event"] +pub type ArbiR = crate::BitReader; +impl ArbiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBI_A { + pub const fn variant(&self) -> Arbi { match self.bits { - false => ARBI_A::VALUE1, - true => ARBI_A::VALUE2, + false => Arbi::Value1, + true => Arbi::Value2, } } #[doc = "An alternative receive buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBI_A::VALUE1 + *self == Arbi::Value1 } #[doc = "An alternative receive buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBI_A::VALUE2 + *self == Arbi::Value2 } } #[doc = "Field `ARBI` writer - Alternative Receive Buffer Event"] -pub type ARBI_W<'a, REG> = crate::BitWriter<'a, REG, ARBI_A>; -impl<'a, REG> ARBI_W<'a, REG> +pub type ArbiW<'a, REG> = crate::BitWriter<'a, REG, Arbi>; +impl<'a, REG> ArbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBI_A::VALUE1) + self.variant(Arbi::Value1) } #[doc = "An alternative receive buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBI_A::VALUE2) + self.variant(Arbi::Value2) } } -#[doc = "Field `REMPTY` reader - Receive Buffer Empty"] -pub type REMPTY_R = crate::BitReader; #[doc = "Receive Buffer Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REMPTY_A { +pub enum Rempty { #[doc = "0: The receive buffer is not empty."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive buffer is empty."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REMPTY_A) -> Self { + fn from(variant: Rempty) -> Self { variant as u8 != 0 } } -impl REMPTY_R { +#[doc = "Field `REMPTY` reader - Receive Buffer Empty"] +pub type RemptyR = crate::BitReader; +impl RemptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REMPTY_A { + pub const fn variant(&self) -> Rempty { match self.bits { - false => REMPTY_A::VALUE1, - true => REMPTY_A::VALUE2, + false => Rempty::Value1, + true => Rempty::Value2, } } #[doc = "The receive buffer is not empty."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REMPTY_A::VALUE1 + *self == Rempty::Value1 } #[doc = "The receive buffer is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REMPTY_A::VALUE2 + *self == Rempty::Value2 } } -#[doc = "Field `RFULL` reader - Receive Buffer Full"] -pub type RFULL_R = crate::BitReader; #[doc = "Receive Buffer Full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RFULL_A { +pub enum Rfull { #[doc = "0: The receive buffer is not full."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The receive buffer is full."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RFULL_A) -> Self { + fn from(variant: Rfull) -> Self { variant as u8 != 0 } } -impl RFULL_R { +#[doc = "Field `RFULL` reader - Receive Buffer Full"] +pub type RfullR = crate::BitReader; +impl RfullR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RFULL_A { + pub const fn variant(&self) -> Rfull { match self.bits { - false => RFULL_A::VALUE1, - true => RFULL_A::VALUE2, + false => Rfull::Value1, + true => Rfull::Value2, } } #[doc = "The receive buffer is not full."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RFULL_A::VALUE1 + *self == Rfull::Value1 } #[doc = "The receive buffer is full."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RFULL_A::VALUE2 + *self == Rfull::Value2 } } -#[doc = "Field `RBUS` reader - Receive Buffer Busy"] -pub type RBUS_R = crate::BitReader; #[doc = "Receive Buffer Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RBUS_A { +pub enum Rbus { #[doc = "0: The receive buffer information has been completely updated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RBUS_A) -> Self { + fn from(variant: Rbus) -> Self { variant as u8 != 0 } } -impl RBUS_R { +#[doc = "Field `RBUS` reader - Receive Buffer Busy"] +pub type RbusR = crate::BitReader; +impl RbusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RBUS_A { + pub const fn variant(&self) -> Rbus { match self.bits { - false => RBUS_A::VALUE1, - true => RBUS_A::VALUE2, + false => Rbus::Value1, + true => Rbus::Value2, } } #[doc = "The receive buffer information has been completely updated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RBUS_A::VALUE1 + *self == Rbus::Value1 } #[doc = "The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RBUS_A::VALUE2 + *self == Rbus::Value2 } } -#[doc = "Field `SRBT` reader - Standard Receive Buffer Event Trigger"] -pub type SRBT_R = crate::BitReader; #[doc = "Standard Receive Buffer Event Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRBT_A { +pub enum Srbt { #[doc = "0: A standard receive buffer event is not triggered using this bit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard receive buffer event is triggered using this bit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRBT_A) -> Self { + fn from(variant: Srbt) -> Self { variant as u8 != 0 } } -impl SRBT_R { +#[doc = "Field `SRBT` reader - Standard Receive Buffer Event Trigger"] +pub type SrbtR = crate::BitReader; +impl SrbtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRBT_A { + pub const fn variant(&self) -> Srbt { match self.bits { - false => SRBT_A::VALUE1, - true => SRBT_A::VALUE2, + false => Srbt::Value1, + true => Srbt::Value2, } } #[doc = "A standard receive buffer event is not triggered using this bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRBT_A::VALUE1 + *self == Srbt::Value1 } #[doc = "A standard receive buffer event is triggered using this bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRBT_A::VALUE2 + *self == Srbt::Value2 } } -#[doc = "Field `STBI` reader - Standard Transmit Buffer Event"] -pub type STBI_R = crate::BitReader; #[doc = "Standard Transmit Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STBI_A { +pub enum Stbi { #[doc = "0: A standard transmit buffer event has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard transmit buffer event has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STBI_A) -> Self { + fn from(variant: Stbi) -> Self { variant as u8 != 0 } } -impl STBI_R { +#[doc = "Field `STBI` reader - Standard Transmit Buffer Event"] +pub type StbiR = crate::BitReader; +impl StbiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STBI_A { + pub const fn variant(&self) -> Stbi { match self.bits { - false => STBI_A::VALUE1, - true => STBI_A::VALUE2, + false => Stbi::Value1, + true => Stbi::Value2, } } #[doc = "A standard transmit buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBI_A::VALUE1 + *self == Stbi::Value1 } #[doc = "A standard transmit buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBI_A::VALUE2 + *self == Stbi::Value2 } } #[doc = "Field `STBI` writer - Standard Transmit Buffer Event"] -pub type STBI_W<'a, REG> = crate::BitWriter<'a, REG, STBI_A>; -impl<'a, REG> STBI_W<'a, REG> +pub type StbiW<'a, REG> = crate::BitWriter<'a, REG, Stbi>; +impl<'a, REG> StbiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard transmit buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STBI_A::VALUE1) + self.variant(Stbi::Value1) } #[doc = "A standard transmit buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STBI_A::VALUE2) + self.variant(Stbi::Value2) } } -#[doc = "Field `TBERI` reader - Transmit Buffer Error Event"] -pub type TBERI_R = crate::BitReader; #[doc = "Transmit Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBERI_A { +pub enum Tberi { #[doc = "0: A transmit buffer error event has not been detected."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A transmit buffer error event has been detected."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBERI_A) -> Self { + fn from(variant: Tberi) -> Self { variant as u8 != 0 } } -impl TBERI_R { +#[doc = "Field `TBERI` reader - Transmit Buffer Error Event"] +pub type TberiR = crate::BitReader; +impl TberiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBERI_A { + pub const fn variant(&self) -> Tberi { match self.bits { - false => TBERI_A::VALUE1, - true => TBERI_A::VALUE2, + false => Tberi::Value1, + true => Tberi::Value2, } } #[doc = "A transmit buffer error event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBERI_A::VALUE1 + *self == Tberi::Value1 } #[doc = "A transmit buffer error event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBERI_A::VALUE2 + *self == Tberi::Value2 } } #[doc = "Field `TBERI` writer - Transmit Buffer Error Event"] -pub type TBERI_W<'a, REG> = crate::BitWriter<'a, REG, TBERI_A>; -impl<'a, REG> TBERI_W<'a, REG> +pub type TberiW<'a, REG> = crate::BitWriter<'a, REG, Tberi>; +impl<'a, REG> TberiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer error event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TBERI_A::VALUE1) + self.variant(Tberi::Value1) } #[doc = "A transmit buffer error event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TBERI_A::VALUE2) + self.variant(Tberi::Value2) } } -#[doc = "Field `TEMPTY` reader - Transmit Buffer Empty"] -pub type TEMPTY_R = crate::BitReader; #[doc = "Transmit Buffer Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TEMPTY_A { +pub enum Tempty { #[doc = "0: The transmit buffer is not empty."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit buffer is empty."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TEMPTY_A) -> Self { + fn from(variant: Tempty) -> Self { variant as u8 != 0 } } -impl TEMPTY_R { +#[doc = "Field `TEMPTY` reader - Transmit Buffer Empty"] +pub type TemptyR = crate::BitReader; +impl TemptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TEMPTY_A { + pub const fn variant(&self) -> Tempty { match self.bits { - false => TEMPTY_A::VALUE1, - true => TEMPTY_A::VALUE2, + false => Tempty::Value1, + true => Tempty::Value2, } } #[doc = "The transmit buffer is not empty."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TEMPTY_A::VALUE1 + *self == Tempty::Value1 } #[doc = "The transmit buffer is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TEMPTY_A::VALUE2 + *self == Tempty::Value2 } } -#[doc = "Field `TFULL` reader - Transmit Buffer Full"] -pub type TFULL_R = crate::BitReader; #[doc = "Transmit Buffer Full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TFULL_A { +pub enum Tfull { #[doc = "0: The transmit buffer is not full."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The transmit buffer is full."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TFULL_A) -> Self { + fn from(variant: Tfull) -> Self { variant as u8 != 0 } } -impl TFULL_R { +#[doc = "Field `TFULL` reader - Transmit Buffer Full"] +pub type TfullR = crate::BitReader; +impl TfullR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TFULL_A { + pub const fn variant(&self) -> Tfull { match self.bits { - false => TFULL_A::VALUE1, - true => TFULL_A::VALUE2, + false => Tfull::Value1, + true => Tfull::Value2, } } #[doc = "The transmit buffer is not full."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TFULL_A::VALUE1 + *self == Tfull::Value1 } #[doc = "The transmit buffer is full."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TFULL_A::VALUE2 + *self == Tfull::Value2 } } -#[doc = "Field `TBUS` reader - Transmit Buffer Busy"] -pub type TBUS_R = crate::BitReader; #[doc = "Transmit Buffer Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TBUS_A { +pub enum Tbus { #[doc = "0: The transmit buffer information has been completely updated."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TBUS_A) -> Self { + fn from(variant: Tbus) -> Self { variant as u8 != 0 } } -impl TBUS_R { +#[doc = "Field `TBUS` reader - Transmit Buffer Busy"] +pub type TbusR = crate::BitReader; +impl TbusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TBUS_A { + pub const fn variant(&self) -> Tbus { match self.bits { - false => TBUS_A::VALUE1, - true => TBUS_A::VALUE2, + false => Tbus::Value1, + true => Tbus::Value2, } } #[doc = "The transmit buffer information has been completely updated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TBUS_A::VALUE1 + *self == Tbus::Value1 } #[doc = "The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TBUS_A::VALUE2 + *self == Tbus::Value2 } } -#[doc = "Field `STBT` reader - Standard Transmit Buffer Event Trigger"] -pub type STBT_R = crate::BitReader; #[doc = "Standard Transmit Buffer Event Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum STBT_A { +pub enum Stbt { #[doc = "0: A standard transmit buffer event is not triggered using this bit."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A standard transmit buffer event is triggered using this bit."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: STBT_A) -> Self { + fn from(variant: Stbt) -> Self { variant as u8 != 0 } } -impl STBT_R { +#[doc = "Field `STBT` reader - Standard Transmit Buffer Event Trigger"] +pub type StbtR = crate::BitReader; +impl StbtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STBT_A { + pub const fn variant(&self) -> Stbt { match self.bits { - false => STBT_A::VALUE1, - true => STBT_A::VALUE2, + false => Stbt::Value1, + true => Stbt::Value2, } } #[doc = "A standard transmit buffer event is not triggered using this bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STBT_A::VALUE1 + *self == Stbt::Value1 } #[doc = "A standard transmit buffer event is triggered using this bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STBT_A::VALUE2 + *self == Stbt::Value2 } } #[doc = "Field `RBFLVL` reader - Receive Buffer Filling Level"] -pub type RBFLVL_R = crate::FieldReader; +pub type RbflvlR = crate::FieldReader; #[doc = "Field `TBFLVL` reader - Transmit Buffer Filling Level"] -pub type TBFLVL_R = crate::FieldReader; +pub type TbflvlR = crate::FieldReader; impl R { #[doc = "Bit 0 - Standard Receive Buffer Event"] #[inline(always)] - pub fn srbi(&self) -> SRBI_R { - SRBI_R::new((self.bits & 1) != 0) + pub fn srbi(&self) -> SrbiR { + SrbiR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Receive Buffer Error Event"] #[inline(always)] - pub fn rberi(&self) -> RBERI_R { - RBERI_R::new(((self.bits >> 1) & 1) != 0) + pub fn rberi(&self) -> RberiR { + RberiR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Alternative Receive Buffer Event"] #[inline(always)] - pub fn arbi(&self) -> ARBI_R { - ARBI_R::new(((self.bits >> 2) & 1) != 0) + pub fn arbi(&self) -> ArbiR { + ArbiR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Receive Buffer Empty"] #[inline(always)] - pub fn rempty(&self) -> REMPTY_R { - REMPTY_R::new(((self.bits >> 3) & 1) != 0) + pub fn rempty(&self) -> RemptyR { + RemptyR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive Buffer Full"] #[inline(always)] - pub fn rfull(&self) -> RFULL_R { - RFULL_R::new(((self.bits >> 4) & 1) != 0) + pub fn rfull(&self) -> RfullR { + RfullR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Buffer Busy"] #[inline(always)] - pub fn rbus(&self) -> RBUS_R { - RBUS_R::new(((self.bits >> 5) & 1) != 0) + pub fn rbus(&self) -> RbusR { + RbusR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Standard Receive Buffer Event Trigger"] #[inline(always)] - pub fn srbt(&self) -> SRBT_R { - SRBT_R::new(((self.bits >> 6) & 1) != 0) + pub fn srbt(&self) -> SrbtR { + SrbtR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Standard Transmit Buffer Event"] #[inline(always)] - pub fn stbi(&self) -> STBI_R { - STBI_R::new(((self.bits >> 8) & 1) != 0) + pub fn stbi(&self) -> StbiR { + StbiR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transmit Buffer Error Event"] #[inline(always)] - pub fn tberi(&self) -> TBERI_R { - TBERI_R::new(((self.bits >> 9) & 1) != 0) + pub fn tberi(&self) -> TberiR { + TberiR::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Transmit Buffer Empty"] #[inline(always)] - pub fn tempty(&self) -> TEMPTY_R { - TEMPTY_R::new(((self.bits >> 11) & 1) != 0) + pub fn tempty(&self) -> TemptyR { + TemptyR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Full"] #[inline(always)] - pub fn tfull(&self) -> TFULL_R { - TFULL_R::new(((self.bits >> 12) & 1) != 0) + pub fn tfull(&self) -> TfullR { + TfullR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Busy"] #[inline(always)] - pub fn tbus(&self) -> TBUS_R { - TBUS_R::new(((self.bits >> 13) & 1) != 0) + pub fn tbus(&self) -> TbusR { + TbusR::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Standard Transmit Buffer Event Trigger"] #[inline(always)] - pub fn stbt(&self) -> STBT_R { - STBT_R::new(((self.bits >> 14) & 1) != 0) + pub fn stbt(&self) -> StbtR { + StbtR::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:22 - Receive Buffer Filling Level"] #[inline(always)] - pub fn rbflvl(&self) -> RBFLVL_R { - RBFLVL_R::new(((self.bits >> 16) & 0x7f) as u8) + pub fn rbflvl(&self) -> RbflvlR { + RbflvlR::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 24:30 - Transmit Buffer Filling Level"] #[inline(always)] - pub fn tbflvl(&self) -> TBFLVL_R { - TBFLVL_R::new(((self.bits >> 24) & 0x7f) as u8) + pub fn tbflvl(&self) -> TbflvlR { + TbflvlR::new(((self.bits >> 24) & 0x7f) as u8) } } impl W { #[doc = "Bit 0 - Standard Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn srbi(&mut self) -> SRBI_W { - SRBI_W::new(self, 0) + pub fn srbi(&mut self) -> SrbiW { + SrbiW::new(self, 0) } #[doc = "Bit 1 - Receive Buffer Error Event"] #[inline(always)] #[must_use] - pub fn rberi(&mut self) -> RBERI_W { - RBERI_W::new(self, 1) + pub fn rberi(&mut self) -> RberiW { + RberiW::new(self, 1) } #[doc = "Bit 2 - Alternative Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn arbi(&mut self) -> ARBI_W { - ARBI_W::new(self, 2) + pub fn arbi(&mut self) -> ArbiW { + ArbiW::new(self, 2) } #[doc = "Bit 8 - Standard Transmit Buffer Event"] #[inline(always)] #[must_use] - pub fn stbi(&mut self) -> STBI_W { - STBI_W::new(self, 8) + pub fn stbi(&mut self) -> StbiW { + StbiW::new(self, 8) } #[doc = "Bit 9 - Transmit Buffer Error Event"] #[inline(always)] #[must_use] - pub fn tberi(&mut self) -> TBERI_W { - TBERI_W::new(self, 9) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tberi(&mut self) -> TberiW { + TberiW::new(self, 9) } } #[doc = "Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TRBSR_SPEC; -impl crate::RegisterSpec for TRBSR_SPEC { +pub struct TrbsrSpec; +impl crate::RegisterSpec for TrbsrSpec { type Ux = u32; } #[doc = "`read()` method returns [`trbsr::R`](R) reader structure"] -impl crate::Readable for TRBSR_SPEC {} +impl crate::Readable for TrbsrSpec {} #[doc = "`write(|w| ..)` method takes [`trbsr::W`](W) writer structure"] -impl crate::Writable for TRBSR_SPEC { +impl crate::Writable for TrbsrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRBSR to value 0x0808"] -impl crate::Resettable for TRBSR_SPEC { +impl crate::Resettable for TrbsrSpec { const RESET_VALUE: u32 = 0x0808; } diff --git a/src/vadc.rs b/src/vadc.rs index c108faea..044b1004 100644 --- a/src/vadc.rs +++ b/src/vadc.rs @@ -1,226 +1,243 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - clc: CLC, + clc: Clc, _reserved1: [u8; 0x04], - id: ID, + id: Id, _reserved2: [u8; 0x1c], - ocs: OCS, + ocs: Ocs, _reserved3: [u8; 0x54], - globcfg: GLOBCFG, + globcfg: Globcfg, _reserved4: [u8; 0x1c], - globiclass: [GLOBICLASS; 2], + globiclass: [Globiclass; 2], _reserved5: [u8; 0x10], - globbound: GLOBBOUND, + globbound: Globbound, _reserved6: [u8; 0x24], - globeflag: GLOBEFLAG, + globeflag: Globeflag, _reserved7: [u8; 0x5c], - globevnp: GLOBEVNP, + globevnp: Globevnp, _reserved8: [u8; 0x1c], - globtf: GLOBTF, + globtf: Globtf, _reserved9: [u8; 0x1c], - brssel: [BRSSEL; 4], + brssel: [Brssel; 4], _reserved10: [u8; 0x30], - brspnd: [BRSPND; 4], + brspnd: [Brspnd; 4], _reserved11: [u8; 0x30], - brsctrl: BRSCTRL, - brsmr: BRSMR, + brsctrl: Brsctrl, + brsmr: Brsmr, _reserved13: [u8; 0x78], - globrcr: GLOBRCR, + globrcr: Globrcr, _reserved14: [u8; 0x7c], - globres: GLOBRES, + globres: Globres, _reserved15: [u8; 0x7c], - globresd: GLOBRESD, + globresd: Globresd, _reserved16: [u8; 0x6c], - emuxsel: EMUXSEL, + emuxsel: Emuxsel, } impl RegisterBlock { #[doc = "0x00 - Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &CLC { + pub const fn clc(&self) -> &Clc { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x28 - OCDS Control and Status Register"] #[inline(always)] - pub const fn ocs(&self) -> &OCS { + pub const fn ocs(&self) -> &Ocs { &self.ocs } #[doc = "0x80 - Global Configuration Register"] #[inline(always)] - pub const fn globcfg(&self) -> &GLOBCFG { + pub const fn globcfg(&self) -> &Globcfg { &self.globcfg } #[doc = "0xa0..0xa8 - Input Class Register, Global"] #[inline(always)] - pub const fn globiclass(&self, n: usize) -> &GLOBICLASS { + pub const fn globiclass(&self, n: usize) -> &Globiclass { &self.globiclass[n] } #[doc = "Iterator for array of:"] #[doc = "0xa0..0xa8 - Input Class Register, Global"] #[inline(always)] - pub fn globiclass_iter(&self) -> impl Iterator { + pub fn globiclass_iter(&self) -> impl Iterator { self.globiclass.iter() } #[doc = "0xb8 - Global Boundary Select Register"] #[inline(always)] - pub const fn globbound(&self) -> &GLOBBOUND { + pub const fn globbound(&self) -> &Globbound { &self.globbound } #[doc = "0xe0 - Global Event Flag Register"] #[inline(always)] - pub const fn globeflag(&self) -> &GLOBEFLAG { + pub const fn globeflag(&self) -> &Globeflag { &self.globeflag } #[doc = "0x140 - Global Event Node Pointer Register"] #[inline(always)] - pub const fn globevnp(&self) -> &GLOBEVNP { + pub const fn globevnp(&self) -> &Globevnp { &self.globevnp } #[doc = "0x160 - Global Test Functions Register"] #[inline(always)] - pub const fn globtf(&self) -> &GLOBTF { + pub const fn globtf(&self) -> &Globtf { &self.globtf } #[doc = "0x180..0x190 - Background Request Source Channel Select Register"] #[inline(always)] - pub const fn brssel(&self, n: usize) -> &BRSSEL { + pub const fn brssel(&self, n: usize) -> &Brssel { &self.brssel[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x190 - Background Request Source Channel Select Register"] #[inline(always)] - pub fn brssel_iter(&self) -> impl Iterator { + pub fn brssel_iter(&self) -> impl Iterator { self.brssel.iter() } #[doc = "0x1c0..0x1d0 - Background Request Source Pending Register"] #[inline(always)] - pub const fn brspnd(&self, n: usize) -> &BRSPND { + pub const fn brspnd(&self, n: usize) -> &Brspnd { &self.brspnd[n] } #[doc = "Iterator for array of:"] #[doc = "0x1c0..0x1d0 - Background Request Source Pending Register"] #[inline(always)] - pub fn brspnd_iter(&self) -> impl Iterator { + pub fn brspnd_iter(&self) -> impl Iterator { self.brspnd.iter() } #[doc = "0x200 - Background Request Source Control Register"] #[inline(always)] - pub const fn brsctrl(&self) -> &BRSCTRL { + pub const fn brsctrl(&self) -> &Brsctrl { &self.brsctrl } #[doc = "0x204 - Background Request Source Mode Register"] #[inline(always)] - pub const fn brsmr(&self) -> &BRSMR { + pub const fn brsmr(&self) -> &Brsmr { &self.brsmr } #[doc = "0x280 - Global Result Control Register"] #[inline(always)] - pub const fn globrcr(&self) -> &GLOBRCR { + pub const fn globrcr(&self) -> &Globrcr { &self.globrcr } #[doc = "0x300 - Global Result Register"] #[inline(always)] - pub const fn globres(&self) -> &GLOBRES { + pub const fn globres(&self) -> &Globres { &self.globres } #[doc = "0x380 - Global Result Register, Debug"] #[inline(always)] - pub const fn globresd(&self) -> &GLOBRESD { + pub const fn globresd(&self) -> &Globresd { &self.globresd } #[doc = "0x3f0 - External Multiplexer Select Register"] #[inline(always)] - pub const fn emuxsel(&self) -> &EMUXSEL { + pub const fn emuxsel(&self) -> &Emuxsel { &self.emuxsel } } #[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -pub type CLC = crate::Reg; +#[doc(alias = "CLC")] +pub type Clc = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] module"] -pub type OCS = crate::Reg; +#[doc(alias = "OCS")] +pub type Ocs = crate::Reg; #[doc = "OCDS Control and Status Register"] pub mod ocs; #[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] module"] -pub type GLOBCFG = crate::Reg; +#[doc(alias = "GLOBCFG")] +pub type Globcfg = crate::Reg; #[doc = "Global Configuration Register"] pub mod globcfg; #[doc = "GLOBICLASS (rw) register accessor: Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globiclass`] module"] -pub type GLOBICLASS = crate::Reg; +#[doc(alias = "GLOBICLASS")] +pub type Globiclass = crate::Reg; #[doc = "Input Class Register, Global"] pub mod globiclass; #[doc = "GLOBBOUND (rw) register accessor: Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globbound`] module"] -pub type GLOBBOUND = crate::Reg; +#[doc(alias = "GLOBBOUND")] +pub type Globbound = crate::Reg; #[doc = "Global Boundary Select Register"] pub mod globbound; #[doc = "GLOBEFLAG (rw) register accessor: Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globeflag`] module"] -pub type GLOBEFLAG = crate::Reg; +#[doc(alias = "GLOBEFLAG")] +pub type Globeflag = crate::Reg; #[doc = "Global Event Flag Register"] pub mod globeflag; #[doc = "GLOBEVNP (rw) register accessor: Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globevnp`] module"] -pub type GLOBEVNP = crate::Reg; +#[doc(alias = "GLOBEVNP")] +pub type Globevnp = crate::Reg; #[doc = "Global Event Node Pointer Register"] pub mod globevnp; #[doc = "GLOBTF (rw) register accessor: Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globtf`] module"] -pub type GLOBTF = crate::Reg; +#[doc(alias = "GLOBTF")] +pub type Globtf = crate::Reg; #[doc = "Global Test Functions Register"] pub mod globtf; #[doc = "BRSSEL (rw) register accessor: Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brssel`] module"] -pub type BRSSEL = crate::Reg; +#[doc(alias = "BRSSEL")] +pub type Brssel = crate::Reg; #[doc = "Background Request Source Channel Select Register"] pub mod brssel; #[doc = "BRSPND (rw) register accessor: Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brspnd`] module"] -pub type BRSPND = crate::Reg; +#[doc(alias = "BRSPND")] +pub type Brspnd = crate::Reg; #[doc = "Background Request Source Pending Register"] pub mod brspnd; #[doc = "BRSCTRL (rw) register accessor: Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsctrl`] module"] -pub type BRSCTRL = crate::Reg; +#[doc(alias = "BRSCTRL")] +pub type Brsctrl = crate::Reg; #[doc = "Background Request Source Control Register"] pub mod brsctrl; #[doc = "BRSMR (rw) register accessor: Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsmr`] module"] -pub type BRSMR = crate::Reg; +#[doc(alias = "BRSMR")] +pub type Brsmr = crate::Reg; #[doc = "Background Request Source Mode Register"] pub mod brsmr; #[doc = "GLOBRCR (rw) register accessor: Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrcr`] module"] -pub type GLOBRCR = crate::Reg; +#[doc(alias = "GLOBRCR")] +pub type Globrcr = crate::Reg; #[doc = "Global Result Control Register"] pub mod globrcr; #[doc = "GLOBRES (rw) register accessor: Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globres`] module"] -pub type GLOBRES = crate::Reg; +#[doc(alias = "GLOBRES")] +pub type Globres = crate::Reg; #[doc = "Global Result Register"] pub mod globres; #[doc = "GLOBRESD (rw) register accessor: Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globresd`] module"] -pub type GLOBRESD = crate::Reg; +#[doc(alias = "GLOBRESD")] +pub type Globresd = crate::Reg; #[doc = "Global Result Register, Debug"] pub mod globresd; #[doc = "EMUXSEL (rw) register accessor: External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxsel`] module"] -pub type EMUXSEL = crate::Reg; +#[doc(alias = "EMUXSEL")] +pub type Emuxsel = crate::Reg; #[doc = "External Multiplexer Select Register"] pub mod emuxsel; diff --git a/src/vadc/brsctrl.rs b/src/vadc/brsctrl.rs index 6d1abb5d..ba752a5f 100644 --- a/src/vadc/brsctrl.rs +++ b/src/vadc/brsctrl.rs @@ -1,59 +1,59 @@ #[doc = "Register `BRSCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SRCRESREG_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCRESREG_A { +pub enum Srcresreg { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Store result in group result register GxRES1"] - VALUE2 = 1, + Value2 = 1, #[doc = "15: Store result in group result register GxRES15"] - VALUE3 = 15, + Value3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCRESREG_A) -> Self { + fn from(variant: Srcresreg) -> Self { variant as _ } } -impl crate::FieldSpec for SRCRESREG_A { +impl crate::FieldSpec for Srcresreg { type Ux = u8; } -impl SRCRESREG_R { +#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] +pub type SrcresregR = crate::FieldReader; +impl SrcresregR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRCRESREG_A::VALUE1), - 1 => Some(SRCRESREG_A::VALUE2), - 15 => Some(SRCRESREG_A::VALUE3), + 0 => Some(Srcresreg::Value1), + 1 => Some(Srcresreg::Value2), + 15 => Some(Srcresreg::Value3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRCRESREG_A::VALUE1 + *self == Srcresreg::Value1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRCRESREG_A::VALUE2 + *self == Srcresreg::Value2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SRCRESREG_A::VALUE3 + *self == Srcresreg::Value3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; -impl<'a, REG> SRCRESREG_W<'a, REG> +pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; +impl<'a, REG> SrcresregW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,85 +61,85 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE1) + self.variant(Srcresreg::Value1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE2) + self.variant(Srcresreg::Value2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE3) + self.variant(Srcresreg::Value3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XTSEL_R = crate::FieldReader; +pub type XtselR = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XTLVL_R = crate::BitReader; -#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XTMODE_R = crate::FieldReader; +pub type XtlvlR = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum XTMODE_A { +pub enum Xtmode { #[doc = "0: No external trigger"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger event upon a falling edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger event upon a rising edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Trigger event upon any edge"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: XTMODE_A) -> Self { + fn from(variant: Xtmode) -> Self { variant as _ } } -impl crate::FieldSpec for XTMODE_A { +impl crate::FieldSpec for Xtmode { type Ux = u8; } -impl XTMODE_R { +#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] +pub type XtmodeR = crate::FieldReader; +impl XtmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XTMODE_A { + pub const fn variant(&self) -> Xtmode { match self.bits { - 0 => XTMODE_A::VALUE1, - 1 => XTMODE_A::VALUE2, - 2 => XTMODE_A::VALUE3, - 3 => XTMODE_A::VALUE4, + 0 => Xtmode::Value1, + 1 => Xtmode::Value2, + 2 => Xtmode::Value3, + 3 => Xtmode::Value4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XTMODE_A::VALUE1 + *self == Xtmode::Value1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XTMODE_A::VALUE2 + *self == Xtmode::Value2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == XTMODE_A::VALUE3 + *self == Xtmode::Value3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == XTMODE_A::VALUE4 + *self == Xtmode::Value4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XTMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, XTMODE_A>; -impl<'a, REG> XTMODE_W<'a, REG> +pub type XtmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Xtmode>; +impl<'a, REG> XtmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -147,185 +147,176 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE1) + self.variant(Xtmode::Value1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE2) + self.variant(Xtmode::Value2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE3) + self.variant(Xtmode::Value3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE4) + self.variant(Xtmode::Value4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XTWC_AW { +pub enum Xtwc { #[doc = "0: No write access to trigger configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XTWC_AW) -> Self { + fn from(variant: Xtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_AW>; -impl<'a, REG> XTWC_W<'a, REG> +pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; +impl<'a, REG> XtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE1) + self.variant(Xtwc::Value1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE2) + self.variant(Xtwc::Value2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GTSEL_R = crate::FieldReader; +pub type GtselR = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GTLVL_R = crate::BitReader; +pub type GtlvlR = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GTWC_AW { +pub enum Gtwc { #[doc = "0: No write access to gate configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GTWC_AW) -> Self { + fn from(variant: Gtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_AW>; -impl<'a, REG> GTWC_W<'a, REG> +pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; +impl<'a, REG> GtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE1) + self.variant(Gtwc::Value1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE2) + self.variant(Gtwc::Value2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SRCRESREG_R { - SRCRESREG_R::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SrcresregR { + SrcresregR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XTSEL_R { - XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XtselR { + XtselR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XTLVL_R { - XTLVL_R::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XtlvlR { + XtlvlR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XTMODE_R { - XTMODE_R::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XtmodeR { + XtmodeR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GTSEL_R { - GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GtselR { + GtselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GTLVL_R { - GTLVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GtlvlR { + GtlvlR::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SRCRESREG_W { - SRCRESREG_W::new(self, 0) + pub fn srcresreg(&mut self) -> SrcresregW { + SrcresregW::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XTSEL_W { - XTSEL_W::new(self, 8) + pub fn xtsel(&mut self) -> XtselW { + XtselW::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XTMODE_W { - XTMODE_W::new(self, 13) + pub fn xtmode(&mut self) -> XtmodeW { + XtmodeW::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XTWC_W { - XTWC_W::new(self, 15) + pub fn xtwc(&mut self) -> XtwcW { + XtwcW::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GTSEL_W { - GTSEL_W::new(self, 16) + pub fn gtsel(&mut self) -> GtselW { + GtselW::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GTWC_W { - GTWC_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn gtwc(&mut self) -> GtwcW { + GtwcW::new(self, 23) } } #[doc = "Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BRSCTRL_SPEC; -impl crate::RegisterSpec for BRSCTRL_SPEC { +pub struct BrsctrlSpec; +impl crate::RegisterSpec for BrsctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`brsctrl::R`](R) reader structure"] -impl crate::Readable for BRSCTRL_SPEC {} +impl crate::Readable for BrsctrlSpec {} #[doc = "`write(|w| ..)` method takes [`brsctrl::W`](W) writer structure"] -impl crate::Writable for BRSCTRL_SPEC { +impl crate::Writable for BrsctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSCTRL to value 0"] -impl crate::Resettable for BRSCTRL_SPEC { +impl crate::Resettable for BrsctrlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brsmr.rs b/src/vadc/brsmr.rs index 09eb6da5..c659b662 100644 --- a/src/vadc/brsmr.rs +++ b/src/vadc/brsmr.rs @@ -1,67 +1,67 @@ #[doc = "Register `BRSMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSMR` writer"] -pub type W = crate::W; -#[doc = "Field `ENGT` reader - Enable Gate"] -pub type ENGT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENGT_A { +pub enum Engt { #[doc = "0: No conversion requests are issued"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Conversion requests are issued if at least one pending bit is set"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENGT_A) -> Self { + fn from(variant: Engt) -> Self { variant as _ } } -impl crate::FieldSpec for ENGT_A { +impl crate::FieldSpec for Engt { type Ux = u8; } -impl ENGT_R { +#[doc = "Field `ENGT` reader - Enable Gate"] +pub type EngtR = crate::FieldReader; +impl EngtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENGT_A { + pub const fn variant(&self) -> Engt { match self.bits { - 0 => ENGT_A::VALUE1, - 1 => ENGT_A::VALUE2, - 2 => ENGT_A::VALUE3, - 3 => ENGT_A::VALUE4, + 0 => Engt::Value1, + 1 => Engt::Value2, + 2 => Engt::Value3, + 3 => Engt::Value4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENGT_A::VALUE1 + *self == Engt::Value1 } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENGT_A::VALUE2 + *self == Engt::Value2 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENGT_A::VALUE3 + *self == Engt::Value3 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENGT_A::VALUE4 + *self == Engt::Value4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type ENGT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ENGT_A>; -impl<'a, REG> ENGT_W<'a, REG> +pub type EngtW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Engt>; +impl<'a, REG> EngtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,497 +69,488 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE1) + self.variant(Engt::Value1) } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE2) + self.variant(Engt::Value2) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE3) + self.variant(Engt::Value3) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE4) + self.variant(Engt::Value4) } } -#[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type ENTR_R = crate::BitReader; #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENTR_A { +pub enum Entr { #[doc = "0: External trigger disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the load event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENTR_A) -> Self { + fn from(variant: Entr) -> Self { variant as u8 != 0 } } -impl ENTR_R { +#[doc = "Field `ENTR` reader - Enable External Trigger"] +pub type EntrR = crate::BitReader; +impl EntrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENTR_A { + pub const fn variant(&self) -> Entr { match self.bits { - false => ENTR_A::VALUE1, - true => ENTR_A::VALUE2, + false => Entr::Value1, + true => Entr::Value2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENTR_A::VALUE1 + *self == Entr::Value1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENTR_A::VALUE2 + *self == Entr::Value2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; -impl<'a, REG> ENTR_W<'a, REG> +pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; +impl<'a, REG> EntrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE1) + self.variant(Entr::Value1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE2) + self.variant(Entr::Value2) } } -#[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type ENSI_R = crate::BitReader; #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENSI_A { +pub enum Ensi { #[doc = "0: No request source interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A request source interrupt is generated upon a request source event (last pending conversion is finished)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENSI_A) -> Self { + fn from(variant: Ensi) -> Self { variant as u8 != 0 } } -impl ENSI_R { +#[doc = "Field `ENSI` reader - Enable Source Interrupt"] +pub type EnsiR = crate::BitReader; +impl EnsiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENSI_A { + pub const fn variant(&self) -> Ensi { match self.bits { - false => ENSI_A::VALUE1, - true => ENSI_A::VALUE2, + false => Ensi::Value1, + true => Ensi::Value2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENSI_A::VALUE1 + *self == Ensi::Value1 } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENSI_A::VALUE2 + *self == Ensi::Value2 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_A>; -impl<'a, REG> ENSI_W<'a, REG> +pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; +impl<'a, REG> EnsiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENSI_A::VALUE1) + self.variant(Ensi::Value1) } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENSI_A::VALUE2) + self.variant(Ensi::Value2) } } -#[doc = "Field `SCAN` reader - Autoscan Enable"] -pub type SCAN_R = crate::BitReader; #[doc = "Autoscan Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCAN_A { +pub enum Scan { #[doc = "0: No autoscan"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Autoscan functionality enabled: a request source event automatically generates a load event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCAN_A) -> Self { + fn from(variant: Scan) -> Self { variant as u8 != 0 } } -impl SCAN_R { +#[doc = "Field `SCAN` reader - Autoscan Enable"] +pub type ScanR = crate::BitReader; +impl ScanR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCAN_A { + pub const fn variant(&self) -> Scan { match self.bits { - false => SCAN_A::VALUE1, - true => SCAN_A::VALUE2, + false => Scan::Value1, + true => Scan::Value2, } } #[doc = "No autoscan"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCAN_A::VALUE1 + *self == Scan::Value1 } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCAN_A::VALUE2 + *self == Scan::Value2 } } #[doc = "Field `SCAN` writer - Autoscan Enable"] -pub type SCAN_W<'a, REG> = crate::BitWriter<'a, REG, SCAN_A>; -impl<'a, REG> SCAN_W<'a, REG> +pub type ScanW<'a, REG> = crate::BitWriter<'a, REG, Scan>; +impl<'a, REG> ScanW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No autoscan"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCAN_A::VALUE1) + self.variant(Scan::Value1) } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCAN_A::VALUE2) + self.variant(Scan::Value2) } } -#[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] -pub type LDM_R = crate::BitReader; #[doc = "Autoscan Source Load Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LDM_A { +pub enum Ldm { #[doc = "0: Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LDM_A) -> Self { + fn from(variant: Ldm) -> Self { variant as u8 != 0 } } -impl LDM_R { +#[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] +pub type LdmR = crate::BitReader; +impl LdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LDM_A { + pub const fn variant(&self) -> Ldm { match self.bits { - false => LDM_A::VALUE1, - true => LDM_A::VALUE2, + false => Ldm::Value1, + true => Ldm::Value2, } } #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LDM_A::VALUE1 + *self == Ldm::Value1 } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LDM_A::VALUE2 + *self == Ldm::Value2 } } #[doc = "Field `LDM` writer - Autoscan Source Load Event Mode"] -pub type LDM_W<'a, REG> = crate::BitWriter<'a, REG, LDM_A>; -impl<'a, REG> LDM_W<'a, REG> +pub type LdmW<'a, REG> = crate::BitWriter<'a, REG, Ldm>; +impl<'a, REG> LdmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LDM_A::VALUE1) + self.variant(Ldm::Value1) } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LDM_A::VALUE2) + self.variant(Ldm::Value2) } } -#[doc = "Field `REQGT` reader - Request Gate Level"] -pub type REQGT_R = crate::BitReader; #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQGT_A { +pub enum Reqgt { #[doc = "0: The gate input is low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The gate input is high"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQGT_A) -> Self { + fn from(variant: Reqgt) -> Self { variant as u8 != 0 } } -impl REQGT_R { +#[doc = "Field `REQGT` reader - Request Gate Level"] +pub type ReqgtR = crate::BitReader; +impl ReqgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REQGT_A { + pub const fn variant(&self) -> Reqgt { match self.bits { - false => REQGT_A::VALUE1, - true => REQGT_A::VALUE2, + false => Reqgt::Value1, + true => Reqgt::Value2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REQGT_A::VALUE1 + *self == Reqgt::Value1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REQGT_A::VALUE2 + *self == Reqgt::Value2 } } #[doc = "Clear Pending Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRPND_AW { +pub enum Clrpnd { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bits in registers BRSPNDx are cleared"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRPND_AW) -> Self { + fn from(variant: Clrpnd) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRPND` writer - Clear Pending Bits"] -pub type CLRPND_W<'a, REG> = crate::BitWriter<'a, REG, CLRPND_AW>; -impl<'a, REG> CLRPND_W<'a, REG> +pub type ClrpndW<'a, REG> = crate::BitWriter<'a, REG, Clrpnd>; +impl<'a, REG> ClrpndW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLRPND_AW::VALUE1) + self.variant(Clrpnd::Value1) } #[doc = "The bits in registers BRSPNDx are cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLRPND_AW::VALUE2) + self.variant(Clrpnd::Value2) } } #[doc = "Generate Load Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LDEV_AW { +pub enum Ldev { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A load event is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LDEV_AW) -> Self { + fn from(variant: Ldev) -> Self { variant as u8 != 0 } } #[doc = "Field `LDEV` writer - Generate Load Event"] -pub type LDEV_W<'a, REG> = crate::BitWriter<'a, REG, LDEV_AW>; -impl<'a, REG> LDEV_W<'a, REG> +pub type LdevW<'a, REG> = crate::BitWriter<'a, REG, Ldev>; +impl<'a, REG> LdevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LDEV_AW::VALUE1) + self.variant(Ldev::Value1) } #[doc = "A load event is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LDEV_AW::VALUE2) + self.variant(Ldev::Value2) } } -#[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RPTDIS_R = crate::BitReader; #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPTDIS_A { +pub enum Rptdis { #[doc = "0: A cancelled conversion is repeated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A cancelled conversion is discarded"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPTDIS_A) -> Self { + fn from(variant: Rptdis) -> Self { variant as u8 != 0 } } -impl RPTDIS_R { +#[doc = "Field `RPTDIS` reader - Repeat Disable"] +pub type RptdisR = crate::BitReader; +impl RptdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPTDIS_A { + pub const fn variant(&self) -> Rptdis { match self.bits { - false => RPTDIS_A::VALUE1, - true => RPTDIS_A::VALUE2, + false => Rptdis::Value1, + true => Rptdis::Value2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPTDIS_A::VALUE1 + *self == Rptdis::Value1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPTDIS_A::VALUE2 + *self == Rptdis::Value2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; -impl<'a, REG> RPTDIS_W<'a, REG> +pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; +impl<'a, REG> RptdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE1) + self.variant(Rptdis::Value1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE2) + self.variant(Rptdis::Value2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> ENGT_R { - ENGT_R::new((self.bits & 3) as u8) + pub fn engt(&self) -> EngtR { + EngtR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> ENTR_R { - ENTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> EntrR { + EntrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> ENSI_R { - ENSI_R::new(((self.bits >> 3) & 1) != 0) + pub fn ensi(&self) -> EnsiR { + EnsiR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - pub fn scan(&self) -> SCAN_R { - SCAN_R::new(((self.bits >> 4) & 1) != 0) + pub fn scan(&self) -> ScanR { + ScanR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - pub fn ldm(&self) -> LDM_R { - LDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn ldm(&self) -> LdmR { + LdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> REQGT_R { - REQGT_R::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> ReqgtR { + ReqgtR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RPTDIS_R { - RPTDIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RptdisR { + RptdisR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> ENGT_W { - ENGT_W::new(self, 0) + pub fn engt(&mut self) -> EngtW { + EngtW::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> ENTR_W { - ENTR_W::new(self, 2) + pub fn entr(&mut self) -> EntrW { + EntrW::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> ENSI_W { - ENSI_W::new(self, 3) + pub fn ensi(&mut self) -> EnsiW { + EnsiW::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] #[must_use] - pub fn scan(&mut self) -> SCAN_W { - SCAN_W::new(self, 4) + pub fn scan(&mut self) -> ScanW { + ScanW::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] #[must_use] - pub fn ldm(&mut self) -> LDM_W { - LDM_W::new(self, 5) + pub fn ldm(&mut self) -> LdmW { + LdmW::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] #[must_use] - pub fn clrpnd(&mut self) -> CLRPND_W { - CLRPND_W::new(self, 8) + pub fn clrpnd(&mut self) -> ClrpndW { + ClrpndW::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] #[must_use] - pub fn ldev(&mut self) -> LDEV_W { - LDEV_W::new(self, 9) + pub fn ldev(&mut self) -> LdevW { + LdevW::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RPTDIS_W { - RPTDIS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rptdis(&mut self) -> RptdisW { + RptdisW::new(self, 16) } } #[doc = "Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BRSMR_SPEC; -impl crate::RegisterSpec for BRSMR_SPEC { +pub struct BrsmrSpec; +impl crate::RegisterSpec for BrsmrSpec { type Ux = u32; } #[doc = "`read()` method returns [`brsmr::R`](R) reader structure"] -impl crate::Readable for BRSMR_SPEC {} +impl crate::Readable for BrsmrSpec {} #[doc = "`write(|w| ..)` method takes [`brsmr::W`](W) writer structure"] -impl crate::Writable for BRSMR_SPEC { +impl crate::Writable for BrsmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSMR to value 0"] -impl crate::Resettable for BRSMR_SPEC { +impl crate::Resettable for BrsmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brspnd.rs b/src/vadc/brspnd.rs index c48aad90..ee222e4f 100644 --- a/src/vadc/brspnd.rs +++ b/src/vadc/brspnd.rs @@ -1,547 +1,538 @@ #[doc = "Register `BRSPND[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSPND[%s]` writer"] -pub type W = crate::W; -#[doc = "Field `CHPNDG0` reader - Channels Pending Group x"] -pub type CHPNDG0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG0_A { +pub enum Chpndg0 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG0_A) -> Self { + fn from(variant: Chpndg0) -> Self { variant as u8 != 0 } } -impl CHPNDG0_R { +#[doc = "Field `CHPNDG0` reader - Channels Pending Group x"] +pub type Chpndg0R = crate::BitReader; +impl Chpndg0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG0_A { + pub const fn variant(&self) -> Chpndg0 { match self.bits { - false => CHPNDG0_A::VALUE1, - true => CHPNDG0_A::VALUE2, + false => Chpndg0::Value1, + true => Chpndg0::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG0_A::VALUE1 + *self == Chpndg0::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG0_A::VALUE2 + *self == Chpndg0::Value2 } } #[doc = "Field `CHPNDG0` writer - Channels Pending Group x"] -pub type CHPNDG0_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG0_A>; -impl<'a, REG> CHPNDG0_W<'a, REG> +pub type Chpndg0W<'a, REG> = crate::BitWriter<'a, REG, Chpndg0>; +impl<'a, REG> Chpndg0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG0_A::VALUE1) + self.variant(Chpndg0::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG0_A::VALUE2) + self.variant(Chpndg0::Value2) } } -#[doc = "Field `CHPNDG1` reader - Channels Pending Group x"] -pub type CHPNDG1_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG1_A { +pub enum Chpndg1 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG1_A) -> Self { + fn from(variant: Chpndg1) -> Self { variant as u8 != 0 } } -impl CHPNDG1_R { +#[doc = "Field `CHPNDG1` reader - Channels Pending Group x"] +pub type Chpndg1R = crate::BitReader; +impl Chpndg1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG1_A { + pub const fn variant(&self) -> Chpndg1 { match self.bits { - false => CHPNDG1_A::VALUE1, - true => CHPNDG1_A::VALUE2, + false => Chpndg1::Value1, + true => Chpndg1::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG1_A::VALUE1 + *self == Chpndg1::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG1_A::VALUE2 + *self == Chpndg1::Value2 } } #[doc = "Field `CHPNDG1` writer - Channels Pending Group x"] -pub type CHPNDG1_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG1_A>; -impl<'a, REG> CHPNDG1_W<'a, REG> +pub type Chpndg1W<'a, REG> = crate::BitWriter<'a, REG, Chpndg1>; +impl<'a, REG> Chpndg1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG1_A::VALUE1) + self.variant(Chpndg1::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG1_A::VALUE2) + self.variant(Chpndg1::Value2) } } -#[doc = "Field `CHPNDG2` reader - Channels Pending Group x"] -pub type CHPNDG2_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG2_A { +pub enum Chpndg2 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG2_A) -> Self { + fn from(variant: Chpndg2) -> Self { variant as u8 != 0 } } -impl CHPNDG2_R { +#[doc = "Field `CHPNDG2` reader - Channels Pending Group x"] +pub type Chpndg2R = crate::BitReader; +impl Chpndg2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG2_A { + pub const fn variant(&self) -> Chpndg2 { match self.bits { - false => CHPNDG2_A::VALUE1, - true => CHPNDG2_A::VALUE2, + false => Chpndg2::Value1, + true => Chpndg2::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG2_A::VALUE1 + *self == Chpndg2::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG2_A::VALUE2 + *self == Chpndg2::Value2 } } #[doc = "Field `CHPNDG2` writer - Channels Pending Group x"] -pub type CHPNDG2_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG2_A>; -impl<'a, REG> CHPNDG2_W<'a, REG> +pub type Chpndg2W<'a, REG> = crate::BitWriter<'a, REG, Chpndg2>; +impl<'a, REG> Chpndg2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG2_A::VALUE1) + self.variant(Chpndg2::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG2_A::VALUE2) + self.variant(Chpndg2::Value2) } } -#[doc = "Field `CHPNDG3` reader - Channels Pending Group x"] -pub type CHPNDG3_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG3_A { +pub enum Chpndg3 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG3_A) -> Self { + fn from(variant: Chpndg3) -> Self { variant as u8 != 0 } } -impl CHPNDG3_R { +#[doc = "Field `CHPNDG3` reader - Channels Pending Group x"] +pub type Chpndg3R = crate::BitReader; +impl Chpndg3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG3_A { + pub const fn variant(&self) -> Chpndg3 { match self.bits { - false => CHPNDG3_A::VALUE1, - true => CHPNDG3_A::VALUE2, + false => Chpndg3::Value1, + true => Chpndg3::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG3_A::VALUE1 + *self == Chpndg3::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG3_A::VALUE2 + *self == Chpndg3::Value2 } } #[doc = "Field `CHPNDG3` writer - Channels Pending Group x"] -pub type CHPNDG3_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG3_A>; -impl<'a, REG> CHPNDG3_W<'a, REG> +pub type Chpndg3W<'a, REG> = crate::BitWriter<'a, REG, Chpndg3>; +impl<'a, REG> Chpndg3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG3_A::VALUE1) + self.variant(Chpndg3::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG3_A::VALUE2) + self.variant(Chpndg3::Value2) } } -#[doc = "Field `CHPNDG4` reader - Channels Pending Group x"] -pub type CHPNDG4_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG4_A { +pub enum Chpndg4 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG4_A) -> Self { + fn from(variant: Chpndg4) -> Self { variant as u8 != 0 } } -impl CHPNDG4_R { +#[doc = "Field `CHPNDG4` reader - Channels Pending Group x"] +pub type Chpndg4R = crate::BitReader; +impl Chpndg4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG4_A { + pub const fn variant(&self) -> Chpndg4 { match self.bits { - false => CHPNDG4_A::VALUE1, - true => CHPNDG4_A::VALUE2, + false => Chpndg4::Value1, + true => Chpndg4::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG4_A::VALUE1 + *self == Chpndg4::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG4_A::VALUE2 + *self == Chpndg4::Value2 } } #[doc = "Field `CHPNDG4` writer - Channels Pending Group x"] -pub type CHPNDG4_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG4_A>; -impl<'a, REG> CHPNDG4_W<'a, REG> +pub type Chpndg4W<'a, REG> = crate::BitWriter<'a, REG, Chpndg4>; +impl<'a, REG> Chpndg4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG4_A::VALUE1) + self.variant(Chpndg4::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG4_A::VALUE2) + self.variant(Chpndg4::Value2) } } -#[doc = "Field `CHPNDG5` reader - Channels Pending Group x"] -pub type CHPNDG5_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG5_A { +pub enum Chpndg5 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG5_A) -> Self { + fn from(variant: Chpndg5) -> Self { variant as u8 != 0 } } -impl CHPNDG5_R { +#[doc = "Field `CHPNDG5` reader - Channels Pending Group x"] +pub type Chpndg5R = crate::BitReader; +impl Chpndg5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG5_A { + pub const fn variant(&self) -> Chpndg5 { match self.bits { - false => CHPNDG5_A::VALUE1, - true => CHPNDG5_A::VALUE2, + false => Chpndg5::Value1, + true => Chpndg5::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG5_A::VALUE1 + *self == Chpndg5::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG5_A::VALUE2 + *self == Chpndg5::Value2 } } #[doc = "Field `CHPNDG5` writer - Channels Pending Group x"] -pub type CHPNDG5_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG5_A>; -impl<'a, REG> CHPNDG5_W<'a, REG> +pub type Chpndg5W<'a, REG> = crate::BitWriter<'a, REG, Chpndg5>; +impl<'a, REG> Chpndg5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG5_A::VALUE1) + self.variant(Chpndg5::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG5_A::VALUE2) + self.variant(Chpndg5::Value2) } } -#[doc = "Field `CHPNDG6` reader - Channels Pending Group x"] -pub type CHPNDG6_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG6_A { +pub enum Chpndg6 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG6_A) -> Self { + fn from(variant: Chpndg6) -> Self { variant as u8 != 0 } } -impl CHPNDG6_R { +#[doc = "Field `CHPNDG6` reader - Channels Pending Group x"] +pub type Chpndg6R = crate::BitReader; +impl Chpndg6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG6_A { + pub const fn variant(&self) -> Chpndg6 { match self.bits { - false => CHPNDG6_A::VALUE1, - true => CHPNDG6_A::VALUE2, + false => Chpndg6::Value1, + true => Chpndg6::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG6_A::VALUE1 + *self == Chpndg6::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG6_A::VALUE2 + *self == Chpndg6::Value2 } } #[doc = "Field `CHPNDG6` writer - Channels Pending Group x"] -pub type CHPNDG6_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG6_A>; -impl<'a, REG> CHPNDG6_W<'a, REG> +pub type Chpndg6W<'a, REG> = crate::BitWriter<'a, REG, Chpndg6>; +impl<'a, REG> Chpndg6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG6_A::VALUE1) + self.variant(Chpndg6::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG6_A::VALUE2) + self.variant(Chpndg6::Value2) } } -#[doc = "Field `CHPNDG7` reader - Channels Pending Group x"] -pub type CHPNDG7_R = crate::BitReader; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPNDG7_A { +pub enum Chpndg7 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPNDG7_A) -> Self { + fn from(variant: Chpndg7) -> Self { variant as u8 != 0 } } -impl CHPNDG7_R { +#[doc = "Field `CHPNDG7` reader - Channels Pending Group x"] +pub type Chpndg7R = crate::BitReader; +impl Chpndg7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPNDG7_A { + pub const fn variant(&self) -> Chpndg7 { match self.bits { - false => CHPNDG7_A::VALUE1, - true => CHPNDG7_A::VALUE2, + false => Chpndg7::Value1, + true => Chpndg7::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPNDG7_A::VALUE1 + *self == Chpndg7::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPNDG7_A::VALUE2 + *self == Chpndg7::Value2 } } #[doc = "Field `CHPNDG7` writer - Channels Pending Group x"] -pub type CHPNDG7_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG7_A>; -impl<'a, REG> CHPNDG7_W<'a, REG> +pub type Chpndg7W<'a, REG> = crate::BitWriter<'a, REG, Chpndg7>; +impl<'a, REG> Chpndg7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPNDG7_A::VALUE1) + self.variant(Chpndg7::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPNDG7_A::VALUE2) + self.variant(Chpndg7::Value2) } } impl R { #[doc = "Bit 0 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg0(&self) -> CHPNDG0_R { - CHPNDG0_R::new((self.bits & 1) != 0) + pub fn chpndg0(&self) -> Chpndg0R { + Chpndg0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg1(&self) -> CHPNDG1_R { - CHPNDG1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chpndg1(&self) -> Chpndg1R { + Chpndg1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg2(&self) -> CHPNDG2_R { - CHPNDG2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chpndg2(&self) -> Chpndg2R { + Chpndg2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg3(&self) -> CHPNDG3_R { - CHPNDG3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chpndg3(&self) -> Chpndg3R { + Chpndg3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg4(&self) -> CHPNDG4_R { - CHPNDG4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chpndg4(&self) -> Chpndg4R { + Chpndg4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg5(&self) -> CHPNDG5_R { - CHPNDG5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chpndg5(&self) -> Chpndg5R { + Chpndg5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg6(&self) -> CHPNDG6_R { - CHPNDG6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chpndg6(&self) -> Chpndg6R { + Chpndg6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg7(&self) -> CHPNDG7_R { - CHPNDG7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chpndg7(&self) -> Chpndg7R { + Chpndg7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg0(&mut self) -> CHPNDG0_W { - CHPNDG0_W::new(self, 0) + pub fn chpndg0(&mut self) -> Chpndg0W { + Chpndg0W::new(self, 0) } #[doc = "Bit 1 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg1(&mut self) -> CHPNDG1_W { - CHPNDG1_W::new(self, 1) + pub fn chpndg1(&mut self) -> Chpndg1W { + Chpndg1W::new(self, 1) } #[doc = "Bit 2 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg2(&mut self) -> CHPNDG2_W { - CHPNDG2_W::new(self, 2) + pub fn chpndg2(&mut self) -> Chpndg2W { + Chpndg2W::new(self, 2) } #[doc = "Bit 3 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg3(&mut self) -> CHPNDG3_W { - CHPNDG3_W::new(self, 3) + pub fn chpndg3(&mut self) -> Chpndg3W { + Chpndg3W::new(self, 3) } #[doc = "Bit 4 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg4(&mut self) -> CHPNDG4_W { - CHPNDG4_W::new(self, 4) + pub fn chpndg4(&mut self) -> Chpndg4W { + Chpndg4W::new(self, 4) } #[doc = "Bit 5 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg5(&mut self) -> CHPNDG5_W { - CHPNDG5_W::new(self, 5) + pub fn chpndg5(&mut self) -> Chpndg5W { + Chpndg5W::new(self, 5) } #[doc = "Bit 6 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg6(&mut self) -> CHPNDG6_W { - CHPNDG6_W::new(self, 6) + pub fn chpndg6(&mut self) -> Chpndg6W { + Chpndg6W::new(self, 6) } #[doc = "Bit 7 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg7(&mut self) -> CHPNDG7_W { - CHPNDG7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn chpndg7(&mut self) -> Chpndg7W { + Chpndg7W::new(self, 7) } } #[doc = "Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BRSPND_SPEC; -impl crate::RegisterSpec for BRSPND_SPEC { +pub struct BrspndSpec; +impl crate::RegisterSpec for BrspndSpec { type Ux = u32; } #[doc = "`read()` method returns [`brspnd::R`](R) reader structure"] -impl crate::Readable for BRSPND_SPEC {} +impl crate::Readable for BrspndSpec {} #[doc = "`write(|w| ..)` method takes [`brspnd::W`](W) writer structure"] -impl crate::Writable for BRSPND_SPEC { +impl crate::Writable for BrspndSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSPND[%s] to value 0"] -impl crate::Resettable for BRSPND_SPEC { +impl crate::Resettable for BrspndSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brssel.rs b/src/vadc/brssel.rs index 89e86b86..90a52ad9 100644 --- a/src/vadc/brssel.rs +++ b/src/vadc/brssel.rs @@ -1,547 +1,538 @@ #[doc = "Register `BRSSEL[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSSEL[%s]` writer"] -pub type W = crate::W; -#[doc = "Field `CHSELG0` reader - Channel Selection Group x"] -pub type CHSELG0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG0_A { +pub enum Chselg0 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG0_A) -> Self { + fn from(variant: Chselg0) -> Self { variant as u8 != 0 } } -impl CHSELG0_R { +#[doc = "Field `CHSELG0` reader - Channel Selection Group x"] +pub type Chselg0R = crate::BitReader; +impl Chselg0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG0_A { + pub const fn variant(&self) -> Chselg0 { match self.bits { - false => CHSELG0_A::VALUE1, - true => CHSELG0_A::VALUE2, + false => Chselg0::Value1, + true => Chselg0::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG0_A::VALUE1 + *self == Chselg0::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG0_A::VALUE2 + *self == Chselg0::Value2 } } #[doc = "Field `CHSELG0` writer - Channel Selection Group x"] -pub type CHSELG0_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG0_A>; -impl<'a, REG> CHSELG0_W<'a, REG> +pub type Chselg0W<'a, REG> = crate::BitWriter<'a, REG, Chselg0>; +impl<'a, REG> Chselg0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG0_A::VALUE1) + self.variant(Chselg0::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG0_A::VALUE2) + self.variant(Chselg0::Value2) } } -#[doc = "Field `CHSELG1` reader - Channel Selection Group x"] -pub type CHSELG1_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG1_A { +pub enum Chselg1 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG1_A) -> Self { + fn from(variant: Chselg1) -> Self { variant as u8 != 0 } } -impl CHSELG1_R { +#[doc = "Field `CHSELG1` reader - Channel Selection Group x"] +pub type Chselg1R = crate::BitReader; +impl Chselg1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG1_A { + pub const fn variant(&self) -> Chselg1 { match self.bits { - false => CHSELG1_A::VALUE1, - true => CHSELG1_A::VALUE2, + false => Chselg1::Value1, + true => Chselg1::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG1_A::VALUE1 + *self == Chselg1::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG1_A::VALUE2 + *self == Chselg1::Value2 } } #[doc = "Field `CHSELG1` writer - Channel Selection Group x"] -pub type CHSELG1_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG1_A>; -impl<'a, REG> CHSELG1_W<'a, REG> +pub type Chselg1W<'a, REG> = crate::BitWriter<'a, REG, Chselg1>; +impl<'a, REG> Chselg1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG1_A::VALUE1) + self.variant(Chselg1::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG1_A::VALUE2) + self.variant(Chselg1::Value2) } } -#[doc = "Field `CHSELG2` reader - Channel Selection Group x"] -pub type CHSELG2_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG2_A { +pub enum Chselg2 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG2_A) -> Self { + fn from(variant: Chselg2) -> Self { variant as u8 != 0 } } -impl CHSELG2_R { +#[doc = "Field `CHSELG2` reader - Channel Selection Group x"] +pub type Chselg2R = crate::BitReader; +impl Chselg2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG2_A { + pub const fn variant(&self) -> Chselg2 { match self.bits { - false => CHSELG2_A::VALUE1, - true => CHSELG2_A::VALUE2, + false => Chselg2::Value1, + true => Chselg2::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG2_A::VALUE1 + *self == Chselg2::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG2_A::VALUE2 + *self == Chselg2::Value2 } } #[doc = "Field `CHSELG2` writer - Channel Selection Group x"] -pub type CHSELG2_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG2_A>; -impl<'a, REG> CHSELG2_W<'a, REG> +pub type Chselg2W<'a, REG> = crate::BitWriter<'a, REG, Chselg2>; +impl<'a, REG> Chselg2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG2_A::VALUE1) + self.variant(Chselg2::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG2_A::VALUE2) + self.variant(Chselg2::Value2) } } -#[doc = "Field `CHSELG3` reader - Channel Selection Group x"] -pub type CHSELG3_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG3_A { +pub enum Chselg3 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG3_A) -> Self { + fn from(variant: Chselg3) -> Self { variant as u8 != 0 } } -impl CHSELG3_R { +#[doc = "Field `CHSELG3` reader - Channel Selection Group x"] +pub type Chselg3R = crate::BitReader; +impl Chselg3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG3_A { + pub const fn variant(&self) -> Chselg3 { match self.bits { - false => CHSELG3_A::VALUE1, - true => CHSELG3_A::VALUE2, + false => Chselg3::Value1, + true => Chselg3::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG3_A::VALUE1 + *self == Chselg3::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG3_A::VALUE2 + *self == Chselg3::Value2 } } #[doc = "Field `CHSELG3` writer - Channel Selection Group x"] -pub type CHSELG3_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG3_A>; -impl<'a, REG> CHSELG3_W<'a, REG> +pub type Chselg3W<'a, REG> = crate::BitWriter<'a, REG, Chselg3>; +impl<'a, REG> Chselg3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG3_A::VALUE1) + self.variant(Chselg3::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG3_A::VALUE2) + self.variant(Chselg3::Value2) } } -#[doc = "Field `CHSELG4` reader - Channel Selection Group x"] -pub type CHSELG4_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG4_A { +pub enum Chselg4 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG4_A) -> Self { + fn from(variant: Chselg4) -> Self { variant as u8 != 0 } } -impl CHSELG4_R { +#[doc = "Field `CHSELG4` reader - Channel Selection Group x"] +pub type Chselg4R = crate::BitReader; +impl Chselg4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG4_A { + pub const fn variant(&self) -> Chselg4 { match self.bits { - false => CHSELG4_A::VALUE1, - true => CHSELG4_A::VALUE2, + false => Chselg4::Value1, + true => Chselg4::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG4_A::VALUE1 + *self == Chselg4::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG4_A::VALUE2 + *self == Chselg4::Value2 } } #[doc = "Field `CHSELG4` writer - Channel Selection Group x"] -pub type CHSELG4_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG4_A>; -impl<'a, REG> CHSELG4_W<'a, REG> +pub type Chselg4W<'a, REG> = crate::BitWriter<'a, REG, Chselg4>; +impl<'a, REG> Chselg4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG4_A::VALUE1) + self.variant(Chselg4::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG4_A::VALUE2) + self.variant(Chselg4::Value2) } } -#[doc = "Field `CHSELG5` reader - Channel Selection Group x"] -pub type CHSELG5_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG5_A { +pub enum Chselg5 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG5_A) -> Self { + fn from(variant: Chselg5) -> Self { variant as u8 != 0 } } -impl CHSELG5_R { +#[doc = "Field `CHSELG5` reader - Channel Selection Group x"] +pub type Chselg5R = crate::BitReader; +impl Chselg5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG5_A { + pub const fn variant(&self) -> Chselg5 { match self.bits { - false => CHSELG5_A::VALUE1, - true => CHSELG5_A::VALUE2, + false => Chselg5::Value1, + true => Chselg5::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG5_A::VALUE1 + *self == Chselg5::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG5_A::VALUE2 + *self == Chselg5::Value2 } } #[doc = "Field `CHSELG5` writer - Channel Selection Group x"] -pub type CHSELG5_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG5_A>; -impl<'a, REG> CHSELG5_W<'a, REG> +pub type Chselg5W<'a, REG> = crate::BitWriter<'a, REG, Chselg5>; +impl<'a, REG> Chselg5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG5_A::VALUE1) + self.variant(Chselg5::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG5_A::VALUE2) + self.variant(Chselg5::Value2) } } -#[doc = "Field `CHSELG6` reader - Channel Selection Group x"] -pub type CHSELG6_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG6_A { +pub enum Chselg6 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG6_A) -> Self { + fn from(variant: Chselg6) -> Self { variant as u8 != 0 } } -impl CHSELG6_R { +#[doc = "Field `CHSELG6` reader - Channel Selection Group x"] +pub type Chselg6R = crate::BitReader; +impl Chselg6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG6_A { + pub const fn variant(&self) -> Chselg6 { match self.bits { - false => CHSELG6_A::VALUE1, - true => CHSELG6_A::VALUE2, + false => Chselg6::Value1, + true => Chselg6::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG6_A::VALUE1 + *self == Chselg6::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG6_A::VALUE2 + *self == Chselg6::Value2 } } #[doc = "Field `CHSELG6` writer - Channel Selection Group x"] -pub type CHSELG6_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG6_A>; -impl<'a, REG> CHSELG6_W<'a, REG> +pub type Chselg6W<'a, REG> = crate::BitWriter<'a, REG, Chselg6>; +impl<'a, REG> Chselg6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG6_A::VALUE1) + self.variant(Chselg6::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG6_A::VALUE2) + self.variant(Chselg6::Value2) } } -#[doc = "Field `CHSELG7` reader - Channel Selection Group x"] -pub type CHSELG7_R = crate::BitReader; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSELG7_A { +pub enum Chselg7 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSELG7_A) -> Self { + fn from(variant: Chselg7) -> Self { variant as u8 != 0 } } -impl CHSELG7_R { +#[doc = "Field `CHSELG7` reader - Channel Selection Group x"] +pub type Chselg7R = crate::BitReader; +impl Chselg7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSELG7_A { + pub const fn variant(&self) -> Chselg7 { match self.bits { - false => CHSELG7_A::VALUE1, - true => CHSELG7_A::VALUE2, + false => Chselg7::Value1, + true => Chselg7::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSELG7_A::VALUE1 + *self == Chselg7::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSELG7_A::VALUE2 + *self == Chselg7::Value2 } } #[doc = "Field `CHSELG7` writer - Channel Selection Group x"] -pub type CHSELG7_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG7_A>; -impl<'a, REG> CHSELG7_W<'a, REG> +pub type Chselg7W<'a, REG> = crate::BitWriter<'a, REG, Chselg7>; +impl<'a, REG> Chselg7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSELG7_A::VALUE1) + self.variant(Chselg7::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSELG7_A::VALUE2) + self.variant(Chselg7::Value2) } } impl R { #[doc = "Bit 0 - Channel Selection Group x"] #[inline(always)] - pub fn chselg0(&self) -> CHSELG0_R { - CHSELG0_R::new((self.bits & 1) != 0) + pub fn chselg0(&self) -> Chselg0R { + Chselg0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Selection Group x"] #[inline(always)] - pub fn chselg1(&self) -> CHSELG1_R { - CHSELG1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chselg1(&self) -> Chselg1R { + Chselg1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Selection Group x"] #[inline(always)] - pub fn chselg2(&self) -> CHSELG2_R { - CHSELG2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chselg2(&self) -> Chselg2R { + Chselg2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Selection Group x"] #[inline(always)] - pub fn chselg3(&self) -> CHSELG3_R { - CHSELG3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chselg3(&self) -> Chselg3R { + Chselg3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Selection Group x"] #[inline(always)] - pub fn chselg4(&self) -> CHSELG4_R { - CHSELG4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chselg4(&self) -> Chselg4R { + Chselg4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Selection Group x"] #[inline(always)] - pub fn chselg5(&self) -> CHSELG5_R { - CHSELG5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chselg5(&self) -> Chselg5R { + Chselg5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Selection Group x"] #[inline(always)] - pub fn chselg6(&self) -> CHSELG6_R { - CHSELG6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chselg6(&self) -> Chselg6R { + Chselg6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Selection Group x"] #[inline(always)] - pub fn chselg7(&self) -> CHSELG7_R { - CHSELG7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chselg7(&self) -> Chselg7R { + Chselg7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg0(&mut self) -> CHSELG0_W { - CHSELG0_W::new(self, 0) + pub fn chselg0(&mut self) -> Chselg0W { + Chselg0W::new(self, 0) } #[doc = "Bit 1 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg1(&mut self) -> CHSELG1_W { - CHSELG1_W::new(self, 1) + pub fn chselg1(&mut self) -> Chselg1W { + Chselg1W::new(self, 1) } #[doc = "Bit 2 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg2(&mut self) -> CHSELG2_W { - CHSELG2_W::new(self, 2) + pub fn chselg2(&mut self) -> Chselg2W { + Chselg2W::new(self, 2) } #[doc = "Bit 3 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg3(&mut self) -> CHSELG3_W { - CHSELG3_W::new(self, 3) + pub fn chselg3(&mut self) -> Chselg3W { + Chselg3W::new(self, 3) } #[doc = "Bit 4 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg4(&mut self) -> CHSELG4_W { - CHSELG4_W::new(self, 4) + pub fn chselg4(&mut self) -> Chselg4W { + Chselg4W::new(self, 4) } #[doc = "Bit 5 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg5(&mut self) -> CHSELG5_W { - CHSELG5_W::new(self, 5) + pub fn chselg5(&mut self) -> Chselg5W { + Chselg5W::new(self, 5) } #[doc = "Bit 6 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg6(&mut self) -> CHSELG6_W { - CHSELG6_W::new(self, 6) + pub fn chselg6(&mut self) -> Chselg6W { + Chselg6W::new(self, 6) } #[doc = "Bit 7 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg7(&mut self) -> CHSELG7_W { - CHSELG7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn chselg7(&mut self) -> Chselg7W { + Chselg7W::new(self, 7) } } #[doc = "Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BRSSEL_SPEC; -impl crate::RegisterSpec for BRSSEL_SPEC { +pub struct BrsselSpec; +impl crate::RegisterSpec for BrsselSpec { type Ux = u32; } #[doc = "`read()` method returns [`brssel::R`](R) reader structure"] -impl crate::Readable for BRSSEL_SPEC {} +impl crate::Readable for BrsselSpec {} #[doc = "`write(|w| ..)` method takes [`brssel::W`](W) writer structure"] -impl crate::Writable for BRSSEL_SPEC { +impl crate::Writable for BrsselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSSEL[%s] to value 0"] -impl crate::Resettable for BRSSEL_SPEC { +impl crate::Resettable for BrsselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/clc.rs b/src/vadc/clc.rs index 3f95b451..d3285b7a 100644 --- a/src/vadc/clc.rs +++ b/src/vadc/clc.rs @@ -1,203 +1,194 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; -#[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DISR_R = crate::BitReader; +pub type W = crate::W; #[doc = "Module Disable Request Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISR_A { +pub enum Disr { #[doc = "0: On request: enable the module clock"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Off request: stop the module clock"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISR_A) -> Self { + fn from(variant: Disr) -> Self { variant as u8 != 0 } } -impl DISR_R { +#[doc = "Field `DISR` reader - Module Disable Request Bit"] +pub type DisrR = crate::BitReader; +impl DisrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISR_A { + pub const fn variant(&self) -> Disr { match self.bits { - false => DISR_A::VALUE1, - true => DISR_A::VALUE2, + false => Disr::Value1, + true => Disr::Value2, } } #[doc = "On request: enable the module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISR_A::VALUE1 + *self == Disr::Value1 } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISR_A::VALUE2 + *self == Disr::Value2 } } #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG, DISR_A>; -impl<'a, REG> DISR_W<'a, REG> +pub type DisrW<'a, REG> = crate::BitWriter<'a, REG, Disr>; +impl<'a, REG> DisrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "On request: enable the module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE1) + self.variant(Disr::Value1) } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DISR_A::VALUE2) + self.variant(Disr::Value2) } } -#[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DISS_R = crate::BitReader; #[doc = "Module Disable Status Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DISS_A { +pub enum Diss { #[doc = "0: Module clock is enabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Off: module is not clocked"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DISS_A) -> Self { + fn from(variant: Diss) -> Self { variant as u8 != 0 } } -impl DISS_R { +#[doc = "Field `DISS` reader - Module Disable Status Bit"] +pub type DissR = crate::BitReader; +impl DissR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DISS_A { + pub const fn variant(&self) -> Diss { match self.bits { - false => DISS_A::VALUE1, - true => DISS_A::VALUE2, + false => Diss::Value1, + true => Diss::Value2, } } #[doc = "Module clock is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DISS_A::VALUE1 + *self == Diss::Value1 } #[doc = "Off: module is not clocked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DISS_A::VALUE2 + *self == Diss::Value2 } } -#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] -pub type EDIS_R = crate::BitReader; #[doc = "Sleep Mode Enable Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EDIS_A { +pub enum Edis { #[doc = "0: Sleep mode request is enabled and functional"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Module disregards the sleep mode control signal"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EDIS_A) -> Self { + fn from(variant: Edis) -> Self { variant as u8 != 0 } } -impl EDIS_R { +#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] +pub type EdisR = crate::BitReader; +impl EdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EDIS_A { + pub const fn variant(&self) -> Edis { match self.bits { - false => EDIS_A::VALUE1, - true => EDIS_A::VALUE2, + false => Edis::Value1, + true => Edis::Value2, } } #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EDIS_A::VALUE1 + *self == Edis::Value1 } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EDIS_A::VALUE2 + *self == Edis::Value2 } } #[doc = "Field `EDIS` writer - Sleep Mode Enable Control"] -pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG, EDIS_A>; -impl<'a, REG> EDIS_W<'a, REG> +pub type EdisW<'a, REG> = crate::BitWriter<'a, REG, Edis>; +impl<'a, REG> EdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EDIS_A::VALUE1) + self.variant(Edis::Value1) } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EDIS_A::VALUE2) + self.variant(Edis::Value2) } } impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DISR_R { - DISR_R::new((self.bits & 1) != 0) + pub fn disr(&self) -> DisrR { + DisrR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DISS_R { - DISS_R::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DissR { + DissR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - pub fn edis(&self) -> EDIS_R { - EDIS_R::new(((self.bits >> 3) & 1) != 0) + pub fn edis(&self) -> EdisR { + EdisR::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DISR_W { - DISR_W::new(self, 0) + pub fn disr(&mut self) -> DisrW { + DisrW::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] #[must_use] - pub fn edis(&mut self) -> EDIS_W { - EDIS_W::new(self, 3) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn edis(&mut self) -> EdisW { + EdisW::new(self, 3) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLC_SPEC; -impl crate::RegisterSpec for CLC_SPEC { +pub struct ClcSpec; +impl crate::RegisterSpec for ClcSpec { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for CLC_SPEC {} +impl crate::Readable for ClcSpec {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for CLC_SPEC { +impl crate::Writable for ClcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for CLC_SPEC { +impl crate::Resettable for ClcSpec { const RESET_VALUE: u32 = 0x03; } diff --git a/src/vadc/emuxsel.rs b/src/vadc/emuxsel.rs index aaf22fd7..73de6b03 100644 --- a/src/vadc/emuxsel.rs +++ b/src/vadc/emuxsel.rs @@ -1,64 +1,55 @@ #[doc = "Register `EMUXSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EMUXSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EMUXGRP0` reader - External Multiplexer Group for Interface x"] -pub type EMUXGRP0_R = crate::FieldReader; +pub type Emuxgrp0R = crate::FieldReader; #[doc = "Field `EMUXGRP0` writer - External Multiplexer Group for Interface x"] -pub type EMUXGRP0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Emuxgrp0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `EMUXGRP1` reader - External Multiplexer Group for Interface x"] -pub type EMUXGRP1_R = crate::FieldReader; +pub type Emuxgrp1R = crate::FieldReader; #[doc = "Field `EMUXGRP1` writer - External Multiplexer Group for Interface x"] -pub type EMUXGRP1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type Emuxgrp1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"] #[inline(always)] - pub fn emuxgrp0(&self) -> EMUXGRP0_R { - EMUXGRP0_R::new((self.bits & 0x0f) as u8) + pub fn emuxgrp0(&self) -> Emuxgrp0R { + Emuxgrp0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"] #[inline(always)] - pub fn emuxgrp1(&self) -> EMUXGRP1_R { - EMUXGRP1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn emuxgrp1(&self) -> Emuxgrp1R { + Emuxgrp1R::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"] #[inline(always)] #[must_use] - pub fn emuxgrp0(&mut self) -> EMUXGRP0_W { - EMUXGRP0_W::new(self, 0) + pub fn emuxgrp0(&mut self) -> Emuxgrp0W { + Emuxgrp0W::new(self, 0) } #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"] #[inline(always)] #[must_use] - pub fn emuxgrp1(&mut self) -> EMUXGRP1_W { - EMUXGRP1_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn emuxgrp1(&mut self) -> Emuxgrp1W { + Emuxgrp1W::new(self, 4) } } #[doc = "External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EMUXSEL_SPEC; -impl crate::RegisterSpec for EMUXSEL_SPEC { +pub struct EmuxselSpec; +impl crate::RegisterSpec for EmuxselSpec { type Ux = u32; } #[doc = "`read()` method returns [`emuxsel::R`](R) reader structure"] -impl crate::Readable for EMUXSEL_SPEC {} +impl crate::Readable for EmuxselSpec {} #[doc = "`write(|w| ..)` method takes [`emuxsel::W`](W) writer structure"] -impl crate::Writable for EMUXSEL_SPEC { +impl crate::Writable for EmuxselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EMUXSEL to value 0"] -impl crate::Resettable for EMUXSEL_SPEC { +impl crate::Resettable for EmuxselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globbound.rs b/src/vadc/globbound.rs index 6b148abc..898c0df5 100644 --- a/src/vadc/globbound.rs +++ b/src/vadc/globbound.rs @@ -1,64 +1,55 @@ #[doc = "Register `GLOBBOUND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBBOUND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOUNDARY0` reader - Boundary Value 0 for Limit Checking"] -pub type BOUNDARY0_R = crate::FieldReader; +pub type Boundary0R = crate::FieldReader; #[doc = "Field `BOUNDARY0` writer - Boundary Value 0 for Limit Checking"] -pub type BOUNDARY0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Boundary0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `BOUNDARY1` reader - Boundary Value 1 for Limit Checking"] -pub type BOUNDARY1_R = crate::FieldReader; +pub type Boundary1R = crate::FieldReader; #[doc = "Field `BOUNDARY1` writer - Boundary Value 1 for Limit Checking"] -pub type BOUNDARY1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Boundary1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - pub fn boundary0(&self) -> BOUNDARY0_R { - BOUNDARY0_R::new((self.bits & 0x0fff) as u16) + pub fn boundary0(&self) -> Boundary0R { + Boundary0R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - pub fn boundary1(&self) -> BOUNDARY1_R { - BOUNDARY1_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn boundary1(&self) -> Boundary1R { + Boundary1R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary0(&mut self) -> BOUNDARY0_W { - BOUNDARY0_W::new(self, 0) + pub fn boundary0(&mut self) -> Boundary0W { + Boundary0W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary1(&mut self) -> BOUNDARY1_W { - BOUNDARY1_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn boundary1(&mut self) -> Boundary1W { + Boundary1W::new(self, 16) } } #[doc = "Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBBOUND_SPEC; -impl crate::RegisterSpec for GLOBBOUND_SPEC { +pub struct GlobboundSpec; +impl crate::RegisterSpec for GlobboundSpec { type Ux = u32; } #[doc = "`read()` method returns [`globbound::R`](R) reader structure"] -impl crate::Readable for GLOBBOUND_SPEC {} +impl crate::Readable for GlobboundSpec {} #[doc = "`write(|w| ..)` method takes [`globbound::W`](W) writer structure"] -impl crate::Writable for GLOBBOUND_SPEC { +impl crate::Writable for GlobboundSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBBOUND to value 0"] -impl crate::Resettable for GLOBBOUND_SPEC { +impl crate::Resettable for GlobboundSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globcfg.rs b/src/vadc/globcfg.rs index b6d214e3..0cc9f983 100644 --- a/src/vadc/globcfg.rs +++ b/src/vadc/globcfg.rs @@ -1,67 +1,67 @@ #[doc = "Register `GLOBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBCFG` writer"] -pub type W = crate::W; -#[doc = "Field `DIVA` reader - Divider Factor for the Analog Internal Clock"] -pub type DIVA_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Divider Factor for the Analog Internal Clock\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIVA_A { +pub enum Diva { #[doc = "0: fADCI = fADC / 2"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fADCI = fADC / 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fADCI = fADC / 3"] - VALUE3 = 2, + Value3 = 2, #[doc = "31: fADCI = fADC / 32"] - VALUE4 = 31, + Value4 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIVA_A) -> Self { + fn from(variant: Diva) -> Self { variant as _ } } -impl crate::FieldSpec for DIVA_A { +impl crate::FieldSpec for Diva { type Ux = u8; } -impl DIVA_R { +#[doc = "Field `DIVA` reader - Divider Factor for the Analog Internal Clock"] +pub type DivaR = crate::FieldReader; +impl DivaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DIVA_A::VALUE1), - 1 => Some(DIVA_A::VALUE2), - 2 => Some(DIVA_A::VALUE3), - 31 => Some(DIVA_A::VALUE4), + 0 => Some(Diva::Value1), + 1 => Some(Diva::Value2), + 2 => Some(Diva::Value3), + 31 => Some(Diva::Value4), _ => None, } } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIVA_A::VALUE1 + *self == Diva::Value1 } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIVA_A::VALUE2 + *self == Diva::Value2 } #[doc = "fADCI = fADC / 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DIVA_A::VALUE3 + *self == Diva::Value3 } #[doc = "fADCI = fADC / 32"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DIVA_A::VALUE4 + *self == Diva::Value4 } } #[doc = "Field `DIVA` writer - Divider Factor for the Analog Internal Clock"] -pub type DIVA_W<'a, REG> = crate::FieldWriter<'a, REG, 5, DIVA_A>; -impl<'a, REG> DIVA_W<'a, REG> +pub type DivaW<'a, REG> = crate::FieldWriter<'a, REG, 5, Diva>; +impl<'a, REG> DivaW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,137 +69,137 @@ where #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVA_A::VALUE1) + self.variant(Diva::Value1) } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVA_A::VALUE2) + self.variant(Diva::Value2) } #[doc = "fADCI = fADC / 3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DIVA_A::VALUE3) + self.variant(Diva::Value3) } #[doc = "fADCI = fADC / 32"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DIVA_A::VALUE4) + self.variant(Diva::Value4) } } -#[doc = "Field `DCMSB` reader - Double Clock for the MSB Conversion"] -pub type DCMSB_R = crate::BitReader; #[doc = "Double Clock for the MSB Conversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DCMSB_A { +pub enum Dcmsb { #[doc = "0: 1 clock cycles for the MSB (standard)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 2 clock cycles for the MSB (fADCI > 20 MHz)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DCMSB_A) -> Self { + fn from(variant: Dcmsb) -> Self { variant as u8 != 0 } } -impl DCMSB_R { +#[doc = "Field `DCMSB` reader - Double Clock for the MSB Conversion"] +pub type DcmsbR = crate::BitReader; +impl DcmsbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DCMSB_A { + pub const fn variant(&self) -> Dcmsb { match self.bits { - false => DCMSB_A::VALUE1, - true => DCMSB_A::VALUE2, + false => Dcmsb::Value1, + true => Dcmsb::Value2, } } #[doc = "1 clock cycles for the MSB (standard)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DCMSB_A::VALUE1 + *self == Dcmsb::Value1 } #[doc = "2 clock cycles for the MSB (fADCI > 20 MHz)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DCMSB_A::VALUE2 + *self == Dcmsb::Value2 } } #[doc = "Field `DCMSB` writer - Double Clock for the MSB Conversion"] -pub type DCMSB_W<'a, REG> = crate::BitWriter<'a, REG, DCMSB_A>; -impl<'a, REG> DCMSB_W<'a, REG> +pub type DcmsbW<'a, REG> = crate::BitWriter<'a, REG, Dcmsb>; +impl<'a, REG> DcmsbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "1 clock cycles for the MSB (standard)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DCMSB_A::VALUE1) + self.variant(Dcmsb::Value1) } #[doc = "2 clock cycles for the MSB (fADCI > 20 MHz)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DCMSB_A::VALUE2) + self.variant(Dcmsb::Value2) } } -#[doc = "Field `DIVD` reader - Divider Factor for the Arbiter Clock"] -pub type DIVD_R = crate::FieldReader; #[doc = "Divider Factor for the Arbiter Clock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DIVD_A { +pub enum Divd { #[doc = "0: fADCD = fADC"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: fADCD = fADC / 2"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: fADCD = fADC / 3"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: fADCD = fADC / 4"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DIVD_A) -> Self { + fn from(variant: Divd) -> Self { variant as _ } } -impl crate::FieldSpec for DIVD_A { +impl crate::FieldSpec for Divd { type Ux = u8; } -impl DIVD_R { +#[doc = "Field `DIVD` reader - Divider Factor for the Arbiter Clock"] +pub type DivdR = crate::FieldReader; +impl DivdR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DIVD_A { + pub const fn variant(&self) -> Divd { match self.bits { - 0 => DIVD_A::VALUE1, - 1 => DIVD_A::VALUE2, - 2 => DIVD_A::VALUE3, - 3 => DIVD_A::VALUE4, + 0 => Divd::Value1, + 1 => Divd::Value2, + 2 => Divd::Value3, + 3 => Divd::Value4, _ => unreachable!(), } } #[doc = "fADCD = fADC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DIVD_A::VALUE1 + *self == Divd::Value1 } #[doc = "fADCD = fADC / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DIVD_A::VALUE2 + *self == Divd::Value2 } #[doc = "fADCD = fADC / 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DIVD_A::VALUE3 + *self == Divd::Value3 } #[doc = "fADCD = fADC / 4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DIVD_A::VALUE4 + *self == Divd::Value4 } } #[doc = "Field `DIVD` writer - Divider Factor for the Arbiter Clock"] -pub type DIVD_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, DIVD_A>; -impl<'a, REG> DIVD_W<'a, REG> +pub type DivdW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Divd>; +impl<'a, REG> DivdW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -207,414 +207,405 @@ where #[doc = "fADCD = fADC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVD_A::VALUE1) + self.variant(Divd::Value1) } #[doc = "fADCD = fADC / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVD_A::VALUE2) + self.variant(Divd::Value2) } #[doc = "fADCD = fADC / 3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DIVD_A::VALUE3) + self.variant(Divd::Value3) } #[doc = "fADCD = fADC / 4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DIVD_A::VALUE4) + self.variant(Divd::Value4) } } #[doc = "Write Control for Divider Parameters\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DIVWC_AW { +pub enum Divwc { #[doc = "0: No write access to divider parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields DIVA, DCMSB, DIVD can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DIVWC_AW) -> Self { + fn from(variant: Divwc) -> Self { variant as u8 != 0 } } #[doc = "Field `DIVWC` writer - Write Control for Divider Parameters"] -pub type DIVWC_W<'a, REG> = crate::BitWriter<'a, REG, DIVWC_AW>; -impl<'a, REG> DIVWC_W<'a, REG> +pub type DivwcW<'a, REG> = crate::BitWriter<'a, REG, Divwc>; +impl<'a, REG> DivwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to divider parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DIVWC_AW::VALUE1) + self.variant(Divwc::Value1) } #[doc = "Bitfields DIVA, DCMSB, DIVD can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DIVWC_AW::VALUE2) + self.variant(Divwc::Value2) } } -#[doc = "Field `DPCAL0` reader - Disable Post-Calibration"] -pub type DPCAL0_R = crate::BitReader; #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPCAL0_A { +pub enum Dpcal0 { #[doc = "0: Automatic post-calibration after each conversion of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No post-calibration"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPCAL0_A) -> Self { + fn from(variant: Dpcal0) -> Self { variant as u8 != 0 } } -impl DPCAL0_R { +#[doc = "Field `DPCAL0` reader - Disable Post-Calibration"] +pub type Dpcal0R = crate::BitReader; +impl Dpcal0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPCAL0_A { + pub const fn variant(&self) -> Dpcal0 { match self.bits { - false => DPCAL0_A::VALUE1, - true => DPCAL0_A::VALUE2, + false => Dpcal0::Value1, + true => Dpcal0::Value2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPCAL0_A::VALUE1 + *self == Dpcal0::Value1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPCAL0_A::VALUE2 + *self == Dpcal0::Value2 } } #[doc = "Field `DPCAL0` writer - Disable Post-Calibration"] -pub type DPCAL0_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL0_A>; -impl<'a, REG> DPCAL0_W<'a, REG> +pub type Dpcal0W<'a, REG> = crate::BitWriter<'a, REG, Dpcal0>; +impl<'a, REG> Dpcal0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPCAL0_A::VALUE1) + self.variant(Dpcal0::Value1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPCAL0_A::VALUE2) + self.variant(Dpcal0::Value2) } } -#[doc = "Field `DPCAL1` reader - Disable Post-Calibration"] -pub type DPCAL1_R = crate::BitReader; #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPCAL1_A { +pub enum Dpcal1 { #[doc = "0: Automatic post-calibration after each conversion of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No post-calibration"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPCAL1_A) -> Self { + fn from(variant: Dpcal1) -> Self { variant as u8 != 0 } } -impl DPCAL1_R { +#[doc = "Field `DPCAL1` reader - Disable Post-Calibration"] +pub type Dpcal1R = crate::BitReader; +impl Dpcal1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPCAL1_A { + pub const fn variant(&self) -> Dpcal1 { match self.bits { - false => DPCAL1_A::VALUE1, - true => DPCAL1_A::VALUE2, + false => Dpcal1::Value1, + true => Dpcal1::Value2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPCAL1_A::VALUE1 + *self == Dpcal1::Value1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPCAL1_A::VALUE2 + *self == Dpcal1::Value2 } } #[doc = "Field `DPCAL1` writer - Disable Post-Calibration"] -pub type DPCAL1_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL1_A>; -impl<'a, REG> DPCAL1_W<'a, REG> +pub type Dpcal1W<'a, REG> = crate::BitWriter<'a, REG, Dpcal1>; +impl<'a, REG> Dpcal1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPCAL1_A::VALUE1) + self.variant(Dpcal1::Value1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPCAL1_A::VALUE2) + self.variant(Dpcal1::Value2) } } -#[doc = "Field `DPCAL2` reader - Disable Post-Calibration"] -pub type DPCAL2_R = crate::BitReader; #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPCAL2_A { +pub enum Dpcal2 { #[doc = "0: Automatic post-calibration after each conversion of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No post-calibration"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPCAL2_A) -> Self { + fn from(variant: Dpcal2) -> Self { variant as u8 != 0 } } -impl DPCAL2_R { +#[doc = "Field `DPCAL2` reader - Disable Post-Calibration"] +pub type Dpcal2R = crate::BitReader; +impl Dpcal2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPCAL2_A { + pub const fn variant(&self) -> Dpcal2 { match self.bits { - false => DPCAL2_A::VALUE1, - true => DPCAL2_A::VALUE2, + false => Dpcal2::Value1, + true => Dpcal2::Value2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPCAL2_A::VALUE1 + *self == Dpcal2::Value1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPCAL2_A::VALUE2 + *self == Dpcal2::Value2 } } #[doc = "Field `DPCAL2` writer - Disable Post-Calibration"] -pub type DPCAL2_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL2_A>; -impl<'a, REG> DPCAL2_W<'a, REG> +pub type Dpcal2W<'a, REG> = crate::BitWriter<'a, REG, Dpcal2>; +impl<'a, REG> Dpcal2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPCAL2_A::VALUE1) + self.variant(Dpcal2::Value1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPCAL2_A::VALUE2) + self.variant(Dpcal2::Value2) } } -#[doc = "Field `DPCAL3` reader - Disable Post-Calibration"] -pub type DPCAL3_R = crate::BitReader; #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DPCAL3_A { +pub enum Dpcal3 { #[doc = "0: Automatic post-calibration after each conversion of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No post-calibration"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DPCAL3_A) -> Self { + fn from(variant: Dpcal3) -> Self { variant as u8 != 0 } } -impl DPCAL3_R { +#[doc = "Field `DPCAL3` reader - Disable Post-Calibration"] +pub type Dpcal3R = crate::BitReader; +impl Dpcal3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DPCAL3_A { + pub const fn variant(&self) -> Dpcal3 { match self.bits { - false => DPCAL3_A::VALUE1, - true => DPCAL3_A::VALUE2, + false => Dpcal3::Value1, + true => Dpcal3::Value2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DPCAL3_A::VALUE1 + *self == Dpcal3::Value1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DPCAL3_A::VALUE2 + *self == Dpcal3::Value2 } } #[doc = "Field `DPCAL3` writer - Disable Post-Calibration"] -pub type DPCAL3_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL3_A>; -impl<'a, REG> DPCAL3_W<'a, REG> +pub type Dpcal3W<'a, REG> = crate::BitWriter<'a, REG, Dpcal3>; +impl<'a, REG> Dpcal3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DPCAL3_A::VALUE1) + self.variant(Dpcal3::Value1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DPCAL3_A::VALUE2) + self.variant(Dpcal3::Value2) } } #[doc = "Start-Up Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SUCAL_AW { +pub enum Sucal { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SUCAL_AW) -> Self { + fn from(variant: Sucal) -> Self { variant as u8 != 0 } } #[doc = "Field `SUCAL` writer - Start-Up Calibration"] -pub type SUCAL_W<'a, REG> = crate::BitWriter<'a, REG, SUCAL_AW>; -impl<'a, REG> SUCAL_W<'a, REG> +pub type SucalW<'a, REG> = crate::BitWriter<'a, REG, Sucal>; +impl<'a, REG> SucalW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUCAL_AW::VALUE1) + self.variant(Sucal::Value1) } #[doc = "Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUCAL_AW::VALUE2) + self.variant(Sucal::Value2) } } impl R { #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"] #[inline(always)] - pub fn diva(&self) -> DIVA_R { - DIVA_R::new((self.bits & 0x1f) as u8) + pub fn diva(&self) -> DivaR { + DivaR::new((self.bits & 0x1f) as u8) } #[doc = "Bit 7 - Double Clock for the MSB Conversion"] #[inline(always)] - pub fn dcmsb(&self) -> DCMSB_R { - DCMSB_R::new(((self.bits >> 7) & 1) != 0) + pub fn dcmsb(&self) -> DcmsbR { + DcmsbR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"] #[inline(always)] - pub fn divd(&self) -> DIVD_R { - DIVD_R::new(((self.bits >> 8) & 3) as u8) + pub fn divd(&self) -> DivdR { + DivdR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 16 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal0(&self) -> DPCAL0_R { - DPCAL0_R::new(((self.bits >> 16) & 1) != 0) + pub fn dpcal0(&self) -> Dpcal0R { + Dpcal0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal1(&self) -> DPCAL1_R { - DPCAL1_R::new(((self.bits >> 17) & 1) != 0) + pub fn dpcal1(&self) -> Dpcal1R { + Dpcal1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal2(&self) -> DPCAL2_R { - DPCAL2_R::new(((self.bits >> 18) & 1) != 0) + pub fn dpcal2(&self) -> Dpcal2R { + Dpcal2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal3(&self) -> DPCAL3_R { - DPCAL3_R::new(((self.bits >> 19) & 1) != 0) + pub fn dpcal3(&self) -> Dpcal3R { + Dpcal3R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"] #[inline(always)] #[must_use] - pub fn diva(&mut self) -> DIVA_W { - DIVA_W::new(self, 0) + pub fn diva(&mut self) -> DivaW { + DivaW::new(self, 0) } #[doc = "Bit 7 - Double Clock for the MSB Conversion"] #[inline(always)] #[must_use] - pub fn dcmsb(&mut self) -> DCMSB_W { - DCMSB_W::new(self, 7) + pub fn dcmsb(&mut self) -> DcmsbW { + DcmsbW::new(self, 7) } #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"] #[inline(always)] #[must_use] - pub fn divd(&mut self) -> DIVD_W { - DIVD_W::new(self, 8) + pub fn divd(&mut self) -> DivdW { + DivdW::new(self, 8) } #[doc = "Bit 15 - Write Control for Divider Parameters"] #[inline(always)] #[must_use] - pub fn divwc(&mut self) -> DIVWC_W { - DIVWC_W::new(self, 15) + pub fn divwc(&mut self) -> DivwcW { + DivwcW::new(self, 15) } #[doc = "Bit 16 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal0(&mut self) -> DPCAL0_W { - DPCAL0_W::new(self, 16) + pub fn dpcal0(&mut self) -> Dpcal0W { + Dpcal0W::new(self, 16) } #[doc = "Bit 17 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal1(&mut self) -> DPCAL1_W { - DPCAL1_W::new(self, 17) + pub fn dpcal1(&mut self) -> Dpcal1W { + Dpcal1W::new(self, 17) } #[doc = "Bit 18 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal2(&mut self) -> DPCAL2_W { - DPCAL2_W::new(self, 18) + pub fn dpcal2(&mut self) -> Dpcal2W { + Dpcal2W::new(self, 18) } #[doc = "Bit 19 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal3(&mut self) -> DPCAL3_W { - DPCAL3_W::new(self, 19) + pub fn dpcal3(&mut self) -> Dpcal3W { + Dpcal3W::new(self, 19) } #[doc = "Bit 31 - Start-Up Calibration"] #[inline(always)] #[must_use] - pub fn sucal(&mut self) -> SUCAL_W { - SUCAL_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sucal(&mut self) -> SucalW { + SucalW::new(self, 31) } } #[doc = "Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBCFG_SPEC; -impl crate::RegisterSpec for GLOBCFG_SPEC { +pub struct GlobcfgSpec; +impl crate::RegisterSpec for GlobcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`globcfg::R`](R) reader structure"] -impl crate::Readable for GLOBCFG_SPEC {} +impl crate::Readable for GlobcfgSpec {} #[doc = "`write(|w| ..)` method takes [`globcfg::W`](W) writer structure"] -impl crate::Writable for GLOBCFG_SPEC { +impl crate::Writable for GlobcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBCFG to value 0x0f"] -impl crate::Resettable for GLOBCFG_SPEC { +impl crate::Resettable for GlobcfgSpec { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/vadc/globeflag.rs b/src/vadc/globeflag.rs index d5a7703b..ef26f355 100644 --- a/src/vadc/globeflag.rs +++ b/src/vadc/globeflag.rs @@ -1,236 +1,227 @@ #[doc = "Register `GLOBEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBEFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `SEVGLB` reader - Source Event (Background)"] -pub type SEVGLB_R = crate::BitReader; +pub type W = crate::W; #[doc = "Source Event (Background)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEVGLB_A { +pub enum Sevglb { #[doc = "0: No source event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A source event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEVGLB_A) -> Self { + fn from(variant: Sevglb) -> Self { variant as u8 != 0 } } -impl SEVGLB_R { +#[doc = "Field `SEVGLB` reader - Source Event (Background)"] +pub type SevglbR = crate::BitReader; +impl SevglbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SEVGLB_A { + pub const fn variant(&self) -> Sevglb { match self.bits { - false => SEVGLB_A::VALUE1, - true => SEVGLB_A::VALUE2, + false => Sevglb::Value1, + true => Sevglb::Value2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEVGLB_A::VALUE1 + *self == Sevglb::Value1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEVGLB_A::VALUE2 + *self == Sevglb::Value2 } } #[doc = "Field `SEVGLB` writer - Source Event (Background)"] -pub type SEVGLB_W<'a, REG> = crate::BitWriter<'a, REG, SEVGLB_A>; -impl<'a, REG> SEVGLB_W<'a, REG> +pub type SevglbW<'a, REG> = crate::BitWriter<'a, REG, Sevglb>; +impl<'a, REG> SevglbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEVGLB_A::VALUE1) + self.variant(Sevglb::Value1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEVGLB_A::VALUE2) + self.variant(Sevglb::Value2) } } -#[doc = "Field `REVGLB` reader - Global Result Event"] -pub type REVGLB_R = crate::BitReader; #[doc = "Global Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REVGLB_A { +pub enum Revglb { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GLOBRES"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REVGLB_A) -> Self { + fn from(variant: Revglb) -> Self { variant as u8 != 0 } } -impl REVGLB_R { +#[doc = "Field `REVGLB` reader - Global Result Event"] +pub type RevglbR = crate::BitReader; +impl RevglbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REVGLB_A { + pub const fn variant(&self) -> Revglb { match self.bits { - false => REVGLB_A::VALUE1, - true => REVGLB_A::VALUE2, + false => Revglb::Value1, + true => Revglb::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REVGLB_A::VALUE1 + *self == Revglb::Value1 } #[doc = "New result was stored in register GLOBRES"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REVGLB_A::VALUE2 + *self == Revglb::Value2 } } #[doc = "Field `REVGLB` writer - Global Result Event"] -pub type REVGLB_W<'a, REG> = crate::BitWriter<'a, REG, REVGLB_A>; -impl<'a, REG> REVGLB_W<'a, REG> +pub type RevglbW<'a, REG> = crate::BitWriter<'a, REG, Revglb>; +impl<'a, REG> RevglbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REVGLB_A::VALUE1) + self.variant(Revglb::Value1) } #[doc = "New result was stored in register GLOBRES"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REVGLB_A::VALUE2) + self.variant(Revglb::Value2) } } #[doc = "Clear Source Event (Background)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEVGLBCLR_AW { +pub enum Sevglbclr { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the source event flag SEVGLB"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEVGLBCLR_AW) -> Self { + fn from(variant: Sevglbclr) -> Self { variant as u8 != 0 } } #[doc = "Field `SEVGLBCLR` writer - Clear Source Event (Background)"] -pub type SEVGLBCLR_W<'a, REG> = crate::BitWriter<'a, REG, SEVGLBCLR_AW>; -impl<'a, REG> SEVGLBCLR_W<'a, REG> +pub type SevglbclrW<'a, REG> = crate::BitWriter<'a, REG, Sevglbclr>; +impl<'a, REG> SevglbclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEVGLBCLR_AW::VALUE1) + self.variant(Sevglbclr::Value1) } #[doc = "Clear the source event flag SEVGLB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEVGLBCLR_AW::VALUE2) + self.variant(Sevglbclr::Value2) } } #[doc = "Clear Global Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REVGLBCLR_AW { +pub enum Revglbclr { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag REVGLB"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REVGLBCLR_AW) -> Self { + fn from(variant: Revglbclr) -> Self { variant as u8 != 0 } } #[doc = "Field `REVGLBCLR` writer - Clear Global Result Event"] -pub type REVGLBCLR_W<'a, REG> = crate::BitWriter<'a, REG, REVGLBCLR_AW>; -impl<'a, REG> REVGLBCLR_W<'a, REG> +pub type RevglbclrW<'a, REG> = crate::BitWriter<'a, REG, Revglbclr>; +impl<'a, REG> RevglbclrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REVGLBCLR_AW::VALUE1) + self.variant(Revglbclr::Value1) } #[doc = "Clear the result event flag REVGLB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REVGLBCLR_AW::VALUE2) + self.variant(Revglbclr::Value2) } } impl R { #[doc = "Bit 0 - Source Event (Background)"] #[inline(always)] - pub fn sevglb(&self) -> SEVGLB_R { - SEVGLB_R::new((self.bits & 1) != 0) + pub fn sevglb(&self) -> SevglbR { + SevglbR::new((self.bits & 1) != 0) } #[doc = "Bit 8 - Global Result Event"] #[inline(always)] - pub fn revglb(&self) -> REVGLB_R { - REVGLB_R::new(((self.bits >> 8) & 1) != 0) + pub fn revglb(&self) -> RevglbR { + RevglbR::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source Event (Background)"] #[inline(always)] #[must_use] - pub fn sevglb(&mut self) -> SEVGLB_W { - SEVGLB_W::new(self, 0) + pub fn sevglb(&mut self) -> SevglbW { + SevglbW::new(self, 0) } #[doc = "Bit 8 - Global Result Event"] #[inline(always)] #[must_use] - pub fn revglb(&mut self) -> REVGLB_W { - REVGLB_W::new(self, 8) + pub fn revglb(&mut self) -> RevglbW { + RevglbW::new(self, 8) } #[doc = "Bit 16 - Clear Source Event (Background)"] #[inline(always)] #[must_use] - pub fn sevglbclr(&mut self) -> SEVGLBCLR_W { - SEVGLBCLR_W::new(self, 16) + pub fn sevglbclr(&mut self) -> SevglbclrW { + SevglbclrW::new(self, 16) } #[doc = "Bit 24 - Clear Global Result Event"] #[inline(always)] #[must_use] - pub fn revglbclr(&mut self) -> REVGLBCLR_W { - REVGLBCLR_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn revglbclr(&mut self) -> RevglbclrW { + RevglbclrW::new(self, 24) } } #[doc = "Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBEFLAG_SPEC; -impl crate::RegisterSpec for GLOBEFLAG_SPEC { +pub struct GlobeflagSpec; +impl crate::RegisterSpec for GlobeflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`globeflag::R`](R) reader structure"] -impl crate::Readable for GLOBEFLAG_SPEC {} +impl crate::Readable for GlobeflagSpec {} #[doc = "`write(|w| ..)` method takes [`globeflag::W`](W) writer structure"] -impl crate::Writable for GLOBEFLAG_SPEC { +impl crate::Writable for GlobeflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBEFLAG to value 0"] -impl crate::Resettable for GLOBEFLAG_SPEC { +impl crate::Resettable for GlobeflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globevnp.rs b/src/vadc/globevnp.rs index 52870b89..92169229 100644 --- a/src/vadc/globevnp.rs +++ b/src/vadc/globevnp.rs @@ -1,67 +1,67 @@ #[doc = "Register `GLOBEVNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBEVNP` writer"] -pub type W = crate::W; -#[doc = "Field `SEV0NP` reader - Service Request Node Pointer Backgr. Source"] -pub type SEV0NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Service Request Node Pointer Backgr. Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SEV0NP_A { +pub enum Sev0np { #[doc = "0: Select shared service request line 0 of common service request group 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select shared service request line 3 of common service request group 0"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0 of common service request group 1"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3 of common service request group 1"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SEV0NP_A) -> Self { + fn from(variant: Sev0np) -> Self { variant as _ } } -impl crate::FieldSpec for SEV0NP_A { +impl crate::FieldSpec for Sev0np { type Ux = u8; } -impl SEV0NP_R { +#[doc = "Field `SEV0NP` reader - Service Request Node Pointer Backgr. Source"] +pub type Sev0npR = crate::FieldReader; +impl Sev0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SEV0NP_A::VALUE1), - 3 => Some(SEV0NP_A::VALUE2), - 4 => Some(SEV0NP_A::VALUE3), - 7 => Some(SEV0NP_A::VALUE4), + 0 => Some(Sev0np::Value1), + 3 => Some(Sev0np::Value2), + 4 => Some(Sev0np::Value3), + 7 => Some(Sev0np::Value4), _ => None, } } #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEV0NP_A::VALUE1 + *self == Sev0np::Value1 } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEV0NP_A::VALUE2 + *self == Sev0np::Value2 } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SEV0NP_A::VALUE3 + *self == Sev0np::Value3 } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SEV0NP_A::VALUE4 + *self == Sev0np::Value4 } } #[doc = "Field `SEV0NP` writer - Service Request Node Pointer Backgr. Source"] -pub type SEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV0NP_A>; -impl<'a, REG> SEV0NP_W<'a, REG> +pub type Sev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev0np>; +impl<'a, REG> Sev0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE1) + self.variant(Sev0np::Value1) } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE2) + self.variant(Sev0np::Value2) } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE3) + self.variant(Sev0np::Value3) } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE4) + self.variant(Sev0np::Value4) } } -#[doc = "Field `REV0NP` reader - Service Request Node Pointer Backgr. Result"] -pub type REV0NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Backgr. Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV0NP_A { +pub enum Rev0np { #[doc = "0: Select shared service request line 0 of common service request group 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select shared service request line 3 of common service request group 0"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0 of common service request group 1"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3 of common service request group 1"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV0NP_A) -> Self { + fn from(variant: Rev0np) -> Self { variant as _ } } -impl crate::FieldSpec for REV0NP_A { +impl crate::FieldSpec for Rev0np { type Ux = u8; } -impl REV0NP_R { +#[doc = "Field `REV0NP` reader - Service Request Node Pointer Backgr. Result"] +pub type Rev0npR = crate::FieldReader; +impl Rev0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV0NP_A::VALUE1), - 3 => Some(REV0NP_A::VALUE2), - 4 => Some(REV0NP_A::VALUE3), - 7 => Some(REV0NP_A::VALUE4), + 0 => Some(Rev0np::Value1), + 3 => Some(Rev0np::Value2), + 4 => Some(Rev0np::Value3), + 7 => Some(Rev0np::Value4), _ => None, } } #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV0NP_A::VALUE1 + *self == Rev0np::Value1 } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV0NP_A::VALUE2 + *self == Rev0np::Value2 } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV0NP_A::VALUE3 + *self == Rev0np::Value3 } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV0NP_A::VALUE4 + *self == Rev0np::Value4 } } #[doc = "Field `REV0NP` writer - Service Request Node Pointer Backgr. Result"] -pub type REV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV0NP_A>; -impl<'a, REG> REV0NP_W<'a, REG> +pub type Rev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev0np>; +impl<'a, REG> Rev0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,73 +154,64 @@ where #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE1) + self.variant(Rev0np::Value1) } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE2) + self.variant(Rev0np::Value2) } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE3) + self.variant(Rev0np::Value3) } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE4) + self.variant(Rev0np::Value4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"] #[inline(always)] - pub fn sev0np(&self) -> SEV0NP_R { - SEV0NP_R::new((self.bits & 0x0f) as u8) + pub fn sev0np(&self) -> Sev0npR { + Sev0npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"] #[inline(always)] - pub fn rev0np(&self) -> REV0NP_R { - REV0NP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev0np(&self) -> Rev0npR { + Rev0npR::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"] #[inline(always)] #[must_use] - pub fn sev0np(&mut self) -> SEV0NP_W { - SEV0NP_W::new(self, 0) + pub fn sev0np(&mut self) -> Sev0npW { + Sev0npW::new(self, 0) } #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"] #[inline(always)] #[must_use] - pub fn rev0np(&mut self) -> REV0NP_W { - REV0NP_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rev0np(&mut self) -> Rev0npW { + Rev0npW::new(self, 16) } } #[doc = "Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBEVNP_SPEC; -impl crate::RegisterSpec for GLOBEVNP_SPEC { +pub struct GlobevnpSpec; +impl crate::RegisterSpec for GlobevnpSpec { type Ux = u32; } #[doc = "`read()` method returns [`globevnp::R`](R) reader structure"] -impl crate::Readable for GLOBEVNP_SPEC {} +impl crate::Readable for GlobevnpSpec {} #[doc = "`write(|w| ..)` method takes [`globevnp::W`](W) writer structure"] -impl crate::Writable for GLOBEVNP_SPEC { +impl crate::Writable for GlobevnpSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBEVNP to value 0"] -impl crate::Resettable for GLOBEVNP_SPEC { +impl crate::Resettable for GlobevnpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globiclass.rs b/src/vadc/globiclass.rs index b2e08f9b..b17fcb1c 100644 --- a/src/vadc/globiclass.rs +++ b/src/vadc/globiclass.rs @@ -1,71 +1,71 @@ #[doc = "Register `GLOBICLASS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBICLASS[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STCS` reader - Sample Time Control for Standard Conversions"] -pub type STCS_R = crate::FieldReader; +pub type StcsR = crate::FieldReader; #[doc = "Field `STCS` writer - Sample Time Control for Standard Conversions"] -pub type STCS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] -pub type CMS_R = crate::FieldReader; +pub type StcsW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for Standard Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMS_A { +pub enum Cms { #[doc = "0: 12-bit conversion"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10-bit conversion"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 8-bit conversion"] - VALUE3 = 2, + Value3 = 2, #[doc = "5: 10-bit fast compare mode"] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMS_A) -> Self { + fn from(variant: Cms) -> Self { variant as _ } } -impl crate::FieldSpec for CMS_A { +impl crate::FieldSpec for Cms { type Ux = u8; } -impl CMS_R { +#[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] +pub type CmsR = crate::FieldReader; +impl CmsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMS_A::VALUE1), - 1 => Some(CMS_A::VALUE2), - 2 => Some(CMS_A::VALUE3), - 5 => Some(CMS_A::VALUE6), + 0 => Some(Cms::Value1), + 1 => Some(Cms::Value2), + 2 => Some(Cms::Value3), + 5 => Some(Cms::Value6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMS_A::VALUE1 + *self == Cms::Value1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMS_A::VALUE2 + *self == Cms::Value2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMS_A::VALUE3 + *self == Cms::Value3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == CMS_A::VALUE6 + *self == Cms::Value6 } } #[doc = "Field `CMS` writer - Conversion Mode for Standard Conversions"] -pub type CMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMS_A>; -impl<'a, REG> CMS_W<'a, REG> +pub type CmsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cms>; +impl<'a, REG> CmsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,88 +73,88 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE1) + self.variant(Cms::Value1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE2) + self.variant(Cms::Value2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE3) + self.variant(Cms::Value3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE6) + self.variant(Cms::Value6) } } #[doc = "Field `STCE` reader - Sample Time Control for EMUX Conversions"] -pub type STCE_R = crate::FieldReader; +pub type StceR = crate::FieldReader; #[doc = "Field `STCE` writer - Sample Time Control for EMUX Conversions"] -pub type STCE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] -pub type CME_R = crate::FieldReader; +pub type StceW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for EMUX Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CME_A { +pub enum Cme { #[doc = "0: 12-bit conversion"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10-bit conversion"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 8-bit conversion"] - VALUE3 = 2, + Value3 = 2, #[doc = "5: 10-bit fast compare mode"] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CME_A) -> Self { + fn from(variant: Cme) -> Self { variant as _ } } -impl crate::FieldSpec for CME_A { +impl crate::FieldSpec for Cme { type Ux = u8; } -impl CME_R { +#[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] +pub type CmeR = crate::FieldReader; +impl CmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CME_A::VALUE1), - 1 => Some(CME_A::VALUE2), - 2 => Some(CME_A::VALUE3), - 5 => Some(CME_A::VALUE6), + 0 => Some(Cme::Value1), + 1 => Some(Cme::Value2), + 2 => Some(Cme::Value3), + 5 => Some(Cme::Value6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CME_A::VALUE1 + *self == Cme::Value1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CME_A::VALUE2 + *self == Cme::Value2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CME_A::VALUE3 + *self == Cme::Value3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == CME_A::VALUE6 + *self == Cme::Value6 } } #[doc = "Field `CME` writer - Conversion Mode for EMUX Conversions"] -pub type CME_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CME_A>; -impl<'a, REG> CME_W<'a, REG> +pub type CmeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cme>; +impl<'a, REG> CmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -162,96 +162,87 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE1) + self.variant(Cme::Value1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE2) + self.variant(Cme::Value2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE3) + self.variant(Cme::Value3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE6) + self.variant(Cme::Value6) } } impl R { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - pub fn stcs(&self) -> STCS_R { - STCS_R::new((self.bits & 0x1f) as u8) + pub fn stcs(&self) -> StcsR { + StcsR::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - pub fn cms(&self) -> CMS_R { - CMS_R::new(((self.bits >> 8) & 7) as u8) + pub fn cms(&self) -> CmsR { + CmsR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - pub fn stce(&self) -> STCE_R { - STCE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn stce(&self) -> StceR { + StceR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - pub fn cme(&self) -> CME_R { - CME_R::new(((self.bits >> 24) & 7) as u8) + pub fn cme(&self) -> CmeR { + CmeR::new(((self.bits >> 24) & 7) as u8) } } impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] #[must_use] - pub fn stcs(&mut self) -> STCS_W { - STCS_W::new(self, 0) + pub fn stcs(&mut self) -> StcsW { + StcsW::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] #[must_use] - pub fn cms(&mut self) -> CMS_W { - CMS_W::new(self, 8) + pub fn cms(&mut self) -> CmsW { + CmsW::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn stce(&mut self) -> STCE_W { - STCE_W::new(self, 16) + pub fn stce(&mut self) -> StceW { + StceW::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn cme(&mut self) -> CME_W { - CME_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cme(&mut self) -> CmeW { + CmeW::new(self, 24) } } #[doc = "Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBICLASS_SPEC; -impl crate::RegisterSpec for GLOBICLASS_SPEC { +pub struct GlobiclassSpec; +impl crate::RegisterSpec for GlobiclassSpec { type Ux = u32; } #[doc = "`read()` method returns [`globiclass::R`](R) reader structure"] -impl crate::Readable for GLOBICLASS_SPEC {} +impl crate::Readable for GlobiclassSpec {} #[doc = "`write(|w| ..)` method takes [`globiclass::W`](W) writer structure"] -impl crate::Writable for GLOBICLASS_SPEC { +impl crate::Writable for GlobiclassSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBICLASS[%s] to value 0"] -impl crate::Resettable for GLOBICLASS_SPEC { +impl crate::Resettable for GlobiclassSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globrcr.rs b/src/vadc/globrcr.rs index 17d80fd9..c294d6ab 100644 --- a/src/vadc/globrcr.rs +++ b/src/vadc/globrcr.rs @@ -1,43 +1,43 @@ #[doc = "Register `GLOBRCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRCR` writer"] -pub type W = crate::W; -#[doc = "Field `DRCTR` reader - Data Reduction Control"] -pub type DRCTR_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Data Reduction Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DRCTR_A { +pub enum Drctr { #[doc = "0: Data reduction disabled"] - VALUE1 = 0, + Value1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DRCTR_A) -> Self { + fn from(variant: Drctr) -> Self { variant as _ } } -impl crate::FieldSpec for DRCTR_A { +impl crate::FieldSpec for Drctr { type Ux = u8; } -impl DRCTR_R { +#[doc = "Field `DRCTR` reader - Data Reduction Control"] +pub type DrctrR = crate::FieldReader; +impl DrctrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DRCTR_A::VALUE1), + 0 => Some(Drctr::Value1), _ => None, } } #[doc = "Data reduction disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DRCTR_A::VALUE1 + *self == Drctr::Value1 } } #[doc = "Field `DRCTR` writer - Data Reduction Control"] -pub type DRCTR_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DRCTR_A>; -impl<'a, REG> DRCTR_W<'a, REG> +pub type DrctrW<'a, REG> = crate::FieldWriter<'a, REG, 4, Drctr>; +impl<'a, REG> DrctrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -45,175 +45,166 @@ where #[doc = "Data reduction disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DRCTR_A::VALUE1) + self.variant(Drctr::Value1) } } -#[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] -pub type WFR_R = crate::BitReader; #[doc = "Wait-for-Read Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WFR_A { +pub enum Wfr { #[doc = "0: Overwrite mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wait-for-read mode enabled for this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WFR_A) -> Self { + fn from(variant: Wfr) -> Self { variant as u8 != 0 } } -impl WFR_R { +#[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] +pub type WfrR = crate::BitReader; +impl WfrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WFR_A { + pub const fn variant(&self) -> Wfr { match self.bits { - false => WFR_A::VALUE1, - true => WFR_A::VALUE2, + false => Wfr::Value1, + true => Wfr::Value2, } } #[doc = "Overwrite mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WFR_A::VALUE1 + *self == Wfr::Value1 } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WFR_A::VALUE2 + *self == Wfr::Value2 } } #[doc = "Field `WFR` writer - Wait-for-Read Mode Enable"] -pub type WFR_W<'a, REG> = crate::BitWriter<'a, REG, WFR_A>; -impl<'a, REG> WFR_W<'a, REG> +pub type WfrW<'a, REG> = crate::BitWriter<'a, REG, Wfr>; +impl<'a, REG> WfrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WFR_A::VALUE1) + self.variant(Wfr::Value1) } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WFR_A::VALUE2) + self.variant(Wfr::Value2) } } -#[doc = "Field `SRGEN` reader - Service Request Generation Enable"] -pub type SRGEN_R = crate::BitReader; #[doc = "Service Request Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRGEN_A { +pub enum Srgen { #[doc = "0: No service request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Service request after a result event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRGEN_A) -> Self { + fn from(variant: Srgen) -> Self { variant as u8 != 0 } } -impl SRGEN_R { +#[doc = "Field `SRGEN` reader - Service Request Generation Enable"] +pub type SrgenR = crate::BitReader; +impl SrgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRGEN_A { + pub const fn variant(&self) -> Srgen { match self.bits { - false => SRGEN_A::VALUE1, - true => SRGEN_A::VALUE2, + false => Srgen::Value1, + true => Srgen::Value2, } } #[doc = "No service request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRGEN_A::VALUE1 + *self == Srgen::Value1 } #[doc = "Service request after a result event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRGEN_A::VALUE2 + *self == Srgen::Value2 } } #[doc = "Field `SRGEN` writer - Service Request Generation Enable"] -pub type SRGEN_W<'a, REG> = crate::BitWriter<'a, REG, SRGEN_A>; -impl<'a, REG> SRGEN_W<'a, REG> +pub type SrgenW<'a, REG> = crate::BitWriter<'a, REG, Srgen>; +impl<'a, REG> SrgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No service request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRGEN_A::VALUE1) + self.variant(Srgen::Value1) } #[doc = "Service request after a result event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRGEN_A::VALUE2) + self.variant(Srgen::Value2) } } impl R { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - pub fn drctr(&self) -> DRCTR_R { - DRCTR_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drctr(&self) -> DrctrR { + DrctrR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - pub fn wfr(&self) -> WFR_R { - WFR_R::new(((self.bits >> 24) & 1) != 0) + pub fn wfr(&self) -> WfrR { + WfrR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - pub fn srgen(&self) -> SRGEN_R { - SRGEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn srgen(&self) -> SrgenR { + SrgenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] #[must_use] - pub fn drctr(&mut self) -> DRCTR_W { - DRCTR_W::new(self, 16) + pub fn drctr(&mut self) -> DrctrW { + DrctrW::new(self, 16) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] #[must_use] - pub fn wfr(&mut self) -> WFR_W { - WFR_W::new(self, 24) + pub fn wfr(&mut self) -> WfrW { + WfrW::new(self, 24) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] #[must_use] - pub fn srgen(&mut self) -> SRGEN_W { - SRGEN_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn srgen(&mut self) -> SrgenW { + SrgenW::new(self, 31) } } #[doc = "Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBRCR_SPEC; -impl crate::RegisterSpec for GLOBRCR_SPEC { +pub struct GlobrcrSpec; +impl crate::RegisterSpec for GlobrcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`globrcr::R`](R) reader structure"] -impl crate::Readable for GLOBRCR_SPEC {} +impl crate::Readable for GlobrcrSpec {} #[doc = "`write(|w| ..)` method takes [`globrcr::W`](W) writer structure"] -impl crate::Writable for GLOBRCR_SPEC { +impl crate::Writable for GlobrcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRCR to value 0"] -impl crate::Resettable for GLOBRCR_SPEC { +impl crate::Resettable for GlobrcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globres.rs b/src/vadc/globres.rs index f651dc23..0df168ac 100644 --- a/src/vadc/globres.rs +++ b/src/vadc/globres.rs @@ -1,182 +1,173 @@ #[doc = "Register `GLOBRES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRES` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of most recent conversion"] -pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `GNR` reader - Group Number"] -pub type GNR_R = crate::FieldReader; +pub type GnrR = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type CHNR_R = crate::FieldReader; +pub type ChnrR = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EMUX_R = crate::FieldReader; +pub type EmuxR = crate::FieldReader; #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CRS_R = crate::FieldReader; -#[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FCR_R = crate::BitReader; +pub type CrsR = crate::FieldReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCR_A { +pub enum Fcr { #[doc = "0: Signal level was below compare value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal level was above compare value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCR_A) -> Self { + fn from(variant: Fcr) -> Self { variant as u8 != 0 } } -impl FCR_R { +#[doc = "Field `FCR` reader - Fast Compare Result"] +pub type FcrR = crate::BitReader; +impl FcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCR_A { + pub const fn variant(&self) -> Fcr { match self.bits { - false => FCR_A::VALUE1, - true => FCR_A::VALUE2, + false => Fcr::Value1, + true => Fcr::Value2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCR_A::VALUE1 + *self == Fcr::Value1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCR_A::VALUE2 + *self == Fcr::Value2 } } -#[doc = "Field `VF` reader - Valid Flag"] -pub type VF_R = crate::BitReader; #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF_A { +pub enum Vf { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF_A) -> Self { + fn from(variant: Vf) -> Self { variant as u8 != 0 } } -impl VF_R { +#[doc = "Field `VF` reader - Valid Flag"] +pub type VfR = crate::BitReader; +impl VfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF_A { + pub const fn variant(&self) -> Vf { match self.bits { - false => VF_A::VALUE1, - true => VF_A::VALUE2, + false => Vf::Value1, + true => Vf::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF_A::VALUE1 + *self == Vf::Value1 } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF_A::VALUE2 + *self == Vf::Value2 } } #[doc = "Field `VF` writer - Valid Flag"] -pub type VF_W<'a, REG> = crate::BitWriter<'a, REG, VF_A>; -impl<'a, REG> VF_W<'a, REG> +pub type VfW<'a, REG> = crate::BitWriter<'a, REG, Vf>; +impl<'a, REG> VfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF_A::VALUE1) + self.variant(Vf::Value1) } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF_A::VALUE2) + self.variant(Vf::Value2) } } impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Group Number"] #[inline(always)] - pub fn gnr(&self) -> GNR_R { - GNR_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gnr(&self) -> GnrR { + GnrR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> CHNR_R { - CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> ChnrR { + ChnrR::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EMUX_R { - EMUX_R::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EmuxR { + EmuxR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CrsR { + CrsR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FCR_R { - FCR_R::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FcrR { + FcrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VF_R { - VF_R::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VfR { + VfR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> RESULT_W { - RESULT_W::new(self, 0) + pub fn result(&mut self) -> ResultW { + ResultW::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] #[must_use] - pub fn vf(&mut self) -> VF_W { - VF_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn vf(&mut self) -> VfW { + VfW::new(self, 31) } } #[doc = "Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBRES_SPEC; -impl crate::RegisterSpec for GLOBRES_SPEC { +pub struct GlobresSpec; +impl crate::RegisterSpec for GlobresSpec { type Ux = u32; } #[doc = "`read()` method returns [`globres::R`](R) reader structure"] -impl crate::Readable for GLOBRES_SPEC {} +impl crate::Readable for GlobresSpec {} #[doc = "`write(|w| ..)` method takes [`globres::W`](W) writer structure"] -impl crate::Writable for GLOBRES_SPEC { +impl crate::Writable for GlobresSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRES to value 0"] -impl crate::Resettable for GLOBRES_SPEC { +impl crate::Resettable for GlobresSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globresd.rs b/src/vadc/globresd.rs index 365791c1..e82e03c0 100644 --- a/src/vadc/globresd.rs +++ b/src/vadc/globresd.rs @@ -1,182 +1,173 @@ #[doc = "Register `GLOBRESD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRESD` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of most recent conversion"] -pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `GNR` reader - Group Number"] -pub type GNR_R = crate::FieldReader; +pub type GnrR = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type CHNR_R = crate::FieldReader; +pub type ChnrR = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EMUX_R = crate::FieldReader; +pub type EmuxR = crate::FieldReader; #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CRS_R = crate::FieldReader; -#[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FCR_R = crate::BitReader; +pub type CrsR = crate::FieldReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCR_A { +pub enum Fcr { #[doc = "0: Signal level was below compare value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal level was above compare value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCR_A) -> Self { + fn from(variant: Fcr) -> Self { variant as u8 != 0 } } -impl FCR_R { +#[doc = "Field `FCR` reader - Fast Compare Result"] +pub type FcrR = crate::BitReader; +impl FcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCR_A { + pub const fn variant(&self) -> Fcr { match self.bits { - false => FCR_A::VALUE1, - true => FCR_A::VALUE2, + false => Fcr::Value1, + true => Fcr::Value2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCR_A::VALUE1 + *self == Fcr::Value1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCR_A::VALUE2 + *self == Fcr::Value2 } } -#[doc = "Field `VF` reader - Valid Flag"] -pub type VF_R = crate::BitReader; #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF_A { +pub enum Vf { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF_A) -> Self { + fn from(variant: Vf) -> Self { variant as u8 != 0 } } -impl VF_R { +#[doc = "Field `VF` reader - Valid Flag"] +pub type VfR = crate::BitReader; +impl VfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF_A { + pub const fn variant(&self) -> Vf { match self.bits { - false => VF_A::VALUE1, - true => VF_A::VALUE2, + false => Vf::Value1, + true => Vf::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF_A::VALUE1 + *self == Vf::Value1 } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF_A::VALUE2 + *self == Vf::Value2 } } #[doc = "Field `VF` writer - Valid Flag"] -pub type VF_W<'a, REG> = crate::BitWriter<'a, REG, VF_A>; -impl<'a, REG> VF_W<'a, REG> +pub type VfW<'a, REG> = crate::BitWriter<'a, REG, Vf>; +impl<'a, REG> VfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF_A::VALUE1) + self.variant(Vf::Value1) } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF_A::VALUE2) + self.variant(Vf::Value2) } } impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Group Number"] #[inline(always)] - pub fn gnr(&self) -> GNR_R { - GNR_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gnr(&self) -> GnrR { + GnrR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> CHNR_R { - CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> ChnrR { + ChnrR::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EMUX_R { - EMUX_R::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EmuxR { + EmuxR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CrsR { + CrsR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FCR_R { - FCR_R::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FcrR { + FcrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VF_R { - VF_R::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VfR { + VfR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> RESULT_W { - RESULT_W::new(self, 0) + pub fn result(&mut self) -> ResultW { + ResultW::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] #[must_use] - pub fn vf(&mut self) -> VF_W { - VF_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn vf(&mut self) -> VfW { + VfW::new(self, 31) } } #[doc = "Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBRESD_SPEC; -impl crate::RegisterSpec for GLOBRESD_SPEC { +pub struct GlobresdSpec; +impl crate::RegisterSpec for GlobresdSpec { type Ux = u32; } #[doc = "`read()` method returns [`globresd::R`](R) reader structure"] -impl crate::Readable for GLOBRESD_SPEC {} +impl crate::Readable for GlobresdSpec {} #[doc = "`write(|w| ..)` method takes [`globresd::W`](W) writer structure"] -impl crate::Writable for GLOBRESD_SPEC { +impl crate::Writable for GlobresdSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRESD to value 0"] -impl crate::Resettable for GLOBRESD_SPEC { +impl crate::Resettable for GlobresdSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globtf.rs b/src/vadc/globtf.rs index 24741cf5..c7122c7e 100644 --- a/src/vadc/globtf.rs +++ b/src/vadc/globtf.rs @@ -1,124 +1,124 @@ #[doc = "Register `GLOBTF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBTF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CDGR` reader - Converter Diagnostics Group"] -pub type CDGR_R = crate::FieldReader; +pub type CdgrR = crate::FieldReader; #[doc = "Field `CDGR` writer - Converter Diagnostics Group"] -pub type CDGR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `CDEN` reader - Converter Diagnostics Enable"] -pub type CDEN_R = crate::BitReader; +pub type CdgrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Converter Diagnostics Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDEN_A { +pub enum Cden { #[doc = "0: All diagnostic pull devices are disconnected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Diagnostic pull devices connected as selected by bitfield CDSEL"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDEN_A) -> Self { + fn from(variant: Cden) -> Self { variant as u8 != 0 } } -impl CDEN_R { +#[doc = "Field `CDEN` reader - Converter Diagnostics Enable"] +pub type CdenR = crate::BitReader; +impl CdenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDEN_A { + pub const fn variant(&self) -> Cden { match self.bits { - false => CDEN_A::VALUE1, - true => CDEN_A::VALUE2, + false => Cden::Value1, + true => Cden::Value2, } } #[doc = "All diagnostic pull devices are disconnected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDEN_A::VALUE1 + *self == Cden::Value1 } #[doc = "Diagnostic pull devices connected as selected by bitfield CDSEL"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDEN_A::VALUE2 + *self == Cden::Value2 } } #[doc = "Field `CDEN` writer - Converter Diagnostics Enable"] -pub type CDEN_W<'a, REG> = crate::BitWriter<'a, REG, CDEN_A>; -impl<'a, REG> CDEN_W<'a, REG> +pub type CdenW<'a, REG> = crate::BitWriter<'a, REG, Cden>; +impl<'a, REG> CdenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "All diagnostic pull devices are disconnected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDEN_A::VALUE1) + self.variant(Cden::Value1) } #[doc = "Diagnostic pull devices connected as selected by bitfield CDSEL"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDEN_A::VALUE2) + self.variant(Cden::Value2) } } -#[doc = "Field `CDSEL` reader - Converter Diagnostics Pull-Devices Select"] -pub type CDSEL_R = crate::FieldReader; #[doc = "Converter Diagnostics Pull-Devices Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CDSEL_A { +pub enum Cdsel { #[doc = "0: Connected to VAREF"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Connected to VAGND"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Connected to 1/3rd VAREF"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Connected to 2/3rd VAREF"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CDSEL_A) -> Self { + fn from(variant: Cdsel) -> Self { variant as _ } } -impl crate::FieldSpec for CDSEL_A { +impl crate::FieldSpec for Cdsel { type Ux = u8; } -impl CDSEL_R { +#[doc = "Field `CDSEL` reader - Converter Diagnostics Pull-Devices Select"] +pub type CdselR = crate::FieldReader; +impl CdselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CDSEL_A { + pub const fn variant(&self) -> Cdsel { match self.bits { - 0 => CDSEL_A::VALUE1, - 1 => CDSEL_A::VALUE2, - 2 => CDSEL_A::VALUE3, - 3 => CDSEL_A::VALUE4, + 0 => Cdsel::Value1, + 1 => Cdsel::Value2, + 2 => Cdsel::Value3, + 3 => Cdsel::Value4, _ => unreachable!(), } } #[doc = "Connected to VAREF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CDSEL_A::VALUE1 + *self == Cdsel::Value1 } #[doc = "Connected to VAGND"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CDSEL_A::VALUE2 + *self == Cdsel::Value2 } #[doc = "Connected to 1/3rd VAREF"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CDSEL_A::VALUE3 + *self == Cdsel::Value3 } #[doc = "Connected to 2/3rd VAREF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CDSEL_A::VALUE4 + *self == Cdsel::Value4 } } #[doc = "Field `CDSEL` writer - Converter Diagnostics Pull-Devices Select"] -pub type CDSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CDSEL_A>; -impl<'a, REG> CDSEL_W<'a, REG> +pub type CdselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Cdsel>; +impl<'a, REG> CdselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -126,222 +126,213 @@ where #[doc = "Connected to VAREF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE1) + self.variant(Cdsel::Value1) } #[doc = "Connected to VAGND"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE2) + self.variant(Cdsel::Value2) } #[doc = "Connected to 1/3rd VAREF"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE3) + self.variant(Cdsel::Value3) } #[doc = "Connected to 2/3rd VAREF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CDSEL_A::VALUE4) + self.variant(Cdsel::Value4) } } #[doc = "Write Control for Conversion Diagnostics\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CDWC_AW { +pub enum Cdwc { #[doc = "0: No write access to parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields CDSEL, CDEN, CDGR can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CDWC_AW) -> Self { + fn from(variant: Cdwc) -> Self { variant as u8 != 0 } } #[doc = "Field `CDWC` writer - Write Control for Conversion Diagnostics"] -pub type CDWC_W<'a, REG> = crate::BitWriter<'a, REG, CDWC_AW>; -impl<'a, REG> CDWC_W<'a, REG> +pub type CdwcW<'a, REG> = crate::BitWriter<'a, REG, Cdwc>; +impl<'a, REG> CdwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CDWC_AW::VALUE1) + self.variant(Cdwc::Value1) } #[doc = "Bitfields CDSEL, CDEN, CDGR can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CDWC_AW::VALUE2) + self.variant(Cdwc::Value2) } } -#[doc = "Field `PDD` reader - Pull-Down Diagnostics Enable"] -pub type PDD_R = crate::BitReader; #[doc = "Pull-Down Diagnostics Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum PDD_A { +pub enum Pdd { #[doc = "0: Disconnected"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The pull-down diagnostics device is active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: PDD_A) -> Self { + fn from(variant: Pdd) -> Self { variant as u8 != 0 } } -impl PDD_R { +#[doc = "Field `PDD` reader - Pull-Down Diagnostics Enable"] +pub type PddR = crate::BitReader; +impl PddR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PDD_A { + pub const fn variant(&self) -> Pdd { match self.bits { - false => PDD_A::VALUE1, - true => PDD_A::VALUE2, + false => Pdd::Value1, + true => Pdd::Value2, } } #[doc = "Disconnected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PDD_A::VALUE1 + *self == Pdd::Value1 } #[doc = "The pull-down diagnostics device is active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PDD_A::VALUE2 + *self == Pdd::Value2 } } #[doc = "Field `PDD` writer - Pull-Down Diagnostics Enable"] -pub type PDD_W<'a, REG> = crate::BitWriter<'a, REG, PDD_A>; -impl<'a, REG> PDD_W<'a, REG> +pub type PddW<'a, REG> = crate::BitWriter<'a, REG, Pdd>; +impl<'a, REG> PddW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disconnected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PDD_A::VALUE1) + self.variant(Pdd::Value1) } #[doc = "The pull-down diagnostics device is active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PDD_A::VALUE2) + self.variant(Pdd::Value2) } } #[doc = "Write Control for Multiplexer Diagnostics\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum MDWC_AW { +pub enum Mdwc { #[doc = "0: No write access to parameters"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield PDD can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: MDWC_AW) -> Self { + fn from(variant: Mdwc) -> Self { variant as u8 != 0 } } #[doc = "Field `MDWC` writer - Write Control for Multiplexer Diagnostics"] -pub type MDWC_W<'a, REG> = crate::BitWriter<'a, REG, MDWC_AW>; -impl<'a, REG> MDWC_W<'a, REG> +pub type MdwcW<'a, REG> = crate::BitWriter<'a, REG, Mdwc>; +impl<'a, REG> MdwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(MDWC_AW::VALUE1) + self.variant(Mdwc::Value1) } #[doc = "Bitfield PDD can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(MDWC_AW::VALUE2) + self.variant(Mdwc::Value2) } } impl R { #[doc = "Bits 4:7 - Converter Diagnostics Group"] #[inline(always)] - pub fn cdgr(&self) -> CDGR_R { - CDGR_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cdgr(&self) -> CdgrR { + CdgrR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bit 8 - Converter Diagnostics Enable"] #[inline(always)] - pub fn cden(&self) -> CDEN_R { - CDEN_R::new(((self.bits >> 8) & 1) != 0) + pub fn cden(&self) -> CdenR { + CdenR::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"] #[inline(always)] - pub fn cdsel(&self) -> CDSEL_R { - CDSEL_R::new(((self.bits >> 9) & 3) as u8) + pub fn cdsel(&self) -> CdselR { + CdselR::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bit 16 - Pull-Down Diagnostics Enable"] #[inline(always)] - pub fn pdd(&self) -> PDD_R { - PDD_R::new(((self.bits >> 16) & 1) != 0) + pub fn pdd(&self) -> PddR { + PddR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 4:7 - Converter Diagnostics Group"] #[inline(always)] #[must_use] - pub fn cdgr(&mut self) -> CDGR_W { - CDGR_W::new(self, 4) + pub fn cdgr(&mut self) -> CdgrW { + CdgrW::new(self, 4) } #[doc = "Bit 8 - Converter Diagnostics Enable"] #[inline(always)] #[must_use] - pub fn cden(&mut self) -> CDEN_W { - CDEN_W::new(self, 8) + pub fn cden(&mut self) -> CdenW { + CdenW::new(self, 8) } #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"] #[inline(always)] #[must_use] - pub fn cdsel(&mut self) -> CDSEL_W { - CDSEL_W::new(self, 9) + pub fn cdsel(&mut self) -> CdselW { + CdselW::new(self, 9) } #[doc = "Bit 15 - Write Control for Conversion Diagnostics"] #[inline(always)] #[must_use] - pub fn cdwc(&mut self) -> CDWC_W { - CDWC_W::new(self, 15) + pub fn cdwc(&mut self) -> CdwcW { + CdwcW::new(self, 15) } #[doc = "Bit 16 - Pull-Down Diagnostics Enable"] #[inline(always)] #[must_use] - pub fn pdd(&mut self) -> PDD_W { - PDD_W::new(self, 16) + pub fn pdd(&mut self) -> PddW { + PddW::new(self, 16) } #[doc = "Bit 23 - Write Control for Multiplexer Diagnostics"] #[inline(always)] #[must_use] - pub fn mdwc(&mut self) -> MDWC_W { - MDWC_W::new(self, 23) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn mdwc(&mut self) -> MdwcW { + MdwcW::new(self, 23) } } #[doc = "Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GLOBTF_SPEC; -impl crate::RegisterSpec for GLOBTF_SPEC { +pub struct GlobtfSpec; +impl crate::RegisterSpec for GlobtfSpec { type Ux = u32; } #[doc = "`read()` method returns [`globtf::R`](R) reader structure"] -impl crate::Readable for GLOBTF_SPEC {} +impl crate::Readable for GlobtfSpec {} #[doc = "`write(|w| ..)` method takes [`globtf::W`](W) writer structure"] -impl crate::Writable for GLOBTF_SPEC { +impl crate::Writable for GlobtfSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBTF to value 0"] -impl crate::Resettable for GLOBTF_SPEC { +impl crate::Resettable for GlobtfSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/id.rs b/src/vadc/id.rs index 2b461bda..f06c5592 100644 --- a/src/vadc/id.rs +++ b/src/vadc/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00c5_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00c5_c000; } diff --git a/src/vadc/ocs.rs b/src/vadc/ocs.rs index ede8b0cd..53ad4544 100644 --- a/src/vadc/ocs.rs +++ b/src/vadc/ocs.rs @@ -1,51 +1,51 @@ #[doc = "Register `OCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OCS` writer"] -pub type W = crate::W; -#[doc = "Field `TGS` reader - Trigger Set for OTGB0/1"] -pub type TGS_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Trigger Set for OTGB0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TGS_A { +pub enum Tgs { #[doc = "0: No Trigger Set output"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger Set 1: TS16_SSIG, input sample signals"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TGS_A) -> Self { + fn from(variant: Tgs) -> Self { variant as _ } } -impl crate::FieldSpec for TGS_A { +impl crate::FieldSpec for Tgs { type Ux = u8; } -impl TGS_R { +#[doc = "Field `TGS` reader - Trigger Set for OTGB0/1"] +pub type TgsR = crate::FieldReader; +impl TgsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TGS_A::VALUE1), - 1 => Some(TGS_A::VALUE2), + 0 => Some(Tgs::Value1), + 1 => Some(Tgs::Value2), _ => None, } } #[doc = "No Trigger Set output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TGS_A::VALUE1 + *self == Tgs::Value1 } #[doc = "Trigger Set 1: TS16_SSIG, input sample signals"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TGS_A::VALUE2 + *self == Tgs::Value2 } } #[doc = "Field `TGS` writer - Trigger Set for OTGB0/1"] -pub type TGS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TGS_A>; -impl<'a, REG> TGS_W<'a, REG> +pub type TgsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Tgs>; +impl<'a, REG> TgsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,129 +53,129 @@ where #[doc = "No Trigger Set output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TGS_A::VALUE1) + self.variant(Tgs::Value1) } #[doc = "Trigger Set 1: TS16_SSIG, input sample signals"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TGS_A::VALUE2) + self.variant(Tgs::Value2) } } -#[doc = "Field `TGB` reader - OTGB0/1 Bus Select"] -pub type TGB_R = crate::BitReader; #[doc = "OTGB0/1 Bus Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TGB_A { +pub enum Tgb { #[doc = "0: Trigger Set is output on OTGB0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger Set is output on OTGB1"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TGB_A) -> Self { + fn from(variant: Tgb) -> Self { variant as u8 != 0 } } -impl TGB_R { +#[doc = "Field `TGB` reader - OTGB0/1 Bus Select"] +pub type TgbR = crate::BitReader; +impl TgbR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TGB_A { + pub const fn variant(&self) -> Tgb { match self.bits { - false => TGB_A::VALUE1, - true => TGB_A::VALUE2, + false => Tgb::Value1, + true => Tgb::Value2, } } #[doc = "Trigger Set is output on OTGB0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TGB_A::VALUE1 + *self == Tgb::Value1 } #[doc = "Trigger Set is output on OTGB1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TGB_A::VALUE2 + *self == Tgb::Value2 } } #[doc = "Field `TGB` writer - OTGB0/1 Bus Select"] -pub type TGB_W<'a, REG> = crate::BitWriter<'a, REG, TGB_A>; -impl<'a, REG> TGB_W<'a, REG> +pub type TgbW<'a, REG> = crate::BitWriter<'a, REG, Tgb>; +impl<'a, REG> TgbW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger Set is output on OTGB0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TGB_A::VALUE1) + self.variant(Tgb::Value1) } #[doc = "Trigger Set is output on OTGB1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TGB_A::VALUE2) + self.variant(Tgb::Value2) } } #[doc = "Field `TG_P` writer - TGS, TGB Write Protection"] -pub type TG_P_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SUS` reader - OCDS Suspend Control"] -pub type SUS_R = crate::FieldReader; +pub type TgPW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "OCDS Suspend Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SUS_A { +pub enum Sus { #[doc = "0: Will not suspend"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Hard suspend: Clock is switched off immediately."] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SUS_A) -> Self { + fn from(variant: Sus) -> Self { variant as _ } } -impl crate::FieldSpec for SUS_A { +impl crate::FieldSpec for Sus { type Ux = u8; } -impl SUS_R { +#[doc = "Field `SUS` reader - OCDS Suspend Control"] +pub type SusR = crate::FieldReader; +impl SusR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SUS_A::VALUE1), - 1 => Some(SUS_A::VALUE2), - 2 => Some(SUS_A::VALUE3), - 3 => Some(SUS_A::VALUE4), + 0 => Some(Sus::Value1), + 1 => Some(Sus::Value2), + 2 => Some(Sus::Value3), + 3 => Some(Sus::Value4), _ => None, } } #[doc = "Will not suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUS_A::VALUE1 + *self == Sus::Value1 } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUS_A::VALUE2 + *self == Sus::Value2 } #[doc = "Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SUS_A::VALUE3 + *self == Sus::Value3 } #[doc = "Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SUS_A::VALUE4 + *self == Sus::Value4 } } #[doc = "Field `SUS` writer - OCDS Suspend Control"] -pub type SUS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SUS_A>; -impl<'a, REG> SUS_W<'a, REG> +pub type SusW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sus>; +impl<'a, REG> SusW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -183,139 +183,130 @@ where #[doc = "Will not suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE1) + self.variant(Sus::Value1) } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE2) + self.variant(Sus::Value2) } #[doc = "Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE3) + self.variant(Sus::Value3) } #[doc = "Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SUS_A::VALUE4) + self.variant(Sus::Value4) } } #[doc = "Field `SUS_P` writer - SUS Write Protection"] -pub type SUS_P_W<'a, REG> = crate::BitWriter<'a, REG>; -#[doc = "Field `SUSSTA` reader - Suspend State"] -pub type SUSSTA_R = crate::BitReader; +pub type SusPW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Suspend State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SUSSTA_A { +pub enum Sussta { #[doc = "0: Module is not (yet) suspended"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Module is suspended"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SUSSTA_A) -> Self { + fn from(variant: Sussta) -> Self { variant as u8 != 0 } } -impl SUSSTA_R { +#[doc = "Field `SUSSTA` reader - Suspend State"] +pub type SusstaR = crate::BitReader; +impl SusstaR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SUSSTA_A { + pub const fn variant(&self) -> Sussta { match self.bits { - false => SUSSTA_A::VALUE1, - true => SUSSTA_A::VALUE2, + false => Sussta::Value1, + true => Sussta::Value2, } } #[doc = "Module is not (yet) suspended"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SUSSTA_A::VALUE1 + *self == Sussta::Value1 } #[doc = "Module is suspended"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SUSSTA_A::VALUE2 + *self == Sussta::Value2 } } impl R { #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"] #[inline(always)] - pub fn tgs(&self) -> TGS_R { - TGS_R::new((self.bits & 3) as u8) + pub fn tgs(&self) -> TgsR { + TgsR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - OTGB0/1 Bus Select"] #[inline(always)] - pub fn tgb(&self) -> TGB_R { - TGB_R::new(((self.bits >> 2) & 1) != 0) + pub fn tgb(&self) -> TgbR { + TgbR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] - pub fn sus(&self) -> SUS_R { - SUS_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn sus(&self) -> SusR { + SusR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 29 - Suspend State"] #[inline(always)] - pub fn sussta(&self) -> SUSSTA_R { - SUSSTA_R::new(((self.bits >> 29) & 1) != 0) + pub fn sussta(&self) -> SusstaR { + SusstaR::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"] #[inline(always)] #[must_use] - pub fn tgs(&mut self) -> TGS_W { - TGS_W::new(self, 0) + pub fn tgs(&mut self) -> TgsW { + TgsW::new(self, 0) } #[doc = "Bit 2 - OTGB0/1 Bus Select"] #[inline(always)] #[must_use] - pub fn tgb(&mut self) -> TGB_W { - TGB_W::new(self, 2) + pub fn tgb(&mut self) -> TgbW { + TgbW::new(self, 2) } #[doc = "Bit 3 - TGS, TGB Write Protection"] #[inline(always)] #[must_use] - pub fn tg_p(&mut self) -> TG_P_W { - TG_P_W::new(self, 3) + pub fn tg_p(&mut self) -> TgPW { + TgPW::new(self, 3) } #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] #[must_use] - pub fn sus(&mut self) -> SUS_W { - SUS_W::new(self, 24) + pub fn sus(&mut self) -> SusW { + SusW::new(self, 24) } #[doc = "Bit 28 - SUS Write Protection"] #[inline(always)] #[must_use] - pub fn sus_p(&mut self) -> SUS_P_W { - SUS_P_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sus_p(&mut self) -> SusPW { + SusPW::new(self, 28) } } #[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OCS_SPEC; -impl crate::RegisterSpec for OCS_SPEC { +pub struct OcsSpec; +impl crate::RegisterSpec for OcsSpec { type Ux = u32; } #[doc = "`read()` method returns [`ocs::R`](R) reader structure"] -impl crate::Readable for OCS_SPEC {} +impl crate::Readable for OcsSpec {} #[doc = "`write(|w| ..)` method takes [`ocs::W`](W) writer structure"] -impl crate::Writable for OCS_SPEC { +impl crate::Writable for OcsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OCS to value 0"] -impl crate::Resettable for OCS_SPEC { +impl crate::Resettable for OcsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0.rs b/src/vadc_g0.rs index b5dd5b70..99dce3e8 100644 --- a/src/vadc_g0.rs +++ b/src/vadc_g0.rs @@ -1,473 +1,511 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x80], - arbcfg: ARBCFG, - arbpr: ARBPR, - chass: CHASS, + arbcfg: Arbcfg, + arbpr: Arbpr, + chass: Chass, _reserved3: [u8; 0x14], - iclass: [ICLASS; 2], + iclass: [Iclass; 2], _reserved4: [u8; 0x08], - alias: ALIAS, + alias: Alias, _reserved5: [u8; 0x04], - bound: BOUND, + bound: Bound, _reserved6: [u8; 0x04], - synctr: SYNCTR, + synctr: Synctr, _reserved7: [u8; 0x04], - bfl: BFL, - bfls: BFLS, - bflc: BFLC, - bflnp: BFLNP, + bfl: Bfl, + bfls: Bfls, + bflc: Bflc, + bflnp: Bflnp, _reserved11: [u8; 0x28], - qctrl0: QCTRL0, - qmr0: QMR0, - qsr0: QSR0, - q0r0: Q0R0, + qctrl0: Qctrl0, + qmr0: Qmr0, + qsr0: Qsr0, + q0r0: Q0r0, _reserved_15_qbur0: [u8; 0x04], _reserved16: [u8; 0x0c], - asctrl: ASCTRL, - asmr: ASMR, - assel: ASSEL, - aspnd: ASPND, + asctrl: Asctrl, + asmr: Asmr, + assel: Assel, + aspnd: Aspnd, _reserved20: [u8; 0x50], - ceflag: CEFLAG, - reflag: REFLAG, - seflag: SEFLAG, + ceflag: Ceflag, + reflag: Reflag, + seflag: Seflag, _reserved23: [u8; 0x04], - cefclr: CEFCLR, - refclr: REFCLR, - sefclr: SEFCLR, + cefclr: Cefclr, + refclr: Refclr, + sefclr: Sefclr, _reserved26: [u8; 0x04], - cevnp0: CEVNP0, + cevnp0: Cevnp0, _reserved27: [u8; 0x0c], - revnp0: REVNP0, - revnp1: REVNP1, + revnp0: Revnp0, + revnp1: Revnp1, _reserved29: [u8; 0x08], - sevnp: SEVNP, + sevnp: Sevnp, _reserved30: [u8; 0x04], - sract: SRACT, + sract: Sract, _reserved31: [u8; 0x24], - emuxctr: EMUXCTR, + emuxctr: Emuxctr, _reserved32: [u8; 0x04], - vfr: VFR, + vfr: Vfr, _reserved33: [u8; 0x04], - chctr: [CHCTR; 8], + chctr: [Chctr; 8], _reserved34: [u8; 0x60], - rcr: [RCR; 16], + rcr: [Rcr; 16], _reserved35: [u8; 0x40], - res: [RES; 16], + res: [Res; 16], _reserved36: [u8; 0x40], - resd: [RESD; 16], + resd: [Resd; 16], } impl RegisterBlock { #[doc = "0x80 - Arbitration Configuration Register"] #[inline(always)] - pub const fn arbcfg(&self) -> &ARBCFG { + pub const fn arbcfg(&self) -> &Arbcfg { &self.arbcfg } #[doc = "0x84 - Arbitration Priority Register"] #[inline(always)] - pub const fn arbpr(&self) -> &ARBPR { + pub const fn arbpr(&self) -> &Arbpr { &self.arbpr } #[doc = "0x88 - Channel Assignment Register"] #[inline(always)] - pub const fn chass(&self) -> &CHASS { + pub const fn chass(&self) -> &Chass { &self.chass } #[doc = "0xa0..0xa8 - Input Class Register"] #[inline(always)] - pub const fn iclass(&self, n: usize) -> &ICLASS { + pub const fn iclass(&self, n: usize) -> &Iclass { &self.iclass[n] } #[doc = "Iterator for array of:"] #[doc = "0xa0..0xa8 - Input Class Register"] #[inline(always)] - pub fn iclass_iter(&self) -> impl Iterator { + pub fn iclass_iter(&self) -> impl Iterator { self.iclass.iter() } #[doc = "0xb0 - Alias Register"] #[inline(always)] - pub const fn alias(&self) -> &ALIAS { + pub const fn alias(&self) -> &Alias { &self.alias } #[doc = "0xb8 - Boundary Select Register"] #[inline(always)] - pub const fn bound(&self) -> &BOUND { + pub const fn bound(&self) -> &Bound { &self.bound } #[doc = "0xc0 - Synchronization Control Register"] #[inline(always)] - pub const fn synctr(&self) -> &SYNCTR { + pub const fn synctr(&self) -> &Synctr { &self.synctr } #[doc = "0xc8 - Boundary Flag Register"] #[inline(always)] - pub const fn bfl(&self) -> &BFL { + pub const fn bfl(&self) -> &Bfl { &self.bfl } #[doc = "0xcc - Boundary Flag Software Register"] #[inline(always)] - pub const fn bfls(&self) -> &BFLS { + pub const fn bfls(&self) -> &Bfls { &self.bfls } #[doc = "0xd0 - Boundary Flag Control Register"] #[inline(always)] - pub const fn bflc(&self) -> &BFLC { + pub const fn bflc(&self) -> &Bflc { &self.bflc } #[doc = "0xd4 - Boundary Flag Node Pointer Register"] #[inline(always)] - pub const fn bflnp(&self) -> &BFLNP { + pub const fn bflnp(&self) -> &Bflnp { &self.bflnp } #[doc = "0x100 - Queue 0 Source Control Register"] #[inline(always)] - pub const fn qctrl0(&self) -> &QCTRL0 { + pub const fn qctrl0(&self) -> &Qctrl0 { &self.qctrl0 } #[doc = "0x104 - Queue 0 Mode Register"] #[inline(always)] - pub const fn qmr0(&self) -> &QMR0 { + pub const fn qmr0(&self) -> &Qmr0 { &self.qmr0 } #[doc = "0x108 - Queue 0 Status Register"] #[inline(always)] - pub const fn qsr0(&self) -> &QSR0 { + pub const fn qsr0(&self) -> &Qsr0 { &self.qsr0 } #[doc = "0x10c - Queue 0 Register 0"] #[inline(always)] - pub const fn q0r0(&self) -> &Q0R0 { + pub const fn q0r0(&self) -> &Q0r0 { &self.q0r0 } #[doc = "0x110 - Queue 0 Backup Register"] #[inline(always)] - pub const fn qbur0(&self) -> &QBUR0 { + pub const fn qbur0(&self) -> &Qbur0 { unsafe { &*(self as *const Self).cast::().add(272).cast() } } #[doc = "0x110 - Queue 0 Input Register"] #[inline(always)] - pub const fn qinr0(&self) -> &QINR0 { + pub const fn qinr0(&self) -> &Qinr0 { unsafe { &*(self as *const Self).cast::().add(272).cast() } } #[doc = "0x120 - Autoscan Source Control Register"] #[inline(always)] - pub const fn asctrl(&self) -> &ASCTRL { + pub const fn asctrl(&self) -> &Asctrl { &self.asctrl } #[doc = "0x124 - Autoscan Source Mode Register"] #[inline(always)] - pub const fn asmr(&self) -> &ASMR { + pub const fn asmr(&self) -> &Asmr { &self.asmr } #[doc = "0x128 - Autoscan Source Channel Select Register"] #[inline(always)] - pub const fn assel(&self) -> &ASSEL { + pub const fn assel(&self) -> &Assel { &self.assel } #[doc = "0x12c - Autoscan Source Pending Register"] #[inline(always)] - pub const fn aspnd(&self) -> &ASPND { + pub const fn aspnd(&self) -> &Aspnd { &self.aspnd } #[doc = "0x180 - Channel Event Flag Register"] #[inline(always)] - pub const fn ceflag(&self) -> &CEFLAG { + pub const fn ceflag(&self) -> &Ceflag { &self.ceflag } #[doc = "0x184 - Result Event Flag Register"] #[inline(always)] - pub const fn reflag(&self) -> &REFLAG { + pub const fn reflag(&self) -> &Reflag { &self.reflag } #[doc = "0x188 - Source Event Flag Register"] #[inline(always)] - pub const fn seflag(&self) -> &SEFLAG { + pub const fn seflag(&self) -> &Seflag { &self.seflag } #[doc = "0x190 - Channel Event Flag Clear Register"] #[inline(always)] - pub const fn cefclr(&self) -> &CEFCLR { + pub const fn cefclr(&self) -> &Cefclr { &self.cefclr } #[doc = "0x194 - Result Event Flag Clear Register"] #[inline(always)] - pub const fn refclr(&self) -> &REFCLR { + pub const fn refclr(&self) -> &Refclr { &self.refclr } #[doc = "0x198 - Source Event Flag Clear Register"] #[inline(always)] - pub const fn sefclr(&self) -> &SEFCLR { + pub const fn sefclr(&self) -> &Sefclr { &self.sefclr } #[doc = "0x1a0 - Channel Event Node Pointer Register 0"] #[inline(always)] - pub const fn cevnp0(&self) -> &CEVNP0 { + pub const fn cevnp0(&self) -> &Cevnp0 { &self.cevnp0 } #[doc = "0x1b0 - Result Event Node Pointer Register 0"] #[inline(always)] - pub const fn revnp0(&self) -> &REVNP0 { + pub const fn revnp0(&self) -> &Revnp0 { &self.revnp0 } #[doc = "0x1b4 - Result Event Node Pointer Register 1"] #[inline(always)] - pub const fn revnp1(&self) -> &REVNP1 { + pub const fn revnp1(&self) -> &Revnp1 { &self.revnp1 } #[doc = "0x1c0 - Source Event Node Pointer Register"] #[inline(always)] - pub const fn sevnp(&self) -> &SEVNP { + pub const fn sevnp(&self) -> &Sevnp { &self.sevnp } #[doc = "0x1c8 - Service Request Software Activation Trigger"] #[inline(always)] - pub const fn sract(&self) -> &SRACT { + pub const fn sract(&self) -> &Sract { &self.sract } #[doc = "0x1f0 - E0ternal Multiplexer Control Register"] #[inline(always)] - pub const fn emuxctr(&self) -> &EMUXCTR { + pub const fn emuxctr(&self) -> &Emuxctr { &self.emuxctr } #[doc = "0x1f8 - Valid Flag Register"] #[inline(always)] - pub const fn vfr(&self) -> &VFR { + pub const fn vfr(&self) -> &Vfr { &self.vfr } #[doc = "0x200..0x220 - Channel Ctrl. Reg."] #[inline(always)] - pub const fn chctr(&self, n: usize) -> &CHCTR { + pub const fn chctr(&self, n: usize) -> &Chctr { &self.chctr[n] } #[doc = "Iterator for array of:"] #[doc = "0x200..0x220 - Channel Ctrl. Reg."] #[inline(always)] - pub fn chctr_iter(&self) -> impl Iterator { + pub fn chctr_iter(&self) -> impl Iterator { self.chctr.iter() } #[doc = "0x280..0x2c0 - Result Control Register"] #[inline(always)] - pub const fn rcr(&self, n: usize) -> &RCR { + pub const fn rcr(&self, n: usize) -> &Rcr { &self.rcr[n] } #[doc = "Iterator for array of:"] #[doc = "0x280..0x2c0 - Result Control Register"] #[inline(always)] - pub fn rcr_iter(&self) -> impl Iterator { + pub fn rcr_iter(&self) -> impl Iterator { self.rcr.iter() } #[doc = "0x300..0x340 - Result Register"] #[inline(always)] - pub const fn res(&self, n: usize) -> &RES { + pub const fn res(&self, n: usize) -> &Res { &self.res[n] } #[doc = "Iterator for array of:"] #[doc = "0x300..0x340 - Result Register"] #[inline(always)] - pub fn res_iter(&self) -> impl Iterator { + pub fn res_iter(&self) -> impl Iterator { self.res.iter() } #[doc = "0x380..0x3c0 - Result Register, Debug"] #[inline(always)] - pub const fn resd(&self, n: usize) -> &RESD { + pub const fn resd(&self, n: usize) -> &Resd { &self.resd[n] } #[doc = "Iterator for array of:"] #[doc = "0x380..0x3c0 - Result Register, Debug"] #[inline(always)] - pub fn resd_iter(&self) -> impl Iterator { + pub fn resd_iter(&self) -> impl Iterator { self.resd.iter() } } #[doc = "ARBCFG (rw) register accessor: Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbcfg`] module"] -pub type ARBCFG = crate::Reg; +#[doc(alias = "ARBCFG")] +pub type Arbcfg = crate::Reg; #[doc = "Arbitration Configuration Register"] pub mod arbcfg; #[doc = "ARBPR (rw) register accessor: Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbpr`] module"] -pub type ARBPR = crate::Reg; +#[doc(alias = "ARBPR")] +pub type Arbpr = crate::Reg; #[doc = "Arbitration Priority Register"] pub mod arbpr; #[doc = "CHASS (rw) register accessor: Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chass`] module"] -pub type CHASS = crate::Reg; +#[doc(alias = "CHASS")] +pub type Chass = crate::Reg; #[doc = "Channel Assignment Register"] pub mod chass; #[doc = "ICLASS (rw) register accessor: Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iclass`] module"] -pub type ICLASS = crate::Reg; +#[doc(alias = "ICLASS")] +pub type Iclass = crate::Reg; #[doc = "Input Class Register"] pub mod iclass; #[doc = "ALIAS (rw) register accessor: Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alias`] module"] -pub type ALIAS = crate::Reg; +#[doc(alias = "ALIAS")] +pub type Alias = crate::Reg; #[doc = "Alias Register"] pub mod alias; #[doc = "BOUND (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bound`] module"] -pub type BOUND = crate::Reg; +#[doc(alias = "BOUND")] +pub type Bound = crate::Reg; #[doc = "Boundary Select Register"] pub mod bound; #[doc = "SYNCTR (rw) register accessor: Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synctr`] module"] -pub type SYNCTR = crate::Reg; +#[doc(alias = "SYNCTR")] +pub type Synctr = crate::Reg; #[doc = "Synchronization Control Register"] pub mod synctr; #[doc = "BFL (rw) register accessor: Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfl`] module"] -pub type BFL = crate::Reg; +#[doc(alias = "BFL")] +pub type Bfl = crate::Reg; #[doc = "Boundary Flag Register"] pub mod bfl; #[doc = "BFLS (w) register accessor: Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfls`] module"] -pub type BFLS = crate::Reg; +#[doc(alias = "BFLS")] +pub type Bfls = crate::Reg; #[doc = "Boundary Flag Software Register"] pub mod bfls; #[doc = "BFLC (rw) register accessor: Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflc`] module"] -pub type BFLC = crate::Reg; +#[doc(alias = "BFLC")] +pub type Bflc = crate::Reg; #[doc = "Boundary Flag Control Register"] pub mod bflc; #[doc = "BFLNP (rw) register accessor: Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflnp`] module"] -pub type BFLNP = crate::Reg; +#[doc(alias = "BFLNP")] +pub type Bflnp = crate::Reg; #[doc = "Boundary Flag Node Pointer Register"] pub mod bflnp; #[doc = "QCTRL0 (rw) register accessor: Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qctrl0`] module"] -pub type QCTRL0 = crate::Reg; +#[doc(alias = "QCTRL0")] +pub type Qctrl0 = crate::Reg; #[doc = "Queue 0 Source Control Register"] pub mod qctrl0; #[doc = "QMR0 (rw) register accessor: Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qmr0`] module"] -pub type QMR0 = crate::Reg; +#[doc(alias = "QMR0")] +pub type Qmr0 = crate::Reg; #[doc = "Queue 0 Mode Register"] pub mod qmr0; #[doc = "QSR0 (r) register accessor: Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qsr0`] module"] -pub type QSR0 = crate::Reg; +#[doc(alias = "QSR0")] +pub type Qsr0 = crate::Reg; #[doc = "Queue 0 Status Register"] pub mod qsr0; #[doc = "Q0R0 (r) register accessor: Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@q0r0`] module"] -pub type Q0R0 = crate::Reg; +#[doc(alias = "Q0R0")] +pub type Q0r0 = crate::Reg; #[doc = "Queue 0 Register 0"] pub mod q0r0; #[doc = "QINR0 (w) register accessor: Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qinr0`] module"] -pub type QINR0 = crate::Reg; +#[doc(alias = "QINR0")] +pub type Qinr0 = crate::Reg; #[doc = "Queue 0 Input Register"] pub mod qinr0; #[doc = "QBUR0 (r) register accessor: Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qbur0`] module"] -pub type QBUR0 = crate::Reg; +#[doc(alias = "QBUR0")] +pub type Qbur0 = crate::Reg; #[doc = "Queue 0 Backup Register"] pub mod qbur0; #[doc = "ASCTRL (rw) register accessor: Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asctrl`] module"] -pub type ASCTRL = crate::Reg; +#[doc(alias = "ASCTRL")] +pub type Asctrl = crate::Reg; #[doc = "Autoscan Source Control Register"] pub mod asctrl; #[doc = "ASMR (rw) register accessor: Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asmr`] module"] -pub type ASMR = crate::Reg; +#[doc(alias = "ASMR")] +pub type Asmr = crate::Reg; #[doc = "Autoscan Source Mode Register"] pub mod asmr; #[doc = "ASSEL (rw) register accessor: Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assel`] module"] -pub type ASSEL = crate::Reg; +#[doc(alias = "ASSEL")] +pub type Assel = crate::Reg; #[doc = "Autoscan Source Channel Select Register"] pub mod assel; #[doc = "ASPND (rw) register accessor: Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aspnd`] module"] -pub type ASPND = crate::Reg; +#[doc(alias = "ASPND")] +pub type Aspnd = crate::Reg; #[doc = "Autoscan Source Pending Register"] pub mod aspnd; #[doc = "CEFLAG (rw) register accessor: Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ceflag`] module"] -pub type CEFLAG = crate::Reg; +#[doc(alias = "CEFLAG")] +pub type Ceflag = crate::Reg; #[doc = "Channel Event Flag Register"] pub mod ceflag; #[doc = "REFLAG (rw) register accessor: Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reflag`] module"] -pub type REFLAG = crate::Reg; +#[doc(alias = "REFLAG")] +pub type Reflag = crate::Reg; #[doc = "Result Event Flag Register"] pub mod reflag; #[doc = "SEFLAG (rw) register accessor: Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@seflag`] module"] -pub type SEFLAG = crate::Reg; +#[doc(alias = "SEFLAG")] +pub type Seflag = crate::Reg; #[doc = "Source Event Flag Register"] pub mod seflag; #[doc = "CEFCLR (w) register accessor: Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cefclr`] module"] -pub type CEFCLR = crate::Reg; +#[doc(alias = "CEFCLR")] +pub type Cefclr = crate::Reg; #[doc = "Channel Event Flag Clear Register"] pub mod cefclr; #[doc = "REFCLR (w) register accessor: Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refclr`] module"] -pub type REFCLR = crate::Reg; +#[doc(alias = "REFCLR")] +pub type Refclr = crate::Reg; #[doc = "Result Event Flag Clear Register"] pub mod refclr; #[doc = "SEFCLR (w) register accessor: Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sefclr`] module"] -pub type SEFCLR = crate::Reg; +#[doc(alias = "SEFCLR")] +pub type Sefclr = crate::Reg; #[doc = "Source Event Flag Clear Register"] pub mod sefclr; #[doc = "CEVNP0 (rw) register accessor: Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cevnp0`] module"] -pub type CEVNP0 = crate::Reg; +#[doc(alias = "CEVNP0")] +pub type Cevnp0 = crate::Reg; #[doc = "Channel Event Node Pointer Register 0"] pub mod cevnp0; #[doc = "REVNP0 (rw) register accessor: Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp0`] module"] -pub type REVNP0 = crate::Reg; +#[doc(alias = "REVNP0")] +pub type Revnp0 = crate::Reg; #[doc = "Result Event Node Pointer Register 0"] pub mod revnp0; #[doc = "REVNP1 (rw) register accessor: Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp1`] module"] -pub type REVNP1 = crate::Reg; +#[doc(alias = "REVNP1")] +pub type Revnp1 = crate::Reg; #[doc = "Result Event Node Pointer Register 1"] pub mod revnp1; #[doc = "SEVNP (rw) register accessor: Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sevnp`] module"] -pub type SEVNP = crate::Reg; +#[doc(alias = "SEVNP")] +pub type Sevnp = crate::Reg; #[doc = "Source Event Node Pointer Register"] pub mod sevnp; #[doc = "SRACT (w) register accessor: Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sract`] module"] -pub type SRACT = crate::Reg; +#[doc(alias = "SRACT")] +pub type Sract = crate::Reg; #[doc = "Service Request Software Activation Trigger"] pub mod sract; #[doc = "EMUXCTR (rw) register accessor: E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxctr`] module"] -pub type EMUXCTR = crate::Reg; +#[doc(alias = "EMUXCTR")] +pub type Emuxctr = crate::Reg; #[doc = "E0ternal Multiplexer Control Register"] pub mod emuxctr; #[doc = "VFR (rw) register accessor: Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vfr`] module"] -pub type VFR = crate::Reg; +#[doc(alias = "VFR")] +pub type Vfr = crate::Reg; #[doc = "Valid Flag Register"] pub mod vfr; #[doc = "CHCTR (rw) register accessor: Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctr`] module"] -pub type CHCTR = crate::Reg; +#[doc(alias = "CHCTR")] +pub type Chctr = crate::Reg; #[doc = "Channel Ctrl. Reg."] pub mod chctr; #[doc = "RCR (rw) register accessor: Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rcr`] module"] -pub type RCR = crate::Reg; +#[doc(alias = "RCR")] +pub type Rcr = crate::Reg; #[doc = "Result Control Register"] pub mod rcr; #[doc = "RES (rw) register accessor: Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] module"] -pub type RES = crate::Reg; +#[doc(alias = "RES")] +pub type Res = crate::Reg; #[doc = "Result Register"] pub mod res; #[doc = "RESD (r) register accessor: Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resd`] module"] -pub type RESD = crate::Reg; +#[doc(alias = "RESD")] +pub type Resd = crate::Reg; #[doc = "Result Register, Debug"] pub mod resd; diff --git a/src/vadc_g0/alias.rs b/src/vadc_g0/alias.rs index fd77b2bf..51e6b667 100644 --- a/src/vadc_g0/alias.rs +++ b/src/vadc_g0/alias.rs @@ -1,64 +1,55 @@ #[doc = "Register `ALIAS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ALIAS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ALIAS0` reader - Alias Value for CH0 Conversion Requests"] -pub type ALIAS0_R = crate::FieldReader; +pub type Alias0R = crate::FieldReader; #[doc = "Field `ALIAS0` writer - Alias Value for CH0 Conversion Requests"] -pub type ALIAS0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Alias0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `ALIAS1` reader - Alias Value for CH1 Conversion Requests"] -pub type ALIAS1_R = crate::FieldReader; +pub type Alias1R = crate::FieldReader; #[doc = "Field `ALIAS1` writer - Alias Value for CH1 Conversion Requests"] -pub type ALIAS1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type Alias1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"] #[inline(always)] - pub fn alias0(&self) -> ALIAS0_R { - ALIAS0_R::new((self.bits & 0x1f) as u8) + pub fn alias0(&self) -> Alias0R { + Alias0R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"] #[inline(always)] - pub fn alias1(&self) -> ALIAS1_R { - ALIAS1_R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn alias1(&self) -> Alias1R { + Alias1R::new(((self.bits >> 8) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"] #[inline(always)] #[must_use] - pub fn alias0(&mut self) -> ALIAS0_W { - ALIAS0_W::new(self, 0) + pub fn alias0(&mut self) -> Alias0W { + Alias0W::new(self, 0) } #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"] #[inline(always)] #[must_use] - pub fn alias1(&mut self) -> ALIAS1_W { - ALIAS1_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn alias1(&mut self) -> Alias1W { + Alias1W::new(self, 8) } } #[doc = "Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ALIAS_SPEC; -impl crate::RegisterSpec for ALIAS_SPEC { +pub struct AliasSpec; +impl crate::RegisterSpec for AliasSpec { type Ux = u32; } #[doc = "`read()` method returns [`alias::R`](R) reader structure"] -impl crate::Readable for ALIAS_SPEC {} +impl crate::Readable for AliasSpec {} #[doc = "`write(|w| ..)` method takes [`alias::W`](W) writer structure"] -impl crate::Writable for ALIAS_SPEC { +impl crate::Writable for AliasSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ALIAS to value 0x0100"] -impl crate::Resettable for ALIAS_SPEC { +impl crate::Resettable for AliasSpec { const RESET_VALUE: u32 = 0x0100; } diff --git a/src/vadc_g0/arbcfg.rs b/src/vadc_g0/arbcfg.rs index 078bb33f..2ece001f 100644 --- a/src/vadc_g0/arbcfg.rs +++ b/src/vadc_g0/arbcfg.rs @@ -1,71 +1,71 @@ #[doc = "Register `ARBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ARBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ANONC` reader - Analog Converter Control"] -pub type ANONC_R = crate::FieldReader; +pub type AnoncR = crate::FieldReader; #[doc = "Field `ANONC` writer - Analog Converter Control"] -pub type ANONC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; -#[doc = "Field `ARBRND` reader - Arbitration Round Length"] -pub type ARBRND_R = crate::FieldReader; +pub type AnoncW<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Arbitration Round Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ARBRND_A { +pub enum Arbrnd { #[doc = "0: 4 arbitration slots per round (tARB = 4 / fADCD)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 8 arbitration slots per round (tARB = 8 / fADCD)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 16 arbitration slots per round (tARB = 16 / fADCD)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: 20 arbitration slots per round (tARB = 20 / fADCD)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ARBRND_A) -> Self { + fn from(variant: Arbrnd) -> Self { variant as _ } } -impl crate::FieldSpec for ARBRND_A { +impl crate::FieldSpec for Arbrnd { type Ux = u8; } -impl ARBRND_R { +#[doc = "Field `ARBRND` reader - Arbitration Round Length"] +pub type ArbrndR = crate::FieldReader; +impl ArbrndR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBRND_A { + pub const fn variant(&self) -> Arbrnd { match self.bits { - 0 => ARBRND_A::VALUE1, - 1 => ARBRND_A::VALUE2, - 2 => ARBRND_A::VALUE3, - 3 => ARBRND_A::VALUE4, + 0 => Arbrnd::Value1, + 1 => Arbrnd::Value2, + 2 => Arbrnd::Value3, + 3 => Arbrnd::Value4, _ => unreachable!(), } } #[doc = "4 arbitration slots per round (tARB = 4 / fADCD)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBRND_A::VALUE1 + *self == Arbrnd::Value1 } #[doc = "8 arbitration slots per round (tARB = 8 / fADCD)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBRND_A::VALUE2 + *self == Arbrnd::Value2 } #[doc = "16 arbitration slots per round (tARB = 16 / fADCD)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ARBRND_A::VALUE3 + *self == Arbrnd::Value3 } #[doc = "20 arbitration slots per round (tARB = 20 / fADCD)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ARBRND_A::VALUE4 + *self == Arbrnd::Value4 } } #[doc = "Field `ARBRND` writer - Arbitration Round Length"] -pub type ARBRND_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ARBRND_A>; -impl<'a, REG> ARBRND_W<'a, REG> +pub type ArbrndW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Arbrnd>; +impl<'a, REG> ArbrndW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,306 +73,297 @@ where #[doc = "4 arbitration slots per round (tARB = 4 / fADCD)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBRND_A::VALUE1) + self.variant(Arbrnd::Value1) } #[doc = "8 arbitration slots per round (tARB = 8 / fADCD)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBRND_A::VALUE2) + self.variant(Arbrnd::Value2) } #[doc = "16 arbitration slots per round (tARB = 16 / fADCD)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ARBRND_A::VALUE3) + self.variant(Arbrnd::Value3) } #[doc = "20 arbitration slots per round (tARB = 20 / fADCD)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ARBRND_A::VALUE4) + self.variant(Arbrnd::Value4) } } -#[doc = "Field `ARBM` reader - Arbitration Mode"] -pub type ARBM_R = crate::BitReader; #[doc = "Arbitration Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ARBM_A { +pub enum Arbm { #[doc = "0: The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ARBM_A) -> Self { + fn from(variant: Arbm) -> Self { variant as u8 != 0 } } -impl ARBM_R { +#[doc = "Field `ARBM` reader - Arbitration Mode"] +pub type ArbmR = crate::BitReader; +impl ArbmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ARBM_A { + pub const fn variant(&self) -> Arbm { match self.bits { - false => ARBM_A::VALUE1, - true => ARBM_A::VALUE2, + false => Arbm::Value1, + true => Arbm::Value2, } } #[doc = "The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ARBM_A::VALUE1 + *self == Arbm::Value1 } #[doc = "The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ARBM_A::VALUE2 + *self == Arbm::Value2 } } #[doc = "Field `ARBM` writer - Arbitration Mode"] -pub type ARBM_W<'a, REG> = crate::BitWriter<'a, REG, ARBM_A>; -impl<'a, REG> ARBM_W<'a, REG> +pub type ArbmW<'a, REG> = crate::BitWriter<'a, REG, Arbm>; +impl<'a, REG> ArbmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ARBM_A::VALUE1) + self.variant(Arbm::Value1) } #[doc = "The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ARBM_A::VALUE2) + self.variant(Arbm::Value2) } } -#[doc = "Field `ANONS` reader - Analog Converter Control Status"] -pub type ANONS_R = crate::FieldReader; #[doc = "Analog Converter Control Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ANONS_A { +pub enum Anons { #[doc = "0: Analog converter off"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Normal operation (permanently on)"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ANONS_A) -> Self { + fn from(variant: Anons) -> Self { variant as _ } } -impl crate::FieldSpec for ANONS_A { +impl crate::FieldSpec for Anons { type Ux = u8; } -impl ANONS_R { +#[doc = "Field `ANONS` reader - Analog Converter Control Status"] +pub type AnonsR = crate::FieldReader; +impl AnonsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(ANONS_A::VALUE1), - 3 => Some(ANONS_A::VALUE4), + 0 => Some(Anons::Value1), + 3 => Some(Anons::Value4), _ => None, } } #[doc = "Analog converter off"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ANONS_A::VALUE1 + *self == Anons::Value1 } #[doc = "Normal operation (permanently on)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ANONS_A::VALUE4 + *self == Anons::Value4 } } -#[doc = "Field `CAL` reader - Start-Up Calibration Active Indication"] -pub type CAL_R = crate::BitReader; #[doc = "Start-Up Calibration Active Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CAL_A { +pub enum Cal { #[doc = "0: Completed or not yet started"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Start-up calibration phase is active"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CAL_A) -> Self { + fn from(variant: Cal) -> Self { variant as u8 != 0 } } -impl CAL_R { +#[doc = "Field `CAL` reader - Start-Up Calibration Active Indication"] +pub type CalR = crate::BitReader; +impl CalR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CAL_A { + pub const fn variant(&self) -> Cal { match self.bits { - false => CAL_A::VALUE1, - true => CAL_A::VALUE2, + false => Cal::Value1, + true => Cal::Value2, } } #[doc = "Completed or not yet started"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CAL_A::VALUE1 + *self == Cal::Value1 } #[doc = "Start-up calibration phase is active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CAL_A::VALUE2 + *self == Cal::Value2 } } -#[doc = "Field `BUSY` reader - Converter Busy Flag"] -pub type BUSY_R = crate::BitReader; #[doc = "Converter Busy Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BUSY_A { +pub enum Busy { #[doc = "0: Not busy"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Converter is busy with a conversion"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BUSY_A) -> Self { + fn from(variant: Busy) -> Self { variant as u8 != 0 } } -impl BUSY_R { +#[doc = "Field `BUSY` reader - Converter Busy Flag"] +pub type BusyR = crate::BitReader; +impl BusyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BUSY_A { + pub const fn variant(&self) -> Busy { match self.bits { - false => BUSY_A::VALUE1, - true => BUSY_A::VALUE2, + false => Busy::Value1, + true => Busy::Value2, } } #[doc = "Not busy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BUSY_A::VALUE1 + *self == Busy::Value1 } #[doc = "Converter is busy with a conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BUSY_A::VALUE2 + *self == Busy::Value2 } } -#[doc = "Field `SAMPLE` reader - Sample Phase Flag"] -pub type SAMPLE_R = crate::BitReader; #[doc = "Sample Phase Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SAMPLE_A { +pub enum Sample { #[doc = "0: Converting or idle"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Input signal is currently sampled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SAMPLE_A) -> Self { + fn from(variant: Sample) -> Self { variant as u8 != 0 } } -impl SAMPLE_R { +#[doc = "Field `SAMPLE` reader - Sample Phase Flag"] +pub type SampleR = crate::BitReader; +impl SampleR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SAMPLE_A { + pub const fn variant(&self) -> Sample { match self.bits { - false => SAMPLE_A::VALUE1, - true => SAMPLE_A::VALUE2, + false => Sample::Value1, + true => Sample::Value2, } } #[doc = "Converting or idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SAMPLE_A::VALUE1 + *self == Sample::Value1 } #[doc = "Input signal is currently sampled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SAMPLE_A::VALUE2 + *self == Sample::Value2 } } impl R { #[doc = "Bits 0:1 - Analog Converter Control"] #[inline(always)] - pub fn anonc(&self) -> ANONC_R { - ANONC_R::new((self.bits & 3) as u8) + pub fn anonc(&self) -> AnoncR { + AnoncR::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - Arbitration Round Length"] #[inline(always)] - pub fn arbrnd(&self) -> ARBRND_R { - ARBRND_R::new(((self.bits >> 4) & 3) as u8) + pub fn arbrnd(&self) -> ArbrndR { + ArbrndR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 7 - Arbitration Mode"] #[inline(always)] - pub fn arbm(&self) -> ARBM_R { - ARBM_R::new(((self.bits >> 7) & 1) != 0) + pub fn arbm(&self) -> ArbmR { + ArbmR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 16:17 - Analog Converter Control Status"] #[inline(always)] - pub fn anons(&self) -> ANONS_R { - ANONS_R::new(((self.bits >> 16) & 3) as u8) + pub fn anons(&self) -> AnonsR { + AnonsR::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 28 - Start-Up Calibration Active Indication"] #[inline(always)] - pub fn cal(&self) -> CAL_R { - CAL_R::new(((self.bits >> 28) & 1) != 0) + pub fn cal(&self) -> CalR { + CalR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Converter Busy Flag"] #[inline(always)] - pub fn busy(&self) -> BUSY_R { - BUSY_R::new(((self.bits >> 30) & 1) != 0) + pub fn busy(&self) -> BusyR { + BusyR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sample Phase Flag"] #[inline(always)] - pub fn sample(&self) -> SAMPLE_R { - SAMPLE_R::new(((self.bits >> 31) & 1) != 0) + pub fn sample(&self) -> SampleR { + SampleR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Analog Converter Control"] #[inline(always)] #[must_use] - pub fn anonc(&mut self) -> ANONC_W { - ANONC_W::new(self, 0) + pub fn anonc(&mut self) -> AnoncW { + AnoncW::new(self, 0) } #[doc = "Bits 4:5 - Arbitration Round Length"] #[inline(always)] #[must_use] - pub fn arbrnd(&mut self) -> ARBRND_W { - ARBRND_W::new(self, 4) + pub fn arbrnd(&mut self) -> ArbrndW { + ArbrndW::new(self, 4) } #[doc = "Bit 7 - Arbitration Mode"] #[inline(always)] #[must_use] - pub fn arbm(&mut self) -> ARBM_W { - ARBM_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn arbm(&mut self) -> ArbmW { + ArbmW::new(self, 7) } } #[doc = "Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ARBCFG_SPEC; -impl crate::RegisterSpec for ARBCFG_SPEC { +pub struct ArbcfgSpec; +impl crate::RegisterSpec for ArbcfgSpec { type Ux = u32; } #[doc = "`read()` method returns [`arbcfg::R`](R) reader structure"] -impl crate::Readable for ARBCFG_SPEC {} +impl crate::Readable for ArbcfgSpec {} #[doc = "`write(|w| ..)` method takes [`arbcfg::W`](W) writer structure"] -impl crate::Writable for ARBCFG_SPEC { +impl crate::Writable for ArbcfgSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ARBCFG to value 0"] -impl crate::Resettable for ARBCFG_SPEC { +impl crate::Resettable for ArbcfgSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/arbpr.rs b/src/vadc_g0/arbpr.rs index 363b605a..f7bb398b 100644 --- a/src/vadc_g0/arbpr.rs +++ b/src/vadc_g0/arbpr.rs @@ -1,51 +1,51 @@ #[doc = "Register `ARBPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ARBPR` writer"] -pub type W = crate::W; -#[doc = "Field `PRIO0` reader - Priority of Request Source x"] -pub type PRIO0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRIO0_A { +pub enum Prio0 { #[doc = "0: Lowest priority is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Highest priority is selected."] - VALUE2 = 3, + Value2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRIO0_A) -> Self { + fn from(variant: Prio0) -> Self { variant as _ } } -impl crate::FieldSpec for PRIO0_A { +impl crate::FieldSpec for Prio0 { type Ux = u8; } -impl PRIO0_R { +#[doc = "Field `PRIO0` reader - Priority of Request Source x"] +pub type Prio0R = crate::FieldReader; +impl Prio0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRIO0_A::VALUE1), - 3 => Some(PRIO0_A::VALUE2), + 0 => Some(Prio0::Value1), + 3 => Some(Prio0::Value2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRIO0_A::VALUE1 + *self == Prio0::Value1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRIO0_A::VALUE2 + *self == Prio0::Value2 } } #[doc = "Field `PRIO0` writer - Priority of Request Source x"] -pub type PRIO0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO0_A>; -impl<'a, REG> PRIO0_W<'a, REG> +pub type Prio0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio0>; +impl<'a, REG> Prio0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -53,111 +53,111 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRIO0_A::VALUE1) + self.variant(Prio0::Value1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRIO0_A::VALUE2) + self.variant(Prio0::Value2) } } -#[doc = "Field `CSM0` reader - Conversion Start Mode of Request Source x"] -pub type CSM0_R = crate::BitReader; #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSM0_A { +pub enum Csm0 { #[doc = "0: Wait-for-start mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSM0_A) -> Self { + fn from(variant: Csm0) -> Self { variant as u8 != 0 } } -impl CSM0_R { +#[doc = "Field `CSM0` reader - Conversion Start Mode of Request Source x"] +pub type Csm0R = crate::BitReader; +impl Csm0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CSM0_A { + pub const fn variant(&self) -> Csm0 { match self.bits { - false => CSM0_A::VALUE1, - true => CSM0_A::VALUE2, + false => Csm0::Value1, + true => Csm0::Value2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CSM0_A::VALUE1 + *self == Csm0::Value1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CSM0_A::VALUE2 + *self == Csm0::Value2 } } #[doc = "Field `CSM0` writer - Conversion Start Mode of Request Source x"] -pub type CSM0_W<'a, REG> = crate::BitWriter<'a, REG, CSM0_A>; -impl<'a, REG> CSM0_W<'a, REG> +pub type Csm0W<'a, REG> = crate::BitWriter<'a, REG, Csm0>; +impl<'a, REG> Csm0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSM0_A::VALUE1) + self.variant(Csm0::Value1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSM0_A::VALUE2) + self.variant(Csm0::Value2) } } -#[doc = "Field `PRIO1` reader - Priority of Request Source x"] -pub type PRIO1_R = crate::FieldReader; #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRIO1_A { +pub enum Prio1 { #[doc = "0: Lowest priority is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Highest priority is selected."] - VALUE2 = 3, + Value2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRIO1_A) -> Self { + fn from(variant: Prio1) -> Self { variant as _ } } -impl crate::FieldSpec for PRIO1_A { +impl crate::FieldSpec for Prio1 { type Ux = u8; } -impl PRIO1_R { +#[doc = "Field `PRIO1` reader - Priority of Request Source x"] +pub type Prio1R = crate::FieldReader; +impl Prio1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRIO1_A::VALUE1), - 3 => Some(PRIO1_A::VALUE2), + 0 => Some(Prio1::Value1), + 3 => Some(Prio1::Value2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRIO1_A::VALUE1 + *self == Prio1::Value1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRIO1_A::VALUE2 + *self == Prio1::Value2 } } #[doc = "Field `PRIO1` writer - Priority of Request Source x"] -pub type PRIO1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO1_A>; -impl<'a, REG> PRIO1_W<'a, REG> +pub type Prio1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio1>; +impl<'a, REG> Prio1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -165,111 +165,111 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRIO1_A::VALUE1) + self.variant(Prio1::Value1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRIO1_A::VALUE2) + self.variant(Prio1::Value2) } } -#[doc = "Field `CSM1` reader - Conversion Start Mode of Request Source x"] -pub type CSM1_R = crate::BitReader; #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSM1_A { +pub enum Csm1 { #[doc = "0: Wait-for-start mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSM1_A) -> Self { + fn from(variant: Csm1) -> Self { variant as u8 != 0 } } -impl CSM1_R { +#[doc = "Field `CSM1` reader - Conversion Start Mode of Request Source x"] +pub type Csm1R = crate::BitReader; +impl Csm1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CSM1_A { + pub const fn variant(&self) -> Csm1 { match self.bits { - false => CSM1_A::VALUE1, - true => CSM1_A::VALUE2, + false => Csm1::Value1, + true => Csm1::Value2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CSM1_A::VALUE1 + *self == Csm1::Value1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CSM1_A::VALUE2 + *self == Csm1::Value2 } } #[doc = "Field `CSM1` writer - Conversion Start Mode of Request Source x"] -pub type CSM1_W<'a, REG> = crate::BitWriter<'a, REG, CSM1_A>; -impl<'a, REG> CSM1_W<'a, REG> +pub type Csm1W<'a, REG> = crate::BitWriter<'a, REG, Csm1>; +impl<'a, REG> Csm1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSM1_A::VALUE1) + self.variant(Csm1::Value1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSM1_A::VALUE2) + self.variant(Csm1::Value2) } } -#[doc = "Field `PRIO2` reader - Priority of Request Source x"] -pub type PRIO2_R = crate::FieldReader; #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PRIO2_A { +pub enum Prio2 { #[doc = "0: Lowest priority is selected."] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Highest priority is selected."] - VALUE2 = 3, + Value2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PRIO2_A) -> Self { + fn from(variant: Prio2) -> Self { variant as _ } } -impl crate::FieldSpec for PRIO2_A { +impl crate::FieldSpec for Prio2 { type Ux = u8; } -impl PRIO2_R { +#[doc = "Field `PRIO2` reader - Priority of Request Source x"] +pub type Prio2R = crate::FieldReader; +impl Prio2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PRIO2_A::VALUE1), - 3 => Some(PRIO2_A::VALUE2), + 0 => Some(Prio2::Value1), + 3 => Some(Prio2::Value2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PRIO2_A::VALUE1 + *self == Prio2::Value1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PRIO2_A::VALUE2 + *self == Prio2::Value2 } } #[doc = "Field `PRIO2` writer - Priority of Request Source x"] -pub type PRIO2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO2_A>; -impl<'a, REG> PRIO2_W<'a, REG> +pub type Prio2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio2>; +impl<'a, REG> Prio2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -277,352 +277,343 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PRIO2_A::VALUE1) + self.variant(Prio2::Value1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PRIO2_A::VALUE2) + self.variant(Prio2::Value2) } } -#[doc = "Field `CSM2` reader - Conversion Start Mode of Request Source x"] -pub type CSM2_R = crate::BitReader; #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CSM2_A { +pub enum Csm2 { #[doc = "0: Wait-for-start mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CSM2_A) -> Self { + fn from(variant: Csm2) -> Self { variant as u8 != 0 } } -impl CSM2_R { +#[doc = "Field `CSM2` reader - Conversion Start Mode of Request Source x"] +pub type Csm2R = crate::BitReader; +impl Csm2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CSM2_A { + pub const fn variant(&self) -> Csm2 { match self.bits { - false => CSM2_A::VALUE1, - true => CSM2_A::VALUE2, + false => Csm2::Value1, + true => Csm2::Value2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CSM2_A::VALUE1 + *self == Csm2::Value1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CSM2_A::VALUE2 + *self == Csm2::Value2 } } #[doc = "Field `CSM2` writer - Conversion Start Mode of Request Source x"] -pub type CSM2_W<'a, REG> = crate::BitWriter<'a, REG, CSM2_A>; -impl<'a, REG> CSM2_W<'a, REG> +pub type Csm2W<'a, REG> = crate::BitWriter<'a, REG, Csm2>; +impl<'a, REG> Csm2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CSM2_A::VALUE1) + self.variant(Csm2::Value1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CSM2_A::VALUE2) + self.variant(Csm2::Value2) } } -#[doc = "Field `ASEN0` reader - Arbitration Slot 0 Enable"] -pub type ASEN0_R = crate::BitReader; #[doc = "Arbitration Slot 0 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASEN0_A { +pub enum Asen0 { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASEN0_A) -> Self { + fn from(variant: Asen0) -> Self { variant as u8 != 0 } } -impl ASEN0_R { +#[doc = "Field `ASEN0` reader - Arbitration Slot 0 Enable"] +pub type Asen0R = crate::BitReader; +impl Asen0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASEN0_A { + pub const fn variant(&self) -> Asen0 { match self.bits { - false => ASEN0_A::VALUE1, - true => ASEN0_A::VALUE2, + false => Asen0::Value1, + true => Asen0::Value2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASEN0_A::VALUE1 + *self == Asen0::Value1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASEN0_A::VALUE2 + *self == Asen0::Value2 } } #[doc = "Field `ASEN0` writer - Arbitration Slot 0 Enable"] -pub type ASEN0_W<'a, REG> = crate::BitWriter<'a, REG, ASEN0_A>; -impl<'a, REG> ASEN0_W<'a, REG> +pub type Asen0W<'a, REG> = crate::BitWriter<'a, REG, Asen0>; +impl<'a, REG> Asen0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASEN0_A::VALUE1) + self.variant(Asen0::Value1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASEN0_A::VALUE2) + self.variant(Asen0::Value2) } } -#[doc = "Field `ASEN1` reader - Arbitration Slot 1 Enable"] -pub type ASEN1_R = crate::BitReader; #[doc = "Arbitration Slot 1 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASEN1_A { +pub enum Asen1 { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASEN1_A) -> Self { + fn from(variant: Asen1) -> Self { variant as u8 != 0 } } -impl ASEN1_R { +#[doc = "Field `ASEN1` reader - Arbitration Slot 1 Enable"] +pub type Asen1R = crate::BitReader; +impl Asen1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASEN1_A { + pub const fn variant(&self) -> Asen1 { match self.bits { - false => ASEN1_A::VALUE1, - true => ASEN1_A::VALUE2, + false => Asen1::Value1, + true => Asen1::Value2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASEN1_A::VALUE1 + *self == Asen1::Value1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASEN1_A::VALUE2 + *self == Asen1::Value2 } } #[doc = "Field `ASEN1` writer - Arbitration Slot 1 Enable"] -pub type ASEN1_W<'a, REG> = crate::BitWriter<'a, REG, ASEN1_A>; -impl<'a, REG> ASEN1_W<'a, REG> +pub type Asen1W<'a, REG> = crate::BitWriter<'a, REG, Asen1>; +impl<'a, REG> Asen1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASEN1_A::VALUE1) + self.variant(Asen1::Value1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASEN1_A::VALUE2) + self.variant(Asen1::Value2) } } -#[doc = "Field `ASEN2` reader - Arbitration Slot 2 Enable"] -pub type ASEN2_R = crate::BitReader; #[doc = "Arbitration Slot 2 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASEN2_A { +pub enum Asen2 { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASEN2_A) -> Self { + fn from(variant: Asen2) -> Self { variant as u8 != 0 } } -impl ASEN2_R { +#[doc = "Field `ASEN2` reader - Arbitration Slot 2 Enable"] +pub type Asen2R = crate::BitReader; +impl Asen2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASEN2_A { + pub const fn variant(&self) -> Asen2 { match self.bits { - false => ASEN2_A::VALUE1, - true => ASEN2_A::VALUE2, + false => Asen2::Value1, + true => Asen2::Value2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASEN2_A::VALUE1 + *self == Asen2::Value1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASEN2_A::VALUE2 + *self == Asen2::Value2 } } #[doc = "Field `ASEN2` writer - Arbitration Slot 2 Enable"] -pub type ASEN2_W<'a, REG> = crate::BitWriter<'a, REG, ASEN2_A>; -impl<'a, REG> ASEN2_W<'a, REG> +pub type Asen2W<'a, REG> = crate::BitWriter<'a, REG, Asen2>; +impl<'a, REG> Asen2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASEN2_A::VALUE1) + self.variant(Asen2::Value1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASEN2_A::VALUE2) + self.variant(Asen2::Value2) } } impl R { #[doc = "Bits 0:1 - Priority of Request Source x"] #[inline(always)] - pub fn prio0(&self) -> PRIO0_R { - PRIO0_R::new((self.bits & 3) as u8) + pub fn prio0(&self) -> Prio0R { + Prio0R::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm0(&self) -> CSM0_R { - CSM0_R::new(((self.bits >> 3) & 1) != 0) + pub fn csm0(&self) -> Csm0R { + Csm0R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Priority of Request Source x"] #[inline(always)] - pub fn prio1(&self) -> PRIO1_R { - PRIO1_R::new(((self.bits >> 4) & 3) as u8) + pub fn prio1(&self) -> Prio1R { + Prio1R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 7 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm1(&self) -> CSM1_R { - CSM1_R::new(((self.bits >> 7) & 1) != 0) + pub fn csm1(&self) -> Csm1R { + Csm1R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Priority of Request Source x"] #[inline(always)] - pub fn prio2(&self) -> PRIO2_R { - PRIO2_R::new(((self.bits >> 8) & 3) as u8) + pub fn prio2(&self) -> Prio2R { + Prio2R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 11 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm2(&self) -> CSM2_R { - CSM2_R::new(((self.bits >> 11) & 1) != 0) + pub fn csm2(&self) -> Csm2R { + Csm2R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 24 - Arbitration Slot 0 Enable"] #[inline(always)] - pub fn asen0(&self) -> ASEN0_R { - ASEN0_R::new(((self.bits >> 24) & 1) != 0) + pub fn asen0(&self) -> Asen0R { + Asen0R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Arbitration Slot 1 Enable"] #[inline(always)] - pub fn asen1(&self) -> ASEN1_R { - ASEN1_R::new(((self.bits >> 25) & 1) != 0) + pub fn asen1(&self) -> Asen1R { + Asen1R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Arbitration Slot 2 Enable"] #[inline(always)] - pub fn asen2(&self) -> ASEN2_R { - ASEN2_R::new(((self.bits >> 26) & 1) != 0) + pub fn asen2(&self) -> Asen2R { + Asen2R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio0(&mut self) -> PRIO0_W { - PRIO0_W::new(self, 0) + pub fn prio0(&mut self) -> Prio0W { + Prio0W::new(self, 0) } #[doc = "Bit 3 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm0(&mut self) -> CSM0_W { - CSM0_W::new(self, 3) + pub fn csm0(&mut self) -> Csm0W { + Csm0W::new(self, 3) } #[doc = "Bits 4:5 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio1(&mut self) -> PRIO1_W { - PRIO1_W::new(self, 4) + pub fn prio1(&mut self) -> Prio1W { + Prio1W::new(self, 4) } #[doc = "Bit 7 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm1(&mut self) -> CSM1_W { - CSM1_W::new(self, 7) + pub fn csm1(&mut self) -> Csm1W { + Csm1W::new(self, 7) } #[doc = "Bits 8:9 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio2(&mut self) -> PRIO2_W { - PRIO2_W::new(self, 8) + pub fn prio2(&mut self) -> Prio2W { + Prio2W::new(self, 8) } #[doc = "Bit 11 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm2(&mut self) -> CSM2_W { - CSM2_W::new(self, 11) + pub fn csm2(&mut self) -> Csm2W { + Csm2W::new(self, 11) } #[doc = "Bit 24 - Arbitration Slot 0 Enable"] #[inline(always)] #[must_use] - pub fn asen0(&mut self) -> ASEN0_W { - ASEN0_W::new(self, 24) + pub fn asen0(&mut self) -> Asen0W { + Asen0W::new(self, 24) } #[doc = "Bit 25 - Arbitration Slot 1 Enable"] #[inline(always)] #[must_use] - pub fn asen1(&mut self) -> ASEN1_W { - ASEN1_W::new(self, 25) + pub fn asen1(&mut self) -> Asen1W { + Asen1W::new(self, 25) } #[doc = "Bit 26 - Arbitration Slot 2 Enable"] #[inline(always)] #[must_use] - pub fn asen2(&mut self) -> ASEN2_W { - ASEN2_W::new(self, 26) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn asen2(&mut self) -> Asen2W { + Asen2W::new(self, 26) } } #[doc = "Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ARBPR_SPEC; -impl crate::RegisterSpec for ARBPR_SPEC { +pub struct ArbprSpec; +impl crate::RegisterSpec for ArbprSpec { type Ux = u32; } #[doc = "`read()` method returns [`arbpr::R`](R) reader structure"] -impl crate::Readable for ARBPR_SPEC {} +impl crate::Readable for ArbprSpec {} #[doc = "`write(|w| ..)` method takes [`arbpr::W`](W) writer structure"] -impl crate::Writable for ARBPR_SPEC { +impl crate::Writable for ArbprSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ARBPR to value 0"] -impl crate::Resettable for ARBPR_SPEC { +impl crate::Resettable for ArbprSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/asctrl.rs b/src/vadc_g0/asctrl.rs index d84f2867..462ed931 100644 --- a/src/vadc_g0/asctrl.rs +++ b/src/vadc_g0/asctrl.rs @@ -1,59 +1,59 @@ #[doc = "Register `ASCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASCTRL` writer"] -pub type W = crate::W; -#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SRCRESREG_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCRESREG_A { +pub enum Srcresreg { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Store result in group result register GxRES1"] - VALUE2 = 1, + Value2 = 1, #[doc = "15: Store result in group result register GxRES15"] - VALUE3 = 15, + Value3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCRESREG_A) -> Self { + fn from(variant: Srcresreg) -> Self { variant as _ } } -impl crate::FieldSpec for SRCRESREG_A { +impl crate::FieldSpec for Srcresreg { type Ux = u8; } -impl SRCRESREG_R { +#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] +pub type SrcresregR = crate::FieldReader; +impl SrcresregR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRCRESREG_A::VALUE1), - 1 => Some(SRCRESREG_A::VALUE2), - 15 => Some(SRCRESREG_A::VALUE3), + 0 => Some(Srcresreg::Value1), + 1 => Some(Srcresreg::Value2), + 15 => Some(Srcresreg::Value3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRCRESREG_A::VALUE1 + *self == Srcresreg::Value1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRCRESREG_A::VALUE2 + *self == Srcresreg::Value2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SRCRESREG_A::VALUE3 + *self == Srcresreg::Value3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; -impl<'a, REG> SRCRESREG_W<'a, REG> +pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; +impl<'a, REG> SrcresregW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,85 +61,85 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE1) + self.variant(Srcresreg::Value1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE2) + self.variant(Srcresreg::Value2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE3) + self.variant(Srcresreg::Value3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XTSEL_R = crate::FieldReader; +pub type XtselR = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XTLVL_R = crate::BitReader; -#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XTMODE_R = crate::FieldReader; +pub type XtlvlR = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum XTMODE_A { +pub enum Xtmode { #[doc = "0: No external trigger"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger event upon a falling edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger event upon a rising edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Trigger event upon any edge"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: XTMODE_A) -> Self { + fn from(variant: Xtmode) -> Self { variant as _ } } -impl crate::FieldSpec for XTMODE_A { +impl crate::FieldSpec for Xtmode { type Ux = u8; } -impl XTMODE_R { +#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] +pub type XtmodeR = crate::FieldReader; +impl XtmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XTMODE_A { + pub const fn variant(&self) -> Xtmode { match self.bits { - 0 => XTMODE_A::VALUE1, - 1 => XTMODE_A::VALUE2, - 2 => XTMODE_A::VALUE3, - 3 => XTMODE_A::VALUE4, + 0 => Xtmode::Value1, + 1 => Xtmode::Value2, + 2 => Xtmode::Value3, + 3 => Xtmode::Value4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XTMODE_A::VALUE1 + *self == Xtmode::Value1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XTMODE_A::VALUE2 + *self == Xtmode::Value2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == XTMODE_A::VALUE3 + *self == Xtmode::Value3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == XTMODE_A::VALUE4 + *self == Xtmode::Value4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XTMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, XTMODE_A>; -impl<'a, REG> XTMODE_W<'a, REG> +pub type XtmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Xtmode>; +impl<'a, REG> XtmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -147,286 +147,277 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE1) + self.variant(Xtmode::Value1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE2) + self.variant(Xtmode::Value2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE3) + self.variant(Xtmode::Value3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE4) + self.variant(Xtmode::Value4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XTWC_AW { +pub enum Xtwc { #[doc = "0: No write access to trigger configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XTWC_AW) -> Self { + fn from(variant: Xtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_AW>; -impl<'a, REG> XTWC_W<'a, REG> +pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; +impl<'a, REG> XtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE1) + self.variant(Xtwc::Value1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE2) + self.variant(Xtwc::Value2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GTSEL_R = crate::FieldReader; +pub type GtselR = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GTLVL_R = crate::BitReader; +pub type GtlvlR = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GTWC_AW { +pub enum Gtwc { #[doc = "0: No write access to gate configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GTWC_AW) -> Self { + fn from(variant: Gtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_AW>; -impl<'a, REG> GTWC_W<'a, REG> +pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; +impl<'a, REG> GtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE1) + self.variant(Gtwc::Value1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE2) + self.variant(Gtwc::Value2) } } -#[doc = "Field `TMEN` reader - Timer Mode Enable"] -pub type TMEN_R = crate::BitReader; #[doc = "Timer Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TMEN_A { +pub enum Tmen { #[doc = "0: No timer mode: standard gating mechanism can be used"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TMEN_A) -> Self { + fn from(variant: Tmen) -> Self { variant as u8 != 0 } } -impl TMEN_R { +#[doc = "Field `TMEN` reader - Timer Mode Enable"] +pub type TmenR = crate::BitReader; +impl TmenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TMEN_A { + pub const fn variant(&self) -> Tmen { match self.bits { - false => TMEN_A::VALUE1, - true => TMEN_A::VALUE2, + false => Tmen::Value1, + true => Tmen::Value2, } } #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TMEN_A::VALUE1 + *self == Tmen::Value1 } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TMEN_A::VALUE2 + *self == Tmen::Value2 } } #[doc = "Field `TMEN` writer - Timer Mode Enable"] -pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; -impl<'a, REG> TMEN_W<'a, REG> +pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; +impl<'a, REG> TmenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE1) + self.variant(Tmen::Value1) } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE2) + self.variant(Tmen::Value2) } } #[doc = "Write Control for Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TMWC_AW { +pub enum Tmwc { #[doc = "0: No write access to timer mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield TMEN can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TMWC_AW) -> Self { + fn from(variant: Tmwc) -> Self { variant as u8 != 0 } } #[doc = "Field `TMWC` writer - Write Control for Timer Mode"] -pub type TMWC_W<'a, REG> = crate::BitWriter<'a, REG, TMWC_AW>; -impl<'a, REG> TMWC_W<'a, REG> +pub type TmwcW<'a, REG> = crate::BitWriter<'a, REG, Tmwc>; +impl<'a, REG> TmwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to timer mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TMWC_AW::VALUE1) + self.variant(Tmwc::Value1) } #[doc = "Bitfield TMEN can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TMWC_AW::VALUE2) + self.variant(Tmwc::Value2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SRCRESREG_R { - SRCRESREG_R::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SrcresregR { + SrcresregR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XTSEL_R { - XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XtselR { + XtselR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XTLVL_R { - XTLVL_R::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XtlvlR { + XtlvlR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XTMODE_R { - XTMODE_R::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XtmodeR { + XtmodeR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GTSEL_R { - GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GtselR { + GtselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GTLVL_R { - GTLVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GtlvlR { + GtlvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - pub fn tmen(&self) -> TMEN_R { - TMEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn tmen(&self) -> TmenR { + TmenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SRCRESREG_W { - SRCRESREG_W::new(self, 0) + pub fn srcresreg(&mut self) -> SrcresregW { + SrcresregW::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XTSEL_W { - XTSEL_W::new(self, 8) + pub fn xtsel(&mut self) -> XtselW { + XtselW::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XTMODE_W { - XTMODE_W::new(self, 13) + pub fn xtmode(&mut self) -> XtmodeW { + XtmodeW::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XTWC_W { - XTWC_W::new(self, 15) + pub fn xtwc(&mut self) -> XtwcW { + XtwcW::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GTSEL_W { - GTSEL_W::new(self, 16) + pub fn gtsel(&mut self) -> GtselW { + GtselW::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GTWC_W { - GTWC_W::new(self, 23) + pub fn gtwc(&mut self) -> GtwcW { + GtwcW::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TMEN_W { - TMEN_W::new(self, 28) + pub fn tmen(&mut self) -> TmenW { + TmenW::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] #[must_use] - pub fn tmwc(&mut self) -> TMWC_W { - TMWC_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tmwc(&mut self) -> TmwcW { + TmwcW::new(self, 31) } } #[doc = "Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ASCTRL_SPEC; -impl crate::RegisterSpec for ASCTRL_SPEC { +pub struct AsctrlSpec; +impl crate::RegisterSpec for AsctrlSpec { type Ux = u32; } #[doc = "`read()` method returns [`asctrl::R`](R) reader structure"] -impl crate::Readable for ASCTRL_SPEC {} +impl crate::Readable for AsctrlSpec {} #[doc = "`write(|w| ..)` method takes [`asctrl::W`](W) writer structure"] -impl crate::Writable for ASCTRL_SPEC { +impl crate::Writable for AsctrlSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASCTRL to value 0"] -impl crate::Resettable for ASCTRL_SPEC { +impl crate::Resettable for AsctrlSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/asmr.rs b/src/vadc_g0/asmr.rs index 36b4e0e3..73ae1466 100644 --- a/src/vadc_g0/asmr.rs +++ b/src/vadc_g0/asmr.rs @@ -1,67 +1,67 @@ #[doc = "Register `ASMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASMR` writer"] -pub type W = crate::W; -#[doc = "Field `ENGT` reader - Enable Gate"] -pub type ENGT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENGT_A { +pub enum Engt { #[doc = "0: No conversion requests are issued"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Conversion requests are issued if at least one pending bit is set"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENGT_A) -> Self { + fn from(variant: Engt) -> Self { variant as _ } } -impl crate::FieldSpec for ENGT_A { +impl crate::FieldSpec for Engt { type Ux = u8; } -impl ENGT_R { +#[doc = "Field `ENGT` reader - Enable Gate"] +pub type EngtR = crate::FieldReader; +impl EngtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENGT_A { + pub const fn variant(&self) -> Engt { match self.bits { - 0 => ENGT_A::VALUE1, - 1 => ENGT_A::VALUE2, - 2 => ENGT_A::VALUE3, - 3 => ENGT_A::VALUE4, + 0 => Engt::Value1, + 1 => Engt::Value2, + 2 => Engt::Value3, + 3 => Engt::Value4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENGT_A::VALUE1 + *self == Engt::Value1 } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENGT_A::VALUE2 + *self == Engt::Value2 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENGT_A::VALUE3 + *self == Engt::Value3 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENGT_A::VALUE4 + *self == Engt::Value4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type ENGT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ENGT_A>; -impl<'a, REG> ENGT_W<'a, REG> +pub type EngtW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Engt>; +impl<'a, REG> EngtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,497 +69,488 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE1) + self.variant(Engt::Value1) } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE2) + self.variant(Engt::Value2) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE3) + self.variant(Engt::Value3) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE4) + self.variant(Engt::Value4) } } -#[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type ENTR_R = crate::BitReader; #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENTR_A { +pub enum Entr { #[doc = "0: External trigger disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the load event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENTR_A) -> Self { + fn from(variant: Entr) -> Self { variant as u8 != 0 } } -impl ENTR_R { +#[doc = "Field `ENTR` reader - Enable External Trigger"] +pub type EntrR = crate::BitReader; +impl EntrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENTR_A { + pub const fn variant(&self) -> Entr { match self.bits { - false => ENTR_A::VALUE1, - true => ENTR_A::VALUE2, + false => Entr::Value1, + true => Entr::Value2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENTR_A::VALUE1 + *self == Entr::Value1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENTR_A::VALUE2 + *self == Entr::Value2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; -impl<'a, REG> ENTR_W<'a, REG> +pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; +impl<'a, REG> EntrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE1) + self.variant(Entr::Value1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE2) + self.variant(Entr::Value2) } } -#[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type ENSI_R = crate::BitReader; #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENSI_A { +pub enum Ensi { #[doc = "0: No request source interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A request source interrupt is generated upon a request source event (last pending conversion is finished)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENSI_A) -> Self { + fn from(variant: Ensi) -> Self { variant as u8 != 0 } } -impl ENSI_R { +#[doc = "Field `ENSI` reader - Enable Source Interrupt"] +pub type EnsiR = crate::BitReader; +impl EnsiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENSI_A { + pub const fn variant(&self) -> Ensi { match self.bits { - false => ENSI_A::VALUE1, - true => ENSI_A::VALUE2, + false => Ensi::Value1, + true => Ensi::Value2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENSI_A::VALUE1 + *self == Ensi::Value1 } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENSI_A::VALUE2 + *self == Ensi::Value2 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_A>; -impl<'a, REG> ENSI_W<'a, REG> +pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; +impl<'a, REG> EnsiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENSI_A::VALUE1) + self.variant(Ensi::Value1) } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENSI_A::VALUE2) + self.variant(Ensi::Value2) } } -#[doc = "Field `SCAN` reader - Autoscan Enable"] -pub type SCAN_R = crate::BitReader; #[doc = "Autoscan Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SCAN_A { +pub enum Scan { #[doc = "0: No autoscan"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Autoscan functionality enabled: a request source event automatically generates a load event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SCAN_A) -> Self { + fn from(variant: Scan) -> Self { variant as u8 != 0 } } -impl SCAN_R { +#[doc = "Field `SCAN` reader - Autoscan Enable"] +pub type ScanR = crate::BitReader; +impl ScanR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SCAN_A { + pub const fn variant(&self) -> Scan { match self.bits { - false => SCAN_A::VALUE1, - true => SCAN_A::VALUE2, + false => Scan::Value1, + true => Scan::Value2, } } #[doc = "No autoscan"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SCAN_A::VALUE1 + *self == Scan::Value1 } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SCAN_A::VALUE2 + *self == Scan::Value2 } } #[doc = "Field `SCAN` writer - Autoscan Enable"] -pub type SCAN_W<'a, REG> = crate::BitWriter<'a, REG, SCAN_A>; -impl<'a, REG> SCAN_W<'a, REG> +pub type ScanW<'a, REG> = crate::BitWriter<'a, REG, Scan>; +impl<'a, REG> ScanW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No autoscan"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SCAN_A::VALUE1) + self.variant(Scan::Value1) } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SCAN_A::VALUE2) + self.variant(Scan::Value2) } } -#[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] -pub type LDM_R = crate::BitReader; #[doc = "Autoscan Source Load Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LDM_A { +pub enum Ldm { #[doc = "0: Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LDM_A) -> Self { + fn from(variant: Ldm) -> Self { variant as u8 != 0 } } -impl LDM_R { +#[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] +pub type LdmR = crate::BitReader; +impl LdmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> LDM_A { + pub const fn variant(&self) -> Ldm { match self.bits { - false => LDM_A::VALUE1, - true => LDM_A::VALUE2, + false => Ldm::Value1, + true => Ldm::Value2, } } #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LDM_A::VALUE1 + *self == Ldm::Value1 } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LDM_A::VALUE2 + *self == Ldm::Value2 } } #[doc = "Field `LDM` writer - Autoscan Source Load Event Mode"] -pub type LDM_W<'a, REG> = crate::BitWriter<'a, REG, LDM_A>; -impl<'a, REG> LDM_W<'a, REG> +pub type LdmW<'a, REG> = crate::BitWriter<'a, REG, Ldm>; +impl<'a, REG> LdmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LDM_A::VALUE1) + self.variant(Ldm::Value1) } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LDM_A::VALUE2) + self.variant(Ldm::Value2) } } -#[doc = "Field `REQGT` reader - Request Gate Level"] -pub type REQGT_R = crate::BitReader; #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQGT_A { +pub enum Reqgt { #[doc = "0: The gate input is low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The gate input is high"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQGT_A) -> Self { + fn from(variant: Reqgt) -> Self { variant as u8 != 0 } } -impl REQGT_R { +#[doc = "Field `REQGT` reader - Request Gate Level"] +pub type ReqgtR = crate::BitReader; +impl ReqgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REQGT_A { + pub const fn variant(&self) -> Reqgt { match self.bits { - false => REQGT_A::VALUE1, - true => REQGT_A::VALUE2, + false => Reqgt::Value1, + true => Reqgt::Value2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REQGT_A::VALUE1 + *self == Reqgt::Value1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REQGT_A::VALUE2 + *self == Reqgt::Value2 } } #[doc = "Clear Pending Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRPND_AW { +pub enum Clrpnd { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The bits in register GxASPNDx are cleared"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRPND_AW) -> Self { + fn from(variant: Clrpnd) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRPND` writer - Clear Pending Bits"] -pub type CLRPND_W<'a, REG> = crate::BitWriter<'a, REG, CLRPND_AW>; -impl<'a, REG> CLRPND_W<'a, REG> +pub type ClrpndW<'a, REG> = crate::BitWriter<'a, REG, Clrpnd>; +impl<'a, REG> ClrpndW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLRPND_AW::VALUE1) + self.variant(Clrpnd::Value1) } #[doc = "The bits in register GxASPNDx are cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLRPND_AW::VALUE2) + self.variant(Clrpnd::Value2) } } #[doc = "Generate Load Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum LDEV_AW { +pub enum Ldev { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A load event is generated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: LDEV_AW) -> Self { + fn from(variant: Ldev) -> Self { variant as u8 != 0 } } #[doc = "Field `LDEV` writer - Generate Load Event"] -pub type LDEV_W<'a, REG> = crate::BitWriter<'a, REG, LDEV_AW>; -impl<'a, REG> LDEV_W<'a, REG> +pub type LdevW<'a, REG> = crate::BitWriter<'a, REG, Ldev>; +impl<'a, REG> LdevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LDEV_AW::VALUE1) + self.variant(Ldev::Value1) } #[doc = "A load event is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LDEV_AW::VALUE2) + self.variant(Ldev::Value2) } } -#[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RPTDIS_R = crate::BitReader; #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPTDIS_A { +pub enum Rptdis { #[doc = "0: A cancelled conversion is repeated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A cancelled conversion is discarded"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPTDIS_A) -> Self { + fn from(variant: Rptdis) -> Self { variant as u8 != 0 } } -impl RPTDIS_R { +#[doc = "Field `RPTDIS` reader - Repeat Disable"] +pub type RptdisR = crate::BitReader; +impl RptdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPTDIS_A { + pub const fn variant(&self) -> Rptdis { match self.bits { - false => RPTDIS_A::VALUE1, - true => RPTDIS_A::VALUE2, + false => Rptdis::Value1, + true => Rptdis::Value2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPTDIS_A::VALUE1 + *self == Rptdis::Value1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPTDIS_A::VALUE2 + *self == Rptdis::Value2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; -impl<'a, REG> RPTDIS_W<'a, REG> +pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; +impl<'a, REG> RptdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE1) + self.variant(Rptdis::Value1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE2) + self.variant(Rptdis::Value2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> ENGT_R { - ENGT_R::new((self.bits & 3) as u8) + pub fn engt(&self) -> EngtR { + EngtR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> ENTR_R { - ENTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> EntrR { + EntrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> ENSI_R { - ENSI_R::new(((self.bits >> 3) & 1) != 0) + pub fn ensi(&self) -> EnsiR { + EnsiR::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - pub fn scan(&self) -> SCAN_R { - SCAN_R::new(((self.bits >> 4) & 1) != 0) + pub fn scan(&self) -> ScanR { + ScanR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - pub fn ldm(&self) -> LDM_R { - LDM_R::new(((self.bits >> 5) & 1) != 0) + pub fn ldm(&self) -> LdmR { + LdmR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> REQGT_R { - REQGT_R::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> ReqgtR { + ReqgtR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RPTDIS_R { - RPTDIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RptdisR { + RptdisR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> ENGT_W { - ENGT_W::new(self, 0) + pub fn engt(&mut self) -> EngtW { + EngtW::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> ENTR_W { - ENTR_W::new(self, 2) + pub fn entr(&mut self) -> EntrW { + EntrW::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> ENSI_W { - ENSI_W::new(self, 3) + pub fn ensi(&mut self) -> EnsiW { + EnsiW::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] #[must_use] - pub fn scan(&mut self) -> SCAN_W { - SCAN_W::new(self, 4) + pub fn scan(&mut self) -> ScanW { + ScanW::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] #[must_use] - pub fn ldm(&mut self) -> LDM_W { - LDM_W::new(self, 5) + pub fn ldm(&mut self) -> LdmW { + LdmW::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] #[must_use] - pub fn clrpnd(&mut self) -> CLRPND_W { - CLRPND_W::new(self, 8) + pub fn clrpnd(&mut self) -> ClrpndW { + ClrpndW::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] #[must_use] - pub fn ldev(&mut self) -> LDEV_W { - LDEV_W::new(self, 9) + pub fn ldev(&mut self) -> LdevW { + LdevW::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RPTDIS_W { - RPTDIS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rptdis(&mut self) -> RptdisW { + RptdisW::new(self, 16) } } #[doc = "Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ASMR_SPEC; -impl crate::RegisterSpec for ASMR_SPEC { +pub struct AsmrSpec; +impl crate::RegisterSpec for AsmrSpec { type Ux = u32; } #[doc = "`read()` method returns [`asmr::R`](R) reader structure"] -impl crate::Readable for ASMR_SPEC {} +impl crate::Readable for AsmrSpec {} #[doc = "`write(|w| ..)` method takes [`asmr::W`](W) writer structure"] -impl crate::Writable for ASMR_SPEC { +impl crate::Writable for AsmrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASMR to value 0"] -impl crate::Resettable for ASMR_SPEC { +impl crate::Resettable for AsmrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/aspnd.rs b/src/vadc_g0/aspnd.rs index b35e26f8..c8b5127f 100644 --- a/src/vadc_g0/aspnd.rs +++ b/src/vadc_g0/aspnd.rs @@ -1,546 +1,537 @@ #[doc = "Register `ASPND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASPND` writer"] -pub type W = crate::W; -#[doc = "Field `CHPND0` reader - Channels Pending"] -pub type CHPND0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND0_A { +pub enum Chpnd0 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND0_A) -> Self { + fn from(variant: Chpnd0) -> Self { variant as u8 != 0 } } -impl CHPND0_R { +#[doc = "Field `CHPND0` reader - Channels Pending"] +pub type Chpnd0R = crate::BitReader; +impl Chpnd0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND0_A { + pub const fn variant(&self) -> Chpnd0 { match self.bits { - false => CHPND0_A::VALUE1, - true => CHPND0_A::VALUE2, + false => Chpnd0::Value1, + true => Chpnd0::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND0_A::VALUE1 + *self == Chpnd0::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND0_A::VALUE2 + *self == Chpnd0::Value2 } } #[doc = "Field `CHPND0` writer - Channels Pending"] -pub type CHPND0_W<'a, REG> = crate::BitWriter<'a, REG, CHPND0_A>; -impl<'a, REG> CHPND0_W<'a, REG> +pub type Chpnd0W<'a, REG> = crate::BitWriter<'a, REG, Chpnd0>; +impl<'a, REG> Chpnd0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND0_A::VALUE1) + self.variant(Chpnd0::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND0_A::VALUE2) + self.variant(Chpnd0::Value2) } } -#[doc = "Field `CHPND1` reader - Channels Pending"] -pub type CHPND1_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND1_A { +pub enum Chpnd1 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND1_A) -> Self { + fn from(variant: Chpnd1) -> Self { variant as u8 != 0 } } -impl CHPND1_R { +#[doc = "Field `CHPND1` reader - Channels Pending"] +pub type Chpnd1R = crate::BitReader; +impl Chpnd1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND1_A { + pub const fn variant(&self) -> Chpnd1 { match self.bits { - false => CHPND1_A::VALUE1, - true => CHPND1_A::VALUE2, + false => Chpnd1::Value1, + true => Chpnd1::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND1_A::VALUE1 + *self == Chpnd1::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND1_A::VALUE2 + *self == Chpnd1::Value2 } } #[doc = "Field `CHPND1` writer - Channels Pending"] -pub type CHPND1_W<'a, REG> = crate::BitWriter<'a, REG, CHPND1_A>; -impl<'a, REG> CHPND1_W<'a, REG> +pub type Chpnd1W<'a, REG> = crate::BitWriter<'a, REG, Chpnd1>; +impl<'a, REG> Chpnd1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND1_A::VALUE1) + self.variant(Chpnd1::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND1_A::VALUE2) + self.variant(Chpnd1::Value2) } } -#[doc = "Field `CHPND2` reader - Channels Pending"] -pub type CHPND2_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND2_A { +pub enum Chpnd2 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND2_A) -> Self { + fn from(variant: Chpnd2) -> Self { variant as u8 != 0 } } -impl CHPND2_R { +#[doc = "Field `CHPND2` reader - Channels Pending"] +pub type Chpnd2R = crate::BitReader; +impl Chpnd2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND2_A { + pub const fn variant(&self) -> Chpnd2 { match self.bits { - false => CHPND2_A::VALUE1, - true => CHPND2_A::VALUE2, + false => Chpnd2::Value1, + true => Chpnd2::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND2_A::VALUE1 + *self == Chpnd2::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND2_A::VALUE2 + *self == Chpnd2::Value2 } } #[doc = "Field `CHPND2` writer - Channels Pending"] -pub type CHPND2_W<'a, REG> = crate::BitWriter<'a, REG, CHPND2_A>; -impl<'a, REG> CHPND2_W<'a, REG> +pub type Chpnd2W<'a, REG> = crate::BitWriter<'a, REG, Chpnd2>; +impl<'a, REG> Chpnd2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND2_A::VALUE1) + self.variant(Chpnd2::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND2_A::VALUE2) + self.variant(Chpnd2::Value2) } } -#[doc = "Field `CHPND3` reader - Channels Pending"] -pub type CHPND3_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND3_A { +pub enum Chpnd3 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND3_A) -> Self { + fn from(variant: Chpnd3) -> Self { variant as u8 != 0 } } -impl CHPND3_R { +#[doc = "Field `CHPND3` reader - Channels Pending"] +pub type Chpnd3R = crate::BitReader; +impl Chpnd3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND3_A { + pub const fn variant(&self) -> Chpnd3 { match self.bits { - false => CHPND3_A::VALUE1, - true => CHPND3_A::VALUE2, + false => Chpnd3::Value1, + true => Chpnd3::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND3_A::VALUE1 + *self == Chpnd3::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND3_A::VALUE2 + *self == Chpnd3::Value2 } } #[doc = "Field `CHPND3` writer - Channels Pending"] -pub type CHPND3_W<'a, REG> = crate::BitWriter<'a, REG, CHPND3_A>; -impl<'a, REG> CHPND3_W<'a, REG> +pub type Chpnd3W<'a, REG> = crate::BitWriter<'a, REG, Chpnd3>; +impl<'a, REG> Chpnd3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND3_A::VALUE1) + self.variant(Chpnd3::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND3_A::VALUE2) + self.variant(Chpnd3::Value2) } } -#[doc = "Field `CHPND4` reader - Channels Pending"] -pub type CHPND4_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND4_A { +pub enum Chpnd4 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND4_A) -> Self { + fn from(variant: Chpnd4) -> Self { variant as u8 != 0 } } -impl CHPND4_R { +#[doc = "Field `CHPND4` reader - Channels Pending"] +pub type Chpnd4R = crate::BitReader; +impl Chpnd4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND4_A { + pub const fn variant(&self) -> Chpnd4 { match self.bits { - false => CHPND4_A::VALUE1, - true => CHPND4_A::VALUE2, + false => Chpnd4::Value1, + true => Chpnd4::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND4_A::VALUE1 + *self == Chpnd4::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND4_A::VALUE2 + *self == Chpnd4::Value2 } } #[doc = "Field `CHPND4` writer - Channels Pending"] -pub type CHPND4_W<'a, REG> = crate::BitWriter<'a, REG, CHPND4_A>; -impl<'a, REG> CHPND4_W<'a, REG> +pub type Chpnd4W<'a, REG> = crate::BitWriter<'a, REG, Chpnd4>; +impl<'a, REG> Chpnd4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND4_A::VALUE1) + self.variant(Chpnd4::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND4_A::VALUE2) + self.variant(Chpnd4::Value2) } } -#[doc = "Field `CHPND5` reader - Channels Pending"] -pub type CHPND5_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND5_A { +pub enum Chpnd5 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND5_A) -> Self { + fn from(variant: Chpnd5) -> Self { variant as u8 != 0 } } -impl CHPND5_R { +#[doc = "Field `CHPND5` reader - Channels Pending"] +pub type Chpnd5R = crate::BitReader; +impl Chpnd5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND5_A { + pub const fn variant(&self) -> Chpnd5 { match self.bits { - false => CHPND5_A::VALUE1, - true => CHPND5_A::VALUE2, + false => Chpnd5::Value1, + true => Chpnd5::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND5_A::VALUE1 + *self == Chpnd5::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND5_A::VALUE2 + *self == Chpnd5::Value2 } } #[doc = "Field `CHPND5` writer - Channels Pending"] -pub type CHPND5_W<'a, REG> = crate::BitWriter<'a, REG, CHPND5_A>; -impl<'a, REG> CHPND5_W<'a, REG> +pub type Chpnd5W<'a, REG> = crate::BitWriter<'a, REG, Chpnd5>; +impl<'a, REG> Chpnd5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND5_A::VALUE1) + self.variant(Chpnd5::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND5_A::VALUE2) + self.variant(Chpnd5::Value2) } } -#[doc = "Field `CHPND6` reader - Channels Pending"] -pub type CHPND6_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND6_A { +pub enum Chpnd6 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND6_A) -> Self { + fn from(variant: Chpnd6) -> Self { variant as u8 != 0 } } -impl CHPND6_R { +#[doc = "Field `CHPND6` reader - Channels Pending"] +pub type Chpnd6R = crate::BitReader; +impl Chpnd6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND6_A { + pub const fn variant(&self) -> Chpnd6 { match self.bits { - false => CHPND6_A::VALUE1, - true => CHPND6_A::VALUE2, + false => Chpnd6::Value1, + true => Chpnd6::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND6_A::VALUE1 + *self == Chpnd6::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND6_A::VALUE2 + *self == Chpnd6::Value2 } } #[doc = "Field `CHPND6` writer - Channels Pending"] -pub type CHPND6_W<'a, REG> = crate::BitWriter<'a, REG, CHPND6_A>; -impl<'a, REG> CHPND6_W<'a, REG> +pub type Chpnd6W<'a, REG> = crate::BitWriter<'a, REG, Chpnd6>; +impl<'a, REG> Chpnd6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND6_A::VALUE1) + self.variant(Chpnd6::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND6_A::VALUE2) + self.variant(Chpnd6::Value2) } } -#[doc = "Field `CHPND7` reader - Channels Pending"] -pub type CHPND7_R = crate::BitReader; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHPND7_A { +pub enum Chpnd7 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request conversion of this channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHPND7_A) -> Self { + fn from(variant: Chpnd7) -> Self { variant as u8 != 0 } } -impl CHPND7_R { +#[doc = "Field `CHPND7` reader - Channels Pending"] +pub type Chpnd7R = crate::BitReader; +impl Chpnd7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHPND7_A { + pub const fn variant(&self) -> Chpnd7 { match self.bits { - false => CHPND7_A::VALUE1, - true => CHPND7_A::VALUE2, + false => Chpnd7::Value1, + true => Chpnd7::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHPND7_A::VALUE1 + *self == Chpnd7::Value1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHPND7_A::VALUE2 + *self == Chpnd7::Value2 } } #[doc = "Field `CHPND7` writer - Channels Pending"] -pub type CHPND7_W<'a, REG> = crate::BitWriter<'a, REG, CHPND7_A>; -impl<'a, REG> CHPND7_W<'a, REG> +pub type Chpnd7W<'a, REG> = crate::BitWriter<'a, REG, Chpnd7>; +impl<'a, REG> Chpnd7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHPND7_A::VALUE1) + self.variant(Chpnd7::Value1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHPND7_A::VALUE2) + self.variant(Chpnd7::Value2) } } impl R { #[doc = "Bit 0 - Channels Pending"] #[inline(always)] - pub fn chpnd0(&self) -> CHPND0_R { - CHPND0_R::new((self.bits & 1) != 0) + pub fn chpnd0(&self) -> Chpnd0R { + Chpnd0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channels Pending"] #[inline(always)] - pub fn chpnd1(&self) -> CHPND1_R { - CHPND1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chpnd1(&self) -> Chpnd1R { + Chpnd1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channels Pending"] #[inline(always)] - pub fn chpnd2(&self) -> CHPND2_R { - CHPND2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chpnd2(&self) -> Chpnd2R { + Chpnd2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channels Pending"] #[inline(always)] - pub fn chpnd3(&self) -> CHPND3_R { - CHPND3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chpnd3(&self) -> Chpnd3R { + Chpnd3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channels Pending"] #[inline(always)] - pub fn chpnd4(&self) -> CHPND4_R { - CHPND4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chpnd4(&self) -> Chpnd4R { + Chpnd4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channels Pending"] #[inline(always)] - pub fn chpnd5(&self) -> CHPND5_R { - CHPND5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chpnd5(&self) -> Chpnd5R { + Chpnd5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channels Pending"] #[inline(always)] - pub fn chpnd6(&self) -> CHPND6_R { - CHPND6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chpnd6(&self) -> Chpnd6R { + Chpnd6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channels Pending"] #[inline(always)] - pub fn chpnd7(&self) -> CHPND7_R { - CHPND7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chpnd7(&self) -> Chpnd7R { + Chpnd7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd0(&mut self) -> CHPND0_W { - CHPND0_W::new(self, 0) + pub fn chpnd0(&mut self) -> Chpnd0W { + Chpnd0W::new(self, 0) } #[doc = "Bit 1 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd1(&mut self) -> CHPND1_W { - CHPND1_W::new(self, 1) + pub fn chpnd1(&mut self) -> Chpnd1W { + Chpnd1W::new(self, 1) } #[doc = "Bit 2 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd2(&mut self) -> CHPND2_W { - CHPND2_W::new(self, 2) + pub fn chpnd2(&mut self) -> Chpnd2W { + Chpnd2W::new(self, 2) } #[doc = "Bit 3 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd3(&mut self) -> CHPND3_W { - CHPND3_W::new(self, 3) + pub fn chpnd3(&mut self) -> Chpnd3W { + Chpnd3W::new(self, 3) } #[doc = "Bit 4 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd4(&mut self) -> CHPND4_W { - CHPND4_W::new(self, 4) + pub fn chpnd4(&mut self) -> Chpnd4W { + Chpnd4W::new(self, 4) } #[doc = "Bit 5 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd5(&mut self) -> CHPND5_W { - CHPND5_W::new(self, 5) + pub fn chpnd5(&mut self) -> Chpnd5W { + Chpnd5W::new(self, 5) } #[doc = "Bit 6 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd6(&mut self) -> CHPND6_W { - CHPND6_W::new(self, 6) + pub fn chpnd6(&mut self) -> Chpnd6W { + Chpnd6W::new(self, 6) } #[doc = "Bit 7 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd7(&mut self) -> CHPND7_W { - CHPND7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn chpnd7(&mut self) -> Chpnd7W { + Chpnd7W::new(self, 7) } } #[doc = "Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ASPND_SPEC; -impl crate::RegisterSpec for ASPND_SPEC { +pub struct AspndSpec; +impl crate::RegisterSpec for AspndSpec { type Ux = u32; } #[doc = "`read()` method returns [`aspnd::R`](R) reader structure"] -impl crate::Readable for ASPND_SPEC {} +impl crate::Readable for AspndSpec {} #[doc = "`write(|w| ..)` method takes [`aspnd::W`](W) writer structure"] -impl crate::Writable for ASPND_SPEC { +impl crate::Writable for AspndSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASPND to value 0"] -impl crate::Resettable for ASPND_SPEC { +impl crate::Resettable for AspndSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/assel.rs b/src/vadc_g0/assel.rs index a2c534df..94757351 100644 --- a/src/vadc_g0/assel.rs +++ b/src/vadc_g0/assel.rs @@ -1,546 +1,537 @@ #[doc = "Register `ASSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASSEL` writer"] -pub type W = crate::W; -#[doc = "Field `CHSEL0` reader - Channel Selection"] -pub type CHSEL0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL0_A { +pub enum Chsel0 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL0_A) -> Self { + fn from(variant: Chsel0) -> Self { variant as u8 != 0 } } -impl CHSEL0_R { +#[doc = "Field `CHSEL0` reader - Channel Selection"] +pub type Chsel0R = crate::BitReader; +impl Chsel0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL0_A { + pub const fn variant(&self) -> Chsel0 { match self.bits { - false => CHSEL0_A::VALUE1, - true => CHSEL0_A::VALUE2, + false => Chsel0::Value1, + true => Chsel0::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL0_A::VALUE1 + *self == Chsel0::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL0_A::VALUE2 + *self == Chsel0::Value2 } } #[doc = "Field `CHSEL0` writer - Channel Selection"] -pub type CHSEL0_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL0_A>; -impl<'a, REG> CHSEL0_W<'a, REG> +pub type Chsel0W<'a, REG> = crate::BitWriter<'a, REG, Chsel0>; +impl<'a, REG> Chsel0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL0_A::VALUE1) + self.variant(Chsel0::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL0_A::VALUE2) + self.variant(Chsel0::Value2) } } -#[doc = "Field `CHSEL1` reader - Channel Selection"] -pub type CHSEL1_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL1_A { +pub enum Chsel1 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL1_A) -> Self { + fn from(variant: Chsel1) -> Self { variant as u8 != 0 } } -impl CHSEL1_R { +#[doc = "Field `CHSEL1` reader - Channel Selection"] +pub type Chsel1R = crate::BitReader; +impl Chsel1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL1_A { + pub const fn variant(&self) -> Chsel1 { match self.bits { - false => CHSEL1_A::VALUE1, - true => CHSEL1_A::VALUE2, + false => Chsel1::Value1, + true => Chsel1::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL1_A::VALUE1 + *self == Chsel1::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL1_A::VALUE2 + *self == Chsel1::Value2 } } #[doc = "Field `CHSEL1` writer - Channel Selection"] -pub type CHSEL1_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL1_A>; -impl<'a, REG> CHSEL1_W<'a, REG> +pub type Chsel1W<'a, REG> = crate::BitWriter<'a, REG, Chsel1>; +impl<'a, REG> Chsel1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL1_A::VALUE1) + self.variant(Chsel1::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL1_A::VALUE2) + self.variant(Chsel1::Value2) } } -#[doc = "Field `CHSEL2` reader - Channel Selection"] -pub type CHSEL2_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL2_A { +pub enum Chsel2 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL2_A) -> Self { + fn from(variant: Chsel2) -> Self { variant as u8 != 0 } } -impl CHSEL2_R { +#[doc = "Field `CHSEL2` reader - Channel Selection"] +pub type Chsel2R = crate::BitReader; +impl Chsel2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL2_A { + pub const fn variant(&self) -> Chsel2 { match self.bits { - false => CHSEL2_A::VALUE1, - true => CHSEL2_A::VALUE2, + false => Chsel2::Value1, + true => Chsel2::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL2_A::VALUE1 + *self == Chsel2::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL2_A::VALUE2 + *self == Chsel2::Value2 } } #[doc = "Field `CHSEL2` writer - Channel Selection"] -pub type CHSEL2_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL2_A>; -impl<'a, REG> CHSEL2_W<'a, REG> +pub type Chsel2W<'a, REG> = crate::BitWriter<'a, REG, Chsel2>; +impl<'a, REG> Chsel2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL2_A::VALUE1) + self.variant(Chsel2::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL2_A::VALUE2) + self.variant(Chsel2::Value2) } } -#[doc = "Field `CHSEL3` reader - Channel Selection"] -pub type CHSEL3_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL3_A { +pub enum Chsel3 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL3_A) -> Self { + fn from(variant: Chsel3) -> Self { variant as u8 != 0 } } -impl CHSEL3_R { +#[doc = "Field `CHSEL3` reader - Channel Selection"] +pub type Chsel3R = crate::BitReader; +impl Chsel3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL3_A { + pub const fn variant(&self) -> Chsel3 { match self.bits { - false => CHSEL3_A::VALUE1, - true => CHSEL3_A::VALUE2, + false => Chsel3::Value1, + true => Chsel3::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL3_A::VALUE1 + *self == Chsel3::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL3_A::VALUE2 + *self == Chsel3::Value2 } } #[doc = "Field `CHSEL3` writer - Channel Selection"] -pub type CHSEL3_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL3_A>; -impl<'a, REG> CHSEL3_W<'a, REG> +pub type Chsel3W<'a, REG> = crate::BitWriter<'a, REG, Chsel3>; +impl<'a, REG> Chsel3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL3_A::VALUE1) + self.variant(Chsel3::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL3_A::VALUE2) + self.variant(Chsel3::Value2) } } -#[doc = "Field `CHSEL4` reader - Channel Selection"] -pub type CHSEL4_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL4_A { +pub enum Chsel4 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL4_A) -> Self { + fn from(variant: Chsel4) -> Self { variant as u8 != 0 } } -impl CHSEL4_R { +#[doc = "Field `CHSEL4` reader - Channel Selection"] +pub type Chsel4R = crate::BitReader; +impl Chsel4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL4_A { + pub const fn variant(&self) -> Chsel4 { match self.bits { - false => CHSEL4_A::VALUE1, - true => CHSEL4_A::VALUE2, + false => Chsel4::Value1, + true => Chsel4::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL4_A::VALUE1 + *self == Chsel4::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL4_A::VALUE2 + *self == Chsel4::Value2 } } #[doc = "Field `CHSEL4` writer - Channel Selection"] -pub type CHSEL4_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL4_A>; -impl<'a, REG> CHSEL4_W<'a, REG> +pub type Chsel4W<'a, REG> = crate::BitWriter<'a, REG, Chsel4>; +impl<'a, REG> Chsel4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL4_A::VALUE1) + self.variant(Chsel4::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL4_A::VALUE2) + self.variant(Chsel4::Value2) } } -#[doc = "Field `CHSEL5` reader - Channel Selection"] -pub type CHSEL5_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL5_A { +pub enum Chsel5 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL5_A) -> Self { + fn from(variant: Chsel5) -> Self { variant as u8 != 0 } } -impl CHSEL5_R { +#[doc = "Field `CHSEL5` reader - Channel Selection"] +pub type Chsel5R = crate::BitReader; +impl Chsel5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL5_A { + pub const fn variant(&self) -> Chsel5 { match self.bits { - false => CHSEL5_A::VALUE1, - true => CHSEL5_A::VALUE2, + false => Chsel5::Value1, + true => Chsel5::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL5_A::VALUE1 + *self == Chsel5::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL5_A::VALUE2 + *self == Chsel5::Value2 } } #[doc = "Field `CHSEL5` writer - Channel Selection"] -pub type CHSEL5_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL5_A>; -impl<'a, REG> CHSEL5_W<'a, REG> +pub type Chsel5W<'a, REG> = crate::BitWriter<'a, REG, Chsel5>; +impl<'a, REG> Chsel5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL5_A::VALUE1) + self.variant(Chsel5::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL5_A::VALUE2) + self.variant(Chsel5::Value2) } } -#[doc = "Field `CHSEL6` reader - Channel Selection"] -pub type CHSEL6_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL6_A { +pub enum Chsel6 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL6_A) -> Self { + fn from(variant: Chsel6) -> Self { variant as u8 != 0 } } -impl CHSEL6_R { +#[doc = "Field `CHSEL6` reader - Channel Selection"] +pub type Chsel6R = crate::BitReader; +impl Chsel6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL6_A { + pub const fn variant(&self) -> Chsel6 { match self.bits { - false => CHSEL6_A::VALUE1, - true => CHSEL6_A::VALUE2, + false => Chsel6::Value1, + true => Chsel6::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL6_A::VALUE1 + *self == Chsel6::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL6_A::VALUE2 + *self == Chsel6::Value2 } } #[doc = "Field `CHSEL6` writer - Channel Selection"] -pub type CHSEL6_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL6_A>; -impl<'a, REG> CHSEL6_W<'a, REG> +pub type Chsel6W<'a, REG> = crate::BitWriter<'a, REG, Chsel6>; +impl<'a, REG> Chsel6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL6_A::VALUE1) + self.variant(Chsel6::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL6_A::VALUE2) + self.variant(Chsel6::Value2) } } -#[doc = "Field `CHSEL7` reader - Channel Selection"] -pub type CHSEL7_R = crate::BitReader; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CHSEL7_A { +pub enum Chsel7 { #[doc = "0: Ignore this channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: This channel is part of the scan sequence"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CHSEL7_A) -> Self { + fn from(variant: Chsel7) -> Self { variant as u8 != 0 } } -impl CHSEL7_R { +#[doc = "Field `CHSEL7` reader - Channel Selection"] +pub type Chsel7R = crate::BitReader; +impl Chsel7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHSEL7_A { + pub const fn variant(&self) -> Chsel7 { match self.bits { - false => CHSEL7_A::VALUE1, - true => CHSEL7_A::VALUE2, + false => Chsel7::Value1, + true => Chsel7::Value2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHSEL7_A::VALUE1 + *self == Chsel7::Value1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHSEL7_A::VALUE2 + *self == Chsel7::Value2 } } #[doc = "Field `CHSEL7` writer - Channel Selection"] -pub type CHSEL7_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL7_A>; -impl<'a, REG> CHSEL7_W<'a, REG> +pub type Chsel7W<'a, REG> = crate::BitWriter<'a, REG, Chsel7>; +impl<'a, REG> Chsel7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHSEL7_A::VALUE1) + self.variant(Chsel7::Value1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHSEL7_A::VALUE2) + self.variant(Chsel7::Value2) } } impl R { #[doc = "Bit 0 - Channel Selection"] #[inline(always)] - pub fn chsel0(&self) -> CHSEL0_R { - CHSEL0_R::new((self.bits & 1) != 0) + pub fn chsel0(&self) -> Chsel0R { + Chsel0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Selection"] #[inline(always)] - pub fn chsel1(&self) -> CHSEL1_R { - CHSEL1_R::new(((self.bits >> 1) & 1) != 0) + pub fn chsel1(&self) -> Chsel1R { + Chsel1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Selection"] #[inline(always)] - pub fn chsel2(&self) -> CHSEL2_R { - CHSEL2_R::new(((self.bits >> 2) & 1) != 0) + pub fn chsel2(&self) -> Chsel2R { + Chsel2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Selection"] #[inline(always)] - pub fn chsel3(&self) -> CHSEL3_R { - CHSEL3_R::new(((self.bits >> 3) & 1) != 0) + pub fn chsel3(&self) -> Chsel3R { + Chsel3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Selection"] #[inline(always)] - pub fn chsel4(&self) -> CHSEL4_R { - CHSEL4_R::new(((self.bits >> 4) & 1) != 0) + pub fn chsel4(&self) -> Chsel4R { + Chsel4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Selection"] #[inline(always)] - pub fn chsel5(&self) -> CHSEL5_R { - CHSEL5_R::new(((self.bits >> 5) & 1) != 0) + pub fn chsel5(&self) -> Chsel5R { + Chsel5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Selection"] #[inline(always)] - pub fn chsel6(&self) -> CHSEL6_R { - CHSEL6_R::new(((self.bits >> 6) & 1) != 0) + pub fn chsel6(&self) -> Chsel6R { + Chsel6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Selection"] #[inline(always)] - pub fn chsel7(&self) -> CHSEL7_R { - CHSEL7_R::new(((self.bits >> 7) & 1) != 0) + pub fn chsel7(&self) -> Chsel7R { + Chsel7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel0(&mut self) -> CHSEL0_W { - CHSEL0_W::new(self, 0) + pub fn chsel0(&mut self) -> Chsel0W { + Chsel0W::new(self, 0) } #[doc = "Bit 1 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel1(&mut self) -> CHSEL1_W { - CHSEL1_W::new(self, 1) + pub fn chsel1(&mut self) -> Chsel1W { + Chsel1W::new(self, 1) } #[doc = "Bit 2 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel2(&mut self) -> CHSEL2_W { - CHSEL2_W::new(self, 2) + pub fn chsel2(&mut self) -> Chsel2W { + Chsel2W::new(self, 2) } #[doc = "Bit 3 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel3(&mut self) -> CHSEL3_W { - CHSEL3_W::new(self, 3) + pub fn chsel3(&mut self) -> Chsel3W { + Chsel3W::new(self, 3) } #[doc = "Bit 4 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel4(&mut self) -> CHSEL4_W { - CHSEL4_W::new(self, 4) + pub fn chsel4(&mut self) -> Chsel4W { + Chsel4W::new(self, 4) } #[doc = "Bit 5 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel5(&mut self) -> CHSEL5_W { - CHSEL5_W::new(self, 5) + pub fn chsel5(&mut self) -> Chsel5W { + Chsel5W::new(self, 5) } #[doc = "Bit 6 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel6(&mut self) -> CHSEL6_W { - CHSEL6_W::new(self, 6) + pub fn chsel6(&mut self) -> Chsel6W { + Chsel6W::new(self, 6) } #[doc = "Bit 7 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel7(&mut self) -> CHSEL7_W { - CHSEL7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn chsel7(&mut self) -> Chsel7W { + Chsel7W::new(self, 7) } } #[doc = "Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ASSEL_SPEC; -impl crate::RegisterSpec for ASSEL_SPEC { +pub struct AsselSpec; +impl crate::RegisterSpec for AsselSpec { type Ux = u32; } #[doc = "`read()` method returns [`assel::R`](R) reader structure"] -impl crate::Readable for ASSEL_SPEC {} +impl crate::Readable for AsselSpec {} #[doc = "`write(|w| ..)` method takes [`assel::W`](W) writer structure"] -impl crate::Writable for ASSEL_SPEC { +impl crate::Writable for AsselSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASSEL to value 0"] -impl crate::Resettable for ASSEL_SPEC { +impl crate::Resettable for AsselSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bfl.rs b/src/vadc_g0/bfl.rs index 6b745343..3c5f7607 100644 --- a/src/vadc_g0/bfl.rs +++ b/src/vadc_g0/bfl.rs @@ -1,710 +1,701 @@ #[doc = "Register `BFL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFL` writer"] -pub type W = crate::W; -#[doc = "Field `BFL0` reader - Boundary Flag 0"] -pub type BFL0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Boundary Flag 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFL0_A { +pub enum Bfl0 { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFL0_A) -> Self { + fn from(variant: Bfl0) -> Self { variant as u8 != 0 } } -impl BFL0_R { +#[doc = "Field `BFL0` reader - Boundary Flag 0"] +pub type Bfl0R = crate::BitReader; +impl Bfl0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFL0_A { + pub const fn variant(&self) -> Bfl0 { match self.bits { - false => BFL0_A::VALUE1, - true => BFL0_A::VALUE2, + false => Bfl0::Value1, + true => Bfl0::Value2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL0_A::VALUE1 + *self == Bfl0::Value1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL0_A::VALUE2 + *self == Bfl0::Value2 } } -#[doc = "Field `BFL1` reader - Boundary Flag 1"] -pub type BFL1_R = crate::BitReader; #[doc = "Boundary Flag 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFL1_A { +pub enum Bfl1 { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFL1_A) -> Self { + fn from(variant: Bfl1) -> Self { variant as u8 != 0 } } -impl BFL1_R { +#[doc = "Field `BFL1` reader - Boundary Flag 1"] +pub type Bfl1R = crate::BitReader; +impl Bfl1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFL1_A { + pub const fn variant(&self) -> Bfl1 { match self.bits { - false => BFL1_A::VALUE1, - true => BFL1_A::VALUE2, + false => Bfl1::Value1, + true => Bfl1::Value2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL1_A::VALUE1 + *self == Bfl1::Value1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL1_A::VALUE2 + *self == Bfl1::Value2 } } -#[doc = "Field `BFL2` reader - Boundary Flag 2"] -pub type BFL2_R = crate::BitReader; #[doc = "Boundary Flag 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFL2_A { +pub enum Bfl2 { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFL2_A) -> Self { + fn from(variant: Bfl2) -> Self { variant as u8 != 0 } } -impl BFL2_R { +#[doc = "Field `BFL2` reader - Boundary Flag 2"] +pub type Bfl2R = crate::BitReader; +impl Bfl2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFL2_A { + pub const fn variant(&self) -> Bfl2 { match self.bits { - false => BFL2_A::VALUE1, - true => BFL2_A::VALUE2, + false => Bfl2::Value1, + true => Bfl2::Value2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL2_A::VALUE1 + *self == Bfl2::Value1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL2_A::VALUE2 + *self == Bfl2::Value2 } } -#[doc = "Field `BFL3` reader - Boundary Flag 3"] -pub type BFL3_R = crate::BitReader; #[doc = "Boundary Flag 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFL3_A { +pub enum Bfl3 { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFL3_A) -> Self { + fn from(variant: Bfl3) -> Self { variant as u8 != 0 } } -impl BFL3_R { +#[doc = "Field `BFL3` reader - Boundary Flag 3"] +pub type Bfl3R = crate::BitReader; +impl Bfl3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFL3_A { + pub const fn variant(&self) -> Bfl3 { match self.bits { - false => BFL3_A::VALUE1, - true => BFL3_A::VALUE2, + false => Bfl3::Value1, + true => Bfl3::Value2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL3_A::VALUE1 + *self == Bfl3::Value1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL3_A::VALUE2 + *self == Bfl3::Value2 } } -#[doc = "Field `BFA0` reader - Boundary Flag 0 Activation Select"] -pub type BFA0_R = crate::BitReader; #[doc = "Boundary Flag 0 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFA0_A { +pub enum Bfa0 { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFA0_A) -> Self { + fn from(variant: Bfa0) -> Self { variant as u8 != 0 } } -impl BFA0_R { +#[doc = "Field `BFA0` reader - Boundary Flag 0 Activation Select"] +pub type Bfa0R = crate::BitReader; +impl Bfa0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFA0_A { + pub const fn variant(&self) -> Bfa0 { match self.bits { - false => BFA0_A::VALUE1, - true => BFA0_A::VALUE2, + false => Bfa0::Value1, + true => Bfa0::Value2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFA0_A::VALUE1 + *self == Bfa0::Value1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFA0_A::VALUE2 + *self == Bfa0::Value2 } } #[doc = "Field `BFA0` writer - Boundary Flag 0 Activation Select"] -pub type BFA0_W<'a, REG> = crate::BitWriter<'a, REG, BFA0_A>; -impl<'a, REG> BFA0_W<'a, REG> +pub type Bfa0W<'a, REG> = crate::BitWriter<'a, REG, Bfa0>; +impl<'a, REG> Bfa0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFA0_A::VALUE1) + self.variant(Bfa0::Value1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFA0_A::VALUE2) + self.variant(Bfa0::Value2) } } -#[doc = "Field `BFA1` reader - Boundary Flag 1 Activation Select"] -pub type BFA1_R = crate::BitReader; #[doc = "Boundary Flag 1 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFA1_A { +pub enum Bfa1 { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFA1_A) -> Self { + fn from(variant: Bfa1) -> Self { variant as u8 != 0 } } -impl BFA1_R { +#[doc = "Field `BFA1` reader - Boundary Flag 1 Activation Select"] +pub type Bfa1R = crate::BitReader; +impl Bfa1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFA1_A { + pub const fn variant(&self) -> Bfa1 { match self.bits { - false => BFA1_A::VALUE1, - true => BFA1_A::VALUE2, + false => Bfa1::Value1, + true => Bfa1::Value2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFA1_A::VALUE1 + *self == Bfa1::Value1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFA1_A::VALUE2 + *self == Bfa1::Value2 } } #[doc = "Field `BFA1` writer - Boundary Flag 1 Activation Select"] -pub type BFA1_W<'a, REG> = crate::BitWriter<'a, REG, BFA1_A>; -impl<'a, REG> BFA1_W<'a, REG> +pub type Bfa1W<'a, REG> = crate::BitWriter<'a, REG, Bfa1>; +impl<'a, REG> Bfa1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFA1_A::VALUE1) + self.variant(Bfa1::Value1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFA1_A::VALUE2) + self.variant(Bfa1::Value2) } } -#[doc = "Field `BFA2` reader - Boundary Flag 2 Activation Select"] -pub type BFA2_R = crate::BitReader; #[doc = "Boundary Flag 2 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFA2_A { +pub enum Bfa2 { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFA2_A) -> Self { + fn from(variant: Bfa2) -> Self { variant as u8 != 0 } } -impl BFA2_R { +#[doc = "Field `BFA2` reader - Boundary Flag 2 Activation Select"] +pub type Bfa2R = crate::BitReader; +impl Bfa2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFA2_A { + pub const fn variant(&self) -> Bfa2 { match self.bits { - false => BFA2_A::VALUE1, - true => BFA2_A::VALUE2, + false => Bfa2::Value1, + true => Bfa2::Value2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFA2_A::VALUE1 + *self == Bfa2::Value1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFA2_A::VALUE2 + *self == Bfa2::Value2 } } #[doc = "Field `BFA2` writer - Boundary Flag 2 Activation Select"] -pub type BFA2_W<'a, REG> = crate::BitWriter<'a, REG, BFA2_A>; -impl<'a, REG> BFA2_W<'a, REG> +pub type Bfa2W<'a, REG> = crate::BitWriter<'a, REG, Bfa2>; +impl<'a, REG> Bfa2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFA2_A::VALUE1) + self.variant(Bfa2::Value1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFA2_A::VALUE2) + self.variant(Bfa2::Value2) } } -#[doc = "Field `BFA3` reader - Boundary Flag 3 Activation Select"] -pub type BFA3_R = crate::BitReader; #[doc = "Boundary Flag 3 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFA3_A { +pub enum Bfa3 { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFA3_A) -> Self { + fn from(variant: Bfa3) -> Self { variant as u8 != 0 } } -impl BFA3_R { +#[doc = "Field `BFA3` reader - Boundary Flag 3 Activation Select"] +pub type Bfa3R = crate::BitReader; +impl Bfa3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFA3_A { + pub const fn variant(&self) -> Bfa3 { match self.bits { - false => BFA3_A::VALUE1, - true => BFA3_A::VALUE2, + false => Bfa3::Value1, + true => Bfa3::Value2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFA3_A::VALUE1 + *self == Bfa3::Value1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFA3_A::VALUE2 + *self == Bfa3::Value2 } } #[doc = "Field `BFA3` writer - Boundary Flag 3 Activation Select"] -pub type BFA3_W<'a, REG> = crate::BitWriter<'a, REG, BFA3_A>; -impl<'a, REG> BFA3_W<'a, REG> +pub type Bfa3W<'a, REG> = crate::BitWriter<'a, REG, Bfa3>; +impl<'a, REG> Bfa3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFA3_A::VALUE1) + self.variant(Bfa3::Value1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFA3_A::VALUE2) + self.variant(Bfa3::Value2) } } -#[doc = "Field `BFI0` reader - Boundary Flag 0 Inversion Control"] -pub type BFI0_R = crate::BitReader; #[doc = "Boundary Flag 0 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFI0_A { +pub enum Bfi0 { #[doc = "0: Use BFLy directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Invert value and use BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFI0_A) -> Self { + fn from(variant: Bfi0) -> Self { variant as u8 != 0 } } -impl BFI0_R { +#[doc = "Field `BFI0` reader - Boundary Flag 0 Inversion Control"] +pub type Bfi0R = crate::BitReader; +impl Bfi0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFI0_A { + pub const fn variant(&self) -> Bfi0 { match self.bits { - false => BFI0_A::VALUE1, - true => BFI0_A::VALUE2, + false => Bfi0::Value1, + true => Bfi0::Value2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFI0_A::VALUE1 + *self == Bfi0::Value1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFI0_A::VALUE2 + *self == Bfi0::Value2 } } #[doc = "Field `BFI0` writer - Boundary Flag 0 Inversion Control"] -pub type BFI0_W<'a, REG> = crate::BitWriter<'a, REG, BFI0_A>; -impl<'a, REG> BFI0_W<'a, REG> +pub type Bfi0W<'a, REG> = crate::BitWriter<'a, REG, Bfi0>; +impl<'a, REG> Bfi0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFI0_A::VALUE1) + self.variant(Bfi0::Value1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFI0_A::VALUE2) + self.variant(Bfi0::Value2) } } -#[doc = "Field `BFI1` reader - Boundary Flag 1 Inversion Control"] -pub type BFI1_R = crate::BitReader; #[doc = "Boundary Flag 1 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFI1_A { +pub enum Bfi1 { #[doc = "0: Use BFLy directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Invert value and use BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFI1_A) -> Self { + fn from(variant: Bfi1) -> Self { variant as u8 != 0 } } -impl BFI1_R { +#[doc = "Field `BFI1` reader - Boundary Flag 1 Inversion Control"] +pub type Bfi1R = crate::BitReader; +impl Bfi1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFI1_A { + pub const fn variant(&self) -> Bfi1 { match self.bits { - false => BFI1_A::VALUE1, - true => BFI1_A::VALUE2, + false => Bfi1::Value1, + true => Bfi1::Value2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFI1_A::VALUE1 + *self == Bfi1::Value1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFI1_A::VALUE2 + *self == Bfi1::Value2 } } #[doc = "Field `BFI1` writer - Boundary Flag 1 Inversion Control"] -pub type BFI1_W<'a, REG> = crate::BitWriter<'a, REG, BFI1_A>; -impl<'a, REG> BFI1_W<'a, REG> +pub type Bfi1W<'a, REG> = crate::BitWriter<'a, REG, Bfi1>; +impl<'a, REG> Bfi1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFI1_A::VALUE1) + self.variant(Bfi1::Value1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFI1_A::VALUE2) + self.variant(Bfi1::Value2) } } -#[doc = "Field `BFI2` reader - Boundary Flag 2 Inversion Control"] -pub type BFI2_R = crate::BitReader; #[doc = "Boundary Flag 2 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFI2_A { +pub enum Bfi2 { #[doc = "0: Use BFLy directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Invert value and use BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFI2_A) -> Self { + fn from(variant: Bfi2) -> Self { variant as u8 != 0 } } -impl BFI2_R { +#[doc = "Field `BFI2` reader - Boundary Flag 2 Inversion Control"] +pub type Bfi2R = crate::BitReader; +impl Bfi2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFI2_A { + pub const fn variant(&self) -> Bfi2 { match self.bits { - false => BFI2_A::VALUE1, - true => BFI2_A::VALUE2, + false => Bfi2::Value1, + true => Bfi2::Value2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFI2_A::VALUE1 + *self == Bfi2::Value1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFI2_A::VALUE2 + *self == Bfi2::Value2 } } #[doc = "Field `BFI2` writer - Boundary Flag 2 Inversion Control"] -pub type BFI2_W<'a, REG> = crate::BitWriter<'a, REG, BFI2_A>; -impl<'a, REG> BFI2_W<'a, REG> +pub type Bfi2W<'a, REG> = crate::BitWriter<'a, REG, Bfi2>; +impl<'a, REG> Bfi2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFI2_A::VALUE1) + self.variant(Bfi2::Value1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFI2_A::VALUE2) + self.variant(Bfi2::Value2) } } -#[doc = "Field `BFI3` reader - Boundary Flag 3 Inversion Control"] -pub type BFI3_R = crate::BitReader; #[doc = "Boundary Flag 3 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFI3_A { +pub enum Bfi3 { #[doc = "0: Use BFLy directly"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Invert value and use BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFI3_A) -> Self { + fn from(variant: Bfi3) -> Self { variant as u8 != 0 } } -impl BFI3_R { +#[doc = "Field `BFI3` reader - Boundary Flag 3 Inversion Control"] +pub type Bfi3R = crate::BitReader; +impl Bfi3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BFI3_A { + pub const fn variant(&self) -> Bfi3 { match self.bits { - false => BFI3_A::VALUE1, - true => BFI3_A::VALUE2, + false => Bfi3::Value1, + true => Bfi3::Value2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFI3_A::VALUE1 + *self == Bfi3::Value1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFI3_A::VALUE2 + *self == Bfi3::Value2 } } #[doc = "Field `BFI3` writer - Boundary Flag 3 Inversion Control"] -pub type BFI3_W<'a, REG> = crate::BitWriter<'a, REG, BFI3_A>; -impl<'a, REG> BFI3_W<'a, REG> +pub type Bfi3W<'a, REG> = crate::BitWriter<'a, REG, Bfi3>; +impl<'a, REG> Bfi3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFI3_A::VALUE1) + self.variant(Bfi3::Value1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFI3_A::VALUE2) + self.variant(Bfi3::Value2) } } impl R { #[doc = "Bit 0 - Boundary Flag 0"] #[inline(always)] - pub fn bfl0(&self) -> BFL0_R { - BFL0_R::new((self.bits & 1) != 0) + pub fn bfl0(&self) -> Bfl0R { + Bfl0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Boundary Flag 1"] #[inline(always)] - pub fn bfl1(&self) -> BFL1_R { - BFL1_R::new(((self.bits >> 1) & 1) != 0) + pub fn bfl1(&self) -> Bfl1R { + Bfl1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Boundary Flag 2"] #[inline(always)] - pub fn bfl2(&self) -> BFL2_R { - BFL2_R::new(((self.bits >> 2) & 1) != 0) + pub fn bfl2(&self) -> Bfl2R { + Bfl2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Boundary Flag 3"] #[inline(always)] - pub fn bfl3(&self) -> BFL3_R { - BFL3_R::new(((self.bits >> 3) & 1) != 0) + pub fn bfl3(&self) -> Bfl3R { + Bfl3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Boundary Flag 0 Activation Select"] #[inline(always)] - pub fn bfa0(&self) -> BFA0_R { - BFA0_R::new(((self.bits >> 8) & 1) != 0) + pub fn bfa0(&self) -> Bfa0R { + Bfa0R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Boundary Flag 1 Activation Select"] #[inline(always)] - pub fn bfa1(&self) -> BFA1_R { - BFA1_R::new(((self.bits >> 9) & 1) != 0) + pub fn bfa1(&self) -> Bfa1R { + Bfa1R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Boundary Flag 2 Activation Select"] #[inline(always)] - pub fn bfa2(&self) -> BFA2_R { - BFA2_R::new(((self.bits >> 10) & 1) != 0) + pub fn bfa2(&self) -> Bfa2R { + Bfa2R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Boundary Flag 3 Activation Select"] #[inline(always)] - pub fn bfa3(&self) -> BFA3_R { - BFA3_R::new(((self.bits >> 11) & 1) != 0) + pub fn bfa3(&self) -> Bfa3R { + Bfa3R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"] #[inline(always)] - pub fn bfi0(&self) -> BFI0_R { - BFI0_R::new(((self.bits >> 16) & 1) != 0) + pub fn bfi0(&self) -> Bfi0R { + Bfi0R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"] #[inline(always)] - pub fn bfi1(&self) -> BFI1_R { - BFI1_R::new(((self.bits >> 17) & 1) != 0) + pub fn bfi1(&self) -> Bfi1R { + Bfi1R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"] #[inline(always)] - pub fn bfi2(&self) -> BFI2_R { - BFI2_R::new(((self.bits >> 18) & 1) != 0) + pub fn bfi2(&self) -> Bfi2R { + Bfi2R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"] #[inline(always)] - pub fn bfi3(&self) -> BFI3_R { - BFI3_R::new(((self.bits >> 19) & 1) != 0) + pub fn bfi3(&self) -> Bfi3R { + Bfi3R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 8 - Boundary Flag 0 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa0(&mut self) -> BFA0_W { - BFA0_W::new(self, 8) + pub fn bfa0(&mut self) -> Bfa0W { + Bfa0W::new(self, 8) } #[doc = "Bit 9 - Boundary Flag 1 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa1(&mut self) -> BFA1_W { - BFA1_W::new(self, 9) + pub fn bfa1(&mut self) -> Bfa1W { + Bfa1W::new(self, 9) } #[doc = "Bit 10 - Boundary Flag 2 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa2(&mut self) -> BFA2_W { - BFA2_W::new(self, 10) + pub fn bfa2(&mut self) -> Bfa2W { + Bfa2W::new(self, 10) } #[doc = "Bit 11 - Boundary Flag 3 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa3(&mut self) -> BFA3_W { - BFA3_W::new(self, 11) + pub fn bfa3(&mut self) -> Bfa3W { + Bfa3W::new(self, 11) } #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi0(&mut self) -> BFI0_W { - BFI0_W::new(self, 16) + pub fn bfi0(&mut self) -> Bfi0W { + Bfi0W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi1(&mut self) -> BFI1_W { - BFI1_W::new(self, 17) + pub fn bfi1(&mut self) -> Bfi1W { + Bfi1W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi2(&mut self) -> BFI2_W { - BFI2_W::new(self, 18) + pub fn bfi2(&mut self) -> Bfi2W { + Bfi2W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi3(&mut self) -> BFI3_W { - BFI3_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bfi3(&mut self) -> Bfi3W { + Bfi3W::new(self, 19) } } #[doc = "Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BFL_SPEC; -impl crate::RegisterSpec for BFL_SPEC { +pub struct BflSpec; +impl crate::RegisterSpec for BflSpec { type Ux = u32; } #[doc = "`read()` method returns [`bfl::R`](R) reader structure"] -impl crate::Readable for BFL_SPEC {} +impl crate::Readable for BflSpec {} #[doc = "`write(|w| ..)` method takes [`bfl::W`](W) writer structure"] -impl crate::Writable for BFL_SPEC { +impl crate::Writable for BflSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFL to value 0"] -impl crate::Resettable for BFL_SPEC { +impl crate::Resettable for BflSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bflc.rs b/src/vadc_g0/bflc.rs index 3773623d..ea582cfa 100644 --- a/src/vadc_g0/bflc.rs +++ b/src/vadc_g0/bflc.rs @@ -1,67 +1,67 @@ #[doc = "Register `BFLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFLC` writer"] -pub type W = crate::W; -#[doc = "Field `BFM0` reader - Boundary Flag y Mode Control"] -pub type BFM0_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFM0_A { +pub enum Bfm0 { #[doc = "0: Disable boundary flag, BFLy is not changed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFM0_A) -> Self { + fn from(variant: Bfm0) -> Self { variant as _ } } -impl crate::FieldSpec for BFM0_A { +impl crate::FieldSpec for Bfm0 { type Ux = u8; } -impl BFM0_R { +#[doc = "Field `BFM0` reader - Boundary Flag y Mode Control"] +pub type Bfm0R = crate::FieldReader; +impl Bfm0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFM0_A::VALUE1), - 1 => Some(BFM0_A::VALUE2), - 2 => Some(BFM0_A::VALUE3), - 3 => Some(BFM0_A::VALUE4), + 0 => Some(Bfm0::Value1), + 1 => Some(Bfm0::Value2), + 2 => Some(Bfm0::Value3), + 3 => Some(Bfm0::Value4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFM0_A::VALUE1 + *self == Bfm0::Value1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFM0_A::VALUE2 + *self == Bfm0::Value2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFM0_A::VALUE3 + *self == Bfm0::Value3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFM0_A::VALUE4 + *self == Bfm0::Value4 } } #[doc = "Field `BFM0` writer - Boundary Flag y Mode Control"] -pub type BFM0_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM0_A>; -impl<'a, REG> BFM0_W<'a, REG> +pub type Bfm0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm0>; +impl<'a, REG> Bfm0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFM0_A::VALUE1) + self.variant(Bfm0::Value1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFM0_A::VALUE2) + self.variant(Bfm0::Value2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFM0_A::VALUE3) + self.variant(Bfm0::Value3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFM0_A::VALUE4) + self.variant(Bfm0::Value4) } } -#[doc = "Field `BFM1` reader - Boundary Flag y Mode Control"] -pub type BFM1_R = crate::FieldReader; #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFM1_A { +pub enum Bfm1 { #[doc = "0: Disable boundary flag, BFLy is not changed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFM1_A) -> Self { + fn from(variant: Bfm1) -> Self { variant as _ } } -impl crate::FieldSpec for BFM1_A { +impl crate::FieldSpec for Bfm1 { type Ux = u8; } -impl BFM1_R { +#[doc = "Field `BFM1` reader - Boundary Flag y Mode Control"] +pub type Bfm1R = crate::FieldReader; +impl Bfm1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFM1_A::VALUE1), - 1 => Some(BFM1_A::VALUE2), - 2 => Some(BFM1_A::VALUE3), - 3 => Some(BFM1_A::VALUE4), + 0 => Some(Bfm1::Value1), + 1 => Some(Bfm1::Value2), + 2 => Some(Bfm1::Value3), + 3 => Some(Bfm1::Value4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFM1_A::VALUE1 + *self == Bfm1::Value1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFM1_A::VALUE2 + *self == Bfm1::Value2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFM1_A::VALUE3 + *self == Bfm1::Value3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFM1_A::VALUE4 + *self == Bfm1::Value4 } } #[doc = "Field `BFM1` writer - Boundary Flag y Mode Control"] -pub type BFM1_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM1_A>; -impl<'a, REG> BFM1_W<'a, REG> +pub type Bfm1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm1>; +impl<'a, REG> Bfm1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFM1_A::VALUE1) + self.variant(Bfm1::Value1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFM1_A::VALUE2) + self.variant(Bfm1::Value2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFM1_A::VALUE3) + self.variant(Bfm1::Value3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFM1_A::VALUE4) + self.variant(Bfm1::Value4) } } -#[doc = "Field `BFM2` reader - Boundary Flag y Mode Control"] -pub type BFM2_R = crate::FieldReader; #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFM2_A { +pub enum Bfm2 { #[doc = "0: Disable boundary flag, BFLy is not changed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFM2_A) -> Self { + fn from(variant: Bfm2) -> Self { variant as _ } } -impl crate::FieldSpec for BFM2_A { +impl crate::FieldSpec for Bfm2 { type Ux = u8; } -impl BFM2_R { +#[doc = "Field `BFM2` reader - Boundary Flag y Mode Control"] +pub type Bfm2R = crate::FieldReader; +impl Bfm2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFM2_A::VALUE1), - 1 => Some(BFM2_A::VALUE2), - 2 => Some(BFM2_A::VALUE3), - 3 => Some(BFM2_A::VALUE4), + 0 => Some(Bfm2::Value1), + 1 => Some(Bfm2::Value2), + 2 => Some(Bfm2::Value3), + 3 => Some(Bfm2::Value4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFM2_A::VALUE1 + *self == Bfm2::Value1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFM2_A::VALUE2 + *self == Bfm2::Value2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFM2_A::VALUE3 + *self == Bfm2::Value3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFM2_A::VALUE4 + *self == Bfm2::Value4 } } #[doc = "Field `BFM2` writer - Boundary Flag y Mode Control"] -pub type BFM2_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM2_A>; -impl<'a, REG> BFM2_W<'a, REG> +pub type Bfm2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm2>; +impl<'a, REG> Bfm2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFM2_A::VALUE1) + self.variant(Bfm2::Value1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFM2_A::VALUE2) + self.variant(Bfm2::Value2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFM2_A::VALUE3) + self.variant(Bfm2::Value3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFM2_A::VALUE4) + self.variant(Bfm2::Value4) } } -#[doc = "Field `BFM3` reader - Boundary Flag y Mode Control"] -pub type BFM3_R = crate::FieldReader; #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFM3_A { +pub enum Bfm3 { #[doc = "0: Disable boundary flag, BFLy is not changed"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFM3_A) -> Self { + fn from(variant: Bfm3) -> Self { variant as _ } } -impl crate::FieldSpec for BFM3_A { +impl crate::FieldSpec for Bfm3 { type Ux = u8; } -impl BFM3_R { +#[doc = "Field `BFM3` reader - Boundary Flag y Mode Control"] +pub type Bfm3R = crate::FieldReader; +impl Bfm3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFM3_A::VALUE1), - 1 => Some(BFM3_A::VALUE2), - 2 => Some(BFM3_A::VALUE3), - 3 => Some(BFM3_A::VALUE4), + 0 => Some(Bfm3::Value1), + 1 => Some(Bfm3::Value2), + 2 => Some(Bfm3::Value3), + 3 => Some(Bfm3::Value4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFM3_A::VALUE1 + *self == Bfm3::Value1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFM3_A::VALUE2 + *self == Bfm3::Value2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFM3_A::VALUE3 + *self == Bfm3::Value3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFM3_A::VALUE4 + *self == Bfm3::Value4 } } #[doc = "Field `BFM3` writer - Boundary Flag y Mode Control"] -pub type BFM3_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM3_A>; -impl<'a, REG> BFM3_W<'a, REG> +pub type Bfm3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm3>; +impl<'a, REG> Bfm3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,95 +324,86 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFM3_A::VALUE1) + self.variant(Bfm3::Value1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFM3_A::VALUE2) + self.variant(Bfm3::Value2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFM3_A::VALUE3) + self.variant(Bfm3::Value3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFM3_A::VALUE4) + self.variant(Bfm3::Value4) } } impl R { #[doc = "Bits 0:3 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm0(&self) -> BFM0_R { - BFM0_R::new((self.bits & 0x0f) as u8) + pub fn bfm0(&self) -> Bfm0R { + Bfm0R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm1(&self) -> BFM1_R { - BFM1_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn bfm1(&self) -> Bfm1R { + Bfm1R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm2(&self) -> BFM2_R { - BFM2_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn bfm2(&self) -> Bfm2R { + Bfm2R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm3(&self) -> BFM3_R { - BFM3_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn bfm3(&self) -> Bfm3R { + Bfm3R::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm0(&mut self) -> BFM0_W { - BFM0_W::new(self, 0) + pub fn bfm0(&mut self) -> Bfm0W { + Bfm0W::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm1(&mut self) -> BFM1_W { - BFM1_W::new(self, 4) + pub fn bfm1(&mut self) -> Bfm1W { + Bfm1W::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm2(&mut self) -> BFM2_W { - BFM2_W::new(self, 8) + pub fn bfm2(&mut self) -> Bfm2W { + Bfm2W::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm3(&mut self) -> BFM3_W { - BFM3_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bfm3(&mut self) -> Bfm3W { + Bfm3W::new(self, 12) } } #[doc = "Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BFLC_SPEC; -impl crate::RegisterSpec for BFLC_SPEC { +pub struct BflcSpec; +impl crate::RegisterSpec for BflcSpec { type Ux = u32; } #[doc = "`read()` method returns [`bflc::R`](R) reader structure"] -impl crate::Readable for BFLC_SPEC {} +impl crate::Readable for BflcSpec {} #[doc = "`write(|w| ..)` method takes [`bflc::W`](W) writer structure"] -impl crate::Writable for BFLC_SPEC { +impl crate::Writable for BflcSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLC to value 0"] -impl crate::Resettable for BFLC_SPEC { +impl crate::Resettable for BflcSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bflnp.rs b/src/vadc_g0/bflnp.rs index e139f0d2..72f2745e 100644 --- a/src/vadc_g0/bflnp.rs +++ b/src/vadc_g0/bflnp.rs @@ -1,75 +1,75 @@ #[doc = "Register `BFLNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFLNP` writer"] -pub type W = crate::W; -#[doc = "Field `BFL0NP` reader - Boundary Flag y Node Pointer"] -pub type BFL0NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFL0NP_A { +pub enum Bfl0np { #[doc = "0: Select common bondary flag output 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select common bondary flag output 3"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, #[doc = "15: Disabled, no common output signal"] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFL0NP_A) -> Self { + fn from(variant: Bfl0np) -> Self { variant as _ } } -impl crate::FieldSpec for BFL0NP_A { +impl crate::FieldSpec for Bfl0np { type Ux = u8; } -impl BFL0NP_R { +#[doc = "Field `BFL0NP` reader - Boundary Flag y Node Pointer"] +pub type Bfl0npR = crate::FieldReader; +impl Bfl0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFL0NP_A::VALUE1), - 3 => Some(BFL0NP_A::VALUE2), - 4 => Some(BFL0NP_A::VALUE3), - 7 => Some(BFL0NP_A::VALUE4), - 15 => Some(BFL0NP_A::VALUE5), + 0 => Some(Bfl0np::Value1), + 3 => Some(Bfl0np::Value2), + 4 => Some(Bfl0np::Value3), + 7 => Some(Bfl0np::Value4), + 15 => Some(Bfl0np::Value5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL0NP_A::VALUE1 + *self == Bfl0np::Value1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL0NP_A::VALUE2 + *self == Bfl0np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFL0NP_A::VALUE3 + *self == Bfl0np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFL0NP_A::VALUE4 + *self == Bfl0np::Value4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BFL0NP_A::VALUE5 + *self == Bfl0np::Value5 } } #[doc = "Field `BFL0NP` writer - Boundary Flag y Node Pointer"] -pub type BFL0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL0NP_A>; -impl<'a, REG> BFL0NP_W<'a, REG> +pub type Bfl0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl0np>; +impl<'a, REG> Bfl0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -77,97 +77,97 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFL0NP_A::VALUE1) + self.variant(Bfl0np::Value1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFL0NP_A::VALUE2) + self.variant(Bfl0np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFL0NP_A::VALUE3) + self.variant(Bfl0np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFL0NP_A::VALUE4) + self.variant(Bfl0np::Value4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BFL0NP_A::VALUE5) + self.variant(Bfl0np::Value5) } } -#[doc = "Field `BFL1NP` reader - Boundary Flag y Node Pointer"] -pub type BFL1NP_R = crate::FieldReader; #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFL1NP_A { +pub enum Bfl1np { #[doc = "0: Select common bondary flag output 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select common bondary flag output 3"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, #[doc = "15: Disabled, no common output signal"] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFL1NP_A) -> Self { + fn from(variant: Bfl1np) -> Self { variant as _ } } -impl crate::FieldSpec for BFL1NP_A { +impl crate::FieldSpec for Bfl1np { type Ux = u8; } -impl BFL1NP_R { +#[doc = "Field `BFL1NP` reader - Boundary Flag y Node Pointer"] +pub type Bfl1npR = crate::FieldReader; +impl Bfl1npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFL1NP_A::VALUE1), - 3 => Some(BFL1NP_A::VALUE2), - 4 => Some(BFL1NP_A::VALUE3), - 7 => Some(BFL1NP_A::VALUE4), - 15 => Some(BFL1NP_A::VALUE5), + 0 => Some(Bfl1np::Value1), + 3 => Some(Bfl1np::Value2), + 4 => Some(Bfl1np::Value3), + 7 => Some(Bfl1np::Value4), + 15 => Some(Bfl1np::Value5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL1NP_A::VALUE1 + *self == Bfl1np::Value1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL1NP_A::VALUE2 + *self == Bfl1np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFL1NP_A::VALUE3 + *self == Bfl1np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFL1NP_A::VALUE4 + *self == Bfl1np::Value4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BFL1NP_A::VALUE5 + *self == Bfl1np::Value5 } } #[doc = "Field `BFL1NP` writer - Boundary Flag y Node Pointer"] -pub type BFL1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL1NP_A>; -impl<'a, REG> BFL1NP_W<'a, REG> +pub type Bfl1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl1np>; +impl<'a, REG> Bfl1npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -175,97 +175,97 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFL1NP_A::VALUE1) + self.variant(Bfl1np::Value1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFL1NP_A::VALUE2) + self.variant(Bfl1np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFL1NP_A::VALUE3) + self.variant(Bfl1np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFL1NP_A::VALUE4) + self.variant(Bfl1np::Value4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BFL1NP_A::VALUE5) + self.variant(Bfl1np::Value5) } } -#[doc = "Field `BFL2NP` reader - Boundary Flag y Node Pointer"] -pub type BFL2NP_R = crate::FieldReader; #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFL2NP_A { +pub enum Bfl2np { #[doc = "0: Select common bondary flag output 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select common bondary flag output 3"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, #[doc = "15: Disabled, no common output signal"] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFL2NP_A) -> Self { + fn from(variant: Bfl2np) -> Self { variant as _ } } -impl crate::FieldSpec for BFL2NP_A { +impl crate::FieldSpec for Bfl2np { type Ux = u8; } -impl BFL2NP_R { +#[doc = "Field `BFL2NP` reader - Boundary Flag y Node Pointer"] +pub type Bfl2npR = crate::FieldReader; +impl Bfl2npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFL2NP_A::VALUE1), - 3 => Some(BFL2NP_A::VALUE2), - 4 => Some(BFL2NP_A::VALUE3), - 7 => Some(BFL2NP_A::VALUE4), - 15 => Some(BFL2NP_A::VALUE5), + 0 => Some(Bfl2np::Value1), + 3 => Some(Bfl2np::Value2), + 4 => Some(Bfl2np::Value3), + 7 => Some(Bfl2np::Value4), + 15 => Some(Bfl2np::Value5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL2NP_A::VALUE1 + *self == Bfl2np::Value1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL2NP_A::VALUE2 + *self == Bfl2np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFL2NP_A::VALUE3 + *self == Bfl2np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFL2NP_A::VALUE4 + *self == Bfl2np::Value4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BFL2NP_A::VALUE5 + *self == Bfl2np::Value5 } } #[doc = "Field `BFL2NP` writer - Boundary Flag y Node Pointer"] -pub type BFL2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL2NP_A>; -impl<'a, REG> BFL2NP_W<'a, REG> +pub type Bfl2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl2np>; +impl<'a, REG> Bfl2npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -273,97 +273,97 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFL2NP_A::VALUE1) + self.variant(Bfl2np::Value1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFL2NP_A::VALUE2) + self.variant(Bfl2np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFL2NP_A::VALUE3) + self.variant(Bfl2np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFL2NP_A::VALUE4) + self.variant(Bfl2np::Value4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BFL2NP_A::VALUE5) + self.variant(Bfl2np::Value5) } } -#[doc = "Field `BFL3NP` reader - Boundary Flag y Node Pointer"] -pub type BFL3NP_R = crate::FieldReader; #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BFL3NP_A { +pub enum Bfl3np { #[doc = "0: Select common bondary flag output 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select common bondary flag output 3"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, #[doc = "15: Disabled, no common output signal"] - VALUE5 = 15, + Value5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BFL3NP_A) -> Self { + fn from(variant: Bfl3np) -> Self { variant as _ } } -impl crate::FieldSpec for BFL3NP_A { +impl crate::FieldSpec for Bfl3np { type Ux = u8; } -impl BFL3NP_R { +#[doc = "Field `BFL3NP` reader - Boundary Flag y Node Pointer"] +pub type Bfl3npR = crate::FieldReader; +impl Bfl3npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BFL3NP_A::VALUE1), - 3 => Some(BFL3NP_A::VALUE2), - 4 => Some(BFL3NP_A::VALUE3), - 7 => Some(BFL3NP_A::VALUE4), - 15 => Some(BFL3NP_A::VALUE5), + 0 => Some(Bfl3np::Value1), + 3 => Some(Bfl3np::Value2), + 4 => Some(Bfl3np::Value3), + 7 => Some(Bfl3np::Value4), + 15 => Some(Bfl3np::Value5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BFL3NP_A::VALUE1 + *self == Bfl3np::Value1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BFL3NP_A::VALUE2 + *self == Bfl3np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BFL3NP_A::VALUE3 + *self == Bfl3np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BFL3NP_A::VALUE4 + *self == Bfl3np::Value4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == BFL3NP_A::VALUE5 + *self == Bfl3np::Value5 } } #[doc = "Field `BFL3NP` writer - Boundary Flag y Node Pointer"] -pub type BFL3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL3NP_A>; -impl<'a, REG> BFL3NP_W<'a, REG> +pub type Bfl3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl3np>; +impl<'a, REG> Bfl3npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -371,100 +371,91 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFL3NP_A::VALUE1) + self.variant(Bfl3np::Value1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFL3NP_A::VALUE2) + self.variant(Bfl3np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BFL3NP_A::VALUE3) + self.variant(Bfl3np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BFL3NP_A::VALUE4) + self.variant(Bfl3np::Value4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(BFL3NP_A::VALUE5) + self.variant(Bfl3np::Value5) } } impl R { #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl0np(&self) -> BFL0NP_R { - BFL0NP_R::new((self.bits & 0x0f) as u8) + pub fn bfl0np(&self) -> Bfl0npR { + Bfl0npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl1np(&self) -> BFL1NP_R { - BFL1NP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn bfl1np(&self) -> Bfl1npR { + Bfl1npR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl2np(&self) -> BFL2NP_R { - BFL2NP_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn bfl2np(&self) -> Bfl2npR { + Bfl2npR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl3np(&self) -> BFL3NP_R { - BFL3NP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn bfl3np(&self) -> Bfl3npR { + Bfl3npR::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl0np(&mut self) -> BFL0NP_W { - BFL0NP_W::new(self, 0) + pub fn bfl0np(&mut self) -> Bfl0npW { + Bfl0npW::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl1np(&mut self) -> BFL1NP_W { - BFL1NP_W::new(self, 4) + pub fn bfl1np(&mut self) -> Bfl1npW { + Bfl1npW::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl2np(&mut self) -> BFL2NP_W { - BFL2NP_W::new(self, 8) + pub fn bfl2np(&mut self) -> Bfl2npW { + Bfl2npW::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl3np(&mut self) -> BFL3NP_W { - BFL3NP_W::new(self, 12) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bfl3np(&mut self) -> Bfl3npW { + Bfl3npW::new(self, 12) } } #[doc = "Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BFLNP_SPEC; -impl crate::RegisterSpec for BFLNP_SPEC { +pub struct BflnpSpec; +impl crate::RegisterSpec for BflnpSpec { type Ux = u32; } #[doc = "`read()` method returns [`bflnp::R`](R) reader structure"] -impl crate::Readable for BFLNP_SPEC {} +impl crate::Readable for BflnpSpec {} #[doc = "`write(|w| ..)` method takes [`bflnp::W`](W) writer structure"] -impl crate::Writable for BFLNP_SPEC { +impl crate::Writable for BflnpSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLNP to value 0xffff"] -impl crate::Resettable for BFLNP_SPEC { +impl crate::Resettable for BflnpSpec { const RESET_VALUE: u32 = 0xffff; } diff --git a/src/vadc_g0/bfls.rs b/src/vadc_g0/bfls.rs index 89ef1c7d..53d21c61 100644 --- a/src/vadc_g0/bfls.rs +++ b/src/vadc_g0/bfls.rs @@ -1,324 +1,315 @@ #[doc = "Register `BFLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Boundary Flag 0 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFC0_AW { +pub enum Bfc0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFC0_AW) -> Self { + fn from(variant: Bfc0) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC0` writer - Boundary Flag 0 Clear"] -pub type BFC0_W<'a, REG> = crate::BitWriter<'a, REG, BFC0_AW>; -impl<'a, REG> BFC0_W<'a, REG> +pub type Bfc0W<'a, REG> = crate::BitWriter<'a, REG, Bfc0>; +impl<'a, REG> Bfc0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFC0_AW::VALUE1) + self.variant(Bfc0::Value1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFC0_AW::VALUE2) + self.variant(Bfc0::Value2) } } #[doc = "Boundary Flag 1 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFC1_AW { +pub enum Bfc1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFC1_AW) -> Self { + fn from(variant: Bfc1) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC1` writer - Boundary Flag 1 Clear"] -pub type BFC1_W<'a, REG> = crate::BitWriter<'a, REG, BFC1_AW>; -impl<'a, REG> BFC1_W<'a, REG> +pub type Bfc1W<'a, REG> = crate::BitWriter<'a, REG, Bfc1>; +impl<'a, REG> Bfc1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFC1_AW::VALUE1) + self.variant(Bfc1::Value1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFC1_AW::VALUE2) + self.variant(Bfc1::Value2) } } #[doc = "Boundary Flag 2 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFC2_AW { +pub enum Bfc2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFC2_AW) -> Self { + fn from(variant: Bfc2) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC2` writer - Boundary Flag 2 Clear"] -pub type BFC2_W<'a, REG> = crate::BitWriter<'a, REG, BFC2_AW>; -impl<'a, REG> BFC2_W<'a, REG> +pub type Bfc2W<'a, REG> = crate::BitWriter<'a, REG, Bfc2>; +impl<'a, REG> Bfc2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFC2_AW::VALUE1) + self.variant(Bfc2::Value1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFC2_AW::VALUE2) + self.variant(Bfc2::Value2) } } #[doc = "Boundary Flag 3 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFC3_AW { +pub enum Bfc3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFC3_AW) -> Self { + fn from(variant: Bfc3) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC3` writer - Boundary Flag 3 Clear"] -pub type BFC3_W<'a, REG> = crate::BitWriter<'a, REG, BFC3_AW>; -impl<'a, REG> BFC3_W<'a, REG> +pub type Bfc3W<'a, REG> = crate::BitWriter<'a, REG, Bfc3>; +impl<'a, REG> Bfc3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFC3_AW::VALUE1) + self.variant(Bfc3::Value1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFC3_AW::VALUE2) + self.variant(Bfc3::Value2) } } #[doc = "Boundary Flag 0 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFS0_AW { +pub enum Bfs0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFS0_AW) -> Self { + fn from(variant: Bfs0) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS0` writer - Boundary Flag 0 Set"] -pub type BFS0_W<'a, REG> = crate::BitWriter<'a, REG, BFS0_AW>; -impl<'a, REG> BFS0_W<'a, REG> +pub type Bfs0W<'a, REG> = crate::BitWriter<'a, REG, Bfs0>; +impl<'a, REG> Bfs0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFS0_AW::VALUE1) + self.variant(Bfs0::Value1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFS0_AW::VALUE2) + self.variant(Bfs0::Value2) } } #[doc = "Boundary Flag 1 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFS1_AW { +pub enum Bfs1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFS1_AW) -> Self { + fn from(variant: Bfs1) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS1` writer - Boundary Flag 1 Set"] -pub type BFS1_W<'a, REG> = crate::BitWriter<'a, REG, BFS1_AW>; -impl<'a, REG> BFS1_W<'a, REG> +pub type Bfs1W<'a, REG> = crate::BitWriter<'a, REG, Bfs1>; +impl<'a, REG> Bfs1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFS1_AW::VALUE1) + self.variant(Bfs1::Value1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFS1_AW::VALUE2) + self.variant(Bfs1::Value2) } } #[doc = "Boundary Flag 2 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFS2_AW { +pub enum Bfs2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFS2_AW) -> Self { + fn from(variant: Bfs2) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS2` writer - Boundary Flag 2 Set"] -pub type BFS2_W<'a, REG> = crate::BitWriter<'a, REG, BFS2_AW>; -impl<'a, REG> BFS2_W<'a, REG> +pub type Bfs2W<'a, REG> = crate::BitWriter<'a, REG, Bfs2>; +impl<'a, REG> Bfs2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFS2_AW::VALUE1) + self.variant(Bfs2::Value1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFS2_AW::VALUE2) + self.variant(Bfs2::Value2) } } #[doc = "Boundary Flag 3 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BFS3_AW { +pub enum Bfs3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Set bit BFLy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BFS3_AW) -> Self { + fn from(variant: Bfs3) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS3` writer - Boundary Flag 3 Set"] -pub type BFS3_W<'a, REG> = crate::BitWriter<'a, REG, BFS3_AW>; -impl<'a, REG> BFS3_W<'a, REG> +pub type Bfs3W<'a, REG> = crate::BitWriter<'a, REG, Bfs3>; +impl<'a, REG> Bfs3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BFS3_AW::VALUE1) + self.variant(Bfs3::Value1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BFS3_AW::VALUE2) + self.variant(Bfs3::Value2) } } impl W { #[doc = "Bit 0 - Boundary Flag 0 Clear"] #[inline(always)] #[must_use] - pub fn bfc0(&mut self) -> BFC0_W { - BFC0_W::new(self, 0) + pub fn bfc0(&mut self) -> Bfc0W { + Bfc0W::new(self, 0) } #[doc = "Bit 1 - Boundary Flag 1 Clear"] #[inline(always)] #[must_use] - pub fn bfc1(&mut self) -> BFC1_W { - BFC1_W::new(self, 1) + pub fn bfc1(&mut self) -> Bfc1W { + Bfc1W::new(self, 1) } #[doc = "Bit 2 - Boundary Flag 2 Clear"] #[inline(always)] #[must_use] - pub fn bfc2(&mut self) -> BFC2_W { - BFC2_W::new(self, 2) + pub fn bfc2(&mut self) -> Bfc2W { + Bfc2W::new(self, 2) } #[doc = "Bit 3 - Boundary Flag 3 Clear"] #[inline(always)] #[must_use] - pub fn bfc3(&mut self) -> BFC3_W { - BFC3_W::new(self, 3) + pub fn bfc3(&mut self) -> Bfc3W { + Bfc3W::new(self, 3) } #[doc = "Bit 16 - Boundary Flag 0 Set"] #[inline(always)] #[must_use] - pub fn bfs0(&mut self) -> BFS0_W { - BFS0_W::new(self, 16) + pub fn bfs0(&mut self) -> Bfs0W { + Bfs0W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Set"] #[inline(always)] #[must_use] - pub fn bfs1(&mut self) -> BFS1_W { - BFS1_W::new(self, 17) + pub fn bfs1(&mut self) -> Bfs1W { + Bfs1W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Set"] #[inline(always)] #[must_use] - pub fn bfs2(&mut self) -> BFS2_W { - BFS2_W::new(self, 18) + pub fn bfs2(&mut self) -> Bfs2W { + Bfs2W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Set"] #[inline(always)] #[must_use] - pub fn bfs3(&mut self) -> BFS3_W { - BFS3_W::new(self, 19) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bfs3(&mut self) -> Bfs3W { + Bfs3W::new(self, 19) } } #[doc = "Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BFLS_SPEC; -impl crate::RegisterSpec for BFLS_SPEC { +pub struct BflsSpec; +impl crate::RegisterSpec for BflsSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`bfls::W`](W) writer structure"] -impl crate::Writable for BFLS_SPEC { +impl crate::Writable for BflsSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLS to value 0"] -impl crate::Resettable for BFLS_SPEC { +impl crate::Resettable for BflsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bound.rs b/src/vadc_g0/bound.rs index b94b7a4f..fcea395c 100644 --- a/src/vadc_g0/bound.rs +++ b/src/vadc_g0/bound.rs @@ -1,64 +1,55 @@ #[doc = "Register `BOUND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BOUND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOUNDARY0` reader - Boundary Value 0 for Limit Checking"] -pub type BOUNDARY0_R = crate::FieldReader; +pub type Boundary0R = crate::FieldReader; #[doc = "Field `BOUNDARY0` writer - Boundary Value 0 for Limit Checking"] -pub type BOUNDARY0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Boundary0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `BOUNDARY1` reader - Boundary Value 1 for Limit Checking"] -pub type BOUNDARY1_R = crate::FieldReader; +pub type Boundary1R = crate::FieldReader; #[doc = "Field `BOUNDARY1` writer - Boundary Value 1 for Limit Checking"] -pub type BOUNDARY1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type Boundary1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - pub fn boundary0(&self) -> BOUNDARY0_R { - BOUNDARY0_R::new((self.bits & 0x0fff) as u16) + pub fn boundary0(&self) -> Boundary0R { + Boundary0R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - pub fn boundary1(&self) -> BOUNDARY1_R { - BOUNDARY1_R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn boundary1(&self) -> Boundary1R { + Boundary1R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary0(&mut self) -> BOUNDARY0_W { - BOUNDARY0_W::new(self, 0) + pub fn boundary0(&mut self) -> Boundary0W { + Boundary0W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary1(&mut self) -> BOUNDARY1_W { - BOUNDARY1_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn boundary1(&mut self) -> Boundary1W { + Boundary1W::new(self, 16) } } #[doc = "Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BOUND_SPEC; -impl crate::RegisterSpec for BOUND_SPEC { +pub struct BoundSpec; +impl crate::RegisterSpec for BoundSpec { type Ux = u32; } #[doc = "`read()` method returns [`bound::R`](R) reader structure"] -impl crate::Readable for BOUND_SPEC {} +impl crate::Readable for BoundSpec {} #[doc = "`write(|w| ..)` method takes [`bound::W`](W) writer structure"] -impl crate::Writable for BOUND_SPEC { +impl crate::Writable for BoundSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BOUND to value 0"] -impl crate::Resettable for BOUND_SPEC { +impl crate::Resettable for BoundSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/cefclr.rs b/src/vadc_g0/cefclr.rs index 9ddcf77f..83eb5445 100644 --- a/src/vadc_g0/cefclr.rs +++ b/src/vadc_g0/cefclr.rs @@ -1,324 +1,315 @@ #[doc = "Register `CEFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Channel Event for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV0_AW { +pub enum Cev0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV0_AW) -> Self { + fn from(variant: Cev0) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV0` writer - Clear Channel Event for Channel 0"] -pub type CEV0_W<'a, REG> = crate::BitWriter<'a, REG, CEV0_AW>; -impl<'a, REG> CEV0_W<'a, REG> +pub type Cev0W<'a, REG> = crate::BitWriter<'a, REG, Cev0>; +impl<'a, REG> Cev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV0_AW::VALUE1) + self.variant(Cev0::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV0_AW::VALUE2) + self.variant(Cev0::Value2) } } #[doc = "Clear Channel Event for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV1_AW { +pub enum Cev1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV1_AW) -> Self { + fn from(variant: Cev1) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV1` writer - Clear Channel Event for Channel 1"] -pub type CEV1_W<'a, REG> = crate::BitWriter<'a, REG, CEV1_AW>; -impl<'a, REG> CEV1_W<'a, REG> +pub type Cev1W<'a, REG> = crate::BitWriter<'a, REG, Cev1>; +impl<'a, REG> Cev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV1_AW::VALUE1) + self.variant(Cev1::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV1_AW::VALUE2) + self.variant(Cev1::Value2) } } #[doc = "Clear Channel Event for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV2_AW { +pub enum Cev2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV2_AW) -> Self { + fn from(variant: Cev2) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV2` writer - Clear Channel Event for Channel 2"] -pub type CEV2_W<'a, REG> = crate::BitWriter<'a, REG, CEV2_AW>; -impl<'a, REG> CEV2_W<'a, REG> +pub type Cev2W<'a, REG> = crate::BitWriter<'a, REG, Cev2>; +impl<'a, REG> Cev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV2_AW::VALUE1) + self.variant(Cev2::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV2_AW::VALUE2) + self.variant(Cev2::Value2) } } #[doc = "Clear Channel Event for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV3_AW { +pub enum Cev3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV3_AW) -> Self { + fn from(variant: Cev3) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV3` writer - Clear Channel Event for Channel 3"] -pub type CEV3_W<'a, REG> = crate::BitWriter<'a, REG, CEV3_AW>; -impl<'a, REG> CEV3_W<'a, REG> +pub type Cev3W<'a, REG> = crate::BitWriter<'a, REG, Cev3>; +impl<'a, REG> Cev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV3_AW::VALUE1) + self.variant(Cev3::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV3_AW::VALUE2) + self.variant(Cev3::Value2) } } #[doc = "Clear Channel Event for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV4_AW { +pub enum Cev4 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV4_AW) -> Self { + fn from(variant: Cev4) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV4` writer - Clear Channel Event for Channel 4"] -pub type CEV4_W<'a, REG> = crate::BitWriter<'a, REG, CEV4_AW>; -impl<'a, REG> CEV4_W<'a, REG> +pub type Cev4W<'a, REG> = crate::BitWriter<'a, REG, Cev4>; +impl<'a, REG> Cev4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV4_AW::VALUE1) + self.variant(Cev4::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV4_AW::VALUE2) + self.variant(Cev4::Value2) } } #[doc = "Clear Channel Event for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV5_AW { +pub enum Cev5 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV5_AW) -> Self { + fn from(variant: Cev5) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV5` writer - Clear Channel Event for Channel 5"] -pub type CEV5_W<'a, REG> = crate::BitWriter<'a, REG, CEV5_AW>; -impl<'a, REG> CEV5_W<'a, REG> +pub type Cev5W<'a, REG> = crate::BitWriter<'a, REG, Cev5>; +impl<'a, REG> Cev5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV5_AW::VALUE1) + self.variant(Cev5::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV5_AW::VALUE2) + self.variant(Cev5::Value2) } } #[doc = "Clear Channel Event for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV6_AW { +pub enum Cev6 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV6_AW) -> Self { + fn from(variant: Cev6) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV6` writer - Clear Channel Event for Channel 6"] -pub type CEV6_W<'a, REG> = crate::BitWriter<'a, REG, CEV6_AW>; -impl<'a, REG> CEV6_W<'a, REG> +pub type Cev6W<'a, REG> = crate::BitWriter<'a, REG, Cev6>; +impl<'a, REG> Cev6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV6_AW::VALUE1) + self.variant(Cev6::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV6_AW::VALUE2) + self.variant(Cev6::Value2) } } #[doc = "Clear Channel Event for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV7_AW { +pub enum Cev7 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV7_AW) -> Self { + fn from(variant: Cev7) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV7` writer - Clear Channel Event for Channel 7"] -pub type CEV7_W<'a, REG> = crate::BitWriter<'a, REG, CEV7_AW>; -impl<'a, REG> CEV7_W<'a, REG> +pub type Cev7W<'a, REG> = crate::BitWriter<'a, REG, Cev7>; +impl<'a, REG> Cev7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV7_AW::VALUE1) + self.variant(Cev7::Value1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV7_AW::VALUE2) + self.variant(Cev7::Value2) } } impl W { #[doc = "Bit 0 - Clear Channel Event for Channel 0"] #[inline(always)] #[must_use] - pub fn cev0(&mut self) -> CEV0_W { - CEV0_W::new(self, 0) + pub fn cev0(&mut self) -> Cev0W { + Cev0W::new(self, 0) } #[doc = "Bit 1 - Clear Channel Event for Channel 1"] #[inline(always)] #[must_use] - pub fn cev1(&mut self) -> CEV1_W { - CEV1_W::new(self, 1) + pub fn cev1(&mut self) -> Cev1W { + Cev1W::new(self, 1) } #[doc = "Bit 2 - Clear Channel Event for Channel 2"] #[inline(always)] #[must_use] - pub fn cev2(&mut self) -> CEV2_W { - CEV2_W::new(self, 2) + pub fn cev2(&mut self) -> Cev2W { + Cev2W::new(self, 2) } #[doc = "Bit 3 - Clear Channel Event for Channel 3"] #[inline(always)] #[must_use] - pub fn cev3(&mut self) -> CEV3_W { - CEV3_W::new(self, 3) + pub fn cev3(&mut self) -> Cev3W { + Cev3W::new(self, 3) } #[doc = "Bit 4 - Clear Channel Event for Channel 4"] #[inline(always)] #[must_use] - pub fn cev4(&mut self) -> CEV4_W { - CEV4_W::new(self, 4) + pub fn cev4(&mut self) -> Cev4W { + Cev4W::new(self, 4) } #[doc = "Bit 5 - Clear Channel Event for Channel 5"] #[inline(always)] #[must_use] - pub fn cev5(&mut self) -> CEV5_W { - CEV5_W::new(self, 5) + pub fn cev5(&mut self) -> Cev5W { + Cev5W::new(self, 5) } #[doc = "Bit 6 - Clear Channel Event for Channel 6"] #[inline(always)] #[must_use] - pub fn cev6(&mut self) -> CEV6_W { - CEV6_W::new(self, 6) + pub fn cev6(&mut self) -> Cev6W { + Cev6W::new(self, 6) } #[doc = "Bit 7 - Clear Channel Event for Channel 7"] #[inline(always)] #[must_use] - pub fn cev7(&mut self) -> CEV7_W { - CEV7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cev7(&mut self) -> Cev7W { + Cev7W::new(self, 7) } } #[doc = "Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CEFCLR_SPEC; -impl crate::RegisterSpec for CEFCLR_SPEC { +pub struct CefclrSpec; +impl crate::RegisterSpec for CefclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cefclr::W`](W) writer structure"] -impl crate::Writable for CEFCLR_SPEC { +impl crate::Writable for CefclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEFCLR to value 0"] -impl crate::Resettable for CEFCLR_SPEC { +impl crate::Resettable for CefclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/ceflag.rs b/src/vadc_g0/ceflag.rs index 396cec4a..2fa9e3ce 100644 --- a/src/vadc_g0/ceflag.rs +++ b/src/vadc_g0/ceflag.rs @@ -1,546 +1,537 @@ #[doc = "Register `CEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CEFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `CEV0` reader - Channel Event for Channel 0"] -pub type CEV0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Channel Event for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV0_A { +pub enum Cev0 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV0_A) -> Self { + fn from(variant: Cev0) -> Self { variant as u8 != 0 } } -impl CEV0_R { +#[doc = "Field `CEV0` reader - Channel Event for Channel 0"] +pub type Cev0R = crate::BitReader; +impl Cev0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV0_A { + pub const fn variant(&self) -> Cev0 { match self.bits { - false => CEV0_A::VALUE1, - true => CEV0_A::VALUE2, + false => Cev0::Value1, + true => Cev0::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV0_A::VALUE1 + *self == Cev0::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV0_A::VALUE2 + *self == Cev0::Value2 } } #[doc = "Field `CEV0` writer - Channel Event for Channel 0"] -pub type CEV0_W<'a, REG> = crate::BitWriter<'a, REG, CEV0_A>; -impl<'a, REG> CEV0_W<'a, REG> +pub type Cev0W<'a, REG> = crate::BitWriter<'a, REG, Cev0>; +impl<'a, REG> Cev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV0_A::VALUE1) + self.variant(Cev0::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV0_A::VALUE2) + self.variant(Cev0::Value2) } } -#[doc = "Field `CEV1` reader - Channel Event for Channel 1"] -pub type CEV1_R = crate::BitReader; #[doc = "Channel Event for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV1_A { +pub enum Cev1 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV1_A) -> Self { + fn from(variant: Cev1) -> Self { variant as u8 != 0 } } -impl CEV1_R { +#[doc = "Field `CEV1` reader - Channel Event for Channel 1"] +pub type Cev1R = crate::BitReader; +impl Cev1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV1_A { + pub const fn variant(&self) -> Cev1 { match self.bits { - false => CEV1_A::VALUE1, - true => CEV1_A::VALUE2, + false => Cev1::Value1, + true => Cev1::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV1_A::VALUE1 + *self == Cev1::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV1_A::VALUE2 + *self == Cev1::Value2 } } #[doc = "Field `CEV1` writer - Channel Event for Channel 1"] -pub type CEV1_W<'a, REG> = crate::BitWriter<'a, REG, CEV1_A>; -impl<'a, REG> CEV1_W<'a, REG> +pub type Cev1W<'a, REG> = crate::BitWriter<'a, REG, Cev1>; +impl<'a, REG> Cev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV1_A::VALUE1) + self.variant(Cev1::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV1_A::VALUE2) + self.variant(Cev1::Value2) } } -#[doc = "Field `CEV2` reader - Channel Event for Channel 2"] -pub type CEV2_R = crate::BitReader; #[doc = "Channel Event for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV2_A { +pub enum Cev2 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV2_A) -> Self { + fn from(variant: Cev2) -> Self { variant as u8 != 0 } } -impl CEV2_R { +#[doc = "Field `CEV2` reader - Channel Event for Channel 2"] +pub type Cev2R = crate::BitReader; +impl Cev2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV2_A { + pub const fn variant(&self) -> Cev2 { match self.bits { - false => CEV2_A::VALUE1, - true => CEV2_A::VALUE2, + false => Cev2::Value1, + true => Cev2::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV2_A::VALUE1 + *self == Cev2::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV2_A::VALUE2 + *self == Cev2::Value2 } } #[doc = "Field `CEV2` writer - Channel Event for Channel 2"] -pub type CEV2_W<'a, REG> = crate::BitWriter<'a, REG, CEV2_A>; -impl<'a, REG> CEV2_W<'a, REG> +pub type Cev2W<'a, REG> = crate::BitWriter<'a, REG, Cev2>; +impl<'a, REG> Cev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV2_A::VALUE1) + self.variant(Cev2::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV2_A::VALUE2) + self.variant(Cev2::Value2) } } -#[doc = "Field `CEV3` reader - Channel Event for Channel 3"] -pub type CEV3_R = crate::BitReader; #[doc = "Channel Event for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV3_A { +pub enum Cev3 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV3_A) -> Self { + fn from(variant: Cev3) -> Self { variant as u8 != 0 } } -impl CEV3_R { +#[doc = "Field `CEV3` reader - Channel Event for Channel 3"] +pub type Cev3R = crate::BitReader; +impl Cev3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV3_A { + pub const fn variant(&self) -> Cev3 { match self.bits { - false => CEV3_A::VALUE1, - true => CEV3_A::VALUE2, + false => Cev3::Value1, + true => Cev3::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV3_A::VALUE1 + *self == Cev3::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV3_A::VALUE2 + *self == Cev3::Value2 } } #[doc = "Field `CEV3` writer - Channel Event for Channel 3"] -pub type CEV3_W<'a, REG> = crate::BitWriter<'a, REG, CEV3_A>; -impl<'a, REG> CEV3_W<'a, REG> +pub type Cev3W<'a, REG> = crate::BitWriter<'a, REG, Cev3>; +impl<'a, REG> Cev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV3_A::VALUE1) + self.variant(Cev3::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV3_A::VALUE2) + self.variant(Cev3::Value2) } } -#[doc = "Field `CEV4` reader - Channel Event for Channel 4"] -pub type CEV4_R = crate::BitReader; #[doc = "Channel Event for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV4_A { +pub enum Cev4 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV4_A) -> Self { + fn from(variant: Cev4) -> Self { variant as u8 != 0 } } -impl CEV4_R { +#[doc = "Field `CEV4` reader - Channel Event for Channel 4"] +pub type Cev4R = crate::BitReader; +impl Cev4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV4_A { + pub const fn variant(&self) -> Cev4 { match self.bits { - false => CEV4_A::VALUE1, - true => CEV4_A::VALUE2, + false => Cev4::Value1, + true => Cev4::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV4_A::VALUE1 + *self == Cev4::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV4_A::VALUE2 + *self == Cev4::Value2 } } #[doc = "Field `CEV4` writer - Channel Event for Channel 4"] -pub type CEV4_W<'a, REG> = crate::BitWriter<'a, REG, CEV4_A>; -impl<'a, REG> CEV4_W<'a, REG> +pub type Cev4W<'a, REG> = crate::BitWriter<'a, REG, Cev4>; +impl<'a, REG> Cev4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV4_A::VALUE1) + self.variant(Cev4::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV4_A::VALUE2) + self.variant(Cev4::Value2) } } -#[doc = "Field `CEV5` reader - Channel Event for Channel 5"] -pub type CEV5_R = crate::BitReader; #[doc = "Channel Event for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV5_A { +pub enum Cev5 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV5_A) -> Self { + fn from(variant: Cev5) -> Self { variant as u8 != 0 } } -impl CEV5_R { +#[doc = "Field `CEV5` reader - Channel Event for Channel 5"] +pub type Cev5R = crate::BitReader; +impl Cev5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV5_A { + pub const fn variant(&self) -> Cev5 { match self.bits { - false => CEV5_A::VALUE1, - true => CEV5_A::VALUE2, + false => Cev5::Value1, + true => Cev5::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV5_A::VALUE1 + *self == Cev5::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV5_A::VALUE2 + *self == Cev5::Value2 } } #[doc = "Field `CEV5` writer - Channel Event for Channel 5"] -pub type CEV5_W<'a, REG> = crate::BitWriter<'a, REG, CEV5_A>; -impl<'a, REG> CEV5_W<'a, REG> +pub type Cev5W<'a, REG> = crate::BitWriter<'a, REG, Cev5>; +impl<'a, REG> Cev5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV5_A::VALUE1) + self.variant(Cev5::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV5_A::VALUE2) + self.variant(Cev5::Value2) } } -#[doc = "Field `CEV6` reader - Channel Event for Channel 6"] -pub type CEV6_R = crate::BitReader; #[doc = "Channel Event for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV6_A { +pub enum Cev6 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV6_A) -> Self { + fn from(variant: Cev6) -> Self { variant as u8 != 0 } } -impl CEV6_R { +#[doc = "Field `CEV6` reader - Channel Event for Channel 6"] +pub type Cev6R = crate::BitReader; +impl Cev6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV6_A { + pub const fn variant(&self) -> Cev6 { match self.bits { - false => CEV6_A::VALUE1, - true => CEV6_A::VALUE2, + false => Cev6::Value1, + true => Cev6::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV6_A::VALUE1 + *self == Cev6::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV6_A::VALUE2 + *self == Cev6::Value2 } } #[doc = "Field `CEV6` writer - Channel Event for Channel 6"] -pub type CEV6_W<'a, REG> = crate::BitWriter<'a, REG, CEV6_A>; -impl<'a, REG> CEV6_W<'a, REG> +pub type Cev6W<'a, REG> = crate::BitWriter<'a, REG, Cev6>; +impl<'a, REG> Cev6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV6_A::VALUE1) + self.variant(Cev6::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV6_A::VALUE2) + self.variant(Cev6::Value2) } } -#[doc = "Field `CEV7` reader - Channel Event for Channel 7"] -pub type CEV7_R = crate::BitReader; #[doc = "Channel Event for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV7_A { +pub enum Cev7 { #[doc = "0: No channel event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A channel event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV7_A) -> Self { + fn from(variant: Cev7) -> Self { variant as u8 != 0 } } -impl CEV7_R { +#[doc = "Field `CEV7` reader - Channel Event for Channel 7"] +pub type Cev7R = crate::BitReader; +impl Cev7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CEV7_A { + pub const fn variant(&self) -> Cev7 { match self.bits { - false => CEV7_A::VALUE1, - true => CEV7_A::VALUE2, + false => Cev7::Value1, + true => Cev7::Value2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV7_A::VALUE1 + *self == Cev7::Value1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV7_A::VALUE2 + *self == Cev7::Value2 } } #[doc = "Field `CEV7` writer - Channel Event for Channel 7"] -pub type CEV7_W<'a, REG> = crate::BitWriter<'a, REG, CEV7_A>; -impl<'a, REG> CEV7_W<'a, REG> +pub type Cev7W<'a, REG> = crate::BitWriter<'a, REG, Cev7>; +impl<'a, REG> Cev7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV7_A::VALUE1) + self.variant(Cev7::Value1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV7_A::VALUE2) + self.variant(Cev7::Value2) } } impl R { #[doc = "Bit 0 - Channel Event for Channel 0"] #[inline(always)] - pub fn cev0(&self) -> CEV0_R { - CEV0_R::new((self.bits & 1) != 0) + pub fn cev0(&self) -> Cev0R { + Cev0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Event for Channel 1"] #[inline(always)] - pub fn cev1(&self) -> CEV1_R { - CEV1_R::new(((self.bits >> 1) & 1) != 0) + pub fn cev1(&self) -> Cev1R { + Cev1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Event for Channel 2"] #[inline(always)] - pub fn cev2(&self) -> CEV2_R { - CEV2_R::new(((self.bits >> 2) & 1) != 0) + pub fn cev2(&self) -> Cev2R { + Cev2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Event for Channel 3"] #[inline(always)] - pub fn cev3(&self) -> CEV3_R { - CEV3_R::new(((self.bits >> 3) & 1) != 0) + pub fn cev3(&self) -> Cev3R { + Cev3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Event for Channel 4"] #[inline(always)] - pub fn cev4(&self) -> CEV4_R { - CEV4_R::new(((self.bits >> 4) & 1) != 0) + pub fn cev4(&self) -> Cev4R { + Cev4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Event for Channel 5"] #[inline(always)] - pub fn cev5(&self) -> CEV5_R { - CEV5_R::new(((self.bits >> 5) & 1) != 0) + pub fn cev5(&self) -> Cev5R { + Cev5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Event for Channel 6"] #[inline(always)] - pub fn cev6(&self) -> CEV6_R { - CEV6_R::new(((self.bits >> 6) & 1) != 0) + pub fn cev6(&self) -> Cev6R { + Cev6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Event for Channel 7"] #[inline(always)] - pub fn cev7(&self) -> CEV7_R { - CEV7_R::new(((self.bits >> 7) & 1) != 0) + pub fn cev7(&self) -> Cev7R { + Cev7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Event for Channel 0"] #[inline(always)] #[must_use] - pub fn cev0(&mut self) -> CEV0_W { - CEV0_W::new(self, 0) + pub fn cev0(&mut self) -> Cev0W { + Cev0W::new(self, 0) } #[doc = "Bit 1 - Channel Event for Channel 1"] #[inline(always)] #[must_use] - pub fn cev1(&mut self) -> CEV1_W { - CEV1_W::new(self, 1) + pub fn cev1(&mut self) -> Cev1W { + Cev1W::new(self, 1) } #[doc = "Bit 2 - Channel Event for Channel 2"] #[inline(always)] #[must_use] - pub fn cev2(&mut self) -> CEV2_W { - CEV2_W::new(self, 2) + pub fn cev2(&mut self) -> Cev2W { + Cev2W::new(self, 2) } #[doc = "Bit 3 - Channel Event for Channel 3"] #[inline(always)] #[must_use] - pub fn cev3(&mut self) -> CEV3_W { - CEV3_W::new(self, 3) + pub fn cev3(&mut self) -> Cev3W { + Cev3W::new(self, 3) } #[doc = "Bit 4 - Channel Event for Channel 4"] #[inline(always)] #[must_use] - pub fn cev4(&mut self) -> CEV4_W { - CEV4_W::new(self, 4) + pub fn cev4(&mut self) -> Cev4W { + Cev4W::new(self, 4) } #[doc = "Bit 5 - Channel Event for Channel 5"] #[inline(always)] #[must_use] - pub fn cev5(&mut self) -> CEV5_W { - CEV5_W::new(self, 5) + pub fn cev5(&mut self) -> Cev5W { + Cev5W::new(self, 5) } #[doc = "Bit 6 - Channel Event for Channel 6"] #[inline(always)] #[must_use] - pub fn cev6(&mut self) -> CEV6_W { - CEV6_W::new(self, 6) + pub fn cev6(&mut self) -> Cev6W { + Cev6W::new(self, 6) } #[doc = "Bit 7 - Channel Event for Channel 7"] #[inline(always)] #[must_use] - pub fn cev7(&mut self) -> CEV7_W { - CEV7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cev7(&mut self) -> Cev7W { + Cev7W::new(self, 7) } } #[doc = "Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CEFLAG_SPEC; -impl crate::RegisterSpec for CEFLAG_SPEC { +pub struct CeflagSpec; +impl crate::RegisterSpec for CeflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`ceflag::R`](R) reader structure"] -impl crate::Readable for CEFLAG_SPEC {} +impl crate::Readable for CeflagSpec {} #[doc = "`write(|w| ..)` method takes [`ceflag::W`](W) writer structure"] -impl crate::Writable for CEFLAG_SPEC { +impl crate::Writable for CeflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEFLAG to value 0"] -impl crate::Resettable for CEFLAG_SPEC { +impl crate::Resettable for CeflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/cevnp0.rs b/src/vadc_g0/cevnp0.rs index 0e80a25c..0744fd4b 100644 --- a/src/vadc_g0/cevnp0.rs +++ b/src/vadc_g0/cevnp0.rs @@ -1,67 +1,67 @@ #[doc = "Register `CEVNP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CEVNP0` writer"] -pub type W = crate::W; -#[doc = "Field `CEV0NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV0NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV0NP_A { +pub enum Cev0np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV0NP_A) -> Self { + fn from(variant: Cev0np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV0NP_A { +impl crate::FieldSpec for Cev0np { type Ux = u8; } -impl CEV0NP_R { +#[doc = "Field `CEV0NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev0npR = crate::FieldReader; +impl Cev0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV0NP_A::VALUE1), - 3 => Some(CEV0NP_A::VALUE2), - 4 => Some(CEV0NP_A::VALUE3), - 7 => Some(CEV0NP_A::VALUE4), + 0 => Some(Cev0np::Value1), + 3 => Some(Cev0np::Value2), + 4 => Some(Cev0np::Value3), + 7 => Some(Cev0np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV0NP_A::VALUE1 + *self == Cev0np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV0NP_A::VALUE2 + *self == Cev0np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV0NP_A::VALUE3 + *self == Cev0np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV0NP_A::VALUE4 + *self == Cev0np::Value4 } } #[doc = "Field `CEV0NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV0NP_A>; -impl<'a, REG> CEV0NP_W<'a, REG> +pub type Cev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev0np>; +impl<'a, REG> Cev0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV0NP_A::VALUE1) + self.variant(Cev0np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV0NP_A::VALUE2) + self.variant(Cev0np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV0NP_A::VALUE3) + self.variant(Cev0np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV0NP_A::VALUE4) + self.variant(Cev0np::Value4) } } -#[doc = "Field `CEV1NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV1NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV1NP_A { +pub enum Cev1np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV1NP_A) -> Self { + fn from(variant: Cev1np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV1NP_A { +impl crate::FieldSpec for Cev1np { type Ux = u8; } -impl CEV1NP_R { +#[doc = "Field `CEV1NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev1npR = crate::FieldReader; +impl Cev1npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV1NP_A::VALUE1), - 3 => Some(CEV1NP_A::VALUE2), - 4 => Some(CEV1NP_A::VALUE3), - 7 => Some(CEV1NP_A::VALUE4), + 0 => Some(Cev1np::Value1), + 3 => Some(Cev1np::Value2), + 4 => Some(Cev1np::Value3), + 7 => Some(Cev1np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV1NP_A::VALUE1 + *self == Cev1np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV1NP_A::VALUE2 + *self == Cev1np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV1NP_A::VALUE3 + *self == Cev1np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV1NP_A::VALUE4 + *self == Cev1np::Value4 } } #[doc = "Field `CEV1NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV1NP_A>; -impl<'a, REG> CEV1NP_W<'a, REG> +pub type Cev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev1np>; +impl<'a, REG> Cev1npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV1NP_A::VALUE1) + self.variant(Cev1np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV1NP_A::VALUE2) + self.variant(Cev1np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV1NP_A::VALUE3) + self.variant(Cev1np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV1NP_A::VALUE4) + self.variant(Cev1np::Value4) } } -#[doc = "Field `CEV2NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV2NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV2NP_A { +pub enum Cev2np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV2NP_A) -> Self { + fn from(variant: Cev2np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV2NP_A { +impl crate::FieldSpec for Cev2np { type Ux = u8; } -impl CEV2NP_R { +#[doc = "Field `CEV2NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev2npR = crate::FieldReader; +impl Cev2npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV2NP_A::VALUE1), - 3 => Some(CEV2NP_A::VALUE2), - 4 => Some(CEV2NP_A::VALUE3), - 7 => Some(CEV2NP_A::VALUE4), + 0 => Some(Cev2np::Value1), + 3 => Some(Cev2np::Value2), + 4 => Some(Cev2np::Value3), + 7 => Some(Cev2np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV2NP_A::VALUE1 + *self == Cev2np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV2NP_A::VALUE2 + *self == Cev2np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV2NP_A::VALUE3 + *self == Cev2np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV2NP_A::VALUE4 + *self == Cev2np::Value4 } } #[doc = "Field `CEV2NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV2NP_A>; -impl<'a, REG> CEV2NP_W<'a, REG> +pub type Cev2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev2np>; +impl<'a, REG> Cev2npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV2NP_A::VALUE1) + self.variant(Cev2np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV2NP_A::VALUE2) + self.variant(Cev2np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV2NP_A::VALUE3) + self.variant(Cev2np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV2NP_A::VALUE4) + self.variant(Cev2np::Value4) } } -#[doc = "Field `CEV3NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV3NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV3NP_A { +pub enum Cev3np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV3NP_A) -> Self { + fn from(variant: Cev3np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV3NP_A { +impl crate::FieldSpec for Cev3np { type Ux = u8; } -impl CEV3NP_R { +#[doc = "Field `CEV3NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev3npR = crate::FieldReader; +impl Cev3npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV3NP_A::VALUE1), - 3 => Some(CEV3NP_A::VALUE2), - 4 => Some(CEV3NP_A::VALUE3), - 7 => Some(CEV3NP_A::VALUE4), + 0 => Some(Cev3np::Value1), + 3 => Some(Cev3np::Value2), + 4 => Some(Cev3np::Value3), + 7 => Some(Cev3np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV3NP_A::VALUE1 + *self == Cev3np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV3NP_A::VALUE2 + *self == Cev3np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV3NP_A::VALUE3 + *self == Cev3np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV3NP_A::VALUE4 + *self == Cev3np::Value4 } } #[doc = "Field `CEV3NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV3NP_A>; -impl<'a, REG> CEV3NP_W<'a, REG> +pub type Cev3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev3np>; +impl<'a, REG> Cev3npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV3NP_A::VALUE1) + self.variant(Cev3np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV3NP_A::VALUE2) + self.variant(Cev3np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV3NP_A::VALUE3) + self.variant(Cev3np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV3NP_A::VALUE4) + self.variant(Cev3np::Value4) } } -#[doc = "Field `CEV4NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV4NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV4NP_A { +pub enum Cev4np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV4NP_A) -> Self { + fn from(variant: Cev4np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV4NP_A { +impl crate::FieldSpec for Cev4np { type Ux = u8; } -impl CEV4NP_R { +#[doc = "Field `CEV4NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev4npR = crate::FieldReader; +impl Cev4npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV4NP_A::VALUE1), - 3 => Some(CEV4NP_A::VALUE2), - 4 => Some(CEV4NP_A::VALUE3), - 7 => Some(CEV4NP_A::VALUE4), + 0 => Some(Cev4np::Value1), + 3 => Some(Cev4np::Value2), + 4 => Some(Cev4np::Value3), + 7 => Some(Cev4np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV4NP_A::VALUE1 + *self == Cev4np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV4NP_A::VALUE2 + *self == Cev4np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV4NP_A::VALUE3 + *self == Cev4np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV4NP_A::VALUE4 + *self == Cev4np::Value4 } } #[doc = "Field `CEV4NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV4NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV4NP_A>; -impl<'a, REG> CEV4NP_W<'a, REG> +pub type Cev4npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev4np>; +impl<'a, REG> Cev4npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV4NP_A::VALUE1) + self.variant(Cev4np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV4NP_A::VALUE2) + self.variant(Cev4np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV4NP_A::VALUE3) + self.variant(Cev4np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV4NP_A::VALUE4) + self.variant(Cev4np::Value4) } } -#[doc = "Field `CEV5NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV5NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV5NP_A { +pub enum Cev5np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV5NP_A) -> Self { + fn from(variant: Cev5np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV5NP_A { +impl crate::FieldSpec for Cev5np { type Ux = u8; } -impl CEV5NP_R { +#[doc = "Field `CEV5NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev5npR = crate::FieldReader; +impl Cev5npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV5NP_A::VALUE1), - 3 => Some(CEV5NP_A::VALUE2), - 4 => Some(CEV5NP_A::VALUE3), - 7 => Some(CEV5NP_A::VALUE4), + 0 => Some(Cev5np::Value1), + 3 => Some(Cev5np::Value2), + 4 => Some(Cev5np::Value3), + 7 => Some(Cev5np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV5NP_A::VALUE1 + *self == Cev5np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV5NP_A::VALUE2 + *self == Cev5np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV5NP_A::VALUE3 + *self == Cev5np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV5NP_A::VALUE4 + *self == Cev5np::Value4 } } #[doc = "Field `CEV5NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV5NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV5NP_A>; -impl<'a, REG> CEV5NP_W<'a, REG> +pub type Cev5npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev5np>; +impl<'a, REG> Cev5npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV5NP_A::VALUE1) + self.variant(Cev5np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV5NP_A::VALUE2) + self.variant(Cev5np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV5NP_A::VALUE3) + self.variant(Cev5np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV5NP_A::VALUE4) + self.variant(Cev5np::Value4) } } -#[doc = "Field `CEV6NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV6NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV6NP_A { +pub enum Cev6np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV6NP_A) -> Self { + fn from(variant: Cev6np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV6NP_A { +impl crate::FieldSpec for Cev6np { type Ux = u8; } -impl CEV6NP_R { +#[doc = "Field `CEV6NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev6npR = crate::FieldReader; +impl Cev6npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV6NP_A::VALUE1), - 3 => Some(CEV6NP_A::VALUE2), - 4 => Some(CEV6NP_A::VALUE3), - 7 => Some(CEV6NP_A::VALUE4), + 0 => Some(Cev6np::Value1), + 3 => Some(Cev6np::Value2), + 4 => Some(Cev6np::Value3), + 7 => Some(Cev6np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV6NP_A::VALUE1 + *self == Cev6np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV6NP_A::VALUE2 + *self == Cev6np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV6NP_A::VALUE3 + *self == Cev6np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV6NP_A::VALUE4 + *self == Cev6np::Value4 } } #[doc = "Field `CEV6NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV6NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV6NP_A>; -impl<'a, REG> CEV6NP_W<'a, REG> +pub type Cev6npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev6np>; +impl<'a, REG> Cev6npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV6NP_A::VALUE1) + self.variant(Cev6np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV6NP_A::VALUE2) + self.variant(Cev6np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV6NP_A::VALUE3) + self.variant(Cev6np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV6NP_A::VALUE4) + self.variant(Cev6np::Value4) } } -#[doc = "Field `CEV7NP` reader - Service Request Node Pointer Channel Event i"] -pub type CEV7NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CEV7NP_A { +pub enum Cev7np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CEV7NP_A) -> Self { + fn from(variant: Cev7np) -> Self { variant as _ } } -impl crate::FieldSpec for CEV7NP_A { +impl crate::FieldSpec for Cev7np { type Ux = u8; } -impl CEV7NP_R { +#[doc = "Field `CEV7NP` reader - Service Request Node Pointer Channel Event i"] +pub type Cev7npR = crate::FieldReader; +impl Cev7npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CEV7NP_A::VALUE1), - 3 => Some(CEV7NP_A::VALUE2), - 4 => Some(CEV7NP_A::VALUE3), - 7 => Some(CEV7NP_A::VALUE4), + 0 => Some(Cev7np::Value1), + 3 => Some(Cev7np::Value2), + 4 => Some(Cev7np::Value3), + 7 => Some(Cev7np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CEV7NP_A::VALUE1 + *self == Cev7np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CEV7NP_A::VALUE2 + *self == Cev7np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CEV7NP_A::VALUE3 + *self == Cev7np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CEV7NP_A::VALUE4 + *self == Cev7np::Value4 } } #[doc = "Field `CEV7NP` writer - Service Request Node Pointer Channel Event i"] -pub type CEV7NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV7NP_A>; -impl<'a, REG> CEV7NP_W<'a, REG> +pub type Cev7npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev7np>; +impl<'a, REG> Cev7npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,139 +664,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV7NP_A::VALUE1) + self.variant(Cev7np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV7NP_A::VALUE2) + self.variant(Cev7np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CEV7NP_A::VALUE3) + self.variant(Cev7np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CEV7NP_A::VALUE4) + self.variant(Cev7np::Value4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev0np(&self) -> CEV0NP_R { - CEV0NP_R::new((self.bits & 0x0f) as u8) + pub fn cev0np(&self) -> Cev0npR { + Cev0npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev1np(&self) -> CEV1NP_R { - CEV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cev1np(&self) -> Cev1npR { + Cev1npR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev2np(&self) -> CEV2NP_R { - CEV2NP_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn cev2np(&self) -> Cev2npR { + Cev2npR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev3np(&self) -> CEV3NP_R { - CEV3NP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn cev3np(&self) -> Cev3npR { + Cev3npR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev4np(&self) -> CEV4NP_R { - CEV4NP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cev4np(&self) -> Cev4npR { + Cev4npR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev5np(&self) -> CEV5NP_R { - CEV5NP_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cev5np(&self) -> Cev5npR { + Cev5npR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev6np(&self) -> CEV6NP_R { - CEV6NP_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn cev6np(&self) -> Cev6npR { + Cev6npR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev7np(&self) -> CEV7NP_R { - CEV7NP_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn cev7np(&self) -> Cev7npR { + Cev7npR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev0np(&mut self) -> CEV0NP_W { - CEV0NP_W::new(self, 0) + pub fn cev0np(&mut self) -> Cev0npW { + Cev0npW::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev1np(&mut self) -> CEV1NP_W { - CEV1NP_W::new(self, 4) + pub fn cev1np(&mut self) -> Cev1npW { + Cev1npW::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev2np(&mut self) -> CEV2NP_W { - CEV2NP_W::new(self, 8) + pub fn cev2np(&mut self) -> Cev2npW { + Cev2npW::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev3np(&mut self) -> CEV3NP_W { - CEV3NP_W::new(self, 12) + pub fn cev3np(&mut self) -> Cev3npW { + Cev3npW::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev4np(&mut self) -> CEV4NP_W { - CEV4NP_W::new(self, 16) + pub fn cev4np(&mut self) -> Cev4npW { + Cev4npW::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev5np(&mut self) -> CEV5NP_W { - CEV5NP_W::new(self, 20) + pub fn cev5np(&mut self) -> Cev5npW { + Cev5npW::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev6np(&mut self) -> CEV6NP_W { - CEV6NP_W::new(self, 24) + pub fn cev6np(&mut self) -> Cev6npW { + Cev6npW::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev7np(&mut self) -> CEV7NP_W { - CEV7NP_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cev7np(&mut self) -> Cev7npW { + Cev7npW::new(self, 28) } } #[doc = "Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CEVNP0_SPEC; -impl crate::RegisterSpec for CEVNP0_SPEC { +pub struct Cevnp0Spec; +impl crate::RegisterSpec for Cevnp0Spec { type Ux = u32; } #[doc = "`read()` method returns [`cevnp0::R`](R) reader structure"] -impl crate::Readable for CEVNP0_SPEC {} +impl crate::Readable for Cevnp0Spec {} #[doc = "`write(|w| ..)` method takes [`cevnp0::W`](W) writer structure"] -impl crate::Writable for CEVNP0_SPEC { +impl crate::Writable for Cevnp0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEVNP0 to value 0"] -impl crate::Resettable for CEVNP0_SPEC { +impl crate::Resettable for Cevnp0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/chass.rs b/src/vadc_g0/chass.rs index 7d121d24..5895913c 100644 --- a/src/vadc_g0/chass.rs +++ b/src/vadc_g0/chass.rs @@ -1,546 +1,537 @@ #[doc = "Register `CHASS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHASS` writer"] -pub type W = crate::W; -#[doc = "Field `ASSCH0` reader - Assignment for Channel 0"] -pub type ASSCH0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Assignment for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH0_A { +pub enum Assch0 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH0_A) -> Self { + fn from(variant: Assch0) -> Self { variant as u8 != 0 } } -impl ASSCH0_R { +#[doc = "Field `ASSCH0` reader - Assignment for Channel 0"] +pub type Assch0R = crate::BitReader; +impl Assch0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH0_A { + pub const fn variant(&self) -> Assch0 { match self.bits { - false => ASSCH0_A::VALUE1, - true => ASSCH0_A::VALUE2, + false => Assch0::Value1, + true => Assch0::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH0_A::VALUE1 + *self == Assch0::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH0_A::VALUE2 + *self == Assch0::Value2 } } #[doc = "Field `ASSCH0` writer - Assignment for Channel 0"] -pub type ASSCH0_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH0_A>; -impl<'a, REG> ASSCH0_W<'a, REG> +pub type Assch0W<'a, REG> = crate::BitWriter<'a, REG, Assch0>; +impl<'a, REG> Assch0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH0_A::VALUE1) + self.variant(Assch0::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH0_A::VALUE2) + self.variant(Assch0::Value2) } } -#[doc = "Field `ASSCH1` reader - Assignment for Channel 1"] -pub type ASSCH1_R = crate::BitReader; #[doc = "Assignment for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH1_A { +pub enum Assch1 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH1_A) -> Self { + fn from(variant: Assch1) -> Self { variant as u8 != 0 } } -impl ASSCH1_R { +#[doc = "Field `ASSCH1` reader - Assignment for Channel 1"] +pub type Assch1R = crate::BitReader; +impl Assch1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH1_A { + pub const fn variant(&self) -> Assch1 { match self.bits { - false => ASSCH1_A::VALUE1, - true => ASSCH1_A::VALUE2, + false => Assch1::Value1, + true => Assch1::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH1_A::VALUE1 + *self == Assch1::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH1_A::VALUE2 + *self == Assch1::Value2 } } #[doc = "Field `ASSCH1` writer - Assignment for Channel 1"] -pub type ASSCH1_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH1_A>; -impl<'a, REG> ASSCH1_W<'a, REG> +pub type Assch1W<'a, REG> = crate::BitWriter<'a, REG, Assch1>; +impl<'a, REG> Assch1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH1_A::VALUE1) + self.variant(Assch1::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH1_A::VALUE2) + self.variant(Assch1::Value2) } } -#[doc = "Field `ASSCH2` reader - Assignment for Channel 2"] -pub type ASSCH2_R = crate::BitReader; #[doc = "Assignment for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH2_A { +pub enum Assch2 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH2_A) -> Self { + fn from(variant: Assch2) -> Self { variant as u8 != 0 } } -impl ASSCH2_R { +#[doc = "Field `ASSCH2` reader - Assignment for Channel 2"] +pub type Assch2R = crate::BitReader; +impl Assch2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH2_A { + pub const fn variant(&self) -> Assch2 { match self.bits { - false => ASSCH2_A::VALUE1, - true => ASSCH2_A::VALUE2, + false => Assch2::Value1, + true => Assch2::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH2_A::VALUE1 + *self == Assch2::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH2_A::VALUE2 + *self == Assch2::Value2 } } #[doc = "Field `ASSCH2` writer - Assignment for Channel 2"] -pub type ASSCH2_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH2_A>; -impl<'a, REG> ASSCH2_W<'a, REG> +pub type Assch2W<'a, REG> = crate::BitWriter<'a, REG, Assch2>; +impl<'a, REG> Assch2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH2_A::VALUE1) + self.variant(Assch2::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH2_A::VALUE2) + self.variant(Assch2::Value2) } } -#[doc = "Field `ASSCH3` reader - Assignment for Channel 3"] -pub type ASSCH3_R = crate::BitReader; #[doc = "Assignment for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH3_A { +pub enum Assch3 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH3_A) -> Self { + fn from(variant: Assch3) -> Self { variant as u8 != 0 } } -impl ASSCH3_R { +#[doc = "Field `ASSCH3` reader - Assignment for Channel 3"] +pub type Assch3R = crate::BitReader; +impl Assch3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH3_A { + pub const fn variant(&self) -> Assch3 { match self.bits { - false => ASSCH3_A::VALUE1, - true => ASSCH3_A::VALUE2, + false => Assch3::Value1, + true => Assch3::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH3_A::VALUE1 + *self == Assch3::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH3_A::VALUE2 + *self == Assch3::Value2 } } #[doc = "Field `ASSCH3` writer - Assignment for Channel 3"] -pub type ASSCH3_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH3_A>; -impl<'a, REG> ASSCH3_W<'a, REG> +pub type Assch3W<'a, REG> = crate::BitWriter<'a, REG, Assch3>; +impl<'a, REG> Assch3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH3_A::VALUE1) + self.variant(Assch3::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH3_A::VALUE2) + self.variant(Assch3::Value2) } } -#[doc = "Field `ASSCH4` reader - Assignment for Channel 4"] -pub type ASSCH4_R = crate::BitReader; #[doc = "Assignment for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH4_A { +pub enum Assch4 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH4_A) -> Self { + fn from(variant: Assch4) -> Self { variant as u8 != 0 } } -impl ASSCH4_R { +#[doc = "Field `ASSCH4` reader - Assignment for Channel 4"] +pub type Assch4R = crate::BitReader; +impl Assch4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH4_A { + pub const fn variant(&self) -> Assch4 { match self.bits { - false => ASSCH4_A::VALUE1, - true => ASSCH4_A::VALUE2, + false => Assch4::Value1, + true => Assch4::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH4_A::VALUE1 + *self == Assch4::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH4_A::VALUE2 + *self == Assch4::Value2 } } #[doc = "Field `ASSCH4` writer - Assignment for Channel 4"] -pub type ASSCH4_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH4_A>; -impl<'a, REG> ASSCH4_W<'a, REG> +pub type Assch4W<'a, REG> = crate::BitWriter<'a, REG, Assch4>; +impl<'a, REG> Assch4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH4_A::VALUE1) + self.variant(Assch4::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH4_A::VALUE2) + self.variant(Assch4::Value2) } } -#[doc = "Field `ASSCH5` reader - Assignment for Channel 5"] -pub type ASSCH5_R = crate::BitReader; #[doc = "Assignment for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH5_A { +pub enum Assch5 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH5_A) -> Self { + fn from(variant: Assch5) -> Self { variant as u8 != 0 } } -impl ASSCH5_R { +#[doc = "Field `ASSCH5` reader - Assignment for Channel 5"] +pub type Assch5R = crate::BitReader; +impl Assch5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH5_A { + pub const fn variant(&self) -> Assch5 { match self.bits { - false => ASSCH5_A::VALUE1, - true => ASSCH5_A::VALUE2, + false => Assch5::Value1, + true => Assch5::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH5_A::VALUE1 + *self == Assch5::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH5_A::VALUE2 + *self == Assch5::Value2 } } #[doc = "Field `ASSCH5` writer - Assignment for Channel 5"] -pub type ASSCH5_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH5_A>; -impl<'a, REG> ASSCH5_W<'a, REG> +pub type Assch5W<'a, REG> = crate::BitWriter<'a, REG, Assch5>; +impl<'a, REG> Assch5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH5_A::VALUE1) + self.variant(Assch5::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH5_A::VALUE2) + self.variant(Assch5::Value2) } } -#[doc = "Field `ASSCH6` reader - Assignment for Channel 6"] -pub type ASSCH6_R = crate::BitReader; #[doc = "Assignment for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH6_A { +pub enum Assch6 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH6_A) -> Self { + fn from(variant: Assch6) -> Self { variant as u8 != 0 } } -impl ASSCH6_R { +#[doc = "Field `ASSCH6` reader - Assignment for Channel 6"] +pub type Assch6R = crate::BitReader; +impl Assch6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH6_A { + pub const fn variant(&self) -> Assch6 { match self.bits { - false => ASSCH6_A::VALUE1, - true => ASSCH6_A::VALUE2, + false => Assch6::Value1, + true => Assch6::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH6_A::VALUE1 + *self == Assch6::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH6_A::VALUE2 + *self == Assch6::Value2 } } #[doc = "Field `ASSCH6` writer - Assignment for Channel 6"] -pub type ASSCH6_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH6_A>; -impl<'a, REG> ASSCH6_W<'a, REG> +pub type Assch6W<'a, REG> = crate::BitWriter<'a, REG, Assch6>; +impl<'a, REG> Assch6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH6_A::VALUE1) + self.variant(Assch6::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH6_A::VALUE2) + self.variant(Assch6::Value2) } } -#[doc = "Field `ASSCH7` reader - Assignment for Channel 7"] -pub type ASSCH7_R = crate::BitReader; #[doc = "Assignment for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSCH7_A { +pub enum Assch7 { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSCH7_A) -> Self { + fn from(variant: Assch7) -> Self { variant as u8 != 0 } } -impl ASSCH7_R { +#[doc = "Field `ASSCH7` reader - Assignment for Channel 7"] +pub type Assch7R = crate::BitReader; +impl Assch7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ASSCH7_A { + pub const fn variant(&self) -> Assch7 { match self.bits { - false => ASSCH7_A::VALUE1, - true => ASSCH7_A::VALUE2, + false => Assch7::Value1, + true => Assch7::Value2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ASSCH7_A::VALUE1 + *self == Assch7::Value1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ASSCH7_A::VALUE2 + *self == Assch7::Value2 } } #[doc = "Field `ASSCH7` writer - Assignment for Channel 7"] -pub type ASSCH7_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH7_A>; -impl<'a, REG> ASSCH7_W<'a, REG> +pub type Assch7W<'a, REG> = crate::BitWriter<'a, REG, Assch7>; +impl<'a, REG> Assch7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSCH7_A::VALUE1) + self.variant(Assch7::Value1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSCH7_A::VALUE2) + self.variant(Assch7::Value2) } } impl R { #[doc = "Bit 0 - Assignment for Channel 0"] #[inline(always)] - pub fn assch0(&self) -> ASSCH0_R { - ASSCH0_R::new((self.bits & 1) != 0) + pub fn assch0(&self) -> Assch0R { + Assch0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Assignment for Channel 1"] #[inline(always)] - pub fn assch1(&self) -> ASSCH1_R { - ASSCH1_R::new(((self.bits >> 1) & 1) != 0) + pub fn assch1(&self) -> Assch1R { + Assch1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Assignment for Channel 2"] #[inline(always)] - pub fn assch2(&self) -> ASSCH2_R { - ASSCH2_R::new(((self.bits >> 2) & 1) != 0) + pub fn assch2(&self) -> Assch2R { + Assch2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Assignment for Channel 3"] #[inline(always)] - pub fn assch3(&self) -> ASSCH3_R { - ASSCH3_R::new(((self.bits >> 3) & 1) != 0) + pub fn assch3(&self) -> Assch3R { + Assch3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Assignment for Channel 4"] #[inline(always)] - pub fn assch4(&self) -> ASSCH4_R { - ASSCH4_R::new(((self.bits >> 4) & 1) != 0) + pub fn assch4(&self) -> Assch4R { + Assch4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Assignment for Channel 5"] #[inline(always)] - pub fn assch5(&self) -> ASSCH5_R { - ASSCH5_R::new(((self.bits >> 5) & 1) != 0) + pub fn assch5(&self) -> Assch5R { + Assch5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Assignment for Channel 6"] #[inline(always)] - pub fn assch6(&self) -> ASSCH6_R { - ASSCH6_R::new(((self.bits >> 6) & 1) != 0) + pub fn assch6(&self) -> Assch6R { + Assch6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Assignment for Channel 7"] #[inline(always)] - pub fn assch7(&self) -> ASSCH7_R { - ASSCH7_R::new(((self.bits >> 7) & 1) != 0) + pub fn assch7(&self) -> Assch7R { + Assch7R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Assignment for Channel 0"] #[inline(always)] #[must_use] - pub fn assch0(&mut self) -> ASSCH0_W { - ASSCH0_W::new(self, 0) + pub fn assch0(&mut self) -> Assch0W { + Assch0W::new(self, 0) } #[doc = "Bit 1 - Assignment for Channel 1"] #[inline(always)] #[must_use] - pub fn assch1(&mut self) -> ASSCH1_W { - ASSCH1_W::new(self, 1) + pub fn assch1(&mut self) -> Assch1W { + Assch1W::new(self, 1) } #[doc = "Bit 2 - Assignment for Channel 2"] #[inline(always)] #[must_use] - pub fn assch2(&mut self) -> ASSCH2_W { - ASSCH2_W::new(self, 2) + pub fn assch2(&mut self) -> Assch2W { + Assch2W::new(self, 2) } #[doc = "Bit 3 - Assignment for Channel 3"] #[inline(always)] #[must_use] - pub fn assch3(&mut self) -> ASSCH3_W { - ASSCH3_W::new(self, 3) + pub fn assch3(&mut self) -> Assch3W { + Assch3W::new(self, 3) } #[doc = "Bit 4 - Assignment for Channel 4"] #[inline(always)] #[must_use] - pub fn assch4(&mut self) -> ASSCH4_W { - ASSCH4_W::new(self, 4) + pub fn assch4(&mut self) -> Assch4W { + Assch4W::new(self, 4) } #[doc = "Bit 5 - Assignment for Channel 5"] #[inline(always)] #[must_use] - pub fn assch5(&mut self) -> ASSCH5_W { - ASSCH5_W::new(self, 5) + pub fn assch5(&mut self) -> Assch5W { + Assch5W::new(self, 5) } #[doc = "Bit 6 - Assignment for Channel 6"] #[inline(always)] #[must_use] - pub fn assch6(&mut self) -> ASSCH6_W { - ASSCH6_W::new(self, 6) + pub fn assch6(&mut self) -> Assch6W { + Assch6W::new(self, 6) } #[doc = "Bit 7 - Assignment for Channel 7"] #[inline(always)] #[must_use] - pub fn assch7(&mut self) -> ASSCH7_W { - ASSCH7_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn assch7(&mut self) -> Assch7W { + Assch7W::new(self, 7) } } #[doc = "Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHASS_SPEC; -impl crate::RegisterSpec for CHASS_SPEC { +pub struct ChassSpec; +impl crate::RegisterSpec for ChassSpec { type Ux = u32; } #[doc = "`read()` method returns [`chass::R`](R) reader structure"] -impl crate::Readable for CHASS_SPEC {} +impl crate::Readable for ChassSpec {} #[doc = "`write(|w| ..)` method takes [`chass::W`](W) writer structure"] -impl crate::Writable for CHASS_SPEC { +impl crate::Writable for ChassSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHASS to value 0"] -impl crate::Resettable for CHASS_SPEC { +impl crate::Resettable for ChassSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/chctr.rs b/src/vadc_g0/chctr.rs index 90e6cb4a..cacd6cb6 100644 --- a/src/vadc_g0/chctr.rs +++ b/src/vadc_g0/chctr.rs @@ -1,67 +1,67 @@ #[doc = "Register `CHCTR[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHCTR[%s]` writer"] -pub type W = crate::W; -#[doc = "Field `ICLSEL` reader - Input Class Select"] -pub type ICLSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Input Class Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ICLSEL_A { +pub enum Iclsel { #[doc = "0: Use group-specific class 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use group-specific class 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Use global class 0"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Use global class 1"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ICLSEL_A) -> Self { + fn from(variant: Iclsel) -> Self { variant as _ } } -impl crate::FieldSpec for ICLSEL_A { +impl crate::FieldSpec for Iclsel { type Ux = u8; } -impl ICLSEL_R { +#[doc = "Field `ICLSEL` reader - Input Class Select"] +pub type IclselR = crate::FieldReader; +impl IclselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ICLSEL_A { + pub const fn variant(&self) -> Iclsel { match self.bits { - 0 => ICLSEL_A::VALUE1, - 1 => ICLSEL_A::VALUE2, - 2 => ICLSEL_A::VALUE3, - 3 => ICLSEL_A::VALUE4, + 0 => Iclsel::Value1, + 1 => Iclsel::Value2, + 2 => Iclsel::Value3, + 3 => Iclsel::Value4, _ => unreachable!(), } } #[doc = "Use group-specific class 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ICLSEL_A::VALUE1 + *self == Iclsel::Value1 } #[doc = "Use group-specific class 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ICLSEL_A::VALUE2 + *self == Iclsel::Value2 } #[doc = "Use global class 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ICLSEL_A::VALUE3 + *self == Iclsel::Value3 } #[doc = "Use global class 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ICLSEL_A::VALUE4 + *self == Iclsel::Value4 } } #[doc = "Field `ICLSEL` writer - Input Class Select"] -pub type ICLSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ICLSEL_A>; -impl<'a, REG> ICLSEL_W<'a, REG> +pub type IclselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Iclsel>; +impl<'a, REG> IclselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Use group-specific class 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ICLSEL_A::VALUE1) + self.variant(Iclsel::Value1) } #[doc = "Use group-specific class 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ICLSEL_A::VALUE2) + self.variant(Iclsel::Value2) } #[doc = "Use global class 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ICLSEL_A::VALUE3) + self.variant(Iclsel::Value3) } #[doc = "Use global class 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ICLSEL_A::VALUE4) + self.variant(Iclsel::Value4) } } -#[doc = "Field `BNDSELL` reader - Lower Boundary Select"] -pub type BNDSELL_R = crate::FieldReader; #[doc = "Lower Boundary Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BNDSELL_A { +pub enum Bndsell { #[doc = "0: Use group-specific boundary 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use group-specific boundary 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Use global boundary 0"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Use global boundary 1"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BNDSELL_A) -> Self { + fn from(variant: Bndsell) -> Self { variant as _ } } -impl crate::FieldSpec for BNDSELL_A { +impl crate::FieldSpec for Bndsell { type Ux = u8; } -impl BNDSELL_R { +#[doc = "Field `BNDSELL` reader - Lower Boundary Select"] +pub type BndsellR = crate::FieldReader; +impl BndsellR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BNDSELL_A { + pub const fn variant(&self) -> Bndsell { match self.bits { - 0 => BNDSELL_A::VALUE1, - 1 => BNDSELL_A::VALUE2, - 2 => BNDSELL_A::VALUE3, - 3 => BNDSELL_A::VALUE4, + 0 => Bndsell::Value1, + 1 => Bndsell::Value2, + 2 => Bndsell::Value3, + 3 => Bndsell::Value4, _ => unreachable!(), } } #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BNDSELL_A::VALUE1 + *self == Bndsell::Value1 } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BNDSELL_A::VALUE2 + *self == Bndsell::Value2 } #[doc = "Use global boundary 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BNDSELL_A::VALUE3 + *self == Bndsell::Value3 } #[doc = "Use global boundary 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BNDSELL_A::VALUE4 + *self == Bndsell::Value4 } } #[doc = "Field `BNDSELL` writer - Lower Boundary Select"] -pub type BNDSELL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BNDSELL_A>; -impl<'a, REG> BNDSELL_W<'a, REG> +pub type BndsellW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Bndsell>; +impl<'a, REG> BndsellW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BNDSELL_A::VALUE1) + self.variant(Bndsell::Value1) } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BNDSELL_A::VALUE2) + self.variant(Bndsell::Value2) } #[doc = "Use global boundary 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BNDSELL_A::VALUE3) + self.variant(Bndsell::Value3) } #[doc = "Use global boundary 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BNDSELL_A::VALUE4) + self.variant(Bndsell::Value4) } } -#[doc = "Field `BNDSELU` reader - Upper Boundary Select"] -pub type BNDSELU_R = crate::FieldReader; #[doc = "Upper Boundary Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BNDSELU_A { +pub enum Bndselu { #[doc = "0: Use group-specific boundary 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use group-specific boundary 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Use global boundary 0"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Use global boundary 1"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BNDSELU_A) -> Self { + fn from(variant: Bndselu) -> Self { variant as _ } } -impl crate::FieldSpec for BNDSELU_A { +impl crate::FieldSpec for Bndselu { type Ux = u8; } -impl BNDSELU_R { +#[doc = "Field `BNDSELU` reader - Upper Boundary Select"] +pub type BndseluR = crate::FieldReader; +impl BndseluR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BNDSELU_A { + pub const fn variant(&self) -> Bndselu { match self.bits { - 0 => BNDSELU_A::VALUE1, - 1 => BNDSELU_A::VALUE2, - 2 => BNDSELU_A::VALUE3, - 3 => BNDSELU_A::VALUE4, + 0 => Bndselu::Value1, + 1 => Bndselu::Value2, + 2 => Bndselu::Value3, + 3 => Bndselu::Value4, _ => unreachable!(), } } #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BNDSELU_A::VALUE1 + *self == Bndselu::Value1 } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BNDSELU_A::VALUE2 + *self == Bndselu::Value2 } #[doc = "Use global boundary 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == BNDSELU_A::VALUE3 + *self == Bndselu::Value3 } #[doc = "Use global boundary 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == BNDSELU_A::VALUE4 + *self == Bndselu::Value4 } } #[doc = "Field `BNDSELU` writer - Upper Boundary Select"] -pub type BNDSELU_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, BNDSELU_A>; -impl<'a, REG> BNDSELU_W<'a, REG> +pub type BndseluW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Bndselu>; +impl<'a, REG> BndseluW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BNDSELU_A::VALUE1) + self.variant(Bndselu::Value1) } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BNDSELU_A::VALUE2) + self.variant(Bndselu::Value2) } #[doc = "Use global boundary 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(BNDSELU_A::VALUE3) + self.variant(Bndselu::Value3) } #[doc = "Use global boundary 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(BNDSELU_A::VALUE4) + self.variant(Bndselu::Value4) } } -#[doc = "Field `CHEVMODE` reader - Channel Event Mode"] -pub type CHEVMODE_R = crate::FieldReader; #[doc = "Channel Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CHEVMODE_A { +pub enum Chevmode { #[doc = "0: Never"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: NCM: Always (ignore band) FCM: If result switches to either level"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CHEVMODE_A) -> Self { + fn from(variant: Chevmode) -> Self { variant as _ } } -impl crate::FieldSpec for CHEVMODE_A { +impl crate::FieldSpec for Chevmode { type Ux = u8; } -impl CHEVMODE_R { +#[doc = "Field `CHEVMODE` reader - Channel Event Mode"] +pub type ChevmodeR = crate::FieldReader; +impl ChevmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> CHEVMODE_A { + pub const fn variant(&self) -> Chevmode { match self.bits { - 0 => CHEVMODE_A::VALUE1, - 1 => CHEVMODE_A::VALUE2, - 2 => CHEVMODE_A::VALUE3, - 3 => CHEVMODE_A::VALUE4, + 0 => Chevmode::Value1, + 1 => Chevmode::Value2, + 2 => Chevmode::Value3, + 3 => Chevmode::Value4, _ => unreachable!(), } } #[doc = "Never"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CHEVMODE_A::VALUE1 + *self == Chevmode::Value1 } #[doc = "NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CHEVMODE_A::VALUE2 + *self == Chevmode::Value2 } #[doc = "NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CHEVMODE_A::VALUE3 + *self == Chevmode::Value3 } #[doc = "NCM: Always (ignore band) FCM: If result switches to either level"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == CHEVMODE_A::VALUE4 + *self == Chevmode::Value4 } } #[doc = "Field `CHEVMODE` writer - Channel Event Mode"] -pub type CHEVMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, CHEVMODE_A>; -impl<'a, REG> CHEVMODE_W<'a, REG> +pub type ChevmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Chevmode>; +impl<'a, REG> ChevmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,174 +324,174 @@ where #[doc = "Never"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CHEVMODE_A::VALUE1) + self.variant(Chevmode::Value1) } #[doc = "NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CHEVMODE_A::VALUE2) + self.variant(Chevmode::Value2) } #[doc = "NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CHEVMODE_A::VALUE3) + self.variant(Chevmode::Value3) } #[doc = "NCM: Always (ignore band) FCM: If result switches to either level"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(CHEVMODE_A::VALUE4) + self.variant(Chevmode::Value4) } } -#[doc = "Field `SYNC` reader - Synchronization Request"] -pub type SYNC_R = crate::BitReader; #[doc = "Synchronization Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SYNC_A { +pub enum Sync { #[doc = "0: No synchroniz. request, standalone operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request a synchronized conversion of this channel (only taken into account for a master)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SYNC_A) -> Self { + fn from(variant: Sync) -> Self { variant as u8 != 0 } } -impl SYNC_R { +#[doc = "Field `SYNC` reader - Synchronization Request"] +pub type SyncR = crate::BitReader; +impl SyncR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SYNC_A { + pub const fn variant(&self) -> Sync { match self.bits { - false => SYNC_A::VALUE1, - true => SYNC_A::VALUE2, + false => Sync::Value1, + true => Sync::Value2, } } #[doc = "No synchroniz. request, standalone operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SYNC_A::VALUE1 + *self == Sync::Value1 } #[doc = "Request a synchronized conversion of this channel (only taken into account for a master)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SYNC_A::VALUE2 + *self == Sync::Value2 } } #[doc = "Field `SYNC` writer - Synchronization Request"] -pub type SYNC_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_A>; -impl<'a, REG> SYNC_W<'a, REG> +pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; +impl<'a, REG> SyncW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No synchroniz. request, standalone operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SYNC_A::VALUE1) + self.variant(Sync::Value1) } #[doc = "Request a synchronized conversion of this channel (only taken into account for a master)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SYNC_A::VALUE2) + self.variant(Sync::Value2) } } -#[doc = "Field `REFSEL` reader - Reference Input Selection"] -pub type REFSEL_R = crate::BitReader; #[doc = "Reference Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REFSEL_A { +pub enum Refsel { #[doc = "0: Standard reference input VAREF"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Alternate reference input from CH0"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REFSEL_A) -> Self { + fn from(variant: Refsel) -> Self { variant as u8 != 0 } } -impl REFSEL_R { +#[doc = "Field `REFSEL` reader - Reference Input Selection"] +pub type RefselR = crate::BitReader; +impl RefselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REFSEL_A { + pub const fn variant(&self) -> Refsel { match self.bits { - false => REFSEL_A::VALUE1, - true => REFSEL_A::VALUE2, + false => Refsel::Value1, + true => Refsel::Value2, } } #[doc = "Standard reference input VAREF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REFSEL_A::VALUE1 + *self == Refsel::Value1 } #[doc = "Alternate reference input from CH0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REFSEL_A::VALUE2 + *self == Refsel::Value2 } } #[doc = "Field `REFSEL` writer - Reference Input Selection"] -pub type REFSEL_W<'a, REG> = crate::BitWriter<'a, REG, REFSEL_A>; -impl<'a, REG> REFSEL_W<'a, REG> +pub type RefselW<'a, REG> = crate::BitWriter<'a, REG, Refsel>; +impl<'a, REG> RefselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard reference input VAREF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REFSEL_A::VALUE1) + self.variant(Refsel::Value1) } #[doc = "Alternate reference input from CH0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REFSEL_A::VALUE2) + self.variant(Refsel::Value2) } } -#[doc = "Field `RESREG` reader - Result Register"] -pub type RESREG_R = crate::FieldReader; #[doc = "Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RESREG_A { +pub enum Resreg { #[doc = "0: Store result in group result register GxRES0"] - VALUE1 = 0, + Value1 = 0, #[doc = "15: Store result in group result register GxRES15"] - VALUE2 = 15, + Value2 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RESREG_A) -> Self { + fn from(variant: Resreg) -> Self { variant as _ } } -impl crate::FieldSpec for RESREG_A { +impl crate::FieldSpec for Resreg { type Ux = u8; } -impl RESREG_R { +#[doc = "Field `RESREG` reader - Result Register"] +pub type ResregR = crate::FieldReader; +impl ResregR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(RESREG_A::VALUE1), - 15 => Some(RESREG_A::VALUE2), + 0 => Some(Resreg::Value1), + 15 => Some(Resreg::Value2), _ => None, } } #[doc = "Store result in group result register GxRES0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESREG_A::VALUE1 + *self == Resreg::Value1 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESREG_A::VALUE2 + *self == Resreg::Value2 } } #[doc = "Field `RESREG` writer - Result Register"] -pub type RESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RESREG_A>; -impl<'a, REG> RESREG_W<'a, REG> +pub type ResregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Resreg>; +impl<'a, REG> ResregW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -499,164 +499,164 @@ where #[doc = "Store result in group result register GxRES0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESREG_A::VALUE1) + self.variant(Resreg::Value1) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESREG_A::VALUE2) + self.variant(Resreg::Value2) } } -#[doc = "Field `RESTBS` reader - Result Target for Background Source"] -pub type RESTBS_R = crate::BitReader; #[doc = "Result Target for Background Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESTBS_A { +pub enum Restbs { #[doc = "0: Store results in the selected group result register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Store results in the global result register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESTBS_A) -> Self { + fn from(variant: Restbs) -> Self { variant as u8 != 0 } } -impl RESTBS_R { +#[doc = "Field `RESTBS` reader - Result Target for Background Source"] +pub type RestbsR = crate::BitReader; +impl RestbsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESTBS_A { + pub const fn variant(&self) -> Restbs { match self.bits { - false => RESTBS_A::VALUE1, - true => RESTBS_A::VALUE2, + false => Restbs::Value1, + true => Restbs::Value2, } } #[doc = "Store results in the selected group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESTBS_A::VALUE1 + *self == Restbs::Value1 } #[doc = "Store results in the global result register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESTBS_A::VALUE2 + *self == Restbs::Value2 } } #[doc = "Field `RESTBS` writer - Result Target for Background Source"] -pub type RESTBS_W<'a, REG> = crate::BitWriter<'a, REG, RESTBS_A>; -impl<'a, REG> RESTBS_W<'a, REG> +pub type RestbsW<'a, REG> = crate::BitWriter<'a, REG, Restbs>; +impl<'a, REG> RestbsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Store results in the selected group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESTBS_A::VALUE1) + self.variant(Restbs::Value1) } #[doc = "Store results in the global result register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESTBS_A::VALUE2) + self.variant(Restbs::Value2) } } -#[doc = "Field `RESPOS` reader - Result Position"] -pub type RESPOS_R = crate::BitReader; #[doc = "Result Position\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RESPOS_A { +pub enum Respos { #[doc = "0: Store results left-aligned"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Store results right-aligned"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RESPOS_A) -> Self { + fn from(variant: Respos) -> Self { variant as u8 != 0 } } -impl RESPOS_R { +#[doc = "Field `RESPOS` reader - Result Position"] +pub type ResposR = crate::BitReader; +impl ResposR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RESPOS_A { + pub const fn variant(&self) -> Respos { match self.bits { - false => RESPOS_A::VALUE1, - true => RESPOS_A::VALUE2, + false => Respos::Value1, + true => Respos::Value2, } } #[doc = "Store results left-aligned"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RESPOS_A::VALUE1 + *self == Respos::Value1 } #[doc = "Store results right-aligned"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RESPOS_A::VALUE2 + *self == Respos::Value2 } } #[doc = "Field `RESPOS` writer - Result Position"] -pub type RESPOS_W<'a, REG> = crate::BitWriter<'a, REG, RESPOS_A>; -impl<'a, REG> RESPOS_W<'a, REG> +pub type ResposW<'a, REG> = crate::BitWriter<'a, REG, Respos>; +impl<'a, REG> ResposW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Store results left-aligned"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RESPOS_A::VALUE1) + self.variant(Respos::Value1) } #[doc = "Store results right-aligned"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RESPOS_A::VALUE2) + self.variant(Respos::Value2) } } -#[doc = "Field `BWDCH` reader - Broken Wire Detection Channel"] -pub type BWDCH_R = crate::FieldReader; #[doc = "Broken Wire Detection Channel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum BWDCH_A { +pub enum Bwdch { #[doc = "0: Select VAGND"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Select VAREF"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: BWDCH_A) -> Self { + fn from(variant: Bwdch) -> Self { variant as _ } } -impl crate::FieldSpec for BWDCH_A { +impl crate::FieldSpec for Bwdch { type Ux = u8; } -impl BWDCH_R { +#[doc = "Field `BWDCH` reader - Broken Wire Detection Channel"] +pub type BwdchR = crate::FieldReader; +impl BwdchR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(BWDCH_A::VALUE1), - 1 => Some(BWDCH_A::VALUE2), + 0 => Some(Bwdch::Value1), + 1 => Some(Bwdch::Value2), _ => None, } } #[doc = "Select VAGND"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWDCH_A::VALUE1 + *self == Bwdch::Value1 } #[doc = "Select VAREF"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWDCH_A::VALUE2 + *self == Bwdch::Value2 } } #[doc = "Field `BWDCH` writer - Broken Wire Detection Channel"] -pub type BWDCH_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BWDCH_A>; -impl<'a, REG> BWDCH_W<'a, REG> +pub type BwdchW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bwdch>; +impl<'a, REG> BwdchW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,216 +664,207 @@ where #[doc = "Select VAGND"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWDCH_A::VALUE1) + self.variant(Bwdch::Value1) } #[doc = "Select VAREF"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWDCH_A::VALUE2) + self.variant(Bwdch::Value2) } } -#[doc = "Field `BWDEN` reader - Broken Wire Detection Enable"] -pub type BWDEN_R = crate::BitReader; #[doc = "Broken Wire Detection Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum BWDEN_A { +pub enum Bwden { #[doc = "0: Normal operation"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Additional preparation phase is enabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: BWDEN_A) -> Self { + fn from(variant: Bwden) -> Self { variant as u8 != 0 } } -impl BWDEN_R { +#[doc = "Field `BWDEN` reader - Broken Wire Detection Enable"] +pub type BwdenR = crate::BitReader; +impl BwdenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> BWDEN_A { + pub const fn variant(&self) -> Bwden { match self.bits { - false => BWDEN_A::VALUE1, - true => BWDEN_A::VALUE2, + false => Bwden::Value1, + true => Bwden::Value2, } } #[doc = "Normal operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == BWDEN_A::VALUE1 + *self == Bwden::Value1 } #[doc = "Additional preparation phase is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == BWDEN_A::VALUE2 + *self == Bwden::Value2 } } #[doc = "Field `BWDEN` writer - Broken Wire Detection Enable"] -pub type BWDEN_W<'a, REG> = crate::BitWriter<'a, REG, BWDEN_A>; -impl<'a, REG> BWDEN_W<'a, REG> +pub type BwdenW<'a, REG> = crate::BitWriter<'a, REG, Bwden>; +impl<'a, REG> BwdenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(BWDEN_A::VALUE1) + self.variant(Bwden::Value1) } #[doc = "Additional preparation phase is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(BWDEN_A::VALUE2) + self.variant(Bwden::Value2) } } impl R { #[doc = "Bits 0:1 - Input Class Select"] #[inline(always)] - pub fn iclsel(&self) -> ICLSEL_R { - ICLSEL_R::new((self.bits & 3) as u8) + pub fn iclsel(&self) -> IclselR { + IclselR::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - Lower Boundary Select"] #[inline(always)] - pub fn bndsell(&self) -> BNDSELL_R { - BNDSELL_R::new(((self.bits >> 4) & 3) as u8) + pub fn bndsell(&self) -> BndsellR { + BndsellR::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Upper Boundary Select"] #[inline(always)] - pub fn bndselu(&self) -> BNDSELU_R { - BNDSELU_R::new(((self.bits >> 6) & 3) as u8) + pub fn bndselu(&self) -> BndseluR { + BndseluR::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Channel Event Mode"] #[inline(always)] - pub fn chevmode(&self) -> CHEVMODE_R { - CHEVMODE_R::new(((self.bits >> 8) & 3) as u8) + pub fn chevmode(&self) -> ChevmodeR { + ChevmodeR::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Synchronization Request"] #[inline(always)] - pub fn sync(&self) -> SYNC_R { - SYNC_R::new(((self.bits >> 10) & 1) != 0) + pub fn sync(&self) -> SyncR { + SyncR::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Reference Input Selection"] #[inline(always)] - pub fn refsel(&self) -> REFSEL_R { - REFSEL_R::new(((self.bits >> 11) & 1) != 0) + pub fn refsel(&self) -> RefselR { + RefselR::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 16:19 - Result Register"] #[inline(always)] - pub fn resreg(&self) -> RESREG_R { - RESREG_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn resreg(&self) -> ResregR { + ResregR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Result Target for Background Source"] #[inline(always)] - pub fn restbs(&self) -> RESTBS_R { - RESTBS_R::new(((self.bits >> 20) & 1) != 0) + pub fn restbs(&self) -> RestbsR { + RestbsR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Result Position"] #[inline(always)] - pub fn respos(&self) -> RESPOS_R { - RESPOS_R::new(((self.bits >> 21) & 1) != 0) + pub fn respos(&self) -> ResposR { + ResposR::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 28:29 - Broken Wire Detection Channel"] #[inline(always)] - pub fn bwdch(&self) -> BWDCH_R { - BWDCH_R::new(((self.bits >> 28) & 3) as u8) + pub fn bwdch(&self) -> BwdchR { + BwdchR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Broken Wire Detection Enable"] #[inline(always)] - pub fn bwden(&self) -> BWDEN_R { - BWDEN_R::new(((self.bits >> 30) & 1) != 0) + pub fn bwden(&self) -> BwdenR { + BwdenR::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Input Class Select"] #[inline(always)] #[must_use] - pub fn iclsel(&mut self) -> ICLSEL_W { - ICLSEL_W::new(self, 0) + pub fn iclsel(&mut self) -> IclselW { + IclselW::new(self, 0) } #[doc = "Bits 4:5 - Lower Boundary Select"] #[inline(always)] #[must_use] - pub fn bndsell(&mut self) -> BNDSELL_W { - BNDSELL_W::new(self, 4) + pub fn bndsell(&mut self) -> BndsellW { + BndsellW::new(self, 4) } #[doc = "Bits 6:7 - Upper Boundary Select"] #[inline(always)] #[must_use] - pub fn bndselu(&mut self) -> BNDSELU_W { - BNDSELU_W::new(self, 6) + pub fn bndselu(&mut self) -> BndseluW { + BndseluW::new(self, 6) } #[doc = "Bits 8:9 - Channel Event Mode"] #[inline(always)] #[must_use] - pub fn chevmode(&mut self) -> CHEVMODE_W { - CHEVMODE_W::new(self, 8) + pub fn chevmode(&mut self) -> ChevmodeW { + ChevmodeW::new(self, 8) } #[doc = "Bit 10 - Synchronization Request"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SYNC_W { - SYNC_W::new(self, 10) + pub fn sync(&mut self) -> SyncW { + SyncW::new(self, 10) } #[doc = "Bit 11 - Reference Input Selection"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> REFSEL_W { - REFSEL_W::new(self, 11) + pub fn refsel(&mut self) -> RefselW { + RefselW::new(self, 11) } #[doc = "Bits 16:19 - Result Register"] #[inline(always)] #[must_use] - pub fn resreg(&mut self) -> RESREG_W { - RESREG_W::new(self, 16) + pub fn resreg(&mut self) -> ResregW { + ResregW::new(self, 16) } #[doc = "Bit 20 - Result Target for Background Source"] #[inline(always)] #[must_use] - pub fn restbs(&mut self) -> RESTBS_W { - RESTBS_W::new(self, 20) + pub fn restbs(&mut self) -> RestbsW { + RestbsW::new(self, 20) } #[doc = "Bit 21 - Result Position"] #[inline(always)] #[must_use] - pub fn respos(&mut self) -> RESPOS_W { - RESPOS_W::new(self, 21) + pub fn respos(&mut self) -> ResposW { + ResposW::new(self, 21) } #[doc = "Bits 28:29 - Broken Wire Detection Channel"] #[inline(always)] #[must_use] - pub fn bwdch(&mut self) -> BWDCH_W { - BWDCH_W::new(self, 28) + pub fn bwdch(&mut self) -> BwdchW { + BwdchW::new(self, 28) } #[doc = "Bit 30 - Broken Wire Detection Enable"] #[inline(always)] #[must_use] - pub fn bwden(&mut self) -> BWDEN_W { - BWDEN_W::new(self, 30) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn bwden(&mut self) -> BwdenW { + BwdenW::new(self, 30) } } #[doc = "Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CHCTR_SPEC; -impl crate::RegisterSpec for CHCTR_SPEC { +pub struct ChctrSpec; +impl crate::RegisterSpec for ChctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`chctr::R`](R) reader structure"] -impl crate::Readable for CHCTR_SPEC {} +impl crate::Readable for ChctrSpec {} #[doc = "`write(|w| ..)` method takes [`chctr::W`](W) writer structure"] -impl crate::Writable for CHCTR_SPEC { +impl crate::Writable for ChctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHCTR[%s] to value 0"] -impl crate::Resettable for CHCTR_SPEC { +impl crate::Resettable for ChctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/emuxctr.rs b/src/vadc_g0/emuxctr.rs index abe7cd12..edc0047e 100644 --- a/src/vadc_g0/emuxctr.rs +++ b/src/vadc_g0/emuxctr.rs @@ -1,77 +1,77 @@ #[doc = "Register `EMUXCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EMUXCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EMUXSET` reader - External Multiplexer Start Selection"] -pub type EMUXSET_R = crate::FieldReader; +pub type EmuxsetR = crate::FieldReader; #[doc = "Field `EMUXSET` writer - External Multiplexer Start Selection"] -pub type EMUXSET_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type EmuxsetW<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `EMUXACT` reader - External Multiplexer Actual Selection"] -pub type EMUXACT_R = crate::FieldReader; +pub type EmuxactR = crate::FieldReader; #[doc = "Field `EMUXCH` reader - External Multiplexer Channel Select"] -pub type EMUXCH_R = crate::FieldReader; +pub type EmuxchR = crate::FieldReader; #[doc = "Field `EMUXCH` writer - External Multiplexer Channel Select"] -pub type EMUXCH_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; -#[doc = "Field `EMUXMODE` reader - External Multiplexer Mode"] -pub type EMUXMODE_R = crate::FieldReader; +pub type EmuxchW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "External Multiplexer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EMUXMODE_A { +pub enum Emuxmode { #[doc = "0: Software control (no hardware action)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Steady mode (use EMUXSET value)"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Single-step mode"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Sequence mode"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EMUXMODE_A) -> Self { + fn from(variant: Emuxmode) -> Self { variant as _ } } -impl crate::FieldSpec for EMUXMODE_A { +impl crate::FieldSpec for Emuxmode { type Ux = u8; } -impl EMUXMODE_R { +#[doc = "Field `EMUXMODE` reader - External Multiplexer Mode"] +pub type EmuxmodeR = crate::FieldReader; +impl EmuxmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMUXMODE_A { + pub const fn variant(&self) -> Emuxmode { match self.bits { - 0 => EMUXMODE_A::VALUE1, - 1 => EMUXMODE_A::VALUE2, - 2 => EMUXMODE_A::VALUE3, - 3 => EMUXMODE_A::VALUE4, + 0 => Emuxmode::Value1, + 1 => Emuxmode::Value2, + 2 => Emuxmode::Value3, + 3 => Emuxmode::Value4, _ => unreachable!(), } } #[doc = "Software control (no hardware action)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMUXMODE_A::VALUE1 + *self == Emuxmode::Value1 } #[doc = "Steady mode (use EMUXSET value)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMUXMODE_A::VALUE2 + *self == Emuxmode::Value2 } #[doc = "Single-step mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == EMUXMODE_A::VALUE3 + *self == Emuxmode::Value3 } #[doc = "Sequence mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EMUXMODE_A::VALUE4 + *self == Emuxmode::Value4 } } #[doc = "Field `EMUXMODE` writer - External Multiplexer Mode"] -pub type EMUXMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, EMUXMODE_A>; -impl<'a, REG> EMUXMODE_W<'a, REG> +pub type EmuxmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Emuxmode>; +impl<'a, REG> EmuxmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -79,295 +79,286 @@ where #[doc = "Software control (no hardware action)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMUXMODE_A::VALUE1) + self.variant(Emuxmode::Value1) } #[doc = "Steady mode (use EMUXSET value)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMUXMODE_A::VALUE2) + self.variant(Emuxmode::Value2) } #[doc = "Single-step mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(EMUXMODE_A::VALUE3) + self.variant(Emuxmode::Value3) } #[doc = "Sequence mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(EMUXMODE_A::VALUE4) + self.variant(Emuxmode::Value4) } } -#[doc = "Field `EMXCOD` reader - External Multiplexer Coding Scheme"] -pub type EMXCOD_R = crate::BitReader; #[doc = "External Multiplexer Coding Scheme\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMXCOD_A { +pub enum Emxcod { #[doc = "0: Output the channel number in binary code"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Output the channel number in Gray code"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMXCOD_A) -> Self { + fn from(variant: Emxcod) -> Self { variant as u8 != 0 } } -impl EMXCOD_R { +#[doc = "Field `EMXCOD` reader - External Multiplexer Coding Scheme"] +pub type EmxcodR = crate::BitReader; +impl EmxcodR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMXCOD_A { + pub const fn variant(&self) -> Emxcod { match self.bits { - false => EMXCOD_A::VALUE1, - true => EMXCOD_A::VALUE2, + false => Emxcod::Value1, + true => Emxcod::Value2, } } #[doc = "Output the channel number in binary code"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMXCOD_A::VALUE1 + *self == Emxcod::Value1 } #[doc = "Output the channel number in Gray code"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMXCOD_A::VALUE2 + *self == Emxcod::Value2 } } #[doc = "Field `EMXCOD` writer - External Multiplexer Coding Scheme"] -pub type EMXCOD_W<'a, REG> = crate::BitWriter<'a, REG, EMXCOD_A>; -impl<'a, REG> EMXCOD_W<'a, REG> +pub type EmxcodW<'a, REG> = crate::BitWriter<'a, REG, Emxcod>; +impl<'a, REG> EmxcodW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Output the channel number in binary code"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMXCOD_A::VALUE1) + self.variant(Emxcod::Value1) } #[doc = "Output the channel number in Gray code"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMXCOD_A::VALUE2) + self.variant(Emxcod::Value2) } } -#[doc = "Field `EMXST` reader - External Multiplexer Sample Time Control"] -pub type EMXST_R = crate::BitReader; #[doc = "External Multiplexer Sample Time Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMXST_A { +pub enum Emxst { #[doc = "0: Use STCE whenever the setting changes"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Use STCE for each conversion of an external channel"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMXST_A) -> Self { + fn from(variant: Emxst) -> Self { variant as u8 != 0 } } -impl EMXST_R { +#[doc = "Field `EMXST` reader - External Multiplexer Sample Time Control"] +pub type EmxstR = crate::BitReader; +impl EmxstR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMXST_A { + pub const fn variant(&self) -> Emxst { match self.bits { - false => EMXST_A::VALUE1, - true => EMXST_A::VALUE2, + false => Emxst::Value1, + true => Emxst::Value2, } } #[doc = "Use STCE whenever the setting changes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMXST_A::VALUE1 + *self == Emxst::Value1 } #[doc = "Use STCE for each conversion of an external channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMXST_A::VALUE2 + *self == Emxst::Value2 } } #[doc = "Field `EMXST` writer - External Multiplexer Sample Time Control"] -pub type EMXST_W<'a, REG> = crate::BitWriter<'a, REG, EMXST_A>; -impl<'a, REG> EMXST_W<'a, REG> +pub type EmxstW<'a, REG> = crate::BitWriter<'a, REG, Emxst>; +impl<'a, REG> EmxstW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use STCE whenever the setting changes"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMXST_A::VALUE1) + self.variant(Emxst::Value1) } #[doc = "Use STCE for each conversion of an external channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMXST_A::VALUE2) + self.variant(Emxst::Value2) } } -#[doc = "Field `EMXCSS` reader - External Multiplexer Channel Selection Style"] -pub type EMXCSS_R = crate::BitReader; #[doc = "External Multiplexer Channel Selection Style\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMXCSS_A { +pub enum Emxcss { #[doc = "0: Channel number: Bitfield EMUXCH selects an arbitrary channel"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMXCSS_A) -> Self { + fn from(variant: Emxcss) -> Self { variant as u8 != 0 } } -impl EMXCSS_R { +#[doc = "Field `EMXCSS` reader - External Multiplexer Channel Selection Style"] +pub type EmxcssR = crate::BitReader; +impl EmxcssR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMXCSS_A { + pub const fn variant(&self) -> Emxcss { match self.bits { - false => EMXCSS_A::VALUE1, - true => EMXCSS_A::VALUE2, + false => Emxcss::Value1, + true => Emxcss::Value2, } } #[doc = "Channel number: Bitfield EMUXCH selects an arbitrary channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMXCSS_A::VALUE1 + *self == Emxcss::Value1 } #[doc = "Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMXCSS_A::VALUE2 + *self == Emxcss::Value2 } } #[doc = "Write Control for EMUX Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMXWC_AW { +pub enum Emxwc { #[doc = "0: No write access to EMUX cfg."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMXWC_AW) -> Self { + fn from(variant: Emxwc) -> Self { variant as u8 != 0 } } #[doc = "Field `EMXWC` writer - Write Control for EMUX Configuration"] -pub type EMXWC_W<'a, REG> = crate::BitWriter<'a, REG, EMXWC_AW>; -impl<'a, REG> EMXWC_W<'a, REG> +pub type EmxwcW<'a, REG> = crate::BitWriter<'a, REG, Emxwc>; +impl<'a, REG> EmxwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to EMUX cfg."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EMXWC_AW::VALUE1) + self.variant(Emxwc::Value1) } #[doc = "Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EMXWC_AW::VALUE2) + self.variant(Emxwc::Value2) } } impl R { #[doc = "Bits 0:2 - External Multiplexer Start Selection"] #[inline(always)] - pub fn emuxset(&self) -> EMUXSET_R { - EMUXSET_R::new((self.bits & 7) as u8) + pub fn emuxset(&self) -> EmuxsetR { + EmuxsetR::new((self.bits & 7) as u8) } #[doc = "Bits 8:10 - External Multiplexer Actual Selection"] #[inline(always)] - pub fn emuxact(&self) -> EMUXACT_R { - EMUXACT_R::new(((self.bits >> 8) & 7) as u8) + pub fn emuxact(&self) -> EmuxactR { + EmuxactR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:25 - External Multiplexer Channel Select"] #[inline(always)] - pub fn emuxch(&self) -> EMUXCH_R { - EMUXCH_R::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn emuxch(&self) -> EmuxchR { + EmuxchR::new(((self.bits >> 16) & 0x03ff) as u16) } #[doc = "Bits 26:27 - External Multiplexer Mode"] #[inline(always)] - pub fn emuxmode(&self) -> EMUXMODE_R { - EMUXMODE_R::new(((self.bits >> 26) & 3) as u8) + pub fn emuxmode(&self) -> EmuxmodeR { + EmuxmodeR::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bit 28 - External Multiplexer Coding Scheme"] #[inline(always)] - pub fn emxcod(&self) -> EMXCOD_R { - EMXCOD_R::new(((self.bits >> 28) & 1) != 0) + pub fn emxcod(&self) -> EmxcodR { + EmxcodR::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - External Multiplexer Sample Time Control"] #[inline(always)] - pub fn emxst(&self) -> EMXST_R { - EMXST_R::new(((self.bits >> 29) & 1) != 0) + pub fn emxst(&self) -> EmxstR { + EmxstR::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - External Multiplexer Channel Selection Style"] #[inline(always)] - pub fn emxcss(&self) -> EMXCSS_R { - EMXCSS_R::new(((self.bits >> 30) & 1) != 0) + pub fn emxcss(&self) -> EmxcssR { + EmxcssR::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - External Multiplexer Start Selection"] #[inline(always)] #[must_use] - pub fn emuxset(&mut self) -> EMUXSET_W { - EMUXSET_W::new(self, 0) + pub fn emuxset(&mut self) -> EmuxsetW { + EmuxsetW::new(self, 0) } #[doc = "Bits 16:25 - External Multiplexer Channel Select"] #[inline(always)] #[must_use] - pub fn emuxch(&mut self) -> EMUXCH_W { - EMUXCH_W::new(self, 16) + pub fn emuxch(&mut self) -> EmuxchW { + EmuxchW::new(self, 16) } #[doc = "Bits 26:27 - External Multiplexer Mode"] #[inline(always)] #[must_use] - pub fn emuxmode(&mut self) -> EMUXMODE_W { - EMUXMODE_W::new(self, 26) + pub fn emuxmode(&mut self) -> EmuxmodeW { + EmuxmodeW::new(self, 26) } #[doc = "Bit 28 - External Multiplexer Coding Scheme"] #[inline(always)] #[must_use] - pub fn emxcod(&mut self) -> EMXCOD_W { - EMXCOD_W::new(self, 28) + pub fn emxcod(&mut self) -> EmxcodW { + EmxcodW::new(self, 28) } #[doc = "Bit 29 - External Multiplexer Sample Time Control"] #[inline(always)] #[must_use] - pub fn emxst(&mut self) -> EMXST_W { - EMXST_W::new(self, 29) + pub fn emxst(&mut self) -> EmxstW { + EmxstW::new(self, 29) } #[doc = "Bit 31 - Write Control for EMUX Configuration"] #[inline(always)] #[must_use] - pub fn emxwc(&mut self) -> EMXWC_W { - EMXWC_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn emxwc(&mut self) -> EmxwcW { + EmxwcW::new(self, 31) } } #[doc = "E0ternal Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EMUXCTR_SPEC; -impl crate::RegisterSpec for EMUXCTR_SPEC { +pub struct EmuxctrSpec; +impl crate::RegisterSpec for EmuxctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`emuxctr::R`](R) reader structure"] -impl crate::Readable for EMUXCTR_SPEC {} +impl crate::Readable for EmuxctrSpec {} #[doc = "`write(|w| ..)` method takes [`emuxctr::W`](W) writer structure"] -impl crate::Writable for EMUXCTR_SPEC { +impl crate::Writable for EmuxctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EMUXCTR to value 0"] -impl crate::Resettable for EMUXCTR_SPEC { +impl crate::Resettable for EmuxctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/iclass.rs b/src/vadc_g0/iclass.rs index 7f5b7bd7..c373962e 100644 --- a/src/vadc_g0/iclass.rs +++ b/src/vadc_g0/iclass.rs @@ -1,71 +1,71 @@ #[doc = "Register `ICLASS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ICLASS[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STCS` reader - Sample Time Control for Standard Conversions"] -pub type STCS_R = crate::FieldReader; +pub type StcsR = crate::FieldReader; #[doc = "Field `STCS` writer - Sample Time Control for Standard Conversions"] -pub type STCS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] -pub type CMS_R = crate::FieldReader; +pub type StcsW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for Standard Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CMS_A { +pub enum Cms { #[doc = "0: 12-bit conversion"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10-bit conversion"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 8-bit conversion"] - VALUE3 = 2, + Value3 = 2, #[doc = "5: 10-bit fast compare mode"] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CMS_A) -> Self { + fn from(variant: Cms) -> Self { variant as _ } } -impl crate::FieldSpec for CMS_A { +impl crate::FieldSpec for Cms { type Ux = u8; } -impl CMS_R { +#[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] +pub type CmsR = crate::FieldReader; +impl CmsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CMS_A::VALUE1), - 1 => Some(CMS_A::VALUE2), - 2 => Some(CMS_A::VALUE3), - 5 => Some(CMS_A::VALUE6), + 0 => Some(Cms::Value1), + 1 => Some(Cms::Value2), + 2 => Some(Cms::Value3), + 5 => Some(Cms::Value6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CMS_A::VALUE1 + *self == Cms::Value1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CMS_A::VALUE2 + *self == Cms::Value2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CMS_A::VALUE3 + *self == Cms::Value3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == CMS_A::VALUE6 + *self == Cms::Value6 } } #[doc = "Field `CMS` writer - Conversion Mode for Standard Conversions"] -pub type CMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMS_A>; -impl<'a, REG> CMS_W<'a, REG> +pub type CmsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cms>; +impl<'a, REG> CmsW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -73,88 +73,88 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE1) + self.variant(Cms::Value1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE2) + self.variant(Cms::Value2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE3) + self.variant(Cms::Value3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(CMS_A::VALUE6) + self.variant(Cms::Value6) } } #[doc = "Field `STCE` reader - Sample Time Control for EMUX Conversions"] -pub type STCE_R = crate::FieldReader; +pub type StceR = crate::FieldReader; #[doc = "Field `STCE` writer - Sample Time Control for EMUX Conversions"] -pub type STCE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; -#[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] -pub type CME_R = crate::FieldReader; +pub type StceW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for EMUX Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CME_A { +pub enum Cme { #[doc = "0: 12-bit conversion"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: 10-bit conversion"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: 8-bit conversion"] - VALUE3 = 2, + Value3 = 2, #[doc = "5: 10-bit fast compare mode"] - VALUE6 = 5, + Value6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CME_A) -> Self { + fn from(variant: Cme) -> Self { variant as _ } } -impl crate::FieldSpec for CME_A { +impl crate::FieldSpec for Cme { type Ux = u8; } -impl CME_R { +#[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] +pub type CmeR = crate::FieldReader; +impl CmeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CME_A::VALUE1), - 1 => Some(CME_A::VALUE2), - 2 => Some(CME_A::VALUE3), - 5 => Some(CME_A::VALUE6), + 0 => Some(Cme::Value1), + 1 => Some(Cme::Value2), + 2 => Some(Cme::Value3), + 5 => Some(Cme::Value6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CME_A::VALUE1 + *self == Cme::Value1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CME_A::VALUE2 + *self == Cme::Value2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CME_A::VALUE3 + *self == Cme::Value3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == CME_A::VALUE6 + *self == Cme::Value6 } } #[doc = "Field `CME` writer - Conversion Mode for EMUX Conversions"] -pub type CME_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CME_A>; -impl<'a, REG> CME_W<'a, REG> +pub type CmeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cme>; +impl<'a, REG> CmeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -162,96 +162,87 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE1) + self.variant(Cme::Value1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE2) + self.variant(Cme::Value2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE3) + self.variant(Cme::Value3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(CME_A::VALUE6) + self.variant(Cme::Value6) } } impl R { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - pub fn stcs(&self) -> STCS_R { - STCS_R::new((self.bits & 0x1f) as u8) + pub fn stcs(&self) -> StcsR { + StcsR::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - pub fn cms(&self) -> CMS_R { - CMS_R::new(((self.bits >> 8) & 7) as u8) + pub fn cms(&self) -> CmsR { + CmsR::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - pub fn stce(&self) -> STCE_R { - STCE_R::new(((self.bits >> 16) & 0x1f) as u8) + pub fn stce(&self) -> StceR { + StceR::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - pub fn cme(&self) -> CME_R { - CME_R::new(((self.bits >> 24) & 7) as u8) + pub fn cme(&self) -> CmeR { + CmeR::new(((self.bits >> 24) & 7) as u8) } } impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] #[must_use] - pub fn stcs(&mut self) -> STCS_W { - STCS_W::new(self, 0) + pub fn stcs(&mut self) -> StcsW { + StcsW::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] #[must_use] - pub fn cms(&mut self) -> CMS_W { - CMS_W::new(self, 8) + pub fn cms(&mut self) -> CmsW { + CmsW::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn stce(&mut self) -> STCE_W { - STCE_W::new(self, 16) + pub fn stce(&mut self) -> StceW { + StceW::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn cme(&mut self) -> CME_W { - CME_W::new(self, 24) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn cme(&mut self) -> CmeW { + CmeW::new(self, 24) } } #[doc = "Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ICLASS_SPEC; -impl crate::RegisterSpec for ICLASS_SPEC { +pub struct IclassSpec; +impl crate::RegisterSpec for IclassSpec { type Ux = u32; } #[doc = "`read()` method returns [`iclass::R`](R) reader structure"] -impl crate::Readable for ICLASS_SPEC {} +impl crate::Readable for IclassSpec {} #[doc = "`write(|w| ..)` method takes [`iclass::W`](W) writer structure"] -impl crate::Writable for ICLASS_SPEC { +impl crate::Writable for IclassSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICLASS[%s] to value 0"] -impl crate::Resettable for ICLASS_SPEC { +impl crate::Resettable for IclassSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/q0r0.rs b/src/vadc_g0/q0r0.rs index 4bdcd6a7..f92ed8cf 100644 --- a/src/vadc_g0/q0r0.rs +++ b/src/vadc_g0/q0r0.rs @@ -1,186 +1,186 @@ #[doc = "Register `Q0R0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `REQCHNR` reader - Request Channel Number"] -pub type REQCHNR_R = crate::FieldReader; -#[doc = "Field `RF` reader - Refill"] -pub type RF_R = crate::BitReader; +pub type ReqchnrR = crate::FieldReader; #[doc = "Refill\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RF_A { +pub enum Rf { #[doc = "0: The request is discarded after the conversion start."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The request is automatically refilled into the queue after the conversion start."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RF_A) -> Self { + fn from(variant: Rf) -> Self { variant as u8 != 0 } } -impl RF_R { +#[doc = "Field `RF` reader - Refill"] +pub type RfR = crate::BitReader; +impl RfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RF_A { + pub const fn variant(&self) -> Rf { match self.bits { - false => RF_A::VALUE1, - true => RF_A::VALUE2, + false => Rf::Value1, + true => Rf::Value2, } } #[doc = "The request is discarded after the conversion start."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RF_A::VALUE1 + *self == Rf::Value1 } #[doc = "The request is automatically refilled into the queue after the conversion start."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RF_A::VALUE2 + *self == Rf::Value2 } } -#[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type ENSI_R = crate::BitReader; #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENSI_A { +pub enum Ensi { #[doc = "0: No request source interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A request source event interrupt is generated upon a request source event (related conversion is finished)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENSI_A) -> Self { + fn from(variant: Ensi) -> Self { variant as u8 != 0 } } -impl ENSI_R { +#[doc = "Field `ENSI` reader - Enable Source Interrupt"] +pub type EnsiR = crate::BitReader; +impl EnsiR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENSI_A { + pub const fn variant(&self) -> Ensi { match self.bits { - false => ENSI_A::VALUE1, - true => ENSI_A::VALUE2, + false => Ensi::Value1, + true => Ensi::Value2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENSI_A::VALUE1 + *self == Ensi::Value1 } #[doc = "A request source event interrupt is generated upon a request source event (related conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENSI_A::VALUE2 + *self == Ensi::Value2 } } -#[doc = "Field `EXTR` reader - External Trigger"] -pub type EXTR_R = crate::BitReader; #[doc = "External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXTR_A { +pub enum Extr { #[doc = "0: A valid queue entry immediately leads to a conversion request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The request handler waits for a trigger event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXTR_A) -> Self { + fn from(variant: Extr) -> Self { variant as u8 != 0 } } -impl EXTR_R { +#[doc = "Field `EXTR` reader - External Trigger"] +pub type ExtrR = crate::BitReader; +impl ExtrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EXTR_A { + pub const fn variant(&self) -> Extr { match self.bits { - false => EXTR_A::VALUE1, - true => EXTR_A::VALUE2, + false => Extr::Value1, + true => Extr::Value2, } } #[doc = "A valid queue entry immediately leads to a conversion request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EXTR_A::VALUE1 + *self == Extr::Value1 } #[doc = "The request handler waits for a trigger event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EXTR_A::VALUE2 + *self == Extr::Value2 } } -#[doc = "Field `V` reader - Request Channel Number Valid"] -pub type V_R = crate::BitReader; #[doc = "Request Channel Number Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum V_A { +pub enum V { #[doc = "0: No valid queue entry"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The queue entry is valid and leads to a conversion request"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: V_A) -> Self { + fn from(variant: V) -> Self { variant as u8 != 0 } } -impl V_R { +#[doc = "Field `V` reader - Request Channel Number Valid"] +pub type VR = crate::BitReader; +impl VR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> V_A { + pub const fn variant(&self) -> V { match self.bits { - false => V_A::VALUE1, - true => V_A::VALUE2, + false => V::Value1, + true => V::Value2, } } #[doc = "No valid queue entry"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == V_A::VALUE1 + *self == V::Value1 } #[doc = "The queue entry is valid and leads to a conversion request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == V_A::VALUE2 + *self == V::Value2 } } impl R { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] - pub fn reqchnr(&self) -> REQCHNR_R { - REQCHNR_R::new((self.bits & 0x1f) as u8) + pub fn reqchnr(&self) -> ReqchnrR { + ReqchnrR::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Refill"] #[inline(always)] - pub fn rf(&self) -> RF_R { - RF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rf(&self) -> RfR { + RfR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> ENSI_R { - ENSI_R::new(((self.bits >> 6) & 1) != 0) + pub fn ensi(&self) -> EnsiR { + EnsiR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] - pub fn extr(&self) -> EXTR_R { - EXTR_R::new(((self.bits >> 7) & 1) != 0) + pub fn extr(&self) -> ExtrR { + ExtrR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Request Channel Number Valid"] #[inline(always)] - pub fn v(&self) -> V_R { - V_R::new(((self.bits >> 8) & 1) != 0) + pub fn v(&self) -> VR { + VR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Q0R0_SPEC; -impl crate::RegisterSpec for Q0R0_SPEC { +pub struct Q0r0Spec; +impl crate::RegisterSpec for Q0r0Spec { type Ux = u32; } #[doc = "`read()` method returns [`q0r0::R`](R) reader structure"] -impl crate::Readable for Q0R0_SPEC {} +impl crate::Readable for Q0r0Spec {} #[doc = "`reset()` method sets Q0R0 to value 0"] -impl crate::Resettable for Q0R0_SPEC { +impl crate::Resettable for Q0r0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qbur0.rs b/src/vadc_g0/qbur0.rs index bcd1b382..67355fbc 100644 --- a/src/vadc_g0/qbur0.rs +++ b/src/vadc_g0/qbur0.rs @@ -1,84 +1,84 @@ #[doc = "Register `QBUR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `REQCHNR` reader - Request Channel Number"] -pub type REQCHNR_R = crate::FieldReader; +pub type ReqchnrR = crate::FieldReader; #[doc = "Field `RF` reader - Refill"] -pub type RF_R = crate::BitReader; +pub type RfR = crate::BitReader; #[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type ENSI_R = crate::BitReader; +pub type EnsiR = crate::BitReader; #[doc = "Field `EXTR` reader - External Trigger"] -pub type EXTR_R = crate::BitReader; -#[doc = "Field `V` reader - Request Channel Number Valid"] -pub type V_R = crate::BitReader; +pub type ExtrR = crate::BitReader; #[doc = "Request Channel Number Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum V_A { +pub enum V { #[doc = "0: Backup register not valid"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: V_A) -> Self { + fn from(variant: V) -> Self { variant as u8 != 0 } } -impl V_R { +#[doc = "Field `V` reader - Request Channel Number Valid"] +pub type VR = crate::BitReader; +impl VR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> V_A { + pub const fn variant(&self) -> V { match self.bits { - false => V_A::VALUE1, - true => V_A::VALUE2, + false => V::Value1, + true => V::Value2, } } #[doc = "Backup register not valid"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == V_A::VALUE1 + *self == V::Value1 } #[doc = "Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == V_A::VALUE2 + *self == V::Value2 } } impl R { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] - pub fn reqchnr(&self) -> REQCHNR_R { - REQCHNR_R::new((self.bits & 0x1f) as u8) + pub fn reqchnr(&self) -> ReqchnrR { + ReqchnrR::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Refill"] #[inline(always)] - pub fn rf(&self) -> RF_R { - RF_R::new(((self.bits >> 5) & 1) != 0) + pub fn rf(&self) -> RfR { + RfR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> ENSI_R { - ENSI_R::new(((self.bits >> 6) & 1) != 0) + pub fn ensi(&self) -> EnsiR { + EnsiR::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] - pub fn extr(&self) -> EXTR_R { - EXTR_R::new(((self.bits >> 7) & 1) != 0) + pub fn extr(&self) -> ExtrR { + ExtrR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Request Channel Number Valid"] #[inline(always)] - pub fn v(&self) -> V_R { - V_R::new(((self.bits >> 8) & 1) != 0) + pub fn v(&self) -> VR { + VR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QBUR0_SPEC; -impl crate::RegisterSpec for QBUR0_SPEC { +pub struct Qbur0Spec; +impl crate::RegisterSpec for Qbur0Spec { type Ux = u32; } #[doc = "`read()` method returns [`qbur0::R`](R) reader structure"] -impl crate::Readable for QBUR0_SPEC {} +impl crate::Readable for Qbur0Spec {} #[doc = "`reset()` method sets QBUR0 to value 0"] -impl crate::Resettable for QBUR0_SPEC { +impl crate::Resettable for Qbur0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qctrl0.rs b/src/vadc_g0/qctrl0.rs index 08d1a215..eddf23bc 100644 --- a/src/vadc_g0/qctrl0.rs +++ b/src/vadc_g0/qctrl0.rs @@ -1,59 +1,59 @@ #[doc = "Register `QCTRL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QCTRL0` writer"] -pub type W = crate::W; -#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SRCRESREG_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SRCRESREG_A { +pub enum Srcresreg { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Store result in group result register GxRES1"] - VALUE2 = 1, + Value2 = 1, #[doc = "15: Store result in group result register GxRES15"] - VALUE3 = 15, + Value3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SRCRESREG_A) -> Self { + fn from(variant: Srcresreg) -> Self { variant as _ } } -impl crate::FieldSpec for SRCRESREG_A { +impl crate::FieldSpec for Srcresreg { type Ux = u8; } -impl SRCRESREG_R { +#[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] +pub type SrcresregR = crate::FieldReader; +impl SrcresregR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SRCRESREG_A::VALUE1), - 1 => Some(SRCRESREG_A::VALUE2), - 15 => Some(SRCRESREG_A::VALUE3), + 0 => Some(Srcresreg::Value1), + 1 => Some(Srcresreg::Value2), + 15 => Some(Srcresreg::Value3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRCRESREG_A::VALUE1 + *self == Srcresreg::Value1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRCRESREG_A::VALUE2 + *self == Srcresreg::Value2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SRCRESREG_A::VALUE3 + *self == Srcresreg::Value3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; -impl<'a, REG> SRCRESREG_W<'a, REG> +pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; +impl<'a, REG> SrcresregW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -61,85 +61,85 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE1) + self.variant(Srcresreg::Value1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE2) + self.variant(Srcresreg::Value2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SRCRESREG_A::VALUE3) + self.variant(Srcresreg::Value3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XTSEL_R = crate::FieldReader; +pub type XtselR = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XTLVL_R = crate::BitReader; -#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XTMODE_R = crate::FieldReader; +pub type XtlvlR = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum XTMODE_A { +pub enum Xtmode { #[doc = "0: No external trigger"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Trigger event upon a falling edge"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Trigger event upon a rising edge"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Trigger event upon any edge"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: XTMODE_A) -> Self { + fn from(variant: Xtmode) -> Self { variant as _ } } -impl crate::FieldSpec for XTMODE_A { +impl crate::FieldSpec for Xtmode { type Ux = u8; } -impl XTMODE_R { +#[doc = "Field `XTMODE` reader - Trigger Operating Mode"] +pub type XtmodeR = crate::FieldReader; +impl XtmodeR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> XTMODE_A { + pub const fn variant(&self) -> Xtmode { match self.bits { - 0 => XTMODE_A::VALUE1, - 1 => XTMODE_A::VALUE2, - 2 => XTMODE_A::VALUE3, - 3 => XTMODE_A::VALUE4, + 0 => Xtmode::Value1, + 1 => Xtmode::Value2, + 2 => Xtmode::Value3, + 3 => Xtmode::Value4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == XTMODE_A::VALUE1 + *self == Xtmode::Value1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == XTMODE_A::VALUE2 + *self == Xtmode::Value2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == XTMODE_A::VALUE3 + *self == Xtmode::Value3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == XTMODE_A::VALUE4 + *self == Xtmode::Value4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XTMODE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, XTMODE_A>; -impl<'a, REG> XTMODE_W<'a, REG> +pub type XtmodeW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Xtmode>; +impl<'a, REG> XtmodeW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -147,286 +147,277 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE1) + self.variant(Xtmode::Value1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE2) + self.variant(Xtmode::Value2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE3) + self.variant(Xtmode::Value3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(XTMODE_A::VALUE4) + self.variant(Xtmode::Value4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum XTWC_AW { +pub enum Xtwc { #[doc = "0: No write access to trigger configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: XTWC_AW) -> Self { + fn from(variant: Xtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_AW>; -impl<'a, REG> XTWC_W<'a, REG> +pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; +impl<'a, REG> XtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE1) + self.variant(Xtwc::Value1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(XTWC_AW::VALUE2) + self.variant(Xtwc::Value2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GTSEL_R = crate::FieldReader; +pub type GtselR = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GTLVL_R = crate::BitReader; +pub type GtlvlR = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GTWC_AW { +pub enum Gtwc { #[doc = "0: No write access to gate configuration"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GTWC_AW) -> Self { + fn from(variant: Gtwc) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_AW>; -impl<'a, REG> GTWC_W<'a, REG> +pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; +impl<'a, REG> GtwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE1) + self.variant(Gtwc::Value1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GTWC_AW::VALUE2) + self.variant(Gtwc::Value2) } } -#[doc = "Field `TMEN` reader - Timer Mode Enable"] -pub type TMEN_R = crate::BitReader; #[doc = "Timer Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TMEN_A { +pub enum Tmen { #[doc = "0: No timer mode: standard gating mechanism can be used"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TMEN_A) -> Self { + fn from(variant: Tmen) -> Self { variant as u8 != 0 } } -impl TMEN_R { +#[doc = "Field `TMEN` reader - Timer Mode Enable"] +pub type TmenR = crate::BitReader; +impl TmenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TMEN_A { + pub const fn variant(&self) -> Tmen { match self.bits { - false => TMEN_A::VALUE1, - true => TMEN_A::VALUE2, + false => Tmen::Value1, + true => Tmen::Value2, } } #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TMEN_A::VALUE1 + *self == Tmen::Value1 } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TMEN_A::VALUE2 + *self == Tmen::Value2 } } #[doc = "Field `TMEN` writer - Timer Mode Enable"] -pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; -impl<'a, REG> TMEN_W<'a, REG> +pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; +impl<'a, REG> TmenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE1) + self.variant(Tmen::Value1) } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TMEN_A::VALUE2) + self.variant(Tmen::Value2) } } #[doc = "Write Control for Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TMWC_AW { +pub enum Tmwc { #[doc = "0: No write access to timer mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield TMEN can be written"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TMWC_AW) -> Self { + fn from(variant: Tmwc) -> Self { variant as u8 != 0 } } #[doc = "Field `TMWC` writer - Write Control for Timer Mode"] -pub type TMWC_W<'a, REG> = crate::BitWriter<'a, REG, TMWC_AW>; -impl<'a, REG> TMWC_W<'a, REG> +pub type TmwcW<'a, REG> = crate::BitWriter<'a, REG, Tmwc>; +impl<'a, REG> TmwcW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to timer mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TMWC_AW::VALUE1) + self.variant(Tmwc::Value1) } #[doc = "Bitfield TMEN can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TMWC_AW::VALUE2) + self.variant(Tmwc::Value2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SRCRESREG_R { - SRCRESREG_R::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SrcresregR { + SrcresregR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XTSEL_R { - XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XtselR { + XtselR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XTLVL_R { - XTLVL_R::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XtlvlR { + XtlvlR::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XTMODE_R { - XTMODE_R::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XtmodeR { + XtmodeR::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GTSEL_R { - GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GtselR { + GtselR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GTLVL_R { - GTLVL_R::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GtlvlR { + GtlvlR::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - pub fn tmen(&self) -> TMEN_R { - TMEN_R::new(((self.bits >> 28) & 1) != 0) + pub fn tmen(&self) -> TmenR { + TmenR::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SRCRESREG_W { - SRCRESREG_W::new(self, 0) + pub fn srcresreg(&mut self) -> SrcresregW { + SrcresregW::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XTSEL_W { - XTSEL_W::new(self, 8) + pub fn xtsel(&mut self) -> XtselW { + XtselW::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XTMODE_W { - XTMODE_W::new(self, 13) + pub fn xtmode(&mut self) -> XtmodeW { + XtmodeW::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XTWC_W { - XTWC_W::new(self, 15) + pub fn xtwc(&mut self) -> XtwcW { + XtwcW::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GTSEL_W { - GTSEL_W::new(self, 16) + pub fn gtsel(&mut self) -> GtselW { + GtselW::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GTWC_W { - GTWC_W::new(self, 23) + pub fn gtwc(&mut self) -> GtwcW { + GtwcW::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TMEN_W { - TMEN_W::new(self, 28) + pub fn tmen(&mut self) -> TmenW { + TmenW::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] #[must_use] - pub fn tmwc(&mut self) -> TMWC_W { - TMWC_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn tmwc(&mut self) -> TmwcW { + TmwcW::new(self, 31) } } #[doc = "Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QCTRL0_SPEC; -impl crate::RegisterSpec for QCTRL0_SPEC { +pub struct Qctrl0Spec; +impl crate::RegisterSpec for Qctrl0Spec { type Ux = u32; } #[doc = "`read()` method returns [`qctrl0::R`](R) reader structure"] -impl crate::Readable for QCTRL0_SPEC {} +impl crate::Readable for Qctrl0Spec {} #[doc = "`write(|w| ..)` method takes [`qctrl0::W`](W) writer structure"] -impl crate::Writable for QCTRL0_SPEC { +impl crate::Writable for Qctrl0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QCTRL0 to value 0"] -impl crate::Resettable for QCTRL0_SPEC { +impl crate::Resettable for Qctrl0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qinr0.rs b/src/vadc_g0/qinr0.rs index bad5b764..52791e2b 100644 --- a/src/vadc_g0/qinr0.rs +++ b/src/vadc_g0/qinr0.rs @@ -1,147 +1,138 @@ #[doc = "Register `QINR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REQCHNR` writer - Request Channel Number"] -pub type REQCHNR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ReqchnrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Refill\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RF_AW { +pub enum Rf { #[doc = "0: No refill: this queue entry is converted once and then invalidated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RF_AW) -> Self { + fn from(variant: Rf) -> Self { variant as u8 != 0 } } #[doc = "Field `RF` writer - Refill"] -pub type RF_W<'a, REG> = crate::BitWriter<'a, REG, RF_AW>; -impl<'a, REG> RF_W<'a, REG> +pub type RfW<'a, REG> = crate::BitWriter<'a, REG, Rf>; +impl<'a, REG> RfW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No refill: this queue entry is converted once and then invalidated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RF_AW::VALUE1) + self.variant(Rf::Value1) } #[doc = "Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RF_AW::VALUE2) + self.variant(Rf::Value2) } } #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENSI_AW { +pub enum Ensi { #[doc = "0: No request source interrupt"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A request source event interrupt is generated upon a request source event (related conversion is finished)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENSI_AW) -> Self { + fn from(variant: Ensi) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_AW>; -impl<'a, REG> ENSI_W<'a, REG> +pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; +impl<'a, REG> EnsiW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENSI_AW::VALUE1) + self.variant(Ensi::Value1) } #[doc = "A request source event interrupt is generated upon a request source event (related conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENSI_AW::VALUE2) + self.variant(Ensi::Value2) } } #[doc = "External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EXTR_AW { +pub enum Extr { #[doc = "0: A valid queue entry immediately leads to a conversion request."] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A valid queue entry waits for a trigger event to occur before issuing a conversion request."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EXTR_AW) -> Self { + fn from(variant: Extr) -> Self { variant as u8 != 0 } } #[doc = "Field `EXTR` writer - External Trigger"] -pub type EXTR_W<'a, REG> = crate::BitWriter<'a, REG, EXTR_AW>; -impl<'a, REG> EXTR_W<'a, REG> +pub type ExtrW<'a, REG> = crate::BitWriter<'a, REG, Extr>; +impl<'a, REG> ExtrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A valid queue entry immediately leads to a conversion request."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EXTR_AW::VALUE1) + self.variant(Extr::Value1) } #[doc = "A valid queue entry waits for a trigger event to occur before issuing a conversion request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EXTR_AW::VALUE2) + self.variant(Extr::Value2) } } impl W { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] #[must_use] - pub fn reqchnr(&mut self) -> REQCHNR_W { - REQCHNR_W::new(self, 0) + pub fn reqchnr(&mut self) -> ReqchnrW { + ReqchnrW::new(self, 0) } #[doc = "Bit 5 - Refill"] #[inline(always)] #[must_use] - pub fn rf(&mut self) -> RF_W { - RF_W::new(self, 5) + pub fn rf(&mut self) -> RfW { + RfW::new(self, 5) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> ENSI_W { - ENSI_W::new(self, 6) + pub fn ensi(&mut self) -> EnsiW { + EnsiW::new(self, 6) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] #[must_use] - pub fn extr(&mut self) -> EXTR_W { - EXTR_W::new(self, 7) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn extr(&mut self) -> ExtrW { + ExtrW::new(self, 7) } } #[doc = "Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QINR0_SPEC; -impl crate::RegisterSpec for QINR0_SPEC { +pub struct Qinr0Spec; +impl crate::RegisterSpec for Qinr0Spec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`qinr0::W`](W) writer structure"] -impl crate::Writable for QINR0_SPEC { +impl crate::Writable for Qinr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QINR0 to value 0"] -impl crate::Resettable for QINR0_SPEC { +impl crate::Resettable for Qinr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qmr0.rs b/src/vadc_g0/qmr0.rs index e519883d..b1f86de5 100644 --- a/src/vadc_g0/qmr0.rs +++ b/src/vadc_g0/qmr0.rs @@ -1,67 +1,67 @@ #[doc = "Register `QMR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QMR0` writer"] -pub type W = crate::W; -#[doc = "Field `ENGT` reader - Enable Gate"] -pub type ENGT_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ENGT_A { +pub enum Engt { #[doc = "0: No conversion requests are issued"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ENGT_A) -> Self { + fn from(variant: Engt) -> Self { variant as _ } } -impl crate::FieldSpec for ENGT_A { +impl crate::FieldSpec for Engt { type Ux = u8; } -impl ENGT_R { +#[doc = "Field `ENGT` reader - Enable Gate"] +pub type EngtR = crate::FieldReader; +impl EngtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENGT_A { + pub const fn variant(&self) -> Engt { match self.bits { - 0 => ENGT_A::VALUE1, - 1 => ENGT_A::VALUE2, - 2 => ENGT_A::VALUE3, - 3 => ENGT_A::VALUE4, + 0 => Engt::Value1, + 1 => Engt::Value2, + 2 => Engt::Value3, + 3 => Engt::Value4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENGT_A::VALUE1 + *self == Engt::Value1 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENGT_A::VALUE2 + *self == Engt::Value2 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == ENGT_A::VALUE3 + *self == Engt::Value3 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == ENGT_A::VALUE4 + *self == Engt::Value4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type ENGT_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, ENGT_A>; -impl<'a, REG> ENGT_W<'a, REG> +pub type EngtW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Engt>; +impl<'a, REG> EngtW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,338 +69,329 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE1) + self.variant(Engt::Value1) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE2) + self.variant(Engt::Value2) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE3) + self.variant(Engt::Value3) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(ENGT_A::VALUE4) + self.variant(Engt::Value4) } } -#[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type ENTR_R = crate::BitReader; #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ENTR_A { +pub enum Entr { #[doc = "0: External trigger disabled"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the trigger event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ENTR_A) -> Self { + fn from(variant: Entr) -> Self { variant as u8 != 0 } } -impl ENTR_R { +#[doc = "Field `ENTR` reader - Enable External Trigger"] +pub type EntrR = crate::BitReader; +impl EntrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ENTR_A { + pub const fn variant(&self) -> Entr { match self.bits { - false => ENTR_A::VALUE1, - true => ENTR_A::VALUE2, + false => Entr::Value1, + true => Entr::Value2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ENTR_A::VALUE1 + *self == Entr::Value1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the trigger event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ENTR_A::VALUE2 + *self == Entr::Value2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; -impl<'a, REG> ENTR_W<'a, REG> +pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; +impl<'a, REG> EntrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE1) + self.variant(Entr::Value1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the trigger event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ENTR_A::VALUE2) + self.variant(Entr::Value2) } } #[doc = "Clear Valid Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CLRV_AW { +pub enum Clrv { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CLRV_AW) -> Self { + fn from(variant: Clrv) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRV` writer - Clear Valid Bit"] -pub type CLRV_W<'a, REG> = crate::BitWriter<'a, REG, CLRV_AW>; -impl<'a, REG> CLRV_W<'a, REG> +pub type ClrvW<'a, REG> = crate::BitWriter<'a, REG, Clrv>; +impl<'a, REG> ClrvW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CLRV_AW::VALUE1) + self.variant(Clrv::Value1) } #[doc = "The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CLRV_AW::VALUE2) + self.variant(Clrv::Value2) } } #[doc = "Trigger Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TREV_AW { +pub enum Trev { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Generate a trigger event by software"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TREV_AW) -> Self { + fn from(variant: Trev) -> Self { variant as u8 != 0 } } #[doc = "Field `TREV` writer - Trigger Event"] -pub type TREV_W<'a, REG> = crate::BitWriter<'a, REG, TREV_AW>; -impl<'a, REG> TREV_W<'a, REG> +pub type TrevW<'a, REG> = crate::BitWriter<'a, REG, Trev>; +impl<'a, REG> TrevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TREV_AW::VALUE1) + self.variant(Trev::Value1) } #[doc = "Generate a trigger event by software"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TREV_AW::VALUE2) + self.variant(Trev::Value2) } } #[doc = "Flush Queue\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FLUSH_AW { +pub enum Flush { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry."] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FLUSH_AW) -> Self { + fn from(variant: Flush) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSH` writer - Flush Queue"] -pub type FLUSH_W<'a, REG> = crate::BitWriter<'a, REG, FLUSH_AW>; -impl<'a, REG> FLUSH_W<'a, REG> +pub type FlushW<'a, REG> = crate::BitWriter<'a, REG, Flush>; +impl<'a, REG> FlushW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FLUSH_AW::VALUE1) + self.variant(Flush::Value1) } #[doc = "Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FLUSH_AW::VALUE2) + self.variant(Flush::Value2) } } #[doc = "Clear Event Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CEV_AW { +pub enum Cev { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear bit EV"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CEV_AW) -> Self { + fn from(variant: Cev) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV` writer - Clear Event Flag"] -pub type CEV_W<'a, REG> = crate::BitWriter<'a, REG, CEV_AW>; -impl<'a, REG> CEV_W<'a, REG> +pub type CevW<'a, REG> = crate::BitWriter<'a, REG, Cev>; +impl<'a, REG> CevW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(CEV_AW::VALUE1) + self.variant(Cev::Value1) } #[doc = "Clear bit EV"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(CEV_AW::VALUE2) + self.variant(Cev::Value2) } } -#[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RPTDIS_R = crate::BitReader; #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RPTDIS_A { +pub enum Rptdis { #[doc = "0: A cancelled conversion is repeated"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A cancelled conversion is discarded"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RPTDIS_A) -> Self { + fn from(variant: Rptdis) -> Self { variant as u8 != 0 } } -impl RPTDIS_R { +#[doc = "Field `RPTDIS` reader - Repeat Disable"] +pub type RptdisR = crate::BitReader; +impl RptdisR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RPTDIS_A { + pub const fn variant(&self) -> Rptdis { match self.bits { - false => RPTDIS_A::VALUE1, - true => RPTDIS_A::VALUE2, + false => Rptdis::Value1, + true => Rptdis::Value2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RPTDIS_A::VALUE1 + *self == Rptdis::Value1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RPTDIS_A::VALUE2 + *self == Rptdis::Value2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; -impl<'a, REG> RPTDIS_W<'a, REG> +pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; +impl<'a, REG> RptdisW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE1) + self.variant(Rptdis::Value1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RPTDIS_A::VALUE2) + self.variant(Rptdis::Value2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> ENGT_R { - ENGT_R::new((self.bits & 3) as u8) + pub fn engt(&self) -> EngtR { + EngtR::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> ENTR_R { - ENTR_R::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> EntrR { + EntrR::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RPTDIS_R { - RPTDIS_R::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RptdisR { + RptdisR::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> ENGT_W { - ENGT_W::new(self, 0) + pub fn engt(&mut self) -> EngtW { + EngtW::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> ENTR_W { - ENTR_W::new(self, 2) + pub fn entr(&mut self) -> EntrW { + EntrW::new(self, 2) } #[doc = "Bit 8 - Clear Valid Bit"] #[inline(always)] #[must_use] - pub fn clrv(&mut self) -> CLRV_W { - CLRV_W::new(self, 8) + pub fn clrv(&mut self) -> ClrvW { + ClrvW::new(self, 8) } #[doc = "Bit 9 - Trigger Event"] #[inline(always)] #[must_use] - pub fn trev(&mut self) -> TREV_W { - TREV_W::new(self, 9) + pub fn trev(&mut self) -> TrevW { + TrevW::new(self, 9) } #[doc = "Bit 10 - Flush Queue"] #[inline(always)] #[must_use] - pub fn flush(&mut self) -> FLUSH_W { - FLUSH_W::new(self, 10) + pub fn flush(&mut self) -> FlushW { + FlushW::new(self, 10) } #[doc = "Bit 11 - Clear Event Flag"] #[inline(always)] #[must_use] - pub fn cev(&mut self) -> CEV_W { - CEV_W::new(self, 11) + pub fn cev(&mut self) -> CevW { + CevW::new(self, 11) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RPTDIS_W { - RPTDIS_W::new(self, 16) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rptdis(&mut self) -> RptdisW { + RptdisW::new(self, 16) } } #[doc = "Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QMR0_SPEC; -impl crate::RegisterSpec for QMR0_SPEC { +pub struct Qmr0Spec; +impl crate::RegisterSpec for Qmr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`qmr0::R`](R) reader structure"] -impl crate::Readable for QMR0_SPEC {} +impl crate::Readable for Qmr0Spec {} #[doc = "`write(|w| ..)` method takes [`qmr0::W`](W) writer structure"] -impl crate::Writable for QMR0_SPEC { +impl crate::Writable for Qmr0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QMR0 to value 0"] -impl crate::Resettable for QMR0_SPEC { +impl crate::Resettable for Qmr0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qsr0.rs b/src/vadc_g0/qsr0.rs index d4cc888a..3b524763 100644 --- a/src/vadc_g0/qsr0.rs +++ b/src/vadc_g0/qsr0.rs @@ -1,200 +1,200 @@ #[doc = "Register `QSR0` reader"] -pub type R = crate::R; -#[doc = "Field `FILL` reader - Filling Level for Queue 2"] -pub type FILL_R = crate::FieldReader; +pub type R = crate::R; #[doc = "Filling Level for Queue 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FILL_A { +pub enum Fill { #[doc = "0: There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: There are 2 valid entries in the queue"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: There are 3 valid entries in the queue"] - VALUE3 = 2, + Value3 = 2, #[doc = "7: There are 8 valid entries in the queue"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FILL_A) -> Self { + fn from(variant: Fill) -> Self { variant as _ } } -impl crate::FieldSpec for FILL_A { +impl crate::FieldSpec for Fill { type Ux = u8; } -impl FILL_R { +#[doc = "Field `FILL` reader - Filling Level for Queue 2"] +pub type FillR = crate::FieldReader; +impl FillR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FILL_A::VALUE1), - 1 => Some(FILL_A::VALUE2), - 2 => Some(FILL_A::VALUE3), - 7 => Some(FILL_A::VALUE4), + 0 => Some(Fill::Value1), + 1 => Some(Fill::Value2), + 2 => Some(Fill::Value3), + 7 => Some(Fill::Value4), _ => None, } } #[doc = "There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FILL_A::VALUE1 + *self == Fill::Value1 } #[doc = "There are 2 valid entries in the queue"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FILL_A::VALUE2 + *self == Fill::Value2 } #[doc = "There are 3 valid entries in the queue"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == FILL_A::VALUE3 + *self == Fill::Value3 } #[doc = "There are 8 valid entries in the queue"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == FILL_A::VALUE4 + *self == Fill::Value4 } } -#[doc = "Field `EMPTY` reader - Queue Empty"] -pub type EMPTY_R = crate::BitReader; #[doc = "Queue Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EMPTY_A { +pub enum Empty { #[doc = "0: There are valid entries in the queue (see FILL)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: No valid entries (queue is empty)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EMPTY_A) -> Self { + fn from(variant: Empty) -> Self { variant as u8 != 0 } } -impl EMPTY_R { +#[doc = "Field `EMPTY` reader - Queue Empty"] +pub type EmptyR = crate::BitReader; +impl EmptyR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EMPTY_A { + pub const fn variant(&self) -> Empty { match self.bits { - false => EMPTY_A::VALUE1, - true => EMPTY_A::VALUE2, + false => Empty::Value1, + true => Empty::Value2, } } #[doc = "There are valid entries in the queue (see FILL)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EMPTY_A::VALUE1 + *self == Empty::Value1 } #[doc = "No valid entries (queue is empty)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EMPTY_A::VALUE2 + *self == Empty::Value2 } } -#[doc = "Field `REQGT` reader - Request Gate Level"] -pub type REQGT_R = crate::BitReader; #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REQGT_A { +pub enum Reqgt { #[doc = "0: The gate input is low"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: The gate input is high"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REQGT_A) -> Self { + fn from(variant: Reqgt) -> Self { variant as u8 != 0 } } -impl REQGT_R { +#[doc = "Field `REQGT` reader - Request Gate Level"] +pub type ReqgtR = crate::BitReader; +impl ReqgtR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REQGT_A { + pub const fn variant(&self) -> Reqgt { match self.bits { - false => REQGT_A::VALUE1, - true => REQGT_A::VALUE2, + false => Reqgt::Value1, + true => Reqgt::Value2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REQGT_A::VALUE1 + *self == Reqgt::Value1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REQGT_A::VALUE2 + *self == Reqgt::Value2 } } -#[doc = "Field `EV` reader - Event Detected"] -pub type EV_R = crate::BitReader; #[doc = "Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EV_A { +pub enum Ev { #[doc = "0: No trigger event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A trigger event has been detected"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EV_A) -> Self { + fn from(variant: Ev) -> Self { variant as u8 != 0 } } -impl EV_R { +#[doc = "Field `EV` reader - Event Detected"] +pub type EvR = crate::BitReader; +impl EvR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EV_A { + pub const fn variant(&self) -> Ev { match self.bits { - false => EV_A::VALUE1, - true => EV_A::VALUE2, + false => Ev::Value1, + true => Ev::Value2, } } #[doc = "No trigger event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EV_A::VALUE1 + *self == Ev::Value1 } #[doc = "A trigger event has been detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EV_A::VALUE2 + *self == Ev::Value2 } } impl R { #[doc = "Bits 0:3 - Filling Level for Queue 2"] #[inline(always)] - pub fn fill(&self) -> FILL_R { - FILL_R::new((self.bits & 0x0f) as u8) + pub fn fill(&self) -> FillR { + FillR::new((self.bits & 0x0f) as u8) } #[doc = "Bit 5 - Queue Empty"] #[inline(always)] - pub fn empty(&self) -> EMPTY_R { - EMPTY_R::new(((self.bits >> 5) & 1) != 0) + pub fn empty(&self) -> EmptyR { + EmptyR::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> REQGT_R { - REQGT_R::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> ReqgtR { + ReqgtR::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Event Detected"] #[inline(always)] - pub fn ev(&self) -> EV_R { - EV_R::new(((self.bits >> 8) & 1) != 0) + pub fn ev(&self) -> EvR { + EvR::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QSR0_SPEC; -impl crate::RegisterSpec for QSR0_SPEC { +pub struct Qsr0Spec; +impl crate::RegisterSpec for Qsr0Spec { type Ux = u32; } #[doc = "`read()` method returns [`qsr0::R`](R) reader structure"] -impl crate::Readable for QSR0_SPEC {} +impl crate::Readable for Qsr0Spec {} #[doc = "`reset()` method sets QSR0 to value 0x20"] -impl crate::Resettable for QSR0_SPEC { +impl crate::Resettable for Qsr0Spec { const RESET_VALUE: u32 = 0x20; } diff --git a/src/vadc_g0/rcr.rs b/src/vadc_g0/rcr.rs index f041abc3..0c984add 100644 --- a/src/vadc_g0/rcr.rs +++ b/src/vadc_g0/rcr.rs @@ -1,63 +1,63 @@ #[doc = "Register `RCR[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RCR[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DRCTR` reader - Data Reduction Control"] -pub type DRCTR_R = crate::FieldReader; +pub type DrctrR = crate::FieldReader; #[doc = "Field `DRCTR` writer - Data Reduction Control"] -pub type DRCTR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; -#[doc = "Field `DMM` reader - Data Modification Mode"] -pub type DMM_R = crate::FieldReader; +pub type DrctrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Data Modification Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DMM_A { +pub enum Dmm { #[doc = "0: Standard data reduction (accumulation)"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Result filtering mode"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Difference mode"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DMM_A) -> Self { + fn from(variant: Dmm) -> Self { variant as _ } } -impl crate::FieldSpec for DMM_A { +impl crate::FieldSpec for Dmm { type Ux = u8; } -impl DMM_R { +#[doc = "Field `DMM` reader - Data Modification Mode"] +pub type DmmR = crate::FieldReader; +impl DmmR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(DMM_A::VALUE1), - 1 => Some(DMM_A::VALUE2), - 2 => Some(DMM_A::VALUE3), + 0 => Some(Dmm::Value1), + 1 => Some(Dmm::Value2), + 2 => Some(Dmm::Value3), _ => None, } } #[doc = "Standard data reduction (accumulation)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DMM_A::VALUE1 + *self == Dmm::Value1 } #[doc = "Result filtering mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DMM_A::VALUE2 + *self == Dmm::Value2 } #[doc = "Difference mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == DMM_A::VALUE3 + *self == Dmm::Value3 } } #[doc = "Field `DMM` writer - Data Modification Mode"] -pub type DMM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DMM_A>; -impl<'a, REG> DMM_W<'a, REG> +pub type DmmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dmm>; +impl<'a, REG> DmmW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -65,116 +65,116 @@ where #[doc = "Standard data reduction (accumulation)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DMM_A::VALUE1) + self.variant(Dmm::Value1) } #[doc = "Result filtering mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DMM_A::VALUE2) + self.variant(Dmm::Value2) } #[doc = "Difference mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(DMM_A::VALUE3) + self.variant(Dmm::Value3) } } -#[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] -pub type WFR_R = crate::BitReader; #[doc = "Wait-for-Read Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WFR_A { +pub enum Wfr { #[doc = "0: Overwrite mode"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Wait-for-read mode enabled for this register"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WFR_A) -> Self { + fn from(variant: Wfr) -> Self { variant as u8 != 0 } } -impl WFR_R { +#[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] +pub type WfrR = crate::BitReader; +impl WfrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> WFR_A { + pub const fn variant(&self) -> Wfr { match self.bits { - false => WFR_A::VALUE1, - true => WFR_A::VALUE2, + false => Wfr::Value1, + true => Wfr::Value2, } } #[doc = "Overwrite mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == WFR_A::VALUE1 + *self == Wfr::Value1 } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == WFR_A::VALUE2 + *self == Wfr::Value2 } } #[doc = "Field `WFR` writer - Wait-for-Read Mode Enable"] -pub type WFR_W<'a, REG> = crate::BitWriter<'a, REG, WFR_A>; -impl<'a, REG> WFR_W<'a, REG> +pub type WfrW<'a, REG> = crate::BitWriter<'a, REG, Wfr>; +impl<'a, REG> WfrW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WFR_A::VALUE1) + self.variant(Wfr::Value1) } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WFR_A::VALUE2) + self.variant(Wfr::Value2) } } -#[doc = "Field `FEN` reader - FIFO Mode Enable"] -pub type FEN_R = crate::FieldReader; #[doc = "FIFO Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum FEN_A { +pub enum Fen { #[doc = "0: Separate result register"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Part of a FIFO structure: copy each new valid result"] - VALUE2 = 1, + Value2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: FEN_A) -> Self { + fn from(variant: Fen) -> Self { variant as _ } } -impl crate::FieldSpec for FEN_A { +impl crate::FieldSpec for Fen { type Ux = u8; } -impl FEN_R { +#[doc = "Field `FEN` reader - FIFO Mode Enable"] +pub type FenR = crate::FieldReader; +impl FenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(FEN_A::VALUE1), - 1 => Some(FEN_A::VALUE2), + 0 => Some(Fen::Value1), + 1 => Some(Fen::Value2), _ => None, } } #[doc = "Separate result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FEN_A::VALUE1 + *self == Fen::Value1 } #[doc = "Part of a FIFO structure: copy each new valid result"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FEN_A::VALUE2 + *self == Fen::Value2 } } #[doc = "Field `FEN` writer - FIFO Mode Enable"] -pub type FEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FEN_A>; -impl<'a, REG> FEN_W<'a, REG> +pub type FenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Fen>; +impl<'a, REG> FenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,150 +182,141 @@ where #[doc = "Separate result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FEN_A::VALUE1) + self.variant(Fen::Value1) } #[doc = "Part of a FIFO structure: copy each new valid result"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FEN_A::VALUE2) + self.variant(Fen::Value2) } } -#[doc = "Field `SRGEN` reader - Service Request Generation Enable"] -pub type SRGEN_R = crate::BitReader; #[doc = "Service Request Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SRGEN_A { +pub enum Srgen { #[doc = "0: No service request"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Service request after a result event"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SRGEN_A) -> Self { + fn from(variant: Srgen) -> Self { variant as u8 != 0 } } -impl SRGEN_R { +#[doc = "Field `SRGEN` reader - Service Request Generation Enable"] +pub type SrgenR = crate::BitReader; +impl SrgenR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SRGEN_A { + pub const fn variant(&self) -> Srgen { match self.bits { - false => SRGEN_A::VALUE1, - true => SRGEN_A::VALUE2, + false => Srgen::Value1, + true => Srgen::Value2, } } #[doc = "No service request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SRGEN_A::VALUE1 + *self == Srgen::Value1 } #[doc = "Service request after a result event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SRGEN_A::VALUE2 + *self == Srgen::Value2 } } #[doc = "Field `SRGEN` writer - Service Request Generation Enable"] -pub type SRGEN_W<'a, REG> = crate::BitWriter<'a, REG, SRGEN_A>; -impl<'a, REG> SRGEN_W<'a, REG> +pub type SrgenW<'a, REG> = crate::BitWriter<'a, REG, Srgen>; +impl<'a, REG> SrgenW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No service request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SRGEN_A::VALUE1) + self.variant(Srgen::Value1) } #[doc = "Service request after a result event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SRGEN_A::VALUE2) + self.variant(Srgen::Value2) } } impl R { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - pub fn drctr(&self) -> DRCTR_R { - DRCTR_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drctr(&self) -> DrctrR { + DrctrR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Data Modification Mode"] #[inline(always)] - pub fn dmm(&self) -> DMM_R { - DMM_R::new(((self.bits >> 20) & 3) as u8) + pub fn dmm(&self) -> DmmR { + DmmR::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - pub fn wfr(&self) -> WFR_R { - WFR_R::new(((self.bits >> 24) & 1) != 0) + pub fn wfr(&self) -> WfrR { + WfrR::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - FIFO Mode Enable"] #[inline(always)] - pub fn fen(&self) -> FEN_R { - FEN_R::new(((self.bits >> 25) & 3) as u8) + pub fn fen(&self) -> FenR { + FenR::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - pub fn srgen(&self) -> SRGEN_R { - SRGEN_R::new(((self.bits >> 31) & 1) != 0) + pub fn srgen(&self) -> SrgenR { + SrgenR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] #[must_use] - pub fn drctr(&mut self) -> DRCTR_W { - DRCTR_W::new(self, 16) + pub fn drctr(&mut self) -> DrctrW { + DrctrW::new(self, 16) } #[doc = "Bits 20:21 - Data Modification Mode"] #[inline(always)] #[must_use] - pub fn dmm(&mut self) -> DMM_W { - DMM_W::new(self, 20) + pub fn dmm(&mut self) -> DmmW { + DmmW::new(self, 20) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] #[must_use] - pub fn wfr(&mut self) -> WFR_W { - WFR_W::new(self, 24) + pub fn wfr(&mut self) -> WfrW { + WfrW::new(self, 24) } #[doc = "Bits 25:26 - FIFO Mode Enable"] #[inline(always)] #[must_use] - pub fn fen(&mut self) -> FEN_W { - FEN_W::new(self, 25) + pub fn fen(&mut self) -> FenW { + FenW::new(self, 25) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] #[must_use] - pub fn srgen(&mut self) -> SRGEN_W { - SRGEN_W::new(self, 31) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn srgen(&mut self) -> SrgenW { + SrgenW::new(self, 31) } } #[doc = "Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RCR_SPEC; -impl crate::RegisterSpec for RCR_SPEC { +pub struct RcrSpec; +impl crate::RegisterSpec for RcrSpec { type Ux = u32; } #[doc = "`read()` method returns [`rcr::R`](R) reader structure"] -impl crate::Readable for RCR_SPEC {} +impl crate::Readable for RcrSpec {} #[doc = "`write(|w| ..)` method takes [`rcr::W`](W) writer structure"] -impl crate::Writable for RCR_SPEC { +impl crate::Writable for RcrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RCR[%s] to value 0"] -impl crate::Resettable for RCR_SPEC { +impl crate::Resettable for RcrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/refclr.rs b/src/vadc_g0/refclr.rs index 205e02ec..c416a7ad 100644 --- a/src/vadc_g0/refclr.rs +++ b/src/vadc_g0/refclr.rs @@ -1,620 +1,611 @@ #[doc = "Register `REFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Result Event for Result Register 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV0_AW { +pub enum Rev0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV0_AW) -> Self { + fn from(variant: Rev0) -> Self { variant as u8 != 0 } } #[doc = "Field `REV0` writer - Clear Result Event for Result Register 0"] -pub type REV0_W<'a, REG> = crate::BitWriter<'a, REG, REV0_AW>; -impl<'a, REG> REV0_W<'a, REG> +pub type Rev0W<'a, REG> = crate::BitWriter<'a, REG, Rev0>; +impl<'a, REG> Rev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV0_AW::VALUE1) + self.variant(Rev0::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV0_AW::VALUE2) + self.variant(Rev0::Value2) } } #[doc = "Clear Result Event for Result Register 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV1_AW { +pub enum Rev1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV1_AW) -> Self { + fn from(variant: Rev1) -> Self { variant as u8 != 0 } } #[doc = "Field `REV1` writer - Clear Result Event for Result Register 1"] -pub type REV1_W<'a, REG> = crate::BitWriter<'a, REG, REV1_AW>; -impl<'a, REG> REV1_W<'a, REG> +pub type Rev1W<'a, REG> = crate::BitWriter<'a, REG, Rev1>; +impl<'a, REG> Rev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV1_AW::VALUE1) + self.variant(Rev1::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV1_AW::VALUE2) + self.variant(Rev1::Value2) } } #[doc = "Clear Result Event for Result Register 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV2_AW { +pub enum Rev2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV2_AW) -> Self { + fn from(variant: Rev2) -> Self { variant as u8 != 0 } } #[doc = "Field `REV2` writer - Clear Result Event for Result Register 2"] -pub type REV2_W<'a, REG> = crate::BitWriter<'a, REG, REV2_AW>; -impl<'a, REG> REV2_W<'a, REG> +pub type Rev2W<'a, REG> = crate::BitWriter<'a, REG, Rev2>; +impl<'a, REG> Rev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV2_AW::VALUE1) + self.variant(Rev2::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV2_AW::VALUE2) + self.variant(Rev2::Value2) } } #[doc = "Clear Result Event for Result Register 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV3_AW { +pub enum Rev3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV3_AW) -> Self { + fn from(variant: Rev3) -> Self { variant as u8 != 0 } } #[doc = "Field `REV3` writer - Clear Result Event for Result Register 3"] -pub type REV3_W<'a, REG> = crate::BitWriter<'a, REG, REV3_AW>; -impl<'a, REG> REV3_W<'a, REG> +pub type Rev3W<'a, REG> = crate::BitWriter<'a, REG, Rev3>; +impl<'a, REG> Rev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV3_AW::VALUE1) + self.variant(Rev3::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV3_AW::VALUE2) + self.variant(Rev3::Value2) } } #[doc = "Clear Result Event for Result Register 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV4_AW { +pub enum Rev4 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV4_AW) -> Self { + fn from(variant: Rev4) -> Self { variant as u8 != 0 } } #[doc = "Field `REV4` writer - Clear Result Event for Result Register 4"] -pub type REV4_W<'a, REG> = crate::BitWriter<'a, REG, REV4_AW>; -impl<'a, REG> REV4_W<'a, REG> +pub type Rev4W<'a, REG> = crate::BitWriter<'a, REG, Rev4>; +impl<'a, REG> Rev4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV4_AW::VALUE1) + self.variant(Rev4::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV4_AW::VALUE2) + self.variant(Rev4::Value2) } } #[doc = "Clear Result Event for Result Register 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV5_AW { +pub enum Rev5 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV5_AW) -> Self { + fn from(variant: Rev5) -> Self { variant as u8 != 0 } } #[doc = "Field `REV5` writer - Clear Result Event for Result Register 5"] -pub type REV5_W<'a, REG> = crate::BitWriter<'a, REG, REV5_AW>; -impl<'a, REG> REV5_W<'a, REG> +pub type Rev5W<'a, REG> = crate::BitWriter<'a, REG, Rev5>; +impl<'a, REG> Rev5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV5_AW::VALUE1) + self.variant(Rev5::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV5_AW::VALUE2) + self.variant(Rev5::Value2) } } #[doc = "Clear Result Event for Result Register 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV6_AW { +pub enum Rev6 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV6_AW) -> Self { + fn from(variant: Rev6) -> Self { variant as u8 != 0 } } #[doc = "Field `REV6` writer - Clear Result Event for Result Register 6"] -pub type REV6_W<'a, REG> = crate::BitWriter<'a, REG, REV6_AW>; -impl<'a, REG> REV6_W<'a, REG> +pub type Rev6W<'a, REG> = crate::BitWriter<'a, REG, Rev6>; +impl<'a, REG> Rev6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV6_AW::VALUE1) + self.variant(Rev6::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV6_AW::VALUE2) + self.variant(Rev6::Value2) } } #[doc = "Clear Result Event for Result Register 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV7_AW { +pub enum Rev7 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV7_AW) -> Self { + fn from(variant: Rev7) -> Self { variant as u8 != 0 } } #[doc = "Field `REV7` writer - Clear Result Event for Result Register 7"] -pub type REV7_W<'a, REG> = crate::BitWriter<'a, REG, REV7_AW>; -impl<'a, REG> REV7_W<'a, REG> +pub type Rev7W<'a, REG> = crate::BitWriter<'a, REG, Rev7>; +impl<'a, REG> Rev7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV7_AW::VALUE1) + self.variant(Rev7::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV7_AW::VALUE2) + self.variant(Rev7::Value2) } } #[doc = "Clear Result Event for Result Register 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV8_AW { +pub enum Rev8 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV8_AW) -> Self { + fn from(variant: Rev8) -> Self { variant as u8 != 0 } } #[doc = "Field `REV8` writer - Clear Result Event for Result Register 8"] -pub type REV8_W<'a, REG> = crate::BitWriter<'a, REG, REV8_AW>; -impl<'a, REG> REV8_W<'a, REG> +pub type Rev8W<'a, REG> = crate::BitWriter<'a, REG, Rev8>; +impl<'a, REG> Rev8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV8_AW::VALUE1) + self.variant(Rev8::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV8_AW::VALUE2) + self.variant(Rev8::Value2) } } #[doc = "Clear Result Event for Result Register 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV9_AW { +pub enum Rev9 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV9_AW) -> Self { + fn from(variant: Rev9) -> Self { variant as u8 != 0 } } #[doc = "Field `REV9` writer - Clear Result Event for Result Register 9"] -pub type REV9_W<'a, REG> = crate::BitWriter<'a, REG, REV9_AW>; -impl<'a, REG> REV9_W<'a, REG> +pub type Rev9W<'a, REG> = crate::BitWriter<'a, REG, Rev9>; +impl<'a, REG> Rev9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV9_AW::VALUE1) + self.variant(Rev9::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV9_AW::VALUE2) + self.variant(Rev9::Value2) } } #[doc = "Clear Result Event for Result Register 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV10_AW { +pub enum Rev10 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV10_AW) -> Self { + fn from(variant: Rev10) -> Self { variant as u8 != 0 } } #[doc = "Field `REV10` writer - Clear Result Event for Result Register 10"] -pub type REV10_W<'a, REG> = crate::BitWriter<'a, REG, REV10_AW>; -impl<'a, REG> REV10_W<'a, REG> +pub type Rev10W<'a, REG> = crate::BitWriter<'a, REG, Rev10>; +impl<'a, REG> Rev10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV10_AW::VALUE1) + self.variant(Rev10::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV10_AW::VALUE2) + self.variant(Rev10::Value2) } } #[doc = "Clear Result Event for Result Register 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV11_AW { +pub enum Rev11 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV11_AW) -> Self { + fn from(variant: Rev11) -> Self { variant as u8 != 0 } } #[doc = "Field `REV11` writer - Clear Result Event for Result Register 11"] -pub type REV11_W<'a, REG> = crate::BitWriter<'a, REG, REV11_AW>; -impl<'a, REG> REV11_W<'a, REG> +pub type Rev11W<'a, REG> = crate::BitWriter<'a, REG, Rev11>; +impl<'a, REG> Rev11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV11_AW::VALUE1) + self.variant(Rev11::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV11_AW::VALUE2) + self.variant(Rev11::Value2) } } #[doc = "Clear Result Event for Result Register 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV12_AW { +pub enum Rev12 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV12_AW) -> Self { + fn from(variant: Rev12) -> Self { variant as u8 != 0 } } #[doc = "Field `REV12` writer - Clear Result Event for Result Register 12"] -pub type REV12_W<'a, REG> = crate::BitWriter<'a, REG, REV12_AW>; -impl<'a, REG> REV12_W<'a, REG> +pub type Rev12W<'a, REG> = crate::BitWriter<'a, REG, Rev12>; +impl<'a, REG> Rev12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV12_AW::VALUE1) + self.variant(Rev12::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV12_AW::VALUE2) + self.variant(Rev12::Value2) } } #[doc = "Clear Result Event for Result Register 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV13_AW { +pub enum Rev13 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV13_AW) -> Self { + fn from(variant: Rev13) -> Self { variant as u8 != 0 } } #[doc = "Field `REV13` writer - Clear Result Event for Result Register 13"] -pub type REV13_W<'a, REG> = crate::BitWriter<'a, REG, REV13_AW>; -impl<'a, REG> REV13_W<'a, REG> +pub type Rev13W<'a, REG> = crate::BitWriter<'a, REG, Rev13>; +impl<'a, REG> Rev13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV13_AW::VALUE1) + self.variant(Rev13::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV13_AW::VALUE2) + self.variant(Rev13::Value2) } } #[doc = "Clear Result Event for Result Register 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV14_AW { +pub enum Rev14 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV14_AW) -> Self { + fn from(variant: Rev14) -> Self { variant as u8 != 0 } } #[doc = "Field `REV14` writer - Clear Result Event for Result Register 14"] -pub type REV14_W<'a, REG> = crate::BitWriter<'a, REG, REV14_AW>; -impl<'a, REG> REV14_W<'a, REG> +pub type Rev14W<'a, REG> = crate::BitWriter<'a, REG, Rev14>; +impl<'a, REG> Rev14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV14_AW::VALUE1) + self.variant(Rev14::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV14_AW::VALUE2) + self.variant(Rev14::Value2) } } #[doc = "Clear Result Event for Result Register 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV15_AW { +pub enum Rev15 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV15_AW) -> Self { + fn from(variant: Rev15) -> Self { variant as u8 != 0 } } #[doc = "Field `REV15` writer - Clear Result Event for Result Register 15"] -pub type REV15_W<'a, REG> = crate::BitWriter<'a, REG, REV15_AW>; -impl<'a, REG> REV15_W<'a, REG> +pub type Rev15W<'a, REG> = crate::BitWriter<'a, REG, Rev15>; +impl<'a, REG> Rev15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV15_AW::VALUE1) + self.variant(Rev15::Value1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV15_AW::VALUE2) + self.variant(Rev15::Value2) } } impl W { #[doc = "Bit 0 - Clear Result Event for Result Register 0"] #[inline(always)] #[must_use] - pub fn rev0(&mut self) -> REV0_W { - REV0_W::new(self, 0) + pub fn rev0(&mut self) -> Rev0W { + Rev0W::new(self, 0) } #[doc = "Bit 1 - Clear Result Event for Result Register 1"] #[inline(always)] #[must_use] - pub fn rev1(&mut self) -> REV1_W { - REV1_W::new(self, 1) + pub fn rev1(&mut self) -> Rev1W { + Rev1W::new(self, 1) } #[doc = "Bit 2 - Clear Result Event for Result Register 2"] #[inline(always)] #[must_use] - pub fn rev2(&mut self) -> REV2_W { - REV2_W::new(self, 2) + pub fn rev2(&mut self) -> Rev2W { + Rev2W::new(self, 2) } #[doc = "Bit 3 - Clear Result Event for Result Register 3"] #[inline(always)] #[must_use] - pub fn rev3(&mut self) -> REV3_W { - REV3_W::new(self, 3) + pub fn rev3(&mut self) -> Rev3W { + Rev3W::new(self, 3) } #[doc = "Bit 4 - Clear Result Event for Result Register 4"] #[inline(always)] #[must_use] - pub fn rev4(&mut self) -> REV4_W { - REV4_W::new(self, 4) + pub fn rev4(&mut self) -> Rev4W { + Rev4W::new(self, 4) } #[doc = "Bit 5 - Clear Result Event for Result Register 5"] #[inline(always)] #[must_use] - pub fn rev5(&mut self) -> REV5_W { - REV5_W::new(self, 5) + pub fn rev5(&mut self) -> Rev5W { + Rev5W::new(self, 5) } #[doc = "Bit 6 - Clear Result Event for Result Register 6"] #[inline(always)] #[must_use] - pub fn rev6(&mut self) -> REV6_W { - REV6_W::new(self, 6) + pub fn rev6(&mut self) -> Rev6W { + Rev6W::new(self, 6) } #[doc = "Bit 7 - Clear Result Event for Result Register 7"] #[inline(always)] #[must_use] - pub fn rev7(&mut self) -> REV7_W { - REV7_W::new(self, 7) + pub fn rev7(&mut self) -> Rev7W { + Rev7W::new(self, 7) } #[doc = "Bit 8 - Clear Result Event for Result Register 8"] #[inline(always)] #[must_use] - pub fn rev8(&mut self) -> REV8_W { - REV8_W::new(self, 8) + pub fn rev8(&mut self) -> Rev8W { + Rev8W::new(self, 8) } #[doc = "Bit 9 - Clear Result Event for Result Register 9"] #[inline(always)] #[must_use] - pub fn rev9(&mut self) -> REV9_W { - REV9_W::new(self, 9) + pub fn rev9(&mut self) -> Rev9W { + Rev9W::new(self, 9) } #[doc = "Bit 10 - Clear Result Event for Result Register 10"] #[inline(always)] #[must_use] - pub fn rev10(&mut self) -> REV10_W { - REV10_W::new(self, 10) + pub fn rev10(&mut self) -> Rev10W { + Rev10W::new(self, 10) } #[doc = "Bit 11 - Clear Result Event for Result Register 11"] #[inline(always)] #[must_use] - pub fn rev11(&mut self) -> REV11_W { - REV11_W::new(self, 11) + pub fn rev11(&mut self) -> Rev11W { + Rev11W::new(self, 11) } #[doc = "Bit 12 - Clear Result Event for Result Register 12"] #[inline(always)] #[must_use] - pub fn rev12(&mut self) -> REV12_W { - REV12_W::new(self, 12) + pub fn rev12(&mut self) -> Rev12W { + Rev12W::new(self, 12) } #[doc = "Bit 13 - Clear Result Event for Result Register 13"] #[inline(always)] #[must_use] - pub fn rev13(&mut self) -> REV13_W { - REV13_W::new(self, 13) + pub fn rev13(&mut self) -> Rev13W { + Rev13W::new(self, 13) } #[doc = "Bit 14 - Clear Result Event for Result Register 14"] #[inline(always)] #[must_use] - pub fn rev14(&mut self) -> REV14_W { - REV14_W::new(self, 14) + pub fn rev14(&mut self) -> Rev14W { + Rev14W::new(self, 14) } #[doc = "Bit 15 - Clear Result Event for Result Register 15"] #[inline(always)] #[must_use] - pub fn rev15(&mut self) -> REV15_W { - REV15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rev15(&mut self) -> Rev15W { + Rev15W::new(self, 15) } } #[doc = "Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REFCLR_SPEC; -impl crate::RegisterSpec for REFCLR_SPEC { +pub struct RefclrSpec; +impl crate::RegisterSpec for RefclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`refclr::W`](W) writer structure"] -impl crate::Writable for REFCLR_SPEC { +impl crate::Writable for RefclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFCLR to value 0"] -impl crate::Resettable for REFCLR_SPEC { +impl crate::Resettable for RefclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/reflag.rs b/src/vadc_g0/reflag.rs index 88f4721f..6fe24d41 100644 --- a/src/vadc_g0/reflag.rs +++ b/src/vadc_g0/reflag.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `REFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `REV0` reader - Result Event for Result Register 0"] -pub type REV0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Result Event for Result Register 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV0_A { +pub enum Rev0 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV0_A) -> Self { + fn from(variant: Rev0) -> Self { variant as u8 != 0 } } -impl REV0_R { +#[doc = "Field `REV0` reader - Result Event for Result Register 0"] +pub type Rev0R = crate::BitReader; +impl Rev0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV0_A { + pub const fn variant(&self) -> Rev0 { match self.bits { - false => REV0_A::VALUE1, - true => REV0_A::VALUE2, + false => Rev0::Value1, + true => Rev0::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV0_A::VALUE1 + *self == Rev0::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV0_A::VALUE2 + *self == Rev0::Value2 } } #[doc = "Field `REV0` writer - Result Event for Result Register 0"] -pub type REV0_W<'a, REG> = crate::BitWriter<'a, REG, REV0_A>; -impl<'a, REG> REV0_W<'a, REG> +pub type Rev0W<'a, REG> = crate::BitWriter<'a, REG, Rev0>; +impl<'a, REG> Rev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV0_A::VALUE1) + self.variant(Rev0::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV0_A::VALUE2) + self.variant(Rev0::Value2) } } -#[doc = "Field `REV1` reader - Result Event for Result Register 1"] -pub type REV1_R = crate::BitReader; #[doc = "Result Event for Result Register 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV1_A { +pub enum Rev1 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV1_A) -> Self { + fn from(variant: Rev1) -> Self { variant as u8 != 0 } } -impl REV1_R { +#[doc = "Field `REV1` reader - Result Event for Result Register 1"] +pub type Rev1R = crate::BitReader; +impl Rev1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV1_A { + pub const fn variant(&self) -> Rev1 { match self.bits { - false => REV1_A::VALUE1, - true => REV1_A::VALUE2, + false => Rev1::Value1, + true => Rev1::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV1_A::VALUE1 + *self == Rev1::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV1_A::VALUE2 + *self == Rev1::Value2 } } #[doc = "Field `REV1` writer - Result Event for Result Register 1"] -pub type REV1_W<'a, REG> = crate::BitWriter<'a, REG, REV1_A>; -impl<'a, REG> REV1_W<'a, REG> +pub type Rev1W<'a, REG> = crate::BitWriter<'a, REG, Rev1>; +impl<'a, REG> Rev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV1_A::VALUE1) + self.variant(Rev1::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV1_A::VALUE2) + self.variant(Rev1::Value2) } } -#[doc = "Field `REV2` reader - Result Event for Result Register 2"] -pub type REV2_R = crate::BitReader; #[doc = "Result Event for Result Register 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV2_A { +pub enum Rev2 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV2_A) -> Self { + fn from(variant: Rev2) -> Self { variant as u8 != 0 } } -impl REV2_R { +#[doc = "Field `REV2` reader - Result Event for Result Register 2"] +pub type Rev2R = crate::BitReader; +impl Rev2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV2_A { + pub const fn variant(&self) -> Rev2 { match self.bits { - false => REV2_A::VALUE1, - true => REV2_A::VALUE2, + false => Rev2::Value1, + true => Rev2::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV2_A::VALUE1 + *self == Rev2::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV2_A::VALUE2 + *self == Rev2::Value2 } } #[doc = "Field `REV2` writer - Result Event for Result Register 2"] -pub type REV2_W<'a, REG> = crate::BitWriter<'a, REG, REV2_A>; -impl<'a, REG> REV2_W<'a, REG> +pub type Rev2W<'a, REG> = crate::BitWriter<'a, REG, Rev2>; +impl<'a, REG> Rev2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV2_A::VALUE1) + self.variant(Rev2::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV2_A::VALUE2) + self.variant(Rev2::Value2) } } -#[doc = "Field `REV3` reader - Result Event for Result Register 3"] -pub type REV3_R = crate::BitReader; #[doc = "Result Event for Result Register 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV3_A { +pub enum Rev3 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV3_A) -> Self { + fn from(variant: Rev3) -> Self { variant as u8 != 0 } } -impl REV3_R { +#[doc = "Field `REV3` reader - Result Event for Result Register 3"] +pub type Rev3R = crate::BitReader; +impl Rev3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV3_A { + pub const fn variant(&self) -> Rev3 { match self.bits { - false => REV3_A::VALUE1, - true => REV3_A::VALUE2, + false => Rev3::Value1, + true => Rev3::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV3_A::VALUE1 + *self == Rev3::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV3_A::VALUE2 + *self == Rev3::Value2 } } #[doc = "Field `REV3` writer - Result Event for Result Register 3"] -pub type REV3_W<'a, REG> = crate::BitWriter<'a, REG, REV3_A>; -impl<'a, REG> REV3_W<'a, REG> +pub type Rev3W<'a, REG> = crate::BitWriter<'a, REG, Rev3>; +impl<'a, REG> Rev3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV3_A::VALUE1) + self.variant(Rev3::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV3_A::VALUE2) + self.variant(Rev3::Value2) } } -#[doc = "Field `REV4` reader - Result Event for Result Register 4"] -pub type REV4_R = crate::BitReader; #[doc = "Result Event for Result Register 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV4_A { +pub enum Rev4 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV4_A) -> Self { + fn from(variant: Rev4) -> Self { variant as u8 != 0 } } -impl REV4_R { +#[doc = "Field `REV4` reader - Result Event for Result Register 4"] +pub type Rev4R = crate::BitReader; +impl Rev4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV4_A { + pub const fn variant(&self) -> Rev4 { match self.bits { - false => REV4_A::VALUE1, - true => REV4_A::VALUE2, + false => Rev4::Value1, + true => Rev4::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV4_A::VALUE1 + *self == Rev4::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV4_A::VALUE2 + *self == Rev4::Value2 } } #[doc = "Field `REV4` writer - Result Event for Result Register 4"] -pub type REV4_W<'a, REG> = crate::BitWriter<'a, REG, REV4_A>; -impl<'a, REG> REV4_W<'a, REG> +pub type Rev4W<'a, REG> = crate::BitWriter<'a, REG, Rev4>; +impl<'a, REG> Rev4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV4_A::VALUE1) + self.variant(Rev4::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV4_A::VALUE2) + self.variant(Rev4::Value2) } } -#[doc = "Field `REV5` reader - Result Event for Result Register 5"] -pub type REV5_R = crate::BitReader; #[doc = "Result Event for Result Register 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV5_A { +pub enum Rev5 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV5_A) -> Self { + fn from(variant: Rev5) -> Self { variant as u8 != 0 } } -impl REV5_R { +#[doc = "Field `REV5` reader - Result Event for Result Register 5"] +pub type Rev5R = crate::BitReader; +impl Rev5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV5_A { + pub const fn variant(&self) -> Rev5 { match self.bits { - false => REV5_A::VALUE1, - true => REV5_A::VALUE2, + false => Rev5::Value1, + true => Rev5::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV5_A::VALUE1 + *self == Rev5::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV5_A::VALUE2 + *self == Rev5::Value2 } } #[doc = "Field `REV5` writer - Result Event for Result Register 5"] -pub type REV5_W<'a, REG> = crate::BitWriter<'a, REG, REV5_A>; -impl<'a, REG> REV5_W<'a, REG> +pub type Rev5W<'a, REG> = crate::BitWriter<'a, REG, Rev5>; +impl<'a, REG> Rev5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV5_A::VALUE1) + self.variant(Rev5::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV5_A::VALUE2) + self.variant(Rev5::Value2) } } -#[doc = "Field `REV6` reader - Result Event for Result Register 6"] -pub type REV6_R = crate::BitReader; #[doc = "Result Event for Result Register 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV6_A { +pub enum Rev6 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV6_A) -> Self { + fn from(variant: Rev6) -> Self { variant as u8 != 0 } } -impl REV6_R { +#[doc = "Field `REV6` reader - Result Event for Result Register 6"] +pub type Rev6R = crate::BitReader; +impl Rev6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV6_A { + pub const fn variant(&self) -> Rev6 { match self.bits { - false => REV6_A::VALUE1, - true => REV6_A::VALUE2, + false => Rev6::Value1, + true => Rev6::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV6_A::VALUE1 + *self == Rev6::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV6_A::VALUE2 + *self == Rev6::Value2 } } #[doc = "Field `REV6` writer - Result Event for Result Register 6"] -pub type REV6_W<'a, REG> = crate::BitWriter<'a, REG, REV6_A>; -impl<'a, REG> REV6_W<'a, REG> +pub type Rev6W<'a, REG> = crate::BitWriter<'a, REG, Rev6>; +impl<'a, REG> Rev6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV6_A::VALUE1) + self.variant(Rev6::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV6_A::VALUE2) + self.variant(Rev6::Value2) } } -#[doc = "Field `REV7` reader - Result Event for Result Register 7"] -pub type REV7_R = crate::BitReader; #[doc = "Result Event for Result Register 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV7_A { +pub enum Rev7 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV7_A) -> Self { + fn from(variant: Rev7) -> Self { variant as u8 != 0 } } -impl REV7_R { +#[doc = "Field `REV7` reader - Result Event for Result Register 7"] +pub type Rev7R = crate::BitReader; +impl Rev7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV7_A { + pub const fn variant(&self) -> Rev7 { match self.bits { - false => REV7_A::VALUE1, - true => REV7_A::VALUE2, + false => Rev7::Value1, + true => Rev7::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV7_A::VALUE1 + *self == Rev7::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV7_A::VALUE2 + *self == Rev7::Value2 } } #[doc = "Field `REV7` writer - Result Event for Result Register 7"] -pub type REV7_W<'a, REG> = crate::BitWriter<'a, REG, REV7_A>; -impl<'a, REG> REV7_W<'a, REG> +pub type Rev7W<'a, REG> = crate::BitWriter<'a, REG, Rev7>; +impl<'a, REG> Rev7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV7_A::VALUE1) + self.variant(Rev7::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV7_A::VALUE2) + self.variant(Rev7::Value2) } } -#[doc = "Field `REV8` reader - Result Event for Result Register 8"] -pub type REV8_R = crate::BitReader; #[doc = "Result Event for Result Register 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV8_A { +pub enum Rev8 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV8_A) -> Self { + fn from(variant: Rev8) -> Self { variant as u8 != 0 } } -impl REV8_R { +#[doc = "Field `REV8` reader - Result Event for Result Register 8"] +pub type Rev8R = crate::BitReader; +impl Rev8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV8_A { + pub const fn variant(&self) -> Rev8 { match self.bits { - false => REV8_A::VALUE1, - true => REV8_A::VALUE2, + false => Rev8::Value1, + true => Rev8::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV8_A::VALUE1 + *self == Rev8::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV8_A::VALUE2 + *self == Rev8::Value2 } } #[doc = "Field `REV8` writer - Result Event for Result Register 8"] -pub type REV8_W<'a, REG> = crate::BitWriter<'a, REG, REV8_A>; -impl<'a, REG> REV8_W<'a, REG> +pub type Rev8W<'a, REG> = crate::BitWriter<'a, REG, Rev8>; +impl<'a, REG> Rev8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV8_A::VALUE1) + self.variant(Rev8::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV8_A::VALUE2) + self.variant(Rev8::Value2) } } -#[doc = "Field `REV9` reader - Result Event for Result Register 9"] -pub type REV9_R = crate::BitReader; #[doc = "Result Event for Result Register 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV9_A { +pub enum Rev9 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV9_A) -> Self { + fn from(variant: Rev9) -> Self { variant as u8 != 0 } } -impl REV9_R { +#[doc = "Field `REV9` reader - Result Event for Result Register 9"] +pub type Rev9R = crate::BitReader; +impl Rev9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV9_A { + pub const fn variant(&self) -> Rev9 { match self.bits { - false => REV9_A::VALUE1, - true => REV9_A::VALUE2, + false => Rev9::Value1, + true => Rev9::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV9_A::VALUE1 + *self == Rev9::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV9_A::VALUE2 + *self == Rev9::Value2 } } #[doc = "Field `REV9` writer - Result Event for Result Register 9"] -pub type REV9_W<'a, REG> = crate::BitWriter<'a, REG, REV9_A>; -impl<'a, REG> REV9_W<'a, REG> +pub type Rev9W<'a, REG> = crate::BitWriter<'a, REG, Rev9>; +impl<'a, REG> Rev9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV9_A::VALUE1) + self.variant(Rev9::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV9_A::VALUE2) + self.variant(Rev9::Value2) } } -#[doc = "Field `REV10` reader - Result Event for Result Register 10"] -pub type REV10_R = crate::BitReader; #[doc = "Result Event for Result Register 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV10_A { +pub enum Rev10 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV10_A) -> Self { + fn from(variant: Rev10) -> Self { variant as u8 != 0 } } -impl REV10_R { +#[doc = "Field `REV10` reader - Result Event for Result Register 10"] +pub type Rev10R = crate::BitReader; +impl Rev10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV10_A { + pub const fn variant(&self) -> Rev10 { match self.bits { - false => REV10_A::VALUE1, - true => REV10_A::VALUE2, + false => Rev10::Value1, + true => Rev10::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV10_A::VALUE1 + *self == Rev10::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV10_A::VALUE2 + *self == Rev10::Value2 } } #[doc = "Field `REV10` writer - Result Event for Result Register 10"] -pub type REV10_W<'a, REG> = crate::BitWriter<'a, REG, REV10_A>; -impl<'a, REG> REV10_W<'a, REG> +pub type Rev10W<'a, REG> = crate::BitWriter<'a, REG, Rev10>; +impl<'a, REG> Rev10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV10_A::VALUE1) + self.variant(Rev10::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV10_A::VALUE2) + self.variant(Rev10::Value2) } } -#[doc = "Field `REV11` reader - Result Event for Result Register 11"] -pub type REV11_R = crate::BitReader; #[doc = "Result Event for Result Register 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV11_A { +pub enum Rev11 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV11_A) -> Self { + fn from(variant: Rev11) -> Self { variant as u8 != 0 } } -impl REV11_R { +#[doc = "Field `REV11` reader - Result Event for Result Register 11"] +pub type Rev11R = crate::BitReader; +impl Rev11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV11_A { + pub const fn variant(&self) -> Rev11 { match self.bits { - false => REV11_A::VALUE1, - true => REV11_A::VALUE2, + false => Rev11::Value1, + true => Rev11::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV11_A::VALUE1 + *self == Rev11::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV11_A::VALUE2 + *self == Rev11::Value2 } } #[doc = "Field `REV11` writer - Result Event for Result Register 11"] -pub type REV11_W<'a, REG> = crate::BitWriter<'a, REG, REV11_A>; -impl<'a, REG> REV11_W<'a, REG> +pub type Rev11W<'a, REG> = crate::BitWriter<'a, REG, Rev11>; +impl<'a, REG> Rev11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV11_A::VALUE1) + self.variant(Rev11::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV11_A::VALUE2) + self.variant(Rev11::Value2) } } -#[doc = "Field `REV12` reader - Result Event for Result Register 12"] -pub type REV12_R = crate::BitReader; #[doc = "Result Event for Result Register 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV12_A { +pub enum Rev12 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV12_A) -> Self { + fn from(variant: Rev12) -> Self { variant as u8 != 0 } } -impl REV12_R { +#[doc = "Field `REV12` reader - Result Event for Result Register 12"] +pub type Rev12R = crate::BitReader; +impl Rev12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV12_A { + pub const fn variant(&self) -> Rev12 { match self.bits { - false => REV12_A::VALUE1, - true => REV12_A::VALUE2, + false => Rev12::Value1, + true => Rev12::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV12_A::VALUE1 + *self == Rev12::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV12_A::VALUE2 + *self == Rev12::Value2 } } #[doc = "Field `REV12` writer - Result Event for Result Register 12"] -pub type REV12_W<'a, REG> = crate::BitWriter<'a, REG, REV12_A>; -impl<'a, REG> REV12_W<'a, REG> +pub type Rev12W<'a, REG> = crate::BitWriter<'a, REG, Rev12>; +impl<'a, REG> Rev12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV12_A::VALUE1) + self.variant(Rev12::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV12_A::VALUE2) + self.variant(Rev12::Value2) } } -#[doc = "Field `REV13` reader - Result Event for Result Register 13"] -pub type REV13_R = crate::BitReader; #[doc = "Result Event for Result Register 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV13_A { +pub enum Rev13 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV13_A) -> Self { + fn from(variant: Rev13) -> Self { variant as u8 != 0 } } -impl REV13_R { +#[doc = "Field `REV13` reader - Result Event for Result Register 13"] +pub type Rev13R = crate::BitReader; +impl Rev13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV13_A { + pub const fn variant(&self) -> Rev13 { match self.bits { - false => REV13_A::VALUE1, - true => REV13_A::VALUE2, + false => Rev13::Value1, + true => Rev13::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV13_A::VALUE1 + *self == Rev13::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV13_A::VALUE2 + *self == Rev13::Value2 } } #[doc = "Field `REV13` writer - Result Event for Result Register 13"] -pub type REV13_W<'a, REG> = crate::BitWriter<'a, REG, REV13_A>; -impl<'a, REG> REV13_W<'a, REG> +pub type Rev13W<'a, REG> = crate::BitWriter<'a, REG, Rev13>; +impl<'a, REG> Rev13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV13_A::VALUE1) + self.variant(Rev13::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV13_A::VALUE2) + self.variant(Rev13::Value2) } } -#[doc = "Field `REV14` reader - Result Event for Result Register 14"] -pub type REV14_R = crate::BitReader; #[doc = "Result Event for Result Register 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV14_A { +pub enum Rev14 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV14_A) -> Self { + fn from(variant: Rev14) -> Self { variant as u8 != 0 } } -impl REV14_R { +#[doc = "Field `REV14` reader - Result Event for Result Register 14"] +pub type Rev14R = crate::BitReader; +impl Rev14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV14_A { + pub const fn variant(&self) -> Rev14 { match self.bits { - false => REV14_A::VALUE1, - true => REV14_A::VALUE2, + false => Rev14::Value1, + true => Rev14::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV14_A::VALUE1 + *self == Rev14::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV14_A::VALUE2 + *self == Rev14::Value2 } } #[doc = "Field `REV14` writer - Result Event for Result Register 14"] -pub type REV14_W<'a, REG> = crate::BitWriter<'a, REG, REV14_A>; -impl<'a, REG> REV14_W<'a, REG> +pub type Rev14W<'a, REG> = crate::BitWriter<'a, REG, Rev14>; +impl<'a, REG> Rev14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV14_A::VALUE1) + self.variant(Rev14::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV14_A::VALUE2) + self.variant(Rev14::Value2) } } -#[doc = "Field `REV15` reader - Result Event for Result Register 15"] -pub type REV15_R = crate::BitReader; #[doc = "Result Event for Result Register 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum REV15_A { +pub enum Rev15 { #[doc = "0: No result event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: New result was stored in register GxRESy"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: REV15_A) -> Self { + fn from(variant: Rev15) -> Self { variant as u8 != 0 } } -impl REV15_R { +#[doc = "Field `REV15` reader - Result Event for Result Register 15"] +pub type Rev15R = crate::BitReader; +impl Rev15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> REV15_A { + pub const fn variant(&self) -> Rev15 { match self.bits { - false => REV15_A::VALUE1, - true => REV15_A::VALUE2, + false => Rev15::Value1, + true => Rev15::Value2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV15_A::VALUE1 + *self == Rev15::Value1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV15_A::VALUE2 + *self == Rev15::Value2 } } #[doc = "Field `REV15` writer - Result Event for Result Register 15"] -pub type REV15_W<'a, REG> = crate::BitWriter<'a, REG, REV15_A>; -impl<'a, REG> REV15_W<'a, REG> +pub type Rev15W<'a, REG> = crate::BitWriter<'a, REG, Rev15>; +impl<'a, REG> Rev15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV15_A::VALUE1) + self.variant(Rev15::Value1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV15_A::VALUE2) + self.variant(Rev15::Value2) } } impl R { #[doc = "Bit 0 - Result Event for Result Register 0"] #[inline(always)] - pub fn rev0(&self) -> REV0_R { - REV0_R::new((self.bits & 1) != 0) + pub fn rev0(&self) -> Rev0R { + Rev0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Result Event for Result Register 1"] #[inline(always)] - pub fn rev1(&self) -> REV1_R { - REV1_R::new(((self.bits >> 1) & 1) != 0) + pub fn rev1(&self) -> Rev1R { + Rev1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Result Event for Result Register 2"] #[inline(always)] - pub fn rev2(&self) -> REV2_R { - REV2_R::new(((self.bits >> 2) & 1) != 0) + pub fn rev2(&self) -> Rev2R { + Rev2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Result Event for Result Register 3"] #[inline(always)] - pub fn rev3(&self) -> REV3_R { - REV3_R::new(((self.bits >> 3) & 1) != 0) + pub fn rev3(&self) -> Rev3R { + Rev3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Result Event for Result Register 4"] #[inline(always)] - pub fn rev4(&self) -> REV4_R { - REV4_R::new(((self.bits >> 4) & 1) != 0) + pub fn rev4(&self) -> Rev4R { + Rev4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Result Event for Result Register 5"] #[inline(always)] - pub fn rev5(&self) -> REV5_R { - REV5_R::new(((self.bits >> 5) & 1) != 0) + pub fn rev5(&self) -> Rev5R { + Rev5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Result Event for Result Register 6"] #[inline(always)] - pub fn rev6(&self) -> REV6_R { - REV6_R::new(((self.bits >> 6) & 1) != 0) + pub fn rev6(&self) -> Rev6R { + Rev6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Result Event for Result Register 7"] #[inline(always)] - pub fn rev7(&self) -> REV7_R { - REV7_R::new(((self.bits >> 7) & 1) != 0) + pub fn rev7(&self) -> Rev7R { + Rev7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Result Event for Result Register 8"] #[inline(always)] - pub fn rev8(&self) -> REV8_R { - REV8_R::new(((self.bits >> 8) & 1) != 0) + pub fn rev8(&self) -> Rev8R { + Rev8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Result Event for Result Register 9"] #[inline(always)] - pub fn rev9(&self) -> REV9_R { - REV9_R::new(((self.bits >> 9) & 1) != 0) + pub fn rev9(&self) -> Rev9R { + Rev9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Result Event for Result Register 10"] #[inline(always)] - pub fn rev10(&self) -> REV10_R { - REV10_R::new(((self.bits >> 10) & 1) != 0) + pub fn rev10(&self) -> Rev10R { + Rev10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Result Event for Result Register 11"] #[inline(always)] - pub fn rev11(&self) -> REV11_R { - REV11_R::new(((self.bits >> 11) & 1) != 0) + pub fn rev11(&self) -> Rev11R { + Rev11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Result Event for Result Register 12"] #[inline(always)] - pub fn rev12(&self) -> REV12_R { - REV12_R::new(((self.bits >> 12) & 1) != 0) + pub fn rev12(&self) -> Rev12R { + Rev12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Result Event for Result Register 13"] #[inline(always)] - pub fn rev13(&self) -> REV13_R { - REV13_R::new(((self.bits >> 13) & 1) != 0) + pub fn rev13(&self) -> Rev13R { + Rev13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Result Event for Result Register 14"] #[inline(always)] - pub fn rev14(&self) -> REV14_R { - REV14_R::new(((self.bits >> 14) & 1) != 0) + pub fn rev14(&self) -> Rev14R { + Rev14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Result Event for Result Register 15"] #[inline(always)] - pub fn rev15(&self) -> REV15_R { - REV15_R::new(((self.bits >> 15) & 1) != 0) + pub fn rev15(&self) -> Rev15R { + Rev15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Result Event for Result Register 0"] #[inline(always)] #[must_use] - pub fn rev0(&mut self) -> REV0_W { - REV0_W::new(self, 0) + pub fn rev0(&mut self) -> Rev0W { + Rev0W::new(self, 0) } #[doc = "Bit 1 - Result Event for Result Register 1"] #[inline(always)] #[must_use] - pub fn rev1(&mut self) -> REV1_W { - REV1_W::new(self, 1) + pub fn rev1(&mut self) -> Rev1W { + Rev1W::new(self, 1) } #[doc = "Bit 2 - Result Event for Result Register 2"] #[inline(always)] #[must_use] - pub fn rev2(&mut self) -> REV2_W { - REV2_W::new(self, 2) + pub fn rev2(&mut self) -> Rev2W { + Rev2W::new(self, 2) } #[doc = "Bit 3 - Result Event for Result Register 3"] #[inline(always)] #[must_use] - pub fn rev3(&mut self) -> REV3_W { - REV3_W::new(self, 3) + pub fn rev3(&mut self) -> Rev3W { + Rev3W::new(self, 3) } #[doc = "Bit 4 - Result Event for Result Register 4"] #[inline(always)] #[must_use] - pub fn rev4(&mut self) -> REV4_W { - REV4_W::new(self, 4) + pub fn rev4(&mut self) -> Rev4W { + Rev4W::new(self, 4) } #[doc = "Bit 5 - Result Event for Result Register 5"] #[inline(always)] #[must_use] - pub fn rev5(&mut self) -> REV5_W { - REV5_W::new(self, 5) + pub fn rev5(&mut self) -> Rev5W { + Rev5W::new(self, 5) } #[doc = "Bit 6 - Result Event for Result Register 6"] #[inline(always)] #[must_use] - pub fn rev6(&mut self) -> REV6_W { - REV6_W::new(self, 6) + pub fn rev6(&mut self) -> Rev6W { + Rev6W::new(self, 6) } #[doc = "Bit 7 - Result Event for Result Register 7"] #[inline(always)] #[must_use] - pub fn rev7(&mut self) -> REV7_W { - REV7_W::new(self, 7) + pub fn rev7(&mut self) -> Rev7W { + Rev7W::new(self, 7) } #[doc = "Bit 8 - Result Event for Result Register 8"] #[inline(always)] #[must_use] - pub fn rev8(&mut self) -> REV8_W { - REV8_W::new(self, 8) + pub fn rev8(&mut self) -> Rev8W { + Rev8W::new(self, 8) } #[doc = "Bit 9 - Result Event for Result Register 9"] #[inline(always)] #[must_use] - pub fn rev9(&mut self) -> REV9_W { - REV9_W::new(self, 9) + pub fn rev9(&mut self) -> Rev9W { + Rev9W::new(self, 9) } #[doc = "Bit 10 - Result Event for Result Register 10"] #[inline(always)] #[must_use] - pub fn rev10(&mut self) -> REV10_W { - REV10_W::new(self, 10) + pub fn rev10(&mut self) -> Rev10W { + Rev10W::new(self, 10) } #[doc = "Bit 11 - Result Event for Result Register 11"] #[inline(always)] #[must_use] - pub fn rev11(&mut self) -> REV11_W { - REV11_W::new(self, 11) + pub fn rev11(&mut self) -> Rev11W { + Rev11W::new(self, 11) } #[doc = "Bit 12 - Result Event for Result Register 12"] #[inline(always)] #[must_use] - pub fn rev12(&mut self) -> REV12_W { - REV12_W::new(self, 12) + pub fn rev12(&mut self) -> Rev12W { + Rev12W::new(self, 12) } #[doc = "Bit 13 - Result Event for Result Register 13"] #[inline(always)] #[must_use] - pub fn rev13(&mut self) -> REV13_W { - REV13_W::new(self, 13) + pub fn rev13(&mut self) -> Rev13W { + Rev13W::new(self, 13) } #[doc = "Bit 14 - Result Event for Result Register 14"] #[inline(always)] #[must_use] - pub fn rev14(&mut self) -> REV14_W { - REV14_W::new(self, 14) + pub fn rev14(&mut self) -> Rev14W { + Rev14W::new(self, 14) } #[doc = "Bit 15 - Result Event for Result Register 15"] #[inline(always)] #[must_use] - pub fn rev15(&mut self) -> REV15_W { - REV15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rev15(&mut self) -> Rev15W { + Rev15W::new(self, 15) } } #[doc = "Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REFLAG_SPEC; -impl crate::RegisterSpec for REFLAG_SPEC { +pub struct ReflagSpec; +impl crate::RegisterSpec for ReflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`reflag::R`](R) reader structure"] -impl crate::Readable for REFLAG_SPEC {} +impl crate::Readable for ReflagSpec {} #[doc = "`write(|w| ..)` method takes [`reflag::W`](W) writer structure"] -impl crate::Writable for REFLAG_SPEC { +impl crate::Writable for ReflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFLAG to value 0"] -impl crate::Resettable for REFLAG_SPEC { +impl crate::Resettable for ReflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/res.rs b/src/vadc_g0/res.rs index d0fb8a4a..c70d179a 100644 --- a/src/vadc_g0/res.rs +++ b/src/vadc_g0/res.rs @@ -1,207 +1,198 @@ #[doc = "Register `RES[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RES[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of Most Recent Conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of Most Recent Conversion"] -pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `DRC` reader - Data Reduction Counter"] -pub type DRC_R = crate::FieldReader; +pub type DrcR = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type CHNR_R = crate::FieldReader; +pub type ChnrR = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EMUX_R = crate::FieldReader; -#[doc = "Field `CRS` reader - Converted Request Source"] -pub type CRS_R = crate::FieldReader; +pub type EmuxR = crate::FieldReader; #[doc = "Converted Request Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CRS_A { +pub enum Crs { #[doc = "0: Request source 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request source 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Request source 2"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CRS_A) -> Self { + fn from(variant: Crs) -> Self { variant as _ } } -impl crate::FieldSpec for CRS_A { +impl crate::FieldSpec for Crs { type Ux = u8; } -impl CRS_R { +#[doc = "Field `CRS` reader - Converted Request Source"] +pub type CrsR = crate::FieldReader; +impl CrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CRS_A::VALUE1), - 1 => Some(CRS_A::VALUE2), - 2 => Some(CRS_A::VALUE3), + 0 => Some(Crs::Value1), + 1 => Some(Crs::Value2), + 2 => Some(Crs::Value3), _ => None, } } #[doc = "Request source 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CRS_A::VALUE1 + *self == Crs::Value1 } #[doc = "Request source 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CRS_A::VALUE2 + *self == Crs::Value2 } #[doc = "Request source 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CRS_A::VALUE3 + *self == Crs::Value3 } } -#[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FCR_R = crate::BitReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCR_A { +pub enum Fcr { #[doc = "0: Signal level was below compare value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal level was above compare value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCR_A) -> Self { + fn from(variant: Fcr) -> Self { variant as u8 != 0 } } -impl FCR_R { +#[doc = "Field `FCR` reader - Fast Compare Result"] +pub type FcrR = crate::BitReader; +impl FcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCR_A { + pub const fn variant(&self) -> Fcr { match self.bits { - false => FCR_A::VALUE1, - true => FCR_A::VALUE2, + false => Fcr::Value1, + true => Fcr::Value2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCR_A::VALUE1 + *self == Fcr::Value1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCR_A::VALUE2 + *self == Fcr::Value2 } } -#[doc = "Field `VF` reader - Valid Flag"] -pub type VF_R = crate::BitReader; #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF_A { +pub enum Vf { #[doc = "0: No new result available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF_A) -> Self { + fn from(variant: Vf) -> Self { variant as u8 != 0 } } -impl VF_R { +#[doc = "Field `VF` reader - Valid Flag"] +pub type VfR = crate::BitReader; +impl VfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF_A { + pub const fn variant(&self) -> Vf { match self.bits { - false => VF_A::VALUE1, - true => VF_A::VALUE2, + false => Vf::Value1, + true => Vf::Value2, } } #[doc = "No new result available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF_A::VALUE1 + *self == Vf::Value1 } #[doc = "Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF_A::VALUE2 + *self == Vf::Value2 } } impl R { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Data Reduction Counter"] #[inline(always)] - pub fn drc(&self) -> DRC_R { - DRC_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drc(&self) -> DrcR { + DrcR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> CHNR_R { - CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> ChnrR { + ChnrR::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EMUX_R { - EMUX_R::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EmuxR { + EmuxR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CrsR { + CrsR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FCR_R { - FCR_R::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FcrR { + FcrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VF_R { - VF_R::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VfR { + VfR::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> RESULT_W { - RESULT_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn result(&mut self) -> ResultW { + ResultW::new(self, 0) } } #[doc = "Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RES_SPEC; -impl crate::RegisterSpec for RES_SPEC { +pub struct ResSpec; +impl crate::RegisterSpec for ResSpec { type Ux = u32; } #[doc = "`read()` method returns [`res::R`](R) reader structure"] -impl crate::Readable for RES_SPEC {} +impl crate::Readable for ResSpec {} #[doc = "`write(|w| ..)` method takes [`res::W`](W) writer structure"] -impl crate::Writable for RES_SPEC { +impl crate::Writable for ResSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RES[%s] to value 0"] -impl crate::Resettable for RES_SPEC { +impl crate::Resettable for ResSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/resd.rs b/src/vadc_g0/resd.rs index 5f6908d2..0e81f681 100644 --- a/src/vadc_g0/resd.rs +++ b/src/vadc_g0/resd.rs @@ -1,180 +1,180 @@ #[doc = "Register `RESD[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of Most Recent Conversion"] -pub type RESULT_R = crate::FieldReader; +pub type ResultR = crate::FieldReader; #[doc = "Field `DRC` reader - Data Reduction Counter"] -pub type DRC_R = crate::FieldReader; +pub type DrcR = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type CHNR_R = crate::FieldReader; +pub type ChnrR = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EMUX_R = crate::FieldReader; -#[doc = "Field `CRS` reader - Converted Request Source"] -pub type CRS_R = crate::FieldReader; +pub type EmuxR = crate::FieldReader; #[doc = "Converted Request Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum CRS_A { +pub enum Crs { #[doc = "0: Request source 0"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Request source 1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Request source 2"] - VALUE3 = 2, + Value3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: CRS_A) -> Self { + fn from(variant: Crs) -> Self { variant as _ } } -impl crate::FieldSpec for CRS_A { +impl crate::FieldSpec for Crs { type Ux = u8; } -impl CRS_R { +#[doc = "Field `CRS` reader - Converted Request Source"] +pub type CrsR = crate::FieldReader; +impl CrsR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(CRS_A::VALUE1), - 1 => Some(CRS_A::VALUE2), - 2 => Some(CRS_A::VALUE3), + 0 => Some(Crs::Value1), + 1 => Some(Crs::Value2), + 2 => Some(Crs::Value3), _ => None, } } #[doc = "Request source 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CRS_A::VALUE1 + *self == Crs::Value1 } #[doc = "Request source 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == CRS_A::VALUE2 + *self == Crs::Value2 } #[doc = "Request source 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == CRS_A::VALUE3 + *self == Crs::Value3 } } -#[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FCR_R = crate::BitReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FCR_A { +pub enum Fcr { #[doc = "0: Signal level was below compare value"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Signal level was above compare value"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FCR_A) -> Self { + fn from(variant: Fcr) -> Self { variant as u8 != 0 } } -impl FCR_R { +#[doc = "Field `FCR` reader - Fast Compare Result"] +pub type FcrR = crate::BitReader; +impl FcrR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FCR_A { + pub const fn variant(&self) -> Fcr { match self.bits { - false => FCR_A::VALUE1, - true => FCR_A::VALUE2, + false => Fcr::Value1, + true => Fcr::Value2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FCR_A::VALUE1 + *self == Fcr::Value1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FCR_A::VALUE2 + *self == Fcr::Value2 } } -#[doc = "Field `VF` reader - Valid Flag"] -pub type VF_R = crate::BitReader; #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF_A { +pub enum Vf { #[doc = "0: No new result available"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF_A) -> Self { + fn from(variant: Vf) -> Self { variant as u8 != 0 } } -impl VF_R { +#[doc = "Field `VF` reader - Valid Flag"] +pub type VfR = crate::BitReader; +impl VfR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF_A { + pub const fn variant(&self) -> Vf { match self.bits { - false => VF_A::VALUE1, - true => VF_A::VALUE2, + false => Vf::Value1, + true => Vf::Value2, } } #[doc = "No new result available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF_A::VALUE1 + *self == Vf::Value1 } #[doc = "Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF_A::VALUE2 + *self == Vf::Value2 } } impl R { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] - pub fn result(&self) -> RESULT_R { - RESULT_R::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> ResultR { + ResultR::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Data Reduction Counter"] #[inline(always)] - pub fn drc(&self) -> DRC_R { - DRC_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drc(&self) -> DrcR { + DrcR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> CHNR_R { - CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> ChnrR { + ChnrR::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EMUX_R { - EMUX_R::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EmuxR { + EmuxR::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CRS_R { - CRS_R::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CrsR { + CrsR::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FCR_R { - FCR_R::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FcrR { + FcrR::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VF_R { - VF_R::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VfR { + VfR::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RESD_SPEC; -impl crate::RegisterSpec for RESD_SPEC { +pub struct ResdSpec; +impl crate::RegisterSpec for ResdSpec { type Ux = u32; } #[doc = "`read()` method returns [`resd::R`](R) reader structure"] -impl crate::Readable for RESD_SPEC {} +impl crate::Readable for ResdSpec {} #[doc = "`reset()` method sets RESD[%s] to value 0"] -impl crate::Resettable for RESD_SPEC { +impl crate::Resettable for ResdSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/revnp0.rs b/src/vadc_g0/revnp0.rs index e610edcd..2b8829bd 100644 --- a/src/vadc_g0/revnp0.rs +++ b/src/vadc_g0/revnp0.rs @@ -1,67 +1,67 @@ #[doc = "Register `REVNP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REVNP0` writer"] -pub type W = crate::W; -#[doc = "Field `REV0NP` reader - Service Request Node Pointer Result Event i"] -pub type REV0NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV0NP_A { +pub enum Rev0np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV0NP_A) -> Self { + fn from(variant: Rev0np) -> Self { variant as _ } } -impl crate::FieldSpec for REV0NP_A { +impl crate::FieldSpec for Rev0np { type Ux = u8; } -impl REV0NP_R { +#[doc = "Field `REV0NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev0npR = crate::FieldReader; +impl Rev0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV0NP_A::VALUE1), - 3 => Some(REV0NP_A::VALUE2), - 4 => Some(REV0NP_A::VALUE3), - 7 => Some(REV0NP_A::VALUE4), + 0 => Some(Rev0np::Value1), + 3 => Some(Rev0np::Value2), + 4 => Some(Rev0np::Value3), + 7 => Some(Rev0np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV0NP_A::VALUE1 + *self == Rev0np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV0NP_A::VALUE2 + *self == Rev0np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV0NP_A::VALUE3 + *self == Rev0np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV0NP_A::VALUE4 + *self == Rev0np::Value4 } } #[doc = "Field `REV0NP` writer - Service Request Node Pointer Result Event i"] -pub type REV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV0NP_A>; -impl<'a, REG> REV0NP_W<'a, REG> +pub type Rev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev0np>; +impl<'a, REG> Rev0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE1) + self.variant(Rev0np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE2) + self.variant(Rev0np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE3) + self.variant(Rev0np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV0NP_A::VALUE4) + self.variant(Rev0np::Value4) } } -#[doc = "Field `REV1NP` reader - Service Request Node Pointer Result Event i"] -pub type REV1NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV1NP_A { +pub enum Rev1np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV1NP_A) -> Self { + fn from(variant: Rev1np) -> Self { variant as _ } } -impl crate::FieldSpec for REV1NP_A { +impl crate::FieldSpec for Rev1np { type Ux = u8; } -impl REV1NP_R { +#[doc = "Field `REV1NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev1npR = crate::FieldReader; +impl Rev1npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV1NP_A::VALUE1), - 3 => Some(REV1NP_A::VALUE2), - 4 => Some(REV1NP_A::VALUE3), - 7 => Some(REV1NP_A::VALUE4), + 0 => Some(Rev1np::Value1), + 3 => Some(Rev1np::Value2), + 4 => Some(Rev1np::Value3), + 7 => Some(Rev1np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV1NP_A::VALUE1 + *self == Rev1np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV1NP_A::VALUE2 + *self == Rev1np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV1NP_A::VALUE3 + *self == Rev1np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV1NP_A::VALUE4 + *self == Rev1np::Value4 } } #[doc = "Field `REV1NP` writer - Service Request Node Pointer Result Event i"] -pub type REV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV1NP_A>; -impl<'a, REG> REV1NP_W<'a, REG> +pub type Rev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev1np>; +impl<'a, REG> Rev1npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV1NP_A::VALUE1) + self.variant(Rev1np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV1NP_A::VALUE2) + self.variant(Rev1np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV1NP_A::VALUE3) + self.variant(Rev1np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV1NP_A::VALUE4) + self.variant(Rev1np::Value4) } } -#[doc = "Field `REV2NP` reader - Service Request Node Pointer Result Event i"] -pub type REV2NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV2NP_A { +pub enum Rev2np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV2NP_A) -> Self { + fn from(variant: Rev2np) -> Self { variant as _ } } -impl crate::FieldSpec for REV2NP_A { +impl crate::FieldSpec for Rev2np { type Ux = u8; } -impl REV2NP_R { +#[doc = "Field `REV2NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev2npR = crate::FieldReader; +impl Rev2npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV2NP_A::VALUE1), - 3 => Some(REV2NP_A::VALUE2), - 4 => Some(REV2NP_A::VALUE3), - 7 => Some(REV2NP_A::VALUE4), + 0 => Some(Rev2np::Value1), + 3 => Some(Rev2np::Value2), + 4 => Some(Rev2np::Value3), + 7 => Some(Rev2np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV2NP_A::VALUE1 + *self == Rev2np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV2NP_A::VALUE2 + *self == Rev2np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV2NP_A::VALUE3 + *self == Rev2np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV2NP_A::VALUE4 + *self == Rev2np::Value4 } } #[doc = "Field `REV2NP` writer - Service Request Node Pointer Result Event i"] -pub type REV2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV2NP_A>; -impl<'a, REG> REV2NP_W<'a, REG> +pub type Rev2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev2np>; +impl<'a, REG> Rev2npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV2NP_A::VALUE1) + self.variant(Rev2np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV2NP_A::VALUE2) + self.variant(Rev2np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV2NP_A::VALUE3) + self.variant(Rev2np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV2NP_A::VALUE4) + self.variant(Rev2np::Value4) } } -#[doc = "Field `REV3NP` reader - Service Request Node Pointer Result Event i"] -pub type REV3NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV3NP_A { +pub enum Rev3np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV3NP_A) -> Self { + fn from(variant: Rev3np) -> Self { variant as _ } } -impl crate::FieldSpec for REV3NP_A { +impl crate::FieldSpec for Rev3np { type Ux = u8; } -impl REV3NP_R { +#[doc = "Field `REV3NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev3npR = crate::FieldReader; +impl Rev3npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV3NP_A::VALUE1), - 3 => Some(REV3NP_A::VALUE2), - 4 => Some(REV3NP_A::VALUE3), - 7 => Some(REV3NP_A::VALUE4), + 0 => Some(Rev3np::Value1), + 3 => Some(Rev3np::Value2), + 4 => Some(Rev3np::Value3), + 7 => Some(Rev3np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV3NP_A::VALUE1 + *self == Rev3np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV3NP_A::VALUE2 + *self == Rev3np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV3NP_A::VALUE3 + *self == Rev3np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV3NP_A::VALUE4 + *self == Rev3np::Value4 } } #[doc = "Field `REV3NP` writer - Service Request Node Pointer Result Event i"] -pub type REV3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV3NP_A>; -impl<'a, REG> REV3NP_W<'a, REG> +pub type Rev3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev3np>; +impl<'a, REG> Rev3npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV3NP_A::VALUE1) + self.variant(Rev3np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV3NP_A::VALUE2) + self.variant(Rev3np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV3NP_A::VALUE3) + self.variant(Rev3np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV3NP_A::VALUE4) + self.variant(Rev3np::Value4) } } -#[doc = "Field `REV4NP` reader - Service Request Node Pointer Result Event i"] -pub type REV4NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV4NP_A { +pub enum Rev4np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV4NP_A) -> Self { + fn from(variant: Rev4np) -> Self { variant as _ } } -impl crate::FieldSpec for REV4NP_A { +impl crate::FieldSpec for Rev4np { type Ux = u8; } -impl REV4NP_R { +#[doc = "Field `REV4NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev4npR = crate::FieldReader; +impl Rev4npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV4NP_A::VALUE1), - 3 => Some(REV4NP_A::VALUE2), - 4 => Some(REV4NP_A::VALUE3), - 7 => Some(REV4NP_A::VALUE4), + 0 => Some(Rev4np::Value1), + 3 => Some(Rev4np::Value2), + 4 => Some(Rev4np::Value3), + 7 => Some(Rev4np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV4NP_A::VALUE1 + *self == Rev4np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV4NP_A::VALUE2 + *self == Rev4np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV4NP_A::VALUE3 + *self == Rev4np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV4NP_A::VALUE4 + *self == Rev4np::Value4 } } #[doc = "Field `REV4NP` writer - Service Request Node Pointer Result Event i"] -pub type REV4NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV4NP_A>; -impl<'a, REG> REV4NP_W<'a, REG> +pub type Rev4npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev4np>; +impl<'a, REG> Rev4npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV4NP_A::VALUE1) + self.variant(Rev4np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV4NP_A::VALUE2) + self.variant(Rev4np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV4NP_A::VALUE3) + self.variant(Rev4np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV4NP_A::VALUE4) + self.variant(Rev4np::Value4) } } -#[doc = "Field `REV5NP` reader - Service Request Node Pointer Result Event i"] -pub type REV5NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV5NP_A { +pub enum Rev5np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV5NP_A) -> Self { + fn from(variant: Rev5np) -> Self { variant as _ } } -impl crate::FieldSpec for REV5NP_A { +impl crate::FieldSpec for Rev5np { type Ux = u8; } -impl REV5NP_R { +#[doc = "Field `REV5NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev5npR = crate::FieldReader; +impl Rev5npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV5NP_A::VALUE1), - 3 => Some(REV5NP_A::VALUE2), - 4 => Some(REV5NP_A::VALUE3), - 7 => Some(REV5NP_A::VALUE4), + 0 => Some(Rev5np::Value1), + 3 => Some(Rev5np::Value2), + 4 => Some(Rev5np::Value3), + 7 => Some(Rev5np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV5NP_A::VALUE1 + *self == Rev5np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV5NP_A::VALUE2 + *self == Rev5np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV5NP_A::VALUE3 + *self == Rev5np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV5NP_A::VALUE4 + *self == Rev5np::Value4 } } #[doc = "Field `REV5NP` writer - Service Request Node Pointer Result Event i"] -pub type REV5NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV5NP_A>; -impl<'a, REG> REV5NP_W<'a, REG> +pub type Rev5npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev5np>; +impl<'a, REG> Rev5npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV5NP_A::VALUE1) + self.variant(Rev5np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV5NP_A::VALUE2) + self.variant(Rev5np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV5NP_A::VALUE3) + self.variant(Rev5np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV5NP_A::VALUE4) + self.variant(Rev5np::Value4) } } -#[doc = "Field `REV6NP` reader - Service Request Node Pointer Result Event i"] -pub type REV6NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV6NP_A { +pub enum Rev6np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV6NP_A) -> Self { + fn from(variant: Rev6np) -> Self { variant as _ } } -impl crate::FieldSpec for REV6NP_A { +impl crate::FieldSpec for Rev6np { type Ux = u8; } -impl REV6NP_R { +#[doc = "Field `REV6NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev6npR = crate::FieldReader; +impl Rev6npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV6NP_A::VALUE1), - 3 => Some(REV6NP_A::VALUE2), - 4 => Some(REV6NP_A::VALUE3), - 7 => Some(REV6NP_A::VALUE4), + 0 => Some(Rev6np::Value1), + 3 => Some(Rev6np::Value2), + 4 => Some(Rev6np::Value3), + 7 => Some(Rev6np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV6NP_A::VALUE1 + *self == Rev6np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV6NP_A::VALUE2 + *self == Rev6np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV6NP_A::VALUE3 + *self == Rev6np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV6NP_A::VALUE4 + *self == Rev6np::Value4 } } #[doc = "Field `REV6NP` writer - Service Request Node Pointer Result Event i"] -pub type REV6NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV6NP_A>; -impl<'a, REG> REV6NP_W<'a, REG> +pub type Rev6npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev6np>; +impl<'a, REG> Rev6npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV6NP_A::VALUE1) + self.variant(Rev6np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV6NP_A::VALUE2) + self.variant(Rev6np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV6NP_A::VALUE3) + self.variant(Rev6np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV6NP_A::VALUE4) + self.variant(Rev6np::Value4) } } -#[doc = "Field `REV7NP` reader - Service Request Node Pointer Result Event i"] -pub type REV7NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV7NP_A { +pub enum Rev7np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV7NP_A) -> Self { + fn from(variant: Rev7np) -> Self { variant as _ } } -impl crate::FieldSpec for REV7NP_A { +impl crate::FieldSpec for Rev7np { type Ux = u8; } -impl REV7NP_R { +#[doc = "Field `REV7NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev7npR = crate::FieldReader; +impl Rev7npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV7NP_A::VALUE1), - 3 => Some(REV7NP_A::VALUE2), - 4 => Some(REV7NP_A::VALUE3), - 7 => Some(REV7NP_A::VALUE4), + 0 => Some(Rev7np::Value1), + 3 => Some(Rev7np::Value2), + 4 => Some(Rev7np::Value3), + 7 => Some(Rev7np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV7NP_A::VALUE1 + *self == Rev7np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV7NP_A::VALUE2 + *self == Rev7np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV7NP_A::VALUE3 + *self == Rev7np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV7NP_A::VALUE4 + *self == Rev7np::Value4 } } #[doc = "Field `REV7NP` writer - Service Request Node Pointer Result Event i"] -pub type REV7NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV7NP_A>; -impl<'a, REG> REV7NP_W<'a, REG> +pub type Rev7npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev7np>; +impl<'a, REG> Rev7npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,139 +664,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV7NP_A::VALUE1) + self.variant(Rev7np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV7NP_A::VALUE2) + self.variant(Rev7np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV7NP_A::VALUE3) + self.variant(Rev7np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV7NP_A::VALUE4) + self.variant(Rev7np::Value4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev0np(&self) -> REV0NP_R { - REV0NP_R::new((self.bits & 0x0f) as u8) + pub fn rev0np(&self) -> Rev0npR { + Rev0npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev1np(&self) -> REV1NP_R { - REV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rev1np(&self) -> Rev1npR { + Rev1npR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev2np(&self) -> REV2NP_R { - REV2NP_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rev2np(&self) -> Rev2npR { + Rev2npR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev3np(&self) -> REV3NP_R { - REV3NP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rev3np(&self) -> Rev3npR { + Rev3npR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev4np(&self) -> REV4NP_R { - REV4NP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev4np(&self) -> Rev4npR { + Rev4npR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev5np(&self) -> REV5NP_R { - REV5NP_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rev5np(&self) -> Rev5npR { + Rev5npR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev6np(&self) -> REV6NP_R { - REV6NP_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rev6np(&self) -> Rev6npR { + Rev6npR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev7np(&self) -> REV7NP_R { - REV7NP_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rev7np(&self) -> Rev7npR { + Rev7npR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev0np(&mut self) -> REV0NP_W { - REV0NP_W::new(self, 0) + pub fn rev0np(&mut self) -> Rev0npW { + Rev0npW::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev1np(&mut self) -> REV1NP_W { - REV1NP_W::new(self, 4) + pub fn rev1np(&mut self) -> Rev1npW { + Rev1npW::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev2np(&mut self) -> REV2NP_W { - REV2NP_W::new(self, 8) + pub fn rev2np(&mut self) -> Rev2npW { + Rev2npW::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev3np(&mut self) -> REV3NP_W { - REV3NP_W::new(self, 12) + pub fn rev3np(&mut self) -> Rev3npW { + Rev3npW::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev4np(&mut self) -> REV4NP_W { - REV4NP_W::new(self, 16) + pub fn rev4np(&mut self) -> Rev4npW { + Rev4npW::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev5np(&mut self) -> REV5NP_W { - REV5NP_W::new(self, 20) + pub fn rev5np(&mut self) -> Rev5npW { + Rev5npW::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev6np(&mut self) -> REV6NP_W { - REV6NP_W::new(self, 24) + pub fn rev6np(&mut self) -> Rev6npW { + Rev6npW::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev7np(&mut self) -> REV7NP_W { - REV7NP_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rev7np(&mut self) -> Rev7npW { + Rev7npW::new(self, 28) } } #[doc = "Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REVNP0_SPEC; -impl crate::RegisterSpec for REVNP0_SPEC { +pub struct Revnp0Spec; +impl crate::RegisterSpec for Revnp0Spec { type Ux = u32; } #[doc = "`read()` method returns [`revnp0::R`](R) reader structure"] -impl crate::Readable for REVNP0_SPEC {} +impl crate::Readable for Revnp0Spec {} #[doc = "`write(|w| ..)` method takes [`revnp0::W`](W) writer structure"] -impl crate::Writable for REVNP0_SPEC { +impl crate::Writable for Revnp0Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REVNP0 to value 0"] -impl crate::Resettable for REVNP0_SPEC { +impl crate::Resettable for Revnp0Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/revnp1.rs b/src/vadc_g0/revnp1.rs index 4b844686..8d1393e6 100644 --- a/src/vadc_g0/revnp1.rs +++ b/src/vadc_g0/revnp1.rs @@ -1,67 +1,67 @@ #[doc = "Register `REVNP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REVNP1` writer"] -pub type W = crate::W; -#[doc = "Field `REV8NP` reader - Service Request Node Pointer Result Event i"] -pub type REV8NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV8NP_A { +pub enum Rev8np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV8NP_A) -> Self { + fn from(variant: Rev8np) -> Self { variant as _ } } -impl crate::FieldSpec for REV8NP_A { +impl crate::FieldSpec for Rev8np { type Ux = u8; } -impl REV8NP_R { +#[doc = "Field `REV8NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev8npR = crate::FieldReader; +impl Rev8npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV8NP_A::VALUE1), - 3 => Some(REV8NP_A::VALUE2), - 4 => Some(REV8NP_A::VALUE3), - 7 => Some(REV8NP_A::VALUE4), + 0 => Some(Rev8np::Value1), + 3 => Some(Rev8np::Value2), + 4 => Some(Rev8np::Value3), + 7 => Some(Rev8np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV8NP_A::VALUE1 + *self == Rev8np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV8NP_A::VALUE2 + *self == Rev8np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV8NP_A::VALUE3 + *self == Rev8np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV8NP_A::VALUE4 + *self == Rev8np::Value4 } } #[doc = "Field `REV8NP` writer - Service Request Node Pointer Result Event i"] -pub type REV8NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV8NP_A>; -impl<'a, REG> REV8NP_W<'a, REG> +pub type Rev8npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev8np>; +impl<'a, REG> Rev8npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV8NP_A::VALUE1) + self.variant(Rev8np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV8NP_A::VALUE2) + self.variant(Rev8np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV8NP_A::VALUE3) + self.variant(Rev8np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV8NP_A::VALUE4) + self.variant(Rev8np::Value4) } } -#[doc = "Field `REV9NP` reader - Service Request Node Pointer Result Event i"] -pub type REV9NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV9NP_A { +pub enum Rev9np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV9NP_A) -> Self { + fn from(variant: Rev9np) -> Self { variant as _ } } -impl crate::FieldSpec for REV9NP_A { +impl crate::FieldSpec for Rev9np { type Ux = u8; } -impl REV9NP_R { +#[doc = "Field `REV9NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev9npR = crate::FieldReader; +impl Rev9npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV9NP_A::VALUE1), - 3 => Some(REV9NP_A::VALUE2), - 4 => Some(REV9NP_A::VALUE3), - 7 => Some(REV9NP_A::VALUE4), + 0 => Some(Rev9np::Value1), + 3 => Some(Rev9np::Value2), + 4 => Some(Rev9np::Value3), + 7 => Some(Rev9np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV9NP_A::VALUE1 + *self == Rev9np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV9NP_A::VALUE2 + *self == Rev9np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV9NP_A::VALUE3 + *self == Rev9np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV9NP_A::VALUE4 + *self == Rev9np::Value4 } } #[doc = "Field `REV9NP` writer - Service Request Node Pointer Result Event i"] -pub type REV9NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV9NP_A>; -impl<'a, REG> REV9NP_W<'a, REG> +pub type Rev9npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev9np>; +impl<'a, REG> Rev9npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,84 +154,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV9NP_A::VALUE1) + self.variant(Rev9np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV9NP_A::VALUE2) + self.variant(Rev9np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV9NP_A::VALUE3) + self.variant(Rev9np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV9NP_A::VALUE4) + self.variant(Rev9np::Value4) } } -#[doc = "Field `REV10NP` reader - Service Request Node Pointer Result Event i"] -pub type REV10NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV10NP_A { +pub enum Rev10np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV10NP_A) -> Self { + fn from(variant: Rev10np) -> Self { variant as _ } } -impl crate::FieldSpec for REV10NP_A { +impl crate::FieldSpec for Rev10np { type Ux = u8; } -impl REV10NP_R { +#[doc = "Field `REV10NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev10npR = crate::FieldReader; +impl Rev10npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV10NP_A::VALUE1), - 3 => Some(REV10NP_A::VALUE2), - 4 => Some(REV10NP_A::VALUE3), - 7 => Some(REV10NP_A::VALUE4), + 0 => Some(Rev10np::Value1), + 3 => Some(Rev10np::Value2), + 4 => Some(Rev10np::Value3), + 7 => Some(Rev10np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV10NP_A::VALUE1 + *self == Rev10np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV10NP_A::VALUE2 + *self == Rev10np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV10NP_A::VALUE3 + *self == Rev10np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV10NP_A::VALUE4 + *self == Rev10np::Value4 } } #[doc = "Field `REV10NP` writer - Service Request Node Pointer Result Event i"] -pub type REV10NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV10NP_A>; -impl<'a, REG> REV10NP_W<'a, REG> +pub type Rev10npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev10np>; +impl<'a, REG> Rev10npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -239,84 +239,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV10NP_A::VALUE1) + self.variant(Rev10np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV10NP_A::VALUE2) + self.variant(Rev10np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV10NP_A::VALUE3) + self.variant(Rev10np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV10NP_A::VALUE4) + self.variant(Rev10np::Value4) } } -#[doc = "Field `REV11NP` reader - Service Request Node Pointer Result Event i"] -pub type REV11NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV11NP_A { +pub enum Rev11np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV11NP_A) -> Self { + fn from(variant: Rev11np) -> Self { variant as _ } } -impl crate::FieldSpec for REV11NP_A { +impl crate::FieldSpec for Rev11np { type Ux = u8; } -impl REV11NP_R { +#[doc = "Field `REV11NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev11npR = crate::FieldReader; +impl Rev11npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV11NP_A::VALUE1), - 3 => Some(REV11NP_A::VALUE2), - 4 => Some(REV11NP_A::VALUE3), - 7 => Some(REV11NP_A::VALUE4), + 0 => Some(Rev11np::Value1), + 3 => Some(Rev11np::Value2), + 4 => Some(Rev11np::Value3), + 7 => Some(Rev11np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV11NP_A::VALUE1 + *self == Rev11np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV11NP_A::VALUE2 + *self == Rev11np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV11NP_A::VALUE3 + *self == Rev11np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV11NP_A::VALUE4 + *self == Rev11np::Value4 } } #[doc = "Field `REV11NP` writer - Service Request Node Pointer Result Event i"] -pub type REV11NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV11NP_A>; -impl<'a, REG> REV11NP_W<'a, REG> +pub type Rev11npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev11np>; +impl<'a, REG> Rev11npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -324,84 +324,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV11NP_A::VALUE1) + self.variant(Rev11np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV11NP_A::VALUE2) + self.variant(Rev11np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV11NP_A::VALUE3) + self.variant(Rev11np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV11NP_A::VALUE4) + self.variant(Rev11np::Value4) } } -#[doc = "Field `REV12NP` reader - Service Request Node Pointer Result Event i"] -pub type REV12NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV12NP_A { +pub enum Rev12np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV12NP_A) -> Self { + fn from(variant: Rev12np) -> Self { variant as _ } } -impl crate::FieldSpec for REV12NP_A { +impl crate::FieldSpec for Rev12np { type Ux = u8; } -impl REV12NP_R { +#[doc = "Field `REV12NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev12npR = crate::FieldReader; +impl Rev12npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV12NP_A::VALUE1), - 3 => Some(REV12NP_A::VALUE2), - 4 => Some(REV12NP_A::VALUE3), - 7 => Some(REV12NP_A::VALUE4), + 0 => Some(Rev12np::Value1), + 3 => Some(Rev12np::Value2), + 4 => Some(Rev12np::Value3), + 7 => Some(Rev12np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV12NP_A::VALUE1 + *self == Rev12np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV12NP_A::VALUE2 + *self == Rev12np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV12NP_A::VALUE3 + *self == Rev12np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV12NP_A::VALUE4 + *self == Rev12np::Value4 } } #[doc = "Field `REV12NP` writer - Service Request Node Pointer Result Event i"] -pub type REV12NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV12NP_A>; -impl<'a, REG> REV12NP_W<'a, REG> +pub type Rev12npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev12np>; +impl<'a, REG> Rev12npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -409,84 +409,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV12NP_A::VALUE1) + self.variant(Rev12np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV12NP_A::VALUE2) + self.variant(Rev12np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV12NP_A::VALUE3) + self.variant(Rev12np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV12NP_A::VALUE4) + self.variant(Rev12np::Value4) } } -#[doc = "Field `REV13NP` reader - Service Request Node Pointer Result Event i"] -pub type REV13NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV13NP_A { +pub enum Rev13np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV13NP_A) -> Self { + fn from(variant: Rev13np) -> Self { variant as _ } } -impl crate::FieldSpec for REV13NP_A { +impl crate::FieldSpec for Rev13np { type Ux = u8; } -impl REV13NP_R { +#[doc = "Field `REV13NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev13npR = crate::FieldReader; +impl Rev13npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV13NP_A::VALUE1), - 3 => Some(REV13NP_A::VALUE2), - 4 => Some(REV13NP_A::VALUE3), - 7 => Some(REV13NP_A::VALUE4), + 0 => Some(Rev13np::Value1), + 3 => Some(Rev13np::Value2), + 4 => Some(Rev13np::Value3), + 7 => Some(Rev13np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV13NP_A::VALUE1 + *self == Rev13np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV13NP_A::VALUE2 + *self == Rev13np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV13NP_A::VALUE3 + *self == Rev13np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV13NP_A::VALUE4 + *self == Rev13np::Value4 } } #[doc = "Field `REV13NP` writer - Service Request Node Pointer Result Event i"] -pub type REV13NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV13NP_A>; -impl<'a, REG> REV13NP_W<'a, REG> +pub type Rev13npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev13np>; +impl<'a, REG> Rev13npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -494,84 +494,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV13NP_A::VALUE1) + self.variant(Rev13np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV13NP_A::VALUE2) + self.variant(Rev13np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV13NP_A::VALUE3) + self.variant(Rev13np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV13NP_A::VALUE4) + self.variant(Rev13np::Value4) } } -#[doc = "Field `REV14NP` reader - Service Request Node Pointer Result Event i"] -pub type REV14NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV14NP_A { +pub enum Rev14np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV14NP_A) -> Self { + fn from(variant: Rev14np) -> Self { variant as _ } } -impl crate::FieldSpec for REV14NP_A { +impl crate::FieldSpec for Rev14np { type Ux = u8; } -impl REV14NP_R { +#[doc = "Field `REV14NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev14npR = crate::FieldReader; +impl Rev14npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV14NP_A::VALUE1), - 3 => Some(REV14NP_A::VALUE2), - 4 => Some(REV14NP_A::VALUE3), - 7 => Some(REV14NP_A::VALUE4), + 0 => Some(Rev14np::Value1), + 3 => Some(Rev14np::Value2), + 4 => Some(Rev14np::Value3), + 7 => Some(Rev14np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV14NP_A::VALUE1 + *self == Rev14np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV14NP_A::VALUE2 + *self == Rev14np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV14NP_A::VALUE3 + *self == Rev14np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV14NP_A::VALUE4 + *self == Rev14np::Value4 } } #[doc = "Field `REV14NP` writer - Service Request Node Pointer Result Event i"] -pub type REV14NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV14NP_A>; -impl<'a, REG> REV14NP_W<'a, REG> +pub type Rev14npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev14np>; +impl<'a, REG> Rev14npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -579,84 +579,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV14NP_A::VALUE1) + self.variant(Rev14np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV14NP_A::VALUE2) + self.variant(Rev14np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV14NP_A::VALUE3) + self.variant(Rev14np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV14NP_A::VALUE4) + self.variant(Rev14np::Value4) } } -#[doc = "Field `REV15NP` reader - Service Request Node Pointer Result Event i"] -pub type REV15NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum REV15NP_A { +pub enum Rev15np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: REV15NP_A) -> Self { + fn from(variant: Rev15np) -> Self { variant as _ } } -impl crate::FieldSpec for REV15NP_A { +impl crate::FieldSpec for Rev15np { type Ux = u8; } -impl REV15NP_R { +#[doc = "Field `REV15NP` reader - Service Request Node Pointer Result Event i"] +pub type Rev15npR = crate::FieldReader; +impl Rev15npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(REV15NP_A::VALUE1), - 3 => Some(REV15NP_A::VALUE2), - 4 => Some(REV15NP_A::VALUE3), - 7 => Some(REV15NP_A::VALUE4), + 0 => Some(Rev15np::Value1), + 3 => Some(Rev15np::Value2), + 4 => Some(Rev15np::Value3), + 7 => Some(Rev15np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == REV15NP_A::VALUE1 + *self == Rev15np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == REV15NP_A::VALUE2 + *self == Rev15np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == REV15NP_A::VALUE3 + *self == Rev15np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == REV15NP_A::VALUE4 + *self == Rev15np::Value4 } } #[doc = "Field `REV15NP` writer - Service Request Node Pointer Result Event i"] -pub type REV15NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV15NP_A>; -impl<'a, REG> REV15NP_W<'a, REG> +pub type Rev15npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev15np>; +impl<'a, REG> Rev15npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -664,139 +664,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(REV15NP_A::VALUE1) + self.variant(Rev15np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(REV15NP_A::VALUE2) + self.variant(Rev15np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(REV15NP_A::VALUE3) + self.variant(Rev15np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(REV15NP_A::VALUE4) + self.variant(Rev15np::Value4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev8np(&self) -> REV8NP_R { - REV8NP_R::new((self.bits & 0x0f) as u8) + pub fn rev8np(&self) -> Rev8npR { + Rev8npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev9np(&self) -> REV9NP_R { - REV9NP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rev9np(&self) -> Rev9npR { + Rev9npR::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev10np(&self) -> REV10NP_R { - REV10NP_R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rev10np(&self) -> Rev10npR { + Rev10npR::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev11np(&self) -> REV11NP_R { - REV11NP_R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rev11np(&self) -> Rev11npR { + Rev11npR::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev12np(&self) -> REV12NP_R { - REV12NP_R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev12np(&self) -> Rev12npR { + Rev12npR::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev13np(&self) -> REV13NP_R { - REV13NP_R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rev13np(&self) -> Rev13npR { + Rev13npR::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev14np(&self) -> REV14NP_R { - REV14NP_R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rev14np(&self) -> Rev14npR { + Rev14npR::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev15np(&self) -> REV15NP_R { - REV15NP_R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rev15np(&self) -> Rev15npR { + Rev15npR::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev8np(&mut self) -> REV8NP_W { - REV8NP_W::new(self, 0) + pub fn rev8np(&mut self) -> Rev8npW { + Rev8npW::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev9np(&mut self) -> REV9NP_W { - REV9NP_W::new(self, 4) + pub fn rev9np(&mut self) -> Rev9npW { + Rev9npW::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev10np(&mut self) -> REV10NP_W { - REV10NP_W::new(self, 8) + pub fn rev10np(&mut self) -> Rev10npW { + Rev10npW::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev11np(&mut self) -> REV11NP_W { - REV11NP_W::new(self, 12) + pub fn rev11np(&mut self) -> Rev11npW { + Rev11npW::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev12np(&mut self) -> REV12NP_W { - REV12NP_W::new(self, 16) + pub fn rev12np(&mut self) -> Rev12npW { + Rev12npW::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev13np(&mut self) -> REV13NP_W { - REV13NP_W::new(self, 20) + pub fn rev13np(&mut self) -> Rev13npW { + Rev13npW::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev14np(&mut self) -> REV14NP_W { - REV14NP_W::new(self, 24) + pub fn rev14np(&mut self) -> Rev14npW { + Rev14npW::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev15np(&mut self) -> REV15NP_W { - REV15NP_W::new(self, 28) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn rev15np(&mut self) -> Rev15npW { + Rev15npW::new(self, 28) } } #[doc = "Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct REVNP1_SPEC; -impl crate::RegisterSpec for REVNP1_SPEC { +pub struct Revnp1Spec; +impl crate::RegisterSpec for Revnp1Spec { type Ux = u32; } #[doc = "`read()` method returns [`revnp1::R`](R) reader structure"] -impl crate::Readable for REVNP1_SPEC {} +impl crate::Readable for Revnp1Spec {} #[doc = "`write(|w| ..)` method takes [`revnp1::W`](W) writer structure"] -impl crate::Writable for REVNP1_SPEC { +impl crate::Writable for Revnp1Spec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REVNP1 to value 0"] -impl crate::Resettable for REVNP1_SPEC { +impl crate::Resettable for Revnp1Spec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sefclr.rs b/src/vadc_g0/sefclr.rs index e0db5bb8..aea533b8 100644 --- a/src/vadc_g0/sefclr.rs +++ b/src/vadc_g0/sefclr.rs @@ -1,102 +1,93 @@ #[doc = "Register `SEFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEV0_AW { +pub enum Sev0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the source event flag in GxSEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEV0_AW) -> Self { + fn from(variant: Sev0) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV0` writer - Clear Source Event 0/1"] -pub type SEV0_W<'a, REG> = crate::BitWriter<'a, REG, SEV0_AW>; -impl<'a, REG> SEV0_W<'a, REG> +pub type Sev0W<'a, REG> = crate::BitWriter<'a, REG, Sev0>; +impl<'a, REG> Sev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV0_AW::VALUE1) + self.variant(Sev0::Value1) } #[doc = "Clear the source event flag in GxSEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV0_AW::VALUE2) + self.variant(Sev0::Value2) } } #[doc = "Clear Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEV1_AW { +pub enum Sev1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Clear the source event flag in GxSEFLAG"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEV1_AW) -> Self { + fn from(variant: Sev1) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV1` writer - Clear Source Event 0/1"] -pub type SEV1_W<'a, REG> = crate::BitWriter<'a, REG, SEV1_AW>; -impl<'a, REG> SEV1_W<'a, REG> +pub type Sev1W<'a, REG> = crate::BitWriter<'a, REG, Sev1>; +impl<'a, REG> Sev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV1_AW::VALUE1) + self.variant(Sev1::Value1) } #[doc = "Clear the source event flag in GxSEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV1_AW::VALUE2) + self.variant(Sev1::Value2) } } impl W { #[doc = "Bit 0 - Clear Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev0(&mut self) -> SEV0_W { - SEV0_W::new(self, 0) + pub fn sev0(&mut self) -> Sev0W { + Sev0W::new(self, 0) } #[doc = "Bit 1 - Clear Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev1(&mut self) -> SEV1_W { - SEV1_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sev1(&mut self) -> Sev1W { + Sev1W::new(self, 1) } } #[doc = "Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SEFCLR_SPEC; -impl crate::RegisterSpec for SEFCLR_SPEC { +pub struct SefclrSpec; +impl crate::RegisterSpec for SefclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sefclr::W`](W) writer structure"] -impl crate::Writable for SEFCLR_SPEC { +impl crate::Writable for SefclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEFCLR to value 0"] -impl crate::Resettable for SEFCLR_SPEC { +impl crate::Resettable for SefclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/seflag.rs b/src/vadc_g0/seflag.rs index 6baed328..d611902a 100644 --- a/src/vadc_g0/seflag.rs +++ b/src/vadc_g0/seflag.rs @@ -1,162 +1,153 @@ #[doc = "Register `SEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SEFLAG` writer"] -pub type W = crate::W; -#[doc = "Field `SEV0` reader - Source Event 0/1"] -pub type SEV0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEV0_A { +pub enum Sev0 { #[doc = "0: No source event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A source event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEV0_A) -> Self { + fn from(variant: Sev0) -> Self { variant as u8 != 0 } } -impl SEV0_R { +#[doc = "Field `SEV0` reader - Source Event 0/1"] +pub type Sev0R = crate::BitReader; +impl Sev0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SEV0_A { + pub const fn variant(&self) -> Sev0 { match self.bits { - false => SEV0_A::VALUE1, - true => SEV0_A::VALUE2, + false => Sev0::Value1, + true => Sev0::Value2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEV0_A::VALUE1 + *self == Sev0::Value1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEV0_A::VALUE2 + *self == Sev0::Value2 } } #[doc = "Field `SEV0` writer - Source Event 0/1"] -pub type SEV0_W<'a, REG> = crate::BitWriter<'a, REG, SEV0_A>; -impl<'a, REG> SEV0_W<'a, REG> +pub type Sev0W<'a, REG> = crate::BitWriter<'a, REG, Sev0>; +impl<'a, REG> Sev0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV0_A::VALUE1) + self.variant(Sev0::Value1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV0_A::VALUE2) + self.variant(Sev0::Value2) } } -#[doc = "Field `SEV1` reader - Source Event 0/1"] -pub type SEV1_R = crate::BitReader; #[doc = "Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SEV1_A { +pub enum Sev1 { #[doc = "0: No source event"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: A source event has occurred"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SEV1_A) -> Self { + fn from(variant: Sev1) -> Self { variant as u8 != 0 } } -impl SEV1_R { +#[doc = "Field `SEV1` reader - Source Event 0/1"] +pub type Sev1R = crate::BitReader; +impl Sev1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SEV1_A { + pub const fn variant(&self) -> Sev1 { match self.bits { - false => SEV1_A::VALUE1, - true => SEV1_A::VALUE2, + false => Sev1::Value1, + true => Sev1::Value2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEV1_A::VALUE1 + *self == Sev1::Value1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEV1_A::VALUE2 + *self == Sev1::Value2 } } #[doc = "Field `SEV1` writer - Source Event 0/1"] -pub type SEV1_W<'a, REG> = crate::BitWriter<'a, REG, SEV1_A>; -impl<'a, REG> SEV1_W<'a, REG> +pub type Sev1W<'a, REG> = crate::BitWriter<'a, REG, Sev1>; +impl<'a, REG> Sev1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV1_A::VALUE1) + self.variant(Sev1::Value1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV1_A::VALUE2) + self.variant(Sev1::Value2) } } impl R { #[doc = "Bit 0 - Source Event 0/1"] #[inline(always)] - pub fn sev0(&self) -> SEV0_R { - SEV0_R::new((self.bits & 1) != 0) + pub fn sev0(&self) -> Sev0R { + Sev0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source Event 0/1"] #[inline(always)] - pub fn sev1(&self) -> SEV1_R { - SEV1_R::new(((self.bits >> 1) & 1) != 0) + pub fn sev1(&self) -> Sev1R { + Sev1R::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev0(&mut self) -> SEV0_W { - SEV0_W::new(self, 0) + pub fn sev0(&mut self) -> Sev0W { + Sev0W::new(self, 0) } #[doc = "Bit 1 - Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev1(&mut self) -> SEV1_W { - SEV1_W::new(self, 1) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sev1(&mut self) -> Sev1W { + Sev1W::new(self, 1) } } #[doc = "Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SEFLAG_SPEC; -impl crate::RegisterSpec for SEFLAG_SPEC { +pub struct SeflagSpec; +impl crate::RegisterSpec for SeflagSpec { type Ux = u32; } #[doc = "`read()` method returns [`seflag::R`](R) reader structure"] -impl crate::Readable for SEFLAG_SPEC {} +impl crate::Readable for SeflagSpec {} #[doc = "`write(|w| ..)` method takes [`seflag::W`](W) writer structure"] -impl crate::Writable for SEFLAG_SPEC { +impl crate::Writable for SeflagSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEFLAG to value 0"] -impl crate::Resettable for SEFLAG_SPEC { +impl crate::Resettable for SeflagSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sevnp.rs b/src/vadc_g0/sevnp.rs index d48eb49b..d4235ea7 100644 --- a/src/vadc_g0/sevnp.rs +++ b/src/vadc_g0/sevnp.rs @@ -1,67 +1,67 @@ #[doc = "Register `SEVNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SEVNP` writer"] -pub type W = crate::W; -#[doc = "Field `SEV0NP` reader - Service Request Node Pointer Source Event i"] -pub type SEV0NP_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Service Request Node Pointer Source Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SEV0NP_A { +pub enum Sev0np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SEV0NP_A) -> Self { + fn from(variant: Sev0np) -> Self { variant as _ } } -impl crate::FieldSpec for SEV0NP_A { +impl crate::FieldSpec for Sev0np { type Ux = u8; } -impl SEV0NP_R { +#[doc = "Field `SEV0NP` reader - Service Request Node Pointer Source Event i"] +pub type Sev0npR = crate::FieldReader; +impl Sev0npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SEV0NP_A::VALUE1), - 3 => Some(SEV0NP_A::VALUE2), - 4 => Some(SEV0NP_A::VALUE3), - 7 => Some(SEV0NP_A::VALUE4), + 0 => Some(Sev0np::Value1), + 3 => Some(Sev0np::Value2), + 4 => Some(Sev0np::Value3), + 7 => Some(Sev0np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEV0NP_A::VALUE1 + *self == Sev0np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEV0NP_A::VALUE2 + *self == Sev0np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SEV0NP_A::VALUE3 + *self == Sev0np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SEV0NP_A::VALUE4 + *self == Sev0np::Value4 } } #[doc = "Field `SEV0NP` writer - Service Request Node Pointer Source Event i"] -pub type SEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV0NP_A>; -impl<'a, REG> SEV0NP_W<'a, REG> +pub type Sev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev0np>; +impl<'a, REG> Sev0npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,84 +69,84 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE1) + self.variant(Sev0np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE2) + self.variant(Sev0np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE3) + self.variant(Sev0np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SEV0NP_A::VALUE4) + self.variant(Sev0np::Value4) } } -#[doc = "Field `SEV1NP` reader - Service Request Node Pointer Source Event i"] -pub type SEV1NP_R = crate::FieldReader; #[doc = "Service Request Node Pointer Source Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum SEV1NP_A { +pub enum Sev1np { #[doc = "0: Select service request line 0 of group x"] - VALUE1 = 0, + Value1 = 0, #[doc = "3: Select service request line 3 of group x"] - VALUE2 = 3, + Value2 = 3, #[doc = "4: Select shared service request line 0"] - VALUE3 = 4, + Value3 = 4, #[doc = "7: Select shared service request line 3"] - VALUE4 = 7, + Value4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: SEV1NP_A) -> Self { + fn from(variant: Sev1np) -> Self { variant as _ } } -impl crate::FieldSpec for SEV1NP_A { +impl crate::FieldSpec for Sev1np { type Ux = u8; } -impl SEV1NP_R { +#[doc = "Field `SEV1NP` reader - Service Request Node Pointer Source Event i"] +pub type Sev1npR = crate::FieldReader; +impl Sev1npR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(SEV1NP_A::VALUE1), - 3 => Some(SEV1NP_A::VALUE2), - 4 => Some(SEV1NP_A::VALUE3), - 7 => Some(SEV1NP_A::VALUE4), + 0 => Some(Sev1np::Value1), + 3 => Some(Sev1np::Value2), + 4 => Some(Sev1np::Value3), + 7 => Some(Sev1np::Value4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SEV1NP_A::VALUE1 + *self == Sev1np::Value1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SEV1NP_A::VALUE2 + *self == Sev1np::Value2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == SEV1NP_A::VALUE3 + *self == Sev1np::Value3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == SEV1NP_A::VALUE4 + *self == Sev1np::Value4 } } #[doc = "Field `SEV1NP` writer - Service Request Node Pointer Source Event i"] -pub type SEV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV1NP_A>; -impl<'a, REG> SEV1NP_W<'a, REG> +pub type Sev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev1np>; +impl<'a, REG> Sev1npW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,73 +154,64 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SEV1NP_A::VALUE1) + self.variant(Sev1np::Value1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SEV1NP_A::VALUE2) + self.variant(Sev1np::Value2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(SEV1NP_A::VALUE3) + self.variant(Sev1np::Value3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(SEV1NP_A::VALUE4) + self.variant(Sev1np::Value4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"] #[inline(always)] - pub fn sev0np(&self) -> SEV0NP_R { - SEV0NP_R::new((self.bits & 0x0f) as u8) + pub fn sev0np(&self) -> Sev0npR { + Sev0npR::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"] #[inline(always)] - pub fn sev1np(&self) -> SEV1NP_R { - SEV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn sev1np(&self) -> Sev1npR { + Sev1npR::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"] #[inline(always)] #[must_use] - pub fn sev0np(&mut self) -> SEV0NP_W { - SEV0NP_W::new(self, 0) + pub fn sev0np(&mut self) -> Sev0npW { + Sev0npW::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"] #[inline(always)] #[must_use] - pub fn sev1np(&mut self) -> SEV1NP_W { - SEV1NP_W::new(self, 4) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn sev1np(&mut self) -> Sev1npW { + Sev1npW::new(self, 4) } } #[doc = "Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SEVNP_SPEC; -impl crate::RegisterSpec for SEVNP_SPEC { +pub struct SevnpSpec; +impl crate::RegisterSpec for SevnpSpec { type Ux = u32; } #[doc = "`read()` method returns [`sevnp::R`](R) reader structure"] -impl crate::Readable for SEVNP_SPEC {} +impl crate::Readable for SevnpSpec {} #[doc = "`write(|w| ..)` method takes [`sevnp::W`](W) writer structure"] -impl crate::Writable for SEVNP_SPEC { +impl crate::Writable for SevnpSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEVNP to value 0"] -impl crate::Resettable for SEVNP_SPEC { +impl crate::Resettable for SevnpSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sract.rs b/src/vadc_g0/sract.rs index 55a2486f..958c1332 100644 --- a/src/vadc_g0/sract.rs +++ b/src/vadc_g0/sract.rs @@ -1,324 +1,315 @@ #[doc = "Register `SRACT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Activate Group Service Request Node 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AGSR0_AW { +pub enum Agsr0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AGSR0_AW) -> Self { + fn from(variant: Agsr0) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR0` writer - Activate Group Service Request Node 0"] -pub type AGSR0_W<'a, REG> = crate::BitWriter<'a, REG, AGSR0_AW>; -impl<'a, REG> AGSR0_W<'a, REG> +pub type Agsr0W<'a, REG> = crate::BitWriter<'a, REG, Agsr0>; +impl<'a, REG> Agsr0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AGSR0_AW::VALUE1) + self.variant(Agsr0::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AGSR0_AW::VALUE2) + self.variant(Agsr0::Value2) } } #[doc = "Activate Group Service Request Node 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AGSR1_AW { +pub enum Agsr1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AGSR1_AW) -> Self { + fn from(variant: Agsr1) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR1` writer - Activate Group Service Request Node 1"] -pub type AGSR1_W<'a, REG> = crate::BitWriter<'a, REG, AGSR1_AW>; -impl<'a, REG> AGSR1_W<'a, REG> +pub type Agsr1W<'a, REG> = crate::BitWriter<'a, REG, Agsr1>; +impl<'a, REG> Agsr1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AGSR1_AW::VALUE1) + self.variant(Agsr1::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AGSR1_AW::VALUE2) + self.variant(Agsr1::Value2) } } #[doc = "Activate Group Service Request Node 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AGSR2_AW { +pub enum Agsr2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AGSR2_AW) -> Self { + fn from(variant: Agsr2) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR2` writer - Activate Group Service Request Node 2"] -pub type AGSR2_W<'a, REG> = crate::BitWriter<'a, REG, AGSR2_AW>; -impl<'a, REG> AGSR2_W<'a, REG> +pub type Agsr2W<'a, REG> = crate::BitWriter<'a, REG, Agsr2>; +impl<'a, REG> Agsr2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AGSR2_AW::VALUE1) + self.variant(Agsr2::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AGSR2_AW::VALUE2) + self.variant(Agsr2::Value2) } } #[doc = "Activate Group Service Request Node 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum AGSR3_AW { +pub enum Agsr3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: AGSR3_AW) -> Self { + fn from(variant: Agsr3) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR3` writer - Activate Group Service Request Node 3"] -pub type AGSR3_W<'a, REG> = crate::BitWriter<'a, REG, AGSR3_AW>; -impl<'a, REG> AGSR3_W<'a, REG> +pub type Agsr3W<'a, REG> = crate::BitWriter<'a, REG, Agsr3>; +impl<'a, REG> Agsr3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(AGSR3_AW::VALUE1) + self.variant(Agsr3::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(AGSR3_AW::VALUE2) + self.variant(Agsr3::Value2) } } #[doc = "Activate Shared Service Request Node 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSR0_AW { +pub enum Assr0 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSR0_AW) -> Self { + fn from(variant: Assr0) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR0` writer - Activate Shared Service Request Node 0"] -pub type ASSR0_W<'a, REG> = crate::BitWriter<'a, REG, ASSR0_AW>; -impl<'a, REG> ASSR0_W<'a, REG> +pub type Assr0W<'a, REG> = crate::BitWriter<'a, REG, Assr0>; +impl<'a, REG> Assr0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSR0_AW::VALUE1) + self.variant(Assr0::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSR0_AW::VALUE2) + self.variant(Assr0::Value2) } } #[doc = "Activate Shared Service Request Node 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSR1_AW { +pub enum Assr1 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSR1_AW) -> Self { + fn from(variant: Assr1) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR1` writer - Activate Shared Service Request Node 1"] -pub type ASSR1_W<'a, REG> = crate::BitWriter<'a, REG, ASSR1_AW>; -impl<'a, REG> ASSR1_W<'a, REG> +pub type Assr1W<'a, REG> = crate::BitWriter<'a, REG, Assr1>; +impl<'a, REG> Assr1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSR1_AW::VALUE1) + self.variant(Assr1::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSR1_AW::VALUE2) + self.variant(Assr1::Value2) } } #[doc = "Activate Shared Service Request Node 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSR2_AW { +pub enum Assr2 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSR2_AW) -> Self { + fn from(variant: Assr2) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR2` writer - Activate Shared Service Request Node 2"] -pub type ASSR2_W<'a, REG> = crate::BitWriter<'a, REG, ASSR2_AW>; -impl<'a, REG> ASSR2_W<'a, REG> +pub type Assr2W<'a, REG> = crate::BitWriter<'a, REG, Assr2>; +impl<'a, REG> Assr2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSR2_AW::VALUE1) + self.variant(Assr2::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSR2_AW::VALUE2) + self.variant(Assr2::Value2) } } #[doc = "Activate Shared Service Request Node 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ASSR3_AW { +pub enum Assr3 { #[doc = "0: No action"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Activate the associated service request line"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ASSR3_AW) -> Self { + fn from(variant: Assr3) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR3` writer - Activate Shared Service Request Node 3"] -pub type ASSR3_W<'a, REG> = crate::BitWriter<'a, REG, ASSR3_AW>; -impl<'a, REG> ASSR3_W<'a, REG> +pub type Assr3W<'a, REG> = crate::BitWriter<'a, REG, Assr3>; +impl<'a, REG> Assr3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ASSR3_AW::VALUE1) + self.variant(Assr3::Value1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ASSR3_AW::VALUE2) + self.variant(Assr3::Value2) } } impl W { #[doc = "Bit 0 - Activate Group Service Request Node 0"] #[inline(always)] #[must_use] - pub fn agsr0(&mut self) -> AGSR0_W { - AGSR0_W::new(self, 0) + pub fn agsr0(&mut self) -> Agsr0W { + Agsr0W::new(self, 0) } #[doc = "Bit 1 - Activate Group Service Request Node 1"] #[inline(always)] #[must_use] - pub fn agsr1(&mut self) -> AGSR1_W { - AGSR1_W::new(self, 1) + pub fn agsr1(&mut self) -> Agsr1W { + Agsr1W::new(self, 1) } #[doc = "Bit 2 - Activate Group Service Request Node 2"] #[inline(always)] #[must_use] - pub fn agsr2(&mut self) -> AGSR2_W { - AGSR2_W::new(self, 2) + pub fn agsr2(&mut self) -> Agsr2W { + Agsr2W::new(self, 2) } #[doc = "Bit 3 - Activate Group Service Request Node 3"] #[inline(always)] #[must_use] - pub fn agsr3(&mut self) -> AGSR3_W { - AGSR3_W::new(self, 3) + pub fn agsr3(&mut self) -> Agsr3W { + Agsr3W::new(self, 3) } #[doc = "Bit 8 - Activate Shared Service Request Node 0"] #[inline(always)] #[must_use] - pub fn assr0(&mut self) -> ASSR0_W { - ASSR0_W::new(self, 8) + pub fn assr0(&mut self) -> Assr0W { + Assr0W::new(self, 8) } #[doc = "Bit 9 - Activate Shared Service Request Node 1"] #[inline(always)] #[must_use] - pub fn assr1(&mut self) -> ASSR1_W { - ASSR1_W::new(self, 9) + pub fn assr1(&mut self) -> Assr1W { + Assr1W::new(self, 9) } #[doc = "Bit 10 - Activate Shared Service Request Node 2"] #[inline(always)] #[must_use] - pub fn assr2(&mut self) -> ASSR2_W { - ASSR2_W::new(self, 10) + pub fn assr2(&mut self) -> Assr2W { + Assr2W::new(self, 10) } #[doc = "Bit 11 - Activate Shared Service Request Node 3"] #[inline(always)] #[must_use] - pub fn assr3(&mut self) -> ASSR3_W { - ASSR3_W::new(self, 11) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn assr3(&mut self) -> Assr3W { + Assr3W::new(self, 11) } } #[doc = "Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRACT_SPEC; -impl crate::RegisterSpec for SRACT_SPEC { +pub struct SractSpec; +impl crate::RegisterSpec for SractSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sract::W`](W) writer structure"] -impl crate::Writable for SRACT_SPEC { +impl crate::Writable for SractSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRACT to value 0"] -impl crate::Resettable for SRACT_SPEC { +impl crate::Resettable for SractSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/synctr.rs b/src/vadc_g0/synctr.rs index db485052..84c59331 100644 --- a/src/vadc_g0/synctr.rs +++ b/src/vadc_g0/synctr.rs @@ -1,67 +1,67 @@ #[doc = "Register `SYNCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYNCTR` writer"] -pub type W = crate::W; -#[doc = "Field `STSEL` reader - Start Selection"] -pub type STSEL_R = crate::FieldReader; +pub type W = crate::W; #[doc = "Start Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum STSEL_A { +pub enum Stsel { #[doc = "0: Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Kernel is synchronization slave: Control information from input CI1"] - VALUE2 = 1, + Value2 = 1, #[doc = "2: Kernel is synchronization slave: Control information from input CI2"] - VALUE3 = 2, + Value3 = 2, #[doc = "3: Kernel is synchronization slave: Control information from input CI3"] - VALUE4 = 3, + Value4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: STSEL_A) -> Self { + fn from(variant: Stsel) -> Self { variant as _ } } -impl crate::FieldSpec for STSEL_A { +impl crate::FieldSpec for Stsel { type Ux = u8; } -impl STSEL_R { +#[doc = "Field `STSEL` reader - Start Selection"] +pub type StselR = crate::FieldReader; +impl StselR { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> STSEL_A { + pub const fn variant(&self) -> Stsel { match self.bits { - 0 => STSEL_A::VALUE1, - 1 => STSEL_A::VALUE2, - 2 => STSEL_A::VALUE3, - 3 => STSEL_A::VALUE4, + 0 => Stsel::Value1, + 1 => Stsel::Value2, + 2 => Stsel::Value3, + 3 => Stsel::Value4, _ => unreachable!(), } } #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == STSEL_A::VALUE1 + *self == Stsel::Value1 } #[doc = "Kernel is synchronization slave: Control information from input CI1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == STSEL_A::VALUE2 + *self == Stsel::Value2 } #[doc = "Kernel is synchronization slave: Control information from input CI2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == STSEL_A::VALUE3 + *self == Stsel::Value3 } #[doc = "Kernel is synchronization slave: Control information from input CI3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == STSEL_A::VALUE4 + *self == Stsel::Value4 } } #[doc = "Field `STSEL` writer - Start Selection"] -pub type STSEL_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, STSEL_A>; -impl<'a, REG> STSEL_W<'a, REG> +pub type StselW<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, Stsel>; +impl<'a, REG> StselW<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -69,254 +69,245 @@ where #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(STSEL_A::VALUE1) + self.variant(Stsel::Value1) } #[doc = "Kernel is synchronization slave: Control information from input CI1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(STSEL_A::VALUE2) + self.variant(Stsel::Value2) } #[doc = "Kernel is synchronization slave: Control information from input CI2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(STSEL_A::VALUE3) + self.variant(Stsel::Value3) } #[doc = "Kernel is synchronization slave: Control information from input CI3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(STSEL_A::VALUE4) + self.variant(Stsel::Value4) } } -#[doc = "Field `EVALR1` reader - Evaluate Ready Input Rx"] -pub type EVALR1_R = crate::BitReader; #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EVALR1_A { +pub enum Evalr1 { #[doc = "0: No ready input control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EVALR1_A) -> Self { + fn from(variant: Evalr1) -> Self { variant as u8 != 0 } } -impl EVALR1_R { +#[doc = "Field `EVALR1` reader - Evaluate Ready Input Rx"] +pub type Evalr1R = crate::BitReader; +impl Evalr1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EVALR1_A { + pub const fn variant(&self) -> Evalr1 { match self.bits { - false => EVALR1_A::VALUE1, - true => EVALR1_A::VALUE2, + false => Evalr1::Value1, + true => Evalr1::Value2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EVALR1_A::VALUE1 + *self == Evalr1::Value1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EVALR1_A::VALUE2 + *self == Evalr1::Value2 } } #[doc = "Field `EVALR1` writer - Evaluate Ready Input Rx"] -pub type EVALR1_W<'a, REG> = crate::BitWriter<'a, REG, EVALR1_A>; -impl<'a, REG> EVALR1_W<'a, REG> +pub type Evalr1W<'a, REG> = crate::BitWriter<'a, REG, Evalr1>; +impl<'a, REG> Evalr1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EVALR1_A::VALUE1) + self.variant(Evalr1::Value1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EVALR1_A::VALUE2) + self.variant(Evalr1::Value2) } } -#[doc = "Field `EVALR2` reader - Evaluate Ready Input Rx"] -pub type EVALR2_R = crate::BitReader; #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EVALR2_A { +pub enum Evalr2 { #[doc = "0: No ready input control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EVALR2_A) -> Self { + fn from(variant: Evalr2) -> Self { variant as u8 != 0 } } -impl EVALR2_R { +#[doc = "Field `EVALR2` reader - Evaluate Ready Input Rx"] +pub type Evalr2R = crate::BitReader; +impl Evalr2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EVALR2_A { + pub const fn variant(&self) -> Evalr2 { match self.bits { - false => EVALR2_A::VALUE1, - true => EVALR2_A::VALUE2, + false => Evalr2::Value1, + true => Evalr2::Value2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EVALR2_A::VALUE1 + *self == Evalr2::Value1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EVALR2_A::VALUE2 + *self == Evalr2::Value2 } } #[doc = "Field `EVALR2` writer - Evaluate Ready Input Rx"] -pub type EVALR2_W<'a, REG> = crate::BitWriter<'a, REG, EVALR2_A>; -impl<'a, REG> EVALR2_W<'a, REG> +pub type Evalr2W<'a, REG> = crate::BitWriter<'a, REG, Evalr2>; +impl<'a, REG> Evalr2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EVALR2_A::VALUE1) + self.variant(Evalr2::Value1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EVALR2_A::VALUE2) + self.variant(Evalr2::Value2) } } -#[doc = "Field `EVALR3` reader - Evaluate Ready Input Rx"] -pub type EVALR3_R = crate::BitReader; #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EVALR3_A { +pub enum Evalr3 { #[doc = "0: No ready input control"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EVALR3_A) -> Self { + fn from(variant: Evalr3) -> Self { variant as u8 != 0 } } -impl EVALR3_R { +#[doc = "Field `EVALR3` reader - Evaluate Ready Input Rx"] +pub type Evalr3R = crate::BitReader; +impl Evalr3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EVALR3_A { + pub const fn variant(&self) -> Evalr3 { match self.bits { - false => EVALR3_A::VALUE1, - true => EVALR3_A::VALUE2, + false => Evalr3::Value1, + true => Evalr3::Value2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EVALR3_A::VALUE1 + *self == Evalr3::Value1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EVALR3_A::VALUE2 + *self == Evalr3::Value2 } } #[doc = "Field `EVALR3` writer - Evaluate Ready Input Rx"] -pub type EVALR3_W<'a, REG> = crate::BitWriter<'a, REG, EVALR3_A>; -impl<'a, REG> EVALR3_W<'a, REG> +pub type Evalr3W<'a, REG> = crate::BitWriter<'a, REG, Evalr3>; +impl<'a, REG> Evalr3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EVALR3_A::VALUE1) + self.variant(Evalr3::Value1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EVALR3_A::VALUE2) + self.variant(Evalr3::Value2) } } impl R { #[doc = "Bits 0:1 - Start Selection"] #[inline(always)] - pub fn stsel(&self) -> STSEL_R { - STSEL_R::new((self.bits & 3) as u8) + pub fn stsel(&self) -> StselR { + StselR::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr1(&self) -> EVALR1_R { - EVALR1_R::new(((self.bits >> 4) & 1) != 0) + pub fn evalr1(&self) -> Evalr1R { + Evalr1R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr2(&self) -> EVALR2_R { - EVALR2_R::new(((self.bits >> 5) & 1) != 0) + pub fn evalr2(&self) -> Evalr2R { + Evalr2R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr3(&self) -> EVALR3_R { - EVALR3_R::new(((self.bits >> 6) & 1) != 0) + pub fn evalr3(&self) -> Evalr3R { + Evalr3R::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Start Selection"] #[inline(always)] #[must_use] - pub fn stsel(&mut self) -> STSEL_W { - STSEL_W::new(self, 0) + pub fn stsel(&mut self) -> StselW { + StselW::new(self, 0) } #[doc = "Bit 4 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr1(&mut self) -> EVALR1_W { - EVALR1_W::new(self, 4) + pub fn evalr1(&mut self) -> Evalr1W { + Evalr1W::new(self, 4) } #[doc = "Bit 5 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr2(&mut self) -> EVALR2_W { - EVALR2_W::new(self, 5) + pub fn evalr2(&mut self) -> Evalr2W { + Evalr2W::new(self, 5) } #[doc = "Bit 6 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr3(&mut self) -> EVALR3_W { - EVALR3_W::new(self, 6) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn evalr3(&mut self) -> Evalr3W { + Evalr3W::new(self, 6) } } #[doc = "Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SYNCTR_SPEC; -impl crate::RegisterSpec for SYNCTR_SPEC { +pub struct SynctrSpec; +impl crate::RegisterSpec for SynctrSpec { type Ux = u32; } #[doc = "`read()` method returns [`synctr::R`](R) reader structure"] -impl crate::Readable for SYNCTR_SPEC {} +impl crate::Readable for SynctrSpec {} #[doc = "`write(|w| ..)` method takes [`synctr::W`](W) writer structure"] -impl crate::Writable for SYNCTR_SPEC { +impl crate::Writable for SynctrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCTR to value 0"] -impl crate::Resettable for SYNCTR_SPEC { +impl crate::Resettable for SynctrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/vfr.rs b/src/vadc_g0/vfr.rs index 06476757..26640d15 100644 --- a/src/vadc_g0/vfr.rs +++ b/src/vadc_g0/vfr.rs @@ -1,1058 +1,1049 @@ #[doc = "Register `VFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `VFR` writer"] -pub type W = crate::W; -#[doc = "Field `VF0` reader - Valid Flag of Result Register x"] -pub type VF0_R = crate::BitReader; +pub type W = crate::W; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF0_A { +pub enum Vf0 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF0_A) -> Self { + fn from(variant: Vf0) -> Self { variant as u8 != 0 } } -impl VF0_R { +#[doc = "Field `VF0` reader - Valid Flag of Result Register x"] +pub type Vf0R = crate::BitReader; +impl Vf0R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF0_A { + pub const fn variant(&self) -> Vf0 { match self.bits { - false => VF0_A::VALUE1, - true => VF0_A::VALUE2, + false => Vf0::Value1, + true => Vf0::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF0_A::VALUE1 + *self == Vf0::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF0_A::VALUE2 + *self == Vf0::Value2 } } #[doc = "Field `VF0` writer - Valid Flag of Result Register x"] -pub type VF0_W<'a, REG> = crate::BitWriter<'a, REG, VF0_A>; -impl<'a, REG> VF0_W<'a, REG> +pub type Vf0W<'a, REG> = crate::BitWriter<'a, REG, Vf0>; +impl<'a, REG> Vf0W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF0_A::VALUE1) + self.variant(Vf0::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF0_A::VALUE2) + self.variant(Vf0::Value2) } } -#[doc = "Field `VF1` reader - Valid Flag of Result Register x"] -pub type VF1_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF1_A { +pub enum Vf1 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF1_A) -> Self { + fn from(variant: Vf1) -> Self { variant as u8 != 0 } } -impl VF1_R { +#[doc = "Field `VF1` reader - Valid Flag of Result Register x"] +pub type Vf1R = crate::BitReader; +impl Vf1R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF1_A { + pub const fn variant(&self) -> Vf1 { match self.bits { - false => VF1_A::VALUE1, - true => VF1_A::VALUE2, + false => Vf1::Value1, + true => Vf1::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF1_A::VALUE1 + *self == Vf1::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF1_A::VALUE2 + *self == Vf1::Value2 } } #[doc = "Field `VF1` writer - Valid Flag of Result Register x"] -pub type VF1_W<'a, REG> = crate::BitWriter<'a, REG, VF1_A>; -impl<'a, REG> VF1_W<'a, REG> +pub type Vf1W<'a, REG> = crate::BitWriter<'a, REG, Vf1>; +impl<'a, REG> Vf1W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF1_A::VALUE1) + self.variant(Vf1::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF1_A::VALUE2) + self.variant(Vf1::Value2) } } -#[doc = "Field `VF2` reader - Valid Flag of Result Register x"] -pub type VF2_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF2_A { +pub enum Vf2 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF2_A) -> Self { + fn from(variant: Vf2) -> Self { variant as u8 != 0 } } -impl VF2_R { +#[doc = "Field `VF2` reader - Valid Flag of Result Register x"] +pub type Vf2R = crate::BitReader; +impl Vf2R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF2_A { + pub const fn variant(&self) -> Vf2 { match self.bits { - false => VF2_A::VALUE1, - true => VF2_A::VALUE2, + false => Vf2::Value1, + true => Vf2::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF2_A::VALUE1 + *self == Vf2::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF2_A::VALUE2 + *self == Vf2::Value2 } } #[doc = "Field `VF2` writer - Valid Flag of Result Register x"] -pub type VF2_W<'a, REG> = crate::BitWriter<'a, REG, VF2_A>; -impl<'a, REG> VF2_W<'a, REG> +pub type Vf2W<'a, REG> = crate::BitWriter<'a, REG, Vf2>; +impl<'a, REG> Vf2W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF2_A::VALUE1) + self.variant(Vf2::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF2_A::VALUE2) + self.variant(Vf2::Value2) } } -#[doc = "Field `VF3` reader - Valid Flag of Result Register x"] -pub type VF3_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF3_A { +pub enum Vf3 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF3_A) -> Self { + fn from(variant: Vf3) -> Self { variant as u8 != 0 } } -impl VF3_R { +#[doc = "Field `VF3` reader - Valid Flag of Result Register x"] +pub type Vf3R = crate::BitReader; +impl Vf3R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF3_A { + pub const fn variant(&self) -> Vf3 { match self.bits { - false => VF3_A::VALUE1, - true => VF3_A::VALUE2, + false => Vf3::Value1, + true => Vf3::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF3_A::VALUE1 + *self == Vf3::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF3_A::VALUE2 + *self == Vf3::Value2 } } #[doc = "Field `VF3` writer - Valid Flag of Result Register x"] -pub type VF3_W<'a, REG> = crate::BitWriter<'a, REG, VF3_A>; -impl<'a, REG> VF3_W<'a, REG> +pub type Vf3W<'a, REG> = crate::BitWriter<'a, REG, Vf3>; +impl<'a, REG> Vf3W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF3_A::VALUE1) + self.variant(Vf3::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF3_A::VALUE2) + self.variant(Vf3::Value2) } } -#[doc = "Field `VF4` reader - Valid Flag of Result Register x"] -pub type VF4_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF4_A { +pub enum Vf4 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF4_A) -> Self { + fn from(variant: Vf4) -> Self { variant as u8 != 0 } } -impl VF4_R { +#[doc = "Field `VF4` reader - Valid Flag of Result Register x"] +pub type Vf4R = crate::BitReader; +impl Vf4R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF4_A { + pub const fn variant(&self) -> Vf4 { match self.bits { - false => VF4_A::VALUE1, - true => VF4_A::VALUE2, + false => Vf4::Value1, + true => Vf4::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF4_A::VALUE1 + *self == Vf4::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF4_A::VALUE2 + *self == Vf4::Value2 } } #[doc = "Field `VF4` writer - Valid Flag of Result Register x"] -pub type VF4_W<'a, REG> = crate::BitWriter<'a, REG, VF4_A>; -impl<'a, REG> VF4_W<'a, REG> +pub type Vf4W<'a, REG> = crate::BitWriter<'a, REG, Vf4>; +impl<'a, REG> Vf4W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF4_A::VALUE1) + self.variant(Vf4::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF4_A::VALUE2) + self.variant(Vf4::Value2) } } -#[doc = "Field `VF5` reader - Valid Flag of Result Register x"] -pub type VF5_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF5_A { +pub enum Vf5 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF5_A) -> Self { + fn from(variant: Vf5) -> Self { variant as u8 != 0 } } -impl VF5_R { +#[doc = "Field `VF5` reader - Valid Flag of Result Register x"] +pub type Vf5R = crate::BitReader; +impl Vf5R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF5_A { + pub const fn variant(&self) -> Vf5 { match self.bits { - false => VF5_A::VALUE1, - true => VF5_A::VALUE2, + false => Vf5::Value1, + true => Vf5::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF5_A::VALUE1 + *self == Vf5::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF5_A::VALUE2 + *self == Vf5::Value2 } } #[doc = "Field `VF5` writer - Valid Flag of Result Register x"] -pub type VF5_W<'a, REG> = crate::BitWriter<'a, REG, VF5_A>; -impl<'a, REG> VF5_W<'a, REG> +pub type Vf5W<'a, REG> = crate::BitWriter<'a, REG, Vf5>; +impl<'a, REG> Vf5W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF5_A::VALUE1) + self.variant(Vf5::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF5_A::VALUE2) + self.variant(Vf5::Value2) } } -#[doc = "Field `VF6` reader - Valid Flag of Result Register x"] -pub type VF6_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF6_A { +pub enum Vf6 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF6_A) -> Self { + fn from(variant: Vf6) -> Self { variant as u8 != 0 } } -impl VF6_R { +#[doc = "Field `VF6` reader - Valid Flag of Result Register x"] +pub type Vf6R = crate::BitReader; +impl Vf6R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF6_A { + pub const fn variant(&self) -> Vf6 { match self.bits { - false => VF6_A::VALUE1, - true => VF6_A::VALUE2, + false => Vf6::Value1, + true => Vf6::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF6_A::VALUE1 + *self == Vf6::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF6_A::VALUE2 + *self == Vf6::Value2 } } #[doc = "Field `VF6` writer - Valid Flag of Result Register x"] -pub type VF6_W<'a, REG> = crate::BitWriter<'a, REG, VF6_A>; -impl<'a, REG> VF6_W<'a, REG> +pub type Vf6W<'a, REG> = crate::BitWriter<'a, REG, Vf6>; +impl<'a, REG> Vf6W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF6_A::VALUE1) + self.variant(Vf6::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF6_A::VALUE2) + self.variant(Vf6::Value2) } } -#[doc = "Field `VF7` reader - Valid Flag of Result Register x"] -pub type VF7_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF7_A { +pub enum Vf7 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF7_A) -> Self { + fn from(variant: Vf7) -> Self { variant as u8 != 0 } } -impl VF7_R { +#[doc = "Field `VF7` reader - Valid Flag of Result Register x"] +pub type Vf7R = crate::BitReader; +impl Vf7R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF7_A { + pub const fn variant(&self) -> Vf7 { match self.bits { - false => VF7_A::VALUE1, - true => VF7_A::VALUE2, + false => Vf7::Value1, + true => Vf7::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF7_A::VALUE1 + *self == Vf7::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF7_A::VALUE2 + *self == Vf7::Value2 } } #[doc = "Field `VF7` writer - Valid Flag of Result Register x"] -pub type VF7_W<'a, REG> = crate::BitWriter<'a, REG, VF7_A>; -impl<'a, REG> VF7_W<'a, REG> +pub type Vf7W<'a, REG> = crate::BitWriter<'a, REG, Vf7>; +impl<'a, REG> Vf7W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF7_A::VALUE1) + self.variant(Vf7::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF7_A::VALUE2) + self.variant(Vf7::Value2) } } -#[doc = "Field `VF8` reader - Valid Flag of Result Register x"] -pub type VF8_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF8_A { +pub enum Vf8 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF8_A) -> Self { + fn from(variant: Vf8) -> Self { variant as u8 != 0 } } -impl VF8_R { +#[doc = "Field `VF8` reader - Valid Flag of Result Register x"] +pub type Vf8R = crate::BitReader; +impl Vf8R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF8_A { + pub const fn variant(&self) -> Vf8 { match self.bits { - false => VF8_A::VALUE1, - true => VF8_A::VALUE2, + false => Vf8::Value1, + true => Vf8::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF8_A::VALUE1 + *self == Vf8::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF8_A::VALUE2 + *self == Vf8::Value2 } } #[doc = "Field `VF8` writer - Valid Flag of Result Register x"] -pub type VF8_W<'a, REG> = crate::BitWriter<'a, REG, VF8_A>; -impl<'a, REG> VF8_W<'a, REG> +pub type Vf8W<'a, REG> = crate::BitWriter<'a, REG, Vf8>; +impl<'a, REG> Vf8W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF8_A::VALUE1) + self.variant(Vf8::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF8_A::VALUE2) + self.variant(Vf8::Value2) } } -#[doc = "Field `VF9` reader - Valid Flag of Result Register x"] -pub type VF9_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF9_A { +pub enum Vf9 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF9_A) -> Self { + fn from(variant: Vf9) -> Self { variant as u8 != 0 } } -impl VF9_R { +#[doc = "Field `VF9` reader - Valid Flag of Result Register x"] +pub type Vf9R = crate::BitReader; +impl Vf9R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF9_A { + pub const fn variant(&self) -> Vf9 { match self.bits { - false => VF9_A::VALUE1, - true => VF9_A::VALUE2, + false => Vf9::Value1, + true => Vf9::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF9_A::VALUE1 + *self == Vf9::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF9_A::VALUE2 + *self == Vf9::Value2 } } #[doc = "Field `VF9` writer - Valid Flag of Result Register x"] -pub type VF9_W<'a, REG> = crate::BitWriter<'a, REG, VF9_A>; -impl<'a, REG> VF9_W<'a, REG> +pub type Vf9W<'a, REG> = crate::BitWriter<'a, REG, Vf9>; +impl<'a, REG> Vf9W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF9_A::VALUE1) + self.variant(Vf9::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF9_A::VALUE2) + self.variant(Vf9::Value2) } } -#[doc = "Field `VF10` reader - Valid Flag of Result Register x"] -pub type VF10_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF10_A { +pub enum Vf10 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF10_A) -> Self { + fn from(variant: Vf10) -> Self { variant as u8 != 0 } } -impl VF10_R { +#[doc = "Field `VF10` reader - Valid Flag of Result Register x"] +pub type Vf10R = crate::BitReader; +impl Vf10R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF10_A { + pub const fn variant(&self) -> Vf10 { match self.bits { - false => VF10_A::VALUE1, - true => VF10_A::VALUE2, + false => Vf10::Value1, + true => Vf10::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF10_A::VALUE1 + *self == Vf10::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF10_A::VALUE2 + *self == Vf10::Value2 } } #[doc = "Field `VF10` writer - Valid Flag of Result Register x"] -pub type VF10_W<'a, REG> = crate::BitWriter<'a, REG, VF10_A>; -impl<'a, REG> VF10_W<'a, REG> +pub type Vf10W<'a, REG> = crate::BitWriter<'a, REG, Vf10>; +impl<'a, REG> Vf10W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF10_A::VALUE1) + self.variant(Vf10::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF10_A::VALUE2) + self.variant(Vf10::Value2) } } -#[doc = "Field `VF11` reader - Valid Flag of Result Register x"] -pub type VF11_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF11_A { +pub enum Vf11 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF11_A) -> Self { + fn from(variant: Vf11) -> Self { variant as u8 != 0 } } -impl VF11_R { +#[doc = "Field `VF11` reader - Valid Flag of Result Register x"] +pub type Vf11R = crate::BitReader; +impl Vf11R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF11_A { + pub const fn variant(&self) -> Vf11 { match self.bits { - false => VF11_A::VALUE1, - true => VF11_A::VALUE2, + false => Vf11::Value1, + true => Vf11::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF11_A::VALUE1 + *self == Vf11::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF11_A::VALUE2 + *self == Vf11::Value2 } } #[doc = "Field `VF11` writer - Valid Flag of Result Register x"] -pub type VF11_W<'a, REG> = crate::BitWriter<'a, REG, VF11_A>; -impl<'a, REG> VF11_W<'a, REG> +pub type Vf11W<'a, REG> = crate::BitWriter<'a, REG, Vf11>; +impl<'a, REG> Vf11W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF11_A::VALUE1) + self.variant(Vf11::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF11_A::VALUE2) + self.variant(Vf11::Value2) } } -#[doc = "Field `VF12` reader - Valid Flag of Result Register x"] -pub type VF12_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF12_A { +pub enum Vf12 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF12_A) -> Self { + fn from(variant: Vf12) -> Self { variant as u8 != 0 } } -impl VF12_R { +#[doc = "Field `VF12` reader - Valid Flag of Result Register x"] +pub type Vf12R = crate::BitReader; +impl Vf12R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF12_A { + pub const fn variant(&self) -> Vf12 { match self.bits { - false => VF12_A::VALUE1, - true => VF12_A::VALUE2, + false => Vf12::Value1, + true => Vf12::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF12_A::VALUE1 + *self == Vf12::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF12_A::VALUE2 + *self == Vf12::Value2 } } #[doc = "Field `VF12` writer - Valid Flag of Result Register x"] -pub type VF12_W<'a, REG> = crate::BitWriter<'a, REG, VF12_A>; -impl<'a, REG> VF12_W<'a, REG> +pub type Vf12W<'a, REG> = crate::BitWriter<'a, REG, Vf12>; +impl<'a, REG> Vf12W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF12_A::VALUE1) + self.variant(Vf12::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF12_A::VALUE2) + self.variant(Vf12::Value2) } } -#[doc = "Field `VF13` reader - Valid Flag of Result Register x"] -pub type VF13_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF13_A { +pub enum Vf13 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF13_A) -> Self { + fn from(variant: Vf13) -> Self { variant as u8 != 0 } } -impl VF13_R { +#[doc = "Field `VF13` reader - Valid Flag of Result Register x"] +pub type Vf13R = crate::BitReader; +impl Vf13R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF13_A { + pub const fn variant(&self) -> Vf13 { match self.bits { - false => VF13_A::VALUE1, - true => VF13_A::VALUE2, + false => Vf13::Value1, + true => Vf13::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF13_A::VALUE1 + *self == Vf13::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF13_A::VALUE2 + *self == Vf13::Value2 } } #[doc = "Field `VF13` writer - Valid Flag of Result Register x"] -pub type VF13_W<'a, REG> = crate::BitWriter<'a, REG, VF13_A>; -impl<'a, REG> VF13_W<'a, REG> +pub type Vf13W<'a, REG> = crate::BitWriter<'a, REG, Vf13>; +impl<'a, REG> Vf13W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF13_A::VALUE1) + self.variant(Vf13::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF13_A::VALUE2) + self.variant(Vf13::Value2) } } -#[doc = "Field `VF14` reader - Valid Flag of Result Register x"] -pub type VF14_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF14_A { +pub enum Vf14 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF14_A) -> Self { + fn from(variant: Vf14) -> Self { variant as u8 != 0 } } -impl VF14_R { +#[doc = "Field `VF14` reader - Valid Flag of Result Register x"] +pub type Vf14R = crate::BitReader; +impl Vf14R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF14_A { + pub const fn variant(&self) -> Vf14 { match self.bits { - false => VF14_A::VALUE1, - true => VF14_A::VALUE2, + false => Vf14::Value1, + true => Vf14::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF14_A::VALUE1 + *self == Vf14::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF14_A::VALUE2 + *self == Vf14::Value2 } } #[doc = "Field `VF14` writer - Valid Flag of Result Register x"] -pub type VF14_W<'a, REG> = crate::BitWriter<'a, REG, VF14_A>; -impl<'a, REG> VF14_W<'a, REG> +pub type Vf14W<'a, REG> = crate::BitWriter<'a, REG, Vf14>; +impl<'a, REG> Vf14W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF14_A::VALUE1) + self.variant(Vf14::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF14_A::VALUE2) + self.variant(Vf14::Value2) } } -#[doc = "Field `VF15` reader - Valid Flag of Result Register x"] -pub type VF15_R = crate::BitReader; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum VF15_A { +pub enum Vf15 { #[doc = "0: Read access: No new valid data available Write access: No effect"] - VALUE1 = 0, + Value1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - VALUE2 = 1, + Value2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: VF15_A) -> Self { + fn from(variant: Vf15) -> Self { variant as u8 != 0 } } -impl VF15_R { +#[doc = "Field `VF15` reader - Valid Flag of Result Register x"] +pub type Vf15R = crate::BitReader; +impl Vf15R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> VF15_A { + pub const fn variant(&self) -> Vf15 { match self.bits { - false => VF15_A::VALUE1, - true => VF15_A::VALUE2, + false => Vf15::Value1, + true => Vf15::Value2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == VF15_A::VALUE1 + *self == Vf15::Value1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == VF15_A::VALUE2 + *self == Vf15::Value2 } } #[doc = "Field `VF15` writer - Valid Flag of Result Register x"] -pub type VF15_W<'a, REG> = crate::BitWriter<'a, REG, VF15_A>; -impl<'a, REG> VF15_W<'a, REG> +pub type Vf15W<'a, REG> = crate::BitWriter<'a, REG, Vf15>; +impl<'a, REG> Vf15W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(VF15_A::VALUE1) + self.variant(Vf15::Value1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(VF15_A::VALUE2) + self.variant(Vf15::Value2) } } impl R { #[doc = "Bit 0 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf0(&self) -> VF0_R { - VF0_R::new((self.bits & 1) != 0) + pub fn vf0(&self) -> Vf0R { + Vf0R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf1(&self) -> VF1_R { - VF1_R::new(((self.bits >> 1) & 1) != 0) + pub fn vf1(&self) -> Vf1R { + Vf1R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf2(&self) -> VF2_R { - VF2_R::new(((self.bits >> 2) & 1) != 0) + pub fn vf2(&self) -> Vf2R { + Vf2R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf3(&self) -> VF3_R { - VF3_R::new(((self.bits >> 3) & 1) != 0) + pub fn vf3(&self) -> Vf3R { + Vf3R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf4(&self) -> VF4_R { - VF4_R::new(((self.bits >> 4) & 1) != 0) + pub fn vf4(&self) -> Vf4R { + Vf4R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf5(&self) -> VF5_R { - VF5_R::new(((self.bits >> 5) & 1) != 0) + pub fn vf5(&self) -> Vf5R { + Vf5R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf6(&self) -> VF6_R { - VF6_R::new(((self.bits >> 6) & 1) != 0) + pub fn vf6(&self) -> Vf6R { + Vf6R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf7(&self) -> VF7_R { - VF7_R::new(((self.bits >> 7) & 1) != 0) + pub fn vf7(&self) -> Vf7R { + Vf7R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf8(&self) -> VF8_R { - VF8_R::new(((self.bits >> 8) & 1) != 0) + pub fn vf8(&self) -> Vf8R { + Vf8R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf9(&self) -> VF9_R { - VF9_R::new(((self.bits >> 9) & 1) != 0) + pub fn vf9(&self) -> Vf9R { + Vf9R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf10(&self) -> VF10_R { - VF10_R::new(((self.bits >> 10) & 1) != 0) + pub fn vf10(&self) -> Vf10R { + Vf10R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf11(&self) -> VF11_R { - VF11_R::new(((self.bits >> 11) & 1) != 0) + pub fn vf11(&self) -> Vf11R { + Vf11R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf12(&self) -> VF12_R { - VF12_R::new(((self.bits >> 12) & 1) != 0) + pub fn vf12(&self) -> Vf12R { + Vf12R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf13(&self) -> VF13_R { - VF13_R::new(((self.bits >> 13) & 1) != 0) + pub fn vf13(&self) -> Vf13R { + Vf13R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf14(&self) -> VF14_R { - VF14_R::new(((self.bits >> 14) & 1) != 0) + pub fn vf14(&self) -> Vf14R { + Vf14R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf15(&self) -> VF15_R { - VF15_R::new(((self.bits >> 15) & 1) != 0) + pub fn vf15(&self) -> Vf15R { + Vf15R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf0(&mut self) -> VF0_W { - VF0_W::new(self, 0) + pub fn vf0(&mut self) -> Vf0W { + Vf0W::new(self, 0) } #[doc = "Bit 1 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf1(&mut self) -> VF1_W { - VF1_W::new(self, 1) + pub fn vf1(&mut self) -> Vf1W { + Vf1W::new(self, 1) } #[doc = "Bit 2 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf2(&mut self) -> VF2_W { - VF2_W::new(self, 2) + pub fn vf2(&mut self) -> Vf2W { + Vf2W::new(self, 2) } #[doc = "Bit 3 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf3(&mut self) -> VF3_W { - VF3_W::new(self, 3) + pub fn vf3(&mut self) -> Vf3W { + Vf3W::new(self, 3) } #[doc = "Bit 4 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf4(&mut self) -> VF4_W { - VF4_W::new(self, 4) + pub fn vf4(&mut self) -> Vf4W { + Vf4W::new(self, 4) } #[doc = "Bit 5 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf5(&mut self) -> VF5_W { - VF5_W::new(self, 5) + pub fn vf5(&mut self) -> Vf5W { + Vf5W::new(self, 5) } #[doc = "Bit 6 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf6(&mut self) -> VF6_W { - VF6_W::new(self, 6) + pub fn vf6(&mut self) -> Vf6W { + Vf6W::new(self, 6) } #[doc = "Bit 7 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf7(&mut self) -> VF7_W { - VF7_W::new(self, 7) + pub fn vf7(&mut self) -> Vf7W { + Vf7W::new(self, 7) } #[doc = "Bit 8 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf8(&mut self) -> VF8_W { - VF8_W::new(self, 8) + pub fn vf8(&mut self) -> Vf8W { + Vf8W::new(self, 8) } #[doc = "Bit 9 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf9(&mut self) -> VF9_W { - VF9_W::new(self, 9) + pub fn vf9(&mut self) -> Vf9W { + Vf9W::new(self, 9) } #[doc = "Bit 10 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf10(&mut self) -> VF10_W { - VF10_W::new(self, 10) + pub fn vf10(&mut self) -> Vf10W { + Vf10W::new(self, 10) } #[doc = "Bit 11 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf11(&mut self) -> VF11_W { - VF11_W::new(self, 11) + pub fn vf11(&mut self) -> Vf11W { + Vf11W::new(self, 11) } #[doc = "Bit 12 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf12(&mut self) -> VF12_W { - VF12_W::new(self, 12) + pub fn vf12(&mut self) -> Vf12W { + Vf12W::new(self, 12) } #[doc = "Bit 13 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf13(&mut self) -> VF13_W { - VF13_W::new(self, 13) + pub fn vf13(&mut self) -> Vf13W { + Vf13W::new(self, 13) } #[doc = "Bit 14 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf14(&mut self) -> VF14_W { - VF14_W::new(self, 14) + pub fn vf14(&mut self) -> Vf14W { + Vf14W::new(self, 14) } #[doc = "Bit 15 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf15(&mut self) -> VF15_W { - VF15_W::new(self, 15) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn vf15(&mut self) -> Vf15W { + Vf15W::new(self, 15) } } #[doc = "Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VFR_SPEC; -impl crate::RegisterSpec for VFR_SPEC { +pub struct VfrSpec; +impl crate::RegisterSpec for VfrSpec { type Ux = u32; } #[doc = "`read()` method returns [`vfr::R`](R) reader structure"] -impl crate::Readable for VFR_SPEC {} +impl crate::Readable for VfrSpec {} #[doc = "`write(|w| ..)` method takes [`vfr::W`](W) writer structure"] -impl crate::Writable for VFR_SPEC { +impl crate::Writable for VfrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VFR to value 0"] -impl crate::Resettable for VFR_SPEC { +impl crate::Resettable for VfrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt.rs b/src/wdt.rs index d43a0e68..43925458 100644 --- a/src/wdt.rs +++ b/src/wdt.rs @@ -1,94 +1,102 @@ -#[doc = r"Register block"] #[repr(C)] +#[doc = "Register block"] pub struct RegisterBlock { - id: ID, - ctr: CTR, - srv: SRV, - tim: TIM, - wlb: WLB, - wub: WUB, - wdtsts: WDTSTS, - wdtclr: WDTCLR, + id: Id, + ctr: Ctr, + srv: Srv, + tim: Tim, + wlb: Wlb, + wub: Wub, + wdtsts: Wdtsts, + wdtclr: Wdtclr, } impl RegisterBlock { #[doc = "0x00 - WDT ID Register"] #[inline(always)] - pub const fn id(&self) -> &ID { + pub const fn id(&self) -> &Id { &self.id } #[doc = "0x04 - WDT Control Register"] #[inline(always)] - pub const fn ctr(&self) -> &CTR { + pub const fn ctr(&self) -> &Ctr { &self.ctr } #[doc = "0x08 - WDT Service Register"] #[inline(always)] - pub const fn srv(&self) -> &SRV { + pub const fn srv(&self) -> &Srv { &self.srv } #[doc = "0x0c - WDT Timer Register"] #[inline(always)] - pub const fn tim(&self) -> &TIM { + pub const fn tim(&self) -> &Tim { &self.tim } #[doc = "0x10 - WDT Window Lower Bound Register"] #[inline(always)] - pub const fn wlb(&self) -> &WLB { + pub const fn wlb(&self) -> &Wlb { &self.wlb } #[doc = "0x14 - WDT Window Upper Bound Register"] #[inline(always)] - pub const fn wub(&self) -> &WUB { + pub const fn wub(&self) -> &Wub { &self.wub } #[doc = "0x18 - WDT Status Register"] #[inline(always)] - pub const fn wdtsts(&self) -> &WDTSTS { + pub const fn wdtsts(&self) -> &Wdtsts { &self.wdtsts } #[doc = "0x1c - WDT Clear Register"] #[inline(always)] - pub const fn wdtclr(&self) -> &WDTCLR { + pub const fn wdtclr(&self) -> &Wdtclr { &self.wdtclr } } #[doc = "ID (r) register accessor: WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -pub type ID = crate::Reg; +#[doc(alias = "ID")] +pub type Id = crate::Reg; #[doc = "WDT ID Register"] pub mod id; #[doc = "CTR (rw) register accessor: WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -pub type CTR = crate::Reg; +#[doc(alias = "CTR")] +pub type Ctr = crate::Reg; #[doc = "WDT Control Register"] pub mod ctr; #[doc = "SRV (w) register accessor: WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srv`] module"] -pub type SRV = crate::Reg; +#[doc(alias = "SRV")] +pub type Srv = crate::Reg; #[doc = "WDT Service Register"] pub mod srv; #[doc = "TIM (r) register accessor: WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim`] module"] -pub type TIM = crate::Reg; +#[doc(alias = "TIM")] +pub type Tim = crate::Reg; #[doc = "WDT Timer Register"] pub mod tim; #[doc = "WLB (rw) register accessor: WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wlb`] module"] -pub type WLB = crate::Reg; +#[doc(alias = "WLB")] +pub type Wlb = crate::Reg; #[doc = "WDT Window Lower Bound Register"] pub mod wlb; #[doc = "WUB (rw) register accessor: WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wub`] module"] -pub type WUB = crate::Reg; +#[doc(alias = "WUB")] +pub type Wub = crate::Reg; #[doc = "WDT Window Upper Bound Register"] pub mod wub; #[doc = "WDTSTS (r) register accessor: WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtsts`] module"] -pub type WDTSTS = crate::Reg; +#[doc(alias = "WDTSTS")] +pub type Wdtsts = crate::Reg; #[doc = "WDT Status Register"] pub mod wdtsts; #[doc = "WDTCLR (w) register accessor: WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclr`] module"] -pub type WDTCLR = crate::Reg; +#[doc(alias = "WDTCLR")] +pub type Wdtclr = crate::Reg; #[doc = "WDT Clear Register"] pub mod wdtclr; diff --git a/src/wdt/ctr.rs b/src/wdt/ctr.rs index 3b106525..8529cf4b 100644 --- a/src/wdt/ctr.rs +++ b/src/wdt/ctr.rs @@ -1,94 +1,85 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENB` reader - Enable"] -pub type ENB_R = crate::BitReader; +pub type EnbR = crate::BitReader; #[doc = "Field `ENB` writer - Enable"] -pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRE` reader - Pre-warning"] -pub type PRE_R = crate::BitReader; +pub type PreR = crate::BitReader; #[doc = "Field `PRE` writer - Pre-warning"] -pub type PRE_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PreW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSP` reader - Debug Suspend"] -pub type DSP_R = crate::BitReader; +pub type DspR = crate::BitReader; #[doc = "Field `DSP` writer - Debug Suspend"] -pub type DSP_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type DspW<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPW` reader - Service Indication Pulse Width"] -pub type SPW_R = crate::FieldReader; +pub type SpwR = crate::FieldReader; #[doc = "Field `SPW` writer - Service Indication Pulse Width"] -pub type SPW_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SpwW<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn enb(&self) -> ENB_R { - ENB_R::new((self.bits & 1) != 0) + pub fn enb(&self) -> EnbR { + EnbR::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pre-warning"] #[inline(always)] - pub fn pre(&self) -> PRE_R { - PRE_R::new(((self.bits >> 1) & 1) != 0) + pub fn pre(&self) -> PreR { + PreR::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Debug Suspend"] #[inline(always)] - pub fn dsp(&self) -> DSP_R { - DSP_R::new(((self.bits >> 4) & 1) != 0) + pub fn dsp(&self) -> DspR { + DspR::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:15 - Service Indication Pulse Width"] #[inline(always)] - pub fn spw(&self) -> SPW_R { - SPW_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn spw(&self) -> SpwR { + SpwR::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> ENB_W { - ENB_W::new(self, 0) + pub fn enb(&mut self) -> EnbW { + EnbW::new(self, 0) } #[doc = "Bit 1 - Pre-warning"] #[inline(always)] #[must_use] - pub fn pre(&mut self) -> PRE_W { - PRE_W::new(self, 1) + pub fn pre(&mut self) -> PreW { + PreW::new(self, 1) } #[doc = "Bit 4 - Debug Suspend"] #[inline(always)] #[must_use] - pub fn dsp(&mut self) -> DSP_W { - DSP_W::new(self, 4) + pub fn dsp(&mut self) -> DspW { + DspW::new(self, 4) } #[doc = "Bits 8:15 - Service Indication Pulse Width"] #[inline(always)] #[must_use] - pub fn spw(&mut self) -> SPW_W { - SPW_W::new(self, 8) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn spw(&mut self) -> SpwW { + SpwW::new(self, 8) } } #[doc = "WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CTR_SPEC; -impl crate::RegisterSpec for CTR_SPEC { +pub struct CtrSpec; +impl crate::RegisterSpec for CtrSpec { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CTR_SPEC {} +impl crate::Readable for CtrSpec {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CTR_SPEC { +impl crate::Writable for CtrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0"] -impl crate::Resettable for CTR_SPEC { +impl crate::Resettable for CtrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/id.rs b/src/wdt/id.rs index aff37fe6..31284eef 100644 --- a/src/wdt/id.rs +++ b/src/wdt/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type MOD_REV_R = crate::FieldReader; +pub type ModRevR = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type MOD_TYPE_R = crate::FieldReader; +pub type ModTypeR = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type MOD_NUMBER_R = crate::FieldReader; +pub type ModNumberR = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> MOD_REV_R { - MOD_REV_R::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> ModRevR { + ModRevR::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> MOD_TYPE_R { - MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> ModTypeR { + ModTypeR::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> MOD_NUMBER_R { - MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> ModNumberR { + ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ID_SPEC; -impl crate::RegisterSpec for ID_SPEC { +pub struct IdSpec; +impl crate::RegisterSpec for IdSpec { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for ID_SPEC {} +impl crate::Readable for IdSpec {} #[doc = "`reset()` method sets ID to value 0x00ad_c000"] -impl crate::Resettable for ID_SPEC { +impl crate::Resettable for IdSpec { const RESET_VALUE: u32 = 0x00ad_c000; } diff --git a/src/wdt/srv.rs b/src/wdt/srv.rs index 888d4090..e8896284 100644 --- a/src/wdt/srv.rs +++ b/src/wdt/srv.rs @@ -1,36 +1,27 @@ #[doc = "Register `SRV` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SRV` writer - Service"] -pub type SRV_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SrvW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Service"] #[inline(always)] #[must_use] - pub fn srv(&mut self) -> SRV_W { - SRV_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn srv(&mut self) -> SrvW { + SrvW::new(self, 0) } } #[doc = "WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SRV_SPEC; -impl crate::RegisterSpec for SRV_SPEC { +pub struct SrvSpec; +impl crate::RegisterSpec for SrvSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srv::W`](W) writer structure"] -impl crate::Writable for SRV_SPEC { +impl crate::Writable for SrvSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRV to value 0"] -impl crate::Resettable for SRV_SPEC { +impl crate::Resettable for SrvSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/tim.rs b/src/wdt/tim.rs index 1c2e5b06..5ca28317 100644 --- a/src/wdt/tim.rs +++ b/src/wdt/tim.rs @@ -1,22 +1,22 @@ #[doc = "Register `TIM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TIM` reader - Timer Value"] -pub type TIM_R = crate::FieldReader; +pub type TimR = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Timer Value"] #[inline(always)] - pub fn tim(&self) -> TIM_R { - TIM_R::new(self.bits) + pub fn tim(&self) -> TimR { + TimR::new(self.bits) } } #[doc = "WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TIM_SPEC; -impl crate::RegisterSpec for TIM_SPEC { +pub struct TimSpec; +impl crate::RegisterSpec for TimSpec { type Ux = u32; } #[doc = "`read()` method returns [`tim::R`](R) reader structure"] -impl crate::Readable for TIM_SPEC {} +impl crate::Readable for TimSpec {} #[doc = "`reset()` method sets TIM to value 0"] -impl crate::Resettable for TIM_SPEC { +impl crate::Resettable for TimSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wdtclr.rs b/src/wdt/wdtclr.rs index 7fb7c53e..61bb919f 100644 --- a/src/wdt/wdtclr.rs +++ b/src/wdt/wdtclr.rs @@ -1,36 +1,27 @@ #[doc = "Register `WDTCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ALMC` writer - Pre-warning Alarm"] -pub type ALMC_W<'a, REG> = crate::BitWriter<'a, REG>; +pub type AlmcW<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Pre-warning Alarm"] #[inline(always)] #[must_use] - pub fn almc(&mut self) -> ALMC_W { - ALMC_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn almc(&mut self) -> AlmcW { + AlmcW::new(self, 0) } } #[doc = "WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WDTCLR_SPEC; -impl crate::RegisterSpec for WDTCLR_SPEC { +pub struct WdtclrSpec; +impl crate::RegisterSpec for WdtclrSpec { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`wdtclr::W`](W) writer structure"] -impl crate::Writable for WDTCLR_SPEC { +impl crate::Writable for WdtclrSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDTCLR to value 0"] -impl crate::Resettable for WDTCLR_SPEC { +impl crate::Resettable for WdtclrSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wdtsts.rs b/src/wdt/wdtsts.rs index 99190fa2..d5f03a5d 100644 --- a/src/wdt/wdtsts.rs +++ b/src/wdt/wdtsts.rs @@ -1,22 +1,22 @@ #[doc = "Register `WDTSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ALMS` reader - Pre-warning Alarm"] -pub type ALMS_R = crate::BitReader; +pub type AlmsR = crate::BitReader; impl R { #[doc = "Bit 0 - Pre-warning Alarm"] #[inline(always)] - pub fn alms(&self) -> ALMS_R { - ALMS_R::new((self.bits & 1) != 0) + pub fn alms(&self) -> AlmsR { + AlmsR::new((self.bits & 1) != 0) } } #[doc = "WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WDTSTS_SPEC; -impl crate::RegisterSpec for WDTSTS_SPEC { +pub struct WdtstsSpec; +impl crate::RegisterSpec for WdtstsSpec { type Ux = u32; } #[doc = "`read()` method returns [`wdtsts::R`](R) reader structure"] -impl crate::Readable for WDTSTS_SPEC {} +impl crate::Readable for WdtstsSpec {} #[doc = "`reset()` method sets WDTSTS to value 0"] -impl crate::Resettable for WDTSTS_SPEC { +impl crate::Resettable for WdtstsSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wlb.rs b/src/wdt/wlb.rs index c885e4f0..23a9afee 100644 --- a/src/wdt/wlb.rs +++ b/src/wdt/wlb.rs @@ -1,49 +1,40 @@ #[doc = "Register `WLB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WLB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WLB` reader - Window Lower Bound"] -pub type WLB_R = crate::FieldReader; +pub type WlbR = crate::FieldReader; #[doc = "Field `WLB` writer - Window Lower Bound"] -pub type WLB_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WlbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Window Lower Bound"] #[inline(always)] - pub fn wlb(&self) -> WLB_R { - WLB_R::new(self.bits) + pub fn wlb(&self) -> WlbR { + WlbR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Window Lower Bound"] #[inline(always)] #[must_use] - pub fn wlb(&mut self) -> WLB_W { - WLB_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wlb(&mut self) -> WlbW { + WlbW::new(self, 0) } } #[doc = "WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WLB_SPEC; -impl crate::RegisterSpec for WLB_SPEC { +pub struct WlbSpec; +impl crate::RegisterSpec for WlbSpec { type Ux = u32; } #[doc = "`read()` method returns [`wlb::R`](R) reader structure"] -impl crate::Readable for WLB_SPEC {} +impl crate::Readable for WlbSpec {} #[doc = "`write(|w| ..)` method takes [`wlb::W`](W) writer structure"] -impl crate::Writable for WLB_SPEC { +impl crate::Writable for WlbSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WLB to value 0"] -impl crate::Resettable for WLB_SPEC { +impl crate::Resettable for WlbSpec { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wub.rs b/src/wdt/wub.rs index f5a65192..2fd8b442 100644 --- a/src/wdt/wub.rs +++ b/src/wdt/wub.rs @@ -1,49 +1,40 @@ #[doc = "Register `WUB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WUB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WUB` reader - Window Upper Bound"] -pub type WUB_R = crate::FieldReader; +pub type WubR = crate::FieldReader; #[doc = "Field `WUB` writer - Window Upper Bound"] -pub type WUB_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WubW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Window Upper Bound"] #[inline(always)] - pub fn wub(&self) -> WUB_R { - WUB_R::new(self.bits) + pub fn wub(&self) -> WubR { + WubR::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Window Upper Bound"] #[inline(always)] #[must_use] - pub fn wub(&mut self) -> WUB_W { - WUB_W::new(self, 0) - } - #[doc = r" Writes raw bits to the register."] - #[doc = r""] - #[doc = r" # Safety"] - #[doc = r""] - #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] - #[inline(always)] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self + pub fn wub(&mut self) -> WubW { + WubW::new(self, 0) } } #[doc = "WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WUB_SPEC; -impl crate::RegisterSpec for WUB_SPEC { +pub struct WubSpec; +impl crate::RegisterSpec for WubSpec { type Ux = u32; } #[doc = "`read()` method returns [`wub::R`](R) reader structure"] -impl crate::Readable for WUB_SPEC {} +impl crate::Readable for WubSpec {} #[doc = "`write(|w| ..)` method takes [`wub::W`](W) writer structure"] -impl crate::Writable for WUB_SPEC { +impl crate::Writable for WubSpec { + type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WUB to value 0xffff_ffff"] -impl crate::Resettable for WUB_SPEC { +impl crate::Resettable for WubSpec { const RESET_VALUE: u32 = 0xffff_ffff; }